Mark Underwood / Mbed OS MAX11043_Serial_Tester

Test program running on MAX32625MBED. Control through USB Serial commands using a terminal emulator such as teraterm or putty.

Dependencies:   MaximTinyTester CmdLine MAX541 USBDevice

MAX11043/MAX11043.cpp@83:29bb86cc45bc, 2020-02-27 (annotated)

Committer:
whismanoid
Date:
Thu Feb 27 00:27:11 2020 +0000
Revision:
83:29bb86cc45bc
Parent:
82:9ea067fad5c3
Child:
89:20fd6ce5e4dd
WIP Read 4 command -- Single 4-channel read: CONVRUN pulsed H then L, EOC ignored. Keypress not breaking loop, must press RESET to halt.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
whismanoid 53:3d5a3d241a5e 1 // /*******************************************************************************
whismanoid 53:3d5a3d241a5e 2 // * Copyright (C) 2020 Maxim Integrated Products, Inc., All Rights Reserved.
whismanoid 53:3d5a3d241a5e 3 // *
whismanoid 53:3d5a3d241a5e 4 // * Permission is hereby granted, free of charge, to any person obtaining a
whismanoid 53:3d5a3d241a5e 5 // * copy of this software and associated documentation files (the "Software"),
whismanoid 53:3d5a3d241a5e 6 // * to deal in the Software without restriction, including without limitation
whismanoid 53:3d5a3d241a5e 7 // * the rights to use, copy, modify, merge, publish, distribute, sublicense,
whismanoid 53:3d5a3d241a5e 8 // * and/or sell copies of the Software, and to permit persons to whom the
whismanoid 53:3d5a3d241a5e 9 // * Software is furnished to do so, subject to the following conditions:
whismanoid 53:3d5a3d241a5e 10 // *
whismanoid 53:3d5a3d241a5e 11 // * The above copyright notice and this permission notice shall be included
whismanoid 53:3d5a3d241a5e 12 // * in all copies or substantial portions of the Software.
whismanoid 53:3d5a3d241a5e 13 // *
whismanoid 53:3d5a3d241a5e 14 // * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
whismanoid 53:3d5a3d241a5e 15 // * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
whismanoid 53:3d5a3d241a5e 16 // * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
whismanoid 53:3d5a3d241a5e 17 // * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
whismanoid 53:3d5a3d241a5e 18 // * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
whismanoid 53:3d5a3d241a5e 19 // * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
whismanoid 53:3d5a3d241a5e 20 // * OTHER DEALINGS IN THE SOFTWARE.
whismanoid 53:3d5a3d241a5e 21 // *
whismanoid 53:3d5a3d241a5e 22 // * Except as contained in this notice, the name of Maxim Integrated
whismanoid 53:3d5a3d241a5e 23 // * Products, Inc. shall not be used except as stated in the Maxim Integrated
whismanoid 53:3d5a3d241a5e 24 // * Products, Inc. Branding Policy.
whismanoid 53:3d5a3d241a5e 25 // *
whismanoid 53:3d5a3d241a5e 26 // * The mere transfer of this software does not imply any licenses
whismanoid 53:3d5a3d241a5e 27 // * of trade secrets, proprietary technology, copyrights, patents,
whismanoid 53:3d5a3d241a5e 28 // * trademarks, maskwork rights, or any other form of intellectual
whismanoid 53:3d5a3d241a5e 29 // * property whatsoever. Maxim Integrated Products, Inc. retains all
whismanoid 53:3d5a3d241a5e 30 // * ownership rights.
whismanoid 53:3d5a3d241a5e 31 // *******************************************************************************
whismanoid 53:3d5a3d241a5e 32 // */
whismanoid 53:3d5a3d241a5e 33 // *********************************************************************
whismanoid 53:3d5a3d241a5e 34 // @file MAX11043.cpp
whismanoid 53:3d5a3d241a5e 35 // *********************************************************************
whismanoid 53:3d5a3d241a5e 36 // Device Driver file
whismanoid 83:29bb86cc45bc 37 // DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file. * MANUAL EDITS PRESENT *
whismanoid 53:3d5a3d241a5e 38 // generated by XMLSystemOfDevicesToMBED.py
whismanoid 53:3d5a3d241a5e 39 // System Name = ExampleSystem
whismanoid 53:3d5a3d241a5e 40 // System Description = Device driver example
whismanoid 53:3d5a3d241a5e 41
whismanoid 53:3d5a3d241a5e 42 #include "MAX11043.h"
whismanoid 69:989e392cf635 43 //--------------------------------------------------
whismanoid 69:989e392cf635 44 // MAX11043 ADC Read operations must be synchronized to EOC End Of Conversion
whismanoid 69:989e392cf635 45 // EOC# asserts low when new data is available.
whismanoid 69:989e392cf635 46 // Initiate a data read prior to the next rising edge of EOC# or the result is overwritten.
whismanoid 69:989e392cf635 47 #ifndef MAX11043_EOC_INTERRUPT_POLLING
whismanoid 81:167dee56c45b 48 #define MAX11043_EOC_INTERRUPT_POLLING 1
whismanoid 69:989e392cf635 49 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 73:879578472009 50 //--------------------------------------------------
whismanoid 76:0397493d7baf 51 // SPI is not interrupt-safe, so use EventQueue to defer execution to user context.
whismanoid 76:0397493d7baf 52 #ifndef MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 83:29bb86cc45bc 53 #define MAX11043_EOC_INTERRUPT_EVENTQUEUE 0
whismanoid 76:0397493d7baf 54 #endif // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 55 #if MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 56 #else // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 57 #endif // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 58 #if MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 59 // SPI is not interrupt-safe, so use EventQueue to defer execution to user context.
whismanoid 76:0397493d7baf 60 #include "mbed_events.h"
whismanoid 76:0397493d7baf 61 #define MYONEOCTHREADEVENTFLAG_ENABLE_SPI (1UL << 0)
whismanoid 76:0397493d7baf 62 EventFlags myOnEOCThread_event_flags;
whismanoid 76:0397493d7baf 63 Thread myOnEOCThread;
whismanoid 82:9ea067fad5c3 64 #if MAX11043_EOC_INTERRUPT_POLLING
whismanoid 82:9ea067fad5c3 65 // MAX11043 myOnEOCThread_POLLING_handler needs 18.80us, still too slow
whismanoid 82:9ea067fad5c3 66 extern DigitalInOut digitalInOut2; // m_EOC_pin declared in Test_Main_MAX11043.cpp
whismanoid 82:9ea067fad5c3 67 extern void myOnEOCThread_POLLING_handler();
whismanoid 82:9ea067fad5c3 68 #else // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 82:9ea067fad5c3 69 extern void myOnEOCThread_EVENTFLAG_ENABLE_SPI_handler();
whismanoid 82:9ea067fad5c3 70 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 76:0397493d7baf 71 #else // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 72 #endif // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 73 //--------------------------------------------------
whismanoid 73:879578472009 74 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 73:879578472009 75 #ifndef MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 73:879578472009 76 #define MAX11043_ScopeTrigger_MAX32625MBED_D5 1
whismanoid 73:879578472009 77 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 73:879578472009 78 #if MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 73:879578472009 79 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 73:879578472009 80 // WIP MAX11043 interrupt EOC echo - moving DigitalOut ScopeTrigger to global scope, it compiles but there is no activity on scope
whismanoid 74:f4f969c9a7a9 81 extern DigitalInOut digitalInOut5; // declared in Test_Main_MAX11043.cpp (D5, PIN_INPUT, PullUp, 1)
whismanoid 75:0900a57f2e5d 82 const size_t byteCount_onEOCFallingEdge = 1 + (2 * 4);
whismanoid 75:0900a57f2e5d 83 const uint8_t mosiData_onEOCFallingEdge[9] = {
whismanoid 75:0900a57f2e5d 84 MAX11043::CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd,
whismanoid 75:0900a57f2e5d 85 0, 0, 0, 0, 0, 0, 0, 0
whismanoid 75:0900a57f2e5d 86 };
whismanoid 75:0900a57f2e5d 87 uint8_t misoData_onEOCFallingEdge[9];
whismanoid 73:879578472009 88 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 53:3d5a3d241a5e 89
whismanoid 53:3d5a3d241a5e 90 // Device Name = MAX11043
whismanoid 53:3d5a3d241a5e 91 // Device Description = 200ksps, Low-Power, Serial SPI 24-Bit, 4-Channel, Differential/Single-Ended Input, Simultaneous-Sampling SD ADC
whismanoid 53:3d5a3d241a5e 92 // Device DeviceBriefDescription = 24-bit 200ksps Delta-Sigma ADC
whismanoid 53:3d5a3d241a5e 93 // Device Manufacturer = Maxim Integrated
whismanoid 53:3d5a3d241a5e 94 // Device PartNumber = MAX11043ATL+
whismanoid 53:3d5a3d241a5e 95 // Device RegValue_Width = DataWidth16bit_HL
whismanoid 53:3d5a3d241a5e 96 //
whismanoid 53:3d5a3d241a5e 97 // ADC MaxOutputDataRate = 200ksps
whismanoid 53:3d5a3d241a5e 98 // ADC NumChannels = 4
whismanoid 53:3d5a3d241a5e 99 // ADC ResolutionBits = 24
whismanoid 53:3d5a3d241a5e 100 //
whismanoid 53:3d5a3d241a5e 101 // SPI CS = ActiveLow
whismanoid 53:3d5a3d241a5e 102 // SPI FrameStart = CS
whismanoid 53:3d5a3d241a5e 103 // SPI CPOL = 0
whismanoid 53:3d5a3d241a5e 104 // SPI CPHA = 0
whismanoid 53:3d5a3d241a5e 105 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 53:3d5a3d241a5e 106 // SPI SCLK Idle Low
whismanoid 53:3d5a3d241a5e 107 // SPI SCLKMaxMHz = 40
whismanoid 53:3d5a3d241a5e 108 // SPI SCLKMinMHz = 0
whismanoid 53:3d5a3d241a5e 109 //
whismanoid 53:3d5a3d241a5e 110 // InputPin Name = CONVRUN
whismanoid 53:3d5a3d241a5e 111 // InputPin Description = CONVRUN (digital input). Convert Run. Drive high to start continuous conversions on all 4 channels. The device is idle when
whismanoid 53:3d5a3d241a5e 112 // CONVRUN is low.
whismanoid 53:3d5a3d241a5e 113 // InputPin Function = Configuration
whismanoid 53:3d5a3d241a5e 114 //
whismanoid 53:3d5a3d241a5e 115 // InputPin Name = SHDN
whismanoid 53:3d5a3d241a5e 116 // InputPin Description = Shutdown (digital input). Active-High Shutdown Input. Drive high to shut down the MAX11043.
whismanoid 53:3d5a3d241a5e 117 // InputPin Function = Configuration
whismanoid 53:3d5a3d241a5e 118 //
whismanoid 53:3d5a3d241a5e 119 // InputPin Name = DACSTEP
whismanoid 53:3d5a3d241a5e 120 // InputPin Description = DACSTEP (digital input). DAC Step Input. Drive high to move the DAC output in the direction of UP/DWN on the next rising
whismanoid 53:3d5a3d241a5e 121 // edge of the system clock.
whismanoid 53:3d5a3d241a5e 122 // InputPin Function = Configuration
whismanoid 53:3d5a3d241a5e 123 //
whismanoid 53:3d5a3d241a5e 124 // InputPin Name = UP/DWN#
whismanoid 53:3d5a3d241a5e 125 // InputPin Description = UP/DWN# (digital input). DAC Step Direction Select. Drive high to step up, drive low to step down when DACSTEP is toggled.
whismanoid 53:3d5a3d241a5e 126 // InputPin Function = Configuration
whismanoid 53:3d5a3d241a5e 127 //
whismanoid 53:3d5a3d241a5e 128 // OutputPin Name = EOC
whismanoid 53:3d5a3d241a5e 129 // OutputPin Description = End of Conversion Output. Active-Low End-of-Conversion Indicator. EOC asserts low to indicate that new data is ready.
whismanoid 53:3d5a3d241a5e 130 // OutputPin Function = Event
whismanoid 53:3d5a3d241a5e 131 //
whismanoid 58:2fea32db466b 132 // SupplyPin Name = AVDD
whismanoid 58:2fea32db466b 133 // SupplyPin Description = Analog Power-Supply Input. Bypass each AVDD with a nominal 1uF capacitor to AGND.
whismanoid 58:2fea32db466b 134 // SupplyPin VinMax = 3.60
whismanoid 58:2fea32db466b 135 // SupplyPin VinMin = 3.00
whismanoid 58:2fea32db466b 136 // SupplyPin Function = Analog
whismanoid 58:2fea32db466b 137 //
whismanoid 58:2fea32db466b 138 // SupplyPin Name = AGND
whismanoid 58:2fea32db466b 139 // SupplyPin Description = Analog Ground. Connect all AGND inputs together.
whismanoid 58:2fea32db466b 140 // SupplyPin VinMax = 0
whismanoid 58:2fea32db466b 141 // SupplyPin VinMin = 0
whismanoid 58:2fea32db466b 142 // SupplyPin Function = Analog
whismanoid 58:2fea32db466b 143 //
whismanoid 58:2fea32db466b 144 // SupplyPin Name = DGND
whismanoid 58:2fea32db466b 145 // SupplyPin Description = Digital Ground. Connect all DGND inputs together.
whismanoid 58:2fea32db466b 146 // SupplyPin VinMax = 0
whismanoid 58:2fea32db466b 147 // SupplyPin VinMin = 0
whismanoid 58:2fea32db466b 148 // SupplyPin Function = Digital
whismanoid 58:2fea32db466b 149 //
whismanoid 58:2fea32db466b 150 // SupplyPin Name = DVDD
whismanoid 58:2fea32db466b 151 // SupplyPin Description = Digital Power-Supply Input. Bypass each DVDD with a nominal 1uF capacitor to DGND.
whismanoid 83:29bb86cc45bc 152 // SupplyPin VinMax = 3.60
whismanoid 83:29bb86cc45bc 153 // SupplyPin VinMin = 3.00
whismanoid 58:2fea32db466b 154 // SupplyPin Function = Digital
whismanoid 58:2fea32db466b 155 //
whismanoid 58:2fea32db466b 156 // SupplyPin Name = DVREG
whismanoid 58:2fea32db466b 157 // SupplyPin Description = Regulated Digital Core Supply (from internal +2.5V regulator). Bypass DVREG to DGND with a 10uF capacitor.
whismanoid 58:2fea32db466b 158 // SupplyPin VinMax = 2.50
whismanoid 58:2fea32db466b 159 // SupplyPin VinMin = 2.50
whismanoid 58:2fea32db466b 160 // SupplyPin Function = Digital
whismanoid 58:2fea32db466b 161 //
whismanoid 53:3d5a3d241a5e 162
whismanoid 53:3d5a3d241a5e 163 // CODE GENERATOR: class constructor definition
whismanoid 53:3d5a3d241a5e 164 MAX11043::MAX11043(SPI &spi, DigitalOut &cs_pin, // SPI interface
whismanoid 53:3d5a3d241a5e 165 // CODE GENERATOR: class constructor definition gpio InputPin pins
whismanoid 53:3d5a3d241a5e 166 DigitalOut &CONVRUN_pin, // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 167 DigitalOut &SHDN_pin, // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 168 DigitalOut &DACSTEP_pin, // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 169 DigitalOut &UP_slash_DWNb_pin, // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 170 // CODE GENERATOR: class constructor definition gpio OutputPin pins
whismanoid 69:989e392cf635 171 // MAX11043 ADC Read operations must be synchronized to EOC End Of Conversion
whismanoid 69:989e392cf635 172 #if MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 173 // MAX11043 EOC End Of Conversion input should be InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 174 // Workaround using DigitalIn(PinName:EOC_pin) polled to sync with EOC falling edge for ADC reads
whismanoid 69:989e392cf635 175 // TODO: onEOCFallingEdge: replace DigitalIn &EOC_pin with PinName EOC_pin, so that I can create an InterruptIn(PinName:EOC_pin)
whismanoid 53:3d5a3d241a5e 176 DigitalIn &EOC_pin, // Digital Event Output from MAX11043 device
whismanoid 69:989e392cf635 177 #else // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 178 // MAX11043 EOC End Of Conversion input is InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 179 // TODO: onEOCFallingEdge: replace DigitalIn &EOC_pin with PinName EOC_pin, so that I can create an InterruptIn(PinName:EOC_pin)
whismanoid 69:989e392cf635 180 InterruptIn &EOC_pin, // Digital Event Output from MAX11043 device
whismanoid 69:989e392cf635 181 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 53:3d5a3d241a5e 182 // CODE GENERATOR: class constructor definition ic_variant
whismanoid 53:3d5a3d241a5e 183 MAX11043_ic_t ic_variant)
whismanoid 53:3d5a3d241a5e 184 // CODE GENERATOR: class constructor initializer list
whismanoid 53:3d5a3d241a5e 185 : m_spi(spi), m_cs_pin(cs_pin), // SPI interface
whismanoid 53:3d5a3d241a5e 186 // CODE GENERATOR: class constructor initializer list gpio InputPin pins
whismanoid 53:3d5a3d241a5e 187 m_CONVRUN_pin(CONVRUN_pin), // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 188 m_SHDN_pin(SHDN_pin), // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 189 m_DACSTEP_pin(DACSTEP_pin), // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 190 m_UP_slash_DWNb_pin(UP_slash_DWNb_pin), // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 191 // CODE GENERATOR: class constructor initializer list gpio OutputPin pins
whismanoid 69:989e392cf635 192 // MAX11043 ADC Read operations must be synchronized to EOC End Of Conversion
whismanoid 69:989e392cf635 193 #if MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 194 // MAX11043 EOC End Of Conversion input should be InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 195 // Workaround using DigitalIn(PinName:EOC_pin) polled to sync with EOC falling edge for ADC reads
whismanoid 53:3d5a3d241a5e 196 m_EOC_pin(EOC_pin), // Digital Event Output from MAX11043 device
whismanoid 69:989e392cf635 197 #else // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 198 // MAX11043 EOC End Of Conversion input is InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 70:f44a577c9e59 199 m_EOC_pin(EOC_pin), // Digital Event Output from MAX11043 device
whismanoid 69:989e392cf635 200 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 53:3d5a3d241a5e 201 // CODE GENERATOR: class constructor initializer list ic_variant
whismanoid 53:3d5a3d241a5e 202 m_ic_variant(ic_variant)
whismanoid 53:3d5a3d241a5e 203 {
whismanoid 53:3d5a3d241a5e 204 // CODE GENERATOR: class constructor definition SPI interface initialization
whismanoid 53:3d5a3d241a5e 205 //
whismanoid 53:3d5a3d241a5e 206 // SPI CS = ActiveLow
whismanoid 53:3d5a3d241a5e 207 // SPI FrameStart = CS
whismanoid 53:3d5a3d241a5e 208 m_SPI_cs_state = 1;
whismanoid 67:5b8a495dda1c 209 if (m_cs_pin.is_connected()) { // avoid mbed runtime error if pin is NC not connected
whismanoid 67:5b8a495dda1c 210 m_cs_pin = m_SPI_cs_state;
whismanoid 67:5b8a495dda1c 211 }
whismanoid 53:3d5a3d241a5e 212
whismanoid 53:3d5a3d241a5e 213 // SPI CPOL = 0
whismanoid 53:3d5a3d241a5e 214 // SPI CPHA = 0
whismanoid 53:3d5a3d241a5e 215 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 53:3d5a3d241a5e 216 // SPI SCLK Idle Low
whismanoid 53:3d5a3d241a5e 217 m_SPI_dataMode = 0; //SPI_MODE0; // CPOL=0,CPHA=0: Rising Edge stable; SCLK idle Low
whismanoid 53:3d5a3d241a5e 218 m_spi.format(8,m_SPI_dataMode); // int bits_must_be_8, int mode=0_3 CPOL=0,CPHA=0
whismanoid 53:3d5a3d241a5e 219
whismanoid 53:3d5a3d241a5e 220 // SPI SCLKMaxMHz = 40
whismanoid 53:3d5a3d241a5e 221 // SPI SCLKMinMHz = 0
whismanoid 53:3d5a3d241a5e 222 //#define SPI_SCLK_Hz 48000000 // 48MHz
whismanoid 53:3d5a3d241a5e 223 //#define SPI_SCLK_Hz 24000000 // 24MHz
whismanoid 53:3d5a3d241a5e 224 //#define SPI_SCLK_Hz 12000000 // 12MHz
whismanoid 53:3d5a3d241a5e 225 //#define SPI_SCLK_Hz 6000000 // 6MHz
whismanoid 53:3d5a3d241a5e 226 //#define SPI_SCLK_Hz 4000000 // 4MHz
whismanoid 53:3d5a3d241a5e 227 //#define SPI_SCLK_Hz 2000000 // 2MHz
whismanoid 53:3d5a3d241a5e 228 //#define SPI_SCLK_Hz 1000000 // 1MHz
whismanoid 61:b4f3051578ef 229 m_SPI_SCLK_Hz = 24000000; // platform limit 24MHz; MAX11043 limit is 40MHz
whismanoid 53:3d5a3d241a5e 230 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 53:3d5a3d241a5e 231
whismanoid 53:3d5a3d241a5e 232 //
whismanoid 53:3d5a3d241a5e 233 // CODE GENERATOR: class constructor definition gpio InputPin (Input to device) initialization
whismanoid 53:3d5a3d241a5e 234 //
whismanoid 53:3d5a3d241a5e 235 // CONVRUN Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 236 m_CONVRUN_pin = 1; // output logic high -- initial value in constructor
whismanoid 53:3d5a3d241a5e 237 //
whismanoid 53:3d5a3d241a5e 238 // SHDN Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 239 m_SHDN_pin = 1; // output logic high -- initial value in constructor
whismanoid 53:3d5a3d241a5e 240 //
whismanoid 53:3d5a3d241a5e 241 // DACSTEP Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 242 m_DACSTEP_pin = 1; // output logic high -- initial value in constructor
whismanoid 53:3d5a3d241a5e 243 //
whismanoid 53:3d5a3d241a5e 244 // UP_slash_DWNb Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 245 m_UP_slash_DWNb_pin = 1; // output logic high -- initial value in constructor
whismanoid 53:3d5a3d241a5e 246 //
whismanoid 53:3d5a3d241a5e 247 // CODE GENERATOR: class constructor definition gpio OutputPin (Output from MAX11043 device) initialization
whismanoid 53:3d5a3d241a5e 248 //
whismanoid 53:3d5a3d241a5e 249 // EOC Event Output from device
whismanoid 69:989e392cf635 250 // MAX11043 ADC Read operations must be synchronized to EOC End Of Conversion
whismanoid 82:9ea067fad5c3 251 #if MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 82:9ea067fad5c3 252 digitalInOut5.output(); // ScopeTrigger
whismanoid 82:9ea067fad5c3 253 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 76:0397493d7baf 254 #if MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 255 // SPI is not interrupt-safe, so use EventQueue to defer execution to user context.
whismanoid 82:9ea067fad5c3 256 #if MAX11043_EOC_INTERRUPT_POLLING
whismanoid 82:9ea067fad5c3 257 myOnEOCThread.start(myOnEOCThread_POLLING_handler);
whismanoid 82:9ea067fad5c3 258 #else // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 82:9ea067fad5c3 259 myOnEOCThread.start(myOnEOCThread_EVENTFLAG_ENABLE_SPI_handler);
whismanoid 82:9ea067fad5c3 260 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 76:0397493d7baf 261 #else // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 262 #endif // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 263 // MAX11043 ADC Read operations must be synchronized to EOC End Of Conversion
whismanoid 69:989e392cf635 264 #if MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 265 // MAX11043 EOC End Of Conversion input should be InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 266 // Workaround using DigitalIn(PinName:EOC_pin) polled to sync with EOC falling edge for ADC reads
whismanoid 69:989e392cf635 267 #else // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 268 // MAX11043 EOC End Of Conversion input is InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 269 // TODO: onEOCFallingEdge: interrupt handler requires global object extern MAX11043 g_MAX11043_device
whismanoid 71:62bcd01ea87f 270 // InterruptIn interruptEOC(EOC_pin); // InterruptIn constructor requires PinName, not DigitalIn -- Error: No instance of constructor "mbed::InterruptIn::InterruptIn" matches the argument list in "MAX11043/MAX11043.cpp", Line: 187, Col: 31
whismanoid 69:989e392cf635 271 // TODO: onEOCFallingEdge: replace DigitalIn &EOC_pin with PinName EOC_pin, so that I can create an InterruptIn(PinName:EOC_pin)
whismanoid 70:f44a577c9e59 272 extern void onEOCFallingEdge(void);
whismanoid 71:62bcd01ea87f 273 // interruptEOC.fall(&onEOCFallingEdge);
whismanoid 71:62bcd01ea87f 274 EOC_pin.fall(&onEOCFallingEdge);
whismanoid 69:989e392cf635 275 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 76:0397493d7baf 276 }
whismanoid 69:989e392cf635 277
whismanoid 76:0397493d7baf 278 // MAX11043 ADC Read operations must be synchronized to EOC End Of Conversion
whismanoid 76:0397493d7baf 279 // SPI is not interrupt-safe, so use EventQueue to defer execution to user context.
whismanoid 76:0397493d7baf 280 #if MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 82:9ea067fad5c3 281 #if MAX11043_EOC_INTERRUPT_POLLING
whismanoid 82:9ea067fad5c3 282 void myOnEOCThread_POLLING_handler()
whismanoid 76:0397493d7baf 283 {
whismanoid 76:0397493d7baf 284 while (true) {
whismanoid 80:96bc693e0f79 285 // MAX11043 EOC End Of Conversion input should be InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 80:96bc693e0f79 286 // Workaround using DigitalIn(PinName:EOC_pin) polled to sync with EOC falling edge for ADC reads
whismanoid 80:96bc693e0f79 287 // poll m_EOC_pin if CONVRUN is high
whismanoid 82:9ea067fad5c3 288 //if (m_CONVRUN_pin)
whismanoid 82:9ea067fad5c3 289 //{
whismanoid 82:9ea067fad5c3 290 //#warning "myOnEOCThread_handler() Potential infinite loop if EOC pin not connected"
whismanoid 80:96bc693e0f79 291 // possible infinite loop; need a timeout or futility countdown to escape
whismanoid 82:9ea067fad5c3 292 #if MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 82:9ea067fad5c3 293 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 82:9ea067fad5c3 294 //~ digitalInOut5.write(0); // ScopeTrigger low -- waiting for EOC# high
whismanoid 82:9ea067fad5c3 295 //~ digitalInOut5.write(1); // ScopeTrigger
whismanoid 82:9ea067fad5c3 296 //~ digitalInOut5.write(0); // ScopeTrigger
whismanoid 82:9ea067fad5c3 297 //~ digitalInOut5.write(1); // ScopeTrigger
whismanoid 82:9ea067fad5c3 298 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 82:9ea067fad5c3 299 //for (int futility_countdown = 100;
whismanoid 82:9ea067fad5c3 300 // ((futility_countdown > 0) &&
whismanoid 82:9ea067fad5c3 301 // (m_EOC_pin != 1));
whismanoid 82:9ea067fad5c3 302 // futility_countdown--)
whismanoid 82:9ea067fad5c3 303 //while (digitalInOut2.read() != 1) // digitalInOut2 m_EOC_pin
whismanoid 82:9ea067fad5c3 304 //{
whismanoid 82:9ea067fad5c3 305 // // spinlock waiting for logic high pin state (start of new conversion)
whismanoid 82:9ea067fad5c3 306 //}
whismanoid 82:9ea067fad5c3 307 #if MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 82:9ea067fad5c3 308 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 82:9ea067fad5c3 309 //~ digitalInOut5.write(0); // ScopeTrigger
whismanoid 82:9ea067fad5c3 310 //~ digitalInOut5.write(1); // ScopeTrigger high -- waiting for EOC# falling edge
whismanoid 82:9ea067fad5c3 311 //~ digitalInOut5.write(0); // ScopeTrigger
whismanoid 82:9ea067fad5c3 312 //~ digitalInOut5.write(1); // ScopeTrigger
whismanoid 82:9ea067fad5c3 313 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 82:9ea067fad5c3 314 //for (int futility_countdown = 100;
whismanoid 82:9ea067fad5c3 315 // ((futility_countdown > 0) &&
whismanoid 82:9ea067fad5c3 316 // (m_EOC_pin != 0));
whismanoid 82:9ea067fad5c3 317 // futility_countdown--)
whismanoid 82:9ea067fad5c3 318 while (digitalInOut2.read() != 0) // digitalInOut2 m_EOC_pin
whismanoid 80:96bc693e0f79 319 {
whismanoid 80:96bc693e0f79 320 // spinlock waiting for logic low pin state (new data is available)
whismanoid 80:96bc693e0f79 321 }
whismanoid 82:9ea067fad5c3 322 //}
whismanoid 82:9ea067fad5c3 323 //else
whismanoid 82:9ea067fad5c3 324 //{
whismanoid 82:9ea067fad5c3 325 // // CONVRUN pin is being driven low, so conversion result will not change, EOC# remains high
whismanoid 82:9ea067fad5c3 326 // continue;
whismanoid 82:9ea067fad5c3 327 //}
whismanoid 82:9ea067fad5c3 328 //
whismanoid 82:9ea067fad5c3 329 //extern MAX11043 g_MAX11043_device;
whismanoid 82:9ea067fad5c3 330 #if MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 82:9ea067fad5c3 331 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 82:9ea067fad5c3 332 //~ digitalInOut5.write(0); // ScopeTrigger low -- EOC# falling edge detected, about to start SPI
whismanoid 82:9ea067fad5c3 333 //~ digitalInOut5.write(1); // ScopeTrigger
whismanoid 82:9ea067fad5c3 334 //~ digitalInOut5.write(0); // ScopeTrigger
whismanoid 82:9ea067fad5c3 335 //~ digitalInOut5.write(1); // ScopeTrigger
whismanoid 82:9ea067fad5c3 336 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 82:9ea067fad5c3 337 extern SPI spi; // declared in Test_Main_MAX11043.cpp
whismanoid 82:9ea067fad5c3 338 spi.write((char*)mosiData_onEOCFallingEdge, byteCount_onEOCFallingEdge, (char*)misoData_onEOCFallingEdge, byteCount_onEOCFallingEdge);
whismanoid 82:9ea067fad5c3 339 // Note: EOC# is high immediately after SPI read ADCabcd
whismanoid 82:9ea067fad5c3 340 // SPI timing: CS low 13.30us after EOC# falling edge
whismanoid 82:9ea067fad5c3 341 // SPI timing: SCLK first 14.60us after EOC# falling edge
whismanoid 82:9ea067fad5c3 342 // SPI timing: SCLK last 17.70us after EOC# falling edge
whismanoid 82:9ea067fad5c3 343 // SPI timing: CS high 17.70us after EOC# falling edge
whismanoid 82:9ea067fad5c3 344 //
whismanoid 82:9ea067fad5c3 345 // TODO1: update adca
whismanoid 82:9ea067fad5c3 346 //g_MAX11043_device.adca = (misoData_onEOCFallingEdge[1] << 8) | misoData_onEOCFallingEdge[2];
whismanoid 82:9ea067fad5c3 347 // TODO1: update adcb
whismanoid 82:9ea067fad5c3 348 //g_MAX11043_device.adcb = (misoData_onEOCFallingEdge[3] << 8) | misoData_onEOCFallingEdge[4];
whismanoid 82:9ea067fad5c3 349 // TODO1: update adcc
whismanoid 82:9ea067fad5c3 350 //g_MAX11043_device.adcc = (misoData_onEOCFallingEdge[5] << 8) | misoData_onEOCFallingEdge[6];
whismanoid 82:9ea067fad5c3 351 // TODO1: update adcd
whismanoid 82:9ea067fad5c3 352 //g_MAX11043_device.adcd = (misoData_onEOCFallingEdge[7] << 8) | misoData_onEOCFallingEdge[8];
whismanoid 82:9ea067fad5c3 353 #if MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 82:9ea067fad5c3 354 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 82:9ea067fad5c3 355 //~ digitalInOut5.write(0); // ScopeTrigger
whismanoid 82:9ea067fad5c3 356 //~ digitalInOut5.write(1); // ScopeTrigger high -- end of while loop
whismanoid 82:9ea067fad5c3 357 //~ digitalInOut5.write(0); // ScopeTrigger
whismanoid 82:9ea067fad5c3 358 //~ digitalInOut5.write(1); // ScopeTrigger
whismanoid 82:9ea067fad5c3 359 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 82:9ea067fad5c3 360 } // while (true)
whismanoid 82:9ea067fad5c3 361 } // myOnEOCThread_POLLING_handler()
whismanoid 80:96bc693e0f79 362 #else // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 82:9ea067fad5c3 363 // Waiting for EOC# fall to signal EventQueue is too slow, ~25us to handle event but events happen every 9us.
whismanoid 82:9ea067fad5c3 364 void myOnEOCThread_EVENTFLAG_ENABLE_SPI_handler()
whismanoid 82:9ea067fad5c3 365 {
whismanoid 82:9ea067fad5c3 366 while (true) {
whismanoid 80:96bc693e0f79 367 // MAX11043 EOC End Of Conversion input is InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 80:96bc693e0f79 368 // Interrupt Handler: EOC Event Output from device
whismanoid 80:96bc693e0f79 369 // Wait for MYONEOCTHREADEVENTFLAG_ENABLE_SPI event sent from onEOCFallingEdge interrupt
whismanoid 76:0397493d7baf 370 //signal_wait(int32_t signals, uint32_t millisec=osWaitForever)
whismanoid 76:0397493d7baf 371 //flags_read = myOnEOCThread_event_flags.wait_any(MYONEOCTHREADEVENTFLAG_ENABLE_SPI);
whismanoid 76:0397493d7baf 372 // myOnEOCThread_event_flags.wait_any(MYONEOCTHREADEVENTFLAG_ENABLE_SPI, osWaitForever, false); // clear=false: don't auto clear the flag
whismanoid 76:0397493d7baf 373 myOnEOCThread_event_flags.wait_any(MYONEOCTHREADEVENTFLAG_ENABLE_SPI, osWaitForever, true); // clear=true: auto clear the flag
whismanoid 76:0397493d7baf 374 //
whismanoid 82:9ea067fad5c3 375 //extern MAX11043 g_MAX11043_device;
whismanoid 76:0397493d7baf 376 #if MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 76:0397493d7baf 377 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 77:3a6e2a5cd7d9 378 digitalInOut5.write(0); // ScopeTrigger happens at 1.8us after EOC# falling edge
whismanoid 76:0397493d7baf 379 digitalInOut5.write(1); // ScopeTrigger
whismanoid 76:0397493d7baf 380 digitalInOut5.write(0); // ScopeTrigger
whismanoid 76:0397493d7baf 381 digitalInOut5.write(1); // ScopeTrigger
whismanoid 76:0397493d7baf 382 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 76:0397493d7baf 383 extern SPI spi; // declared in Test_Main_MAX11043.cpp
whismanoid 76:0397493d7baf 384 spi.write((char*)mosiData_onEOCFallingEdge, byteCount_onEOCFallingEdge, (char*)misoData_onEOCFallingEdge, byteCount_onEOCFallingEdge);
whismanoid 77:3a6e2a5cd7d9 385 // SPI timing: CS low 13.30us after EOC# falling edge
whismanoid 77:3a6e2a5cd7d9 386 // SPI timing: SCLK first 14.60us after EOC# falling edge
whismanoid 77:3a6e2a5cd7d9 387 // SPI timing: SCLK last 17.70us after EOC# falling edge
whismanoid 77:3a6e2a5cd7d9 388 // SPI timing: CS high 17.70us after EOC# falling edge
whismanoid 77:3a6e2a5cd7d9 389 //
whismanoid 76:0397493d7baf 390 // TODO1: update adca
whismanoid 76:0397493d7baf 391 //g_MAX11043_device.adca = (misoData_onEOCFallingEdge[1] << 8) | misoData_onEOCFallingEdge[2];
whismanoid 76:0397493d7baf 392 // TODO1: update adcb
whismanoid 76:0397493d7baf 393 //g_MAX11043_device.adcb = (misoData_onEOCFallingEdge[3] << 8) | misoData_onEOCFallingEdge[4];
whismanoid 76:0397493d7baf 394 // TODO1: update adcc
whismanoid 76:0397493d7baf 395 //g_MAX11043_device.adcc = (misoData_onEOCFallingEdge[5] << 8) | misoData_onEOCFallingEdge[6];
whismanoid 76:0397493d7baf 396 // TODO1: update adcd
whismanoid 76:0397493d7baf 397 //g_MAX11043_device.adcd = (misoData_onEOCFallingEdge[7] << 8) | misoData_onEOCFallingEdge[8];
whismanoid 77:3a6e2a5cd7d9 398 #if MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 77:3a6e2a5cd7d9 399 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 77:3a6e2a5cd7d9 400 digitalInOut5.write(0); // ScopeTrigger happens at 22.5us after EOC# falling edge
whismanoid 77:3a6e2a5cd7d9 401 digitalInOut5.write(1); // ScopeTrigger
whismanoid 77:3a6e2a5cd7d9 402 digitalInOut5.write(0); // ScopeTrigger
whismanoid 77:3a6e2a5cd7d9 403 digitalInOut5.write(1); // ScopeTrigger
whismanoid 77:3a6e2a5cd7d9 404 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 80:96bc693e0f79 405 } // while (true)
whismanoid 82:9ea067fad5c3 406 } // myOnEOCThread_EVENTFLAG_ENABLE_SPI_handler()
whismanoid 82:9ea067fad5c3 407 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 76:0397493d7baf 408 #endif // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 53:3d5a3d241a5e 409
whismanoid 69:989e392cf635 410 // MAX11043 ADC Read operations must be synchronized to EOC End Of Conversion
whismanoid 69:989e392cf635 411 #if MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 412 // MAX11043 EOC End Of Conversion input should be InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 413 // Workaround using DigitalIn(PinName:EOC_pin) polled to sync with EOC falling edge for ADC reads
whismanoid 69:989e392cf635 414 #else // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 415 // MAX11043 EOC End Of Conversion input is InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 416 // Interrupt Handler: EOC Event Output from device
whismanoid 69:989e392cf635 417 void onEOCFallingEdge(void)
whismanoid 69:989e392cf635 418 {
whismanoid 72:40feab5fd579 419 // VERIFIED: if DO NOTHING inside interrupt service routine, no crash
whismanoid 72:40feab5fd579 420 #if 1
whismanoid 72:40feab5fd579 421 // VERIFIED: GPIO PIN pulse in response to EOC# falling edge, no crash on HH, no missed pulses
whismanoid 73:879578472009 422 #if MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 73:879578472009 423 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 74:f4f969c9a7a9 424 digitalInOut5.write(0); // ScopeTrigger 1.8us after EOC# falling edge
whismanoid 74:f4f969c9a7a9 425 digitalInOut5.write(1); // ScopeTrigger
whismanoid 74:f4f969c9a7a9 426 digitalInOut5.write(0); // ScopeTrigger
whismanoid 74:f4f969c9a7a9 427 digitalInOut5.write(1); // ScopeTrigger
whismanoid 73:879578472009 428 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 72:40feab5fd579 429 #endif
whismanoid 76:0397493d7baf 430 #if MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 431 // SPI is not interrupt-safe, so use EventQueue to defer execution to user context.
whismanoid 76:0397493d7baf 432 myOnEOCThread_event_flags.set(MYONEOCTHREADEVENTFLAG_ENABLE_SPI);
whismanoid 76:0397493d7baf 433 #else // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 434 #endif // MAX11043_EOC_INTERRUPT_EVENTQUEUE
whismanoid 76:0397493d7baf 435 #if 0
whismanoid 72:40feab5fd579 436 // TODO: read 4 channels in response to EOC# falling edge
whismanoid 72:40feab5fd579 437 // WIP MAX11043 interrupt CRASH on Menu item HH CONVRUN High
whismanoid 72:40feab5fd579 438 //
whismanoid 72:40feab5fd579 439 // ++ MbedOS Error Info ++
whismanoid 72:40feab5fd579 440 // Error Status: 0x80020115 Code: 277 Module: 2
whismanoid 72:40feab5fd579 441 // Error Message: Mutex lock failed
whismanoid 72:40feab5fd579 442 // Location: 0xBA33
whismanoid 72:40feab5fd579 443 // Error Value: 0xFFFFFFFA
whismanoid 72:40feab5fd579 444 // Current Thread: main Id: 0x20002CD0 Entry: 0xBD17 StackSize: 0x1000 StackMem: 0x20001CD0 SP: 0x20027ED0
whismanoid 72:40feab5fd579 445 // For more info, visit: https://armmbed.github.io/mbedos-error/?error=0x80020115
whismanoid 72:40feab5fd579 446 // -- MbedOS Error Info --
whismanoid 69:989e392cf635 447 extern MAX11043 g_MAX11043_device;
whismanoid 75:0900a57f2e5d 448 //~ g_MAX11043_device.Read_ADCabcd();
whismanoid 74:f4f969c9a7a9 449 // read register ADCabcd -> &adca, &adcb, &adcc, &adcd
whismanoid 74:f4f969c9a7a9 450 // g_MAX11043_device.RegRead(CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd, 0);
whismanoid 75:0900a57f2e5d 451 // SPI 8+64 = 72-bit transfer
whismanoid 75:0900a57f2e5d 452 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40 ___[5]_48 ___[6]_56 ___[7]_64 ___[8]_72
whismanoid 75:0900a57f2e5d 453 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 75:0900a57f2e5d 454 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 75:0900a57f2e5d 455 // global const size_t byteCount_onEOCFallingEdge = 1 + (2 * 4);
whismanoid 75:0900a57f2e5d 456 // global const uint8_t mosiData_onEOCFallingEdge[9] = {
whismanoid 75:0900a57f2e5d 457 // global CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd,
whismanoid 75:0900a57f2e5d 458 // global 0, 0, 0, 0, 0, 0, 0, 0
whismanoid 75:0900a57f2e5d 459 // global };
whismanoid 75:0900a57f2e5d 460 // global uint8_t misoData_onEOCFallingEdge[9];
whismanoid 75:0900a57f2e5d 461 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 75:0900a57f2e5d 462 // SPIreadWriteWithLowCS(byteCount_onEOCFallingEdge, mosiData_onEOCFallingEdge, misoData_onEOCFallingEdge);
whismanoid 75:0900a57f2e5d 463 // onSPIprint() is not interrupt-safe
whismanoid 75:0900a57f2e5d 464 // unsigned int numBytesTransferred = m_spi.write((char*)mosiData, byteCount, (char*)misoData, byteCount);
whismanoid 75:0900a57f2e5d 465 // g_MAX11043_device.m_spi is inaccessible
whismanoid 75:0900a57f2e5d 466 extern SPI spi; // declared in Test_Main_MAX11043.cpp
whismanoid 75:0900a57f2e5d 467 spi.write((char*)mosiData_onEOCFallingEdge, byteCount_onEOCFallingEdge, (char*)misoData_onEOCFallingEdge, byteCount_onEOCFallingEdge);
whismanoid 75:0900a57f2e5d 468 //
whismanoid 75:0900a57f2e5d 469 // ++ MbedOS Error Info ++
whismanoid 75:0900a57f2e5d 470 // Error Status: 0x80020115 Code: 277 Module: 2
whismanoid 75:0900a57f2e5d 471 // Error Message: Mutex lock failed
whismanoid 75:0900a57f2e5d 472 // Location: 0xBABB
whismanoid 75:0900a57f2e5d 473 // Error Value: 0xFFFFFFFA
whismanoid 75:0900a57f2e5d 474 // Current Thread: main Id: 0x20002CD0 Entry: 0xBD9F StackSize: 0x1000 StackMem: 0x20001CD0 SP: 0x20027F10
whismanoid 75:0900a57f2e5d 475 // For more info, visit: https://armmbed.github.io/mbedos-error/?error=0x80020115
whismanoid 75:0900a57f2e5d 476 // -- MbedOS Error Info --
whismanoid 75:0900a57f2e5d 477 //
whismanoid 75:0900a57f2e5d 478 //if (ptrRegData) { (*ptrRegData) = (misoData[1] << 8) | misoData[2]; }
whismanoid 75:0900a57f2e5d 479 //if (commandByte == CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd) {
whismanoid 75:0900a57f2e5d 480 // TODO1: update adca
whismanoid 75:0900a57f2e5d 481 //g_MAX11043_device.adca = (misoData_onEOCFallingEdge[1] << 8) | misoData_onEOCFallingEdge[2];
whismanoid 75:0900a57f2e5d 482 // TODO1: update adcb
whismanoid 75:0900a57f2e5d 483 //g_MAX11043_device.adcb = (misoData_onEOCFallingEdge[3] << 8) | misoData_onEOCFallingEdge[4];
whismanoid 75:0900a57f2e5d 484 // TODO1: update adcc
whismanoid 75:0900a57f2e5d 485 //g_MAX11043_device.adcc = (misoData_onEOCFallingEdge[5] << 8) | misoData_onEOCFallingEdge[6];
whismanoid 75:0900a57f2e5d 486 // TODO1: update adcd
whismanoid 75:0900a57f2e5d 487 //g_MAX11043_device.adcd = (misoData_onEOCFallingEdge[7] << 8) | misoData_onEOCFallingEdge[8];
whismanoid 75:0900a57f2e5d 488 //}
whismanoid 72:40feab5fd579 489 #endif
whismanoid 76:0397493d7baf 490 #if 0 // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 75:0900a57f2e5d 491 // Diagnostic: Use MAX32625MBED pin D5 as DigitalOut EOC#-detected
whismanoid 75:0900a57f2e5d 492 digitalInOut5.write(0); // ScopeTrigger
whismanoid 75:0900a57f2e5d 493 digitalInOut5.write(1); // ScopeTrigger
whismanoid 75:0900a57f2e5d 494 #endif // MAX11043_ScopeTrigger_MAX32625MBED_D5
whismanoid 69:989e392cf635 495 }
whismanoid 69:989e392cf635 496 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 497
whismanoid 53:3d5a3d241a5e 498 // CODE GENERATOR: class destructor definition
whismanoid 53:3d5a3d241a5e 499 MAX11043::~MAX11043()
whismanoid 53:3d5a3d241a5e 500 {
whismanoid 53:3d5a3d241a5e 501 // do nothing
whismanoid 53:3d5a3d241a5e 502 }
whismanoid 53:3d5a3d241a5e 503
whismanoid 53:3d5a3d241a5e 504 // CODE GENERATOR: spi_frequency setter definition
whismanoid 53:3d5a3d241a5e 505 /// set SPI SCLK frequency
whismanoid 53:3d5a3d241a5e 506 void MAX11043::spi_frequency(int spi_sclk_Hz)
whismanoid 53:3d5a3d241a5e 507 {
whismanoid 53:3d5a3d241a5e 508 m_SPI_SCLK_Hz = spi_sclk_Hz;
whismanoid 53:3d5a3d241a5e 509 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 53:3d5a3d241a5e 510 }
whismanoid 53:3d5a3d241a5e 511
whismanoid 53:3d5a3d241a5e 512 // CODE GENERATOR: omit global g_MAX11043_device
whismanoid 53:3d5a3d241a5e 513 // CODE GENERATOR: extern function declarations
whismanoid 53:3d5a3d241a5e 514 // CODE GENERATOR: extern function requirement MAX11043::SPIoutputCS
whismanoid 53:3d5a3d241a5e 515 // Assert SPI Chip Select
whismanoid 53:3d5a3d241a5e 516 // SPI chip-select for MAX11043
whismanoid 53:3d5a3d241a5e 517 //
whismanoid 62:8223a7253c90 518 inline void MAX11043::SPIoutputCS(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 519 {
whismanoid 53:3d5a3d241a5e 520 // CODE GENERATOR: extern function definition for function SPIoutputCS
whismanoid 53:3d5a3d241a5e 521 // CODE GENERATOR: extern function definition for standard SPI interface function SPIoutputCS(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 522 m_SPI_cs_state = isLogicHigh;
whismanoid 67:5b8a495dda1c 523 if (m_cs_pin.is_connected()) { // avoid mbed runtime error if pin is NC not connected
whismanoid 67:5b8a495dda1c 524 m_cs_pin = m_SPI_cs_state;
whismanoid 67:5b8a495dda1c 525 }
whismanoid 53:3d5a3d241a5e 526 }
whismanoid 53:3d5a3d241a5e 527
whismanoid 62:8223a7253c90 528 // CODE GENERATOR: extern function requirement MAX11043::SPIreadWriteWithLowCS
whismanoid 62:8223a7253c90 529 // SPI read and write arbitrary number of 8-bit bytes
whismanoid 62:8223a7253c90 530 // SPI interface to MAX11043 shift mosiData into MAX11043 DIN
whismanoid 62:8223a7253c90 531 // while simultaneously capturing miso data from MAX11043 DOUT
whismanoid 62:8223a7253c90 532 //
whismanoid 62:8223a7253c90 533 int MAX11043::SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[])
whismanoid 62:8223a7253c90 534 {
whismanoid 62:8223a7253c90 535 // CODE GENERATOR: extern function definition for function SPIreadWriteWithLowCS
whismanoid 63:8f39d21d6157 536 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[])
whismanoid 62:8223a7253c90 537 //size_t byteCount = 4;
whismanoid 62:8223a7253c90 538 //static char mosiData[4];
whismanoid 62:8223a7253c90 539 //static char misoData[4];
whismanoid 62:8223a7253c90 540 //
whismanoid 62:8223a7253c90 541 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 62:8223a7253c90 542 //~ noInterrupts();
whismanoid 62:8223a7253c90 543 //
whismanoid 62:8223a7253c90 544 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 62:8223a7253c90 545 //
whismanoid 67:5b8a495dda1c 546 if (m_cs_pin.is_connected()) { // avoid mbed runtime error if pin is NC not connected
whismanoid 67:5b8a495dda1c 547 m_cs_pin = 0;
whismanoid 67:5b8a495dda1c 548 }
whismanoid 62:8223a7253c90 549 unsigned int numBytesTransferred = m_spi.write((char*)mosiData, byteCount, (char*)misoData, byteCount);
whismanoid 67:5b8a495dda1c 550 if (m_cs_pin.is_connected()) { // avoid mbed runtime error if pin is NC not connected
whismanoid 67:5b8a495dda1c 551 m_cs_pin = m_SPI_cs_state;
whismanoid 67:5b8a495dda1c 552 }
whismanoid 62:8223a7253c90 553 //
whismanoid 62:8223a7253c90 554 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 62:8223a7253c90 555 //
whismanoid 62:8223a7253c90 556 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 62:8223a7253c90 557 //~ interrupts();
whismanoid 62:8223a7253c90 558 // Optional Diagnostic function to print SPI transactions
whismanoid 62:8223a7253c90 559 if (onSPIprint)
whismanoid 62:8223a7253c90 560 {
whismanoid 62:8223a7253c90 561 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 62:8223a7253c90 562 }
whismanoid 62:8223a7253c90 563 return numBytesTransferred;
whismanoid 62:8223a7253c90 564 }
whismanoid 62:8223a7253c90 565
whismanoid 53:3d5a3d241a5e 566 // TODO1: CODE GENERATOR: extern function GPIOoutputSHDN alias SHDNoutputValue
whismanoid 53:3d5a3d241a5e 567 // CODE GENERATOR: extern function requirement MAX11043::SHDNoutputValue
whismanoid 58:2fea32db466b 568 // Assert MAX11043 SHDN pin : High = Shut Down, Low = Normal Operation.
whismanoid 53:3d5a3d241a5e 569 //
whismanoid 53:3d5a3d241a5e 570 void MAX11043::SHDNoutputValue(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 571 {
whismanoid 53:3d5a3d241a5e 572 // CODE GENERATOR: extern function definition for function SHDNoutputValue
whismanoid 53:3d5a3d241a5e 573 // TODO1: CODE GENERATOR: extern function definition for gpio interface function SHDNoutputValue
whismanoid 53:3d5a3d241a5e 574 // TODO1: CODE GENERATOR: gpio pin SHDN assuming member function m_SHDN_pin
whismanoid 53:3d5a3d241a5e 575 // TODO1: CODE GENERATOR: gpio direction output
whismanoid 53:3d5a3d241a5e 576 // m_SHDN_pin.output(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 577 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 578 m_SHDN_pin = isLogicHigh;
whismanoid 53:3d5a3d241a5e 579 }
whismanoid 52:607010f0c54e 580
whismanoid 53:3d5a3d241a5e 581 // TODO1: CODE GENERATOR: extern function GPIOoutputCONVRUN alias CONVRUNoutputValue
whismanoid 53:3d5a3d241a5e 582 // CODE GENERATOR: extern function requirement MAX11043::CONVRUNoutputValue
whismanoid 58:2fea32db466b 583 // Assert MAX11043 CONVRUN pin : High = start continuous conversions on all 4 channels, Low = Idle.
whismanoid 53:3d5a3d241a5e 584 //
whismanoid 53:3d5a3d241a5e 585 void MAX11043::CONVRUNoutputValue(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 586 {
whismanoid 53:3d5a3d241a5e 587 // CODE GENERATOR: extern function definition for function CONVRUNoutputValue
whismanoid 53:3d5a3d241a5e 588 // TODO1: CODE GENERATOR: extern function definition for gpio interface function CONVRUNoutputValue
whismanoid 53:3d5a3d241a5e 589 // TODO1: CODE GENERATOR: gpio pin CONVRUN assuming member function m_CONVRUN_pin
whismanoid 53:3d5a3d241a5e 590 // TODO1: CODE GENERATOR: gpio direction output
whismanoid 53:3d5a3d241a5e 591 // m_CONVRUN_pin.output(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 592 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 593 m_CONVRUN_pin = isLogicHigh;
whismanoid 69:989e392cf635 594 //--------------------------------------------------
whismanoid 69:989e392cf635 595 // MAX11043 ADC Read operations must be synchronized to EOC End Of Conversion
whismanoid 69:989e392cf635 596 // EOC# asserts low when new data is available.
whismanoid 69:989e392cf635 597 // Initiate a data read prior to the next rising edge of EOC# or the result is overwritten.
whismanoid 69:989e392cf635 598 #if MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 599 // MAX11043 EOC End Of Conversion input should be InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 600 // Workaround using DigitalIn(PinName:EOC_pin) polled to sync with EOC falling edge for ADC reads
whismanoid 69:989e392cf635 601 if (m_CONVRUN_pin)
whismanoid 69:989e392cf635 602 {
whismanoid 69:989e392cf635 603 // CONVRUN was switched high, EOC# will now begin toggling
whismanoid 69:989e392cf635 604 }
whismanoid 69:989e392cf635 605 else
whismanoid 69:989e392cf635 606 {
whismanoid 69:989e392cf635 607 // CONVRUN was switched low, so wait until EOC# returns high
whismanoid 69:989e392cf635 608 #warning "MAX11043::Read_ADCabcd() Potential infinite loop if EOC pin not connected"
whismanoid 69:989e392cf635 609 // possible infinite loop; need a timeout or futility countdown to escape
whismanoid 69:989e392cf635 610 for (int futility_countdown = 100;
whismanoid 69:989e392cf635 611 ((futility_countdown > 0) &&
whismanoid 69:989e392cf635 612 (m_EOC_pin != 1));
whismanoid 69:989e392cf635 613 futility_countdown--)
whismanoid 69:989e392cf635 614 {
whismanoid 69:989e392cf635 615 // spinlock waiting for logic high pin state (start of new conversion)
whismanoid 69:989e392cf635 616 }
whismanoid 69:989e392cf635 617 }
whismanoid 69:989e392cf635 618 #else // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 619 // MAX11043 EOC End Of Conversion input is InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 620 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 621 //--------------------------------------------------
whismanoid 53:3d5a3d241a5e 622 }
whismanoid 53:3d5a3d241a5e 623
whismanoid 53:3d5a3d241a5e 624 // TODO1: CODE GENERATOR: extern function GPIOoutputDACSTEP alias DACSTEPoutputValue
whismanoid 53:3d5a3d241a5e 625 // CODE GENERATOR: extern function requirement MAX11043::DACSTEPoutputValue
whismanoid 58:2fea32db466b 626 // Assert MAX11043 DACSTEP pin : High = Active, Low = Idle.
whismanoid 53:3d5a3d241a5e 627 //
whismanoid 53:3d5a3d241a5e 628 void MAX11043::DACSTEPoutputValue(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 629 {
whismanoid 53:3d5a3d241a5e 630 // CODE GENERATOR: extern function definition for function DACSTEPoutputValue
whismanoid 53:3d5a3d241a5e 631 // TODO1: CODE GENERATOR: extern function definition for gpio interface function DACSTEPoutputValue
whismanoid 53:3d5a3d241a5e 632 // TODO1: CODE GENERATOR: gpio pin DACSTEP assuming member function m_DACSTEP_pin
whismanoid 53:3d5a3d241a5e 633 // TODO1: CODE GENERATOR: gpio direction output
whismanoid 53:3d5a3d241a5e 634 // m_DACSTEP_pin.output(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 635 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 636 m_DACSTEP_pin = isLogicHigh;
whismanoid 53:3d5a3d241a5e 637 }
whismanoid 53:3d5a3d241a5e 638
whismanoid 53:3d5a3d241a5e 639 // TODO1: CODE GENERATOR: extern function GPIOoutputUP_slash_DWNb alias UP_slash_DWNboutputValue
whismanoid 53:3d5a3d241a5e 640 // CODE GENERATOR: extern function requirement MAX11043::UP_slash_DWNboutputValue
whismanoid 58:2fea32db466b 641 // Assert MAX11043 UP_slash_DWNb pin : High = Up, Low = Down.
whismanoid 53:3d5a3d241a5e 642 //
whismanoid 53:3d5a3d241a5e 643 void MAX11043::UP_slash_DWNboutputValue(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 644 {
whismanoid 53:3d5a3d241a5e 645 // CODE GENERATOR: extern function definition for function UP_slash_DWNboutputValue
whismanoid 53:3d5a3d241a5e 646 // TODO1: CODE GENERATOR: extern function definition for gpio interface function UP_slash_DWNboutputValue
whismanoid 53:3d5a3d241a5e 647 // TODO1: CODE GENERATOR: gpio pin UP_slash_DWNb assuming member function m_UP_slash_DWNb_pin
whismanoid 53:3d5a3d241a5e 648 // TODO1: CODE GENERATOR: gpio direction output
whismanoid 53:3d5a3d241a5e 649 // m_UP_slash_DWNb_pin.output(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 650 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 651 m_UP_slash_DWNb_pin = isLogicHigh;
whismanoid 53:3d5a3d241a5e 652 }
whismanoid 53:3d5a3d241a5e 653
whismanoid 53:3d5a3d241a5e 654 // CODE GENERATOR: extern function requirement MAX11043::EOCinputWaitUntilLow
whismanoid 53:3d5a3d241a5e 655 // Wait for MAX11043 EOC pin low, indicating end of conversion.
whismanoid 53:3d5a3d241a5e 656 // Required when using any of the InternalClock modes.
whismanoid 53:3d5a3d241a5e 657 //
whismanoid 53:3d5a3d241a5e 658 void MAX11043::EOCinputWaitUntilLow()
whismanoid 53:3d5a3d241a5e 659 {
whismanoid 53:3d5a3d241a5e 660 // CODE GENERATOR: extern function definition for function EOCinputWaitUntilLow
whismanoid 53:3d5a3d241a5e 661 // TODO1: CODE GENERATOR: extern function definition for gpio interface function EOCinputWaitUntilLow
whismanoid 53:3d5a3d241a5e 662 // TODO1: CODE GENERATOR: gpio pin EOC assuming member function m_EOC_pin
whismanoid 53:3d5a3d241a5e 663 // TODO1: CODE GENERATOR: gpio direction input
whismanoid 53:3d5a3d241a5e 664 // m_EOC_pin.input(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 665 // TODO1: CODE GENERATOR: gpio function WaitUntilLow
whismanoid 53:3d5a3d241a5e 666 while (m_EOC_pin != 0)
whismanoid 53:3d5a3d241a5e 667 {
whismanoid 53:3d5a3d241a5e 668 // spinlock waiting for logic low pin state
whismanoid 53:3d5a3d241a5e 669 }
whismanoid 53:3d5a3d241a5e 670 }
whismanoid 53:3d5a3d241a5e 671
whismanoid 53:3d5a3d241a5e 672 // CODE GENERATOR: extern function requirement MAX11043::EOCinputValue
whismanoid 53:3d5a3d241a5e 673 // Return the status of the MAX11043 EOC pin.
whismanoid 53:3d5a3d241a5e 674 //
whismanoid 53:3d5a3d241a5e 675 int MAX11043::EOCinputValue()
whismanoid 53:3d5a3d241a5e 676 {
whismanoid 53:3d5a3d241a5e 677 // CODE GENERATOR: extern function definition for function EOCinputValue
whismanoid 53:3d5a3d241a5e 678 // TODO1: CODE GENERATOR: extern function definition for gpio interface function EOCinputValue
whismanoid 53:3d5a3d241a5e 679 // TODO1: CODE GENERATOR: gpio pin EOC assuming member function m_EOC_pin
whismanoid 53:3d5a3d241a5e 680 // TODO1: CODE GENERATOR: gpio direction input
whismanoid 53:3d5a3d241a5e 681 // m_EOC_pin.input(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 682 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 683 return m_EOC_pin.read();
whismanoid 53:3d5a3d241a5e 684 }
whismanoid 53:3d5a3d241a5e 685
whismanoid 53:3d5a3d241a5e 686 // CODE GENERATOR: class member function definitions
whismanoid 53:3d5a3d241a5e 687 //----------------------------------------
whismanoid 53:3d5a3d241a5e 688 // Menu item '!'
whismanoid 53:3d5a3d241a5e 689 // Initialize device
whismanoid 53:3d5a3d241a5e 690 // @return 1 on success; 0 on failure
whismanoid 53:3d5a3d241a5e 691 uint8_t MAX11043::Init(void)
whismanoid 53:3d5a3d241a5e 692 {
whismanoid 53:3d5a3d241a5e 693
whismanoid 53:3d5a3d241a5e 694 //----------------------------------------
whismanoid 59:47538bcf6cda 695 // reference voltage, in Volts
whismanoid 59:47538bcf6cda 696 VRef = 2.500;
whismanoid 59:47538bcf6cda 697
whismanoid 59:47538bcf6cda 698 //----------------------------------------
whismanoid 59:47538bcf6cda 699 // shadow of register config CMD_0010_0010_d16_Rd08_Configuration
whismanoid 59:47538bcf6cda 700 config = 0x6000;
whismanoid 59:47538bcf6cda 701
whismanoid 59:47538bcf6cda 702 //----------------------------------------
whismanoid 59:47538bcf6cda 703 // shadow of register status CMD_0001_1110_d8_Rd07_Status
whismanoid 59:47538bcf6cda 704 status = 0x00;
whismanoid 53:3d5a3d241a5e 705
whismanoid 53:3d5a3d241a5e 706 //----------------------------------------
whismanoid 59:47538bcf6cda 707 // shadow of register ADCa CMD_0000_0010_d16o8_Rd00_ADCa
whismanoid 59:47538bcf6cda 708 adca = 0x0000;
whismanoid 53:3d5a3d241a5e 709
whismanoid 53:3d5a3d241a5e 710 //----------------------------------------
whismanoid 59:47538bcf6cda 711 // shadow of register ADCb CMD_0000_0110_d16o8_Rd01_ADCb
whismanoid 59:47538bcf6cda 712 adcb = 0x0000;
whismanoid 59:47538bcf6cda 713
whismanoid 59:47538bcf6cda 714 //----------------------------------------
whismanoid 59:47538bcf6cda 715 // shadow of register ADCc CMD_0000_1010_d16o8_Rd02_ADCc
whismanoid 59:47538bcf6cda 716 adcc = 0x0000;
whismanoid 59:47538bcf6cda 717
whismanoid 59:47538bcf6cda 718 //----------------------------------------
whismanoid 59:47538bcf6cda 719 // shadow of register ADCd CMD_0000_1110_d16o8_Rd03_ADCd
whismanoid 59:47538bcf6cda 720 adcd = 0x0000;
whismanoid 53:3d5a3d241a5e 721
whismanoid 53:3d5a3d241a5e 722 //----------------------------------------
whismanoid 53:3d5a3d241a5e 723 // init (based on old EV kit GUI)
whismanoid 53:3d5a3d241a5e 724 #warning "Not Implemented Yet: MAX11043::Init init..."
whismanoid 53:3d5a3d241a5e 725 // bool bOpResult = false;
whismanoid 53:3d5a3d241a5e 726 // String FWVersionString = "00";
whismanoid 53:3d5a3d241a5e 727 // bool bDemoMode = true;
whismanoid 53:3d5a3d241a5e 728 // int scan_resolution = 0;
whismanoid 53:3d5a3d241a5e 729 // int scan_channels = 0;
whismanoid 53:3d5a3d241a5e 730 // int scan_bits = 0;
whismanoid 53:3d5a3d241a5e 731 // int sampleRateFactore = 0;
whismanoid 53:3d5a3d241a5e 732 // double sampleRate = 0;
whismanoid 53:3d5a3d241a5e 733 // unsigned long banks_requested = 0;
whismanoid 53:3d5a3d241a5e 734 // bool bScanMode = 0;
whismanoid 53:3d5a3d241a5e 735
whismanoid 53:3d5a3d241a5e 736 //----------------------------------------
whismanoid 59:47538bcf6cda 737 // Device ID Validation -- not used, no device ID register
whismanoid 53:3d5a3d241a5e 738 #warning "Not Implemented Yet: MAX11043::Init Device ID Validation..."
whismanoid 53:3d5a3d241a5e 739 // const uint32_t part_id_expect = 0x000F02;
whismanoid 53:3d5a3d241a5e 740 // uint32_t part_id_readback;
whismanoid 53:3d5a3d241a5e 741 // RegRead(xxxxxxxxxxxxCMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID, &part_id_readback);
whismanoid 53:3d5a3d241a5e 742 // if (part_id_readback != part_id_expect) return 0;
whismanoid 53:3d5a3d241a5e 743
whismanoid 53:3d5a3d241a5e 744 //----------------------------------------
whismanoid 58:2fea32db466b 745 // Active-High Shutdown Input. Drive high to shut down the MAX11043.
whismanoid 58:2fea32db466b 746 SHDNoutputValue(0); // SHDN Inactive
whismanoid 58:2fea32db466b 747
whismanoid 58:2fea32db466b 748 //----------------------------------------
whismanoid 58:2fea32db466b 749 // Convert Run. Drive high to start continuous conversions on all 4 channels. The device is idle when
whismanoid 58:2fea32db466b 750 // CONVRUN is low.
whismanoid 58:2fea32db466b 751 CONVRUNoutputValue(0); // CONVRUN Idle
whismanoid 58:2fea32db466b 752
whismanoid 58:2fea32db466b 753 //----------------------------------------
whismanoid 58:2fea32db466b 754 // DAC Step Input. Drive high to move the DAC output in the direction of UP/DWN on the next rising
whismanoid 58:2fea32db466b 755 // edge of the system clock.
whismanoid 58:2fea32db466b 756 DACSTEPoutputValue(0); // DACSTEP Idle
whismanoid 58:2fea32db466b 757
whismanoid 58:2fea32db466b 758 //----------------------------------------
whismanoid 58:2fea32db466b 759 // DAC Step Direction Select. Drive high to step up, drive low to step down when DACSTEP is toggled.
whismanoid 58:2fea32db466b 760 UP_slash_DWNboutputValue(0); // UP/DWN# Down
whismanoid 58:2fea32db466b 761
whismanoid 58:2fea32db466b 762 //----------------------------------------
whismanoid 53:3d5a3d241a5e 763 // success
whismanoid 53:3d5a3d241a5e 764 return 1;
whismanoid 53:3d5a3d241a5e 765 }
whismanoid 53:3d5a3d241a5e 766
whismanoid 53:3d5a3d241a5e 767 //----------------------------------------
whismanoid 53:3d5a3d241a5e 768 // Write a MAX11043 register.
whismanoid 53:3d5a3d241a5e 769 //
whismanoid 57:1c9da8e90737 770 // CMDOP_1aaa_aaaa_ReadRegister bit is cleared 0 indicating a write operation.
whismanoid 53:3d5a3d241a5e 771 //
whismanoid 53:3d5a3d241a5e 772 // MAX11043 register length can be determined by function RegSize.
whismanoid 53:3d5a3d241a5e 773 //
whismanoid 53:3d5a3d241a5e 774 // For 8-bit register size:
whismanoid 53:3d5a3d241a5e 775 //
whismanoid 53:3d5a3d241a5e 776 // SPI 16-bit transfer
whismanoid 53:3d5a3d241a5e 777 //
whismanoid 53:3d5a3d241a5e 778 // SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid 53:3d5a3d241a5e 779 //
whismanoid 53:3d5a3d241a5e 780 // SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 781 //
whismanoid 53:3d5a3d241a5e 782 // For 16-bit register size:
whismanoid 53:3d5a3d241a5e 783 //
whismanoid 53:3d5a3d241a5e 784 // SPI 24-bit or 32-bit transfer
whismanoid 53:3d5a3d241a5e 785 //
whismanoid 53:3d5a3d241a5e 786 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 787 //
whismanoid 53:3d5a3d241a5e 788 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 789 //
whismanoid 53:3d5a3d241a5e 790 // For 24-bit register size:
whismanoid 53:3d5a3d241a5e 791 //
whismanoid 53:3d5a3d241a5e 792 // SPI 32-bit transfer
whismanoid 53:3d5a3d241a5e 793 //
whismanoid 53:3d5a3d241a5e 794 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 795 //
whismanoid 53:3d5a3d241a5e 796 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 797 //
whismanoid 53:3d5a3d241a5e 798 // @return 1 on success; 0 on failure
whismanoid 53:3d5a3d241a5e 799 uint8_t MAX11043::RegWrite(MAX11043_CMD_enum_t commandByte, uint32_t regData)
whismanoid 53:3d5a3d241a5e 800 {
whismanoid 53:3d5a3d241a5e 801
whismanoid 53:3d5a3d241a5e 802 //----------------------------------------
whismanoid 53:3d5a3d241a5e 803 // switch based on register address szie RegSize(commandByte)
whismanoid 57:1c9da8e90737 804 //commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
whismanoid 53:3d5a3d241a5e 805 switch(RegSize(commandByte))
whismanoid 53:3d5a3d241a5e 806 {
whismanoid 53:3d5a3d241a5e 807 case 8: // 8-bit register size
whismanoid 53:3d5a3d241a5e 808 {
whismanoid 63:8f39d21d6157 809 // SPI 8+8 = 16-bit transfer
whismanoid 63:8f39d21d6157 810 // 1234 5678 ___[1]_16
whismanoid 63:8f39d21d6157 811 // SPI MOSI = 0aaa_aaaa_dddd_dddd ... _0000
whismanoid 63:8f39d21d6157 812 // SPI MISO = xxxx_xxxx_xxxx_xxxx ... _xxxx
whismanoid 63:8f39d21d6157 813 size_t byteCount = 1 + 1;
whismanoid 63:8f39d21d6157 814 uint8_t mosiData[2];
whismanoid 63:8f39d21d6157 815 uint8_t misoData[2];
whismanoid 63:8f39d21d6157 816 mosiData[0] = commandByte;
whismanoid 63:8f39d21d6157 817 mosiData[1] = regData;
whismanoid 63:8f39d21d6157 818 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 63:8f39d21d6157 819 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 63:8f39d21d6157 820 // TODO: cache CMD_0101_0100_d8_Wr15_FilterCAddress
whismanoid 63:8f39d21d6157 821 // if (commandByte == CMD_0101_0100_d8_Wr15_FilterCAddress) {
whismanoid 63:8f39d21d6157 822 // FilterCAddress = regData;
whismanoid 63:8f39d21d6157 823 // }
whismanoid 63:8f39d21d6157 824 // TODO: cache CMD_0110_0000_d8_Wr18_FlashMode
whismanoid 63:8f39d21d6157 825 // if (commandByte == CMD_0110_0000_d8_Wr18_FlashMode) {
whismanoid 63:8f39d21d6157 826 // FlashMode = regData;
whismanoid 63:8f39d21d6157 827 // }
whismanoid 53:3d5a3d241a5e 828 }
whismanoid 53:3d5a3d241a5e 829 break;
whismanoid 53:3d5a3d241a5e 830 case 16: // 16-bit register size
whismanoid 63:8f39d21d6157 831 #warning "Not Verified Yet: MAX11043::RegWrite 16-bit"
whismanoid 53:3d5a3d241a5e 832 {
whismanoid 63:8f39d21d6157 833 // SPI 8+16 = 24-bit transfer
whismanoid 63:8f39d21d6157 834 // 1234 5678 ___[1]_16 ___[2]_24
whismanoid 63:8f39d21d6157 835 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd ... _0000
whismanoid 63:8f39d21d6157 836 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx ... _xxxx
whismanoid 63:8f39d21d6157 837 size_t byteCount = 1 + 2;
whismanoid 63:8f39d21d6157 838 uint8_t mosiData[3];
whismanoid 63:8f39d21d6157 839 uint8_t misoData[3];
whismanoid 63:8f39d21d6157 840 mosiData[0] = commandByte;
whismanoid 63:8f39d21d6157 841 mosiData[1] = (uint8_t)((regData >> 8) & 0xFF);
whismanoid 63:8f39d21d6157 842 mosiData[2] = (uint8_t)((regData >> 0) & 0xFF);
whismanoid 63:8f39d21d6157 843 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 63:8f39d21d6157 844 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 63:8f39d21d6157 845 // cache CMD_0010_0000_d16_Wr08_Configuration
whismanoid 63:8f39d21d6157 846 if (commandByte == CMD_0010_0000_d16_Wr08_Configuration) {
whismanoid 63:8f39d21d6157 847 config = regData;
whismanoid 63:8f39d21d6157 848 }
whismanoid 63:8f39d21d6157 849 // TODO: cache CMD_0010_0100_d16_Wr09_DAC
whismanoid 63:8f39d21d6157 850 // TODO: cache CMD_0010_1000_d16_Wr0A_DACStep
whismanoid 63:8f39d21d6157 851 // TODO: cache CMD_0010_1100_d16_Wr0B_DACHDACL
whismanoid 63:8f39d21d6157 852 // TODO: cache CMD_0011_0000_d16_Wr0C_ConfigA
whismanoid 63:8f39d21d6157 853 // TODO: cache CMD_0011_0100_d16_Wr0D_ConfigB
whismanoid 63:8f39d21d6157 854 // TODO: cache CMD_0011_1000_d16_Wr0E_ConfigC
whismanoid 63:8f39d21d6157 855 // TODO: cache CMD_0011_1100_d16_Wr0F_ConfigD
whismanoid 63:8f39d21d6157 856 // TODO: cache CMD_0100_0000_d16_Wr10_Reference
whismanoid 63:8f39d21d6157 857 // TODO: cache CMD_0100_0100_d16_Wr11_AGain
whismanoid 63:8f39d21d6157 858 // TODO: cache CMD_0100_1000_d16_Wr12_BGain
whismanoid 63:8f39d21d6157 859 // TODO: cache CMD_0100_1100_d16_Wr13_CGain
whismanoid 63:8f39d21d6157 860 // TODO: cache CMD_0101_0000_d16_Wr14_DGain
whismanoid 63:8f39d21d6157 861 // TODO: cache CMD_0110_0100_d16_Wr19_FlashAddr
whismanoid 63:8f39d21d6157 862 // TODO: cache CMD_0110_1000_d16_Wr1A_FlashDataIn
whismanoid 53:3d5a3d241a5e 863 }
whismanoid 53:3d5a3d241a5e 864 break;
whismanoid 63:8f39d21d6157 865 case 32: // 32-bit register size
whismanoid 63:8f39d21d6157 866 #warning "Not Verified Yet: MAX11043::RegWrite 32-bit"
whismanoid 53:3d5a3d241a5e 867 {
whismanoid 63:8f39d21d6157 868 // SPI 8+32 = 40-bit transfer
whismanoid 63:8f39d21d6157 869 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40
whismanoid 63:8f39d21d6157 870 // SPI MOSI = 1aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _0000
whismanoid 63:8f39d21d6157 871 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx ... _xxxx
whismanoid 63:8f39d21d6157 872 //
whismanoid 63:8f39d21d6157 873 size_t byteCount = 1 + (2 * 2);
whismanoid 63:8f39d21d6157 874 uint8_t mosiData[5];
whismanoid 63:8f39d21d6157 875 uint8_t misoData[5];
whismanoid 63:8f39d21d6157 876 mosiData[0] = commandByte;
whismanoid 63:8f39d21d6157 877 mosiData[1] = (uint8_t)((regData >> 24) & 0xFF);
whismanoid 63:8f39d21d6157 878 mosiData[2] = (uint8_t)((regData >> 16) & 0xFF);
whismanoid 63:8f39d21d6157 879 mosiData[3] = (uint8_t)((regData >> 8) & 0xFF);
whismanoid 63:8f39d21d6157 880 mosiData[4] = (uint8_t)((regData >> 0) & 0xFF);
whismanoid 63:8f39d21d6157 881 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 63:8f39d21d6157 882 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 63:8f39d21d6157 883 // TODO: cache CMD_0101_1000_d32_Wr16_FilterCDataOut
whismanoid 63:8f39d21d6157 884 // if (commandByte == CMD_0101_1000_d32_Wr16_FilterCDataOut) {
whismanoid 63:8f39d21d6157 885 // FilterCDataOut = regData;
whismanoid 63:8f39d21d6157 886 // }
whismanoid 63:8f39d21d6157 887 // TODO: cache CMD_0101_1100_d32_Wr17_FilterCDataIn
whismanoid 63:8f39d21d6157 888 // if (commandByte == CMD_0101_1000_d32_Wr16_FilterCDataOut) {
whismanoid 63:8f39d21d6157 889 // FilterCDataOut = regData;
whismanoid 63:8f39d21d6157 890 // }
whismanoid 53:3d5a3d241a5e 891 }
whismanoid 53:3d5a3d241a5e 892 break;
whismanoid 53:3d5a3d241a5e 893 }
whismanoid 53:3d5a3d241a5e 894
whismanoid 53:3d5a3d241a5e 895 //----------------------------------------
whismanoid 53:3d5a3d241a5e 896 // success
whismanoid 53:3d5a3d241a5e 897 return 1;
whismanoid 53:3d5a3d241a5e 898 }
whismanoid 53:3d5a3d241a5e 899
whismanoid 53:3d5a3d241a5e 900 //----------------------------------------
whismanoid 53:3d5a3d241a5e 901 // Read an 8-bit MAX11043 register
whismanoid 53:3d5a3d241a5e 902 //
whismanoid 57:1c9da8e90737 903 // CMDOP_1aaa_aaaa_ReadRegister bit is set 1 indicating a read operation.
whismanoid 53:3d5a3d241a5e 904 //
whismanoid 53:3d5a3d241a5e 905 // MAX11043 register length can be determined by function RegSize.
whismanoid 53:3d5a3d241a5e 906 //
whismanoid 53:3d5a3d241a5e 907 // For 8-bit register size:
whismanoid 53:3d5a3d241a5e 908 //
whismanoid 53:3d5a3d241a5e 909 // SPI 16-bit transfer
whismanoid 53:3d5a3d241a5e 910 //
whismanoid 53:3d5a3d241a5e 911 // SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid 53:3d5a3d241a5e 912 //
whismanoid 53:3d5a3d241a5e 913 // SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid 53:3d5a3d241a5e 914 //
whismanoid 53:3d5a3d241a5e 915 // For 16-bit register size:
whismanoid 53:3d5a3d241a5e 916 //
whismanoid 53:3d5a3d241a5e 917 // SPI 24-bit or 32-bit transfer
whismanoid 53:3d5a3d241a5e 918 //
whismanoid 53:3d5a3d241a5e 919 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid 53:3d5a3d241a5e 920 //
whismanoid 53:3d5a3d241a5e 921 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 922 //
whismanoid 53:3d5a3d241a5e 923 // For 24-bit register size:
whismanoid 53:3d5a3d241a5e 924 //
whismanoid 53:3d5a3d241a5e 925 // SPI 32-bit transfer
whismanoid 53:3d5a3d241a5e 926 //
whismanoid 53:3d5a3d241a5e 927 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 53:3d5a3d241a5e 928 //
whismanoid 53:3d5a3d241a5e 929 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 930 //
whismanoid 53:3d5a3d241a5e 931 //
whismanoid 53:3d5a3d241a5e 932 // @return 1 on success; 0 on failure
whismanoid 53:3d5a3d241a5e 933 uint8_t MAX11043::RegRead(MAX11043_CMD_enum_t commandByte, uint32_t* ptrRegData)
whismanoid 53:3d5a3d241a5e 934 {
whismanoid 53:3d5a3d241a5e 935
whismanoid 53:3d5a3d241a5e 936 //----------------------------------------
whismanoid 53:3d5a3d241a5e 937 // switch based on register address szie RegSize(regAddress)
whismanoid 57:1c9da8e90737 938 //commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
whismanoid 53:3d5a3d241a5e 939 switch(RegSize(commandByte))
whismanoid 53:3d5a3d241a5e 940 {
whismanoid 53:3d5a3d241a5e 941 case 8: // 8-bit register size
whismanoid 53:3d5a3d241a5e 942 {
whismanoid 60:d1d1eaa90fb7 943 // SPI 8+8 = 16-bit transfer
whismanoid 62:8223a7253c90 944 // 1234 5678 ___[1]_16
whismanoid 63:8f39d21d6157 945 // SPI MOSI = 1aaa_aaaa_0000_0000 ... _0000
whismanoid 63:8f39d21d6157 946 // SPI MISO = xxxx_xxxx_dddd_dddd ... _xxxx
whismanoid 63:8f39d21d6157 947 size_t byteCount = 1 + 1;
whismanoid 63:8f39d21d6157 948 uint8_t mosiData[2];
whismanoid 63:8f39d21d6157 949 uint8_t misoData[2];
whismanoid 63:8f39d21d6157 950 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 63:8f39d21d6157 951 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 63:8f39d21d6157 952 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 63:8f39d21d6157 953 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 63:8f39d21d6157 954 if (ptrRegData) { (*ptrRegData) = misoData[1]; }
whismanoid 59:47538bcf6cda 955 if (commandByte == CMD_0001_1110_d8_Rd07_Status) {
whismanoid 59:47538bcf6cda 956 // TODO1: update status
whismanoid 63:8f39d21d6157 957 status = misoData[1];
whismanoid 59:47538bcf6cda 958 }
whismanoid 53:3d5a3d241a5e 959 }
whismanoid 53:3d5a3d241a5e 960 break;
whismanoid 53:3d5a3d241a5e 961 case 16: // 16-bit register size
whismanoid 63:8f39d21d6157 962 #warning "Not Verified Yet: MAX11043::RegRead 16-bit"
whismanoid 53:3d5a3d241a5e 963 {
whismanoid 60:d1d1eaa90fb7 964 // SPI 8+16 = 24-bit transfer
whismanoid 62:8223a7253c90 965 // 1234 5678 ___[1]_16 ___[2]_24
whismanoid 60:d1d1eaa90fb7 966 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 967 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 63:8f39d21d6157 968 size_t byteCount = 1 + 2;
whismanoid 63:8f39d21d6157 969 uint8_t mosiData[3];
whismanoid 63:8f39d21d6157 970 uint8_t misoData[3];
whismanoid 63:8f39d21d6157 971 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 63:8f39d21d6157 972 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 63:8f39d21d6157 973 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 63:8f39d21d6157 974 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 63:8f39d21d6157 975 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 63:8f39d21d6157 976 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 8) | misoData[2]; }
whismanoid 59:47538bcf6cda 977 if (commandByte == CMD_0010_0010_d16_Rd08_Configuration) {
whismanoid 59:47538bcf6cda 978 // TODO1: update config
whismanoid 63:8f39d21d6157 979 config = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 980 }
whismanoid 59:47538bcf6cda 981 if (commandByte == CMD_0000_0010_d16o8_Rd00_ADCa) {
whismanoid 59:47538bcf6cda 982 // TODO1: update adca
whismanoid 63:8f39d21d6157 983 adca = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 984 }
whismanoid 59:47538bcf6cda 985 if (commandByte == CMD_0000_0110_d16o8_Rd01_ADCb) {
whismanoid 59:47538bcf6cda 986 // TODO1: update adcb
whismanoid 63:8f39d21d6157 987 adcb = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 988 }
whismanoid 59:47538bcf6cda 989 if (commandByte == CMD_0000_1010_d16o8_Rd02_ADCc) {
whismanoid 59:47538bcf6cda 990 // TODO1: update adcc
whismanoid 63:8f39d21d6157 991 adcc = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 992 }
whismanoid 59:47538bcf6cda 993 if (commandByte == CMD_0000_1110_d16o8_Rd03_ADCd) {
whismanoid 59:47538bcf6cda 994 // TODO1: update adcd
whismanoid 63:8f39d21d6157 995 adcd = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 996 }
whismanoid 53:3d5a3d241a5e 997 }
whismanoid 53:3d5a3d241a5e 998 break;
whismanoid 53:3d5a3d241a5e 999 case 24: // 24-bit register size
whismanoid 53:3d5a3d241a5e 1000 {
whismanoid 60:d1d1eaa90fb7 1001 // SPI 8+24 = 32-bit transfer
whismanoid 62:8223a7253c90 1002 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32
whismanoid 63:8f39d21d6157 1003 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 63:8f39d21d6157 1004 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 63:8f39d21d6157 1005 size_t byteCount = 1 + 3;
whismanoid 63:8f39d21d6157 1006 uint8_t mosiData[4];
whismanoid 63:8f39d21d6157 1007 uint8_t misoData[4];
whismanoid 63:8f39d21d6157 1008 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 63:8f39d21d6157 1009 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 63:8f39d21d6157 1010 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 63:8f39d21d6157 1011 mosiData[3] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 63:8f39d21d6157 1012 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 63:8f39d21d6157 1013 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 63:8f39d21d6157 1014 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3]; }
whismanoid 59:47538bcf6cda 1015 if (commandByte == CMD_0000_0010_d16o8_Rd00_ADCa) {
whismanoid 59:47538bcf6cda 1016 // TODO1: update adca
whismanoid 63:8f39d21d6157 1017 adca = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 1018 }
whismanoid 59:47538bcf6cda 1019 if (commandByte == CMD_0000_0110_d16o8_Rd01_ADCb) {
whismanoid 59:47538bcf6cda 1020 // TODO1: update adcb
whismanoid 63:8f39d21d6157 1021 adcb = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 1022 }
whismanoid 59:47538bcf6cda 1023 if (commandByte == CMD_0000_1010_d16o8_Rd02_ADCc) {
whismanoid 59:47538bcf6cda 1024 // TODO1: update adcc
whismanoid 63:8f39d21d6157 1025 adcc = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 1026 }
whismanoid 59:47538bcf6cda 1027 if (commandByte == CMD_0000_1110_d16o8_Rd03_ADCd) {
whismanoid 59:47538bcf6cda 1028 // TODO1: update adcd
whismanoid 63:8f39d21d6157 1029 adcd = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 1030 }
whismanoid 59:47538bcf6cda 1031 }
whismanoid 59:47538bcf6cda 1032 break;
whismanoid 63:8f39d21d6157 1033 case 32: // 32-bit register size CMD_0001_0010_d16o8_d16o8_Rd04_ADCab, CMD_0001_0110_d16o8_d16o8_Rd05_ADCcd
whismanoid 59:47538bcf6cda 1034 //
whismanoid 63:8f39d21d6157 1035 #warning "Not Implemented Yet: MAX11043::RegRead 32-bit CMD_0001_0010_d16o8_d16o8_Rd04_ADCab"
whismanoid 63:8f39d21d6157 1036 // TODO: support long SPI read CMD_0001_0010_d16o8_d16o8_Rd04_ADCab
whismanoid 59:47538bcf6cda 1037 // %SW 0x12 (0 0) (0 0) -- for 16-bit read A,B
whismanoid 59:47538bcf6cda 1038 // update adca, adcb
whismanoid 59:47538bcf6cda 1039 //
whismanoid 63:8f39d21d6157 1040 // TODO: support long SPI read CMD_0001_0110_d16o8_d16o8_Rd05_ADCcd
whismanoid 59:47538bcf6cda 1041 // %SW 0x16 (0 0) (0 0) -- for 16-bit read C,D
whismanoid 59:47538bcf6cda 1042 // update adcc, adcd
whismanoid 59:47538bcf6cda 1043 //
whismanoid 59:47538bcf6cda 1044 {
whismanoid 60:d1d1eaa90fb7 1045 // SPI 8+32 = 40-bit transfer
whismanoid 62:8223a7253c90 1046 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40
whismanoid 60:d1d1eaa90fb7 1047 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 1048 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 62:8223a7253c90 1049 size_t byteCount = 1 + (2 * 2);
whismanoid 62:8223a7253c90 1050 uint8_t mosiData[5];
whismanoid 62:8223a7253c90 1051 uint8_t misoData[5];
whismanoid 62:8223a7253c90 1052 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 62:8223a7253c90 1053 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1054 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1055 mosiData[3] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1056 mosiData[4] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1057 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 62:8223a7253c90 1058 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 62:8223a7253c90 1059 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 8) | misoData[2]; }
whismanoid 63:8f39d21d6157 1060 if (commandByte == CMD_0001_0010_d16o8_d16o8_Rd04_ADCab) {
whismanoid 59:47538bcf6cda 1061 // TODO1: update adca
whismanoid 62:8223a7253c90 1062 adca = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 1063 // TODO1: update adcb
whismanoid 62:8223a7253c90 1064 adcb = (misoData[3] << 8) | misoData[4];
whismanoid 59:47538bcf6cda 1065 }
whismanoid 63:8f39d21d6157 1066 if (commandByte == CMD_0001_0110_d16o8_d16o8_Rd05_ADCcd) {
whismanoid 59:47538bcf6cda 1067 // TODO1: update adcc
whismanoid 62:8223a7253c90 1068 adcc = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 1069 // TODO1: update adcd
whismanoid 62:8223a7253c90 1070 adcd = (misoData[3] << 8) | misoData[4];
whismanoid 59:47538bcf6cda 1071 }
whismanoid 59:47538bcf6cda 1072 }
whismanoid 59:47538bcf6cda 1073 break;
whismanoid 63:8f39d21d6157 1074 case 48: // 48-bit register size CMD_0001_0010_d16o8_d16o8_Rd04_ADCab, CMD_0001_0110_d16o8_d16o8_Rd05_ADCcd
whismanoid 59:47538bcf6cda 1075 //
whismanoid 63:8f39d21d6157 1076 #warning "Not Verified Yet: MAX11043::RegRead 48-bit CMD_0001_0010_d16o8_d16o8_Rd04_ADCab"
whismanoid 63:8f39d21d6157 1077 // TODO: support long SPI read CMD_0001_0010_d16o8_d16o8_Rd04_ADCab
whismanoid 59:47538bcf6cda 1078 // %SW 0x12 (0 0 0) (0 0 0) -- for 24-bit read A,B
whismanoid 59:47538bcf6cda 1079 // update adca, adcb
whismanoid 59:47538bcf6cda 1080 //
whismanoid 63:8f39d21d6157 1081 // TODO: support long SPI read CMD_0001_0110_d16o8_d16o8_Rd05_ADCcd
whismanoid 59:47538bcf6cda 1082 // %SW 0x16 (0 0 0) (0 0 0) -- for 24-bit read C,D
whismanoid 59:47538bcf6cda 1083 // update adcc, adcd
whismanoid 59:47538bcf6cda 1084 //
whismanoid 59:47538bcf6cda 1085 {
whismanoid 60:d1d1eaa90fb7 1086 // SPI 8+48 = 56-bit transfer
whismanoid 62:8223a7253c90 1087 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40 ___[5]_48 ___[6]_56
whismanoid 60:d1d1eaa90fb7 1088 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 1089 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 62:8223a7253c90 1090 size_t byteCount = 1 + (3 * 2);
whismanoid 62:8223a7253c90 1091 uint8_t mosiData[7];
whismanoid 62:8223a7253c90 1092 uint8_t misoData[7];
whismanoid 62:8223a7253c90 1093 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 62:8223a7253c90 1094 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1095 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1096 mosiData[3] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1097 mosiData[4] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1098 mosiData[5] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1099 mosiData[6] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1100 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 62:8223a7253c90 1101 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 62:8223a7253c90 1102 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3]; }
whismanoid 63:8f39d21d6157 1103 if (commandByte == CMD_0001_0010_d16o8_d16o8_Rd04_ADCab) {
whismanoid 59:47538bcf6cda 1104 // TODO1: update adca
whismanoid 62:8223a7253c90 1105 adca = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 1106 // TODO1: update adcb
whismanoid 62:8223a7253c90 1107 adcb = (misoData[4] << 16) | (misoData[5] << 8) | misoData[6];
whismanoid 59:47538bcf6cda 1108 }
whismanoid 63:8f39d21d6157 1109 if (commandByte == CMD_0001_0110_d16o8_d16o8_Rd05_ADCcd) {
whismanoid 59:47538bcf6cda 1110 // TODO1: update adcc
whismanoid 62:8223a7253c90 1111 adcc = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 1112 // TODO1: update adcd
whismanoid 62:8223a7253c90 1113 adcd = (misoData[4] << 16) | (misoData[5] << 8) | misoData[6];
whismanoid 59:47538bcf6cda 1114 }
whismanoid 59:47538bcf6cda 1115 }
whismanoid 59:47538bcf6cda 1116 break;
whismanoid 63:8f39d21d6157 1117 case 64: // 64-bit register size CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd
whismanoid 59:47538bcf6cda 1118 //
whismanoid 63:8f39d21d6157 1119 #warning "Not Verified Yet: MAX11043::RegRead 64-bit CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd"
whismanoid 63:8f39d21d6157 1120 // TODO: support long SPI read CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd
whismanoid 59:47538bcf6cda 1121 // %SW 0x1A (0 0) (0 0) (0 0) (0 0) -- for 16-bit read A,B,C,D
whismanoid 59:47538bcf6cda 1122 // update adca, adcb, adcc, adcd
whismanoid 59:47538bcf6cda 1123 //
whismanoid 59:47538bcf6cda 1124 {
whismanoid 60:d1d1eaa90fb7 1125 // SPI 8+64 = 72-bit transfer
whismanoid 62:8223a7253c90 1126 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40 ___[5]_48 ___[6]_56 ___[7]_64 ___[8]_72
whismanoid 60:d1d1eaa90fb7 1127 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 1128 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 62:8223a7253c90 1129 size_t byteCount = 1 + (2 * 4);
whismanoid 62:8223a7253c90 1130 uint8_t mosiData[9];
whismanoid 62:8223a7253c90 1131 uint8_t misoData[9];
whismanoid 62:8223a7253c90 1132 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 62:8223a7253c90 1133 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1134 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1135 mosiData[3] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1136 mosiData[4] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1137 mosiData[5] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1138 mosiData[6] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1139 mosiData[7] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1140 mosiData[8] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1141 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 62:8223a7253c90 1142 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 62:8223a7253c90 1143 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 8) | misoData[2]; }
whismanoid 63:8f39d21d6157 1144 if (commandByte == CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd) {
whismanoid 59:47538bcf6cda 1145 // TODO1: update adca
whismanoid 62:8223a7253c90 1146 adca = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 1147 // TODO1: update adcb
whismanoid 62:8223a7253c90 1148 adcb = (misoData[3] << 8) | misoData[4];
whismanoid 59:47538bcf6cda 1149 // TODO1: update adcc
whismanoid 62:8223a7253c90 1150 adcc = (misoData[5] << 8) | misoData[6];
whismanoid 59:47538bcf6cda 1151 // TODO1: update adcd
whismanoid 62:8223a7253c90 1152 adcd = (misoData[7] << 8) | misoData[8];
whismanoid 59:47538bcf6cda 1153 }
whismanoid 59:47538bcf6cda 1154 }
whismanoid 59:47538bcf6cda 1155 break;
whismanoid 63:8f39d21d6157 1156 case 96: // 96-bit register size CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd
whismanoid 59:47538bcf6cda 1157 //
whismanoid 63:8f39d21d6157 1158 #warning "Not Verified Yet: MAX11043::RegRead 96-bit CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd"
whismanoid 63:8f39d21d6157 1159 // TODO: support long SPI read CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd
whismanoid 59:47538bcf6cda 1160 // %SW 0x1A (0 0 0) (0 0 0) (0 0 0) (0 0 0) -- for 24-bit read A,B,C,D
whismanoid 59:47538bcf6cda 1161 // update adca, adcb, adcc, adcd
whismanoid 59:47538bcf6cda 1162 //
whismanoid 59:47538bcf6cda 1163 {
whismanoid 60:d1d1eaa90fb7 1164 // SPI 8+96 = 104-bit transfer
whismanoid 62:8223a7253c90 1165 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40 ___[5]_48 ___[6]_56 ___[7]_64 ___[8]_72 ___[9]_80 __[10]_88 __[11]_96 __[12]104
whismanoid 60:d1d1eaa90fb7 1166 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 1167 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 62:8223a7253c90 1168 size_t byteCount = 1 + (3 * 4);
whismanoid 62:8223a7253c90 1169 uint8_t mosiData[13];
whismanoid 62:8223a7253c90 1170 uint8_t misoData[13];
whismanoid 62:8223a7253c90 1171 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 62:8223a7253c90 1172 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1173 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1174 mosiData[3] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1175 mosiData[4] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1176 mosiData[5] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1177 mosiData[6] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1178 mosiData[7] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1179 mosiData[8] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1180 mosiData[9] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1181 mosiData[10] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1182 mosiData[11] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1183 mosiData[12] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1184 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 62:8223a7253c90 1185 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 62:8223a7253c90 1186 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3]; }
whismanoid 63:8f39d21d6157 1187 if (commandByte == CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd) {
whismanoid 59:47538bcf6cda 1188 // TODO1: update adca
whismanoid 62:8223a7253c90 1189 adca = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 1190 // TODO1: update adcb
whismanoid 62:8223a7253c90 1191 adcb = (misoData[4] << 16) | (misoData[5] << 8) | misoData[6];
whismanoid 59:47538bcf6cda 1192 // TODO1: update adcc
whismanoid 62:8223a7253c90 1193 adcc = (misoData[7] << 16) | (misoData[8] << 8) | misoData[9];
whismanoid 59:47538bcf6cda 1194 // TODO1: update adcd
whismanoid 62:8223a7253c90 1195 adcd = (misoData[10] << 16) | (misoData[11] << 8) | misoData[12];
whismanoid 59:47538bcf6cda 1196 }
whismanoid 53:3d5a3d241a5e 1197 }
whismanoid 53:3d5a3d241a5e 1198 break;
whismanoid 53:3d5a3d241a5e 1199 }
whismanoid 53:3d5a3d241a5e 1200
whismanoid 53:3d5a3d241a5e 1201 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1202 // success
whismanoid 53:3d5a3d241a5e 1203 return 1;
whismanoid 53:3d5a3d241a5e 1204 }
whismanoid 53:3d5a3d241a5e 1205
whismanoid 53:3d5a3d241a5e 1206 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1207 // Return the size of a MAX11043 register
whismanoid 53:3d5a3d241a5e 1208 //
whismanoid 53:3d5a3d241a5e 1209 // @return 8 for 8-bit, 16 for 16-bit, 24 for 24-bit, else 0 for undefined register size
whismanoid 53:3d5a3d241a5e 1210 uint8_t MAX11043::RegSize(MAX11043_CMD_enum_t commandByte)
whismanoid 53:3d5a3d241a5e 1211 {
whismanoid 53:3d5a3d241a5e 1212
whismanoid 53:3d5a3d241a5e 1213 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1214 // switch based on register address value regAddress
whismanoid 57:1c9da8e90737 1215 // commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
whismanoid 53:3d5a3d241a5e 1216 switch(commandByte)
whismanoid 53:3d5a3d241a5e 1217 {
whismanoid 53:3d5a3d241a5e 1218 default:
whismanoid 57:1c9da8e90737 1219 // case CMDOP_0aaa_aa00_WriteRegister:
whismanoid 57:1c9da8e90737 1220 // case CMDOP_0aaa_aa10_ReadRegister:
whismanoid 57:1c9da8e90737 1221 // case CMDOP_1111_1111_NoOperationMOSIidleHigh:
whismanoid 53:3d5a3d241a5e 1222 return 0; // undefined register size
whismanoid 53:3d5a3d241a5e 1223 case CMD_0001_1110_d8_Rd07_Status:
whismanoid 53:3d5a3d241a5e 1224 case CMD_0101_0100_d8_Wr15_FilterCAddress:
whismanoid 53:3d5a3d241a5e 1225 case CMD_0101_0110_d8_Rd15_FilterCAddress:
whismanoid 53:3d5a3d241a5e 1226 case CMD_0110_0000_d8_Wr18_FlashMode:
whismanoid 53:3d5a3d241a5e 1227 case CMD_0110_0010_d8_Rd18_FlashMode:
whismanoid 53:3d5a3d241a5e 1228 return 8; // 8-bit register size
whismanoid 53:3d5a3d241a5e 1229 case CMD_0010_0000_d16_Wr08_Configuration:
whismanoid 53:3d5a3d241a5e 1230 case CMD_0010_0010_d16_Rd08_Configuration:
whismanoid 53:3d5a3d241a5e 1231 case CMD_0010_0100_d16_Wr09_DAC:
whismanoid 53:3d5a3d241a5e 1232 case CMD_0010_0110_d16_Rd09_DAC:
whismanoid 53:3d5a3d241a5e 1233 case CMD_0010_1000_d16_Wr0A_DACStep:
whismanoid 53:3d5a3d241a5e 1234 case CMD_0010_1010_d16_Rd0A_DACStep:
whismanoid 53:3d5a3d241a5e 1235 case CMD_0010_1100_d16_Wr0B_DACHDACL:
whismanoid 53:3d5a3d241a5e 1236 case CMD_0010_1110_d16_Rd0B_DACHDACL:
whismanoid 53:3d5a3d241a5e 1237 case CMD_0011_0000_d16_Wr0C_ConfigA:
whismanoid 53:3d5a3d241a5e 1238 case CMD_0011_0010_d16_Rd0C_ConfigA:
whismanoid 53:3d5a3d241a5e 1239 case CMD_0011_0100_d16_Wr0D_ConfigB:
whismanoid 53:3d5a3d241a5e 1240 case CMD_0011_0110_d16_Rd0D_ConfigB:
whismanoid 53:3d5a3d241a5e 1241 case CMD_0011_1000_d16_Wr0E_ConfigC:
whismanoid 53:3d5a3d241a5e 1242 case CMD_0011_1010_d16_Rd0E_ConfigC:
whismanoid 53:3d5a3d241a5e 1243 case CMD_0011_1100_d16_Wr0F_ConfigD:
whismanoid 53:3d5a3d241a5e 1244 case CMD_0011_1110_d16_Rd0F_ConfigD:
whismanoid 53:3d5a3d241a5e 1245 case CMD_0100_0000_d16_Wr10_Reference:
whismanoid 53:3d5a3d241a5e 1246 case CMD_0100_0010_d16_Rd10_Reference:
whismanoid 53:3d5a3d241a5e 1247 case CMD_0100_0100_d16_Wr11_AGain:
whismanoid 53:3d5a3d241a5e 1248 case CMD_0100_0110_d16_Rd11_AGain:
whismanoid 53:3d5a3d241a5e 1249 case CMD_0100_1000_d16_Wr12_BGain:
whismanoid 53:3d5a3d241a5e 1250 case CMD_0100_1010_d16_Rd12_BGain:
whismanoid 53:3d5a3d241a5e 1251 case CMD_0100_1100_d16_Wr13_CGain:
whismanoid 53:3d5a3d241a5e 1252 case CMD_0100_1110_d16_Rd13_CGain:
whismanoid 53:3d5a3d241a5e 1253 case CMD_0101_0000_d16_Wr14_DGain:
whismanoid 53:3d5a3d241a5e 1254 case CMD_0101_0010_d16_Rd14_DGain:
whismanoid 53:3d5a3d241a5e 1255 case CMD_0110_0100_d16_Wr19_FlashAddr:
whismanoid 53:3d5a3d241a5e 1256 case CMD_0110_0110_d16_Rd19_FlashAddr:
whismanoid 53:3d5a3d241a5e 1257 case CMD_0110_1000_d16_Wr1A_FlashDataIn:
whismanoid 53:3d5a3d241a5e 1258 case CMD_0110_1010_d16_Rd1A_FlashDataIn:
whismanoid 53:3d5a3d241a5e 1259 case CMD_0110_1110_d16_Rd1B_FlashDataOut:
whismanoid 53:3d5a3d241a5e 1260 return 16; // 16-bit register size
whismanoid 59:47538bcf6cda 1261 case CMD_0000_0010_d16o8_Rd00_ADCa:
whismanoid 59:47538bcf6cda 1262 case CMD_0000_0110_d16o8_Rd01_ADCb:
whismanoid 59:47538bcf6cda 1263 case CMD_0000_1010_d16o8_Rd02_ADCc:
whismanoid 59:47538bcf6cda 1264 case CMD_0000_1110_d16o8_Rd03_ADCd:
whismanoid 59:47538bcf6cda 1265 if (config & CONFIG_xxxx_xxxx_xx1x_xxxx_24BIT)
whismanoid 59:47538bcf6cda 1266 {
whismanoid 59:47538bcf6cda 1267 // %SW 0x02 (0 0 0) -- for 24-bit read
whismanoid 59:47538bcf6cda 1268 return 24; // 24-bit register size
whismanoid 59:47538bcf6cda 1269 }
whismanoid 59:47538bcf6cda 1270 // %SW 0x02 (0 0) -- for 16-bit read
whismanoid 59:47538bcf6cda 1271 //
whismanoid 59:47538bcf6cda 1272 return 16; // 16-bit register size
whismanoid 63:8f39d21d6157 1273 case CMD_0001_0010_d16o8_d16o8_Rd04_ADCab:
whismanoid 63:8f39d21d6157 1274 case CMD_0001_0110_d16o8_d16o8_Rd05_ADCcd:
whismanoid 59:47538bcf6cda 1275 //
whismanoid 59:47538bcf6cda 1276 // TODO: support long SPI read
whismanoid 59:47538bcf6cda 1277 if (config & CONFIG_xxxx_xxxx_xx1x_xxxx_24BIT)
whismanoid 59:47538bcf6cda 1278 {
whismanoid 59:47538bcf6cda 1279 // %SW 0x12 (0 0 0) (0 0 0) -- for 24-bit read A,B
whismanoid 59:47538bcf6cda 1280 // %SW 0x16 (0 0 0) (0 0 0) -- for 24-bit read C,D
whismanoid 59:47538bcf6cda 1281 return 48; // 48-bit register size: 2*(24)
whismanoid 59:47538bcf6cda 1282 }
whismanoid 59:47538bcf6cda 1283 // %SW 0x12 (0 0) (0 0) -- for 16-bit read A,B
whismanoid 59:47538bcf6cda 1284 // %SW 0x16 (0 0) (0 0) -- for 16-bit read C,D
whismanoid 59:47538bcf6cda 1285 //
whismanoid 59:47538bcf6cda 1286 return 32; // 32-bit register size: 2*(16)
whismanoid 63:8f39d21d6157 1287 case CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd:
whismanoid 59:47538bcf6cda 1288 //
whismanoid 59:47538bcf6cda 1289 // TODO: support long SPI read
whismanoid 59:47538bcf6cda 1290 if (config & CONFIG_xxxx_xxxx_xx1x_xxxx_24BIT)
whismanoid 59:47538bcf6cda 1291 {
whismanoid 59:47538bcf6cda 1292 // %SW 0x1A (0 0 0) (0 0 0) (0 0 0) (0 0 0) -- for 24-bit read A,B,C,D
whismanoid 59:47538bcf6cda 1293 return 96; // 96-bit register size: 4*(24)
whismanoid 59:47538bcf6cda 1294 }
whismanoid 59:47538bcf6cda 1295 // %SW 0x1A (0 0) (0 0) (0 0) (0 0) -- for 16-bit read A,B,C,D
whismanoid 59:47538bcf6cda 1296 //
whismanoid 59:47538bcf6cda 1297 return 64; // 64-bit register size: 4*(16)
whismanoid 53:3d5a3d241a5e 1298 case CMD_0101_1000_d32_Wr16_FilterCDataOut:
whismanoid 53:3d5a3d241a5e 1299 case CMD_0101_1010_d32_Rd16_FilterCDataOut:
whismanoid 53:3d5a3d241a5e 1300 case CMD_0101_1100_d32_Wr17_FilterCDataIn:
whismanoid 53:3d5a3d241a5e 1301 case CMD_0101_1110_d32_Rd17_FilterCDataIn:
whismanoid 53:3d5a3d241a5e 1302 return 32; // 32-bit register size
whismanoid 53:3d5a3d241a5e 1303 }
whismanoid 53:3d5a3d241a5e 1304 }
whismanoid 53:3d5a3d241a5e 1305
whismanoid 53:3d5a3d241a5e 1306 //----------------------------------------
whismanoid 57:1c9da8e90737 1307 // Decode operation from commandByte
whismanoid 57:1c9da8e90737 1308 //
whismanoid 57:1c9da8e90737 1309 // @return operation such as idle, read register, write register, etc.
whismanoid 57:1c9da8e90737 1310 MAX11043::MAX11043_CMDOP_enum_t MAX11043::DecodeCommand(MAX11043_CMD_enum_t commandByte)
whismanoid 57:1c9da8e90737 1311 {
whismanoid 57:1c9da8e90737 1312
whismanoid 57:1c9da8e90737 1313 //----------------------------------------
whismanoid 57:1c9da8e90737 1314 // decode operation from command byte
whismanoid 57:1c9da8e90737 1315 switch (commandByte & 0x83)
whismanoid 57:1c9da8e90737 1316 {
whismanoid 57:1c9da8e90737 1317 case CMDOP_0aaa_aa10_ReadRegister:
whismanoid 57:1c9da8e90737 1318 return CMDOP_0aaa_aa10_ReadRegister;
whismanoid 57:1c9da8e90737 1319 case CMDOP_0aaa_aa00_WriteRegister:
whismanoid 57:1c9da8e90737 1320 return CMDOP_0aaa_aa00_WriteRegister;
whismanoid 57:1c9da8e90737 1321 default:
whismanoid 57:1c9da8e90737 1322 return CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 57:1c9da8e90737 1323 }
whismanoid 57:1c9da8e90737 1324 }
whismanoid 57:1c9da8e90737 1325
whismanoid 57:1c9da8e90737 1326 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1327 // Return the address field of a MAX11043 register
whismanoid 53:3d5a3d241a5e 1328 //
whismanoid 53:3d5a3d241a5e 1329 // @return register address field as given in datasheet
whismanoid 53:3d5a3d241a5e 1330 uint8_t MAX11043::RegAddrOfCommand(MAX11043_CMD_enum_t commandByte)
whismanoid 53:3d5a3d241a5e 1331 {
whismanoid 53:3d5a3d241a5e 1332
whismanoid 53:3d5a3d241a5e 1333 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1334 // extract register address value from command byte
whismanoid 57:1c9da8e90737 1335 return (uint8_t)((commandByte &~ 0x83) >> 2); // CMDOP_0aaa_aa10_ReadRegister
whismanoid 53:3d5a3d241a5e 1336 }
whismanoid 53:3d5a3d241a5e 1337
whismanoid 53:3d5a3d241a5e 1338 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1339 // Test whether a command byte is a register read command
whismanoid 53:3d5a3d241a5e 1340 //
whismanoid 53:3d5a3d241a5e 1341 // @return true if command byte is a register read command
whismanoid 53:3d5a3d241a5e 1342 uint8_t MAX11043::IsRegReadCommand(MAX11043_CMD_enum_t commandByte)
whismanoid 53:3d5a3d241a5e 1343 {
whismanoid 53:3d5a3d241a5e 1344
whismanoid 53:3d5a3d241a5e 1345 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1346 // Test whether a command byte is a register read command
whismanoid 57:1c9da8e90737 1347 return (commandByte &~ 0x02) ? 1 : 0; // CMDOP_0aaa_aa10_ReadRegister
whismanoid 53:3d5a3d241a5e 1348 }
whismanoid 53:3d5a3d241a5e 1349
whismanoid 53:3d5a3d241a5e 1350 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1351 // Return the name of a MAX11043 register
whismanoid 53:3d5a3d241a5e 1352 //
whismanoid 53:3d5a3d241a5e 1353 // @return null-terminated constant C string containing register name or empty string
whismanoid 53:3d5a3d241a5e 1354 const char* MAX11043::RegName(MAX11043_CMD_enum_t commandByte)
whismanoid 53:3d5a3d241a5e 1355 {
whismanoid 53:3d5a3d241a5e 1356
whismanoid 53:3d5a3d241a5e 1357 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1358 // switch based on register address value regAddress
whismanoid 57:1c9da8e90737 1359 // commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
whismanoid 53:3d5a3d241a5e 1360 switch(commandByte)
whismanoid 53:3d5a3d241a5e 1361 {
whismanoid 53:3d5a3d241a5e 1362 default:
whismanoid 53:3d5a3d241a5e 1363 return ""; // undefined register
whismanoid 57:1c9da8e90737 1364 // case CMDOP_0aaa_aa00_WriteRegister: return "_______";
whismanoid 57:1c9da8e90737 1365 // case CMDOP_0aaa_aa10_ReadRegister: return "_______";
whismanoid 57:1c9da8e90737 1366 // case CMDOP_1111_1111_NoOperationMOSIidleHigh: return "_______";
whismanoid 59:47538bcf6cda 1367 case CMD_0000_0010_d16o8_Rd00_ADCa: return "ADCa";
whismanoid 59:47538bcf6cda 1368 case CMD_0000_0110_d16o8_Rd01_ADCb: return "ADCb";
whismanoid 59:47538bcf6cda 1369 case CMD_0000_1010_d16o8_Rd02_ADCc: return "ADCc";
whismanoid 59:47538bcf6cda 1370 case CMD_0000_1110_d16o8_Rd03_ADCd: return "ADCd";
whismanoid 63:8f39d21d6157 1371 case CMD_0001_0010_d16o8_d16o8_Rd04_ADCab: return "ADCab";
whismanoid 63:8f39d21d6157 1372 case CMD_0001_0110_d16o8_d16o8_Rd05_ADCcd: return "ADCcd";
whismanoid 63:8f39d21d6157 1373 case CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd: return "ADCabcd";
whismanoid 53:3d5a3d241a5e 1374 case CMD_0001_1110_d8_Rd07_Status: return "Status";
whismanoid 53:3d5a3d241a5e 1375 case CMD_0010_0000_d16_Wr08_Configuration: return "Configuration";
whismanoid 53:3d5a3d241a5e 1376 case CMD_0010_0010_d16_Rd08_Configuration: return "Configuration";
whismanoid 53:3d5a3d241a5e 1377 case CMD_0010_0100_d16_Wr09_DAC: return "DAC";
whismanoid 53:3d5a3d241a5e 1378 case CMD_0010_0110_d16_Rd09_DAC: return "DAC";
whismanoid 53:3d5a3d241a5e 1379 case CMD_0010_1000_d16_Wr0A_DACStep: return "DACStep";
whismanoid 53:3d5a3d241a5e 1380 case CMD_0010_1010_d16_Rd0A_DACStep: return "DACStep";
whismanoid 53:3d5a3d241a5e 1381 case CMD_0010_1100_d16_Wr0B_DACHDACL: return "DACHDACL";
whismanoid 53:3d5a3d241a5e 1382 case CMD_0010_1110_d16_Rd0B_DACHDACL: return "DACHDACL";
whismanoid 53:3d5a3d241a5e 1383 case CMD_0011_0000_d16_Wr0C_ConfigA: return "ConfigA";
whismanoid 53:3d5a3d241a5e 1384 case CMD_0011_0010_d16_Rd0C_ConfigA: return "ConfigA";
whismanoid 53:3d5a3d241a5e 1385 case CMD_0011_0100_d16_Wr0D_ConfigB: return "ConfigB";
whismanoid 53:3d5a3d241a5e 1386 case CMD_0011_0110_d16_Rd0D_ConfigB: return "ConfigB";
whismanoid 53:3d5a3d241a5e 1387 case CMD_0011_1000_d16_Wr0E_ConfigC: return "ConfigC";
whismanoid 53:3d5a3d241a5e 1388 case CMD_0011_1010_d16_Rd0E_ConfigC: return "ConfigC";
whismanoid 53:3d5a3d241a5e 1389 case CMD_0011_1100_d16_Wr0F_ConfigD: return "ConfigD";
whismanoid 53:3d5a3d241a5e 1390 case CMD_0011_1110_d16_Rd0F_ConfigD: return "ConfigD";
whismanoid 53:3d5a3d241a5e 1391 case CMD_0100_0000_d16_Wr10_Reference: return "Reference";
whismanoid 53:3d5a3d241a5e 1392 case CMD_0100_0010_d16_Rd10_Reference: return "Reference";
whismanoid 53:3d5a3d241a5e 1393 case CMD_0100_0100_d16_Wr11_AGain: return "AGain";
whismanoid 53:3d5a3d241a5e 1394 case CMD_0100_0110_d16_Rd11_AGain: return "AGain";
whismanoid 53:3d5a3d241a5e 1395 case CMD_0100_1000_d16_Wr12_BGain: return "BGain";
whismanoid 53:3d5a3d241a5e 1396 case CMD_0100_1010_d16_Rd12_BGain: return "BGain";
whismanoid 53:3d5a3d241a5e 1397 case CMD_0100_1100_d16_Wr13_CGain: return "CGain";
whismanoid 53:3d5a3d241a5e 1398 case CMD_0100_1110_d16_Rd13_CGain: return "CGain";
whismanoid 53:3d5a3d241a5e 1399 case CMD_0101_0000_d16_Wr14_DGain: return "DGain";
whismanoid 53:3d5a3d241a5e 1400 case CMD_0101_0010_d16_Rd14_DGain: return "DGain";
whismanoid 53:3d5a3d241a5e 1401 case CMD_0101_0100_d8_Wr15_FilterCAddress: return "FilterCAddress";
whismanoid 53:3d5a3d241a5e 1402 case CMD_0101_0110_d8_Rd15_FilterCAddress: return "FilterCAddress";
whismanoid 53:3d5a3d241a5e 1403 case CMD_0101_1000_d32_Wr16_FilterCDataOut: return "FilterCDataOut";
whismanoid 53:3d5a3d241a5e 1404 case CMD_0101_1010_d32_Rd16_FilterCDataOut: return "FilterCDataOut";
whismanoid 53:3d5a3d241a5e 1405 case CMD_0101_1100_d32_Wr17_FilterCDataIn: return "FilterCDataIn";
whismanoid 53:3d5a3d241a5e 1406 case CMD_0101_1110_d32_Rd17_FilterCDataIn: return "FilterCDataIn";
whismanoid 53:3d5a3d241a5e 1407 case CMD_0110_0000_d8_Wr18_FlashMode: return "FlashMode";
whismanoid 53:3d5a3d241a5e 1408 case CMD_0110_0010_d8_Rd18_FlashMode: return "FlashMode";
whismanoid 53:3d5a3d241a5e 1409 case CMD_0110_0100_d16_Wr19_FlashAddr: return "FlashAddr";
whismanoid 53:3d5a3d241a5e 1410 case CMD_0110_0110_d16_Rd19_FlashAddr: return "FlashAddr";
whismanoid 53:3d5a3d241a5e 1411 case CMD_0110_1000_d16_Wr1A_FlashDataIn: return "FlashDataIn";
whismanoid 53:3d5a3d241a5e 1412 case CMD_0110_1010_d16_Rd1A_FlashDataIn: return "FlashDataIn";
whismanoid 53:3d5a3d241a5e 1413 case CMD_0110_1110_d16_Rd1B_FlashDataOut: return "FlashDataOut";
whismanoid 53:3d5a3d241a5e 1414 }
whismanoid 53:3d5a3d241a5e 1415 }
whismanoid 53:3d5a3d241a5e 1416
whismanoid 59:47538bcf6cda 1417 //----------------------------------------
whismanoid 64:a667cfd83492 1418 // Menu item '$' -> adca, adcb, adcc, adcd
whismanoid 64:a667cfd83492 1419 // Read ADCabcd
whismanoid 64:a667cfd83492 1420 //
whismanoid 64:a667cfd83492 1421 // @return 1 on success; 0 on failure
whismanoid 64:a667cfd83492 1422 uint8_t MAX11043::Read_ADCabcd(void)
whismanoid 64:a667cfd83492 1423 {
whismanoid 64:a667cfd83492 1424
whismanoid 64:a667cfd83492 1425 //----------------------------------------
whismanoid 64:a667cfd83492 1426 // warning -- WIP work in progress
whismanoid 64:a667cfd83492 1427 #warning "Not Tested Yet: MAX11043::Read_ADCabcd..."
whismanoid 64:a667cfd83492 1428
whismanoid 69:989e392cf635 1429 //--------------------------------------------------
whismanoid 69:989e392cf635 1430 // MAX11043 ADC Read operations must be synchronized to EOC End Of Conversion
whismanoid 69:989e392cf635 1431 // EOC# asserts low when new data is available.
whismanoid 69:989e392cf635 1432 // Initiate a data read prior to the next rising edge of EOC# or the result is overwritten.
whismanoid 69:989e392cf635 1433 #if MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 1434 // MAX11043 EOC End Of Conversion input should be InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 1435 // Workaround using DigitalIn(PinName:EOC_pin) polled to sync with EOC falling edge for ADC reads
whismanoid 69:989e392cf635 1436 // 2020-02-20 MAX11043_EOC_INTERRUPT_POLLING works on MAX32625MBED at 9us conversion rate, with 1us timing margin
whismanoid 69:989e392cf635 1437 // TODO: poll m_EOC_pin if CONVRUN is high
whismanoid 69:989e392cf635 1438 if (m_CONVRUN_pin)
whismanoid 69:989e392cf635 1439 {
whismanoid 69:989e392cf635 1440 #warning "MAX11043::Read_ADCabcd() Potential infinite loop if EOC pin not connected"
whismanoid 69:989e392cf635 1441 // possible infinite loop; need a timeout or futility countdown to escape
whismanoid 69:989e392cf635 1442 for (int futility_countdown = 100;
whismanoid 69:989e392cf635 1443 ((futility_countdown > 0) &&
whismanoid 69:989e392cf635 1444 (m_EOC_pin != 1));
whismanoid 69:989e392cf635 1445 futility_countdown--)
whismanoid 69:989e392cf635 1446 {
whismanoid 69:989e392cf635 1447 // spinlock waiting for logic high pin state (start of new conversion)
whismanoid 69:989e392cf635 1448 }
whismanoid 69:989e392cf635 1449 for (int futility_countdown = 100;
whismanoid 69:989e392cf635 1450 ((futility_countdown > 0) &&
whismanoid 69:989e392cf635 1451 (m_EOC_pin != 0));
whismanoid 69:989e392cf635 1452 futility_countdown--)
whismanoid 69:989e392cf635 1453 {
whismanoid 69:989e392cf635 1454 // spinlock waiting for logic low pin state (new data is available)
whismanoid 69:989e392cf635 1455 }
whismanoid 69:989e392cf635 1456 }
whismanoid 69:989e392cf635 1457 else
whismanoid 69:989e392cf635 1458 {
whismanoid 69:989e392cf635 1459 // CONVRUN pin is being driven low, so conversion result will not change, EOC# remains high
whismanoid 69:989e392cf635 1460 }
whismanoid 69:989e392cf635 1461 #else // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 1462 // MAX11043 EOC End Of Conversion input is InterruptIn(PinName:EOC_pin).fall(onEOCFallingEdge);
whismanoid 69:989e392cf635 1463 #endif // MAX11043_EOC_INTERRUPT_POLLING
whismanoid 69:989e392cf635 1464 //--------------------------------------------------
whismanoid 69:989e392cf635 1465
whismanoid 64:a667cfd83492 1466 //----------------------------------------
whismanoid 64:a667cfd83492 1467 // read register ADCabcd -> &adca, &adcb, &adcc, &adcd
whismanoid 64:a667cfd83492 1468 RegRead(CMD_0001_1010_d16o8_d16o8_d16o8_d16o8_Rd06_ADCabcd, 0);
whismanoid 64:a667cfd83492 1469
whismanoid 64:a667cfd83492 1470 //----------------------------------------
whismanoid 64:a667cfd83492 1471 // success
whismanoid 64:a667cfd83492 1472 return 1;
whismanoid 64:a667cfd83492 1473 }
whismanoid 64:a667cfd83492 1474
whismanoid 64:a667cfd83492 1475 //----------------------------------------
whismanoid 66:3fe92f6f1cfa 1476 // Menu item 'GA'
whismanoid 64:a667cfd83492 1477 // Write AGain register
whismanoid 64:a667cfd83492 1478 //
whismanoid 64:a667cfd83492 1479 // @param[in] gain 2's complement, 0x800=0.25V/V, 0x1000=0.5V/V, 0x2000=1VV/V, 0x4000=2V/V, default=0x2000
whismanoid 64:a667cfd83492 1480 //
whismanoid 64:a667cfd83492 1481 // @return 1 on success; 0 on failure
whismanoid 64:a667cfd83492 1482 uint8_t MAX11043::Write_AGain(uint32_t gain)
whismanoid 64:a667cfd83492 1483 {
whismanoid 64:a667cfd83492 1484
whismanoid 64:a667cfd83492 1485 //----------------------------------------
whismanoid 64:a667cfd83492 1486 // warning -- WIP work in progress
whismanoid 64:a667cfd83492 1487 #warning "Not Tested Yet: MAX11043::Write_AGain..."
whismanoid 64:a667cfd83492 1488
whismanoid 64:a667cfd83492 1489 //----------------------------------------
whismanoid 64:a667cfd83492 1490 // write register
whismanoid 64:a667cfd83492 1491 RegWrite(CMD_0100_0100_d16_Wr11_AGain, gain);
whismanoid 64:a667cfd83492 1492
whismanoid 64:a667cfd83492 1493 //----------------------------------------
whismanoid 64:a667cfd83492 1494 // success
whismanoid 64:a667cfd83492 1495 return 1;
whismanoid 64:a667cfd83492 1496 }
whismanoid 64:a667cfd83492 1497
whismanoid 64:a667cfd83492 1498 //----------------------------------------
whismanoid 59:47538bcf6cda 1499 // Menu item 'XX'
whismanoid 59:47538bcf6cda 1500 //
whismanoid 59:47538bcf6cda 1501 // @return 1 on success; 0 on failure
whismanoid 59:47538bcf6cda 1502 uint8_t MAX11043::Configure_XXXXX(uint8_t linef, uint8_t rate)
whismanoid 59:47538bcf6cda 1503 {
whismanoid 59:47538bcf6cda 1504
whismanoid 59:47538bcf6cda 1505 //----------------------------------------
whismanoid 59:47538bcf6cda 1506 // warning -- WIP work in progress
whismanoid 59:47538bcf6cda 1507 #warning "Not Tested Yet: MAX11043::Configure_XXXXX..."
whismanoid 59:47538bcf6cda 1508
whismanoid 59:47538bcf6cda 1509 //----------------------------------------
whismanoid 59:47538bcf6cda 1510 // read register
whismanoid 59:47538bcf6cda 1511 RegRead(CMD_0000_0010_d16o8_Rd00_ADCa, &adca);
whismanoid 59:47538bcf6cda 1512
whismanoid 59:47538bcf6cda 1513 //----------------------------------------
whismanoid 59:47538bcf6cda 1514 // success
whismanoid 59:47538bcf6cda 1515 return 1;
whismanoid 59:47538bcf6cda 1516 }
whismanoid 59:47538bcf6cda 1517
whismanoid 59:47538bcf6cda 1518 //----------------------------------------
whismanoid 59:47538bcf6cda 1519 // Menu item 'XY'
whismanoid 59:47538bcf6cda 1520 //
whismanoid 59:47538bcf6cda 1521 // @return 1 on success; 0 on failure
whismanoid 59:47538bcf6cda 1522 uint8_t MAX11043::Configure_XXXXY(uint8_t linef, uint8_t rate)
whismanoid 59:47538bcf6cda 1523 {
whismanoid 59:47538bcf6cda 1524
whismanoid 59:47538bcf6cda 1525 //----------------------------------------
whismanoid 59:47538bcf6cda 1526 // warning -- WIP work in progress
whismanoid 59:47538bcf6cda 1527 #warning "Not Tested Yet: MAX11043::Configure_XXXXY..."
whismanoid 59:47538bcf6cda 1528
whismanoid 59:47538bcf6cda 1529 //----------------------------------------
whismanoid 59:47538bcf6cda 1530 // read register
whismanoid 59:47538bcf6cda 1531 RegRead(CMD_0001_1110_d8_Rd07_Status, &status);
whismanoid 59:47538bcf6cda 1532
whismanoid 59:47538bcf6cda 1533 //----------------------------------------
whismanoid 59:47538bcf6cda 1534 // success
whismanoid 59:47538bcf6cda 1535 return 1;
whismanoid 59:47538bcf6cda 1536 }
whismanoid 59:47538bcf6cda 1537
whismanoid 53:3d5a3d241a5e 1538
whismanoid 53:3d5a3d241a5e 1539 // End of file