Mark Underwood / Mbed OS MAX11043_Serial_Tester

Test program running on MAX32625MBED. Control through USB Serial commands using a terminal emulator such as teraterm or putty.

Dependencies:   MaximTinyTester CmdLine MAX541 USBDevice

MAX11043/MAX11043.cpp@62:8223a7253c90, 2020-02-18 (annotated)

Committer:
whismanoid
Date:
Tue Feb 18 06:30:34 2020 +0000
Revision:
62:8223a7253c90
Parent:
61:b4f3051578ef
Child:
63:8f39d21d6157
MAX11043 SPIreadWriteWithLowCS mosi fill and drive CS

Who changed what in which revision?

UserRevisionLine numberNew contents of line
whismanoid 53:3d5a3d241a5e 1 // /*******************************************************************************
whismanoid 53:3d5a3d241a5e 2 // * Copyright (C) 2020 Maxim Integrated Products, Inc., All Rights Reserved.
whismanoid 53:3d5a3d241a5e 3 // *
whismanoid 53:3d5a3d241a5e 4 // * Permission is hereby granted, free of charge, to any person obtaining a
whismanoid 53:3d5a3d241a5e 5 // * copy of this software and associated documentation files (the "Software"),
whismanoid 53:3d5a3d241a5e 6 // * to deal in the Software without restriction, including without limitation
whismanoid 53:3d5a3d241a5e 7 // * the rights to use, copy, modify, merge, publish, distribute, sublicense,
whismanoid 53:3d5a3d241a5e 8 // * and/or sell copies of the Software, and to permit persons to whom the
whismanoid 53:3d5a3d241a5e 9 // * Software is furnished to do so, subject to the following conditions:
whismanoid 53:3d5a3d241a5e 10 // *
whismanoid 53:3d5a3d241a5e 11 // * The above copyright notice and this permission notice shall be included
whismanoid 53:3d5a3d241a5e 12 // * in all copies or substantial portions of the Software.
whismanoid 53:3d5a3d241a5e 13 // *
whismanoid 53:3d5a3d241a5e 14 // * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
whismanoid 53:3d5a3d241a5e 15 // * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
whismanoid 53:3d5a3d241a5e 16 // * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
whismanoid 53:3d5a3d241a5e 17 // * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
whismanoid 53:3d5a3d241a5e 18 // * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
whismanoid 53:3d5a3d241a5e 19 // * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
whismanoid 53:3d5a3d241a5e 20 // * OTHER DEALINGS IN THE SOFTWARE.
whismanoid 53:3d5a3d241a5e 21 // *
whismanoid 53:3d5a3d241a5e 22 // * Except as contained in this notice, the name of Maxim Integrated
whismanoid 53:3d5a3d241a5e 23 // * Products, Inc. shall not be used except as stated in the Maxim Integrated
whismanoid 53:3d5a3d241a5e 24 // * Products, Inc. Branding Policy.
whismanoid 53:3d5a3d241a5e 25 // *
whismanoid 53:3d5a3d241a5e 26 // * The mere transfer of this software does not imply any licenses
whismanoid 53:3d5a3d241a5e 27 // * of trade secrets, proprietary technology, copyrights, patents,
whismanoid 53:3d5a3d241a5e 28 // * trademarks, maskwork rights, or any other form of intellectual
whismanoid 53:3d5a3d241a5e 29 // * property whatsoever. Maxim Integrated Products, Inc. retains all
whismanoid 53:3d5a3d241a5e 30 // * ownership rights.
whismanoid 53:3d5a3d241a5e 31 // *******************************************************************************
whismanoid 53:3d5a3d241a5e 32 // */
whismanoid 53:3d5a3d241a5e 33 // *********************************************************************
whismanoid 53:3d5a3d241a5e 34 // @file MAX11043.cpp
whismanoid 53:3d5a3d241a5e 35 // *********************************************************************
whismanoid 53:3d5a3d241a5e 36 // Device Driver file
whismanoid 53:3d5a3d241a5e 37 // DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file.
whismanoid 53:3d5a3d241a5e 38 // generated by XMLSystemOfDevicesToMBED.py
whismanoid 53:3d5a3d241a5e 39 // System Name = ExampleSystem
whismanoid 53:3d5a3d241a5e 40 // System Description = Device driver example
whismanoid 53:3d5a3d241a5e 41
whismanoid 53:3d5a3d241a5e 42 #include "MAX11043.h"
whismanoid 53:3d5a3d241a5e 43
whismanoid 53:3d5a3d241a5e 44 // Device Name = MAX11043
whismanoid 53:3d5a3d241a5e 45 // Device Description = 200ksps, Low-Power, Serial SPI 24-Bit, 4-Channel, Differential/Single-Ended Input, Simultaneous-Sampling SD ADC
whismanoid 53:3d5a3d241a5e 46 // Device DeviceBriefDescription = 24-bit 200ksps Delta-Sigma ADC
whismanoid 53:3d5a3d241a5e 47 // Device Manufacturer = Maxim Integrated
whismanoid 53:3d5a3d241a5e 48 // Device PartNumber = MAX11043ATL+
whismanoid 53:3d5a3d241a5e 49 // Device RegValue_Width = DataWidth16bit_HL
whismanoid 53:3d5a3d241a5e 50 //
whismanoid 53:3d5a3d241a5e 51 // ADC MaxOutputDataRate = 200ksps
whismanoid 53:3d5a3d241a5e 52 // ADC NumChannels = 4
whismanoid 53:3d5a3d241a5e 53 // ADC ResolutionBits = 24
whismanoid 53:3d5a3d241a5e 54 //
whismanoid 53:3d5a3d241a5e 55 // SPI CS = ActiveLow
whismanoid 53:3d5a3d241a5e 56 // SPI FrameStart = CS
whismanoid 53:3d5a3d241a5e 57 // SPI CPOL = 0
whismanoid 53:3d5a3d241a5e 58 // SPI CPHA = 0
whismanoid 53:3d5a3d241a5e 59 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 53:3d5a3d241a5e 60 // SPI SCLK Idle Low
whismanoid 53:3d5a3d241a5e 61 // SPI SCLKMaxMHz = 40
whismanoid 53:3d5a3d241a5e 62 // SPI SCLKMinMHz = 0
whismanoid 53:3d5a3d241a5e 63 //
whismanoid 53:3d5a3d241a5e 64 // InputPin Name = CONVRUN
whismanoid 53:3d5a3d241a5e 65 // InputPin Description = CONVRUN (digital input). Convert Run. Drive high to start continuous conversions on all 4 channels. The device is idle when
whismanoid 53:3d5a3d241a5e 66 // CONVRUN is low.
whismanoid 53:3d5a3d241a5e 67 // InputPin Function = Configuration
whismanoid 53:3d5a3d241a5e 68 //
whismanoid 53:3d5a3d241a5e 69 // InputPin Name = SHDN
whismanoid 53:3d5a3d241a5e 70 // InputPin Description = Shutdown (digital input). Active-High Shutdown Input. Drive high to shut down the MAX11043.
whismanoid 53:3d5a3d241a5e 71 // InputPin Function = Configuration
whismanoid 53:3d5a3d241a5e 72 //
whismanoid 53:3d5a3d241a5e 73 // InputPin Name = DACSTEP
whismanoid 53:3d5a3d241a5e 74 // InputPin Description = DACSTEP (digital input). DAC Step Input. Drive high to move the DAC output in the direction of UP/DWN on the next rising
whismanoid 53:3d5a3d241a5e 75 // edge of the system clock.
whismanoid 53:3d5a3d241a5e 76 // InputPin Function = Configuration
whismanoid 53:3d5a3d241a5e 77 //
whismanoid 53:3d5a3d241a5e 78 // InputPin Name = UP/DWN#
whismanoid 53:3d5a3d241a5e 79 // InputPin Description = UP/DWN# (digital input). DAC Step Direction Select. Drive high to step up, drive low to step down when DACSTEP is toggled.
whismanoid 53:3d5a3d241a5e 80 // InputPin Function = Configuration
whismanoid 53:3d5a3d241a5e 81 //
whismanoid 53:3d5a3d241a5e 82 // OutputPin Name = EOC
whismanoid 53:3d5a3d241a5e 83 // OutputPin Description = End of Conversion Output. Active-Low End-of-Conversion Indicator. EOC asserts low to indicate that new data is ready.
whismanoid 53:3d5a3d241a5e 84 // OutputPin Function = Event
whismanoid 53:3d5a3d241a5e 85 //
whismanoid 58:2fea32db466b 86 // SupplyPin Name = AVDD
whismanoid 58:2fea32db466b 87 // SupplyPin Description = Analog Power-Supply Input. Bypass each AVDD with a nominal 1uF capacitor to AGND.
whismanoid 58:2fea32db466b 88 // SupplyPin VinMax = 3.60
whismanoid 58:2fea32db466b 89 // SupplyPin VinMin = 3.00
whismanoid 58:2fea32db466b 90 // SupplyPin Function = Analog
whismanoid 58:2fea32db466b 91 //
whismanoid 58:2fea32db466b 92 // SupplyPin Name = AGND
whismanoid 58:2fea32db466b 93 // SupplyPin Description = Analog Ground. Connect all AGND inputs together.
whismanoid 58:2fea32db466b 94 // SupplyPin VinMax = 0
whismanoid 58:2fea32db466b 95 // SupplyPin VinMin = 0
whismanoid 58:2fea32db466b 96 // SupplyPin Function = Analog
whismanoid 58:2fea32db466b 97 //
whismanoid 58:2fea32db466b 98 // SupplyPin Name = DGND
whismanoid 58:2fea32db466b 99 // SupplyPin Description = Digital Ground. Connect all DGND inputs together.
whismanoid 58:2fea32db466b 100 // SupplyPin VinMax = 0
whismanoid 58:2fea32db466b 101 // SupplyPin VinMin = 0
whismanoid 58:2fea32db466b 102 // SupplyPin Function = Digital
whismanoid 58:2fea32db466b 103 //
whismanoid 58:2fea32db466b 104 // SupplyPin Name = DVDD
whismanoid 58:2fea32db466b 105 // SupplyPin Description = Digital Power-Supply Input. Bypass each DVDD with a nominal 1uF capacitor to DGND.
whismanoid 58:2fea32db466b 106 // SupplyPin VinMax = 3.60 (*TODO PENDING VERIFICATION*)
whismanoid 58:2fea32db466b 107 // SupplyPin VinMin = 3.00 (*TODO PENDING VERIFICATION*)
whismanoid 58:2fea32db466b 108 // SupplyPin Function = Digital
whismanoid 58:2fea32db466b 109 //
whismanoid 58:2fea32db466b 110 // SupplyPin Name = DVREG
whismanoid 58:2fea32db466b 111 // SupplyPin Description = Regulated Digital Core Supply (from internal +2.5V regulator). Bypass DVREG to DGND with a 10uF capacitor.
whismanoid 58:2fea32db466b 112 // SupplyPin VinMax = 2.50
whismanoid 58:2fea32db466b 113 // SupplyPin VinMin = 2.50
whismanoid 58:2fea32db466b 114 // SupplyPin Function = Digital
whismanoid 58:2fea32db466b 115 //
whismanoid 53:3d5a3d241a5e 116
whismanoid 53:3d5a3d241a5e 117 // CODE GENERATOR: class constructor definition
whismanoid 53:3d5a3d241a5e 118 MAX11043::MAX11043(SPI &spi, DigitalOut &cs_pin, // SPI interface
whismanoid 53:3d5a3d241a5e 119 // CODE GENERATOR: class constructor definition gpio InputPin pins
whismanoid 53:3d5a3d241a5e 120 DigitalOut &CONVRUN_pin, // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 121 DigitalOut &SHDN_pin, // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 122 DigitalOut &DACSTEP_pin, // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 123 DigitalOut &UP_slash_DWNb_pin, // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 124 // CODE GENERATOR: class constructor definition gpio OutputPin pins
whismanoid 53:3d5a3d241a5e 125 DigitalIn &EOC_pin, // Digital Event Output from MAX11043 device
whismanoid 53:3d5a3d241a5e 126 // CODE GENERATOR: class constructor definition ic_variant
whismanoid 53:3d5a3d241a5e 127 MAX11043_ic_t ic_variant)
whismanoid 53:3d5a3d241a5e 128 // CODE GENERATOR: class constructor initializer list
whismanoid 53:3d5a3d241a5e 129 : m_spi(spi), m_cs_pin(cs_pin), // SPI interface
whismanoid 53:3d5a3d241a5e 130 // CODE GENERATOR: class constructor initializer list gpio InputPin pins
whismanoid 53:3d5a3d241a5e 131 m_CONVRUN_pin(CONVRUN_pin), // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 132 m_SHDN_pin(SHDN_pin), // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 133 m_DACSTEP_pin(DACSTEP_pin), // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 134 m_UP_slash_DWNb_pin(UP_slash_DWNb_pin), // Digital Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 135 // CODE GENERATOR: class constructor initializer list gpio OutputPin pins
whismanoid 53:3d5a3d241a5e 136 m_EOC_pin(EOC_pin), // Digital Event Output from MAX11043 device
whismanoid 53:3d5a3d241a5e 137 // CODE GENERATOR: class constructor initializer list ic_variant
whismanoid 53:3d5a3d241a5e 138 m_ic_variant(ic_variant)
whismanoid 53:3d5a3d241a5e 139 {
whismanoid 53:3d5a3d241a5e 140 // CODE GENERATOR: class constructor definition SPI interface initialization
whismanoid 53:3d5a3d241a5e 141 //
whismanoid 53:3d5a3d241a5e 142 // SPI CS = ActiveLow
whismanoid 53:3d5a3d241a5e 143 // SPI FrameStart = CS
whismanoid 53:3d5a3d241a5e 144 m_SPI_cs_state = 1;
whismanoid 53:3d5a3d241a5e 145 m_cs_pin = m_SPI_cs_state;
whismanoid 53:3d5a3d241a5e 146
whismanoid 53:3d5a3d241a5e 147 // SPI CPOL = 0
whismanoid 53:3d5a3d241a5e 148 // SPI CPHA = 0
whismanoid 53:3d5a3d241a5e 149 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 53:3d5a3d241a5e 150 // SPI SCLK Idle Low
whismanoid 53:3d5a3d241a5e 151 m_SPI_dataMode = 0; //SPI_MODE0; // CPOL=0,CPHA=0: Rising Edge stable; SCLK idle Low
whismanoid 53:3d5a3d241a5e 152 m_spi.format(8,m_SPI_dataMode); // int bits_must_be_8, int mode=0_3 CPOL=0,CPHA=0
whismanoid 53:3d5a3d241a5e 153
whismanoid 53:3d5a3d241a5e 154 // SPI SCLKMaxMHz = 40
whismanoid 53:3d5a3d241a5e 155 // SPI SCLKMinMHz = 0
whismanoid 53:3d5a3d241a5e 156 //#define SPI_SCLK_Hz 48000000 // 48MHz
whismanoid 53:3d5a3d241a5e 157 //#define SPI_SCLK_Hz 24000000 // 24MHz
whismanoid 53:3d5a3d241a5e 158 //#define SPI_SCLK_Hz 12000000 // 12MHz
whismanoid 53:3d5a3d241a5e 159 //#define SPI_SCLK_Hz 6000000 // 6MHz
whismanoid 53:3d5a3d241a5e 160 //#define SPI_SCLK_Hz 4000000 // 4MHz
whismanoid 53:3d5a3d241a5e 161 //#define SPI_SCLK_Hz 2000000 // 2MHz
whismanoid 53:3d5a3d241a5e 162 //#define SPI_SCLK_Hz 1000000 // 1MHz
whismanoid 61:b4f3051578ef 163 m_SPI_SCLK_Hz = 24000000; // platform limit 24MHz; MAX11043 limit is 40MHz
whismanoid 53:3d5a3d241a5e 164 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 53:3d5a3d241a5e 165
whismanoid 53:3d5a3d241a5e 166 //
whismanoid 53:3d5a3d241a5e 167 // CODE GENERATOR: class constructor definition gpio InputPin (Input to device) initialization
whismanoid 53:3d5a3d241a5e 168 //
whismanoid 53:3d5a3d241a5e 169 // CONVRUN Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 170 m_CONVRUN_pin = 1; // output logic high -- initial value in constructor
whismanoid 53:3d5a3d241a5e 171 //
whismanoid 53:3d5a3d241a5e 172 // SHDN Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 173 m_SHDN_pin = 1; // output logic high -- initial value in constructor
whismanoid 53:3d5a3d241a5e 174 //
whismanoid 53:3d5a3d241a5e 175 // DACSTEP Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 176 m_DACSTEP_pin = 1; // output logic high -- initial value in constructor
whismanoid 53:3d5a3d241a5e 177 //
whismanoid 53:3d5a3d241a5e 178 // UP_slash_DWNb Configuration Input to MAX11043 device
whismanoid 53:3d5a3d241a5e 179 m_UP_slash_DWNb_pin = 1; // output logic high -- initial value in constructor
whismanoid 53:3d5a3d241a5e 180 //
whismanoid 53:3d5a3d241a5e 181 // CODE GENERATOR: class constructor definition gpio OutputPin (Output from MAX11043 device) initialization
whismanoid 53:3d5a3d241a5e 182 //
whismanoid 53:3d5a3d241a5e 183 // EOC Event Output from device
whismanoid 53:3d5a3d241a5e 184 }
whismanoid 53:3d5a3d241a5e 185
whismanoid 53:3d5a3d241a5e 186 // CODE GENERATOR: class destructor definition
whismanoid 53:3d5a3d241a5e 187 MAX11043::~MAX11043()
whismanoid 53:3d5a3d241a5e 188 {
whismanoid 53:3d5a3d241a5e 189 // do nothing
whismanoid 53:3d5a3d241a5e 190 }
whismanoid 53:3d5a3d241a5e 191
whismanoid 53:3d5a3d241a5e 192 // CODE GENERATOR: spi_frequency setter definition
whismanoid 53:3d5a3d241a5e 193 /// set SPI SCLK frequency
whismanoid 53:3d5a3d241a5e 194 void MAX11043::spi_frequency(int spi_sclk_Hz)
whismanoid 53:3d5a3d241a5e 195 {
whismanoid 53:3d5a3d241a5e 196 m_SPI_SCLK_Hz = spi_sclk_Hz;
whismanoid 53:3d5a3d241a5e 197 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 53:3d5a3d241a5e 198 }
whismanoid 53:3d5a3d241a5e 199
whismanoid 53:3d5a3d241a5e 200 // CODE GENERATOR: omit global g_MAX11043_device
whismanoid 53:3d5a3d241a5e 201 // CODE GENERATOR: extern function declarations
whismanoid 53:3d5a3d241a5e 202 // CODE GENERATOR: extern function requirement MAX11043::SPIoutputCS
whismanoid 53:3d5a3d241a5e 203 // Assert SPI Chip Select
whismanoid 53:3d5a3d241a5e 204 // SPI chip-select for MAX11043
whismanoid 53:3d5a3d241a5e 205 //
whismanoid 62:8223a7253c90 206 inline void MAX11043::SPIoutputCS(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 207 {
whismanoid 53:3d5a3d241a5e 208 // CODE GENERATOR: extern function definition for function SPIoutputCS
whismanoid 53:3d5a3d241a5e 209 // CODE GENERATOR: extern function definition for standard SPI interface function SPIoutputCS(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 210 m_SPI_cs_state = isLogicHigh;
whismanoid 53:3d5a3d241a5e 211 m_cs_pin = m_SPI_cs_state;
whismanoid 53:3d5a3d241a5e 212 }
whismanoid 53:3d5a3d241a5e 213
whismanoid 53:3d5a3d241a5e 214 // CODE GENERATOR: extern function requirement MAX11043::SPIwrite16bits
whismanoid 53:3d5a3d241a5e 215 // SPI write 16 bits
whismanoid 53:3d5a3d241a5e 216 // SPI interface to MAX11043 shift 16 bits mosiData into MAX11043 DIN
whismanoid 53:3d5a3d241a5e 217 //
whismanoid 53:3d5a3d241a5e 218 void MAX11043::SPIwrite16bits(int16_t mosiData16)
whismanoid 53:3d5a3d241a5e 219 {
whismanoid 53:3d5a3d241a5e 220 // CODE GENERATOR: extern function definition for function SPIwrite16bits
whismanoid 53:3d5a3d241a5e 221 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIwrite16bits(int16_t mosiData16)
whismanoid 53:3d5a3d241a5e 222 size_t byteCount = 2;
whismanoid 53:3d5a3d241a5e 223 static char mosiData[2];
whismanoid 53:3d5a3d241a5e 224 static char misoData[2];
whismanoid 53:3d5a3d241a5e 225 mosiData[0] = (char)((mosiData16 >> 8) & 0xFF); // MSByte
whismanoid 53:3d5a3d241a5e 226 mosiData[1] = (char)((mosiData16 >> 0) & 0xFF); // LSByte
whismanoid 53:3d5a3d241a5e 227 //
whismanoid 53:3d5a3d241a5e 228 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 53:3d5a3d241a5e 229 //~ noInterrupts();
whismanoid 53:3d5a3d241a5e 230 //
whismanoid 53:3d5a3d241a5e 231 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 53:3d5a3d241a5e 232 //
whismanoid 53:3d5a3d241a5e 233 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 53:3d5a3d241a5e 234 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 53:3d5a3d241a5e 235 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 53:3d5a3d241a5e 236 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 53:3d5a3d241a5e 237 //
whismanoid 53:3d5a3d241a5e 238 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 53:3d5a3d241a5e 239 //
whismanoid 53:3d5a3d241a5e 240 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 53:3d5a3d241a5e 241 //~ interrupts();
whismanoid 53:3d5a3d241a5e 242 // Optional Diagnostic function to print SPI transactions
whismanoid 53:3d5a3d241a5e 243 if (onSPIprint)
whismanoid 53:3d5a3d241a5e 244 {
whismanoid 53:3d5a3d241a5e 245 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 53:3d5a3d241a5e 246 }
whismanoid 53:3d5a3d241a5e 247 //
whismanoid 53:3d5a3d241a5e 248 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 53:3d5a3d241a5e 249 //cmdLine.serial().printf(" MOSI->"));
whismanoid 53:3d5a3d241a5e 250 //cmdLine.serial().printf(" 0x"));
whismanoid 53:3d5a3d241a5e 251 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 53:3d5a3d241a5e 252 //cmdLine.serial().printf(" 0x"));
whismanoid 53:3d5a3d241a5e 253 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 53:3d5a3d241a5e 254 //cmdLine.serial().printf(" 0x"));
whismanoid 53:3d5a3d241a5e 255 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 53:3d5a3d241a5e 256 // hex dump mosiData[0..byteCount-1]
whismanoid 53:3d5a3d241a5e 257 #if 0 // HAS_MICROUSBSERIAL
whismanoid 53:3d5a3d241a5e 258 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 53:3d5a3d241a5e 259 if (byteCount > 7) {
whismanoid 53:3d5a3d241a5e 260 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 53:3d5a3d241a5e 261 }
whismanoid 53:3d5a3d241a5e 262 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 53:3d5a3d241a5e 263 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 53:3d5a3d241a5e 264 {
whismanoid 53:3d5a3d241a5e 265 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 53:3d5a3d241a5e 266 }
whismanoid 53:3d5a3d241a5e 267 // hex dump misoData[0..byteCount-1]
whismanoid 53:3d5a3d241a5e 268 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 53:3d5a3d241a5e 269 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 53:3d5a3d241a5e 270 {
whismanoid 53:3d5a3d241a5e 271 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 53:3d5a3d241a5e 272 }
whismanoid 53:3d5a3d241a5e 273 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 53:3d5a3d241a5e 274 #endif
whismanoid 53:3d5a3d241a5e 275 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 53:3d5a3d241a5e 276 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 53:3d5a3d241a5e 277 if (byteCount > 7) {
whismanoid 53:3d5a3d241a5e 278 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 53:3d5a3d241a5e 279 }
whismanoid 53:3d5a3d241a5e 280 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 53:3d5a3d241a5e 281 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 53:3d5a3d241a5e 282 {
whismanoid 53:3d5a3d241a5e 283 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 53:3d5a3d241a5e 284 }
whismanoid 53:3d5a3d241a5e 285 // hex dump misoData[0..byteCount-1]
whismanoid 53:3d5a3d241a5e 286 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 53:3d5a3d241a5e 287 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 53:3d5a3d241a5e 288 {
whismanoid 53:3d5a3d241a5e 289 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 53:3d5a3d241a5e 290 }
whismanoid 53:3d5a3d241a5e 291 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 53:3d5a3d241a5e 292 #endif
whismanoid 53:3d5a3d241a5e 293 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 53:3d5a3d241a5e 294 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 53:3d5a3d241a5e 295 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 53:3d5a3d241a5e 296 //
whismanoid 53:3d5a3d241a5e 297 // int misoData16 = (misoData16_FF00 << 8) | misoData16_00FF;
whismanoid 53:3d5a3d241a5e 298 // return misoData16;
whismanoid 53:3d5a3d241a5e 299 }
whismanoid 53:3d5a3d241a5e 300
whismanoid 53:3d5a3d241a5e 301 // CODE GENERATOR: extern function requirement MAX11043::SPIreadWrite16bits
whismanoid 53:3d5a3d241a5e 302 // SPI read and write 16 bits
whismanoid 53:3d5a3d241a5e 303 // SPI interface to MAX11043 shift 16 bits mosiData16 into MAX11043 DIN
whismanoid 53:3d5a3d241a5e 304 // while simultaneously capturing 16 bits miso data from MAX11043 DOUT
whismanoid 53:3d5a3d241a5e 305 //
whismanoid 53:3d5a3d241a5e 306 int16_t MAX11043::SPIreadWrite16bits(int16_t mosiData16)
whismanoid 53:3d5a3d241a5e 307 {
whismanoid 53:3d5a3d241a5e 308 // CODE GENERATOR: extern function definition for function SPIreadWrite16bits
whismanoid 53:3d5a3d241a5e 309 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWrite16bits(int16_t mosiData16)
whismanoid 53:3d5a3d241a5e 310 size_t byteCount = 2;
whismanoid 53:3d5a3d241a5e 311 static char mosiData[2];
whismanoid 53:3d5a3d241a5e 312 static char misoData[2];
whismanoid 53:3d5a3d241a5e 313 mosiData[0] = (char)((mosiData16 >> 8) & 0xFF); // MSByte
whismanoid 53:3d5a3d241a5e 314 mosiData[1] = (char)((mosiData16 >> 0) & 0xFF); // LSByte
whismanoid 53:3d5a3d241a5e 315 //
whismanoid 53:3d5a3d241a5e 316 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 53:3d5a3d241a5e 317 //~ noInterrupts();
whismanoid 53:3d5a3d241a5e 318 //
whismanoid 53:3d5a3d241a5e 319 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 53:3d5a3d241a5e 320 //
whismanoid 53:3d5a3d241a5e 321 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 53:3d5a3d241a5e 322 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 53:3d5a3d241a5e 323 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 53:3d5a3d241a5e 324 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 53:3d5a3d241a5e 325 //
whismanoid 53:3d5a3d241a5e 326 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 53:3d5a3d241a5e 327 //
whismanoid 53:3d5a3d241a5e 328 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 53:3d5a3d241a5e 329 //~ interrupts();
whismanoid 53:3d5a3d241a5e 330 // Optional Diagnostic function to print SPI transactions
whismanoid 53:3d5a3d241a5e 331 if (onSPIprint)
whismanoid 53:3d5a3d241a5e 332 {
whismanoid 53:3d5a3d241a5e 333 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 53:3d5a3d241a5e 334 }
whismanoid 53:3d5a3d241a5e 335 //
whismanoid 53:3d5a3d241a5e 336 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 53:3d5a3d241a5e 337 //cmdLine.serial().printf(" MOSI->"));
whismanoid 53:3d5a3d241a5e 338 //cmdLine.serial().printf(" 0x"));
whismanoid 53:3d5a3d241a5e 339 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 53:3d5a3d241a5e 340 //cmdLine.serial().printf(" 0x"));
whismanoid 53:3d5a3d241a5e 341 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 53:3d5a3d241a5e 342 //cmdLine.serial().printf(" 0x"));
whismanoid 53:3d5a3d241a5e 343 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 53:3d5a3d241a5e 344 // hex dump mosiData[0..byteCount-1]
whismanoid 53:3d5a3d241a5e 345 #if 0 // HAS_MICROUSBSERIAL
whismanoid 53:3d5a3d241a5e 346 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 53:3d5a3d241a5e 347 if (byteCount > 7) {
whismanoid 53:3d5a3d241a5e 348 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 53:3d5a3d241a5e 349 }
whismanoid 53:3d5a3d241a5e 350 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 53:3d5a3d241a5e 351 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 53:3d5a3d241a5e 352 {
whismanoid 53:3d5a3d241a5e 353 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 53:3d5a3d241a5e 354 }
whismanoid 53:3d5a3d241a5e 355 // hex dump misoData[0..byteCount-1]
whismanoid 53:3d5a3d241a5e 356 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 53:3d5a3d241a5e 357 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 53:3d5a3d241a5e 358 {
whismanoid 53:3d5a3d241a5e 359 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 53:3d5a3d241a5e 360 }
whismanoid 53:3d5a3d241a5e 361 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 53:3d5a3d241a5e 362 #endif
whismanoid 53:3d5a3d241a5e 363 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 53:3d5a3d241a5e 364 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 53:3d5a3d241a5e 365 if (byteCount > 7) {
whismanoid 53:3d5a3d241a5e 366 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 53:3d5a3d241a5e 367 }
whismanoid 53:3d5a3d241a5e 368 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 53:3d5a3d241a5e 369 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 53:3d5a3d241a5e 370 {
whismanoid 53:3d5a3d241a5e 371 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 53:3d5a3d241a5e 372 }
whismanoid 53:3d5a3d241a5e 373 // hex dump misoData[0..byteCount-1]
whismanoid 53:3d5a3d241a5e 374 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 53:3d5a3d241a5e 375 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 53:3d5a3d241a5e 376 {
whismanoid 53:3d5a3d241a5e 377 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 53:3d5a3d241a5e 378 }
whismanoid 53:3d5a3d241a5e 379 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 53:3d5a3d241a5e 380 #endif
whismanoid 53:3d5a3d241a5e 381 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 53:3d5a3d241a5e 382 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 53:3d5a3d241a5e 383 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 53:3d5a3d241a5e 384 //
whismanoid 53:3d5a3d241a5e 385 //int misoData16 = (misoData16_FF00 << 8) | misoData16_00FF;
whismanoid 53:3d5a3d241a5e 386 int misoData16 = (misoData[0] << 8) | misoData[1];
whismanoid 53:3d5a3d241a5e 387 return misoData16;
whismanoid 53:3d5a3d241a5e 388 }
whismanoid 53:3d5a3d241a5e 389
whismanoid 53:3d5a3d241a5e 390 // CODE GENERATOR: extern function requirement MAX11043::SPIreadWrite32bits
whismanoid 53:3d5a3d241a5e 391 // SPI read and write 32 bits
whismanoid 53:3d5a3d241a5e 392 // SPI interface to MAX11043 shift 32 bits mosiData into MAX11043 DIN
whismanoid 53:3d5a3d241a5e 393 // while simultaneously capturing 32 bits miso data from MAX11043 DOUT
whismanoid 53:3d5a3d241a5e 394 //
whismanoid 53:3d5a3d241a5e 395 int32_t MAX11043::SPIreadWrite32bits(int32_t mosiData32)
whismanoid 53:3d5a3d241a5e 396 {
whismanoid 53:3d5a3d241a5e 397 // CODE GENERATOR: extern function definition for function SPIreadWrite32bits
whismanoid 53:3d5a3d241a5e 398 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWrite32bits(int32_t mosiData32)
whismanoid 53:3d5a3d241a5e 399 size_t byteCount = 4;
whismanoid 53:3d5a3d241a5e 400 static char mosiData[4];
whismanoid 53:3d5a3d241a5e 401 static char misoData[4];
whismanoid 53:3d5a3d241a5e 402 mosiData[0] = (char)((mosiData32 >> 24) & 0xFF); // MSByte
whismanoid 53:3d5a3d241a5e 403 mosiData[1] = (char)((mosiData32 >> 16) & 0xFF);
whismanoid 53:3d5a3d241a5e 404 mosiData[2] = (char)((mosiData32 >> 8) & 0xFF);
whismanoid 53:3d5a3d241a5e 405 mosiData[3] = (char)((mosiData32 >> 0) & 0xFF); // LSByte
whismanoid 53:3d5a3d241a5e 406 //
whismanoid 53:3d5a3d241a5e 407 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 53:3d5a3d241a5e 408 //~ noInterrupts();
whismanoid 53:3d5a3d241a5e 409 //
whismanoid 53:3d5a3d241a5e 410 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 53:3d5a3d241a5e 411 //
whismanoid 53:3d5a3d241a5e 412 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 53:3d5a3d241a5e 413 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 53:3d5a3d241a5e 414 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 53:3d5a3d241a5e 415 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 53:3d5a3d241a5e 416 //
whismanoid 53:3d5a3d241a5e 417 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 53:3d5a3d241a5e 418 //
whismanoid 53:3d5a3d241a5e 419 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 53:3d5a3d241a5e 420 //~ interrupts();
whismanoid 53:3d5a3d241a5e 421 // Optional Diagnostic function to print SPI transactions
whismanoid 53:3d5a3d241a5e 422 if (onSPIprint)
whismanoid 53:3d5a3d241a5e 423 {
whismanoid 53:3d5a3d241a5e 424 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 53:3d5a3d241a5e 425 }
whismanoid 53:3d5a3d241a5e 426 //
whismanoid 53:3d5a3d241a5e 427 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 53:3d5a3d241a5e 428 //cmdLine.serial().printf(" MOSI->"));
whismanoid 53:3d5a3d241a5e 429 //cmdLine.serial().printf(" 0x"));
whismanoid 53:3d5a3d241a5e 430 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 53:3d5a3d241a5e 431 //cmdLine.serial().printf(" 0x"));
whismanoid 53:3d5a3d241a5e 432 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 53:3d5a3d241a5e 433 //cmdLine.serial().printf(" 0x"));
whismanoid 53:3d5a3d241a5e 434 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 53:3d5a3d241a5e 435 // hex dump mosiData[0..byteCount-1]
whismanoid 53:3d5a3d241a5e 436 #if 0 // HAS_MICROUSBSERIAL
whismanoid 53:3d5a3d241a5e 437 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 53:3d5a3d241a5e 438 if (byteCount > 7) {
whismanoid 53:3d5a3d241a5e 439 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 53:3d5a3d241a5e 440 }
whismanoid 53:3d5a3d241a5e 441 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 53:3d5a3d241a5e 442 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 53:3d5a3d241a5e 443 {
whismanoid 53:3d5a3d241a5e 444 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 53:3d5a3d241a5e 445 }
whismanoid 53:3d5a3d241a5e 446 // hex dump misoData[0..byteCount-1]
whismanoid 53:3d5a3d241a5e 447 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 53:3d5a3d241a5e 448 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 53:3d5a3d241a5e 449 {
whismanoid 53:3d5a3d241a5e 450 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 53:3d5a3d241a5e 451 }
whismanoid 53:3d5a3d241a5e 452 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 53:3d5a3d241a5e 453 #endif
whismanoid 53:3d5a3d241a5e 454 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 53:3d5a3d241a5e 455 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 53:3d5a3d241a5e 456 if (byteCount > 7) {
whismanoid 53:3d5a3d241a5e 457 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 53:3d5a3d241a5e 458 }
whismanoid 53:3d5a3d241a5e 459 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 53:3d5a3d241a5e 460 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 53:3d5a3d241a5e 461 {
whismanoid 53:3d5a3d241a5e 462 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 53:3d5a3d241a5e 463 }
whismanoid 53:3d5a3d241a5e 464 // hex dump misoData[0..byteCount-1]
whismanoid 53:3d5a3d241a5e 465 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 53:3d5a3d241a5e 466 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 53:3d5a3d241a5e 467 {
whismanoid 53:3d5a3d241a5e 468 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 53:3d5a3d241a5e 469 }
whismanoid 53:3d5a3d241a5e 470 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 53:3d5a3d241a5e 471 #endif
whismanoid 53:3d5a3d241a5e 472 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 53:3d5a3d241a5e 473 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 53:3d5a3d241a5e 474 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 53:3d5a3d241a5e 475 //
whismanoid 53:3d5a3d241a5e 476 //int misoData32 = (misoData32_FF000000 << 24) | (misoData32_FF0000 << 16) | (misoData32_0000FF00 << 8) | misoData32_000000FF;
whismanoid 53:3d5a3d241a5e 477 int misoData32 = (misoData[0] << 24) | (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 53:3d5a3d241a5e 478 return misoData32;
whismanoid 53:3d5a3d241a5e 479 }
whismanoid 53:3d5a3d241a5e 480
whismanoid 62:8223a7253c90 481 // CODE GENERATOR: extern function requirement MAX11043::SPIreadWriteWithLowCS
whismanoid 62:8223a7253c90 482 // SPI read and write arbitrary number of 8-bit bytes
whismanoid 62:8223a7253c90 483 // SPI interface to MAX11043 shift mosiData into MAX11043 DIN
whismanoid 62:8223a7253c90 484 // while simultaneously capturing miso data from MAX11043 DOUT
whismanoid 62:8223a7253c90 485 //
whismanoid 62:8223a7253c90 486 int MAX11043::SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[])
whismanoid 62:8223a7253c90 487 {
whismanoid 62:8223a7253c90 488 // CODE GENERATOR: extern function definition for function SPIreadWriteWithLowCS
whismanoid 62:8223a7253c90 489 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWrite32bits(int32_t mosiData32)
whismanoid 62:8223a7253c90 490 //size_t byteCount = 4;
whismanoid 62:8223a7253c90 491 //static char mosiData[4];
whismanoid 62:8223a7253c90 492 //static char misoData[4];
whismanoid 62:8223a7253c90 493 //
whismanoid 62:8223a7253c90 494 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 62:8223a7253c90 495 //~ noInterrupts();
whismanoid 62:8223a7253c90 496 //
whismanoid 62:8223a7253c90 497 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 62:8223a7253c90 498 //
whismanoid 62:8223a7253c90 499 m_cs_pin = 0;
whismanoid 62:8223a7253c90 500 unsigned int numBytesTransferred = m_spi.write((char*)mosiData, byteCount, (char*)misoData, byteCount);
whismanoid 62:8223a7253c90 501 m_cs_pin = m_SPI_cs_state;
whismanoid 62:8223a7253c90 502 //
whismanoid 62:8223a7253c90 503 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 62:8223a7253c90 504 //
whismanoid 62:8223a7253c90 505 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 62:8223a7253c90 506 //~ interrupts();
whismanoid 62:8223a7253c90 507 // Optional Diagnostic function to print SPI transactions
whismanoid 62:8223a7253c90 508 if (onSPIprint)
whismanoid 62:8223a7253c90 509 {
whismanoid 62:8223a7253c90 510 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 62:8223a7253c90 511 }
whismanoid 62:8223a7253c90 512 return numBytesTransferred;
whismanoid 62:8223a7253c90 513 }
whismanoid 62:8223a7253c90 514
whismanoid 53:3d5a3d241a5e 515 // TODO1: CODE GENERATOR: extern function GPIOoutputSHDN alias SHDNoutputValue
whismanoid 53:3d5a3d241a5e 516 // CODE GENERATOR: extern function requirement MAX11043::SHDNoutputValue
whismanoid 58:2fea32db466b 517 // Assert MAX11043 SHDN pin : High = Shut Down, Low = Normal Operation.
whismanoid 53:3d5a3d241a5e 518 //
whismanoid 53:3d5a3d241a5e 519 void MAX11043::SHDNoutputValue(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 520 {
whismanoid 53:3d5a3d241a5e 521 // CODE GENERATOR: extern function definition for function SHDNoutputValue
whismanoid 53:3d5a3d241a5e 522 // TODO1: CODE GENERATOR: extern function definition for gpio interface function SHDNoutputValue
whismanoid 53:3d5a3d241a5e 523 // TODO1: CODE GENERATOR: gpio pin SHDN assuming member function m_SHDN_pin
whismanoid 53:3d5a3d241a5e 524 // TODO1: CODE GENERATOR: gpio direction output
whismanoid 53:3d5a3d241a5e 525 // m_SHDN_pin.output(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 526 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 527 m_SHDN_pin = isLogicHigh;
whismanoid 53:3d5a3d241a5e 528 }
whismanoid 52:607010f0c54e 529
whismanoid 53:3d5a3d241a5e 530 // TODO1: CODE GENERATOR: extern function GPIOoutputCONVRUN alias CONVRUNoutputValue
whismanoid 53:3d5a3d241a5e 531 // CODE GENERATOR: extern function requirement MAX11043::CONVRUNoutputValue
whismanoid 58:2fea32db466b 532 // Assert MAX11043 CONVRUN pin : High = start continuous conversions on all 4 channels, Low = Idle.
whismanoid 53:3d5a3d241a5e 533 //
whismanoid 53:3d5a3d241a5e 534 void MAX11043::CONVRUNoutputValue(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 535 {
whismanoid 53:3d5a3d241a5e 536 // CODE GENERATOR: extern function definition for function CONVRUNoutputValue
whismanoid 53:3d5a3d241a5e 537 // TODO1: CODE GENERATOR: extern function definition for gpio interface function CONVRUNoutputValue
whismanoid 53:3d5a3d241a5e 538 // TODO1: CODE GENERATOR: gpio pin CONVRUN assuming member function m_CONVRUN_pin
whismanoid 53:3d5a3d241a5e 539 // TODO1: CODE GENERATOR: gpio direction output
whismanoid 53:3d5a3d241a5e 540 // m_CONVRUN_pin.output(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 541 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 542 m_CONVRUN_pin = isLogicHigh;
whismanoid 53:3d5a3d241a5e 543 }
whismanoid 53:3d5a3d241a5e 544
whismanoid 53:3d5a3d241a5e 545 // TODO1: CODE GENERATOR: extern function GPIOoutputDACSTEP alias DACSTEPoutputValue
whismanoid 53:3d5a3d241a5e 546 // CODE GENERATOR: extern function requirement MAX11043::DACSTEPoutputValue
whismanoid 58:2fea32db466b 547 // Assert MAX11043 DACSTEP pin : High = Active, Low = Idle.
whismanoid 53:3d5a3d241a5e 548 //
whismanoid 53:3d5a3d241a5e 549 void MAX11043::DACSTEPoutputValue(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 550 {
whismanoid 53:3d5a3d241a5e 551 // CODE GENERATOR: extern function definition for function DACSTEPoutputValue
whismanoid 53:3d5a3d241a5e 552 // TODO1: CODE GENERATOR: extern function definition for gpio interface function DACSTEPoutputValue
whismanoid 53:3d5a3d241a5e 553 // TODO1: CODE GENERATOR: gpio pin DACSTEP assuming member function m_DACSTEP_pin
whismanoid 53:3d5a3d241a5e 554 // TODO1: CODE GENERATOR: gpio direction output
whismanoid 53:3d5a3d241a5e 555 // m_DACSTEP_pin.output(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 556 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 557 m_DACSTEP_pin = isLogicHigh;
whismanoid 53:3d5a3d241a5e 558 }
whismanoid 53:3d5a3d241a5e 559
whismanoid 53:3d5a3d241a5e 560 // TODO1: CODE GENERATOR: extern function GPIOoutputUP_slash_DWNb alias UP_slash_DWNboutputValue
whismanoid 53:3d5a3d241a5e 561 // CODE GENERATOR: extern function requirement MAX11043::UP_slash_DWNboutputValue
whismanoid 58:2fea32db466b 562 // Assert MAX11043 UP_slash_DWNb pin : High = Up, Low = Down.
whismanoid 53:3d5a3d241a5e 563 //
whismanoid 53:3d5a3d241a5e 564 void MAX11043::UP_slash_DWNboutputValue(int isLogicHigh)
whismanoid 53:3d5a3d241a5e 565 {
whismanoid 53:3d5a3d241a5e 566 // CODE GENERATOR: extern function definition for function UP_slash_DWNboutputValue
whismanoid 53:3d5a3d241a5e 567 // TODO1: CODE GENERATOR: extern function definition for gpio interface function UP_slash_DWNboutputValue
whismanoid 53:3d5a3d241a5e 568 // TODO1: CODE GENERATOR: gpio pin UP_slash_DWNb assuming member function m_UP_slash_DWNb_pin
whismanoid 53:3d5a3d241a5e 569 // TODO1: CODE GENERATOR: gpio direction output
whismanoid 53:3d5a3d241a5e 570 // m_UP_slash_DWNb_pin.output(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 571 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 572 m_UP_slash_DWNb_pin = isLogicHigh;
whismanoid 53:3d5a3d241a5e 573 }
whismanoid 53:3d5a3d241a5e 574
whismanoid 53:3d5a3d241a5e 575 // CODE GENERATOR: extern function requirement MAX11043::EOCinputWaitUntilLow
whismanoid 53:3d5a3d241a5e 576 // Wait for MAX11043 EOC pin low, indicating end of conversion.
whismanoid 53:3d5a3d241a5e 577 // Required when using any of the InternalClock modes.
whismanoid 53:3d5a3d241a5e 578 //
whismanoid 53:3d5a3d241a5e 579 void MAX11043::EOCinputWaitUntilLow()
whismanoid 53:3d5a3d241a5e 580 {
whismanoid 53:3d5a3d241a5e 581 // CODE GENERATOR: extern function definition for function EOCinputWaitUntilLow
whismanoid 53:3d5a3d241a5e 582 // TODO1: CODE GENERATOR: extern function definition for gpio interface function EOCinputWaitUntilLow
whismanoid 53:3d5a3d241a5e 583 // TODO1: CODE GENERATOR: gpio pin EOC assuming member function m_EOC_pin
whismanoid 53:3d5a3d241a5e 584 // TODO1: CODE GENERATOR: gpio direction input
whismanoid 53:3d5a3d241a5e 585 // m_EOC_pin.input(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 586 // TODO1: CODE GENERATOR: gpio function WaitUntilLow
whismanoid 53:3d5a3d241a5e 587 while (m_EOC_pin != 0)
whismanoid 53:3d5a3d241a5e 588 {
whismanoid 53:3d5a3d241a5e 589 // spinlock waiting for logic low pin state
whismanoid 53:3d5a3d241a5e 590 }
whismanoid 53:3d5a3d241a5e 591 }
whismanoid 53:3d5a3d241a5e 592
whismanoid 53:3d5a3d241a5e 593 // CODE GENERATOR: extern function requirement MAX11043::EOCinputValue
whismanoid 53:3d5a3d241a5e 594 // Return the status of the MAX11043 EOC pin.
whismanoid 53:3d5a3d241a5e 595 //
whismanoid 53:3d5a3d241a5e 596 int MAX11043::EOCinputValue()
whismanoid 53:3d5a3d241a5e 597 {
whismanoid 53:3d5a3d241a5e 598 // CODE GENERATOR: extern function definition for function EOCinputValue
whismanoid 53:3d5a3d241a5e 599 // TODO1: CODE GENERATOR: extern function definition for gpio interface function EOCinputValue
whismanoid 53:3d5a3d241a5e 600 // TODO1: CODE GENERATOR: gpio pin EOC assuming member function m_EOC_pin
whismanoid 53:3d5a3d241a5e 601 // TODO1: CODE GENERATOR: gpio direction input
whismanoid 53:3d5a3d241a5e 602 // m_EOC_pin.input(); // only applicable to DigitalInOut
whismanoid 53:3d5a3d241a5e 603 // TODO1: CODE GENERATOR: gpio function Value
whismanoid 53:3d5a3d241a5e 604 return m_EOC_pin.read();
whismanoid 53:3d5a3d241a5e 605 }
whismanoid 53:3d5a3d241a5e 606
whismanoid 53:3d5a3d241a5e 607 // CODE GENERATOR: class member function definitions
whismanoid 53:3d5a3d241a5e 608 //----------------------------------------
whismanoid 53:3d5a3d241a5e 609 // Menu item '!'
whismanoid 53:3d5a3d241a5e 610 // Initialize device
whismanoid 53:3d5a3d241a5e 611 // @return 1 on success; 0 on failure
whismanoid 53:3d5a3d241a5e 612 uint8_t MAX11043::Init(void)
whismanoid 53:3d5a3d241a5e 613 {
whismanoid 53:3d5a3d241a5e 614
whismanoid 53:3d5a3d241a5e 615 //----------------------------------------
whismanoid 59:47538bcf6cda 616 // reference voltage, in Volts
whismanoid 59:47538bcf6cda 617 VRef = 2.500;
whismanoid 59:47538bcf6cda 618
whismanoid 59:47538bcf6cda 619 //----------------------------------------
whismanoid 59:47538bcf6cda 620 // shadow of register config CMD_0010_0010_d16_Rd08_Configuration
whismanoid 59:47538bcf6cda 621 config = 0x6000;
whismanoid 59:47538bcf6cda 622
whismanoid 59:47538bcf6cda 623 //----------------------------------------
whismanoid 59:47538bcf6cda 624 // shadow of register status CMD_0001_1110_d8_Rd07_Status
whismanoid 59:47538bcf6cda 625 status = 0x00;
whismanoid 53:3d5a3d241a5e 626
whismanoid 53:3d5a3d241a5e 627 //----------------------------------------
whismanoid 59:47538bcf6cda 628 // shadow of register ADCa CMD_0000_0010_d16o8_Rd00_ADCa
whismanoid 59:47538bcf6cda 629 adca = 0x0000;
whismanoid 53:3d5a3d241a5e 630
whismanoid 53:3d5a3d241a5e 631 //----------------------------------------
whismanoid 59:47538bcf6cda 632 // shadow of register ADCb CMD_0000_0110_d16o8_Rd01_ADCb
whismanoid 59:47538bcf6cda 633 adcb = 0x0000;
whismanoid 59:47538bcf6cda 634
whismanoid 59:47538bcf6cda 635 //----------------------------------------
whismanoid 59:47538bcf6cda 636 // shadow of register ADCc CMD_0000_1010_d16o8_Rd02_ADCc
whismanoid 59:47538bcf6cda 637 adcc = 0x0000;
whismanoid 59:47538bcf6cda 638
whismanoid 59:47538bcf6cda 639 //----------------------------------------
whismanoid 59:47538bcf6cda 640 // shadow of register ADCd CMD_0000_1110_d16o8_Rd03_ADCd
whismanoid 59:47538bcf6cda 641 adcd = 0x0000;
whismanoid 53:3d5a3d241a5e 642
whismanoid 53:3d5a3d241a5e 643 //----------------------------------------
whismanoid 53:3d5a3d241a5e 644 // init (based on old EV kit GUI)
whismanoid 53:3d5a3d241a5e 645 #warning "Not Implemented Yet: MAX11043::Init init..."
whismanoid 53:3d5a3d241a5e 646 // bool bOpResult = false;
whismanoid 53:3d5a3d241a5e 647 // String FWVersionString = "00";
whismanoid 53:3d5a3d241a5e 648 // bool bDemoMode = true;
whismanoid 53:3d5a3d241a5e 649 // int scan_resolution = 0;
whismanoid 53:3d5a3d241a5e 650 // int scan_channels = 0;
whismanoid 53:3d5a3d241a5e 651 // int scan_bits = 0;
whismanoid 53:3d5a3d241a5e 652 // int sampleRateFactore = 0;
whismanoid 53:3d5a3d241a5e 653 // double sampleRate = 0;
whismanoid 53:3d5a3d241a5e 654 // unsigned long banks_requested = 0;
whismanoid 53:3d5a3d241a5e 655 // bool bScanMode = 0;
whismanoid 53:3d5a3d241a5e 656
whismanoid 53:3d5a3d241a5e 657 //----------------------------------------
whismanoid 59:47538bcf6cda 658 // Device ID Validation -- not used, no device ID register
whismanoid 53:3d5a3d241a5e 659 #warning "Not Implemented Yet: MAX11043::Init Device ID Validation..."
whismanoid 53:3d5a3d241a5e 660 // const uint32_t part_id_expect = 0x000F02;
whismanoid 53:3d5a3d241a5e 661 // uint32_t part_id_readback;
whismanoid 53:3d5a3d241a5e 662 // RegRead(xxxxxxxxxxxxCMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID, &part_id_readback);
whismanoid 53:3d5a3d241a5e 663 // if (part_id_readback != part_id_expect) return 0;
whismanoid 53:3d5a3d241a5e 664
whismanoid 53:3d5a3d241a5e 665 //----------------------------------------
whismanoid 58:2fea32db466b 666 // Active-High Shutdown Input. Drive high to shut down the MAX11043.
whismanoid 58:2fea32db466b 667 SHDNoutputValue(0); // SHDN Inactive
whismanoid 58:2fea32db466b 668
whismanoid 58:2fea32db466b 669 //----------------------------------------
whismanoid 58:2fea32db466b 670 // Convert Run. Drive high to start continuous conversions on all 4 channels. The device is idle when
whismanoid 58:2fea32db466b 671 // CONVRUN is low.
whismanoid 58:2fea32db466b 672 CONVRUNoutputValue(0); // CONVRUN Idle
whismanoid 58:2fea32db466b 673
whismanoid 58:2fea32db466b 674 //----------------------------------------
whismanoid 58:2fea32db466b 675 // DAC Step Input. Drive high to move the DAC output in the direction of UP/DWN on the next rising
whismanoid 58:2fea32db466b 676 // edge of the system clock.
whismanoid 58:2fea32db466b 677 DACSTEPoutputValue(0); // DACSTEP Idle
whismanoid 58:2fea32db466b 678
whismanoid 58:2fea32db466b 679 //----------------------------------------
whismanoid 58:2fea32db466b 680 // DAC Step Direction Select. Drive high to step up, drive low to step down when DACSTEP is toggled.
whismanoid 58:2fea32db466b 681 UP_slash_DWNboutputValue(0); // UP/DWN# Down
whismanoid 58:2fea32db466b 682
whismanoid 58:2fea32db466b 683 //----------------------------------------
whismanoid 53:3d5a3d241a5e 684 // success
whismanoid 53:3d5a3d241a5e 685 return 1;
whismanoid 53:3d5a3d241a5e 686 }
whismanoid 53:3d5a3d241a5e 687
whismanoid 53:3d5a3d241a5e 688 //----------------------------------------
whismanoid 53:3d5a3d241a5e 689 // Write a MAX11043 register.
whismanoid 53:3d5a3d241a5e 690 //
whismanoid 57:1c9da8e90737 691 // CMDOP_1aaa_aaaa_ReadRegister bit is cleared 0 indicating a write operation.
whismanoid 53:3d5a3d241a5e 692 //
whismanoid 53:3d5a3d241a5e 693 // MAX11043 register length can be determined by function RegSize.
whismanoid 53:3d5a3d241a5e 694 //
whismanoid 53:3d5a3d241a5e 695 // For 8-bit register size:
whismanoid 53:3d5a3d241a5e 696 //
whismanoid 53:3d5a3d241a5e 697 // SPI 16-bit transfer
whismanoid 53:3d5a3d241a5e 698 //
whismanoid 53:3d5a3d241a5e 699 // SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid 53:3d5a3d241a5e 700 //
whismanoid 53:3d5a3d241a5e 701 // SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 702 //
whismanoid 53:3d5a3d241a5e 703 // For 16-bit register size:
whismanoid 53:3d5a3d241a5e 704 //
whismanoid 53:3d5a3d241a5e 705 // SPI 24-bit or 32-bit transfer
whismanoid 53:3d5a3d241a5e 706 //
whismanoid 53:3d5a3d241a5e 707 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 708 //
whismanoid 53:3d5a3d241a5e 709 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 710 //
whismanoid 53:3d5a3d241a5e 711 // For 24-bit register size:
whismanoid 53:3d5a3d241a5e 712 //
whismanoid 53:3d5a3d241a5e 713 // SPI 32-bit transfer
whismanoid 53:3d5a3d241a5e 714 //
whismanoid 53:3d5a3d241a5e 715 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 716 //
whismanoid 53:3d5a3d241a5e 717 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 718 //
whismanoid 53:3d5a3d241a5e 719 // @return 1 on success; 0 on failure
whismanoid 53:3d5a3d241a5e 720 uint8_t MAX11043::RegWrite(MAX11043_CMD_enum_t commandByte, uint32_t regData)
whismanoid 53:3d5a3d241a5e 721 {
whismanoid 53:3d5a3d241a5e 722
whismanoid 53:3d5a3d241a5e 723 //----------------------------------------
whismanoid 53:3d5a3d241a5e 724 // switch based on register address szie RegSize(commandByte)
whismanoid 57:1c9da8e90737 725 //commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
whismanoid 53:3d5a3d241a5e 726 switch(RegSize(commandByte))
whismanoid 53:3d5a3d241a5e 727 {
whismanoid 53:3d5a3d241a5e 728 case 8: // 8-bit register size
whismanoid 53:3d5a3d241a5e 729 {
whismanoid 53:3d5a3d241a5e 730 // SPI 16-bit transfer
whismanoid 53:3d5a3d241a5e 731 // SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid 53:3d5a3d241a5e 732 // SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 733 int16_t mosiData16 = ((int16_t)commandByte << 8) | ((int16_t)regData & 0xFF);
whismanoid 53:3d5a3d241a5e 734 SPIoutputCS(0);
whismanoid 53:3d5a3d241a5e 735 SPIwrite16bits(mosiData16);
whismanoid 53:3d5a3d241a5e 736 SPIoutputCS(1);
whismanoid 53:3d5a3d241a5e 737 }
whismanoid 53:3d5a3d241a5e 738 break;
whismanoid 53:3d5a3d241a5e 739 case 16: // 16-bit register size
whismanoid 53:3d5a3d241a5e 740 #warning "Not Verified Yet: MAX11043::RegWrite 16-bit SPIreadWrite32bits"
whismanoid 53:3d5a3d241a5e 741 {
whismanoid 53:3d5a3d241a5e 742 // SPI 24-bit or 32-bit transfer
whismanoid 53:3d5a3d241a5e 743 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 744 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 745 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_0000_0000
whismanoid 53:3d5a3d241a5e 746 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 747 int32_t mosiData32 = ((int32_t)commandByte << 24) | (((int32_t)regData & 0xFFFF) << 8);
whismanoid 53:3d5a3d241a5e 748 SPIoutputCS(0);
whismanoid 53:3d5a3d241a5e 749 SPIreadWrite32bits(mosiData32);
whismanoid 53:3d5a3d241a5e 750 SPIoutputCS(1);
whismanoid 53:3d5a3d241a5e 751 }
whismanoid 53:3d5a3d241a5e 752 break;
whismanoid 53:3d5a3d241a5e 753 case 24: // 24-bit register size
whismanoid 53:3d5a3d241a5e 754 {
whismanoid 53:3d5a3d241a5e 755 // SPI 32-bit transfer
whismanoid 53:3d5a3d241a5e 756 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 757 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 53:3d5a3d241a5e 758 int32_t mosiData32 = ((int32_t)commandByte << 24) | ((int32_t)regData & 0x00FFFFFF);
whismanoid 53:3d5a3d241a5e 759 SPIoutputCS(0);
whismanoid 53:3d5a3d241a5e 760 SPIreadWrite32bits(mosiData32);
whismanoid 53:3d5a3d241a5e 761 SPIoutputCS(1);
whismanoid 53:3d5a3d241a5e 762 }
whismanoid 53:3d5a3d241a5e 763 break;
whismanoid 53:3d5a3d241a5e 764 }
whismanoid 53:3d5a3d241a5e 765
whismanoid 53:3d5a3d241a5e 766 //----------------------------------------
whismanoid 53:3d5a3d241a5e 767 // success
whismanoid 53:3d5a3d241a5e 768 return 1;
whismanoid 53:3d5a3d241a5e 769 }
whismanoid 53:3d5a3d241a5e 770
whismanoid 53:3d5a3d241a5e 771 //----------------------------------------
whismanoid 53:3d5a3d241a5e 772 // Read an 8-bit MAX11043 register
whismanoid 53:3d5a3d241a5e 773 //
whismanoid 57:1c9da8e90737 774 // CMDOP_1aaa_aaaa_ReadRegister bit is set 1 indicating a read operation.
whismanoid 53:3d5a3d241a5e 775 //
whismanoid 53:3d5a3d241a5e 776 // MAX11043 register length can be determined by function RegSize.
whismanoid 53:3d5a3d241a5e 777 //
whismanoid 53:3d5a3d241a5e 778 // For 8-bit register size:
whismanoid 53:3d5a3d241a5e 779 //
whismanoid 53:3d5a3d241a5e 780 // SPI 16-bit transfer
whismanoid 53:3d5a3d241a5e 781 //
whismanoid 53:3d5a3d241a5e 782 // SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid 53:3d5a3d241a5e 783 //
whismanoid 53:3d5a3d241a5e 784 // SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid 53:3d5a3d241a5e 785 //
whismanoid 53:3d5a3d241a5e 786 // For 16-bit register size:
whismanoid 53:3d5a3d241a5e 787 //
whismanoid 53:3d5a3d241a5e 788 // SPI 24-bit or 32-bit transfer
whismanoid 53:3d5a3d241a5e 789 //
whismanoid 53:3d5a3d241a5e 790 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid 53:3d5a3d241a5e 791 //
whismanoid 53:3d5a3d241a5e 792 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 793 //
whismanoid 53:3d5a3d241a5e 794 // For 24-bit register size:
whismanoid 53:3d5a3d241a5e 795 //
whismanoid 53:3d5a3d241a5e 796 // SPI 32-bit transfer
whismanoid 53:3d5a3d241a5e 797 //
whismanoid 53:3d5a3d241a5e 798 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 53:3d5a3d241a5e 799 //
whismanoid 53:3d5a3d241a5e 800 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 53:3d5a3d241a5e 801 //
whismanoid 53:3d5a3d241a5e 802 //
whismanoid 53:3d5a3d241a5e 803 // @return 1 on success; 0 on failure
whismanoid 53:3d5a3d241a5e 804 uint8_t MAX11043::RegRead(MAX11043_CMD_enum_t commandByte, uint32_t* ptrRegData)
whismanoid 53:3d5a3d241a5e 805 {
whismanoid 53:3d5a3d241a5e 806
whismanoid 53:3d5a3d241a5e 807 //----------------------------------------
whismanoid 53:3d5a3d241a5e 808 // switch based on register address szie RegSize(regAddress)
whismanoid 57:1c9da8e90737 809 //commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
whismanoid 53:3d5a3d241a5e 810 switch(RegSize(commandByte))
whismanoid 53:3d5a3d241a5e 811 {
whismanoid 53:3d5a3d241a5e 812 case 8: // 8-bit register size
whismanoid 53:3d5a3d241a5e 813 {
whismanoid 60:d1d1eaa90fb7 814 // SPI 8+8 = 16-bit transfer
whismanoid 62:8223a7253c90 815 // 1234 5678 ___[1]_16
whismanoid 53:3d5a3d241a5e 816 // SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid 53:3d5a3d241a5e 817 // SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid 57:1c9da8e90737 818 int16_t mosiData16 = ((CMDOP_0aaa_aa10_ReadRegister | (int16_t)commandByte) << 8) | ((int16_t)0);
whismanoid 53:3d5a3d241a5e 819 SPIoutputCS(0);
whismanoid 53:3d5a3d241a5e 820 int16_t misoData16 = SPIreadWrite16bits(mosiData16);
whismanoid 53:3d5a3d241a5e 821 SPIoutputCS(1);
whismanoid 59:47538bcf6cda 822 if (ptrRegData) { (*ptrRegData) = (misoData16 & 0x00FF); }
whismanoid 59:47538bcf6cda 823 if (commandByte == CMD_0001_1110_d8_Rd07_Status) {
whismanoid 59:47538bcf6cda 824 // TODO1: update status
whismanoid 60:d1d1eaa90fb7 825 status = (misoData16 & 0x00FF);
whismanoid 59:47538bcf6cda 826 }
whismanoid 53:3d5a3d241a5e 827 }
whismanoid 53:3d5a3d241a5e 828 break;
whismanoid 53:3d5a3d241a5e 829 case 16: // 16-bit register size
whismanoid 53:3d5a3d241a5e 830 #warning "Not Verified Yet: MAX11043::RegRead 16-bit SPIreadWrite32bits"
whismanoid 53:3d5a3d241a5e 831 {
whismanoid 60:d1d1eaa90fb7 832 // SPI 8+16 = 24-bit transfer
whismanoid 62:8223a7253c90 833 // 1234 5678 ___[1]_16 ___[2]_24
whismanoid 60:d1d1eaa90fb7 834 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 835 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 57:1c9da8e90737 836 int32_t mosiData32 = ((CMDOP_0aaa_aa10_ReadRegister | (int32_t)commandByte) << 24);
whismanoid 53:3d5a3d241a5e 837 SPIoutputCS(0);
whismanoid 53:3d5a3d241a5e 838 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
whismanoid 53:3d5a3d241a5e 839 SPIoutputCS(1);
whismanoid 59:47538bcf6cda 840 if (ptrRegData) { (*ptrRegData) = ((misoData32 >> 8) & 0x00FFFF); }
whismanoid 59:47538bcf6cda 841 if (commandByte == CMD_0010_0010_d16_Rd08_Configuration) {
whismanoid 59:47538bcf6cda 842 // TODO1: update config
whismanoid 60:d1d1eaa90fb7 843 config = ((misoData32 >> 8) & 0x00FFFF);
whismanoid 59:47538bcf6cda 844 }
whismanoid 59:47538bcf6cda 845 if (commandByte == CMD_0000_0010_d16o8_Rd00_ADCa) {
whismanoid 59:47538bcf6cda 846 // TODO1: update adca
whismanoid 60:d1d1eaa90fb7 847 adca = ((misoData32 >> 8) & 0x00FFFF);
whismanoid 59:47538bcf6cda 848 }
whismanoid 59:47538bcf6cda 849 if (commandByte == CMD_0000_0110_d16o8_Rd01_ADCb) {
whismanoid 59:47538bcf6cda 850 // TODO1: update adcb
whismanoid 60:d1d1eaa90fb7 851 adcb = ((misoData32 >> 8) & 0x00FFFF);
whismanoid 59:47538bcf6cda 852 }
whismanoid 59:47538bcf6cda 853 if (commandByte == CMD_0000_1010_d16o8_Rd02_ADCc) {
whismanoid 59:47538bcf6cda 854 // TODO1: update adcc
whismanoid 60:d1d1eaa90fb7 855 adcc = ((misoData32 >> 8) & 0x00FFFF);
whismanoid 59:47538bcf6cda 856 }
whismanoid 59:47538bcf6cda 857 if (commandByte == CMD_0000_1110_d16o8_Rd03_ADCd) {
whismanoid 59:47538bcf6cda 858 // TODO1: update adcd
whismanoid 60:d1d1eaa90fb7 859 adcd = ((misoData32 >> 8) & 0x00FFFF);
whismanoid 59:47538bcf6cda 860 }
whismanoid 53:3d5a3d241a5e 861 }
whismanoid 53:3d5a3d241a5e 862 break;
whismanoid 53:3d5a3d241a5e 863 case 24: // 24-bit register size
whismanoid 53:3d5a3d241a5e 864 {
whismanoid 60:d1d1eaa90fb7 865 // SPI 8+24 = 32-bit transfer
whismanoid 62:8223a7253c90 866 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32
whismanoid 53:3d5a3d241a5e 867 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 53:3d5a3d241a5e 868 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 57:1c9da8e90737 869 int32_t mosiData32 = ((CMDOP_0aaa_aa10_ReadRegister | (int32_t)commandByte) << 24);
whismanoid 53:3d5a3d241a5e 870 SPIoutputCS(0);
whismanoid 53:3d5a3d241a5e 871 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
whismanoid 53:3d5a3d241a5e 872 SPIoutputCS(1);
whismanoid 59:47538bcf6cda 873 if (ptrRegData) { (*ptrRegData) = (misoData32 & 0x00FFFFFF); }
whismanoid 59:47538bcf6cda 874 if (commandByte == CMD_0000_0010_d16o8_Rd00_ADCa) {
whismanoid 59:47538bcf6cda 875 // TODO1: update adca
whismanoid 60:d1d1eaa90fb7 876 adca = (misoData32 & 0x00FFFFFF);
whismanoid 59:47538bcf6cda 877 }
whismanoid 59:47538bcf6cda 878 if (commandByte == CMD_0000_0110_d16o8_Rd01_ADCb) {
whismanoid 59:47538bcf6cda 879 // TODO1: update adcb
whismanoid 60:d1d1eaa90fb7 880 adcb = (misoData32 & 0x00FFFFFF);
whismanoid 59:47538bcf6cda 881 }
whismanoid 59:47538bcf6cda 882 if (commandByte == CMD_0000_1010_d16o8_Rd02_ADCc) {
whismanoid 59:47538bcf6cda 883 // TODO1: update adcc
whismanoid 60:d1d1eaa90fb7 884 adcc = (misoData32 & 0x00FFFFFF);
whismanoid 59:47538bcf6cda 885 }
whismanoid 59:47538bcf6cda 886 if (commandByte == CMD_0000_1110_d16o8_Rd03_ADCd) {
whismanoid 59:47538bcf6cda 887 // TODO1: update adcd
whismanoid 60:d1d1eaa90fb7 888 adcd = (misoData32 & 0x00FFFFFF);
whismanoid 59:47538bcf6cda 889 }
whismanoid 59:47538bcf6cda 890 }
whismanoid 59:47538bcf6cda 891 break;
whismanoid 59:47538bcf6cda 892 case 32: // 32-bit register size CMD_0001_0010_d24_d24_Rd04_ADCab, CMD_0001_0110_d24_d24_Rd05_ADCcd
whismanoid 59:47538bcf6cda 893 //
whismanoid 59:47538bcf6cda 894 #warning "Not Implemented Yet: MAX11043::RegRead 32-bit CMD_0001_0010_d24_d24_Rd04_ADCab"
whismanoid 59:47538bcf6cda 895 // TODO: support long SPI read CMD_0001_0010_d24_d24_Rd04_ADCab
whismanoid 59:47538bcf6cda 896 // %SW 0x12 (0 0) (0 0) -- for 16-bit read A,B
whismanoid 59:47538bcf6cda 897 // update adca, adcb
whismanoid 59:47538bcf6cda 898 //
whismanoid 59:47538bcf6cda 899 // TODO: support long SPI read CMD_0001_0110_d24_d24_Rd05_ADCcd
whismanoid 59:47538bcf6cda 900 // %SW 0x16 (0 0) (0 0) -- for 16-bit read C,D
whismanoid 59:47538bcf6cda 901 // update adcc, adcd
whismanoid 59:47538bcf6cda 902 //
whismanoid 59:47538bcf6cda 903 {
whismanoid 60:d1d1eaa90fb7 904 // SPI 8+32 = 40-bit transfer
whismanoid 62:8223a7253c90 905 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40
whismanoid 60:d1d1eaa90fb7 906 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 907 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 59:47538bcf6cda 908 int32_t mosiData32 = ((CMDOP_0aaa_aa10_ReadRegister | (int32_t)commandByte) << 24);
whismanoid 62:8223a7253c90 909 size_t byteCount = 1 + (2 * 2);
whismanoid 62:8223a7253c90 910 uint8_t mosiData[5];
whismanoid 62:8223a7253c90 911 uint8_t misoData[5];
whismanoid 62:8223a7253c90 912 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 62:8223a7253c90 913 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 914 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 915 mosiData[3] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 916 mosiData[4] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 917 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 62:8223a7253c90 918 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 62:8223a7253c90 919 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 8) | misoData[2]; }
whismanoid 59:47538bcf6cda 920 if (commandByte == CMD_0001_0010_d24_d24_Rd04_ADCab) {
whismanoid 59:47538bcf6cda 921 // TODO1: update adca
whismanoid 62:8223a7253c90 922 adca = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 923 // TODO1: update adcb
whismanoid 62:8223a7253c90 924 adcb = (misoData[3] << 8) | misoData[4];
whismanoid 59:47538bcf6cda 925 }
whismanoid 59:47538bcf6cda 926 if (commandByte == CMD_0001_0110_d24_d24_Rd05_ADCcd) {
whismanoid 59:47538bcf6cda 927 // TODO1: update adcc
whismanoid 62:8223a7253c90 928 adcc = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 929 // TODO1: update adcd
whismanoid 62:8223a7253c90 930 adcd = (misoData[3] << 8) | misoData[4];
whismanoid 59:47538bcf6cda 931 }
whismanoid 59:47538bcf6cda 932 }
whismanoid 59:47538bcf6cda 933 break;
whismanoid 59:47538bcf6cda 934 case 48: // 48-bit register size CMD_0001_0010_d24_d24_Rd04_ADCab, CMD_0001_0110_d24_d24_Rd05_ADCcd
whismanoid 59:47538bcf6cda 935 //
whismanoid 59:47538bcf6cda 936 #warning "Not Implemented Yet: MAX11043::RegRead 48-bit CMD_0001_0010_d24_d24_Rd04_ADCab"
whismanoid 59:47538bcf6cda 937 // TODO: support long SPI read CMD_0001_0010_d24_d24_Rd04_ADCab
whismanoid 59:47538bcf6cda 938 // %SW 0x12 (0 0 0) (0 0 0) -- for 24-bit read A,B
whismanoid 59:47538bcf6cda 939 // update adca, adcb
whismanoid 59:47538bcf6cda 940 //
whismanoid 59:47538bcf6cda 941 // TODO: support long SPI read CMD_0001_0110_d24_d24_Rd05_ADCcd
whismanoid 59:47538bcf6cda 942 // %SW 0x16 (0 0 0) (0 0 0) -- for 24-bit read C,D
whismanoid 59:47538bcf6cda 943 // update adcc, adcd
whismanoid 59:47538bcf6cda 944 //
whismanoid 59:47538bcf6cda 945 {
whismanoid 60:d1d1eaa90fb7 946 // SPI 8+48 = 56-bit transfer
whismanoid 62:8223a7253c90 947 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40 ___[5]_48 ___[6]_56
whismanoid 60:d1d1eaa90fb7 948 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 949 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 62:8223a7253c90 950 size_t byteCount = 1 + (3 * 2);
whismanoid 62:8223a7253c90 951 uint8_t mosiData[7];
whismanoid 62:8223a7253c90 952 uint8_t misoData[7];
whismanoid 62:8223a7253c90 953 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 62:8223a7253c90 954 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 955 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 956 mosiData[3] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 957 mosiData[4] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 958 mosiData[5] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 959 mosiData[6] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 960 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 62:8223a7253c90 961 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 62:8223a7253c90 962 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3]; }
whismanoid 59:47538bcf6cda 963 if (commandByte == CMD_0001_0010_d24_d24_Rd04_ADCab) {
whismanoid 59:47538bcf6cda 964 // TODO1: update adca
whismanoid 62:8223a7253c90 965 adca = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 966 // TODO1: update adcb
whismanoid 62:8223a7253c90 967 adcb = (misoData[4] << 16) | (misoData[5] << 8) | misoData[6];
whismanoid 59:47538bcf6cda 968 }
whismanoid 59:47538bcf6cda 969 if (commandByte == CMD_0001_0110_d24_d24_Rd05_ADCcd) {
whismanoid 59:47538bcf6cda 970 // TODO1: update adcc
whismanoid 62:8223a7253c90 971 adcc = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 972 // TODO1: update adcd
whismanoid 62:8223a7253c90 973 adcd = (misoData[4] << 16) | (misoData[5] << 8) | misoData[6];
whismanoid 59:47538bcf6cda 974 }
whismanoid 59:47538bcf6cda 975 }
whismanoid 59:47538bcf6cda 976 break;
whismanoid 59:47538bcf6cda 977 case 64: // 64-bit register size CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd
whismanoid 59:47538bcf6cda 978 //
whismanoid 59:47538bcf6cda 979 #warning "Not Implemented Yet: MAX11043::RegRead 64-bit CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd"
whismanoid 59:47538bcf6cda 980 // TODO: support long SPI read CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd
whismanoid 59:47538bcf6cda 981 // %SW 0x1A (0 0) (0 0) (0 0) (0 0) -- for 16-bit read A,B,C,D
whismanoid 59:47538bcf6cda 982 // update adca, adcb, adcc, adcd
whismanoid 59:47538bcf6cda 983 //
whismanoid 59:47538bcf6cda 984 {
whismanoid 60:d1d1eaa90fb7 985 // SPI 8+64 = 72-bit transfer
whismanoid 62:8223a7253c90 986 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40 ___[5]_48 ___[6]_56 ___[7]_64 ___[8]_72
whismanoid 60:d1d1eaa90fb7 987 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 988 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 62:8223a7253c90 989 size_t byteCount = 1 + (2 * 4);
whismanoid 62:8223a7253c90 990 uint8_t mosiData[9];
whismanoid 62:8223a7253c90 991 uint8_t misoData[9];
whismanoid 62:8223a7253c90 992 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 62:8223a7253c90 993 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 994 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 995 mosiData[3] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 996 mosiData[4] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 997 mosiData[5] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 998 mosiData[6] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 999 mosiData[7] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1000 mosiData[8] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1001 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 62:8223a7253c90 1002 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 62:8223a7253c90 1003 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 8) | misoData[2]; }
whismanoid 59:47538bcf6cda 1004 if (commandByte == CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd) {
whismanoid 59:47538bcf6cda 1005 // TODO1: update adca
whismanoid 62:8223a7253c90 1006 adca = (misoData[1] << 8) | misoData[2];
whismanoid 59:47538bcf6cda 1007 // TODO1: update adcb
whismanoid 62:8223a7253c90 1008 adcb = (misoData[3] << 8) | misoData[4];
whismanoid 59:47538bcf6cda 1009 // TODO1: update adcc
whismanoid 62:8223a7253c90 1010 adcc = (misoData[5] << 8) | misoData[6];
whismanoid 59:47538bcf6cda 1011 // TODO1: update adcd
whismanoid 62:8223a7253c90 1012 adcd = (misoData[7] << 8) | misoData[8];
whismanoid 59:47538bcf6cda 1013 }
whismanoid 59:47538bcf6cda 1014 }
whismanoid 59:47538bcf6cda 1015 break;
whismanoid 59:47538bcf6cda 1016 case 96: // 96-bit register size CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd
whismanoid 59:47538bcf6cda 1017 //
whismanoid 59:47538bcf6cda 1018 #warning "Not Implemented Yet: MAX11043::RegRead 96-bit CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd"
whismanoid 59:47538bcf6cda 1019 // TODO: support long SPI read CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd
whismanoid 59:47538bcf6cda 1020 // %SW 0x1A (0 0 0) (0 0 0) (0 0 0) (0 0 0) -- for 24-bit read A,B,C,D
whismanoid 59:47538bcf6cda 1021 // update adca, adcb, adcc, adcd
whismanoid 59:47538bcf6cda 1022 //
whismanoid 59:47538bcf6cda 1023 {
whismanoid 60:d1d1eaa90fb7 1024 // SPI 8+96 = 104-bit transfer
whismanoid 62:8223a7253c90 1025 // 1234 5678 ___[1]_16 ___[2]_24 ___[3]_32 ___[4]_40 ___[5]_48 ___[6]_56 ___[7]_64 ___[8]_72 ___[9]_80 __[10]_88 __[11]_96 __[12]104
whismanoid 60:d1d1eaa90fb7 1026 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000 ... _0000
whismanoid 60:d1d1eaa90fb7 1027 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd_dddd ... _xxxx
whismanoid 62:8223a7253c90 1028 size_t byteCount = 1 + (3 * 4);
whismanoid 62:8223a7253c90 1029 uint8_t mosiData[13];
whismanoid 62:8223a7253c90 1030 uint8_t misoData[13];
whismanoid 62:8223a7253c90 1031 mosiData[0] = CMDOP_0aaa_aa10_ReadRegister | commandByte;
whismanoid 62:8223a7253c90 1032 mosiData[1] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1033 mosiData[2] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1034 mosiData[3] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1035 mosiData[4] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1036 mosiData[5] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1037 mosiData[6] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1038 mosiData[7] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1039 mosiData[8] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1040 mosiData[9] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1041 mosiData[10] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1042 mosiData[11] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1043 mosiData[12] = 0; // CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 62:8223a7253c90 1044 // SPIreadWriteWithLowCS(size_t byteCount, uint8_t mosiData[], uint8_t misoData[]);
whismanoid 62:8223a7253c90 1045 SPIreadWriteWithLowCS(byteCount, mosiData, misoData);
whismanoid 62:8223a7253c90 1046 if (ptrRegData) { (*ptrRegData) = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3]; }
whismanoid 59:47538bcf6cda 1047 if (commandByte == CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd) {
whismanoid 59:47538bcf6cda 1048 // TODO1: update adca
whismanoid 62:8223a7253c90 1049 adca = (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 59:47538bcf6cda 1050 // TODO1: update adcb
whismanoid 62:8223a7253c90 1051 adcb = (misoData[4] << 16) | (misoData[5] << 8) | misoData[6];
whismanoid 59:47538bcf6cda 1052 // TODO1: update adcc
whismanoid 62:8223a7253c90 1053 adcc = (misoData[7] << 16) | (misoData[8] << 8) | misoData[9];
whismanoid 59:47538bcf6cda 1054 // TODO1: update adcd
whismanoid 62:8223a7253c90 1055 adcd = (misoData[10] << 16) | (misoData[11] << 8) | misoData[12];
whismanoid 59:47538bcf6cda 1056 }
whismanoid 53:3d5a3d241a5e 1057 }
whismanoid 53:3d5a3d241a5e 1058 break;
whismanoid 53:3d5a3d241a5e 1059 }
whismanoid 53:3d5a3d241a5e 1060
whismanoid 53:3d5a3d241a5e 1061 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1062 // success
whismanoid 53:3d5a3d241a5e 1063 return 1;
whismanoid 53:3d5a3d241a5e 1064 }
whismanoid 53:3d5a3d241a5e 1065
whismanoid 53:3d5a3d241a5e 1066 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1067 // Return the size of a MAX11043 register
whismanoid 53:3d5a3d241a5e 1068 //
whismanoid 53:3d5a3d241a5e 1069 // @return 8 for 8-bit, 16 for 16-bit, 24 for 24-bit, else 0 for undefined register size
whismanoid 53:3d5a3d241a5e 1070 uint8_t MAX11043::RegSize(MAX11043_CMD_enum_t commandByte)
whismanoid 53:3d5a3d241a5e 1071 {
whismanoid 53:3d5a3d241a5e 1072
whismanoid 53:3d5a3d241a5e 1073 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1074 // switch based on register address value regAddress
whismanoid 57:1c9da8e90737 1075 // commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
whismanoid 53:3d5a3d241a5e 1076 switch(commandByte)
whismanoid 53:3d5a3d241a5e 1077 {
whismanoid 53:3d5a3d241a5e 1078 default:
whismanoid 57:1c9da8e90737 1079 // case CMDOP_0aaa_aa00_WriteRegister:
whismanoid 57:1c9da8e90737 1080 // case CMDOP_0aaa_aa10_ReadRegister:
whismanoid 57:1c9da8e90737 1081 // case CMDOP_1111_1111_NoOperationMOSIidleHigh:
whismanoid 53:3d5a3d241a5e 1082 return 0; // undefined register size
whismanoid 53:3d5a3d241a5e 1083 case CMD_0001_1110_d8_Rd07_Status:
whismanoid 53:3d5a3d241a5e 1084 case CMD_0101_0100_d8_Wr15_FilterCAddress:
whismanoid 53:3d5a3d241a5e 1085 case CMD_0101_0110_d8_Rd15_FilterCAddress:
whismanoid 53:3d5a3d241a5e 1086 case CMD_0110_0000_d8_Wr18_FlashMode:
whismanoid 53:3d5a3d241a5e 1087 case CMD_0110_0010_d8_Rd18_FlashMode:
whismanoid 53:3d5a3d241a5e 1088 return 8; // 8-bit register size
whismanoid 53:3d5a3d241a5e 1089 case CMD_0010_0000_d16_Wr08_Configuration:
whismanoid 53:3d5a3d241a5e 1090 case CMD_0010_0010_d16_Rd08_Configuration:
whismanoid 53:3d5a3d241a5e 1091 case CMD_0010_0100_d16_Wr09_DAC:
whismanoid 53:3d5a3d241a5e 1092 case CMD_0010_0110_d16_Rd09_DAC:
whismanoid 53:3d5a3d241a5e 1093 case CMD_0010_1000_d16_Wr0A_DACStep:
whismanoid 53:3d5a3d241a5e 1094 case CMD_0010_1010_d16_Rd0A_DACStep:
whismanoid 53:3d5a3d241a5e 1095 case CMD_0010_1100_d16_Wr0B_DACHDACL:
whismanoid 53:3d5a3d241a5e 1096 case CMD_0010_1110_d16_Rd0B_DACHDACL:
whismanoid 53:3d5a3d241a5e 1097 case CMD_0011_0000_d16_Wr0C_ConfigA:
whismanoid 53:3d5a3d241a5e 1098 case CMD_0011_0010_d16_Rd0C_ConfigA:
whismanoid 53:3d5a3d241a5e 1099 case CMD_0011_0100_d16_Wr0D_ConfigB:
whismanoid 53:3d5a3d241a5e 1100 case CMD_0011_0110_d16_Rd0D_ConfigB:
whismanoid 53:3d5a3d241a5e 1101 case CMD_0011_1000_d16_Wr0E_ConfigC:
whismanoid 53:3d5a3d241a5e 1102 case CMD_0011_1010_d16_Rd0E_ConfigC:
whismanoid 53:3d5a3d241a5e 1103 case CMD_0011_1100_d16_Wr0F_ConfigD:
whismanoid 53:3d5a3d241a5e 1104 case CMD_0011_1110_d16_Rd0F_ConfigD:
whismanoid 53:3d5a3d241a5e 1105 case CMD_0100_0000_d16_Wr10_Reference:
whismanoid 53:3d5a3d241a5e 1106 case CMD_0100_0010_d16_Rd10_Reference:
whismanoid 53:3d5a3d241a5e 1107 case CMD_0100_0100_d16_Wr11_AGain:
whismanoid 53:3d5a3d241a5e 1108 case CMD_0100_0110_d16_Rd11_AGain:
whismanoid 53:3d5a3d241a5e 1109 case CMD_0100_1000_d16_Wr12_BGain:
whismanoid 53:3d5a3d241a5e 1110 case CMD_0100_1010_d16_Rd12_BGain:
whismanoid 53:3d5a3d241a5e 1111 case CMD_0100_1100_d16_Wr13_CGain:
whismanoid 53:3d5a3d241a5e 1112 case CMD_0100_1110_d16_Rd13_CGain:
whismanoid 53:3d5a3d241a5e 1113 case CMD_0101_0000_d16_Wr14_DGain:
whismanoid 53:3d5a3d241a5e 1114 case CMD_0101_0010_d16_Rd14_DGain:
whismanoid 53:3d5a3d241a5e 1115 case CMD_0110_0100_d16_Wr19_FlashAddr:
whismanoid 53:3d5a3d241a5e 1116 case CMD_0110_0110_d16_Rd19_FlashAddr:
whismanoid 53:3d5a3d241a5e 1117 case CMD_0110_1000_d16_Wr1A_FlashDataIn:
whismanoid 53:3d5a3d241a5e 1118 case CMD_0110_1010_d16_Rd1A_FlashDataIn:
whismanoid 53:3d5a3d241a5e 1119 case CMD_0110_1110_d16_Rd1B_FlashDataOut:
whismanoid 53:3d5a3d241a5e 1120 return 16; // 16-bit register size
whismanoid 59:47538bcf6cda 1121 case CMD_0000_0010_d16o8_Rd00_ADCa:
whismanoid 59:47538bcf6cda 1122 case CMD_0000_0110_d16o8_Rd01_ADCb:
whismanoid 59:47538bcf6cda 1123 case CMD_0000_1010_d16o8_Rd02_ADCc:
whismanoid 59:47538bcf6cda 1124 case CMD_0000_1110_d16o8_Rd03_ADCd:
whismanoid 59:47538bcf6cda 1125 if (config & CONFIG_xxxx_xxxx_xx1x_xxxx_24BIT)
whismanoid 59:47538bcf6cda 1126 {
whismanoid 59:47538bcf6cda 1127 // %SW 0x02 (0 0 0) -- for 24-bit read
whismanoid 59:47538bcf6cda 1128 return 24; // 24-bit register size
whismanoid 59:47538bcf6cda 1129 }
whismanoid 59:47538bcf6cda 1130 // %SW 0x02 (0 0) -- for 16-bit read
whismanoid 59:47538bcf6cda 1131 //
whismanoid 59:47538bcf6cda 1132 return 16; // 16-bit register size
whismanoid 53:3d5a3d241a5e 1133 case CMD_0001_0010_d24_d24_Rd04_ADCab:
whismanoid 53:3d5a3d241a5e 1134 case CMD_0001_0110_d24_d24_Rd05_ADCcd:
whismanoid 59:47538bcf6cda 1135 //
whismanoid 59:47538bcf6cda 1136 // TODO: support long SPI read
whismanoid 59:47538bcf6cda 1137 if (config & CONFIG_xxxx_xxxx_xx1x_xxxx_24BIT)
whismanoid 59:47538bcf6cda 1138 {
whismanoid 59:47538bcf6cda 1139 // %SW 0x12 (0 0 0) (0 0 0) -- for 24-bit read A,B
whismanoid 59:47538bcf6cda 1140 // %SW 0x16 (0 0 0) (0 0 0) -- for 24-bit read C,D
whismanoid 59:47538bcf6cda 1141 return 48; // 48-bit register size: 2*(24)
whismanoid 59:47538bcf6cda 1142 }
whismanoid 59:47538bcf6cda 1143 // %SW 0x12 (0 0) (0 0) -- for 16-bit read A,B
whismanoid 59:47538bcf6cda 1144 // %SW 0x16 (0 0) (0 0) -- for 16-bit read C,D
whismanoid 59:47538bcf6cda 1145 //
whismanoid 59:47538bcf6cda 1146 return 32; // 32-bit register size: 2*(16)
whismanoid 53:3d5a3d241a5e 1147 case CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd:
whismanoid 59:47538bcf6cda 1148 //
whismanoid 59:47538bcf6cda 1149 // TODO: support long SPI read
whismanoid 59:47538bcf6cda 1150 if (config & CONFIG_xxxx_xxxx_xx1x_xxxx_24BIT)
whismanoid 59:47538bcf6cda 1151 {
whismanoid 59:47538bcf6cda 1152 // %SW 0x1A (0 0 0) (0 0 0) (0 0 0) (0 0 0) -- for 24-bit read A,B,C,D
whismanoid 59:47538bcf6cda 1153 return 96; // 96-bit register size: 4*(24)
whismanoid 59:47538bcf6cda 1154 }
whismanoid 59:47538bcf6cda 1155 // %SW 0x1A (0 0) (0 0) (0 0) (0 0) -- for 16-bit read A,B,C,D
whismanoid 59:47538bcf6cda 1156 //
whismanoid 59:47538bcf6cda 1157 return 64; // 64-bit register size: 4*(16)
whismanoid 53:3d5a3d241a5e 1158 case CMD_0101_1000_d32_Wr16_FilterCDataOut:
whismanoid 53:3d5a3d241a5e 1159 case CMD_0101_1010_d32_Rd16_FilterCDataOut:
whismanoid 53:3d5a3d241a5e 1160 case CMD_0101_1100_d32_Wr17_FilterCDataIn:
whismanoid 53:3d5a3d241a5e 1161 case CMD_0101_1110_d32_Rd17_FilterCDataIn:
whismanoid 53:3d5a3d241a5e 1162 return 32; // 32-bit register size
whismanoid 53:3d5a3d241a5e 1163 }
whismanoid 53:3d5a3d241a5e 1164 }
whismanoid 53:3d5a3d241a5e 1165
whismanoid 53:3d5a3d241a5e 1166 //----------------------------------------
whismanoid 57:1c9da8e90737 1167 // Decode operation from commandByte
whismanoid 57:1c9da8e90737 1168 //
whismanoid 57:1c9da8e90737 1169 // @return operation such as idle, read register, write register, etc.
whismanoid 57:1c9da8e90737 1170 MAX11043::MAX11043_CMDOP_enum_t MAX11043::DecodeCommand(MAX11043_CMD_enum_t commandByte)
whismanoid 57:1c9da8e90737 1171 {
whismanoid 57:1c9da8e90737 1172
whismanoid 57:1c9da8e90737 1173 //----------------------------------------
whismanoid 57:1c9da8e90737 1174 // decode operation from command byte
whismanoid 57:1c9da8e90737 1175 switch (commandByte & 0x83)
whismanoid 57:1c9da8e90737 1176 {
whismanoid 57:1c9da8e90737 1177 case CMDOP_0aaa_aa10_ReadRegister:
whismanoid 57:1c9da8e90737 1178 return CMDOP_0aaa_aa10_ReadRegister;
whismanoid 57:1c9da8e90737 1179 case CMDOP_0aaa_aa00_WriteRegister:
whismanoid 57:1c9da8e90737 1180 return CMDOP_0aaa_aa00_WriteRegister;
whismanoid 57:1c9da8e90737 1181 default:
whismanoid 57:1c9da8e90737 1182 return CMDOP_1111_1111_NoOperationMOSIidleHigh;
whismanoid 57:1c9da8e90737 1183 }
whismanoid 57:1c9da8e90737 1184 }
whismanoid 57:1c9da8e90737 1185
whismanoid 57:1c9da8e90737 1186 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1187 // Return the address field of a MAX11043 register
whismanoid 53:3d5a3d241a5e 1188 //
whismanoid 53:3d5a3d241a5e 1189 // @return register address field as given in datasheet
whismanoid 53:3d5a3d241a5e 1190 uint8_t MAX11043::RegAddrOfCommand(MAX11043_CMD_enum_t commandByte)
whismanoid 53:3d5a3d241a5e 1191 {
whismanoid 53:3d5a3d241a5e 1192
whismanoid 53:3d5a3d241a5e 1193 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1194 // extract register address value from command byte
whismanoid 57:1c9da8e90737 1195 return (uint8_t)((commandByte &~ 0x83) >> 2); // CMDOP_0aaa_aa10_ReadRegister
whismanoid 53:3d5a3d241a5e 1196 }
whismanoid 53:3d5a3d241a5e 1197
whismanoid 53:3d5a3d241a5e 1198 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1199 // Test whether a command byte is a register read command
whismanoid 53:3d5a3d241a5e 1200 //
whismanoid 53:3d5a3d241a5e 1201 // @return true if command byte is a register read command
whismanoid 53:3d5a3d241a5e 1202 uint8_t MAX11043::IsRegReadCommand(MAX11043_CMD_enum_t commandByte)
whismanoid 53:3d5a3d241a5e 1203 {
whismanoid 53:3d5a3d241a5e 1204
whismanoid 53:3d5a3d241a5e 1205 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1206 // Test whether a command byte is a register read command
whismanoid 57:1c9da8e90737 1207 return (commandByte &~ 0x02) ? 1 : 0; // CMDOP_0aaa_aa10_ReadRegister
whismanoid 53:3d5a3d241a5e 1208 }
whismanoid 53:3d5a3d241a5e 1209
whismanoid 53:3d5a3d241a5e 1210 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1211 // Return the name of a MAX11043 register
whismanoid 53:3d5a3d241a5e 1212 //
whismanoid 53:3d5a3d241a5e 1213 // @return null-terminated constant C string containing register name or empty string
whismanoid 53:3d5a3d241a5e 1214 const char* MAX11043::RegName(MAX11043_CMD_enum_t commandByte)
whismanoid 53:3d5a3d241a5e 1215 {
whismanoid 53:3d5a3d241a5e 1216
whismanoid 53:3d5a3d241a5e 1217 //----------------------------------------
whismanoid 53:3d5a3d241a5e 1218 // switch based on register address value regAddress
whismanoid 57:1c9da8e90737 1219 // commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
whismanoid 53:3d5a3d241a5e 1220 switch(commandByte)
whismanoid 53:3d5a3d241a5e 1221 {
whismanoid 53:3d5a3d241a5e 1222 default:
whismanoid 53:3d5a3d241a5e 1223 return ""; // undefined register
whismanoid 57:1c9da8e90737 1224 // case CMDOP_0aaa_aa00_WriteRegister: return "_______";
whismanoid 57:1c9da8e90737 1225 // case CMDOP_0aaa_aa10_ReadRegister: return "_______";
whismanoid 57:1c9da8e90737 1226 // case CMDOP_1111_1111_NoOperationMOSIidleHigh: return "_______";
whismanoid 59:47538bcf6cda 1227 case CMD_0000_0010_d16o8_Rd00_ADCa: return "ADCa";
whismanoid 59:47538bcf6cda 1228 case CMD_0000_0110_d16o8_Rd01_ADCb: return "ADCb";
whismanoid 59:47538bcf6cda 1229 case CMD_0000_1010_d16o8_Rd02_ADCc: return "ADCc";
whismanoid 59:47538bcf6cda 1230 case CMD_0000_1110_d16o8_Rd03_ADCd: return "ADCd";
whismanoid 53:3d5a3d241a5e 1231 case CMD_0001_0010_d24_d24_Rd04_ADCab: return "ADCab";
whismanoid 53:3d5a3d241a5e 1232 case CMD_0001_0110_d24_d24_Rd05_ADCcd: return "ADCcd";
whismanoid 53:3d5a3d241a5e 1233 case CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd: return "ADCabcd";
whismanoid 53:3d5a3d241a5e 1234 case CMD_0001_1110_d8_Rd07_Status: return "Status";
whismanoid 53:3d5a3d241a5e 1235 case CMD_0010_0000_d16_Wr08_Configuration: return "Configuration";
whismanoid 53:3d5a3d241a5e 1236 case CMD_0010_0010_d16_Rd08_Configuration: return "Configuration";
whismanoid 53:3d5a3d241a5e 1237 case CMD_0010_0100_d16_Wr09_DAC: return "DAC";
whismanoid 53:3d5a3d241a5e 1238 case CMD_0010_0110_d16_Rd09_DAC: return "DAC";
whismanoid 53:3d5a3d241a5e 1239 case CMD_0010_1000_d16_Wr0A_DACStep: return "DACStep";
whismanoid 53:3d5a3d241a5e 1240 case CMD_0010_1010_d16_Rd0A_DACStep: return "DACStep";
whismanoid 53:3d5a3d241a5e 1241 case CMD_0010_1100_d16_Wr0B_DACHDACL: return "DACHDACL";
whismanoid 53:3d5a3d241a5e 1242 case CMD_0010_1110_d16_Rd0B_DACHDACL: return "DACHDACL";
whismanoid 53:3d5a3d241a5e 1243 case CMD_0011_0000_d16_Wr0C_ConfigA: return "ConfigA";
whismanoid 53:3d5a3d241a5e 1244 case CMD_0011_0010_d16_Rd0C_ConfigA: return "ConfigA";
whismanoid 53:3d5a3d241a5e 1245 case CMD_0011_0100_d16_Wr0D_ConfigB: return "ConfigB";
whismanoid 53:3d5a3d241a5e 1246 case CMD_0011_0110_d16_Rd0D_ConfigB: return "ConfigB";
whismanoid 53:3d5a3d241a5e 1247 case CMD_0011_1000_d16_Wr0E_ConfigC: return "ConfigC";
whismanoid 53:3d5a3d241a5e 1248 case CMD_0011_1010_d16_Rd0E_ConfigC: return "ConfigC";
whismanoid 53:3d5a3d241a5e 1249 case CMD_0011_1100_d16_Wr0F_ConfigD: return "ConfigD";
whismanoid 53:3d5a3d241a5e 1250 case CMD_0011_1110_d16_Rd0F_ConfigD: return "ConfigD";
whismanoid 53:3d5a3d241a5e 1251 case CMD_0100_0000_d16_Wr10_Reference: return "Reference";
whismanoid 53:3d5a3d241a5e 1252 case CMD_0100_0010_d16_Rd10_Reference: return "Reference";
whismanoid 53:3d5a3d241a5e 1253 case CMD_0100_0100_d16_Wr11_AGain: return "AGain";
whismanoid 53:3d5a3d241a5e 1254 case CMD_0100_0110_d16_Rd11_AGain: return "AGain";
whismanoid 53:3d5a3d241a5e 1255 case CMD_0100_1000_d16_Wr12_BGain: return "BGain";
whismanoid 53:3d5a3d241a5e 1256 case CMD_0100_1010_d16_Rd12_BGain: return "BGain";
whismanoid 53:3d5a3d241a5e 1257 case CMD_0100_1100_d16_Wr13_CGain: return "CGain";
whismanoid 53:3d5a3d241a5e 1258 case CMD_0100_1110_d16_Rd13_CGain: return "CGain";
whismanoid 53:3d5a3d241a5e 1259 case CMD_0101_0000_d16_Wr14_DGain: return "DGain";
whismanoid 53:3d5a3d241a5e 1260 case CMD_0101_0010_d16_Rd14_DGain: return "DGain";
whismanoid 53:3d5a3d241a5e 1261 case CMD_0101_0100_d8_Wr15_FilterCAddress: return "FilterCAddress";
whismanoid 53:3d5a3d241a5e 1262 case CMD_0101_0110_d8_Rd15_FilterCAddress: return "FilterCAddress";
whismanoid 53:3d5a3d241a5e 1263 case CMD_0101_1000_d32_Wr16_FilterCDataOut: return "FilterCDataOut";
whismanoid 53:3d5a3d241a5e 1264 case CMD_0101_1010_d32_Rd16_FilterCDataOut: return "FilterCDataOut";
whismanoid 53:3d5a3d241a5e 1265 case CMD_0101_1100_d32_Wr17_FilterCDataIn: return "FilterCDataIn";
whismanoid 53:3d5a3d241a5e 1266 case CMD_0101_1110_d32_Rd17_FilterCDataIn: return "FilterCDataIn";
whismanoid 53:3d5a3d241a5e 1267 case CMD_0110_0000_d8_Wr18_FlashMode: return "FlashMode";
whismanoid 53:3d5a3d241a5e 1268 case CMD_0110_0010_d8_Rd18_FlashMode: return "FlashMode";
whismanoid 53:3d5a3d241a5e 1269 case CMD_0110_0100_d16_Wr19_FlashAddr: return "FlashAddr";
whismanoid 53:3d5a3d241a5e 1270 case CMD_0110_0110_d16_Rd19_FlashAddr: return "FlashAddr";
whismanoid 53:3d5a3d241a5e 1271 case CMD_0110_1000_d16_Wr1A_FlashDataIn: return "FlashDataIn";
whismanoid 53:3d5a3d241a5e 1272 case CMD_0110_1010_d16_Rd1A_FlashDataIn: return "FlashDataIn";
whismanoid 53:3d5a3d241a5e 1273 case CMD_0110_1110_d16_Rd1B_FlashDataOut: return "FlashDataOut";
whismanoid 53:3d5a3d241a5e 1274 }
whismanoid 53:3d5a3d241a5e 1275 }
whismanoid 53:3d5a3d241a5e 1276
whismanoid 59:47538bcf6cda 1277 //----------------------------------------
whismanoid 59:47538bcf6cda 1278 // Menu item 'XX'
whismanoid 59:47538bcf6cda 1279 //
whismanoid 59:47538bcf6cda 1280 // @return 1 on success; 0 on failure
whismanoid 59:47538bcf6cda 1281 uint8_t MAX11043::Configure_XXXXX(uint8_t linef, uint8_t rate)
whismanoid 59:47538bcf6cda 1282 {
whismanoid 59:47538bcf6cda 1283
whismanoid 59:47538bcf6cda 1284 //----------------------------------------
whismanoid 59:47538bcf6cda 1285 // warning -- WIP work in progress
whismanoid 59:47538bcf6cda 1286 #warning "Not Tested Yet: MAX11043::Configure_XXXXX..."
whismanoid 59:47538bcf6cda 1287
whismanoid 59:47538bcf6cda 1288 //----------------------------------------
whismanoid 59:47538bcf6cda 1289 // read register
whismanoid 59:47538bcf6cda 1290 RegRead(CMD_0000_0010_d16o8_Rd00_ADCa, &adca);
whismanoid 59:47538bcf6cda 1291
whismanoid 59:47538bcf6cda 1292 //----------------------------------------
whismanoid 59:47538bcf6cda 1293 // success
whismanoid 59:47538bcf6cda 1294 return 1;
whismanoid 59:47538bcf6cda 1295 }
whismanoid 59:47538bcf6cda 1296
whismanoid 59:47538bcf6cda 1297 //----------------------------------------
whismanoid 59:47538bcf6cda 1298 // Menu item 'XY'
whismanoid 59:47538bcf6cda 1299 //
whismanoid 59:47538bcf6cda 1300 // @return 1 on success; 0 on failure
whismanoid 59:47538bcf6cda 1301 uint8_t MAX11043::Configure_XXXXY(uint8_t linef, uint8_t rate)
whismanoid 59:47538bcf6cda 1302 {
whismanoid 59:47538bcf6cda 1303
whismanoid 59:47538bcf6cda 1304 //----------------------------------------
whismanoid 59:47538bcf6cda 1305 // warning -- WIP work in progress
whismanoid 59:47538bcf6cda 1306 #warning "Not Tested Yet: MAX11043::Configure_XXXXY..."
whismanoid 59:47538bcf6cda 1307
whismanoid 59:47538bcf6cda 1308 //----------------------------------------
whismanoid 59:47538bcf6cda 1309 // read register
whismanoid 59:47538bcf6cda 1310 RegRead(CMD_0001_1110_d8_Rd07_Status, &status);
whismanoid 59:47538bcf6cda 1311
whismanoid 59:47538bcf6cda 1312 //----------------------------------------
whismanoid 59:47538bcf6cda 1313 // success
whismanoid 59:47538bcf6cda 1314 return 1;
whismanoid 59:47538bcf6cda 1315 }
whismanoid 59:47538bcf6cda 1316
whismanoid 53:3d5a3d241a5e 1317
whismanoid 53:3d5a3d241a5e 1318 // End of file