ST / ST_Events-old

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Dependents:   HelloWorld_CCA01M1 HelloWorld_CCA02M1 CI-data-logger-server HelloWorld_CCA02M1 ... more

This is a fork of the events subdirectory of https://github.com/ARMmbed/mbed-os.

Note, you must import this library with import name: events!!!

targets/targets.json@9603:12f74b38d9c3, 2017-01-09 (annotated)

Committer:
bcostm
Date:
Mon Jan 09 14:55:14 2017 +0100
Revision:
9603:12f74b38d9c3
Parent:
9583:17b71dfb2189
Child:
9629:86979ad5ec15
Child:
9617:53a104f810ab
Child:
9653:be36d320c614
Add CAN feature and activate CAN tests for this platform

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Christopher Haster 8332:5fce745004b6 1 {
Christopher Haster 8332:5fce745004b6 2 "Target": {
Christopher Haster 8332:5fce745004b6 3 "core": null,
Christopher Haster 8332:5fce745004b6 4 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 5 "supported_toolchains": null,
Christopher Haster 8332:5fce745004b6 6 "extra_labels": [],
Christopher Haster 8332:5fce745004b6 7 "is_disk_virtual": false,
Christopher Haster 8332:5fce745004b6 8 "macros": [],
Christopher Haster 8332:5fce745004b6 9 "device_has": [],
Christopher Haster 8332:5fce745004b6 10 "features": [],
Christopher Haster 8332:5fce745004b6 11 "detect_code": [],
Christopher Haster 8332:5fce745004b6 12 "public": false,
Christopher Haster 8332:5fce745004b6 13 "default_lib": "std"
Christopher Haster 8332:5fce745004b6 14 },
Jimmy Brisson 8524:ddc94648bd40 15 "Super_Target": {
Jimmy Brisson 8524:ddc94648bd40 16 "inherits": ["Target"],
Jimmy Brisson 8524:ddc94648bd40 17 "core": "Cortex-M4",
Jimmy Brisson 8527:7bb374e8c313 18 "features_add": ["UVISOR", "BLE", "CLIENT", "IPV4", "IPV6"],
Jimmy Brisson 8527:7bb374e8c313 19 "supported_toolchains": ["ARM"]
Jimmy Brisson 8524:ddc94648bd40 20 },
Christopher Haster 8332:5fce745004b6 21 "CM4_UARM": {
Christopher Haster 8332:5fce745004b6 22 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 23 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 24 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 25 "public": false,
Christopher Haster 8332:5fce745004b6 26 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 27 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 28 },
Christopher Haster 8332:5fce745004b6 29 "CM4_ARM": {
Christopher Haster 8332:5fce745004b6 30 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 31 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 32 "public": false,
Christopher Haster 8332:5fce745004b6 33 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 34 },
Christopher Haster 8332:5fce745004b6 35 "CM4F_UARM": {
Christopher Haster 8332:5fce745004b6 36 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 37 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 38 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 39 "public": false,
Christopher Haster 8332:5fce745004b6 40 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 41 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 42 },
Christopher Haster 8332:5fce745004b6 43 "CM4F_ARM": {
Christopher Haster 8332:5fce745004b6 44 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 45 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 46 "public": false,
Christopher Haster 8332:5fce745004b6 47 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 48 },
Christopher Haster 8332:5fce745004b6 49 "LPCTarget": {
Christopher Haster 8332:5fce745004b6 50 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 51 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
Christopher Haster 8332:5fce745004b6 52 "public": false
Christopher Haster 8332:5fce745004b6 53 },
Christopher Haster 8332:5fce745004b6 54 "LPC11C24": {
Christopher Haster 8332:5fce745004b6 55 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 56 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 57 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
Christopher Haster 8332:5fce745004b6 58 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 59 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 60 "device_name": "LPC11C24FBD48/301"
Christopher Haster 8332:5fce745004b6 61 },
Christopher Haster 8332:5fce745004b6 62 "LPC1114": {
Christopher Haster 8332:5fce745004b6 63 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 64 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 65 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 66 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
Christopher Haster 8332:5fce745004b6 67 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 68 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 69 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 70 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 71 "device_name": "LPC1114FN28/102"
Christopher Haster 8332:5fce745004b6 72 },
Christopher Haster 8332:5fce745004b6 73 "LPC11U24": {
Christopher Haster 8332:5fce745004b6 74 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 75 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 76 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 77 "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
Christopher Haster 8332:5fce745004b6 78 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 79 "detect_code": ["1040"],
Christopher Haster 8332:5fce745004b6 80 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 81 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 82 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 83 "device_name": "LPC11U24FBD48/401"
Christopher Haster 8332:5fce745004b6 84 },
Christopher Haster 8332:5fce745004b6 85 "OC_MBUINO": {
Christopher Haster 8332:5fce745004b6 86 "inherits": ["LPC11U24"],
Christopher Haster 8332:5fce745004b6 87 "macros": ["TARGET_LPC11U24"],
Christopher Haster 8332:5fce745004b6 88 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 89 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 90 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 91 },
Christopher Haster 8332:5fce745004b6 92 "LPC11U24_301": {
Christopher Haster 8332:5fce745004b6 93 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 94 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 95 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 96 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 97 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 98 "device_name": "LPC11U24FHI33/301"
Christopher Haster 8332:5fce745004b6 99 },
Christopher Haster 8332:5fce745004b6 100 "LPC11U34_421": {
Christopher Haster 8332:5fce745004b6 101 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 102 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 103 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 104 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 105 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 106 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 107 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 108 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 109 },
Christopher Haster 8332:5fce745004b6 110 "MICRONFCBOARD": {
Christopher Haster 8332:5fce745004b6 111 "inherits": ["LPC11U34_421"],
Christopher Haster 8332:5fce745004b6 112 "macros": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
Christopher Haster 8332:5fce745004b6 113 "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
Sarah Marsh 8472:da9bd832dfd1 114 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 115 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 116 },
Christopher Haster 8332:5fce745004b6 117 "LPC11U35_401": {
Christopher Haster 8332:5fce745004b6 118 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 119 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 120 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 121 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 122 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 123 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 124 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 125 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 126 "device_name": "LPC11U35FBD48/401"
Christopher Haster 8332:5fce745004b6 127 },
Christopher Haster 8332:5fce745004b6 128 "LPC11U35_501": {
Christopher Haster 8332:5fce745004b6 129 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 130 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 131 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 132 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 133 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 134 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 135 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 136 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 137 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 138 },
Christopher Haster 8332:5fce745004b6 139 "LPC11U35_501_IBDAP": {
Christopher Haster 8332:5fce745004b6 140 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 141 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 142 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 143 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 144 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 145 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 146 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 147 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 148 },
Christopher Haster 8332:5fce745004b6 149 "XADOW_M0": {
Christopher Haster 8332:5fce745004b6 150 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 151 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 152 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 153 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 154 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 155 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 156 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 157 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 158 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 159 },
Christopher Haster 8332:5fce745004b6 160 "LPC11U35_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 161 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 162 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 163 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 164 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 165 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 166 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 167 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 168 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 169 },
Christopher Haster 8332:5fce745004b6 170 "LPC11U37_501": {
Christopher Haster 8332:5fce745004b6 171 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 172 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 173 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 174 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 175 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 176 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 177 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 178 },
Christopher Haster 8332:5fce745004b6 179 "LPCCAPPUCCINO": {
Christopher Haster 8332:5fce745004b6 180 "inherits": ["LPC11U37_501"],
Sarah Marsh 8472:da9bd832dfd1 181 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 182 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 183 },
Christopher Haster 8332:5fce745004b6 184 "ARCH_GPRS": {
Christopher Haster 8332:5fce745004b6 185 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 186 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 187 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 188 "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
Christopher Haster 8332:5fce745004b6 189 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 190 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 191 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 192 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 193 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 194 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 195 },
Christopher Haster 8332:5fce745004b6 196 "LPC11U68": {
Christopher Haster 8332:5fce745004b6 197 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 198 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 199 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 200 "extra_labels": ["NXP", "LPC11U6X"],
Christopher Haster 8332:5fce745004b6 201 "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 202 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 203 "detect_code": ["1168"],
Christopher Haster 8332:5fce745004b6 204 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 205 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 206 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 207 "device_name": "LPC11U68JBD100"
Christopher Haster 8332:5fce745004b6 208 },
Christopher Haster 8332:5fce745004b6 209 "LPC1347": {
Christopher Haster 8332:5fce745004b6 210 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 211 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 212 "extra_labels": ["NXP", "LPC13XX"],
Christopher Haster 8332:5fce745004b6 213 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 214 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 215 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 216 "device_name": "LPC1347FBD48"
Christopher Haster 8332:5fce745004b6 217 },
Christopher Haster 8332:5fce745004b6 218 "LPC1549": {
Christopher Haster 8332:5fce745004b6 219 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 220 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 221 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 222 "extra_labels": ["NXP", "LPC15XX"],
Christopher Haster 8332:5fce745004b6 223 "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 224 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 225 "detect_code": ["1549"],
Christopher Haster 8332:5fce745004b6 226 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 227 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 228 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 229 "device_name": "lpc1549"
Christopher Haster 8332:5fce745004b6 230 },
Christopher Haster 8332:5fce745004b6 231 "LPC1768": {
Christopher Haster 8332:5fce745004b6 232 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 233 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 234 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 235 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 236 "detect_code": ["1010"],
Christopher Haster 8332:5fce745004b6 237 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 238 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 239 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 240 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 241 },
Christopher Haster 8332:5fce745004b6 242 "ARCH_PRO": {
Christopher Haster 8332:5fce745004b6 243 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 244 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 245 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 246 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 247 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 248 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 249 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 250 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 251 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 252 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 253 },
Christopher Haster 8332:5fce745004b6 254 "UBLOX_C027": {
Christopher Haster 8332:5fce745004b6 255 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 256 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 257 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 258 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 259 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 260 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 261 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 262 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 263 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 264 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 265 },
Christopher Haster 8332:5fce745004b6 266 "XBED_LPC1768": {
Christopher Haster 8332:5fce745004b6 267 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 268 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 269 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 270 "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 271 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 272 "detect_code": ["1010"],
Sarah Marsh 8472:da9bd832dfd1 273 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 274 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 275 },
Christopher Haster 8332:5fce745004b6 276 "LPC2368": {
Christopher Haster 8332:5fce745004b6 277 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 278 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 279 "extra_labels": ["NXP", "LPC23XX"],
Christopher Haster 8332:5fce745004b6 280 "supported_toolchains": ["GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 281 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 282 },
Christopher Haster 8332:5fce745004b6 283 "LPC2460": {
Christopher Haster 8332:5fce745004b6 284 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 285 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 286 "extra_labels": ["NXP", "LPC2460"],
Christopher Haster 8332:5fce745004b6 287 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 288 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 289 },
Christopher Haster 8332:5fce745004b6 290 "LPC810": {
Christopher Haster 8332:5fce745004b6 291 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 292 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 293 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 294 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 295 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 296 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 297 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 298 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 299 "device_name": "LPC810M021FN8"
Christopher Haster 8332:5fce745004b6 300 },
Christopher Haster 8332:5fce745004b6 301 "LPC812": {
Christopher Haster 8332:5fce745004b6 302 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 303 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 304 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 305 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 306 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 307 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 308 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 309 "detect_code": ["1050"],
Christopher Haster 8332:5fce745004b6 310 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 311 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 312 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 313 "device_name": "LPC812M101JDH20"
Christopher Haster 8332:5fce745004b6 314 },
Christopher Haster 8332:5fce745004b6 315 "LPC824": {
Christopher Haster 8332:5fce745004b6 316 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 317 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 318 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 319 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 320 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 321 "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 322 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 323 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 324 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 325 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 326 "device_name": "LPC824M201JDH20"
Christopher Haster 8332:5fce745004b6 327 },
Christopher Haster 8332:5fce745004b6 328 "SSCI824": {
Christopher Haster 8332:5fce745004b6 329 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 330 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 331 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 332 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 333 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 334 "supported_toolchains": ["uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 335 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 336 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 337 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 338 },
Christopher Haster 8332:5fce745004b6 339 "LPC4088": {
Christopher Haster 8332:5fce745004b6 340 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 341 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 342 "extra_labels": ["NXP", "LPC408X"],
Christopher Haster 8332:5fce745004b6 343 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 344 "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 345 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 346 "function": "LPC4088Code.binary_hook",
Christopher Haster 8332:5fce745004b6 347 "toolchains": ["ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 348 },
Christopher Haster 8332:5fce745004b6 349 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 350 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 351 "device_name": "LPC4088FBD144"
Christopher Haster 8332:5fce745004b6 352 },
Christopher Haster 8332:5fce745004b6 353 "LPC4088_DM": {
Christopher Haster 8332:5fce745004b6 354 "inherits": ["LPC4088"],
Christopher Haster 8332:5fce745004b6 355 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 356 },
Christopher Haster 8332:5fce745004b6 357 "LPC4330_M4": {
Christopher Haster 8332:5fce745004b6 358 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 359 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 360 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 361 "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
Sarah Marsh 8472:da9bd832dfd1 362 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 363 "device_name": "LPC4330"
Christopher Haster 8332:5fce745004b6 364 },
Christopher Haster 8332:5fce745004b6 365 "LPC4330_M0": {
Christopher Haster 8332:5fce745004b6 366 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 367 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 368 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 369 "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 370 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 371 },
Christopher Haster 8332:5fce745004b6 372 "LPC4337": {
Christopher Haster 8332:5fce745004b6 373 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 374 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 375 "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
Christopher Haster 8332:5fce745004b6 376 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 377 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 378 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 379 "device_name": "LPC4337"
Christopher Haster 8332:5fce745004b6 380 },
Christopher Haster 8332:5fce745004b6 381 "LPC1800": {
Christopher Haster 8332:5fce745004b6 382 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 383 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 384 "extra_labels": ["NXP", "LPC43XX"],
Christopher Haster 8332:5fce745004b6 385 "public": false,
Christopher Haster 8332:5fce745004b6 386 "supported_toolchains": ["ARM", "GCC_CR", "IAR"]
Christopher Haster 8332:5fce745004b6 387 },
Christopher Haster 8332:5fce745004b6 388 "LPC11U37H_401": {
Christopher Haster 8332:5fce745004b6 389 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 390 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 391 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 392 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 393 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 394 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 395 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 396 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 397 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 398 "device_name": "LPC11U37HFBD64/401"
Christopher Haster 8332:5fce745004b6 399 },
Christopher Haster 8332:5fce745004b6 400 "ELEKTOR_COCORICO": {
Christopher Haster 8332:5fce745004b6 401 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 402 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 403 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 404 "supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 405 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 406 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 407 "detect_code": ["C000"],
Sarah Marsh 8472:da9bd832dfd1 408 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 409 "device_name": "LPC812M101JDH16"
Christopher Haster 8332:5fce745004b6 410 },
Christopher Haster 8332:5fce745004b6 411 "KL05Z": {
Christopher Haster 8332:5fce745004b6 412 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 413 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 414 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 415 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 416 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 417 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 418 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 419 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 420 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 421 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 422 "device_name": "MKL05Z32xxx4"
Christopher Haster 8332:5fce745004b6 423 },
Christopher Haster 8332:5fce745004b6 424 "KL25Z": {
Christopher Haster 8332:5fce745004b6 425 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 426 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 427 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 428 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 429 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 430 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 431 "detect_code": ["0200"],
Christopher Haster 8332:5fce745004b6 432 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 433 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 434 "device_name": "MKL25Z128xxx4"
Christopher Haster 8332:5fce745004b6 435 },
Christopher Haster 8332:5fce745004b6 436 "KL26Z": {
Christopher Haster 8332:5fce745004b6 437 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 438 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 439 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 440 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 441 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 442 "inherits": ["Target"],
Sarah Marsh 8472:da9bd832dfd1 443 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 444 "device_name": "MKL26Z128xxx4"
Christopher Haster 8332:5fce745004b6 445 },
Christopher Haster 8332:5fce745004b6 446 "KL46Z": {
Christopher Haster 8332:5fce745004b6 447 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 448 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 449 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 450 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 451 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 452 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 453 "detect_code": ["0220"],
Christopher Haster 8332:5fce745004b6 454 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 455 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 456 "device_name": "MKL46Z256xxx4"
Christopher Haster 8332:5fce745004b6 457 },
Christopher Haster 8332:5fce745004b6 458 "K20D50M": {
Christopher Haster 8332:5fce745004b6 459 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 460 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 461 "extra_labels": ["Freescale", "K20XX"],
Christopher Haster 8332:5fce745004b6 462 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 463 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 464 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 465 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 466 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 467 "device_name": "MK20DX128xxx5"
Christopher Haster 8332:5fce745004b6 468 },
Christopher Haster 8332:5fce745004b6 469 "TEENSY3_1": {
Christopher Haster 8332:5fce745004b6 470 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 471 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 472 "extra_labels": ["Freescale", "K20XX", "K20DX256"],
Christopher Haster 8332:5fce745004b6 473 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 474 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 475 "supported_toolchains": ["GCC_ARM", "ARM"],
Christopher Haster 8332:5fce745004b6 476 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 477 "function": "TEENSY3_1Code.binary_hook",
Christopher Haster 8332:5fce745004b6 478 "toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 479 },
Christopher Haster 8332:5fce745004b6 480 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 481 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 482 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 483 "device_name": "MK20DX256xxx7"
Christopher Haster 8332:5fce745004b6 484 },
Marcelo Salazar 8947:c6669467b509 485 "MCU_K22F512": {
Christopher Haster 8332:5fce745004b6 486 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 487 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 488 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K22F", "MCU_K22F512", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"],
Christopher Haster 8332:5fce745004b6 489 "is_disk_virtual": true,
Ashok Rao 8948:1a8019161e2f 490 "public": false,
Christopher Haster 8332:5fce745004b6 491 "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 492 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 493 "detect_code": ["0231"],
Christopher Haster 8332:5fce745004b6 494 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 495 "device_name": "MK22DN512xxx5"
Christopher Haster 8332:5fce745004b6 496 },
Marcelo Salazar 8947:c6669467b509 497 "K22F": {
Ashok Rao 8948:1a8019161e2f 498 "supported_form_factors": ["ARDUINO"],
Marcelo Salazar 8947:c6669467b509 499 "inherits": ["MCU_K22F512"],
Sarah Marsh 8472:da9bd832dfd1 500 "release_versions": ["2", "5"],
Marcelo Salazar 8947:c6669467b509 501 "extra_labels_add": ["FRDM"]
Christopher Haster 8332:5fce745004b6 502 },
Christopher Haster 8332:5fce745004b6 503 "KL27Z": {
Christopher Haster 8332:5fce745004b6 504 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 505 "core": "Cortex-M0+",
Mahadevan Mahesh 9469:ab0aa3b9a6a2 506 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 507 "macros": ["CPU_MKL27Z64VLH4", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 508 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 509 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 510 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 511 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 512 "detect_code": ["0261"],
Christopher Haster 8332:5fce745004b6 513 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 514 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 515 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 516 "device_name": "MKL27Z64xxx4"
Christopher Haster 8332:5fce745004b6 517 },
Christopher Haster 8332:5fce745004b6 518 "KL43Z": {
Christopher Haster 8332:5fce745004b6 519 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 520 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 521 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 522 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 523 "macros": ["CPU_MKL43Z256VLH4", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 524 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 525 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 526 "detect_code": ["0262"],
Christopher Haster 8332:5fce745004b6 527 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 528 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 529 "device_name": "MKL43Z256xxx4"
Christopher Haster 8332:5fce745004b6 530 },
Mahadevan Mahesh 8665:1775fbac0db8 531 "KL82Z": {
Mahadevan Mahesh 8665:1775fbac0db8 532 "supported_form_factors": ["ARDUINO"],
Mahadevan Mahesh 8665:1775fbac0db8 533 "core": "Cortex-M0+",
Mahadevan Mahesh 8665:1775fbac0db8 534 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 535 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8665:1775fbac0db8 536 "macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8665:1775fbac0db8 537 "is_disk_virtual": true,
Mahadevan Mahesh 8665:1775fbac0db8 538 "inherits": ["Target"],
Mahadevan Mahesh 8665:1775fbac0db8 539 "detect_code": ["0218"],
Mahadevan Mahesh 8665:1775fbac0db8 540 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Mahadevan Mahesh 8930:d1bc0e17cab7 541 "release_versions": ["2", "5"],
Mahadevan Mahesh 8930:d1bc0e17cab7 542 "device_name": "MKL82Z128xxx7"
Mahadevan Mahesh 8665:1775fbac0db8 543 },
Mahadevan Mahesh 8713:a1a30dd433d6 544 "KW24D": {
Mahadevan Mahesh 8713:a1a30dd433d6 545 "supported_form_factors": ["ARDUINO"],
Mahadevan Mahesh 8713:a1a30dd433d6 546 "core": "Cortex-M4",
Mahadevan Mahesh 8713:a1a30dd433d6 547 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 548 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8713:a1a30dd433d6 549 "is_disk_virtual": true,
Mahadevan Mahesh 8713:a1a30dd433d6 550 "macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8713:a1a30dd433d6 551 "inherits": ["Target"],
Mahadevan Mahesh 8713:a1a30dd433d6 552 "detect_code": ["0250"],
Mahadevan Mahesh 8713:a1a30dd433d6 553 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Mahadevan Mahesh 8930:d1bc0e17cab7 554 "release_versions": ["2", "5"],
Mahadevan Mahesh 8930:d1bc0e17cab7 555 "device_name": "MKW24D512xxx5"
Mahadevan Mahesh 8713:a1a30dd433d6 556 },
Mahadevan Mahesh 9223:3e49d39dbe9d 557 "KW41Z": {
Mahadevan Mahesh 9223:3e49d39dbe9d 558 "supported_form_factors": ["ARDUINO"],
Mahadevan Mahesh 9223:3e49d39dbe9d 559 "core": "Cortex-M0+",
Mahadevan Mahesh 9223:3e49d39dbe9d 560 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 561 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 9223:3e49d39dbe9d 562 "is_disk_virtual": true,
Mahadevan Mahesh 9223:3e49d39dbe9d 563 "macros": ["CPU_MKW41Z512VHT4", "FSL_RTOS_MBED"],
Mahadevan Mahesh 9223:3e49d39dbe9d 564 "inherits": ["Target"],
Mahadevan Mahesh 9223:3e49d39dbe9d 565 "detect_code": ["0201"],
Mahadevan Mahesh 9223:3e49d39dbe9d 566 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Mahadevan Mahesh 9223:3e49d39dbe9d 567 "release_versions": ["2", "5"],
Mahadevan Mahesh 9223:3e49d39dbe9d 568 "device_name": "MKW41Z512xxx4"
Mahadevan Mahesh 9223:3e49d39dbe9d 569 },
Christopher Haster 8332:5fce745004b6 570 "K64F": {
Christopher Haster 8332:5fce745004b6 571 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 572 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 573 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 574 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 575 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 576 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 577 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 578 "detect_code": ["0240"],
Mahadevan Mahesh 9582:7d5f63f4b5c6 579 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG"],
Christopher Haster 8342:520d28b41ea4 580 "features": ["LWIP", "STORAGE"],
Sarah Marsh 8472:da9bd832dfd1 581 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 582 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 583 },
Christopher Haster 8332:5fce745004b6 584 "MTS_GAMBIT": {
Christopher Haster 8332:5fce745004b6 585 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 586 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 587 "supported_toolchains": ["ARM", "GCC_ARM"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 588 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 589 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 590 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Mahadevan Mahesh 9582:7d5f63f4b5c6 591 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 592 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 593 },
Christopher Haster 8332:5fce745004b6 594 "HEXIWEAR": {
Christopher Haster 8332:5fce745004b6 595 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 596 "core": "Cortex-M4F",
Mahadevan Mahesh 9469:ab0aa3b9a6a2 597 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 598 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 599 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Christopher Haster 8332:5fce745004b6 600 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 601 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 602 "detect_code": ["0214"],
Mahadevan Mahesh 9582:7d5f63f4b5c6 603 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8332:5fce745004b6 604 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 605 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 606 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 607 },
Christopher Haster 8332:5fce745004b6 608 "K66F": {
Christopher Haster 8332:5fce745004b6 609 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 610 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 611 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 612 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 613 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 614 "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 615 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 616 "detect_code": ["0311"],
Christopher Haster 8332:5fce745004b6 617 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Mahadevan Mahesh 9345:3f6498aad51e 618 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 619 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 620 "device_name" : "MK66FN2M0xxx18"
Christopher Haster 8332:5fce745004b6 621 },
Mahadevan Mahesh 8930:d1bc0e17cab7 622 "K82F": {
Mahadevan Mahesh 8930:d1bc0e17cab7 623 "supported_form_factors": ["ARDUINO"],
Mahadevan Mahesh 8930:d1bc0e17cab7 624 "core": "Cortex-M4F",
Mahadevan Mahesh 8930:d1bc0e17cab7 625 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 626 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8930:d1bc0e17cab7 627 "is_disk_virtual": true,
Mahadevan Mahesh 8930:d1bc0e17cab7 628 "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8930:d1bc0e17cab7 629 "inherits": ["Target"],
Mahadevan Mahesh 8930:d1bc0e17cab7 630 "detect_code": ["0217"],
Mahadevan Mahesh 8930:d1bc0e17cab7 631 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Mahadevan Mahesh 8930:d1bc0e17cab7 632 "release_versions": ["2", "5"],
Mahadevan Mahesh 8930:d1bc0e17cab7 633 "device_name" : "MK66FN256xxx15"
Mahadevan Mahesh 8930:d1bc0e17cab7 634 },
Christopher Haster 8332:5fce745004b6 635 "NUCLEO_F030R8": {
Christopher Haster 8332:5fce745004b6 636 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 637 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 638 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 639 "extra_labels": ["STM", "STM32F0", "STM32F030R8"],
Christopher Haster 8332:5fce745004b6 640 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 641 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 642 "detect_code": ["0725"],
Laurent MEUNIER 8670:d320c94c6968 643 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 644 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 645 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 646 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 647 "device_name": "STM32F030R8"
Christopher Haster 8332:5fce745004b6 648 },
Christopher Haster 8332:5fce745004b6 649 "NUCLEO_F031K6": {
Christopher Haster 8332:5fce745004b6 650 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 651 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 652 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 653 "extra_labels": ["STM", "STM32F0", "STM32F031K6"],
Christopher Haster 8332:5fce745004b6 654 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 655 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 656 "detect_code": ["0791"],
Laurent MEUNIER 8670:d320c94c6968 657 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 658 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 659 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 660 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 661 "device_name": "STM32F031K6"
Christopher Haster 8332:5fce745004b6 662 },
Christopher Haster 8332:5fce745004b6 663 "NUCLEO_F042K6": {
Christopher Haster 8332:5fce745004b6 664 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 665 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 666 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 667 "extra_labels": ["STM", "STM32F0", "STM32F042K6"],
Christopher Haster 8332:5fce745004b6 668 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 669 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 670 "detect_code": ["0785"],
Laurent MEUNIER 8670:d320c94c6968 671 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 672 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 673 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 674 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 675 "device_name": "STM32F042K6"
Christopher Haster 8332:5fce745004b6 676 },
Christopher Haster 8332:5fce745004b6 677 "NUCLEO_F070RB": {
Christopher Haster 8332:5fce745004b6 678 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 679 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 680 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 681 "extra_labels": ["STM", "STM32F0", "STM32F070RB"],
Christopher Haster 8332:5fce745004b6 682 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 683 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 684 "detect_code": ["0755"],
Laurent MEUNIER 8670:d320c94c6968 685 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 686 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 687 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 688 "device_name": "STM32F070RB"
Christopher Haster 8332:5fce745004b6 689 },
Christopher Haster 8332:5fce745004b6 690 "NUCLEO_F072RB": {
Christopher Haster 8332:5fce745004b6 691 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 692 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 693 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 694 "extra_labels": ["STM", "STM32F0", "STM32F072RB"],
Christopher Haster 8332:5fce745004b6 695 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 696 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 697 "detect_code": ["0730"],
Laurent MEUNIER 8670:d320c94c6968 698 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 699 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 700 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 701 "device_name": "STM32F072RB"
Christopher Haster 8332:5fce745004b6 702 },
Christopher Haster 8332:5fce745004b6 703 "NUCLEO_F091RC": {
Christopher Haster 8332:5fce745004b6 704 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 705 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 706 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 707 "extra_labels": ["STM", "STM32F0", "STM32F091RC"],
Christopher Haster 8332:5fce745004b6 708 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 709 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 710 "detect_code": ["0750"],
Laurent MEUNIER 8670:d320c94c6968 711 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 712 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 713 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 714 "device_name": "STM32F091RC"
Christopher Haster 8332:5fce745004b6 715 },
Christopher Haster 8332:5fce745004b6 716 "NUCLEO_F103RB": {
Christopher Haster 8332:5fce745004b6 717 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 718 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 719 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 720 "extra_labels": ["STM", "STM32F1", "STM32F103RB"],
Christopher Haster 8332:5fce745004b6 721 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 722 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 723 "detect_code": ["0700"],
Laurent MEUNIER 8670:d320c94c6968 724 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9446:d16c44cffce0 725 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 726 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 727 "device_name": "STM32F103RB"
Christopher Haster 8332:5fce745004b6 728 },
Christopher Haster 8332:5fce745004b6 729 "NUCLEO_F207ZG": {
Christopher Haster 8332:5fce745004b6 730 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 731 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 732 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 733 "extra_labels": ["STM", "STM32F2", "STM32F207ZG"],
Christopher Haster 8332:5fce745004b6 734 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 735 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 736 "detect_code": ["0835"],
Michel Jaouen 9538:7f8b8fe36e69 737 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
Laurent MEUNIER 9329:1c9a2dbe7975 738 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 739 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 740 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 741 "device_name" : "STM32F207ZG"
Christopher Haster 8332:5fce745004b6 742 },
Christopher Haster 8332:5fce745004b6 743 "NUCLEO_F302R8": {
Christopher Haster 8332:5fce745004b6 744 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 745 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 746 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 747 "extra_labels": ["STM", "STM32F3", "STM32F302R8"],
Christopher Haster 8332:5fce745004b6 748 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 749 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 750 "detect_code": ["0705"],
Laurent MEUNIER 8670:d320c94c6968 751 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 752 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 753 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 754 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 755 "device_name": "STM32F302R8"
Christopher Haster 8332:5fce745004b6 756 },
Christopher Haster 8332:5fce745004b6 757 "NUCLEO_F303K8": {
Christopher Haster 8332:5fce745004b6 758 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 759 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 760 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 761 "extra_labels": ["STM", "STM32F3", "STM32F303K8"],
Laurent MEUNIER 8670:d320c94c6968 762 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 763 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 764 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 765 "detect_code": ["0775"],
Christopher Haster 8332:5fce745004b6 766 "default_lib": "small",
Laurent MEUNIER 9329:1c9a2dbe7975 767 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 768 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 769 "device_name": "STM32F303K8"
Christopher Haster 8332:5fce745004b6 770 },
Christopher Haster 8332:5fce745004b6 771 "NUCLEO_F303RE": {
Christopher Haster 8332:5fce745004b6 772 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 773 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 774 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 775 "extra_labels": ["STM", "STM32F3", "STM32F303RE"],
Christopher Haster 8332:5fce745004b6 776 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 777 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 778 "detect_code": ["0745"],
Laurent MEUNIER 8670:d320c94c6968 779 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 780 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 781 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 782 "device_name": "STM32F303RE"
Christopher Haster 8332:5fce745004b6 783 },
Christopher Haster 8332:5fce745004b6 784 "NUCLEO_F303ZE": {
Christopher Haster 8332:5fce745004b6 785 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 786 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 787 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 788 "extra_labels": ["STM", "STM32F3", "STM32F303ZE"],
Christopher Haster 8332:5fce745004b6 789 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 790 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 791 "detect_code": ["0747"],
Laurent MEUNIER 8670:d320c94c6968 792 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 793 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "LOWPOWERTIMER"],
Sarah Marsh 8507:29edfac555c0 794 "release_versions": ["2", "5"],
jeromecoutant 8817:519ed36450d5 795 "device_name": "STM32F303ZE"
Christopher Haster 8332:5fce745004b6 796 },
Christopher Haster 8332:5fce745004b6 797 "NUCLEO_F334R8": {
Christopher Haster 8332:5fce745004b6 798 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 799 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 800 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 801 "extra_labels": ["STM", "STM32F3", "STM32F334R8"],
Christopher Haster 8332:5fce745004b6 802 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 803 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 804 "detect_code": ["0735"],
Laurent MEUNIER 8670:d320c94c6968 805 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 806 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 807 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 808 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 809 "device_name": "STM32F334R8"
Christopher Haster 8332:5fce745004b6 810 },
Christopher Haster 8332:5fce745004b6 811 "NUCLEO_F401RE": {
Christopher Haster 8332:5fce745004b6 812 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 813 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 814 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 815 "extra_labels": ["STM", "STM32F4", "STM32F401RE"],
Christopher Haster 8332:5fce745004b6 816 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 817 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 818 "detect_code": ["0720"],
Michel Jaouen 9538:7f8b8fe36e69 819 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USB_STM_HAL", "USBHOST_OTHER"],
Christopher Haster 8332:5fce745004b6 820 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 821 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 822 "device_name": "STM32F401RE"
Christopher Haster 8332:5fce745004b6 823 },
Christopher Haster 8332:5fce745004b6 824 "NUCLEO_F410RB": {
Christopher Haster 8332:5fce745004b6 825 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 826 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 827 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 828 "extra_labels": ["STM", "STM32F4", "STM32F410RB","STM32F410Rx"],
Christopher Haster 8332:5fce745004b6 829 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 830 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 831 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
jeromecoutant 9039:e01b460ece14 832 "detect_code": ["0744"],
jeromecoutant 9039:e01b460ece14 833 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 834 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 835 "device_name": "STM32F410RB"
Christopher Haster 8332:5fce745004b6 836 },
Christopher Haster 8332:5fce745004b6 837 "NUCLEO_F411RE": {
Christopher Haster 8332:5fce745004b6 838 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 839 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 840 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 841 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 842 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 843 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 844 "detect_code": ["0740"],
Michel Jaouen 9542:76c8d7d209b3 845 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USB_STM_HAL", "USBHOST_OTHER"],
Laurent MEUNIER 8670:d320c94c6968 846 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 847 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 848 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 849 },
bcostm 9363:c1f649d5f814 850 "NUCLEO_F412ZG": {
bcostm 9363:c1f649d5f814 851 "supported_form_factors": ["ARDUINO", "MORPHO"],
bcostm 9363:c1f649d5f814 852 "core": "Cortex-M4F",
bcostm 9363:c1f649d5f814 853 "default_toolchain": "ARM",
bcostm 9363:c1f649d5f814 854 "extra_labels": ["STM", "STM32F4", "STM32F412ZG"],
bcostm 9363:c1f649d5f814 855 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
bcostm 9363:c1f649d5f814 856 "inherits": ["Target"],
bcostm 9363:c1f649d5f814 857 "detect_code": ["0826"],
bcostm 9363:c1f649d5f814 858 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
bcostm 9603:12f74b38d9c3 859 "device_has": ["ANALOGIN", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
bcostm 9369:3bb288c36640 860 "release_versions": ["2", "5"],
bcostm 9363:c1f649d5f814 861 "device_name": "STM32F412ZG"
bcostm 9363:c1f649d5f814 862 },
Christopher Haster 8332:5fce745004b6 863 "ELMO_F411RE": {
Christopher Haster 8332:5fce745004b6 864 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 865 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 866 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 867 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 868 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 869 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 870 "detect_code": ["----"],
Christopher Haster 8332:5fce745004b6 871 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 872 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 873 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 874 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 875 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 876 },
Christopher Haster 8332:5fce745004b6 877 "NUCLEO_F429ZI": {
Christopher Haster 8332:5fce745004b6 878 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 879 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 880 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 881 "default_toolchain": "ARM",
adustm 8699:0582a3f97984 882 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "F429_F439"],
Christopher Haster 8332:5fce745004b6 883 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 884 "progen": {"target": "nucleo-f429zi"},
Michel Jaouen 9538:7f8b8fe36e69 885 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USB_STM_HAL", "USBHOST_OTHER"],
Christopher Haster 8332:5fce745004b6 886 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8332:5fce745004b6 887 "detect_code": ["0796"],
Christopher Haster 8342:520d28b41ea4 888 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 889 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 890 "device_name" : "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 891 },
adustm 8699:0582a3f97984 892 "NUCLEO_F439ZI": {
adustm 8699:0582a3f97984 893 "supported_form_factors": ["ARDUINO"],
adustm 8699:0582a3f97984 894 "inherits": ["Target"],
adustm 8699:0582a3f97984 895 "core": "Cortex-M4F",
adustm 8699:0582a3f97984 896 "default_toolchain": "ARM",
adustm 8699:0582a3f97984 897 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "F429_F439"],
adustm 8699:0582a3f97984 898 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
adustm 8699:0582a3f97984 899 "progen": {"target": "nucleo-f439zi"},
jeromecoutant 9314:b75f18cec1a6 900 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
adustm 8699:0582a3f97984 901 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
adustm 8699:0582a3f97984 902 "detect_code": ["0797"],
adustm 8699:0582a3f97984 903 "features": ["LWIP"],
adustm 8699:0582a3f97984 904 "release_versions": ["2", "5"],
jeromecoutant 9314:b75f18cec1a6 905 "device_name" : "STM32F439ZI"
adustm 8699:0582a3f97984 906 },
Christopher Haster 8332:5fce745004b6 907 "NUCLEO_F446RE": {
Christopher Haster 8332:5fce745004b6 908 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 909 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 910 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 911 "extra_labels": ["STM", "STM32F4", "STM32F446RE"],
Christopher Haster 8332:5fce745004b6 912 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 913 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 914 "detect_code": ["0777"],
Christopher Haster 8332:5fce745004b6 915 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 916 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 917 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 918 "device_name": "STM32F446RE"
Christopher Haster 8332:5fce745004b6 919 },
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Christopher Haster 8332:5fce745004b6 922 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 923 "default_toolchain": "ARM",
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Christopher Haster 8332:5fce745004b6 927 "detect_code": ["0778"],
Michel Jaouen 9538:7f8b8fe36e69 928 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USB_STM_HAL", "USBHOST_OTHER"],
Christopher Haster 8332:5fce745004b6 929 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 930 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 931 "device_name" : "STM32F446ZE"
Christopher Haster 8332:5fce745004b6 932 },
Christopher Haster 8332:5fce745004b6 933 "B96B_F446VE": {
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Christopher Haster 8332:5fce745004b6 935 "core": "Cortex-M4F",
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Christopher Haster 8332:5fce745004b6 937 "extra_labels": ["STM", "STM32F4", "STM32F446VE"],
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Christopher Haster 8332:5fce745004b6 939 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 940 "detect_code": ["0840"],
Christopher Haster 8332:5fce745004b6 941 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 942 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 943 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 944 "device_name":"STM32F446VE"
Christopher Haster 8332:5fce745004b6 945 },
Christopher Haster 8332:5fce745004b6 946 "NUCLEO_F746ZG": {
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Christopher Haster 8332:5fce745004b6 948 "core": "Cortex-M7F",
adustm 8701:5a968df3a238 949 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746ZG", "F746_F756"],
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Christopher Haster 8332:5fce745004b6 953 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 954 "detect_code": ["0816"],
Laurent MEUNIER 9329:1c9a2dbe7975 955 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 956 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 957 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 958 "device_name": "STM32F746ZG"
Christopher Haster 8332:5fce745004b6 959 },
adustm 8701:5a968df3a238 960 "NUCLEO_F756ZG": {
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adustm 8701:5a968df3a238 962 "core": "Cortex-M7F",
adustm 8701:5a968df3a238 963 "extra_labels": ["STM", "STM32F7", "STM32F756", "STM32F756ZG", "F746_F756"],
Christopher Haster 8332:5fce745004b6 964 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 965 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 966 "supported_form_factors": ["ARDUINO"],
adustm 8701:5a968df3a238 967 "detect_code": ["0819"],
Laurent MEUNIER 9329:1c9a2dbe7975 968 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 969 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 970 "release_versions": ["2", "5"],
adustm 8701:5a968df3a238 971 "device_name": "STM32F756ZG"
Christopher Haster 8332:5fce745004b6 972 },
Christopher Haster 8332:5fce745004b6 973 "NUCLEO_F767ZI": {
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Christopher Haster 8332:5fce745004b6 975 "core": "Cortex-M7FD",
Christopher Haster 8332:5fce745004b6 976 "extra_labels": ["STM", "STM32F7", "STM32F767", "STM32F767ZI"],
Christopher Haster 8332:5fce745004b6 977 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 978 "default_toolchain": "ARM",
jeromecoutant 8661:e3f8446fe374 979 "supported_form_factors": ["ARDUINO"],
Michel Jaouen 9538:7f8b8fe36e69 980 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
Christopher Haster 8332:5fce745004b6 981 "detect_code": ["0818"],
Laurent MEUNIER 9329:1c9a2dbe7975 982 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 983 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 984 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 985 "device_name" : "STM32F767ZI"
Christopher Haster 8332:5fce745004b6 986 },
Christopher Haster 8332:5fce745004b6 987 "NUCLEO_L011K4": {
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Christopher Haster 8332:5fce745004b6 989 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 990 "extra_labels": ["STM", "STM32L0", "STM32L011K4"],
Christopher Haster 8332:5fce745004b6 991 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 992 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 993 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 994 "detect_code": ["0780"],
Laurent MEUNIER 9329:1c9a2dbe7975 995 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 996 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 997 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 998 "device_name": "STM32L011K4"
Christopher Haster 8332:5fce745004b6 999 },
Christopher Haster 8332:5fce745004b6 1000 "NUCLEO_L031K6": {
Christopher Haster 8332:5fce745004b6 1001 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1002 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1003 "extra_labels": ["STM", "STM32L0", "STM32L031K6"],
Christopher Haster 8332:5fce745004b6 1004 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1005 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1006 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1007 "detect_code": ["0790"],
Laurent MEUNIER 9329:1c9a2dbe7975 1008 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1009 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1010 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1011 "device_name": "STM32L031K6"
Christopher Haster 8332:5fce745004b6 1012 },
Christopher Haster 8332:5fce745004b6 1013 "NUCLEO_L053R8": {
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Christopher Haster 8332:5fce745004b6 1015 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1016 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1017 "extra_labels": ["STM", "STM32L0", "STM32L053R8"],
Christopher Haster 8332:5fce745004b6 1018 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1019 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1020 "detect_code": ["0715"],
Laurent MEUNIER 9329:1c9a2dbe7975 1021 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1022 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1023 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1024 "device_name": "STM32L053R8"
Christopher Haster 8332:5fce745004b6 1025 },
Christopher Haster 8332:5fce745004b6 1026 "NUCLEO_L073RZ": {
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Christopher Haster 8332:5fce745004b6 1028 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1029 "default_toolchain": "ARM",
adustm 8590:ebb840a10a54 1030 "extra_labels": ["STM", "STM32L0", "STM32L073RZ", "STM32L073xx"],
Christopher Haster 8332:5fce745004b6 1031 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1032 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1033 "detect_code": ["0760"],
Laurent MEUNIER 9329:1c9a2dbe7975 1034 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1035 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1036 "device_name": "STM32L073RZ"
Christopher Haster 8332:5fce745004b6 1037 },
Christopher Haster 8332:5fce745004b6 1038 "NUCLEO_L152RE": {
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Christopher Haster 8332:5fce745004b6 1040 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1041 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1042 "extra_labels": ["STM", "STM32L1", "STM32L152RE"],
Christopher Haster 8332:5fce745004b6 1043 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1044 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1045 "detect_code": ["0710"],
Laurent MEUNIER 9329:1c9a2dbe7975 1046 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1047 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1048 "device_name": "STM32L152RE"
Christopher Haster 8332:5fce745004b6 1049 },
Christopher Haster 8332:5fce745004b6 1050 "NUCLEO_L432KC": {
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Christopher Haster 8332:5fce745004b6 1052 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1053 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1054 "extra_labels": ["STM", "STM32L4", "STM32L432KC"],
Christopher Haster 8332:5fce745004b6 1055 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1056 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1057 "detect_code": ["0770"],
Laurent MEUNIER 8670:d320c94c6968 1058 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 1059 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "CAN", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1060 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1061 "device_name" : "STM32L432KC"
Christopher Haster 8332:5fce745004b6 1062 },
Christopher Haster 8332:5fce745004b6 1063 "NUCLEO_L476RG": {
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Christopher Haster 8332:5fce745004b6 1065 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1066 "default_toolchain": "ARM",
adustm 8700:42167837958f 1067 "extra_labels": ["STM", "STM32L4", "STM32L476RG", "L476_L486"],
Christopher Haster 8332:5fce745004b6 1068 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1069 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1070 "detect_code": ["0765"],
Michel Jaouen 9542:76c8d7d209b3 1071 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2","USBHOST_OTHER"],
Laurent MEUNIER 9329:1c9a2dbe7975 1072 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1073 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1074 "device_name": "stm32l476rg"
Christopher Haster 8332:5fce745004b6 1075 },
adustm 8700:42167837958f 1076 "NUCLEO_L486RG": {
adustm 8700:42167837958f 1077 "supported_form_factors": ["ARDUINO", "MORPHO"],
adustm 8700:42167837958f 1078 "core": "Cortex-M4F",
adustm 8700:42167837958f 1079 "default_toolchain": "ARM",
adustm 8700:42167837958f 1080 "extra_labels": ["STM", "STM32L4", "STM32L486RG", "L476_L486"],
adustm 8700:42167837958f 1081 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
adustm 8700:42167837958f 1082 "inherits": ["Target"],
adustm 8700:42167837958f 1083 "detect_code": ["0827"],
Laurent MEUNIER 9329:1c9a2dbe7975 1084 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
adustm 8700:42167837958f 1085 "release_versions": ["2", "5"],
adustm 8700:42167837958f 1086 "device_name": "stm32l486rg"
adustm 8700:42167837958f 1087 },
Christopher Haster 8332:5fce745004b6 1088 "STM32F3XX": {
Christopher Haster 8332:5fce745004b6 1089 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1090 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 1091 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1092 "extra_labels": ["STM", "STM32F3XX"],
Christopher Haster 8332:5fce745004b6 1093 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 1094 },
Christopher Haster 8332:5fce745004b6 1095 "STM32F407": {
Christopher Haster 8332:5fce745004b6 1096 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1097 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1098 "extra_labels": ["STM", "STM32F4", "STM32F4XX"],
Christopher Haster 8332:5fce745004b6 1099 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 1100 },
Christopher Haster 8332:5fce745004b6 1101 "ARCH_MAX": {
Christopher Haster 8332:5fce745004b6 1102 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1103 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1104 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1105 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1106 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1107 "macros": ["LSI_VALUE=32000"],
Christopher Haster 8332:5fce745004b6 1108 "inherits": ["Target"],
Laurent MEUNIER 8670:d320c94c6968 1109 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1110 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1111 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1112 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1113 },
Christopher Haster 8332:5fce745004b6 1114 "DISCO_F051R8": {
Christopher Haster 8332:5fce745004b6 1115 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1116 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1117 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1118 "extra_labels": ["STM", "STM32F0", "STM32F051", "STM32F051R8"],
Christopher Haster 8332:5fce745004b6 1119 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1120 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 1121 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1122 "device_name": "STM32F051R8"
Christopher Haster 8332:5fce745004b6 1123 },
Christopher Haster 8332:5fce745004b6 1124 "DISCO_F100RB": {
Christopher Haster 8332:5fce745004b6 1125 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1126 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1127 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1128 "extra_labels": ["STM", "STM32F1", "STM32F100RB"],
Christopher Haster 8332:5fce745004b6 1129 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1130 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 1131 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1132 "device_name": "STM32F100RB"
Christopher Haster 8332:5fce745004b6 1133 },
Christopher Haster 8332:5fce745004b6 1134 "DISCO_F303VC": {
Christopher Haster 8332:5fce745004b6 1135 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1136 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1137 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1138 "extra_labels": ["STM", "STM32F3", "STM32F303", "STM32F303VC"],
Laurent MEUNIER 8670:d320c94c6968 1139 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1140 "supported_toolchains": ["GCC_ARM"],
Jared Szechy 9438:012b675e52e2 1141 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1142 "device_name": "STM32F303VC"
Christopher Haster 8332:5fce745004b6 1143 },
Christopher Haster 8332:5fce745004b6 1144 "DISCO_F334C8": {
Christopher Haster 8332:5fce745004b6 1145 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1146 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1147 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1148 "extra_labels": ["STM", "STM32F3", "STM32F334C8"],
Laurent MEUNIER 8670:d320c94c6968 1149 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1150 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1151 "detect_code": ["0810"],
Laurent MEUNIER 9329:1c9a2dbe7975 1152 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1153 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1154 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1155 "device_name": "STM32F334C8"
Christopher Haster 8332:5fce745004b6 1156 },
Christopher Haster 8332:5fce745004b6 1157 "DISCO_F407VG": {
Christopher Haster 8332:5fce745004b6 1158 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1159 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1160 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1161 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Michel Jaouen 9193:1b508d67aa05 1162 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USB_STM_HAL"],
Laurent MEUNIER 9329:1c9a2dbe7975 1163 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1164 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1165 },
Christopher Haster 8332:5fce745004b6 1166 "DISCO_F429ZI": {
Christopher Haster 8332:5fce745004b6 1167 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1168 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1169 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1170 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx"],
Michel Jaouen 9538:7f8b8fe36e69 1171 "macros": ["RTC_LSI=1","TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
Christopher Haster 8332:5fce745004b6 1172 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1173 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1174 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1175 "device_name": "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 1176 },
Christopher Haster 8332:5fce745004b6 1177 "DISCO_F469NI": {
Christopher Haster 8332:5fce745004b6 1178 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1179 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1180 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1181 "extra_labels": ["STM", "STM32F4", "STM32F469", "STM32F469NI", "STM32F469xx"],
Christopher Haster 8332:5fce745004b6 1182 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1183 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1184 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1185 "detect_code": ["0788"],
jeromecoutant 9032:ccd5da487753 1186 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1187 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1188 "device_name": "STM32F469NI"
Christopher Haster 8332:5fce745004b6 1189 },
Christopher Haster 8332:5fce745004b6 1190 "DISCO_L053C8": {
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Christopher Haster 8332:5fce745004b6 1192 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1193 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1194 "extra_labels": ["STM", "STM32L0", "STM32L053C8"],
Christopher Haster 8332:5fce745004b6 1195 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
jeromecoutant 9260:df87e41fad8d 1196 "macros": ["RTC_LSI=1"],
Laurent MEUNIER 9236:9611414db999 1197 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1198 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1199 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1200 "device_name": "STM32L053C8"
Christopher Haster 8332:5fce745004b6 1201 },
Christopher Haster 8332:5fce745004b6 1202 "DISCO_F746NG": {
Christopher Haster 8332:5fce745004b6 1203 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1204 "core": "Cortex-M7F",
Christopher Haster 8332:5fce745004b6 1205 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746NG"],
Christopher Haster 8332:5fce745004b6 1206 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1207 "default_toolchain": "ARM",
jeromecoutant 8661:e3f8446fe374 1208 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1209 "detect_code": ["0815"],
Laurent MEUNIER 8670:d320c94c6968 1210 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 1211 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1212 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1213 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 1214 "device_name": "STM32F746NG"
Christopher Haster 8332:5fce745004b6 1215 },
Christopher Haster 8332:5fce745004b6 1216 "DISCO_F769NI": {
Christopher Haster 8332:5fce745004b6 1217 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1218 "core": "Cortex-M7FD",
Christopher Haster 8332:5fce745004b6 1219 "extra_labels": ["STM", "STM32F7", "STM32F769", "STM32F769NI"],
Christopher Haster 8332:5fce745004b6 1220 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1221 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1222 "detect_code": ["0817"],
Laurent MEUNIER 8670:d320c94c6968 1223 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 1224 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1225 "features": ["LWIP"],
Sarah Marsh 8507:29edfac555c0 1226 "release_versions": ["2"],
Sarah Marsh 8507:29edfac555c0 1227 "device_name": "STM32F769NI"
Christopher Haster 8332:5fce745004b6 1228 },
Christopher Haster 8332:5fce745004b6 1229 "DISCO_L476VG": {
Christopher Haster 8332:5fce745004b6 1230 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1231 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1232 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1233 "extra_labels": ["STM", "STM32L4", "STM32L476VG"],
Christopher Haster 8332:5fce745004b6 1234 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1235 "detect_code": ["0820"],
Michel Jaouen 9542:76c8d7d209b3 1236 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
Laurent MEUNIER 9329:1c9a2dbe7975 1237 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1238 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1239 "device_name": "stm32l476vg"
Christopher Haster 8332:5fce745004b6 1240 },
Christopher Haster 8332:5fce745004b6 1241 "MTS_MDOT_F405RG": {
Christopher Haster 8332:5fce745004b6 1242 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1243 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1244 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1245 "extra_labels": ["STM", "STM32F4", "STM32F405RG"],
Christopher Haster 8332:5fce745004b6 1246 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1247 "macros": ["HSE_VALUE=26000000", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1248 "progen": {"target": "mts-mdot-f405rg"},
Christopher Haster 8332:5fce745004b6 1249 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1250 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1251 "device_name": "STM32F405RG"
Christopher Haster 8332:5fce745004b6 1252 },
Christopher Haster 8332:5fce745004b6 1253 "MTS_MDOT_F411RE": {
Christopher Haster 8332:5fce745004b6 1254 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1255 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1256 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1257 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1258 "macros": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1259 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1260 "function": "MTSCode.combine_bins_mts_dot",
Christopher Haster 8332:5fce745004b6 1261 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1262 },
Christopher Haster 8332:5fce745004b6 1263 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1264 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1265 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1266 },
Christopher Haster 8332:5fce745004b6 1267 "MTS_DRAGONFLY_F411RE": {
Christopher Haster 8332:5fce745004b6 1268 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1269 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1270 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1271 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1272 "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1273 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1274 "function": "MTSCode.combine_bins_mts_dragonfly",
Christopher Haster 8332:5fce745004b6 1275 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1276 },
Christopher Haster 8332:5fce745004b6 1277 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1278 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1279 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1280 },
Christopher Haster 8332:5fce745004b6 1281 "XDOT_L151CC": {
Christopher Haster 8332:5fce745004b6 1282 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1283 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1284 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1285 "extra_labels": ["STM", "STM32L1", "STM32L151CC"],
Christopher Haster 8332:5fce745004b6 1286 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1287 "progen": {"target": "xdot-l151cc"},
Laurent MEUNIER 9236:9611414db999 1288 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1289 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1290 "release_versions": ["5"]
Christopher Haster 8332:5fce745004b6 1291 },
Christopher Haster 8332:5fce745004b6 1292 "MOTE_L152RC": {
Christopher Haster 8332:5fce745004b6 1293 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1294 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1295 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1296 "extra_labels": ["STM", "STM32L1", "STM32L152RC"],
Christopher Haster 8332:5fce745004b6 1297 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1298 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1299 "detect_code": ["4100"],
Laurent MEUNIER 9236:9611414db999 1300 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1301 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1302 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1303 "device_name": "STM32L152RC"
Christopher Haster 8332:5fce745004b6 1304 },
Christopher Haster 8332:5fce745004b6 1305 "DISCO_F401VC": {
Christopher Haster 8332:5fce745004b6 1306 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1307 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1308 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 1309 "extra_labels": ["STM", "STM32F4", "STM32F401", "STM32F401VC"],
Christopher Haster 8332:5fce745004b6 1310 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1311 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 9329:1c9a2dbe7975 1312 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1313 "device_name": "STM32F401VC"
Christopher Haster 8332:5fce745004b6 1314 },
andreas.larsson 8355:cb6a226655c8 1315 "UBLOX_EVK_ODIN_W2": {
Christopher Haster 8332:5fce745004b6 1316 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1317 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1318 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1319 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
andreas.larsson 8654:d2daf30b4d0f 1320 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx"],
andreas.larsson 8768:b81d7522ac45 1321 "macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
Christopher Haster 8332:5fce745004b6 1322 "inherits": ["Target"],
Bartek Szatkowski 9124:4d8a46bdf20d 1323 "device_has": ["ANALOGIN", "CAN", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1324 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1325 "release_versions": ["5"],
Sarah Marsh 8472:da9bd832dfd1 1326 "device_name": "STM32F439ZI"
Christopher Haster 8332:5fce745004b6 1327 },
Christopher Haster 8332:5fce745004b6 1328 "NZ32_SC151": {
Christopher Haster 8332:5fce745004b6 1329 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1330 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1331 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1332 "program_cycle_s": 1.5,
Christopher Haster 8332:5fce745004b6 1333 "extra_labels": ["STM", "STM32L1", "STM32L151RC"],
Christopher Haster 8332:5fce745004b6 1334 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1335 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Laurent MEUNIER 9236:9611414db999 1336 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1337 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1338 "device_name": "STM32L151RC"
Christopher Haster 8332:5fce745004b6 1339 },
Christopher Haster 8332:5fce745004b6 1340 "MCU_NRF51": {
Christopher Haster 8332:5fce745004b6 1341 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1342 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1343 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1344 "macros": ["NRF51", "TARGET_NRF51822"],
Christopher Haster 8332:5fce745004b6 1345 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 1346 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
Christopher Haster 8332:5fce745004b6 1347 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 1348 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1349 "supported_toolchains": ["ARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1350 "public": false,
Christopher Haster 8332:5fce745004b6 1351 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 1352 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1353 {
Christopher Haster 8332:5fce745004b6 1354 "boot": "s130_nrf51_1.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1355 "name": "s130_nrf51_1.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1356 "offset": 114688
Christopher Haster 8332:5fce745004b6 1357 },
Christopher Haster 8332:5fce745004b6 1358 {
Christopher Haster 8332:5fce745004b6 1359 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1360 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1361 "offset": 98304
Christopher Haster 8332:5fce745004b6 1362 },
Christopher Haster 8332:5fce745004b6 1363 {
Christopher Haster 8332:5fce745004b6 1364 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1365 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1366 "offset": 90112
Christopher Haster 8332:5fce745004b6 1367 },
Christopher Haster 8332:5fce745004b6 1368 {
Christopher Haster 8332:5fce745004b6 1369 "boot": "s110_nrf51822_7.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1370 "name": "s110_nrf51822_7.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1371 "offset": 90112
Christopher Haster 8332:5fce745004b6 1372 },
Christopher Haster 8332:5fce745004b6 1373 {
Christopher Haster 8332:5fce745004b6 1374 "boot": "s110_nrf51822_6.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1375 "name": "s110_nrf51822_6.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1376 "offset": 81920
Christopher Haster 8332:5fce745004b6 1377 }
Christopher Haster 8332:5fce745004b6 1378 ],
Christopher Haster 8332:5fce745004b6 1379 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 1380 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1381 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 1382 "toolchains": ["ARM_STD", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 1383 },
Christopher Haster 8332:5fce745004b6 1384 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 1385 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1386 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 1387 },
Christopher Haster 8332:5fce745004b6 1388 "MCU_NRF51_16K_BASE": {
Christopher Haster 8332:5fce745004b6 1389 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1390 "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1391 "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1392 "public": false,
Christopher Haster 8332:5fce745004b6 1393 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 1394 },
Christopher Haster 8332:5fce745004b6 1395 "MCU_NRF51_16K_BOOT_BASE": {
Christopher Haster 8332:5fce745004b6 1396 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1397 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1398 "extra_labels_add": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1399 "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1400 "public": false
Christopher Haster 8332:5fce745004b6 1401 },
Christopher Haster 8332:5fce745004b6 1402 "MCU_NRF51_16K_OTA_BASE": {
Christopher Haster 8332:5fce745004b6 1403 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1404 "public": false,
Christopher Haster 8332:5fce745004b6 1405 "extra_labels_add": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1406 "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1407 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1408 },
Christopher Haster 8332:5fce745004b6 1409 "MCU_NRF51_16K": {
Christopher Haster 8332:5fce745004b6 1410 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1411 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1412 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1413 "public": false
Christopher Haster 8332:5fce745004b6 1414 },
Christopher Haster 8332:5fce745004b6 1415 "MCU_NRF51_S110": {
Christopher Haster 8332:5fce745004b6 1416 "extra_labels_add": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1417 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1418 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1419 {
Christopher Haster 8332:5fce745004b6 1420 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1421 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1422 "offset": 98304
Christopher Haster 8332:5fce745004b6 1423 },
Christopher Haster 8332:5fce745004b6 1424 {
Christopher Haster 8332:5fce745004b6 1425 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1426 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1427 "offset": 90112
Christopher Haster 8332:5fce745004b6 1428 }
Christopher Haster 8332:5fce745004b6 1429 ],
Christopher Haster 8332:5fce745004b6 1430 "public": false
Christopher Haster 8332:5fce745004b6 1431 },
Christopher Haster 8332:5fce745004b6 1432 "MCU_NRF51_16K_S110": {
Christopher Haster 8332:5fce745004b6 1433 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1434 "public": false
Christopher Haster 8332:5fce745004b6 1435 },
Christopher Haster 8332:5fce745004b6 1436 "MCU_NRF51_16K_BOOT": {
Christopher Haster 8332:5fce745004b6 1437 "inherits": ["MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1438 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1439 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1440 "public": false
Christopher Haster 8332:5fce745004b6 1441 },
Christopher Haster 8332:5fce745004b6 1442 "MCU_NRF51_16K_BOOT_S110": {
Christopher Haster 8332:5fce745004b6 1443 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1444 "public": false
Christopher Haster 8332:5fce745004b6 1445 },
Christopher Haster 8332:5fce745004b6 1446 "MCU_NRF51_16K_OTA": {
Christopher Haster 8332:5fce745004b6 1447 "inherits": ["MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1448 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1449 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1450 "public": false
Christopher Haster 8332:5fce745004b6 1451 },
Christopher Haster 8332:5fce745004b6 1452 "MCU_NRF51_16K_OTA_S110": {
Christopher Haster 8332:5fce745004b6 1453 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1454 "public": false
Christopher Haster 8332:5fce745004b6 1455 },
Christopher Haster 8332:5fce745004b6 1456 "MCU_NRF51_32K": {
Christopher Haster 8332:5fce745004b6 1457 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1458 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1459 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1460 "public": false
Christopher Haster 8332:5fce745004b6 1461 },
Christopher Haster 8332:5fce745004b6 1462 "MCU_NRF51_32K_BOOT": {
Christopher Haster 8332:5fce745004b6 1463 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1464 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1465 "extra_labels_add": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1466 "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1467 "public": false
Christopher Haster 8332:5fce745004b6 1468 },
Christopher Haster 8332:5fce745004b6 1469 "MCU_NRF51_32K_OTA": {
Christopher Haster 8332:5fce745004b6 1470 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1471 "public": false,
Christopher Haster 8332:5fce745004b6 1472 "extra_labels_add": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1473 "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1474 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1475 },
Christopher Haster 8332:5fce745004b6 1476 "NRF51822": {
Christopher Haster 8332:5fce745004b6 1477 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1478 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1479 "macros_add": ["TARGET_NRF51822_MKIT"],
Sarah Marsh 8472:da9bd832dfd1 1480 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1481 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1482 },
Christopher Haster 8332:5fce745004b6 1483 "NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1484 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1485 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1486 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1487 },
Christopher Haster 8332:5fce745004b6 1488 "NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1489 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1490 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1491 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1492 },
Christopher Haster 8332:5fce745004b6 1493 "ARCH_BLE": {
Christopher Haster 8332:5fce745004b6 1494 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1495 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1496 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1497 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1498 },
Christopher Haster 8332:5fce745004b6 1499 "ARCH_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1500 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1501 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1502 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1503 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1504 },
Christopher Haster 8332:5fce745004b6 1505 "ARCH_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1506 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1507 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1508 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1509 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1510 },
Christopher Haster 8332:5fce745004b6 1511 "ARCH_LINK": {
Christopher Haster 8332:5fce745004b6 1512 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1513 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1514 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1515 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1516 },
Christopher Haster 8332:5fce745004b6 1517 "ARCH_LINK_BOOT": {
Christopher Haster 8332:5fce745004b6 1518 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1519 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1520 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1521 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1522 },
Christopher Haster 8332:5fce745004b6 1523 "ARCH_LINK_OTA": {
Christopher Haster 8332:5fce745004b6 1524 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1525 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1526 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1527 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1528 },
Christopher Haster 8332:5fce745004b6 1529 "SEEED_TINY_BLE": {
Christopher Haster 8332:5fce745004b6 1530 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1531 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1532 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1533 },
Christopher Haster 8332:5fce745004b6 1534 "SEEED_TINY_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1535 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1536 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1537 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1538 },
Christopher Haster 8332:5fce745004b6 1539 "SEEED_TINY_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1540 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1541 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1542 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1543 },
Christopher Haster 8332:5fce745004b6 1544 "HRM1017": {
Christopher Haster 8332:5fce745004b6 1545 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1546 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Sarah Marsh 8472:da9bd832dfd1 1547 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1548 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1549 },
Christopher Haster 8332:5fce745004b6 1550 "HRM1017_BOOT": {
Christopher Haster 8332:5fce745004b6 1551 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1552 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1553 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1554 },
Christopher Haster 8332:5fce745004b6 1555 "HRM1017_OTA": {
Christopher Haster 8332:5fce745004b6 1556 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1557 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1558 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1559 },
Christopher Haster 8332:5fce745004b6 1560 "RBLAB_NRF51822": {
Christopher Haster 8332:5fce745004b6 1561 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1562 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1563 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1564 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1565 },
Christopher Haster 8332:5fce745004b6 1566 "RBLAB_NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1567 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1568 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1569 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1570 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1571 },
Christopher Haster 8332:5fce745004b6 1572 "RBLAB_NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1573 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1574 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1575 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1576 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1577 },
Christopher Haster 8332:5fce745004b6 1578 "RBLAB_BLENANO": {
Christopher Haster 8332:5fce745004b6 1579 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1580 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1581 },
Christopher Haster 8332:5fce745004b6 1582 "RBLAB_BLENANO_BOOT": {
Christopher Haster 8332:5fce745004b6 1583 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1584 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1585 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1586 },
Christopher Haster 8332:5fce745004b6 1587 "RBLAB_BLENANO_OTA": {
Christopher Haster 8332:5fce745004b6 1588 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1589 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1590 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1591 },
Christopher Haster 8332:5fce745004b6 1592 "NRF51822_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 1593 "inherits": ["MCU_NRF51_16K"]
Christopher Haster 8332:5fce745004b6 1594 },
Christopher Haster 8332:5fce745004b6 1595 "WALLBOT_BLE": {
Christopher Haster 8332:5fce745004b6 1596 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1597 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1598 },
Christopher Haster 8332:5fce745004b6 1599 "WALLBOT_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1600 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1601 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1602 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1603 },
Christopher Haster 8332:5fce745004b6 1604 "WALLBOT_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1605 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1606 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1607 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1608 },
Christopher Haster 8332:5fce745004b6 1609 "DELTA_DFCM_NNN40": {
Christopher Haster 8332:5fce745004b6 1610 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1611 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1612 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1613 "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 1614 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1615 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1616 },
Christopher Haster 8332:5fce745004b6 1617 "DELTA_DFCM_NNN40_BOOT": {
Christopher Haster 8332:5fce745004b6 1618 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1619 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1620 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1621 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1622 },
Christopher Haster 8332:5fce745004b6 1623 "DELTA_DFCM_NNN40_OTA": {
Christopher Haster 8332:5fce745004b6 1624 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1625 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1626 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1627 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1628 },
Christopher Haster 8332:5fce745004b6 1629 "NRF51_DK_LEGACY": {
Christopher Haster 8332:5fce745004b6 1630 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1631 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1632 "extra_labels_add": ["NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1633 },
Christopher Haster 8332:5fce745004b6 1634 "NRF51_DK_BOOT": {
Christopher Haster 8332:5fce745004b6 1635 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1636 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1637 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1638 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1639 },
Christopher Haster 8332:5fce745004b6 1640 "NRF51_DK_OTA": {
Christopher Haster 8332:5fce745004b6 1641 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1642 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1643 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1644 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1645 },
Christopher Haster 8332:5fce745004b6 1646 "NRF51_DONGLE_LEGACY": {
Christopher Haster 8332:5fce745004b6 1647 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1648 "extra_labels_add": ["NRF51_DONGLE"],
Sarah Marsh 8472:da9bd832dfd1 1649 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1650 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1651 },
Christopher Haster 8332:5fce745004b6 1652 "NRF51_DONGLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1653 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1654 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1655 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1656 },
Christopher Haster 8332:5fce745004b6 1657 "NRF51_DONGLE_OTA": {
Christopher Haster 8332:5fce745004b6 1658 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1659 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1660 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1661 },
Christopher Haster 8332:5fce745004b6 1662 "NRF51_MICROBIT": {
Christopher Haster 8332:5fce745004b6 1663 "inherits": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1664 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Sarah Marsh 8912:449d8d318e02 1665 "release_versions": ["2"],
Sarah Marsh 8912:449d8d318e02 1666 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1667 },
Christopher Haster 8332:5fce745004b6 1668 "NRF51_MICROBIT_BOOT": {
Christopher Haster 8332:5fce745004b6 1669 "inherits": ["MCU_NRF51_16K_BOOT_S110"],
Christopher Haster 8332:5fce745004b6 1670 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1671 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1672 },
Christopher Haster 8332:5fce745004b6 1673 "NRF51_MICROBIT_OTA": {
Christopher Haster 8332:5fce745004b6 1674 "inherits": ["MCU_NRF51_16K_OTA_S110"],
Christopher Haster 8332:5fce745004b6 1675 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1676 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1677 },
Christopher Haster 8332:5fce745004b6 1678 "NRF51_MICROBIT_B": {
Christopher Haster 8332:5fce745004b6 1679 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1680 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1681 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1682 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1683 },
Christopher Haster 8332:5fce745004b6 1684 "NRF51_MICROBIT_B_BOOT": {
Christopher Haster 8332:5fce745004b6 1685 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1686 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1687 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1688 },
Christopher Haster 8332:5fce745004b6 1689 "NRF51_MICROBIT_B_OTA": {
Christopher Haster 8332:5fce745004b6 1690 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1691 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1692 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1693 },
Christopher Haster 8332:5fce745004b6 1694 "MTM_MTCONNECT04S": {
Christopher Haster 8332:5fce745004b6 1695 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1696 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1697 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1698 },
Christopher Haster 8332:5fce745004b6 1699 "MTM_MTCONNECT04S_BOOT": {
Christopher Haster 8332:5fce745004b6 1700 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1701 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1702 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1703 },
Christopher Haster 8332:5fce745004b6 1704 "MTM_MTCONNECT04S_OTA": {
Christopher Haster 8332:5fce745004b6 1705 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1706 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1707 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1708 },
Christopher Haster 8332:5fce745004b6 1709 "TY51822R3": {
Christopher Haster 8332:5fce745004b6 1710 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 1711 "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
Christopher Haster 8332:5fce745004b6 1712 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 1713 "detect_code": ["1019"],
Christopher Haster 8332:5fce745004b6 1714 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1715 "overrides": {"uart_hwfc": 0},
Sarah Marsh 8472:da9bd832dfd1 1716 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1717 },
Christopher Haster 8332:5fce745004b6 1718 "TY51822R3_BOOT": {
Christopher Haster 8332:5fce745004b6 1719 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1720 "extra_labels_add": ["TY51822R3"],
Christopher Haster 8332:5fce745004b6 1721 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1722 },
Christopher Haster 8332:5fce745004b6 1723 "TY51822R3_OTA": {
Christopher Haster 8332:5fce745004b6 1724 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1725 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1726 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1727 },
Christopher Haster 8332:5fce745004b6 1728 "ARM_MPS2_Target": {
Christopher Haster 8332:5fce745004b6 1729 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1730 "public": false,
Christopher Haster 8332:5fce745004b6 1731 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1732 },
Christopher Haster 8332:5fce745004b6 1733 "ARM_MPS2_M0": {
Christopher Haster 8332:5fce745004b6 1734 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1735 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1736 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1737 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
Christopher Haster 8332:5fce745004b6 1738 "macros": ["CMSDK_CM0"],
Christopher Haster 8332:5fce745004b6 1739 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1740 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1741 },
Christopher Haster 8332:5fce745004b6 1742 "ARM_MPS2_M0P": {
Christopher Haster 8332:5fce745004b6 1743 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1744 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1745 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1746 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0P"],
Christopher Haster 8332:5fce745004b6 1747 "macros": ["CMSDK_CM0plus"],
Christopher Haster 8332:5fce745004b6 1748 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1749 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1750 },
Christopher Haster 8332:5fce745004b6 1751 "ARM_MPS2_M1": {
Christopher Haster 8332:5fce745004b6 1752 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1753 "core": "Cortex-M1",
Christopher Haster 8332:5fce745004b6 1754 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1755 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M1"],
Christopher Haster 8332:5fce745004b6 1756 "macros": ["CMSDK_CM1"],
Christopher Haster 8332:5fce745004b6 1757 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1758 },
Christopher Haster 8332:5fce745004b6 1759 "ARM_MPS2_M3": {
Christopher Haster 8332:5fce745004b6 1760 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1761 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1762 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1763 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M3"],
Christopher Haster 8332:5fce745004b6 1764 "macros": ["CMSDK_CM3"],
Christopher Haster 8332:5fce745004b6 1765 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1766 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1767 },
Christopher Haster 8332:5fce745004b6 1768 "ARM_MPS2_M4": {
Christopher Haster 8332:5fce745004b6 1769 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1770 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1771 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1772 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
Christopher Haster 8332:5fce745004b6 1773 "macros": ["CMSDK_CM4"],
Christopher Haster 8332:5fce745004b6 1774 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1775 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1776 },
Christopher Haster 8332:5fce745004b6 1777 "ARM_MPS2_M7": {
Christopher Haster 8332:5fce745004b6 1778 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1779 "core": "Cortex-M7",
Christopher Haster 8332:5fce745004b6 1780 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1781 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M7"],
Christopher Haster 8332:5fce745004b6 1782 "macros": ["CMSDK_CM7"],
Christopher Haster 8332:5fce745004b6 1783 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1784 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1785 },
Christopher Haster 8332:5fce745004b6 1786 "ARM_IOTSS_Target": {
Christopher Haster 8332:5fce745004b6 1787 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1788 "public": false,
Christopher Haster 8332:5fce745004b6 1789 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1790 },
Christopher Haster 8332:5fce745004b6 1791 "ARM_IOTSS_BEID": {
Christopher Haster 8332:5fce745004b6 1792 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1793 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1794 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1795 "extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
Christopher Haster 8332:5fce745004b6 1796 "macros": ["CMSDK_BEID"],
Christopher Haster 8332:5fce745004b6 1797 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1798 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1799 },
Christopher Haster 8332:5fce745004b6 1800 "ARM_BEETLE_SOC": {
Christopher Haster 8332:5fce745004b6 1801 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1802 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1803 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1804 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1805 "extra_labels": ["ARM_SSG", "BEETLE"],
Christopher Haster 8332:5fce745004b6 1806 "macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
Christopher Haster 8332:5fce745004b6 1807 "device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 1808 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 1809 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1810 "device_name": "beetle"
Christopher Haster 8332:5fce745004b6 1811 },
Christopher Haster 8332:5fce745004b6 1812 "RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1813 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1814 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1815 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1816 "extra_labels": ["RENESAS", "MBRZA1H"],
Christopher Haster 8332:5fce745004b6 1817 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1818 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1819 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1820 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1821 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1822 "device_name": "r7s721001"
Christopher Haster 8332:5fce745004b6 1823 },
Christopher Haster 8332:5fce745004b6 1824 "VK_RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1825 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1826 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1827 "extra_labels": ["RENESAS", "VKRZA1H"],
Christopher Haster 8332:5fce745004b6 1828 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1829 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1830 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1831 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1832 "features": ["LWIP"],
Christopher Haster 8332:5fce745004b6 1833 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1834 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1835 },
Christopher Haster 8332:5fce745004b6 1836 "MAXWSNENV": {
Christopher Haster 8332:5fce745004b6 1837 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1838 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1839 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1840 "extra_labels": ["Maxim", "MAX32610"],
Christopher Haster 8332:5fce745004b6 1841 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1842 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1843 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1844 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1845 },
Christopher Haster 8332:5fce745004b6 1846 "MAX32600MBED": {
Christopher Haster 8332:5fce745004b6 1847 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1848 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1849 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1850 "extra_labels": ["Maxim", "MAX32600"],
Christopher Haster 8332:5fce745004b6 1851 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1852 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1853 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1854 "device_name": "max326000x85"
Christopher Haster 8332:5fce745004b6 1855 },
Christopher Haster 8332:5fce745004b6 1856 "MAX32620HSP": {
Christopher Haster 8332:5fce745004b6 1857 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1858 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1859 "extra_labels": ["Maxim", "MAX32620"],
Christopher Haster 8332:5fce745004b6 1860 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1861 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1862 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1863 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1864 },
Jeremy Brodt 8925:a20ee257d141 1865 "MAX32625MBED": {
Jeremy Brodt 8925:a20ee257d141 1866 "inherits": ["Target"],
Jeremy Brodt 8925:a20ee257d141 1867 "core": "Cortex-M4F",
Jeremy Brodt 8925:a20ee257d141 1868 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
Jeremy Brodt 8925:a20ee257d141 1869 "extra_labels": ["Maxim", "MAX32625"],
Jeremy Brodt 8925:a20ee257d141 1870 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Jeremy Brodt 8925:a20ee257d141 1871 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Jeremy Brodt 8925:a20ee257d141 1872 "release_versions": ["2", "5"]
Jeremy Brodt 8925:a20ee257d141 1873 },
Jeremy Brodt 8924:15136a8e47ec 1874 "MAX32625NEXPAQ": {
Christopher Haster 8332:5fce745004b6 1875 "inherits": ["Target"],
Jeremy Brodt 8924:15136a8e47ec 1876 "core": "Cortex-M4F",
Jeremy Brodt 8924:15136a8e47ec 1877 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
Jeremy Brodt 8924:15136a8e47ec 1878 "extra_labels": ["Maxim", "MAX32625"],
Jeremy Brodt 8924:15136a8e47ec 1879 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Jeremy Brodt 8924:15136a8e47ec 1880 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Jeremy Brodt 8924:15136a8e47ec 1881 "release_versions": ["2", "5"]
Jeremy Brodt 8924:15136a8e47ec 1882 },
Steven Cooreman 8832:bb5076d1eadc 1883 "EFM32": {
Christopher Haster 8332:5fce745004b6 1884 "inherits": ["Target"],
Steven Cooreman 8832:bb5076d1eadc 1885 "extra_labels": ["Silicon_Labs", "EFM32"],
Steven Cooreman 8832:bb5076d1eadc 1886 "public": false
Steven Cooreman 8832:bb5076d1eadc 1887 },
Steven Cooreman 8832:bb5076d1eadc 1888 "EFM32GG990F1024": {
Steven Cooreman 8832:bb5076d1eadc 1889 "inherits": ["EFM32"],
Steven Cooreman 8832:bb5076d1eadc 1890 "extra_labels_add": ["EFM32GG", "1024K"],
Christopher Haster 8332:5fce745004b6 1891 "core": "Cortex-M3",
Steven Cooreman 8831:d89f043d6f28 1892 "macros": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Christopher Haster 8332:5fce745004b6 1893 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Steven Cooreman 8832:bb5076d1eadc 1894 "release_versions": ["2", "5"],
Steven Cooreman 8832:bb5076d1eadc 1895 "device_name": "EFM32GG990F1024",
Steven Cooreman 8832:bb5076d1eadc 1896 "public": false
Steven Cooreman 8832:bb5076d1eadc 1897 },
Steven Cooreman 8832:bb5076d1eadc 1898 "EFM32GG_STK3700": {
Steven Cooreman 8832:bb5076d1eadc 1899 "inherits": ["EFM32GG990F1024"],
Christopher Haster 8332:5fce745004b6 1900 "progen": {"target": "efm32gg-stk"},
Christopher Haster 8332:5fce745004b6 1901 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1902 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 1903 "config": {
Steven Cooreman 8840:b3359e09c86e 1904 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1905 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1906 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 1907 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1908 },
Steven Cooreman 8840:b3359e09c86e 1909 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1910 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1911 "value": "48000000",
Steven Cooreman 8840:b3359e09c86e 1912 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1913 },
Steven Cooreman 8840:b3359e09c86e 1914 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1915 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1916 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 1917 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1918 },
Steven Cooreman 8840:b3359e09c86e 1919 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1920 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1921 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 1922 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1923 },
Steven Cooreman 8840:b3359e09c86e 1924 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1925 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 1926 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 1927 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1928 },
Steven Cooreman 8840:b3359e09c86e 1929 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 1930 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 1931 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 1932 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 9277:9462343558a3 1933 },
Steven Cooreman 9277:9462343558a3 1934 "board_controller_enable": {
Steven Cooreman 9277:9462343558a3 1935 "help": "Pin to pull high for enabling the USB serial port",
Steven Cooreman 9277:9462343558a3 1936 "value": "PF7",
Steven Cooreman 9277:9462343558a3 1937 "macro_name": "EFM_BC_EN"
Steven Cooreman 8840:b3359e09c86e 1938 }
Steven Cooreman 8840:b3359e09c86e 1939 }
Christopher Haster 8332:5fce745004b6 1940 },
Steven Cooreman 8832:bb5076d1eadc 1941 "EFM32LG990F256": {
Steven Cooreman 8832:bb5076d1eadc 1942 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 1943 "extra_labels_add": ["EFM32LG", "256K"],
Christopher Haster 8332:5fce745004b6 1944 "core": "Cortex-M3",
Steven Cooreman 8831:d89f043d6f28 1945 "macros": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Christopher Haster 8332:5fce745004b6 1946 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 1947 "release_versions": ["2", "5"],
Steven Cooreman 8832:bb5076d1eadc 1948 "device_name": "EFM32LG990F256",
Steven Cooreman 8832:bb5076d1eadc 1949 "public": false
Christopher Haster 8332:5fce745004b6 1950 },
Christopher Haster 8332:5fce745004b6 1951 "EFM32LG_STK3600": {
Steven Cooreman 8832:bb5076d1eadc 1952 "inherits": ["EFM32LG990F256"],
Christopher Haster 8332:5fce745004b6 1953 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1954 "forced_reset_timeout": 2,
Steven Cooreman 8832:bb5076d1eadc 1955 "device_name": "EFM32LG990F256",
Steven Cooreman 8840:b3359e09c86e 1956 "config": {
Steven Cooreman 8840:b3359e09c86e 1957 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1958 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1959 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 1960 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1961 },
Steven Cooreman 8840:b3359e09c86e 1962 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1963 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1964 "value": "48000000",
Steven Cooreman 8840:b3359e09c86e 1965 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1966 },
Steven Cooreman 8840:b3359e09c86e 1967 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1968 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1969 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 1970 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1971 },
Steven Cooreman 8840:b3359e09c86e 1972 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1973 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1974 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 1975 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1976 },
Steven Cooreman 8840:b3359e09c86e 1977 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1978 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 1979 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 1980 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1981 },
Steven Cooreman 8840:b3359e09c86e 1982 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 1983 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 1984 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 1985 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 9277:9462343558a3 1986 },
Steven Cooreman 9277:9462343558a3 1987 "board_controller_enable": {
Steven Cooreman 9277:9462343558a3 1988 "help": "Pin to pull high for enabling the USB serial port",
Steven Cooreman 9277:9462343558a3 1989 "value": "PF7",
Steven Cooreman 9277:9462343558a3 1990 "macro_name": "EFM_BC_EN"
Steven Cooreman 8840:b3359e09c86e 1991 }
Steven Cooreman 8840:b3359e09c86e 1992 }
Steven Cooreman 8832:bb5076d1eadc 1993 },
Steven Cooreman 8832:bb5076d1eadc 1994 "EFM32WG990F256": {
Steven Cooreman 8832:bb5076d1eadc 1995 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 1996 "extra_labels_add": ["EFM32WG", "256K"],
Steven Cooreman 8832:bb5076d1eadc 1997 "core": "Cortex-M4F",
Steven Cooreman 8832:bb5076d1eadc 1998 "macros": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Steven Cooreman 8832:bb5076d1eadc 1999 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 2000 "release_versions": ["2", "5"],
Steven Cooreman 8832:bb5076d1eadc 2001 "device_name": "EFM32WG990F256",
Steven Cooreman 8832:bb5076d1eadc 2002 "public": false
Christopher Haster 8332:5fce745004b6 2003 },
Christopher Haster 8332:5fce745004b6 2004 "EFM32WG_STK3800": {
Steven Cooreman 8832:bb5076d1eadc 2005 "inherits": ["EFM32WG990F256"],
Christopher Haster 8332:5fce745004b6 2006 "progen": {"target": "efm32wg-stk"},
Christopher Haster 8332:5fce745004b6 2007 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2008 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 2009 "config": {
Steven Cooreman 8840:b3359e09c86e 2010 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2011 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2012 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 2013 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2014 },
Steven Cooreman 8840:b3359e09c86e 2015 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2016 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2017 "value": "48000000",
Steven Cooreman 8840:b3359e09c86e 2018 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2019 },
Steven Cooreman 8840:b3359e09c86e 2020 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2021 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2022 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 2023 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2024 },
Steven Cooreman 8840:b3359e09c86e 2025 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2026 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2027 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 2028 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2029 },
Steven Cooreman 8840:b3359e09c86e 2030 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2031 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 2032 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 2033 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2034 },
Steven Cooreman 8840:b3359e09c86e 2035 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 2036 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 2037 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 2038 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 9277:9462343558a3 2039 },
Steven Cooreman 9277:9462343558a3 2040 "board_controller_enable": {
Steven Cooreman 9277:9462343558a3 2041 "help": "Pin to pull high for enabling the USB serial port",
Steven Cooreman 9277:9462343558a3 2042 "value": "PF7",
Steven Cooreman 9277:9462343558a3 2043 "macro_name": "EFM_BC_EN"
Steven Cooreman 8840:b3359e09c86e 2044 }
Steven Cooreman 8840:b3359e09c86e 2045 }
Christopher Haster 8332:5fce745004b6 2046 },
Steven Cooreman 8832:bb5076d1eadc 2047 "EFM32ZG222F32": {
Steven Cooreman 8832:bb5076d1eadc 2048 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 2049 "extra_labels_add": ["EFM32ZG", "32K"],
Christopher Haster 8332:5fce745004b6 2050 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2051 "default_toolchain": "uARM",
Steven Cooreman 8832:bb5076d1eadc 2052 "macros": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
Christopher Haster 8332:5fce745004b6 2053 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Steven Cooreman 8832:bb5076d1eadc 2054 "default_lib": "small",
Steven Cooreman 8832:bb5076d1eadc 2055 "release_versions": ["2"],
Steven Cooreman 8832:bb5076d1eadc 2056 "device_name": "EFM32ZG222F32",
Steven Cooreman 8832:bb5076d1eadc 2057 "public": false
Steven Cooreman 8832:bb5076d1eadc 2058 },
Steven Cooreman 8832:bb5076d1eadc 2059 "EFM32ZG_STK3200": {
Steven Cooreman 8832:bb5076d1eadc 2060 "inherits": ["EFM32ZG222F32"],
Christopher Haster 8332:5fce745004b6 2061 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2062 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 2063 "config": {
Steven Cooreman 8840:b3359e09c86e 2064 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2065 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2066 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 2067 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2068 },
Steven Cooreman 8840:b3359e09c86e 2069 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2070 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2071 "value": "24000000",
Steven Cooreman 8840:b3359e09c86e 2072 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2073 },
Steven Cooreman 8840:b3359e09c86e 2074 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2075 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2076 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 2077 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2078 },
Steven Cooreman 8840:b3359e09c86e 2079 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2080 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2081 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 2082 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2083 },
Steven Cooreman 8840:b3359e09c86e 2084 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2085 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 2086 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 2087 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2088 },
Steven Cooreman 8840:b3359e09c86e 2089 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 2090 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 2091 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 2092 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 9277:9462343558a3 2093 },
Steven Cooreman 9277:9462343558a3 2094 "board_controller_enable": {
Steven Cooreman 9277:9462343558a3 2095 "help": "Pin to pull high for enabling the USB serial port",
Steven Cooreman 9277:9462343558a3 2096 "value": "PA9",
Steven Cooreman 9277:9462343558a3 2097 "macro_name": "EFM_BC_EN"
Steven Cooreman 8840:b3359e09c86e 2098 }
Steven Cooreman 8840:b3359e09c86e 2099 }
Christopher Haster 8332:5fce745004b6 2100 },
Steven Cooreman 8832:bb5076d1eadc 2101 "EFM32HG322F64": {
Steven Cooreman 8832:bb5076d1eadc 2102 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 2103 "extra_labels_add": ["EFM32HG", "64K"],
Christopher Haster 8332:5fce745004b6 2104 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2105 "default_toolchain": "uARM",
Steven Cooreman 8832:bb5076d1eadc 2106 "macros": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
Christopher Haster 8332:5fce745004b6 2107 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Steven Cooreman 8832:bb5076d1eadc 2108 "default_lib": "small",
Steven Cooreman 8832:bb5076d1eadc 2109 "release_versions": ["2"],
Steven Cooreman 8832:bb5076d1eadc 2110 "device_name": "EFM32HG322F64",
Steven Cooreman 8832:bb5076d1eadc 2111 "public": false
Steven Cooreman 8832:bb5076d1eadc 2112 },
Steven Cooreman 8832:bb5076d1eadc 2113 "EFM32HG_STK3400": {
Steven Cooreman 8832:bb5076d1eadc 2114 "inherits": ["EFM32HG322F64"],
Christopher Haster 8332:5fce745004b6 2115 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2116 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 2117 "config": {
Steven Cooreman 8840:b3359e09c86e 2118 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2119 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2120 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 2121 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2122 },
Steven Cooreman 8840:b3359e09c86e 2123 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2124 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2125 "value": "24000000",
Steven Cooreman 8840:b3359e09c86e 2126 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2127 },
Steven Cooreman 8840:b3359e09c86e 2128 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2129 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2130 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 2131 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2132 },
Steven Cooreman 8840:b3359e09c86e 2133 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2134 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2135 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 2136 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2137 },
Steven Cooreman 8840:b3359e09c86e 2138 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2139 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 2140 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 2141 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2142 },
Steven Cooreman 8840:b3359e09c86e 2143 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 2144 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 2145 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 2146 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 9277:9462343558a3 2147 },
Steven Cooreman 9277:9462343558a3 2148 "board_controller_enable": {
Steven Cooreman 9277:9462343558a3 2149 "help": "Pin to pull high for enabling the USB serial port",
Steven Cooreman 9277:9462343558a3 2150 "value": "PA9",
Steven Cooreman 9277:9462343558a3 2151 "macro_name": "EFM_BC_EN"
Steven Cooreman 8840:b3359e09c86e 2152 }
Steven Cooreman 8840:b3359e09c86e 2153 }
Steven Cooreman 8832:bb5076d1eadc 2154 },
Steven Cooreman 8832:bb5076d1eadc 2155 "EFM32PG1B100F256GM32": {
Steven Cooreman 8832:bb5076d1eadc 2156 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 2157 "extra_labels_add": ["EFM32PG", "256K"],
Steven Cooreman 8832:bb5076d1eadc 2158 "core": "Cortex-M4F",
Steven Cooreman 8832:bb5076d1eadc 2159 "macros": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Steven Cooreman 8832:bb5076d1eadc 2160 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Steven Cooreman 8832:bb5076d1eadc 2161 "release_versions": ["2", "5"],
Steven Cooreman 8832:bb5076d1eadc 2162 "device_name": "EFM32PG1B100F256GM32",
Steven Cooreman 8832:bb5076d1eadc 2163 "public": false
Christopher Haster 8332:5fce745004b6 2164 },
Christopher Haster 8332:5fce745004b6 2165 "EFM32PG_STK3401": {
Steven Cooreman 8832:bb5076d1eadc 2166 "inherits": ["EFM32PG1B100F256GM32"],
Christopher Haster 8332:5fce745004b6 2167 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2168 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 2169 "config": {
Steven Cooreman 8840:b3359e09c86e 2170 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2171 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2172 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 2173 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2174 },
Steven Cooreman 8840:b3359e09c86e 2175 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2176 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2177 "value": "40000000",
Steven Cooreman 8840:b3359e09c86e 2178 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2179 },
Steven Cooreman 8840:b3359e09c86e 2180 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2181 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2182 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 2183 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2184 },
Steven Cooreman 8840:b3359e09c86e 2185 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2186 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2187 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 2188 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2189 },
Steven Cooreman 8840:b3359e09c86e 2190 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2191 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 2192 "value": "32000000",
Steven Cooreman 8840:b3359e09c86e 2193 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2194 },
Steven Cooreman 8840:b3359e09c86e 2195 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 2196 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 2197 "value": "cmuHFRCOFreq_32M0Hz",
Steven Cooreman 8840:b3359e09c86e 2198 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 9277:9462343558a3 2199 },
Steven Cooreman 9277:9462343558a3 2200 "board_controller_enable": {
Steven Cooreman 9277:9462343558a3 2201 "help": "Pin to pull high for enabling the USB serial port",
Steven Cooreman 9277:9462343558a3 2202 "value": "PA5",
Steven Cooreman 9277:9462343558a3 2203 "macro_name": "EFM_BC_EN"
Steven Cooreman 8840:b3359e09c86e 2204 }
Steven Cooreman 8840:b3359e09c86e 2205 }
Christopher Haster 8332:5fce745004b6 2206 },
Steven Cooreman 9285:f8486644de3c 2207 "EFR32MG1P132F256GM48": {
Steven Cooreman 9279:7cddb9c73c67 2208 "inherits": ["EFM32"],
Steven Cooreman 9291:fd73a36df92c 2209 "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL"],
Steven Cooreman 9279:7cddb9c73c67 2210 "core": "Cortex-M4F",
Steven Cooreman 9285:f8486644de3c 2211 "macros": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Steven Cooreman 9279:7cddb9c73c67 2212 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Steven Cooreman 9279:7cddb9c73c67 2213 "release_versions": ["2", "5"],
Steven Cooreman 9285:f8486644de3c 2214 "device_name": "EFR32MG1P132F256GM48",
Steven Cooreman 9279:7cddb9c73c67 2215 "public": false
Steven Cooreman 9279:7cddb9c73c67 2216 },
Steven Cooreman 9279:7cddb9c73c67 2217 "EFR32MG1P233F256GM48": {
Steven Cooreman 9279:7cddb9c73c67 2218 "inherits": ["EFM32"],
Steven Cooreman 9291:fd73a36df92c 2219 "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL"],
Steven Cooreman 9279:7cddb9c73c67 2220 "core": "Cortex-M4F",
Steven Cooreman 9279:7cddb9c73c67 2221 "macros": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Steven Cooreman 9279:7cddb9c73c67 2222 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Steven Cooreman 9279:7cddb9c73c67 2223 "release_versions": ["2", "5"],
Steven Cooreman 9279:7cddb9c73c67 2224 "device_name": "EFR32MG1P233F256GM48",
Steven Cooreman 9279:7cddb9c73c67 2225 "public": false
Steven Cooreman 9279:7cddb9c73c67 2226 },
Steven Cooreman 9279:7cddb9c73c67 2227 "EFR32MG1_BRD4150": {
Steven Cooreman 9285:f8486644de3c 2228 "inherits": ["EFR32MG1P132F256GM48"],
Steven Cooreman 9279:7cddb9c73c67 2229 "device_has": ["AES", "SHA", "ECC", "SL_PTI", "RF_2P4GHZ", "RF_SUBGHZ", "ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Steven Cooreman 9279:7cddb9c73c67 2230 "forced_reset_timeout": 2,
Steven Cooreman 9279:7cddb9c73c67 2231 "config": {
Steven Cooreman 9279:7cddb9c73c67 2232 "hf_clock_src": {
Steven Cooreman 9279:7cddb9c73c67 2233 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 9279:7cddb9c73c67 2234 "value": "HFXO",
Steven Cooreman 9279:7cddb9c73c67 2235 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 9279:7cddb9c73c67 2236 },
Steven Cooreman 9279:7cddb9c73c67 2237 "hfxo_clock_freq": {
Steven Cooreman 9279:7cddb9c73c67 2238 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 9279:7cddb9c73c67 2239 "value": "38400000",
Steven Cooreman 9279:7cddb9c73c67 2240 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 9279:7cddb9c73c67 2241 },
Steven Cooreman 9279:7cddb9c73c67 2242 "lf_clock_src": {
Steven Cooreman 9279:7cddb9c73c67 2243 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 9279:7cddb9c73c67 2244 "value": "LFXO",
Steven Cooreman 9279:7cddb9c73c67 2245 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 9279:7cddb9c73c67 2246 },
Steven Cooreman 9279:7cddb9c73c67 2247 "lfxo_clock_freq": {
Steven Cooreman 9279:7cddb9c73c67 2248 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 9279:7cddb9c73c67 2249 "value": "32768",
Steven Cooreman 9279:7cddb9c73c67 2250 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 9279:7cddb9c73c67 2251 },
Steven Cooreman 9279:7cddb9c73c67 2252 "hfrco_clock_freq": {
Steven Cooreman 9279:7cddb9c73c67 2253 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 9279:7cddb9c73c67 2254 "value": "32000000",
Steven Cooreman 9279:7cddb9c73c67 2255 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 9279:7cddb9c73c67 2256 },
Steven Cooreman 9279:7cddb9c73c67 2257 "hfrco_band_select": {
Steven Cooreman 9279:7cddb9c73c67 2258 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 9279:7cddb9c73c67 2259 "value": "cmuHFRCOFreq_32M0Hz",
Steven Cooreman 9279:7cddb9c73c67 2260 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 9279:7cddb9c73c67 2261 },
Steven Cooreman 9279:7cddb9c73c67 2262 "board_controller_enable": {
Steven Cooreman 9279:7cddb9c73c67 2263 "help": "Pin to pull high for enabling the USB serial port",
Steven Cooreman 9279:7cddb9c73c67 2264 "value": "PA5",
Steven Cooreman 9279:7cddb9c73c67 2265 "macro_name": "EFM_BC_EN"
Steven Cooreman 9279:7cddb9c73c67 2266 }
Steven Cooreman 9279:7cddb9c73c67 2267 },
Steven Cooreman 9279:7cddb9c73c67 2268 "public": false
Steven Cooreman 9279:7cddb9c73c67 2269 },
Steven Cooreman 9279:7cddb9c73c67 2270 "THUNDERBOARD_SENSE": {
Steven Cooreman 9279:7cddb9c73c67 2271 "inherits": ["EFR32MG1P233F256GM48"],
Steven Cooreman 9279:7cddb9c73c67 2272 "device_has": ["AES", "SHA", "ECC", "SL_PTI", "RF_2P4GHZ", "ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Steven Cooreman 9285:f8486644de3c 2273 "forced_reset_timeout": 5,
Steven Cooreman 9279:7cddb9c73c67 2274 "config": {
Steven Cooreman 9279:7cddb9c73c67 2275 "hf_clock_src": {
Steven Cooreman 9279:7cddb9c73c67 2276 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 9279:7cddb9c73c67 2277 "value": "HFXO",
Steven Cooreman 9279:7cddb9c73c67 2278 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 9279:7cddb9c73c67 2279 },
Steven Cooreman 9279:7cddb9c73c67 2280 "hfxo_clock_freq": {
Steven Cooreman 9279:7cddb9c73c67 2281 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 9279:7cddb9c73c67 2282 "value": "38400000",
Steven Cooreman 9279:7cddb9c73c67 2283 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 9279:7cddb9c73c67 2284 },
Steven Cooreman 9279:7cddb9c73c67 2285 "lf_clock_src": {
Steven Cooreman 9279:7cddb9c73c67 2286 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 9279:7cddb9c73c67 2287 "value": "LFXO",
Steven Cooreman 9279:7cddb9c73c67 2288 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 9279:7cddb9c73c67 2289 },
Steven Cooreman 9279:7cddb9c73c67 2290 "lfxo_clock_freq": {
Steven Cooreman 9279:7cddb9c73c67 2291 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 9279:7cddb9c73c67 2292 "value": "32768",
Steven Cooreman 9279:7cddb9c73c67 2293 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 9279:7cddb9c73c67 2294 },
Steven Cooreman 9279:7cddb9c73c67 2295 "hfrco_clock_freq": {
Steven Cooreman 9279:7cddb9c73c67 2296 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 9279:7cddb9c73c67 2297 "value": "32000000",
Steven Cooreman 9279:7cddb9c73c67 2298 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 9279:7cddb9c73c67 2299 },
Steven Cooreman 9279:7cddb9c73c67 2300 "hfrco_band_select": {
Steven Cooreman 9279:7cddb9c73c67 2301 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 9279:7cddb9c73c67 2302 "value": "cmuHFRCOFreq_32M0Hz",
Steven Cooreman 9279:7cddb9c73c67 2303 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 8840:b3359e09c86e 2304 }
Steven Cooreman 8840:b3359e09c86e 2305 }
Christopher Haster 8332:5fce745004b6 2306 },
Christopher Haster 8332:5fce745004b6 2307 "WIZWIKI_W7500": {
Christopher Haster 8332:5fce745004b6 2308 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2309 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 2310 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
Christopher Haster 8332:5fce745004b6 2311 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 2312 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2313 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2314 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 2315 },
Christopher Haster 8332:5fce745004b6 2316 "WIZWIKI_W7500P": {
Christopher Haster 8332:5fce745004b6 2317 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2318 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 2319 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
Christopher Haster 8332:5fce745004b6 2320 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 2321 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2322 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2323 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 2324 },
Christopher Haster 8332:5fce745004b6 2325 "WIZWIKI_W7500ECO": {
Christopher Haster 8332:5fce745004b6 2326 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2327 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 2328 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
Christopher Haster 8332:5fce745004b6 2329 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 2330 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2331 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 2332 },
Christopher Haster 8332:5fce745004b6 2333 "SAMR21G18A": {
Christopher Haster 8332:5fce745004b6 2334 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2335 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2336 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2337 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
Christopher Haster 8332:5fce745004b6 2338 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 2339 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2340 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 2341 "device_name": "ATSAMR21G18A"
Christopher Haster 8332:5fce745004b6 2342 },
Christopher Haster 8332:5fce745004b6 2343 "SAMD21J18A": {
Christopher Haster 8332:5fce745004b6 2344 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2345 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2346 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2347 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 2348 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 2349 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2350 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 2351 "device_name" : "ATSAMD21J18A"
Christopher Haster 8332:5fce745004b6 2352 },
Christopher Haster 8332:5fce745004b6 2353 "SAMD21G18A": {
Christopher Haster 8332:5fce745004b6 2354 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2355 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2356 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2357 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 2358 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 2359 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2360 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 2361 "device_name": "ATSAMD21G18A"
Christopher Haster 8332:5fce745004b6 2362 },
Christopher Haster 8332:5fce745004b6 2363 "SAML21J18A": {
Christopher Haster 8332:5fce745004b6 2364 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2365 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2366 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2367 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
Christopher Haster 8332:5fce745004b6 2368 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Sarah Marsh 8472:da9bd832dfd1 2369 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2370 "device_name": "ATSAML21J18A"
Christopher Haster 8332:5fce745004b6 2371 },
Christopher Haster 8332:5fce745004b6 2372 "SAMG55J19": {
Christopher Haster 8332:5fce745004b6 2373 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2374 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 2375 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
Christopher Haster 8332:5fce745004b6 2376 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2377 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 2378 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 2379 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2380 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 2381 "device_name": "ATSAMG55J19"
Christopher Haster 8332:5fce745004b6 2382 },
Christopher Haster 8332:5fce745004b6 2383 "MCU_NRF51_UNIFIED": {
Christopher Haster 8332:5fce745004b6 2384 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2385 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 2386 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 2387 "macros": [
Christopher Haster 8332:5fce745004b6 2388 "NRF51",
Christopher Haster 8332:5fce745004b6 2389 "TARGET_NRF51822",
Christopher Haster 8332:5fce745004b6 2390 "BLE_STACK_SUPPORT_REQD",
Christopher Haster 8332:5fce745004b6 2391 "SOFTDEVICE_PRESENT",
Christopher Haster 8332:5fce745004b6 2392 "S130",
Christopher Haster 8332:5fce745004b6 2393 "TARGET_MCU_NRF51822"
Christopher Haster 8332:5fce745004b6 2394 ],
Christopher Haster 8332:5fce745004b6 2395 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 2396 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
Christopher Haster 8332:5fce745004b6 2397 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 2398 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2399 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2400 "public": false,
Christopher Haster 8332:5fce745004b6 2401 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 2402 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 2403 {
Christopher Haster 8332:5fce745004b6 2404 "boot": "",
Christopher Haster 8332:5fce745004b6 2405 "name": "s130_nrf51_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 2406 "offset": 110592
Christopher Haster 8332:5fce745004b6 2407 }
Christopher Haster 8332:5fce745004b6 2408 ],
Christopher Haster 8332:5fce745004b6 2409 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 2410 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 2411 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 2412 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 2413 },
Christopher Haster 8332:5fce745004b6 2414 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 2415 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 2416 "config": {
Christopher Haster 8332:5fce745004b6 2417 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 2418 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 2419 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 2420 },
Christopher Haster 8332:5fce745004b6 2421 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 2422 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 2423 "value": 1,
Christopher Haster 8332:5fce745004b6 2424 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 2425 }
Christopher Haster 8332:5fce745004b6 2426 },
Christopher Haster 8332:5fce745004b6 2427 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 2428 },
Christopher Haster 8332:5fce745004b6 2429 "MCU_NRF51_32K_UNIFIED": {
Christopher Haster 8332:5fce745004b6 2430 "inherits": ["MCU_NRF51_UNIFIED"],
Christopher Haster 8332:5fce745004b6 2431 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 2432 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 2433 "public": false
Christopher Haster 8332:5fce745004b6 2434 },
Christopher Haster 8332:5fce745004b6 2435 "NRF51_DK": {
Christopher Haster 8332:5fce745004b6 2436 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2437 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Andrzej Puzdrowski 8742:ea949d3ba022 2438 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 2439 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 2440 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 2441 },
Christopher Haster 8332:5fce745004b6 2442 "NRF51_DONGLE": {
Christopher Haster 8332:5fce745004b6 2443 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 2444 "progen": {"target": "nrf51-dongle"},
Mahadevan Mahesh 8366:70aeab6c7eb7 2445 "device_has": ["ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 2446 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 2447 },
Christopher Haster 8332:5fce745004b6 2448 "MCU_NRF52": {
Christopher Haster 8332:5fce745004b6 2449 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2450 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 2451 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
Christopher Haster 8332:5fce745004b6 2452 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
Christopher Haster 8332:5fce745004b6 2453 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 2454 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2455 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2456 "public": false,
Christopher Haster 8332:5fce745004b6 2457 "detect_code": ["1101"],
Christopher Haster 8332:5fce745004b6 2458 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 2459 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 2460 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 2461 {
Christopher Haster 8332:5fce745004b6 2462 "boot": "",
Christopher Haster 8332:5fce745004b6 2463 "name": "s132_nrf52_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 2464 "offset": 114688
Christopher Haster 8332:5fce745004b6 2465 }
Christopher Haster 8332:5fce745004b6 2466 ],
Christopher Haster 8332:5fce745004b6 2467 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 2468 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 2469 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 2470 },
Christopher Haster 8332:5fce745004b6 2471 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 2472 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 2473 "config": {
Christopher Haster 8332:5fce745004b6 2474 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 2475 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 2476 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 2477 },
Christopher Haster 8332:5fce745004b6 2478 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 2479 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 2480 "value": 1,
Christopher Haster 8332:5fce745004b6 2481 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 2482 }
Christopher Haster 8332:5fce745004b6 2483 }
Christopher Haster 8332:5fce745004b6 2484 },
Christopher Haster 8332:5fce745004b6 2485 "NRF52_DK": {
Christopher Haster 8332:5fce745004b6 2486 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2487 "inherits": ["MCU_NRF52"],
Sarah Marsh 8472:da9bd832dfd1 2488 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Andrzej Puzdrowski 8742:ea949d3ba022 2489 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2490 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 2491 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2492 },
Michael Ammann 9240:b619ddc526ac 2493 "UBLOX_EVA_NINA": {
Michael Ammann 9240:b619ddc526ac 2494 "inherits": ["MCU_NRF52"],
Michael Ammann 9240:b619ddc526ac 2495 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Michael Ammann 9471:719a1cf54148 2496 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Michael Ammann 9240:b619ddc526ac 2497 "release_versions": ["2", "5"],
Michael Ammann 9471:719a1cf54148 2498 "overrides": {"uart_hwfc": 0},
Michael Ammann 9471:719a1cf54148 2499 "device_name": "nRF52832_xxAA"
Michael Ammann 9471:719a1cf54148 2500 },
Michael Ammann 9471:719a1cf54148 2501 "UBLOX_EVK_NINA_B1": {
Michael Ammann 9471:719a1cf54148 2502 "supported_form_factors": ["ARDUINO"],
Michael Ammann 9471:719a1cf54148 2503 "inherits": ["MCU_NRF52"],
Michael Ammann 9471:719a1cf54148 2504 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Michael Ammann 9471:719a1cf54148 2505 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Michael Ammann 9471:719a1cf54148 2506 "release_versions": ["2", "5"],
Michael Ammann 9240:b619ddc526ac 2507 "device_name": "nRF52832_xxAA"
Michael Ammann 9240:b619ddc526ac 2508 },
Christopher Haster 8332:5fce745004b6 2509 "DELTA_DFBM_NQ620": {
Christopher Haster 8332:5fce745004b6 2510 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2511 "inherits": ["MCU_NRF52"],
Christopher Haster 8332:5fce745004b6 2512 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Christopher Haster 8332:5fce745004b6 2513 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2514 "release_versions": ["2", "5"],
Mahadevan Mahesh 9469:ab0aa3b9a6a2 2515 "overrides": {"lf_clock_src": "NRF_LF_SRC_RC"},
Sarah Marsh 8507:29edfac555c0 2516 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2517 },
Christopher Haster 8332:5fce745004b6 2518 "BLUEPILL_F103C8": {
Christopher Haster 8332:5fce745004b6 2519 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2520 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 2521 "extra_labels": ["STM", "STM32F1", "STM32F103C8"],
Christopher Haster 8332:5fce745004b6 2522 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 2523 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2524 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 2525 },
Christopher Haster 8332:5fce745004b6 2526 "NUMAKER_PFM_NUC472": {
Christopher Haster 8332:5fce745004b6 2527 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 2528 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 2529 "extra_labels": ["NUVOTON", "NUC472", "NUMAKER_PFM_NUC472"],
Christopher Haster 8332:5fce745004b6 2530 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2531 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2532 "inherits": ["Target"],
ccli8 9035:5a46830c3513 2533 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN"],
Christopher Haster 8342:520d28b41ea4 2534 "features": ["LWIP"],
0xc0170 8858:c8c6eb85a4ad 2535 "release_versions": ["5"],
Sarah Marsh 8472:da9bd832dfd1 2536 "device_name": "NUC472HI8AE"
Mahadevan Mahesh 8366:70aeab6c7eb7 2537 },
Christopher Haster 8332:5fce745004b6 2538 "NCS36510": {
Christopher Haster 8332:5fce745004b6 2539 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2540 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2541 "extra_labels": ["ONSEMI"],
Radhika 9051:ec9ae79ecd92 2542 "config": {
Radhika 9051:ec9ae79ecd92 2543 "mac-addr-low": {
Radhika 9052:9664d491fdd1 2544 "help": "Lower 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
Radhika 9052:9664d491fdd1 2545 "value": "0xFFFFFFFF"
Radhika 9051:ec9ae79ecd92 2546 },
Radhika 9051:ec9ae79ecd92 2547 "mac-addr-high": {
Radhika 9052:9664d491fdd1 2548 "help": "Higher 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
Radhika 9052:9664d491fdd1 2549 "value": "0xFFFFFFFF"
Radhika 9051:ec9ae79ecd92 2550 },
Radhika 9051:ec9ae79ecd92 2551 "32KHz-clk-trim": {
Radhika 9051:ec9ae79ecd92 2552 "help": "32KHz clock trim",
Radhika 9052:9664d491fdd1 2553 "value": "0x39"
Radhika 9051:ec9ae79ecd92 2554 },
Radhika 9051:ec9ae79ecd92 2555 "32MHz-clk-trim": {
Radhika 9051:ec9ae79ecd92 2556 "help": "32MHz clock trim",
Radhika 9052:9664d491fdd1 2557 "value": "0x17"
Radhika 9051:ec9ae79ecd92 2558 },
Radhika 9051:ec9ae79ecd92 2559 "rssi-trim": {
Radhika 9051:ec9ae79ecd92 2560 "help": "RSSI trim",
Radhika 9051:ec9ae79ecd92 2561 "value": "0x3D"
Radhika 9051:ec9ae79ecd92 2562 },
Radhika 9051:ec9ae79ecd92 2563 "txtune-trim": {
Radhika 9051:ec9ae79ecd92 2564 "help": "TX tune trim",
Radhika 9052:9664d491fdd1 2565 "value": "0xFFFFFFFF"
Radhika 9051:ec9ae79ecd92 2566 }
Radhika 9051:ec9ae79ecd92 2567 },
Christopher Haster 8332:5fce745004b6 2568 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
pradeep-gr 8861:42cabe489c4c 2569 "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
Christopher Haster 8332:5fce745004b6 2570 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
pradeep-gr 8860:235d4297bba6 2571 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER", "TRNG"],
maclobdell 8732:4166825f6c3c 2572 "device_name": "NCS36510",
Christopher Haster 8332:5fce745004b6 2573 "release_versions": ["2", "5"]
ccli8 8611:5441db5ff596 2574 },
ccli8 8611:5441db5ff596 2575 "NUMAKER_PFM_M453": {
ccli8 8611:5441db5ff596 2576 "core": "Cortex-M4F",
ccli8 8611:5441db5ff596 2577 "default_toolchain": "ARM",
ccli8 8611:5441db5ff596 2578 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453"],
ccli8 8611:5441db5ff596 2579 "is_disk_virtual": true,
ccli8 8611:5441db5ff596 2580 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
ccli8 8611:5441db5ff596 2581 "inherits": ["Target"],
ccli8 8611:5441db5ff596 2582 "progen": {"target": "numaker-pfm-m453"},
ccli8 9035:5a46830c3513 2583 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN"],
ccli8 8644:79863cfcbbb0 2584 "release_versions": ["2", "5"],
ccli8 8644:79863cfcbbb0 2585 "device_name": "M453VG6AE"
Rob Meades 8783:357c3fdee746 2586 },
Rob Meades 8783:357c3fdee746 2587 "HI2110": {
Rob Meades 8783:357c3fdee746 2588 "inherits": ["Target"],
Rob Meades 8783:357c3fdee746 2589 "core": "Cortex-M0",
Rob Meades 8783:357c3fdee746 2590 "default_toolchain": "GCC_ARM",
Rob Meades 8783:357c3fdee746 2591 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Rob Meades 8783:357c3fdee746 2592 "extra_labels": ["ublox"],
Rob Meades 8783:357c3fdee746 2593 "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1"],
Rob Meades 8783:357c3fdee746 2594 "public": false,
Rob Meades 8783:357c3fdee746 2595 "target_overrides": {
Rob Meades 8783:357c3fdee746 2596 "*": {
Rob Meades 8783:357c3fdee746 2597 "core.stdio-flush-at-exit": false
Rob Meades 8783:357c3fdee746 2598 }
Rob Meades 8783:357c3fdee746 2599 },
Rob Meades 8783:357c3fdee746 2600 "device_has": ["INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"],
Rob Meades 8783:357c3fdee746 2601 "default_lib": "std",
Rob Meades 8783:357c3fdee746 2602 "release_versions": ["5"]
Rob Meades 8783:357c3fdee746 2603 },
Rob Meades 8783:357c3fdee746 2604 "SARA_NBIOT": {
Rob Meades 8783:357c3fdee746 2605 "inherits": ["HI2110"],
Rob Meades 8783:357c3fdee746 2606 "extra_labels": ["ublox", "HI2110"],
Rob Meades 8783:357c3fdee746 2607 "public": false
Rob Meades 8783:357c3fdee746 2608 },
Rob Meades 8783:357c3fdee746 2609 "SARA_NBIOT_EVK": {
Rob Meades 8783:357c3fdee746 2610 "inherits": ["SARA_NBIOT"],
Rob Meades 8783:357c3fdee746 2611 "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
ccli8 8611:5441db5ff596 2612 }
Christopher Haster 8332:5fce745004b6 2613 }