ST / ST_Events-old

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Dependents:   HelloWorld_CCA01M1 HelloWorld_CCA02M1 CI-data-logger-server HelloWorld_CCA02M1 ... more

This is a fork of the events subdirectory of https://github.com/ARMmbed/mbed-os.

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targets/targets.json@9236:9611414db999, 2016-11-15 (annotated)

Committer:
Laurent MEUNIER
Date:
Tue Nov 15 09:55:03 2016 +0100
Revision:
9236:9611414db999
Parent:
9053:9c5625788368
Child:
9237:06e2fa51cd3c
[stm32] Enable SPI_ASYNCH for L0 and L1 families

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Christopher Haster 8332:5fce745004b6 1 {
Christopher Haster 8332:5fce745004b6 2 "Target": {
Christopher Haster 8332:5fce745004b6 3 "core": null,
Christopher Haster 8332:5fce745004b6 4 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 5 "supported_toolchains": null,
Christopher Haster 8332:5fce745004b6 6 "extra_labels": [],
Christopher Haster 8332:5fce745004b6 7 "is_disk_virtual": false,
Christopher Haster 8332:5fce745004b6 8 "macros": [],
Christopher Haster 8332:5fce745004b6 9 "device_has": [],
Christopher Haster 8332:5fce745004b6 10 "features": [],
Christopher Haster 8332:5fce745004b6 11 "detect_code": [],
Christopher Haster 8332:5fce745004b6 12 "public": false,
Christopher Haster 8332:5fce745004b6 13 "default_lib": "std"
Christopher Haster 8332:5fce745004b6 14 },
Jimmy Brisson 8524:ddc94648bd40 15 "Super_Target": {
Jimmy Brisson 8524:ddc94648bd40 16 "inherits": ["Target"],
Jimmy Brisson 8524:ddc94648bd40 17 "core": "Cortex-M4",
Jimmy Brisson 8527:7bb374e8c313 18 "features_add": ["UVISOR", "BLE", "CLIENT", "IPV4", "IPV6"],
Jimmy Brisson 8527:7bb374e8c313 19 "supported_toolchains": ["ARM"]
Jimmy Brisson 8524:ddc94648bd40 20 },
Christopher Haster 8332:5fce745004b6 21 "CM4_UARM": {
Christopher Haster 8332:5fce745004b6 22 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 23 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 24 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 25 "public": false,
Christopher Haster 8332:5fce745004b6 26 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 27 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 28 },
Christopher Haster 8332:5fce745004b6 29 "CM4_ARM": {
Christopher Haster 8332:5fce745004b6 30 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 31 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 32 "public": false,
Christopher Haster 8332:5fce745004b6 33 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 34 },
Christopher Haster 8332:5fce745004b6 35 "CM4F_UARM": {
Christopher Haster 8332:5fce745004b6 36 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 37 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 38 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 39 "public": false,
Christopher Haster 8332:5fce745004b6 40 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 41 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 42 },
Christopher Haster 8332:5fce745004b6 43 "CM4F_ARM": {
Christopher Haster 8332:5fce745004b6 44 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 45 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 46 "public": false,
Christopher Haster 8332:5fce745004b6 47 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 48 },
Christopher Haster 8332:5fce745004b6 49 "LPCTarget": {
Christopher Haster 8332:5fce745004b6 50 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 51 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
Christopher Haster 8332:5fce745004b6 52 "public": false
Christopher Haster 8332:5fce745004b6 53 },
Christopher Haster 8332:5fce745004b6 54 "LPC11C24": {
Christopher Haster 8332:5fce745004b6 55 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 56 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 57 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
Christopher Haster 8332:5fce745004b6 58 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 59 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 60 "device_name": "LPC11C24FBD48/301"
Christopher Haster 8332:5fce745004b6 61 },
Christopher Haster 8332:5fce745004b6 62 "LPC1114": {
Christopher Haster 8332:5fce745004b6 63 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 64 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 65 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 66 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
Christopher Haster 8332:5fce745004b6 67 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 68 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 69 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 70 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 71 "device_name": "LPC1114FN28/102"
Christopher Haster 8332:5fce745004b6 72 },
Christopher Haster 8332:5fce745004b6 73 "LPC11U24": {
Christopher Haster 8332:5fce745004b6 74 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 75 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 76 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 77 "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
Christopher Haster 8332:5fce745004b6 78 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 79 "detect_code": ["1040"],
Christopher Haster 8332:5fce745004b6 80 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 81 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 82 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 83 "device_name": "LPC11U24FBD48/401"
Christopher Haster 8332:5fce745004b6 84 },
Christopher Haster 8332:5fce745004b6 85 "OC_MBUINO": {
Christopher Haster 8332:5fce745004b6 86 "inherits": ["LPC11U24"],
Christopher Haster 8332:5fce745004b6 87 "macros": ["TARGET_LPC11U24"],
Christopher Haster 8332:5fce745004b6 88 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 89 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 90 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 91 },
Christopher Haster 8332:5fce745004b6 92 "LPC11U24_301": {
Christopher Haster 8332:5fce745004b6 93 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 94 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 95 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 96 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 97 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 98 "device_name": "LPC11U24FHI33/301"
Christopher Haster 8332:5fce745004b6 99 },
Christopher Haster 8332:5fce745004b6 100 "LPC11U34_421": {
Christopher Haster 8332:5fce745004b6 101 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 102 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 103 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 104 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 105 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 106 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 107 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 108 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 109 },
Christopher Haster 8332:5fce745004b6 110 "MICRONFCBOARD": {
Christopher Haster 8332:5fce745004b6 111 "inherits": ["LPC11U34_421"],
Christopher Haster 8332:5fce745004b6 112 "macros": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
Christopher Haster 8332:5fce745004b6 113 "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
Sarah Marsh 8472:da9bd832dfd1 114 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 115 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 116 },
Christopher Haster 8332:5fce745004b6 117 "LPC11U35_401": {
Christopher Haster 8332:5fce745004b6 118 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 119 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 120 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 121 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 122 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 123 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 124 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 125 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 126 "device_name": "LPC11U35FBD48/401"
Christopher Haster 8332:5fce745004b6 127 },
Christopher Haster 8332:5fce745004b6 128 "LPC11U35_501": {
Christopher Haster 8332:5fce745004b6 129 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 130 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 131 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 132 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 133 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 134 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 135 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 136 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 137 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 138 },
Christopher Haster 8332:5fce745004b6 139 "LPC11U35_501_IBDAP": {
Christopher Haster 8332:5fce745004b6 140 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 141 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 142 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 143 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 144 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 145 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 146 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 147 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 148 },
Christopher Haster 8332:5fce745004b6 149 "XADOW_M0": {
Christopher Haster 8332:5fce745004b6 150 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 151 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 152 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 153 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 154 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 155 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 156 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 157 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 158 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 159 },
Christopher Haster 8332:5fce745004b6 160 "LPC11U35_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 161 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 162 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 163 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 164 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 165 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 166 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 167 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 168 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 169 },
Christopher Haster 8332:5fce745004b6 170 "LPC11U37_501": {
Christopher Haster 8332:5fce745004b6 171 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 172 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 173 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 174 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 175 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 176 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 177 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 178 },
Christopher Haster 8332:5fce745004b6 179 "LPCCAPPUCCINO": {
Christopher Haster 8332:5fce745004b6 180 "inherits": ["LPC11U37_501"],
Sarah Marsh 8472:da9bd832dfd1 181 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 182 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 183 },
Christopher Haster 8332:5fce745004b6 184 "ARCH_GPRS": {
Christopher Haster 8332:5fce745004b6 185 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 186 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 187 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 188 "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
Christopher Haster 8332:5fce745004b6 189 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 190 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 191 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 192 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 193 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 194 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 195 },
Christopher Haster 8332:5fce745004b6 196 "LPC11U68": {
Christopher Haster 8332:5fce745004b6 197 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 198 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 199 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 200 "extra_labels": ["NXP", "LPC11U6X"],
Christopher Haster 8332:5fce745004b6 201 "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 202 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 203 "detect_code": ["1168"],
Christopher Haster 8332:5fce745004b6 204 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 205 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 206 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 207 "device_name": "LPC11U68JBD100"
Christopher Haster 8332:5fce745004b6 208 },
Christopher Haster 8332:5fce745004b6 209 "LPC1347": {
Christopher Haster 8332:5fce745004b6 210 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 211 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 212 "extra_labels": ["NXP", "LPC13XX"],
Christopher Haster 8332:5fce745004b6 213 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 214 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 215 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 216 "device_name": "LPC1347FBD48"
Christopher Haster 8332:5fce745004b6 217 },
Christopher Haster 8332:5fce745004b6 218 "LPC1549": {
Christopher Haster 8332:5fce745004b6 219 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 220 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 221 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 222 "extra_labels": ["NXP", "LPC15XX"],
Christopher Haster 8332:5fce745004b6 223 "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 224 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 225 "detect_code": ["1549"],
Christopher Haster 8332:5fce745004b6 226 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 227 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 228 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 229 "device_name": "lpc1549"
Christopher Haster 8332:5fce745004b6 230 },
Christopher Haster 8332:5fce745004b6 231 "LPC1768": {
Christopher Haster 8332:5fce745004b6 232 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 233 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 234 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 235 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 236 "detect_code": ["1010"],
Christopher Haster 8332:5fce745004b6 237 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 238 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 239 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 240 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 241 },
Christopher Haster 8332:5fce745004b6 242 "ARCH_PRO": {
Christopher Haster 8332:5fce745004b6 243 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 244 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 245 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 246 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 247 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 248 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 249 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 250 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 251 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 252 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 253 },
Christopher Haster 8332:5fce745004b6 254 "UBLOX_C027": {
Christopher Haster 8332:5fce745004b6 255 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 256 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 257 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 258 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 259 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 260 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 261 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 262 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 263 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 264 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 265 },
Christopher Haster 8332:5fce745004b6 266 "XBED_LPC1768": {
Christopher Haster 8332:5fce745004b6 267 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 268 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 269 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 270 "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 271 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 272 "detect_code": ["1010"],
Sarah Marsh 8472:da9bd832dfd1 273 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 274 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 275 },
Christopher Haster 8332:5fce745004b6 276 "LPC2368": {
Christopher Haster 8332:5fce745004b6 277 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 278 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 279 "extra_labels": ["NXP", "LPC23XX"],
Christopher Haster 8332:5fce745004b6 280 "supported_toolchains": ["GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 281 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 282 },
Christopher Haster 8332:5fce745004b6 283 "LPC2460": {
Christopher Haster 8332:5fce745004b6 284 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 285 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 286 "extra_labels": ["NXP", "LPC2460"],
Christopher Haster 8332:5fce745004b6 287 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 288 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 289 },
Christopher Haster 8332:5fce745004b6 290 "LPC810": {
Christopher Haster 8332:5fce745004b6 291 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 292 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 293 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 294 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 295 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 296 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 297 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 298 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 299 "device_name": "LPC810M021FN8"
Christopher Haster 8332:5fce745004b6 300 },
Christopher Haster 8332:5fce745004b6 301 "LPC812": {
Christopher Haster 8332:5fce745004b6 302 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 303 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 304 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 305 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 306 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 307 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 308 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 309 "detect_code": ["1050"],
Christopher Haster 8332:5fce745004b6 310 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 311 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 312 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 313 "device_name": "LPC812M101JDH20"
Christopher Haster 8332:5fce745004b6 314 },
Christopher Haster 8332:5fce745004b6 315 "LPC824": {
Christopher Haster 8332:5fce745004b6 316 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 317 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 318 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 319 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 320 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 321 "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 322 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 323 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 324 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 325 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 326 "device_name": "LPC824M201JDH20"
Christopher Haster 8332:5fce745004b6 327 },
Christopher Haster 8332:5fce745004b6 328 "SSCI824": {
Christopher Haster 8332:5fce745004b6 329 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 330 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 331 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 332 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 333 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 334 "supported_toolchains": ["uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 335 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 336 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 337 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 338 },
Christopher Haster 8332:5fce745004b6 339 "LPC4088": {
Christopher Haster 8332:5fce745004b6 340 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 341 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 342 "extra_labels": ["NXP", "LPC408X"],
Christopher Haster 8332:5fce745004b6 343 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 344 "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 345 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 346 "function": "LPC4088Code.binary_hook",
Christopher Haster 8332:5fce745004b6 347 "toolchains": ["ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 348 },
Christopher Haster 8332:5fce745004b6 349 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 350 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 351 "device_name": "LPC4088FBD144"
Christopher Haster 8332:5fce745004b6 352 },
Christopher Haster 8332:5fce745004b6 353 "LPC4088_DM": {
Christopher Haster 8332:5fce745004b6 354 "inherits": ["LPC4088"],
Christopher Haster 8332:5fce745004b6 355 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 356 },
Christopher Haster 8332:5fce745004b6 357 "LPC4330_M4": {
Christopher Haster 8332:5fce745004b6 358 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 359 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 360 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 361 "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
Sarah Marsh 8472:da9bd832dfd1 362 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 363 "device_name": "LPC4330"
Christopher Haster 8332:5fce745004b6 364 },
Christopher Haster 8332:5fce745004b6 365 "LPC4330_M0": {
Christopher Haster 8332:5fce745004b6 366 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 367 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 368 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 369 "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 370 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 371 },
Christopher Haster 8332:5fce745004b6 372 "LPC4337": {
Christopher Haster 8332:5fce745004b6 373 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 374 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 375 "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
Christopher Haster 8332:5fce745004b6 376 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 377 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 378 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 379 "device_name": "LPC4337"
Christopher Haster 8332:5fce745004b6 380 },
Christopher Haster 8332:5fce745004b6 381 "LPC1800": {
Christopher Haster 8332:5fce745004b6 382 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 383 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 384 "extra_labels": ["NXP", "LPC43XX"],
Christopher Haster 8332:5fce745004b6 385 "public": false,
Christopher Haster 8332:5fce745004b6 386 "supported_toolchains": ["ARM", "GCC_CR", "IAR"]
Christopher Haster 8332:5fce745004b6 387 },
Christopher Haster 8332:5fce745004b6 388 "LPC11U37H_401": {
Christopher Haster 8332:5fce745004b6 389 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 390 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 391 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 392 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 393 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 394 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 395 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 396 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 397 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 398 "device_name": "LPC11U37HFBD64/401"
Christopher Haster 8332:5fce745004b6 399 },
Christopher Haster 8332:5fce745004b6 400 "ELEKTOR_COCORICO": {
Christopher Haster 8332:5fce745004b6 401 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 402 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 403 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 404 "supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 405 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 406 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 407 "detect_code": ["C000"],
Sarah Marsh 8472:da9bd832dfd1 408 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 409 "device_name": "LPC812M101JDH16"
Christopher Haster 8332:5fce745004b6 410 },
Christopher Haster 8332:5fce745004b6 411 "KL05Z": {
Christopher Haster 8332:5fce745004b6 412 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 413 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 414 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 415 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 416 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 417 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 418 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 419 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 420 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 421 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 422 "device_name": "MKL05Z32xxx4"
Christopher Haster 8332:5fce745004b6 423 },
Christopher Haster 8332:5fce745004b6 424 "KL25Z": {
Christopher Haster 8332:5fce745004b6 425 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 426 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 427 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 428 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 429 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 430 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 431 "detect_code": ["0200"],
Christopher Haster 8332:5fce745004b6 432 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 433 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 434 "device_name": "MKL25Z128xxx4"
Christopher Haster 8332:5fce745004b6 435 },
Christopher Haster 8332:5fce745004b6 436 "KL26Z": {
Christopher Haster 8332:5fce745004b6 437 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 438 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 439 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 440 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 441 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 442 "inherits": ["Target"],
Sarah Marsh 8472:da9bd832dfd1 443 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 444 "device_name": "MKL26Z128xxx4"
Christopher Haster 8332:5fce745004b6 445 },
Christopher Haster 8332:5fce745004b6 446 "KL46Z": {
Christopher Haster 8332:5fce745004b6 447 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 448 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 449 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 450 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 451 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 452 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 453 "detect_code": ["0220"],
Christopher Haster 8332:5fce745004b6 454 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 455 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 456 "device_name": "MKL46Z256xxx4"
Christopher Haster 8332:5fce745004b6 457 },
Christopher Haster 8332:5fce745004b6 458 "K20D50M": {
Christopher Haster 8332:5fce745004b6 459 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 460 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 461 "extra_labels": ["Freescale", "K20XX"],
Christopher Haster 8332:5fce745004b6 462 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 463 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 464 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 465 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 466 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 467 "device_name": "MK20DX128xxx5"
Christopher Haster 8332:5fce745004b6 468 },
Christopher Haster 8332:5fce745004b6 469 "TEENSY3_1": {
Christopher Haster 8332:5fce745004b6 470 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 471 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 472 "extra_labels": ["Freescale", "K20XX", "K20DX256"],
Christopher Haster 8332:5fce745004b6 473 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 474 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 475 "supported_toolchains": ["GCC_ARM", "ARM"],
Christopher Haster 8332:5fce745004b6 476 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 477 "function": "TEENSY3_1Code.binary_hook",
Christopher Haster 8332:5fce745004b6 478 "toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 479 },
Christopher Haster 8332:5fce745004b6 480 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 481 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 482 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 483 "device_name": "MK20DX256xxx7"
Christopher Haster 8332:5fce745004b6 484 },
Marcelo Salazar 8947:c6669467b509 485 "MCU_K22F512": {
Christopher Haster 8332:5fce745004b6 486 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 487 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Marcelo Salazar 8947:c6669467b509 488 "extra_labels": ["Freescale", "KSDK2_MCUS", "MCU_K22F", "MCU_K22F512", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"],
Christopher Haster 8332:5fce745004b6 489 "is_disk_virtual": true,
Ashok Rao 8948:1a8019161e2f 490 "public": false,
Christopher Haster 8332:5fce745004b6 491 "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 492 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 493 "detect_code": ["0231"],
Christopher Haster 8332:5fce745004b6 494 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 495 "device_name": "MK22DN512xxx5"
Christopher Haster 8332:5fce745004b6 496 },
Marcelo Salazar 8947:c6669467b509 497 "K22F": {
Ashok Rao 8948:1a8019161e2f 498 "supported_form_factors": ["ARDUINO"],
Marcelo Salazar 8947:c6669467b509 499 "inherits": ["MCU_K22F512"],
Sarah Marsh 8472:da9bd832dfd1 500 "release_versions": ["2", "5"],
Marcelo Salazar 8947:c6669467b509 501 "extra_labels_add": ["FRDM"]
Christopher Haster 8332:5fce745004b6 502 },
Christopher Haster 8332:5fce745004b6 503 "KL27Z": {
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Christopher Haster 8332:5fce745004b6 505 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 506 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 507 "macros": ["CPU_MKL27Z64VLH4", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 508 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 509 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 510 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 511 "default_toolchain": "ARM",
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Christopher Haster 8332:5fce745004b6 513 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 514 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 515 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 516 "device_name": "MKL27Z64xxx4"
Christopher Haster 8332:5fce745004b6 517 },
Christopher Haster 8332:5fce745004b6 518 "KL43Z": {
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Christopher Haster 8332:5fce745004b6 520 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 521 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 522 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 523 "macros": ["CPU_MKL43Z256VLH4", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 524 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 525 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 526 "detect_code": ["0262"],
Christopher Haster 8332:5fce745004b6 527 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 528 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 529 "device_name": "MKL43Z256xxx4"
Christopher Haster 8332:5fce745004b6 530 },
Mahadevan Mahesh 8665:1775fbac0db8 531 "KL82Z": {
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Mahadevan Mahesh 8665:1775fbac0db8 533 "core": "Cortex-M0+",
Mahadevan Mahesh 8665:1775fbac0db8 534 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Mahadevan Mahesh 8665:1775fbac0db8 535 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8665:1775fbac0db8 536 "macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8665:1775fbac0db8 537 "is_disk_virtual": true,
Mahadevan Mahesh 8665:1775fbac0db8 538 "inherits": ["Target"],
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Mahadevan Mahesh 8930:d1bc0e17cab7 541 "release_versions": ["2", "5"],
Mahadevan Mahesh 8930:d1bc0e17cab7 542 "device_name": "MKL82Z128xxx7"
Mahadevan Mahesh 8665:1775fbac0db8 543 },
Mahadevan Mahesh 8713:a1a30dd433d6 544 "KW24D": {
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Mahadevan Mahesh 8713:a1a30dd433d6 546 "core": "Cortex-M4",
Mahadevan Mahesh 8713:a1a30dd433d6 547 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 8713:a1a30dd433d6 548 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8713:a1a30dd433d6 549 "is_disk_virtual": true,
Mahadevan Mahesh 8713:a1a30dd433d6 550 "macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8713:a1a30dd433d6 551 "inherits": ["Target"],
Mahadevan Mahesh 8713:a1a30dd433d6 552 "detect_code": ["0250"],
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Mahadevan Mahesh 8930:d1bc0e17cab7 554 "release_versions": ["2", "5"],
Mahadevan Mahesh 8930:d1bc0e17cab7 555 "device_name": "MKW24D512xxx5"
Mahadevan Mahesh 8713:a1a30dd433d6 556 },
Christopher Haster 8332:5fce745004b6 557 "K64F": {
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Christopher Haster 8332:5fce745004b6 559 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 560 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 561 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 562 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 563 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 564 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 565 "detect_code": ["0240"],
Christopher Haster 8332:5fce745004b6 566 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG"],
Christopher Haster 8342:520d28b41ea4 567 "features": ["LWIP", "STORAGE"],
Sarah Marsh 8472:da9bd832dfd1 568 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 569 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 570 },
Christopher Haster 8332:5fce745004b6 571 "MTS_GAMBIT": {
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Christopher Haster 8332:5fce745004b6 573 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 574 "supported_toolchains": ["ARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 575 "extra_labels": ["Freescale", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 576 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 577 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Sarah Marsh 8472:da9bd832dfd1 578 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 579 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 580 },
Christopher Haster 8332:5fce745004b6 581 "HEXIWEAR": {
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Christopher Haster 8332:5fce745004b6 583 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 584 "extra_labels": ["Freescale", "KSDK2_MCUS", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 585 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 586 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Christopher Haster 8332:5fce745004b6 587 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 588 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 589 "detect_code": ["0214"],
Mahadevan Mahesh 8366:70aeab6c7eb7 590 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8332:5fce745004b6 591 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 592 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 593 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 594 },
Christopher Haster 8332:5fce745004b6 595 "K66F": {
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Christopher Haster 8332:5fce745004b6 597 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 598 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 599 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 600 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 601 "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 602 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 603 "detect_code": ["0311"],
Christopher Haster 8332:5fce745004b6 604 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 605 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 606 "device_name" : "MK66FN2M0xxx18"
Christopher Haster 8332:5fce745004b6 607 },
Mahadevan Mahesh 8930:d1bc0e17cab7 608 "K82F": {
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Mahadevan Mahesh 8930:d1bc0e17cab7 610 "core": "Cortex-M4F",
Mahadevan Mahesh 8930:d1bc0e17cab7 611 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 8930:d1bc0e17cab7 612 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8930:d1bc0e17cab7 613 "is_disk_virtual": true,
Mahadevan Mahesh 8930:d1bc0e17cab7 614 "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8930:d1bc0e17cab7 615 "inherits": ["Target"],
Mahadevan Mahesh 8930:d1bc0e17cab7 616 "detect_code": ["0217"],
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Mahadevan Mahesh 8930:d1bc0e17cab7 618 "release_versions": ["2", "5"],
Mahadevan Mahesh 8930:d1bc0e17cab7 619 "device_name" : "MK66FN256xxx15"
Mahadevan Mahesh 8930:d1bc0e17cab7 620 },
Christopher Haster 8332:5fce745004b6 621 "NUCLEO_F030R8": {
Christopher Haster 8332:5fce745004b6 622 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 623 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 624 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 625 "extra_labels": ["STM", "STM32F0", "STM32F030R8"],
Christopher Haster 8332:5fce745004b6 626 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 627 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 628 "detect_code": ["0725"],
Laurent MEUNIER 8670:d320c94c6968 629 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 630 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 631 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 632 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 633 "device_name": "STM32F030R8"
Christopher Haster 8332:5fce745004b6 634 },
Christopher Haster 8332:5fce745004b6 635 "NUCLEO_F031K6": {
Christopher Haster 8332:5fce745004b6 636 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 637 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 638 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 639 "extra_labels": ["STM", "STM32F0", "STM32F031K6"],
Christopher Haster 8332:5fce745004b6 640 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 641 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 642 "detect_code": ["0791"],
Laurent MEUNIER 8670:d320c94c6968 643 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 644 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 645 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 646 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 647 "device_name": "STM32F031K6"
Christopher Haster 8332:5fce745004b6 648 },
Christopher Haster 8332:5fce745004b6 649 "NUCLEO_F042K6": {
Christopher Haster 8332:5fce745004b6 650 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 651 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 652 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 653 "extra_labels": ["STM", "STM32F0", "STM32F042K6"],
Christopher Haster 8332:5fce745004b6 654 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 655 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 656 "detect_code": ["0785"],
Laurent MEUNIER 8670:d320c94c6968 657 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 658 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 659 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 660 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 661 "device_name": "STM32F042K6"
Christopher Haster 8332:5fce745004b6 662 },
Christopher Haster 8332:5fce745004b6 663 "NUCLEO_F070RB": {
Christopher Haster 8332:5fce745004b6 664 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 665 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 666 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 667 "extra_labels": ["STM", "STM32F0", "STM32F070RB"],
Christopher Haster 8332:5fce745004b6 668 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 669 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 670 "detect_code": ["0755"],
Laurent MEUNIER 8670:d320c94c6968 671 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 672 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 673 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 674 "device_name": "STM32F070RB"
Christopher Haster 8332:5fce745004b6 675 },
Christopher Haster 8332:5fce745004b6 676 "NUCLEO_F072RB": {
Christopher Haster 8332:5fce745004b6 677 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 678 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 679 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 680 "extra_labels": ["STM", "STM32F0", "STM32F072RB"],
Christopher Haster 8332:5fce745004b6 681 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 682 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 683 "detect_code": ["0730"],
Laurent MEUNIER 8670:d320c94c6968 684 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 685 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 686 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 687 "device_name": "STM32F072RB"
Christopher Haster 8332:5fce745004b6 688 },
Christopher Haster 8332:5fce745004b6 689 "NUCLEO_F091RC": {
Christopher Haster 8332:5fce745004b6 690 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 691 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 692 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 693 "extra_labels": ["STM", "STM32F0", "STM32F091RC"],
Christopher Haster 8332:5fce745004b6 694 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 695 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 696 "detect_code": ["0750"],
Laurent MEUNIER 8670:d320c94c6968 697 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 698 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 699 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 700 "device_name": "STM32F091RC"
Christopher Haster 8332:5fce745004b6 701 },
Christopher Haster 8332:5fce745004b6 702 "NUCLEO_F103RB": {
Christopher Haster 8332:5fce745004b6 703 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 704 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 705 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 706 "extra_labels": ["STM", "STM32F1", "STM32F103RB"],
Christopher Haster 8332:5fce745004b6 707 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 708 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 709 "detect_code": ["0700"],
Laurent MEUNIER 8670:d320c94c6968 710 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 711 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 712 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 713 "device_name": "STM32F103RB"
Christopher Haster 8332:5fce745004b6 714 },
Christopher Haster 8332:5fce745004b6 715 "NUCLEO_F207ZG": {
Christopher Haster 8332:5fce745004b6 716 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 717 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 718 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 719 "extra_labels": ["STM", "STM32F2", "STM32F207ZG"],
Christopher Haster 8332:5fce745004b6 720 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 721 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 722 "detect_code": ["0835"],
Laurent MEUNIER 8670:d320c94c6968 723 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 724 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 725 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 726 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 727 "device_name" : "STM32F207ZG"
Christopher Haster 8332:5fce745004b6 728 },
Christopher Haster 8332:5fce745004b6 729 "NUCLEO_F302R8": {
Christopher Haster 8332:5fce745004b6 730 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 731 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 732 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 733 "extra_labels": ["STM", "STM32F3", "STM32F302R8"],
Christopher Haster 8332:5fce745004b6 734 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 735 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 736 "detect_code": ["0705"],
Laurent MEUNIER 8670:d320c94c6968 737 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 738 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 739 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 740 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 741 "device_name": "STM32F302R8"
Christopher Haster 8332:5fce745004b6 742 },
Christopher Haster 8332:5fce745004b6 743 "NUCLEO_F303K8": {
Christopher Haster 8332:5fce745004b6 744 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 745 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 746 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 747 "extra_labels": ["STM", "STM32F3", "STM32F303K8"],
Laurent MEUNIER 8670:d320c94c6968 748 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 749 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 750 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 751 "detect_code": ["0775"],
Christopher Haster 8332:5fce745004b6 752 "default_lib": "small",
Laurent MEUNIER 8670:d320c94c6968 753 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 754 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 755 "device_name": "STM32F303K8"
Christopher Haster 8332:5fce745004b6 756 },
Christopher Haster 8332:5fce745004b6 757 "NUCLEO_F303RE": {
Christopher Haster 8332:5fce745004b6 758 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 759 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 760 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 761 "extra_labels": ["STM", "STM32F3", "STM32F303RE"],
Christopher Haster 8332:5fce745004b6 762 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 763 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 764 "detect_code": ["0745"],
Laurent MEUNIER 8670:d320c94c6968 765 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 766 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 767 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 768 "device_name": "STM32F303RE"
Christopher Haster 8332:5fce745004b6 769 },
Christopher Haster 8332:5fce745004b6 770 "NUCLEO_F303ZE": {
Christopher Haster 8332:5fce745004b6 771 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 772 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 773 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 774 "extra_labels": ["STM", "STM32F3", "STM32F303ZE"],
Christopher Haster 8332:5fce745004b6 775 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 776 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 777 "detect_code": ["0747"],
Laurent MEUNIER 8670:d320c94c6968 778 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
jeromecoutant 8817:519ed36450d5 779 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "LOWPOWERTIMER"],
Sarah Marsh 8507:29edfac555c0 780 "release_versions": ["2", "5"],
jeromecoutant 8817:519ed36450d5 781 "device_name": "STM32F303ZE"
Christopher Haster 8332:5fce745004b6 782 },
Christopher Haster 8332:5fce745004b6 783 "NUCLEO_F334R8": {
Christopher Haster 8332:5fce745004b6 784 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 785 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 786 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 787 "extra_labels": ["STM", "STM32F3", "STM32F334R8"],
Christopher Haster 8332:5fce745004b6 788 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 789 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 790 "detect_code": ["0735"],
Laurent MEUNIER 8670:d320c94c6968 791 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 792 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 793 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 794 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 795 "device_name": "STM32F334R8"
Christopher Haster 8332:5fce745004b6 796 },
Christopher Haster 8332:5fce745004b6 797 "NUCLEO_F401RE": {
Christopher Haster 8332:5fce745004b6 798 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 799 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 800 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 801 "extra_labels": ["STM", "STM32F4", "STM32F401RE"],
Christopher Haster 8332:5fce745004b6 802 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 803 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 804 "detect_code": ["0720"],
Christopher Haster 8332:5fce745004b6 805 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 806 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 807 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 808 "device_name": "STM32F401RE"
Christopher Haster 8332:5fce745004b6 809 },
Christopher Haster 8332:5fce745004b6 810 "NUCLEO_F410RB": {
Christopher Haster 8332:5fce745004b6 811 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 812 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 813 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 814 "extra_labels": ["STM", "STM32F4", "STM32F410RB","STM32F410Rx"],
Christopher Haster 8332:5fce745004b6 815 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 816 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 817 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
jeromecoutant 9039:e01b460ece14 818 "detect_code": ["0744"],
jeromecoutant 9039:e01b460ece14 819 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 820 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 821 "device_name": "STM32F410RB"
Christopher Haster 8332:5fce745004b6 822 },
Christopher Haster 8332:5fce745004b6 823 "NUCLEO_F411RE": {
Christopher Haster 8332:5fce745004b6 824 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 825 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 826 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 827 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 828 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 829 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 830 "detect_code": ["0740"],
Christopher Haster 8332:5fce745004b6 831 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 832 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 833 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 834 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 835 },
Christopher Haster 8332:5fce745004b6 836 "ELMO_F411RE": {
Christopher Haster 8332:5fce745004b6 837 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 838 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 839 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 840 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 841 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 842 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 843 "detect_code": ["----"],
Christopher Haster 8332:5fce745004b6 844 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 845 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 846 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 847 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 848 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 849 },
Christopher Haster 8332:5fce745004b6 850 "NUCLEO_F429ZI": {
Christopher Haster 8332:5fce745004b6 851 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 852 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 853 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 854 "default_toolchain": "ARM",
adustm 8699:0582a3f97984 855 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "F429_F439"],
Christopher Haster 8332:5fce745004b6 856 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 857 "progen": {"target": "nucleo-f429zi"},
Christopher Haster 8332:5fce745004b6 858 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 859 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8332:5fce745004b6 860 "detect_code": ["0796"],
Christopher Haster 8342:520d28b41ea4 861 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 862 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 863 "device_name" : "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 864 },
adustm 8699:0582a3f97984 865 "NUCLEO_F439ZI": {
adustm 8699:0582a3f97984 866 "supported_form_factors": ["ARDUINO"],
adustm 8699:0582a3f97984 867 "inherits": ["Target"],
adustm 8699:0582a3f97984 868 "core": "Cortex-M4F",
adustm 8699:0582a3f97984 869 "default_toolchain": "ARM",
adustm 8699:0582a3f97984 870 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "F429_F439"],
adustm 8699:0582a3f97984 871 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
adustm 8699:0582a3f97984 872 "progen": {"target": "nucleo-f439zi"},
adustm 8699:0582a3f97984 873 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
adustm 8699:0582a3f97984 874 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
adustm 8699:0582a3f97984 875 "detect_code": ["0797"],
adustm 8699:0582a3f97984 876 "features": ["LWIP"],
adustm 8699:0582a3f97984 877 "release_versions": ["2", "5"],
adustm 8699:0582a3f97984 878 "device_name" : "STM32F429ZI"
adustm 8699:0582a3f97984 879 },
Christopher Haster 8332:5fce745004b6 880 "NUCLEO_F446RE": {
Christopher Haster 8332:5fce745004b6 881 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 882 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 883 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 884 "extra_labels": ["STM", "STM32F4", "STM32F446RE"],
Christopher Haster 8332:5fce745004b6 885 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 886 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 887 "detect_code": ["0777"],
Christopher Haster 8332:5fce745004b6 888 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 889 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 890 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 891 "device_name": "STM32F446RE"
Christopher Haster 8332:5fce745004b6 892 },
Christopher Haster 8332:5fce745004b6 893 "NUCLEO_F446ZE": {
Christopher Haster 8332:5fce745004b6 894 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 895 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 896 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 897 "extra_labels": ["STM", "STM32F4", "STM32F446ZE"],
Christopher Haster 8332:5fce745004b6 898 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 899 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 900 "detect_code": ["0778"],
Christopher Haster 8332:5fce745004b6 901 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 902 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 903 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 904 "device_name" : "STM32F446ZE"
Christopher Haster 8332:5fce745004b6 905 },
Christopher Haster 8332:5fce745004b6 906 "B96B_F446VE": {
Christopher Haster 8332:5fce745004b6 907 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 908 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 909 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 910 "extra_labels": ["STM", "STM32F4", "STM32F446VE"],
Christopher Haster 8332:5fce745004b6 911 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 912 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 913 "detect_code": ["0840"],
Christopher Haster 8332:5fce745004b6 914 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 915 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 916 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 917 "device_name":"STM32F446VE"
Christopher Haster 8332:5fce745004b6 918 },
Christopher Haster 8332:5fce745004b6 919 "NUCLEO_F746ZG": {
Christopher Haster 8332:5fce745004b6 920 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 921 "core": "Cortex-M7F",
adustm 8701:5a968df3a238 922 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746ZG", "F746_F756"],
Christopher Haster 8332:5fce745004b6 923 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 924 "default_toolchain": "ARM",
Laurent MEUNIER 8670:d320c94c6968 925 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 926 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 927 "detect_code": ["0816"],
Laurent MEUNIER 8670:d320c94c6968 928 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 929 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 930 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 931 "device_name": "STM32F746ZG"
Christopher Haster 8332:5fce745004b6 932 },
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Christopher Haster 8332:5fce745004b6 945 },
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Christopher Haster 8332:5fce745004b6 972 },
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Christopher Haster 8332:5fce745004b6 985 },
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Sarah Marsh 8472:da9bd832dfd1 997 "device_name": "STM32L053R8"
Christopher Haster 8332:5fce745004b6 998 },
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Sarah Marsh 8472:da9bd832dfd1 1009 "device_name": "STM32L073RZ"
Christopher Haster 8332:5fce745004b6 1010 },
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Sarah Marsh 8472:da9bd832dfd1 1020 "release_versions": ["2", "5"],
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Christopher Haster 8332:5fce745004b6 1022 },
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Christopher Haster 8332:5fce745004b6 1030 "detect_code": ["0770"],
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Sarah Marsh 8472:da9bd832dfd1 1034 "device_name" : "STM32L432KC"
Christopher Haster 8332:5fce745004b6 1035 },
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Laurent MEUNIER 8670:d320c94c6968 1044 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
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Sarah Marsh 8472:da9bd832dfd1 1046 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1047 "device_name": "stm32l476rg"
Christopher Haster 8332:5fce745004b6 1048 },
adustm 8700:42167837958f 1049 "NUCLEO_L486RG": {
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adustm 8700:42167837958f 1054 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
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adustm 8700:42167837958f 1059 "device_name": "stm32l486rg"
adustm 8700:42167837958f 1060 },
Christopher Haster 8332:5fce745004b6 1061 "STM32F3XX": {
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Christopher Haster 8332:5fce745004b6 1063 "core": "Cortex-M4",
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Christopher Haster 8332:5fce745004b6 1067 },
Christopher Haster 8332:5fce745004b6 1068 "STM32F407": {
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Christopher Haster 8332:5fce745004b6 1070 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1071 "extra_labels": ["STM", "STM32F4", "STM32F4XX"],
Christopher Haster 8332:5fce745004b6 1072 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 1073 },
Christopher Haster 8332:5fce745004b6 1074 "ARCH_MAX": {
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Christopher Haster 8332:5fce745004b6 1076 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1077 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1078 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1079 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1080 "macros": ["LSI_VALUE=32000"],
Christopher Haster 8332:5fce745004b6 1081 "inherits": ["Target"],
Laurent MEUNIER 8670:d320c94c6968 1082 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1083 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1084 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1085 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1086 },
Christopher Haster 8332:5fce745004b6 1087 "DISCO_F051R8": {
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Christopher Haster 8332:5fce745004b6 1089 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1090 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1091 "extra_labels": ["STM", "STM32F0", "STM32F051", "STM32F051R8"],
Christopher Haster 8332:5fce745004b6 1092 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1093 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1094 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1095 "device_name": "STM32F051R8"
Christopher Haster 8332:5fce745004b6 1096 },
Christopher Haster 8332:5fce745004b6 1097 "DISCO_F100RB": {
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Christopher Haster 8332:5fce745004b6 1099 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1100 "default_toolchain": "ARM",
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Christopher Haster 8332:5fce745004b6 1102 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1103 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1104 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1105 "device_name": "STM32F100RB"
Christopher Haster 8332:5fce745004b6 1106 },
Christopher Haster 8332:5fce745004b6 1107 "DISCO_F303VC": {
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Christopher Haster 8332:5fce745004b6 1109 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1110 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1111 "extra_labels": ["STM", "STM32F3", "STM32F303", "STM32F303VC"],
Laurent MEUNIER 8670:d320c94c6968 1112 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1113 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1114 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1115 "device_name": "STM32F303VC"
Christopher Haster 8332:5fce745004b6 1116 },
Christopher Haster 8332:5fce745004b6 1117 "DISCO_F334C8": {
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Christopher Haster 8332:5fce745004b6 1119 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1120 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1121 "extra_labels": ["STM", "STM32F3", "STM32F334C8"],
Laurent MEUNIER 8670:d320c94c6968 1122 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1123 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1124 "detect_code": ["0810"],
Laurent MEUNIER 8670:d320c94c6968 1125 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1126 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1127 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1128 "device_name": "STM32F334C8"
Christopher Haster 8332:5fce745004b6 1129 },
Christopher Haster 8332:5fce745004b6 1130 "DISCO_F407VG": {
Christopher Haster 8332:5fce745004b6 1131 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1132 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1133 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1134 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1135 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Sarah Marsh 8520:ebbeba690467 1136 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1137 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1138 },
Christopher Haster 8332:5fce745004b6 1139 "DISCO_F429ZI": {
Christopher Haster 8332:5fce745004b6 1140 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1141 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1142 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1143 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx"],
Christopher Haster 8332:5fce745004b6 1144 "macros": ["RTC_LSI=1","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1145 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1146 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1147 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1148 "device_name": "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 1149 },
Christopher Haster 8332:5fce745004b6 1150 "DISCO_F469NI": {
Christopher Haster 8332:5fce745004b6 1151 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1152 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1153 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1154 "extra_labels": ["STM", "STM32F4", "STM32F469", "STM32F469NI", "STM32F469xx"],
Christopher Haster 8332:5fce745004b6 1155 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1156 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1157 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1158 "detect_code": ["0788"],
jeromecoutant 9032:ccd5da487753 1159 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1160 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1161 "device_name": "STM32F469NI"
Christopher Haster 8332:5fce745004b6 1162 },
Christopher Haster 8332:5fce745004b6 1163 "DISCO_L053C8": {
Christopher Haster 8332:5fce745004b6 1164 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1165 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1166 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1167 "extra_labels": ["STM", "STM32L0", "STM32L053C8"],
Christopher Haster 8332:5fce745004b6 1168 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Laurent MEUNIER 9236:9611414db999 1169 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1170 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1171 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1172 "device_name": "STM32L053C8"
Christopher Haster 8332:5fce745004b6 1173 },
Christopher Haster 8332:5fce745004b6 1174 "DISCO_F746NG": {
Christopher Haster 8332:5fce745004b6 1175 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1176 "core": "Cortex-M7F",
Christopher Haster 8332:5fce745004b6 1177 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746NG"],
Christopher Haster 8332:5fce745004b6 1178 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1179 "default_toolchain": "ARM",
jeromecoutant 8661:e3f8446fe374 1180 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1181 "detect_code": ["0815"],
Laurent MEUNIER 8670:d320c94c6968 1182 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1183 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1184 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1185 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 1186 "device_name": "STM32F746NG"
Christopher Haster 8332:5fce745004b6 1187 },
Christopher Haster 8332:5fce745004b6 1188 "DISCO_F769NI": {
Christopher Haster 8332:5fce745004b6 1189 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1190 "core": "Cortex-M7FD",
Christopher Haster 8332:5fce745004b6 1191 "extra_labels": ["STM", "STM32F7", "STM32F769", "STM32F769NI"],
Christopher Haster 8332:5fce745004b6 1192 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1193 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1194 "detect_code": ["0817"],
Laurent MEUNIER 8670:d320c94c6968 1195 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1196 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1197 "features": ["LWIP"],
Sarah Marsh 8507:29edfac555c0 1198 "release_versions": ["2"],
Sarah Marsh 8507:29edfac555c0 1199 "device_name": "STM32F769NI"
Christopher Haster 8332:5fce745004b6 1200 },
Christopher Haster 8332:5fce745004b6 1201 "DISCO_L476VG": {
Christopher Haster 8332:5fce745004b6 1202 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1203 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1204 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1205 "extra_labels": ["STM", "STM32L4", "STM32L476VG"],
Christopher Haster 8332:5fce745004b6 1206 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1207 "detect_code": ["0820"],
Laurent MEUNIER 8670:d320c94c6968 1208 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1209 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1210 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1211 "device_name": "stm32l476vg"
Christopher Haster 8332:5fce745004b6 1212 },
Christopher Haster 8332:5fce745004b6 1213 "MTS_MDOT_F405RG": {
Christopher Haster 8332:5fce745004b6 1214 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1215 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1216 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1217 "extra_labels": ["STM", "STM32F4", "STM32F405RG"],
Christopher Haster 8332:5fce745004b6 1218 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1219 "macros": ["HSE_VALUE=26000000", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1220 "progen": {"target": "mts-mdot-f405rg"},
Christopher Haster 8332:5fce745004b6 1221 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1222 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1223 "device_name": "STM32F405RG"
Christopher Haster 8332:5fce745004b6 1224 },
Christopher Haster 8332:5fce745004b6 1225 "MTS_MDOT_F411RE": {
Christopher Haster 8332:5fce745004b6 1226 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1227 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1228 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1229 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1230 "macros": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1231 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1232 "function": "MTSCode.combine_bins_mts_dot",
Christopher Haster 8332:5fce745004b6 1233 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1234 },
Christopher Haster 8332:5fce745004b6 1235 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1236 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1237 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1238 },
Christopher Haster 8332:5fce745004b6 1239 "MTS_DRAGONFLY_F411RE": {
Christopher Haster 8332:5fce745004b6 1240 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1241 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1242 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1243 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1244 "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1245 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1246 "function": "MTSCode.combine_bins_mts_dragonfly",
Christopher Haster 8332:5fce745004b6 1247 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1248 },
Christopher Haster 8332:5fce745004b6 1249 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1250 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1251 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1252 },
Christopher Haster 8332:5fce745004b6 1253 "XDOT_L151CC": {
Christopher Haster 8332:5fce745004b6 1254 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1255 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1256 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1257 "extra_labels": ["STM", "STM32L1", "STM32L151CC"],
Christopher Haster 8332:5fce745004b6 1258 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1259 "progen": {"target": "xdot-l151cc"},
Laurent MEUNIER 9236:9611414db999 1260 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1261 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1262 "release_versions": ["5"]
Christopher Haster 8332:5fce745004b6 1263 },
Christopher Haster 8332:5fce745004b6 1264 "MOTE_L152RC": {
Christopher Haster 8332:5fce745004b6 1265 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1266 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1267 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1268 "extra_labels": ["STM", "STM32L1", "STM32L152RC"],
Christopher Haster 8332:5fce745004b6 1269 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1270 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1271 "detect_code": ["4100"],
Laurent MEUNIER 9236:9611414db999 1272 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1273 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1274 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1275 "device_name": "STM32L152RC"
Christopher Haster 8332:5fce745004b6 1276 },
Christopher Haster 8332:5fce745004b6 1277 "DISCO_F401VC": {
Christopher Haster 8332:5fce745004b6 1278 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1279 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1280 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 1281 "extra_labels": ["STM", "STM32F4", "STM32F401", "STM32F401VC"],
Christopher Haster 8332:5fce745004b6 1282 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1283 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Sarah Marsh 8472:da9bd832dfd1 1284 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1285 "device_name": "STM32F401VC"
Christopher Haster 8332:5fce745004b6 1286 },
andreas.larsson 8355:cb6a226655c8 1287 "UBLOX_EVK_ODIN_W2": {
Christopher Haster 8332:5fce745004b6 1288 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1289 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1290 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1291 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
andreas.larsson 8654:d2daf30b4d0f 1292 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx"],
andreas.larsson 8768:b81d7522ac45 1293 "macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
Christopher Haster 8332:5fce745004b6 1294 "inherits": ["Target"],
Bartek Szatkowski 8707:f0d6077e73f5 1295 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1296 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1297 "release_versions": ["5"],
Sarah Marsh 8472:da9bd832dfd1 1298 "device_name": "STM32F439ZI"
Christopher Haster 8332:5fce745004b6 1299 },
Christopher Haster 8332:5fce745004b6 1300 "NZ32_SC151": {
Christopher Haster 8332:5fce745004b6 1301 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1302 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1303 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1304 "program_cycle_s": 1.5,
Christopher Haster 8332:5fce745004b6 1305 "extra_labels": ["STM", "STM32L1", "STM32L151RC"],
Christopher Haster 8332:5fce745004b6 1306 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1307 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Laurent MEUNIER 9236:9611414db999 1308 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1309 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1310 "device_name": "STM32L151RC"
Christopher Haster 8332:5fce745004b6 1311 },
Christopher Haster 8332:5fce745004b6 1312 "MCU_NRF51": {
Christopher Haster 8332:5fce745004b6 1313 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1314 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1315 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1316 "macros": ["NRF51", "TARGET_NRF51822"],
Christopher Haster 8332:5fce745004b6 1317 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 1318 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
Christopher Haster 8332:5fce745004b6 1319 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 1320 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1321 "supported_toolchains": ["ARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1322 "public": false,
Christopher Haster 8332:5fce745004b6 1323 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 1324 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1325 {
Christopher Haster 8332:5fce745004b6 1326 "boot": "s130_nrf51_1.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1327 "name": "s130_nrf51_1.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1328 "offset": 114688
Christopher Haster 8332:5fce745004b6 1329 },
Christopher Haster 8332:5fce745004b6 1330 {
Christopher Haster 8332:5fce745004b6 1331 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1332 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1333 "offset": 98304
Christopher Haster 8332:5fce745004b6 1334 },
Christopher Haster 8332:5fce745004b6 1335 {
Christopher Haster 8332:5fce745004b6 1336 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1337 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1338 "offset": 90112
Christopher Haster 8332:5fce745004b6 1339 },
Christopher Haster 8332:5fce745004b6 1340 {
Christopher Haster 8332:5fce745004b6 1341 "boot": "s110_nrf51822_7.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1342 "name": "s110_nrf51822_7.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1343 "offset": 90112
Christopher Haster 8332:5fce745004b6 1344 },
Christopher Haster 8332:5fce745004b6 1345 {
Christopher Haster 8332:5fce745004b6 1346 "boot": "s110_nrf51822_6.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1347 "name": "s110_nrf51822_6.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1348 "offset": 81920
Christopher Haster 8332:5fce745004b6 1349 }
Christopher Haster 8332:5fce745004b6 1350 ],
Christopher Haster 8332:5fce745004b6 1351 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 1352 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1353 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 1354 "toolchains": ["ARM_STD", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 1355 },
Christopher Haster 8332:5fce745004b6 1356 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 1357 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1358 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 1359 },
Christopher Haster 8332:5fce745004b6 1360 "MCU_NRF51_16K_BASE": {
Christopher Haster 8332:5fce745004b6 1361 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1362 "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1363 "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1364 "public": false,
Christopher Haster 8332:5fce745004b6 1365 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 1366 },
Christopher Haster 8332:5fce745004b6 1367 "MCU_NRF51_16K_BOOT_BASE": {
Christopher Haster 8332:5fce745004b6 1368 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1369 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1370 "extra_labels_add": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1371 "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1372 "public": false
Christopher Haster 8332:5fce745004b6 1373 },
Christopher Haster 8332:5fce745004b6 1374 "MCU_NRF51_16K_OTA_BASE": {
Christopher Haster 8332:5fce745004b6 1375 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1376 "public": false,
Christopher Haster 8332:5fce745004b6 1377 "extra_labels_add": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1378 "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1379 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1380 },
Christopher Haster 8332:5fce745004b6 1381 "MCU_NRF51_16K": {
Christopher Haster 8332:5fce745004b6 1382 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1383 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1384 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1385 "public": false
Christopher Haster 8332:5fce745004b6 1386 },
Christopher Haster 8332:5fce745004b6 1387 "MCU_NRF51_S110": {
Christopher Haster 8332:5fce745004b6 1388 "extra_labels_add": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1389 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1390 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1391 {
Christopher Haster 8332:5fce745004b6 1392 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1393 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1394 "offset": 98304
Christopher Haster 8332:5fce745004b6 1395 },
Christopher Haster 8332:5fce745004b6 1396 {
Christopher Haster 8332:5fce745004b6 1397 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1398 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1399 "offset": 90112
Christopher Haster 8332:5fce745004b6 1400 }
Christopher Haster 8332:5fce745004b6 1401 ],
Christopher Haster 8332:5fce745004b6 1402 "public": false
Christopher Haster 8332:5fce745004b6 1403 },
Christopher Haster 8332:5fce745004b6 1404 "MCU_NRF51_16K_S110": {
Christopher Haster 8332:5fce745004b6 1405 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1406 "public": false
Christopher Haster 8332:5fce745004b6 1407 },
Christopher Haster 8332:5fce745004b6 1408 "MCU_NRF51_16K_BOOT": {
Christopher Haster 8332:5fce745004b6 1409 "inherits": ["MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1410 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1411 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1412 "public": false
Christopher Haster 8332:5fce745004b6 1413 },
Christopher Haster 8332:5fce745004b6 1414 "MCU_NRF51_16K_BOOT_S110": {
Christopher Haster 8332:5fce745004b6 1415 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1416 "public": false
Christopher Haster 8332:5fce745004b6 1417 },
Christopher Haster 8332:5fce745004b6 1418 "MCU_NRF51_16K_OTA": {
Christopher Haster 8332:5fce745004b6 1419 "inherits": ["MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1420 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1421 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1422 "public": false
Christopher Haster 8332:5fce745004b6 1423 },
Christopher Haster 8332:5fce745004b6 1424 "MCU_NRF51_16K_OTA_S110": {
Christopher Haster 8332:5fce745004b6 1425 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1426 "public": false
Christopher Haster 8332:5fce745004b6 1427 },
Christopher Haster 8332:5fce745004b6 1428 "MCU_NRF51_32K": {
Christopher Haster 8332:5fce745004b6 1429 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1430 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1431 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1432 "public": false
Christopher Haster 8332:5fce745004b6 1433 },
Christopher Haster 8332:5fce745004b6 1434 "MCU_NRF51_32K_BOOT": {
Christopher Haster 8332:5fce745004b6 1435 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1436 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1437 "extra_labels_add": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1438 "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1439 "public": false
Christopher Haster 8332:5fce745004b6 1440 },
Christopher Haster 8332:5fce745004b6 1441 "MCU_NRF51_32K_OTA": {
Christopher Haster 8332:5fce745004b6 1442 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1443 "public": false,
Christopher Haster 8332:5fce745004b6 1444 "extra_labels_add": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1445 "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1446 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1447 },
Christopher Haster 8332:5fce745004b6 1448 "NRF51822": {
Christopher Haster 8332:5fce745004b6 1449 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1450 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1451 "macros_add": ["TARGET_NRF51822_MKIT"],
Sarah Marsh 8472:da9bd832dfd1 1452 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1453 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1454 },
Christopher Haster 8332:5fce745004b6 1455 "NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1456 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1457 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1458 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1459 },
Christopher Haster 8332:5fce745004b6 1460 "NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1461 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1462 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1463 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1464 },
Christopher Haster 8332:5fce745004b6 1465 "ARCH_BLE": {
Christopher Haster 8332:5fce745004b6 1466 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1467 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1468 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1469 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1470 },
Christopher Haster 8332:5fce745004b6 1471 "ARCH_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1472 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1473 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1474 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1475 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1476 },
Christopher Haster 8332:5fce745004b6 1477 "ARCH_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1478 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1479 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1480 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1481 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1482 },
Christopher Haster 8332:5fce745004b6 1483 "ARCH_LINK": {
Christopher Haster 8332:5fce745004b6 1484 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1485 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1486 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1487 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1488 },
Christopher Haster 8332:5fce745004b6 1489 "ARCH_LINK_BOOT": {
Christopher Haster 8332:5fce745004b6 1490 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1491 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1492 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1493 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1494 },
Christopher Haster 8332:5fce745004b6 1495 "ARCH_LINK_OTA": {
Christopher Haster 8332:5fce745004b6 1496 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1497 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1498 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1499 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1500 },
Christopher Haster 8332:5fce745004b6 1501 "SEEED_TINY_BLE": {
Christopher Haster 8332:5fce745004b6 1502 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1503 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1504 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1505 },
Christopher Haster 8332:5fce745004b6 1506 "SEEED_TINY_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1507 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1508 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1509 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1510 },
Christopher Haster 8332:5fce745004b6 1511 "SEEED_TINY_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1512 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1513 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1514 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1515 },
Christopher Haster 8332:5fce745004b6 1516 "HRM1017": {
Christopher Haster 8332:5fce745004b6 1517 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1518 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Sarah Marsh 8472:da9bd832dfd1 1519 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1520 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1521 },
Christopher Haster 8332:5fce745004b6 1522 "HRM1017_BOOT": {
Christopher Haster 8332:5fce745004b6 1523 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1524 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1525 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1526 },
Christopher Haster 8332:5fce745004b6 1527 "HRM1017_OTA": {
Christopher Haster 8332:5fce745004b6 1528 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1529 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1530 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1531 },
Christopher Haster 8332:5fce745004b6 1532 "RBLAB_NRF51822": {
Christopher Haster 8332:5fce745004b6 1533 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1534 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1535 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1536 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1537 },
Christopher Haster 8332:5fce745004b6 1538 "RBLAB_NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1539 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1540 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1541 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1542 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1543 },
Christopher Haster 8332:5fce745004b6 1544 "RBLAB_NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1545 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1546 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1547 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1548 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1549 },
Christopher Haster 8332:5fce745004b6 1550 "RBLAB_BLENANO": {
Christopher Haster 8332:5fce745004b6 1551 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1552 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1553 },
Christopher Haster 8332:5fce745004b6 1554 "RBLAB_BLENANO_BOOT": {
Christopher Haster 8332:5fce745004b6 1555 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1556 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1557 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1558 },
Christopher Haster 8332:5fce745004b6 1559 "RBLAB_BLENANO_OTA": {
Christopher Haster 8332:5fce745004b6 1560 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1561 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1562 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1563 },
Christopher Haster 8332:5fce745004b6 1564 "NRF51822_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 1565 "inherits": ["MCU_NRF51_16K"]
Christopher Haster 8332:5fce745004b6 1566 },
Christopher Haster 8332:5fce745004b6 1567 "WALLBOT_BLE": {
Christopher Haster 8332:5fce745004b6 1568 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1569 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1570 },
Christopher Haster 8332:5fce745004b6 1571 "WALLBOT_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1572 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1573 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1574 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1575 },
Christopher Haster 8332:5fce745004b6 1576 "WALLBOT_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1577 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1578 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1579 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1580 },
Christopher Haster 8332:5fce745004b6 1581 "DELTA_DFCM_NNN40": {
Christopher Haster 8332:5fce745004b6 1582 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1583 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1584 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1585 "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 1586 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1587 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1588 },
Christopher Haster 8332:5fce745004b6 1589 "DELTA_DFCM_NNN40_BOOT": {
Christopher Haster 8332:5fce745004b6 1590 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1591 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1592 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1593 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1594 },
Christopher Haster 8332:5fce745004b6 1595 "DELTA_DFCM_NNN40_OTA": {
Christopher Haster 8332:5fce745004b6 1596 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1597 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1598 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1599 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1600 },
Christopher Haster 8332:5fce745004b6 1601 "NRF51_DK_LEGACY": {
Christopher Haster 8332:5fce745004b6 1602 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1603 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1604 "extra_labels_add": ["NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1605 },
Christopher Haster 8332:5fce745004b6 1606 "NRF51_DK_BOOT": {
Christopher Haster 8332:5fce745004b6 1607 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1608 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1609 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1610 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1611 },
Christopher Haster 8332:5fce745004b6 1612 "NRF51_DK_OTA": {
Christopher Haster 8332:5fce745004b6 1613 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1614 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1615 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1616 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1617 },
Christopher Haster 8332:5fce745004b6 1618 "NRF51_DONGLE_LEGACY": {
Christopher Haster 8332:5fce745004b6 1619 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1620 "extra_labels_add": ["NRF51_DONGLE"],
Sarah Marsh 8472:da9bd832dfd1 1621 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1622 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1623 },
Christopher Haster 8332:5fce745004b6 1624 "NRF51_DONGLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1625 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1626 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1627 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1628 },
Christopher Haster 8332:5fce745004b6 1629 "NRF51_DONGLE_OTA": {
Christopher Haster 8332:5fce745004b6 1630 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1631 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1632 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1633 },
Christopher Haster 8332:5fce745004b6 1634 "NRF51_MICROBIT": {
Christopher Haster 8332:5fce745004b6 1635 "inherits": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1636 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Sarah Marsh 8912:449d8d318e02 1637 "release_versions": ["2"],
Sarah Marsh 8912:449d8d318e02 1638 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1639 },
Christopher Haster 8332:5fce745004b6 1640 "NRF51_MICROBIT_BOOT": {
Christopher Haster 8332:5fce745004b6 1641 "inherits": ["MCU_NRF51_16K_BOOT_S110"],
Christopher Haster 8332:5fce745004b6 1642 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1643 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1644 },
Christopher Haster 8332:5fce745004b6 1645 "NRF51_MICROBIT_OTA": {
Christopher Haster 8332:5fce745004b6 1646 "inherits": ["MCU_NRF51_16K_OTA_S110"],
Christopher Haster 8332:5fce745004b6 1647 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1648 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1649 },
Christopher Haster 8332:5fce745004b6 1650 "NRF51_MICROBIT_B": {
Christopher Haster 8332:5fce745004b6 1651 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1652 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1653 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1654 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1655 },
Christopher Haster 8332:5fce745004b6 1656 "NRF51_MICROBIT_B_BOOT": {
Christopher Haster 8332:5fce745004b6 1657 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1658 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1659 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1660 },
Christopher Haster 8332:5fce745004b6 1661 "NRF51_MICROBIT_B_OTA": {
Christopher Haster 8332:5fce745004b6 1662 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1663 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1664 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1665 },
Christopher Haster 8332:5fce745004b6 1666 "MTM_MTCONNECT04S": {
Christopher Haster 8332:5fce745004b6 1667 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1668 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1669 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1670 },
Christopher Haster 8332:5fce745004b6 1671 "MTM_MTCONNECT04S_BOOT": {
Christopher Haster 8332:5fce745004b6 1672 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1673 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1674 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1675 },
Christopher Haster 8332:5fce745004b6 1676 "MTM_MTCONNECT04S_OTA": {
Christopher Haster 8332:5fce745004b6 1677 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1678 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1679 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1680 },
Christopher Haster 8332:5fce745004b6 1681 "TY51822R3": {
Christopher Haster 8332:5fce745004b6 1682 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 1683 "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
Christopher Haster 8332:5fce745004b6 1684 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 1685 "detect_code": ["1019"],
Christopher Haster 8332:5fce745004b6 1686 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1687 "overrides": {"uart_hwfc": 0},
Sarah Marsh 8472:da9bd832dfd1 1688 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1689 },
Christopher Haster 8332:5fce745004b6 1690 "TY51822R3_BOOT": {
Christopher Haster 8332:5fce745004b6 1691 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1692 "extra_labels_add": ["TY51822R3"],
Christopher Haster 8332:5fce745004b6 1693 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1694 },
Christopher Haster 8332:5fce745004b6 1695 "TY51822R3_OTA": {
Christopher Haster 8332:5fce745004b6 1696 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1697 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1698 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1699 },
Christopher Haster 8332:5fce745004b6 1700 "ARM_MPS2_Target": {
Christopher Haster 8332:5fce745004b6 1701 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1702 "public": false,
Christopher Haster 8332:5fce745004b6 1703 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1704 },
Christopher Haster 8332:5fce745004b6 1705 "ARM_MPS2_M0": {
Christopher Haster 8332:5fce745004b6 1706 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1707 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1708 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1709 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
Christopher Haster 8332:5fce745004b6 1710 "macros": ["CMSDK_CM0"],
Christopher Haster 8332:5fce745004b6 1711 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1712 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1713 },
Christopher Haster 8332:5fce745004b6 1714 "ARM_MPS2_M0P": {
Christopher Haster 8332:5fce745004b6 1715 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1716 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1717 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1718 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0P"],
Christopher Haster 8332:5fce745004b6 1719 "macros": ["CMSDK_CM0plus"],
Christopher Haster 8332:5fce745004b6 1720 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1721 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1722 },
Christopher Haster 8332:5fce745004b6 1723 "ARM_MPS2_M1": {
Christopher Haster 8332:5fce745004b6 1724 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1725 "core": "Cortex-M1",
Christopher Haster 8332:5fce745004b6 1726 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1727 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M1"],
Christopher Haster 8332:5fce745004b6 1728 "macros": ["CMSDK_CM1"],
Christopher Haster 8332:5fce745004b6 1729 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1730 },
Christopher Haster 8332:5fce745004b6 1731 "ARM_MPS2_M3": {
Christopher Haster 8332:5fce745004b6 1732 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1733 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1734 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1735 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M3"],
Christopher Haster 8332:5fce745004b6 1736 "macros": ["CMSDK_CM3"],
Christopher Haster 8332:5fce745004b6 1737 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1738 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1739 },
Christopher Haster 8332:5fce745004b6 1740 "ARM_MPS2_M4": {
Christopher Haster 8332:5fce745004b6 1741 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1742 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1743 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1744 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
Christopher Haster 8332:5fce745004b6 1745 "macros": ["CMSDK_CM4"],
Christopher Haster 8332:5fce745004b6 1746 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1747 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1748 },
Christopher Haster 8332:5fce745004b6 1749 "ARM_MPS2_M7": {
Christopher Haster 8332:5fce745004b6 1750 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1751 "core": "Cortex-M7",
Christopher Haster 8332:5fce745004b6 1752 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1753 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M7"],
Christopher Haster 8332:5fce745004b6 1754 "macros": ["CMSDK_CM7"],
Christopher Haster 8332:5fce745004b6 1755 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1756 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1757 },
Christopher Haster 8332:5fce745004b6 1758 "ARM_IOTSS_Target": {
Christopher Haster 8332:5fce745004b6 1759 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1760 "public": false,
Christopher Haster 8332:5fce745004b6 1761 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1762 },
Christopher Haster 8332:5fce745004b6 1763 "ARM_IOTSS_BEID": {
Christopher Haster 8332:5fce745004b6 1764 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1765 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1766 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1767 "extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
Christopher Haster 8332:5fce745004b6 1768 "macros": ["CMSDK_BEID"],
Christopher Haster 8332:5fce745004b6 1769 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1770 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1771 },
Christopher Haster 8332:5fce745004b6 1772 "ARM_BEETLE_SOC": {
Christopher Haster 8332:5fce745004b6 1773 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1774 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1775 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1776 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1777 "extra_labels": ["ARM_SSG", "BEETLE"],
Christopher Haster 8332:5fce745004b6 1778 "macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
Christopher Haster 8332:5fce745004b6 1779 "device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 1780 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 1781 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1782 "device_name": "beetle"
Christopher Haster 8332:5fce745004b6 1783 },
Christopher Haster 8332:5fce745004b6 1784 "RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1785 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1786 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1787 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1788 "extra_labels": ["RENESAS", "MBRZA1H"],
Christopher Haster 8332:5fce745004b6 1789 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1790 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1791 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1792 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1793 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1794 "device_name": "r7s721001"
Christopher Haster 8332:5fce745004b6 1795 },
Christopher Haster 8332:5fce745004b6 1796 "VK_RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1797 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1798 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1799 "extra_labels": ["RENESAS", "VKRZA1H"],
Christopher Haster 8332:5fce745004b6 1800 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1801 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1802 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1803 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1804 "features": ["LWIP"],
Christopher Haster 8332:5fce745004b6 1805 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1806 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1807 },
Christopher Haster 8332:5fce745004b6 1808 "MAXWSNENV": {
Christopher Haster 8332:5fce745004b6 1809 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1810 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1811 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1812 "extra_labels": ["Maxim", "MAX32610"],
Christopher Haster 8332:5fce745004b6 1813 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1814 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1815 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1816 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1817 },
Christopher Haster 8332:5fce745004b6 1818 "MAX32600MBED": {
Christopher Haster 8332:5fce745004b6 1819 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1820 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1821 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1822 "extra_labels": ["Maxim", "MAX32600"],
Christopher Haster 8332:5fce745004b6 1823 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1824 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1825 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1826 "device_name": "max326000x85"
Christopher Haster 8332:5fce745004b6 1827 },
Christopher Haster 8332:5fce745004b6 1828 "MAX32620HSP": {
Christopher Haster 8332:5fce745004b6 1829 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1830 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1831 "extra_labels": ["Maxim", "MAX32620"],
Christopher Haster 8332:5fce745004b6 1832 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1833 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1834 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1835 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1836 },
Jeremy Brodt 8925:a20ee257d141 1837 "MAX32625MBED": {
Jeremy Brodt 8925:a20ee257d141 1838 "inherits": ["Target"],
Jeremy Brodt 8925:a20ee257d141 1839 "core": "Cortex-M4F",
Jeremy Brodt 8925:a20ee257d141 1840 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
Jeremy Brodt 8925:a20ee257d141 1841 "extra_labels": ["Maxim", "MAX32625"],
Jeremy Brodt 8925:a20ee257d141 1842 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Jeremy Brodt 8925:a20ee257d141 1843 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Jeremy Brodt 8925:a20ee257d141 1844 "release_versions": ["2", "5"]
Jeremy Brodt 8925:a20ee257d141 1845 },
Jeremy Brodt 8924:15136a8e47ec 1846 "MAX32625NEXPAQ": {
Christopher Haster 8332:5fce745004b6 1847 "inherits": ["Target"],
Jeremy Brodt 8924:15136a8e47ec 1848 "core": "Cortex-M4F",
Jeremy Brodt 8924:15136a8e47ec 1849 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
Jeremy Brodt 8924:15136a8e47ec 1850 "extra_labels": ["Maxim", "MAX32625"],
Jeremy Brodt 8924:15136a8e47ec 1851 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Jeremy Brodt 8924:15136a8e47ec 1852 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Jeremy Brodt 8924:15136a8e47ec 1853 "release_versions": ["2", "5"]
Jeremy Brodt 8924:15136a8e47ec 1854 },
Steven Cooreman 8832:bb5076d1eadc 1855 "EFM32": {
Christopher Haster 8332:5fce745004b6 1856 "inherits": ["Target"],
Steven Cooreman 8832:bb5076d1eadc 1857 "extra_labels": ["Silicon_Labs", "EFM32"],
Steven Cooreman 8832:bb5076d1eadc 1858 "public": false
Steven Cooreman 8832:bb5076d1eadc 1859 },
Steven Cooreman 8832:bb5076d1eadc 1860 "EFM32GG990F1024": {
Steven Cooreman 8832:bb5076d1eadc 1861 "inherits": ["EFM32"],
Steven Cooreman 8832:bb5076d1eadc 1862 "extra_labels_add": ["EFM32GG", "1024K"],
Christopher Haster 8332:5fce745004b6 1863 "core": "Cortex-M3",
Steven Cooreman 8831:d89f043d6f28 1864 "macros": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Christopher Haster 8332:5fce745004b6 1865 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Steven Cooreman 8832:bb5076d1eadc 1866 "release_versions": ["2", "5"],
Steven Cooreman 8832:bb5076d1eadc 1867 "device_name": "EFM32GG990F1024",
Steven Cooreman 8832:bb5076d1eadc 1868 "public": false
Steven Cooreman 8832:bb5076d1eadc 1869 },
Steven Cooreman 8832:bb5076d1eadc 1870 "EFM32GG_STK3700": {
Steven Cooreman 8832:bb5076d1eadc 1871 "inherits": ["EFM32GG990F1024"],
Christopher Haster 8332:5fce745004b6 1872 "progen": {"target": "efm32gg-stk"},
Christopher Haster 8332:5fce745004b6 1873 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1874 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 1875 "config": {
Steven Cooreman 8840:b3359e09c86e 1876 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1877 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1878 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 1879 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1880 },
Steven Cooreman 8840:b3359e09c86e 1881 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1882 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1883 "value": "48000000",
Steven Cooreman 8840:b3359e09c86e 1884 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1885 },
Steven Cooreman 8840:b3359e09c86e 1886 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1887 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1888 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 1889 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1890 },
Steven Cooreman 8840:b3359e09c86e 1891 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1892 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1893 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 1894 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1895 },
Steven Cooreman 8840:b3359e09c86e 1896 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1897 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 1898 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 1899 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1900 },
Steven Cooreman 8840:b3359e09c86e 1901 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 1902 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 1903 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 1904 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 8840:b3359e09c86e 1905 }
Steven Cooreman 8840:b3359e09c86e 1906 }
Christopher Haster 8332:5fce745004b6 1907 },
Steven Cooreman 8832:bb5076d1eadc 1908 "EFM32LG990F256": {
Steven Cooreman 8832:bb5076d1eadc 1909 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 1910 "extra_labels_add": ["EFM32LG", "256K"],
Christopher Haster 8332:5fce745004b6 1911 "core": "Cortex-M3",
Steven Cooreman 8831:d89f043d6f28 1912 "macros": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Christopher Haster 8332:5fce745004b6 1913 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 1914 "release_versions": ["2", "5"],
Steven Cooreman 8832:bb5076d1eadc 1915 "device_name": "EFM32LG990F256",
Steven Cooreman 8832:bb5076d1eadc 1916 "public": false
Christopher Haster 8332:5fce745004b6 1917 },
Christopher Haster 8332:5fce745004b6 1918 "EFM32LG_STK3600": {
Steven Cooreman 8832:bb5076d1eadc 1919 "inherits": ["EFM32LG990F256"],
Christopher Haster 8332:5fce745004b6 1920 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1921 "forced_reset_timeout": 2,
Steven Cooreman 8832:bb5076d1eadc 1922 "device_name": "EFM32LG990F256",
Steven Cooreman 8840:b3359e09c86e 1923 "config": {
Steven Cooreman 8840:b3359e09c86e 1924 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1925 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1926 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 1927 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1928 },
Steven Cooreman 8840:b3359e09c86e 1929 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1930 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1931 "value": "48000000",
Steven Cooreman 8840:b3359e09c86e 1932 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1933 },
Steven Cooreman 8840:b3359e09c86e 1934 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1935 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1936 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 1937 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1938 },
Steven Cooreman 8840:b3359e09c86e 1939 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1940 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1941 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 1942 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1943 },
Steven Cooreman 8840:b3359e09c86e 1944 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1945 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 1946 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 1947 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1948 },
Steven Cooreman 8840:b3359e09c86e 1949 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 1950 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 1951 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 1952 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 8840:b3359e09c86e 1953 }
Steven Cooreman 8840:b3359e09c86e 1954 }
Steven Cooreman 8832:bb5076d1eadc 1955 },
Steven Cooreman 8832:bb5076d1eadc 1956 "EFM32WG990F256": {
Steven Cooreman 8832:bb5076d1eadc 1957 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 1958 "extra_labels_add": ["EFM32WG", "256K"],
Steven Cooreman 8832:bb5076d1eadc 1959 "core": "Cortex-M4F",
Steven Cooreman 8832:bb5076d1eadc 1960 "macros": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Steven Cooreman 8832:bb5076d1eadc 1961 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 1962 "release_versions": ["2", "5"],
Steven Cooreman 8832:bb5076d1eadc 1963 "device_name": "EFM32WG990F256",
Steven Cooreman 8832:bb5076d1eadc 1964 "public": false
Christopher Haster 8332:5fce745004b6 1965 },
Christopher Haster 8332:5fce745004b6 1966 "EFM32WG_STK3800": {
Steven Cooreman 8832:bb5076d1eadc 1967 "inherits": ["EFM32WG990F256"],
Christopher Haster 8332:5fce745004b6 1968 "progen": {"target": "efm32wg-stk"},
Christopher Haster 8332:5fce745004b6 1969 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1970 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 1971 "config": {
Steven Cooreman 8840:b3359e09c86e 1972 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1973 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1974 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 1975 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1976 },
Steven Cooreman 8840:b3359e09c86e 1977 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1978 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1979 "value": "48000000",
Steven Cooreman 8840:b3359e09c86e 1980 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1981 },
Steven Cooreman 8840:b3359e09c86e 1982 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 1983 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 1984 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 1985 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 1986 },
Steven Cooreman 8840:b3359e09c86e 1987 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1988 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 1989 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 1990 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1991 },
Steven Cooreman 8840:b3359e09c86e 1992 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 1993 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 1994 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 1995 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 1996 },
Steven Cooreman 8840:b3359e09c86e 1997 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 1998 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 1999 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 2000 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 8840:b3359e09c86e 2001 }
Steven Cooreman 8840:b3359e09c86e 2002 }
Christopher Haster 8332:5fce745004b6 2003 },
Steven Cooreman 8832:bb5076d1eadc 2004 "EFM32ZG222F32": {
Steven Cooreman 8832:bb5076d1eadc 2005 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 2006 "extra_labels_add": ["EFM32ZG", "32K"],
Christopher Haster 8332:5fce745004b6 2007 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2008 "default_toolchain": "uARM",
Steven Cooreman 8832:bb5076d1eadc 2009 "macros": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
Christopher Haster 8332:5fce745004b6 2010 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Steven Cooreman 8832:bb5076d1eadc 2011 "default_lib": "small",
Steven Cooreman 8832:bb5076d1eadc 2012 "release_versions": ["2"],
Steven Cooreman 8832:bb5076d1eadc 2013 "device_name": "EFM32ZG222F32",
Steven Cooreman 8832:bb5076d1eadc 2014 "public": false
Steven Cooreman 8832:bb5076d1eadc 2015 },
Steven Cooreman 8832:bb5076d1eadc 2016 "EFM32ZG_STK3200": {
Steven Cooreman 8832:bb5076d1eadc 2017 "inherits": ["EFM32ZG222F32"],
Christopher Haster 8332:5fce745004b6 2018 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2019 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 2020 "config": {
Steven Cooreman 8840:b3359e09c86e 2021 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2022 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2023 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 2024 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2025 },
Steven Cooreman 8840:b3359e09c86e 2026 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2027 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2028 "value": "24000000",
Steven Cooreman 8840:b3359e09c86e 2029 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2030 },
Steven Cooreman 8840:b3359e09c86e 2031 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2032 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2033 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 2034 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2035 },
Steven Cooreman 8840:b3359e09c86e 2036 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2037 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2038 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 2039 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2040 },
Steven Cooreman 8840:b3359e09c86e 2041 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2042 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 2043 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 2044 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2045 },
Steven Cooreman 8840:b3359e09c86e 2046 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 2047 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 2048 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 2049 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 8840:b3359e09c86e 2050 }
Steven Cooreman 8840:b3359e09c86e 2051 }
Christopher Haster 8332:5fce745004b6 2052 },
Steven Cooreman 8832:bb5076d1eadc 2053 "EFM32HG322F64": {
Steven Cooreman 8832:bb5076d1eadc 2054 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 2055 "extra_labels_add": ["EFM32HG", "64K"],
Christopher Haster 8332:5fce745004b6 2056 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2057 "default_toolchain": "uARM",
Steven Cooreman 8832:bb5076d1eadc 2058 "macros": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
Christopher Haster 8332:5fce745004b6 2059 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Steven Cooreman 8832:bb5076d1eadc 2060 "default_lib": "small",
Steven Cooreman 8832:bb5076d1eadc 2061 "release_versions": ["2"],
Steven Cooreman 8832:bb5076d1eadc 2062 "device_name": "EFM32HG322F64",
Steven Cooreman 8832:bb5076d1eadc 2063 "public": false
Steven Cooreman 8832:bb5076d1eadc 2064 },
Steven Cooreman 8832:bb5076d1eadc 2065 "EFM32HG_STK3400": {
Steven Cooreman 8832:bb5076d1eadc 2066 "inherits": ["EFM32HG322F64"],
Christopher Haster 8332:5fce745004b6 2067 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2068 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 2069 "config": {
Steven Cooreman 8840:b3359e09c86e 2070 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2071 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2072 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 2073 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2074 },
Steven Cooreman 8840:b3359e09c86e 2075 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2076 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2077 "value": "24000000",
Steven Cooreman 8840:b3359e09c86e 2078 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2079 },
Steven Cooreman 8840:b3359e09c86e 2080 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2081 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2082 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 2083 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2084 },
Steven Cooreman 8840:b3359e09c86e 2085 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2086 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2087 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 2088 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2089 },
Steven Cooreman 8840:b3359e09c86e 2090 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2091 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 2092 "value": "21000000",
Steven Cooreman 8840:b3359e09c86e 2093 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2094 },
Steven Cooreman 8840:b3359e09c86e 2095 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 2096 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 2097 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
Steven Cooreman 8840:b3359e09c86e 2098 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 8840:b3359e09c86e 2099 }
Steven Cooreman 8840:b3359e09c86e 2100 }
Steven Cooreman 8832:bb5076d1eadc 2101 },
Steven Cooreman 8832:bb5076d1eadc 2102 "EFM32PG1B100F256GM32": {
Steven Cooreman 8832:bb5076d1eadc 2103 "inherits": ["EFM32"],
Steven Cooreman 8836:fff8ebb80b6c 2104 "extra_labels_add": ["EFM32PG", "256K"],
Steven Cooreman 8832:bb5076d1eadc 2105 "core": "Cortex-M4F",
Steven Cooreman 8832:bb5076d1eadc 2106 "macros": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
Steven Cooreman 8832:bb5076d1eadc 2107 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Steven Cooreman 8832:bb5076d1eadc 2108 "release_versions": ["2", "5"],
Steven Cooreman 8832:bb5076d1eadc 2109 "device_name": "EFM32PG1B100F256GM32",
Steven Cooreman 8832:bb5076d1eadc 2110 "public": false
Christopher Haster 8332:5fce745004b6 2111 },
Christopher Haster 8332:5fce745004b6 2112 "EFM32PG_STK3401": {
Steven Cooreman 8832:bb5076d1eadc 2113 "inherits": ["EFM32PG1B100F256GM32"],
Christopher Haster 8332:5fce745004b6 2114 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2115 "forced_reset_timeout": 2,
Steven Cooreman 8840:b3359e09c86e 2116 "config": {
Steven Cooreman 8840:b3359e09c86e 2117 "hf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2118 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2119 "value": "HFXO",
Steven Cooreman 8840:b3359e09c86e 2120 "macro_name": "CORE_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2121 },
Steven Cooreman 8840:b3359e09c86e 2122 "hfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2123 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2124 "value": "40000000",
Steven Cooreman 8840:b3359e09c86e 2125 "macro_name": "HFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2126 },
Steven Cooreman 8840:b3359e09c86e 2127 "lf_clock_src": {
Steven Cooreman 8840:b3359e09c86e 2128 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
Steven Cooreman 8840:b3359e09c86e 2129 "value": "LFXO",
Steven Cooreman 8840:b3359e09c86e 2130 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
Steven Cooreman 8840:b3359e09c86e 2131 },
Steven Cooreman 8840:b3359e09c86e 2132 "lfxo_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2133 "help": "Value: External crystal frequency in hertz",
Steven Cooreman 8840:b3359e09c86e 2134 "value": "32768",
Steven Cooreman 8840:b3359e09c86e 2135 "macro_name": "LFXO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2136 },
Steven Cooreman 8840:b3359e09c86e 2137 "hfrco_clock_freq": {
Steven Cooreman 8840:b3359e09c86e 2138 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
Steven Cooreman 8840:b3359e09c86e 2139 "value": "32000000",
Steven Cooreman 8840:b3359e09c86e 2140 "macro_name": "HFRCO_FREQUENCY"
Steven Cooreman 8840:b3359e09c86e 2141 },
Steven Cooreman 8840:b3359e09c86e 2142 "hfrco_band_select": {
Steven Cooreman 8840:b3359e09c86e 2143 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
Steven Cooreman 8840:b3359e09c86e 2144 "value": "cmuHFRCOFreq_32M0Hz",
Steven Cooreman 8840:b3359e09c86e 2145 "macro_name": "HFRCO_FREQUENCY_ENUM"
Steven Cooreman 8840:b3359e09c86e 2146 }
Steven Cooreman 8840:b3359e09c86e 2147 }
Christopher Haster 8332:5fce745004b6 2148 },
Christopher Haster 8332:5fce745004b6 2149 "WIZWIKI_W7500": {
Christopher Haster 8332:5fce745004b6 2150 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2151 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 2152 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
Christopher Haster 8332:5fce745004b6 2153 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 2154 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2155 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2156 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 2157 },
Christopher Haster 8332:5fce745004b6 2158 "WIZWIKI_W7500P": {
Christopher Haster 8332:5fce745004b6 2159 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2160 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 2161 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
Christopher Haster 8332:5fce745004b6 2162 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 2163 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2164 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2165 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 2166 },
Christopher Haster 8332:5fce745004b6 2167 "WIZWIKI_W7500ECO": {
Christopher Haster 8332:5fce745004b6 2168 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2169 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 2170 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
Christopher Haster 8332:5fce745004b6 2171 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 2172 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 2173 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 2174 },
Christopher Haster 8332:5fce745004b6 2175 "SAMR21G18A": {
Christopher Haster 8332:5fce745004b6 2176 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2177 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2178 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2179 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
Christopher Haster 8332:5fce745004b6 2180 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 2181 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2182 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 2183 "device_name": "ATSAMR21G18A"
Christopher Haster 8332:5fce745004b6 2184 },
Christopher Haster 8332:5fce745004b6 2185 "SAMD21J18A": {
Christopher Haster 8332:5fce745004b6 2186 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2187 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2188 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2189 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 2190 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 2191 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2192 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 2193 "device_name" : "ATSAMD21J18A"
Christopher Haster 8332:5fce745004b6 2194 },
Christopher Haster 8332:5fce745004b6 2195 "SAMD21G18A": {
Christopher Haster 8332:5fce745004b6 2196 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2197 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2198 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2199 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 2200 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 2201 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2202 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 2203 "device_name": "ATSAMD21G18A"
Christopher Haster 8332:5fce745004b6 2204 },
Christopher Haster 8332:5fce745004b6 2205 "SAML21J18A": {
Christopher Haster 8332:5fce745004b6 2206 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2207 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 2208 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2209 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
Christopher Haster 8332:5fce745004b6 2210 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Sarah Marsh 8472:da9bd832dfd1 2211 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2212 "device_name": "ATSAML21J18A"
Christopher Haster 8332:5fce745004b6 2213 },
Christopher Haster 8332:5fce745004b6 2214 "SAMG55J19": {
Christopher Haster 8332:5fce745004b6 2215 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2216 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 2217 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
Christopher Haster 8332:5fce745004b6 2218 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 2219 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 2220 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 2221 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 2222 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 2223 "device_name": "ATSAMG55J19"
Christopher Haster 8332:5fce745004b6 2224 },
Christopher Haster 8332:5fce745004b6 2225 "MCU_NRF51_UNIFIED": {
Christopher Haster 8332:5fce745004b6 2226 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2227 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 2228 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 2229 "macros": [
Christopher Haster 8332:5fce745004b6 2230 "NRF51",
Christopher Haster 8332:5fce745004b6 2231 "TARGET_NRF51822",
Christopher Haster 8332:5fce745004b6 2232 "BLE_STACK_SUPPORT_REQD",
Christopher Haster 8332:5fce745004b6 2233 "SOFTDEVICE_PRESENT",
Christopher Haster 8332:5fce745004b6 2234 "S130",
Christopher Haster 8332:5fce745004b6 2235 "TARGET_MCU_NRF51822"
Christopher Haster 8332:5fce745004b6 2236 ],
Christopher Haster 8332:5fce745004b6 2237 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 2238 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
Christopher Haster 8332:5fce745004b6 2239 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 2240 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2241 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2242 "public": false,
Christopher Haster 8332:5fce745004b6 2243 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 2244 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 2245 {
Christopher Haster 8332:5fce745004b6 2246 "boot": "",
Christopher Haster 8332:5fce745004b6 2247 "name": "s130_nrf51_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 2248 "offset": 110592
Christopher Haster 8332:5fce745004b6 2249 }
Christopher Haster 8332:5fce745004b6 2250 ],
Christopher Haster 8332:5fce745004b6 2251 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 2252 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 2253 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 2254 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 2255 },
Christopher Haster 8332:5fce745004b6 2256 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 2257 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 2258 "config": {
Christopher Haster 8332:5fce745004b6 2259 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 2260 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 2261 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 2262 },
Christopher Haster 8332:5fce745004b6 2263 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 2264 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 2265 "value": 1,
Christopher Haster 8332:5fce745004b6 2266 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 2267 }
Christopher Haster 8332:5fce745004b6 2268 },
Christopher Haster 8332:5fce745004b6 2269 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 2270 },
Christopher Haster 8332:5fce745004b6 2271 "MCU_NRF51_32K_UNIFIED": {
Christopher Haster 8332:5fce745004b6 2272 "inherits": ["MCU_NRF51_UNIFIED"],
Christopher Haster 8332:5fce745004b6 2273 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 2274 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 2275 "public": false
Christopher Haster 8332:5fce745004b6 2276 },
Christopher Haster 8332:5fce745004b6 2277 "NRF51_DK": {
Christopher Haster 8332:5fce745004b6 2278 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2279 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Andrzej Puzdrowski 8742:ea949d3ba022 2280 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 2281 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 2282 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 2283 },
Christopher Haster 8332:5fce745004b6 2284 "NRF51_DONGLE": {
Christopher Haster 8332:5fce745004b6 2285 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 2286 "progen": {"target": "nrf51-dongle"},
Mahadevan Mahesh 8366:70aeab6c7eb7 2287 "device_has": ["ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 2288 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 2289 },
Christopher Haster 8332:5fce745004b6 2290 "MCU_NRF52": {
Christopher Haster 8332:5fce745004b6 2291 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2292 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 2293 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
Christopher Haster 8332:5fce745004b6 2294 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
Christopher Haster 8332:5fce745004b6 2295 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 2296 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2297 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2298 "public": false,
Christopher Haster 8332:5fce745004b6 2299 "detect_code": ["1101"],
Christopher Haster 8332:5fce745004b6 2300 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 2301 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 2302 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 2303 {
Christopher Haster 8332:5fce745004b6 2304 "boot": "",
Christopher Haster 8332:5fce745004b6 2305 "name": "s132_nrf52_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 2306 "offset": 114688
Christopher Haster 8332:5fce745004b6 2307 }
Christopher Haster 8332:5fce745004b6 2308 ],
Christopher Haster 8332:5fce745004b6 2309 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 2310 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 2311 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 2312 },
Christopher Haster 8332:5fce745004b6 2313 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 2314 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 2315 "config": {
Christopher Haster 8332:5fce745004b6 2316 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 2317 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 2318 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 2319 },
Christopher Haster 8332:5fce745004b6 2320 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 2321 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 2322 "value": 1,
Christopher Haster 8332:5fce745004b6 2323 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 2324 }
Christopher Haster 8332:5fce745004b6 2325 }
Christopher Haster 8332:5fce745004b6 2326 },
Christopher Haster 8332:5fce745004b6 2327 "NRF52_DK": {
Christopher Haster 8332:5fce745004b6 2328 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2329 "inherits": ["MCU_NRF52"],
Sarah Marsh 8472:da9bd832dfd1 2330 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Andrzej Puzdrowski 8742:ea949d3ba022 2331 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2332 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 2333 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2334 },
Christopher Haster 8332:5fce745004b6 2335 "DELTA_DFBM_NQ620": {
Christopher Haster 8332:5fce745004b6 2336 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2337 "inherits": ["MCU_NRF52"],
Christopher Haster 8332:5fce745004b6 2338 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Christopher Haster 8332:5fce745004b6 2339 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2340 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 2341 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2342 },
Christopher Haster 8332:5fce745004b6 2343 "BLUEPILL_F103C8": {
Christopher Haster 8332:5fce745004b6 2344 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2345 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 2346 "extra_labels": ["STM", "STM32F1", "STM32F103C8"],
Christopher Haster 8332:5fce745004b6 2347 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 2348 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2349 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 2350 },
Christopher Haster 8332:5fce745004b6 2351 "NUMAKER_PFM_NUC472": {
Christopher Haster 8332:5fce745004b6 2352 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 2353 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 2354 "extra_labels": ["NUVOTON", "NUC472", "NUMAKER_PFM_NUC472"],
Christopher Haster 8332:5fce745004b6 2355 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2356 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2357 "inherits": ["Target"],
ccli8 9035:5a46830c3513 2358 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN"],
Christopher Haster 8342:520d28b41ea4 2359 "features": ["LWIP"],
0xc0170 8858:c8c6eb85a4ad 2360 "release_versions": ["5"],
Sarah Marsh 8472:da9bd832dfd1 2361 "device_name": "NUC472HI8AE"
Mahadevan Mahesh 8366:70aeab6c7eb7 2362 },
Christopher Haster 8332:5fce745004b6 2363 "NCS36510": {
Christopher Haster 8332:5fce745004b6 2364 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2365 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2366 "extra_labels": ["ONSEMI"],
Radhika 9051:ec9ae79ecd92 2367 "config": {
Radhika 9051:ec9ae79ecd92 2368 "mac-addr-low": {
Radhika 9052:9664d491fdd1 2369 "help": "Lower 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
Radhika 9052:9664d491fdd1 2370 "value": "0xFFFFFFFF"
Radhika 9051:ec9ae79ecd92 2371 },
Radhika 9051:ec9ae79ecd92 2372 "mac-addr-high": {
Radhika 9052:9664d491fdd1 2373 "help": "Higher 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
Radhika 9052:9664d491fdd1 2374 "value": "0xFFFFFFFF"
Radhika 9051:ec9ae79ecd92 2375 },
Radhika 9051:ec9ae79ecd92 2376 "32KHz-clk-trim": {
Radhika 9051:ec9ae79ecd92 2377 "help": "32KHz clock trim",
Radhika 9052:9664d491fdd1 2378 "value": "0x39"
Radhika 9051:ec9ae79ecd92 2379 },
Radhika 9051:ec9ae79ecd92 2380 "32MHz-clk-trim": {
Radhika 9051:ec9ae79ecd92 2381 "help": "32MHz clock trim",
Radhika 9052:9664d491fdd1 2382 "value": "0x17"
Radhika 9051:ec9ae79ecd92 2383 },
Radhika 9051:ec9ae79ecd92 2384 "rssi-trim": {
Radhika 9051:ec9ae79ecd92 2385 "help": "RSSI trim",
Radhika 9051:ec9ae79ecd92 2386 "value": "0x3D"
Radhika 9051:ec9ae79ecd92 2387 },
Radhika 9051:ec9ae79ecd92 2388 "txtune-trim": {
Radhika 9051:ec9ae79ecd92 2389 "help": "TX tune trim",
Radhika 9052:9664d491fdd1 2390 "value": "0xFFFFFFFF"
Radhika 9051:ec9ae79ecd92 2391 }
Radhika 9051:ec9ae79ecd92 2392 },
Christopher Haster 8332:5fce745004b6 2393 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
pradeep-gr 8861:42cabe489c4c 2394 "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
Christopher Haster 8332:5fce745004b6 2395 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
pradeep-gr 8860:235d4297bba6 2396 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER", "TRNG"],
maclobdell 8732:4166825f6c3c 2397 "device_name": "NCS36510",
Christopher Haster 8332:5fce745004b6 2398 "release_versions": ["2", "5"]
ccli8 8611:5441db5ff596 2399 },
ccli8 8611:5441db5ff596 2400 "NUMAKER_PFM_M453": {
ccli8 8611:5441db5ff596 2401 "core": "Cortex-M4F",
ccli8 8611:5441db5ff596 2402 "default_toolchain": "ARM",
ccli8 8611:5441db5ff596 2403 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453"],
ccli8 8611:5441db5ff596 2404 "is_disk_virtual": true,
ccli8 8611:5441db5ff596 2405 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
ccli8 8611:5441db5ff596 2406 "inherits": ["Target"],
ccli8 8611:5441db5ff596 2407 "progen": {"target": "numaker-pfm-m453"},
ccli8 9035:5a46830c3513 2408 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN"],
ccli8 8644:79863cfcbbb0 2409 "release_versions": ["2", "5"],
ccli8 8644:79863cfcbbb0 2410 "device_name": "M453VG6AE"
Rob Meades 8783:357c3fdee746 2411 },
Rob Meades 8783:357c3fdee746 2412 "HI2110": {
Rob Meades 8783:357c3fdee746 2413 "inherits": ["Target"],
Rob Meades 8783:357c3fdee746 2414 "core": "Cortex-M0",
Rob Meades 8783:357c3fdee746 2415 "default_toolchain": "GCC_ARM",
Rob Meades 8783:357c3fdee746 2416 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Rob Meades 8783:357c3fdee746 2417 "extra_labels": ["ublox"],
Rob Meades 8783:357c3fdee746 2418 "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1"],
Rob Meades 8783:357c3fdee746 2419 "public": false,
Rob Meades 8783:357c3fdee746 2420 "target_overrides": {
Rob Meades 8783:357c3fdee746 2421 "*": {
Rob Meades 8783:357c3fdee746 2422 "core.stdio-flush-at-exit": false
Rob Meades 8783:357c3fdee746 2423 }
Rob Meades 8783:357c3fdee746 2424 },
Rob Meades 8783:357c3fdee746 2425 "device_has": ["INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"],
Rob Meades 8783:357c3fdee746 2426 "default_lib": "std",
Rob Meades 8783:357c3fdee746 2427 "release_versions": ["5"]
Rob Meades 8783:357c3fdee746 2428 },
Rob Meades 8783:357c3fdee746 2429 "SARA_NBIOT": {
Rob Meades 8783:357c3fdee746 2430 "inherits": ["HI2110"],
Rob Meades 8783:357c3fdee746 2431 "extra_labels": ["ublox", "HI2110"],
Rob Meades 8783:357c3fdee746 2432 "public": false
Rob Meades 8783:357c3fdee746 2433 },
Rob Meades 8783:357c3fdee746 2434 "SARA_NBIOT_EVK": {
Rob Meades 8783:357c3fdee746 2435 "inherits": ["SARA_NBIOT"],
Rob Meades 8783:357c3fdee746 2436 "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
ccli8 8611:5441db5ff596 2437 }
Christopher Haster 8332:5fce745004b6 2438 }