ST / ST_Events-old

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Dependents:   HelloWorld_CCA01M1 HelloWorld_CCA02M1 CI-data-logger-server HelloWorld_CCA02M1 ... more

This is a fork of the events subdirectory of https://github.com/ARMmbed/mbed-os.

Note, you must import this library with import name: events!!!

targets/targets.json@8699:0582a3f97984, 2016-10-10 (annotated)

Committer:
adustm
Date:
Mon Oct 10 18:31:45 2016 +0200
Revision:
8699:0582a3f97984
Parent:
8674:b471b8c5963c
Child:
8700:42167837958f
ADD NEW TARGET : NUCLEO_F439ZI, based on existing NUCLEO_F429ZI

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Christopher Haster 8332:5fce745004b6 1 {
Christopher Haster 8332:5fce745004b6 2 "Target": {
Christopher Haster 8332:5fce745004b6 3 "core": null,
Christopher Haster 8332:5fce745004b6 4 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 5 "supported_toolchains": null,
Christopher Haster 8332:5fce745004b6 6 "extra_labels": [],
Christopher Haster 8332:5fce745004b6 7 "is_disk_virtual": false,
Christopher Haster 8332:5fce745004b6 8 "macros": [],
Christopher Haster 8332:5fce745004b6 9 "device_has": [],
Christopher Haster 8332:5fce745004b6 10 "features": [],
Christopher Haster 8332:5fce745004b6 11 "detect_code": [],
Christopher Haster 8332:5fce745004b6 12 "public": false,
Christopher Haster 8332:5fce745004b6 13 "default_lib": "std"
Christopher Haster 8332:5fce745004b6 14 },
Jimmy Brisson 8524:ddc94648bd40 15 "Super_Target": {
Jimmy Brisson 8524:ddc94648bd40 16 "inherits": ["Target"],
Jimmy Brisson 8524:ddc94648bd40 17 "core": "Cortex-M4",
Jimmy Brisson 8527:7bb374e8c313 18 "features_add": ["UVISOR", "BLE", "CLIENT", "IPV4", "IPV6"],
Jimmy Brisson 8527:7bb374e8c313 19 "supported_toolchains": ["ARM"]
Jimmy Brisson 8524:ddc94648bd40 20 },
Christopher Haster 8332:5fce745004b6 21 "CM4_UARM": {
Christopher Haster 8332:5fce745004b6 22 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 23 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 24 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 25 "public": false,
Christopher Haster 8332:5fce745004b6 26 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 27 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 28 },
Christopher Haster 8332:5fce745004b6 29 "CM4_ARM": {
Christopher Haster 8332:5fce745004b6 30 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 31 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 32 "public": false,
Christopher Haster 8332:5fce745004b6 33 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 34 },
Christopher Haster 8332:5fce745004b6 35 "CM4F_UARM": {
Christopher Haster 8332:5fce745004b6 36 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 37 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 38 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 39 "public": false,
Christopher Haster 8332:5fce745004b6 40 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 41 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 42 },
Christopher Haster 8332:5fce745004b6 43 "CM4F_ARM": {
Christopher Haster 8332:5fce745004b6 44 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 45 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 46 "public": false,
Christopher Haster 8332:5fce745004b6 47 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 48 },
Christopher Haster 8332:5fce745004b6 49 "LPCTarget": {
Christopher Haster 8332:5fce745004b6 50 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 51 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
Christopher Haster 8332:5fce745004b6 52 "public": false
Christopher Haster 8332:5fce745004b6 53 },
Christopher Haster 8332:5fce745004b6 54 "LPC11C24": {
Christopher Haster 8332:5fce745004b6 55 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 56 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 57 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
Christopher Haster 8332:5fce745004b6 58 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 59 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 60 "device_name": "LPC11C24FBD48/301"
Christopher Haster 8332:5fce745004b6 61 },
Christopher Haster 8332:5fce745004b6 62 "LPC1114": {
Christopher Haster 8332:5fce745004b6 63 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 64 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 65 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 66 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
Christopher Haster 8332:5fce745004b6 67 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 68 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 69 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 70 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 71 "device_name": "LPC1114FN28/102"
Christopher Haster 8332:5fce745004b6 72 },
Christopher Haster 8332:5fce745004b6 73 "LPC11U24": {
Christopher Haster 8332:5fce745004b6 74 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 75 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 76 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 77 "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
Christopher Haster 8332:5fce745004b6 78 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 79 "detect_code": ["1040"],
Christopher Haster 8332:5fce745004b6 80 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 81 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 82 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 83 "device_name": "LPC11U24FBD48/401"
Christopher Haster 8332:5fce745004b6 84 },
Christopher Haster 8332:5fce745004b6 85 "OC_MBUINO": {
Christopher Haster 8332:5fce745004b6 86 "inherits": ["LPC11U24"],
Christopher Haster 8332:5fce745004b6 87 "macros": ["TARGET_LPC11U24"],
Christopher Haster 8332:5fce745004b6 88 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 89 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 90 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 91 },
Christopher Haster 8332:5fce745004b6 92 "LPC11U24_301": {
Christopher Haster 8332:5fce745004b6 93 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 94 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 95 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 96 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 97 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 98 "device_name": "LPC11U24FHI33/301"
Christopher Haster 8332:5fce745004b6 99 },
Christopher Haster 8332:5fce745004b6 100 "LPC11U34_421": {
Christopher Haster 8332:5fce745004b6 101 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 102 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 103 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 104 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 105 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 106 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 107 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 108 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 109 },
Christopher Haster 8332:5fce745004b6 110 "MICRONFCBOARD": {
Christopher Haster 8332:5fce745004b6 111 "inherits": ["LPC11U34_421"],
Christopher Haster 8332:5fce745004b6 112 "macros": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
Christopher Haster 8332:5fce745004b6 113 "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
Sarah Marsh 8472:da9bd832dfd1 114 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 115 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 116 },
Christopher Haster 8332:5fce745004b6 117 "LPC11U35_401": {
Christopher Haster 8332:5fce745004b6 118 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 119 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 120 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 121 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 122 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 123 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 124 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 125 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 126 "device_name": "LPC11U35FBD48/401"
Christopher Haster 8332:5fce745004b6 127 },
Christopher Haster 8332:5fce745004b6 128 "LPC11U35_501": {
Christopher Haster 8332:5fce745004b6 129 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 130 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 131 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 132 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 133 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 134 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 135 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 136 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 137 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 138 },
Christopher Haster 8332:5fce745004b6 139 "LPC11U35_501_IBDAP": {
Christopher Haster 8332:5fce745004b6 140 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 141 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 142 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 143 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 144 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 145 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 146 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 147 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 148 },
Christopher Haster 8332:5fce745004b6 149 "XADOW_M0": {
Christopher Haster 8332:5fce745004b6 150 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 151 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 152 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 153 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 154 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 155 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 156 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 157 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 158 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 159 },
Christopher Haster 8332:5fce745004b6 160 "LPC11U35_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 161 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 162 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 163 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 164 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 165 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 166 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 167 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 168 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 169 },
Christopher Haster 8332:5fce745004b6 170 "LPC11U37_501": {
Christopher Haster 8332:5fce745004b6 171 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 172 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 173 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 174 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 175 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 176 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 177 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 178 },
Christopher Haster 8332:5fce745004b6 179 "LPCCAPPUCCINO": {
Christopher Haster 8332:5fce745004b6 180 "inherits": ["LPC11U37_501"],
Sarah Marsh 8472:da9bd832dfd1 181 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 182 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 183 },
Christopher Haster 8332:5fce745004b6 184 "ARCH_GPRS": {
Christopher Haster 8332:5fce745004b6 185 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 186 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 187 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 188 "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
Christopher Haster 8332:5fce745004b6 189 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 190 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 191 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 192 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 193 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 194 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 195 },
Christopher Haster 8332:5fce745004b6 196 "LPC11U68": {
Christopher Haster 8332:5fce745004b6 197 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 198 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 199 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 200 "extra_labels": ["NXP", "LPC11U6X"],
Christopher Haster 8332:5fce745004b6 201 "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 202 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 203 "detect_code": ["1168"],
Christopher Haster 8332:5fce745004b6 204 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 205 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 206 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 207 "device_name": "LPC11U68JBD100"
Christopher Haster 8332:5fce745004b6 208 },
Christopher Haster 8332:5fce745004b6 209 "LPC1347": {
Christopher Haster 8332:5fce745004b6 210 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 211 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 212 "extra_labels": ["NXP", "LPC13XX"],
Christopher Haster 8332:5fce745004b6 213 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 214 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 215 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 216 "device_name": "LPC1347FBD48"
Christopher Haster 8332:5fce745004b6 217 },
Christopher Haster 8332:5fce745004b6 218 "LPC1549": {
Christopher Haster 8332:5fce745004b6 219 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 220 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 221 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 222 "extra_labels": ["NXP", "LPC15XX"],
Christopher Haster 8332:5fce745004b6 223 "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 224 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 225 "detect_code": ["1549"],
Christopher Haster 8332:5fce745004b6 226 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 227 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 228 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 229 "device_name": "lpc1549"
Christopher Haster 8332:5fce745004b6 230 },
Christopher Haster 8332:5fce745004b6 231 "LPC1768": {
Christopher Haster 8332:5fce745004b6 232 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 233 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 234 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 235 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 236 "detect_code": ["1010"],
Christopher Haster 8332:5fce745004b6 237 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 238 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 239 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 240 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 241 },
Christopher Haster 8332:5fce745004b6 242 "ARCH_PRO": {
Christopher Haster 8332:5fce745004b6 243 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 244 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 245 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 246 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 247 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 248 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 249 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 250 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 251 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 252 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 253 },
Christopher Haster 8332:5fce745004b6 254 "UBLOX_C027": {
Christopher Haster 8332:5fce745004b6 255 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 256 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 257 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 258 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 259 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 260 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 261 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 262 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 263 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 264 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 265 },
Christopher Haster 8332:5fce745004b6 266 "XBED_LPC1768": {
Christopher Haster 8332:5fce745004b6 267 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 268 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 269 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 270 "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 271 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 272 "detect_code": ["1010"],
Sarah Marsh 8472:da9bd832dfd1 273 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 274 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 275 },
Christopher Haster 8332:5fce745004b6 276 "LPC2368": {
Christopher Haster 8332:5fce745004b6 277 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 278 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 279 "extra_labels": ["NXP", "LPC23XX"],
Christopher Haster 8332:5fce745004b6 280 "supported_toolchains": ["GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 281 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 282 },
Christopher Haster 8332:5fce745004b6 283 "LPC2460": {
Christopher Haster 8332:5fce745004b6 284 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 285 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 286 "extra_labels": ["NXP", "LPC2460"],
Christopher Haster 8332:5fce745004b6 287 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 288 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 289 },
Christopher Haster 8332:5fce745004b6 290 "LPC810": {
Christopher Haster 8332:5fce745004b6 291 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 292 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 293 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 294 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 295 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 296 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 297 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 298 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 299 "device_name": "LPC810M021FN8"
Christopher Haster 8332:5fce745004b6 300 },
Christopher Haster 8332:5fce745004b6 301 "LPC812": {
Christopher Haster 8332:5fce745004b6 302 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 303 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 304 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 305 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 306 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 307 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 308 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 309 "detect_code": ["1050"],
Christopher Haster 8332:5fce745004b6 310 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 311 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 312 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 313 "device_name": "LPC812M101JDH20"
Christopher Haster 8332:5fce745004b6 314 },
Christopher Haster 8332:5fce745004b6 315 "LPC824": {
Christopher Haster 8332:5fce745004b6 316 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 317 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 318 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 319 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 320 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 321 "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 322 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 323 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 324 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 325 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 326 "device_name": "LPC824M201JDH20"
Christopher Haster 8332:5fce745004b6 327 },
Christopher Haster 8332:5fce745004b6 328 "SSCI824": {
Christopher Haster 8332:5fce745004b6 329 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 330 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 331 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 332 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 333 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 334 "supported_toolchains": ["uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 335 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 336 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 337 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 338 },
Christopher Haster 8332:5fce745004b6 339 "LPC4088": {
Christopher Haster 8332:5fce745004b6 340 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 341 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 342 "extra_labels": ["NXP", "LPC408X"],
Christopher Haster 8332:5fce745004b6 343 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 344 "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 345 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 346 "function": "LPC4088Code.binary_hook",
Christopher Haster 8332:5fce745004b6 347 "toolchains": ["ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 348 },
Christopher Haster 8332:5fce745004b6 349 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 350 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 351 "device_name": "LPC4088FBD144"
Christopher Haster 8332:5fce745004b6 352 },
Christopher Haster 8332:5fce745004b6 353 "LPC4088_DM": {
Christopher Haster 8332:5fce745004b6 354 "inherits": ["LPC4088"],
Christopher Haster 8332:5fce745004b6 355 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 356 },
Christopher Haster 8332:5fce745004b6 357 "LPC4330_M4": {
Christopher Haster 8332:5fce745004b6 358 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 359 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 360 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 361 "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
Sarah Marsh 8472:da9bd832dfd1 362 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 363 "device_name": "LPC4330"
Christopher Haster 8332:5fce745004b6 364 },
Christopher Haster 8332:5fce745004b6 365 "LPC4330_M0": {
Christopher Haster 8332:5fce745004b6 366 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 367 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 368 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 369 "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 370 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 371 },
Christopher Haster 8332:5fce745004b6 372 "LPC4337": {
Christopher Haster 8332:5fce745004b6 373 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 374 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 375 "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
Christopher Haster 8332:5fce745004b6 376 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 377 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 378 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 379 "device_name": "LPC4337"
Christopher Haster 8332:5fce745004b6 380 },
Christopher Haster 8332:5fce745004b6 381 "LPC1800": {
Christopher Haster 8332:5fce745004b6 382 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 383 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 384 "extra_labels": ["NXP", "LPC43XX"],
Christopher Haster 8332:5fce745004b6 385 "public": false,
Christopher Haster 8332:5fce745004b6 386 "supported_toolchains": ["ARM", "GCC_CR", "IAR"]
Christopher Haster 8332:5fce745004b6 387 },
Christopher Haster 8332:5fce745004b6 388 "LPC11U37H_401": {
Christopher Haster 8332:5fce745004b6 389 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 390 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 391 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 392 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 393 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 394 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 395 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 396 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 397 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 398 "device_name": "LPC11U37HFBD64/401"
Christopher Haster 8332:5fce745004b6 399 },
Christopher Haster 8332:5fce745004b6 400 "ELEKTOR_COCORICO": {
Christopher Haster 8332:5fce745004b6 401 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 402 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 403 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 404 "supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 405 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 406 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 407 "detect_code": ["C000"],
Sarah Marsh 8472:da9bd832dfd1 408 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 409 "device_name": "LPC812M101JDH16"
Christopher Haster 8332:5fce745004b6 410 },
Christopher Haster 8332:5fce745004b6 411 "KL05Z": {
Christopher Haster 8332:5fce745004b6 412 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 413 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 414 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 415 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 416 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 417 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 418 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 419 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 420 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 421 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 422 "device_name": "MKL05Z32xxx4"
Christopher Haster 8332:5fce745004b6 423 },
Christopher Haster 8332:5fce745004b6 424 "KL25Z": {
Christopher Haster 8332:5fce745004b6 425 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 426 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 427 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 428 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 429 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 430 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 431 "detect_code": ["0200"],
Christopher Haster 8332:5fce745004b6 432 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 433 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 434 "device_name": "MKL25Z128xxx4"
Christopher Haster 8332:5fce745004b6 435 },
Christopher Haster 8332:5fce745004b6 436 "KL26Z": {
Christopher Haster 8332:5fce745004b6 437 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 438 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 439 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 440 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 441 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 442 "inherits": ["Target"],
Sarah Marsh 8472:da9bd832dfd1 443 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 444 "device_name": "MKL26Z128xxx4"
Christopher Haster 8332:5fce745004b6 445 },
Christopher Haster 8332:5fce745004b6 446 "KL46Z": {
Christopher Haster 8332:5fce745004b6 447 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 448 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 449 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 450 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 451 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 452 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 453 "detect_code": ["0220"],
Christopher Haster 8332:5fce745004b6 454 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 455 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 456 "device_name": "MKL46Z256xxx4"
Christopher Haster 8332:5fce745004b6 457 },
Christopher Haster 8332:5fce745004b6 458 "K20D50M": {
Christopher Haster 8332:5fce745004b6 459 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 460 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 461 "extra_labels": ["Freescale", "K20XX"],
Christopher Haster 8332:5fce745004b6 462 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 463 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 464 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 465 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 466 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 467 "device_name": "MK20DX128xxx5"
Christopher Haster 8332:5fce745004b6 468 },
Christopher Haster 8332:5fce745004b6 469 "TEENSY3_1": {
Christopher Haster 8332:5fce745004b6 470 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 471 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 472 "extra_labels": ["Freescale", "K20XX", "K20DX256"],
Christopher Haster 8332:5fce745004b6 473 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 474 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 475 "supported_toolchains": ["GCC_ARM", "ARM"],
Christopher Haster 8332:5fce745004b6 476 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 477 "function": "TEENSY3_1Code.binary_hook",
Christopher Haster 8332:5fce745004b6 478 "toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 479 },
Christopher Haster 8332:5fce745004b6 480 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 481 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 482 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 483 "device_name": "MK20DX256xxx7"
Christopher Haster 8332:5fce745004b6 484 },
Christopher Haster 8332:5fce745004b6 485 "K22F": {
Christopher Haster 8332:5fce745004b6 486 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 487 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 488 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 489 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"],
Christopher Haster 8332:5fce745004b6 490 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 491 "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 492 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 493 "detect_code": ["0231"],
Christopher Haster 8332:5fce745004b6 494 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 495 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 496 "device_name": "MK22DN512xxx5"
Christopher Haster 8332:5fce745004b6 497 },
Christopher Haster 8332:5fce745004b6 498 "KL27Z": {
Christopher Haster 8332:5fce745004b6 499 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 500 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 501 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 502 "macros": ["CPU_MKL27Z64VLH4", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 503 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 504 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 505 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 506 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 507 "detect_code": ["0261"],
Christopher Haster 8332:5fce745004b6 508 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 509 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 510 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 511 "device_name": "MKL27Z64xxx4"
Christopher Haster 8332:5fce745004b6 512 },
Christopher Haster 8332:5fce745004b6 513 "KL43Z": {
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Christopher Haster 8332:5fce745004b6 515 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 516 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 517 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 518 "macros": ["CPU_MKL43Z256VLH4", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 519 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 520 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 521 "detect_code": ["0262"],
Christopher Haster 8332:5fce745004b6 522 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 523 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 524 "device_name": "MKL43Z256xxx4"
Christopher Haster 8332:5fce745004b6 525 },
Mahadevan Mahesh 8665:1775fbac0db8 526 "KL82Z": {
Mahadevan Mahesh 8665:1775fbac0db8 527 "supported_form_factors": ["ARDUINO"],
Mahadevan Mahesh 8665:1775fbac0db8 528 "core": "Cortex-M0+",
Mahadevan Mahesh 8665:1775fbac0db8 529 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Mahadevan Mahesh 8665:1775fbac0db8 530 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8665:1775fbac0db8 531 "macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8665:1775fbac0db8 532 "is_disk_virtual": true,
Mahadevan Mahesh 8665:1775fbac0db8 533 "inherits": ["Target"],
Mahadevan Mahesh 8665:1775fbac0db8 534 "progen": {"target": "frdm-kl82z"},
Mahadevan Mahesh 8665:1775fbac0db8 535 "detect_code": ["0218"],
Mahadevan Mahesh 8665:1775fbac0db8 536 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Mahadevan Mahesh 8665:1775fbac0db8 537 "release_versions": ["2", "5"]
Mahadevan Mahesh 8665:1775fbac0db8 538 },
Christopher Haster 8332:5fce745004b6 539 "K64F": {
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Christopher Haster 8332:5fce745004b6 541 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 542 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 543 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 544 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 545 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 546 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 547 "detect_code": ["0240"],
Christopher Haster 8332:5fce745004b6 548 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG"],
Christopher Haster 8342:520d28b41ea4 549 "features": ["LWIP", "STORAGE"],
Sarah Marsh 8472:da9bd832dfd1 550 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 551 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 552 },
Christopher Haster 8332:5fce745004b6 553 "MTS_GAMBIT": {
Christopher Haster 8332:5fce745004b6 554 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 555 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 556 "supported_toolchains": ["ARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 557 "extra_labels": ["Freescale", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 558 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 559 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Sarah Marsh 8472:da9bd832dfd1 560 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 561 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 562 },
Christopher Haster 8332:5fce745004b6 563 "HEXIWEAR": {
Christopher Haster 8332:5fce745004b6 564 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 565 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 566 "extra_labels": ["Freescale", "KSDK2_MCUS", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 567 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 568 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Christopher Haster 8332:5fce745004b6 569 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 570 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 571 "detect_code": ["0214"],
Mahadevan Mahesh 8366:70aeab6c7eb7 572 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8332:5fce745004b6 573 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 574 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 575 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 576 },
Christopher Haster 8332:5fce745004b6 577 "K66F": {
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Christopher Haster 8332:5fce745004b6 579 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 580 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 581 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 582 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 583 "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 584 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 585 "detect_code": ["0311"],
Christopher Haster 8332:5fce745004b6 586 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 587 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 588 "device_name" : "MK66FN2M0xxx18"
Christopher Haster 8332:5fce745004b6 589 },
Christopher Haster 8332:5fce745004b6 590 "NUCLEO_F030R8": {
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Christopher Haster 8332:5fce745004b6 592 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 593 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 594 "extra_labels": ["STM", "STM32F0", "STM32F030R8"],
Christopher Haster 8332:5fce745004b6 595 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 596 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 597 "detect_code": ["0725"],
Laurent MEUNIER 8670:d320c94c6968 598 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 599 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 600 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 601 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 602 "device_name": "STM32F030R8"
Christopher Haster 8332:5fce745004b6 603 },
Christopher Haster 8332:5fce745004b6 604 "NUCLEO_F031K6": {
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Christopher Haster 8332:5fce745004b6 606 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 607 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 608 "extra_labels": ["STM", "STM32F0", "STM32F031K6"],
Christopher Haster 8332:5fce745004b6 609 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 610 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 611 "detect_code": ["0791"],
Laurent MEUNIER 8670:d320c94c6968 612 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 613 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 614 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 615 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 616 "device_name": "STM32F031K6"
Christopher Haster 8332:5fce745004b6 617 },
Christopher Haster 8332:5fce745004b6 618 "NUCLEO_F042K6": {
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Christopher Haster 8332:5fce745004b6 620 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 621 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 622 "extra_labels": ["STM", "STM32F0", "STM32F042K6"],
Christopher Haster 8332:5fce745004b6 623 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 624 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 625 "detect_code": ["0785"],
Laurent MEUNIER 8670:d320c94c6968 626 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 627 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 628 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 629 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 630 "device_name": "STM32F042K6"
Christopher Haster 8332:5fce745004b6 631 },
Christopher Haster 8332:5fce745004b6 632 "NUCLEO_F070RB": {
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Christopher Haster 8332:5fce745004b6 634 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 635 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 636 "extra_labels": ["STM", "STM32F0", "STM32F070RB"],
Christopher Haster 8332:5fce745004b6 637 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 638 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 639 "detect_code": ["0755"],
Laurent MEUNIER 8670:d320c94c6968 640 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 641 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 642 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 643 "device_name": "STM32F070RB"
Christopher Haster 8332:5fce745004b6 644 },
Christopher Haster 8332:5fce745004b6 645 "NUCLEO_F072RB": {
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Christopher Haster 8332:5fce745004b6 647 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 648 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 649 "extra_labels": ["STM", "STM32F0", "STM32F072RB"],
Christopher Haster 8332:5fce745004b6 650 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 651 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 652 "detect_code": ["0730"],
Laurent MEUNIER 8670:d320c94c6968 653 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 654 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 655 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 656 "device_name": "STM32F072RB"
Christopher Haster 8332:5fce745004b6 657 },
Christopher Haster 8332:5fce745004b6 658 "NUCLEO_F091RC": {
Christopher Haster 8332:5fce745004b6 659 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 660 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 661 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 662 "extra_labels": ["STM", "STM32F0", "STM32F091RC"],
Christopher Haster 8332:5fce745004b6 663 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 664 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 665 "detect_code": ["0750"],
Laurent MEUNIER 8670:d320c94c6968 666 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 667 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 668 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 669 "device_name": "STM32F091RC"
Christopher Haster 8332:5fce745004b6 670 },
Christopher Haster 8332:5fce745004b6 671 "NUCLEO_F103RB": {
Christopher Haster 8332:5fce745004b6 672 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 673 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 674 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 675 "extra_labels": ["STM", "STM32F1", "STM32F103RB"],
Christopher Haster 8332:5fce745004b6 676 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 677 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 678 "detect_code": ["0700"],
Laurent MEUNIER 8670:d320c94c6968 679 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 680 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 681 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 682 "device_name": "STM32F103RB"
Christopher Haster 8332:5fce745004b6 683 },
Christopher Haster 8332:5fce745004b6 684 "NUCLEO_F207ZG": {
Christopher Haster 8332:5fce745004b6 685 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 686 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 687 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 688 "extra_labels": ["STM", "STM32F2", "STM32F207ZG"],
Christopher Haster 8332:5fce745004b6 689 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 690 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 691 "detect_code": ["0835"],
Laurent MEUNIER 8670:d320c94c6968 692 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 693 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 694 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 695 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 696 "device_name" : "STM32F207ZG"
Christopher Haster 8332:5fce745004b6 697 },
Christopher Haster 8332:5fce745004b6 698 "NUCLEO_F302R8": {
Christopher Haster 8332:5fce745004b6 699 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 700 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 701 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 702 "extra_labels": ["STM", "STM32F3", "STM32F302R8"],
Christopher Haster 8332:5fce745004b6 703 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 704 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 705 "detect_code": ["0705"],
Laurent MEUNIER 8670:d320c94c6968 706 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 707 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 708 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 709 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 710 "device_name": "STM32F302R8"
Christopher Haster 8332:5fce745004b6 711 },
Christopher Haster 8332:5fce745004b6 712 "NUCLEO_F303K8": {
Christopher Haster 8332:5fce745004b6 713 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 714 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 715 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 716 "extra_labels": ["STM", "STM32F3", "STM32F303K8"],
Laurent MEUNIER 8670:d320c94c6968 717 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 718 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 719 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 720 "detect_code": ["0775"],
Christopher Haster 8332:5fce745004b6 721 "default_lib": "small",
Laurent MEUNIER 8670:d320c94c6968 722 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 723 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 724 "device_name": "STM32F303K8"
Christopher Haster 8332:5fce745004b6 725 },
Christopher Haster 8332:5fce745004b6 726 "NUCLEO_F303RE": {
Christopher Haster 8332:5fce745004b6 727 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 728 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 729 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 730 "extra_labels": ["STM", "STM32F3", "STM32F303RE"],
Christopher Haster 8332:5fce745004b6 731 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 732 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 733 "detect_code": ["0745"],
Laurent MEUNIER 8670:d320c94c6968 734 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 735 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 736 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 737 "device_name": "STM32F303RE"
Christopher Haster 8332:5fce745004b6 738 },
Christopher Haster 8332:5fce745004b6 739 "NUCLEO_F303ZE": {
Christopher Haster 8332:5fce745004b6 740 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 741 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 742 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 743 "extra_labels": ["STM", "STM32F3", "STM32F303ZE"],
Christopher Haster 8332:5fce745004b6 744 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 745 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 746 "detect_code": ["0747"],
Laurent MEUNIER 8670:d320c94c6968 747 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 748 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8507:29edfac555c0 749 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 750 "device_name": "STM32F303RE"
Christopher Haster 8332:5fce745004b6 751 },
Christopher Haster 8332:5fce745004b6 752 "NUCLEO_F334R8": {
Christopher Haster 8332:5fce745004b6 753 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 754 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 755 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 756 "extra_labels": ["STM", "STM32F3", "STM32F334R8"],
Christopher Haster 8332:5fce745004b6 757 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 758 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 759 "detect_code": ["0735"],
Laurent MEUNIER 8670:d320c94c6968 760 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 761 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 762 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 763 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 764 "device_name": "STM32F334R8"
Christopher Haster 8332:5fce745004b6 765 },
Christopher Haster 8332:5fce745004b6 766 "NUCLEO_F401RE": {
Christopher Haster 8332:5fce745004b6 767 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 768 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 769 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 770 "extra_labels": ["STM", "STM32F4", "STM32F401RE"],
Christopher Haster 8332:5fce745004b6 771 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 772 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 773 "detect_code": ["0720"],
Christopher Haster 8332:5fce745004b6 774 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 775 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 776 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 777 "device_name": "STM32F401RE"
Christopher Haster 8332:5fce745004b6 778 },
Christopher Haster 8332:5fce745004b6 779 "NUCLEO_F410RB": {
Christopher Haster 8332:5fce745004b6 780 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 781 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 782 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 783 "extra_labels": ["STM", "STM32F4", "STM32F410RB","STM32F410Rx"],
Christopher Haster 8332:5fce745004b6 784 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 785 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 786 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 787 "detect_code": ["0740"],
Christopher Haster 8332:5fce745004b6 788 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 789 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 790 "device_name": "STM32F410RB"
Christopher Haster 8332:5fce745004b6 791 },
Christopher Haster 8332:5fce745004b6 792 "NUCLEO_F411RE": {
Christopher Haster 8332:5fce745004b6 793 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 794 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 795 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 796 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 797 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 798 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 799 "detect_code": ["0740"],
Christopher Haster 8332:5fce745004b6 800 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 801 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 802 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 803 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 804 },
Christopher Haster 8332:5fce745004b6 805 "ELMO_F411RE": {
Christopher Haster 8332:5fce745004b6 806 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 807 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 808 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 809 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 810 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 811 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 812 "detect_code": ["----"],
Christopher Haster 8332:5fce745004b6 813 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 814 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 815 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 816 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 817 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 818 },
Christopher Haster 8332:5fce745004b6 819 "NUCLEO_F429ZI": {
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Christopher Haster 8332:5fce745004b6 821 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 822 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 823 "default_toolchain": "ARM",
adustm 8699:0582a3f97984 824 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "F429_F439"],
Christopher Haster 8332:5fce745004b6 825 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 826 "progen": {"target": "nucleo-f429zi"},
Christopher Haster 8332:5fce745004b6 827 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 828 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8332:5fce745004b6 829 "detect_code": ["0796"],
Christopher Haster 8342:520d28b41ea4 830 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 831 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 832 "device_name" : "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 833 },
adustm 8699:0582a3f97984 834 "NUCLEO_F439ZI": {
adustm 8699:0582a3f97984 835 "supported_form_factors": ["ARDUINO"],
adustm 8699:0582a3f97984 836 "inherits": ["Target"],
adustm 8699:0582a3f97984 837 "core": "Cortex-M4F",
adustm 8699:0582a3f97984 838 "default_toolchain": "ARM",
adustm 8699:0582a3f97984 839 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "F429_F439"],
adustm 8699:0582a3f97984 840 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
adustm 8699:0582a3f97984 841 "progen": {"target": "nucleo-f439zi"},
adustm 8699:0582a3f97984 842 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
adustm 8699:0582a3f97984 843 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
adustm 8699:0582a3f97984 844 "detect_code": ["0797"],
adustm 8699:0582a3f97984 845 "features": ["LWIP"],
adustm 8699:0582a3f97984 846 "release_versions": ["2", "5"],
adustm 8699:0582a3f97984 847 "device_name" : "STM32F429ZI"
adustm 8699:0582a3f97984 848 },
Christopher Haster 8332:5fce745004b6 849 "NUCLEO_F446RE": {
Christopher Haster 8332:5fce745004b6 850 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 851 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 852 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 853 "extra_labels": ["STM", "STM32F4", "STM32F446RE"],
Christopher Haster 8332:5fce745004b6 854 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 855 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 856 "detect_code": ["0777"],
Christopher Haster 8332:5fce745004b6 857 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 858 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 859 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 860 "device_name": "STM32F446RE"
Christopher Haster 8332:5fce745004b6 861 },
Christopher Haster 8332:5fce745004b6 862 "NUCLEO_F446ZE": {
Christopher Haster 8332:5fce745004b6 863 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 864 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 865 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 866 "extra_labels": ["STM", "STM32F4", "STM32F446ZE"],
Christopher Haster 8332:5fce745004b6 867 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 868 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 869 "detect_code": ["0778"],
Christopher Haster 8332:5fce745004b6 870 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 871 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 872 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 873 "device_name" : "STM32F446ZE"
Christopher Haster 8332:5fce745004b6 874 },
Christopher Haster 8332:5fce745004b6 875 "B96B_F446VE": {
Christopher Haster 8332:5fce745004b6 876 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 877 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 878 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 879 "extra_labels": ["STM", "STM32F4", "STM32F446VE"],
Christopher Haster 8332:5fce745004b6 880 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 881 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 882 "detect_code": ["0840"],
Christopher Haster 8332:5fce745004b6 883 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 884 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 885 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 886 "device_name":"STM32F446VE"
Christopher Haster 8332:5fce745004b6 887 },
Christopher Haster 8332:5fce745004b6 888 "NUCLEO_F746ZG": {
Christopher Haster 8332:5fce745004b6 889 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 890 "core": "Cortex-M7F",
Christopher Haster 8332:5fce745004b6 891 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746ZG"],
Christopher Haster 8332:5fce745004b6 892 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 893 "default_toolchain": "ARM",
Laurent MEUNIER 8670:d320c94c6968 894 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 895 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 896 "detect_code": ["0816"],
Laurent MEUNIER 8670:d320c94c6968 897 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 898 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 899 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 900 "device_name": "STM32F746ZG"
Christopher Haster 8332:5fce745004b6 901 },
Christopher Haster 8332:5fce745004b6 902 "NUCLEO_F767ZI": {
Christopher Haster 8332:5fce745004b6 903 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 904 "core": "Cortex-M7FD",
Christopher Haster 8332:5fce745004b6 905 "extra_labels": ["STM", "STM32F7", "STM32F767", "STM32F767ZI"],
Christopher Haster 8332:5fce745004b6 906 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 907 "default_toolchain": "ARM",
jeromecoutant 8661:e3f8446fe374 908 "supported_form_factors": ["ARDUINO"],
Laurent MEUNIER 8670:d320c94c6968 909 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 910 "detect_code": ["0818"],
Laurent MEUNIER 8670:d320c94c6968 911 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 912 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 913 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 914 "device_name" : "STM32F767ZI"
Christopher Haster 8332:5fce745004b6 915 },
Christopher Haster 8332:5fce745004b6 916 "NUCLEO_L011K4": {
Christopher Haster 8332:5fce745004b6 917 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 918 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 919 "extra_labels": ["STM", "STM32L0", "STM32L011K4"],
Christopher Haster 8332:5fce745004b6 920 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 921 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 922 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 923 "detect_code": ["0780"],
Christopher Haster 8332:5fce745004b6 924 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 925 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 926 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 927 "device_name": "STM32L011K4"
Christopher Haster 8332:5fce745004b6 928 },
Christopher Haster 8332:5fce745004b6 929 "NUCLEO_L031K6": {
Christopher Haster 8332:5fce745004b6 930 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 931 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 932 "extra_labels": ["STM", "STM32L0", "STM32L031K6"],
Christopher Haster 8332:5fce745004b6 933 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 934 "default_toolchain": "uARM",
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Christopher Haster 8332:5fce745004b6 938 "default_lib": "small",
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Sarah Marsh 8472:da9bd832dfd1 940 "device_name": "STM32L031K6"
Christopher Haster 8332:5fce745004b6 941 },
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Christopher Haster 8332:5fce745004b6 954 },
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adustm 8590:ebb840a10a54 959 "extra_labels": ["STM", "STM32L0", "STM32L073RZ", "STM32L073xx"],
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Sarah Marsh 8472:da9bd832dfd1 964 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 965 "device_name": "STM32L073RZ"
Christopher Haster 8332:5fce745004b6 966 },
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Sarah Marsh 8472:da9bd832dfd1 976 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 977 "device_name": "STM32L152RE"
Christopher Haster 8332:5fce745004b6 978 },
Christopher Haster 8332:5fce745004b6 979 "NUCLEO_L432KC": {
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Christopher Haster 8332:5fce745004b6 985 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 986 "detect_code": ["0770"],
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Sarah Marsh 8472:da9bd832dfd1 989 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 990 "device_name" : "STM32L432KC"
Christopher Haster 8332:5fce745004b6 991 },
Christopher Haster 8332:5fce745004b6 992 "NUCLEO_L476RG": {
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Christopher Haster 8332:5fce745004b6 994 "core": "Cortex-M4F",
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Christopher Haster 8332:5fce745004b6 996 "extra_labels": ["STM", "STM32L4", "STM32L476RG"],
Christopher Haster 8332:5fce745004b6 997 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 998 "inherits": ["Target"],
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Laurent MEUNIER 8670:d320c94c6968 1000 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1001 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1002 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1003 "device_name": "stm32l476rg"
Christopher Haster 8332:5fce745004b6 1004 },
Christopher Haster 8332:5fce745004b6 1005 "STM32F3XX": {
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Christopher Haster 8332:5fce745004b6 1007 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 1008 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1009 "extra_labels": ["STM", "STM32F3XX"],
Christopher Haster 8332:5fce745004b6 1010 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 1011 },
Christopher Haster 8332:5fce745004b6 1012 "STM32F407": {
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Christopher Haster 8332:5fce745004b6 1014 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1015 "extra_labels": ["STM", "STM32F4", "STM32F4XX"],
Christopher Haster 8332:5fce745004b6 1016 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 1017 },
Christopher Haster 8332:5fce745004b6 1018 "ARCH_MAX": {
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Christopher Haster 8332:5fce745004b6 1020 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1021 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1022 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1023 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1024 "macros": ["LSI_VALUE=32000"],
Christopher Haster 8332:5fce745004b6 1025 "inherits": ["Target"],
Laurent MEUNIER 8670:d320c94c6968 1026 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1027 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1028 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1029 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1030 },
Christopher Haster 8332:5fce745004b6 1031 "DISCO_F051R8": {
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Christopher Haster 8332:5fce745004b6 1033 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1034 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1035 "extra_labels": ["STM", "STM32F0", "STM32F051", "STM32F051R8"],
Christopher Haster 8332:5fce745004b6 1036 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1037 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1038 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1039 "device_name": "STM32F051R8"
Christopher Haster 8332:5fce745004b6 1040 },
Christopher Haster 8332:5fce745004b6 1041 "DISCO_F100RB": {
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Christopher Haster 8332:5fce745004b6 1043 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1044 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1045 "extra_labels": ["STM", "STM32F1", "STM32F100RB"],
Christopher Haster 8332:5fce745004b6 1046 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1047 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1048 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1049 "device_name": "STM32F100RB"
Christopher Haster 8332:5fce745004b6 1050 },
Christopher Haster 8332:5fce745004b6 1051 "DISCO_F303VC": {
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Christopher Haster 8332:5fce745004b6 1053 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1054 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1055 "extra_labels": ["STM", "STM32F3", "STM32F303", "STM32F303VC"],
Laurent MEUNIER 8670:d320c94c6968 1056 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1057 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1058 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1059 "device_name": "STM32F303VC"
Christopher Haster 8332:5fce745004b6 1060 },
Christopher Haster 8332:5fce745004b6 1061 "DISCO_F334C8": {
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Christopher Haster 8332:5fce745004b6 1063 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1064 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1065 "extra_labels": ["STM", "STM32F3", "STM32F334C8"],
Laurent MEUNIER 8670:d320c94c6968 1066 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1067 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1068 "detect_code": ["0810"],
Laurent MEUNIER 8670:d320c94c6968 1069 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1070 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1071 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1072 "device_name": "STM32F334C8"
Christopher Haster 8332:5fce745004b6 1073 },
Christopher Haster 8332:5fce745004b6 1074 "DISCO_F407VG": {
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Christopher Haster 8332:5fce745004b6 1076 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1077 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1078 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1079 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Sarah Marsh 8520:ebbeba690467 1080 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1081 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1082 },
Christopher Haster 8332:5fce745004b6 1083 "DISCO_F429ZI": {
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Christopher Haster 8332:5fce745004b6 1085 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1086 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1087 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx"],
Christopher Haster 8332:5fce745004b6 1088 "macros": ["RTC_LSI=1","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1089 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1090 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1091 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1092 "device_name": "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 1093 },
Christopher Haster 8332:5fce745004b6 1094 "DISCO_F469NI": {
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Christopher Haster 8332:5fce745004b6 1096 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1097 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1098 "extra_labels": ["STM", "STM32F4", "STM32F469", "STM32F469NI", "STM32F469xx"],
Christopher Haster 8332:5fce745004b6 1099 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1100 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1101 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1102 "detect_code": ["0788"],
Laurent MEUNIER 8670:d320c94c6968 1103 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1104 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1105 "device_name": "STM32F469NI"
Christopher Haster 8332:5fce745004b6 1106 },
Christopher Haster 8332:5fce745004b6 1107 "DISCO_L053C8": {
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Christopher Haster 8332:5fce745004b6 1109 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1110 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1111 "extra_labels": ["STM", "STM32L0", "STM32L053C8"],
Christopher Haster 8332:5fce745004b6 1112 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1113 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1114 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1115 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1116 "device_name": "STM32L053C8"
Christopher Haster 8332:5fce745004b6 1117 },
Christopher Haster 8332:5fce745004b6 1118 "DISCO_F746NG": {
Christopher Haster 8332:5fce745004b6 1119 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1120 "core": "Cortex-M7F",
Christopher Haster 8332:5fce745004b6 1121 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746NG"],
Christopher Haster 8332:5fce745004b6 1122 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1123 "default_toolchain": "ARM",
jeromecoutant 8661:e3f8446fe374 1124 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1125 "detect_code": ["0815"],
Laurent MEUNIER 8670:d320c94c6968 1126 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1127 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1128 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1129 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 1130 "device_name": "STM32F746NG"
Christopher Haster 8332:5fce745004b6 1131 },
Christopher Haster 8332:5fce745004b6 1132 "DISCO_F769NI": {
Christopher Haster 8332:5fce745004b6 1133 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1134 "core": "Cortex-M7FD",
Christopher Haster 8332:5fce745004b6 1135 "extra_labels": ["STM", "STM32F7", "STM32F769", "STM32F769NI"],
Christopher Haster 8332:5fce745004b6 1136 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1137 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1138 "detect_code": ["0817"],
Laurent MEUNIER 8670:d320c94c6968 1139 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1140 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1141 "features": ["LWIP"],
Sarah Marsh 8507:29edfac555c0 1142 "release_versions": ["2"],
Sarah Marsh 8507:29edfac555c0 1143 "device_name": "STM32F769NI"
Christopher Haster 8332:5fce745004b6 1144 },
Christopher Haster 8332:5fce745004b6 1145 "DISCO_L476VG": {
Christopher Haster 8332:5fce745004b6 1146 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1147 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1148 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1149 "extra_labels": ["STM", "STM32L4", "STM32L476VG"],
Christopher Haster 8332:5fce745004b6 1150 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1151 "detect_code": ["0820"],
Laurent MEUNIER 8670:d320c94c6968 1152 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1153 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1154 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1155 "device_name": "stm32l476vg"
Christopher Haster 8332:5fce745004b6 1156 },
Christopher Haster 8332:5fce745004b6 1157 "MTS_MDOT_F405RG": {
Christopher Haster 8332:5fce745004b6 1158 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1159 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1160 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1161 "extra_labels": ["STM", "STM32F4", "STM32F405RG"],
Christopher Haster 8332:5fce745004b6 1162 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1163 "macros": ["HSE_VALUE=26000000", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1164 "progen": {"target": "mts-mdot-f405rg"},
Christopher Haster 8332:5fce745004b6 1165 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1166 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1167 "device_name": "STM32F405RG"
Christopher Haster 8332:5fce745004b6 1168 },
Christopher Haster 8332:5fce745004b6 1169 "MTS_MDOT_F411RE": {
Christopher Haster 8332:5fce745004b6 1170 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1171 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1172 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1173 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1174 "macros": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1175 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1176 "function": "MTSCode.combine_bins_mts_dot",
Christopher Haster 8332:5fce745004b6 1177 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1178 },
Christopher Haster 8332:5fce745004b6 1179 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1180 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1181 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1182 },
Christopher Haster 8332:5fce745004b6 1183 "MTS_DRAGONFLY_F411RE": {
Christopher Haster 8332:5fce745004b6 1184 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1185 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1186 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1187 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1188 "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1189 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1190 "function": "MTSCode.combine_bins_mts_dragonfly",
Christopher Haster 8332:5fce745004b6 1191 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1192 },
Christopher Haster 8332:5fce745004b6 1193 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1194 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1195 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1196 },
Christopher Haster 8332:5fce745004b6 1197 "XDOT_L151CC": {
Christopher Haster 8332:5fce745004b6 1198 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1199 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1200 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1201 "extra_labels": ["STM", "STM32L1", "STM32L151CC"],
Christopher Haster 8332:5fce745004b6 1202 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1203 "progen": {"target": "xdot-l151cc"},
Christopher Haster 8332:5fce745004b6 1204 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1205 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1206 "release_versions": ["5"]
Christopher Haster 8332:5fce745004b6 1207 },
Christopher Haster 8332:5fce745004b6 1208 "MOTE_L152RC": {
Christopher Haster 8332:5fce745004b6 1209 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1210 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1211 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1212 "extra_labels": ["STM", "STM32L1", "STM32L152RC"],
Christopher Haster 8332:5fce745004b6 1213 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1214 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1215 "detect_code": ["4100"],
Christopher Haster 8332:5fce745004b6 1216 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1217 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1218 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1219 "device_name": "STM32L152RC"
Christopher Haster 8332:5fce745004b6 1220 },
Christopher Haster 8332:5fce745004b6 1221 "DISCO_F401VC": {
Christopher Haster 8332:5fce745004b6 1222 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1223 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1224 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 1225 "extra_labels": ["STM", "STM32F4", "STM32F401", "STM32F401VC"],
Christopher Haster 8332:5fce745004b6 1226 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1227 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Sarah Marsh 8472:da9bd832dfd1 1228 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1229 "device_name": "STM32F401VC"
Christopher Haster 8332:5fce745004b6 1230 },
andreas.larsson 8355:cb6a226655c8 1231 "UBLOX_EVK_ODIN_W2": {
Christopher Haster 8332:5fce745004b6 1232 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1233 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1234 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1235 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
andreas.larsson 8654:d2daf30b4d0f 1236 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx"],
Christopher Haster 8332:5fce745004b6 1237 "macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED"],
Christopher Haster 8332:5fce745004b6 1238 "inherits": ["Target"],
andreas.larsson 8654:d2daf30b4d0f 1239 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1240 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1241 "release_versions": ["5"],
Sarah Marsh 8472:da9bd832dfd1 1242 "device_name": "STM32F439ZI"
Christopher Haster 8332:5fce745004b6 1243 },
Christopher Haster 8332:5fce745004b6 1244 "NZ32_SC151": {
Christopher Haster 8332:5fce745004b6 1245 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1246 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1247 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1248 "program_cycle_s": 1.5,
Christopher Haster 8332:5fce745004b6 1249 "extra_labels": ["STM", "STM32L1", "STM32L151RC"],
Christopher Haster 8332:5fce745004b6 1250 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1251 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1252 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1253 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1254 "device_name": "STM32L151RC"
Christopher Haster 8332:5fce745004b6 1255 },
Christopher Haster 8332:5fce745004b6 1256 "MCU_NRF51": {
Christopher Haster 8332:5fce745004b6 1257 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1258 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1259 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1260 "macros": ["NRF51", "TARGET_NRF51822"],
Christopher Haster 8332:5fce745004b6 1261 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 1262 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
Christopher Haster 8332:5fce745004b6 1263 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 1264 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1265 "supported_toolchains": ["ARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1266 "public": false,
Christopher Haster 8332:5fce745004b6 1267 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 1268 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1269 {
Christopher Haster 8332:5fce745004b6 1270 "boot": "s130_nrf51_1.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1271 "name": "s130_nrf51_1.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1272 "offset": 114688
Christopher Haster 8332:5fce745004b6 1273 },
Christopher Haster 8332:5fce745004b6 1274 {
Christopher Haster 8332:5fce745004b6 1275 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1276 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1277 "offset": 98304
Christopher Haster 8332:5fce745004b6 1278 },
Christopher Haster 8332:5fce745004b6 1279 {
Christopher Haster 8332:5fce745004b6 1280 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1281 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1282 "offset": 90112
Christopher Haster 8332:5fce745004b6 1283 },
Christopher Haster 8332:5fce745004b6 1284 {
Christopher Haster 8332:5fce745004b6 1285 "boot": "s110_nrf51822_7.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1286 "name": "s110_nrf51822_7.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1287 "offset": 90112
Christopher Haster 8332:5fce745004b6 1288 },
Christopher Haster 8332:5fce745004b6 1289 {
Christopher Haster 8332:5fce745004b6 1290 "boot": "s110_nrf51822_6.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1291 "name": "s110_nrf51822_6.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1292 "offset": 81920
Christopher Haster 8332:5fce745004b6 1293 }
Christopher Haster 8332:5fce745004b6 1294 ],
Christopher Haster 8332:5fce745004b6 1295 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 1296 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1297 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 1298 "toolchains": ["ARM_STD", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 1299 },
Christopher Haster 8332:5fce745004b6 1300 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 1301 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1302 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 1303 },
Christopher Haster 8332:5fce745004b6 1304 "MCU_NRF51_16K_BASE": {
Christopher Haster 8332:5fce745004b6 1305 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1306 "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1307 "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1308 "public": false,
Christopher Haster 8332:5fce745004b6 1309 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 1310 },
Christopher Haster 8332:5fce745004b6 1311 "MCU_NRF51_16K_BOOT_BASE": {
Christopher Haster 8332:5fce745004b6 1312 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1313 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1314 "extra_labels_add": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1315 "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1316 "public": false
Christopher Haster 8332:5fce745004b6 1317 },
Christopher Haster 8332:5fce745004b6 1318 "MCU_NRF51_16K_OTA_BASE": {
Christopher Haster 8332:5fce745004b6 1319 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1320 "public": false,
Christopher Haster 8332:5fce745004b6 1321 "extra_labels_add": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1322 "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1323 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1324 },
Christopher Haster 8332:5fce745004b6 1325 "MCU_NRF51_16K": {
Christopher Haster 8332:5fce745004b6 1326 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1327 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1328 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1329 "public": false
Christopher Haster 8332:5fce745004b6 1330 },
Christopher Haster 8332:5fce745004b6 1331 "MCU_NRF51_S110": {
Christopher Haster 8332:5fce745004b6 1332 "extra_labels_add": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1333 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1334 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1335 {
Christopher Haster 8332:5fce745004b6 1336 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1337 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1338 "offset": 98304
Christopher Haster 8332:5fce745004b6 1339 },
Christopher Haster 8332:5fce745004b6 1340 {
Christopher Haster 8332:5fce745004b6 1341 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1342 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1343 "offset": 90112
Christopher Haster 8332:5fce745004b6 1344 }
Christopher Haster 8332:5fce745004b6 1345 ],
Christopher Haster 8332:5fce745004b6 1346 "public": false
Christopher Haster 8332:5fce745004b6 1347 },
Christopher Haster 8332:5fce745004b6 1348 "MCU_NRF51_16K_S110": {
Christopher Haster 8332:5fce745004b6 1349 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1350 "public": false
Christopher Haster 8332:5fce745004b6 1351 },
Christopher Haster 8332:5fce745004b6 1352 "MCU_NRF51_16K_BOOT": {
Christopher Haster 8332:5fce745004b6 1353 "inherits": ["MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1354 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1355 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1356 "public": false
Christopher Haster 8332:5fce745004b6 1357 },
Christopher Haster 8332:5fce745004b6 1358 "MCU_NRF51_16K_BOOT_S110": {
Christopher Haster 8332:5fce745004b6 1359 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1360 "public": false
Christopher Haster 8332:5fce745004b6 1361 },
Christopher Haster 8332:5fce745004b6 1362 "MCU_NRF51_16K_OTA": {
Christopher Haster 8332:5fce745004b6 1363 "inherits": ["MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1364 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1365 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1366 "public": false
Christopher Haster 8332:5fce745004b6 1367 },
Christopher Haster 8332:5fce745004b6 1368 "MCU_NRF51_16K_OTA_S110": {
Christopher Haster 8332:5fce745004b6 1369 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1370 "public": false
Christopher Haster 8332:5fce745004b6 1371 },
Christopher Haster 8332:5fce745004b6 1372 "MCU_NRF51_32K": {
Christopher Haster 8332:5fce745004b6 1373 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1374 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1375 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1376 "public": false
Christopher Haster 8332:5fce745004b6 1377 },
Christopher Haster 8332:5fce745004b6 1378 "MCU_NRF51_32K_BOOT": {
Christopher Haster 8332:5fce745004b6 1379 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1380 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1381 "extra_labels_add": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1382 "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1383 "public": false
Christopher Haster 8332:5fce745004b6 1384 },
Christopher Haster 8332:5fce745004b6 1385 "MCU_NRF51_32K_OTA": {
Christopher Haster 8332:5fce745004b6 1386 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1387 "public": false,
Christopher Haster 8332:5fce745004b6 1388 "extra_labels_add": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1389 "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1390 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1391 },
Christopher Haster 8332:5fce745004b6 1392 "NRF51822": {
Christopher Haster 8332:5fce745004b6 1393 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1394 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1395 "macros_add": ["TARGET_NRF51822_MKIT"],
Sarah Marsh 8472:da9bd832dfd1 1396 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1397 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1398 },
Christopher Haster 8332:5fce745004b6 1399 "NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1400 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1401 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1402 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1403 },
Christopher Haster 8332:5fce745004b6 1404 "NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1405 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1406 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1407 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1408 },
Christopher Haster 8332:5fce745004b6 1409 "ARCH_BLE": {
Christopher Haster 8332:5fce745004b6 1410 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1411 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1412 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1413 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1414 },
Christopher Haster 8332:5fce745004b6 1415 "ARCH_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1416 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1417 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1418 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1419 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1420 },
Christopher Haster 8332:5fce745004b6 1421 "ARCH_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1422 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1423 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1424 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1425 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1426 },
Christopher Haster 8332:5fce745004b6 1427 "ARCH_LINK": {
Christopher Haster 8332:5fce745004b6 1428 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1429 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1430 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1431 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1432 },
Christopher Haster 8332:5fce745004b6 1433 "ARCH_LINK_BOOT": {
Christopher Haster 8332:5fce745004b6 1434 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1435 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1436 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1437 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1438 },
Christopher Haster 8332:5fce745004b6 1439 "ARCH_LINK_OTA": {
Christopher Haster 8332:5fce745004b6 1440 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1441 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1442 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1443 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1444 },
Christopher Haster 8332:5fce745004b6 1445 "SEEED_TINY_BLE": {
Christopher Haster 8332:5fce745004b6 1446 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1447 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1448 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1449 },
Christopher Haster 8332:5fce745004b6 1450 "SEEED_TINY_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1451 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1452 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1453 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1454 },
Christopher Haster 8332:5fce745004b6 1455 "SEEED_TINY_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1456 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1457 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1458 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1459 },
Christopher Haster 8332:5fce745004b6 1460 "HRM1017": {
Christopher Haster 8332:5fce745004b6 1461 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1462 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Sarah Marsh 8472:da9bd832dfd1 1463 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1464 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1465 },
Christopher Haster 8332:5fce745004b6 1466 "HRM1017_BOOT": {
Christopher Haster 8332:5fce745004b6 1467 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1468 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1469 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1470 },
Christopher Haster 8332:5fce745004b6 1471 "HRM1017_OTA": {
Christopher Haster 8332:5fce745004b6 1472 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1473 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1474 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1475 },
Christopher Haster 8332:5fce745004b6 1476 "RBLAB_NRF51822": {
Christopher Haster 8332:5fce745004b6 1477 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1478 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1479 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1480 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1481 },
Christopher Haster 8332:5fce745004b6 1482 "RBLAB_NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1483 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1484 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1485 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1486 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1487 },
Christopher Haster 8332:5fce745004b6 1488 "RBLAB_NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1489 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1490 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1491 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1492 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1493 },
Christopher Haster 8332:5fce745004b6 1494 "RBLAB_BLENANO": {
Christopher Haster 8332:5fce745004b6 1495 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1496 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1497 },
Christopher Haster 8332:5fce745004b6 1498 "RBLAB_BLENANO_BOOT": {
Christopher Haster 8332:5fce745004b6 1499 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1500 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1501 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1502 },
Christopher Haster 8332:5fce745004b6 1503 "RBLAB_BLENANO_OTA": {
Christopher Haster 8332:5fce745004b6 1504 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1505 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1506 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1507 },
Christopher Haster 8332:5fce745004b6 1508 "NRF51822_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 1509 "inherits": ["MCU_NRF51_16K"]
Christopher Haster 8332:5fce745004b6 1510 },
Christopher Haster 8332:5fce745004b6 1511 "WALLBOT_BLE": {
Christopher Haster 8332:5fce745004b6 1512 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1513 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1514 },
Christopher Haster 8332:5fce745004b6 1515 "WALLBOT_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1516 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1517 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1518 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1519 },
Christopher Haster 8332:5fce745004b6 1520 "WALLBOT_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1521 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1522 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1523 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1524 },
Christopher Haster 8332:5fce745004b6 1525 "DELTA_DFCM_NNN40": {
Christopher Haster 8332:5fce745004b6 1526 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1527 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1528 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1529 "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 1530 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1531 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1532 },
Christopher Haster 8332:5fce745004b6 1533 "DELTA_DFCM_NNN40_BOOT": {
Christopher Haster 8332:5fce745004b6 1534 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1535 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1536 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1537 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1538 },
Christopher Haster 8332:5fce745004b6 1539 "DELTA_DFCM_NNN40_OTA": {
Christopher Haster 8332:5fce745004b6 1540 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1541 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1542 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1543 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1544 },
Christopher Haster 8332:5fce745004b6 1545 "NRF51_DK_LEGACY": {
Christopher Haster 8332:5fce745004b6 1546 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1547 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1548 "extra_labels_add": ["NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1549 },
Christopher Haster 8332:5fce745004b6 1550 "NRF51_DK_BOOT": {
Christopher Haster 8332:5fce745004b6 1551 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1552 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1553 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1554 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1555 },
Christopher Haster 8332:5fce745004b6 1556 "NRF51_DK_OTA": {
Christopher Haster 8332:5fce745004b6 1557 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1558 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1559 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1560 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1561 },
Christopher Haster 8332:5fce745004b6 1562 "NRF51_DONGLE_LEGACY": {
Christopher Haster 8332:5fce745004b6 1563 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1564 "extra_labels_add": ["NRF51_DONGLE"],
Sarah Marsh 8472:da9bd832dfd1 1565 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1566 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1567 },
Christopher Haster 8332:5fce745004b6 1568 "NRF51_DONGLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1569 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1570 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1571 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1572 },
Christopher Haster 8332:5fce745004b6 1573 "NRF51_DONGLE_OTA": {
Christopher Haster 8332:5fce745004b6 1574 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1575 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1576 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1577 },
Christopher Haster 8332:5fce745004b6 1578 "NRF51_MICROBIT": {
Christopher Haster 8332:5fce745004b6 1579 "inherits": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1580 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1581 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1582 },
Christopher Haster 8332:5fce745004b6 1583 "NRF51_MICROBIT_BOOT": {
Christopher Haster 8332:5fce745004b6 1584 "inherits": ["MCU_NRF51_16K_BOOT_S110"],
Christopher Haster 8332:5fce745004b6 1585 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1586 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1587 },
Christopher Haster 8332:5fce745004b6 1588 "NRF51_MICROBIT_OTA": {
Christopher Haster 8332:5fce745004b6 1589 "inherits": ["MCU_NRF51_16K_OTA_S110"],
Christopher Haster 8332:5fce745004b6 1590 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1591 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1592 },
Christopher Haster 8332:5fce745004b6 1593 "NRF51_MICROBIT_B": {
Christopher Haster 8332:5fce745004b6 1594 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1595 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1596 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1597 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1598 },
Christopher Haster 8332:5fce745004b6 1599 "NRF51_MICROBIT_B_BOOT": {
Christopher Haster 8332:5fce745004b6 1600 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1601 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1602 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1603 },
Christopher Haster 8332:5fce745004b6 1604 "NRF51_MICROBIT_B_OTA": {
Christopher Haster 8332:5fce745004b6 1605 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1606 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1607 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1608 },
Christopher Haster 8332:5fce745004b6 1609 "MTM_MTCONNECT04S": {
Christopher Haster 8332:5fce745004b6 1610 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1611 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1612 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1613 },
Christopher Haster 8332:5fce745004b6 1614 "MTM_MTCONNECT04S_BOOT": {
Christopher Haster 8332:5fce745004b6 1615 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1616 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1617 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1618 },
Christopher Haster 8332:5fce745004b6 1619 "MTM_MTCONNECT04S_OTA": {
Christopher Haster 8332:5fce745004b6 1620 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1621 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1622 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1623 },
Christopher Haster 8332:5fce745004b6 1624 "TY51822R3": {
Christopher Haster 8332:5fce745004b6 1625 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 1626 "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
Christopher Haster 8332:5fce745004b6 1627 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 1628 "detect_code": ["1019"],
Christopher Haster 8332:5fce745004b6 1629 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1630 "overrides": {"uart_hwfc": 0},
Sarah Marsh 8472:da9bd832dfd1 1631 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1632 },
Christopher Haster 8332:5fce745004b6 1633 "TY51822R3_BOOT": {
Christopher Haster 8332:5fce745004b6 1634 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1635 "extra_labels_add": ["TY51822R3"],
Christopher Haster 8332:5fce745004b6 1636 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1637 },
Christopher Haster 8332:5fce745004b6 1638 "TY51822R3_OTA": {
Christopher Haster 8332:5fce745004b6 1639 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1640 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1641 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1642 },
Christopher Haster 8332:5fce745004b6 1643 "ARM_MPS2_Target": {
Christopher Haster 8332:5fce745004b6 1644 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1645 "public": false,
Christopher Haster 8332:5fce745004b6 1646 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1647 },
Christopher Haster 8332:5fce745004b6 1648 "ARM_MPS2_M0": {
Christopher Haster 8332:5fce745004b6 1649 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1650 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1651 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1652 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
Christopher Haster 8332:5fce745004b6 1653 "macros": ["CMSDK_CM0"],
Christopher Haster 8332:5fce745004b6 1654 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1655 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1656 },
Christopher Haster 8332:5fce745004b6 1657 "ARM_MPS2_M0P": {
Christopher Haster 8332:5fce745004b6 1658 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1659 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1660 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1661 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0P"],
Christopher Haster 8332:5fce745004b6 1662 "macros": ["CMSDK_CM0plus"],
Christopher Haster 8332:5fce745004b6 1663 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1664 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1665 },
Christopher Haster 8332:5fce745004b6 1666 "ARM_MPS2_M1": {
Christopher Haster 8332:5fce745004b6 1667 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1668 "core": "Cortex-M1",
Christopher Haster 8332:5fce745004b6 1669 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1670 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M1"],
Christopher Haster 8332:5fce745004b6 1671 "macros": ["CMSDK_CM1"],
Christopher Haster 8332:5fce745004b6 1672 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1673 },
Christopher Haster 8332:5fce745004b6 1674 "ARM_MPS2_M3": {
Christopher Haster 8332:5fce745004b6 1675 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1676 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1677 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1678 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M3"],
Christopher Haster 8332:5fce745004b6 1679 "macros": ["CMSDK_CM3"],
Christopher Haster 8332:5fce745004b6 1680 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1681 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1682 },
Christopher Haster 8332:5fce745004b6 1683 "ARM_MPS2_M4": {
Christopher Haster 8332:5fce745004b6 1684 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1685 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1686 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1687 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
Christopher Haster 8332:5fce745004b6 1688 "macros": ["CMSDK_CM4"],
Christopher Haster 8332:5fce745004b6 1689 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1690 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1691 },
Christopher Haster 8332:5fce745004b6 1692 "ARM_MPS2_M7": {
Christopher Haster 8332:5fce745004b6 1693 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1694 "core": "Cortex-M7",
Christopher Haster 8332:5fce745004b6 1695 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1696 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M7"],
Christopher Haster 8332:5fce745004b6 1697 "macros": ["CMSDK_CM7"],
Christopher Haster 8332:5fce745004b6 1698 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1699 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1700 },
Christopher Haster 8332:5fce745004b6 1701 "ARM_IOTSS_Target": {
Christopher Haster 8332:5fce745004b6 1702 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1703 "public": false,
Christopher Haster 8332:5fce745004b6 1704 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1705 },
Christopher Haster 8332:5fce745004b6 1706 "ARM_IOTSS_BEID": {
Christopher Haster 8332:5fce745004b6 1707 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1708 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1709 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1710 "extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
Christopher Haster 8332:5fce745004b6 1711 "macros": ["CMSDK_BEID"],
Christopher Haster 8332:5fce745004b6 1712 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1713 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1714 },
Christopher Haster 8332:5fce745004b6 1715 "ARM_BEETLE_SOC": {
Christopher Haster 8332:5fce745004b6 1716 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1717 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1718 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1719 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1720 "extra_labels": ["ARM_SSG", "BEETLE"],
Christopher Haster 8332:5fce745004b6 1721 "macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
Christopher Haster 8332:5fce745004b6 1722 "device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 1723 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 1724 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1725 "device_name": "beetle"
Christopher Haster 8332:5fce745004b6 1726 },
Christopher Haster 8332:5fce745004b6 1727 "RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1728 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1729 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1730 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1731 "extra_labels": ["RENESAS", "MBRZA1H"],
Christopher Haster 8332:5fce745004b6 1732 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1733 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1734 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1735 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1736 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1737 "device_name": "r7s721001"
Christopher Haster 8332:5fce745004b6 1738 },
Christopher Haster 8332:5fce745004b6 1739 "VK_RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1740 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1741 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1742 "extra_labels": ["RENESAS", "VKRZA1H"],
Christopher Haster 8332:5fce745004b6 1743 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1744 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1745 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1746 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1747 "features": ["LWIP"],
Christopher Haster 8332:5fce745004b6 1748 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1749 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1750 },
Christopher Haster 8332:5fce745004b6 1751 "MAXWSNENV": {
Christopher Haster 8332:5fce745004b6 1752 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1753 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1754 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1755 "extra_labels": ["Maxim", "MAX32610"],
Christopher Haster 8332:5fce745004b6 1756 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1757 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1758 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1759 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1760 },
Christopher Haster 8332:5fce745004b6 1761 "MAX32600MBED": {
Christopher Haster 8332:5fce745004b6 1762 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1763 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1764 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1765 "extra_labels": ["Maxim", "MAX32600"],
Christopher Haster 8332:5fce745004b6 1766 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1767 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1768 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1769 "device_name": "max326000x85"
Christopher Haster 8332:5fce745004b6 1770 },
Christopher Haster 8332:5fce745004b6 1771 "MAX32620HSP": {
Christopher Haster 8332:5fce745004b6 1772 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1773 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1774 "extra_labels": ["Maxim", "MAX32620"],
Christopher Haster 8332:5fce745004b6 1775 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1776 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1777 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1778 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1779 },
Christopher Haster 8332:5fce745004b6 1780 "EFM32GG_STK3700": {
Christopher Haster 8332:5fce745004b6 1781 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1782 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1783 "macros": ["EFM32GG990F1024"],
Christopher Haster 8332:5fce745004b6 1784 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1785 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1786 "progen": {"target": "efm32gg-stk"},
Christopher Haster 8332:5fce745004b6 1787 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1788 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1789 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1790 "device_name": "EFM32GG990F1024"
Christopher Haster 8332:5fce745004b6 1791 },
Christopher Haster 8332:5fce745004b6 1792 "EFM32LG_STK3600": {
Christopher Haster 8332:5fce745004b6 1793 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1794 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1795 "macros": ["EFM32LG990F256"],
Christopher Haster 8332:5fce745004b6 1796 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1797 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1798 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1799 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1800 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1801 "device_name": "EFM32LG990F256"
Christopher Haster 8332:5fce745004b6 1802 },
Christopher Haster 8332:5fce745004b6 1803 "EFM32WG_STK3800": {
Christopher Haster 8332:5fce745004b6 1804 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1805 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1806 "macros": ["EFM32WG990F256"],
Christopher Haster 8332:5fce745004b6 1807 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1808 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1809 "progen": {"target": "efm32wg-stk"},
Christopher Haster 8332:5fce745004b6 1810 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1811 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1812 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1813 "device_name": "EFM32WG990F256"
Christopher Haster 8332:5fce745004b6 1814 },
Christopher Haster 8332:5fce745004b6 1815 "EFM32ZG_STK3200": {
Christopher Haster 8332:5fce745004b6 1816 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1817 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1818 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1819 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1820 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1821 "macros": ["EFM32ZG222F32"],
Christopher Haster 8332:5fce745004b6 1822 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1823 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 1824 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1825 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1826 "device_name": "EFM32ZG222F32"
Christopher Haster 8332:5fce745004b6 1827 },
Christopher Haster 8332:5fce745004b6 1828 "EFM32HG_STK3400": {
Christopher Haster 8332:5fce745004b6 1829 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1830 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1831 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1832 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1833 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1834 "macros": ["EFM32HG322F64"],
Christopher Haster 8332:5fce745004b6 1835 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1836 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 1837 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1838 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1839 "device_name": "EFM32HG322F64"
Christopher Haster 8332:5fce745004b6 1840 },
Christopher Haster 8332:5fce745004b6 1841 "EFM32PG_STK3401": {
Christopher Haster 8332:5fce745004b6 1842 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1843 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1844 "macros": ["EFM32PG1B200F256GM48"],
Christopher Haster 8332:5fce745004b6 1845 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1846 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1847 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1848 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1849 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1850 "device_name": "EFM32PG1B100F256GM32"
Christopher Haster 8332:5fce745004b6 1851 },
Christopher Haster 8332:5fce745004b6 1852 "WIZWIKI_W7500": {
Christopher Haster 8332:5fce745004b6 1853 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1854 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1855 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
Christopher Haster 8332:5fce745004b6 1856 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 1857 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1858 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1859 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1860 },
Christopher Haster 8332:5fce745004b6 1861 "WIZWIKI_W7500P": {
Christopher Haster 8332:5fce745004b6 1862 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1863 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1864 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
Christopher Haster 8332:5fce745004b6 1865 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 1866 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1867 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1868 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1869 },
Christopher Haster 8332:5fce745004b6 1870 "WIZWIKI_W7500ECO": {
Christopher Haster 8332:5fce745004b6 1871 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1872 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1873 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
Christopher Haster 8332:5fce745004b6 1874 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 1875 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1876 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1877 },
Christopher Haster 8332:5fce745004b6 1878 "SAMR21G18A": {
Christopher Haster 8332:5fce745004b6 1879 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1880 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1881 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1882 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
Christopher Haster 8332:5fce745004b6 1883 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1884 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1885 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1886 "device_name": "ATSAMR21G18A"
Christopher Haster 8332:5fce745004b6 1887 },
Christopher Haster 8332:5fce745004b6 1888 "SAMD21J18A": {
Christopher Haster 8332:5fce745004b6 1889 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1890 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1891 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1892 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 1893 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1894 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1895 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1896 "device_name" : "ATSAMD21J18A"
Christopher Haster 8332:5fce745004b6 1897 },
Christopher Haster 8332:5fce745004b6 1898 "SAMD21G18A": {
Christopher Haster 8332:5fce745004b6 1899 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1900 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1901 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1902 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 1903 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1904 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1905 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1906 "device_name": "ATSAMD21G18A"
Christopher Haster 8332:5fce745004b6 1907 },
Christopher Haster 8332:5fce745004b6 1908 "SAML21J18A": {
Christopher Haster 8332:5fce745004b6 1909 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1910 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1911 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1912 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
Christopher Haster 8332:5fce745004b6 1913 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Sarah Marsh 8472:da9bd832dfd1 1914 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1915 "device_name": "ATSAML21J18A"
Christopher Haster 8332:5fce745004b6 1916 },
Christopher Haster 8332:5fce745004b6 1917 "SAMG55J19": {
Christopher Haster 8332:5fce745004b6 1918 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1919 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 1920 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
Christopher Haster 8332:5fce745004b6 1921 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1922 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1923 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1924 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1925 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 1926 "device_name": "ATSAMG55J19"
Christopher Haster 8332:5fce745004b6 1927 },
Christopher Haster 8332:5fce745004b6 1928 "MCU_NRF51_UNIFIED": {
Christopher Haster 8332:5fce745004b6 1929 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1930 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1931 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1932 "macros": [
Christopher Haster 8332:5fce745004b6 1933 "NRF51",
Christopher Haster 8332:5fce745004b6 1934 "TARGET_NRF51822",
Christopher Haster 8332:5fce745004b6 1935 "BLE_STACK_SUPPORT_REQD",
Christopher Haster 8332:5fce745004b6 1936 "SOFTDEVICE_PRESENT",
Christopher Haster 8332:5fce745004b6 1937 "S130",
Christopher Haster 8332:5fce745004b6 1938 "TARGET_MCU_NRF51822"
Christopher Haster 8332:5fce745004b6 1939 ],
Christopher Haster 8332:5fce745004b6 1940 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 1941 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
Christopher Haster 8332:5fce745004b6 1942 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 1943 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1944 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1945 "public": false,
Christopher Haster 8332:5fce745004b6 1946 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 1947 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1948 {
Christopher Haster 8332:5fce745004b6 1949 "boot": "",
Christopher Haster 8332:5fce745004b6 1950 "name": "s130_nrf51_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1951 "offset": 110592
Christopher Haster 8332:5fce745004b6 1952 }
Christopher Haster 8332:5fce745004b6 1953 ],
Christopher Haster 8332:5fce745004b6 1954 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 1955 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1956 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 1957 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 1958 },
Christopher Haster 8332:5fce745004b6 1959 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 1960 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 1961 "config": {
Christopher Haster 8332:5fce745004b6 1962 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 1963 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 1964 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 1965 },
Christopher Haster 8332:5fce745004b6 1966 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 1967 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 1968 "value": 1,
Christopher Haster 8332:5fce745004b6 1969 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 1970 }
Christopher Haster 8332:5fce745004b6 1971 },
Christopher Haster 8332:5fce745004b6 1972 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 1973 },
Christopher Haster 8332:5fce745004b6 1974 "MCU_NRF51_32K_UNIFIED": {
Christopher Haster 8332:5fce745004b6 1975 "inherits": ["MCU_NRF51_UNIFIED"],
Christopher Haster 8332:5fce745004b6 1976 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1977 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1978 "public": false
Christopher Haster 8332:5fce745004b6 1979 },
Christopher Haster 8332:5fce745004b6 1980 "NRF51_DK": {
Christopher Haster 8332:5fce745004b6 1981 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1982 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 1983 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 1984 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1985 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1986 },
Christopher Haster 8332:5fce745004b6 1987 "NRF51_DONGLE": {
Christopher Haster 8332:5fce745004b6 1988 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 1989 "progen": {"target": "nrf51-dongle"},
Mahadevan Mahesh 8366:70aeab6c7eb7 1990 "device_has": ["ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 1991 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1992 },
Christopher Haster 8332:5fce745004b6 1993 "MCU_NRF52": {
Christopher Haster 8332:5fce745004b6 1994 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1995 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1996 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
Christopher Haster 8332:5fce745004b6 1997 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
Christopher Haster 8332:5fce745004b6 1998 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 1999 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2000 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2001 "public": false,
Christopher Haster 8332:5fce745004b6 2002 "detect_code": ["1101"],
Christopher Haster 8332:5fce745004b6 2003 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 2004 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 2005 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 2006 {
Christopher Haster 8332:5fce745004b6 2007 "boot": "",
Christopher Haster 8332:5fce745004b6 2008 "name": "s132_nrf52_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 2009 "offset": 114688
Christopher Haster 8332:5fce745004b6 2010 }
Christopher Haster 8332:5fce745004b6 2011 ],
Christopher Haster 8332:5fce745004b6 2012 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 2013 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 2014 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 2015 },
Christopher Haster 8332:5fce745004b6 2016 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 2017 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 2018 "config": {
Christopher Haster 8332:5fce745004b6 2019 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 2020 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 2021 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 2022 },
Christopher Haster 8332:5fce745004b6 2023 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 2024 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 2025 "value": 1,
Christopher Haster 8332:5fce745004b6 2026 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 2027 }
Christopher Haster 8332:5fce745004b6 2028 }
Christopher Haster 8332:5fce745004b6 2029 },
Christopher Haster 8332:5fce745004b6 2030 "NRF52_DK": {
Christopher Haster 8332:5fce745004b6 2031 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2032 "inherits": ["MCU_NRF52"],
Sarah Marsh 8472:da9bd832dfd1 2033 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Christopher Haster 8332:5fce745004b6 2034 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2035 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 2036 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2037 },
Christopher Haster 8332:5fce745004b6 2038 "DELTA_DFBM_NQ620": {
Christopher Haster 8332:5fce745004b6 2039 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2040 "inherits": ["MCU_NRF52"],
Christopher Haster 8332:5fce745004b6 2041 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Christopher Haster 8332:5fce745004b6 2042 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2043 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 2044 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2045 },
Christopher Haster 8332:5fce745004b6 2046 "BLUEPILL_F103C8": {
Christopher Haster 8332:5fce745004b6 2047 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2048 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 2049 "extra_labels": ["STM", "STM32F1", "STM32F103C8"],
Christopher Haster 8332:5fce745004b6 2050 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 2051 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2052 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 2053 },
Christopher Haster 8332:5fce745004b6 2054 "NUMAKER_PFM_NUC472": {
Christopher Haster 8332:5fce745004b6 2055 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 2056 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 2057 "extra_labels": ["NUVOTON", "NUC472", "NUMAKER_PFM_NUC472"],
Christopher Haster 8332:5fce745004b6 2058 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2059 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2060 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2061 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG"],
Christopher Haster 8342:520d28b41ea4 2062 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 2063 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 2064 "device_name": "NUC472HI8AE"
Mahadevan Mahesh 8366:70aeab6c7eb7 2065 },
Christopher Haster 8332:5fce745004b6 2066 "NCS36510": {
Christopher Haster 8332:5fce745004b6 2067 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2068 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2069 "extra_labels": ["ONSEMI"],
Christopher Haster 8332:5fce745004b6 2070 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
Christopher Haster 8332:5fce745004b6 2071 "macros": ["REVD", "CM3", "CPU_NCS36510", "TARGET_NCS36510"],
Christopher Haster 8332:5fce745004b6 2072 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Laurent MEUNIER 8647:8b0d2777b841 2073 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER"],
Christopher Haster 8332:5fce745004b6 2074 "release_versions": ["2", "5"]
ccli8 8611:5441db5ff596 2075 },
ccli8 8611:5441db5ff596 2076 "NUMAKER_PFM_M453": {
ccli8 8611:5441db5ff596 2077 "core": "Cortex-M4F",
ccli8 8611:5441db5ff596 2078 "default_toolchain": "ARM",
ccli8 8611:5441db5ff596 2079 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453"],
ccli8 8611:5441db5ff596 2080 "is_disk_virtual": true,
ccli8 8611:5441db5ff596 2081 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
ccli8 8611:5441db5ff596 2082 "inherits": ["Target"],
ccli8 8611:5441db5ff596 2083 "progen": {"target": "numaker-pfm-m453"},
ccli8 8611:5441db5ff596 2084 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
ccli8 8644:79863cfcbbb0 2085 "release_versions": ["2", "5"],
ccli8 8644:79863cfcbbb0 2086 "device_name": "M453VG6AE"
ccli8 8611:5441db5ff596 2087 }
Christopher Haster 8332:5fce745004b6 2088 }