ST / ST_Events-old

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Dependents:   HelloWorld_CCA01M1 HelloWorld_CCA02M1 CI-data-logger-server HelloWorld_CCA02M1 ... more

This is a fork of the events subdirectory of https://github.com/ARMmbed/mbed-os.

Note, you must import this library with import name: events!!!

targets/targets.json@8947:c6669467b509, 2016-10-25 (annotated)

Committer:
Marcelo Salazar
Date:
Tue Oct 25 22:34:18 2016 +0100
Revision:
8947:c6669467b509
Parent:
8784:66c791a77907
Child:
8948:1a8019161e2f
Folder re-org to fit new MCU K22F variances



This is a simple re-structure of the K22F folder to allow other MCU

variances to land here.

Created the MCU_K22F512 device but left the 'K22F' as a target for

the FRDM-K22F board.



Rebased to master

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Christopher Haster 8332:5fce745004b6 1 {
Christopher Haster 8332:5fce745004b6 2 "Target": {
Christopher Haster 8332:5fce745004b6 3 "core": null,
Christopher Haster 8332:5fce745004b6 4 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 5 "supported_toolchains": null,
Christopher Haster 8332:5fce745004b6 6 "extra_labels": [],
Christopher Haster 8332:5fce745004b6 7 "is_disk_virtual": false,
Christopher Haster 8332:5fce745004b6 8 "macros": [],
Christopher Haster 8332:5fce745004b6 9 "device_has": [],
Christopher Haster 8332:5fce745004b6 10 "features": [],
Christopher Haster 8332:5fce745004b6 11 "detect_code": [],
Christopher Haster 8332:5fce745004b6 12 "public": false,
Christopher Haster 8332:5fce745004b6 13 "default_lib": "std"
Christopher Haster 8332:5fce745004b6 14 },
Jimmy Brisson 8524:ddc94648bd40 15 "Super_Target": {
Jimmy Brisson 8524:ddc94648bd40 16 "inherits": ["Target"],
Jimmy Brisson 8524:ddc94648bd40 17 "core": "Cortex-M4",
Jimmy Brisson 8527:7bb374e8c313 18 "features_add": ["UVISOR", "BLE", "CLIENT", "IPV4", "IPV6"],
Jimmy Brisson 8527:7bb374e8c313 19 "supported_toolchains": ["ARM"]
Jimmy Brisson 8524:ddc94648bd40 20 },
Christopher Haster 8332:5fce745004b6 21 "CM4_UARM": {
Christopher Haster 8332:5fce745004b6 22 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 23 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 24 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 25 "public": false,
Christopher Haster 8332:5fce745004b6 26 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 27 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 28 },
Christopher Haster 8332:5fce745004b6 29 "CM4_ARM": {
Christopher Haster 8332:5fce745004b6 30 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 31 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 32 "public": false,
Christopher Haster 8332:5fce745004b6 33 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 34 },
Christopher Haster 8332:5fce745004b6 35 "CM4F_UARM": {
Christopher Haster 8332:5fce745004b6 36 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 37 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 38 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 39 "public": false,
Christopher Haster 8332:5fce745004b6 40 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 41 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 42 },
Christopher Haster 8332:5fce745004b6 43 "CM4F_ARM": {
Christopher Haster 8332:5fce745004b6 44 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 45 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 46 "public": false,
Christopher Haster 8332:5fce745004b6 47 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 48 },
Christopher Haster 8332:5fce745004b6 49 "LPCTarget": {
Christopher Haster 8332:5fce745004b6 50 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 51 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
Christopher Haster 8332:5fce745004b6 52 "public": false
Christopher Haster 8332:5fce745004b6 53 },
Christopher Haster 8332:5fce745004b6 54 "LPC11C24": {
Christopher Haster 8332:5fce745004b6 55 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 56 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 57 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
Christopher Haster 8332:5fce745004b6 58 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 59 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 60 "device_name": "LPC11C24FBD48/301"
Christopher Haster 8332:5fce745004b6 61 },
Christopher Haster 8332:5fce745004b6 62 "LPC1114": {
Christopher Haster 8332:5fce745004b6 63 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 64 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 65 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 66 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
Christopher Haster 8332:5fce745004b6 67 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 68 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 69 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 70 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 71 "device_name": "LPC1114FN28/102"
Christopher Haster 8332:5fce745004b6 72 },
Christopher Haster 8332:5fce745004b6 73 "LPC11U24": {
Christopher Haster 8332:5fce745004b6 74 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 75 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 76 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 77 "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
Christopher Haster 8332:5fce745004b6 78 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 79 "detect_code": ["1040"],
Christopher Haster 8332:5fce745004b6 80 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 81 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 82 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 83 "device_name": "LPC11U24FBD48/401"
Christopher Haster 8332:5fce745004b6 84 },
Christopher Haster 8332:5fce745004b6 85 "OC_MBUINO": {
Christopher Haster 8332:5fce745004b6 86 "inherits": ["LPC11U24"],
Christopher Haster 8332:5fce745004b6 87 "macros": ["TARGET_LPC11U24"],
Christopher Haster 8332:5fce745004b6 88 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 89 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 90 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 91 },
Christopher Haster 8332:5fce745004b6 92 "LPC11U24_301": {
Christopher Haster 8332:5fce745004b6 93 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 94 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 95 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 96 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 97 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 98 "device_name": "LPC11U24FHI33/301"
Christopher Haster 8332:5fce745004b6 99 },
Christopher Haster 8332:5fce745004b6 100 "LPC11U34_421": {
Christopher Haster 8332:5fce745004b6 101 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 102 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 103 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 104 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 105 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 106 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 107 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 108 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 109 },
Christopher Haster 8332:5fce745004b6 110 "MICRONFCBOARD": {
Christopher Haster 8332:5fce745004b6 111 "inherits": ["LPC11U34_421"],
Christopher Haster 8332:5fce745004b6 112 "macros": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
Christopher Haster 8332:5fce745004b6 113 "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
Sarah Marsh 8472:da9bd832dfd1 114 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 115 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 116 },
Christopher Haster 8332:5fce745004b6 117 "LPC11U35_401": {
Christopher Haster 8332:5fce745004b6 118 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 119 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 120 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 121 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 122 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 123 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 124 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 125 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 126 "device_name": "LPC11U35FBD48/401"
Christopher Haster 8332:5fce745004b6 127 },
Christopher Haster 8332:5fce745004b6 128 "LPC11U35_501": {
Christopher Haster 8332:5fce745004b6 129 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 130 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 131 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 132 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 133 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 134 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 135 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 136 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 137 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 138 },
Christopher Haster 8332:5fce745004b6 139 "LPC11U35_501_IBDAP": {
Christopher Haster 8332:5fce745004b6 140 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 141 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 142 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 143 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 144 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 145 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 146 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 147 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 148 },
Christopher Haster 8332:5fce745004b6 149 "XADOW_M0": {
Christopher Haster 8332:5fce745004b6 150 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 151 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 152 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 153 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 154 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 155 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 156 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 157 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 158 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 159 },
Christopher Haster 8332:5fce745004b6 160 "LPC11U35_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 161 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 162 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 163 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 164 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 165 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 166 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 167 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 168 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 169 },
Christopher Haster 8332:5fce745004b6 170 "LPC11U37_501": {
Christopher Haster 8332:5fce745004b6 171 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 172 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 173 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 174 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 175 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 176 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 177 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 178 },
Christopher Haster 8332:5fce745004b6 179 "LPCCAPPUCCINO": {
Christopher Haster 8332:5fce745004b6 180 "inherits": ["LPC11U37_501"],
Sarah Marsh 8472:da9bd832dfd1 181 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 182 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 183 },
Christopher Haster 8332:5fce745004b6 184 "ARCH_GPRS": {
Christopher Haster 8332:5fce745004b6 185 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 186 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 187 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 188 "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
Christopher Haster 8332:5fce745004b6 189 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 190 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 191 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 192 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 193 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 194 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 195 },
Christopher Haster 8332:5fce745004b6 196 "LPC11U68": {
Christopher Haster 8332:5fce745004b6 197 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 198 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 199 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 200 "extra_labels": ["NXP", "LPC11U6X"],
Christopher Haster 8332:5fce745004b6 201 "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 202 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 203 "detect_code": ["1168"],
Christopher Haster 8332:5fce745004b6 204 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 205 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 206 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 207 "device_name": "LPC11U68JBD100"
Christopher Haster 8332:5fce745004b6 208 },
Christopher Haster 8332:5fce745004b6 209 "LPC1347": {
Christopher Haster 8332:5fce745004b6 210 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 211 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 212 "extra_labels": ["NXP", "LPC13XX"],
Christopher Haster 8332:5fce745004b6 213 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 214 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 215 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 216 "device_name": "LPC1347FBD48"
Christopher Haster 8332:5fce745004b6 217 },
Christopher Haster 8332:5fce745004b6 218 "LPC1549": {
Christopher Haster 8332:5fce745004b6 219 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 220 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 221 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 222 "extra_labels": ["NXP", "LPC15XX"],
Christopher Haster 8332:5fce745004b6 223 "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 224 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 225 "detect_code": ["1549"],
Christopher Haster 8332:5fce745004b6 226 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 227 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 228 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 229 "device_name": "lpc1549"
Christopher Haster 8332:5fce745004b6 230 },
Christopher Haster 8332:5fce745004b6 231 "LPC1768": {
Christopher Haster 8332:5fce745004b6 232 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 233 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 234 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 235 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 236 "detect_code": ["1010"],
Christopher Haster 8332:5fce745004b6 237 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 238 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 239 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 240 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 241 },
Christopher Haster 8332:5fce745004b6 242 "ARCH_PRO": {
Christopher Haster 8332:5fce745004b6 243 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 244 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 245 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 246 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 247 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 248 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 249 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 250 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 251 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 252 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 253 },
Christopher Haster 8332:5fce745004b6 254 "UBLOX_C027": {
Christopher Haster 8332:5fce745004b6 255 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 256 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 257 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 258 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 259 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 260 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 261 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 262 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 263 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 264 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 265 },
Christopher Haster 8332:5fce745004b6 266 "XBED_LPC1768": {
Christopher Haster 8332:5fce745004b6 267 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 268 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 269 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 270 "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 271 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 272 "detect_code": ["1010"],
Sarah Marsh 8472:da9bd832dfd1 273 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 274 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 275 },
Christopher Haster 8332:5fce745004b6 276 "LPC2368": {
Christopher Haster 8332:5fce745004b6 277 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 278 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 279 "extra_labels": ["NXP", "LPC23XX"],
Christopher Haster 8332:5fce745004b6 280 "supported_toolchains": ["GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 281 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 282 },
Christopher Haster 8332:5fce745004b6 283 "LPC2460": {
Christopher Haster 8332:5fce745004b6 284 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 285 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 286 "extra_labels": ["NXP", "LPC2460"],
Christopher Haster 8332:5fce745004b6 287 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 288 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 289 },
Christopher Haster 8332:5fce745004b6 290 "LPC810": {
Christopher Haster 8332:5fce745004b6 291 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 292 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 293 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 294 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 295 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 296 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 297 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 298 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 299 "device_name": "LPC810M021FN8"
Christopher Haster 8332:5fce745004b6 300 },
Christopher Haster 8332:5fce745004b6 301 "LPC812": {
Christopher Haster 8332:5fce745004b6 302 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 303 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 304 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 305 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 306 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 307 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 308 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 309 "detect_code": ["1050"],
Christopher Haster 8332:5fce745004b6 310 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 311 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 312 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 313 "device_name": "LPC812M101JDH20"
Christopher Haster 8332:5fce745004b6 314 },
Christopher Haster 8332:5fce745004b6 315 "LPC824": {
Christopher Haster 8332:5fce745004b6 316 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 317 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 318 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 319 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 320 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 321 "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 322 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 323 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 324 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 325 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 326 "device_name": "LPC824M201JDH20"
Christopher Haster 8332:5fce745004b6 327 },
Christopher Haster 8332:5fce745004b6 328 "SSCI824": {
Christopher Haster 8332:5fce745004b6 329 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 330 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 331 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 332 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 333 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 334 "supported_toolchains": ["uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 335 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 336 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 337 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 338 },
Christopher Haster 8332:5fce745004b6 339 "LPC4088": {
Christopher Haster 8332:5fce745004b6 340 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 341 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 342 "extra_labels": ["NXP", "LPC408X"],
Christopher Haster 8332:5fce745004b6 343 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 344 "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 345 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 346 "function": "LPC4088Code.binary_hook",
Christopher Haster 8332:5fce745004b6 347 "toolchains": ["ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 348 },
Christopher Haster 8332:5fce745004b6 349 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 350 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 351 "device_name": "LPC4088FBD144"
Christopher Haster 8332:5fce745004b6 352 },
Christopher Haster 8332:5fce745004b6 353 "LPC4088_DM": {
Christopher Haster 8332:5fce745004b6 354 "inherits": ["LPC4088"],
Christopher Haster 8332:5fce745004b6 355 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 356 },
Christopher Haster 8332:5fce745004b6 357 "LPC4330_M4": {
Christopher Haster 8332:5fce745004b6 358 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 359 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 360 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 361 "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
Sarah Marsh 8472:da9bd832dfd1 362 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 363 "device_name": "LPC4330"
Christopher Haster 8332:5fce745004b6 364 },
Christopher Haster 8332:5fce745004b6 365 "LPC4330_M0": {
Christopher Haster 8332:5fce745004b6 366 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 367 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 368 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 369 "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 370 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 371 },
Christopher Haster 8332:5fce745004b6 372 "LPC4337": {
Christopher Haster 8332:5fce745004b6 373 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 374 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 375 "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
Christopher Haster 8332:5fce745004b6 376 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 377 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 378 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 379 "device_name": "LPC4337"
Christopher Haster 8332:5fce745004b6 380 },
Christopher Haster 8332:5fce745004b6 381 "LPC1800": {
Christopher Haster 8332:5fce745004b6 382 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 383 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 384 "extra_labels": ["NXP", "LPC43XX"],
Christopher Haster 8332:5fce745004b6 385 "public": false,
Christopher Haster 8332:5fce745004b6 386 "supported_toolchains": ["ARM", "GCC_CR", "IAR"]
Christopher Haster 8332:5fce745004b6 387 },
Christopher Haster 8332:5fce745004b6 388 "LPC11U37H_401": {
Christopher Haster 8332:5fce745004b6 389 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 390 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 391 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 392 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 393 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 394 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 395 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 396 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 397 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 398 "device_name": "LPC11U37HFBD64/401"
Christopher Haster 8332:5fce745004b6 399 },
Christopher Haster 8332:5fce745004b6 400 "ELEKTOR_COCORICO": {
Christopher Haster 8332:5fce745004b6 401 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 402 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 403 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 404 "supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 405 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 406 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 407 "detect_code": ["C000"],
Sarah Marsh 8472:da9bd832dfd1 408 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 409 "device_name": "LPC812M101JDH16"
Christopher Haster 8332:5fce745004b6 410 },
Christopher Haster 8332:5fce745004b6 411 "KL05Z": {
Christopher Haster 8332:5fce745004b6 412 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 413 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 414 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 415 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 416 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 417 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 418 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 419 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 420 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 421 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 422 "device_name": "MKL05Z32xxx4"
Christopher Haster 8332:5fce745004b6 423 },
Christopher Haster 8332:5fce745004b6 424 "KL25Z": {
Christopher Haster 8332:5fce745004b6 425 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 426 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 427 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 428 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 429 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 430 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 431 "detect_code": ["0200"],
Christopher Haster 8332:5fce745004b6 432 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 433 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 434 "device_name": "MKL25Z128xxx4"
Christopher Haster 8332:5fce745004b6 435 },
Christopher Haster 8332:5fce745004b6 436 "KL26Z": {
Christopher Haster 8332:5fce745004b6 437 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 438 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 439 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 440 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 441 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 442 "inherits": ["Target"],
Sarah Marsh 8472:da9bd832dfd1 443 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 444 "device_name": "MKL26Z128xxx4"
Christopher Haster 8332:5fce745004b6 445 },
Christopher Haster 8332:5fce745004b6 446 "KL46Z": {
Christopher Haster 8332:5fce745004b6 447 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 448 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 449 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 450 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 451 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 452 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 453 "detect_code": ["0220"],
Christopher Haster 8332:5fce745004b6 454 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 455 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 456 "device_name": "MKL46Z256xxx4"
Christopher Haster 8332:5fce745004b6 457 },
Christopher Haster 8332:5fce745004b6 458 "K20D50M": {
Christopher Haster 8332:5fce745004b6 459 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 460 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 461 "extra_labels": ["Freescale", "K20XX"],
Christopher Haster 8332:5fce745004b6 462 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 463 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 464 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 465 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 466 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 467 "device_name": "MK20DX128xxx5"
Christopher Haster 8332:5fce745004b6 468 },
Christopher Haster 8332:5fce745004b6 469 "TEENSY3_1": {
Christopher Haster 8332:5fce745004b6 470 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 471 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 472 "extra_labels": ["Freescale", "K20XX", "K20DX256"],
Christopher Haster 8332:5fce745004b6 473 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 474 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 475 "supported_toolchains": ["GCC_ARM", "ARM"],
Christopher Haster 8332:5fce745004b6 476 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 477 "function": "TEENSY3_1Code.binary_hook",
Christopher Haster 8332:5fce745004b6 478 "toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 479 },
Christopher Haster 8332:5fce745004b6 480 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 481 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 482 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 483 "device_name": "MK20DX256xxx7"
Christopher Haster 8332:5fce745004b6 484 },
Marcelo Salazar 8947:c6669467b509 485 "MCU_K22F512": {
Christopher Haster 8332:5fce745004b6 486 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 487 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 488 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Marcelo Salazar 8947:c6669467b509 489 "extra_labels": ["Freescale", "KSDK2_MCUS", "MCU_K22F", "MCU_K22F512", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"],
Christopher Haster 8332:5fce745004b6 490 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 491 "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 492 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 493 "detect_code": ["0231"],
Christopher Haster 8332:5fce745004b6 494 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 495 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 496 "device_name": "MK22DN512xxx5"
Christopher Haster 8332:5fce745004b6 497 },
Marcelo Salazar 8947:c6669467b509 498 "K22F": {
Marcelo Salazar 8947:c6669467b509 499 "inherits": ["MCU_K22F512"],
Marcelo Salazar 8947:c6669467b509 500 "extra_labels_add": ["FRDM"]
Marcelo Salazar 8947:c6669467b509 501 },
Christopher Haster 8332:5fce745004b6 502 "KL27Z": {
Christopher Haster 8332:5fce745004b6 503 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 504 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 505 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 506 "macros": ["CPU_MKL27Z64VLH4", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 507 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 508 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 509 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 510 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 511 "detect_code": ["0261"],
Christopher Haster 8332:5fce745004b6 512 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 513 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 514 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 515 "device_name": "MKL27Z64xxx4"
Christopher Haster 8332:5fce745004b6 516 },
Christopher Haster 8332:5fce745004b6 517 "KL43Z": {
Christopher Haster 8332:5fce745004b6 518 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 519 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 520 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 521 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 522 "macros": ["CPU_MKL43Z256VLH4", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 523 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 524 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 525 "detect_code": ["0262"],
Christopher Haster 8332:5fce745004b6 526 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 527 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 528 "device_name": "MKL43Z256xxx4"
Christopher Haster 8332:5fce745004b6 529 },
Mahadevan Mahesh 8665:1775fbac0db8 530 "KL82Z": {
Mahadevan Mahesh 8665:1775fbac0db8 531 "supported_form_factors": ["ARDUINO"],
Mahadevan Mahesh 8665:1775fbac0db8 532 "core": "Cortex-M0+",
Mahadevan Mahesh 8665:1775fbac0db8 533 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Mahadevan Mahesh 8665:1775fbac0db8 534 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8665:1775fbac0db8 535 "macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8665:1775fbac0db8 536 "is_disk_virtual": true,
Mahadevan Mahesh 8665:1775fbac0db8 537 "inherits": ["Target"],
Mahadevan Mahesh 8665:1775fbac0db8 538 "progen": {"target": "frdm-kl82z"},
Mahadevan Mahesh 8665:1775fbac0db8 539 "detect_code": ["0218"],
Mahadevan Mahesh 8665:1775fbac0db8 540 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Mahadevan Mahesh 8665:1775fbac0db8 541 "release_versions": ["2", "5"]
Mahadevan Mahesh 8665:1775fbac0db8 542 },
Mahadevan Mahesh 8713:a1a30dd433d6 543 "KW24D": {
Mahadevan Mahesh 8713:a1a30dd433d6 544 "supported_form_factors": ["ARDUINO"],
Mahadevan Mahesh 8713:a1a30dd433d6 545 "core": "Cortex-M4",
Mahadevan Mahesh 8713:a1a30dd433d6 546 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 8713:a1a30dd433d6 547 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8713:a1a30dd433d6 548 "is_disk_virtual": true,
Mahadevan Mahesh 8713:a1a30dd433d6 549 "macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8713:a1a30dd433d6 550 "inherits": ["Target"],
Mahadevan Mahesh 8713:a1a30dd433d6 551 "progen": {"target": "frdm-kw24d"},
Mahadevan Mahesh 8713:a1a30dd433d6 552 "detect_code": ["0250"],
Mahadevan Mahesh 8713:a1a30dd433d6 553 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Mahadevan Mahesh 8713:a1a30dd433d6 554 "release_versions": ["2", "5"]
Mahadevan Mahesh 8713:a1a30dd433d6 555 },
Christopher Haster 8332:5fce745004b6 556 "K64F": {
Christopher Haster 8332:5fce745004b6 557 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 558 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 559 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 560 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 561 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 562 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 563 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 564 "detect_code": ["0240"],
Christopher Haster 8332:5fce745004b6 565 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG"],
Christopher Haster 8342:520d28b41ea4 566 "features": ["LWIP", "STORAGE"],
Sarah Marsh 8472:da9bd832dfd1 567 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 568 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 569 },
Christopher Haster 8332:5fce745004b6 570 "MTS_GAMBIT": {
Christopher Haster 8332:5fce745004b6 571 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 572 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 573 "supported_toolchains": ["ARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 574 "extra_labels": ["Freescale", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 575 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 576 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Sarah Marsh 8472:da9bd832dfd1 577 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 578 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 579 },
Christopher Haster 8332:5fce745004b6 580 "HEXIWEAR": {
Christopher Haster 8332:5fce745004b6 581 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 582 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 583 "extra_labels": ["Freescale", "KSDK2_MCUS", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 584 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 585 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Christopher Haster 8332:5fce745004b6 586 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 587 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 588 "detect_code": ["0214"],
Mahadevan Mahesh 8366:70aeab6c7eb7 589 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8332:5fce745004b6 590 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 591 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 592 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 593 },
Christopher Haster 8332:5fce745004b6 594 "K66F": {
Christopher Haster 8332:5fce745004b6 595 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 596 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 597 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 598 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 599 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 600 "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 601 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 602 "detect_code": ["0311"],
Christopher Haster 8332:5fce745004b6 603 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 604 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 605 "device_name" : "MK66FN2M0xxx18"
Christopher Haster 8332:5fce745004b6 606 },
Christopher Haster 8332:5fce745004b6 607 "NUCLEO_F030R8": {
Christopher Haster 8332:5fce745004b6 608 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 609 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 610 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 611 "extra_labels": ["STM", "STM32F0", "STM32F030R8"],
Christopher Haster 8332:5fce745004b6 612 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 613 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 614 "detect_code": ["0725"],
Laurent MEUNIER 8670:d320c94c6968 615 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 616 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 617 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 618 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 619 "device_name": "STM32F030R8"
Christopher Haster 8332:5fce745004b6 620 },
Christopher Haster 8332:5fce745004b6 621 "NUCLEO_F031K6": {
Christopher Haster 8332:5fce745004b6 622 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 623 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 624 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 625 "extra_labels": ["STM", "STM32F0", "STM32F031K6"],
Christopher Haster 8332:5fce745004b6 626 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 627 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 628 "detect_code": ["0791"],
Laurent MEUNIER 8670:d320c94c6968 629 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 630 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 631 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 632 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 633 "device_name": "STM32F031K6"
Christopher Haster 8332:5fce745004b6 634 },
Christopher Haster 8332:5fce745004b6 635 "NUCLEO_F042K6": {
Christopher Haster 8332:5fce745004b6 636 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 637 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 638 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 639 "extra_labels": ["STM", "STM32F0", "STM32F042K6"],
Christopher Haster 8332:5fce745004b6 640 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 641 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 642 "detect_code": ["0785"],
Laurent MEUNIER 8670:d320c94c6968 643 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 644 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 645 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 646 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 647 "device_name": "STM32F042K6"
Christopher Haster 8332:5fce745004b6 648 },
Christopher Haster 8332:5fce745004b6 649 "NUCLEO_F070RB": {
Christopher Haster 8332:5fce745004b6 650 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 651 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 652 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 653 "extra_labels": ["STM", "STM32F0", "STM32F070RB"],
Christopher Haster 8332:5fce745004b6 654 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 655 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 656 "detect_code": ["0755"],
Laurent MEUNIER 8670:d320c94c6968 657 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 658 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 659 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 660 "device_name": "STM32F070RB"
Christopher Haster 8332:5fce745004b6 661 },
Christopher Haster 8332:5fce745004b6 662 "NUCLEO_F072RB": {
Christopher Haster 8332:5fce745004b6 663 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 664 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 665 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 666 "extra_labels": ["STM", "STM32F0", "STM32F072RB"],
Christopher Haster 8332:5fce745004b6 667 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 668 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 669 "detect_code": ["0730"],
Laurent MEUNIER 8670:d320c94c6968 670 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 671 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 672 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 673 "device_name": "STM32F072RB"
Christopher Haster 8332:5fce745004b6 674 },
Christopher Haster 8332:5fce745004b6 675 "NUCLEO_F091RC": {
Christopher Haster 8332:5fce745004b6 676 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 677 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 678 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 679 "extra_labels": ["STM", "STM32F0", "STM32F091RC"],
Christopher Haster 8332:5fce745004b6 680 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 681 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 682 "detect_code": ["0750"],
Laurent MEUNIER 8670:d320c94c6968 683 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 684 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 685 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 686 "device_name": "STM32F091RC"
Christopher Haster 8332:5fce745004b6 687 },
Christopher Haster 8332:5fce745004b6 688 "NUCLEO_F103RB": {
Christopher Haster 8332:5fce745004b6 689 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 690 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 691 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 692 "extra_labels": ["STM", "STM32F1", "STM32F103RB"],
Christopher Haster 8332:5fce745004b6 693 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 694 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 695 "detect_code": ["0700"],
Laurent MEUNIER 8670:d320c94c6968 696 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 697 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 698 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 699 "device_name": "STM32F103RB"
Christopher Haster 8332:5fce745004b6 700 },
Christopher Haster 8332:5fce745004b6 701 "NUCLEO_F207ZG": {
Christopher Haster 8332:5fce745004b6 702 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 703 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 704 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 705 "extra_labels": ["STM", "STM32F2", "STM32F207ZG"],
Christopher Haster 8332:5fce745004b6 706 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 707 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 708 "detect_code": ["0835"],
Laurent MEUNIER 8670:d320c94c6968 709 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 710 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 711 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 712 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 713 "device_name" : "STM32F207ZG"
Christopher Haster 8332:5fce745004b6 714 },
Christopher Haster 8332:5fce745004b6 715 "NUCLEO_F302R8": {
Christopher Haster 8332:5fce745004b6 716 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 717 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 718 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 719 "extra_labels": ["STM", "STM32F3", "STM32F302R8"],
Christopher Haster 8332:5fce745004b6 720 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 721 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 722 "detect_code": ["0705"],
Laurent MEUNIER 8670:d320c94c6968 723 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 724 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 725 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 726 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 727 "device_name": "STM32F302R8"
Christopher Haster 8332:5fce745004b6 728 },
Christopher Haster 8332:5fce745004b6 729 "NUCLEO_F303K8": {
Christopher Haster 8332:5fce745004b6 730 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 731 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 732 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 733 "extra_labels": ["STM", "STM32F3", "STM32F303K8"],
Laurent MEUNIER 8670:d320c94c6968 734 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 735 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 736 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 737 "detect_code": ["0775"],
Christopher Haster 8332:5fce745004b6 738 "default_lib": "small",
Laurent MEUNIER 8670:d320c94c6968 739 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 740 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 741 "device_name": "STM32F303K8"
Christopher Haster 8332:5fce745004b6 742 },
Christopher Haster 8332:5fce745004b6 743 "NUCLEO_F303RE": {
Christopher Haster 8332:5fce745004b6 744 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 745 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 746 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 747 "extra_labels": ["STM", "STM32F3", "STM32F303RE"],
Christopher Haster 8332:5fce745004b6 748 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 749 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 750 "detect_code": ["0745"],
Laurent MEUNIER 8670:d320c94c6968 751 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 752 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 753 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 754 "device_name": "STM32F303RE"
Christopher Haster 8332:5fce745004b6 755 },
Christopher Haster 8332:5fce745004b6 756 "NUCLEO_F303ZE": {
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Christopher Haster 8332:5fce745004b6 758 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 759 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 760 "extra_labels": ["STM", "STM32F3", "STM32F303ZE"],
Christopher Haster 8332:5fce745004b6 761 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 762 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 763 "detect_code": ["0747"],
Laurent MEUNIER 8670:d320c94c6968 764 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 765 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8507:29edfac555c0 766 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 767 "device_name": "STM32F303RE"
Christopher Haster 8332:5fce745004b6 768 },
Christopher Haster 8332:5fce745004b6 769 "NUCLEO_F334R8": {
Christopher Haster 8332:5fce745004b6 770 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 771 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 772 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 773 "extra_labels": ["STM", "STM32F3", "STM32F334R8"],
Christopher Haster 8332:5fce745004b6 774 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 775 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 776 "detect_code": ["0735"],
Laurent MEUNIER 8670:d320c94c6968 777 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 778 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 779 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 780 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 781 "device_name": "STM32F334R8"
Christopher Haster 8332:5fce745004b6 782 },
Christopher Haster 8332:5fce745004b6 783 "NUCLEO_F401RE": {
Christopher Haster 8332:5fce745004b6 784 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 785 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 786 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 787 "extra_labels": ["STM", "STM32F4", "STM32F401RE"],
Christopher Haster 8332:5fce745004b6 788 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 789 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 790 "detect_code": ["0720"],
Christopher Haster 8332:5fce745004b6 791 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 792 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 793 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 794 "device_name": "STM32F401RE"
Christopher Haster 8332:5fce745004b6 795 },
Christopher Haster 8332:5fce745004b6 796 "NUCLEO_F410RB": {
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Christopher Haster 8332:5fce745004b6 798 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 799 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 800 "extra_labels": ["STM", "STM32F4", "STM32F410RB","STM32F410Rx"],
Christopher Haster 8332:5fce745004b6 801 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 802 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 803 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 804 "detect_code": ["0740"],
Christopher Haster 8332:5fce745004b6 805 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 806 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 807 "device_name": "STM32F410RB"
Christopher Haster 8332:5fce745004b6 808 },
Christopher Haster 8332:5fce745004b6 809 "NUCLEO_F411RE": {
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Christopher Haster 8332:5fce745004b6 811 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 812 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 813 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 814 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 815 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 816 "detect_code": ["0740"],
Christopher Haster 8332:5fce745004b6 817 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 818 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 819 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 820 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 821 },
Christopher Haster 8332:5fce745004b6 822 "ELMO_F411RE": {
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Christopher Haster 8332:5fce745004b6 824 "core": "Cortex-M4F",
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Christopher Haster 8332:5fce745004b6 826 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 827 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 828 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 829 "detect_code": ["----"],
Christopher Haster 8332:5fce745004b6 830 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 831 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 832 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 833 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 834 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 835 },
Christopher Haster 8332:5fce745004b6 836 "NUCLEO_F429ZI": {
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Christopher Haster 8332:5fce745004b6 838 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 839 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 840 "default_toolchain": "ARM",
adustm 8699:0582a3f97984 841 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "F429_F439"],
Christopher Haster 8332:5fce745004b6 842 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 843 "progen": {"target": "nucleo-f429zi"},
Christopher Haster 8332:5fce745004b6 844 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 845 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8332:5fce745004b6 846 "detect_code": ["0796"],
Christopher Haster 8342:520d28b41ea4 847 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 848 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 849 "device_name" : "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 850 },
adustm 8699:0582a3f97984 851 "NUCLEO_F439ZI": {
adustm 8699:0582a3f97984 852 "supported_form_factors": ["ARDUINO"],
adustm 8699:0582a3f97984 853 "inherits": ["Target"],
adustm 8699:0582a3f97984 854 "core": "Cortex-M4F",
adustm 8699:0582a3f97984 855 "default_toolchain": "ARM",
adustm 8699:0582a3f97984 856 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "F429_F439"],
adustm 8699:0582a3f97984 857 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
adustm 8699:0582a3f97984 858 "progen": {"target": "nucleo-f439zi"},
adustm 8699:0582a3f97984 859 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
adustm 8699:0582a3f97984 860 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
adustm 8699:0582a3f97984 861 "detect_code": ["0797"],
adustm 8699:0582a3f97984 862 "features": ["LWIP"],
adustm 8699:0582a3f97984 863 "release_versions": ["2", "5"],
adustm 8699:0582a3f97984 864 "device_name" : "STM32F429ZI"
adustm 8699:0582a3f97984 865 },
Christopher Haster 8332:5fce745004b6 866 "NUCLEO_F446RE": {
Christopher Haster 8332:5fce745004b6 867 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 868 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 869 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 870 "extra_labels": ["STM", "STM32F4", "STM32F446RE"],
Christopher Haster 8332:5fce745004b6 871 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 872 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 873 "detect_code": ["0777"],
Christopher Haster 8332:5fce745004b6 874 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 875 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 876 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 877 "device_name": "STM32F446RE"
Christopher Haster 8332:5fce745004b6 878 },
Christopher Haster 8332:5fce745004b6 879 "NUCLEO_F446ZE": {
Christopher Haster 8332:5fce745004b6 880 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 881 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 882 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 883 "extra_labels": ["STM", "STM32F4", "STM32F446ZE"],
Christopher Haster 8332:5fce745004b6 884 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 885 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 886 "detect_code": ["0778"],
Christopher Haster 8332:5fce745004b6 887 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 888 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 889 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 890 "device_name" : "STM32F446ZE"
Christopher Haster 8332:5fce745004b6 891 },
Christopher Haster 8332:5fce745004b6 892 "B96B_F446VE": {
Christopher Haster 8332:5fce745004b6 893 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 894 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 895 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 896 "extra_labels": ["STM", "STM32F4", "STM32F446VE"],
Christopher Haster 8332:5fce745004b6 897 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 898 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 899 "detect_code": ["0840"],
Christopher Haster 8332:5fce745004b6 900 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 901 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 902 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 903 "device_name":"STM32F446VE"
Christopher Haster 8332:5fce745004b6 904 },
Christopher Haster 8332:5fce745004b6 905 "NUCLEO_F746ZG": {
Christopher Haster 8332:5fce745004b6 906 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 907 "core": "Cortex-M7F",
adustm 8701:5a968df3a238 908 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746ZG", "F746_F756"],
Christopher Haster 8332:5fce745004b6 909 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 910 "default_toolchain": "ARM",
Laurent MEUNIER 8670:d320c94c6968 911 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 912 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 913 "detect_code": ["0816"],
Laurent MEUNIER 8670:d320c94c6968 914 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 915 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 916 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 917 "device_name": "STM32F746ZG"
Christopher Haster 8332:5fce745004b6 918 },
adustm 8701:5a968df3a238 919 "NUCLEO_F756ZG": {
adustm 8701:5a968df3a238 920 "inherits": ["Target"],
adustm 8701:5a968df3a238 921 "core": "Cortex-M7F",
adustm 8701:5a968df3a238 922 "extra_labels": ["STM", "STM32F7", "STM32F756", "STM32F756ZG", "F746_F756"],
Christopher Haster 8332:5fce745004b6 923 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 924 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 925 "supported_form_factors": ["ARDUINO"],
adustm 8701:5a968df3a238 926 "detect_code": ["0819"],
Christopher Haster 8332:5fce745004b6 927 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 928 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 929 "release_versions": ["2", "5"],
adustm 8701:5a968df3a238 930 "device_name": "STM32F756ZG"
Christopher Haster 8332:5fce745004b6 931 },
Christopher Haster 8332:5fce745004b6 932 "NUCLEO_F767ZI": {
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Christopher Haster 8332:5fce745004b6 934 "core": "Cortex-M7FD",
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Laurent MEUNIER 8670:d320c94c6968 939 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
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Christopher Haster 8332:5fce745004b6 945 },
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Christopher Haster 8332:5fce745004b6 955 "default_lib": "small",
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Sarah Marsh 8472:da9bd832dfd1 957 "device_name": "STM32L011K4"
Christopher Haster 8332:5fce745004b6 958 },
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Christopher Haster 8332:5fce745004b6 963 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
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Sarah Marsh 8472:da9bd832dfd1 969 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 970 "device_name": "STM32L031K6"
Christopher Haster 8332:5fce745004b6 971 },
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Christopher Haster 8332:5fce745004b6 981 "default_lib": "small",
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Sarah Marsh 8472:da9bd832dfd1 983 "device_name": "STM32L053R8"
Christopher Haster 8332:5fce745004b6 984 },
Christopher Haster 8332:5fce745004b6 985 "NUCLEO_L073RZ": {
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adustm 8590:ebb840a10a54 989 "extra_labels": ["STM", "STM32L0", "STM32L073RZ", "STM32L073xx"],
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Christopher Haster 8332:5fce745004b6 991 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 992 "detect_code": ["0760"],
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Sarah Marsh 8472:da9bd832dfd1 994 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 995 "device_name": "STM32L073RZ"
Christopher Haster 8332:5fce745004b6 996 },
Christopher Haster 8332:5fce745004b6 997 "NUCLEO_L152RE": {
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Christopher Haster 8332:5fce745004b6 1000 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1001 "extra_labels": ["STM", "STM32L1", "STM32L152RE"],
Christopher Haster 8332:5fce745004b6 1002 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1003 "inherits": ["Target"],
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Sarah Marsh 8472:da9bd832dfd1 1006 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1007 "device_name": "STM32L152RE"
Christopher Haster 8332:5fce745004b6 1008 },
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Christopher Haster 8332:5fce745004b6 1013 "extra_labels": ["STM", "STM32L4", "STM32L432KC"],
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Christopher Haster 8332:5fce745004b6 1015 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1016 "detect_code": ["0770"],
Laurent MEUNIER 8670:d320c94c6968 1017 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
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Sarah Marsh 8472:da9bd832dfd1 1019 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1020 "device_name" : "STM32L432KC"
Christopher Haster 8332:5fce745004b6 1021 },
Christopher Haster 8332:5fce745004b6 1022 "NUCLEO_L476RG": {
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Christopher Haster 8332:5fce745004b6 1025 "default_toolchain": "ARM",
adustm 8700:42167837958f 1026 "extra_labels": ["STM", "STM32L4", "STM32L476RG", "L476_L486"],
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Christopher Haster 8332:5fce745004b6 1028 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1029 "detect_code": ["0765"],
Laurent MEUNIER 8670:d320c94c6968 1030 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
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Sarah Marsh 8472:da9bd832dfd1 1032 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1033 "device_name": "stm32l476rg"
Christopher Haster 8332:5fce745004b6 1034 },
adustm 8700:42167837958f 1035 "NUCLEO_L486RG": {
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adustm 8700:42167837958f 1040 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
adustm 8700:42167837958f 1041 "inherits": ["Target"],
adustm 8700:42167837958f 1042 "detect_code": ["0827"],
adustm 8700:42167837958f 1043 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
adustm 8700:42167837958f 1044 "release_versions": ["2", "5"],
adustm 8700:42167837958f 1045 "device_name": "stm32l486rg"
adustm 8700:42167837958f 1046 },
Christopher Haster 8332:5fce745004b6 1047 "STM32F3XX": {
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Christopher Haster 8332:5fce745004b6 1049 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 1050 "default_toolchain": "ARM",
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Christopher Haster 8332:5fce745004b6 1052 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 1053 },
Christopher Haster 8332:5fce745004b6 1054 "STM32F407": {
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Christopher Haster 8332:5fce745004b6 1056 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1057 "extra_labels": ["STM", "STM32F4", "STM32F4XX"],
Christopher Haster 8332:5fce745004b6 1058 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 1059 },
Christopher Haster 8332:5fce745004b6 1060 "ARCH_MAX": {
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Christopher Haster 8332:5fce745004b6 1062 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1063 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1064 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1065 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1066 "macros": ["LSI_VALUE=32000"],
Christopher Haster 8332:5fce745004b6 1067 "inherits": ["Target"],
Laurent MEUNIER 8670:d320c94c6968 1068 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1069 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1070 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1071 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1072 },
Christopher Haster 8332:5fce745004b6 1073 "DISCO_F051R8": {
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Christopher Haster 8332:5fce745004b6 1075 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1076 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1077 "extra_labels": ["STM", "STM32F0", "STM32F051", "STM32F051R8"],
Christopher Haster 8332:5fce745004b6 1078 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1079 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1080 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1081 "device_name": "STM32F051R8"
Christopher Haster 8332:5fce745004b6 1082 },
Christopher Haster 8332:5fce745004b6 1083 "DISCO_F100RB": {
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Christopher Haster 8332:5fce745004b6 1085 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1086 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1087 "extra_labels": ["STM", "STM32F1", "STM32F100RB"],
Christopher Haster 8332:5fce745004b6 1088 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1089 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1090 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1091 "device_name": "STM32F100RB"
Christopher Haster 8332:5fce745004b6 1092 },
Christopher Haster 8332:5fce745004b6 1093 "DISCO_F303VC": {
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Christopher Haster 8332:5fce745004b6 1095 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1096 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1097 "extra_labels": ["STM", "STM32F3", "STM32F303", "STM32F303VC"],
Laurent MEUNIER 8670:d320c94c6968 1098 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1099 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1100 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1101 "device_name": "STM32F303VC"
Christopher Haster 8332:5fce745004b6 1102 },
Christopher Haster 8332:5fce745004b6 1103 "DISCO_F334C8": {
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Christopher Haster 8332:5fce745004b6 1105 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1106 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1107 "extra_labels": ["STM", "STM32F3", "STM32F334C8"],
Laurent MEUNIER 8670:d320c94c6968 1108 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1109 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1110 "detect_code": ["0810"],
Laurent MEUNIER 8670:d320c94c6968 1111 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1112 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1113 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1114 "device_name": "STM32F334C8"
Christopher Haster 8332:5fce745004b6 1115 },
Christopher Haster 8332:5fce745004b6 1116 "DISCO_F407VG": {
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Christopher Haster 8332:5fce745004b6 1118 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1119 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1120 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1121 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Sarah Marsh 8520:ebbeba690467 1122 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1123 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1124 },
Christopher Haster 8332:5fce745004b6 1125 "DISCO_F429ZI": {
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Christopher Haster 8332:5fce745004b6 1127 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1128 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1129 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx"],
Christopher Haster 8332:5fce745004b6 1130 "macros": ["RTC_LSI=1","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1131 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1132 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1133 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1134 "device_name": "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 1135 },
Christopher Haster 8332:5fce745004b6 1136 "DISCO_F469NI": {
Christopher Haster 8332:5fce745004b6 1137 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1138 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1139 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1140 "extra_labels": ["STM", "STM32F4", "STM32F469", "STM32F469NI", "STM32F469xx"],
Christopher Haster 8332:5fce745004b6 1141 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1142 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1143 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1144 "detect_code": ["0788"],
Laurent MEUNIER 8670:d320c94c6968 1145 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1146 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1147 "device_name": "STM32F469NI"
Christopher Haster 8332:5fce745004b6 1148 },
Christopher Haster 8332:5fce745004b6 1149 "DISCO_L053C8": {
Christopher Haster 8332:5fce745004b6 1150 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1151 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1152 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1153 "extra_labels": ["STM", "STM32L0", "STM32L053C8"],
Christopher Haster 8332:5fce745004b6 1154 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1155 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1156 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1157 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1158 "device_name": "STM32L053C8"
Christopher Haster 8332:5fce745004b6 1159 },
Christopher Haster 8332:5fce745004b6 1160 "DISCO_F746NG": {
Christopher Haster 8332:5fce745004b6 1161 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1162 "core": "Cortex-M7F",
Christopher Haster 8332:5fce745004b6 1163 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746NG"],
Christopher Haster 8332:5fce745004b6 1164 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1165 "default_toolchain": "ARM",
jeromecoutant 8661:e3f8446fe374 1166 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1167 "detect_code": ["0815"],
Laurent MEUNIER 8670:d320c94c6968 1168 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1169 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1170 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1171 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 1172 "device_name": "STM32F746NG"
Christopher Haster 8332:5fce745004b6 1173 },
Christopher Haster 8332:5fce745004b6 1174 "DISCO_F769NI": {
Christopher Haster 8332:5fce745004b6 1175 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1176 "core": "Cortex-M7FD",
Christopher Haster 8332:5fce745004b6 1177 "extra_labels": ["STM", "STM32F7", "STM32F769", "STM32F769NI"],
Christopher Haster 8332:5fce745004b6 1178 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1179 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1180 "detect_code": ["0817"],
Laurent MEUNIER 8670:d320c94c6968 1181 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1182 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1183 "features": ["LWIP"],
Sarah Marsh 8507:29edfac555c0 1184 "release_versions": ["2"],
Sarah Marsh 8507:29edfac555c0 1185 "device_name": "STM32F769NI"
Christopher Haster 8332:5fce745004b6 1186 },
Christopher Haster 8332:5fce745004b6 1187 "DISCO_L476VG": {
Christopher Haster 8332:5fce745004b6 1188 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1189 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1190 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1191 "extra_labels": ["STM", "STM32L4", "STM32L476VG"],
Christopher Haster 8332:5fce745004b6 1192 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1193 "detect_code": ["0820"],
Laurent MEUNIER 8670:d320c94c6968 1194 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1195 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1196 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1197 "device_name": "stm32l476vg"
Christopher Haster 8332:5fce745004b6 1198 },
Christopher Haster 8332:5fce745004b6 1199 "MTS_MDOT_F405RG": {
Christopher Haster 8332:5fce745004b6 1200 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1201 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1202 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1203 "extra_labels": ["STM", "STM32F4", "STM32F405RG"],
Christopher Haster 8332:5fce745004b6 1204 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1205 "macros": ["HSE_VALUE=26000000", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1206 "progen": {"target": "mts-mdot-f405rg"},
Christopher Haster 8332:5fce745004b6 1207 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1208 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1209 "device_name": "STM32F405RG"
Christopher Haster 8332:5fce745004b6 1210 },
Christopher Haster 8332:5fce745004b6 1211 "MTS_MDOT_F411RE": {
Christopher Haster 8332:5fce745004b6 1212 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1213 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1214 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1215 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1216 "macros": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1217 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1218 "function": "MTSCode.combine_bins_mts_dot",
Christopher Haster 8332:5fce745004b6 1219 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1220 },
Christopher Haster 8332:5fce745004b6 1221 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1222 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1223 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1224 },
Christopher Haster 8332:5fce745004b6 1225 "MTS_DRAGONFLY_F411RE": {
Christopher Haster 8332:5fce745004b6 1226 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1227 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1228 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1229 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1230 "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1231 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1232 "function": "MTSCode.combine_bins_mts_dragonfly",
Christopher Haster 8332:5fce745004b6 1233 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1234 },
Christopher Haster 8332:5fce745004b6 1235 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1236 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1237 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1238 },
Christopher Haster 8332:5fce745004b6 1239 "XDOT_L151CC": {
Christopher Haster 8332:5fce745004b6 1240 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1241 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1242 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1243 "extra_labels": ["STM", "STM32L1", "STM32L151CC"],
Christopher Haster 8332:5fce745004b6 1244 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1245 "progen": {"target": "xdot-l151cc"},
Christopher Haster 8332:5fce745004b6 1246 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1247 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1248 "release_versions": ["5"]
Christopher Haster 8332:5fce745004b6 1249 },
Christopher Haster 8332:5fce745004b6 1250 "MOTE_L152RC": {
Christopher Haster 8332:5fce745004b6 1251 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1252 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1253 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1254 "extra_labels": ["STM", "STM32L1", "STM32L152RC"],
Christopher Haster 8332:5fce745004b6 1255 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1256 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1257 "detect_code": ["4100"],
Christopher Haster 8332:5fce745004b6 1258 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1259 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1260 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1261 "device_name": "STM32L152RC"
Christopher Haster 8332:5fce745004b6 1262 },
Christopher Haster 8332:5fce745004b6 1263 "DISCO_F401VC": {
Christopher Haster 8332:5fce745004b6 1264 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1265 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1266 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 1267 "extra_labels": ["STM", "STM32F4", "STM32F401", "STM32F401VC"],
Christopher Haster 8332:5fce745004b6 1268 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1269 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Sarah Marsh 8472:da9bd832dfd1 1270 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1271 "device_name": "STM32F401VC"
Christopher Haster 8332:5fce745004b6 1272 },
andreas.larsson 8355:cb6a226655c8 1273 "UBLOX_EVK_ODIN_W2": {
Christopher Haster 8332:5fce745004b6 1274 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1275 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1276 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1277 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
andreas.larsson 8654:d2daf30b4d0f 1278 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx"],
andreas.larsson 8768:b81d7522ac45 1279 "macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
Christopher Haster 8332:5fce745004b6 1280 "inherits": ["Target"],
Bartek Szatkowski 8707:f0d6077e73f5 1281 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1282 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1283 "release_versions": ["5"],
Sarah Marsh 8472:da9bd832dfd1 1284 "device_name": "STM32F439ZI"
Christopher Haster 8332:5fce745004b6 1285 },
Christopher Haster 8332:5fce745004b6 1286 "NZ32_SC151": {
Christopher Haster 8332:5fce745004b6 1287 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1288 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1289 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1290 "program_cycle_s": 1.5,
Christopher Haster 8332:5fce745004b6 1291 "extra_labels": ["STM", "STM32L1", "STM32L151RC"],
Christopher Haster 8332:5fce745004b6 1292 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1293 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1294 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1295 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1296 "device_name": "STM32L151RC"
Christopher Haster 8332:5fce745004b6 1297 },
Christopher Haster 8332:5fce745004b6 1298 "MCU_NRF51": {
Christopher Haster 8332:5fce745004b6 1299 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1300 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1301 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1302 "macros": ["NRF51", "TARGET_NRF51822"],
Christopher Haster 8332:5fce745004b6 1303 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 1304 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
Christopher Haster 8332:5fce745004b6 1305 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 1306 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1307 "supported_toolchains": ["ARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1308 "public": false,
Christopher Haster 8332:5fce745004b6 1309 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 1310 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1311 {
Christopher Haster 8332:5fce745004b6 1312 "boot": "s130_nrf51_1.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1313 "name": "s130_nrf51_1.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1314 "offset": 114688
Christopher Haster 8332:5fce745004b6 1315 },
Christopher Haster 8332:5fce745004b6 1316 {
Christopher Haster 8332:5fce745004b6 1317 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1318 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1319 "offset": 98304
Christopher Haster 8332:5fce745004b6 1320 },
Christopher Haster 8332:5fce745004b6 1321 {
Christopher Haster 8332:5fce745004b6 1322 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1323 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1324 "offset": 90112
Christopher Haster 8332:5fce745004b6 1325 },
Christopher Haster 8332:5fce745004b6 1326 {
Christopher Haster 8332:5fce745004b6 1327 "boot": "s110_nrf51822_7.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1328 "name": "s110_nrf51822_7.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1329 "offset": 90112
Christopher Haster 8332:5fce745004b6 1330 },
Christopher Haster 8332:5fce745004b6 1331 {
Christopher Haster 8332:5fce745004b6 1332 "boot": "s110_nrf51822_6.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1333 "name": "s110_nrf51822_6.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1334 "offset": 81920
Christopher Haster 8332:5fce745004b6 1335 }
Christopher Haster 8332:5fce745004b6 1336 ],
Christopher Haster 8332:5fce745004b6 1337 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 1338 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1339 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 1340 "toolchains": ["ARM_STD", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 1341 },
Christopher Haster 8332:5fce745004b6 1342 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 1343 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1344 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 1345 },
Christopher Haster 8332:5fce745004b6 1346 "MCU_NRF51_16K_BASE": {
Christopher Haster 8332:5fce745004b6 1347 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1348 "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1349 "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1350 "public": false,
Christopher Haster 8332:5fce745004b6 1351 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 1352 },
Christopher Haster 8332:5fce745004b6 1353 "MCU_NRF51_16K_BOOT_BASE": {
Christopher Haster 8332:5fce745004b6 1354 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1355 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1356 "extra_labels_add": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1357 "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1358 "public": false
Christopher Haster 8332:5fce745004b6 1359 },
Christopher Haster 8332:5fce745004b6 1360 "MCU_NRF51_16K_OTA_BASE": {
Christopher Haster 8332:5fce745004b6 1361 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1362 "public": false,
Christopher Haster 8332:5fce745004b6 1363 "extra_labels_add": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1364 "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1365 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1366 },
Christopher Haster 8332:5fce745004b6 1367 "MCU_NRF51_16K": {
Christopher Haster 8332:5fce745004b6 1368 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1369 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1370 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1371 "public": false
Christopher Haster 8332:5fce745004b6 1372 },
Christopher Haster 8332:5fce745004b6 1373 "MCU_NRF51_S110": {
Christopher Haster 8332:5fce745004b6 1374 "extra_labels_add": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1375 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1376 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1377 {
Christopher Haster 8332:5fce745004b6 1378 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1379 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1380 "offset": 98304
Christopher Haster 8332:5fce745004b6 1381 },
Christopher Haster 8332:5fce745004b6 1382 {
Christopher Haster 8332:5fce745004b6 1383 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1384 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1385 "offset": 90112
Christopher Haster 8332:5fce745004b6 1386 }
Christopher Haster 8332:5fce745004b6 1387 ],
Christopher Haster 8332:5fce745004b6 1388 "public": false
Christopher Haster 8332:5fce745004b6 1389 },
Christopher Haster 8332:5fce745004b6 1390 "MCU_NRF51_16K_S110": {
Christopher Haster 8332:5fce745004b6 1391 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1392 "public": false
Christopher Haster 8332:5fce745004b6 1393 },
Christopher Haster 8332:5fce745004b6 1394 "MCU_NRF51_16K_BOOT": {
Christopher Haster 8332:5fce745004b6 1395 "inherits": ["MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1396 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1397 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1398 "public": false
Christopher Haster 8332:5fce745004b6 1399 },
Christopher Haster 8332:5fce745004b6 1400 "MCU_NRF51_16K_BOOT_S110": {
Christopher Haster 8332:5fce745004b6 1401 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1402 "public": false
Christopher Haster 8332:5fce745004b6 1403 },
Christopher Haster 8332:5fce745004b6 1404 "MCU_NRF51_16K_OTA": {
Christopher Haster 8332:5fce745004b6 1405 "inherits": ["MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1406 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1407 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1408 "public": false
Christopher Haster 8332:5fce745004b6 1409 },
Christopher Haster 8332:5fce745004b6 1410 "MCU_NRF51_16K_OTA_S110": {
Christopher Haster 8332:5fce745004b6 1411 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1412 "public": false
Christopher Haster 8332:5fce745004b6 1413 },
Christopher Haster 8332:5fce745004b6 1414 "MCU_NRF51_32K": {
Christopher Haster 8332:5fce745004b6 1415 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1416 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1417 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1418 "public": false
Christopher Haster 8332:5fce745004b6 1419 },
Christopher Haster 8332:5fce745004b6 1420 "MCU_NRF51_32K_BOOT": {
Christopher Haster 8332:5fce745004b6 1421 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1422 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1423 "extra_labels_add": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1424 "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1425 "public": false
Christopher Haster 8332:5fce745004b6 1426 },
Christopher Haster 8332:5fce745004b6 1427 "MCU_NRF51_32K_OTA": {
Christopher Haster 8332:5fce745004b6 1428 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1429 "public": false,
Christopher Haster 8332:5fce745004b6 1430 "extra_labels_add": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1431 "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1432 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1433 },
Christopher Haster 8332:5fce745004b6 1434 "NRF51822": {
Christopher Haster 8332:5fce745004b6 1435 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1436 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1437 "macros_add": ["TARGET_NRF51822_MKIT"],
Sarah Marsh 8472:da9bd832dfd1 1438 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1439 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1440 },
Christopher Haster 8332:5fce745004b6 1441 "NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1442 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1443 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1444 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1445 },
Christopher Haster 8332:5fce745004b6 1446 "NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1447 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1448 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1449 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1450 },
Christopher Haster 8332:5fce745004b6 1451 "ARCH_BLE": {
Christopher Haster 8332:5fce745004b6 1452 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1453 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1454 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1455 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1456 },
Christopher Haster 8332:5fce745004b6 1457 "ARCH_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1458 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1459 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1460 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1461 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1462 },
Christopher Haster 8332:5fce745004b6 1463 "ARCH_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1464 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1465 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1466 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1467 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1468 },
Christopher Haster 8332:5fce745004b6 1469 "ARCH_LINK": {
Christopher Haster 8332:5fce745004b6 1470 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1471 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1472 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1473 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1474 },
Christopher Haster 8332:5fce745004b6 1475 "ARCH_LINK_BOOT": {
Christopher Haster 8332:5fce745004b6 1476 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1477 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1478 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1479 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1480 },
Christopher Haster 8332:5fce745004b6 1481 "ARCH_LINK_OTA": {
Christopher Haster 8332:5fce745004b6 1482 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1483 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1484 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1485 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1486 },
Christopher Haster 8332:5fce745004b6 1487 "SEEED_TINY_BLE": {
Christopher Haster 8332:5fce745004b6 1488 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1489 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1490 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1491 },
Christopher Haster 8332:5fce745004b6 1492 "SEEED_TINY_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1493 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1494 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1495 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1496 },
Christopher Haster 8332:5fce745004b6 1497 "SEEED_TINY_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1498 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1499 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1500 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1501 },
Christopher Haster 8332:5fce745004b6 1502 "HRM1017": {
Christopher Haster 8332:5fce745004b6 1503 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1504 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Sarah Marsh 8472:da9bd832dfd1 1505 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1506 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1507 },
Christopher Haster 8332:5fce745004b6 1508 "HRM1017_BOOT": {
Christopher Haster 8332:5fce745004b6 1509 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1510 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1511 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1512 },
Christopher Haster 8332:5fce745004b6 1513 "HRM1017_OTA": {
Christopher Haster 8332:5fce745004b6 1514 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1515 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1516 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1517 },
Christopher Haster 8332:5fce745004b6 1518 "RBLAB_NRF51822": {
Christopher Haster 8332:5fce745004b6 1519 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1520 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1521 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1522 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1523 },
Christopher Haster 8332:5fce745004b6 1524 "RBLAB_NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1525 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1526 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1527 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1528 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1529 },
Christopher Haster 8332:5fce745004b6 1530 "RBLAB_NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1531 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1532 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1533 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1534 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1535 },
Christopher Haster 8332:5fce745004b6 1536 "RBLAB_BLENANO": {
Christopher Haster 8332:5fce745004b6 1537 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1538 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1539 },
Christopher Haster 8332:5fce745004b6 1540 "RBLAB_BLENANO_BOOT": {
Christopher Haster 8332:5fce745004b6 1541 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1542 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1543 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1544 },
Christopher Haster 8332:5fce745004b6 1545 "RBLAB_BLENANO_OTA": {
Christopher Haster 8332:5fce745004b6 1546 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1547 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1548 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1549 },
Christopher Haster 8332:5fce745004b6 1550 "NRF51822_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 1551 "inherits": ["MCU_NRF51_16K"]
Christopher Haster 8332:5fce745004b6 1552 },
Christopher Haster 8332:5fce745004b6 1553 "WALLBOT_BLE": {
Christopher Haster 8332:5fce745004b6 1554 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1555 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1556 },
Christopher Haster 8332:5fce745004b6 1557 "WALLBOT_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1558 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1559 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1560 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1561 },
Christopher Haster 8332:5fce745004b6 1562 "WALLBOT_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1563 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1564 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1565 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1566 },
Christopher Haster 8332:5fce745004b6 1567 "DELTA_DFCM_NNN40": {
Christopher Haster 8332:5fce745004b6 1568 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1569 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1570 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1571 "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 1572 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1573 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1574 },
Christopher Haster 8332:5fce745004b6 1575 "DELTA_DFCM_NNN40_BOOT": {
Christopher Haster 8332:5fce745004b6 1576 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1577 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1578 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1579 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1580 },
Christopher Haster 8332:5fce745004b6 1581 "DELTA_DFCM_NNN40_OTA": {
Christopher Haster 8332:5fce745004b6 1582 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1583 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1584 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1585 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1586 },
Christopher Haster 8332:5fce745004b6 1587 "NRF51_DK_LEGACY": {
Christopher Haster 8332:5fce745004b6 1588 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1589 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1590 "extra_labels_add": ["NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1591 },
Christopher Haster 8332:5fce745004b6 1592 "NRF51_DK_BOOT": {
Christopher Haster 8332:5fce745004b6 1593 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1594 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1595 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1596 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1597 },
Christopher Haster 8332:5fce745004b6 1598 "NRF51_DK_OTA": {
Christopher Haster 8332:5fce745004b6 1599 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1600 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1601 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1602 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1603 },
Christopher Haster 8332:5fce745004b6 1604 "NRF51_DONGLE_LEGACY": {
Christopher Haster 8332:5fce745004b6 1605 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1606 "extra_labels_add": ["NRF51_DONGLE"],
Sarah Marsh 8472:da9bd832dfd1 1607 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1608 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1609 },
Christopher Haster 8332:5fce745004b6 1610 "NRF51_DONGLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1611 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1612 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1613 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1614 },
Christopher Haster 8332:5fce745004b6 1615 "NRF51_DONGLE_OTA": {
Christopher Haster 8332:5fce745004b6 1616 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1617 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1618 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1619 },
Christopher Haster 8332:5fce745004b6 1620 "NRF51_MICROBIT": {
Christopher Haster 8332:5fce745004b6 1621 "inherits": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1622 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1623 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1624 },
Christopher Haster 8332:5fce745004b6 1625 "NRF51_MICROBIT_BOOT": {
Christopher Haster 8332:5fce745004b6 1626 "inherits": ["MCU_NRF51_16K_BOOT_S110"],
Christopher Haster 8332:5fce745004b6 1627 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1628 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1629 },
Christopher Haster 8332:5fce745004b6 1630 "NRF51_MICROBIT_OTA": {
Christopher Haster 8332:5fce745004b6 1631 "inherits": ["MCU_NRF51_16K_OTA_S110"],
Christopher Haster 8332:5fce745004b6 1632 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1633 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1634 },
Christopher Haster 8332:5fce745004b6 1635 "NRF51_MICROBIT_B": {
Christopher Haster 8332:5fce745004b6 1636 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1637 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1638 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1639 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1640 },
Christopher Haster 8332:5fce745004b6 1641 "NRF51_MICROBIT_B_BOOT": {
Christopher Haster 8332:5fce745004b6 1642 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1643 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1644 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1645 },
Christopher Haster 8332:5fce745004b6 1646 "NRF51_MICROBIT_B_OTA": {
Christopher Haster 8332:5fce745004b6 1647 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1648 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1649 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1650 },
Christopher Haster 8332:5fce745004b6 1651 "MTM_MTCONNECT04S": {
Christopher Haster 8332:5fce745004b6 1652 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1653 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1654 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1655 },
Christopher Haster 8332:5fce745004b6 1656 "MTM_MTCONNECT04S_BOOT": {
Christopher Haster 8332:5fce745004b6 1657 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1658 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1659 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1660 },
Christopher Haster 8332:5fce745004b6 1661 "MTM_MTCONNECT04S_OTA": {
Christopher Haster 8332:5fce745004b6 1662 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1663 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1664 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1665 },
Christopher Haster 8332:5fce745004b6 1666 "TY51822R3": {
Christopher Haster 8332:5fce745004b6 1667 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 1668 "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
Christopher Haster 8332:5fce745004b6 1669 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 1670 "detect_code": ["1019"],
Christopher Haster 8332:5fce745004b6 1671 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1672 "overrides": {"uart_hwfc": 0},
Sarah Marsh 8472:da9bd832dfd1 1673 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1674 },
Christopher Haster 8332:5fce745004b6 1675 "TY51822R3_BOOT": {
Christopher Haster 8332:5fce745004b6 1676 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1677 "extra_labels_add": ["TY51822R3"],
Christopher Haster 8332:5fce745004b6 1678 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1679 },
Christopher Haster 8332:5fce745004b6 1680 "TY51822R3_OTA": {
Christopher Haster 8332:5fce745004b6 1681 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1682 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1683 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1684 },
Christopher Haster 8332:5fce745004b6 1685 "ARM_MPS2_Target": {
Christopher Haster 8332:5fce745004b6 1686 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1687 "public": false,
Christopher Haster 8332:5fce745004b6 1688 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1689 },
Christopher Haster 8332:5fce745004b6 1690 "ARM_MPS2_M0": {
Christopher Haster 8332:5fce745004b6 1691 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1692 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1693 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1694 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
Christopher Haster 8332:5fce745004b6 1695 "macros": ["CMSDK_CM0"],
Christopher Haster 8332:5fce745004b6 1696 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1697 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1698 },
Christopher Haster 8332:5fce745004b6 1699 "ARM_MPS2_M0P": {
Christopher Haster 8332:5fce745004b6 1700 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1701 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1702 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1703 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0P"],
Christopher Haster 8332:5fce745004b6 1704 "macros": ["CMSDK_CM0plus"],
Christopher Haster 8332:5fce745004b6 1705 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1706 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1707 },
Christopher Haster 8332:5fce745004b6 1708 "ARM_MPS2_M1": {
Christopher Haster 8332:5fce745004b6 1709 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1710 "core": "Cortex-M1",
Christopher Haster 8332:5fce745004b6 1711 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1712 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M1"],
Christopher Haster 8332:5fce745004b6 1713 "macros": ["CMSDK_CM1"],
Christopher Haster 8332:5fce745004b6 1714 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1715 },
Christopher Haster 8332:5fce745004b6 1716 "ARM_MPS2_M3": {
Christopher Haster 8332:5fce745004b6 1717 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1718 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1719 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1720 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M3"],
Christopher Haster 8332:5fce745004b6 1721 "macros": ["CMSDK_CM3"],
Christopher Haster 8332:5fce745004b6 1722 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1723 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1724 },
Christopher Haster 8332:5fce745004b6 1725 "ARM_MPS2_M4": {
Christopher Haster 8332:5fce745004b6 1726 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1727 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1728 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1729 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
Christopher Haster 8332:5fce745004b6 1730 "macros": ["CMSDK_CM4"],
Christopher Haster 8332:5fce745004b6 1731 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1732 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1733 },
Christopher Haster 8332:5fce745004b6 1734 "ARM_MPS2_M7": {
Christopher Haster 8332:5fce745004b6 1735 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1736 "core": "Cortex-M7",
Christopher Haster 8332:5fce745004b6 1737 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1738 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M7"],
Christopher Haster 8332:5fce745004b6 1739 "macros": ["CMSDK_CM7"],
Christopher Haster 8332:5fce745004b6 1740 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1741 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1742 },
Christopher Haster 8332:5fce745004b6 1743 "ARM_IOTSS_Target": {
Christopher Haster 8332:5fce745004b6 1744 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1745 "public": false,
Christopher Haster 8332:5fce745004b6 1746 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1747 },
Christopher Haster 8332:5fce745004b6 1748 "ARM_IOTSS_BEID": {
Christopher Haster 8332:5fce745004b6 1749 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1750 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1751 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1752 "extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
Christopher Haster 8332:5fce745004b6 1753 "macros": ["CMSDK_BEID"],
Christopher Haster 8332:5fce745004b6 1754 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1755 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1756 },
Christopher Haster 8332:5fce745004b6 1757 "ARM_BEETLE_SOC": {
Christopher Haster 8332:5fce745004b6 1758 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1759 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1760 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1761 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1762 "extra_labels": ["ARM_SSG", "BEETLE"],
Christopher Haster 8332:5fce745004b6 1763 "macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
Christopher Haster 8332:5fce745004b6 1764 "device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 1765 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 1766 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1767 "device_name": "beetle"
Christopher Haster 8332:5fce745004b6 1768 },
Christopher Haster 8332:5fce745004b6 1769 "RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1770 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1771 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1772 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1773 "extra_labels": ["RENESAS", "MBRZA1H"],
Christopher Haster 8332:5fce745004b6 1774 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1775 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1776 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1777 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1778 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1779 "device_name": "r7s721001"
Christopher Haster 8332:5fce745004b6 1780 },
Christopher Haster 8332:5fce745004b6 1781 "VK_RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1782 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1783 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1784 "extra_labels": ["RENESAS", "VKRZA1H"],
Christopher Haster 8332:5fce745004b6 1785 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1786 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1787 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1788 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1789 "features": ["LWIP"],
Christopher Haster 8332:5fce745004b6 1790 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1791 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1792 },
Christopher Haster 8332:5fce745004b6 1793 "MAXWSNENV": {
Christopher Haster 8332:5fce745004b6 1794 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1795 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1796 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1797 "extra_labels": ["Maxim", "MAX32610"],
Christopher Haster 8332:5fce745004b6 1798 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1799 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1800 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1801 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1802 },
Christopher Haster 8332:5fce745004b6 1803 "MAX32600MBED": {
Christopher Haster 8332:5fce745004b6 1804 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1805 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1806 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1807 "extra_labels": ["Maxim", "MAX32600"],
Christopher Haster 8332:5fce745004b6 1808 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1809 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1810 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1811 "device_name": "max326000x85"
Christopher Haster 8332:5fce745004b6 1812 },
Christopher Haster 8332:5fce745004b6 1813 "MAX32620HSP": {
Christopher Haster 8332:5fce745004b6 1814 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1815 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1816 "extra_labels": ["Maxim", "MAX32620"],
Christopher Haster 8332:5fce745004b6 1817 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1818 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1819 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1820 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1821 },
Christopher Haster 8332:5fce745004b6 1822 "EFM32GG_STK3700": {
Christopher Haster 8332:5fce745004b6 1823 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1824 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1825 "macros": ["EFM32GG990F1024"],
Christopher Haster 8332:5fce745004b6 1826 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1827 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1828 "progen": {"target": "efm32gg-stk"},
Christopher Haster 8332:5fce745004b6 1829 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1830 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1831 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1832 "device_name": "EFM32GG990F1024"
Christopher Haster 8332:5fce745004b6 1833 },
Christopher Haster 8332:5fce745004b6 1834 "EFM32LG_STK3600": {
Christopher Haster 8332:5fce745004b6 1835 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1836 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1837 "macros": ["EFM32LG990F256"],
Christopher Haster 8332:5fce745004b6 1838 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1839 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1840 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1841 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1842 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1843 "device_name": "EFM32LG990F256"
Christopher Haster 8332:5fce745004b6 1844 },
Christopher Haster 8332:5fce745004b6 1845 "EFM32WG_STK3800": {
Christopher Haster 8332:5fce745004b6 1846 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1847 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1848 "macros": ["EFM32WG990F256"],
Christopher Haster 8332:5fce745004b6 1849 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1850 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1851 "progen": {"target": "efm32wg-stk"},
Christopher Haster 8332:5fce745004b6 1852 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1853 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1854 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1855 "device_name": "EFM32WG990F256"
Christopher Haster 8332:5fce745004b6 1856 },
Christopher Haster 8332:5fce745004b6 1857 "EFM32ZG_STK3200": {
Christopher Haster 8332:5fce745004b6 1858 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1859 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1860 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1861 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1862 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1863 "macros": ["EFM32ZG222F32"],
Christopher Haster 8332:5fce745004b6 1864 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1865 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 1866 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1867 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1868 "device_name": "EFM32ZG222F32"
Christopher Haster 8332:5fce745004b6 1869 },
Christopher Haster 8332:5fce745004b6 1870 "EFM32HG_STK3400": {
Christopher Haster 8332:5fce745004b6 1871 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1872 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1873 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1874 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1875 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1876 "macros": ["EFM32HG322F64"],
Christopher Haster 8332:5fce745004b6 1877 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1878 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 1879 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1880 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1881 "device_name": "EFM32HG322F64"
Christopher Haster 8332:5fce745004b6 1882 },
Christopher Haster 8332:5fce745004b6 1883 "EFM32PG_STK3401": {
Christopher Haster 8332:5fce745004b6 1884 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1885 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1886 "macros": ["EFM32PG1B200F256GM48"],
Christopher Haster 8332:5fce745004b6 1887 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1888 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1889 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1890 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1891 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1892 "device_name": "EFM32PG1B100F256GM32"
Christopher Haster 8332:5fce745004b6 1893 },
Christopher Haster 8332:5fce745004b6 1894 "WIZWIKI_W7500": {
Christopher Haster 8332:5fce745004b6 1895 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1896 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1897 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
Christopher Haster 8332:5fce745004b6 1898 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 1899 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1900 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1901 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1902 },
Christopher Haster 8332:5fce745004b6 1903 "WIZWIKI_W7500P": {
Christopher Haster 8332:5fce745004b6 1904 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1905 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1906 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
Christopher Haster 8332:5fce745004b6 1907 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 1908 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1909 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1910 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1911 },
Christopher Haster 8332:5fce745004b6 1912 "WIZWIKI_W7500ECO": {
Christopher Haster 8332:5fce745004b6 1913 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1914 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1915 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
Christopher Haster 8332:5fce745004b6 1916 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 1917 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1918 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1919 },
Christopher Haster 8332:5fce745004b6 1920 "SAMR21G18A": {
Christopher Haster 8332:5fce745004b6 1921 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1922 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1923 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1924 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
Christopher Haster 8332:5fce745004b6 1925 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1926 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1927 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1928 "device_name": "ATSAMR21G18A"
Christopher Haster 8332:5fce745004b6 1929 },
Christopher Haster 8332:5fce745004b6 1930 "SAMD21J18A": {
Christopher Haster 8332:5fce745004b6 1931 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1932 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1933 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1934 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 1935 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1936 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1937 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1938 "device_name" : "ATSAMD21J18A"
Christopher Haster 8332:5fce745004b6 1939 },
Christopher Haster 8332:5fce745004b6 1940 "SAMD21G18A": {
Christopher Haster 8332:5fce745004b6 1941 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1942 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1943 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1944 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 1945 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1946 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1947 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1948 "device_name": "ATSAMD21G18A"
Christopher Haster 8332:5fce745004b6 1949 },
Christopher Haster 8332:5fce745004b6 1950 "SAML21J18A": {
Christopher Haster 8332:5fce745004b6 1951 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1952 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1953 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1954 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
Christopher Haster 8332:5fce745004b6 1955 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Sarah Marsh 8472:da9bd832dfd1 1956 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1957 "device_name": "ATSAML21J18A"
Christopher Haster 8332:5fce745004b6 1958 },
Christopher Haster 8332:5fce745004b6 1959 "SAMG55J19": {
Christopher Haster 8332:5fce745004b6 1960 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1961 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 1962 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
Christopher Haster 8332:5fce745004b6 1963 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1964 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1965 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1966 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1967 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 1968 "device_name": "ATSAMG55J19"
Christopher Haster 8332:5fce745004b6 1969 },
Christopher Haster 8332:5fce745004b6 1970 "MCU_NRF51_UNIFIED": {
Christopher Haster 8332:5fce745004b6 1971 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1972 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1973 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1974 "macros": [
Christopher Haster 8332:5fce745004b6 1975 "NRF51",
Christopher Haster 8332:5fce745004b6 1976 "TARGET_NRF51822",
Christopher Haster 8332:5fce745004b6 1977 "BLE_STACK_SUPPORT_REQD",
Christopher Haster 8332:5fce745004b6 1978 "SOFTDEVICE_PRESENT",
Christopher Haster 8332:5fce745004b6 1979 "S130",
Christopher Haster 8332:5fce745004b6 1980 "TARGET_MCU_NRF51822"
Christopher Haster 8332:5fce745004b6 1981 ],
Christopher Haster 8332:5fce745004b6 1982 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 1983 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
Christopher Haster 8332:5fce745004b6 1984 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 1985 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1986 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1987 "public": false,
Christopher Haster 8332:5fce745004b6 1988 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 1989 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1990 {
Christopher Haster 8332:5fce745004b6 1991 "boot": "",
Christopher Haster 8332:5fce745004b6 1992 "name": "s130_nrf51_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1993 "offset": 110592
Christopher Haster 8332:5fce745004b6 1994 }
Christopher Haster 8332:5fce745004b6 1995 ],
Christopher Haster 8332:5fce745004b6 1996 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 1997 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1998 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 1999 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 2000 },
Christopher Haster 8332:5fce745004b6 2001 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 2002 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 2003 "config": {
Christopher Haster 8332:5fce745004b6 2004 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 2005 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 2006 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 2007 },
Christopher Haster 8332:5fce745004b6 2008 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 2009 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 2010 "value": 1,
Christopher Haster 8332:5fce745004b6 2011 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 2012 }
Christopher Haster 8332:5fce745004b6 2013 },
Christopher Haster 8332:5fce745004b6 2014 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 2015 },
Christopher Haster 8332:5fce745004b6 2016 "MCU_NRF51_32K_UNIFIED": {
Christopher Haster 8332:5fce745004b6 2017 "inherits": ["MCU_NRF51_UNIFIED"],
Christopher Haster 8332:5fce745004b6 2018 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 2019 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 2020 "public": false
Christopher Haster 8332:5fce745004b6 2021 },
Christopher Haster 8332:5fce745004b6 2022 "NRF51_DK": {
Christopher Haster 8332:5fce745004b6 2023 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2024 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Andrzej Puzdrowski 8742:ea949d3ba022 2025 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 2026 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 2027 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 2028 },
Christopher Haster 8332:5fce745004b6 2029 "NRF51_DONGLE": {
Christopher Haster 8332:5fce745004b6 2030 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 2031 "progen": {"target": "nrf51-dongle"},
Mahadevan Mahesh 8366:70aeab6c7eb7 2032 "device_has": ["ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 2033 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 2034 },
Christopher Haster 8332:5fce745004b6 2035 "MCU_NRF52": {
Christopher Haster 8332:5fce745004b6 2036 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2037 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 2038 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
Christopher Haster 8332:5fce745004b6 2039 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
Christopher Haster 8332:5fce745004b6 2040 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 2041 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2042 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2043 "public": false,
Christopher Haster 8332:5fce745004b6 2044 "detect_code": ["1101"],
Christopher Haster 8332:5fce745004b6 2045 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 2046 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 2047 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 2048 {
Christopher Haster 8332:5fce745004b6 2049 "boot": "",
Christopher Haster 8332:5fce745004b6 2050 "name": "s132_nrf52_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 2051 "offset": 114688
Christopher Haster 8332:5fce745004b6 2052 }
Christopher Haster 8332:5fce745004b6 2053 ],
Christopher Haster 8332:5fce745004b6 2054 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 2055 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 2056 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 2057 },
Christopher Haster 8332:5fce745004b6 2058 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 2059 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 2060 "config": {
Christopher Haster 8332:5fce745004b6 2061 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 2062 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 2063 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 2064 },
Christopher Haster 8332:5fce745004b6 2065 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 2066 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 2067 "value": 1,
Christopher Haster 8332:5fce745004b6 2068 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 2069 }
Christopher Haster 8332:5fce745004b6 2070 }
Christopher Haster 8332:5fce745004b6 2071 },
Christopher Haster 8332:5fce745004b6 2072 "NRF52_DK": {
Christopher Haster 8332:5fce745004b6 2073 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2074 "inherits": ["MCU_NRF52"],
Sarah Marsh 8472:da9bd832dfd1 2075 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Andrzej Puzdrowski 8742:ea949d3ba022 2076 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2077 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 2078 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2079 },
Christopher Haster 8332:5fce745004b6 2080 "DELTA_DFBM_NQ620": {
Christopher Haster 8332:5fce745004b6 2081 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2082 "inherits": ["MCU_NRF52"],
Christopher Haster 8332:5fce745004b6 2083 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Christopher Haster 8332:5fce745004b6 2084 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2085 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 2086 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2087 },
Christopher Haster 8332:5fce745004b6 2088 "BLUEPILL_F103C8": {
Christopher Haster 8332:5fce745004b6 2089 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2090 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 2091 "extra_labels": ["STM", "STM32F1", "STM32F103C8"],
Christopher Haster 8332:5fce745004b6 2092 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 2093 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2094 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 2095 },
Christopher Haster 8332:5fce745004b6 2096 "NUMAKER_PFM_NUC472": {
Christopher Haster 8332:5fce745004b6 2097 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 2098 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 2099 "extra_labels": ["NUVOTON", "NUC472", "NUMAKER_PFM_NUC472"],
Christopher Haster 8332:5fce745004b6 2100 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2101 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2102 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2103 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG"],
Christopher Haster 8342:520d28b41ea4 2104 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 2105 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 2106 "device_name": "NUC472HI8AE"
Mahadevan Mahesh 8366:70aeab6c7eb7 2107 },
Christopher Haster 8332:5fce745004b6 2108 "NCS36510": {
Christopher Haster 8332:5fce745004b6 2109 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2110 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2111 "extra_labels": ["ONSEMI"],
Christopher Haster 8332:5fce745004b6 2112 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
maclobdell 8733:742bc6b628fa 2113 "macros": ["REVD", "CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
Christopher Haster 8332:5fce745004b6 2114 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Laurent MEUNIER 8647:8b0d2777b841 2115 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER"],
maclobdell 8732:4166825f6c3c 2116 "device_name": "NCS36510",
Christopher Haster 8332:5fce745004b6 2117 "release_versions": ["2", "5"]
ccli8 8611:5441db5ff596 2118 },
ccli8 8611:5441db5ff596 2119 "NUMAKER_PFM_M453": {
ccli8 8611:5441db5ff596 2120 "core": "Cortex-M4F",
ccli8 8611:5441db5ff596 2121 "default_toolchain": "ARM",
ccli8 8611:5441db5ff596 2122 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453"],
ccli8 8611:5441db5ff596 2123 "is_disk_virtual": true,
ccli8 8611:5441db5ff596 2124 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
ccli8 8611:5441db5ff596 2125 "inherits": ["Target"],
ccli8 8611:5441db5ff596 2126 "progen": {"target": "numaker-pfm-m453"},
ccli8 8611:5441db5ff596 2127 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
ccli8 8644:79863cfcbbb0 2128 "release_versions": ["2", "5"],
ccli8 8644:79863cfcbbb0 2129 "device_name": "M453VG6AE"
Rob Meades 8783:357c3fdee746 2130 },
Rob Meades 8783:357c3fdee746 2131 "HI2110": {
Rob Meades 8783:357c3fdee746 2132 "inherits": ["Target"],
Rob Meades 8783:357c3fdee746 2133 "core": "Cortex-M0",
Rob Meades 8783:357c3fdee746 2134 "default_toolchain": "GCC_ARM",
Rob Meades 8783:357c3fdee746 2135 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Rob Meades 8783:357c3fdee746 2136 "extra_labels": ["ublox"],
Rob Meades 8783:357c3fdee746 2137 "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1"],
Rob Meades 8783:357c3fdee746 2138 "public": false,
Rob Meades 8783:357c3fdee746 2139 "target_overrides": {
Rob Meades 8783:357c3fdee746 2140 "*": {
Rob Meades 8783:357c3fdee746 2141 "core.stdio-flush-at-exit": false
Rob Meades 8783:357c3fdee746 2142 }
Rob Meades 8783:357c3fdee746 2143 },
Rob Meades 8783:357c3fdee746 2144 "device_has": ["INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"],
Rob Meades 8783:357c3fdee746 2145 "default_lib": "std",
Rob Meades 8783:357c3fdee746 2146 "release_versions": ["5"]
Rob Meades 8783:357c3fdee746 2147 },
Rob Meades 8783:357c3fdee746 2148 "SARA_NBIOT": {
Rob Meades 8783:357c3fdee746 2149 "inherits": ["HI2110"],
Rob Meades 8783:357c3fdee746 2150 "extra_labels": ["ublox", "HI2110"],
Rob Meades 8783:357c3fdee746 2151 "public": false
Rob Meades 8783:357c3fdee746 2152 },
Rob Meades 8783:357c3fdee746 2153 "SARA_NBIOT_EVK": {
Rob Meades 8783:357c3fdee746 2154 "inherits": ["SARA_NBIOT"],
Rob Meades 8783:357c3fdee746 2155 "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
ccli8 8611:5441db5ff596 2156 }
Marcelo Salazar 8947:c6669467b509 2157 }