ST / ST_Events-old

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Dependents:   HelloWorld_CCA01M1 HelloWorld_CCA02M1 CI-data-logger-server HelloWorld_CCA02M1 ... more

This is a fork of the events subdirectory of https://github.com/ARMmbed/mbed-os.

Note, you must import this library with import name: events!!!

targets/targets.json@8817:519ed36450d5, 2016-10-20 (annotated)

Committer:
jeromecoutant
Date:
Thu Oct 20 15:01:05 2016 +0200
Revision:
8817:519ed36450d5
Parent:
8769:f8326647d18f
Child:
8818:94c28fd3480d
Add LOWPOWERTIMER capability for NUCLEO_F303ZE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Christopher Haster 8332:5fce745004b6 1 {
Christopher Haster 8332:5fce745004b6 2 "Target": {
Christopher Haster 8332:5fce745004b6 3 "core": null,
Christopher Haster 8332:5fce745004b6 4 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 5 "supported_toolchains": null,
Christopher Haster 8332:5fce745004b6 6 "extra_labels": [],
Christopher Haster 8332:5fce745004b6 7 "is_disk_virtual": false,
Christopher Haster 8332:5fce745004b6 8 "macros": [],
Christopher Haster 8332:5fce745004b6 9 "device_has": [],
Christopher Haster 8332:5fce745004b6 10 "features": [],
Christopher Haster 8332:5fce745004b6 11 "detect_code": [],
Christopher Haster 8332:5fce745004b6 12 "public": false,
Christopher Haster 8332:5fce745004b6 13 "default_lib": "std"
Christopher Haster 8332:5fce745004b6 14 },
Jimmy Brisson 8524:ddc94648bd40 15 "Super_Target": {
Jimmy Brisson 8524:ddc94648bd40 16 "inherits": ["Target"],
Jimmy Brisson 8524:ddc94648bd40 17 "core": "Cortex-M4",
Jimmy Brisson 8527:7bb374e8c313 18 "features_add": ["UVISOR", "BLE", "CLIENT", "IPV4", "IPV6"],
Jimmy Brisson 8527:7bb374e8c313 19 "supported_toolchains": ["ARM"]
Jimmy Brisson 8524:ddc94648bd40 20 },
Christopher Haster 8332:5fce745004b6 21 "CM4_UARM": {
Christopher Haster 8332:5fce745004b6 22 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 23 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 24 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 25 "public": false,
Christopher Haster 8332:5fce745004b6 26 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 27 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 28 },
Christopher Haster 8332:5fce745004b6 29 "CM4_ARM": {
Christopher Haster 8332:5fce745004b6 30 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 31 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 32 "public": false,
Christopher Haster 8332:5fce745004b6 33 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 34 },
Christopher Haster 8332:5fce745004b6 35 "CM4F_UARM": {
Christopher Haster 8332:5fce745004b6 36 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 37 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 38 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 39 "public": false,
Christopher Haster 8332:5fce745004b6 40 "supported_toolchains": ["uARM"],
Christopher Haster 8332:5fce745004b6 41 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 42 },
Christopher Haster 8332:5fce745004b6 43 "CM4F_ARM": {
Christopher Haster 8332:5fce745004b6 44 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 45 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 46 "public": false,
Christopher Haster 8332:5fce745004b6 47 "supported_toolchains": ["ARM"]
Christopher Haster 8332:5fce745004b6 48 },
Christopher Haster 8332:5fce745004b6 49 "LPCTarget": {
Christopher Haster 8332:5fce745004b6 50 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 51 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
Christopher Haster 8332:5fce745004b6 52 "public": false
Christopher Haster 8332:5fce745004b6 53 },
Christopher Haster 8332:5fce745004b6 54 "LPC11C24": {
Christopher Haster 8332:5fce745004b6 55 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 56 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 57 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
Christopher Haster 8332:5fce745004b6 58 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 59 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 60 "device_name": "LPC11C24FBD48/301"
Christopher Haster 8332:5fce745004b6 61 },
Christopher Haster 8332:5fce745004b6 62 "LPC1114": {
Christopher Haster 8332:5fce745004b6 63 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 64 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 65 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 66 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
Christopher Haster 8332:5fce745004b6 67 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 68 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 69 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 70 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 71 "device_name": "LPC1114FN28/102"
Christopher Haster 8332:5fce745004b6 72 },
Christopher Haster 8332:5fce745004b6 73 "LPC11U24": {
Christopher Haster 8332:5fce745004b6 74 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 75 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 76 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 77 "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
Christopher Haster 8332:5fce745004b6 78 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 79 "detect_code": ["1040"],
Christopher Haster 8332:5fce745004b6 80 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 81 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 82 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 83 "device_name": "LPC11U24FBD48/401"
Christopher Haster 8332:5fce745004b6 84 },
Christopher Haster 8332:5fce745004b6 85 "OC_MBUINO": {
Christopher Haster 8332:5fce745004b6 86 "inherits": ["LPC11U24"],
Christopher Haster 8332:5fce745004b6 87 "macros": ["TARGET_LPC11U24"],
Christopher Haster 8332:5fce745004b6 88 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 89 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 90 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 91 },
Christopher Haster 8332:5fce745004b6 92 "LPC11U24_301": {
Christopher Haster 8332:5fce745004b6 93 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 94 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 95 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 96 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 97 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 98 "device_name": "LPC11U24FHI33/301"
Christopher Haster 8332:5fce745004b6 99 },
Christopher Haster 8332:5fce745004b6 100 "LPC11U34_421": {
Christopher Haster 8332:5fce745004b6 101 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 102 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 103 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 104 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 105 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 106 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 107 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 108 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 109 },
Christopher Haster 8332:5fce745004b6 110 "MICRONFCBOARD": {
Christopher Haster 8332:5fce745004b6 111 "inherits": ["LPC11U34_421"],
Christopher Haster 8332:5fce745004b6 112 "macros": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
Christopher Haster 8332:5fce745004b6 113 "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
Sarah Marsh 8472:da9bd832dfd1 114 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 115 "device_name": "LPC11U34FBD48/311"
Christopher Haster 8332:5fce745004b6 116 },
Christopher Haster 8332:5fce745004b6 117 "LPC11U35_401": {
Christopher Haster 8332:5fce745004b6 118 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 119 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 120 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 121 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 122 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 123 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 124 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 125 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 126 "device_name": "LPC11U35FBD48/401"
Christopher Haster 8332:5fce745004b6 127 },
Christopher Haster 8332:5fce745004b6 128 "LPC11U35_501": {
Christopher Haster 8332:5fce745004b6 129 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 130 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 131 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 132 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 133 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 134 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 135 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 136 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 137 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 138 },
Christopher Haster 8332:5fce745004b6 139 "LPC11U35_501_IBDAP": {
Christopher Haster 8332:5fce745004b6 140 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 141 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 142 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 143 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 144 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 145 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 146 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 147 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 148 },
Christopher Haster 8332:5fce745004b6 149 "XADOW_M0": {
Christopher Haster 8332:5fce745004b6 150 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 151 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 152 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 153 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 154 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 155 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 156 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 157 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 158 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 159 },
Christopher Haster 8332:5fce745004b6 160 "LPC11U35_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 161 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 162 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 163 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 164 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
Christopher Haster 8332:5fce745004b6 165 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 166 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 167 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 168 "device_name": "LPC11U35FHI33/501"
Christopher Haster 8332:5fce745004b6 169 },
Christopher Haster 8332:5fce745004b6 170 "LPC11U37_501": {
Christopher Haster 8332:5fce745004b6 171 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 172 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 173 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 174 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 175 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Sarah Marsh 8472:da9bd832dfd1 176 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 177 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 178 },
Christopher Haster 8332:5fce745004b6 179 "LPCCAPPUCCINO": {
Christopher Haster 8332:5fce745004b6 180 "inherits": ["LPC11U37_501"],
Sarah Marsh 8472:da9bd832dfd1 181 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 182 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 183 },
Christopher Haster 8332:5fce745004b6 184 "ARCH_GPRS": {
Christopher Haster 8332:5fce745004b6 185 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 186 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 187 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 188 "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
Christopher Haster 8332:5fce745004b6 189 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 190 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 191 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 192 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 193 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 194 "device_name": "LPC11U37FBD64/501"
Christopher Haster 8332:5fce745004b6 195 },
Christopher Haster 8332:5fce745004b6 196 "LPC11U68": {
Christopher Haster 8332:5fce745004b6 197 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 198 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 199 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 200 "extra_labels": ["NXP", "LPC11U6X"],
Christopher Haster 8332:5fce745004b6 201 "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 202 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 203 "detect_code": ["1168"],
Christopher Haster 8332:5fce745004b6 204 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 205 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 206 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 207 "device_name": "LPC11U68JBD100"
Christopher Haster 8332:5fce745004b6 208 },
Christopher Haster 8332:5fce745004b6 209 "LPC1347": {
Christopher Haster 8332:5fce745004b6 210 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 211 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 212 "extra_labels": ["NXP", "LPC13XX"],
Christopher Haster 8332:5fce745004b6 213 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 214 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 215 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 216 "device_name": "LPC1347FBD48"
Christopher Haster 8332:5fce745004b6 217 },
Christopher Haster 8332:5fce745004b6 218 "LPC1549": {
Christopher Haster 8332:5fce745004b6 219 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 220 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 221 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 222 "extra_labels": ["NXP", "LPC15XX"],
Christopher Haster 8332:5fce745004b6 223 "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 224 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 225 "detect_code": ["1549"],
Christopher Haster 8332:5fce745004b6 226 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 227 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 228 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 229 "device_name": "lpc1549"
Christopher Haster 8332:5fce745004b6 230 },
Christopher Haster 8332:5fce745004b6 231 "LPC1768": {
Christopher Haster 8332:5fce745004b6 232 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 233 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 234 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 235 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 236 "detect_code": ["1010"],
Christopher Haster 8332:5fce745004b6 237 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 238 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 239 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 240 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 241 },
Christopher Haster 8332:5fce745004b6 242 "ARCH_PRO": {
Christopher Haster 8332:5fce745004b6 243 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 244 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 245 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 246 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 247 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 248 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 249 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 250 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 251 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 252 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 253 },
Christopher Haster 8332:5fce745004b6 254 "UBLOX_C027": {
Christopher Haster 8332:5fce745004b6 255 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 256 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 257 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 258 "extra_labels": ["NXP", "LPC176X"],
Christopher Haster 8332:5fce745004b6 259 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 260 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 261 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sam Grove 8348:c7230cd5f726 262 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 263 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 264 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 265 },
Christopher Haster 8332:5fce745004b6 266 "XBED_LPC1768": {
Christopher Haster 8332:5fce745004b6 267 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 268 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 269 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 270 "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
Christopher Haster 8332:5fce745004b6 271 "macros": ["TARGET_LPC1768"],
Christopher Haster 8332:5fce745004b6 272 "detect_code": ["1010"],
Sarah Marsh 8472:da9bd832dfd1 273 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 274 "device_name": "LPC1768"
Christopher Haster 8332:5fce745004b6 275 },
Christopher Haster 8332:5fce745004b6 276 "LPC2368": {
Christopher Haster 8332:5fce745004b6 277 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 278 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 279 "extra_labels": ["NXP", "LPC23XX"],
Christopher Haster 8332:5fce745004b6 280 "supported_toolchains": ["GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 281 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 282 },
Christopher Haster 8332:5fce745004b6 283 "LPC2460": {
Christopher Haster 8332:5fce745004b6 284 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 285 "core": "ARM7TDMI-S",
Christopher Haster 8332:5fce745004b6 286 "extra_labels": ["NXP", "LPC2460"],
Christopher Haster 8332:5fce745004b6 287 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 288 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 289 },
Christopher Haster 8332:5fce745004b6 290 "LPC810": {
Christopher Haster 8332:5fce745004b6 291 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 292 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 293 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 294 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 295 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 296 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 297 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 298 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 299 "device_name": "LPC810M021FN8"
Christopher Haster 8332:5fce745004b6 300 },
Christopher Haster 8332:5fce745004b6 301 "LPC812": {
Christopher Haster 8332:5fce745004b6 302 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 303 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 304 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 305 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 306 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 307 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 308 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 309 "detect_code": ["1050"],
Christopher Haster 8332:5fce745004b6 310 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 311 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 312 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 313 "device_name": "LPC812M101JDH20"
Christopher Haster 8332:5fce745004b6 314 },
Christopher Haster 8332:5fce745004b6 315 "LPC824": {
Christopher Haster 8332:5fce745004b6 316 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 317 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 318 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 319 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 320 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 321 "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 322 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 323 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 324 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 325 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 326 "device_name": "LPC824M201JDH20"
Christopher Haster 8332:5fce745004b6 327 },
Christopher Haster 8332:5fce745004b6 328 "SSCI824": {
Christopher Haster 8332:5fce745004b6 329 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 330 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 331 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 332 "extra_labels": ["NXP", "LPC82X"],
Christopher Haster 8332:5fce745004b6 333 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 334 "supported_toolchains": ["uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 335 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 336 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 337 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 338 },
Christopher Haster 8332:5fce745004b6 339 "LPC4088": {
Christopher Haster 8332:5fce745004b6 340 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 341 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 342 "extra_labels": ["NXP", "LPC408X"],
Christopher Haster 8332:5fce745004b6 343 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 344 "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 345 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 346 "function": "LPC4088Code.binary_hook",
Christopher Haster 8332:5fce745004b6 347 "toolchains": ["ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 348 },
Christopher Haster 8332:5fce745004b6 349 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 350 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 351 "device_name": "LPC4088FBD144"
Christopher Haster 8332:5fce745004b6 352 },
Christopher Haster 8332:5fce745004b6 353 "LPC4088_DM": {
Christopher Haster 8332:5fce745004b6 354 "inherits": ["LPC4088"],
Christopher Haster 8332:5fce745004b6 355 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 356 },
Christopher Haster 8332:5fce745004b6 357 "LPC4330_M4": {
Christopher Haster 8332:5fce745004b6 358 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 359 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 360 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 361 "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
Sarah Marsh 8472:da9bd832dfd1 362 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 363 "device_name": "LPC4330"
Christopher Haster 8332:5fce745004b6 364 },
Christopher Haster 8332:5fce745004b6 365 "LPC4330_M0": {
Christopher Haster 8332:5fce745004b6 366 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 367 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 368 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
Christopher Haster 8332:5fce745004b6 369 "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
Christopher Haster 8332:5fce745004b6 370 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
Christopher Haster 8332:5fce745004b6 371 },
Christopher Haster 8332:5fce745004b6 372 "LPC4337": {
Christopher Haster 8332:5fce745004b6 373 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 374 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 375 "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
Christopher Haster 8332:5fce745004b6 376 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 377 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 378 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 379 "device_name": "LPC4337"
Christopher Haster 8332:5fce745004b6 380 },
Christopher Haster 8332:5fce745004b6 381 "LPC1800": {
Christopher Haster 8332:5fce745004b6 382 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 383 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 384 "extra_labels": ["NXP", "LPC43XX"],
Christopher Haster 8332:5fce745004b6 385 "public": false,
Christopher Haster 8332:5fce745004b6 386 "supported_toolchains": ["ARM", "GCC_CR", "IAR"]
Christopher Haster 8332:5fce745004b6 387 },
Christopher Haster 8332:5fce745004b6 388 "LPC11U37H_401": {
Christopher Haster 8332:5fce745004b6 389 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 390 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 391 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 392 "extra_labels": ["NXP", "LPC11UXX"],
Christopher Haster 8332:5fce745004b6 393 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
Christopher Haster 8332:5fce745004b6 394 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 395 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 396 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 397 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 398 "device_name": "LPC11U37HFBD64/401"
Christopher Haster 8332:5fce745004b6 399 },
Christopher Haster 8332:5fce745004b6 400 "ELEKTOR_COCORICO": {
Christopher Haster 8332:5fce745004b6 401 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 402 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 403 "extra_labels": ["NXP", "LPC81X"],
Christopher Haster 8332:5fce745004b6 404 "supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 405 "inherits": ["LPCTarget"],
Christopher Haster 8332:5fce745004b6 406 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 407 "detect_code": ["C000"],
Sarah Marsh 8472:da9bd832dfd1 408 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 409 "device_name": "LPC812M101JDH16"
Christopher Haster 8332:5fce745004b6 410 },
Christopher Haster 8332:5fce745004b6 411 "KL05Z": {
Christopher Haster 8332:5fce745004b6 412 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 413 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 414 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 415 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 416 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 417 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 418 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 419 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 420 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 421 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 422 "device_name": "MKL05Z32xxx4"
Christopher Haster 8332:5fce745004b6 423 },
Christopher Haster 8332:5fce745004b6 424 "KL25Z": {
Christopher Haster 8332:5fce745004b6 425 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 426 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 427 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 428 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 429 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 430 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 431 "detect_code": ["0200"],
Christopher Haster 8332:5fce745004b6 432 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 433 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 434 "device_name": "MKL25Z128xxx4"
Christopher Haster 8332:5fce745004b6 435 },
Christopher Haster 8332:5fce745004b6 436 "KL26Z": {
Christopher Haster 8332:5fce745004b6 437 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 438 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 439 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 440 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 441 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 442 "inherits": ["Target"],
Sarah Marsh 8472:da9bd832dfd1 443 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 444 "device_name": "MKL26Z128xxx4"
Christopher Haster 8332:5fce745004b6 445 },
Christopher Haster 8332:5fce745004b6 446 "KL46Z": {
Christopher Haster 8332:5fce745004b6 447 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 448 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 449 "extra_labels": ["Freescale", "KLXX"],
Christopher Haster 8332:5fce745004b6 450 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 451 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 452 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 453 "detect_code": ["0220"],
Christopher Haster 8332:5fce745004b6 454 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 455 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 456 "device_name": "MKL46Z256xxx4"
Christopher Haster 8332:5fce745004b6 457 },
Christopher Haster 8332:5fce745004b6 458 "K20D50M": {
Christopher Haster 8332:5fce745004b6 459 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 460 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 461 "extra_labels": ["Freescale", "K20XX"],
Christopher Haster 8332:5fce745004b6 462 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 463 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 464 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 465 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 466 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 467 "device_name": "MK20DX128xxx5"
Christopher Haster 8332:5fce745004b6 468 },
Christopher Haster 8332:5fce745004b6 469 "TEENSY3_1": {
Christopher Haster 8332:5fce745004b6 470 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 471 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 472 "extra_labels": ["Freescale", "K20XX", "K20DX256"],
Christopher Haster 8332:5fce745004b6 473 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 474 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 475 "supported_toolchains": ["GCC_ARM", "ARM"],
Christopher Haster 8332:5fce745004b6 476 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 477 "function": "TEENSY3_1Code.binary_hook",
Christopher Haster 8332:5fce745004b6 478 "toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 479 },
Christopher Haster 8332:5fce745004b6 480 "detect_code": ["0230"],
Christopher Haster 8332:5fce745004b6 481 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 482 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 483 "device_name": "MK20DX256xxx7"
Christopher Haster 8332:5fce745004b6 484 },
Christopher Haster 8332:5fce745004b6 485 "K22F": {
Christopher Haster 8332:5fce745004b6 486 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 487 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 488 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 489 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"],
Christopher Haster 8332:5fce745004b6 490 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 491 "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 492 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 493 "detect_code": ["0231"],
Christopher Haster 8332:5fce745004b6 494 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 495 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 496 "device_name": "MK22DN512xxx5"
Christopher Haster 8332:5fce745004b6 497 },
Christopher Haster 8332:5fce745004b6 498 "KL27Z": {
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Christopher Haster 8332:5fce745004b6 500 "core": "Cortex-M0+",
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Christopher Haster 8332:5fce745004b6 503 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
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Christopher Haster 8332:5fce745004b6 506 "default_toolchain": "ARM",
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Christopher Haster 8332:5fce745004b6 509 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 510 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 511 "device_name": "MKL27Z64xxx4"
Christopher Haster 8332:5fce745004b6 512 },
Christopher Haster 8332:5fce745004b6 513 "KL43Z": {
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Christopher Haster 8332:5fce745004b6 515 "core": "Cortex-M0+",
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Christopher Haster 8332:5fce745004b6 517 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 518 "macros": ["CPU_MKL43Z256VLH4", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 519 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 520 "inherits": ["Target"],
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Sarah Marsh 8472:da9bd832dfd1 523 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 524 "device_name": "MKL43Z256xxx4"
Christopher Haster 8332:5fce745004b6 525 },
Mahadevan Mahesh 8665:1775fbac0db8 526 "KL82Z": {
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Mahadevan Mahesh 8665:1775fbac0db8 528 "core": "Cortex-M0+",
Mahadevan Mahesh 8665:1775fbac0db8 529 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Mahadevan Mahesh 8665:1775fbac0db8 530 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8665:1775fbac0db8 531 "macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8665:1775fbac0db8 532 "is_disk_virtual": true,
Mahadevan Mahesh 8665:1775fbac0db8 533 "inherits": ["Target"],
Mahadevan Mahesh 8665:1775fbac0db8 534 "progen": {"target": "frdm-kl82z"},
Mahadevan Mahesh 8665:1775fbac0db8 535 "detect_code": ["0218"],
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Mahadevan Mahesh 8665:1775fbac0db8 537 "release_versions": ["2", "5"]
Mahadevan Mahesh 8665:1775fbac0db8 538 },
Mahadevan Mahesh 8713:a1a30dd433d6 539 "KW24D": {
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Mahadevan Mahesh 8713:a1a30dd433d6 541 "core": "Cortex-M4",
Mahadevan Mahesh 8713:a1a30dd433d6 542 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Mahadevan Mahesh 8713:a1a30dd433d6 543 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Mahadevan Mahesh 8713:a1a30dd433d6 544 "is_disk_virtual": true,
Mahadevan Mahesh 8713:a1a30dd433d6 545 "macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED"],
Mahadevan Mahesh 8713:a1a30dd433d6 546 "inherits": ["Target"],
Mahadevan Mahesh 8713:a1a30dd433d6 547 "progen": {"target": "frdm-kw24d"},
Mahadevan Mahesh 8713:a1a30dd433d6 548 "detect_code": ["0250"],
Mahadevan Mahesh 8713:a1a30dd433d6 549 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Mahadevan Mahesh 8713:a1a30dd433d6 550 "release_versions": ["2", "5"]
Mahadevan Mahesh 8713:a1a30dd433d6 551 },
Christopher Haster 8332:5fce745004b6 552 "K64F": {
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Christopher Haster 8332:5fce745004b6 554 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 555 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 556 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 557 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 558 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 559 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 560 "detect_code": ["0240"],
Christopher Haster 8332:5fce745004b6 561 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG"],
Christopher Haster 8342:520d28b41ea4 562 "features": ["LWIP", "STORAGE"],
Sarah Marsh 8472:da9bd832dfd1 563 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 564 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 565 },
Christopher Haster 8332:5fce745004b6 566 "MTS_GAMBIT": {
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Christopher Haster 8332:5fce745004b6 568 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 569 "supported_toolchains": ["ARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 570 "extra_labels": ["Freescale", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 571 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 572 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Sarah Marsh 8472:da9bd832dfd1 573 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 574 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 575 },
Christopher Haster 8332:5fce745004b6 576 "HEXIWEAR": {
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Christopher Haster 8332:5fce745004b6 578 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 579 "extra_labels": ["Freescale", "KSDK2_MCUS", "MCU_K64F"],
Christopher Haster 8332:5fce745004b6 580 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 581 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
Christopher Haster 8332:5fce745004b6 582 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 583 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 584 "detect_code": ["0214"],
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Christopher Haster 8332:5fce745004b6 586 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 587 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 588 "device_name": "MK64FN1M0xxx12"
Christopher Haster 8332:5fce745004b6 589 },
Christopher Haster 8332:5fce745004b6 590 "K66F": {
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Christopher Haster 8332:5fce745004b6 592 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 593 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 594 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
Christopher Haster 8332:5fce745004b6 595 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 596 "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
Christopher Haster 8332:5fce745004b6 597 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 598 "detect_code": ["0311"],
Christopher Haster 8332:5fce745004b6 599 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 600 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 601 "device_name" : "MK66FN2M0xxx18"
Christopher Haster 8332:5fce745004b6 602 },
Christopher Haster 8332:5fce745004b6 603 "NUCLEO_F030R8": {
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Christopher Haster 8332:5fce745004b6 605 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 606 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 607 "extra_labels": ["STM", "STM32F0", "STM32F030R8"],
Christopher Haster 8332:5fce745004b6 608 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 609 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 610 "detect_code": ["0725"],
Laurent MEUNIER 8670:d320c94c6968 611 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 612 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 613 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 614 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 615 "device_name": "STM32F030R8"
Christopher Haster 8332:5fce745004b6 616 },
Christopher Haster 8332:5fce745004b6 617 "NUCLEO_F031K6": {
Christopher Haster 8332:5fce745004b6 618 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 619 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 620 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 621 "extra_labels": ["STM", "STM32F0", "STM32F031K6"],
Christopher Haster 8332:5fce745004b6 622 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 623 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 624 "detect_code": ["0791"],
Laurent MEUNIER 8670:d320c94c6968 625 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 626 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 627 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 628 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 629 "device_name": "STM32F031K6"
Christopher Haster 8332:5fce745004b6 630 },
Christopher Haster 8332:5fce745004b6 631 "NUCLEO_F042K6": {
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Christopher Haster 8332:5fce745004b6 633 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 634 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 635 "extra_labels": ["STM", "STM32F0", "STM32F042K6"],
Christopher Haster 8332:5fce745004b6 636 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 637 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 638 "detect_code": ["0785"],
Laurent MEUNIER 8670:d320c94c6968 639 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 640 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 641 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 642 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 643 "device_name": "STM32F042K6"
Christopher Haster 8332:5fce745004b6 644 },
Christopher Haster 8332:5fce745004b6 645 "NUCLEO_F070RB": {
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Christopher Haster 8332:5fce745004b6 647 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 648 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 649 "extra_labels": ["STM", "STM32F0", "STM32F070RB"],
Christopher Haster 8332:5fce745004b6 650 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 651 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 652 "detect_code": ["0755"],
Laurent MEUNIER 8670:d320c94c6968 653 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 654 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 655 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 656 "device_name": "STM32F070RB"
Christopher Haster 8332:5fce745004b6 657 },
Christopher Haster 8332:5fce745004b6 658 "NUCLEO_F072RB": {
Christopher Haster 8332:5fce745004b6 659 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 660 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 661 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 662 "extra_labels": ["STM", "STM32F0", "STM32F072RB"],
Christopher Haster 8332:5fce745004b6 663 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 664 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 665 "detect_code": ["0730"],
Laurent MEUNIER 8670:d320c94c6968 666 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 667 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 668 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 669 "device_name": "STM32F072RB"
Christopher Haster 8332:5fce745004b6 670 },
Christopher Haster 8332:5fce745004b6 671 "NUCLEO_F091RC": {
Christopher Haster 8332:5fce745004b6 672 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 673 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 674 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 675 "extra_labels": ["STM", "STM32F0", "STM32F091RC"],
Christopher Haster 8332:5fce745004b6 676 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 677 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 678 "detect_code": ["0750"],
Laurent MEUNIER 8670:d320c94c6968 679 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 680 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 681 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 682 "device_name": "STM32F091RC"
Christopher Haster 8332:5fce745004b6 683 },
Christopher Haster 8332:5fce745004b6 684 "NUCLEO_F103RB": {
Christopher Haster 8332:5fce745004b6 685 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 686 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 687 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 688 "extra_labels": ["STM", "STM32F1", "STM32F103RB"],
Christopher Haster 8332:5fce745004b6 689 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 690 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 691 "detect_code": ["0700"],
Laurent MEUNIER 8670:d320c94c6968 692 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 693 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 694 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 695 "device_name": "STM32F103RB"
Christopher Haster 8332:5fce745004b6 696 },
Christopher Haster 8332:5fce745004b6 697 "NUCLEO_F207ZG": {
Christopher Haster 8332:5fce745004b6 698 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 699 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 700 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 701 "extra_labels": ["STM", "STM32F2", "STM32F207ZG"],
Christopher Haster 8332:5fce745004b6 702 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 703 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 704 "detect_code": ["0835"],
Laurent MEUNIER 8670:d320c94c6968 705 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 706 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 707 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 708 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 709 "device_name" : "STM32F207ZG"
Christopher Haster 8332:5fce745004b6 710 },
Christopher Haster 8332:5fce745004b6 711 "NUCLEO_F302R8": {
Christopher Haster 8332:5fce745004b6 712 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 713 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 714 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 715 "extra_labels": ["STM", "STM32F3", "STM32F302R8"],
Christopher Haster 8332:5fce745004b6 716 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 717 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 718 "detect_code": ["0705"],
Laurent MEUNIER 8670:d320c94c6968 719 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 720 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 721 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 722 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 723 "device_name": "STM32F302R8"
Christopher Haster 8332:5fce745004b6 724 },
Christopher Haster 8332:5fce745004b6 725 "NUCLEO_F303K8": {
Christopher Haster 8332:5fce745004b6 726 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 727 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 728 "default_toolchain": "ARM",
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Laurent MEUNIER 8670:d320c94c6968 730 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 731 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 732 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 733 "detect_code": ["0775"],
Christopher Haster 8332:5fce745004b6 734 "default_lib": "small",
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Sarah Marsh 8472:da9bd832dfd1 737 "device_name": "STM32F303K8"
Christopher Haster 8332:5fce745004b6 738 },
Christopher Haster 8332:5fce745004b6 739 "NUCLEO_F303RE": {
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Christopher Haster 8332:5fce745004b6 741 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 742 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 743 "extra_labels": ["STM", "STM32F3", "STM32F303RE"],
Christopher Haster 8332:5fce745004b6 744 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 745 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 746 "detect_code": ["0745"],
Laurent MEUNIER 8670:d320c94c6968 747 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 748 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 749 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 750 "device_name": "STM32F303RE"
Christopher Haster 8332:5fce745004b6 751 },
Christopher Haster 8332:5fce745004b6 752 "NUCLEO_F303ZE": {
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Christopher Haster 8332:5fce745004b6 755 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 756 "extra_labels": ["STM", "STM32F3", "STM32F303ZE"],
Christopher Haster 8332:5fce745004b6 757 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 758 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 759 "detect_code": ["0747"],
Laurent MEUNIER 8670:d320c94c6968 760 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
jeromecoutant 8817:519ed36450d5 761 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "LOWPOWERTIMER"],
Sarah Marsh 8507:29edfac555c0 762 "release_versions": ["2", "5"],
jeromecoutant 8817:519ed36450d5 763 "device_name": "STM32F303ZE"
Christopher Haster 8332:5fce745004b6 764 },
Christopher Haster 8332:5fce745004b6 765 "NUCLEO_F334R8": {
Christopher Haster 8332:5fce745004b6 766 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 767 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 768 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 769 "extra_labels": ["STM", "STM32F3", "STM32F334R8"],
Christopher Haster 8332:5fce745004b6 770 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 771 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 772 "detect_code": ["0735"],
Laurent MEUNIER 8670:d320c94c6968 773 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 774 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 775 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 776 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 777 "device_name": "STM32F334R8"
Christopher Haster 8332:5fce745004b6 778 },
Christopher Haster 8332:5fce745004b6 779 "NUCLEO_F401RE": {
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Christopher Haster 8332:5fce745004b6 781 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 782 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 783 "extra_labels": ["STM", "STM32F4", "STM32F401RE"],
Christopher Haster 8332:5fce745004b6 784 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 785 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 786 "detect_code": ["0720"],
Christopher Haster 8332:5fce745004b6 787 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 788 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 789 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 790 "device_name": "STM32F401RE"
Christopher Haster 8332:5fce745004b6 791 },
Christopher Haster 8332:5fce745004b6 792 "NUCLEO_F410RB": {
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Christopher Haster 8332:5fce745004b6 794 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 795 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 796 "extra_labels": ["STM", "STM32F4", "STM32F410RB","STM32F410Rx"],
Christopher Haster 8332:5fce745004b6 797 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 798 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 799 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 800 "detect_code": ["0740"],
Christopher Haster 8332:5fce745004b6 801 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 802 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 803 "device_name": "STM32F410RB"
Christopher Haster 8332:5fce745004b6 804 },
Christopher Haster 8332:5fce745004b6 805 "NUCLEO_F411RE": {
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Christopher Haster 8332:5fce745004b6 807 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 808 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 809 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 810 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 811 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 812 "detect_code": ["0740"],
Christopher Haster 8332:5fce745004b6 813 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 814 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 815 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 816 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 817 },
Christopher Haster 8332:5fce745004b6 818 "ELMO_F411RE": {
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Christopher Haster 8332:5fce745004b6 820 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 821 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 822 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 823 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 824 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 825 "detect_code": ["----"],
Christopher Haster 8332:5fce745004b6 826 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 827 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 828 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 829 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 830 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 831 },
Christopher Haster 8332:5fce745004b6 832 "NUCLEO_F429ZI": {
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Christopher Haster 8332:5fce745004b6 834 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 835 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 836 "default_toolchain": "ARM",
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Christopher Haster 8332:5fce745004b6 838 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 839 "progen": {"target": "nucleo-f429zi"},
Christopher Haster 8332:5fce745004b6 840 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 841 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8332:5fce745004b6 842 "detect_code": ["0796"],
Christopher Haster 8342:520d28b41ea4 843 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 844 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 845 "device_name" : "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 846 },
adustm 8699:0582a3f97984 847 "NUCLEO_F439ZI": {
adustm 8699:0582a3f97984 848 "supported_form_factors": ["ARDUINO"],
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adustm 8699:0582a3f97984 851 "default_toolchain": "ARM",
adustm 8699:0582a3f97984 852 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "F429_F439"],
adustm 8699:0582a3f97984 853 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
adustm 8699:0582a3f97984 854 "progen": {"target": "nucleo-f439zi"},
adustm 8699:0582a3f97984 855 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
adustm 8699:0582a3f97984 856 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
adustm 8699:0582a3f97984 857 "detect_code": ["0797"],
adustm 8699:0582a3f97984 858 "features": ["LWIP"],
adustm 8699:0582a3f97984 859 "release_versions": ["2", "5"],
adustm 8699:0582a3f97984 860 "device_name" : "STM32F429ZI"
adustm 8699:0582a3f97984 861 },
Christopher Haster 8332:5fce745004b6 862 "NUCLEO_F446RE": {
Christopher Haster 8332:5fce745004b6 863 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 864 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 865 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 866 "extra_labels": ["STM", "STM32F4", "STM32F446RE"],
Christopher Haster 8332:5fce745004b6 867 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 868 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 869 "detect_code": ["0777"],
Christopher Haster 8332:5fce745004b6 870 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 871 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 872 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 873 "device_name": "STM32F446RE"
Christopher Haster 8332:5fce745004b6 874 },
Christopher Haster 8332:5fce745004b6 875 "NUCLEO_F446ZE": {
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Christopher Haster 8332:5fce745004b6 877 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 878 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 879 "extra_labels": ["STM", "STM32F4", "STM32F446ZE"],
Christopher Haster 8332:5fce745004b6 880 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 881 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 882 "detect_code": ["0778"],
Christopher Haster 8332:5fce745004b6 883 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 884 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 885 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 886 "device_name" : "STM32F446ZE"
Christopher Haster 8332:5fce745004b6 887 },
Christopher Haster 8332:5fce745004b6 888 "B96B_F446VE": {
Christopher Haster 8332:5fce745004b6 889 "supported_form_factors": ["ARDUINO", "MORPHO"],
Christopher Haster 8332:5fce745004b6 890 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 891 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 892 "extra_labels": ["STM", "STM32F4", "STM32F446VE"],
Christopher Haster 8332:5fce745004b6 893 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 894 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 895 "detect_code": ["0840"],
Christopher Haster 8332:5fce745004b6 896 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 897 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 898 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 899 "device_name":"STM32F446VE"
Christopher Haster 8332:5fce745004b6 900 },
Christopher Haster 8332:5fce745004b6 901 "NUCLEO_F746ZG": {
Christopher Haster 8332:5fce745004b6 902 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 903 "core": "Cortex-M7F",
adustm 8701:5a968df3a238 904 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746ZG", "F746_F756"],
Christopher Haster 8332:5fce745004b6 905 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 906 "default_toolchain": "ARM",
Laurent MEUNIER 8670:d320c94c6968 907 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 908 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 909 "detect_code": ["0816"],
Laurent MEUNIER 8670:d320c94c6968 910 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 911 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 912 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 913 "device_name": "STM32F746ZG"
Christopher Haster 8332:5fce745004b6 914 },
adustm 8701:5a968df3a238 915 "NUCLEO_F756ZG": {
adustm 8701:5a968df3a238 916 "inherits": ["Target"],
adustm 8701:5a968df3a238 917 "core": "Cortex-M7F",
adustm 8701:5a968df3a238 918 "extra_labels": ["STM", "STM32F7", "STM32F756", "STM32F756ZG", "F746_F756"],
Christopher Haster 8332:5fce745004b6 919 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 920 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 921 "supported_form_factors": ["ARDUINO"],
adustm 8701:5a968df3a238 922 "detect_code": ["0819"],
Christopher Haster 8332:5fce745004b6 923 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 924 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 925 "release_versions": ["2", "5"],
adustm 8701:5a968df3a238 926 "device_name": "STM32F756ZG"
Christopher Haster 8332:5fce745004b6 927 },
Christopher Haster 8332:5fce745004b6 928 "NUCLEO_F767ZI": {
Christopher Haster 8332:5fce745004b6 929 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 930 "core": "Cortex-M7FD",
Christopher Haster 8332:5fce745004b6 931 "extra_labels": ["STM", "STM32F7", "STM32F767", "STM32F767ZI"],
Christopher Haster 8332:5fce745004b6 932 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 933 "default_toolchain": "ARM",
jeromecoutant 8661:e3f8446fe374 934 "supported_form_factors": ["ARDUINO"],
Laurent MEUNIER 8670:d320c94c6968 935 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 936 "detect_code": ["0818"],
Laurent MEUNIER 8670:d320c94c6968 937 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 938 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 939 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 940 "device_name" : "STM32F767ZI"
Christopher Haster 8332:5fce745004b6 941 },
Christopher Haster 8332:5fce745004b6 942 "NUCLEO_L011K4": {
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Christopher Haster 8332:5fce745004b6 944 "core": "Cortex-M0+",
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Christopher Haster 8332:5fce745004b6 951 "default_lib": "small",
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Christopher Haster 8332:5fce745004b6 954 },
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Christopher Haster 8332:5fce745004b6 957 "core": "Cortex-M0",
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Christopher Haster 8332:5fce745004b6 961 "supported_form_factors": ["ARDUINO"],
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Sarah Marsh 8472:da9bd832dfd1 965 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 966 "device_name": "STM32L031K6"
Christopher Haster 8332:5fce745004b6 967 },
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Christopher Haster 8332:5fce745004b6 973 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 974 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 975 "detect_code": ["0715"],
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Christopher Haster 8332:5fce745004b6 977 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 978 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 979 "device_name": "STM32L053R8"
Christopher Haster 8332:5fce745004b6 980 },
Christopher Haster 8332:5fce745004b6 981 "NUCLEO_L073RZ": {
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Christopher Haster 8332:5fce745004b6 983 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 984 "default_toolchain": "ARM",
adustm 8590:ebb840a10a54 985 "extra_labels": ["STM", "STM32L0", "STM32L073RZ", "STM32L073xx"],
Christopher Haster 8332:5fce745004b6 986 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 987 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 988 "detect_code": ["0760"],
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Sarah Marsh 8472:da9bd832dfd1 990 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 991 "device_name": "STM32L073RZ"
Christopher Haster 8332:5fce745004b6 992 },
Christopher Haster 8332:5fce745004b6 993 "NUCLEO_L152RE": {
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Christopher Haster 8332:5fce745004b6 996 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 997 "extra_labels": ["STM", "STM32L1", "STM32L152RE"],
Christopher Haster 8332:5fce745004b6 998 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 999 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1000 "detect_code": ["0710"],
Christopher Haster 8332:5fce745004b6 1001 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1002 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1003 "device_name": "STM32L152RE"
Christopher Haster 8332:5fce745004b6 1004 },
Christopher Haster 8332:5fce745004b6 1005 "NUCLEO_L432KC": {
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Christopher Haster 8332:5fce745004b6 1008 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1009 "extra_labels": ["STM", "STM32L4", "STM32L432KC"],
Christopher Haster 8332:5fce745004b6 1010 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1011 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1012 "detect_code": ["0770"],
Laurent MEUNIER 8670:d320c94c6968 1013 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1014 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "CAN", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1015 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1016 "device_name" : "STM32L432KC"
Christopher Haster 8332:5fce745004b6 1017 },
Christopher Haster 8332:5fce745004b6 1018 "NUCLEO_L476RG": {
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Christopher Haster 8332:5fce745004b6 1020 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1021 "default_toolchain": "ARM",
adustm 8700:42167837958f 1022 "extra_labels": ["STM", "STM32L4", "STM32L476RG", "L476_L486"],
Christopher Haster 8332:5fce745004b6 1023 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1024 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1025 "detect_code": ["0765"],
Laurent MEUNIER 8670:d320c94c6968 1026 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1027 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1028 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1029 "device_name": "stm32l476rg"
Christopher Haster 8332:5fce745004b6 1030 },
adustm 8700:42167837958f 1031 "NUCLEO_L486RG": {
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adustm 8700:42167837958f 1033 "core": "Cortex-M4F",
adustm 8700:42167837958f 1034 "default_toolchain": "ARM",
adustm 8700:42167837958f 1035 "extra_labels": ["STM", "STM32L4", "STM32L486RG", "L476_L486"],
adustm 8700:42167837958f 1036 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
adustm 8700:42167837958f 1037 "inherits": ["Target"],
adustm 8700:42167837958f 1038 "detect_code": ["0827"],
adustm 8700:42167837958f 1039 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
adustm 8700:42167837958f 1040 "release_versions": ["2", "5"],
adustm 8700:42167837958f 1041 "device_name": "stm32l486rg"
adustm 8700:42167837958f 1042 },
Christopher Haster 8332:5fce745004b6 1043 "STM32F3XX": {
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Christopher Haster 8332:5fce745004b6 1045 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 1046 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1047 "extra_labels": ["STM", "STM32F3XX"],
Christopher Haster 8332:5fce745004b6 1048 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 1049 },
Christopher Haster 8332:5fce745004b6 1050 "STM32F407": {
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Christopher Haster 8332:5fce745004b6 1052 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1053 "extra_labels": ["STM", "STM32F4", "STM32F4XX"],
Christopher Haster 8332:5fce745004b6 1054 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 1055 },
Christopher Haster 8332:5fce745004b6 1056 "ARCH_MAX": {
Christopher Haster 8332:5fce745004b6 1057 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1058 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1059 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1060 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1061 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1062 "macros": ["LSI_VALUE=32000"],
Christopher Haster 8332:5fce745004b6 1063 "inherits": ["Target"],
Laurent MEUNIER 8670:d320c94c6968 1064 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1065 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1066 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1067 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1068 },
Christopher Haster 8332:5fce745004b6 1069 "DISCO_F051R8": {
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Christopher Haster 8332:5fce745004b6 1071 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1072 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1073 "extra_labels": ["STM", "STM32F0", "STM32F051", "STM32F051R8"],
Christopher Haster 8332:5fce745004b6 1074 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1075 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1076 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1077 "device_name": "STM32F051R8"
Christopher Haster 8332:5fce745004b6 1078 },
Christopher Haster 8332:5fce745004b6 1079 "DISCO_F100RB": {
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Christopher Haster 8332:5fce745004b6 1081 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1082 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1083 "extra_labels": ["STM", "STM32F1", "STM32F100RB"],
Christopher Haster 8332:5fce745004b6 1084 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1085 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1086 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1087 "device_name": "STM32F100RB"
Christopher Haster 8332:5fce745004b6 1088 },
Christopher Haster 8332:5fce745004b6 1089 "DISCO_F303VC": {
Christopher Haster 8332:5fce745004b6 1090 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1091 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1092 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1093 "extra_labels": ["STM", "STM32F3", "STM32F303", "STM32F303VC"],
Laurent MEUNIER 8670:d320c94c6968 1094 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1095 "supported_toolchains": ["GCC_ARM"],
Laurent MEUNIER 8670:d320c94c6968 1096 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1097 "device_name": "STM32F303VC"
Christopher Haster 8332:5fce745004b6 1098 },
Christopher Haster 8332:5fce745004b6 1099 "DISCO_F334C8": {
Christopher Haster 8332:5fce745004b6 1100 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1101 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1102 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1103 "extra_labels": ["STM", "STM32F3", "STM32F334C8"],
Laurent MEUNIER 8670:d320c94c6968 1104 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1105 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1106 "detect_code": ["0810"],
Laurent MEUNIER 8670:d320c94c6968 1107 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1108 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1109 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1110 "device_name": "STM32F334C8"
Christopher Haster 8332:5fce745004b6 1111 },
Christopher Haster 8332:5fce745004b6 1112 "DISCO_F407VG": {
Christopher Haster 8332:5fce745004b6 1113 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1114 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1115 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
Christopher Haster 8332:5fce745004b6 1116 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1117 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Sarah Marsh 8520:ebbeba690467 1118 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1119 "device_name": "STM32F407VG"
Christopher Haster 8332:5fce745004b6 1120 },
Christopher Haster 8332:5fce745004b6 1121 "DISCO_F429ZI": {
Christopher Haster 8332:5fce745004b6 1122 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1123 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1124 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1125 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx"],
Christopher Haster 8332:5fce745004b6 1126 "macros": ["RTC_LSI=1","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1127 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1128 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1129 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1130 "device_name": "STM32F429ZI"
Christopher Haster 8332:5fce745004b6 1131 },
Christopher Haster 8332:5fce745004b6 1132 "DISCO_F469NI": {
Christopher Haster 8332:5fce745004b6 1133 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1134 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1135 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1136 "extra_labels": ["STM", "STM32F4", "STM32F469", "STM32F469NI", "STM32F469xx"],
Christopher Haster 8332:5fce745004b6 1137 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1138 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1139 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1140 "detect_code": ["0788"],
Laurent MEUNIER 8670:d320c94c6968 1141 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1142 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1143 "device_name": "STM32F469NI"
Christopher Haster 8332:5fce745004b6 1144 },
Christopher Haster 8332:5fce745004b6 1145 "DISCO_L053C8": {
Christopher Haster 8332:5fce745004b6 1146 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1147 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1148 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1149 "extra_labels": ["STM", "STM32L0", "STM32L053C8"],
Christopher Haster 8332:5fce745004b6 1150 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1151 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1152 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1153 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1154 "device_name": "STM32L053C8"
Christopher Haster 8332:5fce745004b6 1155 },
Christopher Haster 8332:5fce745004b6 1156 "DISCO_F746NG": {
Christopher Haster 8332:5fce745004b6 1157 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1158 "core": "Cortex-M7F",
Christopher Haster 8332:5fce745004b6 1159 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746NG"],
Christopher Haster 8332:5fce745004b6 1160 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1161 "default_toolchain": "ARM",
jeromecoutant 8661:e3f8446fe374 1162 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1163 "detect_code": ["0815"],
Laurent MEUNIER 8670:d320c94c6968 1164 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1165 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1166 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1167 "release_versions": ["2", "5"],
Sarah Marsh 8515:ca8692fd1903 1168 "device_name": "STM32F746NG"
Christopher Haster 8332:5fce745004b6 1169 },
Christopher Haster 8332:5fce745004b6 1170 "DISCO_F769NI": {
Christopher Haster 8332:5fce745004b6 1171 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1172 "core": "Cortex-M7FD",
Christopher Haster 8332:5fce745004b6 1173 "extra_labels": ["STM", "STM32F7", "STM32F769", "STM32F769NI"],
Christopher Haster 8332:5fce745004b6 1174 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1175 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1176 "detect_code": ["0817"],
Laurent MEUNIER 8670:d320c94c6968 1177 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1178 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1179 "features": ["LWIP"],
Sarah Marsh 8507:29edfac555c0 1180 "release_versions": ["2"],
Sarah Marsh 8507:29edfac555c0 1181 "device_name": "STM32F769NI"
Christopher Haster 8332:5fce745004b6 1182 },
Christopher Haster 8332:5fce745004b6 1183 "DISCO_L476VG": {
Christopher Haster 8332:5fce745004b6 1184 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1185 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1186 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1187 "extra_labels": ["STM", "STM32L4", "STM32L476VG"],
Christopher Haster 8332:5fce745004b6 1188 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1189 "detect_code": ["0820"],
Laurent MEUNIER 8670:d320c94c6968 1190 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Laurent MEUNIER 8670:d320c94c6968 1191 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
Sarah Marsh 8472:da9bd832dfd1 1192 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1193 "device_name": "stm32l476vg"
Christopher Haster 8332:5fce745004b6 1194 },
Christopher Haster 8332:5fce745004b6 1195 "MTS_MDOT_F405RG": {
Christopher Haster 8332:5fce745004b6 1196 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1197 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1198 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1199 "extra_labels": ["STM", "STM32F4", "STM32F405RG"],
Christopher Haster 8332:5fce745004b6 1200 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1201 "macros": ["HSE_VALUE=26000000", "TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1202 "progen": {"target": "mts-mdot-f405rg"},
Christopher Haster 8332:5fce745004b6 1203 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1204 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1205 "device_name": "STM32F405RG"
Christopher Haster 8332:5fce745004b6 1206 },
Christopher Haster 8332:5fce745004b6 1207 "MTS_MDOT_F411RE": {
Christopher Haster 8332:5fce745004b6 1208 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1209 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1210 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1211 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1212 "macros": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1213 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1214 "function": "MTSCode.combine_bins_mts_dot",
Christopher Haster 8332:5fce745004b6 1215 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1216 },
Christopher Haster 8332:5fce745004b6 1217 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1218 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1219 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1220 },
Christopher Haster 8332:5fce745004b6 1221 "MTS_DRAGONFLY_F411RE": {
Christopher Haster 8332:5fce745004b6 1222 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1223 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1224 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1225 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
Christopher Haster 8332:5fce745004b6 1226 "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
Christopher Haster 8332:5fce745004b6 1227 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1228 "function": "MTSCode.combine_bins_mts_dragonfly",
Christopher Haster 8332:5fce745004b6 1229 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
Christopher Haster 8332:5fce745004b6 1230 },
Christopher Haster 8332:5fce745004b6 1231 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1232 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1233 "device_name": "STM32F411RE"
Christopher Haster 8332:5fce745004b6 1234 },
Christopher Haster 8332:5fce745004b6 1235 "XDOT_L151CC": {
Christopher Haster 8332:5fce745004b6 1236 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1237 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1238 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1239 "extra_labels": ["STM", "STM32L1", "STM32L151CC"],
Christopher Haster 8332:5fce745004b6 1240 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1241 "progen": {"target": "xdot-l151cc"},
Christopher Haster 8332:5fce745004b6 1242 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1243 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1244 "release_versions": ["5"]
Christopher Haster 8332:5fce745004b6 1245 },
Christopher Haster 8332:5fce745004b6 1246 "MOTE_L152RC": {
Christopher Haster 8332:5fce745004b6 1247 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1248 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1249 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1250 "extra_labels": ["STM", "STM32L1", "STM32L152RC"],
Christopher Haster 8332:5fce745004b6 1251 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1252 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1253 "detect_code": ["4100"],
Christopher Haster 8332:5fce745004b6 1254 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1255 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1256 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1257 "device_name": "STM32L152RC"
Christopher Haster 8332:5fce745004b6 1258 },
Christopher Haster 8332:5fce745004b6 1259 "DISCO_F401VC": {
Christopher Haster 8332:5fce745004b6 1260 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1261 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1262 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 1263 "extra_labels": ["STM", "STM32F4", "STM32F401", "STM32F401VC"],
Christopher Haster 8332:5fce745004b6 1264 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1265 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
Sarah Marsh 8472:da9bd832dfd1 1266 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1267 "device_name": "STM32F401VC"
Christopher Haster 8332:5fce745004b6 1268 },
andreas.larsson 8355:cb6a226655c8 1269 "UBLOX_EVK_ODIN_W2": {
Christopher Haster 8332:5fce745004b6 1270 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1271 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1272 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1273 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
andreas.larsson 8654:d2daf30b4d0f 1274 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx"],
andreas.larsson 8768:b81d7522ac45 1275 "macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
Christopher Haster 8332:5fce745004b6 1276 "inherits": ["Target"],
Bartek Szatkowski 8707:f0d6077e73f5 1277 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
Christopher Haster 8342:520d28b41ea4 1278 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1279 "release_versions": ["5"],
Sarah Marsh 8472:da9bd832dfd1 1280 "device_name": "STM32F439ZI"
Christopher Haster 8332:5fce745004b6 1281 },
Christopher Haster 8332:5fce745004b6 1282 "NZ32_SC151": {
Christopher Haster 8332:5fce745004b6 1283 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1284 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1285 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1286 "program_cycle_s": 1.5,
Christopher Haster 8332:5fce745004b6 1287 "extra_labels": ["STM", "STM32L1", "STM32L151RC"],
Christopher Haster 8332:5fce745004b6 1288 "macros": ["RTC_LSI=1"],
Christopher Haster 8332:5fce745004b6 1289 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1290 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1291 "default_lib": "small",
Sarah Marsh 8472:da9bd832dfd1 1292 "device_name": "STM32L151RC"
Christopher Haster 8332:5fce745004b6 1293 },
Christopher Haster 8332:5fce745004b6 1294 "MCU_NRF51": {
Christopher Haster 8332:5fce745004b6 1295 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1296 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1297 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1298 "macros": ["NRF51", "TARGET_NRF51822"],
Christopher Haster 8332:5fce745004b6 1299 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 1300 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
Christopher Haster 8332:5fce745004b6 1301 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 1302 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1303 "supported_toolchains": ["ARM", "GCC_ARM"],
Christopher Haster 8332:5fce745004b6 1304 "public": false,
Christopher Haster 8332:5fce745004b6 1305 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 1306 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1307 {
Christopher Haster 8332:5fce745004b6 1308 "boot": "s130_nrf51_1.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1309 "name": "s130_nrf51_1.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1310 "offset": 114688
Christopher Haster 8332:5fce745004b6 1311 },
Christopher Haster 8332:5fce745004b6 1312 {
Christopher Haster 8332:5fce745004b6 1313 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1314 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1315 "offset": 98304
Christopher Haster 8332:5fce745004b6 1316 },
Christopher Haster 8332:5fce745004b6 1317 {
Christopher Haster 8332:5fce745004b6 1318 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1319 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1320 "offset": 90112
Christopher Haster 8332:5fce745004b6 1321 },
Christopher Haster 8332:5fce745004b6 1322 {
Christopher Haster 8332:5fce745004b6 1323 "boot": "s110_nrf51822_7.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1324 "name": "s110_nrf51822_7.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1325 "offset": 90112
Christopher Haster 8332:5fce745004b6 1326 },
Christopher Haster 8332:5fce745004b6 1327 {
Christopher Haster 8332:5fce745004b6 1328 "boot": "s110_nrf51822_6.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1329 "name": "s110_nrf51822_6.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1330 "offset": 81920
Christopher Haster 8332:5fce745004b6 1331 }
Christopher Haster 8332:5fce745004b6 1332 ],
Christopher Haster 8332:5fce745004b6 1333 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 1334 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1335 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 1336 "toolchains": ["ARM_STD", "GCC_ARM"]
Christopher Haster 8332:5fce745004b6 1337 },
Christopher Haster 8332:5fce745004b6 1338 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 1339 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1340 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 1341 },
Christopher Haster 8332:5fce745004b6 1342 "MCU_NRF51_16K_BASE": {
Christopher Haster 8332:5fce745004b6 1343 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1344 "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1345 "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1346 "public": false,
Christopher Haster 8332:5fce745004b6 1347 "default_lib": "small"
Christopher Haster 8332:5fce745004b6 1348 },
Christopher Haster 8332:5fce745004b6 1349 "MCU_NRF51_16K_BOOT_BASE": {
Christopher Haster 8332:5fce745004b6 1350 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1351 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1352 "extra_labels_add": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1353 "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1354 "public": false
Christopher Haster 8332:5fce745004b6 1355 },
Christopher Haster 8332:5fce745004b6 1356 "MCU_NRF51_16K_OTA_BASE": {
Christopher Haster 8332:5fce745004b6 1357 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1358 "public": false,
Christopher Haster 8332:5fce745004b6 1359 "extra_labels_add": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1360 "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1361 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1362 },
Christopher Haster 8332:5fce745004b6 1363 "MCU_NRF51_16K": {
Christopher Haster 8332:5fce745004b6 1364 "inherits": ["MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1365 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1366 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1367 "public": false
Christopher Haster 8332:5fce745004b6 1368 },
Christopher Haster 8332:5fce745004b6 1369 "MCU_NRF51_S110": {
Christopher Haster 8332:5fce745004b6 1370 "extra_labels_add": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1371 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1372 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1373 {
Christopher Haster 8332:5fce745004b6 1374 "name": "s110_nrf51822_8.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1375 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1376 "offset": 98304
Christopher Haster 8332:5fce745004b6 1377 },
Christopher Haster 8332:5fce745004b6 1378 {
Christopher Haster 8332:5fce745004b6 1379 "name": "s110_nrf51822_7.1.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1380 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1381 "offset": 90112
Christopher Haster 8332:5fce745004b6 1382 }
Christopher Haster 8332:5fce745004b6 1383 ],
Christopher Haster 8332:5fce745004b6 1384 "public": false
Christopher Haster 8332:5fce745004b6 1385 },
Christopher Haster 8332:5fce745004b6 1386 "MCU_NRF51_16K_S110": {
Christopher Haster 8332:5fce745004b6 1387 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"],
Christopher Haster 8332:5fce745004b6 1388 "public": false
Christopher Haster 8332:5fce745004b6 1389 },
Christopher Haster 8332:5fce745004b6 1390 "MCU_NRF51_16K_BOOT": {
Christopher Haster 8332:5fce745004b6 1391 "inherits": ["MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1392 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1393 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1394 "public": false
Christopher Haster 8332:5fce745004b6 1395 },
Christopher Haster 8332:5fce745004b6 1396 "MCU_NRF51_16K_BOOT_S110": {
Christopher Haster 8332:5fce745004b6 1397 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"],
Christopher Haster 8332:5fce745004b6 1398 "public": false
Christopher Haster 8332:5fce745004b6 1399 },
Christopher Haster 8332:5fce745004b6 1400 "MCU_NRF51_16K_OTA": {
Christopher Haster 8332:5fce745004b6 1401 "inherits": ["MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1402 "extra_labels_add": ["MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1403 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
Christopher Haster 8332:5fce745004b6 1404 "public": false
Christopher Haster 8332:5fce745004b6 1405 },
Christopher Haster 8332:5fce745004b6 1406 "MCU_NRF51_16K_OTA_S110": {
Christopher Haster 8332:5fce745004b6 1407 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"],
Christopher Haster 8332:5fce745004b6 1408 "public": false
Christopher Haster 8332:5fce745004b6 1409 },
Christopher Haster 8332:5fce745004b6 1410 "MCU_NRF51_32K": {
Christopher Haster 8332:5fce745004b6 1411 "inherits": ["MCU_NRF51"],
Christopher Haster 8332:5fce745004b6 1412 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1413 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1414 "public": false
Christopher Haster 8332:5fce745004b6 1415 },
Christopher Haster 8332:5fce745004b6 1416 "MCU_NRF51_32K_BOOT": {
Christopher Haster 8332:5fce745004b6 1417 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1418 "MERGE_BOOTLOADER": true,
Christopher Haster 8332:5fce745004b6 1419 "extra_labels_add": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1420 "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1421 "public": false
Christopher Haster 8332:5fce745004b6 1422 },
Christopher Haster 8332:5fce745004b6 1423 "MCU_NRF51_32K_OTA": {
Christopher Haster 8332:5fce745004b6 1424 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1425 "public": false,
Christopher Haster 8332:5fce745004b6 1426 "extra_labels_add": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1427 "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
Christopher Haster 8332:5fce745004b6 1428 "MERGE_SOFT_DEVICE": false
Christopher Haster 8332:5fce745004b6 1429 },
Christopher Haster 8332:5fce745004b6 1430 "NRF51822": {
Christopher Haster 8332:5fce745004b6 1431 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1432 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1433 "macros_add": ["TARGET_NRF51822_MKIT"],
Sarah Marsh 8472:da9bd832dfd1 1434 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1435 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1436 },
Christopher Haster 8332:5fce745004b6 1437 "NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1438 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1439 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1440 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1441 },
Christopher Haster 8332:5fce745004b6 1442 "NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1443 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1444 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
Christopher Haster 8332:5fce745004b6 1445 "macros_add": ["TARGET_NRF51822_MKIT"]
Christopher Haster 8332:5fce745004b6 1446 },
Christopher Haster 8332:5fce745004b6 1447 "ARCH_BLE": {
Christopher Haster 8332:5fce745004b6 1448 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1449 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1450 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1451 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1452 },
Christopher Haster 8332:5fce745004b6 1453 "ARCH_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1454 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1455 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1456 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1457 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1458 },
Christopher Haster 8332:5fce745004b6 1459 "ARCH_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1460 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1461 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1462 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1463 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1464 },
Christopher Haster 8332:5fce745004b6 1465 "ARCH_LINK": {
Christopher Haster 8332:5fce745004b6 1466 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1467 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1468 "extra_labels_add": ["ARCH_BLE"],
Christopher Haster 8332:5fce745004b6 1469 "macros_add": ["TARGET_ARCH_BLE"]
Christopher Haster 8332:5fce745004b6 1470 },
Christopher Haster 8332:5fce745004b6 1471 "ARCH_LINK_BOOT": {
Christopher Haster 8332:5fce745004b6 1472 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1473 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1474 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1475 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1476 },
Christopher Haster 8332:5fce745004b6 1477 "ARCH_LINK_OTA": {
Christopher Haster 8332:5fce745004b6 1478 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1479 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1480 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
Christopher Haster 8332:5fce745004b6 1481 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
Christopher Haster 8332:5fce745004b6 1482 },
Christopher Haster 8332:5fce745004b6 1483 "SEEED_TINY_BLE": {
Christopher Haster 8332:5fce745004b6 1484 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1485 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1486 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1487 },
Christopher Haster 8332:5fce745004b6 1488 "SEEED_TINY_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1489 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1490 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1491 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1492 },
Christopher Haster 8332:5fce745004b6 1493 "SEEED_TINY_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1494 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1495 "extra_labels_add": ["SEEED_TINY_BLE"],
Christopher Haster 8332:5fce745004b6 1496 "macros_add": ["TARGET_SEEED_TINY_BLE"]
Christopher Haster 8332:5fce745004b6 1497 },
Christopher Haster 8332:5fce745004b6 1498 "HRM1017": {
Christopher Haster 8332:5fce745004b6 1499 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1500 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Sarah Marsh 8472:da9bd832dfd1 1501 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1502 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1503 },
Christopher Haster 8332:5fce745004b6 1504 "HRM1017_BOOT": {
Christopher Haster 8332:5fce745004b6 1505 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1506 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1507 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1508 },
Christopher Haster 8332:5fce745004b6 1509 "HRM1017_OTA": {
Christopher Haster 8332:5fce745004b6 1510 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1511 "extra_labels_add": ["HRM1017"],
Christopher Haster 8332:5fce745004b6 1512 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1513 },
Christopher Haster 8332:5fce745004b6 1514 "RBLAB_NRF51822": {
Christopher Haster 8332:5fce745004b6 1515 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1516 "inherits": ["MCU_NRF51_16K"],
Sarah Marsh 8472:da9bd832dfd1 1517 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1518 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1519 },
Christopher Haster 8332:5fce745004b6 1520 "RBLAB_NRF51822_BOOT": {
Christopher Haster 8332:5fce745004b6 1521 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1522 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1523 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1524 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1525 },
Christopher Haster 8332:5fce745004b6 1526 "RBLAB_NRF51822_OTA": {
Christopher Haster 8332:5fce745004b6 1527 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1528 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1529 "extra_labels_add": ["RBLAB_NRF51822"],
Christopher Haster 8332:5fce745004b6 1530 "macros_add": ["TARGET_RBLAB_NRF51822"]
Christopher Haster 8332:5fce745004b6 1531 },
Christopher Haster 8332:5fce745004b6 1532 "RBLAB_BLENANO": {
Christopher Haster 8332:5fce745004b6 1533 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1534 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1535 },
Christopher Haster 8332:5fce745004b6 1536 "RBLAB_BLENANO_BOOT": {
Christopher Haster 8332:5fce745004b6 1537 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1538 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1539 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1540 },
Christopher Haster 8332:5fce745004b6 1541 "RBLAB_BLENANO_OTA": {
Christopher Haster 8332:5fce745004b6 1542 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1543 "extra_labels_add": ["RBLAB_BLENANO"],
Christopher Haster 8332:5fce745004b6 1544 "macros_add": ["TARGET_RBLAB_BLENANO"]
Christopher Haster 8332:5fce745004b6 1545 },
Christopher Haster 8332:5fce745004b6 1546 "NRF51822_Y5_MBUG": {
Christopher Haster 8332:5fce745004b6 1547 "inherits": ["MCU_NRF51_16K"]
Christopher Haster 8332:5fce745004b6 1548 },
Christopher Haster 8332:5fce745004b6 1549 "WALLBOT_BLE": {
Christopher Haster 8332:5fce745004b6 1550 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1551 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1552 },
Christopher Haster 8332:5fce745004b6 1553 "WALLBOT_BLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1554 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1555 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1556 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1557 },
Christopher Haster 8332:5fce745004b6 1558 "WALLBOT_BLE_OTA": {
Christopher Haster 8332:5fce745004b6 1559 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1560 "extra_labels_add": ["WALLBOT_BLE"],
Christopher Haster 8332:5fce745004b6 1561 "macros_add": ["TARGET_WALLBOT_BLE"]
Christopher Haster 8332:5fce745004b6 1562 },
Christopher Haster 8332:5fce745004b6 1563 "DELTA_DFCM_NNN40": {
Christopher Haster 8332:5fce745004b6 1564 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1565 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1566 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1567 "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 1568 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1569 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1570 },
Christopher Haster 8332:5fce745004b6 1571 "DELTA_DFCM_NNN40_BOOT": {
Christopher Haster 8332:5fce745004b6 1572 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1573 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1574 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1575 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1576 },
Christopher Haster 8332:5fce745004b6 1577 "DELTA_DFCM_NNN40_OTA": {
Christopher Haster 8332:5fce745004b6 1578 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1579 "program_cycle_s": 10,
Christopher Haster 8332:5fce745004b6 1580 "extra_labels_add": ["DELTA_DFCM_NNN40"],
Christopher Haster 8332:5fce745004b6 1581 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1582 },
Christopher Haster 8332:5fce745004b6 1583 "NRF51_DK_LEGACY": {
Christopher Haster 8332:5fce745004b6 1584 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1585 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1586 "extra_labels_add": ["NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1587 },
Christopher Haster 8332:5fce745004b6 1588 "NRF51_DK_BOOT": {
Christopher Haster 8332:5fce745004b6 1589 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1590 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1591 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1592 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1593 },
Christopher Haster 8332:5fce745004b6 1594 "NRF51_DK_OTA": {
Christopher Haster 8332:5fce745004b6 1595 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1596 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1597 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1598 "macros_add": ["TARGET_NRF51_DK"]
Christopher Haster 8332:5fce745004b6 1599 },
Christopher Haster 8332:5fce745004b6 1600 "NRF51_DONGLE_LEGACY": {
Christopher Haster 8332:5fce745004b6 1601 "inherits": ["MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 1602 "extra_labels_add": ["NRF51_DONGLE"],
Sarah Marsh 8472:da9bd832dfd1 1603 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1604 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1605 },
Christopher Haster 8332:5fce745004b6 1606 "NRF51_DONGLE_BOOT": {
Christopher Haster 8332:5fce745004b6 1607 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1608 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1609 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1610 },
Christopher Haster 8332:5fce745004b6 1611 "NRF51_DONGLE_OTA": {
Christopher Haster 8332:5fce745004b6 1612 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1613 "extra_labels_add": ["NRF51_DONGLE"],
Christopher Haster 8332:5fce745004b6 1614 "macros_add": ["TARGET_NRF51_DONGLE"]
Christopher Haster 8332:5fce745004b6 1615 },
Christopher Haster 8332:5fce745004b6 1616 "NRF51_MICROBIT": {
Christopher Haster 8332:5fce745004b6 1617 "inherits": ["MCU_NRF51_16K_S110"],
Christopher Haster 8332:5fce745004b6 1618 "macros_add": ["TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1619 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1620 },
Christopher Haster 8332:5fce745004b6 1621 "NRF51_MICROBIT_BOOT": {
Christopher Haster 8332:5fce745004b6 1622 "inherits": ["MCU_NRF51_16K_BOOT_S110"],
Christopher Haster 8332:5fce745004b6 1623 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1624 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1625 },
Christopher Haster 8332:5fce745004b6 1626 "NRF51_MICROBIT_OTA": {
Christopher Haster 8332:5fce745004b6 1627 "inherits": ["MCU_NRF51_16K_OTA_S110"],
Christopher Haster 8332:5fce745004b6 1628 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1629 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1630 },
Christopher Haster 8332:5fce745004b6 1631 "NRF51_MICROBIT_B": {
Christopher Haster 8332:5fce745004b6 1632 "inherits": ["MCU_NRF51_16K"],
Christopher Haster 8332:5fce745004b6 1633 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1634 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"],
Christopher Haster 8332:5fce745004b6 1635 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1636 },
Christopher Haster 8332:5fce745004b6 1637 "NRF51_MICROBIT_B_BOOT": {
Christopher Haster 8332:5fce745004b6 1638 "inherits": ["MCU_NRF51_16K_BOOT"],
Christopher Haster 8332:5fce745004b6 1639 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1640 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1641 },
Christopher Haster 8332:5fce745004b6 1642 "NRF51_MICROBIT_B_OTA": {
Christopher Haster 8332:5fce745004b6 1643 "inherits": ["MCU_NRF51_16K_OTA"],
Christopher Haster 8332:5fce745004b6 1644 "extra_labels_add": ["NRF51_MICROBIT"],
Christopher Haster 8332:5fce745004b6 1645 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
Christopher Haster 8332:5fce745004b6 1646 },
Christopher Haster 8332:5fce745004b6 1647 "MTM_MTCONNECT04S": {
Christopher Haster 8332:5fce745004b6 1648 "inherits": ["MCU_NRF51_32K"],
Sarah Marsh 8472:da9bd832dfd1 1649 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1650 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1651 },
Christopher Haster 8332:5fce745004b6 1652 "MTM_MTCONNECT04S_BOOT": {
Christopher Haster 8332:5fce745004b6 1653 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1654 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1655 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1656 },
Christopher Haster 8332:5fce745004b6 1657 "MTM_MTCONNECT04S_OTA": {
Christopher Haster 8332:5fce745004b6 1658 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1659 "extra_labels_add": ["MTM_CONNECT04S"],
Christopher Haster 8332:5fce745004b6 1660 "macros_add": ["TARGET_MTM_CONNECT04S"]
Christopher Haster 8332:5fce745004b6 1661 },
Christopher Haster 8332:5fce745004b6 1662 "TY51822R3": {
Christopher Haster 8332:5fce745004b6 1663 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 1664 "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
Christopher Haster 8332:5fce745004b6 1665 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 1666 "detect_code": ["1019"],
Christopher Haster 8332:5fce745004b6 1667 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1668 "overrides": {"uart_hwfc": 0},
Sarah Marsh 8472:da9bd832dfd1 1669 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 1670 },
Christopher Haster 8332:5fce745004b6 1671 "TY51822R3_BOOT": {
Christopher Haster 8332:5fce745004b6 1672 "inherits": ["MCU_NRF51_32K_BOOT"],
Christopher Haster 8332:5fce745004b6 1673 "extra_labels_add": ["TY51822R3"],
Christopher Haster 8332:5fce745004b6 1674 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1675 },
Christopher Haster 8332:5fce745004b6 1676 "TY51822R3_OTA": {
Christopher Haster 8332:5fce745004b6 1677 "inherits": ["MCU_NRF51_32K_OTA"],
Christopher Haster 8332:5fce745004b6 1678 "extra_labels_add": ["NRF51_DK"],
Christopher Haster 8332:5fce745004b6 1679 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
Christopher Haster 8332:5fce745004b6 1680 },
Christopher Haster 8332:5fce745004b6 1681 "ARM_MPS2_Target": {
Christopher Haster 8332:5fce745004b6 1682 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1683 "public": false,
Christopher Haster 8332:5fce745004b6 1684 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1685 },
Christopher Haster 8332:5fce745004b6 1686 "ARM_MPS2_M0": {
Christopher Haster 8332:5fce745004b6 1687 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1688 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1689 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1690 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
Christopher Haster 8332:5fce745004b6 1691 "macros": ["CMSDK_CM0"],
Christopher Haster 8332:5fce745004b6 1692 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1693 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1694 },
Christopher Haster 8332:5fce745004b6 1695 "ARM_MPS2_M0P": {
Christopher Haster 8332:5fce745004b6 1696 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1697 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1698 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1699 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0P"],
Christopher Haster 8332:5fce745004b6 1700 "macros": ["CMSDK_CM0plus"],
Christopher Haster 8332:5fce745004b6 1701 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1702 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1703 },
Christopher Haster 8332:5fce745004b6 1704 "ARM_MPS2_M1": {
Christopher Haster 8332:5fce745004b6 1705 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1706 "core": "Cortex-M1",
Christopher Haster 8332:5fce745004b6 1707 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1708 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M1"],
Christopher Haster 8332:5fce745004b6 1709 "macros": ["CMSDK_CM1"],
Christopher Haster 8332:5fce745004b6 1710 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1711 },
Christopher Haster 8332:5fce745004b6 1712 "ARM_MPS2_M3": {
Christopher Haster 8332:5fce745004b6 1713 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1714 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1715 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1716 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M3"],
Christopher Haster 8332:5fce745004b6 1717 "macros": ["CMSDK_CM3"],
Christopher Haster 8332:5fce745004b6 1718 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1719 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1720 },
Christopher Haster 8332:5fce745004b6 1721 "ARM_MPS2_M4": {
Christopher Haster 8332:5fce745004b6 1722 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1723 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1724 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1725 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
Christopher Haster 8332:5fce745004b6 1726 "macros": ["CMSDK_CM4"],
Christopher Haster 8332:5fce745004b6 1727 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1728 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1729 },
Christopher Haster 8332:5fce745004b6 1730 "ARM_MPS2_M7": {
Christopher Haster 8332:5fce745004b6 1731 "inherits": ["ARM_MPS2_Target"],
Christopher Haster 8332:5fce745004b6 1732 "core": "Cortex-M7",
Christopher Haster 8332:5fce745004b6 1733 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1734 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M7"],
Christopher Haster 8332:5fce745004b6 1735 "macros": ["CMSDK_CM7"],
Christopher Haster 8332:5fce745004b6 1736 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1737 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1738 },
Christopher Haster 8332:5fce745004b6 1739 "ARM_IOTSS_Target": {
Christopher Haster 8332:5fce745004b6 1740 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1741 "public": false,
Christopher Haster 8332:5fce745004b6 1742 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
Christopher Haster 8332:5fce745004b6 1743 },
Christopher Haster 8332:5fce745004b6 1744 "ARM_IOTSS_BEID": {
Christopher Haster 8332:5fce745004b6 1745 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1746 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1747 "supported_toolchains": ["ARM"],
Christopher Haster 8332:5fce745004b6 1748 "extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
Christopher Haster 8332:5fce745004b6 1749 "macros": ["CMSDK_BEID"],
Christopher Haster 8332:5fce745004b6 1750 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
Christopher Haster 8332:5fce745004b6 1751 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1752 },
Christopher Haster 8332:5fce745004b6 1753 "ARM_BEETLE_SOC": {
Christopher Haster 8332:5fce745004b6 1754 "inherits": ["ARM_IOTSS_Target"],
Christopher Haster 8332:5fce745004b6 1755 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1756 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1757 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1758 "extra_labels": ["ARM_SSG", "BEETLE"],
Christopher Haster 8332:5fce745004b6 1759 "macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
Christopher Haster 8332:5fce745004b6 1760 "device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
Christopher Haster 8332:5fce745004b6 1761 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 1762 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1763 "device_name": "beetle"
Christopher Haster 8332:5fce745004b6 1764 },
Christopher Haster 8332:5fce745004b6 1765 "RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1766 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1767 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1768 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1769 "extra_labels": ["RENESAS", "MBRZA1H"],
Christopher Haster 8332:5fce745004b6 1770 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1771 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1772 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1773 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 1774 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1775 "device_name": "r7s721001"
Christopher Haster 8332:5fce745004b6 1776 },
Christopher Haster 8332:5fce745004b6 1777 "VK_RZ_A1H": {
Christopher Haster 8332:5fce745004b6 1778 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1779 "core": "Cortex-A9",
Christopher Haster 8332:5fce745004b6 1780 "extra_labels": ["RENESAS", "VKRZA1H"],
Christopher Haster 8332:5fce745004b6 1781 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1782 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1783 "program_cycle_s": 2,
Christopher Haster 8332:5fce745004b6 1784 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8342:520d28b41ea4 1785 "features": ["LWIP"],
Christopher Haster 8332:5fce745004b6 1786 "default_lib": "std",
Christopher Haster 8332:5fce745004b6 1787 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1788 },
Christopher Haster 8332:5fce745004b6 1789 "MAXWSNENV": {
Christopher Haster 8332:5fce745004b6 1790 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1791 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1792 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1793 "extra_labels": ["Maxim", "MAX32610"],
Christopher Haster 8332:5fce745004b6 1794 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1795 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1796 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1797 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1798 },
Christopher Haster 8332:5fce745004b6 1799 "MAX32600MBED": {
Christopher Haster 8332:5fce745004b6 1800 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1801 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1802 "macros": ["__SYSTEM_HFX=24000000"],
Christopher Haster 8332:5fce745004b6 1803 "extra_labels": ["Maxim", "MAX32600"],
Christopher Haster 8332:5fce745004b6 1804 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1805 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
Sarah Marsh 8472:da9bd832dfd1 1806 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1807 "device_name": "max326000x85"
Christopher Haster 8332:5fce745004b6 1808 },
Christopher Haster 8332:5fce745004b6 1809 "MAX32620HSP": {
Christopher Haster 8332:5fce745004b6 1810 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1811 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1812 "extra_labels": ["Maxim", "MAX32620"],
Christopher Haster 8332:5fce745004b6 1813 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
Christopher Haster 8332:5fce745004b6 1814 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
Jeremy Brodt 8604:47a33ac5baba 1815 "features": ["BLE"],
Christopher Haster 8332:5fce745004b6 1816 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 1817 },
Christopher Haster 8332:5fce745004b6 1818 "EFM32GG_STK3700": {
Christopher Haster 8332:5fce745004b6 1819 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1820 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1821 "macros": ["EFM32GG990F1024"],
Christopher Haster 8332:5fce745004b6 1822 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1823 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1824 "progen": {"target": "efm32gg-stk"},
Christopher Haster 8332:5fce745004b6 1825 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1826 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1827 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1828 "device_name": "EFM32GG990F1024"
Christopher Haster 8332:5fce745004b6 1829 },
Christopher Haster 8332:5fce745004b6 1830 "EFM32LG_STK3600": {
Christopher Haster 8332:5fce745004b6 1831 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1832 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 1833 "macros": ["EFM32LG990F256"],
Christopher Haster 8332:5fce745004b6 1834 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1835 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1836 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1837 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1838 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1839 "device_name": "EFM32LG990F256"
Christopher Haster 8332:5fce745004b6 1840 },
Christopher Haster 8332:5fce745004b6 1841 "EFM32WG_STK3800": {
Christopher Haster 8332:5fce745004b6 1842 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1843 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1844 "macros": ["EFM32WG990F256"],
Christopher Haster 8332:5fce745004b6 1845 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1846 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1847 "progen": {"target": "efm32wg-stk"},
Christopher Haster 8332:5fce745004b6 1848 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1849 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1850 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1851 "device_name": "EFM32WG990F256"
Christopher Haster 8332:5fce745004b6 1852 },
Christopher Haster 8332:5fce745004b6 1853 "EFM32ZG_STK3200": {
Christopher Haster 8332:5fce745004b6 1854 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1855 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1856 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1857 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1858 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1859 "macros": ["EFM32ZG222F32"],
Christopher Haster 8332:5fce745004b6 1860 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1861 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 1862 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1863 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1864 "device_name": "EFM32ZG222F32"
Christopher Haster 8332:5fce745004b6 1865 },
Christopher Haster 8332:5fce745004b6 1866 "EFM32HG_STK3400": {
Christopher Haster 8332:5fce745004b6 1867 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1868 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1869 "default_toolchain": "uARM",
Christopher Haster 8332:5fce745004b6 1870 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1871 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1872 "macros": ["EFM32HG322F64"],
Christopher Haster 8332:5fce745004b6 1873 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1874 "default_lib": "small",
Christopher Haster 8332:5fce745004b6 1875 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1876 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1877 "device_name": "EFM32HG322F64"
Christopher Haster 8332:5fce745004b6 1878 },
Christopher Haster 8332:5fce745004b6 1879 "EFM32PG_STK3401": {
Christopher Haster 8332:5fce745004b6 1880 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1881 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 1882 "macros": ["EFM32PG1B200F256GM48"],
Christopher Haster 8332:5fce745004b6 1883 "extra_labels": ["Silicon_Labs", "EFM32"],
Christopher Haster 8332:5fce745004b6 1884 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1885 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1886 "forced_reset_timeout": 2,
Sarah Marsh 8472:da9bd832dfd1 1887 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 1888 "device_name": "EFM32PG1B100F256GM32"
Christopher Haster 8332:5fce745004b6 1889 },
Christopher Haster 8332:5fce745004b6 1890 "WIZWIKI_W7500": {
Christopher Haster 8332:5fce745004b6 1891 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1892 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1893 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
Christopher Haster 8332:5fce745004b6 1894 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 1895 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1896 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1897 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1898 },
Christopher Haster 8332:5fce745004b6 1899 "WIZWIKI_W7500P": {
Christopher Haster 8332:5fce745004b6 1900 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 1901 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1902 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
Christopher Haster 8332:5fce745004b6 1903 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 1904 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1905 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1906 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1907 },
Christopher Haster 8332:5fce745004b6 1908 "WIZWIKI_W7500ECO": {
Christopher Haster 8332:5fce745004b6 1909 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1910 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1911 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
Christopher Haster 8332:5fce745004b6 1912 "supported_toolchains": ["uARM", "ARM"],
Christopher Haster 8332:5fce745004b6 1913 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
Christopher Haster 8332:5fce745004b6 1914 "release_versions": ["2"]
Christopher Haster 8332:5fce745004b6 1915 },
Christopher Haster 8332:5fce745004b6 1916 "SAMR21G18A": {
Christopher Haster 8332:5fce745004b6 1917 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1918 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1919 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1920 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
Christopher Haster 8332:5fce745004b6 1921 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1922 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1923 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1924 "device_name": "ATSAMR21G18A"
Christopher Haster 8332:5fce745004b6 1925 },
Christopher Haster 8332:5fce745004b6 1926 "SAMD21J18A": {
Christopher Haster 8332:5fce745004b6 1927 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1928 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1929 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1930 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 1931 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1932 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1933 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1934 "device_name" : "ATSAMD21J18A"
Christopher Haster 8332:5fce745004b6 1935 },
Christopher Haster 8332:5fce745004b6 1936 "SAMD21G18A": {
Christopher Haster 8332:5fce745004b6 1937 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1938 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1939 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1940 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
Christopher Haster 8332:5fce745004b6 1941 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1942 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1943 "release_versions": ["2"],
Sarah Marsh 8472:da9bd832dfd1 1944 "device_name": "ATSAMD21G18A"
Christopher Haster 8332:5fce745004b6 1945 },
Christopher Haster 8332:5fce745004b6 1946 "SAML21J18A": {
Christopher Haster 8332:5fce745004b6 1947 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1948 "core": "Cortex-M0+",
Christopher Haster 8332:5fce745004b6 1949 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1950 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
Christopher Haster 8332:5fce745004b6 1951 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Sarah Marsh 8472:da9bd832dfd1 1952 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1953 "device_name": "ATSAML21J18A"
Christopher Haster 8332:5fce745004b6 1954 },
Christopher Haster 8332:5fce745004b6 1955 "SAMG55J19": {
Christopher Haster 8332:5fce745004b6 1956 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1957 "core": "Cortex-M4",
Christopher Haster 8332:5fce745004b6 1958 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
Christopher Haster 8332:5fce745004b6 1959 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
Christopher Haster 8332:5fce745004b6 1960 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
Christopher Haster 8332:5fce745004b6 1961 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 1962 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
Sarah Marsh 8472:da9bd832dfd1 1963 "default_lib": "std",
Sarah Marsh 8472:da9bd832dfd1 1964 "device_name": "ATSAMG55J19"
Christopher Haster 8332:5fce745004b6 1965 },
Christopher Haster 8332:5fce745004b6 1966 "MCU_NRF51_UNIFIED": {
Christopher Haster 8332:5fce745004b6 1967 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 1968 "core": "Cortex-M0",
Christopher Haster 8332:5fce745004b6 1969 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
Christopher Haster 8332:5fce745004b6 1970 "macros": [
Christopher Haster 8332:5fce745004b6 1971 "NRF51",
Christopher Haster 8332:5fce745004b6 1972 "TARGET_NRF51822",
Christopher Haster 8332:5fce745004b6 1973 "BLE_STACK_SUPPORT_REQD",
Christopher Haster 8332:5fce745004b6 1974 "SOFTDEVICE_PRESENT",
Christopher Haster 8332:5fce745004b6 1975 "S130",
Christopher Haster 8332:5fce745004b6 1976 "TARGET_MCU_NRF51822"
Christopher Haster 8332:5fce745004b6 1977 ],
Christopher Haster 8332:5fce745004b6 1978 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 1979 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
Christopher Haster 8332:5fce745004b6 1980 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 1981 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 1982 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 1983 "public": false,
Christopher Haster 8332:5fce745004b6 1984 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 1985 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 1986 {
Christopher Haster 8332:5fce745004b6 1987 "boot": "",
Christopher Haster 8332:5fce745004b6 1988 "name": "s130_nrf51_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 1989 "offset": 110592
Christopher Haster 8332:5fce745004b6 1990 }
Christopher Haster 8332:5fce745004b6 1991 ],
Christopher Haster 8332:5fce745004b6 1992 "detect_code": ["1070"],
Christopher Haster 8332:5fce745004b6 1993 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 1994 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 1995 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 1996 },
Christopher Haster 8332:5fce745004b6 1997 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 1998 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 1999 "config": {
Christopher Haster 8332:5fce745004b6 2000 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 2001 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 2002 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 2003 },
Christopher Haster 8332:5fce745004b6 2004 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 2005 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 2006 "value": 1,
Christopher Haster 8332:5fce745004b6 2007 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 2008 }
Christopher Haster 8332:5fce745004b6 2009 },
Christopher Haster 8332:5fce745004b6 2010 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 2011 },
Christopher Haster 8332:5fce745004b6 2012 "MCU_NRF51_32K_UNIFIED": {
Christopher Haster 8332:5fce745004b6 2013 "inherits": ["MCU_NRF51_UNIFIED"],
Christopher Haster 8332:5fce745004b6 2014 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 2015 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
Christopher Haster 8332:5fce745004b6 2016 "public": false
Christopher Haster 8332:5fce745004b6 2017 },
Christopher Haster 8332:5fce745004b6 2018 "NRF51_DK": {
Christopher Haster 8332:5fce745004b6 2019 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2020 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Andrzej Puzdrowski 8742:ea949d3ba022 2021 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8472:da9bd832dfd1 2022 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 2023 "device_name": "nRF51822_xxAA"
Christopher Haster 8332:5fce745004b6 2024 },
Christopher Haster 8332:5fce745004b6 2025 "NRF51_DONGLE": {
Christopher Haster 8332:5fce745004b6 2026 "inherits": ["MCU_NRF51_32K_UNIFIED"],
Christopher Haster 8332:5fce745004b6 2027 "progen": {"target": "nrf51-dongle"},
Mahadevan Mahesh 8366:70aeab6c7eb7 2028 "device_has": ["ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Christopher Haster 8332:5fce745004b6 2029 "release_versions": ["2", "5"]
Christopher Haster 8332:5fce745004b6 2030 },
Christopher Haster 8332:5fce745004b6 2031 "MCU_NRF52": {
Christopher Haster 8332:5fce745004b6 2032 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2033 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 2034 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
Christopher Haster 8332:5fce745004b6 2035 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
Christopher Haster 8332:5fce745004b6 2036 "OUTPUT_EXT": "hex",
Christopher Haster 8332:5fce745004b6 2037 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2038 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2039 "public": false,
Christopher Haster 8332:5fce745004b6 2040 "detect_code": ["1101"],
Christopher Haster 8332:5fce745004b6 2041 "program_cycle_s": 6,
Christopher Haster 8332:5fce745004b6 2042 "MERGE_SOFT_DEVICE": true,
Christopher Haster 8332:5fce745004b6 2043 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
Christopher Haster 8332:5fce745004b6 2044 {
Christopher Haster 8332:5fce745004b6 2045 "boot": "",
Christopher Haster 8332:5fce745004b6 2046 "name": "s132_nrf52_2.0.0_softdevice.hex",
Christopher Haster 8332:5fce745004b6 2047 "offset": 114688
Christopher Haster 8332:5fce745004b6 2048 }
Christopher Haster 8332:5fce745004b6 2049 ],
Christopher Haster 8332:5fce745004b6 2050 "post_binary_hook": {
Christopher Haster 8332:5fce745004b6 2051 "function": "MCU_NRF51Code.binary_hook",
Christopher Haster 8332:5fce745004b6 2052 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
Christopher Haster 8332:5fce745004b6 2053 },
Christopher Haster 8332:5fce745004b6 2054 "MERGE_BOOTLOADER": false,
Christopher Haster 8332:5fce745004b6 2055 "features": ["BLE"],
Sarah Marsh 8472:da9bd832dfd1 2056 "config": {
Christopher Haster 8332:5fce745004b6 2057 "lf_clock_src": {
Christopher Haster 8332:5fce745004b6 2058 "value": "NRF_LF_SRC_XTAL",
Christopher Haster 8332:5fce745004b6 2059 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
Christopher Haster 8332:5fce745004b6 2060 },
Christopher Haster 8332:5fce745004b6 2061 "uart_hwfc": {
Christopher Haster 8332:5fce745004b6 2062 "help": "Value: 1 for enable, 0 for disable",
Christopher Haster 8332:5fce745004b6 2063 "value": 1,
Christopher Haster 8332:5fce745004b6 2064 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
Christopher Haster 8332:5fce745004b6 2065 }
Christopher Haster 8332:5fce745004b6 2066 }
Christopher Haster 8332:5fce745004b6 2067 },
Christopher Haster 8332:5fce745004b6 2068 "NRF52_DK": {
Christopher Haster 8332:5fce745004b6 2069 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2070 "inherits": ["MCU_NRF52"],
Sarah Marsh 8472:da9bd832dfd1 2071 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Andrzej Puzdrowski 8742:ea949d3ba022 2072 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2073 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 2074 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2075 },
Christopher Haster 8332:5fce745004b6 2076 "DELTA_DFBM_NQ620": {
Christopher Haster 8332:5fce745004b6 2077 "supported_form_factors": ["ARDUINO"],
Christopher Haster 8332:5fce745004b6 2078 "inherits": ["MCU_NRF52"],
Christopher Haster 8332:5fce745004b6 2079 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
Christopher Haster 8332:5fce745004b6 2080 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
Sarah Marsh 8507:29edfac555c0 2081 "release_versions": ["2", "5"],
Sarah Marsh 8507:29edfac555c0 2082 "device_name": "nRF52832_xxAA"
Christopher Haster 8332:5fce745004b6 2083 },
Christopher Haster 8332:5fce745004b6 2084 "BLUEPILL_F103C8": {
Christopher Haster 8332:5fce745004b6 2085 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2086 "default_toolchain": "GCC_ARM",
Christopher Haster 8332:5fce745004b6 2087 "extra_labels": ["STM", "STM32F1", "STM32F103C8"],
Christopher Haster 8332:5fce745004b6 2088 "supported_toolchains": ["GCC_ARM"],
Christopher Haster 8332:5fce745004b6 2089 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2090 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
Christopher Haster 8332:5fce745004b6 2091 },
Christopher Haster 8332:5fce745004b6 2092 "NUMAKER_PFM_NUC472": {
Christopher Haster 8332:5fce745004b6 2093 "core": "Cortex-M4F",
Christopher Haster 8332:5fce745004b6 2094 "default_toolchain": "ARM",
Christopher Haster 8332:5fce745004b6 2095 "extra_labels": ["NUVOTON", "NUC472", "NUMAKER_PFM_NUC472"],
Christopher Haster 8332:5fce745004b6 2096 "is_disk_virtual": true,
Christopher Haster 8332:5fce745004b6 2097 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
Christopher Haster 8332:5fce745004b6 2098 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2099 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG"],
Christopher Haster 8342:520d28b41ea4 2100 "features": ["LWIP"],
Sarah Marsh 8472:da9bd832dfd1 2101 "release_versions": ["2", "5"],
Sarah Marsh 8472:da9bd832dfd1 2102 "device_name": "NUC472HI8AE"
Mahadevan Mahesh 8366:70aeab6c7eb7 2103 },
Christopher Haster 8332:5fce745004b6 2104 "NCS36510": {
Christopher Haster 8332:5fce745004b6 2105 "inherits": ["Target"],
Christopher Haster 8332:5fce745004b6 2106 "core": "Cortex-M3",
Christopher Haster 8332:5fce745004b6 2107 "extra_labels": ["ONSEMI"],
Christopher Haster 8332:5fce745004b6 2108 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
maclobdell 8733:742bc6b628fa 2109 "macros": ["REVD", "CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
Christopher Haster 8332:5fce745004b6 2110 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
Laurent MEUNIER 8647:8b0d2777b841 2111 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER"],
maclobdell 8732:4166825f6c3c 2112 "device_name": "NCS36510",
Christopher Haster 8332:5fce745004b6 2113 "release_versions": ["2", "5"]
ccli8 8611:5441db5ff596 2114 },
ccli8 8611:5441db5ff596 2115 "NUMAKER_PFM_M453": {
ccli8 8611:5441db5ff596 2116 "core": "Cortex-M4F",
ccli8 8611:5441db5ff596 2117 "default_toolchain": "ARM",
ccli8 8611:5441db5ff596 2118 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453"],
ccli8 8611:5441db5ff596 2119 "is_disk_virtual": true,
ccli8 8611:5441db5ff596 2120 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
ccli8 8611:5441db5ff596 2121 "inherits": ["Target"],
ccli8 8611:5441db5ff596 2122 "progen": {"target": "numaker-pfm-m453"},
ccli8 8611:5441db5ff596 2123 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
ccli8 8644:79863cfcbbb0 2124 "release_versions": ["2", "5"],
ccli8 8644:79863cfcbbb0 2125 "device_name": "M453VG6AE"
ccli8 8611:5441db5ff596 2126 }
Christopher Haster 8332:5fce745004b6 2127 }