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_hw_dma Struct Reference
All DMA module registers. More...
#include <MK64F12_dma.h>
Detailed Description
All DMA module registers.
Definition at line 5298 of file MK64F12_dma.h.
Field Documentation
__O hw_dma_cdne_t CDNE |
[0x1C] Clear DONE Status Bit Register
Definition at line 5310 of file MK64F12_dma.h.
__O hw_dma_ceei_t CEEI |
[0x18] Clear Enable Error Interrupt Register
Definition at line 5306 of file MK64F12_dma.h.
__O hw_dma_cerq_t CERQ |
[0x1A] Clear Enable Request Register
Definition at line 5308 of file MK64F12_dma.h.
__O hw_dma_cerr_t CERR |
[0x1E] Clear Error Register
Definition at line 5312 of file MK64F12_dma.h.
__O hw_dma_cint_t CINT |
[0x1F] Clear Interrupt Request Register
Definition at line 5313 of file MK64F12_dma.h.
__IO hw_dma_cr_t CR |
[0x0] Control Register
Definition at line 5300 of file MK64F12_dma.h.
__IO hw_dma_dchprin_t DCHPRIn[16] |
[0x100] Channel n Priority Register
Definition at line 5321 of file MK64F12_dma.h.
__IO hw_dma_eei_t EEI |
[0x14] Enable Error Interrupt Register
Definition at line 5305 of file MK64F12_dma.h.
__IO hw_dma_erq_t ERQ |
[0xC] Enable Request Register
Definition at line 5303 of file MK64F12_dma.h.
__IO hw_dma_err_t ERR |
[0x2C] Error Register
Definition at line 5317 of file MK64F12_dma.h.
__I hw_dma_es_t ES |
[0x4] Error Status Register
Definition at line 5301 of file MK64F12_dma.h.
__I hw_dma_hrs_t HRS |
[0x34] Hardware Request Status Register
Definition at line 5319 of file MK64F12_dma.h.
__IO hw_dma_int_t INT |
[0x24] Interrupt Request Register
Definition at line 5315 of file MK64F12_dma.h.
__O hw_dma_seei_t SEEI |
[0x19] Set Enable Error Interrupt Register
Definition at line 5307 of file MK64F12_dma.h.
__O hw_dma_serq_t SERQ |
[0x1B] Set Enable Request Register
Definition at line 5309 of file MK64F12_dma.h.
__O hw_dma_ssrt_t SSRT |
[0x1D] Set START Bit Register
Definition at line 5311 of file MK64F12_dma.h.
[0x1006] TCD Transfer Attributes
Definition at line 5326 of file MK64F12_dma.h.
[0x101E] TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)
Definition at line 5342 of file MK64F12_dma.h.
[0x101E] TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)
Definition at line 5343 of file MK64F12_dma.h.
[0x1016] TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)
Definition at line 5336 of file MK64F12_dma.h.
[0x1016] TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)
Definition at line 5337 of file MK64F12_dma.h.
[0x101C] TCD Control and Status
Definition at line 5340 of file MK64F12_dma.h.
[0x1010] TCD Destination Address
Definition at line 5333 of file MK64F12_dma.h.
[0x1018] TCD Last Destination Address Adjustment/Scatter Gather Address
Definition at line 5339 of file MK64F12_dma.h.
[0x1014] TCD Signed Destination Address Offset
Definition at line 5334 of file MK64F12_dma.h.
[0x1008] TCD Minor Byte Count (Minor Loop Disabled)
Definition at line 5328 of file MK64F12_dma.h.
[0x1008] TCD Signed Minor Loop Offset (Minor Loop Enabled and Offset Disabled)
Definition at line 5329 of file MK64F12_dma.h.
[0x1008] TCD Signed Minor Loop Offset (Minor Loop and Offset Enabled)
Definition at line 5330 of file MK64F12_dma.h.
[0x1000] TCD Source Address
Definition at line 5324 of file MK64F12_dma.h.
[0x100C] TCD Last Source Address Adjustment
Definition at line 5332 of file MK64F12_dma.h.
[0x1004] TCD Signed Source Address Offset
Definition at line 5325 of file MK64F12_dma.h.
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