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_hw_dma_erq Union Reference
HW_DMA_ERQ - Enable Request Register (RW) More...
#include <MK64F12_dma.h>
Detailed Description
HW_DMA_ERQ - Enable Request Register (RW)
Reset value: 0x00000000U
The ERQ register provides a bit map for the 16 implemented channels to enable the request signal for each channel. The state of any given channel enable is directly affected by writes to this register; it is also affected by writes to the SERQ and CERQ. The {S,C}ERQ registers are provided so the request enable for a single channel can easily be modified without needing to perform a read-modify-write sequence to the ERQ. DMA request input signals and this enable request flag must be asserted before a channel's hardware service request is accepted. The state of the DMA enable request flag does not affect a channel service request made explicitly through software or a linked channel request.
Definition at line 689 of file MK64F12_dma.h.
Generated on Sat Aug 27 2022 17:09:02 by
1.7.2