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_hw_dma_cerq Union Reference
HW_DMA_CERQ - Clear Enable Request Register (WO) More...
#include <MK64F12_dma.h>
Detailed Description
HW_DMA_CERQ - Clear Enable Request Register (WO)
Reset value: 0x00U
The CERQ provides a simple memory-mapped mechanism to clear a given bit in the ERQ to disable the DMA request for a given channel. The data value on a register write causes the corresponding bit in the ERQ to be cleared. Setting the CAER bit provides a global clear function, forcing the entire contents of the ERQ to be cleared, disabling all DMA request inputs. If NOP is set, the command is ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this register return all zeroes.
Definition at line 1744 of file MK64F12_dma.h.
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