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_hw_dma_cerr Union Reference
HW_DMA_CERR - Clear Error Register (WO) More...
#include <MK64F12_dma.h>
Detailed Description
HW_DMA_CERR - Clear Error Register (WO)
Reset value: 0x00U
The CERR provides a simple memory-mapped mechanism to clear a given bit in the ERR to disable the error condition flag for a given channel. The given value on a register write causes the corresponding bit in the ERR to be cleared. Setting the CAEI bit provides a global clear function, forcing the ERR contents to be cleared, clearing all channel error indicators. If the NOP bit is set, the command is ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this register return all zeroes.
Definition at line 2139 of file MK64F12_dma.h.
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