Controlor for Humanoid. Walking trajectory generator, sensor reflection etc.
Dependencies: Adafruit-PWM-Servo-Driver MPU6050 RS300 mbed
Source3.cpp@5:0ca9f1bc1fb0, 2012-09-18 (annotated)
- Committer:
- syundo0730
- Date:
- Tue Sep 18 06:48:47 2012 +0000
- Revision:
- 5:0ca9f1bc1fb0
- Parent:
- 3:84e5335fab91
- Child:
- 7:7c0621d33781
multithread
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
syundo0730 | 0:d114194bff43 | 1 | #ifndef PWM_H_2012_08_28_ |
syundo0730 | 0:d114194bff43 | 2 | #define PWM_H_2012_08_28_ |
syundo0730 | 0:d114194bff43 | 3 | |
syundo0730 | 0:d114194bff43 | 4 | #include "LPC17xx.h" |
syundo0730 | 0:d114194bff43 | 5 | #include "mbed.h" |
syundo0730 | 5:0ca9f1bc1fb0 | 6 | //#include "PowerControl.h" |
syundo0730 | 0:d114194bff43 | 7 | |
syundo0730 | 5:0ca9f1bc1fb0 | 8 | const uint32_t SRV_PERIOD = 2500 - 1;// |
syundo0730 | 5:0ca9f1bc1fb0 | 9 | const uint32_t SRV_MAX_DUTY = 2100 - 1;// |
syundo0730 | 5:0ca9f1bc1fb0 | 10 | const uint32_t SRV_MIN_DUTY = 900 - 1;// |
syundo0730 | 2:8a40834788ba | 11 | |
syundo0730 | 5:0ca9f1bc1fb0 | 12 | const uint8_t SRV_IDX_SHIFT = 3;// |
syundo0730 | 5:0ca9f1bc1fb0 | 13 | const uint8_t SRV_IDX_NUM = 1 << SRV_IDX_SHIFT;// |
syundo0730 | 5:0ca9f1bc1fb0 | 14 | const uint8_t SRV_IDX_MASK = SRV_IDX_NUM - 1;// |
syundo0730 | 5:0ca9f1bc1fb0 | 15 | const uint8_t SRV_BANK_NUM = 3;// |
syundo0730 | 5:0ca9f1bc1fb0 | 16 | const uint8_t SRV_CH_NUM = SRV_IDX_NUM * SRV_BANK_NUM;// |
syundo0730 | 0:d114194bff43 | 17 | |
syundo0730 | 5:0ca9f1bc1fb0 | 18 | volatile uint8_t SRV_Idx = 0;// |
syundo0730 | 5:0ca9f1bc1fb0 | 19 | volatile uint32_t SRV_dutyTable[SRV_BANK_NUM][SRV_IDX_NUM];// |
syundo0730 | 0:d114194bff43 | 20 | |
syundo0730 | 2:8a40834788ba | 21 | const uint32_t SRV_PWMTable[SRV_BANK_NUM][SRV_IDX_NUM]={ |
syundo0730 | 3:84e5335fab91 | 22 | {0,SRV_PERIOD,0,SRV_PERIOD,0,SRV_PERIOD,0,SRV_PERIOD}, |
syundo0730 | 3:84e5335fab91 | 23 | {0,0,SRV_PERIOD,SRV_PERIOD,0,0,SRV_PERIOD,SRV_PERIOD}, |
syundo0730 | 3:84e5335fab91 | 24 | {0,0,0,0,SRV_PERIOD,SRV_PERIOD,SRV_PERIOD,SRV_PERIOD} |
syundo0730 | 1:5c2e40445778 | 25 | }; |
syundo0730 | 1:5c2e40445778 | 26 | |
syundo0730 | 0:d114194bff43 | 27 | void Init_PWM(void); |
syundo0730 | 2:8a40834788ba | 28 | void SetDuty(uint8_t ch, uint32_t duty); |
syundo0730 | 5:0ca9f1bc1fb0 | 29 | void main_th(void); |
syundo0730 | 0:d114194bff43 | 30 | |
syundo0730 | 0:d114194bff43 | 31 | #endif //PWM_H_2012_08_28_ |
syundo0730 | 0:d114194bff43 | 32 | |
syundo0730 | 0:d114194bff43 | 33 | #ifdef __cplusplus |
syundo0730 | 0:d114194bff43 | 34 | extern "C" { |
syundo0730 | 0:d114194bff43 | 35 | void PWM1_IRQHandler(); |
syundo0730 | 0:d114194bff43 | 36 | } |
syundo0730 | 0:d114194bff43 | 37 | #endif |
syundo0730 | 0:d114194bff43 | 38 | |
syundo0730 | 5:0ca9f1bc1fb0 | 39 | Ticker flip; |
syundo0730 | 5:0ca9f1bc1fb0 | 40 | |
syundo0730 | 0:d114194bff43 | 41 | int main(void) { |
syundo0730 | 0:d114194bff43 | 42 | |
syundo0730 | 0:d114194bff43 | 43 | for(int i = 0; i < SRV_CH_NUM; i++) |
syundo0730 | 0:d114194bff43 | 44 | { |
syundo0730 | 0:d114194bff43 | 45 | SetDuty(i, (SRV_MAX_DUTY + SRV_MIN_DUTY) / 2); |
syundo0730 | 0:d114194bff43 | 46 | } |
syundo0730 | 0:d114194bff43 | 47 | |
syundo0730 | 1:5c2e40445778 | 48 | Init_PWM(); |
syundo0730 | 5:0ca9f1bc1fb0 | 49 | flip.attach(&main_th,5.0); |
syundo0730 | 1:5c2e40445778 | 50 | |
syundo0730 | 5:0ca9f1bc1fb0 | 51 | while (1) { |
syundo0730 | 5:0ca9f1bc1fb0 | 52 | //SetDuty(1,SRV_MAX_DUTY); |
syundo0730 | 5:0ca9f1bc1fb0 | 53 | //sleep(); |
syundo0730 | 5:0ca9f1bc1fb0 | 54 | } |
syundo0730 | 5:0ca9f1bc1fb0 | 55 | } |
syundo0730 | 5:0ca9f1bc1fb0 | 56 | |
syundo0730 | 5:0ca9f1bc1fb0 | 57 | void main_th(void) { |
syundo0730 | 5:0ca9f1bc1fb0 | 58 | SetDuty(1,0); |
syundo0730 | 0:d114194bff43 | 59 | } |
syundo0730 | 0:d114194bff43 | 60 | |
syundo0730 | 0:d114194bff43 | 61 | void PWM1_IRQHandler (void) { |
syundo0730 | 1:5c2e40445778 | 62 | |
syundo0730 | 3:84e5335fab91 | 63 | LPC_PWM1->MR1 = SRV_PWMTable[0][SRV_Idx]; |
syundo0730 | 1:5c2e40445778 | 64 | LPC_PWM1->MR2 = SRV_PWMTable[1][SRV_Idx]; |
syundo0730 | 1:5c2e40445778 | 65 | LPC_PWM1->MR3 = SRV_PWMTable[2][SRV_Idx]; |
syundo0730 | 0:d114194bff43 | 66 | LPC_PWM1->MR4 = SRV_dutyTable[0][SRV_Idx]; |
syundo0730 | 0:d114194bff43 | 67 | LPC_PWM1->MR5 = SRV_dutyTable[1][SRV_Idx]; |
syundo0730 | 0:d114194bff43 | 68 | LPC_PWM1->MR6 = SRV_dutyTable[2][SRV_Idx]; |
syundo0730 | 1:5c2e40445778 | 69 | |
syundo0730 | 3:84e5335fab91 | 70 | LPC_PWM1->LER |= 0x7E; |
syundo0730 | 3:84e5335fab91 | 71 | |
syundo0730 | 0:d114194bff43 | 72 | LPC_PWM1->IR |= (1<<0); // reset PWMMR0 flag |
syundo0730 | 0:d114194bff43 | 73 | |
syundo0730 | 0:d114194bff43 | 74 | SRV_Idx++; |
syundo0730 | 0:d114194bff43 | 75 | |
syundo0730 | 0:d114194bff43 | 76 | if(SRV_Idx >= SRV_IDX_NUM){ |
syundo0730 | 0:d114194bff43 | 77 | SRV_Idx = 0; |
syundo0730 | 0:d114194bff43 | 78 | } |
syundo0730 | 0:d114194bff43 | 79 | } |
syundo0730 | 0:d114194bff43 | 80 | |
syundo0730 | 0:d114194bff43 | 81 | void Init_PWM(void) { |
syundo0730 | 0:d114194bff43 | 82 | LPC_PINCON->PINSEL3 &= ~(3 << 4); // GPIO (00) |
syundo0730 | 0:d114194bff43 | 83 | LPC_GPIO1->FIODIR |= (1 << 18); // output |
syundo0730 | 0:d114194bff43 | 84 | |
syundo0730 | 0:d114194bff43 | 85 | LPC_PINCON->PINSEL4 |= 0x555; // GPIO (00) |
syundo0730 | 0:d114194bff43 | 86 | LPC_GPIO2->FIODIR |= 0x3F; // output |
syundo0730 | 0:d114194bff43 | 87 | |
syundo0730 | 0:d114194bff43 | 88 | LPC_SC->PCLKSEL0 &= ~(3 << 12); // PCLK_TIMER0 ck/4 (00) |
syundo0730 | 0:d114194bff43 | 89 | LPC_SC->PCONP |= (1 << 6); // PCPWM1 |
syundo0730 | 5:0ca9f1bc1fb0 | 90 | |
syundo0730 | 5:0ca9f1bc1fb0 | 91 | LPC_PWM1->IR |= (1<<0);//reset PWMMR0 flag |
syundo0730 | 0:d114194bff43 | 92 | LPC_PWM1->TCR = (1 << 1);//reset |
syundo0730 | 0:d114194bff43 | 93 | LPC_PWM1->PR = SystemCoreClock / 4 / 1000000 - 1; // prescale 1000kHz(1us����)�����񂲂ƂɃ^�C�}�J�E���^��J�E���g�A�b�v���邩�Ƃ����ݒ� |
syundo0730 | 0:d114194bff43 | 94 | LPC_PWM1->CTCR = 0; |
syundo0730 | 0:d114194bff43 | 95 | LPC_PWM1->MCR |= (1 << 1)|(1 << 0); // MR0R, MR0 |
syundo0730 | 0:d114194bff43 | 96 | |
syundo0730 | 0:d114194bff43 | 97 | LPC_PWM1->MR0 = SRV_PERIOD; // PWM(74HC238��G1)���2500us |
syundo0730 | 1:5c2e40445778 | 98 | //LPC_PWM1->MR1 = SRV_MAX_DUTY;//SRV_PERIOD; // �؂�ւ����(74HC238��A)1 |
syundo0730 | 1:5c2e40445778 | 99 | //LPC_PWM1->MR2 = SRV_MAX_DUTY;//SRV_PERIOD; // �؂�ւ����(74HC238��B) |
syundo0730 | 1:5c2e40445778 | 100 | //LPC_PWM1->MR3 = SRV_MAX_DUTY;//SRV_PERIOD; // �؂�ւ����(74HC238��C) |
syundo0730 | 1:5c2e40445778 | 101 | //LPC_PWM1->MR4 = SRV_MAX_DUTY;//(SRV_MAX_DUTY + SRV_MIN_DUTY) / 2; //PWM(74HC238��G1)�f���[�e�B�[(�j���[�g����) |
syundo0730 | 1:5c2e40445778 | 102 | //LPC_PWM1->MR5 = SRV_MAX_DUTY;//(SRV_MAX_DUTY + SRV_MIN_DUTY) / 2; |
syundo0730 | 1:5c2e40445778 | 103 | //LPC_PWM1->MR6 = SRV_MAX_DUTY;//(SRV_MAX_DUTY + SRV_MIN_DUTY) / 2; |
syundo0730 | 0:d114194bff43 | 104 | |
syundo0730 | 0:d114194bff43 | 105 | LPC_PWM1->TCR = (1 << 0)|(1 << 3); // enable |
syundo0730 | 0:d114194bff43 | 106 | LPC_PWM1->PCR |= (0x3F << 9);//1-6 pwm |
syundo0730 | 5:0ca9f1bc1fb0 | 107 | LPC_PWM1->LER |= 0x7E; |
syundo0730 | 0:d114194bff43 | 108 | |
syundo0730 | 5:0ca9f1bc1fb0 | 109 | //__enable_irq(); |
syundo0730 | 5:0ca9f1bc1fb0 | 110 | //__disable_irq(); |
syundo0730 | 5:0ca9f1bc1fb0 | 111 | //NVIC_DisableIRQ(PWM1_IRQn); |
syundo0730 | 5:0ca9f1bc1fb0 | 112 | |
syundo0730 | 5:0ca9f1bc1fb0 | 113 | NVIC_SetPriority(PWM1_IRQn,0);//priority level (high)0~255(low) |
syundo0730 | 5:0ca9f1bc1fb0 | 114 | NVIC_EnableIRQ(PWM1_IRQn);//enable |
syundo0730 | 0:d114194bff43 | 115 | } |
syundo0730 | 0:d114194bff43 | 116 | |
syundo0730 | 2:8a40834788ba | 117 | void SetDuty(uint8_t ch, uint32_t duty){ |
syundo0730 | 0:d114194bff43 | 118 | if(ch >= SRV_CH_NUM){ |
syundo0730 | 0:d114194bff43 | 119 | return; |
syundo0730 | 0:d114194bff43 | 120 | }else if(duty < SRV_MIN_DUTY){ |
syundo0730 | 0:d114194bff43 | 121 | duty = SRV_MIN_DUTY; |
syundo0730 | 0:d114194bff43 | 122 | }else if(duty > SRV_MAX_DUTY){ |
syundo0730 | 0:d114194bff43 | 123 | duty = SRV_MAX_DUTY; |
syundo0730 | 0:d114194bff43 | 124 | } |
syundo0730 | 0:d114194bff43 | 125 | SRV_dutyTable[ch >> SRV_IDX_SHIFT][ch & SRV_IDX_MASK] = duty; |
syundo0730 | 0:d114194bff43 | 126 | } |