Controlor for Humanoid. Walking trajectory generator, sensor reflection etc.
Dependencies: Adafruit-PWM-Servo-Driver MPU6050 RS300 mbed
Source3.cpp@2:8a40834788ba, 2012-08-30 (annotated)
- Committer:
- syundo0730
- Date:
- Thu Aug 30 02:00:58 2012 +0000
- Revision:
- 2:8a40834788ba
- Parent:
- 1:5c2e40445778
- Child:
- 3:84e5335fab91
2.1(not move)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
syundo0730 | 0:d114194bff43 | 1 | #ifndef PWM_H_2012_08_28_ |
syundo0730 | 0:d114194bff43 | 2 | #define PWM_H_2012_08_28_ |
syundo0730 | 0:d114194bff43 | 3 | |
syundo0730 | 0:d114194bff43 | 4 | #include "LPC17xx.h" |
syundo0730 | 0:d114194bff43 | 5 | #include "mbed.h" |
syundo0730 | 0:d114194bff43 | 6 | |
syundo0730 | 2:8a40834788ba | 7 | const uint32_t SRV_PERIOD = 2500 - 1;//���/8 |
syundo0730 | 2:8a40834788ba | 8 | const uint32_t SRV_MAX_DUTY = 2100 - 1;//�f���[�e�B�[�ő�l |
syundo0730 | 2:8a40834788ba | 9 | const uint32_t SRV_MIN_DUTY = 900 - 1;//�f���[�e�B�[�ŏ��l |
syundo0730 | 2:8a40834788ba | 10 | |
syundo0730 | 2:8a40834788ba | 11 | const uint8_t SRV_IDX_SHIFT = 3;//74HC238�C���f�b�N�X�̓�͒[�q��(A,B,C) |
syundo0730 | 2:8a40834788ba | 12 | const uint8_t SRV_IDX_NUM = 1 << SRV_IDX_SHIFT;//�C���f�b�N�X�̐�(8) |
syundo0730 | 2:8a40834788ba | 13 | const uint8_t SRV_IDX_MASK = SRV_IDX_NUM - 1;//�w��ch�̉�3bit����}�X�N���邽�߂̂�� |
syundo0730 | 2:8a40834788ba | 14 | const uint8_t SRV_BANK_NUM = 3;//PWM���̖{�� |
syundo0730 | 2:8a40834788ba | 15 | const uint8_t SRV_CH_NUM = SRV_IDX_NUM * SRV_BANK_NUM;//����”\�ȃT�[�{���[�^�� |
syundo0730 | 0:d114194bff43 | 16 | |
syundo0730 | 2:8a40834788ba | 17 | volatile uint8_t SRV_Idx = 0;//�T�[�{�؂�ւ��p�̃J�E���^ |
syundo0730 | 2:8a40834788ba | 18 | volatile uint32_t SRV_dutyTable[SRV_BANK_NUM][SRV_IDX_NUM];//�f���[�e�B�[�l |
syundo0730 | 0:d114194bff43 | 19 | |
syundo0730 | 2:8a40834788ba | 20 | //const uint32_t SRV_PWMTable[SRV_BANK_NUM][SRV_IDX_NUM]={ |
syundo0730 | 2:8a40834788ba | 21 | //{0,SRV_PERIOD,0,SRV_PERIOD,0,SRV_PERIOD,0,SRV_PERIOD}, |
syundo0730 | 2:8a40834788ba | 22 | //{0,0,SRV_PERIOD,SRV_PERIOD,0,0,SRV_PERIOD,SRV_PERIOD}, |
syundo0730 | 2:8a40834788ba | 23 | //{0,0,0,0,SRV_PERIOD,SRV_PERIOD,SRV_PERIOD,SRV_PERIOD} |
syundo0730 | 2:8a40834788ba | 24 | //}; |
syundo0730 | 0:d114194bff43 | 25 | |
syundo0730 | 2:8a40834788ba | 26 | const uint32_t SRV_PWMTable[SRV_BANK_NUM][SRV_IDX_NUM]={ |
syundo0730 | 2:8a40834788ba | 27 | {0,2500,0,2500,0,2500,0,2500}, |
syundo0730 | 2:8a40834788ba | 28 | {0,0,2500,2500,0,0,2500,2500}, |
syundo0730 | 2:8a40834788ba | 29 | {0,0,0,0,2500,2500,2500,2500} |
syundo0730 | 1:5c2e40445778 | 30 | }; |
syundo0730 | 1:5c2e40445778 | 31 | |
syundo0730 | 1:5c2e40445778 | 32 | |
syundo0730 | 0:d114194bff43 | 33 | void Init_PWM(void); |
syundo0730 | 2:8a40834788ba | 34 | void SetDuty(uint8_t ch, uint32_t duty); |
syundo0730 | 0:d114194bff43 | 35 | |
syundo0730 | 0:d114194bff43 | 36 | #endif //PWM_H_2012_08_28_ |
syundo0730 | 0:d114194bff43 | 37 | |
syundo0730 | 0:d114194bff43 | 38 | #ifdef __cplusplus |
syundo0730 | 0:d114194bff43 | 39 | extern "C" { |
syundo0730 | 0:d114194bff43 | 40 | void PWM1_IRQHandler(); |
syundo0730 | 0:d114194bff43 | 41 | } |
syundo0730 | 0:d114194bff43 | 42 | #endif |
syundo0730 | 0:d114194bff43 | 43 | |
syundo0730 | 0:d114194bff43 | 44 | int main(void) { |
syundo0730 | 0:d114194bff43 | 45 | |
syundo0730 | 0:d114194bff43 | 46 | for(int i = 0; i < SRV_CH_NUM; i++) |
syundo0730 | 0:d114194bff43 | 47 | { |
syundo0730 | 0:d114194bff43 | 48 | SetDuty(i, (SRV_MAX_DUTY + SRV_MIN_DUTY) / 2); |
syundo0730 | 0:d114194bff43 | 49 | } |
syundo0730 | 0:d114194bff43 | 50 | |
syundo0730 | 1:5c2e40445778 | 51 | Init_PWM(); |
syundo0730 | 1:5c2e40445778 | 52 | |
syundo0730 | 0:d114194bff43 | 53 | while (1); |
syundo0730 | 0:d114194bff43 | 54 | } |
syundo0730 | 0:d114194bff43 | 55 | |
syundo0730 | 0:d114194bff43 | 56 | void PWM1_IRQHandler (void) { |
syundo0730 | 2:8a40834788ba | 57 | LPC_PWM1->LER |= 0x7E; |
syundo0730 | 1:5c2e40445778 | 58 | |
syundo0730 | 2:8a40834788ba | 59 | LPC_PWM1->MR1 = 500;//SRV_PWMTable[0][SRV_Idx]; |
syundo0730 | 1:5c2e40445778 | 60 | LPC_PWM1->MR2 = SRV_PWMTable[1][SRV_Idx]; |
syundo0730 | 1:5c2e40445778 | 61 | LPC_PWM1->MR3 = SRV_PWMTable[2][SRV_Idx]; |
syundo0730 | 0:d114194bff43 | 62 | LPC_PWM1->MR4 = SRV_dutyTable[0][SRV_Idx]; |
syundo0730 | 0:d114194bff43 | 63 | LPC_PWM1->MR5 = SRV_dutyTable[1][SRV_Idx]; |
syundo0730 | 0:d114194bff43 | 64 | LPC_PWM1->MR6 = SRV_dutyTable[2][SRV_Idx]; |
syundo0730 | 1:5c2e40445778 | 65 | |
syundo0730 | 0:d114194bff43 | 66 | LPC_PWM1->IR |= (1<<0); // reset PWMMR0 flag |
syundo0730 | 0:d114194bff43 | 67 | |
syundo0730 | 0:d114194bff43 | 68 | SRV_Idx++; |
syundo0730 | 0:d114194bff43 | 69 | |
syundo0730 | 0:d114194bff43 | 70 | if(SRV_Idx >= SRV_IDX_NUM){ |
syundo0730 | 0:d114194bff43 | 71 | SRV_Idx = 0; |
syundo0730 | 0:d114194bff43 | 72 | } |
syundo0730 | 0:d114194bff43 | 73 | } |
syundo0730 | 0:d114194bff43 | 74 | |
syundo0730 | 0:d114194bff43 | 75 | void Init_PWM(void) { |
syundo0730 | 0:d114194bff43 | 76 | LPC_PINCON->PINSEL3 &= ~(3 << 4); // GPIO (00) |
syundo0730 | 0:d114194bff43 | 77 | LPC_GPIO1->FIODIR |= (1 << 18); // output |
syundo0730 | 0:d114194bff43 | 78 | |
syundo0730 | 0:d114194bff43 | 79 | LPC_PINCON->PINSEL4 |= 0x555; // GPIO (00) |
syundo0730 | 0:d114194bff43 | 80 | LPC_GPIO2->FIODIR |= 0x3F; // output |
syundo0730 | 0:d114194bff43 | 81 | |
syundo0730 | 0:d114194bff43 | 82 | LPC_SC->PCLKSEL0 &= ~(3 << 12); // PCLK_TIMER0 ck/4 (00) |
syundo0730 | 0:d114194bff43 | 83 | LPC_SC->PCONP |= (1 << 6); // PCPWM1 |
syundo0730 | 0:d114194bff43 | 84 | LPC_PWM1->TCR = (1 << 1);//reset |
syundo0730 | 0:d114194bff43 | 85 | LPC_PWM1->PR = SystemCoreClock / 4 / 1000000 - 1; // prescale 1000kHz(1us����)�����񂲂ƂɃ^�C�}�J�E���^��J�E���g�A�b�v���邩�Ƃ����ݒ� |
syundo0730 | 0:d114194bff43 | 86 | LPC_PWM1->CTCR = 0; |
syundo0730 | 0:d114194bff43 | 87 | LPC_PWM1->MCR |= (1 << 1)|(1 << 0); // MR0R, MR0 |
syundo0730 | 0:d114194bff43 | 88 | |
syundo0730 | 0:d114194bff43 | 89 | LPC_PWM1->MR0 = SRV_PERIOD; // PWM(74HC238��G1)���2500us |
syundo0730 | 1:5c2e40445778 | 90 | //LPC_PWM1->MR1 = SRV_MAX_DUTY;//SRV_PERIOD; // �؂�ւ����(74HC238��A)1 |
syundo0730 | 1:5c2e40445778 | 91 | //LPC_PWM1->MR2 = SRV_MAX_DUTY;//SRV_PERIOD; // �؂�ւ����(74HC238��B) |
syundo0730 | 1:5c2e40445778 | 92 | //LPC_PWM1->MR3 = SRV_MAX_DUTY;//SRV_PERIOD; // �؂�ւ����(74HC238��C) |
syundo0730 | 1:5c2e40445778 | 93 | //LPC_PWM1->MR4 = SRV_MAX_DUTY;//(SRV_MAX_DUTY + SRV_MIN_DUTY) / 2; //PWM(74HC238��G1)�f���[�e�B�[(�j���[�g����) |
syundo0730 | 1:5c2e40445778 | 94 | //LPC_PWM1->MR5 = SRV_MAX_DUTY;//(SRV_MAX_DUTY + SRV_MIN_DUTY) / 2; |
syundo0730 | 1:5c2e40445778 | 95 | //LPC_PWM1->MR6 = SRV_MAX_DUTY;//(SRV_MAX_DUTY + SRV_MIN_DUTY) / 2; |
syundo0730 | 0:d114194bff43 | 96 | |
syundo0730 | 0:d114194bff43 | 97 | LPC_PWM1->IR |= (1<<0);//reset PWMMR0 flag |
syundo0730 | 0:d114194bff43 | 98 | |
syundo0730 | 0:d114194bff43 | 99 | NVIC_EnableIRQ(PWM1_IRQn);//enable |
syundo0730 | 0:d114194bff43 | 100 | |
syundo0730 | 0:d114194bff43 | 101 | LPC_PWM1->TCR = (1 << 0)|(1 << 3); // enable |
syundo0730 | 0:d114194bff43 | 102 | LPC_PWM1->PCR |= (0x3F << 9);//1-6 pwm |
syundo0730 | 0:d114194bff43 | 103 | |
syundo0730 | 0:d114194bff43 | 104 | __enable_irq(); |
syundo0730 | 0:d114194bff43 | 105 | } |
syundo0730 | 0:d114194bff43 | 106 | |
syundo0730 | 2:8a40834788ba | 107 | void SetDuty(uint8_t ch, uint32_t duty){ |
syundo0730 | 0:d114194bff43 | 108 | if(ch >= SRV_CH_NUM){ |
syundo0730 | 0:d114194bff43 | 109 | return; |
syundo0730 | 0:d114194bff43 | 110 | }else if(duty < SRV_MIN_DUTY){ |
syundo0730 | 0:d114194bff43 | 111 | duty = SRV_MIN_DUTY; |
syundo0730 | 0:d114194bff43 | 112 | }else if(duty > SRV_MAX_DUTY){ |
syundo0730 | 0:d114194bff43 | 113 | duty = SRV_MAX_DUTY; |
syundo0730 | 0:d114194bff43 | 114 | } |
syundo0730 | 0:d114194bff43 | 115 | SRV_dutyTable[ch >> SRV_IDX_SHIFT][ch & SRV_IDX_MASK] = duty; |
syundo0730 | 0:d114194bff43 | 116 | } |