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Fork to see if I can get working
Dependencies: BufferedSerial OneWire WinbondSPIFlash libxDot-dev-mbed5-deprecated
Fork of xDotBridge_update_test20180823 by
xDotBridge/src/main.cpp@41:9ef4c4d77711, 2017-01-30 (annotated)
- Committer:
- Matt Briggs
- Date:
- Mon Jan 30 17:25:08 2017 -0700
- Revision:
- 41:9ef4c4d77711
- Parent:
- 40:2ec4be320961
- Child:
- 44:ece6330e9b57
Fisrt cut at implementing protocol refactor
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Matt Briggs | 34:5618603e5fc3 | 1 | #include <math.h> |
Matt Briggs | 22:9453658b8d4b | 2 | #include "config.h" |
Matt Briggs | 30:2e673a672884 | 3 | #include "xdot_flash.h" |
Mike Fiore |
11:d2e31743433a | 4 | #include "dot_util.h" |
Mike Fiore |
14:19fae4509473 | 5 | #include "RadioEvent.h" |
Matt Briggs | 41:9ef4c4d77711 | 6 | //#include <OneWire.h> |
Matt Briggs | 41:9ef4c4d77711 | 7 | //#include <xdot_low_power.h> |
mfiore | 17:d4f82e16de5f | 8 | |
Matt Briggs | 41:9ef4c4d77711 | 9 | #include "CommProtocolPeerBrute.h" |
Matt Briggs | 31:9c535a708ae9 | 10 | |
Matt Briggs | 31:9c535a708ae9 | 11 | /////////////////////// |
Matt Briggs | 31:9c535a708ae9 | 12 | // I/O Configuration // |
Matt Briggs | 31:9c535a708ae9 | 13 | /////////////////////// |
Matt Briggs | 29:e05e35976cfe | 14 | DigitalOut led1(GPIO0); |
Matt Briggs | 29:e05e35976cfe | 15 | AnalogIn an1(GPIO1); |
Matt Briggs | 41:9ef4c4d77711 | 16 | //AnalogIn an2(GPIO2); |
Matt Briggs | 29:e05e35976cfe | 17 | |
Matt Briggs | 29:e05e35976cfe | 18 | // Inputs |
Matt Briggs | 37:31f8e9c5d075 | 19 | //DigitalIn gpio3(GPIO3); |
Matt Briggs | 31:9c535a708ae9 | 20 | //DigitalIn wake_DOUT(WAKE); |
Matt Briggs | 37:31f8e9c5d075 | 21 | //DigitalIn i2cOut1(I2C1_SCL); |
Matt Briggs | 37:31f8e9c5d075 | 22 | //DigitalIn i2cOut2(I2C1_SDA); |
Matt Briggs | 41:9ef4c4d77711 | 23 | //InterruptIn intTest(GPIO2); |
Matt Briggs | 33:c7bb3fbc024a | 24 | //DigitalIn uartOut1(UART1_CTS); |
Matt Briggs | 33:c7bb3fbc024a | 25 | //DigitalIn uartOut2(UART1_RTS); |
Matt Briggs | 33:c7bb3fbc024a | 26 | //DigitalIn jtag_gpio1(SWDIO); |
Matt Briggs | 33:c7bb3fbc024a | 27 | //DigitalIn jtag_gpio2(SWCLK); |
Matt Briggs | 29:e05e35976cfe | 28 | |
Matt Briggs | 29:e05e35976cfe | 29 | // Outputs |
Matt Briggs | 29:e05e35976cfe | 30 | //DigitalOut gpio3(GPIO3); |
Matt Briggs | 29:e05e35976cfe | 31 | ////DigitalOut wake_DOUT(WAKE); |
Matt Briggs | 29:e05e35976cfe | 32 | //DigitalOut i2cOut1(I2C1_SCL); |
Matt Briggs | 29:e05e35976cfe | 33 | //DigitalOut i2cOut2(I2C1_SDA); |
Matt Briggs | 29:e05e35976cfe | 34 | // |
Matt Briggs | 29:e05e35976cfe | 35 | //DigitalOut uartOut1(UART1_CTS); |
Matt Briggs | 29:e05e35976cfe | 36 | //DigitalOut uartOut2(UART1_RTS); |
Matt Briggs | 29:e05e35976cfe | 37 | |
Mike Fiore |
11:d2e31743433a | 38 | mDot* dot = NULL; |
Mike Fiore |
11:d2e31743433a | 39 | |
Mike Fiore |
11:d2e31743433a | 40 | Serial pc(USBTX, USBRX); |
Mike Fiore |
11:d2e31743433a | 41 | |
Matt Briggs | 41:9ef4c4d77711 | 42 | //unsigned int callbackCnt = 0; |
Matt Briggs | 41:9ef4c4d77711 | 43 | // |
Matt Briggs | 41:9ef4c4d77711 | 44 | //static void testCallback () { |
Matt Briggs | 41:9ef4c4d77711 | 45 | //// callbackCnt = us_ticker_read(); |
Matt Briggs | 41:9ef4c4d77711 | 46 | // callbackCnt++; |
Matt Briggs | 41:9ef4c4d77711 | 47 | //} |
Matt Briggs | 39:64f79fa6e3cc | 48 | |
Mike Fiore |
11:d2e31743433a | 49 | int main() { |
Matt Briggs | 31:9c535a708ae9 | 50 | RadioEvent events; // Custom event handler for automatically displaying RX data |
Mike Fiore |
11:d2e31743433a | 51 | |
Mike Fiore |
11:d2e31743433a | 52 | pc.baud(115200); |
Mike Fiore |
11:d2e31743433a | 53 | |
Matt Briggs | 27:6b68ff715ae1 | 54 | mts::MTSLog::setLogLevel(mts::MTSLog::TRACE_LEVEL); |
Mike Fiore |
11:d2e31743433a | 55 | |
Mike Fiore |
11:d2e31743433a | 56 | dot = mDot::getInstance(); |
Mike Fiore |
11:d2e31743433a | 57 | |
Mike Fiore |
16:a3832552dfe1 | 58 | logInfo("mbed-os library version: %d", MBED_LIBRARY_VERSION); |
Mike Fiore |
16:a3832552dfe1 | 59 | |
Mike Fiore |
12:ec9768677cea | 60 | // start from a well-known state |
Mike Fiore |
12:ec9768677cea | 61 | logInfo("defaulting Dot configuration"); |
Mike Fiore |
12:ec9768677cea | 62 | dot->resetConfig(); |
Mike Fiore |
12:ec9768677cea | 63 | |
Mike Fiore |
11:d2e31743433a | 64 | // make sure library logging is turned on |
Matt Briggs | 27:6b68ff715ae1 | 65 | dot->setLogLevel(mts::MTSLog::INFO_LEVEL); |
Mike Fiore |
11:d2e31743433a | 66 | |
Mike Fiore |
11:d2e31743433a | 67 | // attach the custom events handler |
Matt Briggs | 41:9ef4c4d77711 | 68 | // dot->setEvents(&events); |
Mike Fiore |
11:d2e31743433a | 69 | |
Matt Briggs | 31:9c535a708ae9 | 70 | // Setup programmable voltage detector |
Matt Briggs | 31:9c535a708ae9 | 71 | // PVD_LEVEL0 Falling 1.85 |
Matt Briggs | 31:9c535a708ae9 | 72 | // PVD_LEVEL1 Falling 2.04 |
Matt Briggs | 31:9c535a708ae9 | 73 | // PVD_LEVEL2 Falling 2.24 |
Matt Briggs | 31:9c535a708ae9 | 74 | // PVD_LEVEL3 Falling 2.44 |
Matt Briggs | 31:9c535a708ae9 | 75 | // PVD_LEVEL4 Falling 2.64 |
Matt Briggs | 31:9c535a708ae9 | 76 | // PVD_LEVEL5 Falling 2.84 |
Matt Briggs | 31:9c535a708ae9 | 77 | // PVD_LEVEL6 Falling 3.05 |
Matt Briggs | 31:9c535a708ae9 | 78 | PWR_PVDTypeDef pvdConfig; |
Matt Briggs | 31:9c535a708ae9 | 79 | pvdConfig.Mode = PWR_PVD_MODE_NORMAL; |
Matt Briggs | 31:9c535a708ae9 | 80 | pvdConfig.PVDLevel = PWR_PVDLEVEL_5; |
Matt Briggs | 31:9c535a708ae9 | 81 | |
Matt Briggs | 31:9c535a708ae9 | 82 | HAL_PWR_ConfigPVD(&pvdConfig); |
Matt Briggs | 31:9c535a708ae9 | 83 | HAL_PWR_EnablePVD(); |
Matt Briggs | 31:9c535a708ae9 | 84 | logInfo("Programmable Voltage Detector set for level: %d", pvdConfig.PVDLevel); |
Matt Briggs | 41:9ef4c4d77711 | 85 | // HAL_PWR_PVDCallback need to define this I think this will override the current implementation |
Matt Briggs | 31:9c535a708ae9 | 86 | |
Matt Briggs | 31:9c535a708ae9 | 87 | // TODO setup IO here |
Matt Briggs | 31:9c535a708ae9 | 88 | |
Matt Briggs | 41:9ef4c4d77711 | 89 | #if BRIDGE_TX_BRUTE |
Matt Briggs | 41:9ef4c4d77711 | 90 | CommProtocolPeerBrute protocol(true); // TX |
Matt Briggs | 41:9ef4c4d77711 | 91 | #else |
Matt Briggs | 41:9ef4c4d77711 | 92 | CommProtocolPeerBrute protocol(false); // RX |
Matt Briggs | 41:9ef4c4d77711 | 93 | #endif |
Matt Briggs | 41:9ef4c4d77711 | 94 | protocol.init(); |
Mike Fiore |
11:d2e31743433a | 95 | |
Matt Briggs | 41:9ef4c4d77711 | 96 | dot->setWakePin(WAKE); |
Matt Briggs | 24:fdf87e4b72e5 | 97 | |
Mike Fiore |
11:d2e31743433a | 98 | // save changes to configuration |
Mike Fiore |
11:d2e31743433a | 99 | logInfo("saving configuration"); |
Mike Fiore |
11:d2e31743433a | 100 | if (!dot->saveConfig()) { |
Mike Fiore |
11:d2e31743433a | 101 | logError("failed to save configuration"); |
Mike Fiore |
11:d2e31743433a | 102 | } |
Mike Fiore |
11:d2e31743433a | 103 | |
Mike Fiore |
11:d2e31743433a | 104 | // display configuration |
Mike Fiore |
11:d2e31743433a | 105 | display_config(); |
Mike Fiore |
11:d2e31743433a | 106 | |
Matt Briggs | 41:9ef4c4d77711 | 107 | uint16_t seqNum=0; |
Matt Briggs | 26:9411b26a5084 | 108 | |
Matt Briggs | 41:9ef4c4d77711 | 109 | // mbed-os Interrupt setup |
Matt Briggs | 41:9ef4c4d77711 | 110 | // intTest.mode(PullUp); |
Matt Briggs | 41:9ef4c4d77711 | 111 | // intTest.fall(&testCallback); |
Matt Briggs | 41:9ef4c4d77711 | 112 | // intTest.enable_irq(); // TODO check if this is useful |
Matt Briggs | 41:9ef4c4d77711 | 113 | |
Matt Briggs | 41:9ef4c4d77711 | 114 | // dot->setWakePin(GPIO2); // This works but disables the wake button |
Matt Briggs | 41:9ef4c4d77711 | 115 | |
Matt Briggs | 41:9ef4c4d77711 | 116 | // Using xdot hal libs |
Matt Briggs | 41:9ef4c4d77711 | 117 | //int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) |
Matt Briggs | 41:9ef4c4d77711 | 118 | // gpio_irq_init(); |
Matt Briggs | 26:9411b26a5084 | 119 | |
Matt Briggs | 41:9ef4c4d77711 | 120 | // Try the STM32 way |
Matt Briggs | 41:9ef4c4d77711 | 121 | // //EXTI structure to init EXT |
Matt Briggs | 41:9ef4c4d77711 | 122 | // EXTI_InitTypeDef EXTI_InitStructure; |
Matt Briggs | 41:9ef4c4d77711 | 123 | // //NVIC structure to set up NVIC controller |
Matt Briggs | 41:9ef4c4d77711 | 124 | // NVIC_InitTypeDef NVIC_InitStructure; |
Matt Briggs | 41:9ef4c4d77711 | 125 | // //Connect EXTI Line to Button Pin |
Matt Briggs | 41:9ef4c4d77711 | 126 | //// GPIO_EXTILineConfig(GPIO_PortSourceGPIOA, GPIO_PinSource0); |
Matt Briggs | 41:9ef4c4d77711 | 127 | // GPIO_EXTILineConfig(STM_PORT(GPIO2), STM_PIN(GPIO2)); |
Matt Briggs | 41:9ef4c4d77711 | 128 | // //Configure Button EXTI line |
Matt Briggs | 41:9ef4c4d77711 | 129 | // EXTI_InitStructure.EXTI_Line = EXTI_Line0; |
Matt Briggs | 41:9ef4c4d77711 | 130 | // //select interrupt mode |
Matt Briggs | 41:9ef4c4d77711 | 131 | // EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; |
Matt Briggs | 41:9ef4c4d77711 | 132 | // //generate interrupt on rising edge |
Matt Briggs | 41:9ef4c4d77711 | 133 | // EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; |
Matt Briggs | 41:9ef4c4d77711 | 134 | // //enable EXTI line |
Matt Briggs | 41:9ef4c4d77711 | 135 | // EXTI_InitStructure.EXTI_LineCmd = ENABLE; |
Matt Briggs | 41:9ef4c4d77711 | 136 | // //send values to registers |
Matt Briggs | 41:9ef4c4d77711 | 137 | // EXTI_Init(&EXTI_InitStructure); |
Matt Briggs | 41:9ef4c4d77711 | 138 | // //configure NVIC |
Matt Briggs | 41:9ef4c4d77711 | 139 | // //select NVIC channel to configure |
Matt Briggs | 41:9ef4c4d77711 | 140 | // NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQn; |
Matt Briggs | 41:9ef4c4d77711 | 141 | // //set priority to lowest |
Matt Briggs | 41:9ef4c4d77711 | 142 | // NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F; |
Matt Briggs | 41:9ef4c4d77711 | 143 | // //set subpriority to lowest |
Matt Briggs | 41:9ef4c4d77711 | 144 | // NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F; |
Matt Briggs | 41:9ef4c4d77711 | 145 | // //enable IRQ channel |
Matt Briggs | 41:9ef4c4d77711 | 146 | // NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; |
Matt Briggs | 41:9ef4c4d77711 | 147 | // //update NVIC registers |
Matt Briggs | 41:9ef4c4d77711 | 148 | // NVIC_Init(&NVIC_InitStructure); |
Matt Briggs | 39:64f79fa6e3cc | 149 | |
Mike Fiore |
11:d2e31743433a | 150 | while (true) { |
Matt Briggs | 25:fea776239709 | 151 | std::vector<uint8_t> data; |
Matt Briggs | 31:9c535a708ae9 | 152 | led1=0; |
Mike Fiore |
11:d2e31743433a | 153 | |
Matt Briggs | 41:9ef4c4d77711 | 154 | if (protocol.isTx()) { |
Matt Briggs | 41:9ef4c4d77711 | 155 | #if LED_FEEDBACK |
Matt Briggs | 41:9ef4c4d77711 | 156 | led1=1; |
Matt Briggs | 41:9ef4c4d77711 | 157 | #endif |
Matt Briggs | 41:9ef4c4d77711 | 158 | // TODO check for CC_IN |
Matt Briggs | 31:9c535a708ae9 | 159 | |
Matt Briggs | 41:9ef4c4d77711 | 160 | data.push_back((seqNum >> 8) & 0xFF); |
Matt Briggs | 41:9ef4c4d77711 | 161 | data.push_back(seqNum & 0xFF); |
Matt Briggs | 41:9ef4c4d77711 | 162 | protocol.send(data); |
Matt Briggs | 41:9ef4c4d77711 | 163 | seqNum++; |
Matt Briggs | 31:9c535a708ae9 | 164 | |
Matt Briggs | 31:9c535a708ae9 | 165 | #if LED_FEEDBACK |
Matt Briggs | 41:9ef4c4d77711 | 166 | led1=0; |
Matt Briggs | 31:9c535a708ae9 | 167 | #endif |
Matt Briggs | 41:9ef4c4d77711 | 168 | sleep_save_io(); |
Matt Briggs | 41:9ef4c4d77711 | 169 | sleep_configure_io(); |
Matt Briggs | 41:9ef4c4d77711 | 170 | dot->sleep(0, mDot::INTERRUPT, false); // Go to sleep until wake button |
Matt Briggs | 41:9ef4c4d77711 | 171 | sleep_restore_io(); |
Matt Briggs | 41:9ef4c4d77711 | 172 | } |
Matt Briggs | 31:9c535a708ae9 | 173 | |
Matt Briggs | 41:9ef4c4d77711 | 174 | if (protocol.isRx()) { |
Matt Briggs | 41:9ef4c4d77711 | 175 | bool msgPending; |
Matt Briggs | 41:9ef4c4d77711 | 176 | protocol.listen(msgPending); |
Matt Briggs | 41:9ef4c4d77711 | 177 | if (msgPending) { |
Matt Briggs | 41:9ef4c4d77711 | 178 | protocol.recv(data); |
Matt Briggs | 41:9ef4c4d77711 | 179 | std::string dataStr(data.begin(), data.end()); |
Matt Briggs | 41:9ef4c4d77711 | 180 | logInfo("Got msg num: %d, payload: %s", seqNum, dataStr.c_str()); |
Matt Briggs | 41:9ef4c4d77711 | 181 | // TODO add CC_OUT code here |
Matt Briggs | 41:9ef4c4d77711 | 182 | seqNum++; |
Matt Briggs | 31:9c535a708ae9 | 183 | #if LED_FEEDBACK |
Matt Briggs | 41:9ef4c4d77711 | 184 | led1 = 1; |
Matt Briggs | 41:9ef4c4d77711 | 185 | wait(0.5); |
Matt Briggs | 31:9c535a708ae9 | 186 | #endif |
Matt Briggs | 41:9ef4c4d77711 | 187 | } |
Matt Briggs | 41:9ef4c4d77711 | 188 | led1=0; |
Matt Briggs | 41:9ef4c4d77711 | 189 | logInfo("Sleeping. Time %d", us_ticker_read()); |
Matt Briggs | 41:9ef4c4d77711 | 190 | sleep_save_io(); |
Matt Briggs | 41:9ef4c4d77711 | 191 | sleep_configure_io(); |
Matt Briggs | 41:9ef4c4d77711 | 192 | // TODO maybe add if statement here to prevent double hits by sleeping for a longer time |
Matt Briggs | 41:9ef4c4d77711 | 193 | dot->sleep(2, mDot::RTC_ALARM_OR_INTERRUPT, false); // Go to sleep until wake button |
Matt Briggs | 41:9ef4c4d77711 | 194 | sleep_restore_io(); |
Matt Briggs | 41:9ef4c4d77711 | 195 | } |
Matt Briggs | 31:9c535a708ae9 | 196 | |
Matt Briggs | 29:e05e35976cfe | 197 | ////////////// |
Matt Briggs | 29:e05e35976cfe | 198 | // I/O Play // |
Matt Briggs | 29:e05e35976cfe | 199 | ////////////// |
Matt Briggs | 29:e05e35976cfe | 200 | |
Matt Briggs | 41:9ef4c4d77711 | 201 | // // Check interrupt |
Matt Briggs | 41:9ef4c4d77711 | 202 | // logInfo("Callback last called @ %d", callbackCnt); |
Matt Briggs | 38:8a512e23d99e | 203 | |
Matt Briggs | 31:9c535a708ae9 | 204 | // // Check Analog |
Matt Briggs | 31:9c535a708ae9 | 205 | // logInfo("Read AN1/GPIO1: %f", an1.read()); |
Matt Briggs | 31:9c535a708ae9 | 206 | // logInfo("Read AN2/GPIO2: %f", an2.read()); // Ranges from 0.0 to 1.0 |
Matt Briggs | 31:9c535a708ae9 | 207 | // |
Matt Briggs | 31:9c535a708ae9 | 208 | // // check inputs |
Matt Briggs | 31:9c535a708ae9 | 209 | // logInfo("Read GPIO3: %d", gpio3.read()); |
Matt Briggs | 31:9c535a708ae9 | 210 | //// logInfo("Read wake_DOUT: %d", wake_DOUT.read()); |
Matt Briggs | 31:9c535a708ae9 | 211 | // logInfo("Read i2cOut1: %d", i2cOut1.read()); // Appears to be pulled up |
Matt Briggs | 31:9c535a708ae9 | 212 | // logInfo("Read i2cOut2: %d", i2cOut2.read()); // Appears to be pulled up |
Matt Briggs | 31:9c535a708ae9 | 213 | // logInfo("Read uartOut1: %d", uartOut1.read()); |
Matt Briggs | 31:9c535a708ae9 | 214 | // logInfo("Read uartOut2: %d", uartOut2.read()); |
Matt Briggs | 31:9c535a708ae9 | 215 | // |
Matt Briggs | 31:9c535a708ae9 | 216 | // logInfo("Read jtag_gpio1: %d", jtag_gpio1.read()); |
Matt Briggs | 31:9c535a708ae9 | 217 | // logInfo("Read jtag_gpio2: %d", jtag_gpio2.read()); |
Matt Briggs | 31:9c535a708ae9 | 218 | // |
Matt Briggs | 31:9c535a708ae9 | 219 | // if (jtag_gpio1.read() == 0) { |
Matt Briggs | 31:9c535a708ae9 | 220 | // led1 = 1; |
Matt Briggs | 31:9c535a708ae9 | 221 | // } |
Matt Briggs | 31:9c535a708ae9 | 222 | // else { |
Matt Briggs | 31:9c535a708ae9 | 223 | // led1 = 0; |
Matt Briggs | 31:9c535a708ae9 | 224 | // } |
Matt Briggs | 29:e05e35976cfe | 225 | |
Matt Briggs | 29:e05e35976cfe | 226 | // check digital outputs |
Matt Briggs | 29:e05e35976cfe | 227 | // led1 = !led1; |
Matt Briggs | 29:e05e35976cfe | 228 | // gpio3 = !gpio3; |
Matt Briggs | 29:e05e35976cfe | 229 | //// wake_DOUT = !wake_DOUT; |
Matt Briggs | 29:e05e35976cfe | 230 | // i2cOut1 = !i2cOut1; |
Matt Briggs | 29:e05e35976cfe | 231 | // i2cOut2 = !i2cOut2; |
Matt Briggs | 29:e05e35976cfe | 232 | // |
Matt Briggs | 29:e05e35976cfe | 233 | // uartOut1 = !uartOut1; |
Matt Briggs | 29:e05e35976cfe | 234 | // uartOut2 = !uartOut2; |
Matt Briggs | 29:e05e35976cfe | 235 | |
Matt Briggs | 41:9ef4c4d77711 | 236 | // logInfo("================================"); |
Matt Briggs | 41:9ef4c4d77711 | 237 | // wait(1.0); |
Matt Briggs | 41:9ef4c4d77711 | 238 | // sleep_save_io(); |
Matt Briggs | 41:9ef4c4d77711 | 239 | // sleep_configure_io(); |
Matt Briggs | 41:9ef4c4d77711 | 240 | // __GPIOA_CLK_ENABLE(); |
Matt Briggs | 41:9ef4c4d77711 | 241 | // __GPIOB_CLK_ENABLE(); |
Matt Briggs | 41:9ef4c4d77711 | 242 | // __GPIOC_CLK_ENABLE(); |
Matt Briggs | 41:9ef4c4d77711 | 243 | // __GPIOH_CLK_ENABLE(); |
Matt Briggs | 41:9ef4c4d77711 | 244 | |
Matt Briggs | 41:9ef4c4d77711 | 245 | // xdot_enter_stop_mode(); |
Matt Briggs | 41:9ef4c4d77711 | 246 | // dot->sleep(2, mDot::INTERRUPT, false); // Go to sleep until wake button |
Matt Briggs | 34:5618603e5fc3 | 247 | ////////////////// |
Matt Briggs | 34:5618603e5fc3 | 248 | // OneWire Play // |
Matt Briggs | 34:5618603e5fc3 | 249 | ////////////////// |
Matt Briggs | 34:5618603e5fc3 | 250 | |
Matt Briggs | 38:8a512e23d99e | 251 | // logInfo("Starting OneWire Play"); |
Matt Briggs | 38:8a512e23d99e | 252 | // OneWire owMaster(I2C_SDA); |
Matt Briggs | 38:8a512e23d99e | 253 | // uint8_t addr[8]; |
Matt Briggs | 38:8a512e23d99e | 254 | // uint8_t result; |
Matt Briggs | 38:8a512e23d99e | 255 | // |
Matt Briggs | 38:8a512e23d99e | 256 | // // Search Bus |
Matt Briggs | 38:8a512e23d99e | 257 | // logInfo("Starting OneWire Search"); |
Matt Briggs | 38:8a512e23d99e | 258 | // do { |
Matt Briggs | 38:8a512e23d99e | 259 | // result = owMaster.search(addr); |
Matt Briggs | 38:8a512e23d99e | 260 | // logInfo("ROM Addr: %02x:%02x:%02x:%02x:%02x:%02x:%02x%02x\n", |
Matt Briggs | 38:8a512e23d99e | 261 | // addr[7],addr[6],addr[5],addr[4],addr[3],addr[2],addr[1],addr[0]); |
Matt Briggs | 38:8a512e23d99e | 262 | // } while (result == 1); |
Matt Briggs | 38:8a512e23d99e | 263 | // logInfo("Finished OneWire Search"); |
Matt Briggs | 38:8a512e23d99e | 264 | // wait(1.0); |
Matt Briggs | 38:8a512e23d99e | 265 | // |
Matt Briggs | 38:8a512e23d99e | 266 | // uint8_t pioStateAddr[] = {0x88, 0x00}; |
Matt Briggs | 38:8a512e23d99e | 267 | // uint8_t pioLatchAddr[] = {0x89, 0x00}; |
Matt Briggs | 38:8a512e23d99e | 268 | // uint8_t printAddr = 0x88; |
Matt Briggs | 38:8a512e23d99e | 269 | // while (true) { |
Matt Briggs | 38:8a512e23d99e | 270 | // owMaster.reset(); |
Matt Briggs | 38:8a512e23d99e | 271 | // owMaster.select(addr); |
Matt Briggs | 38:8a512e23d99e | 272 | // owMaster.write(0xF0); // Read Register Command |
Matt Briggs | 38:8a512e23d99e | 273 | // owMaster.write_bytes(pioStateAddr, 2); // Write 2 byte addr |
Matt Briggs | 38:8a512e23d99e | 274 | // printAddr = 0x88; |
Matt Briggs | 38:8a512e23d99e | 275 | // for (int i=0;i<8;i++) { |
Matt Briggs | 38:8a512e23d99e | 276 | // result = owMaster.read(); |
Matt Briggs | 38:8a512e23d99e | 277 | // logInfo("%02x Reg Value: %02x\n", printAddr++, result); |
Matt Briggs | 38:8a512e23d99e | 278 | // } |
Matt Briggs | 38:8a512e23d99e | 279 | // |
Matt Briggs | 38:8a512e23d99e | 280 | // owMaster.reset(); |
Matt Briggs | 38:8a512e23d99e | 281 | // owMaster.select(addr); |
Matt Briggs | 38:8a512e23d99e | 282 | // owMaster.write(0xF0); // Read Register Command |
Matt Briggs | 38:8a512e23d99e | 283 | // owMaster.write_bytes(pioLatchAddr, 2); // Write 2 byte addr |
Matt Briggs | 38:8a512e23d99e | 284 | // result = owMaster.read(); |
Matt Briggs | 38:8a512e23d99e | 285 | // logInfo("Latch Reg Value: %02x\n", result); |
Matt Briggs | 38:8a512e23d99e | 286 | // // TODO try reading inverted 16-bit CRC |
Matt Briggs | 38:8a512e23d99e | 287 | // |
Matt Briggs | 38:8a512e23d99e | 288 | // wait(1.0); |
Matt Briggs | 38:8a512e23d99e | 289 | // // Try write |
Matt Briggs | 38:8a512e23d99e | 290 | // owMaster.reset(); |
Matt Briggs | 38:8a512e23d99e | 291 | // owMaster.select(addr); |
Matt Briggs | 38:8a512e23d99e | 292 | // owMaster.write(0x5A); // Channel Access Write Command |
Matt Briggs | 38:8a512e23d99e | 293 | // uint8_t val = ~0xAA; |
Matt Briggs | 38:8a512e23d99e | 294 | // owMaster.write(val); // Pull-down all even bits |
Matt Briggs | 38:8a512e23d99e | 295 | // owMaster.write(~val); // Pull-down all even bits |
Matt Briggs | 38:8a512e23d99e | 296 | // result = owMaster.read(); |
Matt Briggs | 38:8a512e23d99e | 297 | // logInfo("Confirm after write value: %02x, expected %02x\n", result, 0xAA); |
Matt Briggs | 38:8a512e23d99e | 298 | // |
Matt Briggs | 38:8a512e23d99e | 299 | // // Check if the read back is just a latch reg thing or a true logic state |
Matt Briggs | 38:8a512e23d99e | 300 | // wait(1.0); |
Matt Briggs | 40:2ec4be320961 | 301 | // } |
Mike Fiore |
11:d2e31743433a | 302 | } |
Mike Fiore |
11:d2e31743433a | 303 | |
Mike Fiore |
11:d2e31743433a | 304 | return 0; |
Mike Fiore |
11:d2e31743433a | 305 | } |
Mike Fiore |
11:d2e31743433a | 306 | |
Matt Briggs | 27:6b68ff715ae1 | 307 |