Matt Briggs / Mbed OS xDotBridge_update_dev_latest

Fork to see if I can get working

Dependencies:   BufferedSerial OneWire WinbondSPIFlash libxDot-dev-mbed5-deprecated

Fork of xDotBridge_update_test20180823 by Matt Briggs

xDotBridge/src/main.cpp@44:ece6330e9b57, 2017-02-01 (annotated)

Committer:
Matt Briggs
Date:
Wed Feb 01 15:20:45 2017 -0700
Revision:
44:ece6330e9b57
Parent:
41:9ef4c4d77711
Child:
47:a68747642a7a
First cut at BaseboardIO class implementation.

Minior cleanup in main and CommProtocolPeerBrute

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Matt Briggs 34:5618603e5fc3 1 #include <math.h>
Matt Briggs 22:9453658b8d4b 2 #include "config.h"
Matt Briggs 30:2e673a672884 3 #include "xdot_flash.h"
Mike Fiore 11:d2e31743433a 4 #include "dot_util.h"
Mike Fiore 14:19fae4509473 5 #include "RadioEvent.h"
Matt Briggs 44:ece6330e9b57 6 #include "W25X40BV.h"
Matt Briggs 44:ece6330e9b57 7 #include "BaseboardIO.h"
Matt Briggs 41:9ef4c4d77711 8 //#include <xdot_low_power.h>
mfiore 17:d4f82e16de5f 9
Matt Briggs 41:9ef4c4d77711 10 #include "CommProtocolPeerBrute.h"
Matt Briggs 31:9c535a708ae9 11
Matt Briggs 31:9c535a708ae9 12 ///////////////////////
Matt Briggs 31:9c535a708ae9 13 // I/O Configuration //
Matt Briggs 31:9c535a708ae9 14 ///////////////////////
Matt Briggs 29:e05e35976cfe 15 DigitalOut led1(GPIO0);
Matt Briggs 44:ece6330e9b57 16 //AnalogIn an1(GPIO1);
Matt Briggs 41:9ef4c4d77711 17 //AnalogIn an2(GPIO2);
Matt Briggs 29:e05e35976cfe 18
Matt Briggs 29:e05e35976cfe 19 // Inputs
Matt Briggs 44:ece6330e9b57 20 InterruptIn intTest(GPIO1); // Works. Be careful of which pins are interrupts.
Matt Briggs 37:31f8e9c5d075 21 //DigitalIn gpio3(GPIO3);
Matt Briggs 31:9c535a708ae9 22 //DigitalIn wake_DOUT(WAKE);
Matt Briggs 37:31f8e9c5d075 23 //DigitalIn i2cOut1(I2C1_SCL);
Matt Briggs 37:31f8e9c5d075 24 //DigitalIn i2cOut2(I2C1_SDA);
Matt Briggs 33:c7bb3fbc024a 25 //DigitalIn uartOut1(UART1_CTS);
Matt Briggs 33:c7bb3fbc024a 26 //DigitalIn uartOut2(UART1_RTS);
Matt Briggs 33:c7bb3fbc024a 27 //DigitalIn jtag_gpio1(SWDIO);
Matt Briggs 33:c7bb3fbc024a 28 //DigitalIn jtag_gpio2(SWCLK);
Matt Briggs 29:e05e35976cfe 29
Matt Briggs 29:e05e35976cfe 30 // Outputs
Matt Briggs 29:e05e35976cfe 31 //DigitalOut gpio3(GPIO3);
Matt Briggs 29:e05e35976cfe 32 ////DigitalOut wake_DOUT(WAKE);
Matt Briggs 29:e05e35976cfe 33 //DigitalOut i2cOut1(I2C1_SCL);
Matt Briggs 29:e05e35976cfe 34 //DigitalOut i2cOut2(I2C1_SDA);
Matt Briggs 29:e05e35976cfe 35 //
Matt Briggs 29:e05e35976cfe 36 //DigitalOut uartOut1(UART1_CTS);
Matt Briggs 29:e05e35976cfe 37 //DigitalOut uartOut2(UART1_RTS);
Matt Briggs 29:e05e35976cfe 38
Mike Fiore 11:d2e31743433a 39 mDot* dot = NULL;
Mike Fiore 11:d2e31743433a 40
Mike Fiore 11:d2e31743433a 41 Serial pc(USBTX, USBRX);
Mike Fiore 11:d2e31743433a 42
Matt Briggs 44:ece6330e9b57 43 unsigned int callbackCnt = 0;
Matt Briggs 44:ece6330e9b57 44 static void testCallback () {
Matt Briggs 44:ece6330e9b57 45 // callbackCnt = us_ticker_read();
Matt Briggs 44:ece6330e9b57 46 callbackCnt++;
Matt Briggs 44:ece6330e9b57 47 }
Matt Briggs 39:64f79fa6e3cc 48
Mike Fiore 11:d2e31743433a 49 int main() {
Matt Briggs 44:ece6330e9b57 50 BaseboardIO bbio;
Matt Briggs 31:9c535a708ae9 51 RadioEvent events; // Custom event handler for automatically displaying RX data
Matt Briggs 44:ece6330e9b57 52 W25X40BV flash(SPI_MOSI, SPI_MISO, SPI_SCK, SPI_NSS);
Matt Briggs 44:ece6330e9b57 53 // flash.frequency(48e6); // TODO try overridding for faster freq (Default 1MHz)
Mike Fiore 11:d2e31743433a 54
Mike Fiore 11:d2e31743433a 55 pc.baud(115200);
Mike Fiore 11:d2e31743433a 56
Matt Briggs 27:6b68ff715ae1 57 mts::MTSLog::setLogLevel(mts::MTSLog::TRACE_LEVEL);
Mike Fiore 11:d2e31743433a 58
Mike Fiore 11:d2e31743433a 59 dot = mDot::getInstance();
Mike Fiore 11:d2e31743433a 60
Mike Fiore 16:a3832552dfe1 61 logInfo("mbed-os library version: %d", MBED_LIBRARY_VERSION);
Mike Fiore 16:a3832552dfe1 62
Mike Fiore 12:ec9768677cea 63 // start from a well-known state
Mike Fiore 12:ec9768677cea 64 logInfo("defaulting Dot configuration");
Mike Fiore 12:ec9768677cea 65 dot->resetConfig();
Mike Fiore 12:ec9768677cea 66
Mike Fiore 11:d2e31743433a 67 // make sure library logging is turned on
Matt Briggs 27:6b68ff715ae1 68 dot->setLogLevel(mts::MTSLog::INFO_LEVEL);
Mike Fiore 11:d2e31743433a 69
Mike Fiore 11:d2e31743433a 70 // attach the custom events handler
Matt Briggs 44:ece6330e9b57 71 dot->setEvents(&events); // Little bonus event debug information
Mike Fiore 11:d2e31743433a 72
Matt Briggs 31:9c535a708ae9 73 // Setup programmable voltage detector
Matt Briggs 31:9c535a708ae9 74 // PVD_LEVEL0 Falling 1.85
Matt Briggs 31:9c535a708ae9 75 // PVD_LEVEL1 Falling 2.04
Matt Briggs 31:9c535a708ae9 76 // PVD_LEVEL2 Falling 2.24
Matt Briggs 31:9c535a708ae9 77 // PVD_LEVEL3 Falling 2.44
Matt Briggs 31:9c535a708ae9 78 // PVD_LEVEL4 Falling 2.64
Matt Briggs 31:9c535a708ae9 79 // PVD_LEVEL5 Falling 2.84
Matt Briggs 31:9c535a708ae9 80 // PVD_LEVEL6 Falling 3.05
Matt Briggs 31:9c535a708ae9 81 PWR_PVDTypeDef pvdConfig;
Matt Briggs 31:9c535a708ae9 82 pvdConfig.Mode = PWR_PVD_MODE_NORMAL;
Matt Briggs 31:9c535a708ae9 83 pvdConfig.PVDLevel = PWR_PVDLEVEL_5;
Matt Briggs 31:9c535a708ae9 84
Matt Briggs 31:9c535a708ae9 85 HAL_PWR_ConfigPVD(&pvdConfig);
Matt Briggs 31:9c535a708ae9 86 HAL_PWR_EnablePVD();
Matt Briggs 31:9c535a708ae9 87 logInfo("Programmable Voltage Detector set for level: %d", pvdConfig.PVDLevel);
Matt Briggs 41:9ef4c4d77711 88 // HAL_PWR_PVDCallback need to define this I think this will override the current implementation
Matt Briggs 31:9c535a708ae9 89
Matt Briggs 31:9c535a708ae9 90 // TODO setup IO here
Matt Briggs 31:9c535a708ae9 91
Matt Briggs 44:ece6330e9b57 92 CommProtocolPeerBrute protocol; // TX
Matt Briggs 41:9ef4c4d77711 93 #if BRIDGE_TX_BRUTE
Matt Briggs 44:ece6330e9b57 94 protocol.setTx(true);
Matt Briggs 41:9ef4c4d77711 95 #else
Matt Briggs 44:ece6330e9b57 96 protocol.setTx(false);
Matt Briggs 41:9ef4c4d77711 97 #endif
Matt Briggs 41:9ef4c4d77711 98 protocol.init();
Mike Fiore 11:d2e31743433a 99
Matt Briggs 41:9ef4c4d77711 100 dot->setWakePin(WAKE);
Matt Briggs 24:fdf87e4b72e5 101
Mike Fiore 11:d2e31743433a 102 // save changes to configuration
Mike Fiore 11:d2e31743433a 103 logInfo("saving configuration");
Mike Fiore 11:d2e31743433a 104 if (!dot->saveConfig()) {
Mike Fiore 11:d2e31743433a 105 logError("failed to save configuration");
Mike Fiore 11:d2e31743433a 106 }
Mike Fiore 11:d2e31743433a 107
Mike Fiore 11:d2e31743433a 108 // display configuration
Mike Fiore 11:d2e31743433a 109 display_config();
Mike Fiore 11:d2e31743433a 110
Matt Briggs 41:9ef4c4d77711 111 uint16_t seqNum=0;
Matt Briggs 26:9411b26a5084 112
Matt Briggs 41:9ef4c4d77711 113 // mbed-os Interrupt setup
Matt Briggs 44:ece6330e9b57 114 intTest.mode(PullUp);
Matt Briggs 44:ece6330e9b57 115 intTest.fall(&testCallback);
Matt Briggs 44:ece6330e9b57 116 intTest.enable_irq(); // TODO check if this is useful
Matt Briggs 41:9ef4c4d77711 117
Matt Briggs 41:9ef4c4d77711 118 // dot->setWakePin(GPIO2); // This works but disables the wake button
Matt Briggs 41:9ef4c4d77711 119
Matt Briggs 41:9ef4c4d77711 120 // Using xdot hal libs
Matt Briggs 41:9ef4c4d77711 121 //int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
Matt Briggs 41:9ef4c4d77711 122 // gpio_irq_init();
Matt Briggs 26:9411b26a5084 123
Matt Briggs 41:9ef4c4d77711 124 // Try the STM32 way
Matt Briggs 41:9ef4c4d77711 125 // //EXTI structure to init EXT
Matt Briggs 41:9ef4c4d77711 126 // EXTI_InitTypeDef EXTI_InitStructure;
Matt Briggs 41:9ef4c4d77711 127 // //NVIC structure to set up NVIC controller
Matt Briggs 41:9ef4c4d77711 128 // NVIC_InitTypeDef NVIC_InitStructure;
Matt Briggs 41:9ef4c4d77711 129 // //Connect EXTI Line to Button Pin
Matt Briggs 41:9ef4c4d77711 130 //// GPIO_EXTILineConfig(GPIO_PortSourceGPIOA, GPIO_PinSource0);
Matt Briggs 41:9ef4c4d77711 131 // GPIO_EXTILineConfig(STM_PORT(GPIO2), STM_PIN(GPIO2));
Matt Briggs 41:9ef4c4d77711 132 // //Configure Button EXTI line
Matt Briggs 41:9ef4c4d77711 133 // EXTI_InitStructure.EXTI_Line = EXTI_Line0;
Matt Briggs 41:9ef4c4d77711 134 // //select interrupt mode
Matt Briggs 41:9ef4c4d77711 135 // EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
Matt Briggs 41:9ef4c4d77711 136 // //generate interrupt on rising edge
Matt Briggs 41:9ef4c4d77711 137 // EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
Matt Briggs 41:9ef4c4d77711 138 // //enable EXTI line
Matt Briggs 41:9ef4c4d77711 139 // EXTI_InitStructure.EXTI_LineCmd = ENABLE;
Matt Briggs 41:9ef4c4d77711 140 // //send values to registers
Matt Briggs 41:9ef4c4d77711 141 // EXTI_Init(&EXTI_InitStructure);
Matt Briggs 41:9ef4c4d77711 142 // //configure NVIC
Matt Briggs 41:9ef4c4d77711 143 // //select NVIC channel to configure
Matt Briggs 41:9ef4c4d77711 144 // NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQn;
Matt Briggs 41:9ef4c4d77711 145 // //set priority to lowest
Matt Briggs 41:9ef4c4d77711 146 // NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
Matt Briggs 41:9ef4c4d77711 147 // //set subpriority to lowest
Matt Briggs 41:9ef4c4d77711 148 // NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
Matt Briggs 41:9ef4c4d77711 149 // //enable IRQ channel
Matt Briggs 41:9ef4c4d77711 150 // NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
Matt Briggs 41:9ef4c4d77711 151 // //update NVIC registers
Matt Briggs 41:9ef4c4d77711 152 // NVIC_Init(&NVIC_InitStructure);
Matt Briggs 39:64f79fa6e3cc 153
Mike Fiore 11:d2e31743433a 154 while (true) {
Matt Briggs 25:fea776239709 155 std::vector<uint8_t> data;
Matt Briggs 31:9c535a708ae9 156 led1=0;
Mike Fiore 11:d2e31743433a 157
Matt Briggs 44:ece6330e9b57 158 // if (protocol.isTx()) {
Matt Briggs 44:ece6330e9b57 159 //#if LED_FEEDBACK
Matt Briggs 44:ece6330e9b57 160 // led1=1;
Matt Briggs 44:ece6330e9b57 161 //#endif
Matt Briggs 44:ece6330e9b57 162 // // TODO check for CC_IN
Matt Briggs 44:ece6330e9b57 163 //
Matt Briggs 44:ece6330e9b57 164 // data.push_back((seqNum >> 8) & 0xFF);
Matt Briggs 44:ece6330e9b57 165 // data.push_back(seqNum & 0xFF);
Matt Briggs 44:ece6330e9b57 166 // protocol.send(data);
Matt Briggs 44:ece6330e9b57 167 // seqNum++;
Matt Briggs 44:ece6330e9b57 168 //
Matt Briggs 44:ece6330e9b57 169 //#if LED_FEEDBACK
Matt Briggs 44:ece6330e9b57 170 // led1=0;
Matt Briggs 44:ece6330e9b57 171 //#endif
Matt Briggs 44:ece6330e9b57 172 // sleep_save_io();
Matt Briggs 44:ece6330e9b57 173 // sleep_configure_io();
Matt Briggs 44:ece6330e9b57 174 // dot->sleep(0, mDot::INTERRUPT, false); // Go to sleep until wake button
Matt Briggs 44:ece6330e9b57 175 // sleep_restore_io();
Matt Briggs 44:ece6330e9b57 176 // }
Matt Briggs 44:ece6330e9b57 177 //
Matt Briggs 44:ece6330e9b57 178 // if (protocol.isRx()) {
Matt Briggs 44:ece6330e9b57 179 // bool msgPending;
Matt Briggs 44:ece6330e9b57 180 // protocol.listen(msgPending);
Matt Briggs 44:ece6330e9b57 181 // if (msgPending) {
Matt Briggs 44:ece6330e9b57 182 // protocol.recv(data);
Matt Briggs 44:ece6330e9b57 183 // std::string dataStr(data.begin(), data.end());
Matt Briggs 44:ece6330e9b57 184 // logInfo("Got msg num: %d, payload: %s", seqNum, dataStr.c_str());
Matt Briggs 44:ece6330e9b57 185 // // TODO add CC_OUT code here
Matt Briggs 44:ece6330e9b57 186 // seqNum++;
Matt Briggs 44:ece6330e9b57 187 //#if LED_FEEDBACK
Matt Briggs 44:ece6330e9b57 188 // led1 = 1;
Matt Briggs 44:ece6330e9b57 189 // wait(0.5);
Matt Briggs 44:ece6330e9b57 190 //#endif
Matt Briggs 44:ece6330e9b57 191 // }
Matt Briggs 44:ece6330e9b57 192 // led1=0;
Matt Briggs 44:ece6330e9b57 193 // logInfo("Sleeping. Time %d", us_ticker_read());
Matt Briggs 44:ece6330e9b57 194 // sleep_save_io();
Matt Briggs 44:ece6330e9b57 195 // sleep_configure_io();
Matt Briggs 44:ece6330e9b57 196 // // TODO maybe add if statement here to prevent double hits by sleeping for a longer time
Matt Briggs 44:ece6330e9b57 197 // dot->sleep(2, mDot::RTC_ALARM_OR_INTERRUPT, false); // Go to sleep until wake button
Matt Briggs 44:ece6330e9b57 198 // sleep_restore_io();
Matt Briggs 44:ece6330e9b57 199 // }
Matt Briggs 31:9c535a708ae9 200
Matt Briggs 29:e05e35976cfe 201 //////////////
Matt Briggs 29:e05e35976cfe 202 // I/O Play //
Matt Briggs 29:e05e35976cfe 203 //////////////
Matt Briggs 29:e05e35976cfe 204
Matt Briggs 44:ece6330e9b57 205 // Check interrupt
Matt Briggs 44:ece6330e9b57 206 logInfo("Callback last called @ %d", callbackCnt);
Matt Briggs 38:8a512e23d99e 207
Matt Briggs 31:9c535a708ae9 208 // // Check Analog
Matt Briggs 31:9c535a708ae9 209 // logInfo("Read AN1/GPIO1: %f", an1.read());
Matt Briggs 31:9c535a708ae9 210 // logInfo("Read AN2/GPIO2: %f", an2.read()); // Ranges from 0.0 to 1.0
Matt Briggs 31:9c535a708ae9 211 //
Matt Briggs 31:9c535a708ae9 212 // // check inputs
Matt Briggs 31:9c535a708ae9 213 // logInfo("Read GPIO3: %d", gpio3.read());
Matt Briggs 31:9c535a708ae9 214 //// logInfo("Read wake_DOUT: %d", wake_DOUT.read());
Matt Briggs 31:9c535a708ae9 215 // logInfo("Read i2cOut1: %d", i2cOut1.read()); // Appears to be pulled up
Matt Briggs 31:9c535a708ae9 216 // logInfo("Read i2cOut2: %d", i2cOut2.read()); // Appears to be pulled up
Matt Briggs 31:9c535a708ae9 217 // logInfo("Read uartOut1: %d", uartOut1.read());
Matt Briggs 31:9c535a708ae9 218 // logInfo("Read uartOut2: %d", uartOut2.read());
Matt Briggs 31:9c535a708ae9 219 //
Matt Briggs 31:9c535a708ae9 220 // logInfo("Read jtag_gpio1: %d", jtag_gpio1.read());
Matt Briggs 31:9c535a708ae9 221 // logInfo("Read jtag_gpio2: %d", jtag_gpio2.read());
Matt Briggs 31:9c535a708ae9 222 //
Matt Briggs 31:9c535a708ae9 223 // if (jtag_gpio1.read() == 0) {
Matt Briggs 31:9c535a708ae9 224 // led1 = 1;
Matt Briggs 31:9c535a708ae9 225 // }
Matt Briggs 31:9c535a708ae9 226 // else {
Matt Briggs 31:9c535a708ae9 227 // led1 = 0;
Matt Briggs 31:9c535a708ae9 228 // }
Matt Briggs 29:e05e35976cfe 229
Matt Briggs 29:e05e35976cfe 230 // check digital outputs
Matt Briggs 29:e05e35976cfe 231 // led1 = !led1;
Matt Briggs 29:e05e35976cfe 232 // gpio3 = !gpio3;
Matt Briggs 29:e05e35976cfe 233 //// wake_DOUT = !wake_DOUT;
Matt Briggs 29:e05e35976cfe 234 // i2cOut1 = !i2cOut1;
Matt Briggs 29:e05e35976cfe 235 // i2cOut2 = !i2cOut2;
Matt Briggs 29:e05e35976cfe 236 //
Matt Briggs 29:e05e35976cfe 237 // uartOut1 = !uartOut1;
Matt Briggs 29:e05e35976cfe 238 // uartOut2 = !uartOut2;
Matt Briggs 29:e05e35976cfe 239
Matt Briggs 44:ece6330e9b57 240 logInfo("================================");
Matt Briggs 44:ece6330e9b57 241 wait(1.0);
Matt Briggs 41:9ef4c4d77711 242 // sleep_save_io();
Matt Briggs 41:9ef4c4d77711 243 // sleep_configure_io();
Matt Briggs 41:9ef4c4d77711 244 // __GPIOA_CLK_ENABLE();
Matt Briggs 41:9ef4c4d77711 245 // __GPIOB_CLK_ENABLE();
Matt Briggs 41:9ef4c4d77711 246 // __GPIOC_CLK_ENABLE();
Matt Briggs 41:9ef4c4d77711 247 // __GPIOH_CLK_ENABLE();
Matt Briggs 41:9ef4c4d77711 248
Matt Briggs 44:ece6330e9b57 249 dot->sleep(2, mDot::INTERRUPT, false); // Go to sleep until wake button
Matt Briggs 34:5618603e5fc3 250 //////////////////
Matt Briggs 34:5618603e5fc3 251 // OneWire Play //
Matt Briggs 34:5618603e5fc3 252 //////////////////
Matt Briggs 34:5618603e5fc3 253
Matt Briggs 38:8a512e23d99e 254 // logInfo("Starting OneWire Play");
Matt Briggs 38:8a512e23d99e 255 // OneWire owMaster(I2C_SDA);
Matt Briggs 38:8a512e23d99e 256 // uint8_t addr[8];
Matt Briggs 38:8a512e23d99e 257 // uint8_t result;
Matt Briggs 38:8a512e23d99e 258 //
Matt Briggs 38:8a512e23d99e 259 // // Search Bus
Matt Briggs 38:8a512e23d99e 260 // logInfo("Starting OneWire Search");
Matt Briggs 38:8a512e23d99e 261 // do {
Matt Briggs 38:8a512e23d99e 262 // result = owMaster.search(addr);
Matt Briggs 38:8a512e23d99e 263 // logInfo("ROM Addr: %02x:%02x:%02x:%02x:%02x:%02x:%02x%02x\n",
Matt Briggs 38:8a512e23d99e 264 // addr[7],addr[6],addr[5],addr[4],addr[3],addr[2],addr[1],addr[0]);
Matt Briggs 38:8a512e23d99e 265 // } while (result == 1);
Matt Briggs 38:8a512e23d99e 266 // logInfo("Finished OneWire Search");
Matt Briggs 38:8a512e23d99e 267 // wait(1.0);
Matt Briggs 38:8a512e23d99e 268 //
Matt Briggs 38:8a512e23d99e 269 // uint8_t pioStateAddr[] = {0x88, 0x00};
Matt Briggs 38:8a512e23d99e 270 // uint8_t pioLatchAddr[] = {0x89, 0x00};
Matt Briggs 38:8a512e23d99e 271 // uint8_t printAddr = 0x88;
Matt Briggs 38:8a512e23d99e 272 // while (true) {
Matt Briggs 38:8a512e23d99e 273 // owMaster.reset();
Matt Briggs 38:8a512e23d99e 274 // owMaster.select(addr);
Matt Briggs 38:8a512e23d99e 275 // owMaster.write(0xF0); // Read Register Command
Matt Briggs 38:8a512e23d99e 276 // owMaster.write_bytes(pioStateAddr, 2); // Write 2 byte addr
Matt Briggs 38:8a512e23d99e 277 // printAddr = 0x88;
Matt Briggs 38:8a512e23d99e 278 // for (int i=0;i<8;i++) {
Matt Briggs 38:8a512e23d99e 279 // result = owMaster.read();
Matt Briggs 38:8a512e23d99e 280 // logInfo("%02x Reg Value: %02x\n", printAddr++, result);
Matt Briggs 38:8a512e23d99e 281 // }
Matt Briggs 38:8a512e23d99e 282 //
Matt Briggs 38:8a512e23d99e 283 // owMaster.reset();
Matt Briggs 38:8a512e23d99e 284 // owMaster.select(addr);
Matt Briggs 38:8a512e23d99e 285 // owMaster.write(0xF0); // Read Register Command
Matt Briggs 38:8a512e23d99e 286 // owMaster.write_bytes(pioLatchAddr, 2); // Write 2 byte addr
Matt Briggs 38:8a512e23d99e 287 // result = owMaster.read();
Matt Briggs 38:8a512e23d99e 288 // logInfo("Latch Reg Value: %02x\n", result);
Matt Briggs 38:8a512e23d99e 289 // // TODO try reading inverted 16-bit CRC
Matt Briggs 38:8a512e23d99e 290 //
Matt Briggs 38:8a512e23d99e 291 // wait(1.0);
Matt Briggs 38:8a512e23d99e 292 // // Try write
Matt Briggs 38:8a512e23d99e 293 // owMaster.reset();
Matt Briggs 38:8a512e23d99e 294 // owMaster.select(addr);
Matt Briggs 38:8a512e23d99e 295 // owMaster.write(0x5A); // Channel Access Write Command
Matt Briggs 38:8a512e23d99e 296 // uint8_t val = ~0xAA;
Matt Briggs 38:8a512e23d99e 297 // owMaster.write(val); // Pull-down all even bits
Matt Briggs 38:8a512e23d99e 298 // owMaster.write(~val); // Pull-down all even bits
Matt Briggs 38:8a512e23d99e 299 // result = owMaster.read();
Matt Briggs 38:8a512e23d99e 300 // logInfo("Confirm after write value: %02x, expected %02x\n", result, 0xAA);
Matt Briggs 38:8a512e23d99e 301 //
Matt Briggs 38:8a512e23d99e 302 // // Check if the read back is just a latch reg thing or a true logic state
Matt Briggs 38:8a512e23d99e 303 // wait(1.0);
Matt Briggs 40:2ec4be320961 304 // }
Mike Fiore 11:d2e31743433a 305 }
Mike Fiore 11:d2e31743433a 306
Mike Fiore 11:d2e31743433a 307 return 0;
Mike Fiore 11:d2e31743433a 308 }
Mike Fiore 11:d2e31743433a 309
Matt Briggs 27:6b68ff715ae1 310