Fork to see if I can get working

Dependencies:   BufferedSerial OneWire WinbondSPIFlash libxDot-dev-mbed5-deprecated

Fork of xDotBridge_update_test20180823 by Matt Briggs

Committer:
Matt Briggs
Date:
Wed Jan 11 12:24:18 2017 -0700
Revision:
30:2e673a672884
Parent:
29:e05e35976cfe
Child:
31:9c535a708ae9
example flash reads working just not much stack to play with

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Matt Briggs 22:9453658b8d4b 1 #include "config.h"
Matt Briggs 30:2e673a672884 2 #include "xdot_flash.h"
Mike Fiore 11:d2e31743433a 3 #include "dot_util.h"
Mike Fiore 14:19fae4509473 4 #include "RadioEvent.h"
Matt Briggs 26:9411b26a5084 5 #include <math.h>
Mike Fiore 11:d2e31743433a 6
Matt Briggs 22:9453658b8d4b 7
mfiore 17:d4f82e16de5f 8 /////////////////////////////////////////////////////////////////////////////
mfiore 17:d4f82e16de5f 9 // -------------------- DOT LIBRARY REQUIRED ------------------------------//
mfiore 17:d4f82e16de5f 10 // * Because these example programs can be used for both mDot and xDot //
mfiore 17:d4f82e16de5f 11 // devices, the LoRa stack is not included. The libmDot library should //
mfiore 17:d4f82e16de5f 12 // be imported if building for mDot devices. The libxDot library //
mfiore 17:d4f82e16de5f 13 // should be imported if building for xDot devices. //
mfiore 17:d4f82e16de5f 14 // * https://developer.mbed.org/teams/MultiTech/code/libmDot-dev-mbed5/ //
mfiore 17:d4f82e16de5f 15 // * https://developer.mbed.org/teams/MultiTech/code/libmDot-mbed5/ //
mfiore 17:d4f82e16de5f 16 // * https://developer.mbed.org/teams/MultiTech/code/libxDot-dev-mbed5/ //
mfiore 17:d4f82e16de5f 17 // * https://developer.mbed.org/teams/MultiTech/code/libxDot-mbed5/ //
mfiore 17:d4f82e16de5f 18 /////////////////////////////////////////////////////////////////////////////
mfiore 17:d4f82e16de5f 19
Mike Fiore 11:d2e31743433a 20 /////////////////////////////////////////////////////////////
Mike Fiore 11:d2e31743433a 21 // * these options must match between the two devices in //
Mike Fiore 11:d2e31743433a 22 // order for communication to be successful
Mike Fiore 11:d2e31743433a 23 /////////////////////////////////////////////////////////////
Mike Fiore 11:d2e31743433a 24 static uint8_t network_address[] = { 0x01, 0x02, 0x03, 0x04 };
Mike Fiore 11:d2e31743433a 25 static uint8_t network_session_key[] = { 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04 };
mbriggs_vortex 19:75b28b4117cc 26 static uint8_t data_session_key[] = { 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04 };
Mike Fiore 11:d2e31743433a 27
Matt Briggs 26:9411b26a5084 28 // wireless bridge protocol
Matt Briggs 26:9411b26a5084 29 //const float dutyCycle = 0.01; // 1%
Matt Briggs 27:6b68ff715ae1 30 const float rxSleepTime = 2000; // ms (one second resolution, min 2 seconds)
Matt Briggs 26:9411b26a5084 31 const uint8_t maxPayloadSize = 10; // Number of bytes (used for toa calcultion)
Matt Briggs 26:9411b26a5084 32
Matt Briggs 29:e05e35976cfe 33 DigitalOut led1(GPIO0);
Matt Briggs 29:e05e35976cfe 34
Matt Briggs 29:e05e35976cfe 35 AnalogIn an1(GPIO1);
Matt Briggs 29:e05e35976cfe 36 AnalogIn an2(GPIO2);
Matt Briggs 29:e05e35976cfe 37
Matt Briggs 29:e05e35976cfe 38 // Inputs
Matt Briggs 29:e05e35976cfe 39 DigitalIn gpio3(GPIO3);
Matt Briggs 29:e05e35976cfe 40 DigitalIn wake_DOUT(WAKE);
Matt Briggs 29:e05e35976cfe 41 DigitalIn i2cOut1(I2C1_SCL);
Matt Briggs 29:e05e35976cfe 42 DigitalIn i2cOut2(I2C1_SDA);
Matt Briggs 29:e05e35976cfe 43
Matt Briggs 29:e05e35976cfe 44 DigitalIn uartOut1(UART1_CTS);
Matt Briggs 29:e05e35976cfe 45 DigitalIn uartOut2(UART1_RTS);
Matt Briggs 29:e05e35976cfe 46
Matt Briggs 29:e05e35976cfe 47 // Outputs
Matt Briggs 29:e05e35976cfe 48 //DigitalOut gpio3(GPIO3);
Matt Briggs 29:e05e35976cfe 49 ////DigitalOut wake_DOUT(WAKE);
Matt Briggs 29:e05e35976cfe 50 //DigitalOut i2cOut1(I2C1_SCL);
Matt Briggs 29:e05e35976cfe 51 //DigitalOut i2cOut2(I2C1_SDA);
Matt Briggs 29:e05e35976cfe 52 //
Matt Briggs 29:e05e35976cfe 53 //DigitalOut uartOut1(UART1_CTS);
Matt Briggs 29:e05e35976cfe 54 //DigitalOut uartOut2(UART1_RTS);
Matt Briggs 29:e05e35976cfe 55
Mike Fiore 11:d2e31743433a 56 mDot* dot = NULL;
Mike Fiore 11:d2e31743433a 57
Mike Fiore 11:d2e31743433a 58 Serial pc(USBTX, USBRX);
Mike Fiore 11:d2e31743433a 59
Matt Briggs 27:6b68ff715ae1 60 //Ticker t;
Matt Briggs 27:6b68ff715ae1 61 //
Matt Briggs 27:6b68ff715ae1 62 //class RxHandler {
Matt Briggs 27:6b68ff715ae1 63 // private:
Matt Briggs 27:6b68ff715ae1 64 // uint m_dwnLink;
Matt Briggs 27:6b68ff715ae1 65 // mDot *m_dot;
Matt Briggs 27:6b68ff715ae1 66 // public:
Matt Briggs 27:6b68ff715ae1 67 // RxHandler (mDot *dot) {
Matt Briggs 27:6b68ff715ae1 68 // m_dot = dot;
Matt Briggs 27:6b68ff715ae1 69 // m_dwnLink = dot->getDownLinkCounter();
Matt Briggs 27:6b68ff715ae1 70 // }
Matt Briggs 27:6b68ff715ae1 71 // void listen() {
Matt Briggs 27:6b68ff715ae1 72 // std::vector<uint8_t> data;
Matt Briggs 27:6b68ff715ae1 73 // led1 = 1; // FIXME
Matt Briggs 27:6b68ff715ae1 74 // logInfo("Listening for new message current DLC: %d, time: %lu", m_dwnLink, us_ticker_read());
Matt Briggs 27:6b68ff715ae1 75 // wait(0.060); // Wait twice the time on air
Matt Briggs 27:6b68ff715ae1 76 // if (m_dwnLink < dot->getDownLinkCounter()) {
Matt Briggs 27:6b68ff715ae1 77 // m_dwnLink = dot->getDownLinkCounter();
Matt Briggs 27:6b68ff715ae1 78 // m_dot->recv(data);
Matt Briggs 27:6b68ff715ae1 79 // std::string dataStr(data.begin(), data.end());
Matt Briggs 27:6b68ff715ae1 80 // logInfo("Got msg num: -, payload: %s", dataStr.c_str());
Matt Briggs 27:6b68ff715ae1 81 // wait(0.5);
Matt Briggs 27:6b68ff715ae1 82 // }
Matt Briggs 27:6b68ff715ae1 83 // led1=0;
Matt Briggs 27:6b68ff715ae1 84 // }
Matt Briggs 27:6b68ff715ae1 85 //};
Matt Briggs 27:6b68ff715ae1 86
Mike Fiore 11:d2e31743433a 87 int main() {
Mike Fiore 14:19fae4509473 88 // Custom event handler for automatically displaying RX data
Mike Fiore 11:d2e31743433a 89 RadioEvent events;
Mike Fiore 11:d2e31743433a 90 uint32_t tx_frequency;
Mike Fiore 11:d2e31743433a 91 uint8_t tx_datarate;
Mike Fiore 11:d2e31743433a 92 uint8_t tx_power;
Mike Fiore 11:d2e31743433a 93 uint8_t frequency_band;
Mike Fiore 11:d2e31743433a 94
Mike Fiore 11:d2e31743433a 95 pc.baud(115200);
Mike Fiore 11:d2e31743433a 96
Matt Briggs 27:6b68ff715ae1 97 mts::MTSLog::setLogLevel(mts::MTSLog::TRACE_LEVEL);
Mike Fiore 11:d2e31743433a 98
Mike Fiore 11:d2e31743433a 99 dot = mDot::getInstance();
Mike Fiore 11:d2e31743433a 100
Mike Fiore 16:a3832552dfe1 101 logInfo("mbed-os library version: %d", MBED_LIBRARY_VERSION);
Mike Fiore 16:a3832552dfe1 102
Mike Fiore 12:ec9768677cea 103 // start from a well-known state
Mike Fiore 12:ec9768677cea 104 logInfo("defaulting Dot configuration");
Mike Fiore 12:ec9768677cea 105 dot->resetConfig();
Mike Fiore 12:ec9768677cea 106
Mike Fiore 11:d2e31743433a 107 // make sure library logging is turned on
Matt Briggs 27:6b68ff715ae1 108 dot->setLogLevel(mts::MTSLog::INFO_LEVEL);
Mike Fiore 11:d2e31743433a 109
Mike Fiore 11:d2e31743433a 110 // attach the custom events handler
Mike Fiore 11:d2e31743433a 111 dot->setEvents(&events);
Mike Fiore 11:d2e31743433a 112
Mike Fiore 11:d2e31743433a 113 // update configuration if necessary
Mike Fiore 11:d2e31743433a 114 if (dot->getJoinMode() != mDot::PEER_TO_PEER) {
Mike Fiore 11:d2e31743433a 115 logInfo("changing network join mode to PEER_TO_PEER");
Mike Fiore 11:d2e31743433a 116 if (dot->setJoinMode(mDot::PEER_TO_PEER) != mDot::MDOT_OK) {
Mike Fiore 11:d2e31743433a 117 logError("failed to set network join mode to PEER_TO_PEER");
Mike Fiore 11:d2e31743433a 118 }
Mike Fiore 11:d2e31743433a 119 }
Mike Fiore 11:d2e31743433a 120 frequency_band = dot->getFrequencyBand();
Mike Fiore 11:d2e31743433a 121 switch (frequency_band) {
Mike Fiore 11:d2e31743433a 122 case mDot::FB_EU868:
Mike Fiore 11:d2e31743433a 123 // 250kHz channels achieve higher throughput
Mike Fiore 11:d2e31743433a 124 // DR6 : SF7 @ 250kHz
Mike Fiore 11:d2e31743433a 125 // DR0 - DR5 (125kHz channels) available but much slower
Mike Fiore 11:d2e31743433a 126 tx_frequency = 869850000;
Mike Fiore 11:d2e31743433a 127 tx_datarate = mDot::DR6;
Mike Fiore 11:d2e31743433a 128 // the 869850000 frequency is 100% duty cycle if the total power is under 7 dBm - tx power 4 + antenna gain 3 = 7
Mike Fiore 11:d2e31743433a 129 tx_power = 4;
Mike Fiore 11:d2e31743433a 130 break;
Mike Fiore 11:d2e31743433a 131 case mDot::FB_US915:
Mike Fiore 11:d2e31743433a 132 case mDot::FB_AU915:
Mike Fiore 11:d2e31743433a 133 default:
Mike Fiore 11:d2e31743433a 134 // 500kHz channels achieve highest throughput
Mike Fiore 11:d2e31743433a 135 // DR8 : SF12 @ 500kHz
Mike Fiore 11:d2e31743433a 136 // DR9 : SF11 @ 500kHz
Mike Fiore 11:d2e31743433a 137 // DR10 : SF10 @ 500kHz
Mike Fiore 11:d2e31743433a 138 // DR11 : SF9 @ 500kHz
Mike Fiore 11:d2e31743433a 139 // DR12 : SF8 @ 500kHz
Mike Fiore 11:d2e31743433a 140 // DR13 : SF7 @ 500kHz
Mike Fiore 11:d2e31743433a 141 // DR0 - DR3 (125kHz channels) available but much slower
Mike Fiore 11:d2e31743433a 142 tx_frequency = 915500000;
Mike Fiore 11:d2e31743433a 143 tx_datarate = mDot::DR13;
Mike Fiore 11:d2e31743433a 144 // 915 bands have no duty cycle restrictions, set tx power to max
Mike Fiore 11:d2e31743433a 145 tx_power = 20;
Mike Fiore 11:d2e31743433a 146 break;
Mike Fiore 11:d2e31743433a 147 }
Mike Fiore 11:d2e31743433a 148 // in PEER_TO_PEER mode there is no join request/response transaction
Mike Fiore 11:d2e31743433a 149 // as long as both Dots are configured correctly, they should be able to communicate
Mike Fiore 11:d2e31743433a 150 update_peer_to_peer_config(network_address, network_session_key, data_session_key, tx_frequency, tx_datarate, tx_power);
Mike Fiore 11:d2e31743433a 151
Matt Briggs 24:fdf87e4b72e5 152
Matt Briggs 24:fdf87e4b72e5 153 unsigned int wakeMode;
Matt Briggs 26:9411b26a5084 154
Matt Briggs 24:fdf87e4b72e5 155 ///////////////////////////////
Matt Briggs 24:fdf87e4b72e5 156 // Transmitter Configuration //
Matt Briggs 24:fdf87e4b72e5 157 ///////////////////////////////
Matt Briggs 27:6b68ff715ae1 158 #if BRIDGE_TX_BRUTE
Matt Briggs 24:fdf87e4b72e5 159 wakeMode = mDot::INTERRUPT;
Matt Briggs 29:e05e35976cfe 160 dot->setTxWait(false);
Matt Briggs 29:e05e35976cfe 161 dot->setAck(0); // Disable Ack
Matt Briggs 29:e05e35976cfe 162 #endif
Matt Briggs 29:e05e35976cfe 163
Matt Briggs 29:e05e35976cfe 164 #if BRIDGE_TX_ACK
Matt Briggs 29:e05e35976cfe 165 wakeMode = mDot::INTERRUPT;
Matt Briggs 29:e05e35976cfe 166 dot->setTxWait(true);
Matt Briggs 29:e05e35976cfe 167 dot->setAck(1); // Enable Ack
Matt Briggs 29:e05e35976cfe 168 dot->setRepeat(1); // No auto repeats
Matt Briggs 29:e05e35976cfe 169 dot->setRxDelay(1);
Matt Briggs 24:fdf87e4b72e5 170 #endif
Matt Briggs 24:fdf87e4b72e5 171
Matt Briggs 24:fdf87e4b72e5 172 ////////////////////////////
Matt Briggs 24:fdf87e4b72e5 173 // Receiver Configuration //
Matt Briggs 24:fdf87e4b72e5 174 ////////////////////////////
Matt Briggs 27:6b68ff715ae1 175 #if BRIDGE_RX_BRUTE
Matt Briggs 24:fdf87e4b72e5 176 wakeMode = mDot::RTC_ALARM_OR_INTERRUPT;
Matt Briggs 29:e05e35976cfe 177 dot->setTxWait(false);
Matt Briggs 29:e05e35976cfe 178 dot->setAck(0); // Disable Ack
Matt Briggs 24:fdf87e4b72e5 179 #endif
Matt Briggs 24:fdf87e4b72e5 180
Matt Briggs 24:fdf87e4b72e5 181 // Common Configuration
Matt Briggs 25:fea776239709 182 dot->setWakePin(WAKE); // Use the wake pin as sleep interrupt
Matt Briggs 25:fea776239709 183 dot->setClass("C"); // Set class C
Matt Briggs 28:b14b2926e916 184 dot->setTxPower(20); // 20 dBm
Matt Briggs 24:fdf87e4b72e5 185
Mike Fiore 11:d2e31743433a 186 // save changes to configuration
Mike Fiore 11:d2e31743433a 187 logInfo("saving configuration");
Mike Fiore 11:d2e31743433a 188 if (!dot->saveConfig()) {
Mike Fiore 11:d2e31743433a 189 logError("failed to save configuration");
Mike Fiore 11:d2e31743433a 190 }
Mike Fiore 11:d2e31743433a 191
Mike Fiore 11:d2e31743433a 192 // display configuration
Mike Fiore 11:d2e31743433a 193 display_config();
Mike Fiore 11:d2e31743433a 194
Matt Briggs 26:9411b26a5084 195
Matt Briggs 27:6b68ff715ae1 196 uint32_t txTime = 30; // in ms
Matt Briggs 27:6b68ff715ae1 197 unsigned int nTimesToTx = ceil(rxSleepTime / ((float)txTime));
Matt Briggs 27:6b68ff715ae1 198 logInfo("rxSleepTime %f, timeOnAir %lu, nTimesToTx %lu", rxSleepTime, txTime, nTimesToTx);
Matt Briggs 26:9411b26a5084 199
mbriggs_vortex 23:4ed894108882 200 uint16_t seqNum=0;
Matt Briggs 26:9411b26a5084 201 uint32_t cDwnLink = dot->getDownLinkCounter();
Matt Briggs 30:2e673a672884 202
Matt Briggs 30:2e673a672884 203 // File system Play
Matt Briggs 30:2e673a672884 204 const uint32_t filesize = 164754;
Matt Briggs 30:2e673a672884 205 // const uint32_t filesize = 8192;
Matt Briggs 30:2e673a672884 206 // const uint32_t size = 4096; // In Bytes
Matt Briggs 30:2e673a672884 207 // uint8_t buf[size];
Matt Briggs 30:2e673a672884 208 const uint32_t size = 1024; // In Bytes
Matt Briggs 30:2e673a672884 209 uint32_t buf[size];
Matt Briggs 30:2e673a672884 210 uint32_t start = 0x0000; // Note addr is automatically offset to flash start
Matt Briggs 30:2e673a672884 211 wait(0.1);
Matt Briggs 30:2e673a672884 212 logInfo("Starting flash read");
Matt Briggs 30:2e673a672884 213
Matt Briggs 30:2e673a672884 214 int ret;
Matt Briggs 30:2e673a672884 215 while (start < filesize) {
Matt Briggs 30:2e673a672884 216 ret = xdot_flash_read_buf(start, (uint8_t *)buf, size);
Matt Briggs 30:2e673a672884 217 if (ret < 0) {
Matt Briggs 30:2e673a672884 218 logError("Flash read failed");
Matt Briggs 30:2e673a672884 219 }
Matt Briggs 30:2e673a672884 220 for (uint32_t i=0; i<size; i+=2) {
Matt Briggs 30:2e673a672884 221 if ((i % 4) == 0) {
Matt Briggs 30:2e673a672884 222 printf("\r\n%08X ", start+i);
Matt Briggs 30:2e673a672884 223 }
Matt Briggs 30:2e673a672884 224 printf("%08X ", buf[i]);
Matt Briggs 30:2e673a672884 225 }
Matt Briggs 30:2e673a672884 226 start += size;
Matt Briggs 30:2e673a672884 227 }
Matt Briggs 30:2e673a672884 228
Matt Briggs 30:2e673a672884 229 return 0;
Matt Briggs 30:2e673a672884 230
Matt Briggs 30:2e673a672884 231 // End File System Play
Matt Briggs 30:2e673a672884 232
Mike Fiore 11:d2e31743433a 233 while (true) {
Matt Briggs 25:fea776239709 234 std::vector<uint8_t> data;
Matt Briggs 29:e05e35976cfe 235 // led1=0; FIXME
Mike Fiore 11:d2e31743433a 236
Mike Fiore 11:d2e31743433a 237 // join network if not joined
Mike Fiore 11:d2e31743433a 238 if (!dot->getNetworkJoinStatus()) {
Mike Fiore 11:d2e31743433a 239 join_network();
Mike Fiore 11:d2e31743433a 240 }
Mike Fiore 11:d2e31743433a 241
Matt Briggs 27:6b68ff715ae1 242 //////////////////////////////////////////
Matt Briggs 27:6b68ff715ae1 243 // Brute Protocol Transmitter main loop //
Matt Briggs 27:6b68ff715ae1 244 //////////////////////////////////////////
Matt Briggs 27:6b68ff715ae1 245 #if BRIDGE_TX_BRUTE
Matt Briggs 26:9411b26a5084 246 led1=1;
Matt Briggs 25:fea776239709 247 data.push_back((seqNum >> 8) & 0xFF);
Matt Briggs 25:fea776239709 248 data.push_back(seqNum & 0xFF);
Matt Briggs 27:6b68ff715ae1 249 logInfo("Starting TX. Time: %lu, seqNum: %lu", us_ticker_read(), seqNum);
Matt Briggs 26:9411b26a5084 250 for(uint i=0;i<nTimesToTx;++i) {
Matt Briggs 27:6b68ff715ae1 251 dot->send(data);
Matt Briggs 26:9411b26a5084 252 }
mbriggs_vortex 23:4ed894108882 253 seqNum++;
Matt Briggs 25:fea776239709 254 led1=0;
Matt Briggs 27:6b68ff715ae1 255 logInfo("Finished TX. Time: %lu", us_ticker_read());
mbriggs_vortex 23:4ed894108882 256
Matt Briggs 28:b14b2926e916 257 sleep_save_io();
Matt Briggs 28:b14b2926e916 258 sleep_configure_io();
Matt Briggs 24:fdf87e4b72e5 259 dot->sleep(0, wakeMode, false); // Go to sleep until wake button
Matt Briggs 28:b14b2926e916 260 sleep_restore_io();
Matt Briggs 24:fdf87e4b72e5 261 #endif
Matt Briggs 27:6b68ff715ae1 262
Matt Briggs 29:e05e35976cfe 263 #if BRIDGE_TX_ACK
Matt Briggs 29:e05e35976cfe 264 led1=1;
Matt Briggs 29:e05e35976cfe 265 data.push_back((seqNum >> 8) & 0xFF);
Matt Briggs 29:e05e35976cfe 266 data.push_back(seqNum & 0xFF);
Matt Briggs 29:e05e35976cfe 267 logInfo("Starting TX. Time: %lu, seqNum: %lu", us_ticker_read(), seqNum);
Matt Briggs 29:e05e35976cfe 268 uint32_t pktRtn = -1024;
Matt Briggs 29:e05e35976cfe 269 for(uint i=0;i<nTimesToTx;++i) {
Matt Briggs 29:e05e35976cfe 270 pktRtn = dot->send(data);
Matt Briggs 29:e05e35976cfe 271 if (pktRtn == mDot::MDOT_OK) {
Matt Briggs 29:e05e35976cfe 272 logInfo("Successful TX. Time: %lu Try: %d", us_ticker_read(), i);
Matt Briggs 29:e05e35976cfe 273 break;
Matt Briggs 29:e05e35976cfe 274 }
Matt Briggs 29:e05e35976cfe 275 else {
Matt Briggs 29:e05e35976cfe 276 logInfo(" Bad TX. Time: %lu Try: %d", us_ticker_read(), i);
Matt Briggs 29:e05e35976cfe 277 }
Matt Briggs 29:e05e35976cfe 278 }
Matt Briggs 29:e05e35976cfe 279 seqNum++;
Matt Briggs 29:e05e35976cfe 280 led1=0;
Matt Briggs 29:e05e35976cfe 281 logInfo("Finished TX. Time: %lu", us_ticker_read());
Matt Briggs 29:e05e35976cfe 282
Matt Briggs 29:e05e35976cfe 283 sleep_save_io();
Matt Briggs 29:e05e35976cfe 284 sleep_configure_io();
Matt Briggs 29:e05e35976cfe 285 dot->sleep(0, wakeMode, false); // Go to sleep until wake button
Matt Briggs 29:e05e35976cfe 286 sleep_restore_io();
Matt Briggs 29:e05e35976cfe 287 #endif
Matt Briggs 29:e05e35976cfe 288
Matt Briggs 27:6b68ff715ae1 289 ///////////////////////////////////////
Matt Briggs 27:6b68ff715ae1 290 // Brute Protocol Receiver main loop //
Matt Briggs 27:6b68ff715ae1 291 ///////////////////////////////////////
Matt Briggs 27:6b68ff715ae1 292
Matt Briggs 27:6b68ff715ae1 293 #if BRIDGE_RX_BRUTE
Matt Briggs 27:6b68ff715ae1 294 logInfo("Waiting for new message current DLC: %d, Time %d", cDwnLink, us_ticker_read());
Matt Briggs 27:6b68ff715ae1 295 wait(txTime*2.0/1000.0); // Wait twice the txTime
Matt Briggs 26:9411b26a5084 296 if (cDwnLink < dot->getDownLinkCounter()) {
Matt Briggs 26:9411b26a5084 297 led1 = 1;
Matt Briggs 26:9411b26a5084 298 cDwnLink = dot->getDownLinkCounter();
Matt Briggs 26:9411b26a5084 299 dot->recv(data);
Matt Briggs 26:9411b26a5084 300 std::string dataStr(data.begin(), data.end());
Matt Briggs 26:9411b26a5084 301 logInfo("Got msg num: %d, payload: %s", seqNum, dataStr.c_str());
Matt Briggs 26:9411b26a5084 302 seqNum++;
Matt Briggs 26:9411b26a5084 303 wait(0.5);
Matt Briggs 25:fea776239709 304 }
Matt Briggs 26:9411b26a5084 305 led1=0;
Matt Briggs 27:6b68ff715ae1 306 logInfo("Sleeping. Time %d", us_ticker_read());
Matt Briggs 28:b14b2926e916 307 sleep_save_io();
Matt Briggs 28:b14b2926e916 308 sleep_configure_io();
Matt Briggs 26:9411b26a5084 309 dot->sleep(2, wakeMode, false); // Go to sleep until wake button
Matt Briggs 28:b14b2926e916 310 sleep_restore_io();
Matt Briggs 25:fea776239709 311 #endif
Matt Briggs 27:6b68ff715ae1 312 // // Idea to Setup Ticker
Matt Briggs 27:6b68ff715ae1 313 // RxHandler rxHandler(dot);
Matt Briggs 27:6b68ff715ae1 314 // t.attach(&rxHandler, &RxHandler::listen, 1.5);
Matt Briggs 27:6b68ff715ae1 315 // wait(5.0);
Matt Briggs 27:6b68ff715ae1 316 // while (true) {
Matt Briggs 27:6b68ff715ae1 317 // dot->sleep(0, wakeMode, false); // Go to sleep until wake button
Matt Briggs 27:6b68ff715ae1 318 // //sleep();
Matt Briggs 27:6b68ff715ae1 319 // }
Matt Briggs 29:e05e35976cfe 320 //////////////
Matt Briggs 29:e05e35976cfe 321 // I/O Play //
Matt Briggs 29:e05e35976cfe 322 //////////////
Matt Briggs 29:e05e35976cfe 323
Matt Briggs 29:e05e35976cfe 324 // Check Analog
Matt Briggs 29:e05e35976cfe 325 logInfo("Read AN1/GPIO1: %f", an1.read());
Matt Briggs 29:e05e35976cfe 326 logInfo("Read AN2/GPIO2: %f", an2.read()); // Ranges from 0.0 to 1.0
Matt Briggs 29:e05e35976cfe 327
Matt Briggs 29:e05e35976cfe 328 // check inputs
Matt Briggs 29:e05e35976cfe 329 logInfo("Read GPIO3: %d", gpio3.read());
Matt Briggs 29:e05e35976cfe 330 logInfo("Read wake_DOUT: %d", wake_DOUT.read());
Matt Briggs 29:e05e35976cfe 331 logInfo("Read i2cOut1: %d", i2cOut1.read()); // Appears to be pulled up
Matt Briggs 29:e05e35976cfe 332 logInfo("Read i2cOut2: %d", i2cOut2.read()); // Appears to be pulled up
Matt Briggs 29:e05e35976cfe 333 logInfo("Read uartOut1: %d", uartOut1.read());
Matt Briggs 29:e05e35976cfe 334 logInfo("Read uartOut2: %d", uartOut2.read());
Matt Briggs 29:e05e35976cfe 335
Matt Briggs 29:e05e35976cfe 336 // check digital outputs
Matt Briggs 29:e05e35976cfe 337 // led1 = !led1;
Matt Briggs 29:e05e35976cfe 338 // gpio3 = !gpio3;
Matt Briggs 29:e05e35976cfe 339 //// wake_DOUT = !wake_DOUT;
Matt Briggs 29:e05e35976cfe 340 // i2cOut1 = !i2cOut1;
Matt Briggs 29:e05e35976cfe 341 // i2cOut2 = !i2cOut2;
Matt Briggs 29:e05e35976cfe 342 //
Matt Briggs 29:e05e35976cfe 343 // uartOut1 = !uartOut1;
Matt Briggs 29:e05e35976cfe 344 // uartOut2 = !uartOut2;
Matt Briggs 29:e05e35976cfe 345
Matt Briggs 29:e05e35976cfe 346 logInfo("================================");
Matt Briggs 29:e05e35976cfe 347
Matt Briggs 29:e05e35976cfe 348 wait(1.0);
Mike Fiore 11:d2e31743433a 349 }
Mike Fiore 11:d2e31743433a 350
Mike Fiore 11:d2e31743433a 351 return 0;
Mike Fiore 11:d2e31743433a 352 }
Mike Fiore 11:d2e31743433a 353
Matt Briggs 27:6b68ff715ae1 354