Matt Briggs / Mbed OS xDotBridge_update_dev_latest

Fork to see if I can get working

Dependencies:   BufferedSerial OneWire WinbondSPIFlash libxDot-dev-mbed5-deprecated

Fork of xDotBridge_update_test20180823 by Matt Briggs

xDotBridge/src/BaseboardIO.cpp@60:5179449a684f, 2017-03-06 (annotated)

Committer:
Matt Briggs
Date:
Mon Mar 06 15:16:58 2017 -0700
Revision:
60:5179449a684f
Parent:
59:485545afc4dc
Child:
61:8d9efd33cac9
Few quick changes before adding pair code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Matt Briggs 40:2ec4be320961 1 /*
Matt Briggs 40:2ec4be320961 2 * baseboardIO.cpp
Matt Briggs 40:2ec4be320961 3 *
Matt Briggs 40:2ec4be320961 4 * Created on: Jan 25, 2017
Matt Briggs 40:2ec4be320961 5 * Author: mbriggs
Matt Briggs 40:2ec4be320961 6 */
Matt Briggs 40:2ec4be320961 7
Matt Briggs 40:2ec4be320961 8 #include "BaseboardIO.h"
Matt Briggs 41:9ef4c4d77711 9 #include "MTSLog.h"
Matt Briggs 55:79ab0bbc5008 10 #include "dot_util.h" // FIXME just need the reference to dot somehow
Matt Briggs 58:15aa7a785b9f 11 #include "xdot_low_power.h"
Matt Briggs 40:2ec4be320961 12
Matt Briggs 47:a68747642a7a 13 const float COIL_ON_TIME = 0.030; // 30 ms
Matt Briggs 44:ece6330e9b57 14
Matt Briggs 49:18f1354f9e51 15 // Port expander 0 (Currently U7)
Matt Briggs 44:ece6330e9b57 16 const uint8_t pEx0232En = 0x01;
Matt Briggs 44:ece6330e9b57 17 const uint8_t pEx0232TxDis = 0x02;
Matt Briggs 44:ece6330e9b57 18 const uint8_t pEx0Rot1B1 = 0x04;
Matt Briggs 44:ece6330e9b57 19 const uint8_t pEx0Rot1B2 = 0x08;
Matt Briggs 44:ece6330e9b57 20 const uint8_t pEx0Rot1B4 = 0x10;
Matt Briggs 44:ece6330e9b57 21 const uint8_t pEx0Rot1B8 = 0x20;
Matt Briggs 44:ece6330e9b57 22 const uint8_t pEx0Rot2B1 = 0x40;
Matt Briggs 44:ece6330e9b57 23 const uint8_t pEx0Rot2B2 = 0x80;
Matt Briggs 49:18f1354f9e51 24 const uint8_t pEx0OutMask = 0x03; // Only allow bits 0,1 to be changed
Matt Briggs 44:ece6330e9b57 25
Matt Briggs 49:18f1354f9e51 26 // Port expander 1 (Currently U8)
Matt Briggs 44:ece6330e9b57 27 const uint8_t pEx1NoNcSel = 0x01;
Matt Briggs 44:ece6330e9b57 28 const uint8_t pEx1RxTxSel = 0x02;
Matt Briggs 44:ece6330e9b57 29 const uint8_t pEx1WanSel = 0x04;
Matt Briggs 44:ece6330e9b57 30 const uint8_t pEx1SerialEn = 0x08; // Labeled as reserved
Matt Briggs 44:ece6330e9b57 31 const uint8_t pEx1Rot2B8 = 0x10;
Matt Briggs 44:ece6330e9b57 32 const uint8_t pEx1Rot2B4 = 0x20;
Matt Briggs 44:ece6330e9b57 33 const uint8_t pEx1RlyB = 0x40; // This is actually a coil
Matt Briggs 44:ece6330e9b57 34 const uint8_t pEx1RlyA = 0x80; // This is actually a coil
Matt Briggs 49:18f1354f9e51 35 const uint8_t pEx1OutMask = 0xC0; // Only allow bits 6,7 to be changed
Matt Briggs 44:ece6330e9b57 36
Matt Briggs 44:ece6330e9b57 37 /**
Matt Briggs 44:ece6330e9b57 38 * Note for interrupt within uC cannot use two pins with the same numeric suffix (e.g. cannot
Matt Briggs 44:ece6330e9b57 39 * use both PA_0 and PB_0). Note 1, 6, 7, 8, and 13 are used by LoRa radio.
Matt Briggs 44:ece6330e9b57 40 */
Matt Briggs 44:ece6330e9b57 41
Matt Briggs 40:2ec4be320961 42 BaseboardIO::BaseboardIO()
Matt Briggs 58:15aa7a785b9f 43 : mOWMaster(OneWireMasterPinName),
Matt Briggs 58:15aa7a785b9f 44 mCCIn(CCInPinName),
Matt Briggs 58:15aa7a785b9f 45 mTamper(TamperPinName),
Matt Briggs 58:15aa7a785b9f 46 mPairBtn(PairBtnPinName),
Matt Briggs 58:15aa7a785b9f 47 mLed(LedPinName),
Matt Briggs 60:5179449a684f 48 mLrrLed(LrrLedPinName, 0),
Matt Briggs 58:15aa7a785b9f 49 mSwitchedIOCtrl(SwitchedIOCtrlPinName, 0)
Matt Briggs 40:2ec4be320961 50 {
Matt Briggs 44:ece6330e9b57 51 mPortExpanderVal0 = 0x00;
Matt Briggs 44:ece6330e9b57 52 mPortExpanderVal1 = 0x00;
Matt Briggs 44:ece6330e9b57 53
Matt Briggs 44:ece6330e9b57 54 mPortEx0 = NULL;
Matt Briggs 44:ece6330e9b57 55 mPortEx1 = NULL;
Matt Briggs 40:2ec4be320961 56 }
Matt Briggs 56:40b454c952cc 57 CmdResult BaseboardIO::init(bool overwriteNvm)
Matt Briggs 40:2ec4be320961 58 {
Matt Briggs 56:40b454c952cc 59 bool storedROMsGood = false;
Matt Briggs 56:40b454c952cc 60 uint8_t val;
Matt Briggs 44:ece6330e9b57 61 // Setup port expanders
Matt Briggs 56:40b454c952cc 62 if (readInfoFromNVM() == cmdSuccess && !overwriteNvm) {
Matt Briggs 55:79ab0bbc5008 63 logInfo("Stored ROM0 Addr: %02x:%02x:%02x:%02x:%02x:%02x:%02x%02x found.",
Matt Briggs 55:79ab0bbc5008 64 mNvmObj.mPortExpanderROM0[7],
Matt Briggs 55:79ab0bbc5008 65 mNvmObj.mPortExpanderROM0[6],
Matt Briggs 55:79ab0bbc5008 66 mNvmObj.mPortExpanderROM0[5],
Matt Briggs 55:79ab0bbc5008 67 mNvmObj.mPortExpanderROM0[4],
Matt Briggs 55:79ab0bbc5008 68 mNvmObj.mPortExpanderROM0[3],
Matt Briggs 55:79ab0bbc5008 69 mNvmObj.mPortExpanderROM0[2],
Matt Briggs 55:79ab0bbc5008 70 mNvmObj.mPortExpanderROM0[1],
Matt Briggs 55:79ab0bbc5008 71 mNvmObj.mPortExpanderROM0[0]);
Matt Briggs 55:79ab0bbc5008 72 logInfo("Stored ROM1 Addr: %02x:%02x:%02x:%02x:%02x:%02x:%02x%02x found.",
Matt Briggs 55:79ab0bbc5008 73 mNvmObj.mPortExpanderROM1[7],
Matt Briggs 55:79ab0bbc5008 74 mNvmObj.mPortExpanderROM1[6],
Matt Briggs 55:79ab0bbc5008 75 mNvmObj.mPortExpanderROM1[5],
Matt Briggs 55:79ab0bbc5008 76 mNvmObj.mPortExpanderROM1[4],
Matt Briggs 55:79ab0bbc5008 77 mNvmObj.mPortExpanderROM1[3],
Matt Briggs 55:79ab0bbc5008 78 mNvmObj.mPortExpanderROM1[2],
Matt Briggs 55:79ab0bbc5008 79 mNvmObj.mPortExpanderROM1[1],
Matt Briggs 55:79ab0bbc5008 80 mNvmObj.mPortExpanderROM1[0]);
Matt Briggs 55:79ab0bbc5008 81 logInfo("BaseboardIO parameters successfully loaded from NVM");
Matt Briggs 56:40b454c952cc 82 // Check that the ROM Addresses are correct and valid
Matt Briggs 56:40b454c952cc 83 uint8_t portEx0Ctrl, portEx1Ctrl;
Matt Briggs 56:40b454c952cc 84 mPortEx0 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM0);
Matt Briggs 56:40b454c952cc 85 mPortEx0->registerReadReliable(0x8D, portEx0Ctrl);
Matt Briggs 56:40b454c952cc 86 // Gets 0xFF if it is not the correct address
Matt Briggs 56:40b454c952cc 87 logInfo("PortEx0 Control register reads %02X", portEx0Ctrl);
Matt Briggs 56:40b454c952cc 88
Matt Briggs 56:40b454c952cc 89 mPortEx1 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM1);
Matt Briggs 56:40b454c952cc 90 mPortEx1->registerReadReliable(0x8D, portEx1Ctrl);
Matt Briggs 56:40b454c952cc 91 logInfo("PortEx1 Control register reads %02X", portEx1Ctrl);
Matt Briggs 56:40b454c952cc 92 if ((portEx0Ctrl == 0xFF) || (portEx1Ctrl == 0xFF)) {
Matt Briggs 56:40b454c952cc 93 logError("Stored port expander ROM check failed. Set EEPROM to defaults.");
Matt Briggs 56:40b454c952cc 94 }
Matt Briggs 56:40b454c952cc 95 else {
Matt Briggs 56:40b454c952cc 96 storedROMsGood = true;
Matt Briggs 56:40b454c952cc 97 }
Matt Briggs 44:ece6330e9b57 98 }
Matt Briggs 56:40b454c952cc 99 if (!storedROMsGood)
Matt Briggs 56:40b454c952cc 100 { // EEPROM values not there or corrupt. Should only happen in factory.
Matt Briggs 55:79ab0bbc5008 101 mNvmObj.setDefaults();
Matt Briggs 47:a68747642a7a 102 // Find ROM address and test which one is which. Requires user
Matt Briggs 47:a68747642a7a 103 // switches to be in known state.
Matt Briggs 47:a68747642a7a 104 if (identifyPortExpanders() != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 105 logError("Error identifying port expanders");
Matt Briggs 44:ece6330e9b57 106 return cmdError;
Matt Briggs 44:ece6330e9b57 107 }
Matt Briggs 55:79ab0bbc5008 108 if (writeInfoToNVM() == cmdSuccess) {
Matt Briggs 55:79ab0bbc5008 109 logInfo("Baseboard config saved to NVM");
Matt Briggs 55:79ab0bbc5008 110 }
Matt Briggs 55:79ab0bbc5008 111 else {
Matt Briggs 55:79ab0bbc5008 112 logError("Baseboard config failed to save to NVM");
Matt Briggs 55:79ab0bbc5008 113 }
Matt Briggs 56:40b454c952cc 114 mPortEx0 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM0);
Matt Briggs 56:40b454c952cc 115 mPortEx0->registerReadReliable(0x8D, val);
Matt Briggs 56:40b454c952cc 116 // Gets 0xFF if it is not the correct address
Matt Briggs 56:40b454c952cc 117 logInfo("PortEx0 Control register reads %02X", val);
Matt Briggs 56:40b454c952cc 118 mPortEx1 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM1);
Matt Briggs 56:40b454c952cc 119 mPortEx1->registerReadReliable(0x8D, val);
Matt Briggs 56:40b454c952cc 120 logInfo("PortEx1 Control register reads %02X", val);
Matt Briggs 44:ece6330e9b57 121 }
Matt Briggs 44:ece6330e9b57 122
Matt Briggs 57:bdac7dd17af2 123 if (sampleUserSwitches() != cmdSuccess) {
Matt Briggs 57:bdac7dd17af2 124 logError("Error sampling user switches");
Matt Briggs 57:bdac7dd17af2 125 return cmdError;
Matt Briggs 57:bdac7dd17af2 126 }
Matt Briggs 57:bdac7dd17af2 127
Matt Briggs 44:ece6330e9b57 128 // Put relay in known state
Matt Briggs 47:a68747642a7a 129 if (relayNormal() != cmdSuccess) {
Matt Briggs 47:a68747642a7a 130 logError("Error setting relay during init");
Matt Briggs 47:a68747642a7a 131 return cmdError;
Matt Briggs 47:a68747642a7a 132 }
Matt Briggs 60:5179449a684f 133 ledOff();
Matt Briggs 47:a68747642a7a 134
Matt Briggs 44:ece6330e9b57 135 logInfo("Baseboard IO initialization successful");
Matt Briggs 44:ece6330e9b57 136 return cmdSuccess;
Matt Briggs 40:2ec4be320961 137 }
Matt Briggs 40:2ec4be320961 138
Matt Briggs 40:2ec4be320961 139 // Registering for interrupts
Matt Briggs 44:ece6330e9b57 140 void BaseboardIO::regCCInInt(Callback<void()> func)
Matt Briggs 40:2ec4be320961 141 {
Matt Briggs 48:bab9f747d9ed 142 sampleUserSwitches();
Matt Briggs 48:bab9f747d9ed 143 if (isCCNO()) {
Matt Briggs 48:bab9f747d9ed 144 // Pulled high, switched low
Matt Briggs 48:bab9f747d9ed 145 mCCIn.fall(func);
Matt Briggs 48:bab9f747d9ed 146 }
Matt Briggs 48:bab9f747d9ed 147 else {
Matt Briggs 48:bab9f747d9ed 148 mCCIn.rise(func);
Matt Briggs 48:bab9f747d9ed 149 }
Matt Briggs 53:a1563574a980 150 mCCIn.mode(PullNone);
Matt Briggs 49:18f1354f9e51 151 mCCIn.enable_irq();
Matt Briggs 40:2ec4be320961 152 }
Matt Briggs 44:ece6330e9b57 153 void BaseboardIO::regTamperInt(Callback<void()> func)
Matt Briggs 40:2ec4be320961 154 {
Matt Briggs 44:ece6330e9b57 155 // Pulled high, switched low
Matt Briggs 53:a1563574a980 156 mTamper.mode(PullNone);
Matt Briggs 49:18f1354f9e51 157 mTamper.rise(func);
Matt Briggs 44:ece6330e9b57 158 mTamper.fall(func);
Matt Briggs 49:18f1354f9e51 159 mTamper.enable_irq();
Matt Briggs 40:2ec4be320961 160 }
Matt Briggs 44:ece6330e9b57 161 void BaseboardIO::regPairBtnInt(Callback<void()> func)
Matt Briggs 40:2ec4be320961 162 {
Matt Briggs 44:ece6330e9b57 163 // Pulled low, switched high
Matt Briggs 58:15aa7a785b9f 164 mPairBtn.mode(PullNone);
Matt Briggs 44:ece6330e9b57 165 mPairBtn.rise(func);
Matt Briggs 49:18f1354f9e51 166 mPairBtn.enable_irq();
Matt Briggs 40:2ec4be320961 167 }
Matt Briggs 40:2ec4be320961 168
Matt Briggs 40:2ec4be320961 169 // Input
Matt Briggs 40:2ec4be320961 170 CmdResult BaseboardIO::sampleUserSwitches()
Matt Briggs 40:2ec4be320961 171 {
Matt Briggs 48:bab9f747d9ed 172 if ((mPortEx0 == NULL) || (mPortEx1 == NULL))
Matt Briggs 48:bab9f747d9ed 173 return cmdError;
Matt Briggs 44:ece6330e9b57 174 // Sample port expanders
Matt Briggs 49:18f1354f9e51 175 enableSwitchedIO();
Matt Briggs 49:18f1354f9e51 176 wait(0.001); // Wait 1 ms
Matt Briggs 53:a1563574a980 177 if (mPortEx0->pioLogicReliableRead(mPortExpanderVal0) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 178 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 179 logError("Error reading port expander 0.");
Matt Briggs 44:ece6330e9b57 180 return cmdError;
Matt Briggs 44:ece6330e9b57 181 }
Matt Briggs 53:a1563574a980 182 if (mPortEx1->pioLogicReliableRead(mPortExpanderVal1) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 183 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 184 logError("Error reading port expander 1.");
Matt Briggs 44:ece6330e9b57 185 return cmdError;
Matt Briggs 44:ece6330e9b57 186 }
Matt Briggs 49:18f1354f9e51 187 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 188 return cmdSuccess;
Matt Briggs 40:2ec4be320961 189 }
Matt Briggs 57:bdac7dd17af2 190 bool BaseboardIO::isCCInAlert()
Matt Briggs 57:bdac7dd17af2 191 {
Matt Briggs 57:bdac7dd17af2 192 if (isCCNO()) { // If NO then the CCIn should float high if not in alert state
Matt Briggs 57:bdac7dd17af2 193 return mCCIn == 0;
Matt Briggs 57:bdac7dd17af2 194 }
Matt Briggs 57:bdac7dd17af2 195 else { // If NC then the CCIN should be held low if not in alert state
Matt Briggs 57:bdac7dd17af2 196 return mCCIn == 1;
Matt Briggs 57:bdac7dd17af2 197 }
Matt Briggs 57:bdac7dd17af2 198 }
Matt Briggs 40:2ec4be320961 199 bool BaseboardIO::isPairBtn()
Matt Briggs 40:2ec4be320961 200 {
Matt Briggs 44:ece6330e9b57 201 // Depressed button is high
Matt Briggs 44:ece6330e9b57 202 return mPairBtn.read() == 1;
Matt Briggs 40:2ec4be320961 203 }
Matt Briggs 48:bab9f747d9ed 204 bool BaseboardIO::isCCNO()
Matt Briggs 40:2ec4be320961 205 {
Matt Briggs 44:ece6330e9b57 206 // When DIP switch is not closed (i.e. value reads high) assume NO
Matt Briggs 49:18f1354f9e51 207 return (mPortExpanderVal1 & pEx1NoNcSel) != 0; // Open NO, closed NC
Matt Briggs 40:2ec4be320961 208 }
Matt Briggs 40:2ec4be320961 209 bool BaseboardIO::isRx()
Matt Briggs 40:2ec4be320961 210 {
Matt Briggs 44:ece6330e9b57 211 // When DIP switch is not closed (i.e. value reads high) assume RX
Matt Briggs 44:ece6330e9b57 212 return (mPortExpanderVal1 & pEx1RxTxSel) != 0;
Matt Briggs 40:2ec4be320961 213 }
Matt Briggs 40:2ec4be320961 214 bool BaseboardIO::isLoRaWANMode()
Matt Briggs 40:2ec4be320961 215 {
Matt Briggs 44:ece6330e9b57 216 // When DIP switch is not closed (i.e. value reads high) assume P2P not WAN
Matt Briggs 44:ece6330e9b57 217 return (mPortExpanderVal1 & pEx1WanSel) == 0;
Matt Briggs 40:2ec4be320961 218 }
Matt Briggs 50:e89647e77fd5 219 bool BaseboardIO::isSerialEnabled()
Matt Briggs 50:e89647e77fd5 220 {
Matt Briggs 50:e89647e77fd5 221 // When DIP switch is not closed (i.e. value reads high) assume not in serial mode
Matt Briggs 50:e89647e77fd5 222 return (mPortExpanderVal1 & pEx1SerialEn) == 0;
Matt Briggs 50:e89647e77fd5 223 }
Matt Briggs 40:2ec4be320961 224 uint8_t BaseboardIO::rotarySwitch1()
Matt Briggs 40:2ec4be320961 225 {
Matt Briggs 44:ece6330e9b57 226 // If a bit of a nibble is asserted then the port expander line is switched low.
Matt Briggs 44:ece6330e9b57 227 uint8_t val = 0;
Matt Briggs 44:ece6330e9b57 228 if ((mPortExpanderVal0 & pEx0Rot1B8) == 0)
Matt Briggs 44:ece6330e9b57 229 val |= 0x08;
Matt Briggs 44:ece6330e9b57 230 if ((mPortExpanderVal0 & pEx0Rot1B4) == 0)
Matt Briggs 44:ece6330e9b57 231 val |= 0x04;
Matt Briggs 44:ece6330e9b57 232 if ((mPortExpanderVal0 & pEx0Rot1B2) == 0)
Matt Briggs 44:ece6330e9b57 233 val |= 0x02;
Matt Briggs 44:ece6330e9b57 234 if ((mPortExpanderVal0 & pEx0Rot1B1) == 0)
Matt Briggs 44:ece6330e9b57 235 val |= 0x01;
Matt Briggs 44:ece6330e9b57 236 return val;
Matt Briggs 40:2ec4be320961 237 }
Matt Briggs 40:2ec4be320961 238 uint8_t BaseboardIO::rotarySwitch2()
Matt Briggs 40:2ec4be320961 239 {
Matt Briggs 44:ece6330e9b57 240 // If a bit of a nibble is asserted then the port expander line is switched low.
Matt Briggs 44:ece6330e9b57 241 uint8_t val = 0;
Matt Briggs 44:ece6330e9b57 242 if ((mPortExpanderVal1 & pEx1Rot2B8) == 0)
Matt Briggs 44:ece6330e9b57 243 val |= 0x08;
Matt Briggs 44:ece6330e9b57 244 if ((mPortExpanderVal1 & pEx1Rot2B4) == 0)
Matt Briggs 44:ece6330e9b57 245 val |= 0x04;
Matt Briggs 44:ece6330e9b57 246 if ((mPortExpanderVal0 & pEx0Rot2B2) == 0)
Matt Briggs 44:ece6330e9b57 247 val |= 0x02;
Matt Briggs 44:ece6330e9b57 248 if ((mPortExpanderVal0 & pEx0Rot2B1) == 0)
Matt Briggs 44:ece6330e9b57 249 val |= 0x01;
Matt Briggs 44:ece6330e9b57 250 return val;
Matt Briggs 40:2ec4be320961 251 }
Matt Briggs 40:2ec4be320961 252
Matt Briggs 40:2ec4be320961 253 // Output
Matt Briggs 40:2ec4be320961 254 CmdResult BaseboardIO::ledOn()
Matt Briggs 40:2ec4be320961 255 {
Matt Briggs 44:ece6330e9b57 256 mLed = 1;
Matt Briggs 59:485545afc4dc 257 #if ALSO_USE_LRR_LED
Matt Briggs 59:485545afc4dc 258 mLrrLed = 1;
Matt Briggs 59:485545afc4dc 259 #endif
Matt Briggs 44:ece6330e9b57 260 return cmdSuccess;
Matt Briggs 40:2ec4be320961 261 }
Matt Briggs 40:2ec4be320961 262 CmdResult BaseboardIO::ledOff()
Matt Briggs 40:2ec4be320961 263 {
Matt Briggs 44:ece6330e9b57 264 mLed = 0;
Matt Briggs 60:5179449a684f 265 // Always allow setting GPIO0 to 0
Matt Briggs 60:5179449a684f 266 //#if ALSO_USE_LRR_LED
Matt Briggs 59:485545afc4dc 267 mLrrLed = 0;
Matt Briggs 60:5179449a684f 268 //#endif
Matt Briggs 44:ece6330e9b57 269 return cmdSuccess;
Matt Briggs 40:2ec4be320961 270 }
Matt Briggs 40:2ec4be320961 271 CmdResult BaseboardIO::relayAlert()
Matt Briggs 40:2ec4be320961 272 {
Matt Briggs 48:bab9f747d9ed 273 if (isCCNO()) { // Normally Open
Matt Briggs 44:ece6330e9b57 274 return closeRelay();
Matt Briggs 44:ece6330e9b57 275 }
Matt Briggs 44:ece6330e9b57 276 else { // Normally Close
Matt Briggs 44:ece6330e9b57 277 return openRelay();
Matt Briggs 44:ece6330e9b57 278 }
Matt Briggs 40:2ec4be320961 279 }
Matt Briggs 40:2ec4be320961 280 CmdResult BaseboardIO::relayNormal()
Matt Briggs 40:2ec4be320961 281 {
Matt Briggs 48:bab9f747d9ed 282 if (isCCNO()) { // Normally Open
Matt Briggs 44:ece6330e9b57 283 return openRelay();
Matt Briggs 44:ece6330e9b57 284 }
Matt Briggs 44:ece6330e9b57 285 else { // Normally Close
Matt Briggs 44:ece6330e9b57 286 return closeRelay();
Matt Briggs 44:ece6330e9b57 287 }
Matt Briggs 40:2ec4be320961 288 }
Matt Briggs 40:2ec4be320961 289
Matt Briggs 40:2ec4be320961 290 // Future
Matt Briggs 40:2ec4be320961 291 CmdResult BaseboardIO::serialRx(bool enable)
Matt Briggs 40:2ec4be320961 292 {
Matt Briggs 44:ece6330e9b57 293 uint8_t val;
Matt Briggs 49:18f1354f9e51 294 if (mPortEx0 == NULL) {
Matt Briggs 49:18f1354f9e51 295 logError("Error enabling 232. Port expanders not initialized.");
Matt Briggs 49:18f1354f9e51 296 return cmdError;
Matt Briggs 49:18f1354f9e51 297 }
Matt Briggs 53:a1563574a980 298 mPortEx0->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 299
Matt Briggs 44:ece6330e9b57 300 // Active low from port expander -> pmos -> 232 (active chip EN)
Matt Briggs 44:ece6330e9b57 301 if (enable) {
Matt Briggs 44:ece6330e9b57 302 val &= ~pEx0232En;
Matt Briggs 44:ece6330e9b57 303 }
Matt Briggs 44:ece6330e9b57 304 else {
Matt Briggs 44:ece6330e9b57 305 val |= pEx0232En;
Matt Briggs 44:ece6330e9b57 306 }
Matt Briggs 44:ece6330e9b57 307
Matt Briggs 53:a1563574a980 308 if (mPortEx0->pioLogicReliableWrite(val | ~pEx0OutMask) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 309 logError("Error enabling 232");
Matt Briggs 44:ece6330e9b57 310 return cmdError;
Matt Briggs 44:ece6330e9b57 311 }
Matt Briggs 44:ece6330e9b57 312 return cmdSuccess;
Matt Briggs 44:ece6330e9b57 313 }
Matt Briggs 44:ece6330e9b57 314 CmdResult BaseboardIO::serialTx(bool enable)
Matt Briggs 44:ece6330e9b57 315 {
Matt Briggs 44:ece6330e9b57 316 uint8_t val;
Matt Briggs 49:18f1354f9e51 317 if (mPortEx0 == NULL) {
Matt Briggs 49:18f1354f9e51 318 logError("Error enabling 232 TX. Port expanders not initialized.");
Matt Briggs 49:18f1354f9e51 319 return cmdError;
Matt Briggs 49:18f1354f9e51 320 }
Matt Briggs 53:a1563574a980 321 mPortEx0->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 322
Matt Briggs 44:ece6330e9b57 323 // Active high tx disable therefore active low tx enable (note chip must also be enabled for TX)
Matt Briggs 44:ece6330e9b57 324 if (enable) {
Matt Briggs 44:ece6330e9b57 325 val &= ~pEx0232TxDis;
Matt Briggs 44:ece6330e9b57 326 }
Matt Briggs 44:ece6330e9b57 327 else {
Matt Briggs 44:ece6330e9b57 328 val |= pEx0232TxDis;
Matt Briggs 44:ece6330e9b57 329 }
Matt Briggs 44:ece6330e9b57 330
Matt Briggs 53:a1563574a980 331 if (mPortEx0->pioLogicReliableWrite(val | ~pEx0OutMask) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 332 logError("Error enabling 232 TX");
Matt Briggs 44:ece6330e9b57 333 return cmdError;
Matt Briggs 44:ece6330e9b57 334 }
Matt Briggs 44:ece6330e9b57 335 return cmdSuccess;
Matt Briggs 44:ece6330e9b57 336 }
Matt Briggs 44:ece6330e9b57 337
Matt Briggs 44:ece6330e9b57 338 // private
Matt Briggs 44:ece6330e9b57 339 CmdResult BaseboardIO::readInfoFromNVM()
Matt Briggs 44:ece6330e9b57 340 {
Matt Briggs 55:79ab0bbc5008 341 bool nvmReadResult;
Matt Briggs 55:79ab0bbc5008 342 uint8_t *data = new uint8_t [BASEBOARDIO_NVM_SIZE];
Matt Briggs 55:79ab0bbc5008 343
Matt Briggs 55:79ab0bbc5008 344 nvmReadResult = dot->nvmRead(BASEBOARDIO_NVM_START_ADDR, data, BASEBOARDIO_NVM_SIZE);
Matt Briggs 55:79ab0bbc5008 345 if (!nvmReadResult) {
Matt Briggs 55:79ab0bbc5008 346 delete [] data;
Matt Briggs 55:79ab0bbc5008 347 return cmdError;
Matt Briggs 55:79ab0bbc5008 348 }
Matt Briggs 55:79ab0bbc5008 349 mNvmObj.fromBytes(data, BASEBOARDIO_NVM_SIZE);
Matt Briggs 55:79ab0bbc5008 350 delete [] data;
Matt Briggs 55:79ab0bbc5008 351 if (!mNvmObj.validBaseboardIOFlag()) {
Matt Briggs 55:79ab0bbc5008 352 logWarning("Invalid BaseboardIO Flag. Using default values.");
Matt Briggs 55:79ab0bbc5008 353 return cmdError;
Matt Briggs 55:79ab0bbc5008 354 }
Matt Briggs 55:79ab0bbc5008 355 else if (!mNvmObj.validBaseboardIORev()) {
Matt Briggs 55:79ab0bbc5008 356 logWarning("Invalid BaseboardIO Rev. Using default values.");
Matt Briggs 55:79ab0bbc5008 357 return cmdError;
Matt Briggs 55:79ab0bbc5008 358 }
Matt Briggs 55:79ab0bbc5008 359 else {
Matt Briggs 55:79ab0bbc5008 360 return cmdSuccess;
Matt Briggs 55:79ab0bbc5008 361 }
Matt Briggs 40:2ec4be320961 362 }
Matt Briggs 44:ece6330e9b57 363 CmdResult BaseboardIO::writeInfoToNVM()
Matt Briggs 40:2ec4be320961 364 {
Matt Briggs 55:79ab0bbc5008 365 uint8_t *data = new uint8_t [BASEBOARDIO_NVM_SIZE];
Matt Briggs 55:79ab0bbc5008 366 uint8_t size = BASEBOARDIO_NVM_SIZE;
Matt Briggs 55:79ab0bbc5008 367 mNvmObj.toBytes(data, size);
Matt Briggs 55:79ab0bbc5008 368 dot->nvmWrite(BASEBOARDIO_NVM_START_ADDR, data, BASEBOARDIO_NVM_SIZE);
Matt Briggs 55:79ab0bbc5008 369
Matt Briggs 55:79ab0bbc5008 370 delete [] data;
Matt Briggs 55:79ab0bbc5008 371 return cmdSuccess;
Matt Briggs 40:2ec4be320961 372 }
Matt Briggs 44:ece6330e9b57 373 CmdResult BaseboardIO::identifyPortExpanders()
Matt Briggs 44:ece6330e9b57 374 {
Matt Briggs 44:ece6330e9b57 375 uint8_t addr[8];
Matt Briggs 44:ece6330e9b57 376 uint8_t result;
Matt Briggs 49:18f1354f9e51 377 int i;
Matt Briggs 40:2ec4be320961 378
Matt Briggs 44:ece6330e9b57 379 // Search Bus
Matt Briggs 44:ece6330e9b57 380 logInfo("Starting OneWire Search");
Matt Briggs 49:18f1354f9e51 381 enableSwitchedIO();
Matt Briggs 49:18f1354f9e51 382 for (int j=0;j<10;j++) { // Try 5 times
Matt Briggs 49:18f1354f9e51 383 i=0;
Matt Briggs 49:18f1354f9e51 384 mOWMaster.reset();
Matt Briggs 49:18f1354f9e51 385 mOWMaster.reset_search();
Matt Briggs 49:18f1354f9e51 386 wait(1.0);
Matt Briggs 49:18f1354f9e51 387 while (true) {
Matt Briggs 49:18f1354f9e51 388 // TODO maybe change to family based search
Matt Briggs 49:18f1354f9e51 389 result = mOWMaster.search(addr);
Matt Briggs 49:18f1354f9e51 390 if (result != 1) {
Matt Briggs 49:18f1354f9e51 391 break;
Matt Briggs 49:18f1354f9e51 392 }
Matt Briggs 49:18f1354f9e51 393 logInfo("ROM Addr: %02x:%02x:%02x:%02x:%02x:%02x:%02x%02x found.",
Matt Briggs 49:18f1354f9e51 394 addr[7],addr[6],addr[5],addr[4],addr[3],addr[2],addr[1],addr[0]);
Matt Briggs 49:18f1354f9e51 395 if (i == 0) {
Matt Briggs 55:79ab0bbc5008 396 std::memcpy(mNvmObj.mPortExpanderROM0, addr, sizeof(mNvmObj.mPortExpanderROM0));
Matt Briggs 49:18f1354f9e51 397 }
Matt Briggs 49:18f1354f9e51 398 else if (i == 1) {
Matt Briggs 55:79ab0bbc5008 399 std::memcpy(mNvmObj.mPortExpanderROM1, addr, sizeof(mNvmObj.mPortExpanderROM1));
Matt Briggs 49:18f1354f9e51 400 }
Matt Briggs 49:18f1354f9e51 401 i++;
Matt Briggs 49:18f1354f9e51 402 }
Matt Briggs 49:18f1354f9e51 403 // TODO maybe only allow a reasonable number of Port Expanders
Matt Briggs 49:18f1354f9e51 404 if (i >=2) {
Matt Briggs 44:ece6330e9b57 405 break;
Matt Briggs 44:ece6330e9b57 406 }
Matt Briggs 44:ece6330e9b57 407 }
Matt Briggs 44:ece6330e9b57 408
Matt Briggs 44:ece6330e9b57 409 logInfo("Finished OneWire Search");
Matt Briggs 44:ece6330e9b57 410 if (i != 2) {
Matt Briggs 48:bab9f747d9ed 411 logError("Incorrect Number of OneWire devices (Got %d. Expected 2) OneWire port expanders found.", i);
Matt Briggs 44:ece6330e9b57 412 return cmdError;
Matt Briggs 44:ece6330e9b57 413 }
Matt Briggs 44:ece6330e9b57 414
Matt Briggs 49:18f1354f9e51 415 // All rotary switches should be at 0. DIPS should be asserted.
Matt Briggs 44:ece6330e9b57 416 // If switches are set in factory default mode then port expander 1 should read 0xFF and
Matt Briggs 44:ece6330e9b57 417 // port expander 2 should read 0xF0.
Matt Briggs 40:2ec4be320961 418
Matt Briggs 55:79ab0bbc5008 419 mPortEx0 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM0);
Matt Briggs 55:79ab0bbc5008 420 mPortEx1 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM1);
Matt Briggs 44:ece6330e9b57 421
Matt Briggs 49:18f1354f9e51 422
Matt Briggs 49:18f1354f9e51 423 enableSwitchedIO();
Matt Briggs 53:a1563574a980 424 if (mPortEx0->pioLogicReliableRead(mPortExpanderVal0) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 425 logError("Error during port expander ID. Read failed.");
Matt Briggs 49:18f1354f9e51 426 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 427 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 428 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 429 return cmdError;
Matt Briggs 44:ece6330e9b57 430 }
Matt Briggs 53:a1563574a980 431 if (mPortEx1->pioLogicReliableRead(mPortExpanderVal1) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 432 logError("Error during port expander ID. Read failed.");
Matt Briggs 49:18f1354f9e51 433 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 434 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 435 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 436 return cmdError;
Matt Briggs 44:ece6330e9b57 437 }
Matt Briggs 44:ece6330e9b57 438
Matt Briggs 49:18f1354f9e51 439 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 440 if ((mPortExpanderVal0 == 0xFF) and (mPortExpanderVal1 == 0xF0)) { // Luckily got it right
Matt Briggs 44:ece6330e9b57 441 logInfo("ROMS Swap Not Needed.");
Matt Briggs 44:ece6330e9b57 442 }
Matt Briggs 44:ece6330e9b57 443 else if ((mPortExpanderVal0 == 0xF0) and (mPortExpanderVal1 == 0xFF)) { // Just need to swap
Matt Briggs 55:79ab0bbc5008 444 std::memcpy(addr, mNvmObj.mPortExpanderROM0, sizeof(addr)); // Store Orig ROM0 -> addr
Matt Briggs 55:79ab0bbc5008 445 std::memcpy(mNvmObj.mPortExpanderROM0, mNvmObj.mPortExpanderROM1, sizeof(mNvmObj.mPortExpanderROM0)); // Store Orig ROM1 -> ROM0
Matt Briggs 55:79ab0bbc5008 446 std::memcpy(mNvmObj.mPortExpanderROM1, addr, sizeof(mNvmObj.mPortExpanderROM1)); // Store Orig ROM0 (addr) -> ROM1
Matt Briggs 44:ece6330e9b57 447 logInfo("Swapped ROMS.");
Matt Briggs 44:ece6330e9b57 448 }
Matt Briggs 44:ece6330e9b57 449 else {
Matt Briggs 49:18f1354f9e51 450 logError("Error during port expander ID. Port expanders not in "
Matt Briggs 55:79ab0bbc5008 451 "expected states (0xFF and 0xF0). Check user switches. Got %02X and %02X",
Matt Briggs 49:18f1354f9e51 452 mPortExpanderVal0, mPortExpanderVal1);
Matt Briggs 44:ece6330e9b57 453 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 454 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 455 return cmdError;
Matt Briggs 44:ece6330e9b57 456 }
Matt Briggs 44:ece6330e9b57 457
Matt Briggs 44:ece6330e9b57 458 // Cleanup
Matt Briggs 44:ece6330e9b57 459 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 460 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 461
Matt Briggs 44:ece6330e9b57 462 return cmdSuccess;
Matt Briggs 40:2ec4be320961 463 }
Matt Briggs 49:18f1354f9e51 464 CmdResult BaseboardIO::openRelay() {
Matt Briggs 44:ece6330e9b57 465 uint8_t val;
Matt Briggs 53:a1563574a980 466 mPortEx1->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 467
Matt Briggs 49:18f1354f9e51 468 val |= pEx1RlyA; // Make sure Relay A is off
Matt Briggs 49:18f1354f9e51 469 val &= ~pEx1RlyB; // Turn on Relay B
Matt Briggs 44:ece6330e9b57 470
Matt Briggs 53:a1563574a980 471 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 472 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 473 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 53:a1563574a980 474 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask); // Write a non assert value just to try to overcome an error
Matt Briggs 44:ece6330e9b57 475 logError ("Error turning on coil. Turning both coils off.");
Matt Briggs 44:ece6330e9b57 476 return cmdError;
Matt Briggs 44:ece6330e9b57 477 }
Matt Briggs 44:ece6330e9b57 478
Matt Briggs 47:a68747642a7a 479 wait(COIL_ON_TIME);
Matt Briggs 44:ece6330e9b57 480
Matt Briggs 49:18f1354f9e51 481 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 482 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 44:ece6330e9b57 483
Matt Briggs 53:a1563574a980 484 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 53:a1563574a980 485 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask);
Matt Briggs 44:ece6330e9b57 486 logError ("Error turning off coils. Trying again.");
Matt Briggs 44:ece6330e9b57 487 return cmdError;
Matt Briggs 44:ece6330e9b57 488 }
Matt Briggs 44:ece6330e9b57 489
Matt Briggs 44:ece6330e9b57 490 return cmdSuccess;
Matt Briggs 40:2ec4be320961 491 }
Matt Briggs 49:18f1354f9e51 492 CmdResult BaseboardIO::closeRelay() {
Matt Briggs 44:ece6330e9b57 493 uint8_t val;
Matt Briggs 53:a1563574a980 494 mPortEx1->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 495
Matt Briggs 49:18f1354f9e51 496 val &= ~pEx1RlyA; // Turn on Relay A
Matt Briggs 49:18f1354f9e51 497 val |= pEx1RlyB; // Make sure Relay B is off
Matt Briggs 44:ece6330e9b57 498
Matt Briggs 53:a1563574a980 499 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 500 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 501 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 53:a1563574a980 502 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask); // Write a non assert value just to try to overcome an error
Matt Briggs 44:ece6330e9b57 503 logError ("Error turning on coil. Turning both coils off.");
Matt Briggs 44:ece6330e9b57 504 return cmdError;
Matt Briggs 44:ece6330e9b57 505 }
Matt Briggs 44:ece6330e9b57 506
Matt Briggs 47:a68747642a7a 507 wait(COIL_ON_TIME);
Matt Briggs 44:ece6330e9b57 508
Matt Briggs 49:18f1354f9e51 509 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 510 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 44:ece6330e9b57 511
Matt Briggs 53:a1563574a980 512 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 53:a1563574a980 513 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask);
Matt Briggs 44:ece6330e9b57 514 logError ("Error turning off coils. Trying again.");
Matt Briggs 44:ece6330e9b57 515 return cmdError;
Matt Briggs 44:ece6330e9b57 516 }
Matt Briggs 44:ece6330e9b57 517
Matt Briggs 44:ece6330e9b57 518 return cmdSuccess;
Matt Briggs 40:2ec4be320961 519 }
Matt Briggs 55:79ab0bbc5008 520
Matt Briggs 58:15aa7a785b9f 521 CmdResult BaseboardIO::prepareSleep()
Matt Briggs 58:15aa7a785b9f 522 {
Matt Briggs 58:15aa7a785b9f 523 // Save current GPUIO state
Matt Briggs 58:15aa7a785b9f 524 xdot_save_gpio_state();
Matt Briggs 58:15aa7a785b9f 525
Matt Briggs 58:15aa7a785b9f 526 // Configure all IO expect for pins for interrupt in lowest mode possible
Matt Briggs 58:15aa7a785b9f 527 // GPIO Ports Clock Enable
Matt Briggs 58:15aa7a785b9f 528 __GPIOA_CLK_ENABLE();
Matt Briggs 58:15aa7a785b9f 529 __GPIOB_CLK_ENABLE();
Matt Briggs 58:15aa7a785b9f 530 __GPIOC_CLK_ENABLE();
Matt Briggs 58:15aa7a785b9f 531 __GPIOH_CLK_ENABLE();
Matt Briggs 58:15aa7a785b9f 532
Matt Briggs 58:15aa7a785b9f 533 GPIO_InitTypeDef GPIO_InitStruct;
Matt Briggs 58:15aa7a785b9f 534
Matt Briggs 58:15aa7a785b9f 535 // UART1_TX, UART1_RTS & UART1_CTS to analog nopull - RX could be a wakeup source
Matt Briggs 58:15aa7a785b9f 536 // UART1_TX, UART1_RTS & UART1_CTS to analog nopull - RX could be a wakeup source
Matt Briggs 58:15aa7a785b9f 537 // GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_11 | GPIO_PIN_12;
Matt Briggs 58:15aa7a785b9f 538 GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_12;
Matt Briggs 58:15aa7a785b9f 539 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 540 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 541 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 542
Matt Briggs 58:15aa7a785b9f 543 // I2C_SDA & I2C_SCL to analog nopull
Matt Briggs 58:15aa7a785b9f 544 GPIO_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9;
Matt Briggs 58:15aa7a785b9f 545 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 546 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 547 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 548
Matt Briggs 58:15aa7a785b9f 549 // SPI_MOSI, SPI_MISO, SPI_SCK, & SPI_NSS to analog nopull
Matt Briggs 58:15aa7a785b9f 550 GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
Matt Briggs 58:15aa7a785b9f 551 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 552 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 553 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 554
Matt Briggs 58:15aa7a785b9f 555 // iterate through potential wake pins - leave the configured wake pin alone if one is needed
Matt Briggs 58:15aa7a785b9f 556 if ((CCInPinName != WAKE && TamperPinName != WAKE && PairBtnPinName != WAKE)
Matt Briggs 58:15aa7a785b9f 557 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 558 GPIO_InitStruct.Pin = GPIO_PIN_0;
Matt Briggs 58:15aa7a785b9f 559 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 560 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 561 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 562 }
Matt Briggs 58:15aa7a785b9f 563 if ((CCInPinName != GPIO0 && TamperPinName != GPIO0 && PairBtnPinName != GPIO0)
Matt Briggs 58:15aa7a785b9f 564 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 565 GPIO_InitStruct.Pin = GPIO_PIN_4;
Matt Briggs 58:15aa7a785b9f 566 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 567 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 568 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 569 }
Matt Briggs 58:15aa7a785b9f 570 if ((CCInPinName != GPIO1 && TamperPinName != GPIO1 && PairBtnPinName != GPIO1)
Matt Briggs 58:15aa7a785b9f 571 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 572 GPIO_InitStruct.Pin = GPIO_PIN_5;
Matt Briggs 58:15aa7a785b9f 573 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 574 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 575 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 576 }
Matt Briggs 58:15aa7a785b9f 577 if ((CCInPinName != GPIO2 && TamperPinName != GPIO2 && PairBtnPinName != GPIO2)
Matt Briggs 58:15aa7a785b9f 578 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 579 GPIO_InitStruct.Pin = GPIO_PIN_0;
Matt Briggs 58:15aa7a785b9f 580 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 581 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 582 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 583 }
Matt Briggs 58:15aa7a785b9f 584 if ((CCInPinName != GPIO3 && TamperPinName != GPIO3 && PairBtnPinName != GPIO3)
Matt Briggs 58:15aa7a785b9f 585 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 586 GPIO_InitStruct.Pin = GPIO_PIN_2;
Matt Briggs 58:15aa7a785b9f 587 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 588 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 589 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 590 }
Matt Briggs 58:15aa7a785b9f 591 if ((CCInPinName != UART1_RX && TamperPinName != UART1_RX && PairBtnPinName != UART1_RX)
Matt Briggs 58:15aa7a785b9f 592 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 593 GPIO_InitStruct.Pin = GPIO_PIN_10;
Matt Briggs 58:15aa7a785b9f 594 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 595 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 596 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 597 }
Matt Briggs 58:15aa7a785b9f 598 if ((CCInPinName != UART_CTS && TamperPinName != UART_CTS && PairBtnPinName != UART_CTS)
Matt Briggs 58:15aa7a785b9f 599 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 600 GPIO_InitStruct.Pin = GPIO_PIN_11;
Matt Briggs 58:15aa7a785b9f 601 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 602 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 603 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 604 }
Matt Briggs 58:15aa7a785b9f 605
Matt Briggs 58:15aa7a785b9f 606 return cmdSuccess;
Matt Briggs 58:15aa7a785b9f 607 }
Matt Briggs 58:15aa7a785b9f 608
Matt Briggs 58:15aa7a785b9f 609 CmdResult BaseboardIO::exitSleep()
Matt Briggs 58:15aa7a785b9f 610 {
Matt Briggs 58:15aa7a785b9f 611 xdot_restore_gpio_state();
Matt Briggs 58:15aa7a785b9f 612 return cmdSuccess;
Matt Briggs 58:15aa7a785b9f 613 }
Matt Briggs 58:15aa7a785b9f 614
Matt Briggs 55:79ab0bbc5008 615 // NvmBBIOObj
Matt Briggs 55:79ab0bbc5008 616 NvmBBIOObj::NvmBBIOObj()
Matt Briggs 55:79ab0bbc5008 617 {
Matt Briggs 55:79ab0bbc5008 618 setDefaults();
Matt Briggs 55:79ab0bbc5008 619 }
Matt Briggs 55:79ab0bbc5008 620 void NvmBBIOObj::setDefaults()
Matt Briggs 55:79ab0bbc5008 621 {
Matt Briggs 55:79ab0bbc5008 622 mBaseboardIOFlag = BASEBOARDIO_FLAG;
Matt Briggs 55:79ab0bbc5008 623 mBaseboardIORev = BASEBOARDIO_REV;
Matt Briggs 55:79ab0bbc5008 624 mSerialNum = 0x0000;
Matt Briggs 55:79ab0bbc5008 625 mBaseboardIOConfig = 0x0000;
Matt Briggs 55:79ab0bbc5008 626 std::memset(mPortExpanderROM0, 0x00, 8);
Matt Briggs 55:79ab0bbc5008 627 std::memset(mPortExpanderROM1, 0x00, 8);
Matt Briggs 55:79ab0bbc5008 628 }
Matt Briggs 55:79ab0bbc5008 629 CmdResult NvmBBIOObj::fromBytes(uint8_t *data, uint8_t size)
Matt Briggs 55:79ab0bbc5008 630 {
Matt Briggs 55:79ab0bbc5008 631 if (size != BASEBOARDIO_NVM_SIZE) {
Matt Briggs 55:79ab0bbc5008 632 return cmdError;
Matt Briggs 55:79ab0bbc5008 633 }
Matt Briggs 55:79ab0bbc5008 634
Matt Briggs 55:79ab0bbc5008 635 mBaseboardIOFlag = *((uint16_t *) (data));
Matt Briggs 55:79ab0bbc5008 636 mBaseboardIORev = *((uint16_t *) (data+2));
Matt Briggs 55:79ab0bbc5008 637 mSerialNum = *((uint32_t *) (data+4));
Matt Briggs 55:79ab0bbc5008 638 mBaseboardIOConfig = *((uint32_t *) (data+6));
Matt Briggs 55:79ab0bbc5008 639
Matt Briggs 55:79ab0bbc5008 640 std::memcpy(&mPortExpanderROM0, data+0x10, 8);
Matt Briggs 55:79ab0bbc5008 641 std::memcpy(&mPortExpanderROM1, data+0x18, 8);
Matt Briggs 55:79ab0bbc5008 642
Matt Briggs 55:79ab0bbc5008 643 return cmdSuccess;
Matt Briggs 55:79ab0bbc5008 644 }
Matt Briggs 55:79ab0bbc5008 645 CmdResult NvmBBIOObj::toBytes(uint8_t *data, uint8_t &size) {
Matt Briggs 55:79ab0bbc5008 646 // TODO check data size
Matt Briggs 55:79ab0bbc5008 647
Matt Briggs 55:79ab0bbc5008 648 *((uint16_t *) (data)) = mBaseboardIOFlag;
Matt Briggs 55:79ab0bbc5008 649 *((uint16_t *) (data+2)) = mBaseboardIORev;
Matt Briggs 55:79ab0bbc5008 650 *((uint32_t *) (data+4)) = mSerialNum;
Matt Briggs 55:79ab0bbc5008 651 *((uint32_t *) (data+6)) = mBaseboardIOConfig;
Matt Briggs 55:79ab0bbc5008 652
Matt Briggs 55:79ab0bbc5008 653 std::memcpy(data+0x10, &mPortExpanderROM0, 8);
Matt Briggs 55:79ab0bbc5008 654 std::memcpy(data+0x18, &mPortExpanderROM1, 8);
Matt Briggs 55:79ab0bbc5008 655
Matt Briggs 55:79ab0bbc5008 656 size = BASEBOARDIO_NVM_SIZE;
Matt Briggs 55:79ab0bbc5008 657
Matt Briggs 55:79ab0bbc5008 658 return cmdSuccess;
Matt Briggs 55:79ab0bbc5008 659 }
Matt Briggs 55:79ab0bbc5008 660 uint16_t NvmBBIOObj::getBaseboardIOFlag()
Matt Briggs 55:79ab0bbc5008 661 {
Matt Briggs 55:79ab0bbc5008 662 return mBaseboardIOFlag;
Matt Briggs 55:79ab0bbc5008 663 }
Matt Briggs 55:79ab0bbc5008 664 bool NvmBBIOObj::validBaseboardIOFlag()
Matt Briggs 55:79ab0bbc5008 665 {
Matt Briggs 55:79ab0bbc5008 666 return mBaseboardIOFlag == BASEBOARDIO_FLAG;
Matt Briggs 55:79ab0bbc5008 667 }
Matt Briggs 55:79ab0bbc5008 668 uint16_t NvmBBIOObj::getBaseboardIORev()
Matt Briggs 55:79ab0bbc5008 669 {
Matt Briggs 55:79ab0bbc5008 670 return mBaseboardIORev;
Matt Briggs 55:79ab0bbc5008 671 }
Matt Briggs 55:79ab0bbc5008 672 bool NvmBBIOObj::validBaseboardIORev()
Matt Briggs 55:79ab0bbc5008 673 {
Matt Briggs 55:79ab0bbc5008 674 return mBaseboardIORev == BASEBOARDIO_REV;
Matt Briggs 55:79ab0bbc5008 675 }
Matt Briggs 55:79ab0bbc5008 676 uint16_t NvmBBIOObj::getSerialNum()
Matt Briggs 55:79ab0bbc5008 677 {
Matt Briggs 55:79ab0bbc5008 678 return mSerialNum;
Matt Briggs 55:79ab0bbc5008 679 }
Matt Briggs 55:79ab0bbc5008 680 void NvmBBIOObj::setSerialNum(uint16_t in)
Matt Briggs 55:79ab0bbc5008 681 {
Matt Briggs 55:79ab0bbc5008 682 mSerialNum = in;
Matt Briggs 55:79ab0bbc5008 683 }
Matt Briggs 55:79ab0bbc5008 684 uint32_t NvmBBIOObj::getBaseboardIOConfig()
Matt Briggs 55:79ab0bbc5008 685 {
Matt Briggs 55:79ab0bbc5008 686 return mBaseboardIOConfig;
Matt Briggs 55:79ab0bbc5008 687 }
Matt Briggs 55:79ab0bbc5008 688 void NvmBBIOObj::setBaseboardIOConfig(uint32_t in)
Matt Briggs 55:79ab0bbc5008 689 {
Matt Briggs 55:79ab0bbc5008 690 mBaseboardIOConfig = in;
Matt Briggs 55:79ab0bbc5008 691 }
Matt Briggs 55:79ab0bbc5008 692 void NvmBBIOObj::getPortExpanderROM0(uint8_t *addr)
Matt Briggs 55:79ab0bbc5008 693 {
Matt Briggs 55:79ab0bbc5008 694 std::memcpy(addr, &mPortExpanderROM0, 8);
Matt Briggs 55:79ab0bbc5008 695 }
Matt Briggs 55:79ab0bbc5008 696 void NvmBBIOObj::setPortExpanderROM0(const uint8_t *addr)
Matt Briggs 55:79ab0bbc5008 697 {
Matt Briggs 55:79ab0bbc5008 698 std::memcpy(&mPortExpanderROM0, addr, 8);
Matt Briggs 55:79ab0bbc5008 699 }
Matt Briggs 55:79ab0bbc5008 700 void NvmBBIOObj::getPortExpanderROM1(uint8_t *addr)
Matt Briggs 55:79ab0bbc5008 701 {
Matt Briggs 55:79ab0bbc5008 702 std::memcpy(addr, &mPortExpanderROM1, 8);
Matt Briggs 55:79ab0bbc5008 703 }
Matt Briggs 55:79ab0bbc5008 704 void NvmBBIOObj::setPortExpanderROM1(const uint8_t *addr)
Matt Briggs 55:79ab0bbc5008 705 {
Matt Briggs 55:79ab0bbc5008 706 std::memcpy(&mPortExpanderROM1, addr, 8);
Matt Briggs 55:79ab0bbc5008 707 }