Matt Briggs / Mbed OS xDotBridge_update_dev_latest

Fork to see if I can get working

Dependencies:   BufferedSerial OneWire WinbondSPIFlash libxDot-dev-mbed5-deprecated

Fork of xDotBridge_update_test20180823 by Matt Briggs

xDotBridge/src/BaseboardIO.cpp@61:8d9efd33cac9, 2017-03-09 (annotated)

Committer:
Matt Briggs
Date:
Thu Mar 09 16:47:42 2017 -0700
Revision:
61:8d9efd33cac9
Parent:
60:5179449a684f
Child:
62:9751a8504c82
Slight modification of pair code and documentation.  Also some test code to all xDot dev boards to act like bridges.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Matt Briggs 40:2ec4be320961 1 /*
Matt Briggs 40:2ec4be320961 2 * baseboardIO.cpp
Matt Briggs 40:2ec4be320961 3 *
Matt Briggs 40:2ec4be320961 4 * Created on: Jan 25, 2017
Matt Briggs 40:2ec4be320961 5 * Author: mbriggs
Matt Briggs 40:2ec4be320961 6 */
Matt Briggs 40:2ec4be320961 7
Matt Briggs 40:2ec4be320961 8 #include "BaseboardIO.h"
Matt Briggs 41:9ef4c4d77711 9 #include "MTSLog.h"
Matt Briggs 55:79ab0bbc5008 10 #include "dot_util.h" // FIXME just need the reference to dot somehow
Matt Briggs 58:15aa7a785b9f 11 #include "xdot_low_power.h"
Matt Briggs 40:2ec4be320961 12
Matt Briggs 61:8d9efd33cac9 13 // Original
Matt Briggs 61:8d9efd33cac9 14 const float COIL_ON_TIME = 0.060; // 30 ms
Matt Briggs 61:8d9efd33cac9 15 // Test
Matt Briggs 61:8d9efd33cac9 16 //const float COIL_ON_TIME = 0.30; // 300 ms
Matt Briggs 61:8d9efd33cac9 17
Matt Briggs 44:ece6330e9b57 18
Matt Briggs 49:18f1354f9e51 19 // Port expander 0 (Currently U7)
Matt Briggs 44:ece6330e9b57 20 const uint8_t pEx0232En = 0x01;
Matt Briggs 44:ece6330e9b57 21 const uint8_t pEx0232TxDis = 0x02;
Matt Briggs 44:ece6330e9b57 22 const uint8_t pEx0Rot1B1 = 0x04;
Matt Briggs 44:ece6330e9b57 23 const uint8_t pEx0Rot1B2 = 0x08;
Matt Briggs 44:ece6330e9b57 24 const uint8_t pEx0Rot1B4 = 0x10;
Matt Briggs 44:ece6330e9b57 25 const uint8_t pEx0Rot1B8 = 0x20;
Matt Briggs 44:ece6330e9b57 26 const uint8_t pEx0Rot2B1 = 0x40;
Matt Briggs 44:ece6330e9b57 27 const uint8_t pEx0Rot2B2 = 0x80;
Matt Briggs 49:18f1354f9e51 28 const uint8_t pEx0OutMask = 0x03; // Only allow bits 0,1 to be changed
Matt Briggs 44:ece6330e9b57 29
Matt Briggs 49:18f1354f9e51 30 // Port expander 1 (Currently U8)
Matt Briggs 44:ece6330e9b57 31 const uint8_t pEx1NoNcSel = 0x01;
Matt Briggs 44:ece6330e9b57 32 const uint8_t pEx1RxTxSel = 0x02;
Matt Briggs 44:ece6330e9b57 33 const uint8_t pEx1WanSel = 0x04;
Matt Briggs 44:ece6330e9b57 34 const uint8_t pEx1SerialEn = 0x08; // Labeled as reserved
Matt Briggs 44:ece6330e9b57 35 const uint8_t pEx1Rot2B8 = 0x10;
Matt Briggs 44:ece6330e9b57 36 const uint8_t pEx1Rot2B4 = 0x20;
Matt Briggs 44:ece6330e9b57 37 const uint8_t pEx1RlyB = 0x40; // This is actually a coil
Matt Briggs 44:ece6330e9b57 38 const uint8_t pEx1RlyA = 0x80; // This is actually a coil
Matt Briggs 49:18f1354f9e51 39 const uint8_t pEx1OutMask = 0xC0; // Only allow bits 6,7 to be changed
Matt Briggs 44:ece6330e9b57 40
Matt Briggs 44:ece6330e9b57 41 /**
Matt Briggs 44:ece6330e9b57 42 * Note for interrupt within uC cannot use two pins with the same numeric suffix (e.g. cannot
Matt Briggs 44:ece6330e9b57 43 * use both PA_0 and PB_0). Note 1, 6, 7, 8, and 13 are used by LoRa radio.
Matt Briggs 44:ece6330e9b57 44 */
Matt Briggs 44:ece6330e9b57 45
Matt Briggs 40:2ec4be320961 46 BaseboardIO::BaseboardIO()
Matt Briggs 58:15aa7a785b9f 47 : mOWMaster(OneWireMasterPinName),
Matt Briggs 58:15aa7a785b9f 48 mCCIn(CCInPinName),
Matt Briggs 58:15aa7a785b9f 49 mTamper(TamperPinName),
Matt Briggs 58:15aa7a785b9f 50 mPairBtn(PairBtnPinName),
Matt Briggs 58:15aa7a785b9f 51 mLed(LedPinName),
Matt Briggs 60:5179449a684f 52 mLrrLed(LrrLedPinName, 0),
Matt Briggs 58:15aa7a785b9f 53 mSwitchedIOCtrl(SwitchedIOCtrlPinName, 0)
Matt Briggs 40:2ec4be320961 54 {
Matt Briggs 44:ece6330e9b57 55 mPortExpanderVal0 = 0x00;
Matt Briggs 44:ece6330e9b57 56 mPortExpanderVal1 = 0x00;
Matt Briggs 44:ece6330e9b57 57
Matt Briggs 44:ece6330e9b57 58 mPortEx0 = NULL;
Matt Briggs 44:ece6330e9b57 59 mPortEx1 = NULL;
Matt Briggs 40:2ec4be320961 60 }
Matt Briggs 56:40b454c952cc 61 CmdResult BaseboardIO::init(bool overwriteNvm)
Matt Briggs 40:2ec4be320961 62 {
Matt Briggs 56:40b454c952cc 63 bool storedROMsGood = false;
Matt Briggs 56:40b454c952cc 64 uint8_t val;
Matt Briggs 44:ece6330e9b57 65 // Setup port expanders
Matt Briggs 56:40b454c952cc 66 if (readInfoFromNVM() == cmdSuccess && !overwriteNvm) {
Matt Briggs 55:79ab0bbc5008 67 logInfo("Stored ROM0 Addr: %02x:%02x:%02x:%02x:%02x:%02x:%02x%02x found.",
Matt Briggs 55:79ab0bbc5008 68 mNvmObj.mPortExpanderROM0[7],
Matt Briggs 55:79ab0bbc5008 69 mNvmObj.mPortExpanderROM0[6],
Matt Briggs 55:79ab0bbc5008 70 mNvmObj.mPortExpanderROM0[5],
Matt Briggs 55:79ab0bbc5008 71 mNvmObj.mPortExpanderROM0[4],
Matt Briggs 55:79ab0bbc5008 72 mNvmObj.mPortExpanderROM0[3],
Matt Briggs 55:79ab0bbc5008 73 mNvmObj.mPortExpanderROM0[2],
Matt Briggs 55:79ab0bbc5008 74 mNvmObj.mPortExpanderROM0[1],
Matt Briggs 55:79ab0bbc5008 75 mNvmObj.mPortExpanderROM0[0]);
Matt Briggs 55:79ab0bbc5008 76 logInfo("Stored ROM1 Addr: %02x:%02x:%02x:%02x:%02x:%02x:%02x%02x found.",
Matt Briggs 55:79ab0bbc5008 77 mNvmObj.mPortExpanderROM1[7],
Matt Briggs 55:79ab0bbc5008 78 mNvmObj.mPortExpanderROM1[6],
Matt Briggs 55:79ab0bbc5008 79 mNvmObj.mPortExpanderROM1[5],
Matt Briggs 55:79ab0bbc5008 80 mNvmObj.mPortExpanderROM1[4],
Matt Briggs 55:79ab0bbc5008 81 mNvmObj.mPortExpanderROM1[3],
Matt Briggs 55:79ab0bbc5008 82 mNvmObj.mPortExpanderROM1[2],
Matt Briggs 55:79ab0bbc5008 83 mNvmObj.mPortExpanderROM1[1],
Matt Briggs 55:79ab0bbc5008 84 mNvmObj.mPortExpanderROM1[0]);
Matt Briggs 55:79ab0bbc5008 85 logInfo("BaseboardIO parameters successfully loaded from NVM");
Matt Briggs 56:40b454c952cc 86 // Check that the ROM Addresses are correct and valid
Matt Briggs 56:40b454c952cc 87 uint8_t portEx0Ctrl, portEx1Ctrl;
Matt Briggs 56:40b454c952cc 88 mPortEx0 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM0);
Matt Briggs 56:40b454c952cc 89 mPortEx0->registerReadReliable(0x8D, portEx0Ctrl);
Matt Briggs 56:40b454c952cc 90 // Gets 0xFF if it is not the correct address
Matt Briggs 56:40b454c952cc 91 logInfo("PortEx0 Control register reads %02X", portEx0Ctrl);
Matt Briggs 56:40b454c952cc 92
Matt Briggs 56:40b454c952cc 93 mPortEx1 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM1);
Matt Briggs 56:40b454c952cc 94 mPortEx1->registerReadReliable(0x8D, portEx1Ctrl);
Matt Briggs 56:40b454c952cc 95 logInfo("PortEx1 Control register reads %02X", portEx1Ctrl);
Matt Briggs 56:40b454c952cc 96 if ((portEx0Ctrl == 0xFF) || (portEx1Ctrl == 0xFF)) {
Matt Briggs 56:40b454c952cc 97 logError("Stored port expander ROM check failed. Set EEPROM to defaults.");
Matt Briggs 56:40b454c952cc 98 }
Matt Briggs 56:40b454c952cc 99 else {
Matt Briggs 56:40b454c952cc 100 storedROMsGood = true;
Matt Briggs 56:40b454c952cc 101 }
Matt Briggs 44:ece6330e9b57 102 }
Matt Briggs 56:40b454c952cc 103 if (!storedROMsGood)
Matt Briggs 56:40b454c952cc 104 { // EEPROM values not there or corrupt. Should only happen in factory.
Matt Briggs 55:79ab0bbc5008 105 mNvmObj.setDefaults();
Matt Briggs 47:a68747642a7a 106 // Find ROM address and test which one is which. Requires user
Matt Briggs 47:a68747642a7a 107 // switches to be in known state.
Matt Briggs 47:a68747642a7a 108 if (identifyPortExpanders() != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 109 logError("Error identifying port expanders");
Matt Briggs 44:ece6330e9b57 110 return cmdError;
Matt Briggs 44:ece6330e9b57 111 }
Matt Briggs 55:79ab0bbc5008 112 if (writeInfoToNVM() == cmdSuccess) {
Matt Briggs 55:79ab0bbc5008 113 logInfo("Baseboard config saved to NVM");
Matt Briggs 55:79ab0bbc5008 114 }
Matt Briggs 55:79ab0bbc5008 115 else {
Matt Briggs 55:79ab0bbc5008 116 logError("Baseboard config failed to save to NVM");
Matt Briggs 55:79ab0bbc5008 117 }
Matt Briggs 56:40b454c952cc 118 mPortEx0 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM0);
Matt Briggs 56:40b454c952cc 119 mPortEx0->registerReadReliable(0x8D, val);
Matt Briggs 56:40b454c952cc 120 // Gets 0xFF if it is not the correct address
Matt Briggs 56:40b454c952cc 121 logInfo("PortEx0 Control register reads %02X", val);
Matt Briggs 56:40b454c952cc 122 mPortEx1 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM1);
Matt Briggs 56:40b454c952cc 123 mPortEx1->registerReadReliable(0x8D, val);
Matt Briggs 56:40b454c952cc 124 logInfo("PortEx1 Control register reads %02X", val);
Matt Briggs 44:ece6330e9b57 125 }
Matt Briggs 44:ece6330e9b57 126
Matt Briggs 57:bdac7dd17af2 127 if (sampleUserSwitches() != cmdSuccess) {
Matt Briggs 57:bdac7dd17af2 128 logError("Error sampling user switches");
Matt Briggs 57:bdac7dd17af2 129 return cmdError;
Matt Briggs 57:bdac7dd17af2 130 }
Matt Briggs 57:bdac7dd17af2 131
Matt Briggs 44:ece6330e9b57 132 // Put relay in known state
Matt Briggs 47:a68747642a7a 133 if (relayNormal() != cmdSuccess) {
Matt Briggs 47:a68747642a7a 134 logError("Error setting relay during init");
Matt Briggs 47:a68747642a7a 135 return cmdError;
Matt Briggs 47:a68747642a7a 136 }
Matt Briggs 60:5179449a684f 137 ledOff();
Matt Briggs 47:a68747642a7a 138
Matt Briggs 44:ece6330e9b57 139 logInfo("Baseboard IO initialization successful");
Matt Briggs 44:ece6330e9b57 140 return cmdSuccess;
Matt Briggs 40:2ec4be320961 141 }
Matt Briggs 40:2ec4be320961 142
Matt Briggs 40:2ec4be320961 143 // Registering for interrupts
Matt Briggs 44:ece6330e9b57 144 void BaseboardIO::regCCInInt(Callback<void()> func)
Matt Briggs 40:2ec4be320961 145 {
Matt Briggs 48:bab9f747d9ed 146 sampleUserSwitches();
Matt Briggs 48:bab9f747d9ed 147 if (isCCNO()) {
Matt Briggs 48:bab9f747d9ed 148 // Pulled high, switched low
Matt Briggs 48:bab9f747d9ed 149 mCCIn.fall(func);
Matt Briggs 48:bab9f747d9ed 150 }
Matt Briggs 48:bab9f747d9ed 151 else {
Matt Briggs 48:bab9f747d9ed 152 mCCIn.rise(func);
Matt Briggs 48:bab9f747d9ed 153 }
Matt Briggs 53:a1563574a980 154 mCCIn.mode(PullNone);
Matt Briggs 49:18f1354f9e51 155 mCCIn.enable_irq();
Matt Briggs 40:2ec4be320961 156 }
Matt Briggs 44:ece6330e9b57 157 void BaseboardIO::regTamperInt(Callback<void()> func)
Matt Briggs 40:2ec4be320961 158 {
Matt Briggs 44:ece6330e9b57 159 // Pulled high, switched low
Matt Briggs 53:a1563574a980 160 mTamper.mode(PullNone);
Matt Briggs 49:18f1354f9e51 161 mTamper.rise(func);
Matt Briggs 44:ece6330e9b57 162 mTamper.fall(func);
Matt Briggs 49:18f1354f9e51 163 mTamper.enable_irq();
Matt Briggs 40:2ec4be320961 164 }
Matt Briggs 44:ece6330e9b57 165 void BaseboardIO::regPairBtnInt(Callback<void()> func)
Matt Briggs 40:2ec4be320961 166 {
Matt Briggs 44:ece6330e9b57 167 // Pulled low, switched high
Matt Briggs 58:15aa7a785b9f 168 mPairBtn.mode(PullNone);
Matt Briggs 44:ece6330e9b57 169 mPairBtn.rise(func);
Matt Briggs 49:18f1354f9e51 170 mPairBtn.enable_irq();
Matt Briggs 40:2ec4be320961 171 }
Matt Briggs 40:2ec4be320961 172
Matt Briggs 40:2ec4be320961 173 // Input
Matt Briggs 40:2ec4be320961 174 CmdResult BaseboardIO::sampleUserSwitches()
Matt Briggs 40:2ec4be320961 175 {
Matt Briggs 48:bab9f747d9ed 176 if ((mPortEx0 == NULL) || (mPortEx1 == NULL))
Matt Briggs 48:bab9f747d9ed 177 return cmdError;
Matt Briggs 44:ece6330e9b57 178 // Sample port expanders
Matt Briggs 49:18f1354f9e51 179 enableSwitchedIO();
Matt Briggs 49:18f1354f9e51 180 wait(0.001); // Wait 1 ms
Matt Briggs 53:a1563574a980 181 if (mPortEx0->pioLogicReliableRead(mPortExpanderVal0) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 182 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 183 logError("Error reading port expander 0.");
Matt Briggs 44:ece6330e9b57 184 return cmdError;
Matt Briggs 44:ece6330e9b57 185 }
Matt Briggs 53:a1563574a980 186 if (mPortEx1->pioLogicReliableRead(mPortExpanderVal1) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 187 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 188 logError("Error reading port expander 1.");
Matt Briggs 44:ece6330e9b57 189 return cmdError;
Matt Briggs 44:ece6330e9b57 190 }
Matt Briggs 49:18f1354f9e51 191 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 192 return cmdSuccess;
Matt Briggs 40:2ec4be320961 193 }
Matt Briggs 57:bdac7dd17af2 194 bool BaseboardIO::isCCInAlert()
Matt Briggs 57:bdac7dd17af2 195 {
Matt Briggs 57:bdac7dd17af2 196 if (isCCNO()) { // If NO then the CCIn should float high if not in alert state
Matt Briggs 57:bdac7dd17af2 197 return mCCIn == 0;
Matt Briggs 57:bdac7dd17af2 198 }
Matt Briggs 57:bdac7dd17af2 199 else { // If NC then the CCIN should be held low if not in alert state
Matt Briggs 57:bdac7dd17af2 200 return mCCIn == 1;
Matt Briggs 57:bdac7dd17af2 201 }
Matt Briggs 57:bdac7dd17af2 202 }
Matt Briggs 40:2ec4be320961 203 bool BaseboardIO::isPairBtn()
Matt Briggs 40:2ec4be320961 204 {
Matt Briggs 44:ece6330e9b57 205 // Depressed button is high
Matt Briggs 44:ece6330e9b57 206 return mPairBtn.read() == 1;
Matt Briggs 40:2ec4be320961 207 }
Matt Briggs 48:bab9f747d9ed 208 bool BaseboardIO::isCCNO()
Matt Briggs 40:2ec4be320961 209 {
Matt Briggs 44:ece6330e9b57 210 // When DIP switch is not closed (i.e. value reads high) assume NO
Matt Briggs 49:18f1354f9e51 211 return (mPortExpanderVal1 & pEx1NoNcSel) != 0; // Open NO, closed NC
Matt Briggs 40:2ec4be320961 212 }
Matt Briggs 40:2ec4be320961 213 bool BaseboardIO::isRx()
Matt Briggs 40:2ec4be320961 214 {
Matt Briggs 44:ece6330e9b57 215 // When DIP switch is not closed (i.e. value reads high) assume RX
Matt Briggs 44:ece6330e9b57 216 return (mPortExpanderVal1 & pEx1RxTxSel) != 0;
Matt Briggs 40:2ec4be320961 217 }
Matt Briggs 40:2ec4be320961 218 bool BaseboardIO::isLoRaWANMode()
Matt Briggs 40:2ec4be320961 219 {
Matt Briggs 44:ece6330e9b57 220 // When DIP switch is not closed (i.e. value reads high) assume P2P not WAN
Matt Briggs 44:ece6330e9b57 221 return (mPortExpanderVal1 & pEx1WanSel) == 0;
Matt Briggs 40:2ec4be320961 222 }
Matt Briggs 50:e89647e77fd5 223 bool BaseboardIO::isSerialEnabled()
Matt Briggs 50:e89647e77fd5 224 {
Matt Briggs 50:e89647e77fd5 225 // When DIP switch is not closed (i.e. value reads high) assume not in serial mode
Matt Briggs 50:e89647e77fd5 226 return (mPortExpanderVal1 & pEx1SerialEn) == 0;
Matt Briggs 50:e89647e77fd5 227 }
Matt Briggs 40:2ec4be320961 228 uint8_t BaseboardIO::rotarySwitch1()
Matt Briggs 40:2ec4be320961 229 {
Matt Briggs 44:ece6330e9b57 230 // If a bit of a nibble is asserted then the port expander line is switched low.
Matt Briggs 44:ece6330e9b57 231 uint8_t val = 0;
Matt Briggs 44:ece6330e9b57 232 if ((mPortExpanderVal0 & pEx0Rot1B8) == 0)
Matt Briggs 44:ece6330e9b57 233 val |= 0x08;
Matt Briggs 44:ece6330e9b57 234 if ((mPortExpanderVal0 & pEx0Rot1B4) == 0)
Matt Briggs 44:ece6330e9b57 235 val |= 0x04;
Matt Briggs 44:ece6330e9b57 236 if ((mPortExpanderVal0 & pEx0Rot1B2) == 0)
Matt Briggs 44:ece6330e9b57 237 val |= 0x02;
Matt Briggs 44:ece6330e9b57 238 if ((mPortExpanderVal0 & pEx0Rot1B1) == 0)
Matt Briggs 44:ece6330e9b57 239 val |= 0x01;
Matt Briggs 44:ece6330e9b57 240 return val;
Matt Briggs 40:2ec4be320961 241 }
Matt Briggs 40:2ec4be320961 242 uint8_t BaseboardIO::rotarySwitch2()
Matt Briggs 40:2ec4be320961 243 {
Matt Briggs 44:ece6330e9b57 244 // If a bit of a nibble is asserted then the port expander line is switched low.
Matt Briggs 44:ece6330e9b57 245 uint8_t val = 0;
Matt Briggs 44:ece6330e9b57 246 if ((mPortExpanderVal1 & pEx1Rot2B8) == 0)
Matt Briggs 44:ece6330e9b57 247 val |= 0x08;
Matt Briggs 44:ece6330e9b57 248 if ((mPortExpanderVal1 & pEx1Rot2B4) == 0)
Matt Briggs 44:ece6330e9b57 249 val |= 0x04;
Matt Briggs 44:ece6330e9b57 250 if ((mPortExpanderVal0 & pEx0Rot2B2) == 0)
Matt Briggs 44:ece6330e9b57 251 val |= 0x02;
Matt Briggs 44:ece6330e9b57 252 if ((mPortExpanderVal0 & pEx0Rot2B1) == 0)
Matt Briggs 44:ece6330e9b57 253 val |= 0x01;
Matt Briggs 44:ece6330e9b57 254 return val;
Matt Briggs 40:2ec4be320961 255 }
Matt Briggs 40:2ec4be320961 256
Matt Briggs 40:2ec4be320961 257 // Output
Matt Briggs 40:2ec4be320961 258 CmdResult BaseboardIO::ledOn()
Matt Briggs 40:2ec4be320961 259 {
Matt Briggs 44:ece6330e9b57 260 mLed = 1;
Matt Briggs 59:485545afc4dc 261 #if ALSO_USE_LRR_LED
Matt Briggs 59:485545afc4dc 262 mLrrLed = 1;
Matt Briggs 59:485545afc4dc 263 #endif
Matt Briggs 44:ece6330e9b57 264 return cmdSuccess;
Matt Briggs 40:2ec4be320961 265 }
Matt Briggs 40:2ec4be320961 266 CmdResult BaseboardIO::ledOff()
Matt Briggs 40:2ec4be320961 267 {
Matt Briggs 44:ece6330e9b57 268 mLed = 0;
Matt Briggs 60:5179449a684f 269 // Always allow setting GPIO0 to 0
Matt Briggs 60:5179449a684f 270 //#if ALSO_USE_LRR_LED
Matt Briggs 59:485545afc4dc 271 mLrrLed = 0;
Matt Briggs 60:5179449a684f 272 //#endif
Matt Briggs 44:ece6330e9b57 273 return cmdSuccess;
Matt Briggs 40:2ec4be320961 274 }
Matt Briggs 40:2ec4be320961 275 CmdResult BaseboardIO::relayAlert()
Matt Briggs 40:2ec4be320961 276 {
Matt Briggs 48:bab9f747d9ed 277 if (isCCNO()) { // Normally Open
Matt Briggs 44:ece6330e9b57 278 return closeRelay();
Matt Briggs 44:ece6330e9b57 279 }
Matt Briggs 44:ece6330e9b57 280 else { // Normally Close
Matt Briggs 44:ece6330e9b57 281 return openRelay();
Matt Briggs 44:ece6330e9b57 282 }
Matt Briggs 40:2ec4be320961 283 }
Matt Briggs 40:2ec4be320961 284 CmdResult BaseboardIO::relayNormal()
Matt Briggs 40:2ec4be320961 285 {
Matt Briggs 48:bab9f747d9ed 286 if (isCCNO()) { // Normally Open
Matt Briggs 44:ece6330e9b57 287 return openRelay();
Matt Briggs 44:ece6330e9b57 288 }
Matt Briggs 44:ece6330e9b57 289 else { // Normally Close
Matt Briggs 44:ece6330e9b57 290 return closeRelay();
Matt Briggs 44:ece6330e9b57 291 }
Matt Briggs 40:2ec4be320961 292 }
Matt Briggs 40:2ec4be320961 293
Matt Briggs 40:2ec4be320961 294 // Future
Matt Briggs 40:2ec4be320961 295 CmdResult BaseboardIO::serialRx(bool enable)
Matt Briggs 40:2ec4be320961 296 {
Matt Briggs 44:ece6330e9b57 297 uint8_t val;
Matt Briggs 49:18f1354f9e51 298 if (mPortEx0 == NULL) {
Matt Briggs 49:18f1354f9e51 299 logError("Error enabling 232. Port expanders not initialized.");
Matt Briggs 49:18f1354f9e51 300 return cmdError;
Matt Briggs 49:18f1354f9e51 301 }
Matt Briggs 53:a1563574a980 302 mPortEx0->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 303
Matt Briggs 44:ece6330e9b57 304 // Active low from port expander -> pmos -> 232 (active chip EN)
Matt Briggs 44:ece6330e9b57 305 if (enable) {
Matt Briggs 44:ece6330e9b57 306 val &= ~pEx0232En;
Matt Briggs 44:ece6330e9b57 307 }
Matt Briggs 44:ece6330e9b57 308 else {
Matt Briggs 44:ece6330e9b57 309 val |= pEx0232En;
Matt Briggs 44:ece6330e9b57 310 }
Matt Briggs 44:ece6330e9b57 311
Matt Briggs 53:a1563574a980 312 if (mPortEx0->pioLogicReliableWrite(val | ~pEx0OutMask) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 313 logError("Error enabling 232");
Matt Briggs 44:ece6330e9b57 314 return cmdError;
Matt Briggs 44:ece6330e9b57 315 }
Matt Briggs 44:ece6330e9b57 316 return cmdSuccess;
Matt Briggs 44:ece6330e9b57 317 }
Matt Briggs 44:ece6330e9b57 318 CmdResult BaseboardIO::serialTx(bool enable)
Matt Briggs 44:ece6330e9b57 319 {
Matt Briggs 44:ece6330e9b57 320 uint8_t val;
Matt Briggs 49:18f1354f9e51 321 if (mPortEx0 == NULL) {
Matt Briggs 49:18f1354f9e51 322 logError("Error enabling 232 TX. Port expanders not initialized.");
Matt Briggs 49:18f1354f9e51 323 return cmdError;
Matt Briggs 49:18f1354f9e51 324 }
Matt Briggs 53:a1563574a980 325 mPortEx0->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 326
Matt Briggs 44:ece6330e9b57 327 // Active high tx disable therefore active low tx enable (note chip must also be enabled for TX)
Matt Briggs 44:ece6330e9b57 328 if (enable) {
Matt Briggs 44:ece6330e9b57 329 val &= ~pEx0232TxDis;
Matt Briggs 44:ece6330e9b57 330 }
Matt Briggs 44:ece6330e9b57 331 else {
Matt Briggs 44:ece6330e9b57 332 val |= pEx0232TxDis;
Matt Briggs 44:ece6330e9b57 333 }
Matt Briggs 44:ece6330e9b57 334
Matt Briggs 53:a1563574a980 335 if (mPortEx0->pioLogicReliableWrite(val | ~pEx0OutMask) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 336 logError("Error enabling 232 TX");
Matt Briggs 44:ece6330e9b57 337 return cmdError;
Matt Briggs 44:ece6330e9b57 338 }
Matt Briggs 44:ece6330e9b57 339 return cmdSuccess;
Matt Briggs 44:ece6330e9b57 340 }
Matt Briggs 44:ece6330e9b57 341
Matt Briggs 44:ece6330e9b57 342 // private
Matt Briggs 44:ece6330e9b57 343 CmdResult BaseboardIO::readInfoFromNVM()
Matt Briggs 44:ece6330e9b57 344 {
Matt Briggs 55:79ab0bbc5008 345 bool nvmReadResult;
Matt Briggs 55:79ab0bbc5008 346 uint8_t *data = new uint8_t [BASEBOARDIO_NVM_SIZE];
Matt Briggs 55:79ab0bbc5008 347
Matt Briggs 55:79ab0bbc5008 348 nvmReadResult = dot->nvmRead(BASEBOARDIO_NVM_START_ADDR, data, BASEBOARDIO_NVM_SIZE);
Matt Briggs 55:79ab0bbc5008 349 if (!nvmReadResult) {
Matt Briggs 55:79ab0bbc5008 350 delete [] data;
Matt Briggs 55:79ab0bbc5008 351 return cmdError;
Matt Briggs 55:79ab0bbc5008 352 }
Matt Briggs 55:79ab0bbc5008 353 mNvmObj.fromBytes(data, BASEBOARDIO_NVM_SIZE);
Matt Briggs 55:79ab0bbc5008 354 delete [] data;
Matt Briggs 55:79ab0bbc5008 355 if (!mNvmObj.validBaseboardIOFlag()) {
Matt Briggs 55:79ab0bbc5008 356 logWarning("Invalid BaseboardIO Flag. Using default values.");
Matt Briggs 55:79ab0bbc5008 357 return cmdError;
Matt Briggs 55:79ab0bbc5008 358 }
Matt Briggs 55:79ab0bbc5008 359 else if (!mNvmObj.validBaseboardIORev()) {
Matt Briggs 55:79ab0bbc5008 360 logWarning("Invalid BaseboardIO Rev. Using default values.");
Matt Briggs 55:79ab0bbc5008 361 return cmdError;
Matt Briggs 55:79ab0bbc5008 362 }
Matt Briggs 55:79ab0bbc5008 363 else {
Matt Briggs 55:79ab0bbc5008 364 return cmdSuccess;
Matt Briggs 55:79ab0bbc5008 365 }
Matt Briggs 40:2ec4be320961 366 }
Matt Briggs 44:ece6330e9b57 367 CmdResult BaseboardIO::writeInfoToNVM()
Matt Briggs 40:2ec4be320961 368 {
Matt Briggs 55:79ab0bbc5008 369 uint8_t *data = new uint8_t [BASEBOARDIO_NVM_SIZE];
Matt Briggs 55:79ab0bbc5008 370 uint8_t size = BASEBOARDIO_NVM_SIZE;
Matt Briggs 55:79ab0bbc5008 371 mNvmObj.toBytes(data, size);
Matt Briggs 55:79ab0bbc5008 372 dot->nvmWrite(BASEBOARDIO_NVM_START_ADDR, data, BASEBOARDIO_NVM_SIZE);
Matt Briggs 55:79ab0bbc5008 373
Matt Briggs 55:79ab0bbc5008 374 delete [] data;
Matt Briggs 55:79ab0bbc5008 375 return cmdSuccess;
Matt Briggs 40:2ec4be320961 376 }
Matt Briggs 44:ece6330e9b57 377 CmdResult BaseboardIO::identifyPortExpanders()
Matt Briggs 44:ece6330e9b57 378 {
Matt Briggs 44:ece6330e9b57 379 uint8_t addr[8];
Matt Briggs 44:ece6330e9b57 380 uint8_t result;
Matt Briggs 49:18f1354f9e51 381 int i;
Matt Briggs 40:2ec4be320961 382
Matt Briggs 44:ece6330e9b57 383 // Search Bus
Matt Briggs 44:ece6330e9b57 384 logInfo("Starting OneWire Search");
Matt Briggs 49:18f1354f9e51 385 enableSwitchedIO();
Matt Briggs 49:18f1354f9e51 386 for (int j=0;j<10;j++) { // Try 5 times
Matt Briggs 49:18f1354f9e51 387 i=0;
Matt Briggs 49:18f1354f9e51 388 mOWMaster.reset();
Matt Briggs 49:18f1354f9e51 389 mOWMaster.reset_search();
Matt Briggs 49:18f1354f9e51 390 wait(1.0);
Matt Briggs 49:18f1354f9e51 391 while (true) {
Matt Briggs 49:18f1354f9e51 392 // TODO maybe change to family based search
Matt Briggs 49:18f1354f9e51 393 result = mOWMaster.search(addr);
Matt Briggs 49:18f1354f9e51 394 if (result != 1) {
Matt Briggs 49:18f1354f9e51 395 break;
Matt Briggs 49:18f1354f9e51 396 }
Matt Briggs 49:18f1354f9e51 397 logInfo("ROM Addr: %02x:%02x:%02x:%02x:%02x:%02x:%02x%02x found.",
Matt Briggs 49:18f1354f9e51 398 addr[7],addr[6],addr[5],addr[4],addr[3],addr[2],addr[1],addr[0]);
Matt Briggs 49:18f1354f9e51 399 if (i == 0) {
Matt Briggs 55:79ab0bbc5008 400 std::memcpy(mNvmObj.mPortExpanderROM0, addr, sizeof(mNvmObj.mPortExpanderROM0));
Matt Briggs 49:18f1354f9e51 401 }
Matt Briggs 49:18f1354f9e51 402 else if (i == 1) {
Matt Briggs 55:79ab0bbc5008 403 std::memcpy(mNvmObj.mPortExpanderROM1, addr, sizeof(mNvmObj.mPortExpanderROM1));
Matt Briggs 49:18f1354f9e51 404 }
Matt Briggs 49:18f1354f9e51 405 i++;
Matt Briggs 49:18f1354f9e51 406 }
Matt Briggs 49:18f1354f9e51 407 // TODO maybe only allow a reasonable number of Port Expanders
Matt Briggs 49:18f1354f9e51 408 if (i >=2) {
Matt Briggs 44:ece6330e9b57 409 break;
Matt Briggs 44:ece6330e9b57 410 }
Matt Briggs 44:ece6330e9b57 411 }
Matt Briggs 44:ece6330e9b57 412
Matt Briggs 44:ece6330e9b57 413 logInfo("Finished OneWire Search");
Matt Briggs 44:ece6330e9b57 414 if (i != 2) {
Matt Briggs 48:bab9f747d9ed 415 logError("Incorrect Number of OneWire devices (Got %d. Expected 2) OneWire port expanders found.", i);
Matt Briggs 44:ece6330e9b57 416 return cmdError;
Matt Briggs 44:ece6330e9b57 417 }
Matt Briggs 44:ece6330e9b57 418
Matt Briggs 49:18f1354f9e51 419 // All rotary switches should be at 0. DIPS should be asserted.
Matt Briggs 44:ece6330e9b57 420 // If switches are set in factory default mode then port expander 1 should read 0xFF and
Matt Briggs 44:ece6330e9b57 421 // port expander 2 should read 0xF0.
Matt Briggs 40:2ec4be320961 422
Matt Briggs 55:79ab0bbc5008 423 mPortEx0 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM0);
Matt Briggs 55:79ab0bbc5008 424 mPortEx1 = new DS2408(&mOWMaster, mNvmObj.mPortExpanderROM1);
Matt Briggs 44:ece6330e9b57 425
Matt Briggs 49:18f1354f9e51 426
Matt Briggs 49:18f1354f9e51 427 enableSwitchedIO();
Matt Briggs 53:a1563574a980 428 if (mPortEx0->pioLogicReliableRead(mPortExpanderVal0) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 429 logError("Error during port expander ID. Read failed.");
Matt Briggs 49:18f1354f9e51 430 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 431 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 432 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 433 return cmdError;
Matt Briggs 44:ece6330e9b57 434 }
Matt Briggs 53:a1563574a980 435 if (mPortEx1->pioLogicReliableRead(mPortExpanderVal1) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 436 logError("Error during port expander ID. Read failed.");
Matt Briggs 49:18f1354f9e51 437 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 438 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 439 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 440 return cmdError;
Matt Briggs 44:ece6330e9b57 441 }
Matt Briggs 44:ece6330e9b57 442
Matt Briggs 49:18f1354f9e51 443 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 444 if ((mPortExpanderVal0 == 0xFF) and (mPortExpanderVal1 == 0xF0)) { // Luckily got it right
Matt Briggs 44:ece6330e9b57 445 logInfo("ROMS Swap Not Needed.");
Matt Briggs 44:ece6330e9b57 446 }
Matt Briggs 44:ece6330e9b57 447 else if ((mPortExpanderVal0 == 0xF0) and (mPortExpanderVal1 == 0xFF)) { // Just need to swap
Matt Briggs 55:79ab0bbc5008 448 std::memcpy(addr, mNvmObj.mPortExpanderROM0, sizeof(addr)); // Store Orig ROM0 -> addr
Matt Briggs 55:79ab0bbc5008 449 std::memcpy(mNvmObj.mPortExpanderROM0, mNvmObj.mPortExpanderROM1, sizeof(mNvmObj.mPortExpanderROM0)); // Store Orig ROM1 -> ROM0
Matt Briggs 55:79ab0bbc5008 450 std::memcpy(mNvmObj.mPortExpanderROM1, addr, sizeof(mNvmObj.mPortExpanderROM1)); // Store Orig ROM0 (addr) -> ROM1
Matt Briggs 44:ece6330e9b57 451 logInfo("Swapped ROMS.");
Matt Briggs 44:ece6330e9b57 452 }
Matt Briggs 44:ece6330e9b57 453 else {
Matt Briggs 49:18f1354f9e51 454 logError("Error during port expander ID. Port expanders not in "
Matt Briggs 55:79ab0bbc5008 455 "expected states (0xFF and 0xF0). Check user switches. Got %02X and %02X",
Matt Briggs 49:18f1354f9e51 456 mPortExpanderVal0, mPortExpanderVal1);
Matt Briggs 44:ece6330e9b57 457 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 458 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 459 return cmdError;
Matt Briggs 44:ece6330e9b57 460 }
Matt Briggs 44:ece6330e9b57 461
Matt Briggs 44:ece6330e9b57 462 // Cleanup
Matt Briggs 44:ece6330e9b57 463 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 464 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 465
Matt Briggs 44:ece6330e9b57 466 return cmdSuccess;
Matt Briggs 40:2ec4be320961 467 }
Matt Briggs 49:18f1354f9e51 468 CmdResult BaseboardIO::openRelay() {
Matt Briggs 44:ece6330e9b57 469 uint8_t val;
Matt Briggs 53:a1563574a980 470 mPortEx1->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 471
Matt Briggs 49:18f1354f9e51 472 val |= pEx1RlyA; // Make sure Relay A is off
Matt Briggs 49:18f1354f9e51 473 val &= ~pEx1RlyB; // Turn on Relay B
Matt Briggs 44:ece6330e9b57 474
Matt Briggs 53:a1563574a980 475 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 476 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 477 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 53:a1563574a980 478 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask); // Write a non assert value just to try to overcome an error
Matt Briggs 44:ece6330e9b57 479 logError ("Error turning on coil. Turning both coils off.");
Matt Briggs 44:ece6330e9b57 480 return cmdError;
Matt Briggs 44:ece6330e9b57 481 }
Matt Briggs 44:ece6330e9b57 482
Matt Briggs 47:a68747642a7a 483 wait(COIL_ON_TIME);
Matt Briggs 44:ece6330e9b57 484
Matt Briggs 49:18f1354f9e51 485 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 486 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 44:ece6330e9b57 487
Matt Briggs 53:a1563574a980 488 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 53:a1563574a980 489 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask);
Matt Briggs 44:ece6330e9b57 490 logError ("Error turning off coils. Trying again.");
Matt Briggs 44:ece6330e9b57 491 return cmdError;
Matt Briggs 44:ece6330e9b57 492 }
Matt Briggs 44:ece6330e9b57 493
Matt Briggs 44:ece6330e9b57 494 return cmdSuccess;
Matt Briggs 40:2ec4be320961 495 }
Matt Briggs 49:18f1354f9e51 496 CmdResult BaseboardIO::closeRelay() {
Matt Briggs 44:ece6330e9b57 497 uint8_t val;
Matt Briggs 53:a1563574a980 498 mPortEx1->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 499
Matt Briggs 49:18f1354f9e51 500 val &= ~pEx1RlyA; // Turn on Relay A
Matt Briggs 49:18f1354f9e51 501 val |= pEx1RlyB; // Make sure Relay B is off
Matt Briggs 44:ece6330e9b57 502
Matt Briggs 53:a1563574a980 503 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 504 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 505 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 53:a1563574a980 506 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask); // Write a non assert value just to try to overcome an error
Matt Briggs 44:ece6330e9b57 507 logError ("Error turning on coil. Turning both coils off.");
Matt Briggs 44:ece6330e9b57 508 return cmdError;
Matt Briggs 44:ece6330e9b57 509 }
Matt Briggs 44:ece6330e9b57 510
Matt Briggs 47:a68747642a7a 511 wait(COIL_ON_TIME);
Matt Briggs 44:ece6330e9b57 512
Matt Briggs 49:18f1354f9e51 513 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 514 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 44:ece6330e9b57 515
Matt Briggs 53:a1563574a980 516 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 53:a1563574a980 517 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask);
Matt Briggs 44:ece6330e9b57 518 logError ("Error turning off coils. Trying again.");
Matt Briggs 44:ece6330e9b57 519 return cmdError;
Matt Briggs 44:ece6330e9b57 520 }
Matt Briggs 44:ece6330e9b57 521
Matt Briggs 44:ece6330e9b57 522 return cmdSuccess;
Matt Briggs 40:2ec4be320961 523 }
Matt Briggs 55:79ab0bbc5008 524
Matt Briggs 58:15aa7a785b9f 525 CmdResult BaseboardIO::prepareSleep()
Matt Briggs 58:15aa7a785b9f 526 {
Matt Briggs 58:15aa7a785b9f 527 // Save current GPUIO state
Matt Briggs 58:15aa7a785b9f 528 xdot_save_gpio_state();
Matt Briggs 58:15aa7a785b9f 529
Matt Briggs 58:15aa7a785b9f 530 // Configure all IO expect for pins for interrupt in lowest mode possible
Matt Briggs 58:15aa7a785b9f 531 // GPIO Ports Clock Enable
Matt Briggs 58:15aa7a785b9f 532 __GPIOA_CLK_ENABLE();
Matt Briggs 58:15aa7a785b9f 533 __GPIOB_CLK_ENABLE();
Matt Briggs 58:15aa7a785b9f 534 __GPIOC_CLK_ENABLE();
Matt Briggs 58:15aa7a785b9f 535 __GPIOH_CLK_ENABLE();
Matt Briggs 58:15aa7a785b9f 536
Matt Briggs 58:15aa7a785b9f 537 GPIO_InitTypeDef GPIO_InitStruct;
Matt Briggs 58:15aa7a785b9f 538
Matt Briggs 58:15aa7a785b9f 539 // UART1_TX, UART1_RTS & UART1_CTS to analog nopull - RX could be a wakeup source
Matt Briggs 58:15aa7a785b9f 540 // UART1_TX, UART1_RTS & UART1_CTS to analog nopull - RX could be a wakeup source
Matt Briggs 58:15aa7a785b9f 541 // GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_11 | GPIO_PIN_12;
Matt Briggs 58:15aa7a785b9f 542 GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_12;
Matt Briggs 58:15aa7a785b9f 543 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 544 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 545 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 546
Matt Briggs 58:15aa7a785b9f 547 // I2C_SDA & I2C_SCL to analog nopull
Matt Briggs 58:15aa7a785b9f 548 GPIO_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9;
Matt Briggs 58:15aa7a785b9f 549 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 550 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 551 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 552
Matt Briggs 58:15aa7a785b9f 553 // SPI_MOSI, SPI_MISO, SPI_SCK, & SPI_NSS to analog nopull
Matt Briggs 58:15aa7a785b9f 554 GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
Matt Briggs 58:15aa7a785b9f 555 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 556 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 557 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 558
Matt Briggs 58:15aa7a785b9f 559 // iterate through potential wake pins - leave the configured wake pin alone if one is needed
Matt Briggs 58:15aa7a785b9f 560 if ((CCInPinName != WAKE && TamperPinName != WAKE && PairBtnPinName != WAKE)
Matt Briggs 58:15aa7a785b9f 561 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 562 GPIO_InitStruct.Pin = GPIO_PIN_0;
Matt Briggs 58:15aa7a785b9f 563 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 564 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 565 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 566 }
Matt Briggs 58:15aa7a785b9f 567 if ((CCInPinName != GPIO0 && TamperPinName != GPIO0 && PairBtnPinName != GPIO0)
Matt Briggs 58:15aa7a785b9f 568 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 569 GPIO_InitStruct.Pin = GPIO_PIN_4;
Matt Briggs 58:15aa7a785b9f 570 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 571 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 572 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 573 }
Matt Briggs 58:15aa7a785b9f 574 if ((CCInPinName != GPIO1 && TamperPinName != GPIO1 && PairBtnPinName != GPIO1)
Matt Briggs 58:15aa7a785b9f 575 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 576 GPIO_InitStruct.Pin = GPIO_PIN_5;
Matt Briggs 58:15aa7a785b9f 577 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 578 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 579 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 580 }
Matt Briggs 58:15aa7a785b9f 581 if ((CCInPinName != GPIO2 && TamperPinName != GPIO2 && PairBtnPinName != GPIO2)
Matt Briggs 58:15aa7a785b9f 582 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 583 GPIO_InitStruct.Pin = GPIO_PIN_0;
Matt Briggs 58:15aa7a785b9f 584 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 585 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 586 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 587 }
Matt Briggs 58:15aa7a785b9f 588 if ((CCInPinName != GPIO3 && TamperPinName != GPIO3 && PairBtnPinName != GPIO3)
Matt Briggs 58:15aa7a785b9f 589 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 590 GPIO_InitStruct.Pin = GPIO_PIN_2;
Matt Briggs 58:15aa7a785b9f 591 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 592 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 593 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 594 }
Matt Briggs 58:15aa7a785b9f 595 if ((CCInPinName != UART1_RX && TamperPinName != UART1_RX && PairBtnPinName != UART1_RX)
Matt Briggs 58:15aa7a785b9f 596 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 597 GPIO_InitStruct.Pin = GPIO_PIN_10;
Matt Briggs 58:15aa7a785b9f 598 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 599 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 600 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 601 }
Matt Briggs 58:15aa7a785b9f 602 if ((CCInPinName != UART_CTS && TamperPinName != UART_CTS && PairBtnPinName != UART_CTS)
Matt Briggs 58:15aa7a785b9f 603 || dot->getWakeMode() == mDot::RTC_ALARM) {
Matt Briggs 58:15aa7a785b9f 604 GPIO_InitStruct.Pin = GPIO_PIN_11;
Matt Briggs 58:15aa7a785b9f 605 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
Matt Briggs 58:15aa7a785b9f 606 GPIO_InitStruct.Pull = GPIO_NOPULL;
Matt Briggs 58:15aa7a785b9f 607 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Matt Briggs 58:15aa7a785b9f 608 }
Matt Briggs 58:15aa7a785b9f 609
Matt Briggs 58:15aa7a785b9f 610 return cmdSuccess;
Matt Briggs 58:15aa7a785b9f 611 }
Matt Briggs 58:15aa7a785b9f 612
Matt Briggs 58:15aa7a785b9f 613 CmdResult BaseboardIO::exitSleep()
Matt Briggs 58:15aa7a785b9f 614 {
Matt Briggs 58:15aa7a785b9f 615 xdot_restore_gpio_state();
Matt Briggs 58:15aa7a785b9f 616 return cmdSuccess;
Matt Briggs 58:15aa7a785b9f 617 }
Matt Briggs 58:15aa7a785b9f 618
Matt Briggs 55:79ab0bbc5008 619 // NvmBBIOObj
Matt Briggs 55:79ab0bbc5008 620 NvmBBIOObj::NvmBBIOObj()
Matt Briggs 55:79ab0bbc5008 621 {
Matt Briggs 55:79ab0bbc5008 622 setDefaults();
Matt Briggs 55:79ab0bbc5008 623 }
Matt Briggs 55:79ab0bbc5008 624 void NvmBBIOObj::setDefaults()
Matt Briggs 55:79ab0bbc5008 625 {
Matt Briggs 55:79ab0bbc5008 626 mBaseboardIOFlag = BASEBOARDIO_FLAG;
Matt Briggs 55:79ab0bbc5008 627 mBaseboardIORev = BASEBOARDIO_REV;
Matt Briggs 55:79ab0bbc5008 628 mSerialNum = 0x0000;
Matt Briggs 55:79ab0bbc5008 629 mBaseboardIOConfig = 0x0000;
Matt Briggs 55:79ab0bbc5008 630 std::memset(mPortExpanderROM0, 0x00, 8);
Matt Briggs 55:79ab0bbc5008 631 std::memset(mPortExpanderROM1, 0x00, 8);
Matt Briggs 55:79ab0bbc5008 632 }
Matt Briggs 55:79ab0bbc5008 633 CmdResult NvmBBIOObj::fromBytes(uint8_t *data, uint8_t size)
Matt Briggs 55:79ab0bbc5008 634 {
Matt Briggs 55:79ab0bbc5008 635 if (size != BASEBOARDIO_NVM_SIZE) {
Matt Briggs 55:79ab0bbc5008 636 return cmdError;
Matt Briggs 55:79ab0bbc5008 637 }
Matt Briggs 55:79ab0bbc5008 638
Matt Briggs 55:79ab0bbc5008 639 mBaseboardIOFlag = *((uint16_t *) (data));
Matt Briggs 55:79ab0bbc5008 640 mBaseboardIORev = *((uint16_t *) (data+2));
Matt Briggs 55:79ab0bbc5008 641 mSerialNum = *((uint32_t *) (data+4));
Matt Briggs 55:79ab0bbc5008 642 mBaseboardIOConfig = *((uint32_t *) (data+6));
Matt Briggs 55:79ab0bbc5008 643
Matt Briggs 55:79ab0bbc5008 644 std::memcpy(&mPortExpanderROM0, data+0x10, 8);
Matt Briggs 55:79ab0bbc5008 645 std::memcpy(&mPortExpanderROM1, data+0x18, 8);
Matt Briggs 55:79ab0bbc5008 646
Matt Briggs 55:79ab0bbc5008 647 return cmdSuccess;
Matt Briggs 55:79ab0bbc5008 648 }
Matt Briggs 55:79ab0bbc5008 649 CmdResult NvmBBIOObj::toBytes(uint8_t *data, uint8_t &size) {
Matt Briggs 55:79ab0bbc5008 650 // TODO check data size
Matt Briggs 55:79ab0bbc5008 651
Matt Briggs 55:79ab0bbc5008 652 *((uint16_t *) (data)) = mBaseboardIOFlag;
Matt Briggs 55:79ab0bbc5008 653 *((uint16_t *) (data+2)) = mBaseboardIORev;
Matt Briggs 55:79ab0bbc5008 654 *((uint32_t *) (data+4)) = mSerialNum;
Matt Briggs 55:79ab0bbc5008 655 *((uint32_t *) (data+6)) = mBaseboardIOConfig;
Matt Briggs 55:79ab0bbc5008 656
Matt Briggs 55:79ab0bbc5008 657 std::memcpy(data+0x10, &mPortExpanderROM0, 8);
Matt Briggs 55:79ab0bbc5008 658 std::memcpy(data+0x18, &mPortExpanderROM1, 8);
Matt Briggs 55:79ab0bbc5008 659
Matt Briggs 55:79ab0bbc5008 660 size = BASEBOARDIO_NVM_SIZE;
Matt Briggs 55:79ab0bbc5008 661
Matt Briggs 55:79ab0bbc5008 662 return cmdSuccess;
Matt Briggs 55:79ab0bbc5008 663 }
Matt Briggs 55:79ab0bbc5008 664 uint16_t NvmBBIOObj::getBaseboardIOFlag()
Matt Briggs 55:79ab0bbc5008 665 {
Matt Briggs 55:79ab0bbc5008 666 return mBaseboardIOFlag;
Matt Briggs 55:79ab0bbc5008 667 }
Matt Briggs 55:79ab0bbc5008 668 bool NvmBBIOObj::validBaseboardIOFlag()
Matt Briggs 55:79ab0bbc5008 669 {
Matt Briggs 55:79ab0bbc5008 670 return mBaseboardIOFlag == BASEBOARDIO_FLAG;
Matt Briggs 55:79ab0bbc5008 671 }
Matt Briggs 55:79ab0bbc5008 672 uint16_t NvmBBIOObj::getBaseboardIORev()
Matt Briggs 55:79ab0bbc5008 673 {
Matt Briggs 55:79ab0bbc5008 674 return mBaseboardIORev;
Matt Briggs 55:79ab0bbc5008 675 }
Matt Briggs 55:79ab0bbc5008 676 bool NvmBBIOObj::validBaseboardIORev()
Matt Briggs 55:79ab0bbc5008 677 {
Matt Briggs 55:79ab0bbc5008 678 return mBaseboardIORev == BASEBOARDIO_REV;
Matt Briggs 55:79ab0bbc5008 679 }
Matt Briggs 55:79ab0bbc5008 680 uint16_t NvmBBIOObj::getSerialNum()
Matt Briggs 55:79ab0bbc5008 681 {
Matt Briggs 55:79ab0bbc5008 682 return mSerialNum;
Matt Briggs 55:79ab0bbc5008 683 }
Matt Briggs 55:79ab0bbc5008 684 void NvmBBIOObj::setSerialNum(uint16_t in)
Matt Briggs 55:79ab0bbc5008 685 {
Matt Briggs 55:79ab0bbc5008 686 mSerialNum = in;
Matt Briggs 55:79ab0bbc5008 687 }
Matt Briggs 55:79ab0bbc5008 688 uint32_t NvmBBIOObj::getBaseboardIOConfig()
Matt Briggs 55:79ab0bbc5008 689 {
Matt Briggs 55:79ab0bbc5008 690 return mBaseboardIOConfig;
Matt Briggs 55:79ab0bbc5008 691 }
Matt Briggs 55:79ab0bbc5008 692 void NvmBBIOObj::setBaseboardIOConfig(uint32_t in)
Matt Briggs 55:79ab0bbc5008 693 {
Matt Briggs 55:79ab0bbc5008 694 mBaseboardIOConfig = in;
Matt Briggs 55:79ab0bbc5008 695 }
Matt Briggs 55:79ab0bbc5008 696 void NvmBBIOObj::getPortExpanderROM0(uint8_t *addr)
Matt Briggs 55:79ab0bbc5008 697 {
Matt Briggs 55:79ab0bbc5008 698 std::memcpy(addr, &mPortExpanderROM0, 8);
Matt Briggs 55:79ab0bbc5008 699 }
Matt Briggs 55:79ab0bbc5008 700 void NvmBBIOObj::setPortExpanderROM0(const uint8_t *addr)
Matt Briggs 55:79ab0bbc5008 701 {
Matt Briggs 55:79ab0bbc5008 702 std::memcpy(&mPortExpanderROM0, addr, 8);
Matt Briggs 55:79ab0bbc5008 703 }
Matt Briggs 55:79ab0bbc5008 704 void NvmBBIOObj::getPortExpanderROM1(uint8_t *addr)
Matt Briggs 55:79ab0bbc5008 705 {
Matt Briggs 55:79ab0bbc5008 706 std::memcpy(addr, &mPortExpanderROM1, 8);
Matt Briggs 55:79ab0bbc5008 707 }
Matt Briggs 55:79ab0bbc5008 708 void NvmBBIOObj::setPortExpanderROM1(const uint8_t *addr)
Matt Briggs 55:79ab0bbc5008 709 {
Matt Briggs 55:79ab0bbc5008 710 std::memcpy(&mPortExpanderROM1, addr, 8);
Matt Briggs 55:79ab0bbc5008 711 }