Matt Briggs / Mbed OS xDotBridge_update_dev_latest

Fork to see if I can get working

Dependencies:   BufferedSerial OneWire WinbondSPIFlash libxDot-dev-mbed5-deprecated

Fork of xDotBridge_update_test20180823 by Matt Briggs

xDotBridge/src/BaseboardIO.cpp@53:a1563574a980, 2017-02-22 (annotated)

Committer:
Matt Briggs
Date:
Wed Feb 22 10:45:56 2017 -0700
Revision:
53:a1563574a980
Parent:
50:e89647e77fd5
Child:
55:79ab0bbc5008
Mostly working TX in main app

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Matt Briggs 40:2ec4be320961 1 /*
Matt Briggs 40:2ec4be320961 2 * baseboardIO.cpp
Matt Briggs 40:2ec4be320961 3 *
Matt Briggs 40:2ec4be320961 4 * Created on: Jan 25, 2017
Matt Briggs 40:2ec4be320961 5 * Author: mbriggs
Matt Briggs 40:2ec4be320961 6 */
Matt Briggs 40:2ec4be320961 7
Matt Briggs 40:2ec4be320961 8 #include "BaseboardIO.h"
Matt Briggs 41:9ef4c4d77711 9 #include "MTSLog.h"
Matt Briggs 40:2ec4be320961 10
Matt Briggs 47:a68747642a7a 11 const float COIL_ON_TIME = 0.030; // 30 ms
Matt Briggs 44:ece6330e9b57 12
Matt Briggs 49:18f1354f9e51 13 // Port expander 0 (Currently U7)
Matt Briggs 44:ece6330e9b57 14 const uint8_t pEx0232En = 0x01;
Matt Briggs 44:ece6330e9b57 15 const uint8_t pEx0232TxDis = 0x02;
Matt Briggs 44:ece6330e9b57 16 const uint8_t pEx0Rot1B1 = 0x04;
Matt Briggs 44:ece6330e9b57 17 const uint8_t pEx0Rot1B2 = 0x08;
Matt Briggs 44:ece6330e9b57 18 const uint8_t pEx0Rot1B4 = 0x10;
Matt Briggs 44:ece6330e9b57 19 const uint8_t pEx0Rot1B8 = 0x20;
Matt Briggs 44:ece6330e9b57 20 const uint8_t pEx0Rot2B1 = 0x40;
Matt Briggs 44:ece6330e9b57 21 const uint8_t pEx0Rot2B2 = 0x80;
Matt Briggs 49:18f1354f9e51 22 const uint8_t pEx0OutMask = 0x03; // Only allow bits 0,1 to be changed
Matt Briggs 44:ece6330e9b57 23
Matt Briggs 49:18f1354f9e51 24 // Port expander 1 (Currently U8)
Matt Briggs 44:ece6330e9b57 25 const uint8_t pEx1NoNcSel = 0x01;
Matt Briggs 44:ece6330e9b57 26 const uint8_t pEx1RxTxSel = 0x02;
Matt Briggs 44:ece6330e9b57 27 const uint8_t pEx1WanSel = 0x04;
Matt Briggs 44:ece6330e9b57 28 const uint8_t pEx1SerialEn = 0x08; // Labeled as reserved
Matt Briggs 44:ece6330e9b57 29 const uint8_t pEx1Rot2B8 = 0x10;
Matt Briggs 44:ece6330e9b57 30 const uint8_t pEx1Rot2B4 = 0x20;
Matt Briggs 44:ece6330e9b57 31 const uint8_t pEx1RlyB = 0x40; // This is actually a coil
Matt Briggs 44:ece6330e9b57 32 const uint8_t pEx1RlyA = 0x80; // This is actually a coil
Matt Briggs 49:18f1354f9e51 33 const uint8_t pEx1OutMask = 0xC0; // Only allow bits 6,7 to be changed
Matt Briggs 44:ece6330e9b57 34
Matt Briggs 44:ece6330e9b57 35 /**
Matt Briggs 44:ece6330e9b57 36 * Note for interrupt within uC cannot use two pins with the same numeric suffix (e.g. cannot
Matt Briggs 44:ece6330e9b57 37 * use both PA_0 and PB_0). Note 1, 6, 7, 8, and 13 are used by LoRa radio.
Matt Briggs 44:ece6330e9b57 38 */
Matt Briggs 44:ece6330e9b57 39
Matt Briggs 40:2ec4be320961 40 BaseboardIO::BaseboardIO()
Matt Briggs 44:ece6330e9b57 41 : mOWMaster(I2C_SDA),
Matt Briggs 44:ece6330e9b57 42 mCCIn(WAKE), // Interrupt pin PA_0
Matt Briggs 44:ece6330e9b57 43 mTamper(GPIO1), // Interrupt pin PA_5
Matt Briggs 44:ece6330e9b57 44 mPairBtn(UART_CTS), // Interrupt pin PA_11
Matt Briggs 48:bab9f747d9ed 45 // mLed(SWDIO),
Matt Briggs 48:bab9f747d9ed 46 mLed(GPIO0),
Matt Briggs 49:18f1354f9e51 47 mSwitchedIOCtrl(I2C_SCL, 0)
Matt Briggs 40:2ec4be320961 48 {
Matt Briggs 44:ece6330e9b57 49 // mCCInIntCallback = NULL;
Matt Briggs 44:ece6330e9b57 50 // mTamperIntCallback = NULL;
Matt Briggs 44:ece6330e9b57 51 // mPairBtnIntCallback = NULL;
Matt Briggs 40:2ec4be320961 52
Matt Briggs 44:ece6330e9b57 53 std::memset(mPortExpanderROM0, 0x00, 8);
Matt Briggs 44:ece6330e9b57 54 std::memset(mPortExpanderROM1, 0x00, 8);
Matt Briggs 44:ece6330e9b57 55 mPortExpanderVal0 = 0x00;
Matt Briggs 44:ece6330e9b57 56 mPortExpanderVal1 = 0x00;
Matt Briggs 44:ece6330e9b57 57
Matt Briggs 44:ece6330e9b57 58 mPortEx0 = NULL;
Matt Briggs 44:ece6330e9b57 59 mPortEx1 = NULL;
Matt Briggs 40:2ec4be320961 60 }
Matt Briggs 40:2ec4be320961 61 CmdResult BaseboardIO::init()
Matt Briggs 40:2ec4be320961 62 {
Matt Briggs 44:ece6330e9b57 63 // Setup port expanders
Matt Briggs 47:a68747642a7a 64 if (readInfoFromNVM() == cmdSuccess) {
Matt Briggs 44:ece6330e9b57 65 // Values stored just read them foo
Matt Briggs 44:ece6330e9b57 66 logError("Not implemented yet!!!");
Matt Briggs 44:ece6330e9b57 67 }
Matt Briggs 47:a68747642a7a 68 else { // EEPROM values not there or corrupt. Should only happen in factory.
Matt Briggs 47:a68747642a7a 69 // Find ROM address and test which one is which. Requires user
Matt Briggs 47:a68747642a7a 70 // switches to be in known state.
Matt Briggs 47:a68747642a7a 71 if (identifyPortExpanders() != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 72 logError("Error identifying port expanders");
Matt Briggs 44:ece6330e9b57 73 return cmdError;
Matt Briggs 44:ece6330e9b57 74 }
Matt Briggs 44:ece6330e9b57 75 }
Matt Briggs 44:ece6330e9b57 76 mPortEx0 = new DS2408(&mOWMaster, mPortExpanderROM0);
Matt Briggs 44:ece6330e9b57 77 mPortEx1 = new DS2408(&mOWMaster, mPortExpanderROM1);
Matt Briggs 44:ece6330e9b57 78
Matt Briggs 44:ece6330e9b57 79 // Put relay in known state
Matt Briggs 47:a68747642a7a 80 if (relayNormal() != cmdSuccess) {
Matt Briggs 47:a68747642a7a 81 logError("Error setting relay during init");
Matt Briggs 47:a68747642a7a 82 return cmdError;
Matt Briggs 47:a68747642a7a 83 }
Matt Briggs 47:a68747642a7a 84
Matt Briggs 47:a68747642a7a 85 if (sampleUserSwitches() != cmdSuccess) {
Matt Briggs 47:a68747642a7a 86 logError("Error sampling user switches");
Matt Briggs 47:a68747642a7a 87 return cmdError;
Matt Briggs 47:a68747642a7a 88 }
Matt Briggs 44:ece6330e9b57 89
Matt Briggs 44:ece6330e9b57 90 logInfo("Baseboard IO initialization successful");
Matt Briggs 44:ece6330e9b57 91 return cmdSuccess;
Matt Briggs 40:2ec4be320961 92 }
Matt Briggs 40:2ec4be320961 93
Matt Briggs 40:2ec4be320961 94 // Registering for interrupts
Matt Briggs 44:ece6330e9b57 95 void BaseboardIO::regCCInInt(Callback<void()> func)
Matt Briggs 40:2ec4be320961 96 {
Matt Briggs 48:bab9f747d9ed 97 sampleUserSwitches();
Matt Briggs 48:bab9f747d9ed 98 if (isCCNO()) {
Matt Briggs 48:bab9f747d9ed 99 // Pulled high, switched low
Matt Briggs 48:bab9f747d9ed 100 mCCIn.fall(func);
Matt Briggs 48:bab9f747d9ed 101 }
Matt Briggs 48:bab9f747d9ed 102 else {
Matt Briggs 48:bab9f747d9ed 103 mCCIn.rise(func);
Matt Briggs 48:bab9f747d9ed 104 }
Matt Briggs 53:a1563574a980 105 mCCIn.mode(PullNone);
Matt Briggs 49:18f1354f9e51 106 mCCIn.enable_irq();
Matt Briggs 40:2ec4be320961 107 }
Matt Briggs 44:ece6330e9b57 108 void BaseboardIO::regTamperInt(Callback<void()> func)
Matt Briggs 40:2ec4be320961 109 {
Matt Briggs 44:ece6330e9b57 110 // Pulled high, switched low
Matt Briggs 53:a1563574a980 111 mTamper.mode(PullNone);
Matt Briggs 49:18f1354f9e51 112 mTamper.rise(func);
Matt Briggs 44:ece6330e9b57 113 mTamper.fall(func);
Matt Briggs 49:18f1354f9e51 114 mTamper.enable_irq();
Matt Briggs 40:2ec4be320961 115 }
Matt Briggs 44:ece6330e9b57 116 void BaseboardIO::regPairBtnInt(Callback<void()> func)
Matt Briggs 40:2ec4be320961 117 {
Matt Briggs 44:ece6330e9b57 118 // Pulled low, switched high
Matt Briggs 49:18f1354f9e51 119 mPairBtn.mode(PullDown);
Matt Briggs 44:ece6330e9b57 120 mPairBtn.rise(func);
Matt Briggs 49:18f1354f9e51 121 mPairBtn.enable_irq();
Matt Briggs 40:2ec4be320961 122 }
Matt Briggs 40:2ec4be320961 123
Matt Briggs 40:2ec4be320961 124 // Input
Matt Briggs 40:2ec4be320961 125 CmdResult BaseboardIO::sampleUserSwitches()
Matt Briggs 40:2ec4be320961 126 {
Matt Briggs 48:bab9f747d9ed 127 if ((mPortEx0 == NULL) || (mPortEx1 == NULL))
Matt Briggs 48:bab9f747d9ed 128 return cmdError;
Matt Briggs 44:ece6330e9b57 129 // Sample port expanders
Matt Briggs 49:18f1354f9e51 130 enableSwitchedIO();
Matt Briggs 49:18f1354f9e51 131 wait(0.001); // Wait 1 ms
Matt Briggs 53:a1563574a980 132 if (mPortEx0->pioLogicReliableRead(mPortExpanderVal0) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 133 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 134 logError("Error reading port expander 0.");
Matt Briggs 44:ece6330e9b57 135 return cmdError;
Matt Briggs 44:ece6330e9b57 136 }
Matt Briggs 53:a1563574a980 137 if (mPortEx1->pioLogicReliableRead(mPortExpanderVal1) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 138 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 139 logError("Error reading port expander 1.");
Matt Briggs 44:ece6330e9b57 140 return cmdError;
Matt Briggs 44:ece6330e9b57 141 }
Matt Briggs 49:18f1354f9e51 142 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 143 return cmdSuccess;
Matt Briggs 40:2ec4be320961 144 }
Matt Briggs 40:2ec4be320961 145 bool BaseboardIO::isPairBtn()
Matt Briggs 40:2ec4be320961 146 {
Matt Briggs 44:ece6330e9b57 147 // Depressed button is high
Matt Briggs 44:ece6330e9b57 148 return mPairBtn.read() == 1;
Matt Briggs 40:2ec4be320961 149 }
Matt Briggs 48:bab9f747d9ed 150 bool BaseboardIO::isCCNO()
Matt Briggs 40:2ec4be320961 151 {
Matt Briggs 44:ece6330e9b57 152 // When DIP switch is not closed (i.e. value reads high) assume NO
Matt Briggs 49:18f1354f9e51 153 return (mPortExpanderVal1 & pEx1NoNcSel) != 0; // Open NO, closed NC
Matt Briggs 40:2ec4be320961 154 }
Matt Briggs 40:2ec4be320961 155 bool BaseboardIO::isRx()
Matt Briggs 40:2ec4be320961 156 {
Matt Briggs 44:ece6330e9b57 157 // When DIP switch is not closed (i.e. value reads high) assume RX
Matt Briggs 44:ece6330e9b57 158 return (mPortExpanderVal1 & pEx1RxTxSel) != 0;
Matt Briggs 40:2ec4be320961 159 }
Matt Briggs 40:2ec4be320961 160 bool BaseboardIO::isLoRaWANMode()
Matt Briggs 40:2ec4be320961 161 {
Matt Briggs 44:ece6330e9b57 162 // When DIP switch is not closed (i.e. value reads high) assume P2P not WAN
Matt Briggs 44:ece6330e9b57 163 return (mPortExpanderVal1 & pEx1WanSel) == 0;
Matt Briggs 40:2ec4be320961 164 }
Matt Briggs 50:e89647e77fd5 165 bool BaseboardIO::isSerialEnabled()
Matt Briggs 50:e89647e77fd5 166 {
Matt Briggs 50:e89647e77fd5 167 // When DIP switch is not closed (i.e. value reads high) assume not in serial mode
Matt Briggs 50:e89647e77fd5 168 return (mPortExpanderVal1 & pEx1SerialEn) == 0;
Matt Briggs 50:e89647e77fd5 169 }
Matt Briggs 40:2ec4be320961 170 uint8_t BaseboardIO::rotarySwitch1()
Matt Briggs 40:2ec4be320961 171 {
Matt Briggs 44:ece6330e9b57 172 // If a bit of a nibble is asserted then the port expander line is switched low.
Matt Briggs 44:ece6330e9b57 173 uint8_t val = 0;
Matt Briggs 44:ece6330e9b57 174 if ((mPortExpanderVal0 & pEx0Rot1B8) == 0)
Matt Briggs 44:ece6330e9b57 175 val |= 0x08;
Matt Briggs 44:ece6330e9b57 176 if ((mPortExpanderVal0 & pEx0Rot1B4) == 0)
Matt Briggs 44:ece6330e9b57 177 val |= 0x04;
Matt Briggs 44:ece6330e9b57 178 if ((mPortExpanderVal0 & pEx0Rot1B2) == 0)
Matt Briggs 44:ece6330e9b57 179 val |= 0x02;
Matt Briggs 44:ece6330e9b57 180 if ((mPortExpanderVal0 & pEx0Rot1B1) == 0)
Matt Briggs 44:ece6330e9b57 181 val |= 0x01;
Matt Briggs 44:ece6330e9b57 182 return val;
Matt Briggs 40:2ec4be320961 183 }
Matt Briggs 40:2ec4be320961 184 uint8_t BaseboardIO::rotarySwitch2()
Matt Briggs 40:2ec4be320961 185 {
Matt Briggs 44:ece6330e9b57 186 // If a bit of a nibble is asserted then the port expander line is switched low.
Matt Briggs 44:ece6330e9b57 187 uint8_t val = 0;
Matt Briggs 44:ece6330e9b57 188 if ((mPortExpanderVal1 & pEx1Rot2B8) == 0)
Matt Briggs 44:ece6330e9b57 189 val |= 0x08;
Matt Briggs 44:ece6330e9b57 190 if ((mPortExpanderVal1 & pEx1Rot2B4) == 0)
Matt Briggs 44:ece6330e9b57 191 val |= 0x04;
Matt Briggs 44:ece6330e9b57 192 if ((mPortExpanderVal0 & pEx0Rot2B2) == 0)
Matt Briggs 44:ece6330e9b57 193 val |= 0x02;
Matt Briggs 44:ece6330e9b57 194 if ((mPortExpanderVal0 & pEx0Rot2B1) == 0)
Matt Briggs 44:ece6330e9b57 195 val |= 0x01;
Matt Briggs 44:ece6330e9b57 196 return val;
Matt Briggs 40:2ec4be320961 197 }
Matt Briggs 40:2ec4be320961 198
Matt Briggs 40:2ec4be320961 199 // Output
Matt Briggs 40:2ec4be320961 200 CmdResult BaseboardIO::ledOn()
Matt Briggs 40:2ec4be320961 201 {
Matt Briggs 44:ece6330e9b57 202 mLed = 1;
Matt Briggs 44:ece6330e9b57 203 return cmdSuccess;
Matt Briggs 40:2ec4be320961 204 }
Matt Briggs 40:2ec4be320961 205 CmdResult BaseboardIO::ledOff()
Matt Briggs 40:2ec4be320961 206 {
Matt Briggs 44:ece6330e9b57 207 mLed = 0;
Matt Briggs 44:ece6330e9b57 208 return cmdSuccess;
Matt Briggs 40:2ec4be320961 209 }
Matt Briggs 40:2ec4be320961 210 CmdResult BaseboardIO::relayAlert()
Matt Briggs 40:2ec4be320961 211 {
Matt Briggs 48:bab9f747d9ed 212 if (isCCNO()) { // Normally Open
Matt Briggs 44:ece6330e9b57 213 return closeRelay();
Matt Briggs 44:ece6330e9b57 214 }
Matt Briggs 44:ece6330e9b57 215 else { // Normally Close
Matt Briggs 44:ece6330e9b57 216 return openRelay();
Matt Briggs 44:ece6330e9b57 217 }
Matt Briggs 40:2ec4be320961 218 }
Matt Briggs 40:2ec4be320961 219 CmdResult BaseboardIO::relayNormal()
Matt Briggs 40:2ec4be320961 220 {
Matt Briggs 48:bab9f747d9ed 221 if (isCCNO()) { // Normally Open
Matt Briggs 44:ece6330e9b57 222 return openRelay();
Matt Briggs 44:ece6330e9b57 223 }
Matt Briggs 44:ece6330e9b57 224 else { // Normally Close
Matt Briggs 44:ece6330e9b57 225 return closeRelay();
Matt Briggs 44:ece6330e9b57 226 }
Matt Briggs 40:2ec4be320961 227 }
Matt Briggs 40:2ec4be320961 228
Matt Briggs 40:2ec4be320961 229 // Future
Matt Briggs 40:2ec4be320961 230 CmdResult BaseboardIO::serialRx(bool enable)
Matt Briggs 40:2ec4be320961 231 {
Matt Briggs 44:ece6330e9b57 232 uint8_t val;
Matt Briggs 49:18f1354f9e51 233 if (mPortEx0 == NULL) {
Matt Briggs 49:18f1354f9e51 234 logError("Error enabling 232. Port expanders not initialized.");
Matt Briggs 49:18f1354f9e51 235 return cmdError;
Matt Briggs 49:18f1354f9e51 236 }
Matt Briggs 53:a1563574a980 237 mPortEx0->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 238
Matt Briggs 44:ece6330e9b57 239 // Active low from port expander -> pmos -> 232 (active chip EN)
Matt Briggs 44:ece6330e9b57 240 if (enable) {
Matt Briggs 44:ece6330e9b57 241 val &= ~pEx0232En;
Matt Briggs 44:ece6330e9b57 242 }
Matt Briggs 44:ece6330e9b57 243 else {
Matt Briggs 44:ece6330e9b57 244 val |= pEx0232En;
Matt Briggs 44:ece6330e9b57 245 }
Matt Briggs 44:ece6330e9b57 246
Matt Briggs 53:a1563574a980 247 if (mPortEx0->pioLogicReliableWrite(val | ~pEx0OutMask) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 248 logError("Error enabling 232");
Matt Briggs 44:ece6330e9b57 249 return cmdError;
Matt Briggs 44:ece6330e9b57 250 }
Matt Briggs 44:ece6330e9b57 251 return cmdSuccess;
Matt Briggs 44:ece6330e9b57 252 }
Matt Briggs 44:ece6330e9b57 253 CmdResult BaseboardIO::serialTx(bool enable)
Matt Briggs 44:ece6330e9b57 254 {
Matt Briggs 44:ece6330e9b57 255 uint8_t val;
Matt Briggs 49:18f1354f9e51 256 if (mPortEx0 == NULL) {
Matt Briggs 49:18f1354f9e51 257 logError("Error enabling 232 TX. Port expanders not initialized.");
Matt Briggs 49:18f1354f9e51 258 return cmdError;
Matt Briggs 49:18f1354f9e51 259 }
Matt Briggs 53:a1563574a980 260 mPortEx0->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 261
Matt Briggs 44:ece6330e9b57 262 // Active high tx disable therefore active low tx enable (note chip must also be enabled for TX)
Matt Briggs 44:ece6330e9b57 263 if (enable) {
Matt Briggs 44:ece6330e9b57 264 val &= ~pEx0232TxDis;
Matt Briggs 44:ece6330e9b57 265 }
Matt Briggs 44:ece6330e9b57 266 else {
Matt Briggs 44:ece6330e9b57 267 val |= pEx0232TxDis;
Matt Briggs 44:ece6330e9b57 268 }
Matt Briggs 44:ece6330e9b57 269
Matt Briggs 53:a1563574a980 270 if (mPortEx0->pioLogicReliableWrite(val | ~pEx0OutMask) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 271 logError("Error enabling 232 TX");
Matt Briggs 44:ece6330e9b57 272 return cmdError;
Matt Briggs 44:ece6330e9b57 273 }
Matt Briggs 44:ece6330e9b57 274 return cmdSuccess;
Matt Briggs 44:ece6330e9b57 275 }
Matt Briggs 44:ece6330e9b57 276
Matt Briggs 44:ece6330e9b57 277 // private
Matt Briggs 44:ece6330e9b57 278 CmdResult BaseboardIO::readInfoFromNVM()
Matt Briggs 44:ece6330e9b57 279 {
Matt Briggs 40:2ec4be320961 280 logError("Not implemented yet!!!");
Matt Briggs 40:2ec4be320961 281 return cmdError;
Matt Briggs 40:2ec4be320961 282 }
Matt Briggs 44:ece6330e9b57 283 CmdResult BaseboardIO::writeInfoToNVM()
Matt Briggs 40:2ec4be320961 284 {
Matt Briggs 40:2ec4be320961 285 logError("Not implemented yet!!!");
Matt Briggs 40:2ec4be320961 286 return cmdError;
Matt Briggs 40:2ec4be320961 287 }
Matt Briggs 44:ece6330e9b57 288 CmdResult BaseboardIO::identifyPortExpanders()
Matt Briggs 44:ece6330e9b57 289 {
Matt Briggs 44:ece6330e9b57 290 uint8_t addr[8];
Matt Briggs 44:ece6330e9b57 291 uint8_t result;
Matt Briggs 49:18f1354f9e51 292 int i;
Matt Briggs 40:2ec4be320961 293
Matt Briggs 44:ece6330e9b57 294 // Search Bus
Matt Briggs 44:ece6330e9b57 295 logInfo("Starting OneWire Search");
Matt Briggs 49:18f1354f9e51 296 enableSwitchedIO();
Matt Briggs 49:18f1354f9e51 297 for (int j=0;j<10;j++) { // Try 5 times
Matt Briggs 49:18f1354f9e51 298 i=0;
Matt Briggs 49:18f1354f9e51 299 mOWMaster.reset();
Matt Briggs 49:18f1354f9e51 300 mOWMaster.reset_search();
Matt Briggs 49:18f1354f9e51 301 wait(1.0);
Matt Briggs 49:18f1354f9e51 302 while (true) {
Matt Briggs 49:18f1354f9e51 303 // TODO maybe change to family based search
Matt Briggs 49:18f1354f9e51 304 result = mOWMaster.search(addr);
Matt Briggs 49:18f1354f9e51 305 if (result != 1) {
Matt Briggs 49:18f1354f9e51 306 break;
Matt Briggs 49:18f1354f9e51 307 }
Matt Briggs 49:18f1354f9e51 308 logInfo("ROM Addr: %02x:%02x:%02x:%02x:%02x:%02x:%02x%02x found.",
Matt Briggs 49:18f1354f9e51 309 addr[7],addr[6],addr[5],addr[4],addr[3],addr[2],addr[1],addr[0]);
Matt Briggs 49:18f1354f9e51 310 if (i == 0) {
Matt Briggs 49:18f1354f9e51 311 std::memcpy(mPortExpanderROM0, addr, sizeof(mPortExpanderROM0));
Matt Briggs 49:18f1354f9e51 312 }
Matt Briggs 49:18f1354f9e51 313 else if (i == 1) {
Matt Briggs 49:18f1354f9e51 314 std::memcpy(mPortExpanderROM1, addr, sizeof(mPortExpanderROM1));
Matt Briggs 49:18f1354f9e51 315 }
Matt Briggs 49:18f1354f9e51 316 i++;
Matt Briggs 49:18f1354f9e51 317 }
Matt Briggs 49:18f1354f9e51 318 // TODO maybe only allow a reasonable number of Port Expanders
Matt Briggs 49:18f1354f9e51 319 if (i >=2) {
Matt Briggs 44:ece6330e9b57 320 break;
Matt Briggs 44:ece6330e9b57 321 }
Matt Briggs 44:ece6330e9b57 322 }
Matt Briggs 44:ece6330e9b57 323
Matt Briggs 44:ece6330e9b57 324 logInfo("Finished OneWire Search");
Matt Briggs 44:ece6330e9b57 325 if (i != 2) {
Matt Briggs 48:bab9f747d9ed 326 logError("Incorrect Number of OneWire devices (Got %d. Expected 2) OneWire port expanders found.", i);
Matt Briggs 44:ece6330e9b57 327 return cmdError;
Matt Briggs 44:ece6330e9b57 328 }
Matt Briggs 44:ece6330e9b57 329
Matt Briggs 49:18f1354f9e51 330 // All rotary switches should be at 0. DIPS should be asserted.
Matt Briggs 44:ece6330e9b57 331 // If switches are set in factory default mode then port expander 1 should read 0xFF and
Matt Briggs 44:ece6330e9b57 332 // port expander 2 should read 0xF0.
Matt Briggs 40:2ec4be320961 333
Matt Briggs 44:ece6330e9b57 334 mPortEx0 = new DS2408(&mOWMaster, mPortExpanderROM0);
Matt Briggs 44:ece6330e9b57 335 mPortEx1 = new DS2408(&mOWMaster, mPortExpanderROM1);
Matt Briggs 44:ece6330e9b57 336
Matt Briggs 49:18f1354f9e51 337
Matt Briggs 49:18f1354f9e51 338 enableSwitchedIO();
Matt Briggs 53:a1563574a980 339 if (mPortEx0->pioLogicReliableRead(mPortExpanderVal0) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 340 logError("Error during port expander ID. Read failed.");
Matt Briggs 49:18f1354f9e51 341 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 342 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 343 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 344 return cmdError;
Matt Briggs 44:ece6330e9b57 345 }
Matt Briggs 53:a1563574a980 346 if (mPortEx1->pioLogicReliableRead(mPortExpanderVal1) != cmdSuccess) {
Matt Briggs 44:ece6330e9b57 347 logError("Error during port expander ID. Read failed.");
Matt Briggs 49:18f1354f9e51 348 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 349 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 350 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 351 return cmdError;
Matt Briggs 44:ece6330e9b57 352 }
Matt Briggs 44:ece6330e9b57 353
Matt Briggs 49:18f1354f9e51 354 disableSwitchedIO();
Matt Briggs 44:ece6330e9b57 355 if ((mPortExpanderVal0 == 0xFF) and (mPortExpanderVal1 == 0xF0)) { // Luckily got it right
Matt Briggs 44:ece6330e9b57 356 logInfo("ROMS Swap Not Needed.");
Matt Briggs 44:ece6330e9b57 357 }
Matt Briggs 44:ece6330e9b57 358 else if ((mPortExpanderVal0 == 0xF0) and (mPortExpanderVal1 == 0xFF)) { // Just need to swap
Matt Briggs 44:ece6330e9b57 359 std::memcpy(addr, mPortExpanderROM0, sizeof(addr)); // Store Orig ROM0 -> addr
Matt Briggs 44:ece6330e9b57 360 std::memcpy(mPortExpanderROM0, mPortExpanderROM1, sizeof(mPortExpanderROM0)); // Store Orig ROM1 -> ROM0
Matt Briggs 44:ece6330e9b57 361 std::memcpy(mPortExpanderROM1, addr, sizeof(mPortExpanderROM1)); // Store Orig ROM0 (addr) -> ROM1
Matt Briggs 44:ece6330e9b57 362 logInfo("Swapped ROMS.");
Matt Briggs 44:ece6330e9b57 363 }
Matt Briggs 44:ece6330e9b57 364 else {
Matt Briggs 49:18f1354f9e51 365 logError("Error during port expander ID. Port expanders not in "
Matt Briggs 49:18f1354f9e51 366 "expected states. Check user switches. Got %02X and %02X",
Matt Briggs 49:18f1354f9e51 367 mPortExpanderVal0, mPortExpanderVal1);
Matt Briggs 44:ece6330e9b57 368 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 369 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 370 return cmdError;
Matt Briggs 44:ece6330e9b57 371 }
Matt Briggs 44:ece6330e9b57 372
Matt Briggs 44:ece6330e9b57 373 // Cleanup
Matt Briggs 44:ece6330e9b57 374 delete mPortEx0;
Matt Briggs 44:ece6330e9b57 375 delete mPortEx1;
Matt Briggs 44:ece6330e9b57 376
Matt Briggs 44:ece6330e9b57 377 return cmdSuccess;
Matt Briggs 40:2ec4be320961 378 }
Matt Briggs 49:18f1354f9e51 379 CmdResult BaseboardIO::openRelay() {
Matt Briggs 44:ece6330e9b57 380 uint8_t val;
Matt Briggs 53:a1563574a980 381 mPortEx1->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 382
Matt Briggs 49:18f1354f9e51 383 val |= pEx1RlyA; // Make sure Relay A is off
Matt Briggs 49:18f1354f9e51 384 val &= ~pEx1RlyB; // Turn on Relay B
Matt Briggs 44:ece6330e9b57 385
Matt Briggs 53:a1563574a980 386 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 387 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 388 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 53:a1563574a980 389 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask); // Write a non assert value just to try to overcome an error
Matt Briggs 44:ece6330e9b57 390 logError ("Error turning on coil. Turning both coils off.");
Matt Briggs 44:ece6330e9b57 391 return cmdError;
Matt Briggs 44:ece6330e9b57 392 }
Matt Briggs 44:ece6330e9b57 393
Matt Briggs 47:a68747642a7a 394 wait(COIL_ON_TIME);
Matt Briggs 44:ece6330e9b57 395
Matt Briggs 49:18f1354f9e51 396 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 397 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 44:ece6330e9b57 398
Matt Briggs 53:a1563574a980 399 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 53:a1563574a980 400 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask);
Matt Briggs 44:ece6330e9b57 401 logError ("Error turning off coils. Trying again.");
Matt Briggs 44:ece6330e9b57 402 return cmdError;
Matt Briggs 44:ece6330e9b57 403 }
Matt Briggs 44:ece6330e9b57 404
Matt Briggs 44:ece6330e9b57 405 return cmdSuccess;
Matt Briggs 40:2ec4be320961 406 }
Matt Briggs 49:18f1354f9e51 407 CmdResult BaseboardIO::closeRelay() {
Matt Briggs 44:ece6330e9b57 408 uint8_t val;
Matt Briggs 53:a1563574a980 409 mPortEx1->pioLogicReliableRead(val);
Matt Briggs 44:ece6330e9b57 410
Matt Briggs 49:18f1354f9e51 411 val &= ~pEx1RlyA; // Turn on Relay A
Matt Briggs 49:18f1354f9e51 412 val |= pEx1RlyB; // Make sure Relay B is off
Matt Briggs 44:ece6330e9b57 413
Matt Briggs 53:a1563574a980 414 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 49:18f1354f9e51 415 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 416 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 53:a1563574a980 417 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask); // Write a non assert value just to try to overcome an error
Matt Briggs 44:ece6330e9b57 418 logError ("Error turning on coil. Turning both coils off.");
Matt Briggs 44:ece6330e9b57 419 return cmdError;
Matt Briggs 44:ece6330e9b57 420 }
Matt Briggs 44:ece6330e9b57 421
Matt Briggs 47:a68747642a7a 422 wait(COIL_ON_TIME);
Matt Briggs 44:ece6330e9b57 423
Matt Briggs 49:18f1354f9e51 424 val |= pEx1RlyA; // Turn Relay A off
Matt Briggs 49:18f1354f9e51 425 val |= pEx1RlyB; // Turn Relay B off
Matt Briggs 44:ece6330e9b57 426
Matt Briggs 53:a1563574a980 427 if (mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask) != cmdSuccess) {
Matt Briggs 53:a1563574a980 428 mPortEx1->pioLogicReliableWrite(val | ~pEx1OutMask);
Matt Briggs 44:ece6330e9b57 429 logError ("Error turning off coils. Trying again.");
Matt Briggs 44:ece6330e9b57 430 return cmdError;
Matt Briggs 44:ece6330e9b57 431 }
Matt Briggs 44:ece6330e9b57 432
Matt Briggs 44:ece6330e9b57 433 return cmdSuccess;
Matt Briggs 40:2ec4be320961 434 }