Revision 2:da51fb522205, committed 2013-05-30

Comitter:

emilmont

Date:

Thu May 30 17:10:11 2013 +0100

Parent:

1:fdd22bb7aa52

Child:

3:7a284390b0ce

Commit message:

Keep "cmsis-dsp" module in synch with its source

Changed in this revision

--- a/cmsis_dsp/BasicMathFunctions/arm_abs_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_abs_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_abs_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_abs_f32.c    
 *    
-* Description:    Vector absolute value.    
+* Description:	Vector absolute value.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_abs_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_abs_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_abs_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_abs_q15.c    
 *    
-* Description:    Q15 vector absolute value.    
+* Description:	Q15 vector absolute value.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_abs_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_abs_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_abs_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_abs_q31.c    
 *    
-* Description:    Q31 vector absolute value.    
+* Description:	Q31 vector absolute value.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_abs_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_abs_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_abs_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_abs_q7.c    
 *    
-* Description:    Q7 vector absolute value.    
+* Description:	Q7 vector absolute value.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_add_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_add_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_add_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_add_f32.c    
 *    
-* Description:    Floating-point vector addition.    
+* Description:	Floating-point vector addition.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_add_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_add_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_add_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_add_q15.c    
 *    
-* Description:    Q15 vector addition    
+* Description:	Q15 vector addition    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_add_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_add_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_add_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_add_q31.c    
 *    
-* Description:    Q31 vector addition.    
+* Description:	Q31 vector addition.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_add_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_add_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_add_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_add_q7.c    
 *    
-* Description:    Q7 vector addition.    
+* Description:	Q7 vector addition.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_dot_prod_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_dot_prod_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dot_prod_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_dot_prod_f32.c    
 *    
-* Description:    Floating-point dot product.    
+* Description:	Floating-point dot product.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dot_prod_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_dot_prod_q15.c    
 *    
-* Description:    Q15 dot product.    
+* Description:	Q15 dot product.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dot_prod_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_dot_prod_q31.c    
 *    
-* Description:    Q31 dot product.    
+* Description:	Q31 dot product.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dot_prod_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_dot_prod_q7.c    
 *    
-* Description:    Q7 dot product.    
+* Description:	Q7 dot product.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_mult_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_mult_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mult_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mult_f32.c    
 *    
-* Description:    Floating-point vector multiplication.    
+* Description:	Floating-point vector multiplication.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_mult_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_mult_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mult_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mult_q15.c    
 *    
-* Description:    Q15 vector multiplication.    
+* Description:	Q15 vector multiplication.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_mult_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_mult_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mult_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mult_q31.c    
 *    
-* Description:    Q31 vector multiplication.    
+* Description:	Q31 vector multiplication.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_mult_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_mult_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mult_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mult_q7.c    
 *    
-* Description:    Q7 vector multiplication.    
+* Description:	Q7 vector multiplication.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_negate_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_negate_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_negate_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_negate_f32.c    
 *    
-* Description:    Negates floating-point vectors.    
+* Description:	Negates floating-point vectors.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_negate_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_negate_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_negate_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_negate_q15.c    
 *    
-* Description:    Negates Q15 vectors.    
+* Description:	Negates Q15 vectors.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_negate_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_negate_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_negate_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_negate_q31.c    
 *    
-* Description:    Negates Q31 vectors.    
+* Description:	Negates Q31 vectors.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_negate_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_negate_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_negate_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_negate_q7.c    
 *    
-* Description:    Negates Q7 vectors.    
+* Description:	Negates Q7 vectors.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_offset_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_offset_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_offset_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_offset_f32.c    
 *    
-* Description:    Floating-point vector offset.    
+* Description:	Floating-point vector offset.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_offset_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_offset_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_offset_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_offset_q15.c    
 *    
-* Description:    Q15 vector offset.    
+* Description:	Q15 vector offset.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_offset_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_offset_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_offset_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_offset_q31.c    
 *    
-* Description:    Q31 vector offset.    
+* Description:	Q31 vector offset.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_offset_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_offset_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_offset_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_offset_q7.c    
 *    
-* Description:    Q7 vector offset.    
+* Description:	Q7 vector offset.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_scale_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_scale_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_scale_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_scale_f32.c    
 *    
-* Description:    Multiplies a floating-point vector by a scalar.    
+* Description:	Multiplies a floating-point vector by a scalar.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_scale_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_scale_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_scale_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_scale_q15.c    
 *    
-* Description:    Multiplies a Q15 vector by a scalar.    
+* Description:	Multiplies a Q15 vector by a scalar.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_scale_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_scale_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.
 *
 * $Date:        15. May 2012
-* $Revision:     V1.1.0
+* $Revision: 	V1.1.0
 *
-* Project:         CMSIS DSP Library
-* Title:        arm_scale_q31.c
+* Project: 	    CMSIS DSP Library
+* Title:		arm_scale_q31.c
 *
-* Description:    Multiplies a Q31 vector by a scalar.
+* Description:	Multiplies a Q31 vector by a scalar.
 *
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *

--- a/cmsis_dsp/BasicMathFunctions/arm_scale_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_scale_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_scale_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_scale_q7.c    
 *    
-* Description:    Multiplies a Q7 vector by a scalar.    
+* Description:	Multiplies a Q7 vector by a scalar.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_shift_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_shift_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_shift_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_shift_q15.c    
 *    
-* Description:    Shifts the elements of a Q15 vector by a specified number of bits.    
+* Description:	Shifts the elements of a Q15 vector by a specified number of bits.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_shift_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_shift_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_shift_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_shift_q31.c    
 *    
-* Description:    Shifts the elements of a Q31 vector by a specified number of bits.    
+* Description:	Shifts the elements of a Q31 vector by a specified number of bits.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_shift_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_shift_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_shift_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_shift_q7.c    
 *    
-* Description:    Processing function for the Q7 Shifting    
+* Description:	Processing function for the Q7 Shifting    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_sub_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_sub_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_sub_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_sub_f32.c    
 *    
-* Description:    Floating-point vector subtraction.    
+* Description:	Floating-point vector subtraction.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_sub_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_sub_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_sub_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_sub_q15.c    
 *    
-* Description:    Q15 vector subtraction.    
+* Description:	Q15 vector subtraction.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_sub_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_sub_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_sub_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_sub_q31.c    
 *    
-* Description:    Q31 vector subtraction.    
+* Description:	Q31 vector subtraction.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/BasicMathFunctions/arm_sub_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/BasicMathFunctions/arm_sub_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_sub_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_sub_q7.c    
 *    
-* Description:    Q7 vector subtraction.    
+* Description:	Q7 vector subtraction.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/CommonTables/arm_common_tables.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/CommonTables/arm_common_tables.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_common_tables.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_common_tables.c    
 *    
-* Description:    This file has common tables like fft twiddle factors, Bitreverse, reciprocal etc which are used across different functions    
+* Description:	This file has common tables like fft twiddle factors, Bitreverse, reciprocal etc which are used across different functions    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -61,7 +61,7 @@
 *   y[l] = y[l] >> 1;    
 *  } </pre>    
 * \par    
-* where N = 4096    logN2 = 12   
+* where N = 4096	logN2 = 12   
 * \par    
 * N is the maximum FFT Size supported    
 */
@@ -231,11 +231,11 @@
 * \par    
 * <pre>for(i = 0; i< 3N/4; i++)    
 * {    
-*    twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
 * } </pre>    
 * \par    
-* where N = 4096    and PI = 3.14159265358979    
+* where N = 4096	and PI = 3.14159265358979    
 * \par    
 * Cos and Sin values are in interleaved fashion    
 *     
@@ -2305,12 +2305,12 @@
 *    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
 * } </pre>    
 * \par    
-* where N = 4096    and PI = 3.14159265358979    
+* where N = 4096	and PI = 3.14159265358979    
 * \par    
 * Cos and Sin values are interleaved fashion    
 * \par    
 * Convert Floating point to Q31(Fixed point 1.31):    
-*    round(twiddleCoefQ31(i) * pow(2, 31))    
+*	round(twiddleCoefQ31(i) * pow(2, 31))    
 *    
 */
 
@@ -3865,16 +3865,16 @@
 * \par    
 * <pre>for(i = 0; i< 3N/4; i++)    
 * {    
-*    twiddleCoefQ15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ15[2*i+1]= sin(i * 2*PI/(float)N);    
+*	twiddleCoefQ15[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoefQ15[2*i+1]= sin(i * 2*PI/(float)N);    
 * } </pre>    
 * \par    
-* where N = 4096    and PI = 3.14159265358979    
+* where N = 4096	and PI = 3.14159265358979    
 * \par    
 * Cos and Sin values are interleaved fashion    
 * \par    
 * Convert Floating point to Q15(Fixed point 1.15):    
-*    round(twiddleCoefQ15(i) * pow(2, 15))    
+*	round(twiddleCoefQ15(i) * pow(2, 15))    
 *    
 */
 

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_conj_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_conj_f32.c    
 *    
-* Description:    Floating-point complex conjugate.    
+* Description:	Floating-point complex conjugate.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_conj_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_conj_q15.c    
 *    
-* Description:    Q15 complex conjugate.    
+* Description:	Q15 complex conjugate.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_conj_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_conj_q31.c    
 *    
-* Description:    Q31 complex conjugate.    
+* Description:	Q31 complex conjugate.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_dot_prod_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_dot_prod_f32.c    
 *    
-* Description:    Floating-point complex dot product    
+* Description:	Floating-point complex dot product    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_dot_prod_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_dot_prod_q15.c    
 *    
-* Description:    Processing function for the Q15 Complex Dot product    
+* Description:	Processing function for the Q15 Complex Dot product    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_dot_prod_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_dot_prod_q31.c    
 *    
-* Description:    Q31 complex dot product    
+* Description:	Q31 complex dot product    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mag_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_mag_f32.c    
 *    
-* Description:    Floating-point complex magnitude.    
+* Description:	Floating-point complex magnitude.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mag_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_mag_q15.c    
 *    
-* Description:    Q15 complex magnitude.    
+* Description:	Q15 complex magnitude.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mag_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_mag_q31.c    
 *    
-* Description:    Q31 complex magnitude    
+* Description:	Q31 complex magnitude    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mag_squared_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_mag_squared_f32.c    
 *    
-* Description:    Floating-point complex magnitude squared.    
+* Description:	Floating-point complex magnitude squared.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mag_squared_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_mag_squared_q15.c    
 *    
-* Description:    Q15 complex magnitude squared.    
+* Description:	Q15 complex magnitude squared.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mag_squared_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cmplx_mag_squared_q31.c    
 *    
-* Description:    Q31 complex magnitude squared.    
+* Description:	Q31 complex magnitude squared.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mult_cmplx_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cmplx_mult_cmplx_f32.c    
 *    
-* Description:    Floating-point complex-by-complex multiplication    
+* Description:	Floating-point complex-by-complex multiplication    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mult_cmplx_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cmplx_mult_cmplx_q15.c    
 *    
-* Description:    Q15 complex-by-complex multiplication    
+* Description:	Q15 complex-by-complex multiplication    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mult_cmplx_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cmplx_mult_cmplx_q31.c    
 *    
-* Description:    Q31 complex-by-complex multiplication    
+* Description:	Q31 complex-by-complex multiplication    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mult_real_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cmplx_mult_real_f32.c    
 *    
-* Description:    Floating-point complex by real multiplication    
+* Description:	Floating-point complex by real multiplication    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mult_real_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cmplx_mult_real_q15.c    
 *    
-* Description:    Q15 complex by real multiplication    
+* Description:	Q15 complex by real multiplication    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cmplx_mult_real_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cmplx_mult_real_q31.c    
 *    
-* Description:    Q31 complex by real multiplication    
+* Description:	Q31 complex by real multiplication    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ControllerFunctions/arm_pid_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ControllerFunctions/arm_pid_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,13 +2,13 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_pid_init_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_pid_init_f32.c    
 *    
-* Description:    Floating-point PID Control initialization function    
-*                   
+* Description:	Floating-point PID Control initialization function    
+*				   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ControllerFunctions/arm_pid_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ControllerFunctions/arm_pid_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_pid_init_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_pid_init_q15.c    
 *    
-* Description:    Q15 PID Control initialization function    
+* Description:	Q15 PID Control initialization function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ControllerFunctions/arm_pid_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ControllerFunctions/arm_pid_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_pid_init_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_pid_init_q31.c    
 *    
-* Description:    Q31 PID Control initialization function     
+* Description:	Q31 PID Control initialization function     
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ControllerFunctions/arm_pid_reset_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ControllerFunctions/arm_pid_reset_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_pid_reset_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_pid_reset_f32.c    
 *    
-* Description:    Floating-point PID Control reset function   
+* Description:	Floating-point PID Control reset function   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -39,7 +39,7 @@
 
 /**    
 * @brief  Reset function for the floating-point PID Control.   
-* @param[in] *S    Instance pointer of PID control data structure.   
+* @param[in] *S	Instance pointer of PID control data structure.   
 * @return none.    
 * \par Description:   
 * The function resets the state buffer to zeros.    

--- a/cmsis_dsp/ControllerFunctions/arm_pid_reset_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ControllerFunctions/arm_pid_reset_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_pid_reset_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_pid_reset_q15.c    
 *    
-* Description:    Q15 PID Control reset function   
+* Description:	Q15 PID Control reset function   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -39,7 +39,7 @@
 
 /**    
 * @brief  Reset function for the Q15 PID Control.   
-* @param[in] *S        Instance pointer of PID control data structure.   
+* @param[in] *S		Instance pointer of PID control data structure.   
 * @return none.    
 * \par Description:   
 * The function resets the state buffer to zeros.    

--- a/cmsis_dsp/ControllerFunctions/arm_pid_reset_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ControllerFunctions/arm_pid_reset_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_pid_reset_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_pid_reset_q31.c    
 *    
-* Description:    Q31 PID Control reset function   
+* Description:	Q31 PID Control reset function   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -39,7 +39,7 @@
 
 /**    
 * @brief  Reset function for the Q31 PID Control.   
-* @param[in] *S    Instance pointer of PID control data structure.   
+* @param[in] *S	Instance pointer of PID control data structure.   
 * @return none.    
 * \par Description:   
 * The function resets the state buffer to zeros.    

--- a/cmsis_dsp/ControllerFunctions/arm_sin_cos_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ControllerFunctions/arm_sin_cos_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_sin_cos_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_sin_cos_f32.c    
 *    
-* Description:    Sine and Cosine calculation for floating-point values.   
+* Description:	Sine and Cosine calculation for floating-point values.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/ControllerFunctions/arm_sin_cos_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/ControllerFunctions/arm_sin_cos_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_sin_cos_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_sin_cos_q31.c    
 *    
-* Description:    Cosine & Sine calculation for Q31 values.   
+* Description:	Cosine & Sine calculation for Q31 values.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FastMathFunctions/arm_cos_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FastMathFunctions/arm_cos_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cos_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cos_f32.c    
 *    
-* Description:    Fast cosine calculation for floating-point values.   
+* Description:	Fast cosine calculation for floating-point values.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -81,7 +81,7 @@
 * tableSize = 256;    
 * <pre>for(n = -1; n < (tableSize + 2); n++)    
 * {    
-*    cosTable[n+1]= cos(2*pi*n/tableSize);    
+*	cosTable[n+1]= cos(2*pi*n/tableSize);    
 * } </pre>    
 * where pi value is  3.14159265358979    
 */

--- a/cmsis_dsp/FastMathFunctions/arm_cos_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FastMathFunctions/arm_cos_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cos_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cos_q15.c    
 *    
-* Description:    Fast cosine calculation for Q15 values.   
+* Description:	Fast cosine calculation for Q15 values.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -49,15 +49,15 @@
 * tableSize = 256;     
 * <pre>for(n = -1; n < (tableSize + 1); n++)    
 * {    
-*    cosTable[n+1]= cos(2*pi*n/tableSize);    
+*	cosTable[n+1]= cos(2*pi*n/tableSize);    
 * }</pre>   
 * where pi value is  3.14159265358979    
 * \par    
 * Secondly Convert Floating point to Q15(Fixed point):    
-*    (cosTable[i] * pow(2, 15))    
+*	(cosTable[i] * pow(2, 15))    
 * \par    
 * Finally Rounding to nearest integer is done    
-*     cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);    
+* 	cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);    
 */
 
 static const q15_t cosTableQ15[259] = {

--- a/cmsis_dsp/FastMathFunctions/arm_cos_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FastMathFunctions/arm_cos_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cos_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_cos_q31.c    
 *    
-* Description:    Fast cosine calculation for Q31 values.   
+* Description:	Fast cosine calculation for Q31 values.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -48,15 +48,15 @@
  * tableSize = 256;      
  * <pre>for(n = -1; n < (tableSize + 1); n++)    
  * {    
- *    cosTable[n+1]= cos(2*pi*n/tableSize);    
+ *	cosTable[n+1]= cos(2*pi*n/tableSize);    
  * } </pre>     
  * where pi value is  3.14159265358979    
  * \par    
  * Secondly Convert Floating point to Q31(Fixed point):    
- *    (cosTable[i] * pow(2, 31))    
+ *	(cosTable[i] * pow(2, 31))    
  * \par    
  * Finally Rounding to nearest integer is done    
- *     cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);    
+ * 	cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);    
  */
 
 

--- a/cmsis_dsp/FastMathFunctions/arm_sin_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FastMathFunctions/arm_sin_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_sin_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_sin_f32.c    
 *    
-* Description:    Fast sine calculation for floating-point values.   
+* Description:	Fast sine calculation for floating-point values.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -82,7 +82,7 @@
  * tableSize = 256;    
  * <pre>for(n = -1; n < (tableSize + 1); n++)    
  * {    
- *    sinTable[n+1]=sin(2*pi*n/tableSize);    
+ *	sinTable[n+1]=sin(2*pi*n/tableSize);    
  * }</pre>    
  * \par    
  * where pi value is  3.14159265358979    

--- a/cmsis_dsp/FastMathFunctions/arm_sin_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FastMathFunctions/arm_sin_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_sin_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_sin_q15.c    
 *    
-* Description:    Fast sine calculation for Q15 values.   
+* Description:	Fast sine calculation for Q15 values.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -49,15 +49,15 @@
  * <pre>tableSize = 256;    
  * for(n = -1; n < (tableSize + 1); n++)    
  * {    
- *    sinTable[n+1]=sin(2*pi*n/tableSize);    
+ *	sinTable[n+1]=sin(2*pi*n/tableSize);    
  * } </pre>    
  * where pi value is  3.14159265358979    
  * \par    
  * Convert Floating point to Q15(Fixed point):    
- *    (sinTable[i] * pow(2, 15))    
+ *	(sinTable[i] * pow(2, 15))    
  * \par    
  * rounding to nearest integer is done    
- *     sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
+ * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
  */
 
 

--- a/cmsis_dsp/FastMathFunctions/arm_sin_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FastMathFunctions/arm_sin_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_sin_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_sin_q31.c    
 *    
-* Description:    Fast sine calculation for Q31 values.   
+* Description:	Fast sine calculation for Q31 values.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -48,15 +48,15 @@
  * <pre>tableSize = 256;      
  * for(n = -1; n < (tableSize + 1); n++)    
  * {    
- *    sinTable[n+1]= sin(2*pi*n/tableSize);    
+ *	sinTable[n+1]= sin(2*pi*n/tableSize);    
  * } </pre>    
  * where pi value is  3.14159265358979    
  * \par    
  * Convert Floating point to Q31(Fixed point):    
- *    (sinTable[i] * pow(2, 31))    
+ *	(sinTable[i] * pow(2, 31))    
  * \par    
  * rounding to nearest integer is done    
- *     sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
+ * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
  */
 
 static const q31_t sinTableQ31[259] = {

--- a/cmsis_dsp/FastMathFunctions/arm_sqrt_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FastMathFunctions/arm_sqrt_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2011 ARM Limited. All rights reserved.  
 *     
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *     
 * Project:      CMSIS DSP Library  
-* Title:        arm_sqrt_q15.c     
+* Title:		arm_sqrt_q15.c     
 *     
-* Description:    Q15 square root function.    
+* Description:	Q15 square root function.    
 *     
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FastMathFunctions/arm_sqrt_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FastMathFunctions/arm_sqrt_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2011 ARM Limited. All rights reserved.  
 *     
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *     
 * Project:      CMSIS DSP Library  
-* Title:        arm_sqrt_q31.c     
+* Title:		arm_sqrt_q31.c     
 *     
-* Description:    Q31 square root function.    
+* Description:	Q31 square root function.    
 *     
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_32x64_init_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_biquad_cascade_df1_32x64_init_q31.c    
 *    
-* Description:    High precision Q31 Biquad cascade filter initialization function.    
+* Description:	High precision Q31 Biquad cascade filter initialization function.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -47,7 +47,7 @@
 /**    
  * @details    
  *    
- * @param[in,out] *S               points to an instance of the high precision Q31 Biquad cascade filter structure.    
+ * @param[in,out] *S           	points to an instance of the high precision Q31 Biquad cascade filter structure.    
  * @param[in]     numStages     number of 2nd order stages in the filter.    
  * @param[in]     *pCoeffs      points to the filter coefficients.    
  * @param[in]     *pState       points to the state buffer.    

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_32x64_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_biquad_cascade_df1_32x64_q31.c    
 *    
-* Description:    High precision Q31 Biquad cascade filter processing function    
+* Description:	High precision Q31 Biquad cascade filter processing function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_biquad_cascade_df1_f32.c    
 *    
-* Description:    Processing function for the    
+* Description:	Processing function for the    
 *               floating-point Biquad cascade DirectFormI(DF1) filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
@@ -31,7 +31,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,13 +2,13 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_fast_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_biquad_cascade_df1_fast_q15.c    
 *    
-* Description:    Fast processing function for the    
-*                Q15 Biquad cascade filter.    
+* Description:	Fast processing function for the    
+*				Q15 Biquad cascade filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,13 +2,13 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_fast_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_biquad_cascade_df1_fast_q31.c    
 *    
-* Description:    Processing function for the    
-*                Q31 Fast Biquad cascade DirectFormI(DF1) filter.    
+* Description:	Processing function for the    
+*				Q31 Fast Biquad cascade DirectFormI(DF1) filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -53,7 +53,7 @@
  * @param[in]  *pSrc     points to the block of input data.    
  * @param[out] *pDst     points to the block of output data.    
  * @param[in]  blockSize number of samples to process per call.    
- * @return        none.    
+ * @return 	   none.    
  *    
  * <b>Scaling and Overflow Behavior:</b>    
  * \par    

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_biquad_cascade_df1_init_f32.c    
 *    
 * Description:  floating-point Biquad cascade DirectFormI(DF1) filter initialization function.    
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_biquad_cascade_df1_init_q15.c    
 *    
 * Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function.    
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_init_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_biquad_cascade_df1_init_q31.c    
 *    
-* Description:    Q31 Biquad cascade DirectFormI(DF1) filter initialization function.    
+* Description:	Q31 Biquad cascade DirectFormI(DF1) filter initialization function.    
 *    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
@@ -31,7 +31,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,13 +2,13 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_biquad_cascade_df1_q15.c    
 *    
-* Description:    Processing function for the    
-*                Q15 Biquad cascade DirectFormI(DF1) filter.    
+* Description:	Processing function for the    
+*				Q15 Biquad cascade DirectFormI(DF1) filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -31,7 +31,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,13 +2,13 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_biquad_cascade_df1_q31.c    
 *    
-* Description:    Processing function for the    
-*                Q31 Biquad cascade filter    
+* Description:	Processing function for the    
+*				Q31 Biquad cascade filter    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -31,7 +31,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,10 +2,10 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df2T_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_biquad_cascade_df2T_f32.c    
 *    
 * Description:  Processing function for the floating-point transposed    
 *               direct form II Biquad cascade filter.   

--- a/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_biquad_cascade_df2T_init_f32.c    
 *    
 * Description:  Initialization function for the floating-point transposed   

--- a/cmsis_dsp/FilteringFunctions/arm_conv_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_f32.c    
 *    
-* Description:    Convolution of floating-point sequences.    
+* Description:	Convolution of floating-point sequences.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_conv_fast_opt_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_fast_opt_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_fast_opt_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_fast_opt_q15.c    
 *    
-* Description:    Fast Q15 Convolution.    
+* Description:	Fast Q15 Convolution.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -57,7 +57,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
+ *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
  *     
  * <b>Scaling and Overflow Behavior:</b>    
  *    
@@ -100,7 +100,7 @@
 
   q15_t a, b;
 
-#endif    /*    #ifdef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifdef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -217,7 +217,7 @@
     k--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 
 #ifndef UNALIGNED_SUPPORT_DISABLE
@@ -260,7 +260,7 @@
     k--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* Temporary pointer for scratch2 */
   py = pScratch2;
@@ -344,25 +344,25 @@
 
       acc3 = __SMLADX(x3, y2, acc3);
 
-#else     
+#else	 
 
       /* Read four samples from smaller buffer */
-      a = *pIn2;
-      b = *(pIn2 + 1);
+	  a = *pIn2;
+	  b = *(pIn2 + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       y1 = __PKHBT(a, b, 16);
 #else
       y1 = __PKHBT(b, a, 16);
 #endif
-      
-      a = *(pIn2 + 2);
-      b = *(pIn2 + 3);
+	  
+	  a = *(pIn2 + 2);
+	  b = *(pIn2 + 3);
 #ifndef ARM_MATH_BIG_ENDIAN
       y2 = __PKHBT(a, b, 16);
 #else
       y2 = __PKHBT(b, a, 16);
-#endif                
+#endif				
 
       acc0 = __SMLAD(x1, y1, acc0);
 
@@ -376,8 +376,8 @@
 
       acc1 = __SMLADX(x3, y1, acc1);
 
-      a = *pScr1;
-      b = *(pScr1 + 1);
+	  a = *pScr1;
+	  b = *(pScr1 + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x1 = __PKHBT(a, b, 16);
@@ -399,8 +399,8 @@
 
       acc1 = __SMLADX(x3, y2, acc1);
 
-      a = *(pScr1 + 2);
-      b = *(pScr1 + 3);
+	  a = *(pScr1 + 2);
+	  b = *(pScr1 + 3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x2 = __PKHBT(a, b, 16);
@@ -416,7 +416,7 @@
 
       acc3 = __SMLADX(x3, y2, acc3);
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
       /* update scratch pointers */
       pIn2 += 4u;

--- a/cmsis_dsp/FilteringFunctions/arm_conv_fast_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_fast_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_conv_fast_q15.c   
+* Project: 	    CMSIS DSP Library   
+* Title:		arm_conv_fast_q15.c   
 *   
-* Description:    Fast Q15 Convolution.   
+* Description:	Fast Q15 Convolution.   
 *   
 * Target Processor: Cortex-M4/Cortex-M3
 * 
@@ -296,7 +296,7 @@
       x0 = *__SIMD32(px);
       /* read x[1], x[2] samples */
       x1 = _SIMD32_OFFSET(px+1);
-      px+= 2u;
+	  px+= 2u;
 
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -342,7 +342,7 @@
 
         /* Read x[5], x[6] */
         x1 = _SIMD32_OFFSET(px+3);
-        px += 4u;
+		px += 4u;
 
         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
         acc2 = __SMLADX(x0, c0, acc2);
@@ -376,7 +376,7 @@
 
         /* Read x[7] */
         x3 = *__SIMD32(px);
-        px++;
+		px++;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLAD(x0, c0, acc0);
@@ -395,7 +395,7 @@
 
         /* Read x[9] */
         x2 = _SIMD32_OFFSET(px+1);
-        px += 2u;
+		px += 2u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x0, c0, acc0);
@@ -422,7 +422,7 @@
         acc3 = __SMLADX(x2, c0, acc3);
 
         /* Read y[srcBLen - 7] */
-        c0 = *(py-1);
+		c0 = *(py-1);
 #ifdef  ARM_MATH_BIG_ENDIAN
 
         c0 = c0 << 16u;
@@ -433,7 +433,7 @@
 
         /* Read x[10] */
         x3 =  _SIMD32_OFFSET(px+2);
-        px += 3u;
+		px += 3u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x1, c0, acc0);
@@ -809,7 +809,7 @@
 
     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    py++;
+	py++;
 
     while(k > 0u)
     {
@@ -891,25 +891,25 @@
       acc0 = 0;
       acc1 = 0;
       acc2 = 0;
-      acc3 = 0;      
+      acc3 = 0;	  
 
       /* read x[0], x[1] samples */
-      a = *px++;
-      b = *px++;
+	  a = *px++;
+	  b = *px++;
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x0 = __PKHBT(a, b, 16);
-      a = *px;
-      x1 = __PKHBT(b, a, 16);
+	
+	  x0 = __PKHBT(a, b, 16);
+	  a = *px;
+	  x1 = __PKHBT(b, a, 16);
 
 #else
 
-      x0 = __PKHBT(b, a, 16);
-      a = *px;
-      x1 = __PKHBT(a, b, 16);
+	  x0 = __PKHBT(b, a, 16);
+	  a = *px;
+	  x1 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2u;
@@ -920,19 +920,19 @@
       {
         /* Read the last two inputB samples using SIMD:   
          * y[srcBLen - 1] and y[srcBLen - 2] */
-        a = *py;
-        b = *(py+1);
-        py -= 2;
+		a = *py;
+		b = *(py+1);
+		py -= 2;
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        c0 = __PKHBT(a, b, 16);
+		c0 = __PKHBT(a, b, 16);
 
 #else
 
-         c0 = __PKHBT(b, a, 16);;
+ 		c0 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
         acc0 = __SMLADX(x0, c0, acc0);
@@ -940,22 +940,22 @@
         /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
         acc1 = __SMLADX(x1, c0, acc1);
 
-      a = *px;
-      b = *(px + 1);
+	  a = *px;
+	  b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x2 = __PKHBT(a, b, 16);
-      a = *(px + 2);
-      x3 = __PKHBT(b, a, 16);
+	
+	  x2 = __PKHBT(a, b, 16);
+	  a = *(px + 2);
+	  x3 = __PKHBT(b, a, 16);
 
 #else
 
-      x2 = __PKHBT(b, a, 16);
-      a = *(px + 2);
-      x3 = __PKHBT(a, b, 16);
+	  x2 = __PKHBT(b, a, 16);
+	  a = *(px + 2);
+	  x3 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
 
         /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
         acc2 = __SMLADX(x2, c0, acc2);
@@ -964,19 +964,19 @@
         acc3 = __SMLADX(x3, c0, acc3);
 
         /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        a = *py;
-        b = *(py+1);
-        py -= 2;
+		a = *py;
+		b = *(py+1);
+		py -= 2;
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        c0 = __PKHBT(a, b, 16);
+		c0 = __PKHBT(a, b, 16);
 
 #else
 
-         c0 = __PKHBT(b, a, 16);;
+ 		c0 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
         acc0 = __SMLADX(x2, c0, acc0);
@@ -985,24 +985,24 @@
         acc1 = __SMLADX(x3, c0, acc1);
 
         /* Read x[4], x[5], x[6] */
-      a = *(px + 2);
-      b = *(px + 3);
+	  a = *(px + 2);
+	  b = *(px + 3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x0 = __PKHBT(a, b, 16);
-      a = *(px + 4);
-      x1 = __PKHBT(b, a, 16);
+	
+	  x0 = __PKHBT(a, b, 16);
+	  a = *(px + 4);
+	  x1 = __PKHBT(b, a, 16);
 
 #else
 
-      x0 = __PKHBT(b, a, 16);
-      a = *(px + 4);
-      x1 = __PKHBT(a, b, 16);
+	  x0 = __PKHBT(b, a, 16);
+	  a = *(px + 4);
+	  x1 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
 
-        px += 4u;
+		px += 4u;
 
         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
         acc2 = __SMLADX(x0, c0, acc2);
@@ -1035,19 +1035,19 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
 
         /* Read x[7] */
-        a = *px;
-        b = *(px+1);
-        px++;
+		a = *px;
+		b = *(px+1);
+		px++;
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        x3 = __PKHBT(a, b, 16);
+		x3 = __PKHBT(a, b, 16);
 
 #else
 
-         x3 = __PKHBT(b, a, 16);;
+ 		x3 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
 
         /* Perform the multiply-accumulates */
@@ -1060,37 +1060,37 @@
       if(k == 2u)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        a = *py;
-        b = *(py+1);
+		a = *py;
+		b = *(py+1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        c0 = __PKHBT(a, b, 16);
+		c0 = __PKHBT(a, b, 16);
 
 #else
 
-         c0 = __PKHBT(b, a, 16);;
+ 		c0 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* Read x[7], x[8], x[9] */
-      a = *px;
-      b = *(px + 1);
+	  a = *px;
+	  b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x3 = __PKHBT(a, b, 16);
-      a = *(px + 2);
-      x2 = __PKHBT(b, a, 16);
+	
+	  x3 = __PKHBT(a, b, 16);
+	  a = *(px + 2);
+	  x2 = __PKHBT(b, a, 16);
 
 #else
 
-      x3 = __PKHBT(b, a, 16);
-      a = *(px + 2);
-      x2 = __PKHBT(a, b, 16);
+	  x3 = __PKHBT(b, a, 16);
+	  a = *(px + 2);
+	  x2 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
-        px += 2u;
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
+		px += 2u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x0, c0, acc0);
@@ -1102,36 +1102,36 @@
       if(k == 3u)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        a = *py;
-        b = *(py+1);
+		a = *py;
+		b = *(py+1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        c0 = __PKHBT(a, b, 16);
+		c0 = __PKHBT(a, b, 16);
 
 #else
 
-         c0 = __PKHBT(b, a, 16);;
+ 		c0 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* Read x[7], x[8], x[9] */
-      a = *px;
-      b = *(px + 1);
+	  a = *px;
+	  b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x3 = __PKHBT(a, b, 16);
-      a = *(px + 2);
-      x2 = __PKHBT(b, a, 16);
+	
+	  x3 = __PKHBT(a, b, 16);
+	  a = *(px + 2);
+	  x2 = __PKHBT(b, a, 16);
 
 #else
 
-      x3 = __PKHBT(b, a, 16);
-      a = *(px + 2);
-      x2 = __PKHBT(a, b, 16);
+	  x3 = __PKHBT(b, a, 16);
+	  a = *(px + 2);
+	  x2 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x0, c0, acc0);
@@ -1140,7 +1140,7 @@
         acc3 = __SMLADX(x2, c0, acc3);
 
         /* Read y[srcBLen - 7] */
-        c0 = *(py-1);
+		c0 = *(py-1);
 #ifdef  ARM_MATH_BIG_ENDIAN
 
         c0 = c0 << 16u;
@@ -1150,20 +1150,20 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
 
         /* Read x[10] */
-        a = *(px+2);
-        b = *(px+3);
+		a = *(px+2);
+		b = *(px+3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        x3 = __PKHBT(a, b, 16);
+		x3 = __PKHBT(a, b, 16);
 
 #else
 
-         x3 = __PKHBT(b, a, 16);;
+ 		x3 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
-        px += 3u;
+		px += 3u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x1, c0, acc0);
@@ -1173,10 +1173,10 @@
       }
 
       /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = (q15_t)(acc0 >> 15);
-      *pOut++ = (q15_t)(acc1 >> 15);
-      *pOut++ = (q15_t)(acc2 >> 15);
-      *pOut++ = (q15_t)(acc3 >> 15);
+	  *pOut++ = (q15_t)(acc0 >> 15);
+	  *pOut++ = (q15_t)(acc1 >> 15);
+	  *pOut++ = (q15_t)(acc2 >> 15);
+	  *pOut++ = (q15_t)(acc3 >> 15);
 
       /* Increment the pointer pIn1 index, count by 4 */
       count += 4u;
@@ -1325,10 +1325,10 @@
 
     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    py++;
+	py++;
 
     while(k > 0u)
-    {    
+    {	
         sum += ((q31_t) * px++ * *py--);
         sum += ((q31_t) * px++ * *py--);
         sum += ((q31_t) * px++ * *py--);
@@ -1397,7 +1397,7 @@
     blockSize3--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 }
 
 /**   

--- a/cmsis_dsp/FilteringFunctions/arm_conv_fast_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_fast_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_fast_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_fast_q31.c    
 *    
-* Description:    Q31 Convolution (fast version).    
+* Description:	Q31 Convolution (fast version).    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_conv_opt_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_opt_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_opt_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_opt_q15.c    
 *    
-* Description:    Convolution of Q15 sequences.      
+* Description:	Convolution of Q15 sequences.      
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -61,7 +61,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
+ *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
  *    
  *       
  * @details    
@@ -106,7 +106,7 @@
 
   q15_t a, b;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -350,25 +350,25 @@
 
       acc3 = __SMLALDX(x3, y2, acc3);
 
-#else     
+#else	 
 
       /* Read four samples from smaller buffer */
-      a = *pIn2;
-      b = *(pIn2 + 1);
+	  a = *pIn2;
+	  b = *(pIn2 + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       y1 = __PKHBT(a, b, 16);
 #else
       y1 = __PKHBT(b, a, 16);
 #endif
-      
-      a = *(pIn2 + 2);
-      b = *(pIn2 + 3);
+	  
+	  a = *(pIn2 + 2);
+	  b = *(pIn2 + 3);
 #ifndef ARM_MATH_BIG_ENDIAN
       y2 = __PKHBT(a, b, 16);
 #else
       y2 = __PKHBT(b, a, 16);
-#endif                
+#endif				
 
       acc0 = __SMLALD(x1, y1, acc0);
 
@@ -382,8 +382,8 @@
 
       acc1 = __SMLALDX(x3, y1, acc1);
 
-      a = *pScr1;
-      b = *(pScr1 + 1);
+	  a = *pScr1;
+	  b = *(pScr1 + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x1 = __PKHBT(a, b, 16);
@@ -405,8 +405,8 @@
 
       acc1 = __SMLALDX(x3, y2, acc1);
 
-      a = *(pScr1 + 2);
-      b = *(pScr1 + 3);
+	  a = *(pScr1 + 2);
+	  b = *(pScr1 + 3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x2 = __PKHBT(a, b, 16);
@@ -422,7 +422,7 @@
 
       acc3 = __SMLALDX(x3, y2, acc3);
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
       pIn2 += 4u;
       pScr1 += 4u;

--- a/cmsis_dsp/FilteringFunctions/arm_conv_opt_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_opt_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_opt_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_opt_q7.c    
 *    
-* Description:    Convolution of Q7 sequences.  
+* Description:	Convolution of Q7 sequences.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -61,7 +61,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
+ *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
  *       
  * @details    
  * <b>Scaling and Overflow Behavior:</b>    

--- a/cmsis_dsp/FilteringFunctions/arm_conv_partial_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_partial_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_partial_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_partial_f32.c    
 *    
-* Description:    Partial convolution of floating-point sequences.    
+* Description:	Partial convolution of floating-point sequences.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_opt_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_opt_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_partial_fast_opt_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_partial_fast_opt_q15.c    
 *    
-* Description:    Fast Q15 Partial convolution.    
+* Description:	Fast Q15 Partial convolution.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -61,7 +61,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
+ *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
  *     
  */
 
@@ -756,7 +756,7 @@
   return (status);
 }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 /**    
  * @} end of PartialConv group    

--- a/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_conv_partial_fast_q15.c   
+* Project: 	    CMSIS DSP Library   
+* Title:		arm_conv_partial_fast_q15.c   
 *   
-* Description:    Fast Q15 Partial convolution.   
+* Description:	Fast Q15 Partial convolution.   
 *   
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -312,7 +312,7 @@
       x0 = *__SIMD32(px);
         /* read x[1], x[2] samples */
       x1 = _SIMD32_OFFSET(px+1);
-      px+= 2u;
+	  px+= 2u;
 
 
         /* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -358,7 +358,7 @@
 
           /* Read x[5], x[6] */
         x1 = _SIMD32_OFFSET(px+3);
-        px += 4u;
+		px += 4u;
 
           /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
           acc2 = __SMLADX(x0, c0, acc2);
@@ -391,7 +391,7 @@
 
           /* Read x[7] */
         x3 = *__SIMD32(px);
-        px++;
+		px++;
 
           /* Perform the multiply-accumulates */
           acc0 = __SMLAD(x0, c0, acc0);
@@ -410,7 +410,7 @@
 
         /* Read x[9] */
         x2 = _SIMD32_OFFSET(px+1);
-        px += 2u;
+		px += 2u;
 
           /* Perform the multiply-accumulates */
           acc0 = __SMLADX(x0, c0, acc0);
@@ -436,7 +436,7 @@
           acc2 = __SMLADX(x3, c0, acc2);
           acc3 = __SMLADX(x2, c0, acc3);
 
-        c0 = *(py-1);
+		c0 = *(py-1);
 #ifdef  ARM_MATH_BIG_ENDIAN
 
         c0 = c0 << 16u;
@@ -447,7 +447,7 @@
 
           /* Read x[10] */
         x3 =  _SIMD32_OFFSET(px+2);
-        px += 3u;
+		px += 3u;
 
           /* Perform the multiply-accumulates */
           acc0 = __SMLADX(x1, c0, acc0);
@@ -861,7 +861,7 @@
 
       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    py++;
+	py++;
 
     while(k > 0u)
     {
@@ -946,22 +946,22 @@
         acc3 = 0;
 
       /* read x[0], x[1] samples */
-      a = *px++;
-      b = *px++;
+	  a = *px++;
+	  b = *px++;
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x0 = __PKHBT(a, b, 16);
-      a = *px;
-      x1 = __PKHBT(b, a, 16);
+	
+	  x0 = __PKHBT(a, b, 16);
+	  a = *px;
+	  x1 = __PKHBT(b, a, 16);
 
 #else
 
-      x0 = __PKHBT(b, a, 16);
-      a = *px;
-      x1 = __PKHBT(a, b, 16);
+	  x0 = __PKHBT(b, a, 16);
+	  a = *px;
+	  x1 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2u;
@@ -972,19 +972,19 @@
       {
         /* Read the last two inputB samples using SIMD:   
          * y[srcBLen - 1] and y[srcBLen - 2] */
-        a = *py;
-        b = *(py+1);
-        py -= 2;
+		a = *py;
+		b = *(py+1);
+		py -= 2;
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        c0 = __PKHBT(a, b, 16);
+		c0 = __PKHBT(a, b, 16);
 
 #else
 
-         c0 = __PKHBT(b, a, 16);;
+ 		c0 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
         acc0 = __SMLADX(x0, c0, acc0);
@@ -992,22 +992,22 @@
         /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
         acc1 = __SMLADX(x1, c0, acc1);
 
-      a = *px;
-      b = *(px + 1);
+	  a = *px;
+	  b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x2 = __PKHBT(a, b, 16);
-      a = *(px + 2);
-      x3 = __PKHBT(b, a, 16);
+	
+	  x2 = __PKHBT(a, b, 16);
+	  a = *(px + 2);
+	  x3 = __PKHBT(b, a, 16);
 
 #else
 
-      x2 = __PKHBT(b, a, 16);
-      a = *(px + 2);
-      x3 = __PKHBT(a, b, 16);
+	  x2 = __PKHBT(b, a, 16);
+	  a = *(px + 2);
+	  x3 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
 
         /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
         acc2 = __SMLADX(x2, c0, acc2);
@@ -1016,19 +1016,19 @@
         acc3 = __SMLADX(x3, c0, acc3);
 
         /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        a = *py;
-        b = *(py+1);
-        py -= 2;
+		a = *py;
+		b = *(py+1);
+		py -= 2;
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        c0 = __PKHBT(a, b, 16);
+		c0 = __PKHBT(a, b, 16);
 
 #else
 
-         c0 = __PKHBT(b, a, 16);;
+ 		c0 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
         acc0 = __SMLADX(x2, c0, acc0);
@@ -1037,24 +1037,24 @@
         acc1 = __SMLADX(x3, c0, acc1);
 
         /* Read x[4], x[5], x[6] */
-      a = *(px + 2);
-      b = *(px + 3);
+	  a = *(px + 2);
+	  b = *(px + 3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x0 = __PKHBT(a, b, 16);
-      a = *(px + 4);
-      x1 = __PKHBT(b, a, 16);
+	
+	  x0 = __PKHBT(a, b, 16);
+	  a = *(px + 4);
+	  x1 = __PKHBT(b, a, 16);
 
 #else
 
-      x0 = __PKHBT(b, a, 16);
-      a = *(px + 4);
-      x1 = __PKHBT(a, b, 16);
+	  x0 = __PKHBT(b, a, 16);
+	  a = *(px + 4);
+	  x1 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
 
-        px += 4u;
+		px += 4u;
 
         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
         acc2 = __SMLADX(x0, c0, acc2);
@@ -1087,19 +1087,19 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
 
         /* Read x[7] */
-        a = *px;
-        b = *(px+1);
-        px++;
+		a = *px;
+		b = *(px+1);
+		px++;
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        x3 = __PKHBT(a, b, 16);
+		x3 = __PKHBT(a, b, 16);
 
 #else
 
-         x3 = __PKHBT(b, a, 16);;
+ 		x3 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
 
         /* Perform the multiply-accumulates */
@@ -1112,37 +1112,37 @@
       if(k == 2u)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        a = *py;
-        b = *(py+1);
+		a = *py;
+		b = *(py+1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        c0 = __PKHBT(a, b, 16);
+		c0 = __PKHBT(a, b, 16);
 
 #else
 
-         c0 = __PKHBT(b, a, 16);;
+ 		c0 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* Read x[7], x[8], x[9] */
-      a = *px;
-      b = *(px + 1);
+	  a = *px;
+	  b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x3 = __PKHBT(a, b, 16);
-      a = *(px + 2);
-      x2 = __PKHBT(b, a, 16);
+	
+	  x3 = __PKHBT(a, b, 16);
+	  a = *(px + 2);
+	  x2 = __PKHBT(b, a, 16);
 
 #else
 
-      x3 = __PKHBT(b, a, 16);
-      a = *(px + 2);
-      x2 = __PKHBT(a, b, 16);
+	  x3 = __PKHBT(b, a, 16);
+	  a = *(px + 2);
+	  x2 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
-        px += 2u;
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
+		px += 2u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x0, c0, acc0);
@@ -1154,36 +1154,36 @@
       if(k == 3u)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        a = *py;
-        b = *(py+1);
+		a = *py;
+		b = *(py+1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        c0 = __PKHBT(a, b, 16);
+		c0 = __PKHBT(a, b, 16);
 
 #else
 
-         c0 = __PKHBT(b, a, 16);;
+ 		c0 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* Read x[7], x[8], x[9] */
-      a = *px;
-      b = *(px + 1);
+	  a = *px;
+	  b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-      x3 = __PKHBT(a, b, 16);
-      a = *(px + 2);
-      x2 = __PKHBT(b, a, 16);
+	
+	  x3 = __PKHBT(a, b, 16);
+	  a = *(px + 2);
+	  x2 = __PKHBT(b, a, 16);
 
 #else
 
-      x3 = __PKHBT(b, a, 16);
-      a = *(px + 2);
-      x2 = __PKHBT(a, b, 16);
+	  x3 = __PKHBT(b, a, 16);
+	  a = *(px + 2);
+	  x2 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN       */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x0, c0, acc0);
@@ -1192,7 +1192,7 @@
         acc3 = __SMLADX(x2, c0, acc3);
 
         /* Read y[srcBLen - 7] */
-        c0 = *(py-1);
+		c0 = *(py-1);
 #ifdef  ARM_MATH_BIG_ENDIAN
 
         c0 = c0 << 16u;
@@ -1202,20 +1202,20 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
 
         /* Read x[10] */
-        a = *(px+2);
-        b = *(px+3);
+		a = *(px+2);
+		b = *(px+3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-        x3 = __PKHBT(a, b, 16);
+		x3 = __PKHBT(a, b, 16);
 
 #else
 
-         x3 = __PKHBT(b, a, 16);;
+ 		x3 = __PKHBT(b, a, 16);;
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
-        px += 3u;
+		px += 3u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x1, c0, acc0);
@@ -1225,10 +1225,10 @@
       }
 
       /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = (q15_t)(acc0 >> 15);
-      *pOut++ = (q15_t)(acc1 >> 15);
-      *pOut++ = (q15_t)(acc2 >> 15);
-      *pOut++ = (q15_t)(acc3 >> 15);
+	  *pOut++ = (q15_t)(acc0 >> 15);
+	  *pOut++ = (q15_t)(acc1 >> 15);
+	  *pOut++ = (q15_t)(acc2 >> 15);
+	  *pOut++ = (q15_t)(acc3 >> 15);
 
         /* Increment the pointer pIn1 index, count by 4 */
         count += 4u;
@@ -1378,10 +1378,10 @@
 
       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    py++;
+	py++;
 
     while(k > 0u)
-    {    
+    {	
       /* Perform the multiply-accumulates */
         sum += ((q31_t) * px++ * *py--);
         sum += ((q31_t) * px++ * *py--);

--- a/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_partial_fast_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_partial_fast_q31.c    
 *    
-* Description:    Fast Q31 Partial convolution.    
+* Description:	Fast Q31 Partial convolution.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_partial_opt_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_partial_opt_q15.c    
 *    
-* Description:    Partial convolution of Q15 sequences.   
+* Description:	Partial convolution of Q15 sequences.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -63,7 +63,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, state buffers should be aligned by 32-bit    
+ *	In this case input, output, state buffers should be aligned by 32-bit    
  *    
  * Refer to <code>arm_conv_partial_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.   
  *  
@@ -756,7 +756,7 @@
   return (status);
 }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 
 /**    

--- a/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_partial_opt_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_partial_opt_q7.c    
 *    
-* Description:    Partial convolution of Q7 sequences.    
+* Description:	Partial convolution of Q7 sequences.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -63,7 +63,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit   
+ *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit   
  * 
  *
  * 
@@ -797,7 +797,7 @@
 
 }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 
 

--- a/cmsis_dsp/FilteringFunctions/arm_conv_partial_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_partial_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_conv_partial_q15.c   
+* Project: 	    CMSIS DSP Library   
+* Title:		arm_conv_partial_q15.c   
 *   
-* Description:    Partial convolution of Q15 sequences.  
+* Description:	Partial convolution of Q15 sequences.  
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 * 
@@ -323,7 +323,7 @@
       x0 = *__SIMD32(px);
       /* read x[1], x[2] samples */
       x1 = _SIMD32_OFFSET(px+1);
-      px+= 2u;
+	  px+= 2u;
 
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -369,7 +369,7 @@
 
         /* Read x[5], x[6] */
         x1 = _SIMD32_OFFSET(px+3);
-        px += 4u;
+		px += 4u;
 
         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
         acc2 = __SMLALDX(x0, c0, acc2);
@@ -403,7 +403,7 @@
 
         /* Read x[7] */
         x3 = *__SIMD32(px);
-        px++;
+		px++;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALD(x0, c0, acc0);
@@ -422,7 +422,7 @@
 
         /* Read x[9] */
         x2 = _SIMD32_OFFSET(px+1);
-        px += 2u;
+		px += 2u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALDX(x0, c0, acc0);
@@ -448,7 +448,7 @@
         acc2 = __SMLALDX(x3, c0, acc2);
         acc3 = __SMLALDX(x2, c0, acc3);
 
-        c0 = *(py-1);
+		c0 = *(py-1);
 
 #ifdef  ARM_MATH_BIG_ENDIAN
 
@@ -460,7 +460,7 @@
 
         /* Read x[10] */
         x3 =  _SIMD32_OFFSET(px+2);
-        px += 3u;
+		px += 3u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALDX(x1, c0, acc0);
@@ -502,7 +502,7 @@
       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
        ** No loop unrolling is used. */
       blkCnt = (uint32_t) blockSize2 % 0x4u;
-        
+  	  
       while(blkCnt > 0u)
       {
         /* Accumulator is made zero for every iteration */

--- a/cmsis_dsp/FilteringFunctions/arm_conv_partial_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_partial_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_partial_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_partial_q31.c    
 *    
-* Description:    Partial convolution of Q31 sequences.    
+* Description:	Partial convolution of Q31 sequences.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_conv_partial_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_partial_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_conv_partial_q7.c   
+* Project: 	    CMSIS DSP Library   
+* Title:		arm_conv_partial_q7.c   
 *   
-* Description:    Partial convolution of Q7 sequences.   
+* Description:	Partial convolution of Q7 sequences.   
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -525,11 +525,11 @@
         *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
 
         /* Increment the pointer pIn1 index, count by 1 */
-         count++;
+ 	    count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-          px = pIn1 + count;
-        py = pSrc2;    
+      	px = pIn1 + count;
+        py = pSrc2;	
 
         /* Decrement the loop counter */
         blkCnt--;

--- a/cmsis_dsp/FilteringFunctions/arm_conv_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_conv_q15.c   
+* Project: 	    CMSIS DSP Library   
+* Title:		arm_conv_q15.c   
 *   
-* Description:    Convolution of Q15 sequences.     
+* Description:	Convolution of Q15 sequences.     
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -305,7 +305,7 @@
       x0 = *__SIMD32(px);
       /* read x[1], x[2] samples */
       x1 = _SIMD32_OFFSET(px+1);
-      px+= 2u;
+	  px+= 2u;
 
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -351,7 +351,7 @@
 
         /* Read x[5], x[6] */
         x1 = _SIMD32_OFFSET(px+3);
-        px += 4u;
+		px += 4u;
 
         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
         acc2 = __SMLALDX(x0, c0, acc2);
@@ -384,7 +384,7 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
         /* Read x[7] */
         x3 = *__SIMD32(px);
-        px++;
+		px++;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALD(x0, c0, acc0);
@@ -403,7 +403,7 @@
 
         /* Read x[9] */
         x2 = _SIMD32_OFFSET(px+1);
-        px += 2u;
+		px += 2u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALDX(x0, c0, acc0);
@@ -429,7 +429,7 @@
         acc2 = __SMLALDX(x3, c0, acc2);
         acc3 = __SMLALDX(x2, c0, acc3);
 
-        c0 = *(py-1);
+		c0 = *(py-1);
 
 #ifdef  ARM_MATH_BIG_ENDIAN
 
@@ -440,7 +440,7 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
         /* Read x[10] */
         x3 =  _SIMD32_OFFSET(px+2);
-        px += 3u;
+		px += 3u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALDX(x1, c0, acc0);

--- a/cmsis_dsp/FilteringFunctions/arm_conv_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_q31.c    
 *    
-* Description:    Convolution of Q31 sequences.  
+* Description:	Convolution of Q31 sequences.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_conv_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_conv_q7.c   
+* Project: 	    CMSIS DSP Library   
+* Title:		arm_conv_q7.c   
 *   
-* Description:    Convolution of Q7 sequences. 
+* Description:	Convolution of Q7 sequences. 
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_correlate_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_correlate_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_correlate_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_correlate_f32.c    
 *    
-* Description:     Correlation of floating-point sequences.    
+* Description:	 Correlation of floating-point sequences.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_correlate_fast_opt_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_correlate_fast_opt_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_correlate_fast_opt_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_correlate_fast_opt_q15.c    
 *    
-* Description:    Fast Q15 Correlation.    
+* Description:	Fast Q15 Correlation.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -57,7 +57,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, scratch buffers should be aligned by 32-bit    
+ *	In this case input, output, scratch buffers should be aligned by 32-bit    
  *    
  *     
  * <b>Scaling and Overflow Behavior:</b>    
@@ -99,7 +99,7 @@
 
   q15_t a, b;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -205,7 +205,7 @@
     j--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 #ifndef UNALIGNED_SUPPORT_DISABLE
 
@@ -247,7 +247,7 @@
     j--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* Temporary pointer for scratch2 */
   py = pIn2;
@@ -321,25 +321,25 @@
 #endif
 
       acc3 = __SMLADX(x3, y2, acc3);
-#else     
+#else	 
 
       /* Read four samples from smaller buffer */
-      a = *pIn2;
-      b = *(pIn2 + 1);
+	  a = *pIn2;
+	  b = *(pIn2 + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       y1 = __PKHBT(a, b, 16);
 #else
       y1 = __PKHBT(b, a, 16);
 #endif
-      
-      a = *(pIn2 + 2);
-      b = *(pIn2 + 3);
+	  
+	  a = *(pIn2 + 2);
+	  b = *(pIn2 + 3);
 #ifndef ARM_MATH_BIG_ENDIAN
       y2 = __PKHBT(a, b, 16);
 #else
       y2 = __PKHBT(b, a, 16);
-#endif                
+#endif				
 
       acc0 = __SMLAD(x1, y1, acc0);
 
@@ -353,8 +353,8 @@
 
       acc1 = __SMLADX(x3, y1, acc1);
 
-      a = *pScr;
-      b = *(pScr + 1);
+	  a = *pScr;
+	  b = *(pScr + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x1 = __PKHBT(a, b, 16);
@@ -376,8 +376,8 @@
 
       acc1 = __SMLADX(x3, y2, acc1);
 
-      a = *(pScr + 2);
-      b = *(pScr + 3);
+	  a = *(pScr + 2);
+	  b = *(pScr + 3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x2 = __PKHBT(a, b, 16);
@@ -393,7 +393,7 @@
 
       acc3 = __SMLADX(x3, y2, acc3);
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
       pIn2 += 4u;
 

--- a/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_correlate_fast_q15.c   
+* Project: 	    CMSIS DSP Library   
+* Title:		arm_correlate_fast_q15.c   
 *   
-* Description:    Fast Q15 Correlation.   
+* Description:	Fast Q15 Correlation.   
 *   
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -279,7 +279,7 @@
       x0 = *__SIMD32(px);
       /* read x[1], x[2] samples */
       x1 = _SIMD32_OFFSET(px + 1);
-      px += 2u;
+	  px += 2u;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2u;
@@ -324,7 +324,7 @@
 
         /* Read x[5], x[6] */
         x1 = _SIMD32_OFFSET(px + 3);
-        px += 4u;
+		px += 4u;
 
         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
         acc2 = __SMLAD(x0, c0, acc2);
@@ -357,7 +357,7 @@
 
         /* Read x[7] */
         x3 = *__SIMD32(px);
-        px++;
+		px++;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLAD(x0, c0, acc0);
@@ -376,7 +376,7 @@
 
         /* Read x[9] */
         x2 = _SIMD32_OFFSET(px + 1);
-        px += 2u;
+		px += 2u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLAD(x0, c0, acc0);
@@ -414,7 +414,7 @@
 
         /* Read x[10] */
         x3 = _SIMD32_OFFSET(px + 2);
-        px += 3u;
+		px += 3u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x1, c0, acc0);
@@ -823,24 +823,24 @@
       acc3 = 0;
 
       /* read x[0], x[1], x[2] samples */
-      a = *px;
-      b = *(px + 1);
+	  a = *px;
+	  b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-      x0 = __PKHBT(a, b, 16);
-      a = *(px + 2);
-      x1 = __PKHBT(b, a, 16);
+	  x0 = __PKHBT(a, b, 16);
+	  a = *(px + 2);
+	  x1 = __PKHBT(b, a, 16);
 
 #else
 
-      x0 = __PKHBT(b, a, 16);
-      a = *(px + 2);
-      x1 = __PKHBT(a, b, 16);
+	  x0 = __PKHBT(b, a, 16);
+	  a = *(px + 2);
+	  x1 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
-      px += 2u;
+	  px += 2u;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2u;
@@ -851,18 +851,18 @@
       {
         /* Read the first two inputB samples using SIMD:   
          * y[0] and y[1] */
-          a = *py;
-          b = *(py + 1);
-    
+		  a = *py;
+		  b = *(py + 1);
+	
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-          c0 = __PKHBT(a, b, 16);
-    
+	
+		  c0 = __PKHBT(a, b, 16);
+	
 #else
-    
-          c0 = __PKHBT(b, a, 16);
-    
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+	
+		  c0 = __PKHBT(b, a, 16);
+	
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
         acc0 = __SMLAD(x0, c0, acc0);
@@ -871,22 +871,22 @@
         acc1 = __SMLAD(x1, c0, acc1);
 
         /* Read x[2], x[3], x[4] */
-          a = *px;
-          b = *(px + 1);
+	  	a = *px;
+	  	b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-          x2 = __PKHBT(a, b, 16);
-          a = *(px + 2);
-          x3 = __PKHBT(b, a, 16);
+	  	x2 = __PKHBT(a, b, 16);
+	  	a = *(px + 2);
+	  	x3 = __PKHBT(b, a, 16);
 
 #else
 
-          x2 = __PKHBT(b, a, 16);
-          a = *(px + 2);
-          x3 = __PKHBT(a, b, 16);
+	  	x2 = __PKHBT(b, a, 16);
+	  	a = *(px + 2);
+	  	x3 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
         acc2 = __SMLAD(x2, c0, acc2);
@@ -895,20 +895,20 @@
         acc3 = __SMLAD(x3, c0, acc3);
 
         /* Read y[2] and y[3] */
-          a = *(py + 2);
-          b = *(py + 3);
+		  a = *(py + 2);
+		  b = *(py + 3);
 
-          py += 4u;
-    
+		  py += 4u;
+	
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-          c0 = __PKHBT(a, b, 16);
-    
+	
+		  c0 = __PKHBT(a, b, 16);
+	
 #else
-    
-          c0 = __PKHBT(b, a, 16);
-    
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+	
+		  c0 = __PKHBT(b, a, 16);
+	
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
         acc0 = __SMLAD(x2, c0, acc0);
@@ -917,24 +917,24 @@
         acc1 = __SMLAD(x3, c0, acc1);
 
         /* Read x[4], x[5], x[6] */
-          a = *(px + 2);
-          b = *(px + 3);
+	  	a = *(px + 2);
+	  	b = *(px + 3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-          x0 = __PKHBT(a, b, 16);
-          a = *(px + 4);
-          x1 = __PKHBT(b, a, 16);
+	  	x0 = __PKHBT(a, b, 16);
+	  	a = *(px + 4);
+	  	x1 = __PKHBT(b, a, 16);
 
 #else
 
-          x0 = __PKHBT(b, a, 16);
-          a = *(px + 4);
-          x1 = __PKHBT(a, b, 16);
+	  	x0 = __PKHBT(b, a, 16);
+	  	a = *(px + 4);
+	  	x1 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
-        px += 4u;
+		px += 4u;
 
         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
         acc2 = __SMLAD(x0, c0, acc2);
@@ -966,22 +966,22 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
 
         /* Read x[7] */
-        a = *px;
-        b = *(px + 1);
+		a = *px;
+		b = *(px + 1);
 
-        px++;;
-    
+		px++;;
+	
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-        x3 = __PKHBT(a, b, 16);
-    
+	
+		x3 = __PKHBT(a, b, 16);
+	
 #else
-    
-        x3 = __PKHBT(b, a, 16);
-    
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+	
+		x3 = __PKHBT(b, a, 16);
+	
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
-        px++;
+		px++;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLAD(x0, c0, acc0);
@@ -993,38 +993,38 @@
       if(k == 2u)
       {
         /* Read y[4], y[5] */
-          a = *py;
-          b = *(py + 1);
-    
+		  a = *py;
+		  b = *(py + 1);
+	
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-          c0 = __PKHBT(a, b, 16);
-    
+	
+		  c0 = __PKHBT(a, b, 16);
+	
 #else
-    
-          c0 = __PKHBT(b, a, 16);
-    
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+	
+		  c0 = __PKHBT(b, a, 16);
+	
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* Read x[7], x[8], x[9] */
-          a = *px;
-          b = *(px + 1);
+	  	a = *px;
+	  	b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-          x3 = __PKHBT(a, b, 16);
-          a = *(px + 2);
-          x2 = __PKHBT(b, a, 16);
+	  	x3 = __PKHBT(a, b, 16);
+	  	a = *(px + 2);
+	  	x2 = __PKHBT(b, a, 16);
 
 #else
 
-          x3 = __PKHBT(b, a, 16);
-          a = *(px + 2);
-          x2 = __PKHBT(a, b, 16);
+	  	x3 = __PKHBT(b, a, 16);
+	  	a = *(px + 2);
+	  	x2 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
-        px += 2u;
+		px += 2u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLAD(x0, c0, acc0);
@@ -1036,38 +1036,38 @@
       if(k == 3u)
       {
         /* Read y[4], y[5] */
-          a = *py;
-          b = *(py + 1);
-    
+		  a = *py;
+		  b = *(py + 1);
+	
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-          c0 = __PKHBT(a, b, 16);
-    
+	
+		  c0 = __PKHBT(a, b, 16);
+	
 #else
-    
-          c0 = __PKHBT(b, a, 16);
-    
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+	
+		  c0 = __PKHBT(b, a, 16);
+	
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
-        py += 2u;
+		py += 2u;
 
         /* Read x[7], x[8], x[9] */
-          a = *px;
-          b = *(px + 1);
+	  	a = *px;
+	  	b = *(px + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-          x3 = __PKHBT(a, b, 16);
-          a = *(px + 2);
-          x2 = __PKHBT(b, a, 16);
+	  	x3 = __PKHBT(a, b, 16);
+	  	a = *(px + 2);
+	  	x2 = __PKHBT(b, a, 16);
 
 #else
 
-          x3 = __PKHBT(b, a, 16);
-          a = *(px + 2);
-          x2 = __PKHBT(a, b, 16);
+	  	x3 = __PKHBT(b, a, 16);
+	  	a = *(px + 2);
+	  	x2 = __PKHBT(a, b, 16);
 
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLAD(x0, c0, acc0);
@@ -1086,19 +1086,19 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
 
         /* Read x[10] */
-        b = *(px + 3);
-    
+		b = *(px + 3);
+	
 #ifndef ARM_MATH_BIG_ENDIAN
-    
-        x3 = __PKHBT(a, b, 16);
-    
+	
+		x3 = __PKHBT(a, b, 16);
+	
 #else
-    
-        x3 = __PKHBT(b, a, 16);
-    
-#endif    /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+	
+		x3 = __PKHBT(b, a, 16);
+	
+#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
 
-        px += 3u;
+		px += 3u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x1, c0, acc0);

--- a/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_correlate_fast_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_correlate_fast_q31.c    
 *    
-* Description:    Fast Q31 Correlation.    
+* Description:	Fast Q31 Correlation.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_correlate_opt_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_correlate_opt_q15.c    
 *    
-* Description:    Correlation of Q15 sequences.  
+* Description:	Correlation of Q15 sequences.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -60,7 +60,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, scratch buffers should be aligned by 32-bit    
+ *	In this case input, output, scratch buffers should be aligned by 32-bit    
  *     
  * @details    
  * <b>Scaling and Overflow Behavior:</b>    
@@ -102,7 +102,7 @@
 
   q15_t a, b;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -209,7 +209,7 @@
     j--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 #ifndef UNALIGNED_SUPPORT_DISABLE
 
@@ -251,7 +251,7 @@
     j--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* Temporary pointer for scratch2 */
   py = pIn2;
@@ -326,25 +326,25 @@
 
       acc3 = __SMLALDX(x3, y2, acc3);
 
-#else     
+#else	 
 
       /* Read four samples from smaller buffer */
-      a = *pIn2;
-      b = *(pIn2 + 1);
+	  a = *pIn2;
+	  b = *(pIn2 + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       y1 = __PKHBT(a, b, 16);
 #else
       y1 = __PKHBT(b, a, 16);
 #endif
-      
-      a = *(pIn2 + 2);
-      b = *(pIn2 + 3);
+	  
+	  a = *(pIn2 + 2);
+	  b = *(pIn2 + 3);
 #ifndef ARM_MATH_BIG_ENDIAN
       y2 = __PKHBT(a, b, 16);
 #else
       y2 = __PKHBT(b, a, 16);
-#endif                
+#endif				
 
       acc0 = __SMLALD(x1, y1, acc0);
 
@@ -358,8 +358,8 @@
 
       acc1 = __SMLALDX(x3, y1, acc1);
 
-      a = *pScr;
-      b = *(pScr + 1);
+	  a = *pScr;
+	  b = *(pScr + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x1 = __PKHBT(a, b, 16);
@@ -381,8 +381,8 @@
 
       acc1 = __SMLALDX(x3, y2, acc1);
 
-      a = *(pScr + 2);
-      b = *(pScr + 3);
+	  a = *(pScr + 2);
+	  b = *(pScr + 3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x2 = __PKHBT(a, b, 16);
@@ -398,7 +398,7 @@
 
       acc3 = __SMLALDX(x3, y2, acc3);
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
       pIn2 += 4u;
 

--- a/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_correlate_opt_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_correlate_opt_q7.c    
 *    
-* Description:    Correlation of Q7 sequences.  
+* Description:	Correlation of Q7 sequences.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -62,7 +62,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
+ *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
  *        
  * @details    
  * <b>Scaling and Overflow Behavior:</b>    
@@ -275,7 +275,7 @@
     k--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* Temporary pointer for second sequence */
   py = pScratch2;

--- a/cmsis_dsp/FilteringFunctions/arm_correlate_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_correlate_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_correlate_q15.c   
+* Project: 	    CMSIS DSP Library   
+* Title:		arm_correlate_q15.c   
 *   
-* Description:    Correlation of Q15 sequences. 
+* Description:	Correlation of Q15 sequences. 
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -288,7 +288,7 @@
       x0 = *__SIMD32(px);
       /* read x[1], x[2] samples */
       x1 = _SIMD32_OFFSET(px + 1);
-      px += 2u;
+	  px += 2u;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2u;
@@ -334,7 +334,7 @@
         /* Read x[5], x[6] */
         x1 = _SIMD32_OFFSET(px + 3);
 
-        px += 4u;
+		px += 4u;
 
         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
         acc2 = __SMLALD(x0, c0, acc2);
@@ -363,7 +363,7 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
         /* Read x[7] */
         x3 = *__SIMD32(px);
-        px++;
+		px++;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALD(x0, c0, acc0);
@@ -382,7 +382,7 @@
 
         /* Read x[9] */
         x2 = _SIMD32_OFFSET(px + 1);
-        px += 2u;
+		px += 2u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALD(x0, c0, acc0);
@@ -420,7 +420,7 @@
 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
         /* Read x[10] */
         x3 = _SIMD32_OFFSET(px + 2);
-        px += 3u;
+		px += 3u;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALDX(x1, c0, acc0);

--- a/cmsis_dsp/FilteringFunctions/arm_correlate_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_correlate_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_correlate_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_correlate_q31.c    
 *    
-* Description:    Correlation of Q31 sequences.  
+* Description:	Correlation of Q31 sequences.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_correlate_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_correlate_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_correlate_q7.c   
+* Project: 	    CMSIS DSP Library   
+* Title:		arm_correlate_q7.c   
 *   
-* Description:    Correlation of Q7 sequences. 
+* Description:	Correlation of Q7 sequences. 
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -473,7 +473,7 @@
       *pOut = (q7_t) (__SSAT(acc3 >> 7, 8));
       pOut += inc;
 
-      count += 4u;
+	  count += 4u;
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
@@ -547,7 +547,7 @@
       pOut += inc;
 
       /* Increment the pointer pIn1 index, count by 1 */
-      count++;
+	  count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;

--- a/cmsis_dsp/FilteringFunctions/arm_fir_decimate_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_decimate_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_decimate_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_decimate_f32.c    
 *    
-* Description:    FIR decimation for floating-point sequences.    
+* Description:	FIR decimation for floating-point sequences.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_decimate_fast_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_decimate_fast_q15.c    
 *    
-* Description:    Fast Q15 FIR Decimator.    
+* Description:	Fast Q15 FIR Decimator.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -51,7 +51,7 @@
  *    
  * \par Restrictions   
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE   
- *    In this case input, output, state buffers should be aligned by 32-bit   
+ *	In this case input, output, state buffers should be aligned by 32-bit   
  *    
  * <b>Scaling and Overflow Behavior:</b>    
  * \par    
@@ -583,7 +583,7 @@
 }
 
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 /**    
  * @} end of FIR_decimate group    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_decimate_fast_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_decimate_fast_q31.c    
 *    
-* Description:    Fast Q31 FIR Decimator.    
+* Description:	Fast Q31 FIR Decimator.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_decimate_init_f32.c    
 *    
 * Description:  Floating-point FIR Decimator initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_decimate_init_q15.c    
 *    
 * Description:  Initialization function for the Q15 FIR Decimator.    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_decimate_init_q31.c    
 *    
 * Description:  Initialization function for Q31 FIR Decimation filter.    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_decimate_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_decimate_q15.c    
 *    
-* Description:    Q15 FIR Decimator.    
+* Description:	Q15 FIR Decimator.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -582,7 +582,7 @@
 }
 
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 #else
 

--- a/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_decimate_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_decimate_q31.c    
 *    
-* Description:    Q31 FIR Decimator.    
+* Description:	Q31 FIR Decimator.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.  
 *  
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *  
-* Project:         CMSIS DSP Library  
-* Title:        arm_fir_f32.c  
+* Project: 	    CMSIS DSP Library  
+* Title:	    arm_fir_f32.c  
 *  
-* Description:    Floating-point FIR filter processing function.  
+* Description:	Floating-point FIR filter processing function.  
 *  
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -24,7 +24,7 @@
 *    Production release and review comments incorporated.  
 *  
 * Version 0.0.5  2010/04/26   
-*      incorporated review comments and updated with latest CMSIS layer  
+* 	 incorporated review comments and updated with latest CMSIS layer  
 *  
 * Version 0.0.3  2010/03/10   
 *    Initial version  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_fast_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_fast_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_fast_q15.c    
 *    
 * Description:  Q15 Fast FIR filter processing function.    
@@ -284,7 +284,7 @@
     {
 
       acc0 += (q31_t) * px++ * *pb++;
-      acc0 += (q31_t) * px++ * *pb++;
+	  acc0 += (q31_t) * px++ * *pb++;
 
       tapCnt--;
     }

--- a/cmsis_dsp/FilteringFunctions/arm_fir_fast_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_fast_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_fast_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_fast_q31.c    
 *    
-* Description:    Processing function for the Q31 Fast FIR filter.    
+* Description:	Processing function for the Q31 Fast FIR filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_init_f32.c    
 *    
 * Description:  Floating-point FIR filter initialization function.    
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -51,11 +51,11 @@
  * @details    
  *    
  * @param[in,out] *S points to an instance of the floating-point FIR filter structure.    
- * @param[in]       numTaps  Number of filter coefficients in the filter.    
+ * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
  * @param[in]     *pCoeffs points to the filter coefficients buffer.    
  * @param[in]     *pState points to the state buffer.    
- * @param[in]       blockSize number of samples that are processed per call.    
- * @return           none.    
+ * @param[in] 	  blockSize number of samples that are processed per call.    
+ * @return 		  none.    
  *    
  * <b>Description:</b>    
  * \par    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_init_q15.c    
 *    
 * Description:  Q15 FIR filter initialization function.    
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -49,7 +49,7 @@
 
 /**    
  * @param[in,out]  *S points to an instance of the Q15 FIR filter structure.    
- * @param[in]        numTaps  Number of filter coefficients in the filter. Must be even and greater than or equal to 4.    
+ * @param[in] 	   numTaps  Number of filter coefficients in the filter. Must be even and greater than or equal to 4.    
  * @param[in]      *pCoeffs points to the filter coefficients buffer.    
  * @param[in]      *pState points to the state buffer.    
  * @param[in]      blockSize is number of samples processed per call.    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_init_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_init_q31.c    
 *    
-* Description:    Q31 FIR filter initialization function.    
+* Description:	Q31 FIR filter initialization function.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -51,10 +51,10 @@
  * @details    
  *    
  * @param[in,out] *S points to an instance of the Q31 FIR filter structure.    
- * @param[in]       numTaps  Number of filter coefficients in the filter.    
- * @param[in]       *pCoeffs points to the filter coefficients buffer.    
- * @param[in]       *pState points to the state buffer.    
- * @param[in]       blockSize number of samples that are processed per call.    
+ * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
+ * @param[in] 	  *pCoeffs points to the filter coefficients buffer.    
+ * @param[in] 	  *pState points to the state buffer.    
+ * @param[in] 	  blockSize number of samples that are processed per call.    
  * @return        none.    
  *    
  * <b>Description:</b>    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_init_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_init_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_init_q7.c    
 *    
 * Description:  Q7 FIR filter initialization function.    
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -48,11 +48,11 @@
  */
 /**    
  * @param[in,out] *S points to an instance of the Q7 FIR filter structure.    
- * @param[in]       numTaps  Number of filter coefficients in the filter.    
- * @param[in]       *pCoeffs points to the filter coefficients buffer.    
+ * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
+ * @param[in] 	  *pCoeffs points to the filter coefficients buffer.    
  * @param[in]     *pState points to the state buffer.    
  * @param[in]     blockSize number of samples that are processed per call.    
- * @return           none    
+ * @return     	  none    
  *    
  * <b>Description:</b>    
  * \par    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_interpolate_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_interpolate_f32.c    
 *    
-* Description:    FIR interpolation for floating-point sequences.    
+* Description:	FIR interpolation for floating-point sequences.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_interpolate_init_f32.c    
 *    
 * Description:  Floating-point FIR interpolator initialization function    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_interpolate_init_q15.c    
 *    
 * Description:  Q15 FIR interpolator initialization function    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_interpolate_init_q31.c    
 *    
 * Description:  Q31 FIR interpolator initialization function    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_interpolate_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_fir_interpolate_q15.c    
 *    
-* Description:    Q15 FIR interpolation.    
+* Description:	Q15 FIR interpolation.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -372,13 +372,13 @@
 #else
 
     *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
-    
-    /* Decrement the loop counter */
+	*pStateCurnt++ = *pState++;
+	*pStateCurnt++ = *pState++;
+	*pStateCurnt++ = *pState++;
+	
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
+	
+	/* Decrement the loop counter */
     i--;
   }
 

--- a/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_interpolate_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_fir_interpolate_q31.c    
 *    
-* Description:    Q31 FIR interpolation.    
+* Description:	Q31 FIR interpolation.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_lattice_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_lattice_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_lattice_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_lattice_f32.c    
 *    
-* Description:    Processing function for the floating-point FIR Lattice filter.    
+* Description:	Processing function for the floating-point FIR Lattice filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_lattice_init_f32.c    
 *    
 * Description:  Floating-point FIR Lattice filter initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_lattice_init_q15.c    
 *    
 * Description:  Q15 FIR Lattice filter initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_lattice_init_q31.c    
 *    
 * Description:  Q31 FIR lattice filter initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_lattice_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_lattice_q15.c    
 *    
-* Description:    Q15 FIR lattice filter processing function.    
+* Description:	Q15 FIR lattice filter processing function.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_lattice_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_lattice_q31.c    
 *    
-* Description:    Q31 FIR lattice filter processing function.    
+* Description:	Q31 FIR lattice filter processing function.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_q15.c    
 *    
 * Description:  Q15 FIR filter processing function.    
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -58,7 +58,7 @@
  *   
  * \par Restrictions   
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE   
- *    In this case input, output, state buffers should be aligned by 32-bit   
+ *	In this case input, output, state buffers should be aligned by 32-bit   
  *   
  * <b>Scaling and Overflow Behavior:</b>       
  * \par       
@@ -540,7 +540,7 @@
     do
     {
       acc0 += (q31_t) * px++ * *pb++;
-      acc0 += (q31_t) * px++ * *pb++;
+	  acc0 += (q31_t) * px++ * *pb++;
       tapCnt--;
     }
     while(tapCnt > 0u);

--- a/cmsis_dsp/FilteringFunctions/arm_fir_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_q31.c    
 *    
-* Description:    Q31 FIR filter processing function.    
+* Description:	Q31 FIR filter processing function.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_q7.c    
 *    
 * Description:  Q7 FIR filter processing function.    
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -52,7 +52,7 @@
  * @param[in]   *pSrc points to the block of input data.    
  * @param[out]  *pDst points to the block of output data.    
  * @param[in]   blockSize number of samples to process per call.    
- * @return     none.    
+ * @return 	none.    
  *    
  * <b>Scaling and Overflow Behavior:</b>    
  * \par    

--- a/cmsis_dsp/FilteringFunctions/arm_fir_sparse_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_sparse_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_sparse_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_sparse_f32.c    
 *    
-* Description:    Floating-point sparse FIR filter processing function.   
+* Description:	Floating-point sparse FIR filter processing function.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_sparse_init_f32.c    
 *    
-* Description:    Floating-point sparse FIR filter initialization function.   
+* Description:	Floating-point sparse FIR filter initialization function.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_sparse_init_q15.c    
 *    
-* Description:    Q15 sparse FIR filter initialization function.   
+* Description:	Q15 sparse FIR filter initialization function.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_sparse_init_q31.c    
 *    
-* Description:    Q31 sparse FIR filter initialization function.   
+* Description:	Q31 sparse FIR filter initialization function.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_sparse_init_q7.c    
 *    
-* Description:    Q7 sparse FIR filter initialization function.   
+* Description:	Q7 sparse FIR filter initialization function.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_sparse_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_sparse_q15.c    
 *    
-* Description:    Q15 sparse FIR filter processing function.   
+* Description:	Q15 sparse FIR filter processing function.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_sparse_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_sparse_q31.c    
 *    
-* Description:    Q31 sparse FIR filter processing function.   
+* Description:	Q31 sparse FIR filter processing function.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fir_sparse_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_fir_sparse_q7.c    
 *    
-* Description:    Q7 sparse FIR filter processing function.   
+* Description:	Q7 sparse FIR filter processing function.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_iir_lattice_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_iir_lattice_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_iir_lattice_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_iir_lattice_f32.c    
 *    
-* Description:    Floating-point IIR Lattice filter processing function.    
+* Description:	Floating-point IIR Lattice filter processing function.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_iir_lattice_init_f32.c    
 *    
 * Description:  Floating-point IIR lattice filter initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_iir_lattice_init_q15.c    
 *    
 * Description:  Q15 IIR lattice filter initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_iir_lattice_init_q31.c    
 *    
 * Description:  Initialization function for the Q31 IIR lattice filter.    

--- a/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_iir_lattice_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_iir_lattice_q15.c    
 *    
-* Description:    Q15 IIR lattice filter processing function.    
+* Description:	Q15 IIR lattice filter processing function.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -171,20 +171,20 @@
 
 #else
 
-      v1 = *pv++;
-      v2 = *pv++;
+	  v1 = *pv++;
+	  v2 = *pv++;
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-      v = __PKHBT(v1, v2, 16);
+	  v = __PKHBT(v1, v2, 16);
 
 #else
 
-      v = __PKHBT(v2, v1, 16);
+	  v = __PKHBT(v2, v1, 16);
 
-#endif    /*     #ifndef ARM_MATH_BIG_ENDIAN        */
+#endif	/* 	#ifndef ARM_MATH_BIG_ENDIAN		*/
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
 
 
       /* Pack gN-1(n) and gN-2(n) */
@@ -240,20 +240,20 @@
 
 #else
 
-      v1 = *pv++;
-      v2 = *pv++;
+	  v1 = *pv++;
+	  v2 = *pv++;
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
-      v = __PKHBT(v1, v2, 16);
+	  v = __PKHBT(v1, v2, 16);
 
 #else
 
-      v = __PKHBT(v2, v1, 16);
+	  v = __PKHBT(v2, v1, 16);
 
-#endif    /* #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif	/* #ifndef ARM_MATH_BIG_ENDIAN	 */
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
 
 
       /* Pack gN-3(n) and gN-4(n) */
@@ -336,7 +336,7 @@
     *pStateCurnt++ = *pState++;
     *pStateCurnt++ = *pState++;
 
-#endif /*    #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /*	#ifndef UNALIGNED_SUPPORT_DISABLE */
 
     /* Decrement the loop counter */
     stgCnt--;

--- a/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_iir_lattice_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_iir_lattice_q31.c    
 *    
-* Description:    Q31 IIR lattice filter processing function.    
+* Description:	Q31 IIR lattice filter processing function.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_lms_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_lms_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_lms_f32.c    
 *    
-* Description:    Processing function for the floating-point LMS filter.    
+* Description:	Processing function for the floating-point LMS filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_lms_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_init_f32.c    
 *    
 * Description:  Floating-point LMS filter initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_lms_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_init_q15.c    
 *    
 * Description:  Q15 LMS filter initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_lms_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_init_q31.c    
 *    
 * Description:  Q31 LMS filter initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_lms_norm_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_norm_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_lms_norm_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_lms_norm_f32.c    
 *    
-* Description:    Processing function for the floating-point Normalised LMS.    
+* Description:	Processing function for the floating-point Normalised LMS.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_norm_init_f32.c    
 *    
 * Description:  Floating-point NLMS filter initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_norm_init_q15.c    
 *    
 * Description:  Q15 NLMS initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,9 +2,9 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_norm_init_q31.c    
 *    
 * Description:  Q31 NLMS initialization function.    

--- a/cmsis_dsp/FilteringFunctions/arm_lms_norm_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_norm_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_lms_norm_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_lms_norm_q15.c    
 *    
-* Description:    Q15 NLMS filter.    
+* Description:	Q15 NLMS filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -67,7 +67,7 @@
 * result in 1.15 format.    
 *    
 * \par   
-*     In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
+* 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
 *    
  */
 
@@ -154,7 +154,7 @@
       acc += (((q31_t) * px++ * (*pb++)));
       acc += (((q31_t) * px++ * (*pb++)));
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
       /* Decrement the loop counter */
       tapCnt--;

--- a/cmsis_dsp/FilteringFunctions/arm_lms_norm_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_norm_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_lms_norm_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_lms_norm_q31.c    
 *    
-* Description:    Processing function for the Q31 NLMS filter.    
+* Description:	Processing function for the Q31 NLMS filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -67,7 +67,7 @@
 * The output signal and error signal are in 1.31 format.     
 *    
 * \par    
-*     In this filter, filter coefficients are updated for each sample and the    
+* 	In this filter, filter coefficients are updated for each sample and the    
 * updation of filter cofficients are saturted.    
 *     
 */

--- a/cmsis_dsp/FilteringFunctions/arm_lms_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_lms_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_lms_q15.c    
 *    
-* Description:    Processing function for the Q15 LMS filter.    
+* Description:	Processing function for the Q15 LMS filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -62,7 +62,7 @@
  * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
  *   
  * \par   
- *     In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.   
+ * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.   
  *    
  */
 
@@ -137,7 +137,7 @@
       acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
 
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
       /* Decrement the loop counter */
       tapCnt--;

--- a/cmsis_dsp/FilteringFunctions/arm_lms_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_lms_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_lms_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_lms_q31.c    
 *    
-* Description:    Processing function for the Q31 LMS filter.    
+* Description:	Processing function for the Q31 LMS filter.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -66,7 +66,7 @@
  * The output signal and error signal are in 1.31 format.     
  *    
  * \par    
- *     In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
+ * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
  */
 
 void arm_lms_q31(

--- a/cmsis_dsp/MatrixFunctions/arm_mat_add_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_add_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_add_f32.c    
 *    
-* Description:    Floating-point matrix addition    
+* Description:	Floating-point matrix addition    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -64,7 +64,7 @@
  * @param[in]       *pSrcA points to the first input matrix structure        
  * @param[in]       *pSrcB points to the second input matrix structure        
  * @param[out]      *pDst points to output matrix structure        
- * @return             The function returns either        
+ * @return     		The function returns either        
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.        
  */
 

--- a/cmsis_dsp/MatrixFunctions/arm_mat_add_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_add_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_add_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_add_q15.c    
 *    
-* Description:    Q15 matrix addition    
+* Description:	Q15 matrix addition    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -52,7 +52,7 @@
  * @param[in]       *pSrcA points to the first input matrix structure    
  * @param[in]       *pSrcB points to the second input matrix structure    
  * @param[out]      *pDst points to output matrix structure    
- * @return             The function returns either    
+ * @return     		The function returns either    
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  *    
  * <b>Scaling and Overflow Behavior:</b>    

--- a/cmsis_dsp/MatrixFunctions/arm_mat_add_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_add_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_add_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_add_q31.c    
 *    
-* Description:    Q31 matrix addition    
+* Description:	Q31 matrix addition    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -52,7 +52,7 @@
  * @param[in]       *pSrcA points to the first input matrix structure      
  * @param[in]       *pSrcB points to the second input matrix structure      
  * @param[out]      *pDst points to output matrix structure      
- * @return             The function returns either      
+ * @return     		The function returns either      
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.      
  *      
  * <b>Scaling and Overflow Behavior:</b>      

--- a/cmsis_dsp/MatrixFunctions/arm_mat_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_init_f32.c    
 *    
-* Description:    Floating-point matrix initialization.    
+* Description:	Floating-point matrix initialization.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -61,7 +61,7 @@
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
    * @param[in]     nRows          number of rows in the matrix.    
    * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData       points to the matrix data array.    
+   * @param[in]     *pData	   points to the matrix data array.    
    * @return        none    
    */
 

--- a/cmsis_dsp/MatrixFunctions/arm_mat_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_init_q15.c    
 *    
-* Description:    Q15 matrix initialization.    
+* Description:	Q15 matrix initialization.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -53,7 +53,7 @@
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
    * @param[in]     nRows          number of rows in the matrix.    
    * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData       points to the matrix data array.    
+   * @param[in]     *pData	   points to the matrix data array.    
    * @return        none    
    */
 

--- a/cmsis_dsp/MatrixFunctions/arm_mat_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_init_q31.c    
 *    
-* Description:    Q31 matrix initialization.    
+* Description:	Q31 matrix initialization.    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
 * Version 1.1.0 2012/02/15 
@@ -57,7 +57,7 @@
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
    * @param[in]     nRows          number of rows in the matrix.    
    * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData       points to the matrix data array.    
+   * @param[in]     *pData	   points to the matrix data array.    
    * @return        none    
    */
 

--- a/cmsis_dsp/MatrixFunctions/arm_mat_inverse_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_inverse_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_inverse_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_inverse_f32.c    
 *    
-* Description:    Floating-point matrix inverse.    
+* Description:	Floating-point matrix inverse.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -67,7 +67,7 @@
  * @brief Floating-point matrix inverse.    
  * @param[in]       *pSrc points to input matrix structure    
  * @param[out]      *pDst points to output matrix structure    
- * @return             The function returns    
+ * @return     		The function returns    
  * <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size    
  * of the output matrix does not match the size of the input matrix.    
  * If the input matrix is found to be singular (non-invertible), then the function returns    
@@ -110,39 +110,39 @@
   {
 
     /*--------------------------------------------------------------------------------------------------------------    
-     * Matrix Inverse can be solved using elementary row operations.    
-     *    
-     *    Gauss-Jordan Method:    
-     *    
-     *       1. First combine the identity matrix and the input matrix separated by a bar to form an    
-     *        augmented matrix as follows:    
-     *                        _                      _         _           _    
-     *                       |  a11  a12 | 1   0  |       |  X11 X12  |    
-     *                       |           |        |   =   |           |    
-     *                       |_ a21  a22 | 0   1 _|       |_ X21 X21 _|    
-     *    
-     *        2. In our implementation, pDst Matrix is used as identity matrix.    
-     *    
-     *        3. Begin with the first row. Let i = 1.    
-     *    
-     *        4. Check to see if the pivot for row i is zero.    
-     *           The pivot is the element of the main diagonal that is on the current row.    
-     *           For instance, if working with row i, then the pivot element is aii.    
-     *           If the pivot is zero, exchange that row with a row below it that does not    
-     *           contain a zero in column i. If this is not possible, then an inverse    
-     *           to that matrix does not exist.    
-     *    
-     *        5. Divide every element of row i by the pivot.    
-     *    
-     *        6. For every row below and  row i, replace that row with the sum of that row and    
-     *           a multiple of row i so that each new element in column i below row i is zero.    
-     *    
-     *        7. Move to the next row and column and repeat steps 2 through 5 until you have zeros    
-     *           for every element below and above the main diagonal.    
-     *    
-     *        8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).    
-     *           Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).    
-     *----------------------------------------------------------------------------------------------------------------*/
+	 * Matrix Inverse can be solved using elementary row operations.    
+	 *    
+	 *	Gauss-Jordan Method:    
+	 *    
+	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an    
+	 *        augmented matrix as follows:    
+	 *				        _ 	      	       _         _	       _    
+	 *					   |  a11  a12 | 1   0  |       |  X11 X12  |    
+	 *					   |           |        |   =   |           |    
+	 *					   |_ a21  a22 | 0   1 _|       |_ X21 X21 _|    
+	 *    
+	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
+	 *    
+	 *		3. Begin with the first row. Let i = 1.    
+	 *    
+	 *	    4. Check to see if the pivot for row i is zero.    
+	 *		   The pivot is the element of the main diagonal that is on the current row.    
+	 *		   For instance, if working with row i, then the pivot element is aii.    
+	 *		   If the pivot is zero, exchange that row with a row below it that does not    
+	 *		   contain a zero in column i. If this is not possible, then an inverse    
+	 *		   to that matrix does not exist.    
+	 *    
+	 *	    5. Divide every element of row i by the pivot.    
+	 *    
+	 *	    6. For every row below and  row i, replace that row with the sum of that row and    
+	 *		   a multiple of row i so that each new element in column i below row i is zero.    
+	 *    
+	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros    
+	 *		   for every element below and above the main diagonal.    
+	 *    
+	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).    
+	 *		   Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).    
+	 *----------------------------------------------------------------------------------------------------------------*/
 
     /* Working pointer for destination matrix */
     pInT2 = pOut;
@@ -421,39 +421,39 @@
   {
 
     /*--------------------------------------------------------------------------------------------------------------       
-     * Matrix Inverse can be solved using elementary row operations.        
-     *        
-     *    Gauss-Jordan Method:       
-     *                
-     *       1. First combine the identity matrix and the input matrix separated by a bar to form an        
-     *        augmented matrix as follows:        
-     *                        _  _          _        _       _   _         _           _       
-     *                       |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |         
-     *                       |  |            | | |        |   |   =   |           |        
-     *                       |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|       
-     *                              
-     *        2. In our implementation, pDst Matrix is used as identity matrix.    
-     *       
-     *        3. Begin with the first row. Let i = 1.       
-     *       
-     *        4. Check to see if the pivot for row i is zero.       
-     *           The pivot is the element of the main diagonal that is on the current row.       
-     *           For instance, if working with row i, then the pivot element is aii.       
-     *           If the pivot is zero, exchange that row with a row below it that does not        
-     *           contain a zero in column i. If this is not possible, then an inverse        
-     *           to that matrix does not exist.       
-     *           
-     *        5. Divide every element of row i by the pivot.       
-     *           
-     *        6. For every row below and  row i, replace that row with the sum of that row and        
-     *           a multiple of row i so that each new element in column i below row i is zero.       
-     *           
-     *        7. Move to the next row and column and repeat steps 2 through 5 until you have zeros       
-     *           for every element below and above the main diagonal.        
-     *                             
-     *        8. Now an identical matrix is formed to the left of the bar(input matrix, src).       
-     *           Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).         
-     *----------------------------------------------------------------------------------------------------------------*/
+	 * Matrix Inverse can be solved using elementary row operations.        
+	 *        
+	 *	Gauss-Jordan Method:       
+	 *	 	       
+	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an        
+	 *        augmented matrix as follows:        
+	 *				        _  _	      _	    _	   _   _         _	       _       
+	 *					   |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |         
+	 *					   |  |            | | |        |   |   =   |           |        
+	 *					   |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|       
+	 *					          
+	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
+	 *       
+	 *		3. Begin with the first row. Let i = 1.       
+	 *       
+	 *	    4. Check to see if the pivot for row i is zero.       
+	 *		   The pivot is the element of the main diagonal that is on the current row.       
+	 *		   For instance, if working with row i, then the pivot element is aii.       
+	 *		   If the pivot is zero, exchange that row with a row below it that does not        
+	 *		   contain a zero in column i. If this is not possible, then an inverse        
+	 *		   to that matrix does not exist.       
+	 *	       
+	 *	    5. Divide every element of row i by the pivot.       
+	 *	       
+	 *	    6. For every row below and  row i, replace that row with the sum of that row and        
+	 *		   a multiple of row i so that each new element in column i below row i is zero.       
+	 *	       
+	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros       
+	 *		   for every element below and above the main diagonal.        
+	 *		   		          
+	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, src).       
+	 *		   Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).         
+	 *----------------------------------------------------------------------------------------------------------------*/
 
     /* Working pointer for destination matrix */
     pInT2 = pOut;

--- a/cmsis_dsp/MatrixFunctions/arm_mat_mult_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_mult_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,10 +2,10 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_mult_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_mult_f32.c    
 *    
 * Description:  Floating-point matrix multiplication.    
 *    
@@ -69,7 +69,7 @@
  * @param[in]       *pSrcA points to the first input matrix structure    
  * @param[in]       *pSrcB points to the second input matrix structure    
  * @param[out]      *pDst points to output matrix structure    
- * @return             The function returns either    
+ * @return     		The function returns either    
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  */
 

--- a/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_mult_fast_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_mult_fast_q15.c    
 *    
-* Description:     Q15 matrix multiplication (fast variant)    
+* Description:	 Q15 matrix multiplication (fast variant)    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -47,8 +47,8 @@
  * @param[in]       *pSrcA points to the first input matrix structure    
  * @param[in]       *pSrcB points to the second input matrix structure    
  * @param[out]      *pDst points to output matrix structure    
- * @param[in]        *pState points to the array for storing intermediate results    
- * @return             The function returns either    
+ * @param[in]		*pState points to the array for storing intermediate results    
+ * @return     		The function returns either    
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  *    
  * @details    
@@ -102,7 +102,7 @@
   q15_t in;                                      /* Temporary variable to hold the input value */
   q15_t inA1, inA2, inB1, inB2;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 #ifdef ARM_MATH_MATRIX_CHECK
   /* Check for matrix mismatch condition */
@@ -224,9 +224,9 @@
         /* Store one element in the destination */
         *px = in;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
         
-        /* Update the pointer px to point to the next row of the transposed matrix */
+		/* Update the pointer px to point to the next row of the transposed matrix */
         px += numRowsB;
 
         /* Decrement the column loop counter */
@@ -315,7 +315,7 @@
           sum += inA1 * inB1;
           sum += inA2 * inB2;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
           /* Decrement the loop counter */
           colCnt--;

--- a/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_mult_fast_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_mult_fast_q31.c    
 *    
-* Description:     Q31 matrix multiplication (fast variant).    
+* Description:	 Q31 matrix multiplication (fast variant).    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -46,7 +46,7 @@
  * @param[in]       *pSrcA points to the first input matrix structure    
  * @param[in]       *pSrcB points to the second input matrix structure    
  * @param[out]      *pDst points to output matrix structure    
- * @return             The function returns either    
+ * @return     		The function returns either    
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  *    
  * @details    

--- a/cmsis_dsp/MatrixFunctions/arm_mat_mult_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_mult_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_mult_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_mult_q15.c    
 *    
-* Description:     Q15 matrix multiplication.    
+* Description:	 Q15 matrix multiplication.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -53,8 +53,8 @@
  * @param[in]       *pSrcA points to the first input matrix structure    
  * @param[in]       *pSrcB points to the second input matrix structure    
  * @param[out]      *pDst points to output matrix structure    
- * @param[in]        *pState points to the array for storing intermediate results   
- * @return             The function returns either    
+ * @param[in]		*pState points to the array for storing intermediate results   
+ * @return     		The function returns either    
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  *    
  * @details    
@@ -107,7 +107,7 @@
   q15_t in;                                      /* Temporary variable to hold the input value */
   q15_t inA1, inB1, inA2, inB2;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 #ifdef ARM_MATH_MATRIX_CHECK
   /* Check for matrix mismatch condition */
@@ -236,7 +236,7 @@
         /* Update the pointer px to point to the next row of the transposed matrix */
         px += numRowsB;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
        /* Decrement the column loop counter */
         col--;
@@ -331,7 +331,7 @@
           sum += inA1 * inB1;
           sum += inA2 * inB2;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
           /* Decrement the loop counter */
           colCnt--;

--- a/cmsis_dsp/MatrixFunctions/arm_mat_mult_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_mult_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_mult_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_mult_q31.c    
 *    
-* Description:     Q31 matrix multiplication.    
+* Description:	 Q31 matrix multiplication.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -52,7 +52,7 @@
  * @param[in]       *pSrcA points to the first input matrix structure    
  * @param[in]       *pSrcB points to the second input matrix structure    
  * @param[out]      *pDst points to output matrix structure    
- * @return             The function returns either    
+ * @return     		The function returns either    
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  *    
  * @details    

--- a/cmsis_dsp/MatrixFunctions/arm_mat_scale_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_scale_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
+* Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_scale_f32.c    
 *    
-* Description:    Multiplies a floating-point matrix by a scalar.    
+* Description:	Multiplies a floating-point matrix by a scalar.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -70,7 +70,7 @@
  * @param[in]       *pSrc points to input matrix structure        
  * @param[in]       scale scale factor to be applied         
  * @param[out]      *pDst points to output matrix structure        
- * @return             The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>         
+ * @return     		The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>         
  * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.        
  *        
  */

--- a/cmsis_dsp/MatrixFunctions/arm_mat_scale_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_scale_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_scale_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_scale_q15.c    
 *    
-* Description:    Multiplies a Q15 matrix by a scalar.    
+* Description:	Multiplies a Q15 matrix by a scalar.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -53,7 +53,7 @@
  * @param[in]       scaleFract fractional portion of the scale factor    
  * @param[in]       shift number of bits to shift the result by    
  * @param[out]      *pDst points to output matrix structure    
- * @return             The function returns either    
+ * @return     		The function returns either    
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  *    
  * @details    

--- a/cmsis_dsp/MatrixFunctions/arm_mat_scale_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_scale_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_scale_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_scale_q31.c    
 *    
-* Description:    Multiplies a Q31 matrix by a scalar.    
+* Description:	Multiplies a Q31 matrix by a scalar.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -53,7 +53,7 @@
  * @param[in]       scaleFract fractional portion of the scale factor        
  * @param[in]       shift number of bits to shift the result by        
  * @param[out]      *pDst points to output matrix structure        
- * @return             The function returns either        
+ * @return     		The function returns either        
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.        
  *        
  * @details        

--- a/cmsis_dsp/MatrixFunctions/arm_mat_sub_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_sub_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_sub_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_sub_f32.c    
 *    
-* Description:    Floating-point matrix subtraction.    
+* Description:	Floating-point matrix subtraction.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -63,7 +63,7 @@
  * @param[in]       *pSrcA points to the first input matrix structure        
  * @param[in]       *pSrcB points to the second input matrix structure        
  * @param[out]      *pDst points to output matrix structure        
- * @return             The function returns either        
+ * @return     		The function returns either        
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.        
  */
 

--- a/cmsis_dsp/MatrixFunctions/arm_mat_sub_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_sub_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_sub_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_sub_q15.c    
 *    
-* Description:    Q15 Matrix subtraction    
+* Description:	Q15 Matrix subtraction    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -52,7 +52,7 @@
  * @param[in]       *pSrcA points to the first input matrix structure    
  * @param[in]       *pSrcB points to the second input matrix structure    
  * @param[out]      *pDst points to output matrix structure    
- * @return             The function returns either    
+ * @return     		The function returns either    
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  *    
  * <b>Scaling and Overflow Behavior:</b>    

--- a/cmsis_dsp/MatrixFunctions/arm_mat_sub_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_sub_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_sub_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_sub_q31.c    
 *    
-* Description:    Q31 matrix subtraction    
+* Description:	Q31 matrix subtraction    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -52,7 +52,7 @@
  * @param[in]       *pSrcA points to the first input matrix structure        
  * @param[in]       *pSrcB points to the second input matrix structure        
  * @param[out]      *pDst points to output matrix structure        
- * @return             The function returns either        
+ * @return     		The function returns either        
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.        
  *        
  * <b>Scaling and Overflow Behavior:</b>        

--- a/cmsis_dsp/MatrixFunctions/arm_mat_trans_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_trans_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_trans_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_trans_f32.c    
 *    
-* Description:    Floating-point matrix transpose.    
+* Description:	Floating-point matrix transpose.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -59,7 +59,7 @@
   * @brief Floating-point matrix transpose.    
   * @param[in]  *pSrc points to the input matrix    
   * @param[out] *pDst points to the output matrix    
-  * @return     The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>    
+  * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>    
   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
   */
 

--- a/cmsis_dsp/MatrixFunctions/arm_mat_trans_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_trans_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_trans_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_trans_q15.c    
 *    
-* Description:    Q15 matrix transpose.    
+* Description:	Q15 matrix transpose.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -51,7 +51,7 @@
  * @brief Q15 matrix transpose.    
  * @param[in]  *pSrc points to the input matrix    
  * @param[out] *pDst points to the output matrix    
- * @return     The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>    
+ * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>    
  * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  */
 
@@ -77,7 +77,7 @@
 
   q15_t in;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
@@ -177,7 +177,7 @@
 
 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
 
-#else     
+#else	 
         /* Read one element from the row */
         in = *pSrcA++;
 
@@ -211,7 +211,7 @@
         /* Store one element in the destination */
         *pOut = in;
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
         /* Update the pointer pOut to point to the next row of the transposed matrix */
         pOut += nRows;

--- a/cmsis_dsp/MatrixFunctions/arm_mat_trans_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/MatrixFunctions/arm_mat_trans_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mat_trans_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mat_trans_q31.c    
 *    
-* Description:    Q31 matrix transpose.    
+* Description:	Q31 matrix transpose.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -51,7 +51,7 @@
   * @brief Q31 matrix transpose.    
   * @param[in]  *pSrc points to the input matrix    
   * @param[out] *pDst points to the output matrix    
-  * @return     The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>    
+  * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>    
   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
  */
 

--- a/cmsis_dsp/StatisticsFunctions/arm_max_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_max_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_max_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_max_f32.c    
 *    
-* Description:    Maximum value of a floating-point vector.    
+* Description:	Maximum value of a floating-point vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_max_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_max_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_max_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_max_q15.c    
 *    
-* Description:    Maximum value of a Q15 vector.    
+* Description:	Maximum value of a Q15 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_max_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_max_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_max_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_max_q31.c    
 *    
-* Description:    Maximum value of a Q31 vector.    
+* Description:	Maximum value of a Q31 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_max_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_max_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_max_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_max_q7.c    
 *    
-* Description:    Maximum value of a Q7 vector.    
+* Description:	Maximum value of a Q7 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_mean_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_mean_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mean_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_mean_f32.c    
 *    
-* Description:    Mean value of a floating-point vector.   
+* Description:	Mean value of a floating-point vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -43,7 +43,7 @@
  * The underlying algorithm is used:    
  *    
  * <pre>    
- *     Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;    
+ * 	Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;    
  * </pre>    
  *    
  * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    

--- a/cmsis_dsp/StatisticsFunctions/arm_mean_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_mean_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mean_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_mean_q15.c    
 *    
-* Description:    Mean value of a Q15 vector.   
+* Description:	Mean value of a Q15 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_mean_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_mean_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mean_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_mean_q31.c    
 *    
-* Description:    Mean value of a Q31 vector.   
+* Description:	Mean value of a Q31 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_mean_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_mean_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_mean_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_mean_q7.c    
 *    
-* Description:    Mean value of a Q7 vector.   
+* Description:	Mean value of a Q7 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_min_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_min_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_min_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_min_f32.c    
 *    
-* Description:    Minimum value of a floating-point vector.    
+* Description:	Minimum value of a floating-point vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_min_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_min_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_min_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_min_q15.c    
 *    
-* Description:    Minimum value of a Q15 vector.    
+* Description:	Minimum value of a Q15 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_min_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_min_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_min_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_min_q31.c    
 *    
-* Description:    Minimum value of a Q31 vector.    
+* Description:	Minimum value of a Q31 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_min_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_min_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_min_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_min_q7.c    
 *    
-* Description:    Minimum value of a Q7 vector.    
+* Description:	Minimum value of a Q7 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_power_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_power_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_power_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_power_f32.c    
 *    
-* Description:    Sum of the squares of the elements of a floating-point vector.    
+* Description:	Sum of the squares of the elements of a floating-point vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -46,7 +46,7 @@
  * The underlying algorithm is used:    
  *    
  * <pre>    
- *     Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];    
+ * 	Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];    
  * </pre>    
  *   
  * There are separate functions for floating point, Q31, Q15, and Q7 data types.     

--- a/cmsis_dsp/StatisticsFunctions/arm_power_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_power_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_power_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_power_q15.c    
 *    
-* Description:    Sum of the squares of the elements of a Q15 vector.    
+* Description:	Sum of the squares of the elements of a Q15 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_power_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_power_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_power_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_power_q31.c    
 *    
-* Description:    Sum of the squares of the elements of a Q31 vector.   
+* Description:	Sum of the squares of the elements of a Q31 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_power_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_power_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_power_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_power_q7.c    
 *    
-* Description:    Sum of the squares of the elements of a Q7 vector.    
+* Description:	Sum of the squares of the elements of a Q7 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_rms_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_rms_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_rms_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_rms_f32.c    
 *    
-* Description:    Root mean square value of an array of F32 type    
+* Description:	Root mean square value of an array of F32 type    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -44,7 +44,7 @@
  * The underlying algorithm is used:    
  *    
  * <pre>    
- *     Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));    
+ * 	Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));    
  * </pre>    
  *   
  * There are separate functions for floating point, Q31, and Q15 data types.     

--- a/cmsis_dsp/StatisticsFunctions/arm_rms_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_rms_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_rms_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_rms_q15.c    
 *    
-* Description:    Root Mean Square of the elements of a Q15 vector.  
+* Description:	Root Mean Square of the elements of a Q15 vector.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_rms_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_rms_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_rms_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_rms_q31.c    
 *    
-* Description:    Root Mean Square of the elements of a Q31 vector.    
+* Description:	Root Mean Square of the elements of a Q31 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_std_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_std_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_std_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_std_f32.c    
 *    
-* Description:    Standard deviation of the elements of a floating-point vector.  
+* Description:	Standard deviation of the elements of a floating-point vector.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -43,11 +43,11 @@
  * The underlying algorithm is used:    
  *   
  * <pre>    
- *     Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))   
+ * 	Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))   
  *   
- *       where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
+ *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
  *   
- *                       sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
+ *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
  * </pre>   
  *    
  * There are separate functions for floating point, Q31, and Q15 data types.    

--- a/cmsis_dsp/StatisticsFunctions/arm_std_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_std_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_std_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_std_q15.c    
 *    
-* Description:    Standard deviation of an array of Q15 type.    
+* Description:	Standard deviation of an array of Q15 type.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_std_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_std_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_std_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_std_q31.c    
 *    
-* Description:    Standard deviation of an array of Q31 type.    
+* Description:	Standard deviation of an array of Q31 type.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_var_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_var_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_var_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_var_f32.c    
 *    
-* Description:    Variance of the elements of a floating-point vector.    
+* Description:	Variance of the elements of a floating-point vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -43,11 +43,11 @@
  * The underlying algorithm is used:    
  *    
  * <pre>    
- *     Result = (sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1)   
+ * 	Result = (sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1)   
  *   
- *       where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
+ *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
  *   
- *                       sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
+ *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
  * </pre>   
  *    
  * There are separate functions for floating point, Q31, and Q15 data types.    

--- a/cmsis_dsp/StatisticsFunctions/arm_var_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_var_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_var_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_var_q15.c    
 *    
-* Description:    Variance of an array of Q15 type.    
+* Description:	Variance of an array of Q15 type.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/StatisticsFunctions/arm_var_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/StatisticsFunctions/arm_var_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_var_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_var_q31.c    
 *    
-* Description:    Variance of an array of Q31 type.    
+* Description:	Variance of an array of Q31 type.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/SupportFunctions/arm_copy_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_copy_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_copy_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_copy_f32.c    
 *    
-* Description:    Copies the elements of a floating-point vector.  
+* Description:	Copies the elements of a floating-point vector.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -45,7 +45,7 @@
  * Copies sample by sample from source vector to destination vector.    
  *    
  * <pre>    
- *     pDst[n] = pSrc[n];   0 <= n < blockSize.    
+ * 	pDst[n] = pSrc[n];   0 <= n < blockSize.    
  * </pre>    
  *   
  * There are separate functions for floating point, Q31, Q15, and Q7 data types.     

--- a/cmsis_dsp/SupportFunctions/arm_copy_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_copy_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_copy_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_copy_q15.c    
 *    
-* Description:    Copies the elements of a Q15 vector.   
+* Description:	Copies the elements of a Q15 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/SupportFunctions/arm_copy_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_copy_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_copy_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_copy_q31.c    
 *    
-* Description:    Copies the elements of a Q31 vector.   
+* Description:	Copies the elements of a Q31 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/SupportFunctions/arm_copy_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_copy_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_copy_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_copy_q7.c    
 *    
-* Description:    Copies the elements of a Q7 vector.    
+* Description:	Copies the elements of a Q7 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/SupportFunctions/arm_fill_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_fill_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fill_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_fill_f32.c    
 *    
-* Description:    Fills a constant value into a floating-point vector.   
+* Description:	Fills a constant value into a floating-point vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -45,7 +45,7 @@
  * Fills the destination vector with a constant value.    
  *    
  * <pre>    
- *     pDst[n] = value;   0 <= n < blockSize.    
+ * 	pDst[n] = value;   0 <= n < blockSize.    
  * </pre>    
  *   
  * There are separate functions for floating point, Q31, Q15, and Q7 data types.     

--- a/cmsis_dsp/SupportFunctions/arm_fill_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_fill_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fill_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_fill_q15.c    
 *    
-* Description:    Fills a constant value into a Q15 vector.   
+* Description:	Fills a constant value into a Q15 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/SupportFunctions/arm_fill_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_fill_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fill_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_fill_q31.c    
 *    
-* Description:    Fills a constant value into a Q31 vector.   
+* Description:	Fills a constant value into a Q31 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/SupportFunctions/arm_fill_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_fill_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_fill_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_fill_q7.c    
 *    
-* Description:    Fills a constant value into a Q7 vector.   
+* Description:	Fills a constant value into a Q7 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/SupportFunctions/arm_float_to_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_float_to_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_float_to_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_float_to_q15.c    
 *    
-* Description:    Converts the elements of the floating-point vector to Q15 vector.    
+* Description:	Converts the elements of the floating-point vector to Q15 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -52,7 +52,7 @@
  * \par   
  * The equation used for the conversion process is:    
  * <pre>    
- *     pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.    
+ * 	pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.    
  * </pre>    
  * \par Scaling and Overflow Behavior:    
  * \par    

--- a/cmsis_dsp/SupportFunctions/arm_float_to_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_float_to_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_float_to_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_float_to_q31.c    
 *    
-* Description:    Converts the elements of the floating-point vector to Q31 vector.    
+* Description:	Converts the elements of the floating-point vector to Q31 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -57,7 +57,7 @@
  * The equation used for the conversion process is:    
  *   
  * <pre>    
- *     pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.    
+ * 	pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.    
  * </pre>    
  * <b>Scaling and Overflow Behavior:</b>    
  * \par    

--- a/cmsis_dsp/SupportFunctions/arm_float_to_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_float_to_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_float_to_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_float_to_q7.c    
 *    
-* Description:    Converts the elements of the floating-point vector to Q7 vector.   
+* Description:	Converts the elements of the floating-point vector to Q7 vector.   
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -52,7 +52,7 @@
  * \par   
  * The equation used for the conversion process is:    
  * <pre>    
- *     pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.    
+ * 	pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.    
  * </pre>    
  * \par Scaling and Overflow Behavior:    
  * \par    

--- a/cmsis_dsp/SupportFunctions/arm_q15_to_float.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_q15_to_float.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_q15_to_float.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_q15_to_float.c    
 *    
-* Description:    Converts the elements of the Q15 vector to floating-point vector.     
+* Description:	Converts the elements of the Q15 vector to floating-point vector.     
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -60,7 +60,7 @@
  * The equation used for the conversion process is:    
  *   
  * <pre>    
- *     pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.    
+ * 	pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.    
  * </pre>    
  *   
  */

--- a/cmsis_dsp/SupportFunctions/arm_q15_to_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_q15_to_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_q15_to_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_q15_to_q31.c    
 *    
-* Description:    Converts the elements of the Q15 vector to Q31 vector.  
+* Description:	Converts the elements of the Q15 vector to Q31 vector.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -53,7 +53,7 @@
  * The equation used for the conversion process is:   
  *   
  * <pre>    
- *     pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.    
+ * 	pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.    
  * </pre>    
  *   
  */

--- a/cmsis_dsp/SupportFunctions/arm_q15_to_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_q15_to_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_q15_to_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_q15_to_q7.c    
 *    
-* Description:    Converts the elements of the Q15 vector to Q7 vector.  
+* Description:	Converts the elements of the Q15 vector to Q7 vector.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -54,7 +54,7 @@
  * The equation used for the conversion process is:    
  *   
  * <pre>    
- *     pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.    
+ * 	pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.    
  * </pre>   
  *   
  */

--- a/cmsis_dsp/SupportFunctions/arm_q31_to_float.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_q31_to_float.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_q31_to_float.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_q31_to_float.c    
 *    
-* Description:    Converts the elements of the Q31 vector to floating-point vector.      
+* Description:	Converts the elements of the Q31 vector to floating-point vector.      
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -57,7 +57,7 @@
  * The equation used for the conversion process is:    
  *   
  * <pre>    
- *     pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.    
+ * 	pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.    
  * </pre>    
  *   
  */

--- a/cmsis_dsp/SupportFunctions/arm_q31_to_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_q31_to_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_q31_to_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_q31_to_q15.c    
 *    
-* Description:    Converts the elements of the Q31 vector to Q15 vector.    
+* Description:	Converts the elements of the Q31 vector to Q15 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -53,7 +53,7 @@
  * The equation used for the conversion process is:    
  *   
  * <pre>    
- *     pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.    
+ * 	pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.    
  * </pre>    
  *   
  */

--- a/cmsis_dsp/SupportFunctions/arm_q31_to_q7.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_q31_to_q7.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_q31_to_q7.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_q31_to_q7.c    
 *    
-* Description:    Converts the elements of the Q31 vector to Q7 vector.    
+* Description:	Converts the elements of the Q31 vector to Q7 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -53,7 +53,7 @@
  * The equation used for the conversion process is:    
  *   
  * <pre>    
- *     pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.     
+ * 	pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.     
  * </pre>    
  *   
  */

--- a/cmsis_dsp/SupportFunctions/arm_q7_to_float.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_q7_to_float.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_q7_to_float.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_q7_to_float.c    
 *    
-* Description:    Converts the elements of the Q7 vector to floating-point vector.    
+* Description:	Converts the elements of the Q7 vector to floating-point vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -51,13 +51,13 @@
  * @param[out]      *pDst points to the floating-point output vector   
  * @param[in]       blockSize length of the input vector    
  * @return none.    
- *             
+ *		     
  * \par Description:    
  *    
  * The equation used for the conversion process is:    
  *   
  * <pre>    
- *     pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.    
+ * 	pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.    
  * </pre>    
  *   
  */

--- a/cmsis_dsp/SupportFunctions/arm_q7_to_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_q7_to_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_q7_to_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_q7_to_q15.c    
 *    
-* Description:    Converts the elements of the Q7 vector to Q15 vector.    
+* Description:	Converts the elements of the Q7 vector to Q15 vector.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -56,7 +56,7 @@
  * The equation used for the conversion process is:    
  *   
  * <pre>    
- *     pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.    
+ * 	pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.    
  * </pre>    
  *   
  */

--- a/cmsis_dsp/SupportFunctions/arm_q7_to_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/arm_q7_to_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_q7_to_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_q7_to_q31.c    
 *    
-* Description:    Converts the elements of the Q7 vector to Q31 vector.  
+* Description:	Converts the elements of the Q7 vector to Q31 vector.  
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -53,7 +53,7 @@
  * The equation used for the conversion process is:    
  *   
  * <pre>    
- *     pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.   
+ * 	pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.   
  * </pre>     
  *   
  */

--- a/cmsis_dsp/SupportFunctions/math_helper.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/SupportFunctions/math_helper.c	Thu May 30 17:10:11 2013 +0100
@@ -2,13 +2,13 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.  
 *  
 * $Date:        29. November 2010  
-* $Revision:     V1.0.3  
+* $Revision: 	V1.0.3  
 *  
-* Project:         CMSIS DSP Library 
+* Project: 	    CMSIS DSP Library 
 *
-* Title:        math_helper.c
+* Title:	    math_helper.c
 *
-* Description:    Definition of all helper functions required.  
+* Description:	Definition of all helper functions required.  
 *  
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -29,21 +29,21 @@
 * -------------------------------------------------------------------- */
 
 /* ----------------------------------------------------------------------
-*        Include standard header files  
+*		Include standard header files  
 * -------------------------------------------------------------------- */
 #include<math.h>
 
 /* ----------------------------------------------------------------------
-*        Include project header files  
+*		Include project header files  
 * -------------------------------------------------------------------- */
 #include "math_helper.h"
 
 /** 
  * @brief  Caluclation of SNR
- * @param  float*     Pointer to the reference buffer
- * @param  float*    Pointer to the test buffer
- * @param  uint32_t    total number of samples
- * @return float    SNR
+ * @param  float* 	Pointer to the reference buffer
+ * @param  float*	Pointer to the test buffer
+ * @param  uint32_t	total number of samples
+ * @return float	SNR
  * The function Caluclates signal to noise ratio for the reference output 
  * and test output 
  */
@@ -58,36 +58,36 @@
 
   for (i = 0; i < buffSize; i++)
     {
-       /* Checking for a NAN value in pRef array */
-      test =   (int *)(&pRef[i]);
+ 	  /* Checking for a NAN value in pRef array */
+	  test =   (int *)(&pRef[i]);
       temp =  *test;
 
-      if(temp == 0x7FC00000)
-      {
-              return(0);
-      }
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
 
-      /* Checking for a NAN value in pTest array */
-      test =   (int *)(&pTest[i]);
+	  /* Checking for a NAN value in pTest array */
+	  test =   (int *)(&pTest[i]);
       temp =  *test;
 
-      if(temp == 0x7FC00000)
-      {
-              return(0);
-      }
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
       EnergySignal += pRef[i] * pRef[i];
       EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); 
     }
 
-    /* Checking for a NAN value in EnergyError */
-    test =   (int *)(&EnergyError);
+	/* Checking for a NAN value in EnergyError */
+	test =   (int *)(&EnergyError);
     temp =  *test;
 
     if(temp == 0x7FC00000)
     {
-          return(0);
+  		return(0);
     }
-    
+	
 
   SNR = 10 * log10 (EnergySignal / EnergyError);
 
@@ -98,9 +98,9 @@
 
 /** 
  * @brief  Provide guard bits for Input buffer
- * @param  q15_t*         Pointer to input buffer
- * @param  uint32_t     blockSize
- * @param  uint32_t     guard_bits
+ * @param  q15_t* 	    Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
  * @return none
  * The function Provides the guard bits for the buffer 
  * to avoid overflow 
@@ -119,7 +119,7 @@
 
 /** 
  * @brief  Converts float to fixed in q12.20 format
- * @param  uint32_t     number of samples in the buffer
+ * @param  uint32_t 	number of samples in the buffer
  * @return none
  * The function converts floating point values to fixed point(q12.20) values 
  */
@@ -130,7 +130,7 @@
 
   for (i = 0; i < numSamples; i++)
     {
-      /* 1048576.0f corresponds to pow(2, 20) */
+	  /* 1048576.0f corresponds to pow(2, 20) */
       pOut[i] = (q31_t) (pIn[i] * 1048576.0f);
 
       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
@@ -144,9 +144,9 @@
 
 /** 
  * @brief  Compare MATLAB Reference Output and ARM Test output
- * @param  q15_t*     Pointer to Ref buffer
- * @param  q15_t*     Pointer to Test buffer
- * @param  uint32_t     number of samples in the buffer
+ * @param  q15_t* 	Pointer to Ref buffer
+ * @param  q15_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
  * @return none 
  */
 
@@ -158,13 +158,13 @@
 
   for (i = 0; i < numSamples; i++)
   {
-      diff = pIn[i] - pOut[i];
-      diffCrnt = (diff > 0) ? diff : -diff;
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
 
-    if(diffCrnt > maxDiff)
-    {
-        maxDiff = diffCrnt;
-    }    
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}	
   }
 
   return(maxDiff);
@@ -172,9 +172,9 @@
 
 /** 
  * @brief  Compare MATLAB Reference Output and ARM Test output
- * @param  q31_t*     Pointer to Ref buffer
- * @param  q31_t*     Pointer to Test buffer
- * @param  uint32_t     number of samples in the buffer
+ * @param  q31_t* 	Pointer to Ref buffer
+ * @param  q31_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
  * @return none 
  */
 
@@ -186,13 +186,13 @@
 
   for (i = 0; i < numSamples; i++)
   {
-      diff = pIn[i] - pOut[i];
-      diffCrnt = (diff > 0) ? diff : -diff;
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
 
-    if(diffCrnt > maxDiff)
-    {
-        maxDiff = diffCrnt;
-    }
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}
   }
 
   return(maxDiff);
@@ -200,16 +200,16 @@
 
 /** 
  * @brief  Provide guard bits for Input buffer
- * @param  q31_t*     Pointer to input buffer
- * @param  uint32_t     blockSize
- * @param  uint32_t     guard_bits
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
  * @return none
  * The function Provides the guard bits for the buffer 
  * to avoid overflow 
  */
 
 void arm_provide_guard_bits_q31 (q31_t * input_buf, 
-                                 uint32_t blockSize,
+								 uint32_t blockSize,
                                  uint32_t guard_bits)
 {
   uint32_t i;
@@ -222,16 +222,16 @@
 
 /** 
  * @brief  Provide guard bits for Input buffer
- * @param  q31_t*     Pointer to input buffer
- * @param  uint32_t     blockSize
- * @param  uint32_t     guard_bits
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
  * @return none
  * The function Provides the guard bits for the buffer 
  * to avoid overflow 
  */
 
 void arm_provide_guard_bits_q7 (q7_t * input_buf, 
-                                uint32_t blockSize,
+								uint32_t blockSize,
                                 uint32_t guard_bits)
 {
   uint32_t i;
@@ -246,7 +246,7 @@
 
 /** 
  * @brief  Caluclates number of guard bits 
- * @param  uint32_t     number of additions
+ * @param  uint32_t 	number of additions
  * @return none
  * The function Caluclates the number of guard bits  
  * depending on the numtaps 
@@ -272,13 +272,13 @@
 
 /** 
  * @brief  Converts Q15 to floating-point
- * @param  uint32_t     number of samples in the buffer
+ * @param  uint32_t 	number of samples in the buffer
  * @return none
  */
 
 void arm_apply_guard_bits (float32_t * pIn, 
-                           uint32_t numSamples, 
-                           uint32_t guard_bits)
+						   uint32_t numSamples, 
+						   uint32_t guard_bits)
 {
   uint32_t i;
 
@@ -290,7 +290,7 @@
 
 /** 
  * @brief  Calculates pow(2, numShifts)
- * @param  uint32_t     number of shifts
+ * @param  uint32_t 	number of shifts
  * @return pow(2, numShifts)
  */
 uint32_t arm_calc_2pow(uint32_t numShifts)
@@ -301,7 +301,7 @@
   for (i = 0; i < numShifts; i++)
     {
       val = val * 2;
-    }    
+    }	
 
   return(val);
 }
@@ -310,7 +310,7 @@
 
 /** 
  * @brief  Converts float to fixed q14 
- * @param  uint32_t     number of samples in the buffer
+ * @param  uint32_t 	number of samples in the buffer
  * @return none
  * The function converts floating point values to fixed point values 
  */
@@ -322,7 +322,7 @@
 
   for (i = 0; i < numSamples; i++)
     {
-      /* 16384.0f corresponds to pow(2, 14) */
+	  /* 16384.0f corresponds to pow(2, 14) */
       pOut[i] = (q15_t) (pIn[i] * 16384.0f);
 
       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
@@ -339,19 +339,19 @@
  
 /** 
  * @brief  Converts float to fixed q30 format
- * @param  uint32_t     number of samples in the buffer
+ * @param  uint32_t 	number of samples in the buffer
  * @return none
  * The function converts floating point values to fixed point values 
  */
 
 void arm_float_to_q30 (float *pIn, q31_t * pOut, 
-                       uint32_t numSamples)
+					   uint32_t numSamples)
 {
   uint32_t i;
 
   for (i = 0; i < numSamples; i++)
     {
-      /* 1073741824.0f corresponds to pow(2, 30) */
+	  /* 1073741824.0f corresponds to pow(2, 30) */
       pOut[i] = (q31_t) (pIn[i] * 1073741824.0f);
 
       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
@@ -365,19 +365,19 @@
 
 /** 
  * @brief  Converts float to fixed q30 format
- * @param  uint32_t     number of samples in the buffer
+ * @param  uint32_t 	number of samples in the buffer
  * @return none
  * The function converts floating point values to fixed point values 
  */
 
 void arm_float_to_q29 (float *pIn, q31_t * pOut, 
-                       uint32_t numSamples)
+					   uint32_t numSamples)
 {
   uint32_t i;
 
   for (i = 0; i < numSamples; i++)
     {
-      /* 1073741824.0f corresponds to pow(2, 30) */
+	  /* 1073741824.0f corresponds to pow(2, 30) */
       pOut[i] = (q31_t) (pIn[i] * 536870912.0f);
 
       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
@@ -392,7 +392,7 @@
 
 /** 
  * @brief  Converts float to fixed q28 format
- * @param  uint32_t     number of samples in the buffer
+ * @param  uint32_t 	number of samples in the buffer
  * @return none
  * The function converts floating point values to fixed point values 
  */
@@ -404,7 +404,7 @@
 
   for (i = 0; i < numSamples; i++)
     {
-    /* 268435456.0f corresponds to pow(2, 28) */
+	/* 268435456.0f corresponds to pow(2, 28) */
       pOut[i] = (q31_t) (pIn[i] * 268435456.0f);
 
       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
@@ -418,8 +418,8 @@
 
 /** 
  * @brief  Clip the float values to +/- 1 
- * @param  pIn     input buffer
- * @param  numSamples     number of samples in the buffer
+ * @param  pIn 	input buffer
+ * @param  numSamples 	number of samples in the buffer
  * @return none
  * The function converts floating point values to fixed point values 
  */
@@ -431,14 +431,14 @@
   for (i = 0; i < numSamples; i++)
     {
       if(pIn[i] > 1.0f)
-      {
-        pIn[i] = 1.0;
-      }
-      else if( pIn[i] < -1.0f)
-      {
-        pIn[i] = -1.0;
-      }
-           
+	  {
+	    pIn[i] = 1.0;
+	  }
+	  else if( pIn[i] < -1.0f)
+	  {
+	    pIn[i] = -1.0;
+	  }
+	       
     }
 }
 

--- a/cmsis_dsp/TransformFunctions/arm_bitreversal.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_bitreversal.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_bitreversal.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_bitreversal.c    
 *    
-* Description:    This file has common tables like Bitreverse, reciprocal etc which are used across different functions    
+* Description:	This file has common tables like Bitreverse, reciprocal etc which are used across different functions    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix2_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix2_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_cfft_radix2_f32.c   
+* Project: 	    CMSIS DSP Library   
+* Title:	    arm_cfft_radix2_f32.c   
 *   
-* Description:    Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function   
+* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function   
 *   
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_cfft_radix4_init_f32.c   
+* Project: 	    CMSIS DSP Library   
+* Title:	    arm_cfft_radix4_init_f32.c   
 *   
-* Description:    Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function   
+* Description:	Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function   
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -27,7 +27,7 @@
 *    Production release and review comments incorporated.   
 *   
 * Version 0.0.5  2010/04/26    
-*      incorporated review comments and updated with latest CMSIS layer   
+* 	 incorporated review comments and updated with latest CMSIS layer   
 *   
 * Version 0.0.3  2010/03/10    
 *    Initial version   
@@ -62,7 +62,7 @@
 * The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.   
 * Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
 * \par   
-* The parameter <code>fftLen</code>    Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
+* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
 * \par   
 * This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
 */

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cfft_radix2_init_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_radix2_init_q15.c    
 *    
-* Description:    Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function    
+* Description:	Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -65,7 +65,7 @@
 * The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.   
 * Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
 * \par   
-* The parameter <code>fftLen</code>    Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
+* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
 * \par   
 * This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
 */

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_cfft_radix2_init_q31.c   
+* Project: 	    CMSIS DSP Library   
+* Title:	    arm_cfft_radix2_init_q31.c   
 *   
-* Description:    Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function   
+* Description:	Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function   
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -47,7 +47,7 @@
 * The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.   
 * Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
 * \par   
-* The parameter <code>fftLen</code>    Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
+* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
 * \par   
 * This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
 */

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_cfft_radix2_q15.c   
+* Project: 	    CMSIS DSP Library   
+* Title:	    arm_cfft_radix2_q15.c   
 *   
-* Description:    Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
+* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
 *   
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.   
 *   
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *   
-* Project:         CMSIS DSP Library   
-* Title:        arm_cfft_radix2_q31.c   
+* Project: 	    CMSIS DSP Library   
+* Title:	    arm_cfft_radix2_q31.c   
 *   
-* Description:    Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
+* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
 *   
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix4_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix4_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cfft_radix4_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_radix4_f32.c    
 *    
-* Description:    Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function    
+* Description:	Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function    
 *    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
@@ -31,7 +31,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cfft_radix4_init_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_radix4_init_f32.c    
 *    
-* Description:    Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function    
+* Description:	Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -65,7 +65,7 @@
 * The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.    
 * Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
 * \par    
-* The parameter <code>fftLen</code>    Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
+* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
 * \par    
 * This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
 */

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cfft_radix4_init_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_radix4_init_q15.c    
 *    
-* Description:    Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function    
+* Description:	Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -66,7 +66,7 @@
 * The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.    
 * Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
 * \par    
-* The parameter <code>fftLen</code>    Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
+* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
 * \par    
 * This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
 */

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cfft_radix4_init_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_radix4_init_q31.c    
 *    
-* Description:    Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function    
+* Description:	Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -30,7 +30,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    
@@ -65,7 +65,7 @@
 * The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.    
 * Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
 * \par    
-* The parameter <code>fftLen</code>    Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
+* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
 * \par    
 * This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
 */

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,13 +2,13 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cfft_radix4_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_radix4_q15.c    
 *    
-* Description:    This file has function definition of Radix-4 FFT & IFFT function and    
-*                In-place bit reversal using bit reversal table    
+* Description:	This file has function definition of Radix-4 FFT & IFFT function and    
+*				In-place bit reversal using bit reversal table    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -31,7 +31,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,13 +2,13 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_cfft_radix4_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_radix4_q31.c    
 *    
-* Description:    This file has function definition of Radix-4 FFT & IFFT function and    
-*                In-place bit reversal using bit reversal table    
+* Description:	This file has function definition of Radix-4 FFT & IFFT function and    
+*				In-place bit reversal using bit reversal table    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -31,7 +31,7 @@
 *    Production release and review comments incorporated.    
 *    
 * Version 0.0.5  2010/04/26     
-*      incorporated review comments and updated with latest CMSIS layer    
+* 	 incorporated review comments and updated with latest CMSIS layer    
 *    
 * Version 0.0.3  2010/03/10     
 *    Initial version    

--- a/cmsis_dsp/TransformFunctions/arm_dct4_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_dct4_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dct4_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_dct4_f32.c    
 *    
-* Description:    Processing function of DCT4 & IDCT4 F32.    
+* Description:	Processing function of DCT4 & IDCT4 F32.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -238,8 +238,8 @@
   arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
 
         /*----------------------------------------------------------------------    
-     *  Step3: Multiply the FFT output with the weights.    
-     *----------------------------------------------------------------------*/
+	 *  Step3: Multiply the FFT output with the weights.    
+	 *----------------------------------------------------------------------*/
   arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
 
   /* ----------- Post-processing ---------- */
@@ -384,8 +384,8 @@
   arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
 
         /*----------------------------------------------------------------------    
-     *  Step3: Multiply the FFT output with the weights.    
-     *----------------------------------------------------------------------*/
+	 *  Step3: Multiply the FFT output with the weights.    
+	 *----------------------------------------------------------------------*/
   arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
 
   /* ----------- Post-processing ---------- */

--- a/cmsis_dsp/TransformFunctions/arm_dct4_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_dct4_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dct4_init_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_dct4_init_f32.c    
 *    
-* Description:    Initialization function of DCT-4 & IDCT4 F32    
+* Description:	Initialization function of DCT-4 & IDCT4 F32    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -16428,7 +16428,7 @@
  * @param[in,out] *S         points to an instance of floating-point DCT4/IDCT4 structure.   
  * @param[in]     *S_RFFT    points to an instance of floating-point RFFT/RIFFT structure.   
  * @param[in]     *S_CFFT    points to an instance of floating-point CFFT/CIFFT structure.   
- * @param[in]     N             length of the DCT4.   
+ * @param[in]     N			 length of the DCT4.   
  * @param[in]     Nby2       half of the length of the DCT4.   
  * @param[in]     normalize  normalizing factor.   
  * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.   

--- a/cmsis_dsp/TransformFunctions/arm_dct4_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_dct4_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dct4_init_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_dct4_init_q15.c    
 *    
-* Description:    Initialization function of DCT-4 & IDCT4 Q15    
+* Description:	Initialization function of DCT-4 & IDCT4 Q15    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -4197,7 +4197,7 @@
  * @param[in]     N          length of the DCT4.   
  * @param[in]     Nby2       half of the length of the DCT4.   
  * @param[in]     normalize  normalizing factor.   
- * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.   
+ * @return  	  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.   
  * \par Normalizing factor:    
  * The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.    
  * Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:    

--- a/cmsis_dsp/TransformFunctions/arm_dct4_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_dct4_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dct4_init_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_dct4_init_q31.c    
 *    
-* Description:    Initialization function of DCT-4 & IDCT4 Q31    
+* Description:	Initialization function of DCT-4 & IDCT4 Q31    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -8277,7 +8277,7 @@
  * @param[in]     N          length of the DCT4.   
  * @param[in]     Nby2       half of the length of the DCT4.   
  * @param[in]     normalize  normalizing factor.   
- * @return          arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.   
+ * @return		  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.   
  * \par Normalizing factor:    
  * The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.    
  * Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:    

--- a/cmsis_dsp/TransformFunctions/arm_dct4_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_dct4_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dct4_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_dct4_q15.c    
 *    
-* Description:    Processing function of DCT4 & IDCT4 Q15.    
+* Description:	Processing function of DCT4 & IDCT4 Q15.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/TransformFunctions/arm_dct4_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_dct4_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_dct4_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_dct4_q31.c    
 *    
-* Description:    Processing function of DCT4 & IDCT4 Q31.    
+* Description:	Processing function of DCT4 & IDCT4 Q31.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  

--- a/cmsis_dsp/TransformFunctions/arm_rfft_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_rfft_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_rfft_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_rfft_f32.c    
 *    
-* Description:    RFFT & RIFFT Floating point process function    
+* Description:	RFFT & RIFFT Floating point process function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -119,7 +119,7 @@
  */
 
 /*--------------------------------------------------------------------    
- *        Internal functions prototypes    
+ *		Internal functions prototypes    
  *--------------------------------------------------------------------*/
 
 void arm_split_rfft_f32(
@@ -209,12 +209,12 @@
 
 /**    
  * @brief  Core Real FFT process    
- * @param[in]   *pSrc                 points to the input buffer.    
- * @param[in]   fftLen              length of FFT.    
- * @param[in]   *pATable             points to the twiddle Coef A buffer.    
- * @param[in]   *pBTable             points to the twiddle Coef B buffer.    
- * @param[out]  *pDst                 points to the output buffer.    
- * @param[in]   modifier             twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
+ * @param[in]   *pSrc 				points to the input buffer.    
+ * @param[in]   fftLen  			length of FFT.    
+ * @param[in]   *pATable 			points to the twiddle Coef A buffer.    
+ * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
+ * @param[out]  *pDst 				points to the output buffer.    
+ * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
  * @return none.    
  */
 
@@ -303,12 +303,12 @@
 
 /**    
  * @brief  Core Real IFFT process    
- * @param[in]   *pSrc                 points to the input buffer.    
- * @param[in]   fftLen              length of FFT.   
- * @param[in]   *pATable             points to the twiddle Coef A buffer.   
- * @param[in]   *pBTable             points to the twiddle Coef B buffer.   
- * @param[out]  *pDst                 points to the output buffer.   
- * @param[in]   modifier             twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.    
+ * @param[in]   *pSrc 				points to the input buffer.    
+ * @param[in]   fftLen  			length of FFT.   
+ * @param[in]   *pATable 			points to the twiddle Coef A buffer.   
+ * @param[in]   *pBTable 			points to the twiddle Coef B buffer.   
+ * @param[out]  *pDst 				points to the output buffer.   
+ * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.    
  * @return none.    
  */
 

--- a/cmsis_dsp/TransformFunctions/arm_rfft_init_f32.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_rfft_init_f32.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_rfft_init_f32.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_rfft_init_f32.c    
 *    
-* Description:    RFFT & RIFFT Floating point initialisation function    
+* Description:	RFFT & RIFFT Floating point initialisation function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -49,7 +49,7 @@
 * \par    
 * Generation of realCoefA array:    
 * \par    
-*     n = 4096    
+* 	n = 4096    
 * <pre>for (i = 0; i < n; i++)    
 *  {    
 *    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
@@ -8279,11 +8279,11 @@
 * @param[in]     fftLenReal     length of the FFT.   
 * @param[in]     ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
 * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.   
+* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.   
 *    
 * \par Description:   
 * \par   
-* The parameter <code>fftLenReal</code>    Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
+* The parameter <code>fftLenReal</code>	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
 * \par    
 * The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.    
 * Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    

--- a/cmsis_dsp/TransformFunctions/arm_rfft_init_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_rfft_init_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_rfft_init_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_rfft_init_q15.c    
 *    
-* Description:    RFFT & RIFFT Q15 initialisation function    
+* Description:	RFFT & RIFFT Q15 initialisation function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -2140,11 +2140,11 @@
 * @param[in]      fftLenReal     length of the FFT.   
 * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
 * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.   
+* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.   
 *    
 * \par Description:   
 * \par   
-* The parameter <code>fftLenReal</code>    Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
+* The parameter <code>fftLenReal</code>	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
 * \par    
 * The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.    
 * Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    

--- a/cmsis_dsp/TransformFunctions/arm_rfft_init_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_rfft_init_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_rfft_init_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_rfft_init_q31.c    
 *    
-* Description:    RFFT & RIFFT Q31 initialisation function    
+* Description:	RFFT & RIFFT Q31 initialisation function    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
@@ -4186,11 +4186,11 @@
 * @param[in]      fftLenReal     length of the FFT.   
 * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
 * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.   
+* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.   
 *    
 * \par Description:   
 * \par   
-* The parameter <code>fftLenReal</code>    Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
+* The parameter <code>fftLenReal</code>	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
 * \par    
 * The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.    
 * Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    

--- a/cmsis_dsp/TransformFunctions/arm_rfft_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_rfft_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_rfft_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_rfft_q15.c    
 *    
-* Description:    RFFT & RIFFT Q15 process function    
+* Description:	RFFT & RIFFT Q15 process function    
 *    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
@@ -38,7 +38,7 @@
 #include "arm_math.h"
 
 /*--------------------------------------------------------------------    
-*        Internal functions prototypes    
+*		Internal functions prototypes    
 --------------------------------------------------------------------*/
 
 void arm_split_rfft_q15(
@@ -133,12 +133,12 @@
 
 /**    
  * @brief  Core Real FFT process    
- * @param  *pSrc                 points to the input buffer.   
- * @param  fftLen                  length of FFT.   
- * @param  *pATable             points to the A twiddle Coef buffer.    
- * @param  *pBTable             points to the B twiddle Coef buffer.   
- * @param  *pDst                 points to the output buffer.   
- * @param  modifier             twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
+ * @param  *pSrc 				points to the input buffer.   
+ * @param  fftLen  				length of FFT.   
+ * @param  *pATable 			points to the A twiddle Coef buffer.    
+ * @param  *pBTable 			points to the B twiddle Coef buffer.   
+ * @param  *pDst 				points to the output buffer.   
+ * @param  modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
  * @return none.    
  * The function implements a Real FFT    
  */
@@ -303,12 +303,12 @@
 
 /**    
  * @brief  Core Real IFFT process    
- * @param[in]   *pSrc                 points to the input buffer.    
- * @param[in]   fftLen              length of FFT.   
- * @param[in]   *pATable             points to the twiddle Coef A buffer.   
- * @param[in]   *pBTable             points to the twiddle Coef B buffer.    
- * @param[out]  *pDst                 points to the output buffer.   
- * @param[in]   modifier             twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
+ * @param[in]   *pSrc 				points to the input buffer.    
+ * @param[in]   fftLen  		    length of FFT.   
+ * @param[in]   *pATable 			points to the twiddle Coef A buffer.   
+ * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
+ * @param[out]  *pDst 				points to the output buffer.   
+ * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
  * @return none.    
  * The function implements a Real IFFT    
  */

--- a/cmsis_dsp/TransformFunctions/arm_rfft_q31.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/TransformFunctions/arm_rfft_q31.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_rfft_q31.c    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_rfft_q31.c    
 *    
-* Description:    RFFT & RIFFT Q31 process function    
+* Description:	RFFT & RIFFT Q31 process function    
 *    
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
@@ -37,7 +37,7 @@
 #include "arm_math.h"
 
 /*--------------------------------------------------------------------    
-*        Internal functions prototypes    
+*		Internal functions prototypes    
 --------------------------------------------------------------------*/
 
 void arm_split_rfft_q31(
@@ -134,12 +134,12 @@
 
 /**    
  * @brief  Core Real FFT process    
- * @param[in]   *pSrc                 points to the input buffer.    
- * @param[in]   fftLen              length of FFT.   
- * @param[in]   *pATable             points to the twiddle Coef A buffer.    
- * @param[in]   *pBTable             points to the twiddle Coef B buffer.    
- * @param[out]  *pDst                 points to the output buffer.    
- * @param[in]   modifier             twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
+ * @param[in]   *pSrc 				points to the input buffer.    
+ * @param[in]   fftLen  			length of FFT.   
+ * @param[in]   *pATable 			points to the twiddle Coef A buffer.    
+ * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
+ * @param[out]  *pDst 				points to the output buffer.    
+ * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
  * @return none.    
  */
 
@@ -237,12 +237,12 @@
 
 /**    
  * @brief  Core Real IFFT process    
- * @param[in]   *pSrc                 points to the input buffer.   
- * @param[in]   fftLen              length of FFT.    
- * @param[in]   *pATable             points to the twiddle Coef A buffer.   
- * @param[in]   *pBTable             points to the twiddle Coef B buffer.    
- * @param[out]  *pDst                 points to the output buffer.   
- * @param[in]   modifier             twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
+ * @param[in]   *pSrc 				points to the input buffer.   
+ * @param[in]   fftLen  			length of FFT.    
+ * @param[in]   *pATable 			points to the twiddle Coef A buffer.   
+ * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
+ * @param[out]  *pDst 				points to the output buffer.   
+ * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
  * @return none.    
  */
 

--- a/cmsis_dsp/arm_common_tables.h	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/arm_common_tables.h	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved. 
 * 
 * $Date:        11. November 2010  
-* $Revision:     V1.0.2  
+* $Revision: 	V1.0.2  
 * 
-* Project:         CMSIS DSP Library 
-* Title:        arm_common_tables.h 
+* Project: 	    CMSIS DSP Library 
+* Title:	    arm_common_tables.h 
 * 
-* Description:    This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 
+* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 
 * 
 * Target Processor: Cortex-M4/Cortex-M3
 *  

--- a/cmsis_dsp/arm_math.h	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/arm_math.h	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
  * Copyright (C) 2010-2011 ARM Limited. All rights reserved.   
  *   
  * $Date:        15. February 2012  
- * $Revision:     V1.1.0  
+ * $Revision: 	V1.1.0  
  *   
- * Project:         CMSIS DSP Library   
- * Title:             arm_math.h
+ * Project: 	    CMSIS DSP Library   
+ * Title:	     	arm_math.h
  *   
- * Description:     Public header file for CMSIS DSP Library
+ * Description:	 Public header file for CMSIS DSP Library
  *   
  * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  *  
@@ -280,7 +280,7 @@
 #undef  __CMSIS_GENERIC         /* enable NVIC and Systick functions */
 #include "string.h"
 #include "math.h"
-#ifdef    __cplusplus
+#ifdef	__cplusplus
 extern "C"
 {
 #endif
@@ -290,27 +290,27 @@
    * @brief Macros required for reciprocal calculation in Normalized LMS
    */
 
-#define DELTA_Q31             (0x100)
-#define DELTA_Q15             0x5
-#define INDEX_MASK             0x0000003F
+#define DELTA_Q31 			(0x100)
+#define DELTA_Q15 			0x5
+#define INDEX_MASK 			0x0000003F
 #ifndef PI
-#define PI                    3.14159265358979f
+#define PI					3.14159265358979f
 #endif
 
   /**
    * @brief Macros required for SINE and COSINE Fast math approximations
    */
 
-#define TABLE_SIZE            256
-#define TABLE_SPACING_Q31    0x800000
-#define TABLE_SPACING_Q15    0x80
+#define TABLE_SIZE			256
+#define TABLE_SPACING_Q31	0x800000
+#define TABLE_SPACING_Q15	0x80
 
   /**
    * @brief Macros required for SINE and COSINE Controller functions
    */
   /* 1.31(q31) Fixed value of 2/360 */
   /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
-#define INPUT_SPACING            0xB60B61
+#define INPUT_SPACING			0xB60B61
 
   /**
    * @brief Macro for Unaligned Support
@@ -323,7 +323,7 @@
   #else
     #define ALIGN4 __align(4)
   #endif
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /**
    * @brief Error status returned by some functions in the library.
@@ -400,16 +400,16 @@
    */
 #ifndef ARM_MATH_BIG_ENDIAN
 
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) |    \
-                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) |    \
-                                (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) |    \
-                                (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) |	\
+                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) |	\
+							    (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) |	\
+							    (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
 #else
 
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) |    \
-                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) |    \
-                                (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) |    \
-                                (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) |	\
+                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) |	\
+							    (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) |	\
+							    (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
 
 #endif
 
@@ -1177,11 +1177,11 @@
   /**
    * @brief  Initialization function for the Q31 FIR filter.
    * @param[in,out] *S points to an instance of the Q31 FIR structure.
-   * @param[in]     numTaps  Number of filter coefficients in the filter.
-   * @param[in]     *pCoeffs points to the filter coefficients.
-   * @param[in]     *pState points to the state buffer.
-   * @param[in]     blockSize number of samples that are processed at a time.
-   * @return         none.
+   * @param[in] 	numTaps  Number of filter coefficients in the filter.
+   * @param[in] 	*pCoeffs points to the filter coefficients.
+   * @param[in] 	*pState points to the state buffer.
+   * @param[in] 	blockSize number of samples that are processed at a time.
+   * @return 		none.
    */
   void arm_fir_init_q31(
   arm_fir_instance_q31 * S,
@@ -1207,11 +1207,11 @@
   /**
    * @brief  Initialization function for the floating-point FIR filter.
    * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
-   * @param[in]     numTaps  Number of filter coefficients in the filter.
-   * @param[in]     *pCoeffs points to the filter coefficients.
-   * @param[in]     *pState points to the state buffer.
-   * @param[in]     blockSize number of samples that are processed at a time.
-   * @return        none.
+   * @param[in] 	numTaps  Number of filter coefficients in the filter.
+   * @param[in] 	*pCoeffs points to the filter coefficients.
+   * @param[in] 	*pState points to the state buffer.
+   * @param[in] 	blockSize number of samples that are processed at a time.
+   * @return    	none.
    */
   void arm_fir_init_f32(
   arm_fir_instance_f32 * S,
@@ -1471,7 +1471,7 @@
    * @brief Floating-point matrix transpose.
    * @param[in]  *pSrc points to the input matrix
    * @param[out] *pDst points to the output matrix
-   * @return     The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
    * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
 
@@ -1484,7 +1484,7 @@
    * @brief Q15 matrix transpose.
    * @param[in]  *pSrc points to the input matrix
    * @param[out] *pDst points to the output matrix
-   * @return     The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
    * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
 
@@ -1496,7 +1496,7 @@
    * @brief Q31 matrix transpose.
    * @param[in]  *pSrc points to the input matrix
    * @param[out] *pDst points to the output matrix
-   * @return     The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
    * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
 
@@ -1539,7 +1539,7 @@
    * @param[in]       *pSrcA  points to the first input matrix structure
    * @param[in]       *pSrcB  points to the second input matrix structure
    * @param[out]      *pDst   points to output matrix structure
-   * @param[in]          *pState points to the array for storing intermediate results  
+   * @param[in]		  *pState points to the array for storing intermediate results  
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
@@ -1673,7 +1673,7 @@
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.
    * @param[in]     nRows          number of rows in the matrix.
    * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData           points to the matrix data array.
+   * @param[in]     *pData	       points to the matrix data array.
    * @return        none
    */
 
@@ -1688,7 +1688,7 @@
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.
    * @param[in]     nRows          number of rows in the matrix.
    * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData           points to the matrix data array.
+   * @param[in]     *pData	       points to the matrix data array.
    * @return        none
    */
 
@@ -1703,7 +1703,7 @@
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.
    * @param[in]     nRows          number of rows in the matrix.
    * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData           points to the matrix data array.
+   * @param[in]     *pData	       points to the matrix data array.
    * @return        none
    */
 
@@ -2195,7 +2195,7 @@
 
 
   /*----------------------------------------------------------------------
-   *        Internal functions prototypes FFT function
+   *		Internal functions prototypes FFT function
    ----------------------------------------------------------------------*/
 
   /**
@@ -2264,7 +2264,7 @@
    * @brief  Core function for the f32 FFT butterfly process.
    * @param[in, out] *pSrc            points to the in-place buffer of f32 data type.
    * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef              points to Twiddle coefficient buffer.
+   * @param[in]      *pCoef        	  points to Twiddle coefficient buffer.
    * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    * @return none.
    */
@@ -2276,13 +2276,13 @@
   uint16_t twidCoefModifier);
 
         /**  
-     * @brief  Core function for the Radix-2 Q31 CFFT butterfly process. 
-     * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
-     * @param[in]      fftLen           length of the FFT. 
-     * @param[in]      *pCoef             points to Twiddle coefficient buffer.
-     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-     * @return none. 
-     */
+	 * @brief  Core function for the Radix-2 Q31 CFFT butterfly process. 
+	 * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
+	 * @param[in]      fftLen           length of the FFT. 
+	 * @param[in]      *pCoef         	points to Twiddle coefficient buffer.
+	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
+	 * @return none. 
+	 */
 
   void arm_radix2_butterfly_q31(
   q31_t * pSrc,
@@ -2291,13 +2291,13 @@
   uint16_t twidCoefModifier);
 
         /**  
-     * @brief  Core function for the Radix-2 Q15 CFFT butterfly process. 
-     * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
-     * @param[in]      fftLen           length of the FFT. 
-     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
-     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-     * @return none. 
-     */
+	 * @brief  Core function for the Radix-2 Q15 CFFT butterfly process. 
+	 * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
+	 * @param[in]      fftLen           length of the FFT. 
+	 * @param[in]      *pCoef           points to Twiddle coefficient buffer.
+	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
+	 * @return none. 
+	 */
 
   void arm_radix2_butterfly_q15(
   q15_t * pSrc,
@@ -2306,13 +2306,13 @@
   uint16_t twidCoefModifier);
 
         /**  
-     * @brief  Core function for the Radix-2 Q15 CFFT Inverse butterfly process. 
-     * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
-     * @param[in]      fftLen           length of the FFT. 
-     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
-     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-     * @return none. 
-     */
+	 * @brief  Core function for the Radix-2 Q15 CFFT Inverse butterfly process. 
+	 * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
+	 * @param[in]      fftLen           length of the FFT. 
+	 * @param[in]      *pCoef       	points to Twiddle coefficient buffer.
+	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
+	 * @return none. 
+	 */
 
   void arm_radix2_butterfly_inverse_q15(
   q15_t * pSrc,
@@ -2321,13 +2321,13 @@
   uint16_t twidCoefModifier);
 
         /**  
-     * @brief  Core function for the Radix-2 Q31 CFFT Inverse butterfly process. 
-     * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
-     * @param[in]      fftLen           length of the FFT. 
-     * @param[in]      *pCoef             points to Twiddle coefficient buffer.
-     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-     * @return none. 
-     */
+	 * @brief  Core function for the Radix-2 Q31 CFFT Inverse butterfly process. 
+	 * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
+	 * @param[in]      fftLen           length of the FFT. 
+	 * @param[in]      *pCoef         	points to Twiddle coefficient buffer.
+	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
+	 * @return none. 
+	 */
 
   void arm_radix2_butterfly_inverse_q31(
   q31_t * pSrc,
@@ -2339,9 +2339,9 @@
    * @brief  Core function for the f32 IFFT butterfly process.
    * @param[in, out] *pSrc            points to the in-place buffer of f32 data type.
    * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef              points to Twiddle coefficient buffer.
+   * @param[in]      *pCoef        	  points to Twiddle coefficient buffer.
    * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @param[in]         onebyfftLen      1/fftLenfth
+   * @param[in]		 onebyfftLen	  1/fftLenfth
    * @return none.
    */
 
@@ -2497,7 +2497,7 @@
    * @param[in]      fftLenReal     length of the FFT.
    * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
+   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
    */
 
   arm_status arm_rfft_init_q15(
@@ -2527,7 +2527,7 @@
    * @param[in]      fftLenReal     length of the FFT.
    * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
+   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
    */
 
   arm_status arm_rfft_init_q31(
@@ -2544,7 +2544,7 @@
    * @param[in]     fftLenReal     length of the FFT.
    * @param[in]     ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
+   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
    */
 
   arm_status arm_rfft_init_f32(
@@ -2590,7 +2590,7 @@
    * @param[in]     N          length of the DCT4.
    * @param[in]     Nby2       half of the length of the DCT4.
    * @param[in]     normalize  normalizing factor.
-   * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
+   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
    */
 
   arm_status arm_dct4_init_f32(
@@ -2637,7 +2637,7 @@
    * @param[in]     N          length of the DCT4.
    * @param[in]     Nby2       half of the length of the DCT4.
    * @param[in]     normalize  normalizing factor.
-   * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
    */
 
   arm_status arm_dct4_init_q31(
@@ -2684,7 +2684,7 @@
    * @param[in]     N          length of the DCT4.
    * @param[in]     Nby2       half of the length of the DCT4.
    * @param[in]     normalize  normalizing factor.
-   * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
    */
 
   arm_status arm_dct4_init_q15(
@@ -3326,11 +3326,11 @@
    */
 
   void arm_conv_fast_q15(
-              q15_t * pSrcA,
-             uint32_t srcALen,
-              q15_t * pSrcB,
-             uint32_t srcBLen,
-             q15_t * pDst);
+			  q15_t * pSrcA,
+			 uint32_t srcALen,
+			  q15_t * pSrcB,
+			 uint32_t srcBLen,
+			 q15_t * pDst);
 
   /**
    * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
@@ -3512,13 +3512,13 @@
    */
 
   arm_status arm_conv_partial_fast_q15(
-                        q15_t * pSrcA,
-                       uint32_t srcALen,
-                        q15_t * pSrcB,
-                       uint32_t srcBLen,
-                       q15_t * pDst,
-                       uint32_t firstIndex,
-                       uint32_t numPoints);
+				        q15_t * pSrcA,
+				       uint32_t srcALen,
+				        q15_t * pSrcB,
+				       uint32_t srcBLen,
+				       q15_t * pDst,
+				       uint32_t firstIndex,
+				       uint32_t numPoints);
 
 
   /**
@@ -4709,11 +4709,11 @@
    */
 
   void arm_correlate_fast_q15(
-                   q15_t * pSrcA,
-                  uint32_t srcALen,
-                   q15_t * pSrcB,
-                  uint32_t srcBLen,
-                  q15_t * pDst);
+			       q15_t * pSrcA,
+			      uint32_t srcALen,
+			       q15_t * pSrcB,
+			      uint32_t srcBLen,
+			      q15_t * pDst);
 
 
 
@@ -5612,8 +5612,8 @@
    * @brief Floating-point Park transform
    * @param[in]       Ialpha input two-phase vector coordinate alpha
    * @param[in]       Ibeta  input two-phase vector coordinate beta
-   * @param[out]      *pId   points to output    rotor reference frame d
-   * @param[out]      *pIq   points to output    rotor reference frame q
+   * @param[out]      *pId   points to output	rotor reference frame d
+   * @param[out]      *pIq   points to output	rotor reference frame q
    * @param[in]       sinVal sine value of rotation angle theta
    * @param[in]       cosVal cosine value of rotation angle theta
    * @return none.
@@ -5759,7 +5759,7 @@
 
 
   /**
-   * @brief  Inverse Park transform for    Q31 version 
+   * @brief  Inverse Park transform for	Q31 version 
    * @param[in]       Id        input coordinate of rotor reference frame d
    * @param[in]       Iq        input coordinate of rotor reference frame q
    * @param[out]      *pIalpha  points to output two-phase orthogonal vector axis alpha
@@ -7551,7 +7551,7 @@
 
 
 
-#ifdef    __cplusplus
+#ifdef	__cplusplus
 }
 #endif
 

--- a/cmsis_dsp/math_helper.h	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/math_helper.h	Thu May 30 17:10:11 2013 +0100
@@ -2,14 +2,14 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.  
 *  
 * $Date:        29. November 2010  
-* $Revision:     V1.0.3  
+* $Revision: 	V1.0.3  
 *  
-* Project:         CMSIS DSP Library 
+* Project: 	    CMSIS DSP Library 
 *
-* Title:        math_helper.h
+* Title:	    math_helper.h
 * 
 *
-* Description:    Prototypes of all helper functions required.  
+* Description:	Prototypes of all helper functions required.  
 *
 * Target Processor: Cortex-M4/Cortex-M3
 *