Laxmi Kant Tiwari / mbed-dsp

CMSIS DSP Lib

Fork of mbed-dsp by mbed official

cmsis_dsp/BasicMathFunctions/arm_shift_q31.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_shift_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Shifts the elements of a Q31 vector by a specified number of bits.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 35
emilmont 1:fdd22bb7aa52 36 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 37
emilmont 1:fdd22bb7aa52 38 /**
emilmont 1:fdd22bb7aa52 39 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 40 */
emilmont 1:fdd22bb7aa52 41 /**
emilmont 1:fdd22bb7aa52 42 * @defgroup shift Vector Shift
emilmont 1:fdd22bb7aa52 43 *
emilmont 1:fdd22bb7aa52 44 * Shifts the elements of a fixed-point vector by a specified number of bits.
emilmont 1:fdd22bb7aa52 45 * There are separate functions for Q7, Q15, and Q31 data types.
emilmont 1:fdd22bb7aa52 46 * The underlying algorithm used is:
emilmont 1:fdd22bb7aa52 47 *
emilmont 1:fdd22bb7aa52 48 * <pre>
emilmont 1:fdd22bb7aa52 49 * pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
emilmont 1:fdd22bb7aa52 50 * </pre>
emilmont 1:fdd22bb7aa52 51 *
emilmont 1:fdd22bb7aa52 52 * If <code>shift</code> is positive then the elements of the vector are shifted to the left.
emilmont 1:fdd22bb7aa52 53 * If <code>shift</code> is negative then the elements of the vector are shifted to the right.
emilmont 1:fdd22bb7aa52 54 */
emilmont 1:fdd22bb7aa52 55
emilmont 1:fdd22bb7aa52 56 /**
emilmont 1:fdd22bb7aa52 57 * @addtogroup shift
emilmont 1:fdd22bb7aa52 58 * @{
emilmont 1:fdd22bb7aa52 59 */
emilmont 1:fdd22bb7aa52 60
emilmont 1:fdd22bb7aa52 61 /**
emilmont 1:fdd22bb7aa52 62 * @brief Shifts the elements of a Q31 vector a specified number of bits.
emilmont 1:fdd22bb7aa52 63 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 64 * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
emilmont 1:fdd22bb7aa52 65 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 66 * @param[in] blockSize number of samples in the vector
emilmont 1:fdd22bb7aa52 67 * @return none.
emilmont 1:fdd22bb7aa52 68 *
emilmont 1:fdd22bb7aa52 69 *
emilmont 1:fdd22bb7aa52 70 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 71 * \par
emilmont 1:fdd22bb7aa52 72 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 73 * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
emilmont 1:fdd22bb7aa52 74 */
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 void arm_shift_q31(
emilmont 1:fdd22bb7aa52 77 q31_t * pSrc,
emilmont 1:fdd22bb7aa52 78 int8_t shiftBits,
emilmont 1:fdd22bb7aa52 79 q31_t * pDst,
emilmont 1:fdd22bb7aa52 80 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 81 {
emilmont 1:fdd22bb7aa52 82 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 83 uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
emilmont 1:fdd22bb7aa52 84
emilmont 1:fdd22bb7aa52 85 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 86
emilmont 1:fdd22bb7aa52 87 q31_t in1, in2, in3, in4; /* Temporary input variables */
emilmont 1:fdd22bb7aa52 88 q31_t out1, out2, out3, out4; /* Temporary output variables */
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 91 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 92
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94 if(sign == 0u)
emilmont 1:fdd22bb7aa52 95 {
emilmont 1:fdd22bb7aa52 96 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 97 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 98 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 99 {
emilmont 1:fdd22bb7aa52 100 /* C = A << shiftBits */
emilmont 1:fdd22bb7aa52 101 /* Shift the input and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 102 in1 = *pSrc;
emilmont 1:fdd22bb7aa52 103 in2 = *(pSrc + 1);
emilmont 1:fdd22bb7aa52 104 out1 = in1 << shiftBits;
emilmont 1:fdd22bb7aa52 105 in3 = *(pSrc + 2);
emilmont 1:fdd22bb7aa52 106 out2 = in2 << shiftBits;
emilmont 1:fdd22bb7aa52 107 in4 = *(pSrc + 3);
emilmont 1:fdd22bb7aa52 108 if(in1 != (out1 >> shiftBits))
emilmont 1:fdd22bb7aa52 109 out1 = 0x7FFFFFFF ^ (in1 >> 31);
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111 if(in2 != (out2 >> shiftBits))
emilmont 1:fdd22bb7aa52 112 out2 = 0x7FFFFFFF ^ (in2 >> 31);
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 *pDst = out1;
emilmont 1:fdd22bb7aa52 115 out3 = in3 << shiftBits;
emilmont 1:fdd22bb7aa52 116 *(pDst + 1) = out2;
emilmont 1:fdd22bb7aa52 117 out4 = in4 << shiftBits;
emilmont 1:fdd22bb7aa52 118
emilmont 1:fdd22bb7aa52 119 if(in3 != (out3 >> shiftBits))
emilmont 1:fdd22bb7aa52 120 out3 = 0x7FFFFFFF ^ (in3 >> 31);
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 if(in4 != (out4 >> shiftBits))
emilmont 1:fdd22bb7aa52 123 out4 = 0x7FFFFFFF ^ (in4 >> 31);
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 *(pDst + 2) = out3;
emilmont 1:fdd22bb7aa52 126 *(pDst + 3) = out4;
emilmont 1:fdd22bb7aa52 127
emilmont 1:fdd22bb7aa52 128 /* Update destination pointer to process next sampels */
emilmont 1:fdd22bb7aa52 129 pSrc += 4u;
emilmont 1:fdd22bb7aa52 130 pDst += 4u;
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 133 blkCnt--;
emilmont 1:fdd22bb7aa52 134 }
emilmont 1:fdd22bb7aa52 135 }
emilmont 1:fdd22bb7aa52 136 else
emilmont 1:fdd22bb7aa52 137 {
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 140 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 141 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 142 {
emilmont 1:fdd22bb7aa52 143 /* C = A >> shiftBits */
emilmont 1:fdd22bb7aa52 144 /* Shift the input and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 145 in1 = *pSrc;
emilmont 1:fdd22bb7aa52 146 in2 = *(pSrc + 1);
emilmont 1:fdd22bb7aa52 147 in3 = *(pSrc + 2);
emilmont 1:fdd22bb7aa52 148 in4 = *(pSrc + 3);
emilmont 1:fdd22bb7aa52 149
emilmont 1:fdd22bb7aa52 150 *pDst = (in1 >> -shiftBits);
emilmont 1:fdd22bb7aa52 151 *(pDst + 1) = (in2 >> -shiftBits);
emilmont 1:fdd22bb7aa52 152 *(pDst + 2) = (in3 >> -shiftBits);
emilmont 1:fdd22bb7aa52 153 *(pDst + 3) = (in4 >> -shiftBits);
emilmont 1:fdd22bb7aa52 154
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 pSrc += 4u;
emilmont 1:fdd22bb7aa52 157 pDst += 4u;
emilmont 1:fdd22bb7aa52 158
emilmont 1:fdd22bb7aa52 159 blkCnt--;
emilmont 1:fdd22bb7aa52 160 }
emilmont 1:fdd22bb7aa52 161
emilmont 1:fdd22bb7aa52 162 }
emilmont 1:fdd22bb7aa52 163
emilmont 1:fdd22bb7aa52 164 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 165 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 166 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 167
emilmont 1:fdd22bb7aa52 168 #else
emilmont 1:fdd22bb7aa52 169
emilmont 1:fdd22bb7aa52 170 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 171
emilmont 1:fdd22bb7aa52 172
emilmont 1:fdd22bb7aa52 173 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 174 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 177
emilmont 1:fdd22bb7aa52 178
emilmont 1:fdd22bb7aa52 179 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 180 {
emilmont 1:fdd22bb7aa52 181 /* C = A (>> or <<) shiftBits */
emilmont 1:fdd22bb7aa52 182 /* Shift the input and then store the result in the destination buffer. */
emilmont 1:fdd22bb7aa52 183 *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
emilmont 1:fdd22bb7aa52 184 (*pSrc++ >> -shiftBits);
emilmont 1:fdd22bb7aa52 185
emilmont 1:fdd22bb7aa52 186 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 187 blkCnt--;
emilmont 1:fdd22bb7aa52 188 }
emilmont 1:fdd22bb7aa52 189
emilmont 1:fdd22bb7aa52 190
emilmont 1:fdd22bb7aa52 191 }
emilmont 1:fdd22bb7aa52 192
emilmont 1:fdd22bb7aa52 193 /**
emilmont 1:fdd22bb7aa52 194 * @} end of shift group
emilmont 1:fdd22bb7aa52 195 */