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target-mcu-k64f
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Morpheus
_hw_sim Struct Reference
All SIM module registers. More...
#include <MK64F12_sim.h>
Data Fields | |
| __IO hw_sim_sopt1_t | SOPT1 |
| __IO hw_sim_sopt1cfg_t | SOPT1CFG |
| __IO hw_sim_sopt2_t | SOPT2 |
| __IO hw_sim_sopt4_t | SOPT4 |
| __IO hw_sim_sopt5_t | SOPT5 |
| __IO hw_sim_sopt7_t | SOPT7 |
| __I hw_sim_sdid_t | SDID |
| __IO hw_sim_scgc1_t | SCGC1 |
| __IO hw_sim_scgc2_t | SCGC2 |
| __IO hw_sim_scgc3_t | SCGC3 |
| __IO hw_sim_scgc4_t | SCGC4 |
| __IO hw_sim_scgc5_t | SCGC5 |
| __IO hw_sim_scgc6_t | SCGC6 |
| __IO hw_sim_scgc7_t | SCGC7 |
| __IO hw_sim_clkdiv1_t | CLKDIV1 |
| __IO hw_sim_clkdiv2_t | CLKDIV2 |
| __IO hw_sim_fcfg1_t | FCFG1 |
| __I hw_sim_fcfg2_t | FCFG2 |
| __I hw_sim_uidh_t | UIDH |
| __I hw_sim_uidmh_t | UIDMH |
| __I hw_sim_uidml_t | UIDML |
| __I hw_sim_uidl_t | UIDL |
Detailed Description
All SIM module registers.
Definition at line 4053 of file MK64F12_sim.h.
Field Documentation
| __IO hw_sim_clkdiv1_t CLKDIV1 |
[0x1044] System Clock Divider Register 1
Definition at line 4073 of file MK64F12_sim.h.
| __IO hw_sim_clkdiv2_t CLKDIV2 |
[0x1048] System Clock Divider Register 2
Definition at line 4074 of file MK64F12_sim.h.
| __IO hw_sim_fcfg1_t FCFG1 |
[0x104C] Flash Configuration Register 1
Definition at line 4075 of file MK64F12_sim.h.
| __I hw_sim_fcfg2_t FCFG2 |
[0x1050] Flash Configuration Register 2
Definition at line 4076 of file MK64F12_sim.h.
| __IO hw_sim_scgc1_t SCGC1 |
[0x1028] System Clock Gating Control Register 1
Definition at line 4066 of file MK64F12_sim.h.
| __IO hw_sim_scgc2_t SCGC2 |
[0x102C] System Clock Gating Control Register 2
Definition at line 4067 of file MK64F12_sim.h.
| __IO hw_sim_scgc3_t SCGC3 |
[0x1030] System Clock Gating Control Register 3
Definition at line 4068 of file MK64F12_sim.h.
| __IO hw_sim_scgc4_t SCGC4 |
[0x1034] System Clock Gating Control Register 4
Definition at line 4069 of file MK64F12_sim.h.
| __IO hw_sim_scgc5_t SCGC5 |
[0x1038] System Clock Gating Control Register 5
Definition at line 4070 of file MK64F12_sim.h.
| __IO hw_sim_scgc6_t SCGC6 |
[0x103C] System Clock Gating Control Register 6
Definition at line 4071 of file MK64F12_sim.h.
| __IO hw_sim_scgc7_t SCGC7 |
[0x1040] System Clock Gating Control Register 7
Definition at line 4072 of file MK64F12_sim.h.
| __I hw_sim_sdid_t SDID |
[0x1024] System Device Identification Register
Definition at line 4065 of file MK64F12_sim.h.
| __IO hw_sim_sopt1_t SOPT1 |
[0x0] System Options Register 1
Definition at line 4055 of file MK64F12_sim.h.
[0x4] SOPT1 Configuration Register
Definition at line 4056 of file MK64F12_sim.h.
| __IO hw_sim_sopt2_t SOPT2 |
[0x1004] System Options Register 2
Definition at line 4058 of file MK64F12_sim.h.
| __IO hw_sim_sopt4_t SOPT4 |
[0x100C] System Options Register 4
Definition at line 4060 of file MK64F12_sim.h.
| __IO hw_sim_sopt5_t SOPT5 |
[0x1010] System Options Register 5
Definition at line 4061 of file MK64F12_sim.h.
| __IO hw_sim_sopt7_t SOPT7 |
[0x1018] System Options Register 7
Definition at line 4063 of file MK64F12_sim.h.
| __I hw_sim_uidh_t UIDH |
[0x1054] Unique Identification Register High
Definition at line 4077 of file MK64F12_sim.h.
| __I hw_sim_uidl_t UIDL |
[0x1060] Unique Identification Register Low
Definition at line 4080 of file MK64F12_sim.h.
| __I hw_sim_uidmh_t UIDMH |
[0x1058] Unique Identification Register Mid-High
Definition at line 4078 of file MK64F12_sim.h.
| __I hw_sim_uidml_t UIDML |
[0x105C] Unique Identification Register Mid Low
Definition at line 4079 of file MK64F12_sim.h.
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