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_hw_sim_scgc6 Union Reference
HW_SIM_SCGC6 - System Clock Gating Control Register 6 (RW) More...
#include <MK64F12_sim.h>
Detailed Description
HW_SIM_SCGC6 - System Clock Gating Control Register 6 (RW)
Reset value: 0x40000001U
DAC0, FTM2, and RNGA can be accessed through both AIPS0 and AIPS1. When accessing through AIPS1, define the clock gate control bits in the SCGC2 and SCGC3. When accessing through AIPS0, define the clock gate control bits in SCGC6.
Definition at line 2712 of file MK64F12_sim.h.
Generated on Sat Aug 27 2022 17:09:03 by
1.7.2