Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Fork of
target-mcu-k64f
by 
Morpheus
_hw_sim_clkdiv1 Union Reference
HW_SIM_CLKDIV1 - System Clock Divider Register 1 (RW) More...
#include <MK64F12_sim.h>
Detailed Description
HW_SIM_CLKDIV1 - System Clock Divider Register 1 (RW)
Reset value: 0x00010000U
When updating CLKDIV1, update all fields using the one write command. Attempting to write an invalid clock ratio to the CLKDIV1 register will cause the write to be ignored. The maximum divide ratio that can be programmed between core/system clock and the other divided clocks is divide by 8. When OUTDIV1 equals 0000 (divide by 1), the other dividers cannot be set higher than 0111 (divide by 8). The CLKDIV1 register cannot be written to when the device is in VLPR mode.
Definition at line 3297 of file MK64F12_sim.h.
Generated on Sat Aug 27 2022 17:09:03 by
1.7.2