NXP
The MCR20A Wireless UART application functions as an wireless UART bridge between two (one-to-one) or several (one to many) boards. The application can be used with both a TERM, or with software that is capable of opening a serial port and writing to or reading from it. The characters sent or received are not necessarily ASCII printable characters.
Dependencies: fsl_phy_mcr20a fsl_smac mbed-rtos mbed
Fork of
mcr20_wireless_uart
by 
Freescale
By default, the application uses broadcast addresses for OTA communication. This way, the application can be directly downloaded and run without any user intervention. The following use case assumes no changes have been done to the project.
- Two (or more) MCR20A platforms (plugged into the FRDM-K64F Freescale Freedom Development platform) have to be connected to the PC using the mini/micro-USB cables.
- The code must be downloaded on the platforms via CMSIS-DAP (or other means).
- After that, two or more TERM applications must be opened, and the serial ports must be configured with the same baud rate as the one in the project (default baud rate is 115200). Other necessary serial configurations are 8 bit, no parity, and 1 stop bit.
- To start the setup, each platform must be reset, and one of the (user) push buttons found on the MCR20A platform must be pressed. The user can press any of the non-reset buttons on the FRDM-K64F Freescale Freedom Development platform as well. *This initiates the state machine of the application so user can start.
Documentation
SMAC Demo Applications User Guide
Revision 18:b02fc0e53df8, committed 2015-04-03
- Comitter:
- cotigac
- Date:
- Fri Apr 03 05:23:33 2015 +0000
- Parent:
- 17:52cfd7db8da3
- Child:
- 19:71b793021c78
- Commit message:
- Started creating wireless uart demo based on mbed-rtos
Changed in this revision
--- a/FXOS8700Q_TapDetector/FXOS8700Q_TD.cpp Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,184 +0,0 @@
-/* Copyright (c) 2010-2011 mbed.org, MIT License
-*
-* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
-* and associated documentation files (the "Software"), to deal in the Software without
-* restriction, including without limitation the rights to use, copy, modify, merge, publish,
-* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
-* Software is furnished to do so, subject to the following conditions:
-*
-* The above copyright notice and this permission notice shall be included in all copies or
-* substantial portions of the Software.
-*
-* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
-* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-#include "FXOS8700Q_TD.h"
-#define UINT14_MAX 16383
-
-
-FXOS8700Q::FXOS8700Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) {
-
-//Step 1: Go to Standby Mode to change configuration settings.
- uint8_t data[2] = {0x2A, 0x10}; //200 Hz, Standby Mode
- m_i2c.frequency(400000);
- writeRegs(data, 2);
-
- //Step 2: Enable X, Y, Z Single Pulse and X, Y and Z Double Pulse with DPA = 0 no double pulse abort
- data[0] = 0x21;
- data[1] = 0x3F;
- writeRegs(data, 2);
-
-//Step 3: Set Threshold 2g on X and Y and 4g on Z
-//Note: Every step is 0.063g
-//2g / 0.063g = 32 counts
-//4g/ 0.063g = 64 counts
- data[0] = 0x23; //Set X Threshold to 2g
- data[1] = 0x20;
- writeRegs(data, 2);
-
- data[0] = 0x24; //Set Y Threshold to 2g
- data[1] = 0x20;
- writeRegs(data, 2);
-
- data[0] = 0x25; //Set Z Threshold to 4g
- data[1] = 0x40;
- writeRegs(data, 2);
-
-//Step 4: Set Time Limit for Tap Detection to 60 ms (LP Mode, 200 Hz ODR, No LPF)
-//Note: 200 Hz ODR LP Mode, Time step is 2.5 ms per step
-//60 ms /2.5 ms = 24 counts
- data[0] = 0x26; //60 ms
- data[1] = 0x18;
- writeRegs(data, 2);
-
-//Step 5: Set Latency Timer to 200 ms
-//Note: 200 Hz ODR LP Mode, Time step is 5 ms per step
-//200 ms/ 5 ms = 40 counts
- data[0] = 0x27; //200 ms
- data[1] = 0x28;
- writeRegs(data, 2);
-
-//Step 6: Set Time Window for Second Tap to 300 ms
-//Note: 200 Hz ODR LP Mode, Time step is 5 ms per step
-//00 ms/5 ms = 60 counts
- data[0] = 0x28; //300 ms
- data[1] = 0x3C;
- writeRegs(data, 2);
-
-//Step 7: Route INT1 to System Interrupt
- data[0] = 0x2D; //Enable Pulse Interrupt Block in System CTRL_REG4
- data[1] = 0x08;
- writeRegs(data, 2);
-
- data[0] = 0x2E; //Route Pulse Interrupt Block to INT1 hardware Pin CTRL_REG5
- data[1] = 0x08;
- writeRegs(data, 2);
-
- data[0] = 0x2C; //Pulse function is enabled in Sleep mode and can generate an interrupt to wake the system
- data[1] = 0x10;
- writeRegs(data, 2);
-
-//Step 8: Active Mode
- //Read out the contents of the register
- uint8_t value = 0;
- readRegs(0x2A, &value, 1);
- //Change the value in the register to Active Mode.
- value |= 0x01;
- //Write in the updated value to put the device in Active Mode
- data[0] = 0x2A;
- data[1] = value;
- writeRegs(data, 2);
-
-}
-
-
-FXOS8700Q::~FXOS8700Q() { }
-
-uint8_t FXOS8700Q::getWhoAmI() {
- uint8_t who_am_i = 0;
- readRegs(FXOS8700Q_WHOAMI, &who_am_i, 1);
- return who_am_i;
-}
-
-float FXOS8700Q::getAccX() {
- return (float(getAccAxis(FXOS8700Q_OUT_X_MSB))/4096.0f);
-}
-
-float FXOS8700Q::getAccY() {
- return (float(getAccAxis(FXOS8700Q_OUT_Y_MSB))/4096.0f);
-}
-
-float FXOS8700Q::getAccZ() {
- return (float(getAccAxis(FXOS8700Q_OUT_Z_MSB))/4096.0f);
-}
-
-
-void FXOS8700Q::getAccAllAxis(float * res) {
- res[0] = getAccX();
- res[1] = getAccY();
- res[2] = getAccZ();
-}
-
-void FXOS8700Q::AccXYZraw(int16_t * d) {
- int16_t acc;
- uint8_t res[6];
- readRegs(FXOS8700Q_OUT_X_MSB, res, 6);
-
- acc = (res[0] << 6) | (res[1] >> 2);
- if (acc > UINT14_MAX/2)
- acc -= UINT14_MAX;
- d[0] = acc;
- acc = (res[2] << 6) | (res[3] >> 2);
- if (acc > UINT14_MAX/2)
- acc -= UINT14_MAX;
- d[1] = acc;
- acc = (res[4] << 6) | (res[5] >> 2);
- if (acc > UINT14_MAX/2)
- acc -= UINT14_MAX;
- d[2] = acc;
-}
-
-void FXOS8700Q::MagXYZraw(int16_t * d) {
- uint8_t res[6];
- readRegs(FXOS8700Q_M_OUT_X_MSB, res, 6);
-
- d[0] = (res[0] << 8) | res[1];
- d[1] = (res[2] << 8) | res[3];
- d[2] = (res[4] << 8) | res[5];
-}
-
-void FXOS8700Q::getMagAllAxis(float * res) {
- int16_t raw[3];
- MagXYZraw( raw);
- res[0] = (float) raw[0] * 0.1f;
- res[1] = (float) raw[1] * 0.1f;
- res[2] = (float) raw[2] * 0.1f;
-}
-
-int16_t FXOS8700Q::getAccAxis(uint8_t addr) {
- int16_t acc;
- uint8_t res[2];
- readRegs(addr, res, 2);
-
- acc = (res[0] << 6) | (res[1] >> 2);
- if (acc > UINT14_MAX/2)
- acc -= UINT14_MAX;
-
- return acc;
-}
-
-void FXOS8700Q::readRegs(int addr, uint8_t * data, int len) {
- char t[1] = {addr};
- m_i2c.write(m_addr, t, 1, true);
- m_i2c.read(m_addr, (char *)data, len);
-}
-
-void FXOS8700Q::writeRegs(uint8_t * data, int len) {
- m_i2c.write(m_addr, (char *)data, len);
-}
-
-
\ No newline at end of file
--- a/FXOS8700Q_TapDetector/FXOS8700Q_TD.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,163 +0,0 @@
-/* Copyright (c) 2010-2011 mbed.org, MIT License
-*
-* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
-* and associated documentation files (the "Software"), to deal in the Software without
-* restriction, including without limitation the rights to use, copy, modify, merge, publish,
-* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
-* Software is furnished to do so, subject to the following conditions:
-*
-* The above copyright notice and this permission notice shall be included in all copies or
-* substantial portions of the Software.
-*
-* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
-* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-#ifndef FXOS8700Q_H
-#define FXOS8700Q_H
-
-#include "mbed.h"
-// FXOS8700CQ I2C address
-#define FXOS8700CQ_SLAVE_ADDR0 (0x1E<<1) // with pins SA0=0, SA1=0
-#define FXOS8700CQ_SLAVE_ADDR1 (0x1D<<1) // with pins SA0=1, SA1=0
-#define FXOS8700CQ_SLAVE_ADDR2 (0x1C<<1) // with pins SA0=0, SA1=1
-#define FXOS8700CQ_SLAVE_ADDR3 (0x1F<<1) // with pins SA0=1, SA1=1
-// FXOS8700CQ internal register addresses
-#define FXOS8700Q_STATUS 0x00
-#define FXOS8700Q_OUT_X_MSB 0x01
-#define FXOS8700Q_OUT_Y_MSB 0x03
-#define FXOS8700Q_OUT_Z_MSB 0x05
-#define FXOS8700Q_M_OUT_X_MSB 0x33
-#define FXOS8700Q_M_OUT_Y_MSB 0x35
-#define FXOS8700Q_M_OUT_Z_MSB 0x37
-#define FXOS8700Q_WHOAMI 0x0D
-#define FXOS8700Q_XYZ_DATA_CFG 0x0E
-#define FXOS8700Q_CTRL_REG1 0x2A
-#define FXOS8700Q_M_CTRL_REG1 0x5B
-#define FXOS8700Q_M_CTRL_REG2 0x5C
-#define FXOS8700Q_WHOAMI_VAL 0xC7
-
-
-/**
-* MMA8451Q accelerometer example
-*
-* @code
-* #include "mbed.h"
-* #include "FXOS8700Q.h"
-*
-*
-* int main(void) {
-*
-* FXOS8700Q combo( A4, A5, FXOS8700Q_I2C_ADDRESS0);
-* PwmOut rled(LED_RED);
-* PwmOut gled(LED_GREEN);
-* PwmOut bled(LED_BLUE);
-*
-* while (true) {
-* rled = 1.0 - combo(acc.getAccX());
-* gled = 1.0 - combo(acc.getAccY());
-* bled = 1.0 - combo(acc.getAccZ());
-* wait(0.1);
-* }
-* }
-* @endcode
-*/
-
-class FXOS8700Q
-{
-public:
- /**
- * FXOS8700Q constructor
- *
- * @param sda SDA pin
- * @param sdl SCL pin
- * @param addr addr of the I2C peripheral
- */
-
- FXOS8700Q(PinName sda, PinName scl, int addr);
-
- /**
- * FXOS8700Q destructor
- */
- ~FXOS8700Q();
-
- /**
- * Get the value of the WHO_AM_I register
- *
- * @returns WHO_AM_I value
- */
- uint8_t getWhoAmI();
-
- /**
- * Get X axis acceleration
- *
- * @returns X axis acceleration
- */
- float getAccX();
-
- /**
- * Get Y axis acceleration
- *
- * @returns Y axis acceleration
- */
- float getAccY();
-
- /**
- * Get Z axis acceleration
- *
- * @returns Z axis acceleration
- */
- float getAccZ();
-
- /**
- * Get XYZ axis acceleration in G's
- *
- * @param res array where acceleration data will be stored
- */
- void getAccAllAxis(float * res);
-
- /**
- * Get XYZ axis magnetic readings in micro-teslas
- *
- * @param res array where acceleration data will be stored
- */
- void getMagAllAxis(float * res);
-
- /**
- * Get XYZ axis acceleration, signed 16 bit values
- *
- * @param res array where acceleration data will be stored
- */
- void AccXYZraw(int16_t * d);
-
- /**
- * Get XYZ axis magnetometer readings, signed 16 bit values
- *
- * @param res array where acceleration data will be stored
- */
- void MagXYZraw(int16_t * d);
-
- /**
- * Read FXOS8700Q internal registers
- *
- * @param Register Address
- * @param Pointer to whare results will be stored
- * @param Number of registers to read
- */
- void readRegs(int addr, uint8_t * data, int len);
-
- void writeRegs(uint8_t * data, int len);
-
-private:
- I2C m_i2c;
- int m_addr;
-
-
- int16_t getAccAxis(uint8_t addr);
-
-};
-
-#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/ASP.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,944 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file ASP.c
+* This is the source file for the ASP module.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+
+#include "Phy.h"
+#include "PhyInterface.h"
+#include "MpmInterface.h"
+#include "AspInterface.h"
+
+#if 0
+#include "MemManager.h"
+#include "FunctionLib.h"
+#include "Panic.h"
+#endif
+
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+
+#if gFsciIncluded_c
+#include "FsciInterface.h"
+#include "FsciCommands.h"
+#include "FsciCommunication.h"
+#endif
+
+#if gAspCapability_d
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+#define mFAD_THR_ResetValue 0x82
+#define mANT_AGC_CTRL_ResetValue 0x40
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+//MCR20 DTS modes
+enum {
+ gDtsNormal_c,
+ gDtsTxOne_c,
+ gDtsTxZero_c,
+ gDtsTx2Mhz_c,
+ gDtsTx200Khz_c,
+ gDtsTx1MbpsPRBS9_c,
+ gDtsTxExternalSrc_c,
+ gDtsTxRandomSeq_c
+};
+
+/************************************************************************************
+*************************************************************************************
+* Private functions prototype
+*************************************************************************************
+************************************************************************************/
+phyStatus_t AspSetDtsMode( uint8_t mode );
+phyStatus_t AspEnableBER( void );
+void AspDisableBER( void );
+
+#if gFsciIncluded_c
+static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId);
+static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId);
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+//2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
+static const uint16_t asp_pll_frac[16] = {0x2400, 0x4C00, 0x7400, 0x9C00, 0xC400, 0xEC00, 0x1400, 0x3C00, 0x6400, 0x8C00, 0xB400, 0xDC00, 0x0400, 0x2C00, 0x5400, 0x7C00};
+
+#if gFsciIncluded_c
+static uint8_t mAspFsciBinding[gPhyInstancesCnt_c];
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief Initialize the ASP module
+*
+* \param[in] phyInstance The instance of the PHY
+* \param[in] interfaceId The Serial Manager interface used
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 0
+void ASP_Init( instanceId_t phyInstance, uint8_t interfaceId )
+{
+#if gFsciIncluded_c
+ if( phyInstance < gPhyInstancesCnt_c )
+ {
+ mAspFsciBinding[phyInstance] = interfaceId;
+ FSCI_RegisterOpGroup( gFSCI_AppAspOpcodeGroup_c, gFsciMonitorMode_c, fsciAspReqHandler, NULL, gAspInterfaceId);
+ FSCI_RegisterOpGroup( gFSCI_AspSapId_c, gFsciMonitorMode_c, AspSapMonitor, NULL, gAspInterfaceId);
+ }
+#endif
+}
+
+/*! *********************************************************************************
+* \brief ASP SAP handler.
+*
+* \param[in] pMsg Pointer to the request message
+* \param[in] instanceId The instance of the PHY
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 1
+AspStatus_t APP_ASP_SapHandler(AppToAspMessage_t *pMsg, instanceId_t instanceId)
+{
+ AspStatus_t status = gAspSuccess_c;
+#if gFsciIncluded_c
+ FSCI_Monitor( gFSCI_AspSapId_c,
+ pMsg,
+ NULL,
+ gAspInterfaceId );
+#endif
+ switch( pMsg->msgType )
+ {
+ case aspMsgTypeGetTimeReq_c:
+ Asp_GetTimeReq((uint32_t*)&pMsg->msgData.aspGetTimeReq.time);
+ break;
+ case aspMsgTypeXcvrWriteReq_c:
+ status = Asp_XcvrWriteReq( pMsg->msgData.aspXcvrData.mode,
+ pMsg->msgData.aspXcvrData.addr,
+ pMsg->msgData.aspXcvrData.len,
+ pMsg->msgData.aspXcvrData.data);
+ break;
+ case aspMsgTypeXcvrReadReq_c:
+ status = Asp_XcvrReadReq( pMsg->msgData.aspXcvrData.mode,
+ pMsg->msgData.aspXcvrData.addr,
+ pMsg->msgData.aspXcvrData.len,
+ pMsg->msgData.aspXcvrData.data);
+ break;
+ case aspMsgTypeSetFADState_c:
+ status = Asp_SetFADState(pMsg->msgData.aspFADState);
+ break;
+ case aspMsgTypeSetFADThreshold_c:
+ status = Asp_SetFADThreshold(pMsg->msgData.aspFADThreshold);
+ break;
+ case aspMsgTypeSetANTXState_c:
+ status = Asp_SetANTXState(pMsg->msgData.aspANTXState);
+ break;
+ case aspMsgTypeGetANTXState_c:
+ *((uint8_t*)&status) = Asp_GetANTXState();
+ break;
+ case aspMsgTypeSetPowerLevel_c:
+ status = Asp_SetPowerLevel(pMsg->msgData.aspSetPowerLevelReq.powerLevel);
+ break;
+ case aspMsgTypeGetPowerLevel_c:
+ *((uint8_t*)&status) = Asp_GetPowerLevel(); //remove compiler warning
+ break;
+ case aspMsgTypeTelecSetFreq_c:
+ status = ASP_TelecSetFreq(pMsg->msgData.aspTelecsetFreq.channel);
+ break;
+ case aspMsgTypeTelecSendRawData_c:
+ status = ASP_TelecSendRawData((uint8_t*)&pMsg->msgData.aspTelecSendRawData);
+ break;
+ case aspMsgTypeTelecTest_c:
+ status = ASP_TelecTest(pMsg->msgData.aspTelecTest.mode);
+ break;
+ case aspMsgTypeSetLQIMode_c:
+ status = Asp_SetLQIMode(pMsg->msgData.aspLQIMode);
+ break;
+ case aspMsgTypeGetRSSILevel_c:
+ *((uint8_t*)&status) = Asp_GetRSSILevel(); //remove compiler warning
+ break;
+#if gMpmIncluded_d
+ case aspMsgTypeSetMpmConfig_c:
+ MPM_SetConfig(&pMsg->msgData.MpmConfig);
+ break;
+ case aspMsgTypeGetMpmConfig_c:
+ MPM_GetConfig(&pMsg->msgData.MpmConfig);
+ break;
+#endif
+ default:
+ status = gAspInvalidRequest_c;// OR gAspInvalidParameter_c
+ break;
+ }
+#if gFsciIncluded_c
+ FSCI_Monitor( gFSCI_AspSapId_c,
+ pMsg,
+ (void*)&status,
+ gAspInterfaceId );
+#endif
+ return status;
+}
+
+/*! *********************************************************************************
+* \brief Returns the current PHY time
+*
+* \param[in] time location where the PHY time will be stored
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 2
+void Asp_GetTimeReq(uint32_t *time)
+{
+ PhyTimeReadClock( time );
+}
+
+/*! *********************************************************************************
+* \brief Write XCVR registers
+*
+* \param[in] mode Direct/Indirect access
+* \param[in] addr XCVR address
+* \param[in] len number of bytes to write
+* \param[in] pData data o be written
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 3
+AspStatus_t Asp_XcvrWriteReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
+{
+ if (mode)
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
+ else
+ MCR20Drv_DirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Read XCVR registers
+*
+* \param[in] mode Direct/Indirect access
+* \param[in] addr XCVR address
+* \param[in] len number of bytes to read
+* \param[in] pData location where data will be stored
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 4
+AspStatus_t Asp_XcvrReadReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
+{
+ if (mode)
+ MCR20Drv_IndirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
+ else
+ MCR20Drv_DirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set Tx output power level
+*
+* \param[in] powerLevel The new power level: 0x03-0x1F (see documentation for details)
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 5
+AspStatus_t Asp_SetPowerLevel( uint8_t powerLevel )
+{
+ if(powerLevel > gAspPowerLevel_16dBm)
+ return gAspInvalidParameter_c;
+
+ {
+ uint8_t res;
+
+ res = PhyPlmeSetPwrLevelRequest(powerLevel);
+
+ if( res == gPhySuccess_c )
+ {
+ return gAspSuccess_c;
+ }
+ else
+ {
+ return gAspDenied_c;
+ }
+ }
+}
+
+/*! *********************************************************************************
+* \brief Read the current Tx power level
+*
+* \return power level
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 6
+uint8_t Asp_GetPowerLevel()
+{
+ return MCR20Drv_DirectAccessSPIRead(PA_PWR);
+}
+
+/*! *********************************************************************************
+* \brief Set the state of Active Promiscuous functionality
+*
+* \param[in] state new state
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 7
+AspStatus_t Asp_SetActivePromState(bool_t state)
+{
+ PhySetActivePromiscuous(state);
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set the state of Fast Antenna Diversity functionality
+*
+* \param[in] state new state
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 8
+AspStatus_t Asp_SetFADState(bool_t state)
+{
+ if( gPhySuccess_c != PhyPlmeSetFADStateRequest(state) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set the Fast Antenna Diversity threshold
+*
+* \param[in] threshold
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 9
+AspStatus_t Asp_SetFADThreshold(uint8_t threshold)
+{
+ if( gPhySuccess_c != PhyPlmeSetFADThresholdRequest(threshold) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX functionality
+*
+* \param[in] state
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 10
+AspStatus_t Asp_SetANTXState(bool_t state)
+{
+ if( gPhySuccess_c != PhyPlmeSetANTXStateRequest(state) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Get the ANTX functionality
+*
+* \return current state
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 11
+uint8_t Asp_GetANTXState(void)
+{
+ return PhyPlmeGetANTXStateRequest();
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX pad state
+*
+* \param[in] antAB_on
+* \param[in] rxtxSwitch_on
+*
+* \return status
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 12
+uint8_t Asp_SetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on)
+{
+ return PhyPlmeSetANTPadStateRequest(antAB_on, rxtxSwitch_on);
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX pad strength
+*
+* \param[in] hiStrength
+*
+* \return status
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 13
+uint8_t Asp_SetANTPadStrengthRequest(bool_t hiStrength)
+{
+ return PhyPlmeSetANTPadStrengthRequest(hiStrength);
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX inverted pads
+*
+* \param[in] invAntA invert Ant_A pad
+* \param[in] invAntB invert Ant_B pad
+* \param[in] invTx invert Tx pad
+* \param[in] invRx invert Rx pad
+*
+* \return status
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 14
+uint8_t Asp_SetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx)
+{
+ return PhyPlmeSetANTPadInvertedRequest(invAntA, invAntB, invTx, invRx);
+}
+
+/*! *********************************************************************************
+* \brief Set the LQI mode
+*
+* \param[in] mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 15
+AspStatus_t Asp_SetLQIMode(bool_t mode)
+{
+ if( gPhySuccess_c != PhyPlmeSetLQIModeRequest(mode) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Get the last RSSI level
+*
+* \return RSSI
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 16
+uint8_t Asp_GetRSSILevel(void)
+{
+ return PhyPlmeGetRSSILevelRequest();
+}
+
+/*! *********************************************************************************
+* \brief Set current channel
+*
+* \param[in] channel channel number (11-26)
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 17
+AspStatus_t ASP_TelecSetFreq(uint8_t channel)
+{
+ PhyPlmeForceTrxOffRequest();
+ if( gPhySuccess_c != PhyPlmeSetCurrentChannelRequest(channel,0) )
+ {
+ return gAspInvalidParameter_c;
+ }
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Send a raw data frame OTA
+*
+* \param[in] dataPtr raw data
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 18
+AspStatus_t ASP_TelecSendRawData(uint8_t* dataPtr)
+{
+ uint8_t phyReg;
+
+ dataPtr[0] += 2; /* Add FCS length to PSDU Length*/
+
+ // Validate the length
+ if(dataPtr[0] > gMaxPHYPacketSize_c)
+ return gAspTooLong_c;
+
+ //Force Idle
+ PhyPlmeForceTrxOffRequest();
+ AspSetDtsMode(gDtsNormal_c);
+ AspDisableBER();
+ // Load the TX PB: load the PSDU Lenght byte but not the FCS bytes
+ MCR20Drv_PB_SPIBurstWrite(dataPtr, dataPtr[0] + 1 - 2);
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set Telec test mode
+*
+* \param[in] mode Telec test mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 19
+AspStatus_t ASP_TelecTest(uint8_t mode)
+{
+ uint8_t phyReg;
+ static uint8_t aTxContModPattern[2];
+ uint8_t channel;
+ static bool_t fracSet = FALSE;
+
+ // Get current channel number
+ channel = PhyPlmeGetCurrentChannelRequest(0);
+
+ if( fracSet )
+ {
+ ASP_TelecSetFreq(channel);
+ fracSet = FALSE;
+ }
+
+ switch( mode )
+ {
+ case gTestForceIdle_c: //ForceIdle();
+ PhyPlmeForceTrxOffRequest();
+
+ AspSetDtsMode(gDtsNormal_c);
+ AspDisableBER();
+ break;
+
+ case gTestPulseTxPrbs9_c: // Continuously transmit a PRBS9 pattern.
+ // PLME_PRBS9_Load (); // Load the TX RAM
+ AspSetDtsMode(gDtsTxRandomSeq_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Start Tx packet mode with no interrupt on end
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousRx_c: // Sets the device into continuous RX mode
+ AspSetDtsMode(gDtsNormal_c);
+ //Enable continuous RX mode
+ AspEnableBER();
+ // Set length of data in DUAL_PAN_DWELL register
+ MCR20Drv_IndirectAccessSPIWrite(DUAL_PAN_DWELL, 127);
+ // Start Rx packet mode with no interrupt on end
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gRX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxMod_c: // Sets the device to continuously transmit a 10101010 pattern
+ AspSetDtsMode(gDtsNormal_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ //Prepare TX operation
+ aTxContModPattern[0] = 1;
+ aTxContModPattern[1] = 0xAA;
+ // Load the TX PB
+ MCR20Drv_PB_SPIBurstWrite(aTxContModPattern, aTxContModPattern[0] + 1);
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxNoMod_c: // Sets the device to continuously transmit an unmodulated CW
+ //Enable unmodulated TX
+ AspSetDtsMode(gDtsTxOne_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &asp_pll_frac[channel - 11], 2);
+ fracSet = TRUE;
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTx2Mhz_c:
+ AspSetDtsMode(gDtsTx2Mhz_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTx200Khz_c:
+ AspSetDtsMode(gDtsTx200Khz_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTx1MbpsPRBS9_c:
+ AspSetDtsMode(gDtsTx1MbpsPRBS9_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxExternalSrc_c:
+ AspSetDtsMode(gDtsTxExternalSrc_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxNoModZero_c:
+ //Enable unmodulated TX
+ AspSetDtsMode(gDtsTxZero_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxNoModOne_c:
+ //Enable unmodulated TX
+ AspSetDtsMode(gDtsTxOne_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+ }
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Return the instance of the PHY associated with the FSCI interface
+*
+* \param[in] interfaceId FSCI interface
+*
+* \return insance
+*
+********************************************************************************** */
+#if gFsciIncluded_c
+#undef mFuncId_c
+#define mFuncId_c 20
+static uint32_t getPhyInstance( uint32_t interfaceId )
+{
+ uint32_t i;
+
+ for( i=0; i<gPhyInstancesCnt_c; i++ )
+ if( mAspFsciBinding[i] == interfaceId )
+ return i;
+
+ return 0;
+}
+
+/*! *********************************************************************************
+* \brief Handle ASP requests received from FSCI
+*
+* \param[in] pData monitored message
+* \param[in] param
+* \param[in] interfaceId FSCI interface
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 21
+static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId)
+{
+ clientPacket_t *pClientPacket = ((clientPacket_t*)pData);
+ uint8_t *pMsg = pClientPacket->structured.payload;
+
+ pMsg -= sizeof(AppAspMsgType_t);
+ ((AppToAspMessage_t*)pMsg)->msgType = (AppAspMsgType_t)pClientPacket->structured.header.opCode;
+
+ APP_ASP_SapHandler( (AppToAspMessage_t*)pMsg, getPhyInstance( interfaceId ) );
+ MEM_BufferFree(pData);
+}
+
+/*! *********************************************************************************
+* \brief Monitor the ASP Requests and Responses
+*
+* \param[in] pData monitored message
+* \param[in] param
+* \param[in] interfaceId FSCI interface
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 22
+static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId)
+{
+ clientPacket_t *pFsciPacket = MEM_BufferAlloc( sizeof(clientPacket_t) );
+ AppToAspMessage_t *pReq = (AppToAspMessage_t*)pData;
+ uint8_t *p;
+
+ if( NULL == pFsciPacket )
+ {
+ FSCI_Error( gFsciOutOfMessages_c, interfaceId );
+ return;
+ }
+
+ p = pFsciPacket->structured.payload;
+
+ if( NULL == param ) // Requests
+ {
+ pFsciPacket->structured.header.opGroup = gFSCI_AppAspOpcodeGroup_c;
+ pFsciPacket->structured.header.opCode = pReq->msgType;
+
+ switch( pReq->msgType )
+ {
+ case aspMsgTypeGetTimeReq_c:
+ break;
+ case aspMsgTypeXcvrWriteReq_c:
+ case aspMsgTypeXcvrReadReq_c:
+ *p++ = pReq->msgData.aspXcvrData.mode;
+ *((uint16_t*)p) = pReq->msgData.aspXcvrData.addr;
+ p += sizeof(uint16_t);
+ *p++ = pReq->msgData.aspXcvrData.len;
+ if( pReq->msgType == aspMsgTypeXcvrWriteReq_c )
+ {
+ FLib_MemCpy( p, pReq->msgData.aspXcvrData.data,
+ pReq->msgData.aspXcvrData.len );
+ p += pReq->msgData.aspXcvrData.len;
+ }
+ break;
+ case aspMsgTypeSetFADState_c:
+ FLib_MemCpy( p, &pReq->msgData.aspFADState, sizeof(pReq->msgData.aspFADState) );
+ p += sizeof(pReq->msgData.aspFADState);
+ break;
+ case aspMsgTypeSetFADThreshold_c:
+ FLib_MemCpy( p, &pReq->msgData.aspFADThreshold, sizeof(pReq->msgData.aspFADThreshold) );
+ p += sizeof(pReq->msgData.aspFADThreshold);
+ break;
+ case aspMsgTypeSetANTXState_c:
+ FLib_MemCpy( p, &pReq->msgData.aspANTXState, sizeof(pReq->msgData.aspANTXState) );
+ p += sizeof(pReq->msgData.aspANTXState);
+ break;
+ case aspMsgTypeGetANTXState_c:
+ /* Nothing to do here */
+ break;
+
+ case aspMsgTypeSetPowerLevel_c:
+ FLib_MemCpy( p, &pReq->msgData.aspSetPowerLevelReq, sizeof(pReq->msgData.aspSetPowerLevelReq) );
+ p += sizeof(pReq->msgData.aspSetPowerLevelReq);
+ break;
+ case aspMsgTypeGetPowerLevel_c:
+ /* Nothing to do here */
+ break;
+ case aspMsgTypeTelecSetFreq_c:
+ FLib_MemCpy( p, &pReq->msgData.aspTelecsetFreq, sizeof(pReq->msgData.aspTelecsetFreq) );
+ p += sizeof(pReq->msgData.aspTelecsetFreq);
+ break;
+ case aspMsgTypeTelecSendRawData_c:
+ FLib_MemCpy( p, &pReq->msgData.aspTelecSendRawData, sizeof(pReq->msgData.aspTelecSendRawData) );
+ p += sizeof(pReq->msgData.aspTelecSendRawData);
+ break;
+ case aspMsgTypeTelecTest_c:
+ FLib_MemCpy( p, &pReq->msgData.aspTelecTest, sizeof(pReq->msgData.aspTelecTest) );
+ p += sizeof(pReq->msgData.aspTelecTest);
+ break;
+ case aspMsgTypeSetLQIMode_c:
+ FLib_MemCpy(p, &pReq->msgData.aspLQIMode, sizeof(pReq->msgData.aspLQIMode) );
+ p += sizeof(pReq->msgData.aspLQIMode);
+ break;
+ case aspMsgTypeGetRSSILevel_c:
+ /* Nothing to do here */
+ break;
+ }
+ }
+ else // Confirms / Indications
+ {
+ pFsciPacket->structured.header.opGroup = gFSCI_AspAppOpcodeGroup_c;
+ pFsciPacket->structured.header.opCode = pReq->msgType;
+
+ *p++ = *((uint8_t*)param);/* copy status */
+
+ switch( pReq->msgType )
+ {
+ case aspMsgTypeGetTimeReq_c:
+ FLib_MemCpy( p, &pReq->msgData.aspGetTimeReq.time , sizeof(aspEventReq_t) );
+ p += sizeof(aspEventReq_t);
+ break;
+ case aspMsgTypeGetMpmConfig_c:
+ FLib_MemCpy( p, &pReq->msgData.MpmConfig , sizeof(mpmConfig_t) );
+ p += sizeof(mpmConfig_t);
+ break;
+ case aspMsgTypeXcvrReadReq_c:
+ *p++ = pReq->msgData.aspXcvrData.len; /* copy length */
+ FLib_MemCpy( p, pReq->msgData.aspXcvrData.data, pReq->msgData.aspXcvrData.len );
+ p += pReq->msgData.aspXcvrData.len;
+ break;
+ }
+
+ }
+
+ /* Send data over the serial interface */
+ pFsciPacket->structured.header.len = (fsciLen_t)(p - pFsciPacket->structured.payload);
+
+ if ( pFsciPacket->structured.header.len )
+ FSCI_transmitFormatedPacket( pFsciPacket, interfaceId );
+ else
+ MEM_BufferFree( pFsciPacket );
+}
+
+#endif /* gFsciIncluded_c */
+
+
+ /*! *********************************************************************************
+* \brief Set the Tx data source selector
+*
+* \param[in] mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+phyStatus_t AspSetDtsMode(uint8_t mode)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(TX_MODE_CTRL);
+ phyReg &= ~cTX_MODE_CTRL_DTS_MASK; // Clear DTS_MODE
+ phyReg |= mode; // Set new DTS_MODE
+ MCR20Drv_IndirectAccessSPIWrite(TX_MODE_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Enable XCVR test mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+phyStatus_t AspEnableBER()
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
+ phyReg |= cDTM_CTRL1_DTM_EN;
+ MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
+ phyReg |= cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN;
+ MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Disable XCVR test mode
+*
+********************************************************************************** */
+void AspDisableBER()
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
+ phyReg &= ~cDTM_CTRL1_DTM_EN;
+ MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
+ phyReg &= ~(cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN);
+ MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
+}
+
+
+#endif /* gAspCapability_d */
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/AspInterface.h Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,358 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file ASP.h
+* This is a header file for the ASP module.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __ASP_H__
+#define __ASP_H__
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+#include "PhyInterface.h"
+#include "MpmInterface.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+/* Enable/Disable the ASP module */
+#ifndef gAspCapability_d
+#ifndef gPHY_802_15_4g_d
+#define gAspCapability_d (1)
+#else
+#define gAspCapability_d (0)
+#endif // gPHY_802_15_4g_d
+#endif // gAspCapability_d
+
+#define gAspInterfaceId (0)
+
+/* Allowed ASP Power Levels */
+#define gAspPowerLevel_m40dBm_c (uint8_t)gAspPowerLevel_m40dBm
+#define gAspPowerLevel_m38dBm_c (uint8_t)gAspPowerLevel_m38dBm
+#define gAspPowerLevel_m36dBm_c (uint8_t)gAspPowerLevel_m36dBm
+#define gAspPowerLevel_m34dBm_c (uint8_t)gAspPowerLevel_m34dBm
+#define gAspPowerLevel_m32dBm_c (uint8_t)gAspPowerLevel_m32dBm
+#define gAspPowerLevel_m30dBm_c (uint8_t)gAspPowerLevel_m30dBm
+#define gAspPowerLevel_m28dBm_c (uint8_t)gAspPowerLevel_m28dBm
+#define gAspPowerLevel_m26dBm_c (uint8_t)gAspPowerLevel_m26dBm
+#define gAspPowerLevel_m24dBm_c (uint8_t)gAspPowerLevel_m24dBm
+#define gAspPowerLevel_m22dBm_c (uint8_t)gAspPowerLevel_m22dBm
+#define gAspPowerLevel_m20dBm_c (uint8_t)gAspPowerLevel_m20dBm
+#define gAspPowerLevel_m18dBm_c (uint8_t)gAspPowerLevel_m18dBm
+#define gAspPowerLevel_m16dBm_c (uint8_t)gAspPowerLevel_m16dBm
+#define gAspPowerLevel_m14dBm_c (uint8_t)gAspPowerLevel_m14dBm
+#define gAspPowerLevel_m12dBm_c (uint8_t)gAspPowerLevel_m12dBm
+#define gAspPowerLevel_m10dBm_c (uint8_t)gAspPowerLevel_m10dBm
+#define gAspPowerLevel_m8dBm_c (uint8_t)gAspPowerLevel_m8dBm
+#define gAspPowerLevel_m6dBm_c (uint8_t)gAspPowerLevel_m6dBm
+#define gAspPowerLevel_m4dBm_c (uint8_t)gAspPowerLevel_m4dBm
+#define gAspPowerLevel_m2dBm_c (uint8_t)gAspPowerLevel_m2dBm
+#define gAspPowerLevel_0dBm_c (uint8_t)gAspPowerLevel_0dBm
+#define gAspPowerLevel_2dBm_c (uint8_t)gAspPowerLevel_2dBm
+#define gAspPowerLevel_4dBm_c (uint8_t)gAspPowerLevel_4dBm
+#define gAspPowerLevel_6dBm_c (uint8_t)gAspPowerLevel_6dBm
+#define gAspPowerLevel_8dBm_c (uint8_t)gAspPowerLevel_8dBm
+#define gAspPowerLevel_10dBm_c (uint8_t)gAspPowerLevel_10dBm
+#define gAspPowerLevel_12dBm_c (uint8_t)gAspPowerLevel_12dBm
+#define gAspPowerLevel_14dBm_c (uint8_t)gAspPowerLevel_14dBm
+#define gAspPowerLevel_16dBm_c (uint8_t)gAspPowerLevel_16dBm
+
+/* OpGroup codes used with FSCI */
+#define gFSCI_AspAppOpcodeGroup_c 0x94 /* ASP_APP_SapHandler */
+#define gFSCI_AppAspOpcodeGroup_c 0x95 /* APP_ASP_SapHandler */
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+/* ASP status messages */
+typedef enum{
+ gAspSuccess_c = 0x00,
+ gAspInvalidRequest_c = 0xC2,
+ gAspDenied_c = 0xE2,
+ gAspTooLong_c = 0xE5,
+ gAspInvalidParameter_c = 0xE8
+}AspStatus_t;
+
+/* Supported Power Levels */
+enum {
+ gAspPowerLevel_m40dBm = 0x03,
+ gAspPowerLevel_m38dBm = 0x04,
+ gAspPowerLevel_m36dBm = 0x05,
+ gAspPowerLevel_m34dBm = 0x06,
+ gAspPowerLevel_m32dBm = 0x07,
+ gAspPowerLevel_m30dBm = 0x08,
+ gAspPowerLevel_m28dBm = 0x09,
+ gAspPowerLevel_m26dBm = 0x0A,
+ gAspPowerLevel_m24dBm = 0x0B,
+ gAspPowerLevel_m22dBm = 0x0C,
+ gAspPowerLevel_m20dBm = 0x0D,
+ gAspPowerLevel_m18dBm = 0x0E,
+ gAspPowerLevel_m16dBm = 0x0F,
+ gAspPowerLevel_m14dBm = 0x10,
+ gAspPowerLevel_m12dBm = 0x11,
+ gAspPowerLevel_m10dBm = 0x12,
+ gAspPowerLevel_m8dBm = 0x13,
+ gAspPowerLevel_m6dBm = 0x14,
+ gAspPowerLevel_m4dBm = 0x15,
+ gAspPowerLevel_m2dBm = 0x16,
+ gAspPowerLevel_0dBm = 0x17,
+ gAspPowerLevel_2dBm = 0x18,
+ gAspPowerLevel_4dBm = 0x19,
+ gAspPowerLevel_6dBm = 0x1A,
+ gAspPowerLevel_8dBm = 0x1B,
+ gAspPowerLevel_10dBm = 0x1C,
+ gAspPowerLevel_12dBm = 0x1D,
+ gAspPowerLevel_14dBm = 0x1E,
+ gAspPowerLevel_16dBm = 0x1F
+};
+
+/* Radio test modes */
+enum {
+ gTestForceIdle_c = 0,
+ gTestPulseTxPrbs9_c = 1,
+ gTestContinuousRx_c = 2,
+ gTestContinuousTxMod_c = 3,
+ gTestContinuousTxNoMod_c = 4,
+ gTestContinuousTx2Mhz_c = 5,
+ gTestContinuousTx200Khz_c = 6,
+ gTestContinuousTx1MbpsPRBS9_c = 7,
+ gTestContinuousTxExternalSrc_c = 8,
+ gTestContinuousTxNoModZero_c = 9,
+ gTestContinuousTxNoModOne_c = 10
+};
+
+/* This enum matches with the FSCI OpCode used by ASP*/
+typedef enum {
+ aspMsgTypeGetTimeReq_c = 0x00,
+ aspMsgTypeGetInactiveTimeReq_c = 0x01,
+ aspMsgTypeGetMacStateReq_c = 0x02,
+ aspMsgTypeDozeReq_c = 0x03,
+ aspMsgTypeAutoDozeReq_c = 0x04,
+ aspMsgTypeAcomaReq_c = 0x05,
+ aspMsgTypeHibernateReq_c = 0x06,
+ aspMsgTypeWakeReq_c = 0x07,
+ aspMsgTypeEventReq_c = 0x08,
+ aspMsgTypeClkoReq_c = 0x09,
+ aspMsgTypeTrimReq_c = 0x0A,
+ aspMsgTypeDdrReq_c = 0x0B,
+ aspMsgTypePortReq_c = 0x0C,
+ aspMsgTypeSetMinDozeTimeReq_c = 0x0D,
+ aspMsgTypeSetNotifyReq_c = 0x0E,
+ aspMsgTypeSetPowerLevel_c = 0x0F,
+ aspMsgTypeGetPowerLevel_c = 0x1F,
+ aspMsgTypeTelecTest_c = 0x10,
+ aspMsgTypeTelecSetFreq_c = 0x11,
+ aspMsgTypeGetInactiveTimeCnf_c = 0x12,
+ aspMsgTypeGetMacStateCnf_c = 0x13,
+ aspMsgTypeDozeCnf_c = 0x14,
+ aspMsgTypeAutoDozeCnf_c = 0x15,
+ aspMsgTypeTelecSendRawData_c = 0x16,
+ aspMsgTypeSetFADState_c = 0x17,
+ aspMsgTypeSetFADThreshold_c = 0x18,
+ aspMsgTypeGetFADThreshold_c = 0x19,
+ aspMsgTypeGetFADState_c = 0x1A,
+ aspMsgTypeSetActivePromState_c = 0x1B,
+ aspMsgTypeXcvrWriteReq_c = 0x1C,
+ aspMsgTypeXcvrReadReq_c = 0x1D,
+ aspMsgTypeSetANTXState_c = 0x20,
+ aspMsgTypeGetANTXState_c = 0x21,
+ aspMsgTypeSetLQIMode_c = 0x22,
+ aspMsgTypeGetRSSILevel_c = 0x23,
+ aspMsgTypeSetMpmConfig_c = 0x24,
+ aspMsgTypeGetMpmConfig_c = 0x25
+}AppAspMsgType_t;
+
+typedef PACKED_STRUCT aspEventReq_tag
+{ /* AspEvent.Request */
+ uint32_t eventTime;
+} aspEventReq_t;
+
+typedef PACKED_STRUCT aspGetTimeReq_tag
+{ /* AspGetTime.Request */
+ uint32_t time;
+} aspGetTimeReq_t;
+
+typedef PACKED_STRUCT aspSetNotifyReq_tag
+{ /* AspSetNotify.Request */
+ uint8_t notifications;
+} aspSetNotifyReq_t;
+
+
+typedef PACKED_STRUCT aspSetPowerLevelReq_tag
+{ /* AspSetPowerLevel.Request */
+ uint8_t powerLevel;
+} aspSetPowerLevelReq_t;
+
+
+typedef PACKED_STRUCT aspGetPowerLevelReq_tag
+{ /* AspGetPowerLevel.Request */
+ uint8_t powerLevel;
+} aspGetPowerLevelReq_t;
+
+
+typedef PACKED_STRUCT aspTelecTest_tag
+{ /* AspTelecTest.Request */
+ uint8_t mode;
+} aspTelecTest_t;
+
+
+typedef PACKED_STRUCT aspTelecsetFreq_tag
+{ /* AspTelecSetFreq.Request */
+ uint8_t channel;
+} aspTelecsetFreq_t;
+
+
+typedef PACKED_STRUCT aspTelecSendRawData_tag
+{ /* AspTelecSendRawData.Request */
+ uint8_t length;
+ uint8_t* dataPtr;
+} aspTelecSendRawData_t;
+
+ /* AspSetFADThreshold.Request */
+typedef uint8_t aspFADThreshold_t;
+ /* AspSetLQIMode.Request */
+typedef uint8_t aspLQIMode_t;
+
+typedef PACKED_STRUCT aspXcvrReq_tag
+{ /* AspXcvrWrite.Request / AspXcvrRead.Request */
+ uint8_t mode;
+ uint16_t addr;
+ uint8_t len;
+ uint8_t data[4]; /* more than 4 bytes can be read/written */
+} aspXcvrReq_t;
+
+
+typedef PACKED_STRUCT AppToAspMessage_tag
+{
+ AppAspMsgType_t msgType;
+ PACKED_UNION
+ {
+ aspEventReq_t aspEventReq;
+ aspGetTimeReq_t aspGetTimeReq;
+ aspSetPowerLevelReq_t aspSetPowerLevelReq;
+ aspGetPowerLevelReq_t aspGetPowerLevelReq;
+ aspTelecTest_t aspTelecTest;
+ aspTelecsetFreq_t aspTelecsetFreq;
+ aspTelecSendRawData_t aspTelecSendRawData;
+ aspFADThreshold_t aspFADThreshold;
+ bool_t aspFADState;
+ bool_t aspANTXState;
+ aspLQIMode_t aspLQIMode;
+ bool_t aspActivePromState;
+ aspXcvrReq_t aspXcvrData;
+ mpmConfig_t MpmConfig;
+ }msgData;
+} AppToAspMessage_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+#if gAspCapability_d
+
+void ASP_Init( instanceId_t phyInstance, uint8_t interfaceId );
+
+AspStatus_t APP_ASP_SapHandler(AppToAspMessage_t *pMsg, instanceId_t instanceId);
+
+void Asp_GetTimeReq(uint32_t *time);
+
+AspStatus_t Asp_XcvrWriteReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData);
+AspStatus_t Asp_XcvrReadReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData);
+
+AspStatus_t Asp_SetPowerLevel(uint8_t powerLevel);
+uint8_t Asp_GetPowerLevel(void);
+
+AspStatus_t Asp_SetActivePromState(bool_t state);
+
+AspStatus_t Asp_SetFADState(bool_t state);
+AspStatus_t Asp_SetFADThreshold(uint8_t thresholdFAD);
+
+AspStatus_t Asp_SetANTXState(bool_t state);
+uint8_t Asp_GetANTXState(void);
+uint8_t Asp_SetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on);
+uint8_t Asp_SetANTPadStrengthRequest(bool_t hiStrength);
+uint8_t Asp_SetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx);
+
+AspStatus_t Asp_SetLQIMode(bool_t mode);
+uint8_t Asp_GetRSSILevel(void);
+
+AspStatus_t ASP_TelecSetFreq (uint8_t channel);
+AspStatus_t ASP_TelecSendRawData(uint8_t* dataPtr);
+AspStatus_t ASP_TelecTest (uint8_t mode);
+
+#else /* gAspCapability_d */
+
+#define ASP_Init(phyInstance,interfaceId)
+#define Asp_GetTimeReq(time)
+
+#define APP_ASP_SapHandler(pMsg) (gAspDenied_c)
+#define Asp_XcvrWriteReq(mode, addr, len, pData) (gAspDenied_c)
+#define Asp_XcvrReadReq(mode, addr, len, pData) (gAspDenied_c)
+#define Asp_SetPowerLevel(powerLevel) (gAspDenied_c)
+#define Asp_SetActivePromState(state) (gAspDenied_c)
+#define Asp_SetFADState(state) (gAspDenied_c)
+#define Asp_SetFADThreshold(thresholdFAD) (gAspDenied_c)
+#define Asp_SetANTXState(state) (gAspDenied_c)
+#define Asp_SetLQIMode(mode) (gAspDenied_c)
+#define ASP_TelecSetFreq(channel) (gAspDenied_c)
+#define ASP_TelecSendRawData(dataPtr) (gAspDenied_c)
+#define ASP_TelecTest(mode) (gAspDenied_c)
+
+#define Asp_GetPowerLevel() (0)
+#define Asp_GetANTXState() (0)
+#define Asp_GetRSSILevel() (0)
+#endif /* gAspCapability_d */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__ASP_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/IEEE802_14_5_PHY/EmbeddedTypes.h Fri Apr 03 05:23:33 2015 +0000 @@ -0,0 +1,109 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file EmbeddedTypes.h +* This file holds type definitions that maps the standard c-types into types +* with guaranteed sizes. The types are target/platform specific and must be edited +* for each new target/platform. +* The header file also provides definitions for TRUE, FALSE and NULL. +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _EMBEDDEDTYPES_H_ +#define _EMBEDDEDTYPES_H_ + + +/************************************************************************************ +* +* INCLUDES +* +************************************************************************************/ + +#include <stdint.h> +#include <stdlib.h> +#include <string.h> + + +/************************************************************************************ +* +* TYPE DEFINITIONS +* +************************************************************************************/ + +/* boolean types */ +typedef uint8_t bool_t; + +typedef uint8_t index_t; + +/* TRUE/FALSE definition*/ +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +/* null pointer definition*/ +#ifndef NULL +#define NULL (( void * )( 0x0UL )) +#endif + +#if defined(__GNUC__) +#define PACKED_STRUCT struct __attribute__ ((__packed__)) +#define PACKED_UNION union __attribute__ ((__packed__)) +#elif defined(__IAR_SYSTEMS_ICC__) +#define PACKED_STRUCT __packed struct +#define PACKED_UNION __packed union +#else +#define PACKED_STRUCT struct +#define PACKED_UNION union +#endif + +typedef unsigned char uintn8_t; +typedef unsigned long uintn32_t; + +#define MIN(a,b) (((a) < (b))?(a):(b)) + +/* Compute the number of elements of an array */ +#define NumberOfElements(x) (sizeof(x)/sizeof((x)[0])) + +#define GetRelAddr(strct, member) ((uint32_t)&(((strct*)(void *)0)->member)) +#define GetSizeOfMember(strct, member) sizeof(((strct*)(void *)0)->member) + +/* Type definitions for link configuration of instantiable layers */ +#define gInvalidInstanceId_c (instanceId_t)(-1) +typedef uint32_t instanceId_t; + +#define MEM_BufferAlloc(size) malloc(size) +#define MEM_BufferFree(ptr) free(ptr) +#define FLib_MemCpy(pDst, pSrc, size) memcpy(pDst, pSrc, size) +#define FLib_MemSet(pDst, value, size) memset(pDst, value, size) + +#endif /* _EMBEDDEDTYPES_H_ */ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/MCR20Drv/MCR20Drv.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,737 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MCR20Drv.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/*****************************************************************************
+* INCLUDED HEADERS *
+*---------------------------------------------------------------------------*
+* Add to this section all the headers that this module needs to include. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+
+#include "XcvrSpi.h"
+//#include "arm_hal_interrupt.h"
+
+/*****************************************************************************
+* PRIVATE VARIABLES *
+*---------------------------------------------------------------------------*
+* Add to this section all the variables and constants that have local *
+* (file) scope. *
+* Each of this declarations shall be preceded by the 'static' keyword. *
+* These variables / constants cannot be accessed outside this module. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+static uint32_t mPhyIrqDisableCnt = 1;
+
+/*****************************************************************************
+* PUBLIC VARIABLES *
+*---------------------------------------------------------------------------*
+* Add to this section all the variables and constants that have global *
+* (project) scope. *
+* These variables / constants can be accessed outside this module. *
+* These variables / constants shall be preceded by the 'extern' keyword in *
+* the interface header. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*****************************************************************************
+* PRIVATE FUNCTIONS PROTOTYPES *
+*---------------------------------------------------------------------------*
+* Add to this section all the functions prototypes that have local (file) *
+* scope. *
+* These functions cannot be accessed outside this module. *
+* These declarations shall be preceded by the 'static' keyword. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*****************************************************************************
+* PRIVATE FUNCTIONS *
+*---------------------------------------------------------------------------*
+* Add to this section all the functions that have local (file) scope. *
+* These functions cannot be accessed outside this module. *
+* These definitions shall be preceded by the 'static' keyword. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+
+/*****************************************************************************
+* PUBLIC FUNCTIONS *
+*---------------------------------------------------------------------------*
+* Add to this section all the functions that have global (project) scope. *
+* These functions can be accessed outside this module. *
+* These functions shall have their declarations (prototypes) within the *
+* interface header file and shall be preceded by the 'extern' keyword. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_Init
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_Init
+(
+void
+)
+{
+ spi_master_init(gXcvrSpiInstance_c);
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrDeassertCS_d();
+ MCR20Drv_RST_B_Deassert();
+ //MCR20Drv_RESET();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_DirectAccessSPIWrite
+(
+uint8_t address,
+uint8_t value
+)
+{
+ uint16_t txData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (address & TransceiverSPI_DirectRegisterAddressMask);
+ txData |= value << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t *)&txData, NULL, sizeof(txData));
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIMultiByteWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_DirectAccessSPIMultiByteWrite
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask);
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_PB_SPIByteWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_PB_SPIByteWrite
+(
+uint8_t address,
+uint8_t value
+)
+{
+ uint32_t txData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_WriteSelect |
+ TransceiverSPI_PacketBuffAccessSelect |
+ TransceiverSPI_PacketBuffByteModeSelect;
+ txData |= (address) << 8;
+ txData |= (value) << 16;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_PB_SPIBurstWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_PB_SPIBurstWrite
+(
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_WriteSelect |
+ TransceiverSPI_PacketBuffAccessSelect |
+ TransceiverSPI_PacketBuffBurstModeSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, 1);
+ spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+
+uint8_t MCR20Drv_DirectAccessSPIRead
+(
+uint8_t address
+)
+{
+ uint8_t txData;
+ uint8_t rxData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (address & TransceiverSPI_DirectRegisterAddressMask) |
+ TransceiverSPI_ReadSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return rxData;
+
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIMultyByteRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint8_t MCR20Drv_DirectAccessSPIMultiByteRead
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+ uint8_t phyIRQSTS1;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return 0;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask) |
+ TransceiverSPI_ReadSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return phyIRQSTS1;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_PB_SPIBurstRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint8_t MCR20Drv_PB_SPIBurstRead
+(
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+ uint8_t phyIRQSTS1;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return 0;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_ReadSelect |
+ TransceiverSPI_PacketBuffAccessSelect |
+ TransceiverSPI_PacketBuffBurstModeSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return phyIRQSTS1;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IndirectAccessSPIWrite
+(
+uint8_t address,
+uint8_t value
+)
+{
+ uint32_t txData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_IARIndexReg;
+ txData |= (address) << 8;
+ txData |= (value) << 16;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIMultiByteWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IndirectAccessSPIMultiByteWrite
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint16_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_IARIndexReg;
+ txData |= (startAddress) << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)byteArray, NULL, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint8_t MCR20Drv_IndirectAccessSPIRead
+(
+uint8_t address
+)
+{
+ uint16_t txData;
+ uint8_t rxData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect;
+ txData |= (address) << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return rxData;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIMultiByteRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IndirectAccessSPIMultiByteRead
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint16_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect);
+ txData |= (startAddress) << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_PortConfig
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_PortConfig
+(
+void
+)
+{
+#if 0
+ PORT_HAL_SetMuxMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
+ GPIO_EXTRACT_PIN(kGpioXcvrIrqPin),
+ kPortMuxAsGpio);
+ GPIO_DRV_InputPinInit(&mXcvrIrqPinCfg);
+#endif
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IsIrqPending
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint32_t MCR20Drv_IsIrqPending
+(
+void
+)
+{
+ if( !RF_isIRQ_Pending() )
+ {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_Disable
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_Disable
+(
+void
+)
+{
+ __disable_irq();
+
+ if( mPhyIrqDisableCnt == 0 )
+ {
+ RF_IRQ_Disable();
+ }
+
+ mPhyIrqDisableCnt++;
+
+ __enable_irq();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_Enable
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_Enable
+(
+void
+)
+{
+ __disable_irq();
+
+ if( mPhyIrqDisableCnt )
+ {
+ mPhyIrqDisableCnt--;
+
+ if( mPhyIrqDisableCnt == 0 )
+ {
+ RF_IRQ_Enable();
+ }
+ }
+
+ __enable_irq();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_IsEnabled
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint32_t MCR20Drv_IRQ_IsEnabled
+(
+void
+)
+{
+
+#if 0
+ port_interrupt_config_t mode;
+
+ mode = PORT_HAL_GetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
+ GPIO_EXTRACT_PIN(kGpioXcvrIrqPin));
+ return (mode != kPortIntDisabled);
+#endif
+ return 1;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_Clear
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_Clear
+(
+void
+)
+{
+ //GPIO_DRV_ClearPinIntFlag(kGpioXcvrIrqPin);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_RST_Assert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_RST_B_Assert
+(
+void
+)
+{
+ RF_RST_Set(0);
+ //GPIO_DRV_ClearPinOutput(kGpioXcvrResetPin);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_RST_Deassert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_RST_B_Deassert
+(
+void
+)
+{
+ RF_RST_Set(1);
+ //GPIO_DRV_SetPinOutput(kGpioXcvrResetPin);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_SoftRST_Assert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_SoftRST_Assert
+(
+void
+)
+{
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_SoftRST_Deassert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_SoftRST_Deassert
+(
+void
+)
+{
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_Soft_RESET
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_Soft_RESET
+(
+void
+)
+{
+ //assert SOG_RST
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
+
+ //deassert SOG_RST
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_RESET
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_RESET
+(
+void
+)
+{
+ volatile uint32_t delay = 1000;
+ //assert RST_B
+ MCR20Drv_RST_B_Assert();
+
+ // TODO
+ while(delay--);
+
+ //deassert RST_B
+ MCR20Drv_RST_B_Deassert();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_Set_CLK_OUT_Freq
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_Set_CLK_OUT_Freq
+(
+uint8_t freqDiv
+)
+{
+ uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND;
+
+ if(freqDiv == gCLK_OUT_FREQ_DISABLE)
+ {
+ clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled
+ }
+
+ MCR20Drv_DirectAccessSPIWrite((uint8_t) CLK_OUT_CTRL, clkOutCtrlReg);
+}
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/IEEE802_14_5_PHY/MCR20Drv/MCR20Drv.h Fri Apr 03 05:23:33 2015 +0000 @@ -0,0 +1,406 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file MCR20Drv.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef __MCR20_DRV_H__ +#define __MCR20_DRV_H__ + + +/***************************************************************************** + * INCLUDED HEADERS * + *---------------------------------------------------------------------------* + * Add to this section all the headers that this module needs to include. * + * Note that it is not a good practice to include header files into header * + * files, so use this section only if there is no other better solution. * + *---------------------------------------------------------------------------* + *****************************************************************************/ + +#include "EmbeddedTypes.h" + +/***************************************************************************** + * PRIVATE MACROS * + *---------------------------------------------------------------------------* + * Add to this section all the access macros, registers mappings, bit access * + * macros, masks, flags etc ... + *---------------------------------------------------------------------------* + *****************************************************************************/ +#ifndef gMCR20_ClkOutFreq_d +#define gMCR20_ClkOutFreq_d gCLK_OUT_FREQ_4_MHz +#endif + +/***************************************************************************** + * PUBLIC FUNCTIONS * + *---------------------------------------------------------------------------* + * Add to this section all the global functions prototype preceded (as a * + * good practice) by the keyword 'extern' * + *---------------------------------------------------------------------------* + *****************************************************************************/ + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Init + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +extern void MCR20Drv_Init +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_SPI_DMA_Init + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_SPI_DMA_Init +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Start_PB_DMA_SPI_Write + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_Start_PB_DMA_SPI_Write +( + uint8_t * srcAddress, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Start_PB_DMA_SPI_Read + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_Start_PB_DMA_SPI_Read +( + uint8_t * dstAddress, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_DirectAccessSPIWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_DirectAccessSPIWrite +( + uint8_t address, + uint8_t value +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_DirectAccessSPIMultiByteWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_DirectAccessSPIMultiByteWrite +( + uint8_t startAddress, + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_PB_SPIBurstWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_PB_SPIBurstWrite +( + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_DirectAccessSPIRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint8_t MCR20Drv_DirectAccessSPIRead +( + uint8_t address +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_DirectAccessSPIMultyByteRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ + +uint8_t MCR20Drv_DirectAccessSPIMultiByteRead +( + uint8_t startAddress, + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_PB_SPIByteWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_PB_SPIByteWrite +( + uint8_t address, + uint8_t value +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_PB_SPIBurstRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint8_t MCR20Drv_PB_SPIBurstRead +( + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IndirectAccessSPIWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IndirectAccessSPIWrite +( + uint8_t address, + uint8_t value +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IndirectAccessSPIMultiByteWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IndirectAccessSPIMultiByteWrite +( + uint8_t startAddress, + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IndirectAccessSPIRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint8_t MCR20Drv_IndirectAccessSPIRead +( + uint8_t address +); +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IndirectAccessSPIMultiByteRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IndirectAccessSPIMultiByteRead +( + uint8_t startAddress, + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_PortConfig + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IRQ_PortConfig +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IsIrqPending + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint32_t MCR20Drv_IsIrqPending +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_Disable + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IRQ_Disable +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_Enable + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IRQ_Enable +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_IsEnabled + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint32_t MCR20Drv_IRQ_IsEnabled +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_Clear + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IRQ_Clear +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_RST_PortConfig + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_RST_B_PortConfig +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_RST_Assert + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_RST_B_Assert +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_RST_Deassert + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_RST_B_Deassert +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_SoftRST_Assert + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_SoftRST_Assert +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_SoftRST_Deassert + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_SoftRST_Deassert +( + void +); + + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_RESET + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_RESET +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Soft_RESET + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_Soft_RESET +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Set_CLK_OUT_Freq + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_Set_CLK_OUT_Freq +( + uint8_t freqDiv +); + +#define ProtectFromMCR20Interrupt() MCR20Drv_IRQ_Disable() +#define UnprotectFromMCR20Interrupt() MCR20Drv_IRQ_Enable() + +#endif /* __MCR20_DRV_H__ */ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/MCR20Drv/MCR20Overwrites.h Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,310 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MCR20Overwrites.h
+* Description: Overwrites header file for MCR20 Register values
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef OVERWRITES_H_
+#define OVERWRITES_H_
+
+typedef struct overwrites_tag {
+ char address;
+ char data;
+}overwrites_t;
+
+
+/*****************************************************************************************************************/
+// This file is created exclusively for use with the transceiver 2.0 silicon
+// and is provided for the world to use. It contains a list of all
+// known overwrite values. Overwrite values are non-default register
+// values that configure the transceiver device to a more optimally performing
+// posture. It is expected that low level software (i.e. PHY) will
+// consume this file as a #include, and transfer the contents to the
+// the indicated addresses in the transceiver's memory space. This file has
+// at least one required entry, that being its own version current version
+// number, to be stored at transceiver's location 0x3B the
+// OVERWRITES_VERSION_NUMBER register. The RAM register is provided in
+// the transceiver address space to assist in future debug efforts. The
+// analyst may read this location (once device has been booted with
+// mysterious software) and have a good indication of what register
+// overwrites were performed (with all versions of the overwrites.h file
+// being archived forever at the Compass location shown above.
+//
+// The transceiver has an indirect register (IAR) space. Write access to this space
+// requires 3 or more writes:
+// 1st) the first write is an index value to the indirect (write Bit7=0, register access Bit 6=0) + 0x3E
+// 2nd) IAR Register #0x00 - 0xFF.
+// 3rd) The data to write
+// nth) Burst mode additional data if required.
+//
+// Write access to direct space requires only a single address, data pair.
+
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x0C}, //version 0C: new value for ACKDELAY targeting 198us (23 May, 2013, Larry Roshak)
+{0x23, 0x17} //PA_PWR new default Power Step is "23"
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x55}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x68, 0x61}, //RSSI_OFFSET
+{0x78, 0x03}, //CHF_PMAGAIN
+{0x22, 0x50}, //CCA1_THRESH
+{0x4D, 0x13}, //CORR_NVAL moved from 0x14 to 0x13 for 0.5 dB improved Rx Sensitivity
+{0x39, 0x3D} //ACKDELAY new value targeting a delay of 198us (23 May, 2013, Larry Roshak)
+};
+
+
+/* begin of deprecated versions
+
+==VERSION 1==
+(version 1 is empty)
+
+==VERSION 2==
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02} //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+};
+
+==VERSION 3==
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3
+{0x92, 0x07} //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+};
+
+==VERSION 4==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x04} //version 04 is the current version: update PA_COILTUNING default
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3
+{0x92, 0x07} //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71} //PA_TUNING: override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+};
+
+==VERSION 5==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x05} //version 05: updates Channel Filter Register set (21 Dec 2012, on behalf of S. Soca)
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07} //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71} //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F} //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F} //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24} //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24} //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24} //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24} //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24} //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24} //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32} //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D} //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D} //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+};
+
+==VERSION 6==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x06} //version 06: disable PA calibration
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07} //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71} //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F} //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F} //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24} //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24} //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24} //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24} //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24} //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24} //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32} //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D} //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D} //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28} //PA_CAL_DIS=1 Disabled PA calibration
+};
+
+==VERSION 7==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x07} //version 07: updated registers for ED/RSSI
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x73}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x68, 0x60}, //RSSI_OFFSET
+{0x69, 0x65} //RSSI_SLOPE
+};
+
+
+==VERSION 8==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x08} //version 08: updated registers for ED/RSSI
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x73}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x69, 0x65} //RSSI_SLOPE
+{0x68, 0x61}, //RSSI_OFFSET
+{0x78, 0x03} //CHF_PMAGAIN
+};
+
+
+==VERSION 9==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x09} //version 09: updated registers for ED/RSSI and PowerStep
+{0x23, 0x17} //PA_PWR new default value
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x55}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x68, 0x61}, //RSSI_OFFSET
+{0x78, 0x03} //CHF_PMAGAIN
+};
+
+==VERSION A==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x0A} //version 0A: updated registers for CCA
+{0x23, 0x17} //PA_PWR new default Power Step is "23"
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x55}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x68, 0x61}, //RSSI_OFFSET
+{0x78, 0x03} //CHF_PMAGAIN
+{0x22, 0x50} //CCA1_THRESH
+};
+
+end of deprecated versions */
+
+
+#endif //OVERWRITES_H_
+
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/MCR20Drv/MCR20Reg.h Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,731 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MCR20reg.h
+* MCR20 Registers
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __MCR20_REG_H__
+#define __MCR20_REG_H__
+/*****************************************************************************
+ * INCLUDED HEADERS *
+ *---------------------------------------------------------------------------*
+ * Add to this section all the headers that this module needs to include. *
+ * Note that it is not a good practice to include header files into header *
+ * files, so use this section only if there is no other better solution. *
+ *---------------------------------------------------------------------------*
+ *****************************************************************************/
+
+/****************************************************************************/
+/* Transceiver SPI Registers */
+/****************************************************************************/
+
+#define TransceiverSPI_IARIndexReg (0x3E)
+
+#define TransceiverSPI_ReadSelect (1<<7)
+#define TransceiverSPI_WriteSelect (0<<7)
+#define TransceiverSPI_RegisterAccessSelect (0<<6)
+#define TransceiverSPI_PacketBuffAccessSelect (1<<6)
+#define TransceiverSPI_PacketBuffBurstModeSelect (0<<5)
+#define TransceiverSPI_PacketBuffByteModeSelect (1<<5)
+
+#define TransceiverSPI_DirectRegisterAddressMask (0x3F)
+
+#define IRQSTS1 0x00
+#define IRQSTS2 0x01
+#define IRQSTS3 0x02
+#define PHY_CTRL1 0x03
+#define PHY_CTRL2 0x04
+#define PHY_CTRL3 0x05
+#define RX_FRM_LEN 0x06
+#define PHY_CTRL4 0x07
+#define SRC_CTRL 0x08
+#define SRC_ADDRS_SUM_LSB 0x09
+#define SRC_ADDRS_SUM_MSB 0x0A
+#define CCA1_ED_FNL 0x0B
+#define EVENT_TMR_LSB 0x0C
+#define EVENT_TMR_MSB 0x0D
+#define EVENT_TMR_USB 0x0E
+#define TIMESTAMP_LSB 0x0F
+#define TIMESTAMP_MSB 0x10
+#define TIMESTAMP_USB 0x11
+#define T3CMP_LSB 0x12
+#define T3CMP_MSB 0x13
+#define T3CMP_USB 0x14
+#define T2PRIMECMP_LSB 0x15
+#define T2PRIMECMP_MSB 0x16
+#define T1CMP_LSB 0x17
+#define T1CMP_MSB 0x18
+#define T1CMP_USB 0x19
+#define T2CMP_LSB 0x1A
+#define T2CMP_MSB 0x1B
+#define T2CMP_USB 0x1C
+#define T4CMP_LSB 0x1D
+#define T4CMP_MSB 0x1E
+#define T4CMP_USB 0x1F
+#define PLL_INT0 0x20
+#define PLL_FRAC0_LSB 0x21
+#define PLL_FRAC0_MSB 0x22
+#define PA_PWR 0x23
+#define SEQ_STATE 0x24
+#define LQI_VALUE 0x25
+#define RSSI_CCA_CONT 0x26
+//-------------- 0x27
+#define ASM_CTRL1 0x28
+#define ASM_CTRL2 0x29
+#define ASM_DATA_0 0x2A
+#define ASM_DATA_1 0x2B
+#define ASM_DATA_2 0x2C
+#define ASM_DATA_3 0x2D
+#define ASM_DATA_4 0x2E
+#define ASM_DATA_5 0x2F
+#define ASM_DATA_6 0x30
+#define ASM_DATA_7 0x31
+#define ASM_DATA_8 0x32
+#define ASM_DATA_9 0x33
+#define ASM_DATA_A 0x34
+#define ASM_DATA_B 0x35
+#define ASM_DATA_C 0x36
+#define ASM_DATA_D 0x37
+#define ASM_DATA_E 0x38
+#define ASM_DATA_F 0x39
+//------------------- 0x3A
+#define OVERWRITE_VER 0x3B
+#define CLK_OUT_CTRL 0x3C
+#define PWR_MODES 0x3D
+#define IAR_INDEX 0x3E
+#define IAR_DATA 0x3F
+
+
+#define PART_ID 0x00
+#define XTAL_TRIM 0x01
+#define PMC_LP_TRIM 0x02
+#define MACPANID0_LSB 0x03
+#define MACPANID0_MSB 0x04
+#define MACSHORTADDRS0_LSB 0x05
+#define MACSHORTADDRS0_MSB 0x06
+#define MACLONGADDRS0_0 0x07
+#define MACLONGADDRS0_8 0x08
+#define MACLONGADDRS0_16 0x09
+#define MACLONGADDRS0_24 0x0A
+#define MACLONGADDRS0_32 0x0B
+#define MACLONGADDRS0_40 0x0C
+#define MACLONGADDRS0_48 0x0D
+#define MACLONGADDRS0_56 0x0E
+#define RX_FRAME_FILTER 0x0F
+#define PLL_INT1 0x10
+#define PLL_FRAC1_LSB 0x11
+#define PLL_FRAC1_MSB 0x12
+#define MACPANID1_LSB 0x13
+#define MACPANID1_MSB 0x14
+#define MACSHORTADDRS1_LSB 0x15
+#define MACSHORTADDRS1_MSB 0x16
+#define MACLONGADDRS1_0 0x17
+#define MACLONGADDRS1_8 0x18
+#define MACLONGADDRS1_16 0x19
+#define MACLONGADDRS1_24 0x1A
+#define MACLONGADDRS1_32 0x1B
+#define MACLONGADDRS1_40 0x1C
+#define MACLONGADDRS1_48 0x1D
+#define MACLONGADDRS1_56 0x1E
+#define DUAL_PAN_CTRL 0x1F
+#define DUAL_PAN_DWELL 0x20
+#define DUAL_PAN_STS 0x21
+#define CCA1_THRESH 0x22
+#define CCA1_ED_OFFSET_COMP 0x23
+#define LQI_OFFSET_COMP 0x24
+#define CCA_CTRL 0x25
+#define CCA2_CORR_PEAKS 0x26
+#define CCA2_CORR_THRESH 0x27
+#define TMR_PRESCALE 0x28
+//---------------- 0x29
+#define GPIO_DATA 0x2A
+#define GPIO_DIR 0x2B
+#define GPIO_PUL_EN 0x2C
+#define GPIO_PUL_SEL 0x2D
+#define GPIO_DS 0x2E
+//-------------- 0x2F
+#define ANT_PAD_CTRL 0x30
+#define MISC_PAD_CTRL 0x31
+#define BSM_CTRL 0x32
+//--------------- 0x33
+#define _RNG 0x34
+#define RX_BYTE_COUNT 0x35
+#define RX_WTR_MARK 0x36
+#define SOFT_RESET 0x37
+#define TXDELAY 0x38
+#define ACKDELAY 0x39
+#define SEQ_MGR_CTRL 0x3A
+#define SEQ_MGR_STS 0x3B
+#define SEQ_T_STS 0x3C
+#define ABORT_STS 0x3D
+#define CCCA_BUSY_CNT 0x3E
+#define SRC_ADDR_CHECKSUM1 0x3F
+#define SRC_ADDR_CHECKSUM2 0x40
+#define SRC_TBL_VALID1 0x41
+#define SRC_TBL_VALID2 0x42
+#define FILTERFAIL_CODE1 0x43
+#define FILTERFAIL_CODE2 0x44
+#define SLOT_PRELOAD 0x45
+//---------------- 0x46
+#define CORR_VT 0x47
+#define SYNC_CTRL 0x48
+#define PN_LSB_0 0x49
+#define PN_LSB_1 0x4A
+#define PN_MSB_0 0x4B
+#define PN_MSB_1 0x4C
+#define CORR_NVAL 0x4D
+#define TX_MODE_CTRL 0x4E
+#define SNF_THR 0x4F
+#define FAD_THR 0x50
+#define ANT_AGC_CTRL 0x51
+#define AGC_THR1 0x52
+#define AGC_THR2 0x53
+#define AGC_HYS 0x54
+#define AFC 0x55
+//--------------- 0x56
+//--------------- 0x57
+#define PHY_STS 0x58
+#define RX_MAX_CORR 0x59
+#define RX_MAX_PREAMBLE 0x5A
+#define RSSI 0x5B
+//--------------- 0x5C
+//--------------- 0x5D
+#define PLL_DIG_CTRL 0x5E
+#define VCO_CAL 0x5F
+#define VCO_BEST_DIFF 0x60
+#define VCO_BIAS 0x61
+#define KMOD_CTRL 0x62
+#define KMOD_CAL 0x63
+#define PA_CAL 0x64
+#define PA_PWRCAL 0x65
+#define ATT_RSSI1 0x66
+#define ATT_RSSI2 0x67
+#define RSSI_OFFSET 0x68
+#define RSSI_SLOPE 0x69
+#define RSSI_CAL1 0x6A
+#define RSSI_CAL2 0x6B
+//--------------- 0x6C
+//--------------- 0x6D
+#define XTAL_CTRL 0x6E
+#define XTAL_COMP_MIN 0x6F
+#define XTAL_COMP_MAX 0x70
+#define XTAL_GM 0x71
+//--------------- 0x72
+//--------------- 0x73
+#define LNA_TUNE 0x74
+#define LNA_AGCGAIN 0x75
+//--------------- 0x76
+//--------------- 0x77
+#define CHF_PMA_GAIN 0x78
+#define CHF_IBUF 0x79
+#define CHF_QBUF 0x7A
+#define CHF_IRIN 0x7B
+#define CHF_QRIN 0x7C
+#define CHF_IL 0x7D
+#define CHF_QL 0x7E
+#define CHF_CC1 0x7F
+#define CHF_CCL 0x80
+#define CHF_CC2 0x81
+#define CHF_IROUT 0x82
+#define CHF_QROUT 0x83
+//--------------- 0x84
+//--------------- 0x85
+#define RSSI_CTRL 0x86
+//--------------- 0x87
+//--------------- 0x88
+#define PA_BIAS 0x89
+#define PA_TUNING 0x8A
+//--------------- 0x8B
+//--------------- 0x8C
+#define PMC_HP_TRIM 0x8D
+#define VREGA_TRIM 0x8E
+//--------------- 0x8F
+//--------------- 0x90
+#define VCO_CTRL1 0x91
+#define VCO_CTRL2 0x92
+//--------------- 0x93
+//--------------- 0x94
+#define ANA_SPARE_OUT1 0x95
+#define ANA_SPARE_OUT2 0x96
+#define ANA_SPARE_IN 0x97
+#define MISCELLANEOUS 0x98
+//--------------- 0x99
+#define SEQ_MGR_OVRD0 0x9A
+#define SEQ_MGR_OVRD1 0x9B
+#define SEQ_MGR_OVRD2 0x9C
+#define SEQ_MGR_OVRD3 0x9D
+#define SEQ_MGR_OVRD4 0x9E
+#define SEQ_MGR_OVRD5 0x9F
+#define SEQ_MGR_OVRD6 0xA0
+#define SEQ_MGR_OVRD7 0xA1
+//--------------- 0xA2
+#define TESTMODE_CTRL 0xA3
+#define DTM_CTRL1 0xA4
+#define DTM_CTRL2 0xA5
+#define ATM_CTRL1 0xA6
+#define ATM_CTRL2 0xA7
+#define ATM_CTRL3 0xA8
+//--------------- 0xA9
+#define LIM_FE_TEST_CTRL 0xAA
+#define CHF_TEST_CTRL 0xAB
+#define VCO_TEST_CTRL 0xAC
+#define PLL_TEST_CTRL 0xAD
+#define PA_TEST_CTRL 0xAE
+#define PMC_TEST_CTRL 0xAF
+#define SCAN_DTM_PROTECT_1 0xFE
+#define SCAN_DTM_PROTECT_0 0xFF
+
+// IRQSTS1 bits
+#define cIRQSTS1_RX_FRM_PEND (1<<7)
+#define cIRQSTS1_PLL_UNLOCK_IRQ (1<<6)
+#define cIRQSTS1_FILTERFAIL_IRQ (1<<5)
+#define cIRQSTS1_RXWTRMRKIRQ (1<<4)
+#define cIRQSTS1_CCAIRQ (1<<3)
+#define cIRQSTS1_RXIRQ (1<<2)
+#define cIRQSTS1_TXIRQ (1<<1)
+#define cIRQSTS1_SEQIRQ (1<<0)
+
+typedef union regIRQSTS1_tag{
+ uint8_t byte;
+ struct{
+ uint8_t SEQIRQ:1;
+ uint8_t TXIRQ:1;
+ uint8_t RXIRQ:1;
+ uint8_t CCAIRQ:1;
+ uint8_t RXWTRMRKIRQ:1;
+ uint8_t FILTERFAIL_IRQ:1;
+ uint8_t PLL_UNLOCK_IRQ:1;
+ uint8_t RX_FRM_PEND:1;
+ }bit;
+} regIRQSTS1_t;
+
+// IRQSTS2 bits
+#define cIRQSTS2_CRCVALID (1<<7)
+#define cIRQSTS2_CCA (1<<6)
+#define cIRQSTS2_SRCADDR (1<<5)
+#define cIRQSTS2_PI (1<<4)
+#define cIRQSTS2_TMRSTATUS (1<<3)
+#define cIRQSTS2_ASM_IRQ (1<<2)
+#define cIRQSTS2_PB_ERR_IRQ (1<<1)
+#define cIRQSTS2_WAKE_IRQ (1<<0)
+
+typedef union regIRQSTS2_tag{
+ uint8_t byte;
+ struct{
+ uint8_t WAKE_IRQ:1;
+ uint8_t PB_ERR_IRQ:1;
+ uint8_t ASM_IRQ:1;
+ uint8_t TMRSTATUS:1;
+ uint8_t PI:1;
+ uint8_t SRCADDR:1;
+ uint8_t CCA:1;
+ uint8_t CRCVALID:1;
+ }bit;
+} regIRQSTS2_t;
+
+// IRQSTS3 bits
+#define cIRQSTS3_TMR4MSK (1<<7)
+#define cIRQSTS3_TMR3MSK (1<<6)
+#define cIRQSTS3_TMR2MSK (1<<5)
+#define cIRQSTS3_TMR1MSK (1<<4)
+#define cIRQSTS3_TMR4IRQ (1<<3)
+#define cIRQSTS3_TMR3IRQ (1<<2)
+#define cIRQSTS3_TMR2IRQ (1<<1)
+#define cIRQSTS3_TMR1IRQ (1<<0)
+
+typedef union regIRQSTS3_tag{
+ uint8_t byte;
+ struct{
+ uint8_t TMR1IRQ:1;
+ uint8_t TMR2IRQ:1;
+ uint8_t TMR3IRQ:1;
+ uint8_t TMR4IRQ:1;
+ uint8_t TMR1MSK:1;
+ uint8_t TMR2MSK:1;
+ uint8_t TMR3MSK:1;
+ uint8_t TMR4MSK:1;
+ }bit;
+} regIRQSTS3_t;
+
+// PHY_CTRL1 bits
+#define cPHY_CTRL1_TMRTRIGEN (1<<7)
+#define cPHY_CTRL1_SLOTTED (1<<6)
+#define cPHY_CTRL1_CCABFRTX (1<<5)
+#define cPHY_CTRL1_RXACKRQD (1<<4)
+#define cPHY_CTRL1_AUTOACK (1<<3)
+#define cPHY_CTRL1_XCVSEQ (7<<0)
+
+typedef union regPHY_CTRL1_tag{
+ uint8_t byte;
+ struct{
+ uint8_t XCVSEQ:3;
+ uint8_t AUTOACK:1;
+ uint8_t RXACKRQD:1;
+ uint8_t CCABFRTX:1;
+ uint8_t SLOTTED:1;
+ uint8_t TMRTRIGEN:1;
+ }bit;
+} regPHY_CTRL1_t;
+
+// PHY_CTRL2 bits
+#define cPHY_CTRL2_CRC_MSK (1<<7)
+#define cPHY_CTRL2_PLL_UNLOCK_MSK (1<<6)
+#define cPHY_CTRL2_FILTERFAIL_MSK (1<<5)
+#define cPHY_CTRL2_RX_WMRK_MSK (1<<4)
+#define cPHY_CTRL2_CCAMSK (1<<3)
+#define cPHY_CTRL2_RXMSK (1<<2)
+#define cPHY_CTRL2_TXMSK (1<<1)
+#define cPHY_CTRL2_SEQMSK (1<<0)
+
+typedef union regPHY_CTRL2_tag{
+ uint8_t byte;
+ struct{
+ uint8_t SEQMSK:1;
+ uint8_t TXMSK:1;
+ uint8_t RXMSK:1;
+ uint8_t CCAMSK:1;
+ uint8_t RX_WMRK_MSK:1;
+ uint8_t FILTERFAIL_MSK:1;
+ uint8_t PLL_UNLOCK_MSK:1;
+ uint8_t CRC_MSK:1;
+ }bit;
+} regPHY_CTRL2_t;
+
+// PHY_CTRL3 bits
+#define cPHY_CTRL3_TMR4CMP_EN (1<<7)
+#define cPHY_CTRL3_TMR3CMP_EN (1<<6)
+#define cPHY_CTRL3_TMR2CMP_EN (1<<5)
+#define cPHY_CTRL3_TMR1CMP_EN (1<<4)
+#define cPHY_CTRL3_ASM_MSK (1<<2)
+#define cPHY_CTRL3_PB_ERR_MSK (1<<1)
+#define cPHY_CTRL3_WAKE_MSK (1<<0)
+
+typedef union regPHY_CTRL3_tag{
+ uint8_t byte;
+ struct{
+ uint8_t WAKE_MSK:1;
+ uint8_t PB_ERR_MSK:1;
+ uint8_t ASM_MSK:1;
+ uint8_t RESERVED:1;
+ uint8_t TMR1CMP_EN:1;
+ uint8_t TMR2CMP_EN:1;
+ uint8_t TMR3CMP_EN:1;
+ uint8_t TMR4CMP_EN:1;
+ }bit;
+} regPHY_CTRL3_t;
+
+// RX_FRM_LEN bits
+#define cRX_FRAME_LENGTH (0x7F)
+
+// PHY_CTRL4 bits
+#define cPHY_CTRL4_TRCV_MSK (1<<7)
+#define cPHY_CTRL4_TC3TMOUT (1<<6)
+#define cPHY_CTRL4_PANCORDNTR0 (1<<5)
+#define cPHY_CTRL4_CCATYPE (3<<0)
+#define cPHY_CTRL4_CCATYPE_Shift_c (3)
+#define cPHY_CTRL4_TMRLOAD (1<<2)
+#define cPHY_CTRL4_PROMISCUOUS (1<<1)
+#define cPHY_CTRL4_TC2PRIME_EN (1<<0)
+
+typedef union regPHY_CTRL4_tag{
+ uint8_t byte;
+ struct{
+ uint8_t TC2PRIME_EN:1;
+ uint8_t PROMISCUOUS:1;
+ uint8_t TMRLOAD:1;
+ uint8_t CCATYPE:2;
+ uint8_t PANCORDNTR0:1;
+ uint8_t TC3TMOUT:1;
+ uint8_t TRCV_MSK:1;
+ }bit;
+} regPHY_CTRL4_t;
+
+// SRC_CTRL bits
+#define cSRC_CTRL_INDEX (0x0F)
+#define cSRC_CTRL_INDEX_Shift_c (4)
+#define cSRC_CTRL_ACK_FRM_PND (1<<3)
+#define cSRC_CTRL_SRCADDR_EN (1<<2)
+#define cSRC_CTRL_INDEX_EN (1<<1)
+#define cSRC_CTRL_INDEX_DISABLE (1<<0)
+
+typedef union regSRC_CTRL_tag{
+ uint8_t byte;
+ struct{
+ uint8_t INDEX_DISABLE:1;
+ uint8_t INDEX_EN:1;
+ uint8_t SRCADDR_EN:1;
+ uint8_t ACK_FRM_PND:1;
+ uint8_t INDEX:4;
+ }bit;
+} regSRC_CTRL_t;
+
+// ASM_CTRL1 bits
+#define cASM_CTRL1_CLEAR (1<<7)
+#define cASM_CTRL1_START (1<<6)
+#define cASM_CTRL1_SELFTST (1<<5)
+#define cASM_CTRL1_CTR (1<<4)
+#define cASM_CTRL1_CBC (1<<3)
+#define cASM_CTRL1_AES (1<<2)
+#define cASM_CTRL1_LOAD_MAC (1<<1)
+
+// ASM_CTRL2 bits
+#define cASM_CTRL2_DATA_REG_TYPE_SEL (7)
+#define cASM_CTRL2_DATA_REG_TYPE_SEL_Shift_c (5)
+#define cASM_CTRL2_TSTPAS (1<<1)
+
+// CLK_OUT_CTRL bits
+#define cCLK_OUT_CTRL_EXTEND (1<<7)
+#define cCLK_OUT_CTRL_HIZ (1<<6)
+#define cCLK_OUT_CTRL_SR (1<<5)
+#define cCLK_OUT_CTRL_DS (1<<4)
+#define cCLK_OUT_CTRL_EN (1<<3)
+#define cCLK_OUT_CTRL_DIV (7)
+
+// PWR_MODES bits
+#define cPWR_MODES_XTAL_READY (1<<5)
+#define cPWR_MODES_XTALEN (1<<4)
+#define cPWR_MODES_ASM_CLK_EN (1<<3)
+#define cPWR_MODES_AUTODOZE (1<<1)
+#define cPWR_MODES_PMC_MODE (1<<0)
+
+// RX_FRAME_FILTER bits
+#define cRX_FRAME_FLT_FRM_VER (0xC0)
+#define cRX_FRAME_FLT_FRM_VER_Shift_c (6)
+#define cRX_FRAME_FLT_ACTIVE_PROMISCUOUS (1<<5)
+#define cRX_FRAME_FLT_NS_FT (1<<4)
+#define cRX_FRAME_FLT_CMD_FT (1<<3)
+#define cRX_FRAME_FLT_ACK_FT (1<<2)
+#define cRX_FRAME_FLT_DATA_FT (1<<1)
+#define cRX_FRAME_FLT_BEACON_FT (1<<0)
+
+typedef union regRX_FRAME_FILTER_tag{
+ uint8_t byte;
+ struct{
+ uint8_t FRAME_FLT_BEACON_FT:1;
+ uint8_t FRAME_FLT_DATA_FT:1;
+ uint8_t FRAME_FLT_ACK_FT:1;
+ uint8_t FRAME_FLT_CMD_FT:1;
+ uint8_t FRAME_FLT_NS_FT:1;
+ uint8_t FRAME_FLT_ACTIVE_PROMISCUOUS:1;
+ uint8_t FRAME_FLT_FRM_VER:2;
+ }bit;
+} regRX_FRAME_FILTER_t;
+
+// DUAL_PAN_CTRL bits
+#define cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_MSK (0xF0)
+#define cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_Shift_c (4)
+#define cDUAL_PAN_CTRL_CURRENT_NETWORK (1<<3)
+#define cDUAL_PAN_CTRL_PANCORDNTR1 (1<<2)
+#define cDUAL_PAN_CTRL_DUAL_PAN_AUTO (1<<1)
+#define cDUAL_PAN_CTRL_ACTIVE_NETWORK (1<<0)
+
+// DUAL_PAN_STS bits
+#define cDUAL_PAN_STS_RECD_ON_PAN1 (1<<7)
+#define cDUAL_PAN_STS_RECD_ON_PAN0 (1<<6)
+#define cDUAL_PAN_STS_DUAL_PAN_REMAIN (0x3F)
+
+// CCA_CTRL bits
+#define cCCA_CTRL_AGC_FRZ_EN (1<<6)
+#define cCCA_CTRL_CONT_RSSI_EN (1<<5)
+#define cCCA_CTRL_LQI_RSSI_NOT_CORR (1<<4)
+#define cCCA_CTRL_CCA3_AND_NOT_OR (1<<3)
+#define cCCA_CTRL_POWER_COMP_EN_LQI (1<<2)
+#define cCCA_CTRL_POWER_COMP_EN_ED (1<<1)
+#define cCCA_CTRL_POWER_COMP_EN_CCA1 (1<<0)
+
+// GPIO_DATA bits
+#define cGPIO_DATA_7 (1<<7)
+#define cGPIO_DATA_6 (1<<6)
+#define cGPIO_DATA_5 (1<<5)
+#define cGPIO_DATA_4 (1<<4)
+#define cGPIO_DATA_3 (1<<3)
+#define cGPIO_DATA_2 (1<<2)
+#define cGPIO_DATA_1 (1<<1)
+#define cGPIO_DATA_0 (1<<0)
+
+// GPIO_DIR bits
+#define cGPIO_DIR_7 (1<<7)
+#define cGPIO_DIR_6 (1<<6)
+#define cGPIO_DIR_5 (1<<5)
+#define cGPIO_DIR_4 (1<<4)
+#define cGPIO_DIR_3 (1<<3)
+#define cGPIO_DIR_2 (1<<2)
+#define cGPIO_DIR_1 (1<<1)
+#define cGPIO_DIR_0 (1<<0)
+
+// GPIO_PUL_EN bits
+#define cGPIO_PUL_EN_7 (1<<7)
+#define cGPIO_PUL_EN_6 (1<<6)
+#define cGPIO_PUL_EN_5 (1<<5)
+#define cGPIO_PUL_EN_4 (1<<4)
+#define cGPIO_PUL_EN_3 (1<<3)
+#define cGPIO_PUL_EN_2 (1<<2)
+#define cGPIO_PUL_EN_1 (1<<1)
+#define cGPIO_PUL_EN_0 (1<<0)
+
+// GPIO_PUL_SEL bits
+#define cGPIO_PUL_SEL_7 (1<<7)
+#define cGPIO_PUL_SEL_6 (1<<6)
+#define cGPIO_PUL_SEL_5 (1<<5)
+#define cGPIO_PUL_SEL_4 (1<<4)
+#define cGPIO_PUL_SEL_3 (1<<3)
+#define cGPIO_PUL_SEL_2 (1<<2)
+#define cGPIO_PUL_SEL_1 (1<<1)
+#define cGPIO_PUL_SEL_0 (1<<0)
+
+// GPIO_DS bits
+#define cGPIO_DS_7 (1<<7)
+#define cGPIO_DS_6 (1<<6)
+#define cGPIO_DS_5 (1<<5)
+#define cGPIO_DS_4 (1<<4)
+#define cGPIO_DS_3 (1<<3)
+#define cGPIO_DS_2 (1<<2)
+#define cGPIO_DS_1 (1<<1)
+#define cGPIO_DS_0 (1<<0)
+
+// SPI_CTRL bits
+//#define cSPI_CTRL_MISO_HIZ_EN (1<<1)
+//#define cSPI_CTRL_PB_PROTECT (1<<0)
+
+// ANT_PAD_CTRL bits
+#define cANT_PAD_CTRL_ANTX_POL (0x0F)
+#define cANT_PAD_CTRL_ANTX_POL_Shift_c (4)
+#define cANT_PAD_CTRL_ANTX_CTRLMODE (1<<3)
+#define cANT_PAD_CTRL_ANTX_HZ (1<<2)
+#define cANT_PAD_CTRL_ANTX_EN (3)
+
+// MISC_PAD_CTRL bits
+#define cMISC_PAD_CTRL_MISO_HIZ_EN (1<<3)
+#define cMISC_PAD_CTRL_IRQ_B_OD (1<<2)
+#define cMISC_PAD_CTRL_NON_GPIO_DS (1<<1)
+#define cMISC_PAD_CTRL_ANTX_CURR (1<<0)
+
+// ANT_AGC_CTRL bits
+#define cANT_AGC_CTRL_FAD_EN_Shift_c (0)
+#define cANT_AGC_CTRL_FAD_EN_Mask_c (1<<cANT_AGC_CTRL_FAD_EN_Shift_c)
+#define cANT_AGC_CTRL_ANTX_Shift_c (1)
+#define cANT_AGC_CTRL_ANTX_Mask_c (1<<cANT_AGC_CTRL_ANTX_Shift_c)
+
+// BSM_CTRL bits
+#define cBSM_CTRL_BSM_EN (1<<0)
+
+// SOFT_RESET bits
+#define cSOFT_RESET_SOG_RST (1<<7)
+#define cSOFT_RESET_REGS_RST (1<<4)
+#define cSOFT_RESET_PLL_RST (1<<3)
+#define cSOFT_RESET_TX_RST (1<<2)
+#define cSOFT_RESET_RX_RST (1<<1)
+#define cSOFT_RESET_SEQ_MGR_RST (1<<0)
+
+// SEQ_MGR_CTRL bits
+#define cSEQ_MGR_CTRL_SEQ_STATE_CTRL (3)
+#define cSEQ_MGR_CTRL_SEQ_STATE_CTRL_Shift_c (6)
+#define cSEQ_MGR_CTRL_NO_RX_RECYCLE (1<<5)
+#define cSEQ_MGR_CTRL_LATCH_PREAMBLE (1<<4)
+#define cSEQ_MGR_CTRL_EVENT_TMR_DO_NOT_LATCH (1<<3)
+#define cSEQ_MGR_CTRL_CLR_NEW_SEQ_INHIBIT (1<<2)
+#define cSEQ_MGR_CTRL_PSM_LOCK_DIS (1<<1)
+#define cSEQ_MGR_CTRL_PLL_ABORT_OVRD (1<<0)
+
+// SEQ_MGR_STS bits
+#define cSEQ_MGR_STS_TMR2_SEQ_TRIG_ARMED (1<<7)
+#define cSEQ_MGR_STS_RX_MODE (1<<6)
+#define cSEQ_MGR_STS_RX_TIMEOUT_PENDING (1<<5)
+#define cSEQ_MGR_STS_NEW_SEQ_INHIBIT (1<<4)
+#define cSEQ_MGR_STS_SEQ_IDLE (1<<3)
+#define cSEQ_MGR_STS_XCVSEQ_ACTUAL (7)
+
+// ABORT_STS bits
+#define cABORT_STS_PLL_ABORTED (1<<2)
+#define cABORT_STS_TC3_ABORTED (1<<1)
+#define cABORT_STS_SW_ABORTED (1<<0)
+
+// FILTERFAIL_CODE2 bits
+#define cFILTERFAIL_CODE2_PAN_SEL (1<<7)
+#define cFILTERFAIL_CODE2_9_8 (3)
+
+// PHY_STS bits
+#define cPHY_STS_PLL_UNLOCK (1<<7)
+#define cPHY_STS_PLL_LOCK_ERR (1<<6)
+#define cPHY_STS_PLL_LOCK (1<<5)
+#define cPHY_STS_CRCVALID (1<<3)
+#define cPHY_STS_FILTERFAIL_FLAG_SEL (1<<2)
+#define cPHY_STS_SFD_DET (1<<1)
+#define cPHY_STS_PREAMBLE_DET (1<<0)
+
+// TESTMODE_CTRL bits
+#define cTEST_MODE_CTRL_HOT_ANT (1<<4)
+#define cTEST_MODE_CTRL_IDEAL_RSSI_EN (1<<3)
+#define cTEST_MODE_CTRL_IDEAL_PFC_EN (1<<2)
+#define cTEST_MODE_CTRL_CONTINUOUS_EN (1<<1)
+#define cTEST_MODE_CTRL_FPGA_EN (1<<0)
+
+// DTM_CTRL1 bits
+#define cDTM_CTRL1_ATM_LOCKED (1<<7)
+#define cDTM_CTRL1_DTM_EN (1<<6)
+#define cDTM_CTRL1_PAGE5 (1<<5)
+#define cDTM_CTRL1_PAGE4 (1<<4)
+#define cDTM_CTRL1_PAGE3 (1<<3)
+#define cDTM_CTRL1_PAGE2 (1<<2)
+#define cDTM_CTRL1_PAGE1 (1<<1)
+#define cDTM_CTRL1_PAGE0 (1<<0)
+
+// TX_MODE_CTRL
+#define cTX_MODE_CTRL_TX_INV (1<<4)
+#define cTX_MODE_CTRL_BT_EN (1<<3)
+#define cTX_MODE_CTRL_DTS2 (1<<2)
+#define cTX_MODE_CTRL_DTS1 (1<<1)
+#define cTX_MODE_CTRL_DTS0 (1<<0)
+
+#define cTX_MODE_CTRL_DTS_MASK (7)
+
+// CLK_OUT_CTRL bits
+#define cCLK_OUT_EXTEND (1<<7)
+#define cCLK_OUT_HIZ (1<<6)
+#define cCLK_OUT_SR (1<<5)
+#define cCLK_OUT_DS (1<<4)
+#define cCLK_OUT_EN (1<<3)
+#define cCLK_OUT_DIV_Mask (7<<0)
+
+#define gCLK_OUT_FREQ_32_MHz (0)
+#define gCLK_OUT_FREQ_16_MHz (1)
+#define gCLK_OUT_FREQ_8_MHz (2)
+#define gCLK_OUT_FREQ_4_MHz (3)
+#define gCLK_OUT_FREQ_1_MHz (4)
+#define gCLK_OUT_FREQ_250_KHz (5)
+#define gCLK_OUT_FREQ_62_5_KHz (6)
+#define gCLK_OUT_FREQ_32_78_KHz (7)
+#define gCLK_OUT_FREQ_DISABLE (8)
+
+
+
+
+#endif /* __MCR20_REG_H__ */
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/MCR20Drv/XcvrSpi.cpp Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,159 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file XcvrSpi.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/*****************************************************************************
+* INCLUDED HEADERS *
+*---------------------------------------------------------------------------*
+* Add to this section all the headers that this module needs to include. *
+* Note that it is not a good practice to include header files into header *
+* files, so use this section only if there is no other better solution. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+#include "mbed.h"
+#include "EmbeddedTypes.h"
+
+#if defined(TARGET_K64F)
+ SPI spi(PTD2, PTD3, PTD1);
+#elif defined(TARGET_NUCLEO_F401RE)
+ SPI spi(SPI_MOSI, SPI_MISO, SPI_SCK);
+#else
+ "SPI not defined for this platform"
+#endif
+
+DigitalOut RF_CS(D10);
+DigitalOut RF_RST(D5);
+DigitalOut RF_SLP_TR(D7); // Not used in FSL
+InterruptIn RF_IRQ (D2); // FSL //(D9); // Atmel Radio
+DigitalIn RF_IRQ_PIN (D2);
+
+extern "C" void PHY_InterruptHandler(void);
+
+extern "C" void RF_IRQ_Init(void) {
+ RF_IRQ.mode(PullUp);
+ RF_IRQ.fall(&PHY_InterruptHandler);
+}
+
+extern "C" void RF_IRQ_Enable(void) {
+ RF_IRQ.enable_irq();
+}
+extern "C" void RF_IRQ_Disable(void) {
+ RF_IRQ.disable_irq();
+}
+
+extern "C" bool_t RF_isIRQ_Pending(void) {
+ return !RF_IRQ_PIN.read();
+}
+
+extern "C" void RF_RST_Set(int state) {
+ RF_RST = state;
+}
+
+extern "C" void RF_SLP_TR_Set(int state) {
+ RF_SLP_TR = state;
+}
+
+extern "C" void RF_CS_while_active(void) {
+
+ while(!RF_CS);
+}
+
+/*****************************************************************************
+* PRIVATE MACROS *
+*---------------------------------------------------------------------------*
+* Add to this section all the access macros, registers mappings, bit access *
+* macros, masks, flags etc ...
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*****************************************************************************/
+/*****************************************************************************/
+extern "C" void spi_master_init(uint32_t instance)
+{
+
+}
+
+/*****************************************************************************/
+/*****************************************************************************/
+extern "C" void spi_master_configure_speed(uint32_t instance, uint32_t freq)
+{
+ //spi.frequency(8000000);
+ spi.frequency(freq);
+}
+
+/*****************************************************************************/
+/*****************************************************************************/
+extern "C" void spi_master_transfer(uint32_t instance,
+ uint8_t * sendBuffer,
+ uint8_t * receiveBuffer,
+ size_t transferByteCount)
+{
+ volatile uint8_t dummy;
+
+ if( !transferByteCount )
+ return;
+
+ if( !sendBuffer && !receiveBuffer )
+ return;
+
+ while( transferByteCount-- )
+ {
+ if( sendBuffer )
+ {
+ dummy = *sendBuffer;
+ sendBuffer++;
+ }
+ else
+ {
+ dummy = 0xFF;
+ }
+
+ dummy = spi.write(dummy);
+
+ if( receiveBuffer )
+ {
+ *receiveBuffer = dummy;
+ receiveBuffer++;
+ }
+ }
+}
+
+extern "C" void gXcvrAssertCS_d(void)
+{
+ RF_CS = 0;
+}
+
+extern "C" void gXcvrDeassertCS_d(void)
+{
+ RF_CS = 1;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/IEEE802_14_5_PHY/MCR20Drv/XcvrSpi.h Fri Apr 03 05:23:33 2015 +0000 @@ -0,0 +1,89 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file XcvrSpi.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef __XCVR_SPI_H__ +#define __XCVR_SPI_H__ + + +/***************************************************************************** + * INCLUDED HEADERS * + *---------------------------------------------------------------------------* + * Add to this section all the headers that this module needs to include. * + * Note that it is not a good practice to include header files into header * + * files, so use this section only if there is no other better solution. * + *---------------------------------------------------------------------------* + *****************************************************************************/ + +#include "EmbeddedTypes.h" +//#include "board.h" + + +/***************************************************************************** + * PUBLIC MACROS * + *---------------------------------------------------------------------------* + * Add to this section all the access macros, registers mappings, bit access * + * macros, masks, flags etc ... + *---------------------------------------------------------------------------* + *****************************************************************************/ +//#define gXcvrAssertCS_d() GPIO_DRV_ClearPinOutput(kGpioXcvrSpiCsPin) +//#define gXcvrDeassertCS_d() GPIO_DRV_SetPinOutput(kGpioXcvrSpiCsPin) + +#define gXcvrSpiInstance_c 0 + +/***************************************************************************** + * PUBLIC FUNCTIONS * + *---------------------------------------------------------------------------* + * Add to this section all the global functions prototype preceded (as a * + * good practice) by the keyword 'extern' * + *---------------------------------------------------------------------------* + *****************************************************************************/ +void RF_RST_Set(int state); +void RF_SLP_TR_Set(int state); +void RF_CS_while_active(void); +void RF_CS_Set(int state); +void RF_IRQ_Init(void); +void RF_IRQ_Disable(void); +void RF_IRQ_Enable(void); +bool_t RF_isIRQ_Pending(void); + +void gXcvrAssertCS_d(void); +void gXcvrDeassertCS_d(void); + +void spi_master_init(uint32_t instance); +void spi_master_configure_speed(uint32_t instance, uint32_t freq); +void spi_master_transfer(uint32_t instance, + uint8_t * sendBuffer, + uint8_t * receiveBuffer, + uint32_t transferByteCount); + +#endif /* __XCVR_SPI_H__ */ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/MPM.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,555 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MPM.c
+* This is the source file for the Multiple PAN Manager.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+#include "MpmInterface.h"
+#include "Phy.h"
+
+#if 0
+#include "FunctionLib.h"
+#include "MemManager.h"
+#include "Panic.h"
+#endif
+
+#if gMpmIncluded_d
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+uint8_t mRegisteredPANs;
+bool_t mMpmExclusiveAccess;
+panInfo_t mPanInfo[gMpmMaxPANs_c];
+panInfo_t *pActivePANs[gMpmPhyPanRegSets_c];
+
+/************************************************************************************
+*************************************************************************************
+* Private functions prototypes
+*************************************************************************************
+************************************************************************************/
+static void MPM_SetPanSettingsInPhy( uint8_t panIndex );
+static uint8_t MPM_AllocateResource( bool_t force, uint8_t panIdx );
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief This function determines the instance of the MAC associated with a PHY regSet
+*
+* \param[in] regSet The PHY registry set
+*
+* \return The instance of the MAC associated with a PHY registry set.
+*
+********************************************************************************** */
+uint32_t MPM_GetMacInstanceFromRegSet(uint32_t regSet)
+{
+ if( pActivePANs[regSet] )
+ return pActivePANs[regSet]->macInstance;
+
+ return 0;
+}
+
+/*! *********************************************************************************
+* \brief This function determines the PHY regSet for the specified panIndex
+*
+* \param[in] panIdx The index in mPanInfo[] table
+*
+* \return The PHY registry set.
+*
+********************************************************************************** */
+uint32_t MPM_GetRegSet( uint8_t panIdx )
+{
+ return mPanInfo[panIdx].phyRegSet;
+}
+
+/*! *********************************************************************************
+* \brief This function determines the PHY regSet for the specified panIndex
+*
+* \param[in] pibId The id of the PHY PIB
+* \param[in] pValue The value of the PHY PIB
+* \param[in] panIdx The index in mPanInfo[] table
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+phyStatus_t MPM_SetPIB(phyPibId_t pibId, void* pValue, uint8_t panIdx)
+{
+ switch(pibId)
+ {
+#if gMpmUseDifferentTxPwrLevel_c
+ case gPhyPibTransmitPower_c:
+ if( (*(uint8_t*)pValue < 3) || (*(uint8_t*)pValue > 31) )
+ {
+ return gPhyInvalidParameter_c;
+ }
+ mPanInfo[panIdx].pwrLevel = *(uint8_t*)pValue;
+ break;
+#endif
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ case gPhyPibCurrentChannel_c:
+ if( (*(uint8_t*)pValue < 11) || (*(uint8_t*)pValue > 26) )
+ {
+ return gPhyInvalidParameter_c;
+ }
+ mPanInfo[panIdx].channel = *(uint8_t*)pValue;
+ break;
+ case gPhyPibLongAddress_c:
+ mPanInfo[panIdx].longAddr = *(uint64_t*)pValue;
+ break;
+ case gPhyPibShortAddress_c:
+ mPanInfo[panIdx].shortAddr = *(uint16_t*)pValue;
+ break;
+ case gPhyPibPanId_c:
+ mPanInfo[panIdx].panId = *(uint16_t*)pValue;
+ break;
+ case gPhyPibPanCoordinator_c:
+ if( *(bool_t*)pValue )
+ mPanInfo[panIdx].flags |= gMpmFlagPanCoord_c;
+ else
+ mPanInfo[panIdx].flags &= ~gMpmFlagPanCoord_c;
+ break;
+#endif
+ case gPhyPibRxOnWhenIdle:
+ if( *(bool_t*)pValue )
+ mPanInfo[panIdx].flags |= gMpmFlagRxOnWhenIdle_c;
+ else
+ mPanInfo[panIdx].flags &= ~gMpmFlagRxOnWhenIdle_c;
+ break;
+ case gPhyPibPromiscuousMode_c:
+ if( *(bool_t*)pValue )
+ mPanInfo[panIdx].flags |= gMpmFlagPromiscuous_c;
+ else
+ mPanInfo[panIdx].flags &= ~gMpmFlagPromiscuous_c;
+ break;
+ default:
+ return gPhyUnsupportedAttribute_c;
+ }
+
+ return gPhySuccess_c;
+}
+
+phyStatus_t MPM_GetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx)
+{
+ switch(pibId)
+ {
+#if gMpmUseDifferentTxPwrLevel_c
+ case gPhyPibTransmitPower_c:
+ *(uint8_t*)pValue = mPanInfo[panIdx].pwrLevel;
+ break;
+#endif
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ case gPhyPibCurrentChannel_c:
+ *(uint8_t*)pValue = mPanInfo[panIdx].channel;
+ break;
+ case gPhyPibLongAddress_c:
+ *(uint64_t*)pValue = mPanInfo[panIdx].longAddr;
+ break;
+ case gPhyPibShortAddress_c:
+ *(uint16_t*)pValue = mPanInfo[panIdx].shortAddr;
+ break;
+ case gPhyPibPanId_c:
+ *(uint16_t*)pValue = mPanInfo[panIdx].panId;
+ break;
+ case gPhyPibPanCoordinator_c:
+ *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagPanCoord_c);
+ break;
+#endif
+ case gPhyPibRxOnWhenIdle:
+ *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagRxOnWhenIdle_c);
+ break;
+ case gPhyPibPromiscuousMode_c:
+ *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagPromiscuous_c);
+ break;
+ default:
+ return gPhyUnsupportedAttribute_c;
+ }
+
+ return gPhySuccess_c;
+}
+
+
+/*! *********************************************************************************
+* \brief This function initializes the MPM module.
+*
+* \param[in] None.
+*
+* \return None
+*
+********************************************************************************** */
+void MPM_Init( void )
+{
+ uint32_t i;
+
+ mRegisteredPANs = 0;
+ mMpmExclusiveAccess = FALSE;
+ FLib_MemSet( mPanInfo, 0x00, sizeof(mPanInfo) );
+ FLib_MemSet( pActivePANs, 0x00, sizeof(pActivePANs) );
+
+ for(i=0; i<gMpmMaxPANs_c; i++)
+ mPanInfo[i].phyRegSet = gMpmInvalidRegSet_c;
+
+ PhyPpSetDualPanDwell( ((mDefaultDualPanDwellPrescaller_c << mDualPanDwellPrescallerShift_c) & mDualPanDwellPrescallerMask_c) |
+ ((mDefaultDualPanDwellTime_c << mDualPanDwellTimeShift_c ) & mDualPanDwellTimeMask_c) );
+}
+
+/*! *********************************************************************************
+* \brief This function prepare the Radio for a TX/CCA/ED operation
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The status of the Operation
+*
+********************************************************************************** */
+phyStatus_t MPM_PrepareForTx( instanceId_t macInstance )
+{
+ uint8_t panIdx = MPM_GetPanIndex(macInstance);
+
+ if( TRUE == mMpmExclusiveAccess && mPanInfo[panIdx].locked <= 0 )
+ return gPhyChannelBusy_c;
+
+ /* Allocate HW Resources if necessary */
+ if( mPanInfo[panIdx].phyRegSet == gMpmInvalidRegSet_c )
+ {
+ if( gMpmInvalidRegSet_c == MPM_AllocateResource( TRUE, panIdx ) )
+ return gPhyChannelBusy_c;
+
+ MPM_SetPanSettingsInPhy( panIdx );
+ }
+
+ /* Disable DualPan Auto Mode, and select the Active PAN */
+ PhyPpSetDualPanAuto( FALSE );
+ PhyPpSetDualPanActiveNwk( mPanInfo[panIdx].phyRegSet );
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function checks if a PAN has the RxOnWhenIdle PIB set.
+* If an Rx needs to be started, it makes the propper settings in PHY.
+*
+* \param[in] None.
+*
+* \return phyStatus
+*
+********************************************************************************** */
+phyStatus_t MPM_PrepareForRx( instanceId_t macInstance )
+{
+ uint32_t i, count = 0;
+ uint32_t activePan;
+
+ if( gInvalidInstanceId_c != macInstance ) //Rx
+ {
+ i = MPM_GetPanIndex(macInstance);
+
+ if( !mMpmExclusiveAccess || mPanInfo[i].locked )
+ {
+ /* Allocate HW Resources if necessary */
+ if( mPanInfo[i].phyRegSet == gMpmInvalidRegSet_c )
+ {
+ if( gMpmInvalidRegSet_c == MPM_AllocateResource( TRUE, i ) )
+ return gPhyChannelBusy_c;
+
+ MPM_SetPanSettingsInPhy( i );
+ }
+
+ count++;
+ activePan = mPanInfo[i].phyRegSet;
+ }
+ }
+ else //RxOnWhenIdle
+ {
+ for( i=0; i<gMpmPhyPanRegSets_c; i++)
+ {
+ if( (NULL != pActivePANs[i]) &&
+ (pActivePANs[i]->flags & gMpmFlagRxOnWhenIdle_c) &&
+ ( !mMpmExclusiveAccess || pActivePANs[i]->locked ) )
+ {
+ activePan = i;
+ count++;
+ }
+ }
+ }
+
+ if( !count )
+ return gPhyChannelBusy_c;
+
+ /* Set the Active PAN and DualPan Auto mode if needed*/
+ PhyPpSetDualPanActiveNwk( activePan );
+ PhyPpSetDualPanAuto( count > 1 );
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function returns the PAN index for a MAC instance
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The PAN index or -1 if it was not found
+*
+********************************************************************************** */
+int32_t MPM_GetPanIndex( instanceId_t macInstance )
+{
+ uint32_t i;
+
+ /* Get PAN Index for the macInstance */
+ for( i=0; i<mRegisteredPANs; i++ )
+ {
+ if( mPanInfo[i].macInstance == macInstance )
+ return i;
+ }
+
+ /* The instance of the MAC is not registered!
+ * Register the current MAC instance if there is enough space.
+ */
+ if( mRegisteredPANs < gMpmMaxPANs_c )
+ {
+ mPanInfo[mRegisteredPANs].macInstance = macInstance;
+
+ /* Try to allocate HW resource */
+ mPanInfo[mRegisteredPANs].phyRegSet = MPM_AllocateResource( FALSE, i );
+ mRegisteredPANs++;
+ }
+ else
+ {
+ i = -1;
+ }
+
+ return i;
+}
+
+
+/*! *********************************************************************************
+* \brief This function configures the MPM module
+*
+* \param[in] pCfg pointer to a configuration structure
+*
+* \remarks
+* The Dual PAN dwell time prescaller values: 0-3
+* The Dual PAN dwell time values 0-63.
+* The (dwellTime+1) represents multiples of the prescaller time base.
+*
+********************************************************************************** */
+void MPM_SetConfig( mpmConfig_t *pCfg )
+{
+ PhyPpSetDualPanAuto ( FALSE );
+ PhyPpSetDualPanDwell( pCfg->dwellTime );
+ MPM_AllocateResource( TRUE, MPM_GetPanIndex(pCfg->activeMAC) );
+ PhyPpSetDualPanAuto ( pCfg->autoMode );
+ if( PhyIsIdleRx(0) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Radio_Phy_TimeRxTimeoutIndication(0);
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function returns the MPM configuration
+*
+* \param[in] pCfg pointer to a configuration structure
+*
+* \return None.
+*
+********************************************************************************** */
+void MPM_GetConfig( mpmConfig_t *pCfg )
+{
+ pCfg->dwellTime = PhyPpGetDualPanDwell();
+ pCfg->activeMAC = MPM_GetMacInstanceFromRegSet( PhyPpGetDualPanActiveNwk() );
+ pCfg->autoMode = PhyPpGetDualPanAuto();
+}
+#endif /* #if gMpmIncluded_d */
+
+/*! *********************************************************************************
+* \brief This function Acquires a PAN for exclusive access.
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The status of the operation
+*
+********************************************************************************** */
+phyStatus_t MPM_AcquirePAN( instanceId_t macInstance )
+{
+#if gMpmIncluded_d
+ int32_t panIndex = MPM_GetPanIndex(macInstance);
+
+ /* Check if another PAN is acquired */
+ if( TRUE == mMpmExclusiveAccess &&
+ mPanInfo[panIndex].locked <= 0 )
+ {
+ return gPhyBusy_c;
+ }
+
+ if( mPanInfo[panIndex].locked == 0 )
+ {
+ mMpmExclusiveAccess = TRUE;
+ if( PhyIsIdleRx(0) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Radio_Phy_TimeRxTimeoutIndication(0);
+ }
+ }
+
+ mPanInfo[panIndex].locked++;
+#endif
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function Releases a PAN that was Acquired
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The status of the operation
+*
+********************************************************************************** */
+phyStatus_t MPM_ReleasePAN( instanceId_t macInstance )
+{
+#if gMpmIncluded_d
+ uint8_t panIndex = MPM_GetPanIndex(macInstance);
+
+ mPanInfo[panIndex].locked--;
+ if( mPanInfo[panIndex].locked == 0 )
+ {
+ mMpmExclusiveAccess = FALSE;
+ if( PhyIsIdleRx(0) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Radio_Phy_TimeRxTimeoutIndication(0);
+ }
+ }
+#endif
+ return gPhySuccess_c;
+}
+
+/************************************************************************************
+*************************************************************************************
+* Private functions
+*************************************************************************************
+************************************************************************************/
+#if gMpmIncluded_d
+/*! *********************************************************************************
+* \brief This function alocates a registry set to a PAN.
+*
+* \param[in] force If this parameter is TRUE, then another PAN can be preempted.
+* \param[in] panIdx The index into the MPM database
+*
+* \return The register set allocated for the specified PAN.
+*
+********************************************************************************** */
+static uint8_t MPM_AllocateResource( bool_t force, uint8_t panIdx )
+{
+ uint32_t i, regSet = gMpmInvalidRegSet_c;
+
+ if( mPanInfo[panIdx].phyRegSet != gMpmInvalidRegSet_c )
+ return mPanInfo[panIdx].phyRegSet;
+
+ for( i=0; i<gMpmPhyPanRegSets_c; i++ )
+ {
+ if( NULL == pActivePANs[i] )
+ {
+ regSet = i;
+ break;
+ }
+ else if( (force) &&
+ (pActivePANs[i]->flags == 0) &&
+ (pActivePANs[i]->locked <= 0) )
+ {
+ regSet = i;
+ }
+ }
+
+ if( regSet != gMpmInvalidRegSet_c )
+ {
+ if( NULL != pActivePANs[regSet] )
+ {
+ pActivePANs[regSet]->phyRegSet = gMpmInvalidRegSet_c;
+ }
+
+ pActivePANs[regSet] = &mPanInfo[panIdx];
+ pActivePANs[regSet]->phyRegSet = regSet;
+ }
+
+ return regSet;
+}
+
+/*! *********************************************************************************
+* \brief This function will store PAN settings in PHY.
+*
+* \param[in] panIdx The index into the MPM database
+*
+* \return None.
+*
+* \remarks Function assumes that the PAN is active!
+*
+********************************************************************************** */
+static void MPM_SetPanSettingsInPhy( uint8_t panIndex )
+{
+ panInfo_t *pPAN = &mPanInfo[panIndex];
+
+#if gMpmUseDifferentTxPwrLevel_c
+ PhyPlmeSetPIBRequest(gPhyPibTransmitPower_c, pPAN->pwrLevel, pPAN->phyRegSet, 0 );
+#endif
+
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ PhyPlmeSetPIBRequest(gPhyPibPromiscuousMode_c, !!(pPAN->flags & gMpmFlagPromiscuous_c), pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibRxOnWhenIdle, !!(pPAN->flags & gMpmFlagRxOnWhenIdle_c), pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibPanCoordinator_c, !!(pPAN->flags & gMpmFlagPanCoord_c), pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibPanId_c, pPAN->panId, pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibShortAddress_c, pPAN->shortAddr, pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibLongAddress_c, pPAN->longAddr, pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibCurrentChannel_c, pPAN->channel, pPAN->phyRegSet, 0 );
+#else
+ (void)pPAN;
+#endif
+}
+#endif /* gMpmIncluded_d */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/MpmInterface.h Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,195 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MpmInterface.h
+* This is a header file for the Multiple PAN Manager.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __MPM_H__
+#define __MPM_H__
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+#include "PhyInterface.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/* The maximun number of MAC instances that can be registered.
+ * If set to 0, the MPM is disabled!
+ */
+#if !defined(gMpmMaxPANs_c)
+#define gMpmMaxPANs_c 1
+#endif
+
+#define gMpmIncluded_d (gMpmMaxPANs_c > 1)
+
+#define gMpmPhyPanRegSets_c (2)
+#define gMpmUseDifferentTxPwrLevel_c (0)
+#define gMpmAcquireIsBlocking_d (0)
+#define gMpmInvalidRegSet_c (gMpmPhyPanRegSets_c)
+
+/* Dual Pan Dwell settings
+ +-----------------+---------------------+
+ | PRESCALER | RANGE |
+ | bits [1:0] | bits [7:2] |
+ +------+----------+---------------------+
+ |value | timebase | min - max |
+ +------+----------+---------------------+
+ | 00 | 0.5 ms | 0.5 - 32 ms |
+ | 01 | 2.5 ms | 2.5 - 160 ms |
+ | 10 | 10 ms | 10 - 640 ms |
+ | 11 | 50 ms | 50 - 3.2 seconds |
+ +------+----------+---------------------+
+*/
+
+ /* Dwell Time prescaller (0 to 3) */
+ #define mDefaultDualPanDwellPrescaller_c (0x00) // 0,5 ms
+ #define mDualPanDwellPrescallerMask_c (0x03)
+ #define mDualPanDwellPrescallerShift_c (0)
+
+ /* Dwell Time value (0 to 63) */
+ #define mDefaultDualPanDwellTime_c (0x06)
+ #define mDualPanDwellTimeMask_c (0xFC)
+ #define mDualPanDwellTimeShift_c (2)
+
+
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ #error The number of PANs exceeds the number of HW registry sets! This feature is not supported yet.
+#endif
+
+/* MPM flags */
+#define gMpmFlagPanCoord_c (1 << 0)
+#define gMpmFlagPromiscuous_c (1 << 1)
+#define gMpmFlagRxOnWhenIdle_c (1 << 2)
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+
+typedef PACKED_STRUCT mpmConfig_tag{
+ bool_t autoMode;
+ uint8_t dwellTime;
+ uint8_t activeMAC;
+}mpmConfig_t;
+
+typedef union panFlags_tag{
+ uint16_t all;
+ struct{
+ uint16_t panCoordinator: 1;
+ uint16_t promiscuous: 1;
+ uint16_t rxOnWhenIdle: 1;
+ uint16_t reserved: 13;
+ };
+}panFlags_t;
+
+typedef struct panInfo_tag{
+ uint8_t flags;
+ uint8_t macInstance;
+ uint8_t phyRegSet;
+ int8_t locked;
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ uint64_t longAddr;
+ uint16_t shortAddr;
+ uint16_t panId;
+ uint8_t channel;
+#endif
+#if gMpmUseDifferentTxPwrLevel_c
+ uint8_t pwrLevel;
+#endif
+}panInfo_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+#if gMpmIncluded_d
+
+void MPM_Init( void );
+void MPM_SetConfig( mpmConfig_t *pCfg );
+void MPM_GetConfig( mpmConfig_t *pCfg );
+
+int32_t MPM_GetPanIndex( instanceId_t macInstance );
+uint32_t MPM_GetRegSet(uint8_t panIdx);
+uint32_t MPM_GetMacInstanceFromRegSet(uint32_t regSet);
+#define MPM_isPanActive( panIdx ) (MPM_GetRegSet(panIdx) != gMpmInvalidRegSet_c)
+
+phyStatus_t MPM_PrepareForTx( instanceId_t macInstance );
+phyStatus_t MPM_PrepareForRx( instanceId_t macInstance );
+phyStatus_t MPM_GetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx);
+phyStatus_t MPM_SetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx);
+
+#else /* #if gMpmIncluded_d */
+
+#define MPM_Init()
+#define MPM_SetConfig( prescaller, dwellTime )
+
+#define MPM_GetPanIndex( macInstance ) 0
+#define MPM_GetRegSet( panIdx ) 0
+#define MPM_GetMacInstanceFromRegSet( regSet ) 0
+#define MPM_isPanActive( panIdx ) 1
+
+#define MPM_PrepareForTx( macInstance ) gPhySuccess_c
+#define MPM_PrepareForRx( macInstance ) gPhySuccess_c
+#define MPM_GetPIB( pibId, pibValue, panIdx ) gPhySuccess_c
+#define MPM_SetPIB( pibId, pibValue, panIdx ) gPhySuccess_c
+
+#endif /* #if gMpmIncluded_d */
+
+phyStatus_t MPM_AcquirePAN( instanceId_t macInstance );
+phyStatus_t MPM_ReleasePAN( instanceId_t macInstance );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__MPM_H__ */
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/Phy.h Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,1121 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file Phy.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __PHY_H__
+#define __PHY_H__
+
+
+/*****************************************************************************
+ * INCLUDED HEADERS *
+ *---------------------------------------------------------------------------*
+ * Add to this section all the headers that this module needs to include. *
+ * Note that it is not a good practice to include header files into header *
+ * files, so use this section only if there is no other better solution. *
+ *---------------------------------------------------------------------------*
+ *****************************************************************************/
+
+#include "EmbeddedTypes.h"
+#include "PhyInterface.h"
+//#include "fsl_os_abstraction.h"
+
+/*****************************************************************************
+ * PUBLIC MACROS, DEFINITIONS *
+ *---------------------------------------------------------------------------*
+ * Add to this section all the access macros, registers mappings, bit access *
+ * macros, masks, flags etc ...
+ *---------------------------------------------------------------------------*
+ *****************************************************************************/
+
+ #ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef _DEBUG
+#ifdef gPHY_802_15_4g_d
+#define MAC_PHY_DEBUG
+#endif
+#endif
+
+#ifndef gSnifferCRCEnabled_d
+#define gSnifferCRCEnabled_d (0)
+#endif
+
+#ifndef gUseStandaloneCCABeforeTx_d
+#define gUseStandaloneCCABeforeTx_d (1)
+#endif
+
+#ifndef gUsePBTransferThereshold_d
+#define gUsePBTransferThereshold_d (0)
+#endif
+
+#ifndef gPhyRxRetryInterval_c
+#define gPhyRxRetryInterval_c (100) /* [symbols] */
+#endif
+
+#ifndef gPhyMsgQueueMax_c
+#define gPhyMsgQueueMax_c (10) /* [list entries] */
+#endif
+
+// PHY states
+enum {
+ gIdle_c,
+ gRX_c,
+ gTX_c,
+ gCCA_c,
+ gTR_c,
+ gCCCA_c,
+#ifdef gPHY_802_15_4g_d
+ gED_c
+#endif // gPHY_802_15_4g_d
+};
+
+// PHY channel state
+enum {
+ gChannelIdle_c,
+ gChannelBusy_c
+};
+
+// PANCORDNTR bit in PP
+enum {
+ gMacRole_DeviceOrCoord_c,
+ gMacRole_PanCoord_c
+};
+
+// Cca types
+enum {
+ gCcaED_c, // energy detect - CCA bit not active, not to be used for T and CCCA sequences
+ gCcaCCA_MODE1_c, // energy detect - CCA bit ACTIVE
+ gCcaCCA_MODE2_c, // 802.15.4 compliant signal detect - CCA bit ACTIVE
+ gCcaCCA_MODE3_c, //
+ gInvalidCcaType_c // illegal type
+};
+
+enum {
+ gNormalCca_c,
+ gContinuousCca_c
+};
+
+
+/*****************************************************************************
+* Public type definitions *
+*****************************************************************************/
+typedef struct macPhyInputQueue_tag
+{
+ uint32_t msgInIdx;
+ phyMessageHeader_t * pMsgIn[gPhyMsgQueueMax_c];
+} macPhyInputQueue_t;
+
+typedef struct Phy_PhyLocalStruct_tag
+{
+ PD_MAC_SapHandler_t PD_MAC_SapHandler;
+ PLME_MAC_SapHandler_t PLME_MAC_SapHandler;
+// event_t phyTaskEventId;
+// msgQueue_t macPhyInputQueue;
+ macPhyInputQueue_t macPhyInputQueue;
+ uint32_t maxFrameWaitTime;
+ volatile phyTxParams_t txParams;
+ union{
+ volatile phyRxParams_t rxParams;
+ volatile phyChannelParams_t channelParams;
+ };
+#ifdef gPHY_802_15_4g_d
+ volatile phyFlags_t flags;
+ phyTime_t startTime;
+ uint16_t phyUnavailableQueuePos;
+ uint16_t phyIndirectQueue[gPhyIndirectQueueSize_c];
+ uint16_t fcs;
+ uint8_t macPanID[2];
+ uint8_t macShortAddress[2];
+ uint8_t macLongAddress[8];
+#else
+ volatile uint8_t flags;
+#endif // gPHY_802_15_4g_d
+ uint8_t currentMacInstance;
+}Phy_PhyLocalStruct_t;
+
+
+/*****************************************************************************
+* Public macros *
+*****************************************************************************/
+
+#define PhyGetSeqState() PhyPpGetState()
+#define PhyPlmeForceTrxOffRequest() PhyAbort()
+
+
+/*****************************************************************************
+* Public prototypes *
+*****************************************************************************/
+
+// PHY Packet Processor
+
+/*---------------------------------------------------------------------------
+ * Name: PhyHwInit
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyHwInit
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPromiscuous
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetPromiscuous
+(
+ bool_t mode
+);
+
+/*---------------------------------------------------------------------------
+* Name: PhySetActivePromState()
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void PhySetActivePromiscuous
+(
+bool_t state
+);
+
+/*---------------------------------------------------------------------------
+* Name: PhyGetActivePromiscuous()
+* Description: -
+* Parameters: -
+* Return: - TRUE/FALSE
+*---------------------------------------------------------------------------*/
+bool_t PhyGetActivePromiscuous
+(
+void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPanId
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetPanId
+(
+ uint8_t *pPanId,
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetShortAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetShortAddr
+(
+ uint8_t *pShortAddr,
+ uint8_t pan
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetLongAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetLongAddr
+(
+ uint8_t *pLongAddr,
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetMacRole
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetMacRole
+(
+ bool_t macRole,
+ uint8_t pan
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsTxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsTxAckDataPending
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsRxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsRxAckDataPending
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetFpManually
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetFpManually
+(
+ bool_t FP
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsPollIndication
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsPollIndication
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetSAMState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetSAMState
+(
+ bool_t state
+);
+
+/*---------------------------------------------------------------------------
+ * Name: Phy_IndirectQueueChecksum
+ * Description: Function called to compute the checksum for a 16bit or 64bit address
+ * in the same way as the transceiver
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+#ifdef gPHY_802_15_4g_d
+uint16_t Phy_IndirectQueueChecksum
+(
+ bool_t addrType,
+ uint64_t address,
+ uint16_t panId
+);
+#endif // gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_IndirectQueueInsert
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_IndirectQueueInsert
+(
+ uint8_t index,
+ uint16_t checkSum,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_RemoveFromIndirect
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_RemoveFromIndirect
+(
+ uint8_t index,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetState
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhySetState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+#ifdef gPHY_802_15_4g_d
+void PhySetState
+(
+ uint8_t phyState
+);
+#endif //gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyAbort
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyAbort
+(
+ void
+);
+
+// PHY PLME & DATA primitives
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPdDataRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPdDataRequest
+(
+ pdDataReq_t *pTxPacket,
+ volatile phyRxParams_t *pRxParams,
+ volatile phyTxParams_t *pTxParams
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeRxRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeRxRequest
+(
+ phySlottedMode_t phyRxMode,
+ phyRxParams_t * pRxParams
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeCcaEdRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeCcaEdRequest
+(
+ phyCCAType_t ccaParam,
+ phyContCCAMode_t cccaMode
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetCurrentChannelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetCurrentChannelRequest
+(
+ uint8_t channel,
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetCurrentChannelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetCurrentChannelRequest
+(
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetPwrLevelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetPwrLevelRequest
+(
+ uint8_t pwrStep
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetPwrLevelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetPwrLevelRequest
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetPwrState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetPwrState
+(
+ uint8_t state
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetPIBRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetPIBRequest
+(
+ phyPibId_t pibId,
+ uint64_t pibValue,
+ uint8_t phyRegistrySet,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetPIBRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeGetPIBRequest
+(
+ phyPibId_t pibId,
+ uint64_t * pibValue,
+ uint8_t phyRegistrySet,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetCcaThreshold
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+
+phyStatus_t PhyPpSetCcaThreshold
+(
+ uint8_t ccaThreshold
+);
+
+// PHY Time
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetEventTrigger
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetEventTrigger
+(
+ phyTime_t startTime
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetEventTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetEventTimeout
+(
+ phyTime_t *pEndTime
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeGetEventTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint32_t PhyTimeGetEventTimeout( void );
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeReadClock
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeReadClock
+(
+ phyTime_t *pRetClk
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableEventTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableEventTimeout
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableEventTrigger
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableEventTrigger
+(
+ void
+);
+
+
+#ifdef gPHY_802_15_4g_d
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableRxTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableRxTimeout
+(
+ void
+);
+#endif // gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetWakeUpTime
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetWakeUpTime
+(
+ uint32_t *pWakeUpTime
+);
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeInitEventTimer
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeInitEventTimer
+(
+ uint32_t *pAbsTime
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeIsWakeUpTimeExpired
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyTimeIsWakeUpTimeExpired
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetWaitTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetWaitTimeout
+(
+ phyTime_t *pWaitTimeout
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableWaitTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableWaitTimeout
+(
+ void
+);
+
+// PHY ISR
+
+/*---------------------------------------------------------------------------
+ * Name: PHY_InstallIsr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PHY_InstallIsr
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PHY_InterruptHandler
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PHY_InterruptHandler
+(
+ void
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrPassRxParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrPassRxParams
+(
+ volatile phyRxParams_t * pRxParam
+);
+
+#ifdef gPHY_802_15_4g_d
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrPassRxParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPassTxParams
+(
+ pdDataReq_t *pTxParam
+);
+#endif // gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrPassTaskParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrPassTaskParams
+(
+ instanceId_t instanceId
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrTimeoutCleanup
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrTimeoutCleanup
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrSeqCleanup
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrSeqCleanup
+(
+ void
+);
+
+/*****************************************************************************
+* PhyGetRandomNo function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyGetRandomNo
+(
+ uint32_t *pRandomNo
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanAuto function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanAuto
+(
+ bool_t mode
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanAuto function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+bool_t PhyPpGetDualPanAuto
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanDwell function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanDwell
+(
+ uint8_t
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanDwell function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+uint8_t PhyPpGetDualPanDwell
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanRemain function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The remaining time until a channel switch will occure
+*****************************************************************************/
+uint8_t PhyPpGetDualPanRemain
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanSamLvl function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanSamLvl
+(
+ uint8_t
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanSamLvl function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The level at which the HW queue is split for the two PANs
+*****************************************************************************/
+uint8_t PhyPpGetDualPanSamLvl
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanSamLvl function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanActiveNwk
+(
+ uint8_t
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanActiveNwk function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The current NWK on which the PHY is operating
+*****************************************************************************/
+uint8_t PhyPpGetDualPanActiveNwk
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpGetPanOfRxPacket function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The PAN on which the packet was received (can be receiced on both PANs)
+*****************************************************************************/
+uint8_t PhyPpGetPanOfRxPacket
+(
+ void
+);
+
+#ifdef gPHY_802_15_4g_d
+/*---------------------------------------------------------------------------
+ * Name: PhyPpPassTaskParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpPassTaskParams
+(
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetCSLRxEnabled()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetCSLRxEnabled
+(
+ bool_t cslRx,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPib_SetCSLTxEnabled()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetCSLTxEnabled
+(
+ bool_t cslTx,
+ instanceId_t instanceId
+);
+#endif // gPHY_802_15_4g_d
+
+/*****************************************************************************
+* PhyGetLastRxLqiValue function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The LQI value for the last received packet
+*****************************************************************************/
+uint8_t PhyGetLastRxLqiValue(void);
+
+/*****************************************************************************
+* PhyGetLastRxRssiValue function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The RSSI value for the last received packet
+*****************************************************************************/
+uint8_t PhyGetLastRxRssiValue(void);
+
+/*****************************************************************************
+* PhyPlmeSetFADStateRequest function
+*
+* Interface assumptions: state
+*
+* Return Value: gPhySuccess
+*
+* Description: Enable the FAD function (FAD_EN bit)
+*****************************************************************************/
+uint8_t PhyPlmeSetFADStateRequest(bool_t state);
+
+/*****************************************************************************
+* PhyPlmeSetFADThresholdRequest function
+*
+* Interface assumptions: FADThreshold
+*
+* Return Value: gPhySuccess
+*
+* Description: Correlator threshold at which the FAD will select the antenna
+*****************************************************************************/
+uint8_t PhyPlmeSetFADThresholdRequest(uint8_t FADThreshold);
+
+uint8_t PhyPlmeSetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on);
+uint8_t PhyPlmeSetANTPadStrengthRequest(bool_t hiStrength);
+uint8_t PhyPlmeSetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx);
+
+/*****************************************************************************
+* PhyPlmeSetANTXStateRequest function
+*
+* Interface assumptions: state
+*
+* Return Value: gPhySuccess
+*
+* Description: ANTX_IN - FAD Antenna start when FAD_EN = 1 or antenna selected
+* when FAD_EN=0
+*****************************************************************************/
+uint8_t PhyPlmeSetANTXStateRequest(bool_t state);
+
+/*****************************************************************************
+* PhyPlmeGetANTXStateRequest function
+*
+* Interface assumptions: none
+*
+* Return Value: Chosen antenna by the FAD (FAD_EN = 1) or copy of ANTX_IN
+*
+* Description: Antenna selected in FAD of non-FAD mode
+*****************************************************************************/
+uint8_t PhyPlmeGetANTXStateRequest(void);
+
+/*****************************************************************************
+* PhyPlmeSetLQIModeRequest function
+*
+* Interface assumptions: none
+*
+* Return Value: gPhySuccess
+*
+* Description: Choose LQI Mode: 1 - LQI Based on RSSI,
+* 0 - LQI Based on Correlation Peaks
+*****************************************************************************/
+uint8_t PhyPlmeSetLQIModeRequest(uint8_t lqiMode);
+
+/*****************************************************************************
+* PhyPlmeGetRSSILevelRequest function
+*
+* Interface assumptions: none
+*
+* Return Value: RSSI level
+*
+* Description: Returns the RSSI level value, refreshed every 125us
+*****************************************************************************/
+uint8_t PhyPlmeGetRSSILevelRequest(void);
+
+#ifdef gPHY_802_15_4g_d
+/*****************************************************************************
+* PhyPlmeDataPassTaskParams function
+*
+* Interface assumptions: none
+*
+* Return Value:
+*
+* Description:
+*****************************************************************************/
+void PhyPlmeDataPassTaskParams(instanceId_t instanceId);
+#endif // gPHY_802_15_4g_d
+
+/*****************************************************************************
+* PhySetRxOnWhenIdle function
+*
+* Interface assumptions: none
+*
+* Return Value: None.
+*
+* Description: Informs the PHY if it should start an RX when entering IDLE or not
+*****************************************************************************/
+void PhyPlmeSetRxOnWhenIdle( bool_t state, instanceId_t instanceId );
+
+/*****************************************************************************
+* PhyPlmeSetFrameWaitTime function
+*
+* Interface assumptions: none
+*
+* Return Value: None.
+*
+* Description: Set the amount of time in symbols to wait for an data frame
+* after receiving an ACK with FP=1
+*****************************************************************************/
+void PhyPlmeSetFrameWaitTime( uint32_t time, instanceId_t instanceId );
+
+/*****************************************************************************
+* Phy_SetSequenceTiming function
+*
+* Interface assumptions: none
+*
+* Return Value: None.
+*
+* Description:
+*
+*****************************************************************************/
+#ifndef gPHY_802_15_4g_d
+void Phy_SetSequenceTiming(phyTime_t startTime, uint32_t seqDuration);
+#else
+void Phy_SetSequenceTiming(phyTime_t startTime, uint32_t seqDuration, uint8_t nextState, instanceId_t instanceId);
+void Phy_SetRxTiming(uint32_t seqDuration, uint8_t nextState, instanceId_t instanceId);
+#endif // gPHY_802_15_4g_d
+
+uint8_t Phy_GetEnergyLevel(uint8_t energyLeveldB);
+
+// RADIO EVENTS
+
+void Radio_Phy_PdDataConfirm(instanceId_t instanceId, bool_t framePending);
+
+void Radio_Phy_TimeWaitTimeoutIndication(instanceId_t instanceId);
+
+void Radio_Phy_TimeRxTimeoutIndication(instanceId_t instanceId);
+
+void Radio_Phy_PdDataIndication(instanceId_t instanceId);
+
+void Radio_Phy_TimeStartEventIndication(instanceId_t instanceId);
+
+void Radio_Phy_PlmeCcaConfirm(phyStatus_t phyChannelStatus, instanceId_t instanceId);
+
+void Radio_Phy_PlmeEdConfirm(uint8_t energyLeveldB, instanceId_t instanceId);
+
+void Radio_Phy_PlmeSyncLossIndication(instanceId_t instanceId);
+
+void Radio_Phy_PlmeRxSfdDetect(instanceId_t instanceId, uint32_t param);
+
+void Radio_Phy_PlmeFilterFailRx(instanceId_t instanceId);
+
+#ifdef gPHY_802_15_4g_d
+void Radio_Phy_WaitTurnaround(instanceId_t instanceId);
+void Radio_Phy_WaitTurnaroundComplete(instanceId_t instanceId);
+#endif
+
+void Radio_Phy_UnexpectedTransceiverReset(instanceId_t instanceId);
+
+void Radio_Phy_DummyEvent(instanceId_t instanceId);
+
+bool_t PhyIsIdleRx( instanceId_t instanceId );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PHY_H__ */
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/IEEE802_14_5_PHY/PhyConfig.h Fri Apr 03 05:23:33 2015 +0000 @@ -0,0 +1,65 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file PhyConfig.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _PHY_CONFIG_H_ +#define _PHY_CONFIG_H_ + +#ifndef gAspCapability_d +#define gAspCapability_d 1 +#endif + +#ifndef gMaxPhyTimers_c +#define gMaxPhyTimers_c 10 +#endif + +#ifndef gMpmMaxPANs_c +#define gMpmMaxPANs_c 1 +#endif + +#ifndef gPhyInstancesCnt_c +#define gPhyInstancesCnt_c 1 +#endif + +#ifndef gPhyTaskStackSize_c +#define gPhyTaskStackSize_c 600 +#endif + +#ifndef gPhyTaskPriority_c +#define gPhyTaskPriority_c OSA_PRIORITY_REAL_TIME +#endif + +#ifndef gAfcEnabled_d +#define gAfcEnabled_d 0 +#endif + +#endif //_PHY_CONFIG_H_ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/PhyDebug.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,138 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyDebug.c
+* MCR20: PHY debug and logging functions
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Includes
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "PortConfig.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+#include "PhyDebug.h"
+
+
+#ifdef MAC_PHY_DEBUG
+
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+
+uint16_t nDebugIndex = 0, nDebugSize = DEBUG_LOG_ENTRIES * 4;
+uint8_t nDebugStorage[DEBUG_LOG_ENTRIES * 4];
+
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+void PhyDebugLogTime(uint8_t item)
+{
+ uint32_t time;
+ nDebugStorage[nDebugIndex + 0] = item;
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) EVENT_TMR_LSB, (uint8_t *) &time, 3);
+
+ nDebugStorage[nDebugIndex + 3] = (uint8_t) (time >> 0);
+ nDebugStorage[nDebugIndex + 2] = (uint8_t) (time >> 8);
+ nDebugStorage[nDebugIndex + 1] = (uint8_t) (time >> 16);
+
+ nDebugIndex += 4;
+ if(nDebugIndex >= nDebugSize)
+ {
+ nDebugIndex = 0;
+ }
+}
+
+/***********************************************************************************/
+
+void PhyDebugLogParam1(uint8_t item, uint8_t param1)
+{
+ nDebugStorage[nDebugIndex + 0] = item;
+ nDebugStorage[nDebugIndex + 1] = param1;
+ nDebugStorage[nDebugIndex + 2] = 0;
+ nDebugStorage[nDebugIndex + 3] = 0;
+
+ nDebugIndex += 4;
+ if(nDebugIndex >= nDebugSize)
+ {
+ nDebugIndex = 0;
+ }
+}
+
+/***********************************************************************************/
+
+void PhyDebugLogParam2(uint8_t item, uint8_t param1, uint8_t param2)
+{
+ nDebugStorage[nDebugIndex + 0] = item;
+ nDebugStorage[nDebugIndex + 1] = param1;
+ nDebugStorage[nDebugIndex + 2] = param2;
+ nDebugStorage[nDebugIndex + 3] = 0;
+
+ nDebugIndex += 4;
+ if(nDebugIndex >= nDebugSize)
+ {
+ nDebugIndex = 0;
+ }
+}
+
+/***********************************************************************************/
+
+void PhyDebugLogParam3(uint8_t item, uint8_t param1, uint8_t param2, uint8_t param3)
+{
+ nDebugStorage[nDebugIndex + 0] = item;
+ nDebugStorage[nDebugIndex + 1] = param1;
+ nDebugStorage[nDebugIndex + 2] = param2;
+ nDebugStorage[nDebugIndex + 3] = param3;
+
+ nDebugIndex += 4;
+ if(nDebugIndex >= nDebugSize)
+ {
+ nDebugIndex = 0;
+ }
+}
+
+/***********************************************************************************/
+
+#endif /* MAC_PHY_DEBUG */
+
+
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/PhyDebug.h Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,146 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyDebug.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _PHY_DEBUG_H_
+#define _PHY_DEBUG_H_
+
+
+/************************************************************************************
+*************************************************************************************
+* Includes
+*************************************************************************************
+************************************************************************************/
+//#include "MacPhyDebug.h"
+
+
+// a value of zero disables the logging of that event
+#define PDBG_SET_EVENT_TRIGGER 0x01 // 2 parameters
+#define PDBG_SET_EVENT_TIMEOUT 0x02 // 3 parameters
+#define PDBG_DISABLE_EVENT_TIMEOUT 0x03
+#define PDBG_READ_CLOCK 0x04
+#define PDBG_INIT_EVENT_TIMER 0
+
+#define PDBG_WTRMRK_VECT_INTERRUPT 0x06
+#define PDBG_TIMERS_VECT_INTERRUPT 0x07
+#define PDBG_TX_VECT_INTERRUPT 0x08
+#define PDBG_RX_VECT_INTERRUPT 0x09
+
+#define PDBG_CCA_CONFIRM_IDLE 0x0A
+#define PDBG_CCA_CONFIRM_BUSY 0x0B
+#define PDBG_DATA_CONFIRM 0x0C
+#define PDBG_DATA_INDICATION 0x0D
+#define PDBG_ED_CONFIRM 0x0E
+#define PDBG_SYNC_LOSS_INDICATION 0x0F
+
+#define PDBG_UNLOCK_IRQ 0x10
+#define PDBG_WTRMARK_IRQ 0x11
+#define PDBG_START_INDICATION 0x12
+#define PDBG_TIMEOUT_INDICATION 0x13
+#define PDBG_TMR1_IRQ 0x14
+#define PDBG_TMR4_IRQ 0x15
+#define PDBG_FILTER_FAIL_IRQ 0x16
+#define PDBG_TX_IRQ 0x17
+#define PDBG_RX_IRQ 0x18 // 1 parameter
+#define PDBG_CCA_IRQ 0x19
+#define PDBG_SEQ_IRQ 0x1A // 1 parameter
+
+#define PDBG_PHY_INIT 0x20
+#define PDBG_PHY_ABORT 0x21
+#define PDBG_PP_SET_PROMISC 0
+#define PDBG_PP_SET_PANID_PAN0 0x23
+#define PDBG_PP_SET_SHORTADDR_PAN0 0x24
+#define PDBG_PP_SET_LONGADDR_PAN0 0x25
+#define PDBG_PP_SET_MACROLE_PAN0 0x26
+#define PDBG_PP_ADD_INDIRECT 0x27 // 1 parameter
+#define PDBG_PP_REMOVE_INDIRECT 0x28 // 1 parameter
+#define PDBG_PP_READ_LATEST_INDEX 0x29 // 1 parameter
+
+#define PDBG_DATA_REQUEST 0x30
+#define PDBG_PLME_RX_REQUEST 0x31
+#define PDBG_PLME_CCA_ED_REQUEST 0x32
+#define PDBG_PLME_SET_CHAN_REQUEST 0x33
+#define PDBG_PLME_SET_POWER_REQUEST 0x34
+#define PDBG_PLME_WAIT_REQUEST 0x35
+
+#define PDBG_PP_SET_PANID_PAN1 0x36
+#define PDBG_PP_SET_SHORTADDR_PAN1 0x37
+#define PDBG_PP_SET_LONGADDR_PAN1 0x38
+#define PDBG_PP_SET_MACROLE_PAN1 0x39
+
+//simple events - without timestamp
+//***** PDBG_MAC_FUNCTION_CALL PDBG_SIMPLE_EVENT // 3 parameters
+#define PDBG_READ_FSM PDBG_SIMPLE_EVENT + 0x01 // 1 parameter
+#define PDBG_FILTER_FAIL_CODE PDBG_SIMPLE_EVENT + 0x02 // 2 parameters
+
+
+#ifdef MAC_PHY_DEBUG
+
+#define DEBUG_LOG_ENTRIES 768
+
+#define PHY_DEBUG_LOG(item) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(item);}
+#define PHY_DEBUG_LOG1(item,param) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(PDBG_EXTENDED_EVENT | item);PhyDebugLogParam1(item,param);}
+#define PHY_DEBUG_LOG2(item,param1,param2) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(PDBG_EXTENDED_EVENT | item);PhyDebugLogParam2(item,param1,param2);}
+#define PHY_DEBUG_LOG3(item,param1,param2,param3) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(PDBG_EXTENDED_EVENT | item);PhyDebugLogParam3(item,param1,param2,param3);}
+
+#define PHY_DEBUG_LOG_SIMPLE1(item,param) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogParam1(item,param);}
+#define PHY_DEBUG_LOG_SIMPLE2(item,param1,param2) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogParam2(item,param1,param2);}
+#define PHY_DEBUG_LOG_SIMPLE3(item,param1,param2,param3) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogParam3(item,param1,param2,param3);}
+
+void PhyUnexpectedTransceiverReset(void);
+
+void PhyDebugLogTime(uint8_t item);
+void PhyDebugLogParam1(uint8_t item, uint8_t param1);
+void PhyDebugLogParam2(uint8_t item, uint8_t param1, uint8_t param2);
+void PhyDebugLogParam3(uint8_t item, uint8_t param1, uint8_t param2, uint8_t param3);
+
+
+#else /* not def MAC_PHY_DEBUG */
+
+#define PhyUnexpectedTransceiverReset()
+
+#define PHY_DEBUG_LOG(item)
+#define PHY_DEBUG_LOG1(item,param)
+#define PHY_DEBUG_LOG2(item,param1,param2)
+#define PHY_DEBUG_LOG3(item,param1,param2,param3)
+
+#define PHY_DEBUG_LOG_SIMPLE1(item,param)
+#define PHY_DEBUG_LOG_SIMPLE2(item,param1,param2)
+#define PHY_DEBUG_LOG_SIMPLE3(item,param1,param2,param3)
+
+#endif /* MAC_PHY_DEBUG */
+
+
+#endif /* _PHY_DEBUG_H_ */
+
+
+
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/PhyISR.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,565 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyISR.c
+* PHY ISR Functions
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+//#include "board.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+#include "PhyInterface.h"
+//#include "Gpio_IrqAdapter.h"
+
+//#include "fsl_os_abstraction.h"
+
+#include "XcvrSpi.h"
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#if defined(MCU_MKL46Z4)
+ #define MCR20_Irq_Priority (0xC0)
+#else
+ #define MCR20_Irq_Priority (0x80)
+#endif
+
+#define PHY_IRQSTS1_INDEX_c 0x00
+#define PHY_IRQSTS2_INDEX_c 0x01
+#define PHY_IRQSTS3_INDEX_c 0x02
+#define PHY_CTRL1_INDEX_c 0x03
+#define PHY_CTRL2_INDEX_c 0x04
+#define PHY_CTRL3_INDEX_c 0x05
+#define PHY_RX_FRM_LEN_INDEX_c 0x06
+#define PHY_CTRL4_INDEX_c 0x07
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+extern Phy_PhyLocalStruct_t phyLocal[];
+static volatile phyRxParams_t * mpRxParams = NULL;
+static uint32_t mPhyTaskInstance;
+uint8_t mStatusAndControlRegs[8];
+uint8_t mPhyLastRxLQI = 0;
+uint8_t mPhyLastRxRSSI = 0;
+
+void (*gpfPhyPreprocessData)(uint8_t *pData) = NULL;
+
+#if gUsePBTransferThereshold_d
+static uint8_t mPhyWatermarkLevel;
+#define mPhyGetPBTransferThreshold(len) ((len) - 2)
+//#define mPhyGetPBTransferThreshold(len) ((len)*93/100)
+//#define mPhyGetPBTransferThreshold(len) (((len) < 20) ? ((len) - 2) : ((len) * 93 / 100))
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief Sets the current PHY instance waiting for an IRQ
+*
+* \param[in] instanceId instance of the PHY
+*
+********************************************************************************** */
+void PhyIsrPassTaskParams
+(
+ instanceId_t instanceId
+)
+{
+ mPhyTaskInstance = instanceId;
+}
+
+/*! *********************************************************************************
+* \brief Sets the location of the Rx parameters
+*
+* \param[in] pRxParam pointer to Rx parameters
+*
+********************************************************************************** */
+void PhyIsrPassRxParams
+(
+ volatile phyRxParams_t * pRxParam
+)
+{
+ mpRxParams = pRxParam;
+}
+
+/*! *********************************************************************************
+* \brief Clear and mask PHY IRQ, set sequence to Idle
+*
+********************************************************************************** */
+void PhyIsrSeqCleanup
+(
+ void
+)
+{
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= 0xF0;
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= (uint8_t) ~( cIRQSTS3_TMR3MSK ); // unmask TMR3 interrupt
+ mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_XCVSEQ );
+ mStatusAndControlRegs[PHY_CTRL2_INDEX_c] |= (uint8_t) ( cPHY_CTRL2_CCAMSK | \
+ cPHY_CTRL2_RXMSK | \
+ cPHY_CTRL2_TXMSK | \
+ cPHY_CTRL2_SEQMSK );
+
+ // clear transceiver interrupts, mask SEQ, RX, TX and CCA interrupts and set the PHY sequencer back to IDLE
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 5);
+}
+
+/*! *********************************************************************************
+* \brief Clear and mask PHY IRQ, disable timeout, set sequence to Idle
+*
+********************************************************************************** */
+void PhyIsrTimeoutCleanup
+(
+ void
+)
+{
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= 0xF0;
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] |= (uint8_t) ( cIRQSTS3_TMR3MSK | \
+ cIRQSTS3_TMR3IRQ); // mask and clear TMR3 interrupt
+ mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_XCVSEQ );
+ mStatusAndControlRegs[PHY_CTRL2_INDEX_c] |= (uint8_t) ( cPHY_CTRL2_CCAMSK | \
+ cPHY_CTRL2_RXMSK | \
+ cPHY_CTRL2_TXMSK | \
+ cPHY_CTRL2_SEQMSK );
+
+ // disable TMR3 comparator and timeout
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR3CMP_EN );
+ mStatusAndControlRegs[PHY_CTRL4_INDEX_c] &= (uint8_t) ~( cPHY_CTRL4_TC3TMOUT );
+
+ // clear transceiver interrupts, mask mask SEQ, RX, TX, TMR3 and CCA interrupts interrupts and set the PHY sequencer back to IDLE
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 8);
+}
+
+/*! *********************************************************************************
+* \brief Scales energy level to 0-255
+*
+* \param[in] energyLevel the energ level reported by HW
+*
+* \return uint8_t the energy level scaled in 0x00-0xFF
+*
+********************************************************************************** */
+uint8_t Phy_GetEnergyLevel
+(
+uint8_t energyLevel /* db */
+)
+{
+ if(energyLevel >= 90)
+ {
+ /* ED value is below minimum. Return 0x00. */
+ energyLevel = 0x00;
+ }
+ else if(energyLevel <= 26)
+ {
+ /* ED value is above maximum. Return 0xFF. */
+ energyLevel = 0xFF;
+ }
+ else
+ {
+ /* Energy level (-90 dBm to -26 dBm ) --> varies form 0 to 64 */
+ energyLevel = (90 - energyLevel);
+ /* Rescale the energy level values to the 0x00-0xff range (0 to 64 translates in 0 to 255) */
+ /* energyLevel * 3.9844 ~= 4 */
+ /* Multiply with 4=2^2 by shifting left.
+ The multiplication will not overflow beacause energyLevel has values between 0 and 63 */
+ energyLevel <<= 2;
+ }
+
+ return energyLevel;
+}
+
+/*! *********************************************************************************
+* \brief Scales LQI to 0-255
+*
+* \param[in] hwLqi the LQI reported by HW
+*
+* \return uint8_t the LQI scaled in 0x00-0xFF
+*
+********************************************************************************** */
+static uint8_t Phy_LqiConvert
+(
+uint8_t hwLqi
+)
+{
+ uint32_t tmpLQI;
+
+ /* LQI Saturation Level */
+ if (hwLqi >= 230)
+ {
+ return 0xFF;
+ }
+ else if (hwLqi <= 9)
+ {
+ return 0;
+ }
+ else
+ {
+ /* Rescale the LQI values from min to saturation to the 0x00 - 0xFF range */
+ /* The LQI value mst be multiplied by ~1.1087 */
+ /* tmpLQI = hwLqi * 7123 ~= hwLqi * 65536 * 0.1087 = hwLqi * 2^16 * 0.1087*/
+ tmpLQI = ((uint32_t)hwLqi * (uint32_t)7123 );
+ /* tmpLQI = (tmpLQI / 2^16) + hwLqi */
+ tmpLQI = (uint32_t)(tmpLQI >> 16) + (uint32_t)hwLqi;
+
+ return (uint8_t)tmpLQI;
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function returns the LQI for the las received packet
+*
+* \return uint8_t LQI value
+*
+********************************************************************************** */
+uint8_t PhyGetLastRxLqiValue(void)
+{
+ return mPhyLastRxLQI;
+}
+
+/*! *********************************************************************************
+* \brief This function returns the RSSI for the las received packet
+*
+* \return uint8_t RSSI value
+*
+********************************************************************************** */
+uint8_t PhyGetLastRxRssiValue(void)
+{
+ return mPhyLastRxRSSI;
+}
+
+/*! *********************************************************************************
+* \brief PHY ISR
+*
+********************************************************************************** */
+void PHY_InterruptHandler(void)
+{
+ uint8_t xcvseqCopy;
+
+ /* The ISR may be called even if another PORTx pin has changed */
+ //if( !PORT_HAL_IsPinIntPending(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)], GPIO_EXTRACT_PIN(kGpioXcvrIrqPin)) )
+ if( !RF_isIRQ_Pending() )
+ {
+ return;
+ }
+
+ /* Disable and clear transceiver(IRQ_B) interrupt */
+ MCR20Drv_IRQ_Disable();
+ MCR20Drv_IRQ_Clear();
+
+ /* Read transceiver interrupt status and control registers */
+ mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] =
+ MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &mStatusAndControlRegs[1], 7);
+ xcvseqCopy = mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_XCVSEQ;
+ /* clear transceiver interrupts */
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 3);
+
+ if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_WAKE_IRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL3_INDEX_c] & cPHY_CTRL3_WAKE_MSK) )
+ {
+#ifdef MAC_PHY_DEBUG
+ Radio_Phy_UnexpectedTransceiverReset(mPhyTaskInstance);
+#endif
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ /* Flter Fail IRQ */
+ if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_FILTERFAIL_IRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_FILTERFAIL_MSK) )
+ {
+#if gUsePBTransferThereshold_d
+ /* Reset the RX_WTR_MARK level since packet was dropped. */
+ mPhyWatermarkLevel = 0;
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
+#endif
+ Radio_Phy_PlmeFilterFailRx(mPhyTaskInstance);
+ }
+ /* Rx Watermark IRQ */
+ else if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RXWTRMRKIRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_RX_WMRK_MSK) )
+ {
+#if gUsePBTransferThereshold_d
+ if( 0 == mPhyWatermarkLevel )
+ {
+ /* Check if this is a standalone RX because we could end up here during a TR sequence also. */
+ if( xcvseqCopy == gRX_c )
+ {
+ /* Set the thereshold packet length at which to start the PB Burst Read.*/
+ mPhyWatermarkLevel = mPhyGetPBTransferThreshold( mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c] );
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
+ }
+#endif
+ Radio_Phy_PlmeRxSfdDetect(mPhyTaskInstance, mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]);
+#if gUsePBTransferThereshold_d
+ }
+ else
+ {
+ /* Reset RX_WTR_MARK here, because if the FCS fails, no other IRQ will arrive
+ * and the RX will restart automatically. */
+ mPhyWatermarkLevel = 0;
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
+
+ if( mpRxParams )
+ {
+ // Read data from PB
+ MCR20Drv_PB_SPIBurstRead(mpRxParams->pRxData->msgData.dataInd.pPsdu, (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c] - 2));
+ if( gpfPhyPreprocessData )
+ gpfPhyPreprocessData(mpRxParams->pRxData->msgData.dataInd.pPsdu);
+ }
+ }
+#endif
+ }
+
+ /* Timer 1 Compare Match */
+ if( (mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR1IRQ) &&
+ !(mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR1MSK))
+ {
+ // disable TMR1 comparator
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR1CMP_EN);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+
+ Radio_Phy_TimeWaitTimeoutIndication(mPhyTaskInstance);
+ }
+
+ /* Sequencer interrupt, the autosequence has completed */
+ if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_SEQIRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_SEQMSK) )
+ {
+ // PLL unlock, the autosequence has been aborted due to PLL unlock
+ if( mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_PLL_UNLOCK_IRQ )
+ {
+ PhyIsrSeqCleanup();
+ Radio_Phy_PlmeSyncLossIndication(mPhyTaskInstance);
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ // TMR3 timeout, the autosequence has been aborted due to TMR3 timeout
+ if( (mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR3IRQ) &&
+ !(mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RXIRQ) &&
+ (gTX_c != xcvseqCopy) )
+ {
+ PhyIsrTimeoutCleanup();
+
+ Radio_Phy_TimeRxTimeoutIndication(mPhyTaskInstance);
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ PhyIsrSeqCleanup();
+
+ switch(xcvseqCopy)
+ {
+ case gTX_c:
+ if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA) &&
+ (mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_CCABFRTX) )
+ {
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
+ }
+ else
+ {
+ Radio_Phy_PdDataConfirm(mPhyTaskInstance, FALSE);
+ }
+ break;
+
+ case gTR_c:
+ if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA) &&
+ (mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_CCABFRTX) )
+ {
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
+ }
+ else
+ {
+ if(NULL != mpRxParams)
+ {
+ // reports value of 0x00 for -105 dBm of received input power and 0xFF for 0 dBm of received input power
+ mPhyLastRxRSSI = MCR20Drv_DirectAccessSPIRead((uint8_t) LQI_VALUE);
+ mpRxParams->linkQuality = Phy_LqiConvert(mPhyLastRxRSSI);
+ mPhyLastRxLQI = mpRxParams->linkQuality;
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) TIMESTAMP_LSB, (uint8_t *)&mpRxParams->timeStamp, 3);
+ mpRxParams->psduLength = (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]); //Including FCS (2 bytes)
+ }
+ if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RX_FRM_PEND) == cIRQSTS1_RX_FRM_PEND )
+ {
+ Radio_Phy_PdDataConfirm(mPhyTaskInstance, TRUE);
+ }
+ else
+ {
+ Radio_Phy_PdDataConfirm(mPhyTaskInstance, FALSE);
+ }
+ }
+ break;
+
+ case gRX_c:
+ if( NULL != mpRxParams )
+ {
+ // reports value of 0x00 for -105 dBm of received input power and 0xFF for 0 dBm of received input power
+ mPhyLastRxRSSI = MCR20Drv_DirectAccessSPIRead((uint8_t) LQI_VALUE);
+ mpRxParams->linkQuality = Phy_LqiConvert(mPhyLastRxRSSI);
+ mPhyLastRxLQI = mpRxParams->linkQuality;
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) TIMESTAMP_LSB, (uint8_t *)&mpRxParams->timeStamp, 3);
+ mpRxParams->psduLength = (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]); //Including FCS (2 bytes)
+ }
+ Radio_Phy_PdDataIndication(mPhyTaskInstance);
+ break;
+
+ case gCCA_c:
+ if( (mStatusAndControlRegs[PHY_CTRL4_INDEX_c] & (cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c)) == (gCcaED_c << cPHY_CTRL4_CCATYPE_Shift_c) )
+ {
+ // Ed
+ Radio_Phy_PlmeEdConfirm(MCR20Drv_DirectAccessSPIRead((uint8_t) CCA1_ED_FNL), mPhyTaskInstance);
+ }
+ else
+ {
+ // CCA
+ if( mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA )
+ {
+#if (gUseStandaloneCCABeforeTx_d == 1)
+ phyLocal[mPhyTaskInstance].txParams.numOfCca = 0;
+#endif
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
+ }
+ else
+ {
+#if (gUseStandaloneCCABeforeTx_d == 1)
+ if( phyLocal[mPhyTaskInstance].txParams.numOfCca > 0 )
+ {
+ mStatusAndControlRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+
+ if( --phyLocal[mPhyTaskInstance].txParams.numOfCca == 0 )
+ {
+ // perform TxRxAck sequence if required by phyTxMode
+ if( gPhyRxAckRqd_c == phyLocal[mPhyTaskInstance].txParams.ackRequired )
+ {
+ mStatusAndControlRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_RXACKRQD);
+ mStatusAndControlRegs[PHY_CTRL1] |= gTR_c;
+ }
+ else
+ {
+ mStatusAndControlRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_RXACKRQD);
+ mStatusAndControlRegs[PHY_CTRL1] |= gTX_c;
+ }
+ }
+ else
+ {
+ mStatusAndControlRegs[PHY_CTRL1] |= gCCA_c;
+ }
+
+ mStatusAndControlRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+ // start the sequence immediately
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL1,
+ &mStatusAndControlRegs[PHY_CTRL1],
+ 2);
+ }
+ else
+#endif
+ {
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelIdle_c, mPhyTaskInstance);
+ }
+ }
+ }
+ break;
+
+ case gCCCA_c:
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelIdle_c, mPhyTaskInstance);
+ break;
+
+ default:
+ Radio_Phy_PlmeSyncLossIndication(mPhyTaskInstance);
+ break;
+ }
+ }
+ // timers interrupt
+ else
+ {
+ if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR2IRQ )
+ {
+ // disable TMR2 comparator and time triggered action
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR2CMP_EN);
+ mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_TMRTRIGEN);
+
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1_INDEX_c]);
+
+ Radio_Phy_TimeStartEventIndication(mPhyTaskInstance);
+ }
+
+ if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR3IRQ )
+ {
+ /* disable TMR3 comparator and timeout */
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR3CMP_EN);
+ mStatusAndControlRegs[PHY_CTRL4_INDEX_c] &= (uint8_t) ~( cPHY_CTRL4_TC3TMOUT);
+
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4_INDEX_c]);
+
+ /* Ensure that we're not issuing TimeoutIndication while the Automated sequence is still in progress */
+ /* TMR3 can expire during R-T turnaround for example, case in which the sequence is not interrupted */
+ if( gIdle_c == xcvseqCopy )
+ {
+ Radio_Phy_TimeRxTimeoutIndication(mPhyTaskInstance);
+ }
+ }
+
+ /* Timer 4 Compare Match */
+ if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR4IRQ )
+ {
+ /* disable TMR4 comparator */
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR4CMP_EN);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+ }
+ }
+
+ MCR20Drv_IRQ_Enable();
+}
+
+/*! *********************************************************************************
+* \brief This function installs the PHY ISR
+*
+********************************************************************************** */
+void PHY_InstallIsr( void )
+{
+ /*Initialise RF interrupt pin*/
+ RF_IRQ_Init();
+
+ //GpioInstallIsr(PHY_InterruptHandler, gGpioIsrPrioHigh_c, MCR20_Irq_Priority, kGpioXcvrIrqPin);
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/PhyInterface.h Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,353 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyInterface.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _PHY_INTERFACE_H
+#define _PHY_INTERFACE_H
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "PhyTypes.h"
+//#include "Messaging.h"
+#include "PhyConfig.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/* Constants */
+#ifndef gMaxPhyTimers_c
+#define gMaxPhyTimers_c (5)
+#endif
+
+#ifdef gPHY_802_15_4g_d
+#define gPhySeqStartAsap_c (0xFFFFFFFFFFFFFFFF)
+#else
+#define gPhySeqStartAsap_c (0xFFFFFFFF)
+#endif
+
+/* XCVR active/idle power modes */
+#define gPhyDefaultActivePwrMode_c gPhyPwrAutodoze_c /* Do not change! */
+#define gPhyDefaultIdlePwrMode_c gPhyPwrAutodoze_c
+
+/************************************************************************************
+*************************************************************************************
+* Public prototypes
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+
+typedef enum
+{
+#include "PhyMessages.h"
+}phyMessageId_t;
+
+typedef enum{
+ gPhyPwrIdle_c,
+ gPhyPwrAutodoze_c,
+ gPhyPwrDoze_c,
+ gPhyPwrHibernate_c,
+ gPhyPwrReset_c
+}phyPwrMode_t;
+
+typedef struct pdDataReq_tag
+{
+ phyTime_t startTime; // absolute
+ uint32_t txDuration; // relative
+ phySlottedMode_t slottedTx;
+ phyCCAType_t CCABeforeTx;
+ phyAckRequired_t ackRequired;
+ uint8_t psduLength;
+#ifdef gPHY_802_15_4g_d
+ phyPHR_t phyHeader;
+ uint8_t macDataIndex;
+ uint8_t fillFifoBlockLength;
+#endif // gPHY_802_15_4g_d
+ uint8_t * pPsdu;
+} pdDataReq_t;
+
+typedef struct pdDataCnf_tag
+{
+ phyStatus_t status;
+} pdDataCnf_t;
+
+typedef struct pdDataInd_tag
+{
+ phyTimeTimestamp_t timeStamp;
+ uint8_t ppduLinkQuality;
+ uint8_t psduLength;
+ uint8_t * pPsdu;
+#ifdef gPHY_802_15_4g_d
+ uint32_t crcValue;
+ bool_t crcValid;
+#endif
+} pdDataInd_t;
+
+typedef struct pdIndQueueInsertReq_tag
+{
+ uint8_t index;
+ uint16_t checksum;
+} pdIndQueueInsertReq_t;
+
+typedef struct pdIndQueueInsertCnf_tag
+{
+ phyStatus_t status;
+} pdIndQueueInsertCnf_t;
+
+typedef struct pdIndQueueRemoveReq_tag
+{
+ uint8_t index;
+} pdIndQueueRemoveReq_t;
+
+typedef struct plmeEdReq_tag
+{
+ phyTime_t startTime; // absolute
+} plmeEdReq_t;
+
+typedef struct plmeCcaReq_tag
+{
+ phyCCAType_t ccaType;
+ phyContCCAMode_t contCcaMode;
+} plmeCcaReq_t;
+
+typedef struct plmeCcaCnf_tag
+{
+ phyStatus_t status;
+} plmeCcaCnf_t;
+
+typedef struct plmeEdCnf_tag
+{
+ phyStatus_t status;
+ uint8_t energyLevel;
+ uint8_t energyLeveldB;
+} plmeEdCnf_t;
+
+typedef struct plmeSetTRxStateReq_tag
+{
+ phyState_t state;
+ phySlottedMode_t slottedMode;
+ phyTime_t startTime; // absolute
+ uint32_t rxDuration; // relative
+} plmeSetTRxStateReq_t;
+
+typedef struct phyTimeEvent_tag
+{
+ phyTimeTimestamp_t timestamp; // absolute
+ phyTimeCallback_t callback;
+ uint32_t parameter;
+}phyTimeEvent_t;
+
+typedef struct plmeSetTRxStateCnf_tag
+{
+ phyStatus_t status;
+} plmeSetTRxStateCnf_t;
+
+typedef struct plmeSetReq_tag
+{
+ phyPibId_t PibAttribute;
+ uint64_t PibAttributeValue;
+} plmeSetReq_t;
+
+typedef struct plmeSetCnf_tag
+{
+ phyStatus_t status;
+ phyPibId_t PibAttribute;
+} plmeSetCnf_t;
+
+typedef struct plmeGetReq_tag
+{
+ phyPibId_t PibAttribute;
+ uint64_t * pPibAttributeValue;
+} plmeGetReq_t;
+
+typedef struct plmeGetCnf_tag
+{
+ phyStatus_t status;
+ phyPibId_t PibAttribute;
+ uint64_t PibAttributeValue;
+} plmeGetCnf_t;
+
+typedef struct macToPlmeMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ plmeEdReq_t edReq;
+ plmeCcaReq_t ccaReq;
+ plmeSetTRxStateReq_t setTRxStateReq;
+ plmeSetReq_t setReq;
+ plmeGetReq_t getReq;
+ }msgData;
+} macToPlmeMessage_t;
+
+typedef struct macToPdDataMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ pdDataReq_t dataReq;
+ pdIndQueueInsertReq_t indQueueInsertReq;
+ pdIndQueueRemoveReq_t indQueueRemoveReq;
+ }msgData;
+} macToPdDataMessage_t;
+
+typedef struct plmeToMacMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ plmeCcaCnf_t ccaCnf;
+ plmeEdCnf_t edCnf;
+ plmeSetTRxStateCnf_t setTRxStateCnf;
+ plmeSetCnf_t setCnf;
+ plmeGetCnf_t getCnf;
+ }msgData;
+} plmeToMacMessage_t;
+
+typedef struct pdDataToMacMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ pdDataCnf_t dataCnf;
+ pdDataInd_t dataInd;
+ pdIndQueueInsertCnf_t indQueueInsertCnf;
+ }msgData;
+} pdDataToMacMessage_t;
+
+typedef struct phyMessageHeader_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+} phyMessageHeader_t;
+
+typedef struct phyRxParams_tag {
+ phyTime_t timeStamp;
+ uint8_t psduLength;
+ uint8_t linkQuality;
+#ifdef gPHY_802_15_4g_d
+ uint8_t headerLength;
+ uint8_t macDataIndex;
+ uint8_t unfillFifoBlockLength;
+ phyPHR_t phyHeader;
+#else
+ phySlottedMode_t phyRxMode;
+ pdDataToMacMessage_t *pRxData;
+#endif // gPHY_802_15_4g_d
+} phyRxParams_t;
+
+typedef struct phyChannelParams_tag {
+ union{
+ phyStatus_t channelStatus;
+ uint8_t energyLeveldB;
+ };
+#ifdef gPHY_802_15_4g_d
+ uint8_t ccaThreshold;
+ uint8_t ccaParam;
+#endif // gPHY_802_15_4g_d
+} phyChannelParams_t;
+
+typedef struct phyTxParams_tag {
+ uint8_t numOfCca;
+ phyAckRequired_t ackRequired;
+} phyTxParams_t;
+
+typedef phyStatus_t ( * PD_MAC_SapHandler_t)(pdDataToMacMessage_t * pMsg, instanceId_t instanceId);
+
+typedef phyStatus_t ( * PLME_MAC_SapHandler_t)(plmeToMacMessage_t * pMsg, instanceId_t instanceId);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+extern const uint8_t gPhyIndirectQueueSize_c;
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+void Phy_Init( void );
+
+instanceId_t BindToPHY( instanceId_t macInstance );
+
+// SAPs
+void Phy_RegisterSapHandlers(PD_MAC_SapHandler_t pPD_MAC_SapHandler, PLME_MAC_SapHandler_t pPLME_MAC_SapHandler, instanceId_t instanceId);
+
+phyStatus_t MAC_PD_SapHandler(macToPdDataMessage_t * pMsg, instanceId_t phyInstance);
+
+phyStatus_t MAC_PLME_SapHandler(macToPlmeMessage_t * pMsg, instanceId_t phyInstance);
+
+// PHY Time
+void PhyTime_Maintenance ( void );
+
+void PhyTime_RunCallback ( void );
+
+void PhyTime_ISR ( void );
+
+phyTimeStatus_t PhyTime_TimerInit ( void (*cb)(void) );
+
+phyTimeTimestamp_t PhyTime_GetTimestamp ( void );
+
+phyTimeTimerId_t PhyTime_ScheduleEvent( phyTimeEvent_t *pEvent );
+
+phyTimeStatus_t PhyTime_CancelEvent ( phyTimeTimerId_t timerId );
+
+phyTimeStatus_t PhyTime_CancelEventsWithParam ( uint32_t param );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PHY_INTERFACE_H */
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/IEEE802_14_5_PHY/PhyMessages.h Fri Apr 03 05:23:33 2015 +0000 @@ -0,0 +1,107 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file PhyMessages.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _PHY_MESSAGES_H +#define _PHY_MESSAGES_H + + +/************************************************************************************ +************************************************************************************* +* Include +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public macros +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public prototypes +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public type definitions +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public memory declarations +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public functions +************************************************************************************* +************************************************************************************/ + +/* 802.15.4-2006 standard PHY PD and PLME API messages */ + gPdDataReq_c, + gPdDataCnf_c, + gPdDataInd_c, + + gPdIndQueueInsertReq_c, + gPdIndQueueInsertCnf_c, + gPdIndQueueRemoveReq_c, + + gPlmeCcaReq_c, + gPlmeCcaCnf_c, + + gPlmeEdReq_c, + gPlmeEdCnf_c, + + gPlmeSetTRxStateReq_c, + gPlmeSetTRxStateCnf_c, + + gPlmeSetReq_c, + gPlmeSetCnf_c, + + gPlmeGetReq_c, + gPlmeGetCnf_c, + + gPlmeTimeoutInd_c, + + gPlme_StartEventInd_c, + gPlme_SyncLossInd_c, + gPlme_RxSfdDetectInd_c, + gPlme_FilterFailInd_c, + gPlme_UnexpectedRadioResetInd_c, + + +#endif /* _PHY_MESSAGES_H */ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/PhyPacketProcessor.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,1135 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyPacketProcessor.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+//#include "board.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "MCR20Overwrites.h"
+
+#include "Phy.h"
+#include "MpmInterface.h"
+
+//#include "fsl_os_abstraction.h"
+//#include "fsl_gpio_driver.h"
+
+//extern const IRQn_Type g_portIrqId[HW_PORT_INSTANCE_COUNT];
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+// Address mode indentifiers. Used for both network and MAC interfaces
+#define gPhyAddrModeNoAddr_c (0)
+#define gPhyAddrModeInvalid_c (1)
+#define gPhyAddrMode16BitAddr_c (2)
+#define gPhyAddrMode64BitAddr_c (3)
+
+#define PHY_MIN_RNG_DELAY 4
+
+/************************************************************************************
+*************************************************************************************
+* Private variables
+*************************************************************************************
+************************************************************************************/
+
+const uint8_t gPhyIdlePwrState = gPhyDefaultIdlePwrMode_c;
+const uint8_t gPhyActivePwrState = gPhyDefaultActivePwrMode_c;
+
+const uint8_t gPhyIndirectQueueSize_c = 12;
+static uint8_t mPhyCurrentSamLvl = 12;
+static uint8_t mPhyPwrState = gPhyPwrIdle_c;
+
+/************************************************************************************
+*************************************************************************************
+* Public Functions
+*************************************************************************************
+************************************************************************************/
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyGetRandomNo
+ * Description: - This function should be called only when the Radio is idle.
+ * The function may take a long time to run!
+ * It is recomended to use this function only to initializa a seed at startup!
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+
+void PhyGetRandomNo(uint32_t *pRandomNo)
+{
+ uint8_t i = 4, prevRN=0;
+ uint8_t* ptr = (uint8_t *)pRandomNo;
+ uint32_t startTime, endTime;
+ uint8_t phyReg;
+
+ MCR20Drv_IRQ_Disable();
+
+ if( PhyPpGetState() )
+ {
+ *pRandomNo = 0;
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ while (i--)
+ {
+ PhyTimeReadClock(&startTime);
+
+ // Program a new sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ MCR20Drv_DirectAccessSPIWrite( PHY_CTRL1, phyReg | gRX_c);
+
+ // wait a variable number of symbols */
+ do
+ PhyTimeReadClock(&endTime);
+ while( ((endTime - startTime) & 0x00FFFFFF) < (PHY_MIN_RNG_DELAY + (prevRN>>5)));
+
+ // Abort the sequence
+ PhyAbort();
+
+ // Read new 8 bit random number
+ prevRN = MCR20Drv_IndirectAccessSPIRead((uint8_t)_RNG);
+ *ptr++ = prevRN;
+ }
+
+ MCR20Drv_IRQ_Enable();
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanAuto
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanAuto
+(
+ bool_t mode
+)
+{
+ uint8_t phyReg, phyReg2;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ if( mode )
+ {
+ phyReg2 = phyReg | (cDUAL_PAN_CTRL_DUAL_PAN_AUTO);
+ }
+ else
+ {
+ phyReg2 = phyReg & (~cDUAL_PAN_CTRL_DUAL_PAN_AUTO);
+ }
+
+ /* Write the new value only if it has changed */
+ if (phyReg2 != phyReg)
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg2);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanAuto
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpGetDualPanAuto
+(
+ void
+)
+{
+ uint8_t phyReg = MCR20Drv_IndirectAccessSPIRead(DUAL_PAN_CTRL);
+ return (phyReg & cDUAL_PAN_CTRL_DUAL_PAN_AUTO) == cDUAL_PAN_CTRL_DUAL_PAN_AUTO;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanDwell
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanDwell // TODO: check seq state and return phyStatus_t
+(
+ uint8_t dwell
+)
+{
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_DWELL, dwell);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanDwell
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanDwell
+(
+ void
+)
+{
+ return MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_DWELL);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanRemain
+ * Description: -
+ * Parameters: -
+ * Return: - the remaining Dwell time
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanRemain()
+{
+ return (MCR20Drv_IndirectAccessSPIRead(DUAL_PAN_STS) & cDUAL_PAN_STS_DUAL_PAN_REMAIN);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanSamLvl
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanSamLvl // TODO: check seq state and return phyStatus_t
+(
+ uint8_t level
+)
+{
+ uint8_t phyReg;
+#ifdef PHY_PARAMETERS_VALIDATION
+ if( level > gPhyIndirectQueueSize_c )
+ return;
+#endif
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ phyReg &= ~cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_MSK; // clear current lvl
+ phyReg |= level << cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_Shift_c; // set new lvl
+
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg);
+ mPhyCurrentSamLvl = level;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanSamLvl
+ * Description: -
+ * Parameters: -
+ * Return:
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanSamLvl()
+{
+ return mPhyCurrentSamLvl;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanActiveNwk
+ * Description: - Select Active PAN
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanActiveNwk // TODO: check seq state and return phyStatus_t
+(
+ uint8_t nwk
+)
+{
+ uint8_t phyReg, phyReg2;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ if( 0 == nwk )
+ {
+ phyReg2 = phyReg & (~cDUAL_PAN_CTRL_ACTIVE_NETWORK);
+ }
+ else
+ {
+ phyReg2 = phyReg | cDUAL_PAN_CTRL_ACTIVE_NETWORK;
+ }
+
+ /* Write the new value only if it has changed */
+ if( phyReg2 != phyReg )
+ {
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg2);
+ }
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanActiveNwk
+ * Description: -
+ * Parameters: -
+ * Return: - the Active PAN
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanActiveNwk(void)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t)DUAL_PAN_CTRL );
+
+ return (phyReg & cDUAL_PAN_CTRL_CURRENT_NETWORK) > 0;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanNwkOfRxPacket
+ * Description: -
+ * Parameters: -
+ * Return: - the Active PAN
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetPanOfRxPacket(void)
+{
+ uint8_t phyReg;
+ uint8_t PanBitMask = 0;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_STS);
+
+ if( phyReg & cDUAL_PAN_STS_RECD_ON_PAN0 )
+ PanBitMask |= (1<<0);
+
+ if( phyReg & cDUAL_PAN_STS_RECD_ON_PAN1 )
+ PanBitMask |= (1<<1);
+
+ return PanBitMask;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPromiscuous
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetPromiscuous
+(
+ bool_t mode
+)
+{
+ uint8_t rxFrameFltReg, phyCtrl4Reg;
+
+ rxFrameFltReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) RX_FRAME_FILTER);
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
+
+ if( mode )
+ {
+ /* FRM_VER[1:0] = b00. 00: Any FrameVersion accepted (0,1,2 & 3) */
+ /* All frame types accepted*/
+ phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
+ rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
+ rxFrameFltReg |= (cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
+ }
+ else
+ {
+ phyCtrl4Reg &= ~cPHY_CTRL4_PROMISCUOUS;
+ /* FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others */
+ /* Beacon, Data and MAC command frame types accepted */
+ rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
+ rxFrameFltReg |= (0x03 << cRX_FRAME_FLT_FRM_VER_Shift_c);
+ rxFrameFltReg &= ~(cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
+ }
+
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) RX_FRAME_FILTER, rxFrameFltReg);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhySetActivePromiscuous()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhySetActivePromiscuous(bool_t state)
+{
+ uint8_t phyCtrl4Reg;
+ uint8_t phyFrameFilterReg;
+// bool_t currentState;
+
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
+ phyFrameFilterReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
+
+// currentState = (phyFrameFilterReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS) ? TRUE : FALSE;
+//
+// if( state == currentState )
+// return;
+
+ /* if Prom is set */
+ if( state )
+ {
+ if( phyCtrl4Reg & cPHY_CTRL4_PROMISCUOUS )
+ {
+ /* Disable Promiscuous mode */
+ phyCtrl4Reg &= ~(cPHY_CTRL4_PROMISCUOUS);
+
+ /* Enable Active Promiscuous mode */
+ phyFrameFilterReg |= cRX_FRAME_FLT_ACTIVE_PROMISCUOUS;
+ }
+ }
+ else
+ {
+ if( phyFrameFilterReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS )
+ {
+ /* Disable Active Promiscuous mode */
+ phyFrameFilterReg &= ~(cRX_FRAME_FLT_ACTIVE_PROMISCUOUS);
+
+ /* Enable Promiscuous mode */
+ phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
+ }
+ }
+
+ MCR20Drv_DirectAccessSPIWrite((uint8_t) PHY_CTRL4, phyCtrl4Reg);
+ MCR20Drv_IndirectAccessSPIWrite(RX_FRAME_FILTER, phyFrameFilterReg);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyGetActivePromiscuous()
+ * Description: - returns the state of ActivePromiscuous feature (Enabled/Disabled)
+ * Parameters: -
+ * Return: - TRUE/FALSE
+ *---------------------------------------------------------------------------*/
+bool_t PhyGetActivePromiscuous( void )
+{
+ uint8_t phyReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
+
+ if( phyReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS )
+ return TRUE;
+
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPanId
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetPanId
+(
+ uint8_t *pPanId,
+ uint8_t pan
+)
+{
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pPanId)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( 0 == pan )
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACPANID0_LSB, pPanId, 2);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACPANID1_LSB, pPanId, 2);
+
+ return gPhySuccess_c;
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetShortAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetShortAddr
+(
+ uint8_t *pShortAddr,
+ uint8_t pan
+)
+{
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pShortAddr)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( pan == 0 )
+ {
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACSHORTADDRS0_LSB, pShortAddr, 2);
+ }
+ else
+ {
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACSHORTADDRS1_LSB, pShortAddr, 2);
+ }
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetLongAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetLongAddr
+(
+ uint8_t *pLongAddr,
+ uint8_t pan
+)
+{
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pLongAddr)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( 0 == pan )
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACLONGADDRS0_0, pLongAddr, 8);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACLONGADDRS1_0, pLongAddr, 8);
+
+ return gPhySuccess_c;
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetMacRole
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetMacRole
+(
+ bool_t macRole,
+ uint8_t pan
+)
+{
+ uint8_t phyReg;
+
+ if( 0 == pan )
+ {
+ phyReg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
+
+ if(gMacRole_PanCoord_c == macRole)
+ {
+ phyReg |= cPHY_CTRL4_PANCORDNTR0;
+ }
+ else
+ {
+ phyReg &= ~cPHY_CTRL4_PANCORDNTR0;
+ }
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
+ }
+ else
+ {
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ if(gMacRole_PanCoord_c == macRole)
+ {
+ phyReg |= cDUAL_PAN_CTRL_PANCORDNTR1;
+ }
+ else
+ {
+ phyReg &= ~cDUAL_PAN_CTRL_PANCORDNTR1;
+ }
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg);
+ }
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsTxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsTxAckDataPending
+(
+void
+)
+{
+ uint8_t srcCtrlReg;
+
+ srcCtrlReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
+ if( srcCtrlReg & cSRC_CTRL_SRCADDR_EN )
+ {
+ uint8_t irqsts2Reg;
+
+ irqsts2Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS2);
+
+ if(irqsts2Reg & cIRQSTS2_SRCADDR)
+ return TRUE;
+ else
+ return FALSE;
+ }
+ else
+ {
+ return ((srcCtrlReg & cSRC_CTRL_ACK_FRM_PND) == cSRC_CTRL_ACK_FRM_PND);
+ }
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsRxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsRxAckDataPending
+(
+ void
+)
+{
+ uint8_t irqsts1Reg;
+ irqsts1Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS1);
+ if(irqsts1Reg & cIRQSTS1_RX_FRM_PEND)
+ {
+ return TRUE;
+ }
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetFpManually
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetFpManually
+(
+ bool_t FP
+)
+{
+ uint8_t phyReg;
+ /* Disable the Source Address Matching feature and set FP manually */
+ phyReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
+ phyReg &= ~(cSRC_CTRL_SRCADDR_EN);
+ if(FP)
+ phyReg |= cSRC_CTRL_ACK_FRM_PND;
+ else
+ phyReg &= ~(cSRC_CTRL_ACK_FRM_PND);
+ MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, phyReg);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsPollIndication
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsPollIndication
+(
+ void
+)
+{
+ uint8_t irqsts2Reg;
+ irqsts2Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS2);
+ if(irqsts2Reg & cIRQSTS2_PI)
+ {
+ return TRUE;
+ }
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetCcaThreshold
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetCcaThreshold(uint8_t ccaThreshold)
+{
+ MCR20Drv_IndirectAccessSPIWrite((uint8_t) CCA1_THRESH, (uint8_t) ccaThreshold);
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetSAMState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetSAMState
+(
+ bool_t state
+)
+{
+ uint8_t phyReg, newPhyReg;
+ /* Disable/Enables the Source Address Matching feature */
+ phyReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
+ if( state )
+ newPhyReg = phyReg | cSRC_CTRL_SRCADDR_EN;
+ else
+ newPhyReg = phyReg & ~(cSRC_CTRL_SRCADDR_EN);
+
+ if( newPhyReg != phyReg )
+ MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, newPhyReg);
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetFADStateRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetFADStateRequest(bool_t state)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
+ state ? (phyReg |= cANT_AGC_CTRL_FAD_EN_Mask_c) : (phyReg &= (~((uint8_t)cANT_AGC_CTRL_FAD_EN_Mask_c)));
+ MCR20Drv_IndirectAccessSPIWrite(ANT_AGC_CTRL, phyReg);
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_PAD_CTRL);
+ state ? (phyReg |= 0x02) : (phyReg &= ~cANT_PAD_CTRL_ANTX_EN);
+ MCR20Drv_IndirectAccessSPIWrite(ANT_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetFADThresholdRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetFADThresholdRequest(uint8_t FADThreshold)
+{
+ MCR20Drv_IndirectAccessSPIWrite(FAD_THR, FADThreshold);
+ return gPhySuccess_c;
+}
+
+uint8_t PhyPlmeSetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_PAD_CTRL);
+ antAB_on ? (phyReg |= 0x02) : (phyReg &= ~0x02);
+ rxtxSwitch_on ? (phyReg |= 0x01) : (phyReg &= ~0x01);
+ MCR20Drv_IndirectAccessSPIWrite(ANT_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+uint8_t PhyPlmeSetANTPadStrengthRequest(bool_t hiStrength)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(MISC_PAD_CTRL);
+ hiStrength ? (phyReg |= cMISC_PAD_CTRL_ANTX_CURR) : (phyReg &= ~cMISC_PAD_CTRL_ANTX_CURR);
+ MCR20Drv_IndirectAccessSPIWrite(MISC_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+uint8_t PhyPlmeSetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(MISC_PAD_CTRL);
+ invAntA ? (phyReg |= 0x10) : (phyReg &= ~0x10);
+ invAntB ? (phyReg |= 0x20) : (phyReg &= ~0x20);
+ invTx ? (phyReg |= 0x40) : (phyReg &= ~0x40);
+ invRx ? (phyReg |= 0x80) : (phyReg &= ~0x80);
+ MCR20Drv_IndirectAccessSPIWrite(MISC_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetANTXStateRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetANTXStateRequest(bool_t state)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
+ state ? (phyReg |= cANT_AGC_CTRL_ANTX_Mask_c) : (phyReg &= (~((uint8_t)cANT_AGC_CTRL_ANTX_Mask_c)));
+ MCR20Drv_IndirectAccessSPIWrite(ANT_AGC_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetANTXStateRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetANTXStateRequest(void)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
+
+ return ((phyReg & cANT_AGC_CTRL_ANTX_Mask_c) == cANT_AGC_CTRL_ANTX_Mask_c);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_IndirectQueueInsert
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_IndirectQueueInsert // TODO: to validate add to indirect queue parameters
+(
+ uint8_t index,
+ uint16_t checkSum,
+ instanceId_t instanceId
+)
+{
+ uint16_t srcAddressCheckSum = checkSum;
+ uint8_t srcCtrlReg;
+
+ if( index >= gPhyIndirectQueueSize_c )
+ return gPhyInvalidParameter_c;
+
+ srcCtrlReg = (uint8_t) ( (index & cSRC_CTRL_INDEX) << cSRC_CTRL_INDEX_Shift_c );
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) SRC_ADDRS_SUM_LSB, (uint8_t *) &srcAddressCheckSum, 2);
+
+ srcCtrlReg |= ( cSRC_CTRL_SRCADDR_EN | cSRC_CTRL_INDEX_EN );
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
+
+ return gPhySuccess_c;
+
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_RemoveFromIndirect
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_RemoveFromIndirect
+(
+ uint8_t index,
+ instanceId_t instanceId
+)
+{
+ uint8_t srcCtrlReg;
+
+ if( index >= gPhyIndirectQueueSize_c )
+ return gPhyInvalidParameter_c;
+
+ srcCtrlReg = (uint8_t)( ( (index & cSRC_CTRL_INDEX) << cSRC_CTRL_INDEX_Shift_c )
+ |( cSRC_CTRL_SRCADDR_EN )
+ |( cSRC_CTRL_INDEX_DISABLE) );
+
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
+
+ return gPhySuccess_c;
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetState
+(
+ void
+)
+{
+ return (uint8_t)( MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL1) & cPHY_CTRL1_XCVSEQ );
+}
+
+/*! *********************************************************************************
+* \brief Aborts the current sequence and force the radio to IDLE
+*
+********************************************************************************** */
+void PhyAbort(void)
+{
+ uint8_t phyRegs[8];
+ volatile uint8_t currentTime = 0;
+
+ ProtectFromMCR20Interrupt();
+
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 7);
+
+ // Disable timer trigger (for scheduled XCVSEQ)
+ if( phyRegs[PHY_CTRL1] & cPHY_CTRL1_TMRTRIGEN )
+ {
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_TMRTRIGEN );
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ // give the FSM enough time to start if it was triggered
+ currentTime = (uint8_t) ( MCR20Drv_DirectAccessSPIRead(EVENT_TMR_LSB) + 2 );
+ while(MCR20Drv_DirectAccessSPIRead(EVENT_TMR_LSB) != (uint8_t) (currentTime));
+
+ phyRegs[PHY_CTRL1] = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ }
+
+ if( (phyRegs[PHY_CTRL1] & cPHY_CTRL1_XCVSEQ) != gIdle_c )
+ {
+ // Abort current SEQ
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ // wait for Sequence Idle (if not already)
+ while ((MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F) != 0);
+ }
+
+ // mask SEQ interrupt
+ phyRegs[PHY_CTRL2] |= (uint8_t) (cPHY_CTRL2_SEQMSK);
+ // stop timers
+ phyRegs[PHY_CTRL3] &= (uint8_t) ~(cPHY_CTRL3_TMR2CMP_EN | cPHY_CTRL3_TMR3CMP_EN);
+ phyRegs[PHY_CTRL4] &= (uint8_t) ~(cPHY_CTRL4_TC3TMOUT);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL2, &phyRegs[PHY_CTRL2], 4);
+
+ // clear all PP IRQ bits to avoid unexpected interrupts
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+
+ PhyIsrPassRxParams(NULL);
+
+ UnprotectFromMCR20Interrupt();
+}
+
+
+/*! *********************************************************************************
+* \brief Initialize the 802.15.4 Radio registers
+*
+********************************************************************************** */
+
+void PhyHwInit( void )
+{
+ uint8_t index;
+ uint8_t phyReg;
+
+ /* Initialize the transceiver SPI driver */
+ MCR20Drv_Init();
+ /* Configure the transceiver IRQ_B port */
+ MCR20Drv_IRQ_PortConfig();
+ /* Initialize the SPI driver and install PHY ISR */
+ PHY_InstallIsr();
+
+ //Disable Tristate on COCO MISO for SPI reads
+ MCR20Drv_IndirectAccessSPIWrite((uint8_t) MISC_PAD_CTRL, (uint8_t) 0x02);
+
+ // PHY_CTRL4 unmask global TRX interrupts, enable 16 bit mode for TC2 - TC2 prime EN
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, (uint8_t) (cPHY_CTRL4_TC2PRIME_EN | \
+ (gCcaCCA_MODE1_c << cPHY_CTRL4_CCATYPE_Shift_c)));
+
+ // clear all PP IRQ bits to avoid unexpected interrupts immediately after init, disable all timer interrupts
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS1, (uint8_t) (cIRQSTS1_PLL_UNLOCK_IRQ | \
+ cIRQSTS1_FILTERFAIL_IRQ | \
+ cIRQSTS1_RXWTRMRKIRQ | \
+ cIRQSTS1_CCAIRQ | \
+ cIRQSTS1_RXIRQ | \
+ cIRQSTS1_TXIRQ | \
+ cIRQSTS1_SEQIRQ));
+
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS2, (uint8_t) (cIRQSTS2_ASM_IRQ | \
+ cIRQSTS2_PB_ERR_IRQ | \
+ cIRQSTS2_WAKE_IRQ));
+
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS3, (uint8_t) (cIRQSTS3_TMR4MSK | \
+ cIRQSTS3_TMR3MSK | \
+ cIRQSTS3_TMR2MSK | \
+ cIRQSTS3_TMR1MSK | \
+ cIRQSTS3_TMR4IRQ | \
+ cIRQSTS3_TMR3IRQ | \
+ cIRQSTS3_TMR2IRQ | \
+ cIRQSTS3_TMR1IRQ));
+
+ // PHY_CTRL1 default HW settings + AUTOACK enabled
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, (uint8_t) (cPHY_CTRL1_AUTOACK));
+
+ // PHY_CTRL2 : disable all interrupts
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, (uint8_t) (cPHY_CTRL2_CRC_MSK | \
+ cPHY_CTRL2_PLL_UNLOCK_MSK | \
+ cPHY_CTRL2_FILTERFAIL_MSK | \
+ cPHY_CTRL2_RX_WMRK_MSK | \
+ cPHY_CTRL2_CCAMSK | \
+ cPHY_CTRL2_RXMSK | \
+ cPHY_CTRL2_TXMSK | \
+ cPHY_CTRL2_SEQMSK));
+
+ // PHY_CTRL3 : disable all timers and remaining interrupts
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, (uint8_t) (cPHY_CTRL3_ASM_MSK | \
+ cPHY_CTRL3_PB_ERR_MSK | \
+ cPHY_CTRL3_WAKE_MSK));
+ // SRC_CTRL
+ MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, (uint8_t) (cSRC_CTRL_ACK_FRM_PND | \
+ (cSRC_CTRL_INDEX << cSRC_CTRL_INDEX_Shift_c)));
+ // RX_FRAME_FILTER
+ // FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others
+ MCR20Drv_IndirectAccessSPIWrite(RX_FRAME_FILTER, (uint8_t)(cRX_FRAME_FLT_FRM_VER | \
+ cRX_FRAME_FLT_BEACON_FT | \
+ cRX_FRAME_FLT_DATA_FT | \
+ cRX_FRAME_FLT_CMD_FT ));
+ // Direct register overwrites
+ for (index = 0; index < sizeof(overwrites_direct)/sizeof(overwrites_t); index++)
+ MCR20Drv_DirectAccessSPIWrite(overwrites_direct[index].address, overwrites_direct[index].data);
+
+ // Indirect register overwrites
+ for (index = 0; index < sizeof(overwrites_indirect)/sizeof(overwrites_t); index++)
+ MCR20Drv_IndirectAccessSPIWrite(overwrites_indirect[index].address, overwrites_indirect[index].data);
+
+ // Clear HW indirect queue
+ for( index = 0; index < gPhyIndirectQueueSize_c; index++ )
+ PhyPp_RemoveFromIndirect( index, 0 );
+
+ PhyPlmeSetCurrentChannelRequest(0x0B, 0); //2405 MHz
+#if gMpmIncluded_d
+ PhyPlmeSetCurrentChannelRequest(0x0B, 1); //2405 MHz
+
+ // Split the HW Indirect hash table in two
+ PhyPpSetDualPanSamLvl( gPhyIndirectQueueSize_c/2 );
+#else
+ // Assign HW Indirect hash table to PAN0
+ PhyPpSetDualPanSamLvl( gPhyIndirectQueueSize_c );
+#endif
+
+ // set the power level to 0dBm
+ PhyPlmeSetPwrLevelRequest(0x17);
+ // set CCA threshold to -75 dBm
+ PhyPpSetCcaThreshold(0x4B);
+ // Set prescaller to obtain 1 symbol (16us) timebase
+ MCR20Drv_IndirectAccessSPIWrite(TMR_PRESCALE, 0x05);
+ // write default Rx watermark level
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, 0);
+
+ //Enable the RxWatermark IRQ and FilterFail IRQ
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL2);
+ //phyReg &= (uint8_t)~(cPHY_CTRL2_FILTERFAIL_MSK);
+ phyReg &= (uint8_t)~(cPHY_CTRL2_RX_WMRK_MSK);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, phyReg);
+
+ /* enable autodoze mode. */
+ phyReg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PWR_MODES);
+ phyReg |= (uint8_t) cPWR_MODES_AUTODOZE;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PWR_MODES, phyReg);
+ MCR20Drv_Set_CLK_OUT_Freq(gMCR20_ClkOutFreq_d);
+
+ // Clear IRQn Pending Status
+ MCR20Drv_IRQ_Clear();
+ //NVIC_ClearPendingIRQ(g_portIrqId[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)]);
+ /* enable the transceiver IRQ_B interrupt request */
+ MCR20Drv_IRQ_Enable();
+}
+
+/*! *********************************************************************************
+* \brief Change the XCVR power state
+*
+* \param[in] state the new XCVR power state
+*
+* \return phyStatus_t
+*
+* \pre Before entering hibernate/reset states, the MCG clock source must be changed
+* to use an input other than the one generated by the XCVR!
+*
+* \post When XCVR is in hibernate, indirect registers cannot be accessed in burst mode
+* When XCVR is in reset, all registers are inaccessible!
+*
+* \remarks Putting the XCVR into hibernate/reset will stop the generated clock signal!
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetPwrState( uint8_t state )
+{
+ uint8_t phyPWR, xtalState;
+
+ /* Parameter validation */
+ if( state > gPhyPwrReset_c )
+ return gPhyInvalidParameter_c;
+
+ /* Check if the new power state = old power state */
+ if( state == mPhyPwrState )
+ return gPhyBusy_c;
+
+ /* Check if the XCVR is in reset power mode */
+ if( mPhyPwrState == gPhyPwrReset_c )
+ {
+ MCR20Drv_RST_B_Deassert();
+ /* Wait for transceiver to deassert IRQ pin */
+ while( MCR20Drv_IsIrqPending() );
+ /* Wait for transceiver wakeup from POR iterrupt */
+ while( !MCR20Drv_IsIrqPending() );
+ /* After reset, the radio is in Idle state */
+ mPhyPwrState = gPhyPwrIdle_c;
+ /* Restore default radio settings */
+ PhyHwInit();
+ }
+
+ if( state != gPhyPwrReset_c )
+ {
+ phyPWR = MCR20Drv_DirectAccessSPIRead( PWR_MODES );
+ xtalState = phyPWR & cPWR_MODES_XTALEN;
+ }
+
+ switch( state )
+ {
+ case gPhyPwrIdle_c:
+ phyPWR &= ~(cPWR_MODES_AUTODOZE);
+ phyPWR |= (cPWR_MODES_XTALEN | cPWR_MODES_PMC_MODE);
+ break;
+
+ case gPhyPwrAutodoze_c:
+ phyPWR |= (cPWR_MODES_XTALEN | cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
+ break;
+
+ case gPhyPwrDoze_c:
+ phyPWR &= ~(cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
+ phyPWR |= cPWR_MODES_XTALEN;
+ break;
+
+ case gPhyPwrHibernate_c:
+ phyPWR &= ~(cPWR_MODES_XTALEN | cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
+ break;
+
+ case gPhyPwrReset_c:
+ MCR20Drv_IRQ_Disable();
+ mPhyPwrState = gPhyPwrReset_c;
+ MCR20Drv_RST_B_Assert();
+ return gPhySuccess_c;
+ }
+
+ mPhyPwrState = state;
+ MCR20Drv_DirectAccessSPIWrite( PWR_MODES, phyPWR );
+
+ if( !xtalState && (phyPWR & cPWR_MODES_XTALEN))
+ {
+ /* wait for crystal oscillator to complet its warmup */
+ while( ( MCR20Drv_DirectAccessSPIRead(PWR_MODES) & cPWR_MODES_XTAL_READY ) != cPWR_MODES_XTAL_READY);
+ /* wait for radio wakeup from hibernate interrupt */
+ while( ( MCR20Drv_DirectAccessSPIRead(IRQSTS2) & (cIRQSTS2_WAKE_IRQ | cIRQSTS2_TMRSTATUS) ) != (cIRQSTS2_WAKE_IRQ | cIRQSTS2_TMRSTATUS) );
+
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS2, cIRQSTS2_WAKE_IRQ);
+ }
+
+ return gPhySuccess_c;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/PhyPlmeData.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,685 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyPlmeData.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+
+//#include "fsl_os_abstraction.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+#include "PhyTypes.h"
+#include "PhyInterface.h"
+
+
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#define PHY_PARAMETERS_VALIDATION 1
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+ //2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
+static const uint8_t pll_int[16] = {0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D};
+static const uint16_t pll_frac[16] = {0x2800, 0x5000, 0x7800, 0xA000, 0xC800, 0xF000, 0x1800, 0x4000, 0x6800, 0x9000, 0xB800, 0xE000, 0x0800, 0x3000, 0x5800, 0x8000};
+
+extern Phy_PhyLocalStruct_t phyLocal[];
+static uint8_t gPhyCurrentChannelPAN0 = 0x0B;
+static uint8_t gPhyCurrentChannelPAN1 = 0x0B;
+
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+static void PhyRxRetry( uint32_t param );
+
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief This function will start a TX sequence. The packet will be sent OTA
+*
+* \param[in] pTxPacket pointer to the TX packet structure
+* \param[in] pRxParams pointer to RX parameters
+* \param[in] pTxParams pointer to TX parameters
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPdDataRequest( pdDataReq_t *pTxPacket,
+ volatile phyRxParams_t *pRxParams,
+ volatile phyTxParams_t *pTxParams )
+{
+ uint8_t phyRegs[5], phyCtrl4Reg;
+ uint8_t *pTmpPsdu; //*tmp;
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ // null pointer
+ if(NULL == pTxPacket)
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ // if CCA required ...
+ if( (pTxPacket->CCABeforeTx == gPhyCCAMode3_c) || (pTxPacket->CCABeforeTx == gPhyEnergyDetectMode_c))
+ { // ... cannot perform other types than MODE1 and MODE2
+ return gPhyInvalidParameter_c;
+ }
+
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( gIdle_c != PhyPpGetState() )
+ {
+ return gPhyBusy_c;
+ }
+
+ // load data into PB
+ pTmpPsdu = MEM_BufferAlloc(gMaxPHYPacketSize_c + 1);
+ *pTmpPsdu = pTxPacket->psduLength + 2;
+ FLib_MemCpy(pTmpPsdu+1, &pTxPacket->pPsdu[0], pTxPacket->psduLength);
+ MCR20Drv_PB_SPIBurstWrite(pTmpPsdu, (uint8_t) (pTxPacket->psduLength + 1)); /* including psduLength */
+ MEM_BufferFree(pTmpPsdu);
+
+
+#if 0
+ // load data into PB
+ tmp = pTxPacket->pPsdu;
+
+ pTmpPsdu = (uint8_t *) ((&pTxPacket->pPsdu[0])-1);
+ *pTmpPsdu = pTxPacket->psduLength + 2; /* including 2 bytes of FCS */
+ MCR20Drv_PB_SPIBurstWrite( pTmpPsdu, (uint8_t) (pTxPacket->psduLength + 1)); /* including psduLength */
+
+ pTxPacket->pPsdu = tmp;
+#endif
+
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
+
+ // perform CCA before TX if required
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_CCABFRTX);
+ phyCtrl4Reg &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
+
+ if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
+ {
+#if (gUseStandaloneCCABeforeTx_d == 0)
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_CCABFRTX);
+#endif
+ phyCtrl4Reg |= (uint8_t) ((cPHY_CTRL4_CCATYPE & pTxPacket->CCABeforeTx) << (cPHY_CTRL4_CCATYPE_Shift_c));
+ }
+
+ // slotted operation
+ if( pTxPacket->slottedTx == gPhySlottedMode_c )
+ {
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
+ }
+ else
+ {
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
+ }
+
+ // perform TxRxAck sequence if required by phyTxMode
+ if(pTxPacket->ackRequired == gPhyRxAckRqd_c)
+ {
+ PhyIsrPassRxParams(pRxParams);
+
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_RXACKRQD);
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gTR_c;
+ }
+ else
+ {
+ PhyIsrPassRxParams(NULL);
+
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_RXACKRQD);
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gTX_c;
+ }
+
+#if gUseStandaloneCCABeforeTx_d
+ if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
+ {
+ // start the CCA or ED sequence (this depends on CcaType used)
+ // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
+ if( pTxPacket->slottedTx == gPhySlottedMode_c )
+ pTxParams->numOfCca = 2;
+ else
+ pTxParams->numOfCca = 1;
+ pTxParams->ackRequired = pTxPacket->ackRequired;
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gCCA_c;
+ // at the end of the scheduled sequence, an interrupt will occur:
+ // CCA , SEQ or TMR3
+ }
+ else
+ {
+ pTxParams->numOfCca = 0;
+ }
+#endif
+
+ phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+
+ // ensure that no spurious interrupts are raised
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
+
+ // start the TX or TRX sequence
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will start a RX sequence
+*
+* \param[in] phyRxMode slotted/unslotted
+* \param[in] pRxParams pointer to RX parameters
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeRxRequest( phySlottedMode_t phyRxMode, phyRxParams_t * pRxParams )
+{
+ uint8_t phyRegs[5];
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pRxParams)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( gIdle_c != PhyPpGetState() )
+ {
+ return gPhyBusy_c;
+ }
+
+ pRxParams->phyRxMode = phyRxMode;
+
+ if( NULL == pRxParams->pRxData )
+ {
+ pRxParams->pRxData = MEM_BufferAlloc(sizeof(pdDataToMacMessage_t) + gMaxPHYPacketSize_c);
+ }
+
+ if( NULL == pRxParams->pRxData )
+ {
+ phyTimeEvent_t event = {
+ .timestamp = PhyTime_GetTimestamp() + gPhyRxRetryInterval_c,
+ .parameter = (uint32_t)pRxParams,
+ .callback = PhyRxRetry,
+ };
+
+ PhyTime_ScheduleEvent( &event );
+ return gPhyTRxOff_c;
+ }
+
+ PhyIsrPassRxParams(pRxParams);
+
+ pRxParams->pRxData->msgData.dataInd.pPsdu =
+ (uint8_t*)&pRxParams->pRxData->msgData.dataInd.pPsdu +
+ sizeof(pRxParams->pRxData->msgData.dataInd.pPsdu);
+
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
+
+ // slotted operation
+ if(gPhySlottedMode_c == phyRxMode)
+ {
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
+ }
+ else
+ {
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
+ }
+
+ // program the RX sequence
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gRX_c;
+
+ phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+
+ // ensure that no spurious interrupts are raised
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
+
+ // start the RX sequence
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will start a CCA / CCCA sequence
+*
+* \param[in] ccaParam the type of CCA
+* \param[in] cccaMode continuous or single CCA
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeCcaEdRequest( phyCCAType_t ccaParam, phyContCCAMode_t cccaMode )
+{
+ uint8_t phyRegs[5];
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ // illegal CCA type
+ if( (ccaParam != gPhyCCAMode1_c) && (ccaParam != gPhyCCAMode2_c) && (ccaParam != gPhyCCAMode3_c) && (ccaParam != gPhyEnergyDetectMode_c))
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ // cannot perform Continuous CCA using ED type
+ if( (ccaParam == gPhyEnergyDetectMode_c) && (cccaMode == gPhyContCcaEnabled) )
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( gIdle_c != PhyPpGetState() )
+ {
+ return gPhyBusy_c;
+ }
+
+ // write in PHY CTRL4 the desired type of CCA
+ phyRegs[0] = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyRegs[0] &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
+ phyRegs[0] |= (uint8_t) ((cPHY_CTRL4_CCATYPE & ccaParam) << (cPHY_CTRL4_CCATYPE_Shift_c));
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t)PHY_CTRL4, phyRegs[0]);
+
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
+
+ // continuous CCA
+ if(cccaMode == gPhyContCcaEnabled)
+ {
+ // start the continuous CCA sequence
+ // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gCCCA_c;
+ // at the end of the scheduled sequence, an interrupt will occur:
+ // CCA , SEQ or TMR3
+ }
+ // normal CCA (not continuous)
+ else
+ {
+ // start the CCA or ED sequence (this depends on CcaType used)
+ // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gCCA_c;
+ // at the end of the scheduled sequence, an interrupt will occur:
+ // CCA , SEQ or TMR3
+ }
+
+ phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+
+ // ensure that no spurious interrupts are raised
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+
+ // start the CCA/ED or CCCA sequence
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will set the channel number for the specified PAN
+*
+* \param[in] channel new channel number
+* \param[in] pan the PAN registers (0/1)
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetCurrentChannelRequest
+(
+ uint8_t channel,
+ uint8_t pan
+)
+{
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if((channel < 11) || (channel > 26))
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( !pan )
+ {
+ gPhyCurrentChannelPAN0 = channel;
+ MCR20Drv_DirectAccessSPIWrite(PLL_INT0, pll_int[channel - 11]);
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
+ }
+ else
+ {
+ gPhyCurrentChannelPAN1 = channel;
+ MCR20Drv_IndirectAccessSPIWrite(PLL_INT1, pll_int[channel - 11]);
+ MCR20Drv_IndirectAccessSPIMultiByteWrite(PLL_FRAC1_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
+ }
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will return the current channel for a specified PAN
+*
+* \param[in] pan the PAN registers (0/1)
+*
+* \return uint8_t current channel number
+*
+********************************************************************************** */
+uint8_t PhyPlmeGetCurrentChannelRequest
+(
+ uint8_t pan
+)
+{
+ if( !pan )
+ return gPhyCurrentChannelPAN0;
+ else
+ return gPhyCurrentChannelPAN1;
+}
+
+/*! *********************************************************************************
+* \brief This function will set the radio Tx power
+*
+* \param[in] pwrStep the Tx power
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetPwrLevelRequest
+(
+ uint8_t pwrStep
+)
+{
+#ifdef PHY_PARAMETERS_VALIDATION
+ if((pwrStep < 3) || (pwrStep > 31)) //-40 dBm to 16 dBm
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ MCR20Drv_DirectAccessSPIWrite(PA_PWR, (uint8_t)(pwrStep & 0x1F));
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetLQIModeRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetLQIModeRequest(uint8_t lqiMode)
+{
+ uint8_t currentMode;
+
+ currentMode = MCR20Drv_IndirectAccessSPIRead(CCA_CTRL);
+ lqiMode ? (currentMode |= cCCA_CTRL_LQI_RSSI_NOT_CORR) : (currentMode &= (~((uint8_t)cCCA_CTRL_LQI_RSSI_NOT_CORR)));
+ MCR20Drv_IndirectAccessSPIWrite(CCA_CTRL, currentMode);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetRSSILevelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetRSSILevelRequest(void)
+{
+ return MCR20Drv_IndirectAccessSPIRead(RSSI);
+}
+
+/*! *********************************************************************************
+* \brief This function will set the value of PHY PIBs
+*
+* \param[in] pibId the Id of the PIB
+* \param[in] pibValue the new value of the PIB
+* \param[in] phyRegistrySet the PAN registers (0/1)
+* \param[in] instanceId the instance of the PHY
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetPIBRequest(phyPibId_t pibId, uint64_t pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
+{
+ phyStatus_t result = gPhySuccess_c;
+
+ switch(pibId)
+ {
+ case gPhyPibCurrentChannel_c:
+ {
+ result = PhyPlmeSetCurrentChannelRequest((uint8_t) pibValue, phyRegistrySet);
+ }
+ break;
+ case gPhyPibTransmitPower_c:
+ {
+ result = PhyPlmeSetPwrLevelRequest((uint8_t) pibValue);
+ }
+ break;
+ case gPhyPibLongAddress_c:
+ {
+ uint64_t longAddr = pibValue;
+ result = PhyPpSetLongAddr((uint8_t *) &longAddr, phyRegistrySet);
+ }
+ break;
+ case gPhyPibShortAddress_c:
+ {
+ uint16_t shortAddr = (uint16_t) pibValue;
+ result = PhyPpSetShortAddr((uint8_t *) &shortAddr, phyRegistrySet);
+ }
+ break;
+ case gPhyPibPanId_c:
+ {
+ uint16_t panId = (uint16_t) pibValue;
+ result = PhyPpSetPanId((uint8_t *) &panId, phyRegistrySet);
+ }
+ break;
+ case gPhyPibPanCoordinator_c:
+ {
+ bool_t macRole = (bool_t) pibValue;
+ result = PhyPpSetMacRole(macRole, phyRegistrySet);
+ }
+ break;
+ case gPhyPibCurrentPage_c:
+ {
+ /* Nothinh to do... */
+ }
+ break;
+ case gPhyPibPromiscuousMode_c:
+ {
+ PhyPpSetPromiscuous((uint8_t)pibValue);
+ }
+ break;
+ case gPhyPibRxOnWhenIdle:
+ {
+ PhyPlmeSetRxOnWhenIdle( (bool_t)pibValue, instanceId );
+ }
+ break;
+ case gPhyPibFrameWaitTime_c:
+ {
+ PhyPlmeSetFrameWaitTime( (uint32_t)pibValue, instanceId );
+ }
+ break;
+ case gPhyPibDeferTxIfRxBusy_c:
+ {
+ if( pibValue )
+ phyLocal[instanceId].flags |= gPhyFlagDeferTx_c;
+ else
+ phyLocal[instanceId].flags &= ~gPhyFlagDeferTx_c;
+ }
+ break;
+ default:
+ {
+ result = gPhyUnsupportedAttribute_c;
+ }
+ break;
+ }
+
+ return result;
+}
+
+/*! *********************************************************************************
+* \brief This function will return the value of PHY PIBs
+*
+* \param[in] pibId the Id of the PIB
+* \param[out] pibValue pointer to a location where the value will be stored
+* \param[in] phyRegistrySet the PAN registers (0/1)
+* \param[in] instanceId the instance of the PHY
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeGetPIBRequest(phyPibId_t pibId, uint64_t * pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
+{
+ phyStatus_t result = gPhySuccess_c;
+ switch(pibId)
+ {
+ case gPhyPibCurrentChannel_c:
+ {
+ *((uint8_t*)pibValue) = (uint64_t) PhyPlmeGetCurrentChannelRequest(phyRegistrySet);
+ }
+ break;
+ case gPhyPibTransmitPower_c:
+ {
+ *((uint8_t*)pibValue) = MCR20Drv_DirectAccessSPIRead(PA_PWR);
+ }
+ break;
+ case gPhyPibLongAddress_c:
+ {
+ if( !phyRegistrySet )
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS0_0, (uint8_t*)pibValue, 8);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS1_0, (uint8_t*)pibValue, 8);
+ }
+ break;
+ case gPhyPibShortAddress_c:
+ {
+ if( !phyRegistrySet )
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS0_LSB, (uint8_t*)pibValue, 2);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS1_LSB, (uint8_t*)pibValue, 2);
+ }
+ break;
+ case gPhyPibPanId_c:
+ {
+ if( !phyRegistrySet )
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID0_LSB, (uint8_t*)pibValue, 2);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID1_LSB, (uint8_t*)pibValue, 2);
+ }
+ break;
+ case gPhyPibPanCoordinator_c:
+ {
+ uint8_t phyReg;
+
+ if( !phyRegistrySet )
+ {
+ phyReg = MCR20Drv_DirectAccessSPIRead( PHY_CTRL4);
+ phyReg = (phyReg & cPHY_CTRL4_PANCORDNTR0) == cPHY_CTRL4_PANCORDNTR0;
+ }
+ else
+ {
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+ phyReg = (phyReg & cDUAL_PAN_CTRL_PANCORDNTR1) == cDUAL_PAN_CTRL_PANCORDNTR1;
+ }
+
+ *((uint8_t*)pibValue) = phyReg;
+ }
+ break;
+ case gPhyPibRxOnWhenIdle:
+ {
+ *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagRxOnWhenIdle_c);
+ }
+ break;
+ case gPhyPibFrameWaitTime_c:
+ {
+ *((uint8_t*)pibValue) = phyLocal[instanceId].maxFrameWaitTime;
+ }
+ break;
+ case gPhyPibDeferTxIfRxBusy_c:
+ {
+ *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagDeferTx_c);
+ }
+ break;
+ default:
+ {
+ result = gPhyUnsupportedAttribute_c;
+ }
+ break;
+ }
+
+ return result;
+
+}
+
+/************************************************************************************
+*************************************************************************************
+* Private functions
+*************************************************************************************
+************************************************************************************/
+static void PhyRxRetry( uint32_t param )
+{
+ PhyPlmeRxRequest( ((phyRxParams_t*)param)->phyRxMode, (phyRxParams_t*)param );
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/PhyStateMachine.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,1046 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyStateMachine.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+#ifdef gSrcTask_d
+#undef gSrcTask_d
+#endif
+
+#define gSrcTask_d PHY
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+
+//#include "fsl_os_abstraction.h"
+
+#include "PhyInterface.h"
+#include "Phy.h"
+
+#if 0
+#include "MemManager.h"
+#include "Messaging.h"
+#include "Panic.h"
+#include "FunctionLib.h"
+#endif
+
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+
+#include "AspInterface.h"
+#include "MpmInterface.h"
+
+//#include "arm_hal_interrupt.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+#define mPhyMaxIdleRxDuration_c (0xF00000) /* [sym] */
+
+#define ProtectFromXcvrInterrupt() ProtectFromMCR20Interrupt()
+#define UnprotectFromXcvrInterrupt() UnprotectFromMCR20Interrupt()
+
+/************************************************************************************
+*************************************************************************************
+* Private type definitions
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+static void Phy24Task(Phy_PhyLocalStruct_t *pPhyData);
+
+static phyStatus_t Phy_HandlePdDataReq( Phy_PhyLocalStruct_t *pPhyData, macToPdDataMessage_t * pMsg );
+
+static void Phy_EnterIdle( Phy_PhyLocalStruct_t *pPhyData );
+
+static void PLME_SendMessage(Phy_PhyLocalStruct_t *pPhyData, phyMessageId_t msgType);
+
+static void PD_SendMessage(Phy_PhyLocalStruct_t *pPhyData, phyMessageId_t msgType);
+
+
+static void MSG_InitQueue(macPhyInputQueue_t * pMacPhyQueue);
+static void MSG_Queue(macPhyInputQueue_t * pMacPhyQueue, void * pMsgIn);
+static void MSG_QueueHead(macPhyInputQueue_t * pMacPhyQueue, void * pMsgIn);
+static bool_t MSG_Pending(macPhyInputQueue_t * pMacPhyQueue);
+static void * MSG_DeQueue(macPhyInputQueue_t * pMacPhyQueue);
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+Phy_PhyLocalStruct_t phyLocal[gPhyInstancesCnt_c];
+extern volatile uint32_t mPhySeqTimeout;
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief This function creates the PHY task
+*
+********************************************************************************** */
+void Phy_Init(void)
+{
+ uint32_t i;
+
+ PhyHwInit();
+ ASP_Init( 0, gAspInterfaceId );
+ MPM_Init();
+
+ for( i=0; i<gPhyInstancesCnt_c; i++ )
+ {
+ phyLocal[i].flags = gPhyFlagDeferTx_c;
+ phyLocal[i].rxParams.pRxData = NULL;
+
+ /* Prepare input queues.*/
+ MSG_InitQueue( &phyLocal[i].macPhyInputQueue );
+ }
+
+ PhyIsrPassRxParams( NULL );
+ PhyPlmeSetPwrState( gPhyDefaultIdlePwrMode_c );
+}
+
+/*! *********************************************************************************
+* \brief This function binds a MAC instance to a PHY instance
+*
+* \param[in] instanceId The instance of the MAC
+*
+* \return The instance of the PHY.
+*
+********************************************************************************** */
+instanceId_t BindToPHY( instanceId_t macInstance )
+{
+ return 0;
+}
+
+/*! *********************************************************************************
+* \brief This function registers the MAC PD and PLME SAP handlers
+*
+* \param[in] pPD_MAC_SapHandler Pointer to the MAC PD handler function
+* \param[in] pPLME_MAC_SapHandler Pointer to the MAC PLME handler function
+* \param[in] instanceId The instance of the PHY
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+void Phy_RegisterSapHandlers( PD_MAC_SapHandler_t pPD_MAC_SapHandler,
+ PLME_MAC_SapHandler_t pPLME_MAC_SapHandler,
+ instanceId_t instanceId )
+{
+ phyLocal[instanceId].PD_MAC_SapHandler = pPD_MAC_SapHandler;
+ phyLocal[instanceId].PLME_MAC_SapHandler = pPLME_MAC_SapHandler;
+}
+
+/*! *********************************************************************************
+* \brief This function represents the PHY's task
+*
+* \param[in] taskParam The instance of the PHY
+*
+********************************************************************************** */
+static void Phy24Task(Phy_PhyLocalStruct_t *pPhyStruct)
+{
+ uint8_t state;
+ phyMessageHeader_t * pMsgIn;
+ phyStatus_t status = gPhySuccess_c;
+
+ ProtectFromXcvrInterrupt();
+ state = PhyGetSeqState();
+
+ /* Handling messages from upper layer */
+ while( MSG_Pending(&pPhyStruct->macPhyInputQueue) )
+ {
+ /* PHY doesn't free dynamic alocated messages! */
+ pMsgIn = MSG_DeQueue( &pPhyStruct->macPhyInputQueue );
+ pPhyStruct->currentMacInstance = pMsgIn->macInstance;
+
+ if( gRX_c == state )
+ {
+ if( (pPhyStruct->flags & gPhyFlagDeferTx_c) && (pMsgIn->msgType == gPdDataReq_c) )
+ {
+ macToPdDataMessage_t *pPD = (macToPdDataMessage_t*)pMsgIn;
+ uint8_t phyReg = MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F;
+ /* Check for an Rx in progress, and if the packet can be defered.
+ Packet cannot be defered */
+ if( (pPD->msgData.dataReq.CCABeforeTx != gPhyNoCCABeforeTx_c) &&
+ (pPD->msgData.dataReq.startTime == gPhySeqStartAsap_c) &&
+ (pPD->msgData.dataReq.slottedTx == gPhyUnslottedMode_c) &&
+ (phyReg <= 0x06 || phyReg == 0x15 || phyReg == 0x16) )
+ {
+ MSG_QueueHead( &pPhyStruct->macPhyInputQueue, pMsgIn );
+ UnprotectFromXcvrInterrupt();
+ return;
+ }
+ }
+
+// if( pPhyStruct->flags & gPhyFlagIdleRx_c )
+ {
+ PhyPlmeForceTrxOffRequest();
+ state = gIdle_c;
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+ }
+ }
+
+ if( gIdle_c != state )
+ {
+ /* try again later */
+ MSG_QueueHead( &pPhyStruct->macPhyInputQueue, pMsgIn );
+ UnprotectFromXcvrInterrupt();
+ return;
+ }
+
+#if gMpmIncluded_d
+ if( status == gPhySuccess_c )
+ {
+ status = MPM_PrepareForTx( pMsgIn->macInstance );
+ }
+#endif
+
+ if( status == gPhySuccess_c )
+ {
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+
+ switch( pMsgIn->msgType )
+ {
+ case gPdDataReq_c:
+ status = Phy_HandlePdDataReq( pPhyStruct, (macToPdDataMessage_t *)pMsgIn );
+ break;
+ case gPlmeCcaReq_c:
+ status = PhyPlmeCcaEdRequest(gPhyCCAMode1_c, gPhyContCcaDisabled);
+ break;
+ case gPlmeEdReq_c:
+ status = PhyPlmeCcaEdRequest(gPhyEnergyDetectMode_c, gPhyContCcaDisabled);
+ break;
+ default:
+ status = gPhyInvalidPrimitive_c;
+ }
+ }
+
+ /* Check status */
+ if( gPhySuccess_c == status )
+ {
+ UnprotectFromXcvrInterrupt();
+ return;
+ }
+ else
+ {
+ switch( pMsgIn->msgType )
+ {
+ case gPdDataReq_c:
+ if( ((macToPdDataMessage_t*)pMsgIn)->msgData.dataReq.CCABeforeTx == gPhyNoCCABeforeTx_c )
+ {
+ PD_SendMessage(pPhyStruct, gPdDataCnf_c);
+ break;
+ }
+ /* Fallthorough */
+ case gPlmeCcaReq_c:
+ pPhyStruct->channelParams.channelStatus = gPhyChannelBusy_c;
+ PLME_SendMessage(pPhyStruct, gPlmeCcaCnf_c);
+ break;
+ case gPlmeEdReq_c:
+ pPhyStruct->channelParams.energyLeveldB = 0;
+ PLME_SendMessage(pPhyStruct, gPlmeEdCnf_c);
+ break;
+ default:
+ PLME_SendMessage(pPhyStruct, gPlmeTimeoutInd_c);
+ }
+ }
+ }/* while( MSG_Pending(&pPhyStruct->macPhyInputQueue) ) */
+
+ UnprotectFromXcvrInterrupt();
+
+ /* Check if PHY can enter Idle state */
+ if( gIdle_c == state )
+ {
+ Phy_EnterIdle( pPhyStruct );
+ }
+}
+
+/*! *********************************************************************************
+* \brief This is the PD SAP message handler
+*
+* \param[in] pMsg Pointer to the PD request message
+* \param[in] instanceId The instance of the PHY
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+phyStatus_t MAC_PD_SapHandler(macToPdDataMessage_t *pMsg, instanceId_t phyInstance)
+{
+ phyStatus_t result = gPhySuccess_c;
+ uint8_t baseIndex = 0;
+
+ if( NULL == pMsg )
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+#if gMpmIncluded_d
+ if( pMsg->msgType == gPdIndQueueInsertReq_c || pMsg->msgType == gPdIndQueueRemoveReq_c )
+ {
+ baseIndex = MPM_GetRegSet( MPM_GetPanIndex( pMsg->macInstance ) ) *
+ (gPhyIndirectQueueSize_c/gMpmPhyPanRegSets_c);
+ }
+#endif
+
+ switch( pMsg->msgType )
+ {
+ case gPdIndQueueInsertReq_c:
+ result = PhyPp_IndirectQueueInsert(baseIndex + pMsg->msgData.indQueueInsertReq.index,
+ pMsg->msgData.indQueueInsertReq.checksum,
+ phyInstance);
+ break;
+
+ case gPdIndQueueRemoveReq_c:
+ result = PhyPp_RemoveFromIndirect(baseIndex + pMsg->msgData.indQueueRemoveReq.index,
+ phyInstance);
+ break;
+
+ case gPdDataReq_c:
+ MSG_Queue(&phyLocal[phyInstance].macPhyInputQueue, pMsg);
+ Phy24Task( &phyLocal[phyInstance] );
+ break;
+
+ default:
+ result = gPhyInvalidPrimitive_c;
+ }
+
+ return result;
+}
+
+/*! *********************************************************************************
+* \brief This is the PLME SAP message handler
+*
+* \param[in] pMsg Pointer to the PLME request message
+* \param[in] instanceId The instance of the PHY
+*
+* \return phyStatus_t The status of the operation.
+*
+********************************************************************************** */
+phyStatus_t MAC_PLME_SapHandler(macToPlmeMessage_t * pMsg, instanceId_t phyInstance)
+{
+ Phy_PhyLocalStruct_t *pPhyStruct = &phyLocal[phyInstance];
+ uint8_t phyRegSet = 0;
+#if gMpmIncluded_d
+ phyStatus_t result;
+ int32_t panIdx = MPM_GetPanIndex( pMsg->macInstance );
+
+ phyRegSet = MPM_GetRegSet( panIdx );
+#endif
+
+ if( NULL == pMsg )
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ switch( pMsg->msgType )
+ {
+ case gPlmeEdReq_c:
+ case gPlmeCcaReq_c:
+ MSG_Queue(&phyLocal[phyInstance].macPhyInputQueue, pMsg);
+ Phy24Task( &phyLocal[phyInstance] );
+ break;
+
+ case gPlmeSetReq_c:
+#if gMpmIncluded_d
+ result = MPM_SetPIB(pMsg->msgData.setReq.PibAttribute,
+ &pMsg->msgData.setReq.PibAttributeValue,
+ panIdx );
+ if( !MPM_isPanActive(panIdx) )
+ {
+ return result;
+ }
+#endif
+ return PhyPlmeSetPIBRequest(pMsg->msgData.setReq.PibAttribute, pMsg->msgData.setReq.PibAttributeValue, phyRegSet, phyInstance);
+
+ case gPlmeGetReq_c:
+#if gMpmIncluded_d
+ if( gPhySuccess_c == MPM_GetPIB(pMsg->msgData.getReq.PibAttribute, pMsg->msgData.getReq.pPibAttributeValue, panIdx) )
+ {
+ break;
+ }
+#endif
+ return PhyPlmeGetPIBRequest( pMsg->msgData.getReq.PibAttribute, pMsg->msgData.getReq.pPibAttributeValue, phyRegSet, phyInstance);
+
+ case gPlmeSetTRxStateReq_c:
+ if(gPhySetRxOn_c == pMsg->msgData.setTRxStateReq.state)
+ {
+ if( PhyIsIdleRx(phyInstance) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ }
+ else if( gIdle_c != PhyGetSeqState() )
+ {
+ return gPhyBusy_c;
+ }
+#if gMpmIncluded_d
+ /* If another PAN has the RxOnWhenIdle PIB set, enable the DualPan Auto mode */
+ if( gPhySuccess_c != MPM_PrepareForRx( pMsg->macInstance ) )
+ return gPhyBusy_c;
+#endif
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+ Phy_SetSequenceTiming(pMsg->msgData.setTRxStateReq.startTime,
+ pMsg->msgData.setTRxStateReq.rxDuration);
+
+ return PhyPlmeRxRequest(pMsg->msgData.setTRxStateReq.slottedMode, (phyRxParams_t *) &pPhyStruct->rxParams);
+ }
+ else if (gPhyForceTRxOff_c == pMsg->msgData.setTRxStateReq.state)
+ {
+#if gMpmIncluded_d
+ if( !MPM_isPanActive(panIdx) )
+ return gPhySuccess_c;
+#endif
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+ PhyPlmeForceTrxOffRequest();
+ }
+ break;
+
+ default:
+ return gPhyInvalidPrimitive_c;
+ }
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function programs a new TX sequence
+*
+* \param[in] pMsg Pointer to the PD request message
+* \param[in] pPhyData pointer to PHY data
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+static phyStatus_t Phy_HandlePdDataReq( Phy_PhyLocalStruct_t *pPhyData, macToPdDataMessage_t * pMsg )
+{
+ phyStatus_t status = gPhySuccess_c;
+ uint32_t time;
+
+ if( NULL == pMsg->msgData.dataReq.pPsdu )
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ ProtectFromXcvrInterrupt();
+
+ if( pMsg->msgData.dataReq.startTime != gPhySeqStartAsap_c )
+ {
+ PhyTimeSetEventTrigger( (uint16_t) pMsg->msgData.dataReq.startTime );
+ }
+
+ status = PhyPdDataRequest(&pMsg->msgData.dataReq , &pPhyData->rxParams, &pPhyData->txParams);
+
+ if( pMsg->msgData.dataReq.txDuration != gPhySeqStartAsap_c )
+ {
+ __disable_irq();
+ PhyTimeReadClock( &time );
+ time += pMsg->msgData.dataReq.txDuration;
+ /* Compensate PHY overhead, including WU time */
+ time += 54;
+ PhyTimeSetEventTimeout( &time );
+ __enable_irq();
+ }
+
+ UnprotectFromXcvrInterrupt();
+
+ if( gPhySuccess_c != status )
+ {
+ PhyTimeDisableEventTrigger();
+ PhyTimeDisableEventTimeout();
+ }
+
+ return status;
+}
+
+/*! *********************************************************************************
+* \brief This function sets the start time and the timeout value for a sequence.
+*
+* \param[in] startTime The absolute start time for the sequence.
+* If startTime is gPhySeqStartAsap_c, the start timer is disabled.
+* \param[in] seqDuration The duration of the sequence.
+* If seqDuration is 0xFFFFFFFF, the timeout is disabled.
+*
+********************************************************************************** */
+void Phy_SetSequenceTiming(uint32_t startTime, uint32_t seqDuration)
+{
+ uint32_t endTime;
+
+ __disable_irq();
+
+ if( gPhySeqStartAsap_c == startTime )
+ {
+ PhyTimeReadClock( &endTime );
+ }
+ else
+ {
+ PhyTimeSetEventTrigger( (uint16_t) startTime );
+ endTime = startTime & gPhyTimeMask_c;
+ }
+
+ if( 0xFFFFFFFF != seqDuration )
+ {
+ endTime += seqDuration;
+ endTime = endTime & gPhyTimeMask_c;
+
+ PhyTimeSetEventTimeout( &(endTime) );
+ }
+
+ __enable_irq();
+}
+
+/*! *********************************************************************************
+* \brief This function starts the IdleRX if the PhyRxOnWhenIdle PIB is set
+*
+* \param[in] pPhyData pointer to PHY data
+*
+********************************************************************************** */
+void Phy_EnterIdle( Phy_PhyLocalStruct_t *pPhyData )
+{
+ if( (pPhyData->flags & gPhyFlagRxOnWhenIdle_c)
+#if gMpmIncluded_d
+ /* Prepare the Active PAN/PANs */
+ && (gPhySuccess_c == MPM_PrepareForRx(gInvalidInstanceId_c))
+#endif
+ )
+ {
+ pPhyData->flags |= gPhyFlagIdleRx_c;
+ Phy_SetSequenceTiming( gPhySeqStartAsap_c, mPhyMaxIdleRxDuration_c );
+ (void)PhyPlmeRxRequest( gPhyUnslottedMode_c, (phyRxParams_t*)&pPhyData->rxParams );
+ }
+ else
+ {
+ pPhyData->flags &= ~(gPhyFlagIdleRx_c);
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function sets the value of the maxFrameWaitTime PIB
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] time The maxFrameWaitTime value
+*
+********************************************************************************** */
+void PhyPlmeSetFrameWaitTime( uint32_t time, instanceId_t instanceId )
+{
+ phyLocal[instanceId].maxFrameWaitTime = time;
+}
+
+/*! *********************************************************************************
+* \brief This function sets the state of the PhyRxOnWhenIdle PIB
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] state The PhyRxOnWhenIdle value
+*
+********************************************************************************** */
+void PhyPlmeSetRxOnWhenIdle( bool_t state, instanceId_t instanceId )
+{
+ uint8_t radioState = PhyGetSeqState();
+#if gMpmIncluded_d
+ /* Check if at least one PAN has RxOnWhenIdle set */
+ if( FALSE == state )
+ {
+ uint32_t i;
+
+ for( i=0; i<gMpmMaxPANs_c; i++ )
+ {
+ MPM_GetPIB( gPhyPibRxOnWhenIdle, &state, i );
+ if( state )
+ break;
+ }
+ }
+#endif
+ if( state )
+ {
+ phyLocal[instanceId].flags |= gPhyFlagRxOnWhenIdle_c;
+ if( radioState == gIdle_c)
+ {
+ Phy_EnterIdle( &phyLocal[instanceId] );
+ }
+#if gMpmIncluded_d
+ else if( (radioState == gRX_c) && (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Phy_EnterIdle( &phyLocal[instanceId] );
+ }
+#endif
+ }
+ else
+ {
+ phyLocal[instanceId].flags &= ~gPhyFlagRxOnWhenIdle_c;
+ if( (radioState == gRX_c) && (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ phyLocal[instanceId].flags &= ~gPhyFlagIdleRx_c;
+ }
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function starts the IdleRX if the PhyRxOnWhenIdle PIB is set
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+bool_t PhyIsIdleRx( instanceId_t instanceId )
+{
+ if( (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) && (gRX_c == PhyGetSeqState()))
+ return TRUE;
+
+ return FALSE;
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a TX operation completed successfully.
+* If the received ACK has FP=1, then the radio will enter RX state for
+* maxFrameWaitTime duration.
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] framePending The value of the framePending bit for the received ACK
+*
+********************************************************************************** */
+void Radio_Phy_PdDataConfirm(instanceId_t instanceId, bool_t framePending)
+{
+ PhyTimeDisableEventTimeout();
+
+ if( framePending )
+ {
+ phyLocal[instanceId].flags |= gPhyFlagFramePending_c;
+ if( phyLocal[instanceId].maxFrameWaitTime > 0 )
+ {
+ /* Restart Rx asap if an ACK with FP=1 is received */
+ phyLocal[instanceId].flags &= ~(gPhyFlagIdleRx_c);
+ Phy_SetSequenceTiming( gPhySeqStartAsap_c, phyLocal[instanceId].maxFrameWaitTime );
+ PhyPlmeRxRequest( gPhyUnslottedMode_c, (phyRxParams_t *) &phyLocal[instanceId].rxParams );
+ }
+ }
+ else
+ {
+ phyLocal[instanceId].flags &= ~gPhyFlagFramePending_c;
+ }
+
+ PD_SendMessage(&phyLocal[instanceId], gPdDataCnf_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that new data has been received
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_PdDataIndication(instanceId_t instanceId)
+{
+ PhyTimeDisableEventTimeout();
+
+ PD_SendMessage(&phyLocal[instanceId], gPdDataInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that timer1 compare match occured
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_TimeWaitTimeoutIndication(instanceId_t instanceId)
+{
+ PhyTime_ISR();
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a CCA sequence has finished
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] phyChannelStatus The status of the channel: Idle/Busy
+*
+* \return None.
+*
+********************************************************************************** */
+void Radio_Phy_PlmeCcaConfirm(phyStatus_t phyChannelStatus, instanceId_t instanceId)
+{
+ PhyTimeDisableEventTimeout();
+
+ phyLocal[instanceId].channelParams.channelStatus = phyChannelStatus;
+
+ PLME_SendMessage(&phyLocal[instanceId], gPlmeCcaCnf_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a ED sequence has finished
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] energyLevel The enetgy level on the channel.
+* \param[in] energyLeveldB The energy level in DB
+*
+********************************************************************************** */
+void Radio_Phy_PlmeEdConfirm(uint8_t energyLeveldB, instanceId_t instanceId)
+{
+ PhyTimeDisableEventTimeout();
+
+ phyLocal[instanceId].channelParams.energyLeveldB = energyLeveldB;
+
+ PLME_SendMessage(&phyLocal[instanceId], gPlmeEdCnf_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that the programmed sequence has timed out
+* The Radio is forced to Idle.
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_TimeRxTimeoutIndication(instanceId_t instanceId)
+{
+ if( !(phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
+ PLME_SendMessage(&phyLocal[instanceId], gPlmeTimeoutInd_c);
+
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that the programmed sequence has started
+*
+* \param[in] instanceId The instance of the PHY
+*
+* \return None.
+*
+********************************************************************************** */
+void Radio_Phy_TimeStartEventIndication(instanceId_t instanceId)
+{
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_StartEventInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a SFD was detected.
+* Also, if there is not enough time to receive the entire packet, the
+* RX timeout will be extended.
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] frameLen the length of the PSDU
+*
+********************************************************************************** */
+void Radio_Phy_PlmeRxSfdDetect(instanceId_t instanceId, uint32_t frameLen)
+{
+ if( phyLocal[instanceId].flags & gPhyFlagDeferTx_c )
+ {
+ uint32_t currentTime;
+ uint32_t time;
+
+ __disable_irq();
+
+ //Read currentTime and Timeout values [sym]
+ PhyTimeReadClock(¤tTime);
+
+ frameLen = frameLen * 2 + 12 + 22 + 2; //Convert to symbols and add IFS and ACK duration
+
+ if( mPhySeqTimeout > currentTime )
+ {
+ time = mPhySeqTimeout - currentTime;
+ }
+ else
+ {
+ time = (gPhyTimeMask_c - currentTime + mPhySeqTimeout) & gPhyTimeMask_c;
+ }
+
+ if( time > 4 )
+ {
+ mPhySeqTimeout = (currentTime + frameLen) & gPhyTimeMask_c;
+ MCR20Drv_DirectAccessSPIMultiByteWrite( T3CMP_LSB, (uint8_t *)&mPhySeqTimeout, 3);
+ }
+
+ __enable_irq();
+ }
+
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_RxSfdDetectInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a Sync Loss occured (PLL unlock)
+* The Radio is forced to Idle.
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_PlmeSyncLossIndication(instanceId_t instanceId)
+{
+ PhyPlmeForceTrxOffRequest();
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_SyncLossInd_c);
+#endif
+ Radio_Phy_TimeRxTimeoutIndication(instanceId);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a Filter Fail occured
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_PlmeFilterFailRx(instanceId_t instanceId)
+{
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_FilterFailInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that an unexpected Transceiver Reset
+* occured and force the TRX to Off
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_UnexpectedTransceiverReset(instanceId_t instanceId)
+{
+ PhyPlmeForceTrxOffRequest();
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_UnexpectedRadioResetInd_c);
+#endif
+ Radio_Phy_TimeRxTimeoutIndication(instanceId);
+}
+
+/*! *********************************************************************************
+* \brief Senf a PLME message to upper layer
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] msgType The type of message to be sent
+*
+********************************************************************************** */
+static void PLME_SendMessage(Phy_PhyLocalStruct_t *pPhyStruct, phyMessageId_t msgType)
+{
+ plmeToMacMessage_t * pMsg = MEM_BufferAlloc(sizeof(plmeToMacMessage_t));
+
+ if(NULL == pMsg)
+ {
+ //panic(0,(uint32_t)PLME_SendMessage,0,msgType);
+ return;
+ }
+
+ pMsg->msgType = msgType;
+
+ switch(msgType)
+ {
+ case gPlmeCcaCnf_c:
+ pMsg->msgData.ccaCnf.status = pPhyStruct->channelParams.channelStatus;
+ break;
+
+ case gPlmeEdCnf_c:
+ pMsg->msgData.edCnf.status = gPhySuccess_c;
+ pMsg->msgData.edCnf.energyLeveldB = pPhyStruct->channelParams.energyLeveldB;
+ pMsg->msgData.edCnf.energyLevel = Phy_GetEnergyLevel(pPhyStruct->channelParams.energyLeveldB);
+ break;
+
+ default:
+ /* No aditional info needs to be filled */
+ break;
+ }
+
+ pPhyStruct->PLME_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+}
+
+/*! *********************************************************************************
+* \brief Senf a PD message to upper layer
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] msgType The type of message to be sent
+*
+********************************************************************************** */
+static void PD_SendMessage(Phy_PhyLocalStruct_t *pPhyStruct, phyMessageId_t msgType)
+{
+ pdDataToMacMessage_t *pMsg;
+
+ if( msgType == gPdDataInd_c )
+ {
+ uint32_t temp;
+ uint16_t len = pPhyStruct->rxParams.psduLength - 2; //Excluding FCS (2 bytes);
+
+ pMsg = pPhyStruct->rxParams.pRxData;
+ pPhyStruct->rxParams.pRxData = NULL;
+
+#if !gUsePBTransferThereshold_d
+ MCR20Drv_PB_SPIBurstRead( (uint8_t *)(pMsg->msgData.dataInd.pPsdu), len );
+#endif
+
+ pMsg->msgType = gPdDataInd_c;
+ pMsg->msgData.dataInd.ppduLinkQuality = pPhyStruct->rxParams.linkQuality;
+ pMsg->msgData.dataInd.psduLength = len;
+
+ pMsg->msgData.dataInd.timeStamp = PhyTime_GetTimestamp(); //current timestamp (64bit)
+ temp = (uint32_t)(pMsg->msgData.dataInd.timeStamp & gPhyTimeMask_c); //convert to 24bit
+ pMsg->msgData.dataInd.timeStamp -= (temp - pPhyStruct->rxParams.timeStamp) & gPhyTimeMask_c;
+#if !(gMpmIncluded_d)
+ pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+#else
+ {
+ uint32_t i, bitMask = PhyPpGetPanOfRxPacket();
+
+ for( i=0; i<gMpmPhyPanRegSets_c; i++ )
+ {
+ if( bitMask & (1 << i) )
+ {
+ bitMask &= ~(1 << i);
+ pPhyStruct->currentMacInstance = MPM_GetMacInstanceFromRegSet(i);
+
+ /* If the packet passed filtering on muliple PANs, send a copy to each one */
+ if( bitMask )
+ {
+ pdDataToMacMessage_t *pDataIndCopy;
+
+ pDataIndCopy = MEM_BufferAlloc(sizeof(pdDataToMacMessage_t) + len);
+
+ if( pDataIndCopy )
+ {
+ FLib_MemCpy(pDataIndCopy, pMsg, sizeof(pdDataToMacMessage_t) + len);
+ pPhyStruct->PD_MAC_SapHandler(pDataIndCopy, pPhyStruct->currentMacInstance);
+ }
+ }
+ else
+ {
+ pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+ break;
+ }
+ }
+ }
+ }
+#endif
+ }
+ else
+ {
+ pMsg = MEM_BufferAlloc( sizeof(pdDataToMacMessage_t) );
+
+ if(NULL == pMsg)
+ {
+ //panic(0,(uint32_t)PD_SendMessage,0,gPdDataCnf_c);
+ return;
+ }
+
+ pMsg->msgType = gPdDataCnf_c;
+
+ if( pPhyStruct->flags & gPhyFlagFramePending_c )
+ {
+ pPhyStruct->flags &= ~(gPhyFlagFramePending_c);
+ pMsg->msgData.dataCnf.status = gPhyFramePending_c;
+ }
+ else
+ {
+ pMsg->msgData.dataCnf.status = gPhySuccess_c;
+ }
+
+ pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+ }
+}
+
+void MSG_InitQueue(macPhyInputQueue_t * pMacPhyQueue)
+{
+ pMacPhyQueue->msgInIdx = 0;
+ FLib_MemSet(&pMacPhyQueue->pMsgIn[0], 0x00, gPhyMsgQueueMax_c * sizeof(void*));
+}
+
+/* Check if a message is pending in a queue. Returns */
+/* TRUE if any pending messages, and FALSE otherwise. */
+bool_t MSG_Pending(macPhyInputQueue_t * pMacPhyQueue)
+{
+ return (pMacPhyQueue->msgInIdx > 0);
+}
+
+/* Get a message from a queue. Returns NULL if no messages in queue. */
+void * MSG_DeQueue(macPhyInputQueue_t * pMacPhyQueue)
+{
+ phyMessageHeader_t * pMsgIn = NULL;
+ uint32_t i = 0;
+
+ if(MSG_Pending(pMacPhyQueue))
+ {
+ pMsgIn = pMacPhyQueue->pMsgIn[0];
+
+ while(i < pMacPhyQueue->msgInIdx)
+ {
+ pMacPhyQueue->pMsgIn[i] = pMacPhyQueue->pMsgIn[i+1];
+ i++;
+ }
+
+ pMacPhyQueue->msgInIdx--;
+ pMacPhyQueue->pMsgIn[pMacPhyQueue->msgInIdx] = NULL;
+ }
+
+ return pMsgIn;
+}
+
+
+void MSG_Queue(macPhyInputQueue_t * pMacPhyQueue, void * pMsgIn)
+{
+ if(pMacPhyQueue->msgInIdx < gPhyMsgQueueMax_c)
+ {
+ pMacPhyQueue->pMsgIn[pMacPhyQueue->msgInIdx] = pMsgIn;
+ pMacPhyQueue->msgInIdx++;
+ }
+}
+
+void MSG_QueueHead(macPhyInputQueue_t * pMacPhyQueue, void * pMsgIn)
+{
+ uint32_t i = gPhyMsgQueueMax_c - 1;
+
+ if(pMacPhyQueue->msgInIdx < gPhyMsgQueueMax_c)
+ {
+ while(i > 0)
+ {
+ pMacPhyQueue->pMsgIn[i] = pMacPhyQueue->pMsgIn[i-1];
+ i--;
+ }
+ pMacPhyQueue->pMsgIn[0] = pMsgIn;
+ pMacPhyQueue->msgInIdx++;
+ }
+}
+
+
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/PhyTime.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,704 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyTime.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+
+//#include "FunctionLib.h"
+//#include "arm_hal_interrupt.h"
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#define gPhyTimeMinSetupTime_c (10) /* symbols */
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+void (*gpfPhyTimeNotify)(void) = NULL;
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+static phyTimeEvent_t mPhyTimers[gMaxPhyTimers_c];
+static phyTimeEvent_t *pNextEvent;
+volatile uint32_t mPhySeqTimeout;
+volatile uint64_t gPhyTimerOverflow;
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+static void PhyTime_OverflowCB( uint32_t param );
+static phyTimeEvent_t* PhyTime_GetNextEvent( void );
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief Sets the start time of a sequence
+*
+* \param[in] startTime the start time for a sequence
+*
+********************************************************************************** */
+void PhyTimeSetEventTrigger
+(
+ uint32_t startTime
+)
+{
+ uint8_t phyReg, phyCtrl3Reg;
+
+ __disable_irq();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= cPHY_CTRL1_TMRTRIGEN; // enable autosequence start by TC2 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyCtrl3Reg &= ~(cPHY_CTRL3_TMR2CMP_EN);// disable TMR2 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T2PRIMECMP_LSB, (uint8_t *) &startTime, 2);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change other IRQs status
+ phyReg &= ~(cIRQSTS3_TMR2MSK); // unmask TMR2 interrupt
+ phyReg |= (cIRQSTS3_TMR2IRQ); // aknowledge TMR2 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ // TC2PRIME_EN must be enabled in PHY_CTRL4 register
+ phyCtrl3Reg |= cPHY_CTRL3_TMR2CMP_EN; // enable TMR2 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ __enable_irq();
+}
+
+/*! *********************************************************************************
+* \brief Disable the time trigger for a sequence.
+*
+* \remarks The sequence will start asap
+*
+********************************************************************************** */
+void PhyTimeDisableEventTrigger
+(
+ void
+)
+{
+ uint8_t phyReg;
+
+ __disable_irq();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg &= ~(cPHY_CTRL1_TMRTRIGEN); // disable autosequence start by TC2 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR2CMP_EN);// disable TMR2 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change other IRQs status
+ phyReg |= (cIRQSTS3_TMR2MSK); // mask TMR2 interrupt
+ phyReg |= (cIRQSTS3_TMR2IRQ); // aknowledge TMR2 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ __enable_irq();
+}
+
+/*! *********************************************************************************
+* \brief Sets the timeout value for a sequence
+*
+* \param[in] pEndTime the absolute time when a sequence should terminate
+*
+* \remarks If the sequence does not finish until the timeout, it will be aborted
+*
+********************************************************************************** */
+void PhyTimeSetEventTimeout
+(
+ uint32_t *pEndTime
+)
+{
+ uint8_t phyReg, phyCtrl3Reg;
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pEndTime)
+ {
+ return;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ __disable_irq();
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyCtrl3Reg &= ~(cPHY_CTRL3_TMR3CMP_EN);// disable TMR3 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyReg |= cPHY_CTRL4_TC3TMOUT; // enable autosequence stop by TC3 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
+
+ mPhySeqTimeout = *pEndTime & 0x00FFFFFF;
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T3CMP_LSB, (uint8_t *) pEndTime, 3);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change IRQ status
+// phyReg &= ~(cIRQSTS3_TMR3MSK); // unmask TMR3 interrupt
+ phyReg |= (cIRQSTS3_TMR3IRQ); // aknowledge TMR3 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ phyCtrl3Reg |= cPHY_CTRL3_TMR3CMP_EN; // enable TMR3 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ __enable_irq();
+}
+
+/*! *********************************************************************************
+* \brief Return the timeout value for the current sequence
+*
+* \return uint32_t the timeout value
+*
+********************************************************************************** */
+uint32_t PhyTimeGetEventTimeout( void )
+{
+ return mPhySeqTimeout;
+}
+
+/*! *********************************************************************************
+* \brief Disables the sequence timeout
+*
+********************************************************************************** */
+void PhyTimeDisableEventTimeout
+(
+ void
+)
+{
+ uint8_t phyReg;
+
+ __disable_irq();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyReg &= ~(cPHY_CTRL4_TC3TMOUT); // disable autosequence stop by TC3 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR3CMP_EN);// disable TMR3 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change IRQ status
+ phyReg |= cIRQSTS3_TMR3IRQ; // aknowledge TMR3 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ __enable_irq();
+}
+
+/*! *********************************************************************************
+* \brief Reads the absolute clock from the radio
+*
+* \param[out] pRetClk pointer to a location where the current clock will be stored
+*
+********************************************************************************** */
+void PhyTimeReadClock
+(
+ uint32_t *pRetClk
+)
+{
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pRetClk)
+ {
+ return;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ __disable_irq();
+
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) EVENT_TMR_LSB, (uint8_t *) pRetClk, 3);
+ *(((uint8_t *)pRetClk) + 3) = 0;
+
+ __enable_irq();
+
+}
+
+/*! *********************************************************************************
+* \brief Initialize the Event Timer
+*
+* \param[in] pAbsTime pointer to the location where the new time is stored
+*
+********************************************************************************** */
+void PhyTimeInitEventTimer
+(
+ uint32_t *pAbsTime
+)
+{
+ uint8_t phyCtrl4Reg;
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pAbsTime)
+ {
+ return;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ __disable_irq();
+
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyCtrl4Reg |= cPHY_CTRL4_TMRLOAD; // self clearing bit
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T1CMP_LSB, (uint8_t *) pAbsTime, 3);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
+
+ __enable_irq();
+}
+
+/*! *********************************************************************************
+* \brief Set TMR1 timeout value
+*
+* \param[in] pWaitTimeout the timeout value
+*
+********************************************************************************** */
+void PhyTimeSetWaitTimeout
+(
+ uint32_t *pWaitTimeout
+)
+{
+ uint8_t phyCtrl3Reg, irqSts3Reg;
+
+ __disable_irq();
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyCtrl3Reg &= ~(cPHY_CTRL3_TMR1CMP_EN);// disable TMR1 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T1CMP_LSB, (uint8_t *) pWaitTimeout, 3);
+
+ irqSts3Reg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ irqSts3Reg &= ~(cIRQSTS3_TMR1MSK); // unmask TMR1 interrupt
+ irqSts3Reg &= 0xF0; // do not change other IRQs status
+ irqSts3Reg |= (cIRQSTS3_TMR1IRQ); // aknowledge TMR1 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, irqSts3Reg);
+
+ phyCtrl3Reg |= cPHY_CTRL3_TMR1CMP_EN; // enable TMR1 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ __enable_irq();
+
+}
+
+/*! *********************************************************************************
+* \brief Disable the TMR1 timeout
+*
+********************************************************************************** */
+void PhyTimeDisableWaitTimeout
+(
+ void
+)
+{
+ uint8_t phyReg;
+
+ __disable_irq();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR1CMP_EN);// disable TMR1 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change IRQ status
+ phyReg |= cIRQSTS3_TMR1IRQ; // aknowledge TMR1 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ __enable_irq();
+}
+
+/*! *********************************************************************************
+* \brief Set TMR4 timeout value
+*
+* \param[in] pWakeUpTime absolute time
+*
+********************************************************************************** */
+void PhyTimeSetWakeUpTime
+(
+ uint32_t *pWakeUpTime
+)
+{
+ uint8_t phyCtrl3Reg, irqSts3Reg;
+
+ __disable_irq();
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+// phyCtrl3Reg &= ~(cPHY_CTRL3_TMR4CMP_EN);// disable TMR4 compare
+// MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T4CMP_LSB, (uint8_t *) pWakeUpTime, 3);
+
+ irqSts3Reg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ irqSts3Reg &= ~(cIRQSTS3_TMR4MSK); // unmask TMR4 interrupt
+ irqSts3Reg &= 0xF0; // do not change other IRQs status
+ irqSts3Reg |= (cIRQSTS3_TMR4IRQ); // aknowledge TMR4 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, irqSts3Reg);
+
+ phyCtrl3Reg |= cPHY_CTRL3_TMR4CMP_EN; // enable TMR4 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ __enable_irq();
+}
+
+/*! *********************************************************************************
+* \brief Check if TMR4 IRQ occured, and aknowledge it
+*
+* \return TRUE if TMR4 IRQ occured
+*
+********************************************************************************** */
+bool_t PhyTimeIsWakeUpTimeExpired
+(
+ void
+)
+{
+ bool_t wakeUpIrq = FALSE;
+ uint8_t phyReg;
+
+ __disable_irq();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR4CMP_EN);// disable TMR4 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+
+ if( (phyReg & cIRQSTS3_TMR4IRQ) == cIRQSTS3_TMR4IRQ )
+ {
+ wakeUpIrq = TRUE;
+ }
+
+ phyReg &= ~(cIRQSTS3_TMR4MSK); // unmask TMR4 interrupt
+ phyReg &= 0xF0; // do not change other IRQs status
+ phyReg |= (cIRQSTS3_TMR4IRQ); // aknowledge TMR2 IRQ
+
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ __enable_irq();
+
+ return wakeUpIrq;
+}
+
+
+/*! *********************************************************************************
+* \brief PHY Timer Interrupt Service Routine
+*
+********************************************************************************** */
+void PhyTime_ISR(void)
+{
+ if( pNextEvent->callback == PhyTime_OverflowCB )
+ {
+ gPhyTimerOverflow++;
+ }
+
+ if( gpfPhyTimeNotify )
+ {
+ gpfPhyTimeNotify();
+ }
+ else
+ {
+ PhyTime_RunCallback();
+ PhyTime_Maintenance();
+ }
+}
+
+/*! *********************************************************************************
+* \brief Initialize the PHY Timer module
+*
+* \return phyTimeStatus_t
+*
+********************************************************************************** */
+phyTimeStatus_t PhyTime_TimerInit( void (*cb)(void) )
+{
+ if( gpfPhyTimeNotify )
+ return gPhyTimeError_c;
+
+ gpfPhyTimeNotify = cb;
+ gPhyTimerOverflow = 0;
+ FLib_MemSet( mPhyTimers, 0, sizeof(mPhyTimers) );
+
+ /* Schedule Overflow Calback */
+ pNextEvent = &mPhyTimers[0];
+ pNextEvent->callback = PhyTime_OverflowCB;
+ pNextEvent->timestamp = (gPhyTimerOverflow+1) << gPhyTimeShift_c;
+ PhyTimeSetWaitTimeout( (uint32_t*)&pNextEvent->timestamp );
+
+ return gPhyTimeOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Returns a 64bit timestamp value to be used by the MAC Layer
+*
+* \return phyTimeTimestamp_t PHY timestamp
+*
+********************************************************************************** */
+phyTimeTimestamp_t PhyTime_GetTimestamp(void)
+{
+ phyTimeTimestamp_t time = 0;
+
+ __disable_irq();
+ PhyTimeReadClock( (uint32_t*)&time );
+ time |= (gPhyTimerOverflow << gPhyTimeShift_c);
+ __enable_irq();
+
+ return time;
+}
+
+/*! *********************************************************************************
+* \brief Schedules an event
+*
+* \param[in] pEvent event to be scheduled
+*
+* \return phyTimeTimerId_t the id of the alocated timer
+*
+********************************************************************************** */
+phyTimeTimerId_t PhyTime_ScheduleEvent( phyTimeEvent_t *pEvent )
+{
+ phyTimeTimerId_t tmr;
+
+ /* Parameter validation */
+ if( NULL == pEvent->callback )
+ {
+ return gInvalidTimerId_c;
+ }
+
+ /* Search for a free slot (slot 0 is reserved for the Overflow calback) */
+ __disable_irq();
+ for( tmr=1; tmr<gMaxPhyTimers_c; tmr++ )
+ {
+ if( mPhyTimers[tmr].callback == NULL )
+ {
+ mPhyTimers[tmr] = *pEvent;
+ break;
+ }
+ }
+ __enable_irq();
+
+ if( tmr >= gMaxPhyTimers_c )
+ return gInvalidTimerId_c;
+
+ /* Program the next event */
+ if((NULL == pNextEvent) ||
+ (NULL != pNextEvent && mPhyTimers[tmr].timestamp < pNextEvent->timestamp))
+ {
+ PhyTime_Maintenance();
+ }
+
+ return tmr;
+}
+
+/*! *********************************************************************************
+* \brief Cancel an event
+*
+* \param[in] timerId the Id of the timer
+*
+* \return phyTimeStatus_t
+*
+********************************************************************************** */
+phyTimeStatus_t PhyTime_CancelEvent( phyTimeTimerId_t timerId )
+{
+ if( (timerId == 0) || (timerId >= gMaxPhyTimers_c) || (NULL == mPhyTimers[timerId].callback) )
+ {
+ return gPhyTimeNotFound_c;
+ }
+
+ __disable_irq();
+ if( pNextEvent == &mPhyTimers[timerId] )
+ pNextEvent = NULL;
+
+ mPhyTimers[timerId].callback = NULL;
+ __enable_irq();
+
+ return gPhyTimeOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Cancel all event with the specified paameter
+*
+* \param[in] param event parameter
+*
+* \return phyTimeStatus_t
+*
+********************************************************************************** */
+phyTimeStatus_t PhyTime_CancelEventsWithParam ( uint32_t param )
+{
+ uint32_t i;
+ phyTimeStatus_t status = gPhyTimeNotFound_c;
+
+ __disable_irq();
+ for( i=1; i<gMaxPhyTimers_c; i++ )
+ {
+ if( mPhyTimers[i].callback && (param == mPhyTimers[i].parameter) )
+ {
+ status = gPhyTimeOk_c;
+ mPhyTimers[i].callback = NULL;
+ if( pNextEvent == &mPhyTimers[i] )
+ pNextEvent = NULL;
+ }
+ }
+ __enable_irq();
+
+ return status;
+}
+
+/*! *********************************************************************************
+* \brief Run the callback for the recently expired event
+*
+********************************************************************************** */
+void PhyTime_RunCallback( void )
+{
+ uint32_t param;
+ phyTimeCallback_t cb;
+
+ if( pNextEvent )
+ {
+ __disable_irq();
+
+ param = pNextEvent->parameter;
+ cb = pNextEvent->callback;
+ pNextEvent->callback = NULL;
+ pNextEvent = NULL;
+
+ __enable_irq();
+
+ cb(param);
+ }
+}
+
+/*! *********************************************************************************
+* \brief Expire events too close to be scheduled.
+* Program the next event
+*
+********************************************************************************** */
+void PhyTime_Maintenance( void )
+{
+ phyTimeTimestamp_t currentTime;
+ phyTimeEvent_t *pEv;
+
+ PhyTimeDisableWaitTimeout();
+
+ while(1)
+ {
+ __disable_irq();
+
+ pEv = PhyTime_GetNextEvent();
+ currentTime = PhyTime_GetTimestamp();
+
+ /* Program next event if exists */
+ if( pEv )
+ {
+ pNextEvent = pEv;
+
+ if( pEv->timestamp > (currentTime + gPhyTimeMinSetupTime_c) )
+ {
+ PhyTimeSetWaitTimeout( (uint32_t*)&pEv->timestamp );
+ pEv = NULL;
+ }
+ }
+
+ __enable_irq();
+
+ if( !pEv )
+ break;
+
+ PhyTime_RunCallback();
+ }
+
+}
+
+
+/*! *********************************************************************************
+* \brief Timer Overflow callback
+*
+* \param[in] param
+*
+********************************************************************************** */
+static void PhyTime_OverflowCB( uint32_t param )
+{
+ (void)param;
+
+ /* Reprogram the next overflow callback */
+ mPhyTimers[0].callback = PhyTime_OverflowCB;
+ mPhyTimers[0].timestamp = (gPhyTimerOverflow+1) << 24;
+}
+
+/*! *********************************************************************************
+* \brief Search for the next event to be scheduled
+*
+* \return phyTimeEvent_t pointer to the next event to be scheduled
+*
+********************************************************************************** */
+static phyTimeEvent_t* PhyTime_GetNextEvent( void )
+{
+ phyTimeEvent_t *pEv = NULL;
+ uint32_t i;
+
+ /* Search for the next event to be serviced */
+ for( i=0; i<gMaxPhyTimers_c; i++ )
+ {
+ if( NULL != mPhyTimers[i].callback )
+ {
+ if( NULL == pEv )
+ {
+ pEv = &mPhyTimers[i];
+ }
+ /* Check which event expires first */
+ else if( mPhyTimers[i].timestamp < pEv->timestamp )
+ {
+ pEv = &mPhyTimers[i];
+ }
+ }
+ }
+
+ return pEv;
+}
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/PhyTypes.h Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,364 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyTypes.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _PHY_TYPES_H
+#define _PHY_TYPES_H
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/* WARNING!!! Only one frequency can be declared at a time! */
+#ifdef gPHY_802_15_4g_d
+ #ifndef gFreqBand_470__510MHz_d
+ #define gFreqBand_470__510MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_779__787MHz_d
+ #define gFreqBand_779__787MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_863__870MHz_d
+ #define gFreqBand_863__870MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_902__928MHz_d
+ #define gFreqBand_902__928MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_920__928MHz_d
+ #define gFreqBand_920__928MHz_d 1
+ #endif
+
+ #ifndef gFreqBand_863__876MHz_d
+ #define gFreqBand_863__876MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_915__921MHz_d
+ #define gFreqBand_915__921MHz_d 0
+ #endif
+
+ #if gFreqBand_470__510MHz_d
+ #define gFreqBandId_d gFreq470__510MHz_c
+
+ #elif gFreqBand_779__787MHz_d
+ #define gFreqBandId_d gFreq779__787MHz_c
+
+ #elif gFreqBand_863__870MHz_d
+ #define gFreqBandId_d gFreq863__870MHz_c
+
+ #elif gFreqBand_902__928MHz_d
+ #define gFreqBandId_d gFreq902__928MHz_c
+
+ #elif gFreqBand_920__928MHz_d
+ #define gFreqBandId_d gFreq920__928MHz_c
+
+ #elif gFreqBand_863__876MHz_d
+ #define gFreqBandId_d gFreq863__876MHz_c
+
+ #elif gFreqBand_915__921MHz_d
+ #define gFreqBandId_d gFreq915__921MHz_c
+
+ #else
+ #error "No frequency band declared!!!"
+ #endif
+#endif // gPHY_802_15_4g_d
+
+/// \note MUST REMAIN UNCHANGED:
+#ifdef gPHY_802_15_4g_d
+ #define gPhySymbolsPerOctet_c 8
+ #define gPhyMRFSKPHRLength_c 2 /* [bytes] */
+#if (gFreqBand_863__876MHz_d || gFreqBand_915__921MHz_d)
+ #define gPhyFSKPreambleLength_c 8 /* [bytes] */
+#else
+ #define gPhyFSKPreambleLength_c 16 /* [bytes] */
+#endif
+ #define gPhyMRFSKSFDLength_c 2 /* [bytes] */
+ #define gMinPHYPacketSize_c 5
+ #define gMaxPHYPacketSize_c 254 /* maximum number of bytes that the PHY can transmit or receive */
+ #define gPhyFCSSize_c 2 /* [bytes] */
+ #define gCCADurationDefault_c 13 /* [symbols] */
+ #define gPhySHRDuration_c (gPhySymbolsPerOctet_c * (gPhyFSKPreambleLength_c + gPhyMRFSKSFDLength_c)) /* [symbols] */
+ #define gPhyMaxFrameDuration_c (gPhySHRDuration_c + (gPhyMRFSKPHRLength_c + gMaxPHYPacketSize_c) * gPhySymbolsPerOctet_c) /* [symbols] 802.15.4g page 48 formula */
+#else
+ #define gCCATime_c 8 /* [symbols] */
+ #define gPhyTurnaroundTime_c 12 /* [symbols] RX-to-TX or TX-to-RX maximum turnaround time (in symbol periods)*/
+ #define gMinPHYPacketSize_c 5
+ #define gMaxPHYPacketSize_c (127) /* maximum number of bytes that the PHY can transmit or receive */
+ #define gPhySHRDuration_c (10) /* [symbols] */
+ #define gPhySymbolsPerOctet_c (2)
+ #define gPhyFCSSize_c (2) /* [bytes] */
+ #define gPhyMaxFrameDuration_c (gPhySHRDuration_c + (gMaxPHYPacketSize_c + 1) * gPhySymbolsPerOctet_c)
+ #define gUnitBackoffPeriod_c 20 /* [symbols] */
+#endif // gPHY_802_15_4g_d
+
+// Phy flags
+#define gPhyFlagRxOnWhenIdle_c (1 << 0)
+#define gPhyFlagFramePending_c (1 << 1)
+#define gPhyFlagIdleRx_c (1 << 2)
+#define gPhyFlagDeferTx_c (1 << 3)
+
+#ifdef gPHY_802_15_4g_d
+#ifndef gAfcRxTimeout_c
+#define gAfcRxTimeout_c gPhySHRDuration_c /* [symbols] */
+#endif
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public prototypes
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+typedef enum
+{
+ gPhyChannelBusy_c = 0x00, /*The CCA attempt has detected a busy channel.*/
+ gPhyBusyRx_c = 0x01, /*The transceiver is asked to change its state while receiving.*/
+ gPhyBusyTx_c = 0x02, /*The transceiver is asked to change its state while transmitting.*/
+ gPhyChannelIdle_c = 0x04, /*The CCA attempt has detected an idle channel.*/
+ gPhyInvalidParameter_c = 0x05, /*A SET request was issued with a parameter in the primitive that is out of the valid range.*/
+ gPhyRxOn_c = 0x06, /*The transceiver is in the receiver enabled state.*/
+ gPhySuccess_c = 0x07, /*A SET/GET, an ED operation, a data request, an indirect queue insert, or a transceiver state change was successful.*/
+ gPhyTRxOff_c = 0x08, /*The transceiver is in the transceiver disabled state.*/
+ gPhyTxOn_c = 0x09, /*The transceiver is in the transmitter enabled state.*/
+ gPhyUnsupportedAttribute_c = 0x0a, /*A SET/GET request was issued with the identifier of an attribute that is not supported.*/
+ gPhyReadOnly_c = 0x0b, /*A SET request was issued with the identifier of an attribute that is read-only.*/
+ gPhyIndexUsed_c = 0x11, /*The indirect queue insert operation has detected an used index.*/
+ gPhyNoAck_c = 0x14, /*No ACK was received for the last transmission.*/
+ gPhyFramePending_c = 0x15, /*The ACK of a Data Request frame indicates a pending frame in the coordinators indirect TX queue.*/
+ gPhyBusy_c = 0xF1, //
+ gPhyInvalidPrimitive_c = 0xF2 //
+}phyStatus_t;
+
+typedef enum
+{
+ gPhySlottedMode_c = 0x0c,
+ gPhyUnslottedMode_c = 0x0d
+}phySlottedMode_t;
+
+typedef enum
+{
+ gPhyEnergyDetectMode_c = 0x00,
+ gPhyCCAMode1_c = 0x01,
+ gPhyCCAMode2_c = 0x02,
+ gPhyCCAMode3_c = 0x03,
+ gPhyNoCCABeforeTx_c = 0x04
+}phyCCAType_t;
+
+typedef enum
+{
+ gPhyContCcaEnabled = 0x00,
+ gPhyContCcaDisabled
+}phyContCCAMode_t;
+
+typedef enum
+{
+ gPhyForceTRxOff_c = 0x03, /*The transceiver is to be switched off immediately.*/
+ gPhySetRxOn_c = 0x12, /*The transceiver is to be configured into the receiver enabled state.*/
+ gPhySetTRxOff_c = 0x13, /*The transceiver is to be configured into the transceiver disabled state.*/
+}phyState_t;
+
+typedef enum
+{
+ gPhyRxAckRqd_c = 0x00, /*A receive Ack frame is expected to follow the transmit frame (non-Ack frames are rejected)*/
+ gPhyNoAckRqd_c = 0x01, /*An ordinary receive frame (any type of frame) follows the transmit frame*/
+#ifdef gPHY_802_15_4g_d
+ gPhyEnhancedAckReq = 0x02
+#endif // gPHY_802_15_4g_d
+}phyAckRequired_t;
+
+typedef enum
+{
+ gPhyPibCurrentChannel_c = 0x00, /*The channel currently used.*/
+ gPhyPibCurrentPage_c = 0x01, /*The channel page currently used.*/
+ gPhyPibTransmitPower_c = 0x02, /*The power used for TX operations.*/
+ gPhyPibLongAddress_c = 0x03, /*The MAC long address to be used by the PHYs source address matching feature.*/
+ gPhyPibShortAddress_c = 0x04, /*The MAC short address to be used by the PHYs source address matching feature.*/
+ gPhyPibPanId_c = 0x05, /*The MAC PAN ID to be used by the PHYs source address matching feature.*/
+ gPhyPibPanCoordinator_c = 0x06, /*Indicates if the device is a PAN coordinator or not.*/
+ gPhyPibSrcAddrEnable_c = 0x07, /*Enables or disables the PHYs source address matching feature.*/
+ gPhyPibPromiscuousMode_c = 0x08, /*Selects between normal, promiscuous and active promiscuous mode.*/
+ gPhyPibAutoAckEnable_c = 0x09, /*Enables or disables automatic transmission of ACK frames.*/
+ gPhyPibFrameVersion_c = 0x0A, /*Used in checking for allowed frame versions (0x00 - any version accepted, 0x01 - accept Frame Version 0 packets (2003 compliant), 0x02 - accept Frame Version 1 packets (2006 compliant), 0x03 - accept Frame Version 0 and 1 packets).*/
+ gPhyPibFrameEnable_c = 0x0B, /*Used for enabling or disabling reception of MAC frames.*/
+ gPhyPibAckFramePending_c = 0x0C, /*Used to copy its contents to the outgoing ACK frame's Frame Pending field as a response to a received Data Request frame with Source Address Matching disabled.*/
+ gPhyPibRxOnWhenIdle = 0x0D, /*Enable RX when the radio is IDLE*/
+ gPhyPibFrameWaitTime_c = 0x0E, /*The number of symbols the Rx should be on after receiving an ACK with FP=1 */
+ gPhyPibDeferTxIfRxBusy_c = 0x0F,
+#ifdef gPHY_802_15_4g_d
+ gPhyPibPhyModeSupported_c = 0x10,
+ gPhyPibCurrentMode_c = 0x11,
+ gPhyPibFSKPreambleRepetitions_c = 0x12,
+ gPhyPibFSKScramblePSDU_c = 0x13,
+ gPhyPibCCADuration_c = 0x14,
+ gPhyPibCSLRxEnabled_c = 0x15,
+ gPhyPibCSLTxEnabled_c = 0x16,
+ gPhyPibFreqBandId_c = 0x17,
+ gPhyPibAckWaitDuration_c = 0x18
+#endif // gPHY_802_15_4g_d
+}phyPibId_t;
+
+typedef struct phyFlags_tag
+{
+ union{
+ uint32_t mask;
+ struct{
+ uint32_t rxOnWhenIdle :1;
+ uint32_t rxFramePending :1;
+ uint32_t idleRx :1;
+#ifdef gPHY_802_15_4g_d
+ uint32_t slotted :1;
+ uint32_t ccaBfrTX :1;
+ uint32_t rxAckRqd :1;
+ uint32_t autoAck :1;
+ uint32_t panCordntr :1;
+ uint32_t promiscuous :1;
+ uint32_t activePromiscuous :1;
+ uint32_t cslRxEnabled :1;
+ uint32_t cslTxEnabled :1;
+ uint32_t rxEnhAckRqd :1;
+ uint32_t ccaEdScan :1; // set for a CCA or ED request
+ uint32_t ccaComplete :1; // set when a CCA period is over
+ uint32_t waitTurnaroundComplete :1; // set when a Auto ACK send or receive sequence started
+ uint32_t reserved :16;
+#else
+ uint32_t phyState :3;
+ uint32_t reserved :26;
+#endif // gPHY_802_15_4g_d
+ };
+ };
+}phyFlags_t;
+
+#define gInvalidTimerId_c (gMaxPhyTimers_c)
+
+#ifdef gPHY_802_15_4g_d
+#define gPhyTimeShift_c (16) // 16bit hw timer
+#define gPhyTimeMask_c (0x000000000000FFFF)
+#else
+#define gPhyTimeShift_c (24) // 24bit hw timer
+#define gPhyTimeMask_c (0x00FFFFFF)
+#endif
+
+typedef uint8_t phyTimeTimerId_t;
+typedef uint64_t phyTimeTimestamp_t;
+
+#ifdef gPHY_802_15_4g_d
+typedef uint64_t phyTime_t;
+#else
+typedef uint32_t phyTime_t;
+#endif
+
+typedef void (*phyTimeCallback_t) ( uint32_t param );
+
+typedef enum
+{
+ gPhyTimeOk_c = 0x00,
+ gPhyTimeAlreadyPassed_c = 0x01,
+ gPhyTimeTooClose_c = 0x02,
+ gPhyTimeTooMany_c = 0x03,
+ gPhyTimeInvalidParameter_c = 0x04,
+ gPhyTimeNotFound_c = 0x05,
+ gPhyTimeError_c = 0x06
+}phyTimeStatus_t;
+
+#ifdef gPHY_802_15_4g_d
+typedef struct phyPHR_tag
+{
+ union{
+ uint16_t mask;
+ uint8_t byteAccess[2];
+ struct{
+ uint8_t modeSwitch :1;
+ uint8_t reserved :2;
+ uint8_t fcsType :1;
+ uint8_t dataWhitening :1;
+ uint8_t frameLengthRsvd :3; // Max psdu 254
+ uint8_t frameLength;
+ };
+ };
+}phyPHR_t;
+
+typedef enum{
+ gPhyMode1_c = 0x00,
+ gPhyMode2_c = 0x01,
+ gPhyMode3_c = 0x02,
+ gPhyMode4_c = 0x03,
+ gPhyMode1ARIB_c = 0x04,
+ gPhyMode2ARIB_c = 0x05,
+ gPhyMode3ARIB_c = 0x06,
+}phyMode_t;
+
+//802.15.4g MAC sub-1GHz frequency bands
+typedef enum{
+ gFreq470__510MHz_c = 0x02, // 470-510 (China)
+ gFreq779__787MHz_c = 0x03, // 779-787 (China)
+ gFreq863__870MHz_c = 0x04, // 863-870 (Europe)
+ gFreq902__928MHz_c = 0x07, // 902-928 (U.S.)
+ gFreq920__928MHz_c = 0x09, // 920-928 (Japan) - Includes ARIB modes
+ gFreq863__876MHz_c = 0x0E, // 863-876 (UK) custom mode
+ gFreq915__921MHz_c = 0x0F, // 915-921 (UK) custom mode
+}phyFreqBand_t;
+
+#ifndef gPhyModeDefault_d
+#define gPhyModeDefault_d gPhyMode1_c
+#endif
+
+#endif // gPHY_802_15_4g_d
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+#endif /* _PHY_TYPES_H */
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/driverRFinterface.c Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,447 @@
+/*
+ * driverRFinterface.c
+ *
+ * Created on: 12 March 2015
+ * Author: mBed Team
+ */
+
+#include "EmbeddedTypes.h"
+#include "Phy.h"
+#include "driverRFinterface.h"
+
+#if 0
+#include "arm_hal_interrupt.h"
+#include "arm_hal_phy.h"
+
+static uint8_t fsl_MAC[8];
+static phy_device_driver_s device_driver;
+static phy_device_channel_info_s channel_info;
+
+static uint8_t rf_channel;
+static int8_t rf_radio_driver_id = -1;
+
+static uint8_t mac_tx_handle = 0;
+static uint8_t tx_sequence = 0xff;
+static macToPdDataMessage_t *pPdSapMsg = NULL;
+
+ /*
+ * \brief Function sets the MAC address array.
+ *
+ * \param ptr Pointer to given MAC address array
+ *
+ * \return none
+ */
+void rf_set_mac_address(const uint8_t *ptr)
+{
+ memcpy(fsl_MAC,ptr,8);
+}
+
+/*
+ * \brief Function initialises and registers the RF driver.
+ *
+ * \param none
+ *
+ * \return rf_radio_driver_id Driver ID given by NET library
+ */
+int8_t rf_device_register(void)
+{
+ //rf_init();
+
+ Phy_Init();
+ Phy_RegisterSapHandlers( (PD_MAC_SapHandler_t)PD_PLME_MAC_SapHandler,
+ (PLME_MAC_SapHandler_t)PD_PLME_MAC_SapHandler,
+ 0);
+ PhyPlmeSetPwrState( gPhyPwrAutodoze_c );
+ PhyPlmeSetRxOnWhenIdle( TRUE, 0 );
+ PhyPpSetPromiscuous(0);
+
+ /*Set pointer to MAC address*/
+ device_driver.PHY_MAC = fsl_MAC;
+ device_driver.driver_description = "FSL_MAC";
+#if PHY_LINK_15_4_2_4GHZ_TYPE
+ /*Number of channels in PHY*/
+ channel_info.channel_count = 16;
+ /*Channel mask 26-11*/
+ channel_info.channel_mask = 0x07FFF800;
+ /*Type of RF PHY is SubGHz*/
+ device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
+ device_driver.link_channel_info = &channel_info;
+#else
+ /*Number of channels in PHY*/
+ channel_info.channel_count = 11;
+ /*Channel mask 0-10*/
+ channel_info.channel_mask = 0x000007ff;
+ /*Type of RF PHY is SubGHz*/
+ device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
+ device_driver.link_channel_info = &channel_info;
+#endif
+ /*Maximum size of payload is 127*/
+ device_driver.phy_MTU = 127;
+ /*No header in PHY*/
+ device_driver.phy_header_length = 0;
+ /*No tail in PHY*/
+ device_driver.phy_tail_length = 0;
+ /*Set address write function*/
+ device_driver.phy_xx_address_write = &rf_address_write;
+ /*Set RF extension function*/
+ device_driver.phy_xx_extension = &rf_extension;
+ /*Set RF state control function*/
+ device_driver.phy_xx_state_control = &rf_interface_state_control;
+ /*Set transmit function*/
+ device_driver.phy_xx_tx = &rf_tx;
+ printf("RF Device Registration...");
+ /*Register device driver*/
+ rf_radio_driver_id = arm_net_phy_register(&device_driver);
+ printf("OK\r\n");
+ return rf_radio_driver_id;
+}
+
+/*! *********************************************************************************
+* \brief Sends a PD message from PHY to MAC
+*
+* \param[in] pMsg pointer to the Phy Message
+* \param[in] id the MAC instance which should be updated
+*
+* \return resultType_t
+*
+********************************************************************************** */
+void PD_PLME_MAC_SapHandler( void* pMsg, instanceId_t id )
+{
+ pdDataToMacMessage_t* pPhyMsg = pMsg;
+ phy_link_tx_status_e phy_status = PHY_LINK_TX_FAIL;
+ uint8_t * pPsdu;
+ uint8_t psduLength = 0;
+ uint8_t lqi = 0;
+
+ int retval = 5;
+
+ switch(pPhyMsg->msgType)
+ {
+ case gPdDataCnf_c:
+ switch(pPhyMsg->msgData.dataCnf.status)
+ {
+ case gPhySuccess_c:
+ phy_status = PHY_LINK_TX_DONE;
+ break;
+
+ case gPhyChannelBusy_c:
+ phy_status = PHY_LINK_CCA_FAIL;
+ break;
+
+ case gPhyNoAck_c:
+ phy_status = PHY_LINK_TX_DONE_PENDING;
+ break;
+
+ case gPhyBusy_c:
+ default:
+ break;
+ }
+
+ //free PHY PdSap Structure
+ MEM_BufferFree(pPdSapMsg);
+
+ /*Call PHY TX Done API*/
+ arm_net_phy_tx_done(rf_radio_driver_id, mac_tx_handle, phy_status, 1, 1);
+ //printf("MSG: TX Done. \r\n");
+ break;
+
+ case gPdDataInd_c:
+ psduLength = pPhyMsg->msgData.dataInd.psduLength;
+ pPsdu = MEM_BufferAlloc(psduLength);
+ lqi = pPhyMsg->msgData.dataInd.ppduLinkQuality;
+ FLib_MemCpy(pPsdu, pPhyMsg->msgData.dataInd.pPsdu, psduLength);
+
+ //free PHY PdSap Structure
+ MEM_BufferFree(pPdSapMsg);
+
+ //retval = arm_net_phy_rx(pPhyMsg->msgData.dataInd.pPsdu, pPhyMsg->msgData.dataInd.psduLength, pPhyMsg->msgData.dataInd.ppduLinkQuality, rf_radio_driver_id);
+ retval = arm_net_phy_rx(pPsdu, psduLength, lqi, rf_radio_driver_id);
+
+ if(-1 == retval)
+ {
+ //printf("MSG: RX Error. \r\n");
+ while(1);
+ }
+ //printf("MSG: RX Done. \r\n");
+ break;
+
+ default:
+ break;
+ }
+}
+#endif
+#if 0
+
+typedef enum
+{
+ PHY_LINK_TX_DONE, /**< TX process Ready and ACK RX */
+ PHY_LINK_TX_DONE_PENDING, /**< TX process OK with ACK pending flag*/
+ PHY_LINK_TX_SUCCESS, /**< MAC TX complete MAC will make decission to enter wait ack or TX Done state*/
+ PHY_LINK_TX_FAIL, /**< Link TX process fail*/
+ PHY_LINK_CCA_FAIL, /**< RF Link CCA process fail */
+} phy_link_tx_status_e;
+#endif
+#if 0
+/*
+ * \brief Function sets the addresses to RF address filters.
+ *
+ * \param address_type Type of address
+ * \param address_ptr Pointer to given address
+ *
+ * \return 0 Success
+ */
+static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
+{
+ int8_t ret_val = 0;
+ uint64_t temp64 = 0;
+ uint16_t temp16 = 0;
+
+ switch (address_type)
+ {
+ /*Set 48-bit address*/
+ case PHY_MAC_48BIT:
+ break;
+ /*Set 64-bit address*/
+ case PHY_MAC_64BIT:
+ temp64 = atouint64(address_ptr);
+ temp64 = NWKU_Revert64(temp64);
+ PhyPlmeSetPIBRequest(gPhyPibLongAddress_c, temp64, 0, 0 );
+ break;
+ /*Set 16-bit address*/
+ case PHY_MAC_16BIT:
+ temp16 = atouint16(address_ptr);
+ PhyPlmeSetPIBRequest(gPhyPibShortAddress_c, temp16, 0, 0 );
+ break;
+ /*Set PAN Id*/
+ case PHY_MAC_PANID:
+ temp16 = atouint16(address_ptr);
+ PhyPlmeSetPIBRequest(gPhyPibPanId_c, temp16, 0, 0 );
+ break;
+ }
+ return ret_val;
+}
+
+/*
+ * \brief Function controls the ACK pending, channel setting and energy detection.
+ *
+ * \param extension_type Type of control
+ * \param data_ptr Data from NET library
+ *
+ * \return 0 Success
+ */
+static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
+{
+ switch (extension_type)
+ {
+ /*Control MAC pending bit for Indirect data transmission*/
+ case PHY_EXTENSION_CTRL_PENDING_BIT:
+ if(*data_ptr)
+ {
+ //rf_if_ack_pending_ctrl(1);
+ }
+ else
+ {
+ //rf_if_ack_pending_ctrl(0);
+ }
+ break;
+ /*Return frame pending status*/
+ case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
+ //*data_ptr = rf_if_last_acked_pending();
+ break;
+ /*Set channel*/
+ case PHY_EXTENSION_SET_CHANNEL:
+ break;
+ /*Read energy on the channel*/
+ case PHY_EXTENSION_READ_CHANNEL_ENERGY:
+ break;
+ /*Read status of the link*/
+ case PHY_EXTENSION_READ_LINK_STATUS:
+ break;
+ }
+ return 0;
+}
+
+/*
+ * \brief Function gives the control of RF states to MAC.
+ *
+ * \param new_state RF state
+ * \param rf_channel RF channel
+ *
+ * \return 0 Success
+ */
+static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
+{
+ int8_t ret_val = 0;
+ switch (new_state)
+ {
+ /*Reset PHY driver and set to idle*/
+ case PHY_INTERFACE_RESET:
+ break;
+ /*Disable PHY Interface driver*/
+ case PHY_INTERFACE_DOWN:
+ //PhyPlmeForceTrxOffRequest();
+ //rf_shutdown();
+ break;
+ /*Enable PHY Interface driver*/
+ case PHY_INTERFACE_UP:
+ //PhyPlmeSetPwrState( gPhyPwrAutodoze_c );
+ //PhyPlmeSetRxOnWhenIdle( TRUE, 0 );
+ //PhyPpSetPromiscuous(0);
+ //rf_channel_set(rf_channel);
+ //rf_receive();
+ break;
+ /*Enable wireless interface ED scan mode*/
+ case PHY_INTERFACE_RX_ENERGY_STATE:
+ break;
+ }
+ return ret_val;
+}
+
+
+/*
+ * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
+ *
+ * \param data_ptr Pointer to TX data
+ * \param data_length Length of the TX data
+ * \param tx_handle Handle to transmission
+ * \return 0 Success
+ * \return -1 Busy
+ */
+int8_t rf_tx(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle)
+{
+ /*Store TX handle*/
+ mac_tx_handle = tx_handle;
+
+ /*Store the sequence number for ACK handling*/
+ tx_sequence = *(data_ptr + 2);
+
+ pPdSapMsg = MEM_BufferAlloc(sizeof(macToPdDataMessage_t));
+ pPdSapMsg->macInstance = 0;
+ pPdSapMsg->msgType = gPdDataReq_c;
+
+ /*Check if transmitted data needs to be acked*/
+ if(*data_ptr & 0x20)
+ {
+ pPdSapMsg->msgData.dataReq.ackRequired = gPhyRxAckRqd_c;
+ }
+ else
+ {
+ pPdSapMsg->msgData.dataReq.ackRequired = gPhyNoAckRqd_c;
+ }
+
+ pPdSapMsg->msgData.dataReq.startTime = gPhySeqStartAsap_c;
+ pPdSapMsg->msgData.dataReq.txDuration = gPhySeqStartAsap_c;
+ pPdSapMsg->msgData.dataReq.CCABeforeTx = gPhyCCAMode1_c;
+ pPdSapMsg->msgData.dataReq.slottedTx = gPhyUnslottedMode_c;
+ pPdSapMsg->msgData.dataReq.pPsdu = data_ptr;
+ pPdSapMsg->msgData.dataReq.psduLength = data_length;
+
+ MAC_PD_SapHandler(pPdSapMsg, 0);
+
+
+#if 0
+ /*Check if transmitter is busy*/
+ if((rf_if_read_trx_state() == BUSY_RX_AACK) || (rf_if_read_trx_state() == BUSY_RX))
+ {
+ /*Return busy*/
+ return -1;
+ }
+ else
+ {
+ arm_enter_critical();
+ /*Check if transmitted data needs to be acked*/
+ if(*data_ptr & 0x20)
+ need_ack = 1;
+ else
+ need_ack = 0;
+ /*Store the sequence number for ACK handling*/
+ tx_sequence = *(data_ptr + 2);
+ /*Set radio in RX state to read channel*/
+ rf_receive();
+ /*Write TX FIFO*/
+ rf_if_write_frame_buffer(data_ptr, (uint8_t)data_length);
+ rf_flags_set(RFF_CCA);
+ /*Start CCA process*/
+ rf_if_enable_cca_ed_done_interrupt();
+ rf_if_start_cca_process();
+ /*Store TX handle*/
+ mac_tx_handle = tx_handle;
+ arm_exit_critical();
+ }
+#endif
+
+ /*Return success*/
+ return 0;
+}
+
+/*
+ * \brief Function sets the RF channel.
+ *
+ * \param ch New channel
+ *
+ * \return none
+ */
+void rf_channel_set(uint8_t ch)
+{
+ //arm_enter_critical();
+ if(ch < 0x1f)
+ {
+ rf_channel = ch;
+ PhyPlmeSetPIBRequest(gPhyPibCurrentChannel_c, ch, 0, 0 );
+ }
+ //arm_exit_critical();
+}
+#endif
+
+uint16_t atouint16
+(
+ uint8_t* pArray
+)
+{
+ uuint16_t out = {0};
+
+ out.u8[1] = *pArray++;
+ out.u8[0] = *pArray;
+
+ return out.u16;
+}
+
+uint64_t atouint64
+(
+ uint8_t* pArray
+)
+{
+ uuint64_t out;
+
+ out.u8[7] = *pArray++;
+ out.u8[6] = *pArray++;
+ out.u8[5] = *pArray++;
+ out.u8[4] = *pArray++;
+ out.u8[3] = *pArray++;
+ out.u8[2] = *pArray++;
+ out.u8[1] = *pArray++;
+ out.u8[0] = *pArray;
+
+ return out.u64;
+}
+
+uint64_t NWKU_Revert64
+(
+ uint64_t value
+)
+{
+ uuint64_t in;
+ uuint64_t out;
+ in.u64 = value;
+
+ out.u8[0] = in.u8[7];
+ out.u8[1] = in.u8[6];
+ out.u8[2] = in.u8[5];
+ out.u8[3] = in.u8[4];
+ out.u8[4] = in.u8[3];
+ out.u8[5] = in.u8[2];
+ out.u8[6] = in.u8[1];
+ out.u8[7] = in.u8[0];
+
+ return out.u64;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/IEEE802_14_5_PHY/driverRFinterface.h Fri Apr 03 05:23:33 2015 +0000
@@ -0,0 +1,61 @@
+/*
+ * driverRFinterface.h
+ *
+ * Created on: 12 March 2015
+ * Author: mBed Team
+ */
+
+#ifndef DRIVERRFINTERFACE_H_
+#define DRIVERRFINTERFACE_H_
+
+//#include "arm_hal_phy.h"
+#include "EmbeddedTypes.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RF_BUFFER_SIZE 128
+#define RF_DEFAULT_CHANNEL 11
+
+typedef union uuint16_tag
+{
+ uint16_t u16;
+ uint8_t u8[2];
+} uuint16_t;
+
+typedef union uuint32_tag
+{
+ uint32_t u32;
+ uint16_t u16[2];
+ uint8_t u8[4];
+} uuint32_t;
+
+typedef union uuint64_tag
+{
+ uint64_t u64;
+ uint32_t u32[2];
+ uint16_t u16[4];
+ uint8_t u8[8];
+} uuint64_t;
+
+extern uint64_t atouint64(uint8_t* pArray);
+extern uint16_t atouint16(uint8_t* pArray);
+extern uint64_t NWKU_Revert64(uint64_t value);
+
+#if 0
+extern void rf_set_mac_address(const uint8_t *ptr);
+extern int8_t rf_device_register(void);
+extern void rf_channel_set(uint8_t ch);
+extern int8_t rf_tx(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle);
+static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
+static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
+static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
+static void PD_PLME_MAC_SapHandler( void* pMsg, instanceId_t id );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* DRIVERRFINTERFACE_H_ */
--- a/NSDL/nsdl_dbg.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,17 +0,0 @@
-#ifndef DEBUG_H
-#define DEBUG_H
-
-#include "nsdl_support.h"
-#include "mbed.h"
-
-//Debug is disabled by default
-#define DEBUG 1
-
-#if (DEBUG)
-//extern Serial pc;
-#define NSDL_DEBUG(x, ...) printf("[NSDL_DEBUG: %s:%d]" x "\r\n", __FILE__, __LINE__, ##__VA_ARGS__);
-#else
-#define NSDL_DEBUG(x, ...)
-#endif
-
-#endif
--- a/NSDL/nsdl_lib.lib Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1 +0,0 @@ -http://mbed.org/teams/Sensinode/code/nsdl_lib/#388450b1e776
--- a/NSDL/nsdl_run.cpp Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,103 +0,0 @@
-#include "mbed.h"
-#include "nsdl_support.h"
-#include "nsdl_dbg.h"
-
-#include "node_cfg.h"
-
-#include "rgb.h"
-#include "battery.h"
-
-
-// ****************************************************************************
-// Configuration section
-
-// NSP configuration
-/* Change this IP address to that of your NanoService Platform installation */
-uint8_t NSP_address_bytes[] = NSP_IP_ADDRESS;
-
-uint8_t endpoint_name[24] = NODE_NAME;
-uint8_t ep_type[] = ENDPOINT_TYPE;
-uint8_t lifetime_ptr[] = LIFE_TIME;
-
-// ****************************************************************************
-// Resource creation
-
-static int create_resources()
-{
- sn_nsdl_resource_info_s *resource_ptr = NULL;
- sn_nsdl_ep_parameters_s *endpoint_ptr = NULL;
-
- NSDL_DEBUG("Creating resources");
-
- /* Create resources */
- resource_ptr = (sn_nsdl_resource_info_s*)nsdl_alloc(sizeof(sn_nsdl_resource_info_s));
- if(!resource_ptr)
- return 0;
- memset(resource_ptr, 0, sizeof(sn_nsdl_resource_info_s));
-
- resource_ptr->resource_parameters_ptr = (sn_nsdl_resource_parameters_s*)nsdl_alloc(sizeof(sn_nsdl_resource_parameters_s));
- if(!resource_ptr->resource_parameters_ptr)
- {
- nsdl_free(resource_ptr);
- return 0;
- }
- memset(resource_ptr->resource_parameters_ptr, 0, sizeof(sn_nsdl_resource_parameters_s));
-
- // Static resources
- nsdl_create_static_resource(resource_ptr, sizeof("dev/mfg")-1, (uint8_t*) "dev/mfg", 0, 0, (uint8_t*) "ARM mbed", sizeof("ARM mbed")-1);
- nsdl_create_static_resource(resource_ptr, sizeof("dev/mdl")-1, (uint8_t*) "dev/mdl", 0, 0, (uint8_t*) "6LoWPAN node", sizeof("6LoWPAN node")-1);
-
- // Dynamic resources
-#if NODE_HOME
- create_light_resource(resource_ptr);
- create_HVAC_resource(resource_ptr);
- create_door_resource(resource_ptr);
-#endif
-
-#if NODE_SENSOR_STATION
- create_pressure_resource(resource_ptr);
- create_temperature_resource(resource_ptr);
- create_moisture_resource(resource_ptr);
- create_hcho_resource(resource_ptr);
- create_UVsensor_resource(resource_ptr);
-#endif
-
-#if NODE_CONTROLLER
- create_rgbled_resource(resource_ptr);
-#endif
-
-#if BATTERY
- create_battery_resource(resource_ptr);
-#endif
-
-
- /* Register with NSP */
- endpoint_ptr = nsdl_init_register_endpoint(endpoint_ptr, (uint8_t*)endpoint_name, ep_type, lifetime_ptr);
- if(sn_nsdl_register_endpoint(endpoint_ptr) != 0)
- printf("NSP registering failed\r\n");
- else
- printf("NSP registering OK\r\n");
- nsdl_clean_register_endpoint(&endpoint_ptr);
-
- nsdl_free(resource_ptr->resource_parameters_ptr);
- nsdl_free(resource_ptr);
- return 1;
-}
-
-// ****************************************************************************
-// Program entry point
-// this modified to startup as an option in the Wi-Go demo
-
-void nsdl_run()
-{
-
- NSDL_DEBUG("ARM NSP Init\r\n");
-
- // Initialize NSDL stack
- nsdl_init();
-
- // Create NSDL resources
- create_resources();
-
-}
-
--- a/NSDL/nsdl_support.cpp Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,212 +0,0 @@
-// NSDL library support functions
-
-#include "mbed.h"
-#include "nsdl_support.h"
-#include "mbed.h"
-
-#include "socket_api.h"
-
-#define COAP_UDP_PORT 5683
-extern uint8_t NSP_address_bytes[];
-static ns_address_t app_dest;
-
-#define MEM_VALID(x) \
- int s##x=0;\
- int *h##x = new int [1];\
- std::printf("[stack]0x%08x\t[heap]0x%08x\t[memory avail]%d bytes \tLine: %d %s\r\n", &s##x, h##x, &s##x-h##x, __LINE__, __FILE__);\
- if (h##x > &s##x)\
- printf("collision\n");\
- else\
- delete [] h##x;\
- __nop()
-
-extern char endpoint_name[24];
-extern uint8_t ep_type[];
-extern uint8_t lifetime_ptr[];
-char null_ep_name[] = "";
-uint8_t null_ep_type[] = "";
-uint8_t null_lifetime_ptr[] = "";
-bool nsdl_reg_update_needed = false;
-
-extern int8_t coap_udp_socket;
-
-void *nsdl_alloc(uint16_t size)
-{
- void *buf = malloc(size);
- return buf;
-}
-
-void nsdl_free(void* ptr_to_free)
-{
- free(ptr_to_free);
-}
-
-/*
- * Create a static resoure
- * Only get is allowed
- */
-void nsdl_create_static_resource(sn_nsdl_resource_info_s *resource_structure, uint16_t pt_len, uint8_t *pt, uint16_t rpp_len, uint8_t *rpp_ptr, uint8_t *rsc, uint16_t rsc_len)
-{
- resource_structure->access = SN_GRS_GET_ALLOWED;
- resource_structure->mode = SN_GRS_STATIC;
- resource_structure->pathlen = pt_len;
- resource_structure->path = pt;
- resource_structure->resource_parameters_ptr->resource_type_len = rpp_len;
- resource_structure->resource_parameters_ptr->resource_type_ptr = rpp_ptr;
- resource_structure->resource = rsc;
- resource_structure->resourcelen = rsc_len;
- sn_nsdl_create_resource(resource_structure);
-}
-
-void nsdl_create_dynamic_resource(sn_nsdl_resource_info_s *resource_structure, uint16_t pt_len, uint8_t *pt, uint16_t rpp_len, uint8_t *rpp_ptr, uint8_t is_observable, sn_grs_dyn_res_callback_t callback_ptr, int access_right)
-{
- resource_structure->access = (sn_grs_resource_acl_e)access_right;
- resource_structure->resource = 0;
- resource_structure->resourcelen = 0;
- resource_structure->sn_grs_dyn_res_callback = callback_ptr;
- resource_structure->mode = SN_GRS_DYNAMIC;
- resource_structure->pathlen = pt_len;
- resource_structure->path = pt;
- resource_structure->resource_parameters_ptr->resource_type_len = rpp_len;
- resource_structure->resource_parameters_ptr->resource_type_ptr = rpp_ptr;
- resource_structure->resource_parameters_ptr->observable = is_observable;
- sn_nsdl_create_resource(resource_structure);
-}
-
-sn_nsdl_ep_parameters_s* nsdl_init_register_endpoint(sn_nsdl_ep_parameters_s *endpoint_structure, uint8_t* name, uint8_t* typename_ptr, uint8_t *lifetime_ptr)
-{
- if (NULL == endpoint_structure)
- {
- endpoint_structure = (sn_nsdl_ep_parameters_s*)nsdl_alloc(sizeof(sn_nsdl_ep_parameters_s));
- }
- if (endpoint_structure)
- {
- memset(endpoint_structure, 0, sizeof(sn_nsdl_ep_parameters_s));
- endpoint_structure->endpoint_name_ptr = name;
- endpoint_structure->endpoint_name_len = strlen((char*)name);
- endpoint_structure->type_ptr = typename_ptr;
- endpoint_structure->type_len = strlen((char*)typename_ptr);
- endpoint_structure->lifetime_ptr = lifetime_ptr;
- endpoint_structure->lifetime_len = strlen((char*)lifetime_ptr);
- }
- return endpoint_structure;
-}
-
-void nsdl_clean_register_endpoint(sn_nsdl_ep_parameters_s **endpoint_structure)
-{
- if (*endpoint_structure)
- {
- nsdl_free(*endpoint_structure);
- *endpoint_structure = NULL;
- }
-}
-
-static uint8_t tx_cb(sn_nsdl_capab_e protocol, uint8_t *data_ptr, uint16_t datalen, sn_nsdl_addr_s *address_prt)
-{
- printf("TX callback!\n\rSending %d bytes...", datalen);
-
- int8_t socket_ret_value = 0;
- memcpy(app_dest.address, address_prt->addr_ptr, 16);
- app_dest.identifier = address_prt->port;
- app_dest.type = ADDRESS_IPV6;
-
- socket_ret_value = socket_sendto(coap_udp_socket, &app_dest, data_ptr, datalen);
- if(socket_ret_value != 0)
- {
- printf("Failed\r\n");
- return 0;//failed
- }
- else
- {
- printf("Ok\r\n");
- return 1; // success
- }
-}
-
-static uint8_t rx_cb(sn_coap_hdr_s *coap_packet_ptr, sn_nsdl_addr_s *address_ptr)
-{
- printf("RX callback!\r\n");
- printf("msg_code: %d \r\n", coap_packet_ptr->msg_code);
- printf("Payload length: %d bytes\r\n", coap_packet_ptr->payload_len);
- int i;
- printf("Payload:'");
- for (i=0; i < coap_packet_ptr->payload_len; i++)
- printf("%c", *(coap_packet_ptr->payload_ptr + i));
- printf("' \r\n");
- if (coap_packet_ptr->options_list_ptr && coap_packet_ptr->options_list_ptr->location_path_ptr)
- {
- printf("Location: /");
- int i;
- for (i=0; i < coap_packet_ptr->options_list_ptr->location_path_len; i++) printf("%c", (char)(coap_packet_ptr->options_list_ptr->location_path_ptr[i]));
- printf(" \r\n");
- }
- //sn_coap_packet_debug(coap_packet_ptr);
- return 0;
-}
-
-
-void NSP_registration( ) {
- sn_nsdl_ep_parameters_s *endpoint_ptr = NULL;
-
- endpoint_ptr = nsdl_init_register_endpoint(endpoint_ptr, (uint8_t*)endpoint_name, ep_type, lifetime_ptr);
- if(sn_nsdl_register_endpoint(endpoint_ptr) != 0)
- printf("NSP re-registering failed\r\n");
- else
- printf("NSP re-registering OK\r\n");
- nsdl_clean_register_endpoint(&endpoint_ptr);
-}
-
-
-void nsdl_init()
-{
- //uint8_t nsp_addr[4];
- sn_nsdl_mem_s memory_cbs;
-
- /* Initialize libNsdl */
- memory_cbs.sn_nsdl_alloc = &nsdl_alloc;
- memory_cbs.sn_nsdl_free = &nsdl_free;
- if(sn_nsdl_init(&tx_cb, &rx_cb, &memory_cbs) == -1)
- printf("libNsdl init failed\r\n");
- else
- printf("libNsdl init done\r\n");
- /* Set nsp address for library */
- set_NSP_address(NSP_address_bytes, COAP_UDP_PORT, SN_NSDL_ADDRESS_TYPE_IPV6);
-}
-
-void nsdl_reg_update()
- {
- sn_nsdl_ep_parameters_s *endpoint_ptr = NULL;
-// endpoint_ptr = nsdl_init_register_endpoint(endpoint_ptr, (uint8_t*)endpoint_name, ep_type, lifetime_ptr);
-// reg update should be invoked with null parameters if nothing is changing
- endpoint_ptr = nsdl_init_register_endpoint(endpoint_ptr, (uint8_t*)null_ep_name, null_ep_type, null_lifetime_ptr);
- if(sn_nsdl_update_registration(endpoint_ptr) != 0)
- printf("NSP re-registering failed\r\n");
- else
- printf("NSP re-registering OK\r\n");
- nsdl_clean_register_endpoint(&endpoint_ptr);
- }
-
-void nsdl_reg_update_timeout()
- {
- nsdl_reg_update_needed = true;
- }
-
-void nsdl_event_loop()
-{
-
- sn_nsdl_addr_s received_packet_address;
- uint8_t received_address[4];
-
- memset(&received_packet_address, 0, sizeof(sn_nsdl_addr_s));
- received_packet_address.addr_ptr = received_address;
-
- while(1)
- {
- // pc.printf("checking reg timeout\r\n");
- if (nsdl_reg_update_needed)
- {
- nsdl_reg_update_needed = false;
- nsdl_reg_update();
- }
- }
-}
--- a/NSDL/nsdl_support.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,26 +0,0 @@ -// Support functions for the NSDL library - -#ifndef NSDL_SUPPORT_H -#define NSDL_SUPPORT_H - -#include "mbed.h" -#include <stdint.h> -#include "sn_nsdl.h" -#include "sn_coap_header.h" -#include "sn_coap_protocol.h" -#include "sn_nsdl_lib.h" - -typedef uint8_t (*sn_grs_dyn_res_callback_t)(sn_coap_hdr_s *, sn_nsdl_addr_s *, sn_proto_info_s *); - -extern "C" void *nsdl_alloc(uint16_t size); -extern "C" void nsdl_free(void* ptr_to_free); -void nsdl_create_static_resource(sn_nsdl_resource_info_s *resource_structure, uint16_t pt_len, uint8_t *pt, uint16_t rpp_len, uint8_t *rpp_ptr, uint8_t *rsc, uint16_t rsc_len); -void nsdl_create_dynamic_resource(sn_nsdl_resource_info_s *resource_structure, uint16_t pt_len, uint8_t *pt, uint16_t rpp_len, uint8_t *rpp_ptr, uint8_t is_observable, sn_grs_dyn_res_callback_t callback_ptr, int access_right); -sn_nsdl_ep_parameters_s* nsdl_init_register_endpoint(sn_nsdl_ep_parameters_s *endpoint_structure, uint8_t* name, uint8_t* ypename_ptr, uint8_t *lifetime_ptr); -void nsdl_clean_register_endpoint(sn_nsdl_ep_parameters_s **endpoint_structure); -void nsdl_init(); -void nsdl_event_loop(); -void nsdl_run(); -void nsdl_reg_update(); - -#endif // NSDL_SUPPORT_H
--- a/NSDL/nsdl_utils.cpp Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,83 +0,0 @@
-#include "mbed.h"
-
-uint8_t lqi_ptr[3] = {'-','-', '-'};
-uint8_t lqi_ptr_len = 3;
-
-uint8_t int16_to_string(uint8_t *tmstring, int16_t number)
-{
- if(number < 10)
- {
- tmstring[0] = number + '0';
- return 1;
- }
- else if(number < 100)
- {
- tmstring[0] = number/10 + '0';
- tmstring[1] = (number%10) + '0';
- return 2;
- }
- else if(number < 1000)
- {
- tmstring[0] = number/100 + '0';
- number %= 100;
- tmstring[1] = number/10 + '0';
- tmstring[2] = (number%10) + '0';
- return 3;
- }
- else if(number < 10000)
- {
- tmstring[1] = number/1000 + '0';
- number %= 1000;
- tmstring[1] = number/100 + '0';
- number %= 100;
- tmstring[2] = number/10 + '0';
- tmstring[3] = (number%10) + '0';
- return 4;
- }
- else
- {
- tmstring[0] = number/10000 + '0';
- number %= 10000;
- tmstring[1] = number/1000 + '0';
- number %= 1000;
- tmstring[2] = number/100 + '0';
- number %= 100;
- tmstring[3] = number/10 + '0';
- tmstring[4] = (number%10) + '0';
- return 5;
- }
-}
-
-void create_lqi_resource(uint8_t lqi_value)
-{
- lqi_ptr_len = int16_to_string(lqi_ptr, (int16_t) (lqi_value));
-}
-
-void* own_alloc(uint16_t size)
-{
- if(size)
- {
- void * ptr = (void*) malloc(size);
- //void * ptr = (void __data16*) __data16_malloc(size);
- if(ptr)
- {
- memset(ptr, 0, size);
- return ptr;
- }
- }
-#ifdef DEBUG
- debug("Mem failed: ");
- debug_int(size);
- debug("\r\n");
-#endif
- return 0;
-}
-
-void own_free(void *ptr)
-{
- if(ptr)
- {
- free(ptr);
- //__data16_free((void __data16*)ptr);
- }
-}
--- a/NanoStack_HAL/arm_aes.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,21 +0,0 @@
-#include <stdint.h>
-#include "platform.h"
-#include "arm_hal_aes.h"
-
-void arm_aes_init(void)
-{
-#if DEVICE_AES
- aes_block_init();
-#else
- // SW yet to be implemented
-#endif
-}
-
-void arm_aes_block_encode(uint8_t *key_ptr , uint8_t *Ai_ptr, uint8_t *Si_ptr)
-{
-#if DEVICE_AES
- aes_block_code(key_ptr, Ai_ptr, Si_ptr, 128, 10);
-#else
- // SW yet to be implemented
-#endif
-}
--- a/NanoStack_HAL/arm_events.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,42 +0,0 @@
-#include "arm_hal_interrupt.h"
-#include "sleep_api.h"
-
-/** Global Variables which indicate when interrupt are disabled */
-uint8_t sys_irq_disable_counter = 0;
-uint8_t sys_wait_signal = 0;
-
-void arm_enter_critical(void)
-{
- if (sys_irq_disable_counter++ == 0) {
- __disable_irq();
- }
-}
-
-void arm_exit_critical(void)
-{
- if (--sys_irq_disable_counter == 0) {
- __enable_irq();
- }
-}
-
-void hal_event_os_wait(void)
-{
- arm_enter_critical();
- sys_wait_signal = 1;
- arm_exit_critical();
- while (sys_wait_signal) {
- /*CPU in idle*/
- sleep(); // ENABLE?
- }
-}
-
-void hal_event_os_signal(void)
-{
- sys_wait_signal = 0;
-}
-
-uint32_t hal_event_os_sleep(uint32_t sleep_time_ms)
-{
- // needs to be implemented
- return 1;
-}
--- a/NanoStack_HAL/arm_port.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,12 +0,0 @@ -#ifndef ARM_PORT_H -#define ARM_PORT_H - -#include "core_cmFunc.h" - -typedef unsigned char const prog_uint8_t; -typedef unsigned long int prog_uint32_t; - -#define pl_int_disable() __disable_irq() -#define pl_int_enable() __enable_irq() - -#endif /* ARM_PORT_H_ */
--- a/NanoStack_HAL/arm_rng.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,26 +0,0 @@
-#include <stdint.h>
-#include <string.h>
-#include "platform.h"
-#include "arm_hal_random.h"
-
-void arm_random_module_init(void)
-{
-#if DEVICE_RNG
- rng_init();
-#else
- // SW yet to be implemented
-#endif
-}
-
-uint32_t arm_random_seed_get(void)
-{
- uint32_t rn_number = 0;
-#if DEVICE_RNG
- uint8_t number[4];
- rng_seed(number[0], 4);
- memcpy(rn_number, number, 4);
-#else
- // SW yet to be implemented
-#endif
- return rn_number;
-}
--- a/NanoStack_HAL/arm_timer.cpp Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,45 +0,0 @@
-#include "mbed.h"
-#include "arm_hal_timer.h"
-
-static void (*sn_callback)(void) = NULL;
-static Ticker sn_timer;
-//static uint32_t sn_compare_value;
-static timestamp_t sn_compare_value;
-static bool timer_enabled = false;
-
-#define MAXIMUM_SLOTS 10000
-
-extern "C" void arm_timer_init(void)
-{
- //init in Ticker ctor
-}
-
-extern "C" void arm_timer_set_cb(void (*callback)(void))
-{
- sn_callback = callback;
-}
-
-extern "C" void arm_timer_start(uint16_t slots)
-{
- sn_compare_value = slots * 50; // 1 slot = 50us
- sn_timer.attach_us(sn_callback, sn_compare_value);
- timer_enabled = true;
-}
-
-extern "C" void arm_timer_stop(void)
-{
- sn_timer.detach();
- timer_enabled = false;
-}
-
-extern "C" uint16_t arm_timer_get_remaining_slots(void)
-{
- uint32_t counter = us_ticker_read();
- uint32_t slots = ((sn_compare_value - counter) / 50);
-
- if ((slots > MAXIMUM_SLOTS) || (timer_enabled == false)) {
- slots = 0;
- }
-
- return (uint16_t)slots;
-}
--- a/Nanostack_lib.lib Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1 +0,0 @@ -http://mbed.org/users/sscaglia/code/Nanostack_lib/#b486fa9e70a7
--- a/RF_Drivers_Atmel/driverAtmelRFInterface_c.txt Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,952 +0,0 @@
-/*
- * driverAtmelRFInterface.c
- *
- * Created on: 14 July 2014
- * Author: mBed Team
- */
-
-#include "arm_hal_interrupt.h"
-#include "arm_hal_phy.h"
-#include "driverRFPhy.h"
-#include "driverAtmelRFInterface.h"
-#include "low_level_RF.h"
-
-#include <stdio.h>
-
-void (*app_rf_settings_cb)(void) = 0;
-static uint8_t rf_part_num = 0;
-static uint8_t rf_irq_port = 0;
-static uint8_t rf_irq_pin = 0;
-static uint8_t rf_slp_tr_port = 0;
-static uint8_t rf_slp_tr_pin = 0;
-static uint8_t rf_reset_port = 0;
-static uint8_t rf_reset_pin = 0;
-static uint8_t rf_spi_if = 0;
-static uint8_t rf_spi_cs = 0;
-static uint8_t rf_spi_cs_port = 0;
-static uint8_t rf_spi_cs_pin = 0;
-static uint8_t rf_spi_port = 0;
-static uint8_t rf_spi_mosi_pin = 0;
-static uint8_t rf_spi_miso_pin = 0;
-static uint8_t rf_spi_sclk_pin = 0;
-static uint8_t rf_rx_lqi;
-static int8_t rf_rx_rssi;
-/*TODO: RSSI Base value setting*/
-static int8_t rf_rssi_base_val = -91;
-static uint8_t phy_timers_enabled = 0;
-
-/*
- * \brief Delay function for RF interface.
- *
- * \param ticks Number of delay ticks
- *
- * \return none
- */
-void rf_if_delay_function(uint16_t ticks)
-{
- while(ticks--);
-}
-
-/*
- * \brief Function initialises the RF timer for ACK wait and calibration.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_timer_init(void)
-{
- /* TODO */
-}
-
-/*
- * \brief Function starts the ACK wait timeout.
- *
- * \param slots Given slots, resolution 50us
- *
- * \return none
- */
-void rf_if_ack_wait_timer_start(uint16_t slots)
-{
- /* TODO */
-}
-
-/*
- * \brief Function starts the calibration interval.
- *
- * \param slots Given slots, resolution 50us
- *
- * \return none
- */
-void rf_if_calibration_timer_start(uint32_t slots)
-{
- /* TODO */
-}
-
-/*
- * \brief Function stops the ACK wait timeout.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_ack_wait_timer_stop(void)
-{
- phy_timers_enabled &= ~PHY_ACK_WAIT_TIMER;
-}
-
-/*
- * \brief Function is a call back for ACK wait timeout.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_ack_wait_timer_interrupt(void)
-{
- /* TODO */
-}
-
-/*
- * \brief Function is a call back for calibration interval timer.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_calibration_timer_interrupt(void)
-{
- /* TODO */
-}
-
-/*
- * \brief Function sets SLP_TR pin high in RF interface.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_slp_tr_pin_high(void)
-{
- RF_SLP_TR_Set(1);
-}
-
-/*
- * \brief Function sets SLP_TR pin low in RF interface.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_slp_tr_pin_low(void)
-{
- RF_SLP_TR_Set(0);
-}
-
-/*
- * \brief Function returns peripheral ID for SPI interface.
- *
- * \param none
- *
- * \return peripheral ID
- */
-uint8_t rf_if_get_rf_spi_periph(uint8_t spi_interface)
-{
- uint8_t ret_val = 19 + spi_interface;
- return ret_val;
-}
-
-/*
- * \brief Function returns interrupt number for I/O port.
- *
- * \param none
- *
- * \return interrupt number
- */
-uint8_t rf_if_get_rf_irq_number(uint8_t port)
-{
- /* not needed in mBed */
-}
-
-
-/*
- * \brief Function enables RF irq pin interrupts in RF interface.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_enable_irq(void)
-{
- /* not needed in mBed */
-}
-
-
-/*
- * \brief Function initialises RF interrupt pin in RF interface.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_init_irq_delete(void)
-{
- RF_IRQ_Init();
-}
-
-/*
- * \brief Function initialises the SPI interface for RF.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_spi_init(void)
-{
- /* not needed in mBed */
-}
-
-/*
- * \brief Function initialises SLP_TR pin in RF interface.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_init_slp_tr_pin(void)
-{
- /*Chip select*/
- //RF_SLP_TR_Set(0); // moved to reset function
-}
-
-/*
- * \brief Function returns peripheral ID for I/O port.
- *
- * \param none
- *
- * \return peripheral ID
- */
-uint8_t rf_if_get_port_peripheral_id(uint8_t port)
-{
- uint8_t ret_val = 9 + port;
- return ret_val;
-}
-
-/*
- * \brief Function initialises I/O pins for RF interface.
- *
- * \param none
- *
- * \return peripheral ID
- */
-void rf_if_init_spi_pins(void)
-{
- /* not needed in mBed */
-}
-
-/*
- * \brief Function reads data from the given RF SRAM address.
- *
- * \param ptr Read pointer
- * \param sram_address Read address in SRAM
- * \param len Length of the read
- *
- * \return none
- */
-void rf_if_read_payload(uint8_t *ptr, uint8_t sram_address, uint8_t len)
-{
- uint8_t i;
-
- RF_CS_Set(0);
- spi_exchange(0x20);
- spi_exchange(sram_address);
- for(i=0; i<len; i++)
- *ptr++ = spi_exchange(0);
-
- /*Read LQI and RSSI in variable*/
- rf_rx_lqi = spi_exchange(0);
- rf_rx_rssi = (rf_rssi_base_val + spi_exchange(0));
- RF_CS_Set(1);
-}
-
-/*
- * \brief Function polls while the SPI chip select is active.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_spi_poll_chip_select(void)
-{
- RF_CS_while_active();
-}
-
-void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask)
-{
- uint8_t reg = rf_if_read_register(addr);
- reg &= ~bit_mask;
- reg |= bit;
- rf_if_write_register(addr, reg);
-}
-
-/*
- * \brief Function clears bit(s) in given RF register.
- *
- * \param addr Address of the register to clear
- * \param bit Bit(s) to clear
- *
- * \return none
- */
-void rf_if_clear_bit(uint8_t addr, uint8_t bit)
-{
- uint8_t reg = rf_if_read_register(addr);
- reg &= ~bit;
- rf_if_write_register(addr, reg);
-}
-
-/*
- * \brief Function writes register in RF.
- *
- * \param addr Address on the RF
- * \param data Written data
- *
- * \return none
- */
-void rf_if_write_register(uint8_t addr, uint8_t data)
-{
- uint8_t cmd = 0xC0;
- arm_enter_critical();
-
- spi_write(cmd | addr, data);
-
- arm_exit_critical();
-}
-
-/*
- * \brief Function reads RF register.
- *
- * \param addr Address on the RF
- *
- * \return Read data
- */
-uint8_t rf_if_read_register(uint8_t addr)
-{
- uint8_t cmd = 0x80;
- uint8_t data;
- arm_enter_critical();
-
- data = spi_read(cmd | addr);
- arm_exit_critical();
- return data;
-}
-
-/*
- * \brief Function resets the RF.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_reset_radio(void)
-{
- /* Reset and init RF_CS - chip select */
- RF_RST_Set(1);
- rf_if_delay_function(65000);
- RF_RST_Set(0);
- rf_if_delay_function(65000);
- /* Set default states */
- RF_CS_Set(1);
- RF_SLP_TR_Set(0);
- rf_if_delay_function(65000);
- RF_RST_Set(1);
- rf_if_delay_function(65000);
-
- /*Initialise RF interrupt pin*/
- RF_IRQ_Init();
-}
-
-/*
- * \brief Function enables the Front end usage.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_enable_pa_ext(void)
-{
- /*Set PA_EXT_EN to enable controlling of external front end*/
- rf_if_set_bit(TRX_CTRL_1, PA_EXT_EN, PA_EXT_EN);
-}
-
-/*
- * \brief Function disables the Front end usage.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_disable_pa_ext(void)
-{
- /*Clear PA_EXT_EN to disable controlling of external front end*/
- rf_if_clear_bit(TRX_CTRL_1, PA_EXT_EN);
-}
-
-/*
- * \brief Function enables the Antenna diversity usage.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_enable_ant_div(void)
-{
- /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
- rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN);
-}
-
-/*
- * \brief Function disables the Antenna diversity usage.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_disable_ant_div(void)
-{
- rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN);
-}
-
-/*
- * \brief Function sets the SLP TR pin.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_enable_slptr(void)
-{
- RF_SLP_TR_Set(1);
-}
-
-/*
- * \brief Function clears the SLP TR pin.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_disable_slptr(void)
-{
- RF_SLP_TR_Set(0);
-}
-
-/*
- * \brief Function writes the antenna diversity settings.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_write_antenna_diversity_settings(void)
-{
- /*Recommended setting of PDT_THRES is 3 when antenna diversity is used*/
- rf_if_set_bit(RX_CTRL, 0x03, 0x0f);
- rf_if_write_register(ANT_DIV, ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL_DEFAULT);
-}
-
-/*
- * \brief Function writes the TX output power register.
- *
- * \param value Given register value
- *
- * \return none
- */
-void rf_if_write_set_tx_power_register(uint8_t value)
-{
- rf_if_write_register(PHY_TX_PWR, value);
-}
-
-/*
- * \brief Function writes the RPC register.
- *
- * \param value Given register value
- *
- * \return none
- */
-void rf_if_write_set_trx_rpc_register(uint8_t value)
-{
- rf_if_write_register(TRX_RPC, value);
-}
-
-/*
- * \brief Function returns the RF part number.
- *
- * \param none
- *
- * \return part number
- */
-uint8_t rf_if_read_part_num_delete(void)
-{
- return rf_if_read_register(PART_NUM);
-}
-
-/*
- * \brief Function writes the RF settings and initialises SPI interface.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_write_rf_settings(void)
-{
- int ret;
-
- /* unslotted mode - max. frame & csma retries = 0 */
- rf_if_write_register(XAH_CTRL_0,0);
- if (rf_if_read_register(XAH_CTRL_0) != 0) {
- printf("Error: XAH_CTRL_0 reg. incorrect!\r\n");
- //while(1);
- }
-
- /* TX_AUTO_CRC On - IRQ_Mask_Mode = 0 - IRQ_Polarity = 0 (Pin IRQ is active high) */
- rf_if_write_register(TRX_CTRL_1, 0x20);
- if (rf_if_read_register(TRX_CTRL_1) != 0x20) {
- printf("Error: TRX_CTRL_1 reg. incorrect!\r\n");
- //while(1);
- }
-
- /*CCA Mode - Carrier sense OR energy above threshold. Channel list is set separately*/
- rf_if_write_register(PHY_CC_CCA, 0x05);
- if (rf_if_read_register(PHY_CC_CCA) != 0x05) {
- printf("Error: PHY_CC_CCA reg. incorrect!\r\n");
- //while(1);
- }
-
- /*Read transceiver PART_NUM*/
- rf_part_num = rf_if_read_register(PART_NUM);
-
- /*Sub-GHz RF settings*/
- if(rf_part_num == PART_AT86RF212)
- {
- /*GC_TX_OFFS mode-dependent setting - OQPSK*/
- rf_if_write_register(RF_CTRL_0, 0x32);
-
- if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B)
- {
- /*TX Output Power setting - 0 dBm North American Band*/
- rf_if_write_register(PHY_TX_PWR, 0x03);
- }
- else
- {
- /*TX Output Power setting - 0 dBm North American Band*/
- rf_if_write_register(PHY_TX_PWR, 0x24);
- }
-
- /*PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250*/
- rf_if_write_register(TRX_CTRL_2, OQPSK_SIN_250);
- rf_rssi_base_val = -98;
- }
- /*2.4GHz RF settings*/
- else if (rf_part_num == PART_AT86RF233)
- {
- printf("Part detected: ATMEL AT86RF233\r\n");
- /*PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s*/
- rf_if_write_register(TRX_CTRL_2, 0);
- rf_rssi_base_val = -91;
- } else {
- // other module not yet defined
- printf("Error: RF Part Unknown!\r\n");
- }
-}
-
-
-/*
- * \brief Function checks the channel availability
- *
- * \param none
- *
- * \return 1 Channel clear
- * \return 0 Channel not clear
- */
-uint8_t rf_if_check_cca(void)
-{
- uint8_t retval = 0;
- if(rf_if_read_register(TRX_STATUS) & CCA_STATUS)
- {
- retval = 1;
- }
- return retval;
-}
-
-/*
- * \brief Function checks if the CRC is valid in received frame
- *
- * \param none
- *
- * \return 1 CRC ok
- * \return 0 CRC failed
- */
-uint8_t rf_if_check_crc(void)
-{
- uint8_t retval = 0;
- if(rf_if_read_register(PHY_RSSI) & CRC_VALID)
- {
- retval = 1;
- }
- return retval;
-}
-
-/*
- * \brief Function returns the RF state
- *
- * \param none
- *
- * \return RF state
- */
-uint8_t rf_if_read_trx_state(void)
-{
- return rf_if_read_register(TRX_STATUS) & 0x1F;
-}
-
-/*
- * \brief Function reads data from RF SRAM.
- *
- * \param ptr Read pointer
- * \param len Length of the read
- *
- * \return none
- */
-void rf_if_read_packet(uint8_t *ptr, uint8_t len)
-{
- if(rf_part_num == PART_AT86RF231 || rf_part_num == PART_AT86RF212)
- rf_if_read_payload(ptr, 0, len);
- else if(rf_part_num == PART_AT86RF233)
- rf_if_read_payload(ptr, 1, len);
-}
-
-/*
- * \brief Function writes RF short address registers
- *
- * \param short_address Given short address
- *
- * \return none
- */
-void rf_if_write_short_addr_registers(uint8_t *short_address)
-{
- rf_if_write_register(SHORT_ADDR_1, *short_address++);
- rf_if_write_register(SHORT_ADDR_0, *short_address);
-}
-
-/*
- * \brief Function sets the frame pending in ACK message
- *
- * \param state Given frame pending state
- *
- * \return none
- */
-void rf_if_ack_pending_ctrl(uint8_t state)
-{
- arm_enter_critical();
- if(state)
- {
- rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD));
- }
- else
- {
- rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD));
- }
- arm_exit_critical();
-}
-
-/*
- * \brief Function returns the state of frame pending control
- *
- * \param none
- *
- * \return Frame pending state
- */
-uint8_t rf_if_last_acked_pending(void)
-{
- uint8_t last_acked_data_pending;
-
- if(rf_if_read_register(CSMA_SEED_1) & 0x20)
- last_acked_data_pending = 1;
- else
- last_acked_data_pending = 0;
-
- return last_acked_data_pending;
-}
-
-/*
- * \brief Function calibrates the RF part.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_calibration(void)
-{
- rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START);
- /*Wait while calibration is running*/
- while(rf_if_read_register(FTN_CTRL) & FTN_START);
-}
-
-/*
- * \brief Function writes RF PAN Id registers
- *
- * \param pan_id Given PAN Id
- *
- * \return none
- */
-void rf_if_write_pan_id_registers(uint8_t *pan_id)
-{
- rf_if_write_register(PAN_ID_1, *pan_id++);
- rf_if_write_register(PAN_ID_0, *pan_id);
-}
-
-/*
- * \brief Function writes RF IEEE Address registers
- *
- * \param address Given IEEE Address
- *
- * \return none
- */
-void rf_if_write_ieee_addr_registers(uint8_t *address)
-{
- uint8_t i;
- uint8_t temp = IEEE_ADDR_0;
-
- for(i=0; i<8; i++)
- rf_if_write_register(temp++, address[7-i]);
-}
-
-/*
- * \brief Function writes data in RF frame buffer.
- *
- * \param ptr Pointer to data
- * \param length Pointer to length
- *
- * \return none
- */
-void rf_if_write_frame_buffer(uint8_t *ptr, uint8_t length)
-{
- uint8_t i;
- uint8_t cmd = 0x60;
-
- RF_CS_Set(0);
- spi_exchange(cmd);
- spi_exchange(length + 2);
- for(i=0; i<length; i++)
- spi_exchange(*ptr++);
-
- rf_if_delay_function(10);
- RF_CS_Set(1);
-}
-
-/*
- * \brief Function returns 8-bit random value.
- *
- * \param none
- *
- * \return random value
- */
-uint8_t rf_if_read_rnd(void)
-{
- uint8_t temp;
-
- temp = ((rf_if_read_register(PHY_RSSI)>>5) << 6);
- temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 4);
- temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 2);
- temp |= ((rf_if_read_register(PHY_RSSI)>>5));
- return temp;
-}
-
-/*
- * \brief Function changes the state of the RF.
- *
- * \param trx_state Given RF state
- *
- * \return none
- */
-void rf_if_change_trx_state(rf_trx_states_t trx_state)
-{
- arm_enter_critical();
- rf_if_write_register(TRX_STATE, trx_state);
- /*Wait while not in desired state*/
- rf_poll_trx_state_change(trx_state);
- arm_exit_critical();
-}
-
-/*
- * \brief Function enables the TX END interrupt
- *
- * \param none
- *
- * \return none
- */
-void rf_if_enable_tx_end_interrupt(void)
-{
- rf_if_set_bit(IRQ_MASK, TRX_END, 0x08);
-}
-
-/*
- * \brief Function enables the RX END interrupt
- *
- * \param none
- *
- * \return none
- */
-void rf_if_enable_rx_end_interrupt(void)
-{
- rf_if_set_bit(IRQ_MASK, TRX_END, 0x08);
-}
-
-/*
- * \brief Function enables the RX START interrupt
- *
- * \param none
- *
- * \return none
- */
-void rf_if_enable_rx_start_interrupt(void)
-{
- rf_if_set_bit(IRQ_MASK, RX_START, 0x04);
-}
-
-/*
- * \brief Function enables the CCA ED interrupt
- *
- * \param none
- *
- * \return none
- */
-void rf_if_enable_cca_ed_done_interrupt(void)
-{
- rf_if_set_bit(IRQ_MASK, CCA_ED_DONE, 0x10);
-}
-
-/*
- * \brief Function starts the CCA process
- *
- * \param none
- *
- * \return none
- */
-void rf_if_start_cca_process(void)
-{
- rf_if_set_bit(PHY_CC_CCA, CCA_REQUEST, 0x80);
-}
-
-/*
- * \brief Function returns the length of the received packet
- *
- * \param none
- *
- * \return packet length
- */
-uint8_t rf_if_read_received_frame_length(void)
-{
- uint8_t length;
-
- RF_CS_Set(0);
- spi_exchange(0x20);
- length = spi_exchange(0);
- RF_CS_Set(1);
- return length;
-}
-
-/*
- * \brief Function returns the LQI of the received packet
- *
- * \param none
- *
- * \return packet LQI
- */
-uint8_t rf_if_read_lqi(void)
-{
- return rf_rx_lqi;
-}
-
-/*
- * \brief Function returns the RSSI of the received packet
- *
- * \param none
- *
- * \return packet RSSI
- */
-int8_t rf_if_read_rssi(void)
-{
- return rf_rx_rssi;
-}
-
-/*
- * \brief Function sets the RF channel field
- *
- * \param Given channel
- *
- * \return none
- */
-void rf_if_set_channel_register(uint8_t channel)
-{
- rf_if_set_bit(PHY_CC_CCA, channel, 0x1f);
-}
-
-/*
- * \brief Function returns the pointer to RF interrupt handler
- *
- * \param none
- *
- * \return RF interrupt handler function
- */
-void (*rf_if_get_rf_interrupt_function())(void)
-{
- return rf_if_interrupt_handler;
-}
-
-/*
- * \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt.
- *
- * \param none
- *
- * \return none
- */
-void rf_if_interrupt_handler(void)
-{
- uint8_t irq_status;
-
- /*Read interrupt flag*/
- irq_status = rf_if_read_register(IRQ_STATUS);
-
- /*Disable interrupt on RF*/
- rf_if_clear_bit(IRQ_MASK, irq_status);
- /*RX start interrupt*/
- if(irq_status & RX_START)
- {
- }
- /*Address matching interrupt*/
- if(irq_status & AMI)
- {
- }
- if(irq_status & TRX_UR)
- {
- }
- /*Frame end interrupt (RX and TX)*/
- if(irq_status & TRX_END)
- {
- /*TX done interrupt*/
- if(rf_if_read_trx_state() == PLL_ON || rf_if_read_trx_state() == TX_ARET_ON)
- {
- rf_handle_tx_end();
- }
- /*Frame received interrupt*/
- else
- {
- rf_handle_rx_end();
- }
- }
- if(irq_status & CCA_ED_DONE)
- {
- rf_handle_cca_ed_done();
- }
-}
-
--- a/RF_Drivers_Atmel/driverAtmelRFInterface_h.txt Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,194 +0,0 @@ -/* - * driverAtmelRFInterface.h - * - * Created on: 14 July 2014 - * Author: mBed Team - */ - -#ifndef DRIVERRFINTERFACE_H_ -#define DRIVERRFINTERFACE_H_ - - -/*Delay between transfers(bytes) (32*DLYBCT)/MCK -> (32*6/120MHz=1.6us)*/ -#define SPI_DLYBCT 6 -/*Delay before SPCK DLYBS/MCK -> 140/120MHz=1.16us)*/ -#define SPI_DLYBS 140 -/*Serial clock baud rate MCK/SCBR -> 120MHz/18=6.7MHz)*/ -#define SPI_SCBR 18 - -#define PHY_ACK_WAIT_TICK_VAL 185 -#define PHY_CALIBRATION_TICK_VAL 185 -#define PHY_ACK_WAIT_TIMER 1 -#define PHY_CALIBRATION_TIMER 2 - -/*Supported transceivers*/ -#define PART_AT86RF231 0x03 -#define PART_AT86RF212 0x07 -#define PART_AT86RF233 0x0B -#define VERSION_AT86RF212 0x01 -#define VERSION_AT86RF212B 0x03 - -/*RF Configuration Registers*/ -#define TRX_STATUS 0x01 -#define TRX_STATE 0x02 -#define TRX_CTRL_0 0x03 -#define TRX_CTRL_1 0x04 -#define PHY_TX_PWR 0x05 -#define PHY_RSSI 0x06 -#define PHY_ED_LEVEL 0x07 -#define PHY_CC_CCA 0x08 -#define RX_CTRL 0x0A -#define SFD_VALUE 0x0B -#define TRX_CTRL_2 0x0C -#define ANT_DIV 0x0D -#define IRQ_MASK 0x0E -#define IRQ_STATUS 0x0F -#define VREG_CTRL 0x10 -#define BATMON 0x11 -#define XOSC_CTRL 0x12 -#define CC_CTRL_0 0x13 -#define CC_CTRL_1 0x14 -#define RX_SYN 0x15 -#define TRX_RPC 0x16 -#define RF_CTRL_0 0x16 -#define XAH_CTRL_1 0x17 -#define FTN_CTRL 0x18 -#define PLL_CF 0x1A -#define PLL_DCU 0x1B -#define PART_NUM 0x1C -#define VERSION_NUM 0x1D -#define MAN_ID_0 0x1E -#define MAN_ID_1 0x1F -#define SHORT_ADDR_0 0x20 -#define SHORT_ADDR_1 0x21 -#define PAN_ID_0 0x22 -#define PAN_ID_1 0x23 -#define IEEE_ADDR_0 0x24 -#define IEEE_ADDR_1 0x25 -#define IEEE_ADDR_2 0x26 -#define IEEE_ADDR_3 0x27 -#define IEEE_ADDR_4 0x28 -#define IEEE_ADDR_5 0x29 -#define IEEE_ADDR_6 0x2A -#define IEEE_ADDR_7 0x2B -#define XAH_CTRL_0 0x2C -#define CSMA_SEED_0 0x2D -#define CSMA_SEED_1 0x2E -#define CSMA_BE 0x2F - -/* CSMA_SEED_1*/ -#define AACK_FVN_MODE1 7 -#define AACK_FVN_MODE0 6 -#define AACK_SET_PD 5 -#define AACK_DIS_ACK 4 -#define AACK_I_AM_COORD 3 -#define CSMA_SEED_12 2 -#define CSMA_SEED_11 1 -#define CSMA_SEED_10 0 - -/*TRX_STATUS bits*/ -#define CCA_STATUS 0x40 -#define CCA_DONE 0x80 - -/*PHY_CC_CCA bits*/ -#define CCA_REQUEST 0x80 -#define CCA_MODE_1 0x20 -#define CCA_MODE_3 0x60 - -/*IRQ_MASK bits*/ -#define RX_START 0x04 -#define TRX_END 0x08 -#define CCA_ED_DONE 0x10 -#define AMI 0x20 -#define TRX_UR 0x40 - -/*ANT_DIV bits*/ -#define ANT_DIV_EN 0x08 -#define ANT_EXT_SW_EN 0x04 -#define ANT_CTRL_DEFAULT 0x03 - -/*TRX_CTRL_1 bits*/ -#define PA_EXT_EN 0x80 - -/*FTN_CTRL bits*/ -#define FTN_START 0x80 - -/*PHY_RSSI bits*/ -#define CRC_VALID 0x80 - -/*AT86RF212 PHY Modes*/ -#define BPSK_20 0x00 -#define BPSK_40 0x04 -#define BPSK_40_ALT 0x14 -#define OQPSK_SIN_RC_100 0x08 -#define OQPSK_SIN_RC_200 0x09 -#define OQPSK_RC_100 0x18 -#define OQPSK_RC_200 0x19 -#define OQPSK_SIN_250 0x0c -#define OQPSK_SIN_500 0x0d -#define OQPSK_SIN_500_ALT 0x0f -#define OQPSK_RC_250 0x1c -#define OQPSK_RC_500 0x1d -#define OQPSK_RC_500_ALT 0x1f -#define OQPSK_SIN_RC_400_SCR_ON 0x2A -#define OQPSK_SIN_RC_400_SCR_OFF 0x0A -#define OQPSK_RC_400_SCR_ON 0x3A -#define OQPSK_RC_400_SCR_OFF 0x1A -#define OQPSK_SIN_1000_SCR_ON 0x2E -#define OQPSK_SIN_1000_SCR_OFF 0x0E -#define OQPSK_RC_1000_SCR_ON 0x3E -#define OQPSK_RC_1000_SCR_OFF 0x1E - -extern void rf_if_delay_function(uint16_t ticks); -extern uint8_t rf_if_read_rnd(void); -extern void rf_if_calibration_timer_start(uint32_t slots); -extern void rf_if_interrupt_handler(void); -extern void (*rf_if_get_rf_interrupt_function())(void); -extern void rf_if_calibration_timer_interrupt(void); -extern void rf_if_timer_init(void); -extern void rf_if_ack_wait_timer_start(uint16_t slots); -extern void rf_if_ack_wait_timer_stop(void); -extern void rf_if_ack_wait_timer_interrupt(void); -extern int8_t rf_if_set_rf_irq_pin(uint8_t port, uint8_t pin); -extern int8_t rf_if_set_slp_tr_pin(uint8_t port, uint8_t pin); -extern int8_t rf_if_set_reset_pin(uint8_t port, uint8_t pin); -extern int8_t rf_if_set_spi_interface(uint8_t spi_interface, uint8_t cs_device); -extern uint8_t rf_if_spi_exchange(uint8_t spi_if, uint8_t out); -extern void rf_if_ack_pending_ctrl(uint8_t state); -extern void rf_if_calibration(void); -extern uint8_t rf_if_read_register(uint8_t addr); -extern void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask); -extern void rf_if_clear_bit(uint8_t addr, uint8_t bit); -extern void rf_if_write_register(uint8_t addr, uint8_t data); -extern void rf_if_reset_radio(void); -extern void rf_if_enable_pa_ext(void); -extern void rf_if_disable_pa_ext(void); -extern void rf_if_enable_ant_div(void); -extern void rf_if_disable_ant_div(void); -extern void rf_if_enable_slptr(void); -extern void rf_if_disable_slptr(void); -extern void rf_if_write_antenna_diversity_settings(void); -extern void rf_if_write_set_tx_power_register(uint8_t value); -extern void rf_if_write_set_trx_rpc_register(uint8_t value); -extern void rf_if_write_rf_settings(void); -extern uint8_t rf_if_check_cca(void); -extern uint8_t rf_if_check_crc(void); -extern uint8_t rf_if_read_trx_state(void); -extern void rf_if_read_packet(uint8_t *ptr, uint8_t len); -extern void rf_if_write_short_addr_registers(uint8_t *short_address); -extern uint8_t rf_if_last_acked_pending(void); -extern void rf_if_write_pan_id_registers(uint8_t *pan_id); -extern void rf_if_write_ieee_addr_registers(uint8_t *address); -extern void rf_if_write_frame_buffer(uint8_t *ptr, uint8_t length); -extern void rf_if_change_trx_state(rf_trx_states_t trx_state); -extern void rf_if_enable_tx_end_interrupt(void); -extern void rf_if_enable_rx_end_interrupt(void); -extern void rf_if_enable_rx_start_interrupt(void); -extern void rf_if_enable_cca_ed_done_interrupt(void); -extern void rf_if_start_cca_process(void); -extern uint8_t rf_if_read_received_frame_length(void); -extern uint8_t rf_if_read_lqi(void); -extern int8_t rf_if_read_rssi(void); -extern void rf_if_set_channel_register(uint8_t channel); - -#endif /* DRIVERRFINTERFACE_H_ */
--- a/RF_Drivers_Atmel/driverDebug.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,265 +0,0 @@
-//#include "system_event.h"
-//#include <string.h>
-//#include "pl_types.h"
-//#include "pcer_low_level.h"
-//#include "pio_low_level.h"
-#include "driverDebug.h"
-//#include "uart_low_level.h"
-//#include "usart_low_level.h"
-//#include "SAMxxBoardDefinitions.h"
-//#include "arm_hal_interrupt.h"
-#include <stdio.h>
-
-#define debug printf
-
-
-/**
- * Send string to debug port.
- *
- * \param str String pointer. Have to end by zero ('\0')
- *
- */
-#if 0
-void debug_send1(uint8_t *str)
-{
- while(*str)
- {
- if (debug_put(*str) == 0)
- {
- str++;
- }
- else return;
- }
-}
-#endif
-
-/**
- * Send constant string to debug port.
- *
- * \param str Constant string pointer.
- *
- */
-#if 0
-void debug_send_const(prog_uint8_t *str)
-{
- while(*str)
- {
- //if (debug_put(*str) == 0)
- if (printf(str) == 0)
- {
- str++;
- }
- else return;
- }
-}
-#endif
-
-/*
- * \brief Help round function.
- *
- * \param value Divident
- * \param divider Divisor
- *
- * \return Quotient
- */
-uint32_t debug_round(uint32_t value, uint32_t divider)
-{
- uint32_t tmp = value;
- value *= 10;
- value /= divider;
- tmp = value;
- while(tmp > 10)
- tmp -= 10;
- if(((tmp & 0x0000000f) > 4) && ((tmp & 0x0000000f) < 10))
- value += 10;
- if(tmp != 10)
- value -= tmp;
- value /= 10;
- return value;
-}
-
-/**
- * Print a number to the debug port.
- *
- * \param width string maximum length
- * \param base base number (16 for hex, 10 for decimal etc.)
- * \param n number value
- *
- * \return pointer to the formatted string
- */
-void debug_integer(uint8_t width, uint8_t base, int16_t n)
-{
- uint8_t bfr[8];
- uint8_t *ptr = bfr;
- uint8_t ctr = 0;
-
- if (width > 7) width = 7;
-
- ptr += width;
- *ptr-- = 0;
-
- if (base == 16)
- {
- do
- {
- *ptr = n & 0x0F;
- if (*ptr < 10) *ptr += '0';
- else *ptr += ('A'-10);
- ptr--;
- n >>= 4;
- ctr++;
- }while((ctr & 1) || (ctr < width));
- }
- else
- {
- uint8_t negative = 0;
- if (n < 0)
- { negative = 1;
- n = -n;
- }
- ctr++;
- do
- {
- *ptr-- = (n % 10) + '0';
- n /= 10;
- ctr++;
- }while ((ctr < width) && n);
- if (negative)
- {
- *ptr-- = '-';
- }
- else
- {
- *ptr-- = ' ';
- }
- }
- ptr++;
- //debug_send(ptr);
- debug(ptr);
-}
-
-/**
- * Print data array in HEX format. Bytes are separated with colon.
- *
- * \param ptr Pointer to 8-bit data array.
- * \param len Amount of printed bytes
- *
- */
-void printf_array(uint8_t *ptr , uint16_t len)
-{
- uint16_t i;
- for(i=0; i<len; i++)
- {
- if(i)
- {
- if(i%16== 0)
- {
- debug("\r\n");
- if(len > 64)
- {
- uint8_t x =254;
- while(x--);
- }
- }
- else
- {
- debug(":");
- }
- }
- debug_hex(*ptr++);
- }
- debug("\r\n");
-}
-
-/**
- * Print a IPv6 address.
- *
- * \param addr_ptr pointer to ipv6 address
- *
- */
-void printf_ipv6_address(uint8_t *addr_ptr)
-{
- if(addr_ptr)
- {
- uint8_t i, d_colon = 0;
- uint16_t current_value = 0, last_value = 0;
-
- for(i=0; i< 16;i += 2)
- {
- current_value = (*addr_ptr++ << 8);
- current_value += *addr_ptr++;
-
- if(i == 0)
- {
- last_value = current_value;
- debug_hex(current_value >> 8);
- debug_hex(current_value );
- debug(":");
- }
- else
- {
- if(current_value == 0)
- {
- if(i== 14)
- {
- debug(":");
- //debug_put('0');
- debug("0");
- }
- else
- {
- if(last_value == 0)
- {
- if(d_colon == 0)
- {
- d_colon=1;
- }
- }
- else
- {
- if(d_colon == 2)
- {
- //debug_put('0');
- debug("0");
- debug(":");
- }
- }
- }
- }
- else
- {
- if(last_value == 0)
- {
- if(d_colon == 1)
- {
- debug(":");
- d_colon = 2;
- }
- else
- {
- //debug_put('0');
- debug("0");
- debug(":");
- }
- }
- if(current_value > 0x00ff)
- {
- debug_hex(current_value >> 8);
- }
- debug_hex(current_value );
- if(i< 14)
- {
- debug(":");
- }
- }
- last_value = current_value;
- }
- }
- }
- else
- {
- debug("Address Print: pointer NULL");
- }
- debug("\r\n");
-}
-
--- a/RF_Drivers_Atmel/driverDebug.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,50 +0,0 @@ -/* - * driverDebug.h - * - * Created on: 21 May 2014 - * Author: jarpas01 - */ -#ifndef DRIVERDEBUG_H_ -#define DRIVERDEBUG_H_ - -#include "stdint.h" - -//typedef unsigned char const prog_uint8_t; - -extern void debug_integer(uint8_t width, uint8_t base, int16_t n); -extern int16_t debug_get(void); -extern int8_t debug_put(uint8_t byte); -extern void debug_send(uint8_t *str); -//extern void debug_send_const(prog_uint8_t *str); -extern void printf_array(uint8_t *ptr , uint16_t len); -extern void printf_string(uint8_t *ptr , uint16_t len); -extern void printf_ipv6_address(uint8_t *addr_ptr); -extern int8_t debug_init(uint32_t speed, uint8_t io_conf); -extern void debug_interrupt_handler(void); -extern uint32_t debug_round(uint32_t value, uint32_t divider); - -/** - * Macro for printing a constant string to the debug port. - * - * \param y pointer to the string - * - */ -//#define debug(y) debug_send_const(y); -/** - * Macro for printing a 8-bit variable in HEX format to the debug port. - * - * \param y 8-bit variable - * - */ -#define debug_hex(y) debug_integer(2, 16, y) - -/** - * Macro for printing a 8/16-bit variable in integer format to the debug port. - * - * \param y 8/16-bit variable - * - */ -#define debug_int(y) debug_integer(6, 10, y) - - -#endif /* DRIVERDEBUG_H_ */
--- a/RF_Drivers_Atmel/driverRFPhy_c.txt Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,1237 +0,0 @@
-/*
- * driverRFPhy.c
- *
- * Created on: 14 July 2014
- * Author: mBed team
- */
-#include "arm_hal_interrupt.h"
-#include "arm_hal_phy.h"
-#include "driverRFPhy.h"
-#include "driverAtmelRFInterface.h"
-#include <string.h>
-
-#include <stdio.h>
-
-#include "options.h"
-
-/*RF receive buffer*/
-static uint8_t rf_buffer[RF_BUFFER_SIZE];
-/*RF ACK receive buffer*/
-static uint8_t ack_rx_buf[5];
-/*ACK wait duration changes depending on data rate*/
-static uint16_t rf_ack_wait_duration = RF_ACK_WAIT_TIMEOUT;
-
-static uint8_t radio_tx_power = 0x07;
-static uint8_t rf_channel;
-static uint8_t rf_tuned = 1;
-static uint8_t radio_rpc_value = 0xef;
-static uint8_t rf_use_front_end = 0;
-static uint8_t rf_use_antenna_diversity = 0;
-static uint8_t rf_csd_port = 0;
-static uint8_t rf_csd_pin = 0;
-static uint8_t rf_cps_port = 0;
-static uint8_t rf_cps_pin = 0;
-static uint8_t tx_sequence = 0xff;
-static uint8_t need_ack = 0;
-static uint8_t rf_rx_mode = 0;
-static uint8_t rf_flags = 0;
-static uint8_t rf_rnd_rssi = 0;
-static int8_t rf_radio_driver_id = -1;
-static phy_device_driver_s device_driver;
-static uint8_t atmel_MAC[8];
-static phy_device_channel_info_s channel_info;
-static uint8_t mac_tx_handle = 0;
-
-/*
- * \brief Function sets given RF flag on.
- *
- * \param x Given RF flag
- *
- * \return none
- */
-void rf_flags_set(uint8_t x)
-{
- rf_flags |= x;
-}
-
-/*
- * \brief Function clears given RF flag on.
- *
- * \param x Given RF flag
- *
- * \return none
- */
-void rf_flags_clear(uint8_t x)
-{
- rf_flags &= ~x;
-}
-
-/*
- * \brief Function checks if given RF flag is on.
- *
- * \param x Given RF flag
- *
- * \return states of the given flags
- */
-uint8_t rf_flags_check(uint8_t x)
-{
- return (rf_flags & x);
-}
-
-/*
- * \brief Function clears all RF flags.
- *
- * \param none
- *
- * \return none
- */
-void rf_flags_reset(void)
-{
- rf_flags = 0;
-}
-
-/*
- * \brief Function sets CPS and CSD pins of the Front end.
- *
- * \param none
- *
- * \return none
- */
-void rf_front_end_rx_lna(void)
-{
- /* not supported in this version */
-}
-
-/*
- * \brief Function clears CPS and CSD pins of the Front end.
- *
- * \param none
- *
- * \return none
- */
-void rf_front_end_sleep(void)
-{
- /* not supported in this version */
-}
-
-/*
- * \brief Function initialises and registers the RF driver.
- *
- * \param none
- *
- * \return rf_radio_driver_id Driver ID given by NET library
- */
-int8_t rf_device_register(void)
-{
- rf_init();
- /*Set pointer to MAC address*/
- device_driver.PHY_MAC = atmel_MAC;
- device_driver.driver_description = "ATMEL_MAC";
-#if PHY_LINK_15_4_2_4GHZ_TYPE
- /*Number of channels in PHY*/
- channel_info.channel_count = 16;
- /*Channel mask 26-11*/
- channel_info.channel_mask = 0x07FFF800;
- /*Type of RF PHY is SubGHz*/
- device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
- device_driver.link_channel_info = &channel_info;
-#else
- /*Number of channels in PHY*/
- channel_info.channel_count = 11;
- /*Channel mask 0-10*/
- channel_info.channel_mask = 0x000007ff;
- /*Type of RF PHY is SubGHz*/
- device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
- device_driver.link_channel_info = &channel_info;
-#endif
- /*Maximum size of payload is 127*/
- device_driver.phy_MTU = 127;
- /*No header in PHY*/
- device_driver.phy_header_length = 0;
- /*No tail in PHY*/
- device_driver.phy_tail_length = 0;
- /*Set address write function*/
- device_driver.phy_xx_address_write = &rf_address_write;
- /*Set RF extension function*/
- device_driver.phy_xx_extension = &rf_extension;
- /*Set RF state control function*/
- device_driver.phy_xx_state_control = &rf_interface_state_control;
- /*Set transmit function*/
- device_driver.phy_xx_tx = &rf_start_cca;
- printf("RF Device Registration...");
- /*Register device driver*/
- rf_radio_driver_id = arm_net_phy_register(&device_driver);
- printf("OK\r\n");
- return rf_radio_driver_id;
-}
-
-/*
- * \brief Function returns the generated 8-bit random value for seeding Pseudo-random generator. This value was generated by reading noise from RF channel in RF initialisation.
- *
- * \param none
- *
- * \return random RSSI value
- */
-int8_t rf_read_random(void)
-{
- return rf_rnd_rssi;
-}
-
-/*
- * \brief Function is a call back for ACK wait timeout.
- *
- * \param none
- *
- * \return none
- */
-void rf_ack_wait_timer_interrupt(void)
-{
- arm_enter_critical();
- /*Force PLL state*/
- rf_if_change_trx_state(FORCE_PLL_ON);
- rf_poll_trx_state_change(PLL_ON);
- /*Start receiver in RX_AACK_ON state*/
- rf_rx_mode = 0;
- rf_flags_clear(RFF_RX);
- rf_receive();
- arm_exit_critical();
-}
-
-/*
- * \brief Function is a call back for calibration interval timer.
- *
- * \param none
- *
- * \return none
- */
-void rf_calibration_timer_interrupt(void)
-{
- /*Calibrate RF*/
- rf_calibration_cb();
- /*Start new calibration timeout*/
- rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
-}
-
-/*
- * \brief Function initialises the RF timer for ACK wait and calibration.
- *
- * \param none
- *
- * \return none
- */
-void rf_timer_init(void)
-{
- rf_if_timer_init();
-}
-
-/*
- * \brief Function starts the ACK wait timeout.
- *
- * \param slots Given slots, resolution 50us
- *
- * \return none
- */
-void rf_ack_wait_timer_start(uint16_t slots)
-{
- rf_if_ack_wait_timer_start(slots);
-}
-
-/*
- * \brief Function starts the calibration interval.
- *
- * \param slots Given slots, resolution 50us
- *
- * \return none
- */
-void rf_calibration_timer_start(uint32_t slots)
-{
- rf_if_calibration_timer_start(slots);
-}
-
-/*
- * \brief Function stops the ACK wait timeout.
- *
- * \param none
- *
- * \return none
- */
-void rf_ack_wait_timer_stop(void)
-{
- rf_if_ack_wait_timer_stop();
-}
-
-/*
- * \brief Function reads the MAC address array.
- *
- * \param ptr Pointer to read array
- *
- * \return none
- */
-void rf_read_mac_address(uint8_t *ptr)
-{
- memcpy(ptr, atmel_MAC, 8);
-}
-
-/*
- * \brief Function sets the MAC address array.
- *
- * \param ptr Pointer to given MAC address array
- *
- * \return none
- */
-void rf_set_mac_address(const uint8_t *ptr)
-{
- memcpy(atmel_MAC,ptr,8);
-}
-
-/*
- * \brief Function writes various RF settings in startup.
- *
- * \param none
- *
- * \return none
- */
-void rf_write_settings(void)
-{
- int i, j = 0;
-
- arm_enter_critical();
-
- //printf("RF Write Settings: 1\r\n");
- rf_if_write_rf_settings();
-
- //printf("RF Write Settings: 2\r\n");
- /*Set output power*/
- rf_if_write_set_tx_power_register(radio_tx_power);
-
- //printf("RF Write Settings: 3\r\n");
- /*Set RPC register*/
- rf_if_write_set_trx_rpc_register(radio_rpc_value);
-
- //printf("RF Write Settings: 4\r\n");
- /*Initialise Front end*/
- if(rf_use_front_end)
- {
- printf("RF Front End used\r\n");
- rf_if_enable_pa_ext();
- /* not supported in this version */
- }
-
- //printf("RF Write Settings: 5\r\n");
- /*Initialise Antenna Diversity*/
- if(rf_use_antenna_diversity) {
- printf("RF Antenna diversity\r\n");
- rf_if_write_antenna_diversity_settings();
- }
-
- printf("RF Write Settings: 7\r\n");
- arm_exit_critical();
- printf("RF Write Settings End\r\n");
-}
-
-/*
- * \brief Function writes 16-bit address in RF address filter.
- *
- * \param short_address Given short address
- *
- * \return none
- */
-void rf_set_short_adr(uint8_t * short_address)
-{
- uint8_t rf_off_flag = 0;
- arm_enter_critical();
- /*Wake up RF if sleeping*/
- if(rf_if_read_trx_state() == 0x00 || rf_if_read_trx_state() == 0x1F)
- {
- rf_if_disable_slptr();
- rf_off_flag = 1;
- rf_poll_trx_state_change(TRX_OFF);
- }
- /*Write address filter registers*/
- rf_if_write_short_addr_registers(short_address);
- /*RF back to sleep*/
- if(rf_off_flag)
- rf_if_enable_slptr();
- arm_exit_critical();
-}
-
-/*
- * \brief Function writes PAN Id in RF PAN Id filter.
- *
- * \param pan_id Given PAN Id
- *
- * \return none
- */
-void rf_set_pan_id(uint8_t *pan_id)
-{
- uint8_t rf_off_flag = 0;
-
- arm_enter_critical();
- /*Wake up RF if sleeping*/
- if(rf_if_read_trx_state() == 0x00 || rf_if_read_trx_state() == 0x1F)
- {
- rf_if_disable_slptr();
- rf_off_flag = 1;
- rf_poll_trx_state_change(TRX_OFF);
- }
- /*Write address filter registers*/
- rf_if_write_pan_id_registers(pan_id);
- /*RF back to sleep*/
- if(rf_off_flag)
- rf_if_enable_slptr();
- arm_exit_critical();
-}
-
-/*
- * \brief Function writes 64-bit address in RF address filter.
- *
- * \param address Given 64-bit address
- *
- * \return none
- */
-void rf_set_address(uint8_t *address)
-{
- uint8_t rf_off_flag = 0;
-
- arm_enter_critical();
- /*Wake up RF if sleeping*/
- if(rf_if_read_trx_state() == 0x00 || rf_if_read_trx_state() == 0x1F)
- {
- rf_if_disable_slptr();
- rf_off_flag = 1;
- rf_poll_trx_state_change(TRX_OFF);
- }
- /*Write address filter registers*/
- rf_if_write_ieee_addr_registers(address);
- /*RF back to sleep*/
- if(rf_off_flag)
- rf_if_enable_slptr();
-
- arm_exit_critical();
-}
-
-/*
- * \brief Function sets the RF channel.
- *
- * \param ch New channel
- *
- * \return none
- */
-void rf_channel_set(uint8_t ch)
-{
- arm_enter_critical();
- rf_channel = ch;
- if(ch < 0x1f)
- rf_if_set_channel_register(ch);
- arm_exit_critical();
-}
-
-
-/*
- * \brief Function initialises the radio driver and resets the radio.
- *
- * \param none
- *
- * \return none
- */
-void rf_init(void)
-{
- printf("RF Init Start\r\n");
- /*Initialise timers*/
- rf_timer_init(); //TODO
- rf_channel = RF_DEFAULT_CHANNEL;
- printf("RF Reset\r\n");
- /*Reset RF module*/
- rf_if_reset_radio();
- printf("RF Write Settings\r\n");
- /*Write RF settings*/
- rf_write_settings();
- printf("RF Init PHY Mode\r\n");
- /*Initialise PHY mode*/
- rf_init_phy_mode();
- /*Clear RF flags*/
- rf_flags_reset();
- /*Set RF in TRX OFF state*/
- rf_if_change_trx_state(TRX_OFF);
- /*Set RF in PLL_ON state*/
- rf_if_change_trx_state(PLL_ON);
- /*Start receiver*/
- rf_receive();
- /*Read random variable. This will be used when seeding pseudo-random generator*/
- rf_rnd_rssi = rf_if_read_rnd();
- /*Start RF calibration timer*/
- rf_calibration_timer_start(RF_CALIBRATION_INTERVAL); //ACA!
- printf("RF Init End\r\n");
-}
-
-/**
- * \brief Function gets called when MAC is setting radio off.
- *
- * \param none
- *
- * \return none
- */
-void rf_off(void)
-{
- if(rf_flags_check(RFF_ON))
- {
- rf_cca_abort();
- uint16_t while_counter = 0;
- /*Wait while receiving*/
- while(rf_if_read_trx_state() == BUSY_RX_AACK || rf_if_read_trx_state() == BUSY_RX)
- {
- while_counter++;
- if(while_counter == 0xffff)
- break;
- }
- /*RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP*/
- if(rf_if_read_trx_state() == RX_AACK_ON)
- {
- rf_if_change_trx_state(PLL_ON);
- }
- rf_if_change_trx_state(TRX_OFF);
- rf_if_enable_slptr();
- rf_flags_clear(~RFF_ON);
- /*Front end in sleep*/
- if(rf_use_front_end)
- {
- rf_if_disable_pa_ext();
- rf_front_end_sleep();
- }
- /*Disable Antenna Diversity*/
- if(rf_use_antenna_diversity)
- rf_if_disable_ant_div();
- }
-}
-
-/*
- * \brief Function polls the RF state until it has changed to desired state.
- *
- * \param trx_state RF state
- *
- * \return none
- */
-void rf_poll_trx_state_change(rf_trx_states_t trx_state)
-{
- uint16_t while_counter = 0;
- arm_enter_critical();
-
- if(trx_state != RF_TX_START)
- {
- if(trx_state == FORCE_PLL_ON)
- trx_state = PLL_ON;
- else if(trx_state == FORCE_TRX_OFF)
- trx_state = TRX_OFF;
-
- while(rf_if_read_trx_state() != trx_state)
- {
- while_counter++;
- if(while_counter == 0x1ff)
- break;
- }
- }
- arm_exit_critical();
-}
-
-/*
- * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
- *
- * \param data_ptr Pointer to TX data
- * \param data_length Length of the TX data
- * \param tx_handle Handle to transmission
- * \return 0 Success
- * \return -1 Busy
- */
-int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle)
-{
- /*Check if transmitter is busy*/
- if((rf_if_read_trx_state() == BUSY_RX_AACK) || (rf_if_read_trx_state() == BUSY_RX))
- {
- /*Return busy*/
- return -1;
- }
- else
- {
- arm_enter_critical();
- /*Check if transmitted data needs to be acked*/
- if(*data_ptr & 0x20)
- need_ack = 1;
- else
- need_ack = 0;
- /*Store the sequence number for ACK handling*/
- tx_sequence = *(data_ptr + 2);
- /*Set radio in RX state to read channel*/
- rf_receive();
- /*Write TX FIFO*/
- rf_if_write_frame_buffer(data_ptr, (uint8_t)data_length);
- rf_flags_set(RFF_CCA);
- /*Start CCA process*/
- rf_if_enable_cca_ed_done_interrupt();
- rf_if_start_cca_process();
- /*Store TX handle*/
- mac_tx_handle = tx_handle;
- arm_exit_critical();
- }
-
- /*Return success*/
- return 0;
-}
-
-/*
- * \brief Function aborts CCA process.
- *
- * \param none
- *
- * \return none
- */
-void rf_cca_abort(void)
-{
- /*Clear RFF_CCA RF flag*/
- rf_flags_clear(RFF_CCA);
-}
-
-
-
-/*
- * \brief Function starts the transmission of the frame.
- *
- * \param none
- *
- * \return none
- */
-void rf_start_tx(void)
-{
- /*Only start transmitting from RX state*/
- uint8_t trx_state = rf_if_read_trx_state();
- if((trx_state != RX_AACK_ON) && (trx_state != RX_ON))
- {
- arm_net_phy_tx_done(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1);
- }
- else
- {
- /*RF state change: ->PLL_ON->RF_TX_START*/
- rf_if_change_trx_state(FORCE_PLL_ON);
- rf_flags_clear(RFF_RX);
- rf_if_enable_tx_end_interrupt();
- rf_flags_set(RFF_TX);
- rf_if_change_trx_state(RF_TX_START);
- }
-}
-
-/*
- * \brief Function sets the RF in RX state.
- *
- * \param none
- *
- * \return none
- */
-void rf_receive(void)
-{
- uint16_t while_counter = 0;
- if(rf_flags_check(RFF_ON) == 0)
- {
- rf_on();
- }
- /*If not yet in RX state set it*/
- if(rf_flags_check(RFF_RX) == 0)
- {
- arm_enter_critical();
- /*Wait while receiving data*/
- while((rf_if_read_trx_state() == BUSY_RX) || (rf_if_read_trx_state() == BUSY_RX_AACK))
- {
- while_counter++;
- if(while_counter == 0xffff)
- {
- break;
- }
- }
- /*Wake up from sleep state*/
- if(rf_if_read_trx_state() == 0x00 || rf_if_read_trx_state() == 0x1f)
- {
- rf_if_disable_slptr();
- rf_poll_trx_state_change(TRX_OFF);
- }
-
- rf_if_change_trx_state(PLL_ON);
- /*ACK is always received in RX_ON state to bypass address filters*/
- if(rf_rx_mode)
- {
- rf_rx_mode = 0;
- rf_if_change_trx_state(RX_ON);
- }
- else
- {
- rf_if_change_trx_state(RX_AACK_ON);
- /*If calibration timer was unable to calibrate the RF, run calibration now*/
- if(!rf_tuned)
- {
- /*Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state*/
- rf_if_calibration();
- /*RF is tuned now*/
- rf_tuned = 1;
- }
- }
- rf_channel_set(rf_channel);
- rf_flags_set(RFF_RX);
- rf_if_enable_rx_end_interrupt();
- /*Enable LNA if Front end used*/
- if(rf_use_front_end)
- rf_front_end_rx_lna();
- arm_exit_critical();
- }
- /*Stop the running CCA process*/
- if(rf_flags_check(RFF_CCA))
- rf_cca_abort();
-}
-
-/*
- * \brief Function calibrates the radio.
- *
- * \param none
- *
- * \return none
- */
-void rf_calibration_cb(void)
-{
- /*clear tuned flag to start tuning in rf_receive*/
- rf_tuned = 0;
- /*If RF is in default receive state, start calibration*/
- if(rf_if_read_trx_state() == RX_AACK_ON)
- {
- arm_enter_critical();
- /*Set RF in PLL_ON state*/
- rf_if_change_trx_state(PLL_ON);
- /*Set RF in TRX_OFF state to start PLL tuning*/
- rf_if_change_trx_state(TRX_OFF);
- /*Set RF in RX_ON state to calibrate*/
- rf_if_change_trx_state(RX_ON);
- /*Calibrate FTN*/
- rf_if_calibration();
- /*RF is tuned now*/
- rf_tuned = 1;
- /*Back to default receive state*/
- rf_flags_clear(RFF_RX);
- rf_receive();
- arm_exit_critical();
- }
-}
-
-/*
- * \brief Function sets RF_ON flag when radio is powered.
- *
- * \param none
- *
- * \return none
- */
-void rf_on(void)
-{
- /*Set RFF_ON flag*/
- if(rf_flags_check(RFF_ON) == 0)
- {
- rf_flags_set(RFF_ON);
- /*Wake up Front end*/
- if(rf_use_front_end)
- {
- /*Set PA_EXT_EN to enable controlling of external front end*/
- rf_if_enable_pa_ext();
- rf_front_end_rx_lna();
- }
- /*Enable Antenna diversity*/
- if(rf_use_antenna_diversity)
- /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
- rf_if_enable_ant_div();
- }
-}
-
-/*
- * \brief Function handles the received ACK frame.
- *
- * \param seq_number Sequence number of received ACK
- * \param data_pending Pending bit state in received ACK
- *
- * \return none
- */
-void rf_handle_ack(uint8_t seq_number, uint8_t data_pending)
-{
- phy_link_tx_status_e phy_status;
- arm_enter_critical();
- /*Received ACK sequence must be equal with transmitted packet sequence*/
- if(tx_sequence == seq_number)
- {
- rf_ack_wait_timer_stop();
- /*When data pending bit in ACK frame is set, inform NET library*/
- if(data_pending)
- phy_status = PHY_LINK_TX_DONE_PENDING;
- else
- phy_status = PHY_LINK_TX_DONE;
- /*Call PHY TX Done API*/
- arm_net_phy_tx_done(rf_radio_driver_id, mac_tx_handle,phy_status, 1, 1);
- }
- arm_exit_critical();
-}
-
-/*
- * \brief Function is a call back for RX end interrupt.
- *
- * \param none
- *
- * \return none
- */
-void rf_handle_rx_end(void)
-{
- uint8_t rf_lqi;
-
- /*Frame received interrupt*/
- if(rf_flags_check(RFF_RX))
- {
- /*Check CRC_valid bit*/
- if(rf_if_check_crc())
- {
- uint8_t *rf_rx_ptr;
- uint8_t receiving_ack = 0;
- /*Read length*/
- uint8_t len = rf_if_read_received_frame_length();
- /*Not ACK frame*/
- if(len > 5)
- {
- rf_rx_ptr = rf_buffer;
- }
- /*ACK received*/
- else
- {
- /*Read ACK in static ACK buffer*/
- receiving_ack = 1;
- rf_rx_ptr = ack_rx_buf;
- }
- /*Check the length is valid*/
- if(len > 1 && len < RF_BUFFER_SIZE)
- {
- /*Read received packet*/
- rf_if_read_packet(rf_rx_ptr, len);
- /*Get LQI*/
- rf_lqi = rf_if_read_lqi();
- /*Handle received ACK*/
- if(receiving_ack && ((ack_rx_buf[0] & 0x07) == 0x02))
- {
- uint8_t pending = 0;
- /*Check if data is pending*/
- if ((ack_rx_buf[0] & 0x10))
- {
- pending=1;
- }
- /*Send sequence number in ACK handler*/
- rf_handle_ack(ack_rx_buf[2], pending);
- }
- /*Handle received data*/
- else if(rf_if_read_trx_state() != RX_ON && rf_if_read_trx_state() != BUSY_RX)
- {
- arm_net_phy_rx(rf_buffer,len - 2, rf_lqi, rf_radio_driver_id);
- }
- }
- }
- }
- /*Start receiver*/
- rf_flags_clear(RFF_RX);
- rf_receive();
-}
-
-/*
- * \brief Function is called when MAC is shutting down the radio.
- *
- * \param none
- *
- * \return none
- */
-void rf_shutdown(void)
-{
- /*Call RF OFF*/
- rf_off();
- /*Clear RF flags*/
- rf_flags_reset();
-}
-
-/*
- * \brief Function is a call back for TX end interrupt.
- *
- * \param none
- *
- * \return none
- */
-void rf_handle_tx_end(void)
-{
- phy_link_tx_status_e phy_status = PHY_LINK_TX_SUCCESS;
-
- rf_rx_mode = 0;
- /*If ACK is needed for this transmission*/
- if(need_ack && rf_flags_check(RFF_TX))
- {
- rf_ack_wait_timer_start(rf_ack_wait_duration);
- rf_rx_mode = 1;
- }
- rf_flags_clear(RFF_RX);
- /*Start receiver*/
- rf_receive();
-
- /*Call PHY TX Done API*/
- arm_net_phy_tx_done(rf_radio_driver_id, mac_tx_handle, phy_status, 1, 1);
-}
-
-/*
- * \brief Function is a call back for CCA ED done interrupt.
- *
- * \param none
- *
- * \return none
- */
-void rf_handle_cca_ed_done(void)
-{
- rf_flags_clear(RFF_CCA);
- /*Check the result of CCA process*/
- if(rf_if_check_cca())
- {
- rf_start_tx();
- }
- else
- {
- /*Send CCA fail notification*/
- arm_net_phy_tx_done(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1);
- }
-}
-
-/*
- * \brief Function sets the TX power variable.
- *
- * \param power TX power setting
- *
- * \return 0 Success
- * \return -1 Fail
- */
-int8_t rf_tx_power_set(uint8_t power)
-{
- int8_t ret_val = -1;
- if(power < 16)
- {
- radio_tx_power = power;
- ret_val = 0;
- }
- return ret_val;
-}
-
-/*
- * \brief Function returns the TX power variable.
- *
- * \param none
- *
- * \return radio_tx_power TX power variable
- */
-uint8_t rf_tx_power_get(void)
-{
- return radio_tx_power;
-}
-
-/*
- * \brief Function sets the RF RPC variable.
- *
- * \param rpc_value RPC setting
- *
- * \return 0 Success
- */
-int8_t rf_rpc_set(uint8_t rpc_value)
-{
- int8_t ret_val = -1;
- radio_rpc_value = rpc_value;
- ret_val = 0;
- return ret_val;
-}
-
-/*
- * \brief Function enables the usage of Front end.
- *
- * \param none
- *
- * \return 0 Success
- */
-int8_t rf_enable_pa(void)
-{
- int8_t ret_val = 0;
- rf_use_front_end = 1;
- return ret_val;
-}
-
-/*
- * \brief Function enables the usage of Antenna diversity.
- *
- * \param none
- *
- * \return 0 Success
- */
-int8_t rf_enable_antenna_diversity(void)
-{
- int8_t ret_val = 0;
- rf_use_antenna_diversity = 1;
- return ret_val;
-}
-
-/*
- * \brief Function defines the CSD pin of the Front end.
- *
- * \param port CSD port
- * \param port CSD pin
- *
- * \return 0 Success
- */
-int8_t rf_set_csd_pin(uint8_t port, uint8_t pin)
-{
- int8_t ret_val = -1;
-
- rf_csd_port = port;
- rf_csd_pin = pin;
- ret_val = 0;
-
- return ret_val;
-}
-
-/*
- * \brief Function defines the CPS pin of the Front end.
- *
- * \param port CPS port
- * \param port CPS pin
- *
- * \return 0 Success
- */
-int8_t rf_set_cps_pin(uint8_t port, uint8_t pin)
-{
- int8_t ret_val = -1;
-
- rf_cps_port = port;
- rf_cps_pin = pin;
- ret_val = 0;
-
- return ret_val;
-}
-
-/*
- * \brief Function gives the control of RF states to MAC.
- *
- * \param new_state RF state
- * \param rf_channel RF channel
- *
- * \return 0 Success
- */
-static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
-{
- int8_t ret_val = 0;
- switch (new_state)
- {
- /*Reset PHY driver and set to idle*/
- case PHY_INTERFACE_RESET:
- break;
- /*Disable PHY Interface driver*/
- case PHY_INTERFACE_DOWN:
- rf_shutdown();
- break;
- /*Enable PHY Interface driver*/
- case PHY_INTERFACE_UP:
- rf_channel_set(rf_channel);
- rf_receive();
- break;
- /*Enable wireless interface ED scan mode*/
- case PHY_INTERFACE_RX_ENERGY_STATE:
- break;
- }
- return ret_val;
-}
-
-/*
- * \brief Function controls the ACK pending, channel setting and energy detection.
- *
- * \param extension_type Type of control
- * \param data_ptr Data from NET library
- *
- * \return 0 Success
- */
-static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
-{
- switch (extension_type)
- {
- /*Control MAC pending bit for Indirect data transmission*/
- case PHY_EXTENSION_CTRL_PENDING_BIT:
- if(*data_ptr)
- {
- rf_if_ack_pending_ctrl(1);
- }
- else
- {
- rf_if_ack_pending_ctrl(0);
- }
- break;
- /*Return frame pending status*/
- case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
- *data_ptr = rf_if_last_acked_pending();
- break;
- /*Set channel*/
- case PHY_EXTENSION_SET_CHANNEL:
- break;
- /*Read energy on the channel*/
- case PHY_EXTENSION_READ_CHANNEL_ENERGY:
- break;
- /*Read status of the link*/
- case PHY_EXTENSION_READ_LINK_STATUS:
- break;
- }
- return 0;
-}
-
-/*
- * \brief Function sets the addresses to RF address filters.
- *
- * \param address_type Type of address
- * \param address_ptr Pointer to given address
- *
- * \return 0 Success
- */
-static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
-{
- int8_t ret_val = 0;
- switch (address_type)
- {
- /*Set 48-bit address*/
- case PHY_MAC_48BIT:
- break;
- /*Set 64-bit address*/
- case PHY_MAC_64BIT:
- rf_set_address(address_ptr);
- break;
- /*Set 16-bit address*/
- case PHY_MAC_16BIT:
- rf_set_short_adr(address_ptr);
- break;
- /*Set PAN Id*/
- case PHY_MAC_PANID:
- rf_set_pan_id(address_ptr);
- break;
- }
- return ret_val;
-}
-
-/*
- * \brief Function initialises the ACK wait time and returns the used PHY mode.
- *
- * \param none
- *
- * \return tmp Used PHY mode
- */
-uint8_t rf_init_phy_mode(void)
-{
- uint8_t tmp;
- /*Read used PHY Mode*/
- tmp = rf_if_read_register(TRX_CTRL_2);
- /*Set ACK wait time for used data rate*/
- if((tmp & 0x1f) == 0x00)
- {
- rf_ack_wait_duration = 938;
- tmp = BPSK_20;
- }
- else if((tmp & 0x1f) == 0x04)
- {
- rf_ack_wait_duration = 469;
- tmp = BPSK_40;
- }
- else if((tmp & 0x1f) == 0x14)
- {
- rf_ack_wait_duration = 469;
- tmp = BPSK_40_ALT;
- }
- else if((tmp & 0x1f) == 0x08)
- {
- rf_ack_wait_duration = 100;
- tmp = OQPSK_SIN_RC_100;
- }
- else if((tmp & 0x1f) == 0x09)
- {
- rf_ack_wait_duration = 50;
- tmp = OQPSK_SIN_RC_200;
- }
- else if((tmp & 0x1f) == 0x18)
- {
- rf_ack_wait_duration = 100;
- tmp = OQPSK_RC_100;
- }
- else if((tmp & 0x1f) == 0x19)
- {
- rf_ack_wait_duration = 50;
- tmp = OQPSK_RC_200;
- }
- else if((tmp & 0x1f) == 0x0c)
- {
- rf_ack_wait_duration = 50;
- tmp = OQPSK_SIN_250;
- }
- else if((tmp & 0x1f) == 0x0d)
- {
- rf_ack_wait_duration = 25;
- tmp = OQPSK_SIN_500;
- }
- else if((tmp & 0x1f) == 0x0f)
- {
- rf_ack_wait_duration = 25;
- tmp = OQPSK_SIN_500_ALT;
- }
- else if((tmp & 0x1f) == 0x1c)
- {
- rf_ack_wait_duration = 50;
- tmp = OQPSK_RC_250;
- }
- else if((tmp & 0x1f) == 0x1d)
- {
- rf_ack_wait_duration = 25;
- tmp = OQPSK_RC_500;
- }
- else if((tmp & 0x1f) == 0x1f)
- {
- rf_ack_wait_duration = 25;
- tmp = OQPSK_RC_500_ALT;
- }
- else if((tmp & 0x3f) == 0x2A)
- {
- rf_ack_wait_duration = 25;
- tmp = OQPSK_SIN_RC_400_SCR_ON;
- }
- else if((tmp & 0x3f) == 0x0A)
- {
- rf_ack_wait_duration = 25;
- tmp = OQPSK_SIN_RC_400_SCR_OFF;
- }
- else if((tmp & 0x3f) == 0x3A)
- {
- rf_ack_wait_duration = 25;
- tmp = OQPSK_RC_400_SCR_ON;
- }
- else if((tmp & 0x3f) == 0x1A)
- {
- rf_ack_wait_duration = 25;
- tmp = OQPSK_RC_400_SCR_OFF;
- }
- else if((tmp & 0x3f) == 0x2E)
- {
- rf_ack_wait_duration = 13;
- tmp = OQPSK_SIN_1000_SCR_ON;
- }
- else if((tmp & 0x3f) == 0x0E)
- {
- rf_ack_wait_duration = 13;
- tmp = OQPSK_SIN_1000_SCR_OFF;
- }
- else if((tmp & 0x3f) == 0x3E)
- {
- rf_ack_wait_duration = 13;
- tmp = OQPSK_RC_1000_SCR_ON;
- }
- else if((tmp & 0x3f) == 0x1E)
- {
- rf_ack_wait_duration = 13;
- tmp = OQPSK_RC_1000_SCR_OFF;
- }
- return tmp;
-}
-
--- a/RF_Drivers_Atmel/driverRFPhy_h.txt Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,77 +0,0 @@
-/*
- * driverRFPhy.h
- *
- * Created on: 14 July 2014
- * Author: mBed Team
- */
-
-#ifndef DRIVERRFPHY_H_
-#define DRIVERRFPHY_H_
-
-#include "arm_hal_phy.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*Run calibration every 5 minutes*/
-#define RF_CALIBRATION_INTERVAL 6000000
-/*Wait ACK for 2.5ms*/
-#define RF_ACK_WAIT_TIMEOUT 50
-
-#define RF_BUFFER_SIZE 128
-#define RF_DEFAULT_CHANNEL 11
-
-/*Radio RX and TX state definitions*/
-#define RFF_ON 0x01
-#define RFF_RX 0x02
-#define RFF_TX 0x04
-#define RFF_CCA 0x08
-
-/*Atmel RF states*/
-typedef enum
-{
- NOP = 0x00,
- BUSY_RX = 0x01,
- RF_TX_START = 0x02,
- FORCE_TRX_OFF = 0x03,
- FORCE_PLL_ON = 0x04,
- RX_ON = 0x06,
- TRX_OFF = 0x08,
- PLL_ON = 0x09,
- BUSY_RX_AACK = 0x11,
- SLEEP = 0x0F,
- RX_AACK_ON = 0x16,
- TX_ARET_ON = 0x19
-}rf_trx_states_t;
-
-extern void rf_ack_wait_timer_start(uint16_t slots);
-extern void rf_ack_wait_timer_stop(void);
-extern void rf_handle_cca_ed_done(void);
-extern void rf_handle_tx_end(void);
-extern void rf_handle_rx_end(void);
-extern void rf_on(void);
-extern void rf_receive(void);
-extern void rf_poll_trx_state_change(rf_trx_states_t trx_state);
-extern void rf_init(void);
-extern void rf_set_mac_address(const uint8_t *ptr);
-extern int8_t rf_device_register(void);
-extern int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle);
-extern void rf_cca_abort(void);
-extern void rf_read_mac_address(uint8_t *ptr);
-extern int8_t rf_read_random(void);
-extern void rf_calibration_cb(void);
-extern uint8_t rf_init_phy_mode(void);
-extern void rf_ack_wait_timer_interrupt(void);
-extern void rf_calibration_timer_interrupt(void);
-extern void rf_calibration_timer_start(uint32_t slots);
-extern void rf_front_end_rx_lna(void);
-extern void rf_front_end_sleep(void);
-static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
-static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
-static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
-
- #ifdef __cplusplus
-}
-#endif
-#endif /* DRIVERRFPHY_H_ */
--- a/RF_Drivers_Atmel/low_level_RF_cpp.txt Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,77 +0,0 @@
-/* this file needs customization
- according the target hardware
-*/
-
-
-#include "mbed.h"
-
-extern "C" void rf_if_interrupt_handler(void);
-
-#if defined(TARGET_K64F)
-SPI spi(PTD2, PTD3, PTD1);
-#elif defined(TARGET_NUCLEO_F401RE)
-SPI spi(SPI_MOSI, SPI_MISO, SPI_SCK);
-#else
- "SPI not defined for this platform"
-#endif
-
-DigitalOut RF_CS(D10);
-DigitalOut RF_RST(D5);
-DigitalOut RF_SLP_TR(D7);
-InterruptIn RF_IRQ(D9);
-
-
-extern "C" void RF_IRQ_Init(void) {
-
- RF_IRQ.rise(&rf_if_interrupt_handler);
-}
-
-extern "C" void RF_RST_Set(int state) {
- RF_RST = state;
-}
-
-extern "C" void RF_SLP_TR_Set(int state) {
- RF_SLP_TR = state;
-}
-
-extern "C" void RF_CS_while_active(void) {
-
- while(!RF_CS);
-}
-
-
-extern "C" int spi_read(char addr) {
-
- // Select the device by seting chip select low
- RF_CS = 0;
- // Write the reg. address
- spi.write(addr);
- // write a dummy value to read the reg. value
- int val = spi.write(0x00);
- // Deselect the device
- RF_CS = 1;
- return val;
-}
-
-extern "C" void spi_write(char addr, char val) {
-
- // Select the device by seting chip select low
- RF_CS = 0;
- // Write the reg. address
- spi.write(addr);
- // write the value to the addresses register
- spi.write(val);
- // Deselect the device
- RF_CS = 1;
-}
-
-extern "C" void RF_CS_Set(int state) {
- RF_CS = state;
-}
-
-extern "C" int spi_exchange(char value) {
-
- // write the value
- int val = spi.write(value);
- return val;
-}
--- a/RF_Drivers_Atmel/low_level_RF_h.txt Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,14 +0,0 @@ -#ifndef LOW_LEVEL_RF_H -#define LOW_LEVEL_RF_H - - -void spi_write(char addr, char val); -int spi_read(char addr); -void RF_RST_Set(int state); -void RF_SLP_TR_Set(int state); -void RF_CS_while_active(void); -void RF_CS_Set(int state); -int spi_exchange(char data); -void RF_IRQ_Init(void); - -#endif // LOW_LEVEL_RF_H
--- a/RF_Drivers_Freescale/ASP.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,946 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file ASP.c
-* This is the source file for the ASP module.
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-
-#include "EmbeddedTypes.h"
-//#include "fsl_os_abstraction.h"
-
-#include "Phy.h"
-#include "PhyInterface.h"
-#include "MpmInterface.h"
-#include "AspInterface.h"
-
-#if 0
-#include "MemManager.h"
-#include "FunctionLib.h"
-#include "Panic.h"
-#endif
-
-#include "MCR20Drv.h"
-#include "MCR20Reg.h"
-
-#if gFsciIncluded_c
-#include "FsciInterface.h"
-#include "FsciCommands.h"
-#include "FsciCommunication.h"
-#endif
-
-#if gAspCapability_d
-
-/************************************************************************************
-*************************************************************************************
-* Public macros
-*************************************************************************************
-************************************************************************************/
-#define mFAD_THR_ResetValue 0x82
-#define mANT_AGC_CTRL_ResetValue 0x40
-
-/************************************************************************************
-*************************************************************************************
-* Public type definitions
-*************************************************************************************
-************************************************************************************/
-//MCR20 DTS modes
-enum {
- gDtsNormal_c,
- gDtsTxOne_c,
- gDtsTxZero_c,
- gDtsTx2Mhz_c,
- gDtsTx200Khz_c,
- gDtsTx1MbpsPRBS9_c,
- gDtsTxExternalSrc_c,
- gDtsTxRandomSeq_c
-};
-
-/************************************************************************************
-*************************************************************************************
-* Private functions prototype
-*************************************************************************************
-************************************************************************************/
-phyStatus_t AspSetDtsMode( uint8_t mode );
-phyStatus_t AspEnableBER( void );
-void AspDisableBER( void );
-
-#if gFsciIncluded_c
-static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId);
-static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId);
-#endif
-
-/************************************************************************************
-*************************************************************************************
-* Private memory declarations
-*************************************************************************************
-************************************************************************************/
-//2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
-static const uint16_t asp_pll_frac[16] = {0x2400, 0x4C00, 0x7400, 0x9C00, 0xC400, 0xEC00, 0x1400, 0x3C00, 0x6400, 0x8C00, 0xB400, 0xDC00, 0x0400, 0x2C00, 0x5400, 0x7C00};
-
-#if gFsciIncluded_c
-static uint8_t mAspFsciBinding[gPhyInstancesCnt_c];
-#endif
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-
-/*! *********************************************************************************
-* \brief Initialize the ASP module
-*
-* \param[in] phyInstance The instance of the PHY
-* \param[in] interfaceId The Serial Manager interface used
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 0
-void ASP_Init( instanceId_t phyInstance, uint8_t interfaceId )
-{
-#if gFsciIncluded_c
- if( phyInstance < gPhyInstancesCnt_c )
- {
- mAspFsciBinding[phyInstance] = interfaceId;
- FSCI_RegisterOpGroup( gFSCI_AppAspOpcodeGroup_c, gFsciMonitorMode_c, fsciAspReqHandler, NULL, gAspInterfaceId);
- FSCI_RegisterOpGroup( gFSCI_AspSapId_c, gFsciMonitorMode_c, AspSapMonitor, NULL, gAspInterfaceId);
- }
-#endif
-}
-
-/*! *********************************************************************************
-* \brief ASP SAP handler.
-*
-* \param[in] pMsg Pointer to the request message
-* \param[in] instanceId The instance of the PHY
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 1
-AspStatus_t APP_ASP_SapHandler(AppToAspMessage_t *pMsg, instanceId_t instanceId)
-{
- AspStatus_t status = gAspSuccess_c;
-#if gFsciIncluded_c
- FSCI_Monitor( gFSCI_AspSapId_c,
- pMsg,
- NULL,
- gAspInterfaceId );
-#endif
- switch( pMsg->msgType )
- {
- case aspMsgTypeGetTimeReq_c:
- Asp_GetTimeReq((uint32_t*)&pMsg->msgData.aspGetTimeReq.time);
- break;
- case aspMsgTypeXcvrWriteReq_c:
- status = Asp_XcvrWriteReq( pMsg->msgData.aspXcvrData.mode,
- pMsg->msgData.aspXcvrData.addr,
- pMsg->msgData.aspXcvrData.len,
- pMsg->msgData.aspXcvrData.data);
- break;
- case aspMsgTypeXcvrReadReq_c:
- status = Asp_XcvrReadReq( pMsg->msgData.aspXcvrData.mode,
- pMsg->msgData.aspXcvrData.addr,
- pMsg->msgData.aspXcvrData.len,
- pMsg->msgData.aspXcvrData.data);
- break;
- case aspMsgTypeSetFADState_c:
- status = Asp_SetFADState(pMsg->msgData.aspFADState);
- break;
- case aspMsgTypeSetFADThreshold_c:
- status = Asp_SetFADThreshold(pMsg->msgData.aspFADThreshold);
- break;
- case aspMsgTypeSetANTXState_c:
- status = Asp_SetANTXState(pMsg->msgData.aspANTXState);
- break;
- case aspMsgTypeGetANTXState_c:
- *((uint8_t*)&status) = Asp_GetANTXState();
- break;
- case aspMsgTypeSetPowerLevel_c:
- status = Asp_SetPowerLevel(pMsg->msgData.aspSetPowerLevelReq.powerLevel);
- break;
- case aspMsgTypeGetPowerLevel_c:
- *((uint8_t*)&status) = Asp_GetPowerLevel(); //remove compiler warning
- break;
- case aspMsgTypeTelecSetFreq_c:
- status = ASP_TelecSetFreq(pMsg->msgData.aspTelecsetFreq.channel);
- break;
- case aspMsgTypeTelecSendRawData_c:
- status = ASP_TelecSendRawData((uint8_t*)&pMsg->msgData.aspTelecSendRawData);
- break;
- case aspMsgTypeTelecTest_c:
- status = ASP_TelecTest(pMsg->msgData.aspTelecTest.mode);
- break;
- case aspMsgTypeSetLQIMode_c:
- status = Asp_SetLQIMode(pMsg->msgData.aspLQIMode);
- break;
- case aspMsgTypeGetRSSILevel_c:
- *((uint8_t*)&status) = Asp_GetRSSILevel(); //remove compiler warning
- break;
-#if gMpmIncluded_d
- case aspMsgTypeSetMpmConfig_c:
- MPM_SetConfig(&pMsg->msgData.MpmConfig);
- break;
- case aspMsgTypeGetMpmConfig_c:
- MPM_GetConfig(&pMsg->msgData.MpmConfig);
- break;
-#endif
- default:
- status = gAspInvalidRequest_c;// OR gAspInvalidParameter_c
- break;
- }
-#if gFsciIncluded_c
- FSCI_Monitor( gFSCI_AspSapId_c,
- pMsg,
- (void*)&status,
- gAspInterfaceId );
-#endif
- return status;
-}
-
-/*! *********************************************************************************
-* \brief Returns the current PHY time
-*
-* \param[in] time location where the PHY time will be stored
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 2
-void Asp_GetTimeReq(uint32_t *time)
-{
- PhyTimeReadClock( time );
-}
-
-/*! *********************************************************************************
-* \brief Write XCVR registers
-*
-* \param[in] mode Direct/Indirect access
-* \param[in] addr XCVR address
-* \param[in] len number of bytes to write
-* \param[in] pData data o be written
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 3
-AspStatus_t Asp_XcvrWriteReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
-{
- if (mode)
- MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
- else
- MCR20Drv_DirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
-
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Read XCVR registers
-*
-* \param[in] mode Direct/Indirect access
-* \param[in] addr XCVR address
-* \param[in] len number of bytes to read
-* \param[in] pData location where data will be stored
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 4
-AspStatus_t Asp_XcvrReadReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
-{
- if (mode)
- MCR20Drv_IndirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
- else
- MCR20Drv_DirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
-
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Set Tx output power level
-*
-* \param[in] powerLevel The new power level: 0x03-0x1F (see documentation for details)
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 5
-AspStatus_t Asp_SetPowerLevel( uint8_t powerLevel )
-{
- if(powerLevel > gAspPowerLevel_16dBm)
- return gAspInvalidParameter_c;
-
- {
- uint8_t res;
-
- res = PhyPlmeSetPwrLevelRequest(powerLevel);
-
- if( res == gPhySuccess_c )
- {
- return gAspSuccess_c;
- }
- else
- {
- return gAspDenied_c;
- }
- }
-}
-
-/*! *********************************************************************************
-* \brief Read the current Tx power level
-*
-* \return power level
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 6
-uint8_t Asp_GetPowerLevel()
-{
- return MCR20Drv_DirectAccessSPIRead(PA_PWR);
-}
-
-/*! *********************************************************************************
-* \brief Set the state of Active Promiscuous functionality
-*
-* \param[in] state new state
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 7
-AspStatus_t Asp_SetActivePromState(bool_t state)
-{
- PhySetActivePromiscuous(state);
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Set the state of Fast Antenna Diversity functionality
-*
-* \param[in] state new state
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 8
-AspStatus_t Asp_SetFADState(bool_t state)
-{
- if( gPhySuccess_c != PhyPlmeSetFADStateRequest(state) )
- {
- return gAspDenied_c;
- }
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Set the Fast Antenna Diversity threshold
-*
-* \param[in] threshold
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 9
-AspStatus_t Asp_SetFADThreshold(uint8_t threshold)
-{
- if( gPhySuccess_c != PhyPlmeSetFADThresholdRequest(threshold) )
- {
- return gAspDenied_c;
- }
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Set the ANTX functionality
-*
-* \param[in] state
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 10
-AspStatus_t Asp_SetANTXState(bool_t state)
-{
- if( gPhySuccess_c != PhyPlmeSetANTXStateRequest(state) )
- {
- return gAspDenied_c;
- }
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Get the ANTX functionality
-*
-* \return current state
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 11
-uint8_t Asp_GetANTXState(void)
-{
- return PhyPlmeGetANTXStateRequest();
-}
-
-/*! *********************************************************************************
-* \brief Set the ANTX pad state
-*
-* \param[in] antAB_on
-* \param[in] rxtxSwitch_on
-*
-* \return status
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 12
-uint8_t Asp_SetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on)
-{
- return PhyPlmeSetANTPadStateRequest(antAB_on, rxtxSwitch_on);
-}
-
-/*! *********************************************************************************
-* \brief Set the ANTX pad strength
-*
-* \param[in] hiStrength
-*
-* \return status
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 13
-uint8_t Asp_SetANTPadStrengthRequest(bool_t hiStrength)
-{
- return PhyPlmeSetANTPadStrengthRequest(hiStrength);
-}
-
-/*! *********************************************************************************
-* \brief Set the ANTX inverted pads
-*
-* \param[in] invAntA invert Ant_A pad
-* \param[in] invAntB invert Ant_B pad
-* \param[in] invTx invert Tx pad
-* \param[in] invRx invert Rx pad
-*
-* \return status
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 14
-uint8_t Asp_SetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx)
-{
- return PhyPlmeSetANTPadInvertedRequest(invAntA, invAntB, invTx, invRx);
-}
-
-/*! *********************************************************************************
-* \brief Set the LQI mode
-*
-* \param[in] mode
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 15
-AspStatus_t Asp_SetLQIMode(bool_t mode)
-{
- if( gPhySuccess_c != PhyPlmeSetLQIModeRequest(mode) )
- {
- return gAspDenied_c;
- }
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Get the last RSSI level
-*
-* \return RSSI
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 16
-uint8_t Asp_GetRSSILevel(void)
-{
- return PhyPlmeGetRSSILevelRequest();
-}
-
-/*! *********************************************************************************
-* \brief Set current channel
-*
-* \param[in] channel channel number (11-26)
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 17
-AspStatus_t ASP_TelecSetFreq(uint8_t channel)
-{
- PhyPlmeForceTrxOffRequest();
- if( gPhySuccess_c != PhyPlmeSetCurrentChannelRequest(channel,0) )
- {
- return gAspInvalidParameter_c;
- }
-
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Send a raw data frame OTA
-*
-* \param[in] dataPtr raw data
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 18
-AspStatus_t ASP_TelecSendRawData(uint8_t* dataPtr)
-{
- uint8_t phyReg;
-
- dataPtr[0] += 2; /* Add FCS length to PSDU Length*/
-
- // Validate the length
- if(dataPtr[0] > gMaxPHYPacketSize_c)
- return gAspTooLong_c;
-
- //Force Idle
- PhyPlmeForceTrxOffRequest();
- AspSetDtsMode(gDtsNormal_c);
- AspDisableBER();
- // Load the TX PB: load the PSDU Lenght byte but not the FCS bytes
- MCR20Drv_PB_SPIBurstWrite(dataPtr, dataPtr[0] + 1 - 2);
- // Program a Tx sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Set Telec test mode
-*
-* \param[in] mode Telec test mode
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 19
-AspStatus_t ASP_TelecTest(uint8_t mode)
-{
- uint8_t phyReg;
- static uint8_t aTxContModPattern[2];
- uint8_t channel;
- static bool_t fracSet = FALSE;
-
- // Get current channel number
- channel = PhyPlmeGetCurrentChannelRequest(0);
-
- if( fracSet )
- {
- ASP_TelecSetFreq(channel);
- fracSet = FALSE;
- }
-
- switch( mode )
- {
- case gTestForceIdle_c: //ForceIdle();
- PhyPlmeForceTrxOffRequest();
-
- AspSetDtsMode(gDtsNormal_c);
- AspDisableBER();
- break;
-
- case gTestPulseTxPrbs9_c: // Continuously transmit a PRBS9 pattern.
- // PLME_PRBS9_Load (); // Load the TX RAM
- AspSetDtsMode(gDtsTxRandomSeq_c);
- //Enable continuous TX mode
- AspEnableBER();
- // Start Tx packet mode with no interrupt on end
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
-
- case gTestContinuousRx_c: // Sets the device into continuous RX mode
- AspSetDtsMode(gDtsNormal_c);
- //Enable continuous RX mode
- AspEnableBER();
- // Set length of data in DUAL_PAN_DWELL register
- MCR20Drv_IndirectAccessSPIWrite(DUAL_PAN_DWELL, 127);
- // Start Rx packet mode with no interrupt on end
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gRX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
-
- case gTestContinuousTxMod_c: // Sets the device to continuously transmit a 10101010 pattern
- AspSetDtsMode(gDtsNormal_c);
- //Enable continuous TX mode
- AspEnableBER();
- //Prepare TX operation
- aTxContModPattern[0] = 1;
- aTxContModPattern[1] = 0xAA;
- // Load the TX PB
- MCR20Drv_PB_SPIBurstWrite(aTxContModPattern, aTxContModPattern[0] + 1);
- // Program a Tx sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
-
- case gTestContinuousTxNoMod_c: // Sets the device to continuously transmit an unmodulated CW
- //Enable unmodulated TX
- AspSetDtsMode(gDtsTxOne_c);
- //Enable continuous TX mode
- AspEnableBER();
- MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &asp_pll_frac[channel - 11], 2);
- fracSet = TRUE;
- // Program a Tx sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
-
- case gTestContinuousTx2Mhz_c:
- AspSetDtsMode(gDtsTx2Mhz_c);
- //Enable continuous TX mode
- AspEnableBER();
- // Program a Tx sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
-
- case gTestContinuousTx200Khz_c:
- AspSetDtsMode(gDtsTx200Khz_c);
- //Enable continuous TX mode
- AspEnableBER();
- // Program a Tx sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
-
- case gTestContinuousTx1MbpsPRBS9_c:
- AspSetDtsMode(gDtsTx1MbpsPRBS9_c);
- //Enable continuous TX mode
- AspEnableBER();
- // Program a Tx sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
-
- case gTestContinuousTxExternalSrc_c:
- AspSetDtsMode(gDtsTxExternalSrc_c);
- //Enable continuous TX mode
- AspEnableBER();
- // Program a Tx sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
-
- case gTestContinuousTxNoModZero_c:
- //Enable unmodulated TX
- AspSetDtsMode(gDtsTxZero_c);
- //Enable continuous TX mode
- AspEnableBER();
- // Program a Tx sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
-
- case gTestContinuousTxNoModOne_c:
- //Enable unmodulated TX
- AspSetDtsMode(gDtsTxOne_c);
- //Enable continuous TX mode
- AspEnableBER();
- // Program a Tx sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= gTX_c;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
- break;
- }
-
- return gAspSuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Return the instance of the PHY associated with the FSCI interface
-*
-* \param[in] interfaceId FSCI interface
-*
-* \return insance
-*
-********************************************************************************** */
-#if gFsciIncluded_c
-#undef mFuncId_c
-#define mFuncId_c 20
-static uint32_t getPhyInstance( uint32_t interfaceId )
-{
- uint32_t i;
-
- for( i=0; i<gPhyInstancesCnt_c; i++ )
- if( mAspFsciBinding[i] == interfaceId )
- return i;
-
- return 0;
-}
-
-/*! *********************************************************************************
-* \brief Handle ASP requests received from FSCI
-*
-* \param[in] pData monitored message
-* \param[in] param
-* \param[in] interfaceId FSCI interface
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 21
-static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId)
-{
- clientPacket_t *pClientPacket = ((clientPacket_t*)pData);
- uint8_t *pMsg = pClientPacket->structured.payload;
-
- pMsg -= sizeof(AppAspMsgType_t);
- ((AppToAspMessage_t*)pMsg)->msgType = (AppAspMsgType_t)pClientPacket->structured.header.opCode;
-
- APP_ASP_SapHandler( (AppToAspMessage_t*)pMsg, getPhyInstance( interfaceId ) );
- //MEM_BufferFree(pData);
- free(pData);
-}
-
-/*! *********************************************************************************
-* \brief Monitor the ASP Requests and Responses
-*
-* \param[in] pData monitored message
-* \param[in] param
-* \param[in] interfaceId FSCI interface
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-#undef mFuncId_c
-#define mFuncId_c 22
-static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId)
-{
- //clientPacket_t *pFsciPacket = MEM_BufferAlloc( sizeof(clientPacket_t) );
- clientPacket_t *pFsciPacket = (clientPacket_t *)malloc( sizeof(clientPacket_t) );
- AppToAspMessage_t *pReq = (AppToAspMessage_t*)pData;
- uint8_t *p;
-
- if( NULL == pFsciPacket )
- {
- FSCI_Error( gFsciOutOfMessages_c, interfaceId );
- return;
- }
-
- p = pFsciPacket->structured.payload;
-
- if( NULL == param ) // Requests
- {
- pFsciPacket->structured.header.opGroup = gFSCI_AppAspOpcodeGroup_c;
- pFsciPacket->structured.header.opCode = pReq->msgType;
-
- switch( pReq->msgType )
- {
- case aspMsgTypeGetTimeReq_c:
- break;
- case aspMsgTypeXcvrWriteReq_c:
- case aspMsgTypeXcvrReadReq_c:
- *p++ = pReq->msgData.aspXcvrData.mode;
- *((uint16_t*)p) = pReq->msgData.aspXcvrData.addr;
- p += sizeof(uint16_t);
- *p++ = pReq->msgData.aspXcvrData.len;
- if( pReq->msgType == aspMsgTypeXcvrWriteReq_c )
- {
- FLib_MemCpy( p, pReq->msgData.aspXcvrData.data,
- pReq->msgData.aspXcvrData.len );
- p += pReq->msgData.aspXcvrData.len;
- }
- break;
- case aspMsgTypeSetFADState_c:
- FLib_MemCpy( p, &pReq->msgData.aspFADState, sizeof(pReq->msgData.aspFADState) );
- p += sizeof(pReq->msgData.aspFADState);
- break;
- case aspMsgTypeSetFADThreshold_c:
- FLib_MemCpy( p, &pReq->msgData.aspFADThreshold, sizeof(pReq->msgData.aspFADThreshold) );
- p += sizeof(pReq->msgData.aspFADThreshold);
- break;
- case aspMsgTypeSetANTXState_c:
- FLib_MemCpy( p, &pReq->msgData.aspANTXState, sizeof(pReq->msgData.aspANTXState) );
- p += sizeof(pReq->msgData.aspANTXState);
- break;
- case aspMsgTypeGetANTXState_c:
- /* Nothing to do here */
- break;
-
- case aspMsgTypeSetPowerLevel_c:
- FLib_MemCpy( p, &pReq->msgData.aspSetPowerLevelReq, sizeof(pReq->msgData.aspSetPowerLevelReq) );
- p += sizeof(pReq->msgData.aspSetPowerLevelReq);
- break;
- case aspMsgTypeGetPowerLevel_c:
- /* Nothing to do here */
- break;
- case aspMsgTypeTelecSetFreq_c:
- FLib_MemCpy( p, &pReq->msgData.aspTelecsetFreq, sizeof(pReq->msgData.aspTelecsetFreq) );
- p += sizeof(pReq->msgData.aspTelecsetFreq);
- break;
- case aspMsgTypeTelecSendRawData_c:
- FLib_MemCpy( p, &pReq->msgData.aspTelecSendRawData, sizeof(pReq->msgData.aspTelecSendRawData) );
- p += sizeof(pReq->msgData.aspTelecSendRawData);
- break;
- case aspMsgTypeTelecTest_c:
- FLib_MemCpy( p, &pReq->msgData.aspTelecTest, sizeof(pReq->msgData.aspTelecTest) );
- p += sizeof(pReq->msgData.aspTelecTest);
- break;
- case aspMsgTypeSetLQIMode_c:
- FLib_MemCpy(p, &pReq->msgData.aspLQIMode, sizeof(pReq->msgData.aspLQIMode) );
- p += sizeof(pReq->msgData.aspLQIMode);
- break;
- case aspMsgTypeGetRSSILevel_c:
- /* Nothing to do here */
- break;
- }
- }
- else // Confirms / Indications
- {
- pFsciPacket->structured.header.opGroup = gFSCI_AspAppOpcodeGroup_c;
- pFsciPacket->structured.header.opCode = pReq->msgType;
-
- *p++ = *((uint8_t*)param);/* copy status */
-
- switch( pReq->msgType )
- {
- case aspMsgTypeGetTimeReq_c:
- FLib_MemCpy( p, &pReq->msgData.aspGetTimeReq.time , sizeof(aspEventReq_t) );
- p += sizeof(aspEventReq_t);
- break;
- case aspMsgTypeGetMpmConfig_c:
- FLib_MemCpy( p, &pReq->msgData.MpmConfig , sizeof(mpmConfig_t) );
- p += sizeof(mpmConfig_t);
- break;
- case aspMsgTypeXcvrReadReq_c:
- *p++ = pReq->msgData.aspXcvrData.len; /* copy length */
- FLib_MemCpy( p, pReq->msgData.aspXcvrData.data, pReq->msgData.aspXcvrData.len );
- p += pReq->msgData.aspXcvrData.len;
- break;
- }
-
- }
-
- /* Send data over the serial interface */
- pFsciPacket->structured.header.len = (fsciLen_t)(p - pFsciPacket->structured.payload);
-
- if ( pFsciPacket->structured.header.len )
- FSCI_transmitFormatedPacket( pFsciPacket, interfaceId );
- else
- //MEM_BufferFree( pFsciPacket );
- free(pFsciPacket);
-}
-
-#endif /* gFsciIncluded_c */
-
-
- /*! *********************************************************************************
-* \brief Set the Tx data source selector
-*
-* \param[in] mode
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-phyStatus_t AspSetDtsMode(uint8_t mode)
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(TX_MODE_CTRL);
- phyReg &= ~cTX_MODE_CTRL_DTS_MASK; // Clear DTS_MODE
- phyReg |= mode; // Set new DTS_MODE
- MCR20Drv_IndirectAccessSPIWrite(TX_MODE_CTRL, phyReg);
-
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Enable XCVR test mode
-*
-* \return AspStatus_t
-*
-********************************************************************************** */
-phyStatus_t AspEnableBER()
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
- phyReg |= cDTM_CTRL1_DTM_EN;
- MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
- phyReg |= cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN;
- MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
-
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief Disable XCVR test mode
-*
-********************************************************************************** */
-void AspDisableBER()
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
- phyReg &= ~cDTM_CTRL1_DTM_EN;
- MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
- phyReg &= ~(cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN);
- MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
-}
-
-
-#endif /* gAspCapability_d */
\ No newline at end of file
--- a/RF_Drivers_Freescale/AspInterface.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,358 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file ASP.h
-* This is a header file for the ASP module.
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#ifndef __ASP_H__
-#define __ASP_H__
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-
-#include "EmbeddedTypes.h"
-//#include "fsl_os_abstraction.h"
-#include "PhyInterface.h"
-#include "MpmInterface.h"
-
-/************************************************************************************
-*************************************************************************************
-* Public macros
-*************************************************************************************
-************************************************************************************/
-/* Enable/Disable the ASP module */
-#ifndef gAspCapability_d
-#ifndef gPHY_802_15_4g_d
-#define gAspCapability_d (1)
-#else
-#define gAspCapability_d (0)
-#endif // gPHY_802_15_4g_d
-#endif // gAspCapability_d
-
-#define gAspInterfaceId (0)
-
-/* Allowed ASP Power Levels */
-#define gAspPowerLevel_m40dBm_c (uint8_t)gAspPowerLevel_m40dBm
-#define gAspPowerLevel_m38dBm_c (uint8_t)gAspPowerLevel_m38dBm
-#define gAspPowerLevel_m36dBm_c (uint8_t)gAspPowerLevel_m36dBm
-#define gAspPowerLevel_m34dBm_c (uint8_t)gAspPowerLevel_m34dBm
-#define gAspPowerLevel_m32dBm_c (uint8_t)gAspPowerLevel_m32dBm
-#define gAspPowerLevel_m30dBm_c (uint8_t)gAspPowerLevel_m30dBm
-#define gAspPowerLevel_m28dBm_c (uint8_t)gAspPowerLevel_m28dBm
-#define gAspPowerLevel_m26dBm_c (uint8_t)gAspPowerLevel_m26dBm
-#define gAspPowerLevel_m24dBm_c (uint8_t)gAspPowerLevel_m24dBm
-#define gAspPowerLevel_m22dBm_c (uint8_t)gAspPowerLevel_m22dBm
-#define gAspPowerLevel_m20dBm_c (uint8_t)gAspPowerLevel_m20dBm
-#define gAspPowerLevel_m18dBm_c (uint8_t)gAspPowerLevel_m18dBm
-#define gAspPowerLevel_m16dBm_c (uint8_t)gAspPowerLevel_m16dBm
-#define gAspPowerLevel_m14dBm_c (uint8_t)gAspPowerLevel_m14dBm
-#define gAspPowerLevel_m12dBm_c (uint8_t)gAspPowerLevel_m12dBm
-#define gAspPowerLevel_m10dBm_c (uint8_t)gAspPowerLevel_m10dBm
-#define gAspPowerLevel_m8dBm_c (uint8_t)gAspPowerLevel_m8dBm
-#define gAspPowerLevel_m6dBm_c (uint8_t)gAspPowerLevel_m6dBm
-#define gAspPowerLevel_m4dBm_c (uint8_t)gAspPowerLevel_m4dBm
-#define gAspPowerLevel_m2dBm_c (uint8_t)gAspPowerLevel_m2dBm
-#define gAspPowerLevel_0dBm_c (uint8_t)gAspPowerLevel_0dBm
-#define gAspPowerLevel_2dBm_c (uint8_t)gAspPowerLevel_2dBm
-#define gAspPowerLevel_4dBm_c (uint8_t)gAspPowerLevel_4dBm
-#define gAspPowerLevel_6dBm_c (uint8_t)gAspPowerLevel_6dBm
-#define gAspPowerLevel_8dBm_c (uint8_t)gAspPowerLevel_8dBm
-#define gAspPowerLevel_10dBm_c (uint8_t)gAspPowerLevel_10dBm
-#define gAspPowerLevel_12dBm_c (uint8_t)gAspPowerLevel_12dBm
-#define gAspPowerLevel_14dBm_c (uint8_t)gAspPowerLevel_14dBm
-#define gAspPowerLevel_16dBm_c (uint8_t)gAspPowerLevel_16dBm
-
-/* OpGroup codes used with FSCI */
-#define gFSCI_AspAppOpcodeGroup_c 0x94 /* ASP_APP_SapHandler */
-#define gFSCI_AppAspOpcodeGroup_c 0x95 /* APP_ASP_SapHandler */
-
-/************************************************************************************
-*************************************************************************************
-* Public type definitions
-*************************************************************************************
-************************************************************************************/
-/* ASP status messages */
-typedef enum{
- gAspSuccess_c = 0x00,
- gAspInvalidRequest_c = 0xC2,
- gAspDenied_c = 0xE2,
- gAspTooLong_c = 0xE5,
- gAspInvalidParameter_c = 0xE8
-}AspStatus_t;
-
-/* Supported Power Levels */
-enum {
- gAspPowerLevel_m40dBm = 0x03,
- gAspPowerLevel_m38dBm = 0x04,
- gAspPowerLevel_m36dBm = 0x05,
- gAspPowerLevel_m34dBm = 0x06,
- gAspPowerLevel_m32dBm = 0x07,
- gAspPowerLevel_m30dBm = 0x08,
- gAspPowerLevel_m28dBm = 0x09,
- gAspPowerLevel_m26dBm = 0x0A,
- gAspPowerLevel_m24dBm = 0x0B,
- gAspPowerLevel_m22dBm = 0x0C,
- gAspPowerLevel_m20dBm = 0x0D,
- gAspPowerLevel_m18dBm = 0x0E,
- gAspPowerLevel_m16dBm = 0x0F,
- gAspPowerLevel_m14dBm = 0x10,
- gAspPowerLevel_m12dBm = 0x11,
- gAspPowerLevel_m10dBm = 0x12,
- gAspPowerLevel_m8dBm = 0x13,
- gAspPowerLevel_m6dBm = 0x14,
- gAspPowerLevel_m4dBm = 0x15,
- gAspPowerLevel_m2dBm = 0x16,
- gAspPowerLevel_0dBm = 0x17,
- gAspPowerLevel_2dBm = 0x18,
- gAspPowerLevel_4dBm = 0x19,
- gAspPowerLevel_6dBm = 0x1A,
- gAspPowerLevel_8dBm = 0x1B,
- gAspPowerLevel_10dBm = 0x1C,
- gAspPowerLevel_12dBm = 0x1D,
- gAspPowerLevel_14dBm = 0x1E,
- gAspPowerLevel_16dBm = 0x1F
-};
-
-/* Radio test modes */
-enum {
- gTestForceIdle_c = 0,
- gTestPulseTxPrbs9_c = 1,
- gTestContinuousRx_c = 2,
- gTestContinuousTxMod_c = 3,
- gTestContinuousTxNoMod_c = 4,
- gTestContinuousTx2Mhz_c = 5,
- gTestContinuousTx200Khz_c = 6,
- gTestContinuousTx1MbpsPRBS9_c = 7,
- gTestContinuousTxExternalSrc_c = 8,
- gTestContinuousTxNoModZero_c = 9,
- gTestContinuousTxNoModOne_c = 10
-};
-
-/* This enum matches with the FSCI OpCode used by ASP*/
-typedef enum {
- aspMsgTypeGetTimeReq_c = 0x00,
- aspMsgTypeGetInactiveTimeReq_c = 0x01,
- aspMsgTypeGetMacStateReq_c = 0x02,
- aspMsgTypeDozeReq_c = 0x03,
- aspMsgTypeAutoDozeReq_c = 0x04,
- aspMsgTypeAcomaReq_c = 0x05,
- aspMsgTypeHibernateReq_c = 0x06,
- aspMsgTypeWakeReq_c = 0x07,
- aspMsgTypeEventReq_c = 0x08,
- aspMsgTypeClkoReq_c = 0x09,
- aspMsgTypeTrimReq_c = 0x0A,
- aspMsgTypeDdrReq_c = 0x0B,
- aspMsgTypePortReq_c = 0x0C,
- aspMsgTypeSetMinDozeTimeReq_c = 0x0D,
- aspMsgTypeSetNotifyReq_c = 0x0E,
- aspMsgTypeSetPowerLevel_c = 0x0F,
- aspMsgTypeGetPowerLevel_c = 0x1F,
- aspMsgTypeTelecTest_c = 0x10,
- aspMsgTypeTelecSetFreq_c = 0x11,
- aspMsgTypeGetInactiveTimeCnf_c = 0x12,
- aspMsgTypeGetMacStateCnf_c = 0x13,
- aspMsgTypeDozeCnf_c = 0x14,
- aspMsgTypeAutoDozeCnf_c = 0x15,
- aspMsgTypeTelecSendRawData_c = 0x16,
- aspMsgTypeSetFADState_c = 0x17,
- aspMsgTypeSetFADThreshold_c = 0x18,
- aspMsgTypeGetFADThreshold_c = 0x19,
- aspMsgTypeGetFADState_c = 0x1A,
- aspMsgTypeSetActivePromState_c = 0x1B,
- aspMsgTypeXcvrWriteReq_c = 0x1C,
- aspMsgTypeXcvrReadReq_c = 0x1D,
- aspMsgTypeSetANTXState_c = 0x20,
- aspMsgTypeGetANTXState_c = 0x21,
- aspMsgTypeSetLQIMode_c = 0x22,
- aspMsgTypeGetRSSILevel_c = 0x23,
- aspMsgTypeSetMpmConfig_c = 0x24,
- aspMsgTypeGetMpmConfig_c = 0x25
-}AppAspMsgType_t;
-
-typedef PACKED_STRUCT aspEventReq_tag
-{ /* AspEvent.Request */
- uint32_t eventTime;
-} aspEventReq_t;
-
-typedef PACKED_STRUCT aspGetTimeReq_tag
-{ /* AspGetTime.Request */
- uint32_t time;
-} aspGetTimeReq_t;
-
-typedef PACKED_STRUCT aspSetNotifyReq_tag
-{ /* AspSetNotify.Request */
- uint8_t notifications;
-} aspSetNotifyReq_t;
-
-
-typedef PACKED_STRUCT aspSetPowerLevelReq_tag
-{ /* AspSetPowerLevel.Request */
- uint8_t powerLevel;
-} aspSetPowerLevelReq_t;
-
-
-typedef PACKED_STRUCT aspGetPowerLevelReq_tag
-{ /* AspGetPowerLevel.Request */
- uint8_t powerLevel;
-} aspGetPowerLevelReq_t;
-
-
-typedef PACKED_STRUCT aspTelecTest_tag
-{ /* AspTelecTest.Request */
- uint8_t mode;
-} aspTelecTest_t;
-
-
-typedef PACKED_STRUCT aspTelecsetFreq_tag
-{ /* AspTelecSetFreq.Request */
- uint8_t channel;
-} aspTelecsetFreq_t;
-
-
-typedef PACKED_STRUCT aspTelecSendRawData_tag
-{ /* AspTelecSendRawData.Request */
- uint8_t length;
- uint8_t* dataPtr;
-} aspTelecSendRawData_t;
-
- /* AspSetFADThreshold.Request */
-typedef uint8_t aspFADThreshold_t;
- /* AspSetLQIMode.Request */
-typedef uint8_t aspLQIMode_t;
-
-typedef PACKED_STRUCT aspXcvrReq_tag
-{ /* AspXcvrWrite.Request / AspXcvrRead.Request */
- uint8_t mode;
- uint16_t addr;
- uint8_t len;
- uint8_t data[4]; /* more than 4 bytes can be read/written */
-} aspXcvrReq_t;
-
-
-typedef PACKED_STRUCT AppToAspMessage_tag
-{
- AppAspMsgType_t msgType;
- PACKED_UNION
- {
- aspEventReq_t aspEventReq;
- aspGetTimeReq_t aspGetTimeReq;
- aspSetPowerLevelReq_t aspSetPowerLevelReq;
- aspGetPowerLevelReq_t aspGetPowerLevelReq;
- aspTelecTest_t aspTelecTest;
- aspTelecsetFreq_t aspTelecsetFreq;
- aspTelecSendRawData_t aspTelecSendRawData;
- aspFADThreshold_t aspFADThreshold;
- bool_t aspFADState;
- bool_t aspANTXState;
- aspLQIMode_t aspLQIMode;
- bool_t aspActivePromState;
- aspXcvrReq_t aspXcvrData;
- mpmConfig_t MpmConfig;
- }msgData;
-} AppToAspMessage_t;
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/************************************************************************************
-*************************************************************************************
-* Public memory declarations
-*************************************************************************************
-************************************************************************************/
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-#if gAspCapability_d
-
-void ASP_Init( instanceId_t phyInstance, uint8_t interfaceId );
-
-AspStatus_t APP_ASP_SapHandler(AppToAspMessage_t *pMsg, instanceId_t instanceId);
-
-void Asp_GetTimeReq(uint32_t *time);
-
-AspStatus_t Asp_XcvrWriteReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData);
-AspStatus_t Asp_XcvrReadReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData);
-
-AspStatus_t Asp_SetPowerLevel(uint8_t powerLevel);
-uint8_t Asp_GetPowerLevel(void);
-
-AspStatus_t Asp_SetActivePromState(bool_t state);
-
-AspStatus_t Asp_SetFADState(bool_t state);
-AspStatus_t Asp_SetFADThreshold(uint8_t thresholdFAD);
-
-AspStatus_t Asp_SetANTXState(bool_t state);
-uint8_t Asp_GetANTXState(void);
-uint8_t Asp_SetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on);
-uint8_t Asp_SetANTPadStrengthRequest(bool_t hiStrength);
-uint8_t Asp_SetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx);
-
-AspStatus_t Asp_SetLQIMode(bool_t mode);
-uint8_t Asp_GetRSSILevel(void);
-
-AspStatus_t ASP_TelecSetFreq (uint8_t channel);
-AspStatus_t ASP_TelecSendRawData(uint8_t* dataPtr);
-AspStatus_t ASP_TelecTest (uint8_t mode);
-
-#else /* gAspCapability_d */
-
-#define ASP_Init(phyInstance,interfaceId)
-#define Asp_GetTimeReq(time)
-
-#define APP_ASP_SapHandler(pMsg) (gAspDenied_c)
-#define Asp_XcvrWriteReq(mode, addr, len, pData) (gAspDenied_c)
-#define Asp_XcvrReadReq(mode, addr, len, pData) (gAspDenied_c)
-#define Asp_SetPowerLevel(powerLevel) (gAspDenied_c)
-#define Asp_SetActivePromState(state) (gAspDenied_c)
-#define Asp_SetFADState(state) (gAspDenied_c)
-#define Asp_SetFADThreshold(thresholdFAD) (gAspDenied_c)
-#define Asp_SetANTXState(state) (gAspDenied_c)
-#define Asp_SetLQIMode(mode) (gAspDenied_c)
-#define ASP_TelecSetFreq(channel) (gAspDenied_c)
-#define ASP_TelecSendRawData(dataPtr) (gAspDenied_c)
-#define ASP_TelecTest(mode) (gAspDenied_c)
-
-#define Asp_GetPowerLevel() (0)
-#define Asp_GetANTXState() (0)
-#define Asp_GetRSSILevel() (0)
-#endif /* gAspCapability_d */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__ASP_H__ */
\ No newline at end of file
--- a/RF_Drivers_Freescale/EmbeddedTypes.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,102 +0,0 @@ -/*! -* Copyright (c) 2015, Freescale Semiconductor, Inc. -* All rights reserved. -* -* \file EmbeddedTypes.h -* This file holds type definitions that maps the standard c-types into types -* with guaranteed sizes. The types are target/platform specific and must be edited -* for each new target/platform. -* The header file also provides definitions for TRUE, FALSE and NULL. -* -* Redistribution and use in source and binary forms, with or without modification, -* are permitted provided that the following conditions are met: -* -* o Redistributions of source code must retain the above copyright notice, this list -* of conditions and the following disclaimer. -* -* o Redistributions in binary form must reproduce the above copyright notice, this -* list of conditions and the following disclaimer in the documentation and/or -* other materials provided with the distribution. -* -* o Neither the name of Freescale Semiconductor, Inc. nor the names of its -* contributors may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef _EMBEDDEDTYPES_H_ -#define _EMBEDDEDTYPES_H_ - - -/************************************************************************************ -* -* INCLUDES -* -************************************************************************************/ - -#include <stdint.h> - - -/************************************************************************************ -* -* TYPE DEFINITIONS -* -************************************************************************************/ - -/* boolean types */ -typedef uint8_t bool_t; - -typedef uint8_t index_t; - -/* TRUE/FALSE definition*/ -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -/* null pointer definition*/ -#ifndef NULL -#define NULL (( void * )( 0x0UL )) -#endif - -#if defined(__GNUC__) -#define PACKED_STRUCT struct __attribute__ ((__packed__)) -#define PACKED_UNION union __attribute__ ((__packed__)) -#elif defined(__IAR_SYSTEMS_ICC__) -#define PACKED_STRUCT __packed struct -#define PACKED_UNION __packed union -#else -#define PACKED_STRUCT struct -#define PACKED_UNION union -#endif - -typedef unsigned char uintn8_t; -typedef unsigned long uintn32_t; - -#define MIN(a,b) (((a) < (b))?(a):(b)) - -/* Compute the number of elements of an array */ -#define NumberOfElements(x) (sizeof(x)/sizeof((x)[0])) - -#define GetRelAddr(strct, member) ((uint32_t)&(((strct*)(void *)0)->member)) -#define GetSizeOfMember(strct, member) sizeof(((strct*)(void *)0)->member) - -/* Type definitions for link configuration of instantiable layers */ -#define gInvalidInstanceId_c (instanceId_t)(-1) -typedef uint32_t instanceId_t; - - -#endif /* _EMBEDDEDTYPES_H_ */
--- a/RF_Drivers_Freescale/MCR20Drv/MCR20Drv.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,736 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file MCR20Drv.c
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-
-/*****************************************************************************
-* INCLUDED HEADERS *
-*---------------------------------------------------------------------------*
-* Add to this section all the headers that this module needs to include. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-#include "MCR20Drv.h"
-#include "MCR20Reg.h"
-
-#include "XcvrSpi.h"
-#include "arm_hal_interrupt.h"
-
-/*****************************************************************************
-* PRIVATE VARIABLES *
-*---------------------------------------------------------------------------*
-* Add to this section all the variables and constants that have local *
-* (file) scope. *
-* Each of this declarations shall be preceded by the 'static' keyword. *
-* These variables / constants cannot be accessed outside this module. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-static uint32_t mPhyIrqDisableCnt = 1;
-
-/*****************************************************************************
-* PUBLIC VARIABLES *
-*---------------------------------------------------------------------------*
-* Add to this section all the variables and constants that have global *
-* (project) scope. *
-* These variables / constants can be accessed outside this module. *
-* These variables / constants shall be preceded by the 'extern' keyword in *
-* the interface header. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-/*****************************************************************************
-* PRIVATE FUNCTIONS PROTOTYPES *
-*---------------------------------------------------------------------------*
-* Add to this section all the functions prototypes that have local (file) *
-* scope. *
-* These functions cannot be accessed outside this module. *
-* These declarations shall be preceded by the 'static' keyword. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-/*****************************************************************************
-* PRIVATE FUNCTIONS *
-*---------------------------------------------------------------------------*
-* Add to this section all the functions that have local (file) scope. *
-* These functions cannot be accessed outside this module. *
-* These definitions shall be preceded by the 'static' keyword. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-
-/*****************************************************************************
-* PUBLIC FUNCTIONS *
-*---------------------------------------------------------------------------*
-* Add to this section all the functions that have global (project) scope. *
-* These functions can be accessed outside this module. *
-* These functions shall have their declarations (prototypes) within the *
-* interface header file and shall be preceded by the 'extern' keyword. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_Init
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_Init
-(
-void
-)
-{
- spi_master_init(gXcvrSpiInstance_c);
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrDeassertCS_d();
- MCR20Drv_RST_B_Deassert();
- //MCR20Drv_RESET();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_DirectAccessSPIWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_DirectAccessSPIWrite
-(
-uint8_t address,
-uint8_t value
-)
-{
- uint16_t txData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = (address & TransceiverSPI_DirectRegisterAddressMask);
- txData |= value << 8;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t *)&txData, NULL, sizeof(txData));
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_DirectAccessSPIMultiByteWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_DirectAccessSPIMultiByteWrite
-(
-uint8_t startAddress,
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint8_t txData;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask);
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_PB_SPIByteWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_PB_SPIByteWrite
-(
-uint8_t address,
-uint8_t value
-)
-{
- uint32_t txData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_WriteSelect |
- TransceiverSPI_PacketBuffAccessSelect |
- TransceiverSPI_PacketBuffByteModeSelect;
- txData |= (address) << 8;
- txData |= (value) << 16;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_PB_SPIBurstWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_PB_SPIBurstWrite
-(
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint8_t txData;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_WriteSelect |
- TransceiverSPI_PacketBuffAccessSelect |
- TransceiverSPI_PacketBuffBurstModeSelect;
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, 1);
- spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_DirectAccessSPIRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-
-uint8_t MCR20Drv_DirectAccessSPIRead
-(
-uint8_t address
-)
-{
- uint8_t txData;
- uint8_t rxData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = (address & TransceiverSPI_DirectRegisterAddressMask) |
- TransceiverSPI_ReadSelect;
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-
- return rxData;
-
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_DirectAccessSPIMultyByteRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint8_t MCR20Drv_DirectAccessSPIMultiByteRead
-(
-uint8_t startAddress,
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint8_t txData;
- uint8_t phyIRQSTS1;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return 0;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask) |
- TransceiverSPI_ReadSelect;
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-
- return phyIRQSTS1;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_PB_SPIBurstRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint8_t MCR20Drv_PB_SPIBurstRead
-(
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint8_t txData;
- uint8_t phyIRQSTS1;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return 0;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_ReadSelect |
- TransceiverSPI_PacketBuffAccessSelect |
- TransceiverSPI_PacketBuffBurstModeSelect;
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-
- return phyIRQSTS1;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IndirectAccessSPIWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IndirectAccessSPIWrite
-(
-uint8_t address,
-uint8_t value
-)
-{
- uint32_t txData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_IARIndexReg;
- txData |= (address) << 8;
- txData |= (value) << 16;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IndirectAccessSPIMultiByteWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IndirectAccessSPIMultiByteWrite
-(
-uint8_t startAddress,
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint16_t txData;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_IARIndexReg;
- txData |= (startAddress) << 8;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)byteArray, NULL, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IndirectAccessSPIRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint8_t MCR20Drv_IndirectAccessSPIRead
-(
-uint8_t address
-)
-{
- uint16_t txData;
- uint8_t rxData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect;
- txData |= (address) << 8;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-
- return rxData;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IndirectAccessSPIMultiByteRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IndirectAccessSPIMultiByteRead
-(
-uint8_t startAddress,
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint16_t txData;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = (TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect);
- txData |= (startAddress) << 8;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_PortConfig
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IRQ_PortConfig
-(
-void
-)
-{
-#if 0
- PORT_HAL_SetMuxMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
- GPIO_EXTRACT_PIN(kGpioXcvrIrqPin),
- kPortMuxAsGpio);
- GPIO_DRV_InputPinInit(&mXcvrIrqPinCfg);
-#endif
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IsIrqPending
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint32_t MCR20Drv_IsIrqPending
-(
-void
-)
-{
- if( !RF_isIRQ_Pending() )
- {
- return TRUE;
- }
-
- return FALSE;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_Disable
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IRQ_Disable
-(
-void
-)
-{
- arm_enter_critical();
-
- if( mPhyIrqDisableCnt == 0 )
- {
- RF_IRQ_Disable();
- }
-
- mPhyIrqDisableCnt++;
-
- arm_exit_critical();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_Enable
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IRQ_Enable
-(
-void
-)
-{
- arm_enter_critical();
-
- if( mPhyIrqDisableCnt )
- {
- mPhyIrqDisableCnt--;
-
- if( mPhyIrqDisableCnt == 0 )
- {
- RF_IRQ_Enable();
- }
- }
-
- arm_exit_critical();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_IsEnabled
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint32_t MCR20Drv_IRQ_IsEnabled
-(
-void
-)
-{
-
-#if 0
- port_interrupt_config_t mode;
-
- mode = PORT_HAL_GetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
- GPIO_EXTRACT_PIN(kGpioXcvrIrqPin));
- return (mode != kPortIntDisabled);
-#endif
- return 0;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_Clear
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IRQ_Clear
-(
-void
-)
-{
- //GPIO_DRV_ClearPinIntFlag(kGpioXcvrIrqPin);
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_RST_Assert
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_RST_B_Assert
-(
-void
-)
-{
- RF_RST_Set(0);
- //GPIO_DRV_ClearPinOutput(kGpioXcvrResetPin);
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_RST_Deassert
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_RST_B_Deassert
-(
-void
-)
-{
- RF_RST_Set(1);
- //GPIO_DRV_SetPinOutput(kGpioXcvrResetPin);
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_SoftRST_Assert
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_SoftRST_Assert
-(
-void
-)
-{
- MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_SoftRST_Deassert
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_SoftRST_Deassert
-(
-void
-)
-{
- MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_Soft_RESET
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_Soft_RESET
-(
-void
-)
-{
- //assert SOG_RST
- MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
-
- //deassert SOG_RST
- MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_RESET
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_RESET
-(
-void
-)
-{
- volatile uint32_t delay = 1000;
- //assert RST_B
- MCR20Drv_RST_B_Assert();
-
- // TODO
- while(delay--);
-
- //deassert RST_B
- MCR20Drv_RST_B_Deassert();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_Set_CLK_OUT_Freq
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_Set_CLK_OUT_Freq
-(
-uint8_t freqDiv
-)
-{
- uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND;
-
- if(freqDiv == gCLK_OUT_FREQ_DISABLE)
- {
- clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled
- }
-
- MCR20Drv_DirectAccessSPIWrite((uint8_t) CLK_OUT_CTRL, clkOutCtrlReg);
-}
--- a/RF_Drivers_Freescale/MCR20Drv/MCR20Drv.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,405 +0,0 @@ -/*! -* Copyright (c) 2015, Freescale Semiconductor, Inc. -* All rights reserved. -* -* \file MCR20Drv.h -* -* Redistribution and use in source and binary forms, with or without modification, -* are permitted provided that the following conditions are met: -* -* o Redistributions of source code must retain the above copyright notice, this list -* of conditions and the following disclaimer. -* -* o Redistributions in binary form must reproduce the above copyright notice, this -* list of conditions and the following disclaimer in the documentation and/or -* other materials provided with the distribution. -* -* o Neither the name of Freescale Semiconductor, Inc. nor the names of its -* contributors may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __MCR20_DRV_H__ -#define __MCR20_DRV_H__ - - -/***************************************************************************** - * INCLUDED HEADERS * - *---------------------------------------------------------------------------* - * Add to this section all the headers that this module needs to include. * - * Note that it is not a good practice to include header files into header * - * files, so use this section only if there is no other better solution. * - *---------------------------------------------------------------------------* - *****************************************************************************/ - -#include "EmbeddedTypes.h" - -/***************************************************************************** - * PRIVATE MACROS * - *---------------------------------------------------------------------------* - * Add to this section all the access macros, registers mappings, bit access * - * macros, masks, flags etc ... - *---------------------------------------------------------------------------* - *****************************************************************************/ -#ifndef gMCR20_ClkOutFreq_d -#define gMCR20_ClkOutFreq_d gCLK_OUT_FREQ_4_MHz -#endif - -/***************************************************************************** - * PUBLIC FUNCTIONS * - *---------------------------------------------------------------------------* - * Add to this section all the global functions prototype preceded (as a * - * good practice) by the keyword 'extern' * - *---------------------------------------------------------------------------* - *****************************************************************************/ - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_Init - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -extern void MCR20Drv_Init -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_SPI_DMA_Init - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_SPI_DMA_Init -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_Start_PB_DMA_SPI_Write - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_Start_PB_DMA_SPI_Write -( - uint8_t * srcAddress, - uint8_t numOfBytes -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_Start_PB_DMA_SPI_Read - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_Start_PB_DMA_SPI_Read -( - uint8_t * dstAddress, - uint8_t numOfBytes -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_DirectAccessSPIWrite - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_DirectAccessSPIWrite -( - uint8_t address, - uint8_t value -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_DirectAccessSPIMultiByteWrite - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_DirectAccessSPIMultiByteWrite -( - uint8_t startAddress, - uint8_t * byteArray, - uint8_t numOfBytes -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_PB_SPIBurstWrite - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_PB_SPIBurstWrite -( - uint8_t * byteArray, - uint8_t numOfBytes -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_DirectAccessSPIRead - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -uint8_t MCR20Drv_DirectAccessSPIRead -( - uint8_t address -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_DirectAccessSPIMultyByteRead - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ - -uint8_t MCR20Drv_DirectAccessSPIMultiByteRead -( - uint8_t startAddress, - uint8_t * byteArray, - uint8_t numOfBytes -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_PB_SPIByteWrite - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_PB_SPIByteWrite -( - uint8_t address, - uint8_t value -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_PB_SPIBurstRead - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -uint8_t MCR20Drv_PB_SPIBurstRead -( - uint8_t * byteArray, - uint8_t numOfBytes -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IndirectAccessSPIWrite - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_IndirectAccessSPIWrite -( - uint8_t address, - uint8_t value -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IndirectAccessSPIMultiByteWrite - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_IndirectAccessSPIMultiByteWrite -( - uint8_t startAddress, - uint8_t * byteArray, - uint8_t numOfBytes -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IndirectAccessSPIRead - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -uint8_t MCR20Drv_IndirectAccessSPIRead -( - uint8_t address -); -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IndirectAccessSPIMultiByteRead - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_IndirectAccessSPIMultiByteRead -( - uint8_t startAddress, - uint8_t * byteArray, - uint8_t numOfBytes -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IRQ_PortConfig - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_IRQ_PortConfig -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IsIrqPending - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -uint32_t MCR20Drv_IsIrqPending -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IRQ_Disable - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_IRQ_Disable -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IRQ_Enable - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_IRQ_Enable -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IRQ_IsEnabled - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -uint32_t MCR20Drv_IRQ_IsEnabled -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_IRQ_Clear - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_IRQ_Clear -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_RST_PortConfig - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_RST_B_PortConfig -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_RST_Assert - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_RST_B_Assert -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_RST_Deassert - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_RST_B_Deassert -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_SoftRST_Assert - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_SoftRST_Assert -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_SoftRST_Deassert - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_SoftRST_Deassert -( - void -); - - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_RESET - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_RESET -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_Soft_RESET - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_Soft_RESET -( - void -); - -/*--------------------------------------------------------------------------- - * Name: MCR20Drv_Set_CLK_OUT_Freq - * Description: - - * Parameters: - - * Return: - - *---------------------------------------------------------------------------*/ -void MCR20Drv_Set_CLK_OUT_Freq -( - uint8_t freqDiv -); - -#define ProtectFromMCR20Interrupt() MCR20Drv_IRQ_Disable() -#define UnprotectFromMCR20Interrupt() MCR20Drv_IRQ_Enable() - -#endif /* __MCR20_DRV_H__ */
--- a/RF_Drivers_Freescale/MCR20Drv/MCR20Overwrites.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,309 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file MCR20Overwrites.h
-* Description: Overwrites header file for MCR20 Register values
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#ifndef OVERWRITES_H_
-#define OVERWRITES_H_
-
-typedef struct overwrites_tag {
- char address;
- char data;
-}overwrites_t;
-
-
-/*****************************************************************************************************************/
-// This file is created exclusively for use with the transceiver 2.0 silicon
-// and is provided for the world to use. It contains a list of all
-// known overwrite values. Overwrite values are non-default register
-// values that configure the transceiver device to a more optimally performing
-// posture. It is expected that low level software (i.e. PHY) will
-// consume this file as a #include, and transfer the contents to the
-// the indicated addresses in the transceiver's memory space. This file has
-// at least one required entry, that being its own version current version
-// number, to be stored at transceiver's location 0x3B the
-// OVERWRITES_VERSION_NUMBER register. The RAM register is provided in
-// the transceiver address space to assist in future debug efforts. The
-// analyst may read this location (once device has been booted with
-// mysterious software) and have a good indication of what register
-// overwrites were performed (with all versions of the overwrites.h file
-// being archived forever at the Compass location shown above.
-//
-// The transceiver has an indirect register (IAR) space. Write access to this space
-// requires 3 or more writes:
-// 1st) the first write is an index value to the indirect (write Bit7=0, register access Bit 6=0) + 0x3E
-// 2nd) IAR Register #0x00 - 0xFF.
-// 3rd) The data to write
-// nth) Burst mode additional data if required.
-//
-// Write access to direct space requires only a single address, data pair.
-
-overwrites_t const overwrites_direct[] ={
-{0x3B, 0x0C}, //version 0C: new value for ACKDELAY targeting 198us (23 May, 2013, Larry Roshak)
-{0x23, 0x17} //PA_PWR new default Power Step is "23"
-};
-
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
-{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
-{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
-{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
-{0x52, 0x55}, //AGC_THR1 RSSI tune up
-{0x53, 0x2D}, //AGC_THR2 RSSI tune up
-{0x66, 0x5F}, //ATT_RSSI1 tune up
-{0x67, 0x8F}, //ATT_RSSI2 tune up
-{0x68, 0x61}, //RSSI_OFFSET
-{0x78, 0x03}, //CHF_PMAGAIN
-{0x22, 0x50}, //CCA1_THRESH
-{0x4D, 0x13}, //CORR_NVAL moved from 0x14 to 0x13 for 0.5 dB improved Rx Sensitivity
-{0x39, 0x3D} //ACKDELAY new value targeting a delay of 198us (23 May, 2013, Larry Roshak)
-};
-
-
-/* begin of deprecated versions
-
-==VERSION 1==
-(version 1 is empty)
-
-==VERSION 2==
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02} //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-};
-
-==VERSION 3==
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-{0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3
-{0x92, 0x07} //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
-};
-
-==VERSION 4==
-overwrites_t const overwrites_direct[] ={
-{0x3B, 0x04} //version 04 is the current version: update PA_COILTUNING default
-};
-
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-{0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3
-{0x92, 0x07} //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
-{0x8A, 0x71} //PA_TUNING: override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
-};
-
-==VERSION 5==
-overwrites_t const overwrites_direct[] ={
-{0x3B, 0x05} //version 05: updates Channel Filter Register set (21 Dec 2012, on behalf of S. Soca)
-};
-
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
-{0x92, 0x07} //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
-{0x8A, 0x71} //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
-{0x79, 0x2F} //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7A, 0x2F} //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7B, 0x24} //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7C, 0x24} //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7D, 0x24} //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7E, 0x24} //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x82, 0x24} //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x83, 0x24} //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7F, 0x32} //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x80, 0x1D} //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x81, 0x2D} //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-};
-
-==VERSION 6==
-overwrites_t const overwrites_direct[] ={
-{0x3B, 0x06} //version 06: disable PA calibration
-};
-
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
-{0x92, 0x07} //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
-{0x8A, 0x71} //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
-{0x79, 0x2F} //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7A, 0x2F} //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7B, 0x24} //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7C, 0x24} //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7D, 0x24} //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7E, 0x24} //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x82, 0x24} //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x83, 0x24} //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7F, 0x32} //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x80, 0x1D} //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x81, 0x2D} //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x64, 0x28} //PA_CAL_DIS=1 Disabled PA calibration
-};
-
-==VERSION 7==
-overwrites_t const overwrites_direct[] ={
-{0x3B, 0x07} //version 07: updated registers for ED/RSSI
-};
-
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
-{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
-{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
-{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
-{0x52, 0x73}, //AGC_THR1 RSSI tune up
-{0x53, 0x2D}, //AGC_THR2 RSSI tune up
-{0x66, 0x5F}, //ATT_RSSI1 tune up
-{0x67, 0x8F}, //ATT_RSSI2 tune up
-{0x68, 0x60}, //RSSI_OFFSET
-{0x69, 0x65} //RSSI_SLOPE
-};
-
-
-==VERSION 8==
-overwrites_t const overwrites_direct[] ={
-{0x3B, 0x08} //version 08: updated registers for ED/RSSI
-};
-
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
-{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
-{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
-{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
-{0x52, 0x73}, //AGC_THR1 RSSI tune up
-{0x53, 0x2D}, //AGC_THR2 RSSI tune up
-{0x66, 0x5F}, //ATT_RSSI1 tune up
-{0x67, 0x8F}, //ATT_RSSI2 tune up
-{0x69, 0x65} //RSSI_SLOPE
-{0x68, 0x61}, //RSSI_OFFSET
-{0x78, 0x03} //CHF_PMAGAIN
-};
-
-
-==VERSION 9==
-overwrites_t const overwrites_direct[] ={
-{0x3B, 0x09} //version 09: updated registers for ED/RSSI and PowerStep
-{0x23, 0x17} //PA_PWR new default value
-};
-
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
-{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
-{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
-{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
-{0x52, 0x55}, //AGC_THR1 RSSI tune up
-{0x53, 0x2D}, //AGC_THR2 RSSI tune up
-{0x66, 0x5F}, //ATT_RSSI1 tune up
-{0x67, 0x8F}, //ATT_RSSI2 tune up
-{0x68, 0x61}, //RSSI_OFFSET
-{0x78, 0x03} //CHF_PMAGAIN
-};
-
-==VERSION A==
-overwrites_t const overwrites_direct[] ={
-{0x3B, 0x0A} //version 0A: updated registers for CCA
-{0x23, 0x17} //PA_PWR new default Power Step is "23"
-};
-
-overwrites_t const overwrites_indirect[] ={
-{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
-{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
-{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
-{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
-{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
-{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
-{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
-{0x52, 0x55}, //AGC_THR1 RSSI tune up
-{0x53, 0x2D}, //AGC_THR2 RSSI tune up
-{0x66, 0x5F}, //ATT_RSSI1 tune up
-{0x67, 0x8F}, //ATT_RSSI2 tune up
-{0x68, 0x61}, //RSSI_OFFSET
-{0x78, 0x03} //CHF_PMAGAIN
-{0x22, 0x50} //CCA1_THRESH
-};
-
-end of deprecated versions */
-
-
-#endif //OVERWRITES_H_
-
--- a/RF_Drivers_Freescale/MCR20Drv/MCR20Reg.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,730 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file MCR20reg.h
-* MCR20 Registers
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#ifndef __MCR20_REG_H__
-#define __MCR20_REG_H__
-/*****************************************************************************
- * INCLUDED HEADERS *
- *---------------------------------------------------------------------------*
- * Add to this section all the headers that this module needs to include. *
- * Note that it is not a good practice to include header files into header *
- * files, so use this section only if there is no other better solution. *
- *---------------------------------------------------------------------------*
- *****************************************************************************/
-
-/****************************************************************************/
-/* Transceiver SPI Registers */
-/****************************************************************************/
-
-#define TransceiverSPI_IARIndexReg (0x3E)
-
-#define TransceiverSPI_ReadSelect (1<<7)
-#define TransceiverSPI_WriteSelect (0<<7)
-#define TransceiverSPI_RegisterAccessSelect (0<<6)
-#define TransceiverSPI_PacketBuffAccessSelect (1<<6)
-#define TransceiverSPI_PacketBuffBurstModeSelect (0<<5)
-#define TransceiverSPI_PacketBuffByteModeSelect (1<<5)
-
-#define TransceiverSPI_DirectRegisterAddressMask (0x3F)
-
-#define IRQSTS1 0x00
-#define IRQSTS2 0x01
-#define IRQSTS3 0x02
-#define PHY_CTRL1 0x03
-#define PHY_CTRL2 0x04
-#define PHY_CTRL3 0x05
-#define RX_FRM_LEN 0x06
-#define PHY_CTRL4 0x07
-#define SRC_CTRL 0x08
-#define SRC_ADDRS_SUM_LSB 0x09
-#define SRC_ADDRS_SUM_MSB 0x0A
-#define CCA1_ED_FNL 0x0B
-#define EVENT_TMR_LSB 0x0C
-#define EVENT_TMR_MSB 0x0D
-#define EVENT_TMR_USB 0x0E
-#define TIMESTAMP_LSB 0x0F
-#define TIMESTAMP_MSB 0x10
-#define TIMESTAMP_USB 0x11
-#define T3CMP_LSB 0x12
-#define T3CMP_MSB 0x13
-#define T3CMP_USB 0x14
-#define T2PRIMECMP_LSB 0x15
-#define T2PRIMECMP_MSB 0x16
-#define T1CMP_LSB 0x17
-#define T1CMP_MSB 0x18
-#define T1CMP_USB 0x19
-#define T2CMP_LSB 0x1A
-#define T2CMP_MSB 0x1B
-#define T2CMP_USB 0x1C
-#define T4CMP_LSB 0x1D
-#define T4CMP_MSB 0x1E
-#define T4CMP_USB 0x1F
-#define PLL_INT0 0x20
-#define PLL_FRAC0_LSB 0x21
-#define PLL_FRAC0_MSB 0x22
-#define PA_PWR 0x23
-#define SEQ_STATE 0x24
-#define LQI_VALUE 0x25
-#define RSSI_CCA_CONT 0x26
-//-------------- 0x27
-#define ASM_CTRL1 0x28
-#define ASM_CTRL2 0x29
-#define ASM_DATA_0 0x2A
-#define ASM_DATA_1 0x2B
-#define ASM_DATA_2 0x2C
-#define ASM_DATA_3 0x2D
-#define ASM_DATA_4 0x2E
-#define ASM_DATA_5 0x2F
-#define ASM_DATA_6 0x30
-#define ASM_DATA_7 0x31
-#define ASM_DATA_8 0x32
-#define ASM_DATA_9 0x33
-#define ASM_DATA_A 0x34
-#define ASM_DATA_B 0x35
-#define ASM_DATA_C 0x36
-#define ASM_DATA_D 0x37
-#define ASM_DATA_E 0x38
-#define ASM_DATA_F 0x39
-//------------------- 0x3A
-#define OVERWRITE_VER 0x3B
-#define CLK_OUT_CTRL 0x3C
-#define PWR_MODES 0x3D
-#define IAR_INDEX 0x3E
-#define IAR_DATA 0x3F
-
-
-#define PART_ID 0x00
-#define XTAL_TRIM 0x01
-#define PMC_LP_TRIM 0x02
-#define MACPANID0_LSB 0x03
-#define MACPANID0_MSB 0x04
-#define MACSHORTADDRS0_LSB 0x05
-#define MACSHORTADDRS0_MSB 0x06
-#define MACLONGADDRS0_0 0x07
-#define MACLONGADDRS0_8 0x08
-#define MACLONGADDRS0_16 0x09
-#define MACLONGADDRS0_24 0x0A
-#define MACLONGADDRS0_32 0x0B
-#define MACLONGADDRS0_40 0x0C
-#define MACLONGADDRS0_48 0x0D
-#define MACLONGADDRS0_56 0x0E
-#define RX_FRAME_FILTER 0x0F
-#define PLL_INT1 0x10
-#define PLL_FRAC1_LSB 0x11
-#define PLL_FRAC1_MSB 0x12
-#define MACPANID1_LSB 0x13
-#define MACPANID1_MSB 0x14
-#define MACSHORTADDRS1_LSB 0x15
-#define MACSHORTADDRS1_MSB 0x16
-#define MACLONGADDRS1_0 0x17
-#define MACLONGADDRS1_8 0x18
-#define MACLONGADDRS1_16 0x19
-#define MACLONGADDRS1_24 0x1A
-#define MACLONGADDRS1_32 0x1B
-#define MACLONGADDRS1_40 0x1C
-#define MACLONGADDRS1_48 0x1D
-#define MACLONGADDRS1_56 0x1E
-#define DUAL_PAN_CTRL 0x1F
-#define DUAL_PAN_DWELL 0x20
-#define DUAL_PAN_STS 0x21
-#define CCA1_THRESH 0x22
-#define CCA1_ED_OFFSET_COMP 0x23
-#define LQI_OFFSET_COMP 0x24
-#define CCA_CTRL 0x25
-#define CCA2_CORR_PEAKS 0x26
-#define CCA2_CORR_THRESH 0x27
-#define TMR_PRESCALE 0x28
-//---------------- 0x29
-#define GPIO_DATA 0x2A
-#define GPIO_DIR 0x2B
-#define GPIO_PUL_EN 0x2C
-#define GPIO_PUL_SEL 0x2D
-#define GPIO_DS 0x2E
-//-------------- 0x2F
-#define ANT_PAD_CTRL 0x30
-#define MISC_PAD_CTRL 0x31
-#define BSM_CTRL 0x32
-//--------------- 0x33
-#define _RNG 0x34
-#define RX_BYTE_COUNT 0x35
-#define RX_WTR_MARK 0x36
-#define SOFT_RESET 0x37
-#define TXDELAY 0x38
-#define ACKDELAY 0x39
-#define SEQ_MGR_CTRL 0x3A
-#define SEQ_MGR_STS 0x3B
-#define SEQ_T_STS 0x3C
-#define ABORT_STS 0x3D
-#define CCCA_BUSY_CNT 0x3E
-#define SRC_ADDR_CHECKSUM1 0x3F
-#define SRC_ADDR_CHECKSUM2 0x40
-#define SRC_TBL_VALID1 0x41
-#define SRC_TBL_VALID2 0x42
-#define FILTERFAIL_CODE1 0x43
-#define FILTERFAIL_CODE2 0x44
-#define SLOT_PRELOAD 0x45
-//---------------- 0x46
-#define CORR_VT 0x47
-#define SYNC_CTRL 0x48
-#define PN_LSB_0 0x49
-#define PN_LSB_1 0x4A
-#define PN_MSB_0 0x4B
-#define PN_MSB_1 0x4C
-#define CORR_NVAL 0x4D
-#define TX_MODE_CTRL 0x4E
-#define SNF_THR 0x4F
-#define FAD_THR 0x50
-#define ANT_AGC_CTRL 0x51
-#define AGC_THR1 0x52
-#define AGC_THR2 0x53
-#define AGC_HYS 0x54
-#define AFC 0x55
-//--------------- 0x56
-//--------------- 0x57
-#define PHY_STS 0x58
-#define RX_MAX_CORR 0x59
-#define RX_MAX_PREAMBLE 0x5A
-#define RSSI 0x5B
-//--------------- 0x5C
-//--------------- 0x5D
-#define PLL_DIG_CTRL 0x5E
-#define VCO_CAL 0x5F
-#define VCO_BEST_DIFF 0x60
-#define VCO_BIAS 0x61
-#define KMOD_CTRL 0x62
-#define KMOD_CAL 0x63
-#define PA_CAL 0x64
-#define PA_PWRCAL 0x65
-#define ATT_RSSI1 0x66
-#define ATT_RSSI2 0x67
-#define RSSI_OFFSET 0x68
-#define RSSI_SLOPE 0x69
-#define RSSI_CAL1 0x6A
-#define RSSI_CAL2 0x6B
-//--------------- 0x6C
-//--------------- 0x6D
-#define XTAL_CTRL 0x6E
-#define XTAL_COMP_MIN 0x6F
-#define XTAL_COMP_MAX 0x70
-#define XTAL_GM 0x71
-//--------------- 0x72
-//--------------- 0x73
-#define LNA_TUNE 0x74
-#define LNA_AGCGAIN 0x75
-//--------------- 0x76
-//--------------- 0x77
-#define CHF_PMA_GAIN 0x78
-#define CHF_IBUF 0x79
-#define CHF_QBUF 0x7A
-#define CHF_IRIN 0x7B
-#define CHF_QRIN 0x7C
-#define CHF_IL 0x7D
-#define CHF_QL 0x7E
-#define CHF_CC1 0x7F
-#define CHF_CCL 0x80
-#define CHF_CC2 0x81
-#define CHF_IROUT 0x82
-#define CHF_QROUT 0x83
-//--------------- 0x84
-//--------------- 0x85
-#define RSSI_CTRL 0x86
-//--------------- 0x87
-//--------------- 0x88
-#define PA_BIAS 0x89
-#define PA_TUNING 0x8A
-//--------------- 0x8B
-//--------------- 0x8C
-#define PMC_HP_TRIM 0x8D
-#define VREGA_TRIM 0x8E
-//--------------- 0x8F
-//--------------- 0x90
-#define VCO_CTRL1 0x91
-#define VCO_CTRL2 0x92
-//--------------- 0x93
-//--------------- 0x94
-#define ANA_SPARE_OUT1 0x95
-#define ANA_SPARE_OUT2 0x96
-#define ANA_SPARE_IN 0x97
-#define MISCELLANEOUS 0x98
-//--------------- 0x99
-#define SEQ_MGR_OVRD0 0x9A
-#define SEQ_MGR_OVRD1 0x9B
-#define SEQ_MGR_OVRD2 0x9C
-#define SEQ_MGR_OVRD3 0x9D
-#define SEQ_MGR_OVRD4 0x9E
-#define SEQ_MGR_OVRD5 0x9F
-#define SEQ_MGR_OVRD6 0xA0
-#define SEQ_MGR_OVRD7 0xA1
-//--------------- 0xA2
-#define TESTMODE_CTRL 0xA3
-#define DTM_CTRL1 0xA4
-#define DTM_CTRL2 0xA5
-#define ATM_CTRL1 0xA6
-#define ATM_CTRL2 0xA7
-#define ATM_CTRL3 0xA8
-//--------------- 0xA9
-#define LIM_FE_TEST_CTRL 0xAA
-#define CHF_TEST_CTRL 0xAB
-#define VCO_TEST_CTRL 0xAC
-#define PLL_TEST_CTRL 0xAD
-#define PA_TEST_CTRL 0xAE
-#define PMC_TEST_CTRL 0xAF
-#define SCAN_DTM_PROTECT_1 0xFE
-#define SCAN_DTM_PROTECT_0 0xFF
-
-// IRQSTS1 bits
-#define cIRQSTS1_RX_FRM_PEND (1<<7)
-#define cIRQSTS1_PLL_UNLOCK_IRQ (1<<6)
-#define cIRQSTS1_FILTERFAIL_IRQ (1<<5)
-#define cIRQSTS1_RXWTRMRKIRQ (1<<4)
-#define cIRQSTS1_CCAIRQ (1<<3)
-#define cIRQSTS1_RXIRQ (1<<2)
-#define cIRQSTS1_TXIRQ (1<<1)
-#define cIRQSTS1_SEQIRQ (1<<0)
-
-typedef union regIRQSTS1_tag{
- uint8_t byte;
- struct{
- uint8_t SEQIRQ:1;
- uint8_t TXIRQ:1;
- uint8_t RXIRQ:1;
- uint8_t CCAIRQ:1;
- uint8_t RXWTRMRKIRQ:1;
- uint8_t FILTERFAIL_IRQ:1;
- uint8_t PLL_UNLOCK_IRQ:1;
- uint8_t RX_FRM_PEND:1;
- }bit;
-} regIRQSTS1_t;
-
-// IRQSTS2 bits
-#define cIRQSTS2_CRCVALID (1<<7)
-#define cIRQSTS2_CCA (1<<6)
-#define cIRQSTS2_SRCADDR (1<<5)
-#define cIRQSTS2_PI (1<<4)
-#define cIRQSTS2_TMRSTATUS (1<<3)
-#define cIRQSTS2_ASM_IRQ (1<<2)
-#define cIRQSTS2_PB_ERR_IRQ (1<<1)
-#define cIRQSTS2_WAKE_IRQ (1<<0)
-
-typedef union regIRQSTS2_tag{
- uint8_t byte;
- struct{
- uint8_t WAKE_IRQ:1;
- uint8_t PB_ERR_IRQ:1;
- uint8_t ASM_IRQ:1;
- uint8_t TMRSTATUS:1;
- uint8_t PI:1;
- uint8_t SRCADDR:1;
- uint8_t CCA:1;
- uint8_t CRCVALID:1;
- }bit;
-} regIRQSTS2_t;
-
-// IRQSTS3 bits
-#define cIRQSTS3_TMR4MSK (1<<7)
-#define cIRQSTS3_TMR3MSK (1<<6)
-#define cIRQSTS3_TMR2MSK (1<<5)
-#define cIRQSTS3_TMR1MSK (1<<4)
-#define cIRQSTS3_TMR4IRQ (1<<3)
-#define cIRQSTS3_TMR3IRQ (1<<2)
-#define cIRQSTS3_TMR2IRQ (1<<1)
-#define cIRQSTS3_TMR1IRQ (1<<0)
-
-typedef union regIRQSTS3_tag{
- uint8_t byte;
- struct{
- uint8_t TMR1IRQ:1;
- uint8_t TMR2IRQ:1;
- uint8_t TMR3IRQ:1;
- uint8_t TMR4IRQ:1;
- uint8_t TMR1MSK:1;
- uint8_t TMR2MSK:1;
- uint8_t TMR3MSK:1;
- uint8_t TMR4MSK:1;
- }bit;
-} regIRQSTS3_t;
-
-// PHY_CTRL1 bits
-#define cPHY_CTRL1_TMRTRIGEN (1<<7)
-#define cPHY_CTRL1_SLOTTED (1<<6)
-#define cPHY_CTRL1_CCABFRTX (1<<5)
-#define cPHY_CTRL1_RXACKRQD (1<<4)
-#define cPHY_CTRL1_AUTOACK (1<<3)
-#define cPHY_CTRL1_XCVSEQ (7<<0)
-
-typedef union regPHY_CTRL1_tag{
- uint8_t byte;
- struct{
- uint8_t XCVSEQ:3;
- uint8_t AUTOACK:1;
- uint8_t RXACKRQD:1;
- uint8_t CCABFRTX:1;
- uint8_t SLOTTED:1;
- uint8_t TMRTRIGEN:1;
- }bit;
-} regPHY_CTRL1_t;
-
-// PHY_CTRL2 bits
-#define cPHY_CTRL2_CRC_MSK (1<<7)
-#define cPHY_CTRL2_PLL_UNLOCK_MSK (1<<6)
-#define cPHY_CTRL2_FILTERFAIL_MSK (1<<5)
-#define cPHY_CTRL2_RX_WMRK_MSK (1<<4)
-#define cPHY_CTRL2_CCAMSK (1<<3)
-#define cPHY_CTRL2_RXMSK (1<<2)
-#define cPHY_CTRL2_TXMSK (1<<1)
-#define cPHY_CTRL2_SEQMSK (1<<0)
-
-typedef union regPHY_CTRL2_tag{
- uint8_t byte;
- struct{
- uint8_t SEQMSK:1;
- uint8_t TXMSK:1;
- uint8_t RXMSK:1;
- uint8_t CCAMSK:1;
- uint8_t RX_WMRK_MSK:1;
- uint8_t FILTERFAIL_MSK:1;
- uint8_t PLL_UNLOCK_MSK:1;
- uint8_t CRC_MSK:1;
- }bit;
-} regPHY_CTRL2_t;
-
-// PHY_CTRL3 bits
-#define cPHY_CTRL3_TMR4CMP_EN (1<<7)
-#define cPHY_CTRL3_TMR3CMP_EN (1<<6)
-#define cPHY_CTRL3_TMR2CMP_EN (1<<5)
-#define cPHY_CTRL3_TMR1CMP_EN (1<<4)
-#define cPHY_CTRL3_ASM_MSK (1<<2)
-#define cPHY_CTRL3_PB_ERR_MSK (1<<1)
-#define cPHY_CTRL3_WAKE_MSK (1<<0)
-
-typedef union regPHY_CTRL3_tag{
- uint8_t byte;
- struct{
- uint8_t WAKE_MSK:1;
- uint8_t PB_ERR_MSK:1;
- uint8_t ASM_MSK:1;
- uint8_t RESERVED:1;
- uint8_t TMR1CMP_EN:1;
- uint8_t TMR2CMP_EN:1;
- uint8_t TMR3CMP_EN:1;
- uint8_t TMR4CMP_EN:1;
- }bit;
-} regPHY_CTRL3_t;
-
-// RX_FRM_LEN bits
-#define cRX_FRAME_LENGTH (0x7F)
-
-// PHY_CTRL4 bits
-#define cPHY_CTRL4_TRCV_MSK (1<<7)
-#define cPHY_CTRL4_TC3TMOUT (1<<6)
-#define cPHY_CTRL4_PANCORDNTR0 (1<<5)
-#define cPHY_CTRL4_CCATYPE (3<<0)
-#define cPHY_CTRL4_CCATYPE_Shift_c (3)
-#define cPHY_CTRL4_TMRLOAD (1<<2)
-#define cPHY_CTRL4_PROMISCUOUS (1<<1)
-#define cPHY_CTRL4_TC2PRIME_EN (1<<0)
-
-typedef union regPHY_CTRL4_tag{
- uint8_t byte;
- struct{
- uint8_t TC2PRIME_EN:1;
- uint8_t PROMISCUOUS:1;
- uint8_t TMRLOAD:1;
- uint8_t CCATYPE:2;
- uint8_t PANCORDNTR0:1;
- uint8_t TC3TMOUT:1;
- uint8_t TRCV_MSK:1;
- }bit;
-} regPHY_CTRL4_t;
-
-// SRC_CTRL bits
-#define cSRC_CTRL_INDEX (0x0F)
-#define cSRC_CTRL_INDEX_Shift_c (4)
-#define cSRC_CTRL_ACK_FRM_PND (1<<3)
-#define cSRC_CTRL_SRCADDR_EN (1<<2)
-#define cSRC_CTRL_INDEX_EN (1<<1)
-#define cSRC_CTRL_INDEX_DISABLE (1<<0)
-
-typedef union regSRC_CTRL_tag{
- uint8_t byte;
- struct{
- uint8_t INDEX_DISABLE:1;
- uint8_t INDEX_EN:1;
- uint8_t SRCADDR_EN:1;
- uint8_t ACK_FRM_PND:1;
- uint8_t INDEX:4;
- }bit;
-} regSRC_CTRL_t;
-
-// ASM_CTRL1 bits
-#define cASM_CTRL1_CLEAR (1<<7)
-#define cASM_CTRL1_START (1<<6)
-#define cASM_CTRL1_SELFTST (1<<5)
-#define cASM_CTRL1_CTR (1<<4)
-#define cASM_CTRL1_CBC (1<<3)
-#define cASM_CTRL1_AES (1<<2)
-#define cASM_CTRL1_LOAD_MAC (1<<1)
-
-// ASM_CTRL2 bits
-#define cASM_CTRL2_DATA_REG_TYPE_SEL (7)
-#define cASM_CTRL2_DATA_REG_TYPE_SEL_Shift_c (5)
-#define cASM_CTRL2_TSTPAS (1<<1)
-
-// CLK_OUT_CTRL bits
-#define cCLK_OUT_CTRL_EXTEND (1<<7)
-#define cCLK_OUT_CTRL_HIZ (1<<6)
-#define cCLK_OUT_CTRL_SR (1<<5)
-#define cCLK_OUT_CTRL_DS (1<<4)
-#define cCLK_OUT_CTRL_EN (1<<3)
-#define cCLK_OUT_CTRL_DIV (7)
-
-// PWR_MODES bits
-#define cPWR_MODES_XTAL_READY (1<<5)
-#define cPWR_MODES_XTALEN (1<<4)
-#define cPWR_MODES_ASM_CLK_EN (1<<3)
-#define cPWR_MODES_AUTODOZE (1<<1)
-#define cPWR_MODES_PMC_MODE (1<<0)
-
-// RX_FRAME_FILTER bits
-#define cRX_FRAME_FLT_FRM_VER (0xC0)
-#define cRX_FRAME_FLT_FRM_VER_Shift_c (6)
-#define cRX_FRAME_FLT_ACTIVE_PROMISCUOUS (1<<5)
-#define cRX_FRAME_FLT_NS_FT (1<<4)
-#define cRX_FRAME_FLT_CMD_FT (1<<3)
-#define cRX_FRAME_FLT_ACK_FT (1<<2)
-#define cRX_FRAME_FLT_DATA_FT (1<<1)
-#define cRX_FRAME_FLT_BEACON_FT (1<<0)
-
-typedef union regRX_FRAME_FILTER_tag{
- uint8_t byte;
- struct{
- uint8_t FRAME_FLT_BEACON_FT:1;
- uint8_t FRAME_FLT_DATA_FT:1;
- uint8_t FRAME_FLT_ACK_FT:1;
- uint8_t FRAME_FLT_CMD_FT:1;
- uint8_t FRAME_FLT_NS_FT:1;
- uint8_t FRAME_FLT_ACTIVE_PROMISCUOUS:1;
- uint8_t FRAME_FLT_FRM_VER:2;
- }bit;
-} regRX_FRAME_FILTER_t;
-
-// DUAL_PAN_CTRL bits
-#define cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_MSK (0xF0)
-#define cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_Shift_c (4)
-#define cDUAL_PAN_CTRL_CURRENT_NETWORK (1<<3)
-#define cDUAL_PAN_CTRL_PANCORDNTR1 (1<<2)
-#define cDUAL_PAN_CTRL_DUAL_PAN_AUTO (1<<1)
-#define cDUAL_PAN_CTRL_ACTIVE_NETWORK (1<<0)
-
-// DUAL_PAN_STS bits
-#define cDUAL_PAN_STS_RECD_ON_PAN1 (1<<7)
-#define cDUAL_PAN_STS_RECD_ON_PAN0 (1<<6)
-#define cDUAL_PAN_STS_DUAL_PAN_REMAIN (0x3F)
-
-// CCA_CTRL bits
-#define cCCA_CTRL_AGC_FRZ_EN (1<<6)
-#define cCCA_CTRL_CONT_RSSI_EN (1<<5)
-#define cCCA_CTRL_LQI_RSSI_NOT_CORR (1<<4)
-#define cCCA_CTRL_CCA3_AND_NOT_OR (1<<3)
-#define cCCA_CTRL_POWER_COMP_EN_LQI (1<<2)
-#define cCCA_CTRL_POWER_COMP_EN_ED (1<<1)
-#define cCCA_CTRL_POWER_COMP_EN_CCA1 (1<<0)
-
-// GPIO_DATA bits
-#define cGPIO_DATA_7 (1<<7)
-#define cGPIO_DATA_6 (1<<6)
-#define cGPIO_DATA_5 (1<<5)
-#define cGPIO_DATA_4 (1<<4)
-#define cGPIO_DATA_3 (1<<3)
-#define cGPIO_DATA_2 (1<<2)
-#define cGPIO_DATA_1 (1<<1)
-#define cGPIO_DATA_0 (1<<0)
-
-// GPIO_DIR bits
-#define cGPIO_DIR_7 (1<<7)
-#define cGPIO_DIR_6 (1<<6)
-#define cGPIO_DIR_5 (1<<5)
-#define cGPIO_DIR_4 (1<<4)
-#define cGPIO_DIR_3 (1<<3)
-#define cGPIO_DIR_2 (1<<2)
-#define cGPIO_DIR_1 (1<<1)
-#define cGPIO_DIR_0 (1<<0)
-
-// GPIO_PUL_EN bits
-#define cGPIO_PUL_EN_7 (1<<7)
-#define cGPIO_PUL_EN_6 (1<<6)
-#define cGPIO_PUL_EN_5 (1<<5)
-#define cGPIO_PUL_EN_4 (1<<4)
-#define cGPIO_PUL_EN_3 (1<<3)
-#define cGPIO_PUL_EN_2 (1<<2)
-#define cGPIO_PUL_EN_1 (1<<1)
-#define cGPIO_PUL_EN_0 (1<<0)
-
-// GPIO_PUL_SEL bits
-#define cGPIO_PUL_SEL_7 (1<<7)
-#define cGPIO_PUL_SEL_6 (1<<6)
-#define cGPIO_PUL_SEL_5 (1<<5)
-#define cGPIO_PUL_SEL_4 (1<<4)
-#define cGPIO_PUL_SEL_3 (1<<3)
-#define cGPIO_PUL_SEL_2 (1<<2)
-#define cGPIO_PUL_SEL_1 (1<<1)
-#define cGPIO_PUL_SEL_0 (1<<0)
-
-// GPIO_DS bits
-#define cGPIO_DS_7 (1<<7)
-#define cGPIO_DS_6 (1<<6)
-#define cGPIO_DS_5 (1<<5)
-#define cGPIO_DS_4 (1<<4)
-#define cGPIO_DS_3 (1<<3)
-#define cGPIO_DS_2 (1<<2)
-#define cGPIO_DS_1 (1<<1)
-#define cGPIO_DS_0 (1<<0)
-
-// SPI_CTRL bits
-//#define cSPI_CTRL_MISO_HIZ_EN (1<<1)
-//#define cSPI_CTRL_PB_PROTECT (1<<0)
-
-// ANT_PAD_CTRL bits
-#define cANT_PAD_CTRL_ANTX_POL (0x0F)
-#define cANT_PAD_CTRL_ANTX_POL_Shift_c (4)
-#define cANT_PAD_CTRL_ANTX_CTRLMODE (1<<3)
-#define cANT_PAD_CTRL_ANTX_HZ (1<<2)
-#define cANT_PAD_CTRL_ANTX_EN (3)
-
-// MISC_PAD_CTRL bits
-#define cMISC_PAD_CTRL_MISO_HIZ_EN (1<<3)
-#define cMISC_PAD_CTRL_IRQ_B_OD (1<<2)
-#define cMISC_PAD_CTRL_NON_GPIO_DS (1<<1)
-#define cMISC_PAD_CTRL_ANTX_CURR (1<<0)
-
-// ANT_AGC_CTRL bits
-#define cANT_AGC_CTRL_FAD_EN_Shift_c (0)
-#define cANT_AGC_CTRL_FAD_EN_Mask_c (1<<cANT_AGC_CTRL_FAD_EN_Shift_c)
-#define cANT_AGC_CTRL_ANTX_Shift_c (1)
-#define cANT_AGC_CTRL_ANTX_Mask_c (1<<cANT_AGC_CTRL_ANTX_Shift_c)
-
-// BSM_CTRL bits
-#define cBSM_CTRL_BSM_EN (1<<0)
-
-// SOFT_RESET bits
-#define cSOFT_RESET_SOG_RST (1<<7)
-#define cSOFT_RESET_REGS_RST (1<<4)
-#define cSOFT_RESET_PLL_RST (1<<3)
-#define cSOFT_RESET_TX_RST (1<<2)
-#define cSOFT_RESET_RX_RST (1<<1)
-#define cSOFT_RESET_SEQ_MGR_RST (1<<0)
-
-// SEQ_MGR_CTRL bits
-#define cSEQ_MGR_CTRL_SEQ_STATE_CTRL (3)
-#define cSEQ_MGR_CTRL_SEQ_STATE_CTRL_Shift_c (6)
-#define cSEQ_MGR_CTRL_NO_RX_RECYCLE (1<<5)
-#define cSEQ_MGR_CTRL_LATCH_PREAMBLE (1<<4)
-#define cSEQ_MGR_CTRL_EVENT_TMR_DO_NOT_LATCH (1<<3)
-#define cSEQ_MGR_CTRL_CLR_NEW_SEQ_INHIBIT (1<<2)
-#define cSEQ_MGR_CTRL_PSM_LOCK_DIS (1<<1)
-#define cSEQ_MGR_CTRL_PLL_ABORT_OVRD (1<<0)
-
-// SEQ_MGR_STS bits
-#define cSEQ_MGR_STS_TMR2_SEQ_TRIG_ARMED (1<<7)
-#define cSEQ_MGR_STS_RX_MODE (1<<6)
-#define cSEQ_MGR_STS_RX_TIMEOUT_PENDING (1<<5)
-#define cSEQ_MGR_STS_NEW_SEQ_INHIBIT (1<<4)
-#define cSEQ_MGR_STS_SEQ_IDLE (1<<3)
-#define cSEQ_MGR_STS_XCVSEQ_ACTUAL (7)
-
-// ABORT_STS bits
-#define cABORT_STS_PLL_ABORTED (1<<2)
-#define cABORT_STS_TC3_ABORTED (1<<1)
-#define cABORT_STS_SW_ABORTED (1<<0)
-
-// FILTERFAIL_CODE2 bits
-#define cFILTERFAIL_CODE2_PAN_SEL (1<<7)
-#define cFILTERFAIL_CODE2_9_8 (3)
-
-// PHY_STS bits
-#define cPHY_STS_PLL_UNLOCK (1<<7)
-#define cPHY_STS_PLL_LOCK_ERR (1<<6)
-#define cPHY_STS_PLL_LOCK (1<<5)
-#define cPHY_STS_CRCVALID (1<<3)
-#define cPHY_STS_FILTERFAIL_FLAG_SEL (1<<2)
-#define cPHY_STS_SFD_DET (1<<1)
-#define cPHY_STS_PREAMBLE_DET (1<<0)
-
-// TESTMODE_CTRL bits
-#define cTEST_MODE_CTRL_HOT_ANT (1<<4)
-#define cTEST_MODE_CTRL_IDEAL_RSSI_EN (1<<3)
-#define cTEST_MODE_CTRL_IDEAL_PFC_EN (1<<2)
-#define cTEST_MODE_CTRL_CONTINUOUS_EN (1<<1)
-#define cTEST_MODE_CTRL_FPGA_EN (1<<0)
-
-// DTM_CTRL1 bits
-#define cDTM_CTRL1_ATM_LOCKED (1<<7)
-#define cDTM_CTRL1_DTM_EN (1<<6)
-#define cDTM_CTRL1_PAGE5 (1<<5)
-#define cDTM_CTRL1_PAGE4 (1<<4)
-#define cDTM_CTRL1_PAGE3 (1<<3)
-#define cDTM_CTRL1_PAGE2 (1<<2)
-#define cDTM_CTRL1_PAGE1 (1<<1)
-#define cDTM_CTRL1_PAGE0 (1<<0)
-
-// TX_MODE_CTRL
-#define cTX_MODE_CTRL_TX_INV (1<<4)
-#define cTX_MODE_CTRL_BT_EN (1<<3)
-#define cTX_MODE_CTRL_DTS2 (1<<2)
-#define cTX_MODE_CTRL_DTS1 (1<<1)
-#define cTX_MODE_CTRL_DTS0 (1<<0)
-
-#define cTX_MODE_CTRL_DTS_MASK (7)
-
-// CLK_OUT_CTRL bits
-#define cCLK_OUT_EXTEND (1<<7)
-#define cCLK_OUT_HIZ (1<<6)
-#define cCLK_OUT_SR (1<<5)
-#define cCLK_OUT_DS (1<<4)
-#define cCLK_OUT_EN (1<<3)
-#define cCLK_OUT_DIV_Mask (7<<0)
-
-#define gCLK_OUT_FREQ_32_MHz (0)
-#define gCLK_OUT_FREQ_16_MHz (1)
-#define gCLK_OUT_FREQ_8_MHz (2)
-#define gCLK_OUT_FREQ_4_MHz (3)
-#define gCLK_OUT_FREQ_1_MHz (4)
-#define gCLK_OUT_FREQ_250_KHz (5)
-#define gCLK_OUT_FREQ_62_5_KHz (6)
-#define gCLK_OUT_FREQ_32_78_KHz (7)
-#define gCLK_OUT_FREQ_DISABLE (8)
-
-
-
-
-#endif /* __MCR20_REG_H__ */
--- a/RF_Drivers_Freescale/MCR20Drv/XcvrSpi.cpp Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,172 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file XcvrSpi.c
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-
-/*****************************************************************************
-* INCLUDED HEADERS *
-*---------------------------------------------------------------------------*
-* Add to this section all the headers that this module needs to include. *
-* Note that it is not a good practice to include header files into header *
-* files, so use this section only if there is no other better solution. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-#include "mbed.h"
-#include "EmbeddedTypes.h"
-
-#if defined(TARGET_K64F)
- SPI spi(PTD2, PTD3, PTD1);
-#elif defined(TARGET_NUCLEO_F401RE)
- SPI spi(SPI_MOSI, SPI_MISO, SPI_SCK);
-#else
- "SPI not defined for this platform"
-#endif
-
-DigitalOut RF_CS(D10);
-DigitalOut RF_RST(D5);
-DigitalOut RF_SLP_TR(D7); // Not used in FSL
-InterruptIn RF_IRQ (D2); // FSL //(D9); // Atmel Radio
-DigitalIn RF_IRQ_PIN (D2);
-
-extern "C" void PHY_InterruptHandler(void);
-
-extern "C" void RF_IRQ_Init(void) {
- RF_IRQ.disable_irq();
- RF_IRQ.mode(PullUp);
- RF_IRQ.fall(&PHY_InterruptHandler);
-}
-
-extern "C" void RF_IRQ_Enable(void) {
- RF_IRQ.enable_irq();
-}
-extern "C" void RF_IRQ_Disable(void) {
- RF_IRQ.disable_irq();
-}
-
-extern "C" bool_t RF_isIRQ_Pending(void) {
-#if 0
- int state = RF_IRQ_PIN.read();
-
- if (1 == state)
- {
- return 0;
- }
- else
- {
- return 1;
- }
-#endif
- return RF_IRQ_PIN.read();
-}
-
-extern "C" void RF_RST_Set(int state) {
- RF_RST = state;
-}
-
-extern "C" void RF_SLP_TR_Set(int state) {
- RF_SLP_TR = state;
-}
-
-extern "C" void RF_CS_while_active(void) {
-
- while(!RF_CS);
-}
-
-/*****************************************************************************
-* PRIVATE MACROS *
-*---------------------------------------------------------------------------*
-* Add to this section all the access macros, registers mappings, bit access *
-* macros, masks, flags etc ...
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-/*****************************************************************************/
-/*****************************************************************************/
-extern "C" void spi_master_init(uint32_t instance)
-{
-
-}
-
-/*****************************************************************************/
-/*****************************************************************************/
-extern "C" void spi_master_configure_speed(uint32_t instance, uint32_t freq)
-{
- //spi.frequency(8000000);
- spi.frequency(freq);
-}
-
-/*****************************************************************************/
-/*****************************************************************************/
-extern "C" void spi_master_transfer(uint32_t instance,
- uint8_t * sendBuffer,
- uint8_t * receiveBuffer,
- size_t transferByteCount)
-{
- volatile uint8_t dummy;
-
- if( !transferByteCount )
- return;
-
- if( !sendBuffer && !receiveBuffer )
- return;
-
- while( transferByteCount-- )
- {
- if( sendBuffer )
- {
- dummy = *sendBuffer;
- sendBuffer++;
- }
- else
- {
- dummy = 0xFF;
- }
-
- dummy = spi.write(dummy);
-
- if( receiveBuffer )
- {
- *receiveBuffer = dummy;
- receiveBuffer++;
- }
- }
-}
-
-extern "C" void gXcvrAssertCS_d(void)
-{
- RF_CS = 0;
-}
-
-extern "C" void gXcvrDeassertCS_d(void)
-{
- RF_CS = 1;
-}
\ No newline at end of file
--- a/RF_Drivers_Freescale/MCR20Drv/XcvrSpi.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,88 +0,0 @@ -/*! -* Copyright (c) 2015, Freescale Semiconductor, Inc. -* All rights reserved. -* -* \file XcvrSpi.h -* -* Redistribution and use in source and binary forms, with or without modification, -* are permitted provided that the following conditions are met: -* -* o Redistributions of source code must retain the above copyright notice, this list -* of conditions and the following disclaimer. -* -* o Redistributions in binary form must reproduce the above copyright notice, this -* list of conditions and the following disclaimer in the documentation and/or -* other materials provided with the distribution. -* -* o Neither the name of Freescale Semiconductor, Inc. nor the names of its -* contributors may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __XCVR_SPI_H__ -#define __XCVR_SPI_H__ - - -/***************************************************************************** - * INCLUDED HEADERS * - *---------------------------------------------------------------------------* - * Add to this section all the headers that this module needs to include. * - * Note that it is not a good practice to include header files into header * - * files, so use this section only if there is no other better solution. * - *---------------------------------------------------------------------------* - *****************************************************************************/ - -#include "EmbeddedTypes.h" -//#include "board.h" - - -/***************************************************************************** - * PUBLIC MACROS * - *---------------------------------------------------------------------------* - * Add to this section all the access macros, registers mappings, bit access * - * macros, masks, flags etc ... - *---------------------------------------------------------------------------* - *****************************************************************************/ -//#define gXcvrAssertCS_d() GPIO_DRV_ClearPinOutput(kGpioXcvrSpiCsPin) -//#define gXcvrDeassertCS_d() GPIO_DRV_SetPinOutput(kGpioXcvrSpiCsPin) - -#define gXcvrSpiInstance_c 0 - -/***************************************************************************** - * PUBLIC FUNCTIONS * - *---------------------------------------------------------------------------* - * Add to this section all the global functions prototype preceded (as a * - * good practice) by the keyword 'extern' * - *---------------------------------------------------------------------------* - *****************************************************************************/ -void RF_RST_Set(int state); -void RF_SLP_TR_Set(int state); -void RF_CS_while_active(void); -void RF_CS_Set(int state); -void RF_IRQ_Init(void); -void RF_IRQ_Disable(void); -void RF_IRQ_Enable(void); -bool_t RF_isIRQ_Pending(void); - -void gXcvrAssertCS_d(void); -void gXcvrDeassertCS_d(void); - -void spi_master_init(uint32_t instance); -void spi_master_configure_speed(uint32_t instance, uint32_t freq); -void spi_master_transfer(uint32_t instance, - uint8_t * sendBuffer, - uint8_t * receiveBuffer, - uint32_t transferByteCount); - -#endif /* __XCVR_SPI_H__ */
--- a/RF_Drivers_Freescale/MPM.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,554 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file MPM.c
-* This is the source file for the Multiple PAN Manager.
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-
-#include "EmbeddedTypes.h"
-#include "MpmInterface.h"
-#include "Phy.h"
-
-//#include "FunctionLib.h"
-//#include "MemManager.h"
-//#include "Panic.h"
-
-
-#if gMpmIncluded_d
-
-/************************************************************************************
-*************************************************************************************
-* Public macros
-*************************************************************************************
-************************************************************************************/
-
-/************************************************************************************
-*************************************************************************************
-* Public type definitions
-*************************************************************************************
-************************************************************************************/
-
-/************************************************************************************
-*************************************************************************************
-* Private memory declarations
-*************************************************************************************
-************************************************************************************/
-uint8_t mRegisteredPANs;
-bool_t mMpmExclusiveAccess;
-panInfo_t mPanInfo[gMpmMaxPANs_c];
-panInfo_t *pActivePANs[gMpmPhyPanRegSets_c];
-
-/************************************************************************************
-*************************************************************************************
-* Private functions prototypes
-*************************************************************************************
-************************************************************************************/
-static void MPM_SetPanSettingsInPhy( uint8_t panIndex );
-static uint8_t MPM_AllocateResource( bool_t force, uint8_t panIdx );
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-
-/*! *********************************************************************************
-* \brief This function determines the instance of the MAC associated with a PHY regSet
-*
-* \param[in] regSet The PHY registry set
-*
-* \return The instance of the MAC associated with a PHY registry set.
-*
-********************************************************************************** */
-uint32_t MPM_GetMacInstanceFromRegSet(uint32_t regSet)
-{
- if( pActivePANs[regSet] )
- return pActivePANs[regSet]->macInstance;
-
- return 0;
-}
-
-/*! *********************************************************************************
-* \brief This function determines the PHY regSet for the specified panIndex
-*
-* \param[in] panIdx The index in mPanInfo[] table
-*
-* \return The PHY registry set.
-*
-********************************************************************************** */
-uint32_t MPM_GetRegSet( uint8_t panIdx )
-{
- return mPanInfo[panIdx].phyRegSet;
-}
-
-/*! *********************************************************************************
-* \brief This function determines the PHY regSet for the specified panIndex
-*
-* \param[in] pibId The id of the PHY PIB
-* \param[in] pValue The value of the PHY PIB
-* \param[in] panIdx The index in mPanInfo[] table
-*
-* \return The status of the operation.
-*
-********************************************************************************** */
-phyStatus_t MPM_SetPIB(phyPibId_t pibId, void* pValue, uint8_t panIdx)
-{
- switch(pibId)
- {
-#if gMpmUseDifferentTxPwrLevel_c
- case gPhyPibTransmitPower_c:
- if( (*(uint8_t*)pValue < 3) || (*(uint8_t*)pValue > 31) )
- {
- return gPhyInvalidParameter_c;
- }
- mPanInfo[panIdx].pwrLevel = *(uint8_t*)pValue;
- break;
-#endif
-#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
- case gPhyPibCurrentChannel_c:
- if( (*(uint8_t*)pValue < 11) || (*(uint8_t*)pValue > 26) )
- {
- return gPhyInvalidParameter_c;
- }
- mPanInfo[panIdx].channel = *(uint8_t*)pValue;
- break;
- case gPhyPibLongAddress_c:
- mPanInfo[panIdx].longAddr = *(uint64_t*)pValue;
- break;
- case gPhyPibShortAddress_c:
- mPanInfo[panIdx].shortAddr = *(uint16_t*)pValue;
- break;
- case gPhyPibPanId_c:
- mPanInfo[panIdx].panId = *(uint16_t*)pValue;
- break;
- case gPhyPibPanCoordinator_c:
- if( *(bool_t*)pValue )
- mPanInfo[panIdx].flags |= gMpmFlagPanCoord_c;
- else
- mPanInfo[panIdx].flags &= ~gMpmFlagPanCoord_c;
- break;
-#endif
- case gPhyPibRxOnWhenIdle:
- if( *(bool_t*)pValue )
- mPanInfo[panIdx].flags |= gMpmFlagRxOnWhenIdle_c;
- else
- mPanInfo[panIdx].flags &= ~gMpmFlagRxOnWhenIdle_c;
- break;
- case gPhyPibPromiscuousMode_c:
- if( *(bool_t*)pValue )
- mPanInfo[panIdx].flags |= gMpmFlagPromiscuous_c;
- else
- mPanInfo[panIdx].flags &= ~gMpmFlagPromiscuous_c;
- break;
- default:
- return gPhyUnsupportedAttribute_c;
- }
-
- return gPhySuccess_c;
-}
-
-phyStatus_t MPM_GetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx)
-{
- switch(pibId)
- {
-#if gMpmUseDifferentTxPwrLevel_c
- case gPhyPibTransmitPower_c:
- *(uint8_t*)pValue = mPanInfo[panIdx].pwrLevel;
- break;
-#endif
-#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
- case gPhyPibCurrentChannel_c:
- *(uint8_t*)pValue = mPanInfo[panIdx].channel;
- break;
- case gPhyPibLongAddress_c:
- *(uint64_t*)pValue = mPanInfo[panIdx].longAddr;
- break;
- case gPhyPibShortAddress_c:
- *(uint16_t*)pValue = mPanInfo[panIdx].shortAddr;
- break;
- case gPhyPibPanId_c:
- *(uint16_t*)pValue = mPanInfo[panIdx].panId;
- break;
- case gPhyPibPanCoordinator_c:
- *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagPanCoord_c);
- break;
-#endif
- case gPhyPibRxOnWhenIdle:
- *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagRxOnWhenIdle_c);
- break;
- case gPhyPibPromiscuousMode_c:
- *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagPromiscuous_c);
- break;
- default:
- return gPhyUnsupportedAttribute_c;
- }
-
- return gPhySuccess_c;
-}
-
-
-/*! *********************************************************************************
-* \brief This function initializes the MPM module.
-*
-* \param[in] None.
-*
-* \return None
-*
-********************************************************************************** */
-void MPM_Init( void )
-{
- uint32_t i;
-
- mRegisteredPANs = 0;
- mMpmExclusiveAccess = FALSE;
- FLib_MemSet( mPanInfo, 0x00, sizeof(mPanInfo) );
- FLib_MemSet( pActivePANs, 0x00, sizeof(pActivePANs) );
-
- for(i=0; i<gMpmMaxPANs_c; i++)
- mPanInfo[i].phyRegSet = gMpmInvalidRegSet_c;
-
- PhyPpSetDualPanDwell( ((mDefaultDualPanDwellPrescaller_c << mDualPanDwellPrescallerShift_c) & mDualPanDwellPrescallerMask_c) |
- ((mDefaultDualPanDwellTime_c << mDualPanDwellTimeShift_c ) & mDualPanDwellTimeMask_c) );
-}
-
-/*! *********************************************************************************
-* \brief This function prepare the Radio for a TX/CCA/ED operation
-*
-* \param[in] macInstance The instance of the MAC
-*
-* \return The status of the Operation
-*
-********************************************************************************** */
-phyStatus_t MPM_PrepareForTx( instanceId_t macInstance )
-{
- uint8_t panIdx = MPM_GetPanIndex(macInstance);
-
- if( TRUE == mMpmExclusiveAccess && mPanInfo[panIdx].locked <= 0 )
- return gPhyChannelBusy_c;
-
- /* Allocate HW Resources if necessary */
- if( mPanInfo[panIdx].phyRegSet == gMpmInvalidRegSet_c )
- {
- if( gMpmInvalidRegSet_c == MPM_AllocateResource( TRUE, panIdx ) )
- return gPhyChannelBusy_c;
-
- MPM_SetPanSettingsInPhy( panIdx );
- }
-
- /* Disable DualPan Auto Mode, and select the Active PAN */
- PhyPpSetDualPanAuto( FALSE );
- PhyPpSetDualPanActiveNwk( mPanInfo[panIdx].phyRegSet );
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief This function checks if a PAN has the RxOnWhenIdle PIB set.
-* If an Rx needs to be started, it makes the propper settings in PHY.
-*
-* \param[in] None.
-*
-* \return phyStatus
-*
-********************************************************************************** */
-phyStatus_t MPM_PrepareForRx( instanceId_t macInstance )
-{
- uint32_t i, count = 0;
- uint32_t activePan;
-
- if( gInvalidInstanceId_c != macInstance ) //Rx
- {
- i = MPM_GetPanIndex(macInstance);
-
- if( !mMpmExclusiveAccess || mPanInfo[i].locked )
- {
- /* Allocate HW Resources if necessary */
- if( mPanInfo[i].phyRegSet == gMpmInvalidRegSet_c )
- {
- if( gMpmInvalidRegSet_c == MPM_AllocateResource( TRUE, i ) )
- return gPhyChannelBusy_c;
-
- MPM_SetPanSettingsInPhy( i );
- }
-
- count++;
- activePan = mPanInfo[i].phyRegSet;
- }
- }
- else //RxOnWhenIdle
- {
- for( i=0; i<gMpmPhyPanRegSets_c; i++)
- {
- if( (NULL != pActivePANs[i]) &&
- (pActivePANs[i]->flags & gMpmFlagRxOnWhenIdle_c) &&
- ( !mMpmExclusiveAccess || pActivePANs[i]->locked ) )
- {
- activePan = i;
- count++;
- }
- }
- }
-
- if( !count )
- return gPhyChannelBusy_c;
-
- /* Set the Active PAN and DualPan Auto mode if needed*/
- PhyPpSetDualPanActiveNwk( activePan );
- PhyPpSetDualPanAuto( count > 1 );
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief This function returns the PAN index for a MAC instance
-*
-* \param[in] macInstance The instance of the MAC
-*
-* \return The PAN index or -1 if it was not found
-*
-********************************************************************************** */
-int32_t MPM_GetPanIndex( instanceId_t macInstance )
-{
- uint32_t i;
-
- /* Get PAN Index for the macInstance */
- for( i=0; i<mRegisteredPANs; i++ )
- {
- if( mPanInfo[i].macInstance == macInstance )
- return i;
- }
-
- /* The instance of the MAC is not registered!
- * Register the current MAC instance if there is enough space.
- */
- if( mRegisteredPANs < gMpmMaxPANs_c )
- {
- mPanInfo[mRegisteredPANs].macInstance = macInstance;
-
- /* Try to allocate HW resource */
- mPanInfo[mRegisteredPANs].phyRegSet = MPM_AllocateResource( FALSE, i );
- mRegisteredPANs++;
- }
- else
- {
- i = -1;
- }
-
- return i;
-}
-
-
-/*! *********************************************************************************
-* \brief This function configures the MPM module
-*
-* \param[in] pCfg pointer to a configuration structure
-*
-* \remarks
-* The Dual PAN dwell time prescaller values: 0-3
-* The Dual PAN dwell time values 0-63.
-* The (dwellTime+1) represents multiples of the prescaller time base.
-*
-********************************************************************************** */
-void MPM_SetConfig( mpmConfig_t *pCfg )
-{
- PhyPpSetDualPanAuto ( FALSE );
- PhyPpSetDualPanDwell( pCfg->dwellTime );
- MPM_AllocateResource( TRUE, MPM_GetPanIndex(pCfg->activeMAC) );
- PhyPpSetDualPanAuto ( pCfg->autoMode );
- if( PhyIsIdleRx(0) )
- {
- PhyPlmeForceTrxOffRequest();
- Radio_Phy_TimeRxTimeoutIndication(0);
- }
-}
-
-/*! *********************************************************************************
-* \brief This function returns the MPM configuration
-*
-* \param[in] pCfg pointer to a configuration structure
-*
-* \return None.
-*
-********************************************************************************** */
-void MPM_GetConfig( mpmConfig_t *pCfg )
-{
- pCfg->dwellTime = PhyPpGetDualPanDwell();
- pCfg->activeMAC = MPM_GetMacInstanceFromRegSet( PhyPpGetDualPanActiveNwk() );
- pCfg->autoMode = PhyPpGetDualPanAuto();
-}
-#endif /* #if gMpmIncluded_d */
-
-/*! *********************************************************************************
-* \brief This function Acquires a PAN for exclusive access.
-*
-* \param[in] macInstance The instance of the MAC
-*
-* \return The status of the operation
-*
-********************************************************************************** */
-phyStatus_t MPM_AcquirePAN( instanceId_t macInstance )
-{
-#if gMpmIncluded_d
- int32_t panIndex = MPM_GetPanIndex(macInstance);
-
- /* Check if another PAN is acquired */
- if( TRUE == mMpmExclusiveAccess &&
- mPanInfo[panIndex].locked <= 0 )
- {
- return gPhyBusy_c;
- }
-
- if( mPanInfo[panIndex].locked == 0 )
- {
- mMpmExclusiveAccess = TRUE;
- if( PhyIsIdleRx(0) )
- {
- PhyPlmeForceTrxOffRequest();
- Radio_Phy_TimeRxTimeoutIndication(0);
- }
- }
-
- mPanInfo[panIndex].locked++;
-#endif
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief This function Releases a PAN that was Acquired
-*
-* \param[in] macInstance The instance of the MAC
-*
-* \return The status of the operation
-*
-********************************************************************************** */
-phyStatus_t MPM_ReleasePAN( instanceId_t macInstance )
-{
-#if gMpmIncluded_d
- uint8_t panIndex = MPM_GetPanIndex(macInstance);
-
- mPanInfo[panIndex].locked--;
- if( mPanInfo[panIndex].locked == 0 )
- {
- mMpmExclusiveAccess = FALSE;
- if( PhyIsIdleRx(0) )
- {
- PhyPlmeForceTrxOffRequest();
- Radio_Phy_TimeRxTimeoutIndication(0);
- }
- }
-#endif
- return gPhySuccess_c;
-}
-
-/************************************************************************************
-*************************************************************************************
-* Private functions
-*************************************************************************************
-************************************************************************************/
-#if gMpmIncluded_d
-/*! *********************************************************************************
-* \brief This function alocates a registry set to a PAN.
-*
-* \param[in] force If this parameter is TRUE, then another PAN can be preempted.
-* \param[in] panIdx The index into the MPM database
-*
-* \return The register set allocated for the specified PAN.
-*
-********************************************************************************** */
-static uint8_t MPM_AllocateResource( bool_t force, uint8_t panIdx )
-{
- uint32_t i, regSet = gMpmInvalidRegSet_c;
-
- if( mPanInfo[panIdx].phyRegSet != gMpmInvalidRegSet_c )
- return mPanInfo[panIdx].phyRegSet;
-
- for( i=0; i<gMpmPhyPanRegSets_c; i++ )
- {
- if( NULL == pActivePANs[i] )
- {
- regSet = i;
- break;
- }
- else if( (force) &&
- (pActivePANs[i]->flags == 0) &&
- (pActivePANs[i]->locked <= 0) )
- {
- regSet = i;
- }
- }
-
- if( regSet != gMpmInvalidRegSet_c )
- {
- if( NULL != pActivePANs[regSet] )
- {
- pActivePANs[regSet]->phyRegSet = gMpmInvalidRegSet_c;
- }
-
- pActivePANs[regSet] = &mPanInfo[panIdx];
- pActivePANs[regSet]->phyRegSet = regSet;
- }
-
- return regSet;
-}
-
-/*! *********************************************************************************
-* \brief This function will store PAN settings in PHY.
-*
-* \param[in] panIdx The index into the MPM database
-*
-* \return None.
-*
-* \remarks Function assumes that the PAN is active!
-*
-********************************************************************************** */
-static void MPM_SetPanSettingsInPhy( uint8_t panIndex )
-{
- panInfo_t *pPAN = &mPanInfo[panIndex];
-
-#if gMpmUseDifferentTxPwrLevel_c
- PhyPlmeSetPIBRequest(gPhyPibTransmitPower_c, pPAN->pwrLevel, pPAN->phyRegSet, 0 );
-#endif
-
-#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
- PhyPlmeSetPIBRequest(gPhyPibPromiscuousMode_c, !!(pPAN->flags & gMpmFlagPromiscuous_c), pPAN->phyRegSet, 0 );
- PhyPlmeSetPIBRequest(gPhyPibRxOnWhenIdle, !!(pPAN->flags & gMpmFlagRxOnWhenIdle_c), pPAN->phyRegSet, 0 );
- PhyPlmeSetPIBRequest(gPhyPibPanCoordinator_c, !!(pPAN->flags & gMpmFlagPanCoord_c), pPAN->phyRegSet, 0 );
- PhyPlmeSetPIBRequest(gPhyPibPanId_c, pPAN->panId, pPAN->phyRegSet, 0 );
- PhyPlmeSetPIBRequest(gPhyPibShortAddress_c, pPAN->shortAddr, pPAN->phyRegSet, 0 );
- PhyPlmeSetPIBRequest(gPhyPibLongAddress_c, pPAN->longAddr, pPAN->phyRegSet, 0 );
- PhyPlmeSetPIBRequest(gPhyPibCurrentChannel_c, pPAN->channel, pPAN->phyRegSet, 0 );
-#else
- (void)pPAN;
-#endif
-}
-#endif /* gMpmIncluded_d */
\ No newline at end of file
--- a/RF_Drivers_Freescale/MpmInterface.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,194 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file MpmInterface.h
-* This is a header file for the Multiple PAN Manager.
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#ifndef __MPM_H__
-#define __MPM_H__
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-
-#include "EmbeddedTypes.h"
-//#include "fsl_os_abstraction.h"
-#include "PhyInterface.h"
-
-/************************************************************************************
-*************************************************************************************
-* Public macros
-*************************************************************************************
-************************************************************************************/
-
-/* The maximun number of MAC instances that can be registered.
- * If set to 0, the MPM is disabled!
- */
-#if !defined(gMpmMaxPANs_c)
-#define gMpmMaxPANs_c 1
-#endif
-
-#define gMpmIncluded_d (gMpmMaxPANs_c > 1)
-
-#define gMpmPhyPanRegSets_c (2)
-#define gMpmUseDifferentTxPwrLevel_c (0)
-#define gMpmAcquireIsBlocking_d (0)
-#define gMpmInvalidRegSet_c (gMpmPhyPanRegSets_c)
-
-/* Dual Pan Dwell settings
- +-----------------+---------------------+
- | PRESCALER | RANGE |
- | bits [1:0] | bits [7:2] |
- +------+----------+---------------------+
- |value | timebase | min - max |
- +------+----------+---------------------+
- | 00 | 0.5 ms | 0.5 - 32 ms |
- | 01 | 2.5 ms | 2.5 - 160 ms |
- | 10 | 10 ms | 10 - 640 ms |
- | 11 | 50 ms | 50 - 3.2 seconds |
- +------+----------+---------------------+
-*/
-
- /* Dwell Time prescaller (0 to 3) */
- #define mDefaultDualPanDwellPrescaller_c (0x00) // 0,5 ms
- #define mDualPanDwellPrescallerMask_c (0x03)
- #define mDualPanDwellPrescallerShift_c (0)
-
- /* Dwell Time value (0 to 63) */
- #define mDefaultDualPanDwellTime_c (0x06)
- #define mDualPanDwellTimeMask_c (0xFC)
- #define mDualPanDwellTimeShift_c (2)
-
-
-#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
- #error The number of PANs exceeds the number of HW registry sets! This feature is not supported yet.
-#endif
-
-/* MPM flags */
-#define gMpmFlagPanCoord_c (1 << 0)
-#define gMpmFlagPromiscuous_c (1 << 1)
-#define gMpmFlagRxOnWhenIdle_c (1 << 2)
-
-/************************************************************************************
-*************************************************************************************
-* Public type definitions
-*************************************************************************************
-************************************************************************************/
-
-typedef PACKED_STRUCT mpmConfig_tag{
- bool_t autoMode;
- uint8_t dwellTime;
- uint8_t activeMAC;
-}mpmConfig_t;
-
-typedef union panFlags_tag{
- uint16_t all;
- struct{
- uint16_t panCoordinator: 1;
- uint16_t promiscuous: 1;
- uint16_t rxOnWhenIdle: 1;
- uint16_t reserved: 13;
- };
-}panFlags_t;
-
-typedef struct panInfo_tag{
- uint8_t flags;
- uint8_t macInstance;
- uint8_t phyRegSet;
- int8_t locked;
-#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
- uint64_t longAddr;
- uint16_t shortAddr;
- uint16_t panId;
- uint8_t channel;
-#endif
-#if gMpmUseDifferentTxPwrLevel_c
- uint8_t pwrLevel;
-#endif
-}panInfo_t;
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/************************************************************************************
-*************************************************************************************
-* Public memory declarations
-*************************************************************************************
-************************************************************************************/
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-#if gMpmIncluded_d
-
-void MPM_Init( void );
-void MPM_SetConfig( mpmConfig_t *pCfg );
-void MPM_GetConfig( mpmConfig_t *pCfg );
-
-int32_t MPM_GetPanIndex( instanceId_t macInstance );
-uint32_t MPM_GetRegSet(uint8_t panIdx);
-uint32_t MPM_GetMacInstanceFromRegSet(uint32_t regSet);
-#define MPM_isPanActive( panIdx ) (MPM_GetRegSet(panIdx) != gMpmInvalidRegSet_c)
-
-phyStatus_t MPM_PrepareForTx( instanceId_t macInstance );
-phyStatus_t MPM_PrepareForRx( instanceId_t macInstance );
-phyStatus_t MPM_GetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx);
-phyStatus_t MPM_SetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx);
-
-#else /* #if gMpmIncluded_d */
-
-#define MPM_Init()
-#define MPM_SetConfig( prescaller, dwellTime )
-
-#define MPM_GetPanIndex( macInstance ) 0
-#define MPM_GetRegSet( panIdx ) 0
-#define MPM_GetMacInstanceFromRegSet( regSet ) 0
-#define MPM_isPanActive( panIdx ) 1
-
-#define MPM_PrepareForTx( macInstance ) gPhySuccess_c
-#define MPM_PrepareForRx( macInstance ) gPhySuccess_c
-#define MPM_GetPIB( pibId, pibValue, panIdx ) gPhySuccess_c
-#define MPM_SetPIB( pibId, pibValue, panIdx ) gPhySuccess_c
-
-#endif /* #if gMpmIncluded_d */
-
-phyStatus_t MPM_AcquirePAN( instanceId_t macInstance );
-phyStatus_t MPM_ReleasePAN( instanceId_t macInstance );
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__MPM_H__ */
--- a/RF_Drivers_Freescale/Phy.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,1110 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file Phy.h
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#ifndef __PHY_H__
-#define __PHY_H__
-
-
-/*****************************************************************************
- * INCLUDED HEADERS *
- *---------------------------------------------------------------------------*
- * Add to this section all the headers that this module needs to include. *
- * Note that it is not a good practice to include header files into header *
- * files, so use this section only if there is no other better solution. *
- *---------------------------------------------------------------------------*
- *****************************************************************************/
-
-#include "EmbeddedTypes.h"
-#include "PhyInterface.h"
-//#include "fsl_os_abstraction.h"
-
-/*****************************************************************************
- * PUBLIC MACROS, DEFINITIONS *
- *---------------------------------------------------------------------------*
- * Add to this section all the access macros, registers mappings, bit access *
- * macros, masks, flags etc ...
- *---------------------------------------------------------------------------*
- *****************************************************************************/
-
- #ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifdef _DEBUG
-#ifdef gPHY_802_15_4g_d
-#define MAC_PHY_DEBUG
-#endif
-#endif
-
-#ifndef gSnifferCRCEnabled_d
-#define gSnifferCRCEnabled_d (0)
-#endif
-
-#ifndef gUseStandaloneCCABeforeTx_d
-#define gUseStandaloneCCABeforeTx_d (1)
-#endif
-
-#ifndef gUsePBTransferThereshold_d
-#define gUsePBTransferThereshold_d (0)
-#endif
-
-#ifndef gPhyRxRetryInterval_c
-#define gPhyRxRetryInterval_c (100) /* [symbols] */
-#endif
-
-// PHY states
-enum {
- gIdle_c,
- gRX_c,
- gTX_c,
- gCCA_c,
- gTR_c,
- gCCCA_c,
-#ifdef gPHY_802_15_4g_d
- gED_c
-#endif // gPHY_802_15_4g_d
-};
-
-// PHY channel state
-enum {
- gChannelIdle_c,
- gChannelBusy_c
-};
-
-// PANCORDNTR bit in PP
-enum {
- gMacRole_DeviceOrCoord_c,
- gMacRole_PanCoord_c
-};
-
-// Cca types
-enum {
- gCcaED_c, // energy detect - CCA bit not active, not to be used for T and CCCA sequences
- gCcaCCA_MODE1_c, // energy detect - CCA bit ACTIVE
- gCcaCCA_MODE2_c, // 802.15.4 compliant signal detect - CCA bit ACTIVE
- gCcaCCA_MODE3_c, //
- gInvalidCcaType_c // illegal type
-};
-
-enum {
- gNormalCca_c,
- gContinuousCca_c
-};
-
-
-/*****************************************************************************
-* Public type definitions *
-*****************************************************************************/
-typedef struct Phy_PhyLocalStruct_tag
-{
- PD_MAC_SapHandler_t PD_MAC_SapHandler;
- PLME_MAC_SapHandler_t PLME_MAC_SapHandler;
-// event_t phyTaskEventId;
-// msgQueue_t macPhyInputQueue;
- phyMessageHeader_t * pMsgIn;
- uint32_t maxFrameWaitTime;
- volatile phyTxParams_t txParams;
- union{
- volatile phyRxParams_t rxParams;
- volatile phyChannelParams_t channelParams;
- };
-#ifdef gPHY_802_15_4g_d
- volatile phyFlags_t flags;
- phyTime_t startTime;
- uint16_t phyUnavailableQueuePos;
- uint16_t phyIndirectQueue[gPhyIndirectQueueSize_c];
- uint16_t fcs;
- uint8_t macPanID[2];
- uint8_t macShortAddress[2];
- uint8_t macLongAddress[8];
-#else
- volatile uint8_t flags;
-#endif // gPHY_802_15_4g_d
- uint8_t currentMacInstance;
-}Phy_PhyLocalStruct_t;
-
-
-/*****************************************************************************
-* Public macros *
-*****************************************************************************/
-
-#define PhyGetSeqState() PhyPpGetState()
-#define PhyPlmeForceTrxOffRequest() PhyAbort()
-
-
-/*****************************************************************************
-* Public prototypes *
-*****************************************************************************/
-
-// PHY Packet Processor
-
-/*---------------------------------------------------------------------------
- * Name: PhyHwInit
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyHwInit
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetPromiscuous
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetPromiscuous
-(
- bool_t mode
-);
-
-/*---------------------------------------------------------------------------
-* Name: PhySetActivePromState()
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void PhySetActivePromiscuous
-(
-bool_t state
-);
-
-/*---------------------------------------------------------------------------
-* Name: PhyGetActivePromiscuous()
-* Description: -
-* Parameters: -
-* Return: - TRUE/FALSE
-*---------------------------------------------------------------------------*/
-bool_t PhyGetActivePromiscuous
-(
-void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetPanId
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetPanId
-(
- uint8_t *pPanId,
- uint8_t pan
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetShortAddr
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetShortAddr
-(
- uint8_t *pShortAddr,
- uint8_t pan
-);
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetLongAddr
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetLongAddr
-(
- uint8_t *pLongAddr,
- uint8_t pan
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetMacRole
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetMacRole
-(
- bool_t macRole,
- uint8_t pan
-);
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpIsTxAckDataPending
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-bool_t PhyPpIsTxAckDataPending
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpIsRxAckDataPending
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-bool_t PhyPpIsRxAckDataPending
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetFpManually
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetFpManually
-(
- bool_t FP
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpIsPollIndication
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-bool_t PhyPpIsPollIndication
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetSAMState
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetSAMState
-(
- bool_t state
-);
-
-/*---------------------------------------------------------------------------
- * Name: Phy_IndirectQueueChecksum
- * Description: Function called to compute the checksum for a 16bit or 64bit address
- * in the same way as the transceiver
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-#ifdef gPHY_802_15_4g_d
-uint16_t Phy_IndirectQueueChecksum
-(
- bool_t addrType,
- uint64_t address,
- uint16_t panId
-);
-#endif // gPHY_802_15_4g_d
-
-/*---------------------------------------------------------------------------
- * Name: PhyPp_IndirectQueueInsert
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPp_IndirectQueueInsert
-(
- uint8_t index,
- uint16_t checkSum,
- instanceId_t instanceId
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPp_RemoveFromIndirect
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPp_RemoveFromIndirect
-(
- uint8_t index,
- instanceId_t instanceId
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpGetState
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPpGetState
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhySetState
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-#ifdef gPHY_802_15_4g_d
-void PhySetState
-(
- uint8_t phyState
-);
-#endif //gPHY_802_15_4g_d
-
-/*---------------------------------------------------------------------------
- * Name: PhyAbort
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyAbort
-(
- void
-);
-
-// PHY PLME & DATA primitives
-
-/*---------------------------------------------------------------------------
- * Name: PhyPdDataRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPdDataRequest
-(
- pdDataReq_t *pTxPacket,
- volatile phyRxParams_t *pRxParams,
- volatile phyTxParams_t *pTxParams
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeRxRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPlmeRxRequest
-(
- phySlottedMode_t phyRxMode,
- phyRxParams_t * pRxParams
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeCcaEdRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPlmeCcaEdRequest
-(
- phyCCAType_t ccaParam,
- phyContCCAMode_t cccaMode
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeSetCurrentChannelRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPlmeSetCurrentChannelRequest
-(
- uint8_t channel,
- uint8_t pan
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeGetCurrentChannelRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPlmeGetCurrentChannelRequest
-(
- uint8_t pan
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeSetPwrLevelRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPlmeSetPwrLevelRequest
-(
- uint8_t pwrStep
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeGetPwrLevelRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPlmeGetPwrLevelRequest
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeSetPwrState
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPlmeSetPwrState
-(
- uint8_t state
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeSetPIBRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPlmeSetPIBRequest
-(
- phyPibId_t pibId,
- uint64_t pibValue,
- uint8_t phyRegistrySet,
- instanceId_t instanceId
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeGetPIBRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPlmeGetPIBRequest
-(
- phyPibId_t pibId,
- uint64_t * pibValue,
- uint8_t phyRegistrySet,
- instanceId_t instanceId
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetCcaThreshold
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-
-phyStatus_t PhyPpSetCcaThreshold
-(
- uint8_t ccaThreshold
-);
-
-// PHY Time
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeSetEventTrigger
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeSetEventTrigger
-(
- phyTime_t startTime
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeSetEventTimeout
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeSetEventTimeout
-(
- phyTime_t *pEndTime
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeGetEventTimeout
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint32_t PhyTimeGetEventTimeout( void );
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeReadClock
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeReadClock
-(
- phyTime_t *pRetClk
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeDisableEventTimeout
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeDisableEventTimeout
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeDisableEventTrigger
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeDisableEventTrigger
-(
- void
-);
-
-
-#ifdef gPHY_802_15_4g_d
-/*---------------------------------------------------------------------------
- * Name: PhyTimeDisableRxTimeout
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeDisableRxTimeout
-(
- void
-);
-#endif // gPHY_802_15_4g_d
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeSetWakeUpTime
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeSetWakeUpTime
-(
- uint32_t *pWakeUpTime
-);
-/*---------------------------------------------------------------------------
- * Name: PhyTimeInitEventTimer
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeInitEventTimer
-(
- uint32_t *pAbsTime
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeIsWakeUpTimeExpired
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-bool_t PhyTimeIsWakeUpTimeExpired
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeSetWaitTimeout
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeSetWaitTimeout
-(
- phyTime_t *pWaitTimeout
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyTimeDisableWaitTimeout
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyTimeDisableWaitTimeout
-(
- void
-);
-
-// PHY ISR
-
-/*---------------------------------------------------------------------------
- * Name: PHY_InstallIsr
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PHY_InstallIsr
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PHY_InterruptHandler
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PHY_InterruptHandler
-(
- void
-);
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyIsrPassRxParams()
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyIsrPassRxParams
-(
- volatile phyRxParams_t * pRxParam
-);
-
-#ifdef gPHY_802_15_4g_d
-/*---------------------------------------------------------------------------
- * Name: PhyIsrPassRxParams()
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPassTxParams
-(
- pdDataReq_t *pTxParam
-);
-#endif // gPHY_802_15_4g_d
-
-/*---------------------------------------------------------------------------
- * Name: PhyIsrPassTaskParams()
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyIsrPassTaskParams
-(
- instanceId_t instanceId
-);
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyIsrTimeoutCleanup
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyIsrTimeoutCleanup
-(
- void
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyIsrSeqCleanup
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyIsrSeqCleanup
-(
- void
-);
-
-/*****************************************************************************
-* PhyGetRandomNo function
-*
-* Interface assumptions:
-*
-* Return Value:
-* None
-*****************************************************************************/
-void PhyGetRandomNo
-(
- uint32_t *pRandomNo
-);
-
-/*****************************************************************************
-* PhyPpSetDualPanAuto function
-*
-* Interface assumptions:
-*
-* Return Value:
-* None
-*****************************************************************************/
-void PhyPpSetDualPanAuto
-(
- bool_t mode
-);
-
-/*****************************************************************************
-* PhyPpGetDualPanAuto function
-*
-* Interface assumptions:
-*
-* Return Value:
-* None
-*****************************************************************************/
-bool_t PhyPpGetDualPanAuto
-(
- void
-);
-
-/*****************************************************************************
-* PhyPpSetDualPanDwell function
-*
-* Interface assumptions:
-*
-* Return Value:
-* None
-*****************************************************************************/
-void PhyPpSetDualPanDwell
-(
- uint8_t
-);
-
-/*****************************************************************************
-* PhyPpGetDualPanDwell function
-*
-* Interface assumptions:
-*
-* Return Value:
-* None
-*****************************************************************************/
-uint8_t PhyPpGetDualPanDwell
-(
- void
-);
-
-/*****************************************************************************
-* PhyPpGetDualPanRemain function
-*
-* Interface assumptions:
-*
-* Return Value:
-* The remaining time until a channel switch will occure
-*****************************************************************************/
-uint8_t PhyPpGetDualPanRemain
-(
- void
-);
-
-/*****************************************************************************
-* PhyPpSetDualPanSamLvl function
-*
-* Interface assumptions:
-*
-* Return Value:
-* None
-*****************************************************************************/
-void PhyPpSetDualPanSamLvl
-(
- uint8_t
-);
-
-/*****************************************************************************
-* PhyPpGetDualPanSamLvl function
-*
-* Interface assumptions:
-*
-* Return Value:
-* The level at which the HW queue is split for the two PANs
-*****************************************************************************/
-uint8_t PhyPpGetDualPanSamLvl
-(
- void
-);
-
-/*****************************************************************************
-* PhyPpSetDualPanSamLvl function
-*
-* Interface assumptions:
-*
-* Return Value:
-* None
-*****************************************************************************/
-void PhyPpSetDualPanActiveNwk
-(
- uint8_t
-);
-
-/*****************************************************************************
-* PhyPpGetDualPanActiveNwk function
-*
-* Interface assumptions:
-*
-* Return Value:
-* The current NWK on which the PHY is operating
-*****************************************************************************/
-uint8_t PhyPpGetDualPanActiveNwk
-(
- void
-);
-
-/*****************************************************************************
-* PhyPpGetPanOfRxPacket function
-*
-* Interface assumptions:
-*
-* Return Value:
-* The PAN on which the packet was received (can be receiced on both PANs)
-*****************************************************************************/
-uint8_t PhyPpGetPanOfRxPacket
-(
- void
-);
-
-#ifdef gPHY_802_15_4g_d
-/*---------------------------------------------------------------------------
- * Name: PhyPpPassTaskParams()
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpPassTaskParams
-(
- instanceId_t instanceId
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetCSLRxEnabled()
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetCSLRxEnabled
-(
- bool_t cslRx,
- instanceId_t instanceId
-);
-
-/*---------------------------------------------------------------------------
- * Name: PhyPib_SetCSLTxEnabled()
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetCSLTxEnabled
-(
- bool_t cslTx,
- instanceId_t instanceId
-);
-#endif // gPHY_802_15_4g_d
-
-/*****************************************************************************
-* PhyGetLastRxLqiValue function
-*
-* Interface assumptions:
-*
-* Return Value:
-* The LQI value for the last received packet
-*****************************************************************************/
-uint8_t PhyGetLastRxLqiValue(void);
-
-/*****************************************************************************
-* PhyGetLastRxRssiValue function
-*
-* Interface assumptions:
-*
-* Return Value:
-* The RSSI value for the last received packet
-*****************************************************************************/
-uint8_t PhyGetLastRxRssiValue(void);
-
-/*****************************************************************************
-* PhyPlmeSetFADStateRequest function
-*
-* Interface assumptions: state
-*
-* Return Value: gPhySuccess
-*
-* Description: Enable the FAD function (FAD_EN bit)
-*****************************************************************************/
-uint8_t PhyPlmeSetFADStateRequest(bool_t state);
-
-/*****************************************************************************
-* PhyPlmeSetFADThresholdRequest function
-*
-* Interface assumptions: FADThreshold
-*
-* Return Value: gPhySuccess
-*
-* Description: Correlator threshold at which the FAD will select the antenna
-*****************************************************************************/
-uint8_t PhyPlmeSetFADThresholdRequest(uint8_t FADThreshold);
-
-uint8_t PhyPlmeSetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on);
-uint8_t PhyPlmeSetANTPadStrengthRequest(bool_t hiStrength);
-uint8_t PhyPlmeSetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx);
-
-/*****************************************************************************
-* PhyPlmeSetANTXStateRequest function
-*
-* Interface assumptions: state
-*
-* Return Value: gPhySuccess
-*
-* Description: ANTX_IN - FAD Antenna start when FAD_EN = 1 or antenna selected
-* when FAD_EN=0
-*****************************************************************************/
-uint8_t PhyPlmeSetANTXStateRequest(bool_t state);
-
-/*****************************************************************************
-* PhyPlmeGetANTXStateRequest function
-*
-* Interface assumptions: none
-*
-* Return Value: Chosen antenna by the FAD (FAD_EN = 1) or copy of ANTX_IN
-*
-* Description: Antenna selected in FAD of non-FAD mode
-*****************************************************************************/
-uint8_t PhyPlmeGetANTXStateRequest(void);
-
-/*****************************************************************************
-* PhyPlmeSetLQIModeRequest function
-*
-* Interface assumptions: none
-*
-* Return Value: gPhySuccess
-*
-* Description: Choose LQI Mode: 1 - LQI Based on RSSI,
-* 0 - LQI Based on Correlation Peaks
-*****************************************************************************/
-uint8_t PhyPlmeSetLQIModeRequest(uint8_t lqiMode);
-
-/*****************************************************************************
-* PhyPlmeGetRSSILevelRequest function
-*
-* Interface assumptions: none
-*
-* Return Value: RSSI level
-*
-* Description: Returns the RSSI level value, refreshed every 125us
-*****************************************************************************/
-uint8_t PhyPlmeGetRSSILevelRequest(void);
-
-#ifdef gPHY_802_15_4g_d
-/*****************************************************************************
-* PhyPlmeDataPassTaskParams function
-*
-* Interface assumptions: none
-*
-* Return Value:
-*
-* Description:
-*****************************************************************************/
-void PhyPlmeDataPassTaskParams(instanceId_t instanceId);
-#endif // gPHY_802_15_4g_d
-
-/*****************************************************************************
-* PhySetRxOnWhenIdle function
-*
-* Interface assumptions: none
-*
-* Return Value: None.
-*
-* Description: Informs the PHY if it should start an RX when entering IDLE or not
-*****************************************************************************/
-void PhyPlmeSetRxOnWhenIdle( bool_t state, instanceId_t instanceId );
-
-/*****************************************************************************
-* PhyPlmeSetFrameWaitTime function
-*
-* Interface assumptions: none
-*
-* Return Value: None.
-*
-* Description: Set the amount of time in symbols to wait for an data frame
-* after receiving an ACK with FP=1
-*****************************************************************************/
-void PhyPlmeSetFrameWaitTime( uint32_t time, instanceId_t instanceId );
-
-/*****************************************************************************
-* Phy_SetSequenceTiming function
-*
-* Interface assumptions: none
-*
-* Return Value: None.
-*
-* Description:
-*
-*****************************************************************************/
-#ifndef gPHY_802_15_4g_d
-void Phy_SetSequenceTiming(phyTime_t startTime, uint32_t seqDuration);
-#else
-void Phy_SetSequenceTiming(phyTime_t startTime, uint32_t seqDuration, uint8_t nextState, instanceId_t instanceId);
-void Phy_SetRxTiming(uint32_t seqDuration, uint8_t nextState, instanceId_t instanceId);
-#endif // gPHY_802_15_4g_d
-
-uint8_t Phy_GetEnergyLevel(uint8_t energyLeveldB);
-
-// RADIO EVENTS
-
-void Radio_Phy_PdDataConfirm(instanceId_t instanceId, bool_t framePending);
-
-void Radio_Phy_TimeWaitTimeoutIndication(instanceId_t instanceId);
-
-void Radio_Phy_TimeRxTimeoutIndication(instanceId_t instanceId);
-
-void Radio_Phy_PdDataIndication(instanceId_t instanceId);
-
-void Radio_Phy_TimeStartEventIndication(instanceId_t instanceId);
-
-void Radio_Phy_PlmeCcaConfirm(phyStatus_t phyChannelStatus, instanceId_t instanceId);
-
-void Radio_Phy_PlmeEdConfirm(uint8_t energyLeveldB, instanceId_t instanceId);
-
-void Radio_Phy_PlmeSyncLossIndication(instanceId_t instanceId);
-
-void Radio_Phy_PlmeRxSfdDetect(instanceId_t instanceId, uint32_t param);
-
-void Radio_Phy_PlmeFilterFailRx(instanceId_t instanceId);
-
-#ifdef gPHY_802_15_4g_d
-void Radio_Phy_WaitTurnaround(instanceId_t instanceId);
-void Radio_Phy_WaitTurnaroundComplete(instanceId_t instanceId);
-#endif
-
-void Radio_Phy_UnexpectedTransceiverReset(instanceId_t instanceId);
-
-void Radio_Phy_DummyEvent(instanceId_t instanceId);
-
-bool_t PhyIsIdleRx( instanceId_t instanceId );
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __PHY_H__ */
--- a/RF_Drivers_Freescale/PhyConfig.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,64 +0,0 @@ -/*! -* Copyright (c) 2015, Freescale Semiconductor, Inc. -* All rights reserved. -* -* \file PhyConfig.h -* -* Redistribution and use in source and binary forms, with or without modification, -* are permitted provided that the following conditions are met: -* -* o Redistributions of source code must retain the above copyright notice, this list -* of conditions and the following disclaimer. -* -* o Redistributions in binary form must reproduce the above copyright notice, this -* list of conditions and the following disclaimer in the documentation and/or -* other materials provided with the distribution. -* -* o Neither the name of Freescale Semiconductor, Inc. nor the names of its -* contributors may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef _PHY_CONFIG_H_ -#define _PHY_CONFIG_H_ - -#ifndef gAspCapability_d -#define gAspCapability_d 1 -#endif - -#ifndef gMaxPhyTimers_c -#define gMaxPhyTimers_c 10 -#endif - -#ifndef gMpmMaxPANs_c -#define gMpmMaxPANs_c 1 -#endif - -#ifndef gPhyInstancesCnt_c -#define gPhyInstancesCnt_c 1 -#endif - -#ifndef gPhyTaskStackSize_c -#define gPhyTaskStackSize_c 600 -#endif - -#ifndef gPhyTaskPriority_c -#define gPhyTaskPriority_c OSA_PRIORITY_REAL_TIME -#endif - -#ifndef gAfcEnabled_d -#define gAfcEnabled_d 0 -#endif - -#endif //_PHY_CONFIG_H_
--- a/RF_Drivers_Freescale/PhyDebug.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,137 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file PhyDebug.c
-* MCR20: PHY debug and logging functions
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-
-/************************************************************************************
-*************************************************************************************
-* Includes
-*************************************************************************************
-************************************************************************************/
-
-#include "EmbeddedTypes.h"
-//#include "PortConfig.h"
-#include "MCR20Drv.h"
-#include "MCR20Reg.h"
-#include "Phy.h"
-#include "PhyDebug.h"
-
-
-#ifdef MAC_PHY_DEBUG
-
-
-/************************************************************************************
-*************************************************************************************
-* Private memory declarations
-*************************************************************************************
-************************************************************************************/
-
-uint16_t nDebugIndex = 0, nDebugSize = DEBUG_LOG_ENTRIES * 4;
-uint8_t nDebugStorage[DEBUG_LOG_ENTRIES * 4];
-
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-
-void PhyDebugLogTime(uint8_t item)
-{
- uint32_t time;
- nDebugStorage[nDebugIndex + 0] = item;
- MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) EVENT_TMR_LSB, (uint8_t *) &time, 3);
-
- nDebugStorage[nDebugIndex + 3] = (uint8_t) (time >> 0);
- nDebugStorage[nDebugIndex + 2] = (uint8_t) (time >> 8);
- nDebugStorage[nDebugIndex + 1] = (uint8_t) (time >> 16);
-
- nDebugIndex += 4;
- if(nDebugIndex >= nDebugSize)
- {
- nDebugIndex = 0;
- }
-}
-
-/***********************************************************************************/
-
-void PhyDebugLogParam1(uint8_t item, uint8_t param1)
-{
- nDebugStorage[nDebugIndex + 0] = item;
- nDebugStorage[nDebugIndex + 1] = param1;
- nDebugStorage[nDebugIndex + 2] = 0;
- nDebugStorage[nDebugIndex + 3] = 0;
-
- nDebugIndex += 4;
- if(nDebugIndex >= nDebugSize)
- {
- nDebugIndex = 0;
- }
-}
-
-/***********************************************************************************/
-
-void PhyDebugLogParam2(uint8_t item, uint8_t param1, uint8_t param2)
-{
- nDebugStorage[nDebugIndex + 0] = item;
- nDebugStorage[nDebugIndex + 1] = param1;
- nDebugStorage[nDebugIndex + 2] = param2;
- nDebugStorage[nDebugIndex + 3] = 0;
-
- nDebugIndex += 4;
- if(nDebugIndex >= nDebugSize)
- {
- nDebugIndex = 0;
- }
-}
-
-/***********************************************************************************/
-
-void PhyDebugLogParam3(uint8_t item, uint8_t param1, uint8_t param2, uint8_t param3)
-{
- nDebugStorage[nDebugIndex + 0] = item;
- nDebugStorage[nDebugIndex + 1] = param1;
- nDebugStorage[nDebugIndex + 2] = param2;
- nDebugStorage[nDebugIndex + 3] = param3;
-
- nDebugIndex += 4;
- if(nDebugIndex >= nDebugSize)
- {
- nDebugIndex = 0;
- }
-}
-
-/***********************************************************************************/
-
-#endif /* MAC_PHY_DEBUG */
-
-
--- a/RF_Drivers_Freescale/PhyDebug.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,145 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file PhyDebug.h
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#ifndef _PHY_DEBUG_H_
-#define _PHY_DEBUG_H_
-
-
-/************************************************************************************
-*************************************************************************************
-* Includes
-*************************************************************************************
-************************************************************************************/
-//#include "MacPhyDebug.h"
-
-
-// a value of zero disables the logging of that event
-#define PDBG_SET_EVENT_TRIGGER 0x01 // 2 parameters
-#define PDBG_SET_EVENT_TIMEOUT 0x02 // 3 parameters
-#define PDBG_DISABLE_EVENT_TIMEOUT 0x03
-#define PDBG_READ_CLOCK 0x04
-#define PDBG_INIT_EVENT_TIMER 0
-
-#define PDBG_WTRMRK_VECT_INTERRUPT 0x06
-#define PDBG_TIMERS_VECT_INTERRUPT 0x07
-#define PDBG_TX_VECT_INTERRUPT 0x08
-#define PDBG_RX_VECT_INTERRUPT 0x09
-
-#define PDBG_CCA_CONFIRM_IDLE 0x0A
-#define PDBG_CCA_CONFIRM_BUSY 0x0B
-#define PDBG_DATA_CONFIRM 0x0C
-#define PDBG_DATA_INDICATION 0x0D
-#define PDBG_ED_CONFIRM 0x0E
-#define PDBG_SYNC_LOSS_INDICATION 0x0F
-
-#define PDBG_UNLOCK_IRQ 0x10
-#define PDBG_WTRMARK_IRQ 0x11
-#define PDBG_START_INDICATION 0x12
-#define PDBG_TIMEOUT_INDICATION 0x13
-#define PDBG_TMR1_IRQ 0x14
-#define PDBG_TMR4_IRQ 0x15
-#define PDBG_FILTER_FAIL_IRQ 0x16
-#define PDBG_TX_IRQ 0x17
-#define PDBG_RX_IRQ 0x18 // 1 parameter
-#define PDBG_CCA_IRQ 0x19
-#define PDBG_SEQ_IRQ 0x1A // 1 parameter
-
-#define PDBG_PHY_INIT 0x20
-#define PDBG_PHY_ABORT 0x21
-#define PDBG_PP_SET_PROMISC 0
-#define PDBG_PP_SET_PANID_PAN0 0x23
-#define PDBG_PP_SET_SHORTADDR_PAN0 0x24
-#define PDBG_PP_SET_LONGADDR_PAN0 0x25
-#define PDBG_PP_SET_MACROLE_PAN0 0x26
-#define PDBG_PP_ADD_INDIRECT 0x27 // 1 parameter
-#define PDBG_PP_REMOVE_INDIRECT 0x28 // 1 parameter
-#define PDBG_PP_READ_LATEST_INDEX 0x29 // 1 parameter
-
-#define PDBG_DATA_REQUEST 0x30
-#define PDBG_PLME_RX_REQUEST 0x31
-#define PDBG_PLME_CCA_ED_REQUEST 0x32
-#define PDBG_PLME_SET_CHAN_REQUEST 0x33
-#define PDBG_PLME_SET_POWER_REQUEST 0x34
-#define PDBG_PLME_WAIT_REQUEST 0x35
-
-#define PDBG_PP_SET_PANID_PAN1 0x36
-#define PDBG_PP_SET_SHORTADDR_PAN1 0x37
-#define PDBG_PP_SET_LONGADDR_PAN1 0x38
-#define PDBG_PP_SET_MACROLE_PAN1 0x39
-
-//simple events - without timestamp
-//***** PDBG_MAC_FUNCTION_CALL PDBG_SIMPLE_EVENT // 3 parameters
-#define PDBG_READ_FSM PDBG_SIMPLE_EVENT + 0x01 // 1 parameter
-#define PDBG_FILTER_FAIL_CODE PDBG_SIMPLE_EVENT + 0x02 // 2 parameters
-
-
-#ifdef MAC_PHY_DEBUG
-
-#define DEBUG_LOG_ENTRIES 768
-
-#define PHY_DEBUG_LOG(item) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(item);}
-#define PHY_DEBUG_LOG1(item,param) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(PDBG_EXTENDED_EVENT | item);PhyDebugLogParam1(item,param);}
-#define PHY_DEBUG_LOG2(item,param1,param2) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(PDBG_EXTENDED_EVENT | item);PhyDebugLogParam2(item,param1,param2);}
-#define PHY_DEBUG_LOG3(item,param1,param2,param3) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(PDBG_EXTENDED_EVENT | item);PhyDebugLogParam3(item,param1,param2,param3);}
-
-#define PHY_DEBUG_LOG_SIMPLE1(item,param) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogParam1(item,param);}
-#define PHY_DEBUG_LOG_SIMPLE2(item,param1,param2) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogParam2(item,param1,param2);}
-#define PHY_DEBUG_LOG_SIMPLE3(item,param1,param2,param3) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogParam3(item,param1,param2,param3);}
-
-void PhyUnexpectedTransceiverReset(void);
-
-void PhyDebugLogTime(uint8_t item);
-void PhyDebugLogParam1(uint8_t item, uint8_t param1);
-void PhyDebugLogParam2(uint8_t item, uint8_t param1, uint8_t param2);
-void PhyDebugLogParam3(uint8_t item, uint8_t param1, uint8_t param2, uint8_t param3);
-
-
-#else /* not def MAC_PHY_DEBUG */
-
-#define PhyUnexpectedTransceiverReset()
-
-#define PHY_DEBUG_LOG(item)
-#define PHY_DEBUG_LOG1(item,param)
-#define PHY_DEBUG_LOG2(item,param1,param2)
-#define PHY_DEBUG_LOG3(item,param1,param2,param3)
-
-#define PHY_DEBUG_LOG_SIMPLE1(item,param)
-#define PHY_DEBUG_LOG_SIMPLE2(item,param1,param2)
-#define PHY_DEBUG_LOG_SIMPLE3(item,param1,param2,param3)
-
-#endif /* MAC_PHY_DEBUG */
-
-
-#endif /* _PHY_DEBUG_H_ */
-
-
-
--- a/RF_Drivers_Freescale/PhyISR.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,565 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file PhyISR.c
-* PHY ISR Functions
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-#include "EmbeddedTypes.h"
-//#include "board.h"
-#include "MCR20Drv.h"
-#include "MCR20Reg.h"
-#include "Phy.h"
-#include "PhyInterface.h"
-//#include "Gpio_IrqAdapter.h"
-
-//#include "fsl_os_abstraction.h"
-
-#include "XcvrSpi.h"
-
-/************************************************************************************
-*************************************************************************************
-* Private macros
-*************************************************************************************
-************************************************************************************/
-#if defined(MCU_MKL46Z4)
- #define MCR20_Irq_Priority (0xC0)
-#else
- #define MCR20_Irq_Priority (0x80)
-#endif
-
-#define PHY_IRQSTS1_INDEX_c 0x00
-#define PHY_IRQSTS2_INDEX_c 0x01
-#define PHY_IRQSTS3_INDEX_c 0x02
-#define PHY_CTRL1_INDEX_c 0x03
-#define PHY_CTRL2_INDEX_c 0x04
-#define PHY_CTRL3_INDEX_c 0x05
-#define PHY_RX_FRM_LEN_INDEX_c 0x06
-#define PHY_CTRL4_INDEX_c 0x07
-
-/************************************************************************************
-*************************************************************************************
-* Private memory declarations
-*************************************************************************************
-************************************************************************************/
-extern Phy_PhyLocalStruct_t phyLocal[];
-static volatile phyRxParams_t * mpRxParams = NULL;
-static uint32_t mPhyTaskInstance;
-uint8_t mStatusAndControlRegs[8];
-uint8_t mPhyLastRxLQI = 0;
-uint8_t mPhyLastRxRSSI = 0;
-
-void (*gpfPhyPreprocessData)(uint8_t *pData) = NULL;
-
-#if gUsePBTransferThereshold_d
-static uint8_t mPhyWatermarkLevel;
-#define mPhyGetPBTransferThreshold(len) ((len) - 2)
-//#define mPhyGetPBTransferThreshold(len) ((len)*93/100)
-//#define mPhyGetPBTransferThreshold(len) (((len) < 20) ? ((len) - 2) : ((len) * 93 / 100))
-#endif
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-
-/*! *********************************************************************************
-* \brief Sets the current PHY instance waiting for an IRQ
-*
-* \param[in] instanceId instance of the PHY
-*
-********************************************************************************** */
-void PhyIsrPassTaskParams
-(
- instanceId_t instanceId
-)
-{
- mPhyTaskInstance = instanceId;
-}
-
-/*! *********************************************************************************
-* \brief Sets the location of the Rx parameters
-*
-* \param[in] pRxParam pointer to Rx parameters
-*
-********************************************************************************** */
-void PhyIsrPassRxParams
-(
- volatile phyRxParams_t * pRxParam
-)
-{
- mpRxParams = pRxParam;
-}
-
-/*! *********************************************************************************
-* \brief Clear and mask PHY IRQ, set sequence to Idle
-*
-********************************************************************************** */
-void PhyIsrSeqCleanup
-(
- void
-)
-{
- mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= 0xF0;
- mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= (uint8_t) ~( cIRQSTS3_TMR3MSK ); // unmask TMR3 interrupt
- mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_XCVSEQ );
- mStatusAndControlRegs[PHY_CTRL2_INDEX_c] |= (uint8_t) ( cPHY_CTRL2_CCAMSK | \
- cPHY_CTRL2_RXMSK | \
- cPHY_CTRL2_TXMSK | \
- cPHY_CTRL2_SEQMSK );
-
- // clear transceiver interrupts, mask SEQ, RX, TX and CCA interrupts and set the PHY sequencer back to IDLE
- MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 5);
-}
-
-/*! *********************************************************************************
-* \brief Clear and mask PHY IRQ, disable timeout, set sequence to Idle
-*
-********************************************************************************** */
-void PhyIsrTimeoutCleanup
-(
- void
-)
-{
- mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= 0xF0;
- mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] |= (uint8_t) ( cIRQSTS3_TMR3MSK | \
- cIRQSTS3_TMR3IRQ); // mask and clear TMR3 interrupt
- mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_XCVSEQ );
- mStatusAndControlRegs[PHY_CTRL2_INDEX_c] |= (uint8_t) ( cPHY_CTRL2_CCAMSK | \
- cPHY_CTRL2_RXMSK | \
- cPHY_CTRL2_TXMSK | \
- cPHY_CTRL2_SEQMSK );
-
- // disable TMR3 comparator and timeout
- mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR3CMP_EN );
- mStatusAndControlRegs[PHY_CTRL4_INDEX_c] &= (uint8_t) ~( cPHY_CTRL4_TC3TMOUT );
-
- // clear transceiver interrupts, mask mask SEQ, RX, TX, TMR3 and CCA interrupts interrupts and set the PHY sequencer back to IDLE
- MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 8);
-}
-
-/*! *********************************************************************************
-* \brief Scales energy level to 0-255
-*
-* \param[in] energyLevel the energ level reported by HW
-*
-* \return uint8_t the energy level scaled in 0x00-0xFF
-*
-********************************************************************************** */
-uint8_t Phy_GetEnergyLevel
-(
-uint8_t energyLevel /* db */
-)
-{
- if(energyLevel >= 90)
- {
- /* ED value is below minimum. Return 0x00. */
- energyLevel = 0x00;
- }
- else if(energyLevel <= 26)
- {
- /* ED value is above maximum. Return 0xFF. */
- energyLevel = 0xFF;
- }
- else
- {
- /* Energy level (-90 dBm to -26 dBm ) --> varies form 0 to 64 */
- energyLevel = (90 - energyLevel);
- /* Rescale the energy level values to the 0x00-0xff range (0 to 64 translates in 0 to 255) */
- /* energyLevel * 3.9844 ~= 4 */
- /* Multiply with 4=2^2 by shifting left.
- The multiplication will not overflow beacause energyLevel has values between 0 and 63 */
- energyLevel <<= 2;
- }
-
- return energyLevel;
-}
-
-/*! *********************************************************************************
-* \brief Scales LQI to 0-255
-*
-* \param[in] hwLqi the LQI reported by HW
-*
-* \return uint8_t the LQI scaled in 0x00-0xFF
-*
-********************************************************************************** */
-static uint8_t Phy_LqiConvert
-(
-uint8_t hwLqi
-)
-{
- uint32_t tmpLQI;
-
- /* LQI Saturation Level */
- if (hwLqi >= 230)
- {
- return 0xFF;
- }
- else if (hwLqi <= 9)
- {
- return 0;
- }
- else
- {
- /* Rescale the LQI values from min to saturation to the 0x00 - 0xFF range */
- /* The LQI value mst be multiplied by ~1.1087 */
- /* tmpLQI = hwLqi * 7123 ~= hwLqi * 65536 * 0.1087 = hwLqi * 2^16 * 0.1087*/
- tmpLQI = ((uint32_t)hwLqi * (uint32_t)7123 );
- /* tmpLQI = (tmpLQI / 2^16) + hwLqi */
- tmpLQI = (uint32_t)(tmpLQI >> 16) + (uint32_t)hwLqi;
-
- return (uint8_t)tmpLQI;
- }
-}
-
-/*! *********************************************************************************
-* \brief This function returns the LQI for the las received packet
-*
-* \return uint8_t LQI value
-*
-********************************************************************************** */
-uint8_t PhyGetLastRxLqiValue(void)
-{
- return mPhyLastRxLQI;
-}
-
-/*! *********************************************************************************
-* \brief This function returns the RSSI for the las received packet
-*
-* \return uint8_t RSSI value
-*
-********************************************************************************** */
-uint8_t PhyGetLastRxRssiValue(void)
-{
- return mPhyLastRxRSSI;
-}
-
-/*! *********************************************************************************
-* \brief PHY ISR
-*
-********************************************************************************** */
-void PHY_InterruptHandler(void)
-{
- uint8_t xcvseqCopy;
-
- /* The ISR may be called even if another PORTx pin has changed */
- //if( !PORT_HAL_IsPinIntPending(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)], GPIO_EXTRACT_PIN(kGpioXcvrIrqPin)) )
- if( !RF_isIRQ_Pending() )
- {
- return;
- }
-
- /* Disable and clear transceiver(IRQ_B) interrupt */
- MCR20Drv_IRQ_Disable();
- MCR20Drv_IRQ_Clear();
-
- /* Read transceiver interrupt status and control registers */
- mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] =
- MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &mStatusAndControlRegs[1], 7);
- xcvseqCopy = mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_XCVSEQ;
- /* clear transceiver interrupts */
- MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 3);
-
- if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_WAKE_IRQ) &&
- !(mStatusAndControlRegs[PHY_CTRL3_INDEX_c] & cPHY_CTRL3_WAKE_MSK) )
- {
-#ifdef MAC_PHY_DEBUG
- Radio_Phy_UnexpectedTransceiverReset(mPhyTaskInstance);
-#endif
- MCR20Drv_IRQ_Enable();
- return;
- }
-
- /* Flter Fail IRQ */
- if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_FILTERFAIL_IRQ) &&
- !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_FILTERFAIL_MSK) )
- {
-#if gUsePBTransferThereshold_d
- /* Reset the RX_WTR_MARK level since packet was dropped. */
- mPhyWatermarkLevel = 0;
- MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
-#endif
- Radio_Phy_PlmeFilterFailRx(mPhyTaskInstance);
- }
- /* Rx Watermark IRQ */
- else if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RXWTRMRKIRQ) &&
- !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_RX_WMRK_MSK) )
- {
-#if gUsePBTransferThereshold_d
- if( 0 == mPhyWatermarkLevel )
- {
- /* Check if this is a standalone RX because we could end up here during a TR sequence also. */
- if( xcvseqCopy == gRX_c )
- {
- /* Set the thereshold packet length at which to start the PB Burst Read.*/
- mPhyWatermarkLevel = mPhyGetPBTransferThreshold( mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c] );
- MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
- }
-#endif
- Radio_Phy_PlmeRxSfdDetect(mPhyTaskInstance, mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]);
-#if gUsePBTransferThereshold_d
- }
- else
- {
- /* Reset RX_WTR_MARK here, because if the FCS fails, no other IRQ will arrive
- * and the RX will restart automatically. */
- mPhyWatermarkLevel = 0;
- MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
-
- if( mpRxParams )
- {
- // Read data from PB
- MCR20Drv_PB_SPIBurstRead(mpRxParams->pRxData->msgData.dataInd.pPsdu, (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c] - 2));
- if( gpfPhyPreprocessData )
- gpfPhyPreprocessData(mpRxParams->pRxData->msgData.dataInd.pPsdu);
- }
- }
-#endif
- }
-
- /* Timer 1 Compare Match */
- if( (mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR1IRQ) &&
- !(mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR1MSK))
- {
- // disable TMR1 comparator
- mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR1CMP_EN);
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
-
- Radio_Phy_TimeWaitTimeoutIndication(mPhyTaskInstance);
- }
-
- /* Sequencer interrupt, the autosequence has completed */
- if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_SEQIRQ) &&
- !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_SEQMSK) )
- {
- // PLL unlock, the autosequence has been aborted due to PLL unlock
- if( mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_PLL_UNLOCK_IRQ )
- {
- PhyIsrSeqCleanup();
- Radio_Phy_PlmeSyncLossIndication(mPhyTaskInstance);
- MCR20Drv_IRQ_Enable();
- return;
- }
-
- // TMR3 timeout, the autosequence has been aborted due to TMR3 timeout
- if( (mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR3IRQ) &&
- !(mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RXIRQ) &&
- (gTX_c != xcvseqCopy) )
- {
- PhyIsrTimeoutCleanup();
-
- Radio_Phy_TimeRxTimeoutIndication(mPhyTaskInstance);
- MCR20Drv_IRQ_Enable();
- return;
- }
-
- PhyIsrSeqCleanup();
-
- switch(xcvseqCopy)
- {
- case gTX_c:
- if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA) &&
- (mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_CCABFRTX) )
- {
- Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
- }
- else
- {
- Radio_Phy_PdDataConfirm(mPhyTaskInstance, FALSE);
- }
- break;
-
- case gTR_c:
- if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA) &&
- (mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_CCABFRTX) )
- {
- Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
- }
- else
- {
- if(NULL != mpRxParams)
- {
- // reports value of 0x00 for -105 dBm of received input power and 0xFF for 0 dBm of received input power
- mPhyLastRxRSSI = MCR20Drv_DirectAccessSPIRead((uint8_t) LQI_VALUE);
- mpRxParams->linkQuality = Phy_LqiConvert(mPhyLastRxRSSI);
- mPhyLastRxLQI = mpRxParams->linkQuality;
- MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) TIMESTAMP_LSB, (uint8_t *)&mpRxParams->timeStamp, 3);
- mpRxParams->psduLength = (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]); //Including FCS (2 bytes)
- }
- if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RX_FRM_PEND) == cIRQSTS1_RX_FRM_PEND )
- {
- Radio_Phy_PdDataConfirm(mPhyTaskInstance, TRUE);
- }
- else
- {
- Radio_Phy_PdDataConfirm(mPhyTaskInstance, FALSE);
- }
- }
- break;
-
- case gRX_c:
- if( NULL != mpRxParams )
- {
- // reports value of 0x00 for -105 dBm of received input power and 0xFF for 0 dBm of received input power
- mPhyLastRxRSSI = MCR20Drv_DirectAccessSPIRead((uint8_t) LQI_VALUE);
- mpRxParams->linkQuality = Phy_LqiConvert(mPhyLastRxRSSI);
- mPhyLastRxLQI = mpRxParams->linkQuality;
- MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) TIMESTAMP_LSB, (uint8_t *)&mpRxParams->timeStamp, 3);
- mpRxParams->psduLength = (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]); //Including FCS (2 bytes)
- }
- Radio_Phy_PdDataIndication(mPhyTaskInstance);
- break;
-
- case gCCA_c:
- if( (mStatusAndControlRegs[PHY_CTRL4_INDEX_c] & (cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c)) == (gCcaED_c << cPHY_CTRL4_CCATYPE_Shift_c) )
- {
- // Ed
- Radio_Phy_PlmeEdConfirm(MCR20Drv_DirectAccessSPIRead((uint8_t) CCA1_ED_FNL), mPhyTaskInstance);
- }
- else
- {
- // CCA
- if( mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA )
- {
-#if (gUseStandaloneCCABeforeTx_d == 1)
- phyLocal[mPhyTaskInstance].txParams.numOfCca = 0;
-#endif
- Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
- }
- else
- {
-#if (gUseStandaloneCCABeforeTx_d == 1)
- if( phyLocal[mPhyTaskInstance].txParams.numOfCca > 0 )
- {
- mStatusAndControlRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
-
- if( --phyLocal[mPhyTaskInstance].txParams.numOfCca == 0 )
- {
- // perform TxRxAck sequence if required by phyTxMode
- if( gPhyRxAckRqd_c == phyLocal[mPhyTaskInstance].txParams.ackRequired )
- {
- mStatusAndControlRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_RXACKRQD);
- mStatusAndControlRegs[PHY_CTRL1] |= gTR_c;
- }
- else
- {
- mStatusAndControlRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_RXACKRQD);
- mStatusAndControlRegs[PHY_CTRL1] |= gTX_c;
- }
- }
- else
- {
- mStatusAndControlRegs[PHY_CTRL1] |= gCCA_c;
- }
-
- mStatusAndControlRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
- // start the sequence immediately
- MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL1,
- &mStatusAndControlRegs[PHY_CTRL1],
- 2);
- }
- else
-#endif
- {
- Radio_Phy_PlmeCcaConfirm(gPhyChannelIdle_c, mPhyTaskInstance);
- }
- }
- }
- break;
-
- case gCCCA_c:
- Radio_Phy_PlmeCcaConfirm(gPhyChannelIdle_c, mPhyTaskInstance);
- break;
-
- default:
- Radio_Phy_PlmeSyncLossIndication(mPhyTaskInstance);
- break;
- }
- }
- // timers interrupt
- else
- {
- if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR2IRQ )
- {
- // disable TMR2 comparator and time triggered action
- mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR2CMP_EN);
- mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_TMRTRIGEN);
-
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1_INDEX_c]);
-
- Radio_Phy_TimeStartEventIndication(mPhyTaskInstance);
- }
-
- if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR3IRQ )
- {
- /* disable TMR3 comparator and timeout */
- mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR3CMP_EN);
- mStatusAndControlRegs[PHY_CTRL4_INDEX_c] &= (uint8_t) ~( cPHY_CTRL4_TC3TMOUT);
-
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4_INDEX_c]);
-
- /* Ensure that we're not issuing TimeoutIndication while the Automated sequence is still in progress */
- /* TMR3 can expire during R-T turnaround for example, case in which the sequence is not interrupted */
- if( gIdle_c == xcvseqCopy )
- {
- Radio_Phy_TimeRxTimeoutIndication(mPhyTaskInstance);
- }
- }
-
- /* Timer 4 Compare Match */
- if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR4IRQ )
- {
- /* disable TMR4 comparator */
- mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR4CMP_EN);
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
- }
- }
-
- MCR20Drv_IRQ_Enable();
-}
-
-/*! *********************************************************************************
-* \brief This function installs the PHY ISR
-*
-********************************************************************************** */
-void PHY_InstallIsr( void )
-{
- /*Initialise RF interrupt pin*/
- RF_IRQ_Init();
-
- //GpioInstallIsr(PHY_InterruptHandler, gGpioIsrPrioHigh_c, MCR20_Irq_Priority, kGpioXcvrIrqPin);
-}
\ No newline at end of file
--- a/RF_Drivers_Freescale/PhyInterface.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,352 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file PhyInterface.h
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#ifndef _PHY_INTERFACE_H
-#define _PHY_INTERFACE_H
-
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-
-#include "PhyTypes.h"
-//#include "Messaging.h"
-#include "PhyConfig.h"
-
-/************************************************************************************
-*************************************************************************************
-* Public macros
-*************************************************************************************
-************************************************************************************/
-
-/* Constants */
-#ifndef gMaxPhyTimers_c
-#define gMaxPhyTimers_c (5)
-#endif
-
-#ifdef gPHY_802_15_4g_d
-#define gPhySeqStartAsap_c (0xFFFFFFFFFFFFFFFF)
-#else
-#define gPhySeqStartAsap_c (0xFFFFFFFF)
-#endif
-
-/* XCVR active/idle power modes */
-#define gPhyDefaultActivePwrMode_c gPhyPwrAutodoze_c /* Do not change! */
-#define gPhyDefaultIdlePwrMode_c gPhyPwrAutodoze_c
-
-/************************************************************************************
-*************************************************************************************
-* Public prototypes
-*************************************************************************************
-************************************************************************************/
-
-/************************************************************************************
-*************************************************************************************
-* Public type definitions
-*************************************************************************************
-************************************************************************************/
-
-typedef enum
-{
-#include "PhyMessages.h"
-}phyMessageId_t;
-
-typedef enum{
- gPhyPwrIdle_c,
- gPhyPwrAutodoze_c,
- gPhyPwrDoze_c,
- gPhyPwrHibernate_c,
- gPhyPwrReset_c
-}phyPwrMode_t;
-
-typedef struct pdDataReq_tag
-{
- phyTime_t startTime; // absolute
- uint32_t txDuration; // relative
- phySlottedMode_t slottedTx;
- phyCCAType_t CCABeforeTx;
- phyAckRequired_t ackRequired;
- uint8_t psduLength;
-#ifdef gPHY_802_15_4g_d
- phyPHR_t phyHeader;
- uint8_t macDataIndex;
- uint8_t fillFifoBlockLength;
-#endif // gPHY_802_15_4g_d
- uint8_t * pPsdu;
-} pdDataReq_t;
-
-typedef struct pdDataCnf_tag
-{
- phyStatus_t status;
-} pdDataCnf_t;
-
-typedef struct pdDataInd_tag
-{
- phyTimeTimestamp_t timeStamp;
- uint8_t ppduLinkQuality;
- uint8_t psduLength;
- uint8_t * pPsdu;
-#ifdef gPHY_802_15_4g_d
- uint32_t crcValue;
- bool_t crcValid;
-#endif
-} pdDataInd_t;
-
-typedef struct pdIndQueueInsertReq_tag
-{
- uint8_t index;
- uint16_t checksum;
-} pdIndQueueInsertReq_t;
-
-typedef struct pdIndQueueInsertCnf_tag
-{
- phyStatus_t status;
-} pdIndQueueInsertCnf_t;
-
-typedef struct pdIndQueueRemoveReq_tag
-{
- uint8_t index;
-} pdIndQueueRemoveReq_t;
-
-typedef struct plmeEdReq_tag
-{
- phyTime_t startTime; // absolute
-} plmeEdReq_t;
-
-typedef struct plmeCcaReq_tag
-{
- phyCCAType_t ccaType;
- phyContCCAMode_t contCcaMode;
-} plmeCcaReq_t;
-
-typedef struct plmeCcaCnf_tag
-{
- phyStatus_t status;
-} plmeCcaCnf_t;
-
-typedef struct plmeEdCnf_tag
-{
- phyStatus_t status;
- uint8_t energyLevel;
- uint8_t energyLeveldB;
-} plmeEdCnf_t;
-
-typedef struct plmeSetTRxStateReq_tag
-{
- phyState_t state;
- phySlottedMode_t slottedMode;
- phyTime_t startTime; // absolute
- uint32_t rxDuration; // relative
-} plmeSetTRxStateReq_t;
-
-typedef struct phyTimeEvent_tag
-{
- phyTimeTimestamp_t timestamp; // absolute
- phyTimeCallback_t callback;
- uint32_t parameter;
-}phyTimeEvent_t;
-
-typedef struct plmeSetTRxStateCnf_tag
-{
- phyStatus_t status;
-} plmeSetTRxStateCnf_t;
-
-typedef struct plmeSetReq_tag
-{
- phyPibId_t PibAttribute;
- uint64_t PibAttributeValue;
-} plmeSetReq_t;
-
-typedef struct plmeSetCnf_tag
-{
- phyStatus_t status;
- phyPibId_t PibAttribute;
-} plmeSetCnf_t;
-
-typedef struct plmeGetReq_tag
-{
- phyPibId_t PibAttribute;
- uint64_t * pPibAttributeValue;
-} plmeGetReq_t;
-
-typedef struct plmeGetCnf_tag
-{
- phyStatus_t status;
- phyPibId_t PibAttribute;
- uint64_t PibAttributeValue;
-} plmeGetCnf_t;
-
-typedef struct macToPlmeMessage_tag
-{
- phyMessageId_t msgType;
- uint8_t macInstance;
- union
- {
- plmeEdReq_t edReq;
- plmeCcaReq_t ccaReq;
- plmeSetTRxStateReq_t setTRxStateReq;
- plmeSetReq_t setReq;
- plmeGetReq_t getReq;
- }msgData;
-} macToPlmeMessage_t;
-
-typedef struct macToPdDataMessage_tag
-{
- phyMessageId_t msgType;
- uint8_t macInstance;
- union
- {
- pdDataReq_t dataReq;
- pdIndQueueInsertReq_t indQueueInsertReq;
- pdIndQueueRemoveReq_t indQueueRemoveReq;
- }msgData;
-} macToPdDataMessage_t;
-
-typedef struct plmeToMacMessage_tag
-{
- phyMessageId_t msgType;
- uint8_t macInstance;
- union
- {
- plmeCcaCnf_t ccaCnf;
- plmeEdCnf_t edCnf;
- plmeSetTRxStateCnf_t setTRxStateCnf;
- plmeSetCnf_t setCnf;
- plmeGetCnf_t getCnf;
- }msgData;
-} plmeToMacMessage_t;
-
-typedef struct pdDataToMacMessage_tag
-{
- phyMessageId_t msgType;
- uint8_t macInstance;
- union
- {
- pdDataCnf_t dataCnf;
- pdDataInd_t dataInd;
- pdIndQueueInsertCnf_t indQueueInsertCnf;
- }msgData;
-} pdDataToMacMessage_t;
-
-typedef struct phyMessageHeader_tag
-{
- phyMessageId_t msgType;
- uint8_t macInstance;
-} phyMessageHeader_t;
-
-typedef struct phyRxParams_tag {
- phyTime_t timeStamp;
- uint8_t psduLength;
- uint8_t linkQuality;
-#ifdef gPHY_802_15_4g_d
- uint8_t headerLength;
- uint8_t macDataIndex;
- uint8_t unfillFifoBlockLength;
- phyPHR_t phyHeader;
-#else
- phySlottedMode_t phyRxMode;
- pdDataToMacMessage_t *pRxData;
-#endif // gPHY_802_15_4g_d
-} phyRxParams_t;
-
-typedef struct phyChannelParams_tag {
- union{
- phyStatus_t channelStatus;
- uint8_t energyLeveldB;
- };
-#ifdef gPHY_802_15_4g_d
- uint8_t ccaThreshold;
- uint8_t ccaParam;
-#endif // gPHY_802_15_4g_d
-} phyChannelParams_t;
-
-typedef struct phyTxParams_tag {
- uint8_t numOfCca;
- phyAckRequired_t ackRequired;
-} phyTxParams_t;
-
-typedef phyStatus_t ( * PD_MAC_SapHandler_t)(pdDataToMacMessage_t * pMsg, instanceId_t instanceId);
-
-typedef phyStatus_t ( * PLME_MAC_SapHandler_t)(plmeToMacMessage_t * pMsg, instanceId_t instanceId);
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/************************************************************************************
-*************************************************************************************
-* Public memory declarations
-*************************************************************************************
-************************************************************************************/
-extern const uint8_t gPhyIndirectQueueSize_c;
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-
-void Phy_Init( void );
-
-instanceId_t BindToPHY( instanceId_t macInstance );
-
-// SAPs
-void Phy_RegisterSapHandlers(PD_MAC_SapHandler_t pPD_MAC_SapHandler, PLME_MAC_SapHandler_t pPLME_MAC_SapHandler, instanceId_t instanceId);
-
-phyStatus_t MAC_PD_SapHandler(macToPdDataMessage_t * pMsg, instanceId_t phyInstance);
-
-phyStatus_t MAC_PLME_SapHandler(macToPlmeMessage_t * pMsg, instanceId_t phyInstance);
-
-// PHY Time
-void PhyTime_Maintenance ( void );
-
-void PhyTime_RunCallback ( void );
-
-void PhyTime_ISR ( void );
-
-phyTimeStatus_t PhyTime_TimerInit ( void (*cb)(void) );
-
-phyTimeTimestamp_t PhyTime_GetTimestamp ( void );
-
-phyTimeTimerId_t PhyTime_ScheduleEvent( phyTimeEvent_t *pEvent );
-
-phyTimeStatus_t PhyTime_CancelEvent ( phyTimeTimerId_t timerId );
-
-phyTimeStatus_t PhyTime_CancelEventsWithParam ( uint32_t param );
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _PHY_INTERFACE_H */
--- a/RF_Drivers_Freescale/PhyMessages.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,106 +0,0 @@ -/*! -* Copyright (c) 2015, Freescale Semiconductor, Inc. -* All rights reserved. -* -* \file PhyMessages.h -* -* Redistribution and use in source and binary forms, with or without modification, -* are permitted provided that the following conditions are met: -* -* o Redistributions of source code must retain the above copyright notice, this list -* of conditions and the following disclaimer. -* -* o Redistributions in binary form must reproduce the above copyright notice, this -* list of conditions and the following disclaimer in the documentation and/or -* other materials provided with the distribution. -* -* o Neither the name of Freescale Semiconductor, Inc. nor the names of its -* contributors may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef _PHY_MESSAGES_H -#define _PHY_MESSAGES_H - - -/************************************************************************************ -************************************************************************************* -* Include -************************************************************************************* -************************************************************************************/ - -/************************************************************************************ -************************************************************************************* -* Public macros -************************************************************************************* -************************************************************************************/ - -/************************************************************************************ -************************************************************************************* -* Public prototypes -************************************************************************************* -************************************************************************************/ - -/************************************************************************************ -************************************************************************************* -* Public type definitions -************************************************************************************* -************************************************************************************/ - -/************************************************************************************ -************************************************************************************* -* Public memory declarations -************************************************************************************* -************************************************************************************/ - -/************************************************************************************ -************************************************************************************* -* Public functions -************************************************************************************* -************************************************************************************/ - -/* 802.15.4-2006 standard PHY PD and PLME API messages */ - gPdDataReq_c, - gPdDataCnf_c, - gPdDataInd_c, - - gPdIndQueueInsertReq_c, - gPdIndQueueInsertCnf_c, - gPdIndQueueRemoveReq_c, - - gPlmeCcaReq_c, - gPlmeCcaCnf_c, - - gPlmeEdReq_c, - gPlmeEdCnf_c, - - gPlmeSetTRxStateReq_c, - gPlmeSetTRxStateCnf_c, - - gPlmeSetReq_c, - gPlmeSetCnf_c, - - gPlmeGetReq_c, - gPlmeGetCnf_c, - - gPlmeTimeoutInd_c, - - gPlme_StartEventInd_c, - gPlme_SyncLossInd_c, - gPlme_RxSfdDetectInd_c, - gPlme_FilterFailInd_c, - gPlme_UnexpectedRadioResetInd_c, - - -#endif /* _PHY_MESSAGES_H */
--- a/RF_Drivers_Freescale/PhyPacketProcessor.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,1135 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file PhyPacketProcessor.c
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-#include "EmbeddedTypes.h"
-//#include "board.h"
-#include "MCR20Drv.h"
-#include "MCR20Reg.h"
-#include "MCR20Overwrites.h"
-
-#include "Phy.h"
-#include "MpmInterface.h"
-
-//#include "fsl_os_abstraction.h"
-//#include "fsl_gpio_driver.h"
-
-//extern const IRQn_Type g_portIrqId[HW_PORT_INSTANCE_COUNT];
-
-/************************************************************************************
-*************************************************************************************
-* Public macros
-*************************************************************************************
-************************************************************************************/
-
-// Address mode indentifiers. Used for both network and MAC interfaces
-#define gPhyAddrModeNoAddr_c (0)
-#define gPhyAddrModeInvalid_c (1)
-#define gPhyAddrMode16BitAddr_c (2)
-#define gPhyAddrMode64BitAddr_c (3)
-
-#define PHY_MIN_RNG_DELAY 4
-
-/************************************************************************************
-*************************************************************************************
-* Private variables
-*************************************************************************************
-************************************************************************************/
-
-const uint8_t gPhyIdlePwrState = gPhyDefaultIdlePwrMode_c;
-const uint8_t gPhyActivePwrState = gPhyDefaultActivePwrMode_c;
-
-const uint8_t gPhyIndirectQueueSize_c = 12;
-static uint8_t mPhyCurrentSamLvl = 12;
-static uint8_t mPhyPwrState = gPhyPwrIdle_c;
-
-/************************************************************************************
-*************************************************************************************
-* Public Functions
-*************************************************************************************
-************************************************************************************/
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyGetRandomNo
- * Description: - This function should be called only when the Radio is idle.
- * The function may take a long time to run!
- * It is recomended to use this function only to initializa a seed at startup!
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-
-void PhyGetRandomNo(uint32_t *pRandomNo)
-{
- uint8_t i = 4, prevRN=0;
- uint8_t* ptr = (uint8_t *)pRandomNo;
- uint32_t startTime, endTime;
- uint8_t phyReg;
-
- MCR20Drv_IRQ_Disable();
-
- if( PhyPpGetState() )
- {
- *pRandomNo = 0;
- MCR20Drv_IRQ_Enable();
- return;
- }
-
- while (i--)
- {
- PhyTimeReadClock(&startTime);
-
- // Program a new sequence
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- MCR20Drv_DirectAccessSPIWrite( PHY_CTRL1, phyReg | gRX_c);
-
- // wait a variable number of symbols */
- do
- PhyTimeReadClock(&endTime);
- while( ((endTime - startTime) & 0x00FFFFFF) < (PHY_MIN_RNG_DELAY + (prevRN>>5)));
-
- // Abort the sequence
- PhyAbort();
-
- // Read new 8 bit random number
- prevRN = MCR20Drv_IndirectAccessSPIRead((uint8_t)_RNG);
- *ptr++ = prevRN;
- }
-
- MCR20Drv_IRQ_Enable();
-}
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetDualPanAuto
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetDualPanAuto
-(
- bool_t mode
-)
-{
- uint8_t phyReg, phyReg2;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
-
- if( mode )
- {
- phyReg2 = phyReg | (cDUAL_PAN_CTRL_DUAL_PAN_AUTO);
- }
- else
- {
- phyReg2 = phyReg & (~cDUAL_PAN_CTRL_DUAL_PAN_AUTO);
- }
-
- /* Write the new value only if it has changed */
- if (phyReg2 != phyReg)
- MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg2);
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpGetDualPanAuto
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-bool_t PhyPpGetDualPanAuto
-(
- void
-)
-{
- uint8_t phyReg = MCR20Drv_IndirectAccessSPIRead(DUAL_PAN_CTRL);
- return (phyReg & cDUAL_PAN_CTRL_DUAL_PAN_AUTO) == cDUAL_PAN_CTRL_DUAL_PAN_AUTO;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetDualPanDwell
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetDualPanDwell // TODO: check seq state and return phyStatus_t
-(
- uint8_t dwell
-)
-{
- MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_DWELL, dwell);
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpGetDualPanDwell
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPpGetDualPanDwell
-(
- void
-)
-{
- return MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_DWELL);
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpGetDualPanRemain
- * Description: -
- * Parameters: -
- * Return: - the remaining Dwell time
- *---------------------------------------------------------------------------*/
-uint8_t PhyPpGetDualPanRemain()
-{
- return (MCR20Drv_IndirectAccessSPIRead(DUAL_PAN_STS) & cDUAL_PAN_STS_DUAL_PAN_REMAIN);
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetDualPanSamLvl
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetDualPanSamLvl // TODO: check seq state and return phyStatus_t
-(
- uint8_t level
-)
-{
- uint8_t phyReg;
-#ifdef PHY_PARAMETERS_VALIDATION
- if( level > gPhyIndirectQueueSize_c )
- return;
-#endif
- phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
-
- phyReg &= ~cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_MSK; // clear current lvl
- phyReg |= level << cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_Shift_c; // set new lvl
-
- MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg);
- mPhyCurrentSamLvl = level;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpGetDualPanSamLvl
- * Description: -
- * Parameters: -
- * Return:
- *---------------------------------------------------------------------------*/
-uint8_t PhyPpGetDualPanSamLvl()
-{
- return mPhyCurrentSamLvl;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetDualPanActiveNwk
- * Description: - Select Active PAN
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetDualPanActiveNwk // TODO: check seq state and return phyStatus_t
-(
- uint8_t nwk
-)
-{
- uint8_t phyReg, phyReg2;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
-
- if( 0 == nwk )
- {
- phyReg2 = phyReg & (~cDUAL_PAN_CTRL_ACTIVE_NETWORK);
- }
- else
- {
- phyReg2 = phyReg | cDUAL_PAN_CTRL_ACTIVE_NETWORK;
- }
-
- /* Write the new value only if it has changed */
- if( phyReg2 != phyReg )
- {
- MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg2);
- }
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpGetDualPanActiveNwk
- * Description: -
- * Parameters: -
- * Return: - the Active PAN
- *---------------------------------------------------------------------------*/
-uint8_t PhyPpGetDualPanActiveNwk(void)
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t)DUAL_PAN_CTRL );
-
- return (phyReg & cDUAL_PAN_CTRL_CURRENT_NETWORK) > 0;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpGetDualPanNwkOfRxPacket
- * Description: -
- * Parameters: -
- * Return: - the Active PAN
- *---------------------------------------------------------------------------*/
-uint8_t PhyPpGetPanOfRxPacket(void)
-{
- uint8_t phyReg;
- uint8_t PanBitMask = 0;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_STS);
-
- if( phyReg & cDUAL_PAN_STS_RECD_ON_PAN0 )
- PanBitMask |= (1<<0);
-
- if( phyReg & cDUAL_PAN_STS_RECD_ON_PAN1 )
- PanBitMask |= (1<<1);
-
- return PanBitMask;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetPromiscuous
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetPromiscuous
-(
- bool_t mode
-)
-{
- uint8_t rxFrameFltReg, phyCtrl4Reg;
-
- rxFrameFltReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) RX_FRAME_FILTER);
- phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
-
- if( mode )
- {
- /* FRM_VER[1:0] = b00. 00: Any FrameVersion accepted (0,1,2 & 3) */
- /* All frame types accepted*/
- phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
- rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
- rxFrameFltReg |= (cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
- }
- else
- {
- phyCtrl4Reg &= ~cPHY_CTRL4_PROMISCUOUS;
- /* FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others */
- /* Beacon, Data and MAC command frame types accepted */
- rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
- rxFrameFltReg |= (0x03 << cRX_FRAME_FLT_FRM_VER_Shift_c);
- rxFrameFltReg &= ~(cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
- }
-
- MCR20Drv_IndirectAccessSPIWrite( (uint8_t) RX_FRAME_FILTER, rxFrameFltReg);
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhySetActivePromiscuous()
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhySetActivePromiscuous(bool_t state)
-{
- uint8_t phyCtrl4Reg;
- uint8_t phyFrameFilterReg;
-// bool_t currentState;
-
- phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
- phyFrameFilterReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
-
-// currentState = (phyFrameFilterReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS) ? TRUE : FALSE;
-//
-// if( state == currentState )
-// return;
-
- /* if Prom is set */
- if( state )
- {
- if( phyCtrl4Reg & cPHY_CTRL4_PROMISCUOUS )
- {
- /* Disable Promiscuous mode */
- phyCtrl4Reg &= ~(cPHY_CTRL4_PROMISCUOUS);
-
- /* Enable Active Promiscuous mode */
- phyFrameFilterReg |= cRX_FRAME_FLT_ACTIVE_PROMISCUOUS;
- }
- }
- else
- {
- if( phyFrameFilterReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS )
- {
- /* Disable Active Promiscuous mode */
- phyFrameFilterReg &= ~(cRX_FRAME_FLT_ACTIVE_PROMISCUOUS);
-
- /* Enable Promiscuous mode */
- phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
- }
- }
-
- MCR20Drv_DirectAccessSPIWrite((uint8_t) PHY_CTRL4, phyCtrl4Reg);
- MCR20Drv_IndirectAccessSPIWrite(RX_FRAME_FILTER, phyFrameFilterReg);
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyGetActivePromiscuous()
- * Description: - returns the state of ActivePromiscuous feature (Enabled/Disabled)
- * Parameters: -
- * Return: - TRUE/FALSE
- *---------------------------------------------------------------------------*/
-bool_t PhyGetActivePromiscuous( void )
-{
- uint8_t phyReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
-
- if( phyReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS )
- return TRUE;
-
- return FALSE;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetPanId
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetPanId
-(
- uint8_t *pPanId,
- uint8_t pan
-)
-{
-#ifdef PHY_PARAMETERS_VALIDATION
- if(NULL == pPanId)
- {
- return gPhyInvalidParameter_c;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- if( 0 == pan )
- MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACPANID0_LSB, pPanId, 2);
- else
- MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACPANID1_LSB, pPanId, 2);
-
- return gPhySuccess_c;
-}
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetShortAddr
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetShortAddr
-(
- uint8_t *pShortAddr,
- uint8_t pan
-)
-{
-
-#ifdef PHY_PARAMETERS_VALIDATION
- if(NULL == pShortAddr)
- {
- return gPhyInvalidParameter_c;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- if( pan == 0 )
- {
- MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACSHORTADDRS0_LSB, pShortAddr, 2);
- }
- else
- {
- MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACSHORTADDRS1_LSB, pShortAddr, 2);
- }
-
- return gPhySuccess_c;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetLongAddr
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetLongAddr
-(
- uint8_t *pLongAddr,
- uint8_t pan
-)
-{
-
-#ifdef PHY_PARAMETERS_VALIDATION
- if(NULL == pLongAddr)
- {
- return gPhyInvalidParameter_c;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- if( 0 == pan )
- MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACLONGADDRS0_0, pLongAddr, 8);
- else
- MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACLONGADDRS1_0, pLongAddr, 8);
-
- return gPhySuccess_c;
-}
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetMacRole
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetMacRole
-(
- bool_t macRole,
- uint8_t pan
-)
-{
- uint8_t phyReg;
-
- if( 0 == pan )
- {
- phyReg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
-
- if(gMacRole_PanCoord_c == macRole)
- {
- phyReg |= cPHY_CTRL4_PANCORDNTR0;
- }
- else
- {
- phyReg &= ~cPHY_CTRL4_PANCORDNTR0;
- }
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
- }
- else
- {
- phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
-
- if(gMacRole_PanCoord_c == macRole)
- {
- phyReg |= cDUAL_PAN_CTRL_PANCORDNTR1;
- }
- else
- {
- phyReg &= ~cDUAL_PAN_CTRL_PANCORDNTR1;
- }
- MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg);
- }
-
- return gPhySuccess_c;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpIsTxAckDataPending
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-bool_t PhyPpIsTxAckDataPending
-(
-void
-)
-{
- uint8_t srcCtrlReg;
-
- srcCtrlReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
- if( srcCtrlReg & cSRC_CTRL_SRCADDR_EN )
- {
- uint8_t irqsts2Reg;
-
- irqsts2Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS2);
-
- if(irqsts2Reg & cIRQSTS2_SRCADDR)
- return TRUE;
- else
- return FALSE;
- }
- else
- {
- return ((srcCtrlReg & cSRC_CTRL_ACK_FRM_PND) == cSRC_CTRL_ACK_FRM_PND);
- }
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpIsRxAckDataPending
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-bool_t PhyPpIsRxAckDataPending
-(
- void
-)
-{
- uint8_t irqsts1Reg;
- irqsts1Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS1);
- if(irqsts1Reg & cIRQSTS1_RX_FRM_PEND)
- {
- return TRUE;
- }
- return FALSE;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetFpManually
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetFpManually
-(
- bool_t FP
-)
-{
- uint8_t phyReg;
- /* Disable the Source Address Matching feature and set FP manually */
- phyReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
- phyReg &= ~(cSRC_CTRL_SRCADDR_EN);
- if(FP)
- phyReg |= cSRC_CTRL_ACK_FRM_PND;
- else
- phyReg &= ~(cSRC_CTRL_ACK_FRM_PND);
- MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, phyReg);
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpIsPollIndication
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-bool_t PhyPpIsPollIndication
-(
- void
-)
-{
- uint8_t irqsts2Reg;
- irqsts2Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS2);
- if(irqsts2Reg & cIRQSTS2_PI)
- {
- return TRUE;
- }
- return FALSE;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetCcaThreshold
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPpSetCcaThreshold(uint8_t ccaThreshold)
-{
- MCR20Drv_IndirectAccessSPIWrite((uint8_t) CCA1_THRESH, (uint8_t) ccaThreshold);
- return gPhySuccess_c;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpSetSAMState
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-void PhyPpSetSAMState
-(
- bool_t state
-)
-{
- uint8_t phyReg, newPhyReg;
- /* Disable/Enables the Source Address Matching feature */
- phyReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
- if( state )
- newPhyReg = phyReg | cSRC_CTRL_SRCADDR_EN;
- else
- newPhyReg = phyReg & ~(cSRC_CTRL_SRCADDR_EN);
-
- if( newPhyReg != phyReg )
- MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, newPhyReg);
-}
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeSetFADStateRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPlmeSetFADStateRequest(bool_t state)
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
- state ? (phyReg |= cANT_AGC_CTRL_FAD_EN_Mask_c) : (phyReg &= (~((uint8_t)cANT_AGC_CTRL_FAD_EN_Mask_c)));
- MCR20Drv_IndirectAccessSPIWrite(ANT_AGC_CTRL, phyReg);
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_PAD_CTRL);
- state ? (phyReg |= 0x02) : (phyReg &= ~cANT_PAD_CTRL_ANTX_EN);
- MCR20Drv_IndirectAccessSPIWrite(ANT_PAD_CTRL, phyReg);
-
- return gPhySuccess_c;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeSetFADThresholdRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPlmeSetFADThresholdRequest(uint8_t FADThreshold)
-{
- MCR20Drv_IndirectAccessSPIWrite(FAD_THR, FADThreshold);
- return gPhySuccess_c;
-}
-
-uint8_t PhyPlmeSetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on)
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_PAD_CTRL);
- antAB_on ? (phyReg |= 0x02) : (phyReg &= ~0x02);
- rxtxSwitch_on ? (phyReg |= 0x01) : (phyReg &= ~0x01);
- MCR20Drv_IndirectAccessSPIWrite(ANT_PAD_CTRL, phyReg);
-
- return gPhySuccess_c;
-}
-
-uint8_t PhyPlmeSetANTPadStrengthRequest(bool_t hiStrength)
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(MISC_PAD_CTRL);
- hiStrength ? (phyReg |= cMISC_PAD_CTRL_ANTX_CURR) : (phyReg &= ~cMISC_PAD_CTRL_ANTX_CURR);
- MCR20Drv_IndirectAccessSPIWrite(MISC_PAD_CTRL, phyReg);
-
- return gPhySuccess_c;
-}
-
-uint8_t PhyPlmeSetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx)
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(MISC_PAD_CTRL);
- invAntA ? (phyReg |= 0x10) : (phyReg &= ~0x10);
- invAntB ? (phyReg |= 0x20) : (phyReg &= ~0x20);
- invTx ? (phyReg |= 0x40) : (phyReg &= ~0x40);
- invRx ? (phyReg |= 0x80) : (phyReg &= ~0x80);
- MCR20Drv_IndirectAccessSPIWrite(MISC_PAD_CTRL, phyReg);
-
- return gPhySuccess_c;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeSetANTXStateRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPlmeSetANTXStateRequest(bool_t state)
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
- state ? (phyReg |= cANT_AGC_CTRL_ANTX_Mask_c) : (phyReg &= (~((uint8_t)cANT_AGC_CTRL_ANTX_Mask_c)));
- MCR20Drv_IndirectAccessSPIWrite(ANT_AGC_CTRL, phyReg);
-
- return gPhySuccess_c;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeGetANTXStateRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPlmeGetANTXStateRequest(void)
-{
- uint8_t phyReg;
-
- phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
-
- return ((phyReg & cANT_AGC_CTRL_ANTX_Mask_c) == cANT_AGC_CTRL_ANTX_Mask_c);
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPp_IndirectQueueInsert
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPp_IndirectQueueInsert // TODO: to validate add to indirect queue parameters
-(
- uint8_t index,
- uint16_t checkSum,
- instanceId_t instanceId
-)
-{
- uint16_t srcAddressCheckSum = checkSum;
- uint8_t srcCtrlReg;
-
- if( index >= gPhyIndirectQueueSize_c )
- return gPhyInvalidParameter_c;
-
- srcCtrlReg = (uint8_t) ( (index & cSRC_CTRL_INDEX) << cSRC_CTRL_INDEX_Shift_c );
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
-
- MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) SRC_ADDRS_SUM_LSB, (uint8_t *) &srcAddressCheckSum, 2);
-
- srcCtrlReg |= ( cSRC_CTRL_SRCADDR_EN | cSRC_CTRL_INDEX_EN );
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
-
- return gPhySuccess_c;
-
-}
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyPp_RemoveFromIndirect
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-phyStatus_t PhyPp_RemoveFromIndirect
-(
- uint8_t index,
- instanceId_t instanceId
-)
-{
- uint8_t srcCtrlReg;
-
- if( index >= gPhyIndirectQueueSize_c )
- return gPhyInvalidParameter_c;
-
- srcCtrlReg = (uint8_t)( ( (index & cSRC_CTRL_INDEX) << cSRC_CTRL_INDEX_Shift_c )
- |( cSRC_CTRL_SRCADDR_EN )
- |( cSRC_CTRL_INDEX_DISABLE) );
-
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
-
- return gPhySuccess_c;
-}
-
-
-/*---------------------------------------------------------------------------
- * Name: PhyPpGetState
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPpGetState
-(
- void
-)
-{
- return (uint8_t)( MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL1) & cPHY_CTRL1_XCVSEQ );
-}
-
-/*! *********************************************************************************
-* \brief Aborts the current sequence and force the radio to IDLE
-*
-********************************************************************************** */
-void PhyAbort(void)
-{
- uint8_t phyRegs[8];
- volatile uint8_t currentTime = 0;
-
- ProtectFromMCR20Interrupt();
-
- phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 7);
-
- // Disable timer trigger (for scheduled XCVSEQ)
- if( phyRegs[PHY_CTRL1] & cPHY_CTRL1_TMRTRIGEN )
- {
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_TMRTRIGEN );
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyRegs[PHY_CTRL1]);
-
- // give the FSM enough time to start if it was triggered
- currentTime = (uint8_t) ( MCR20Drv_DirectAccessSPIRead(EVENT_TMR_LSB) + 2 );
- while(MCR20Drv_DirectAccessSPIRead(EVENT_TMR_LSB) != (uint8_t) (currentTime));
-
- phyRegs[PHY_CTRL1] = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- }
-
- if( (phyRegs[PHY_CTRL1] & cPHY_CTRL1_XCVSEQ) != gIdle_c )
- {
- // Abort current SEQ
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyRegs[PHY_CTRL1]);
-
- // wait for Sequence Idle (if not already)
- while ((MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F) != 0);
- }
-
- // mask SEQ interrupt
- phyRegs[PHY_CTRL2] |= (uint8_t) (cPHY_CTRL2_SEQMSK);
- // stop timers
- phyRegs[PHY_CTRL3] &= (uint8_t) ~(cPHY_CTRL3_TMR2CMP_EN | cPHY_CTRL3_TMR3CMP_EN);
- phyRegs[PHY_CTRL4] &= (uint8_t) ~(cPHY_CTRL4_TC3TMOUT);
-
- MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL2, &phyRegs[PHY_CTRL2], 4);
-
- // clear all PP IRQ bits to avoid unexpected interrupts
- phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
- phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
- cIRQSTS3_TMR2IRQ |
- cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
-
- MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
-
- PhyIsrPassRxParams(NULL);
-
- UnprotectFromMCR20Interrupt();
-}
-
-
-/*! *********************************************************************************
-* \brief Initialize the 802.15.4 Radio registers
-*
-********************************************************************************** */
-
-void PhyHwInit( void )
-{
- uint8_t index;
- uint8_t phyReg;
-
- /* Initialize the transceiver SPI driver */
- MCR20Drv_Init();
- /* Configure the transceiver IRQ_B port */
- MCR20Drv_IRQ_PortConfig();
- /* Initialize the SPI driver and install PHY ISR */
- PHY_InstallIsr();
-
- //Disable Tristate on COCO MISO for SPI reads
- MCR20Drv_IndirectAccessSPIWrite((uint8_t) MISC_PAD_CTRL, (uint8_t) 0x02);
-
- // PHY_CTRL4 unmask global TRX interrupts, enable 16 bit mode for TC2 - TC2 prime EN
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, (uint8_t) (cPHY_CTRL4_TC2PRIME_EN | \
- (gCcaCCA_MODE1_c << cPHY_CTRL4_CCATYPE_Shift_c)));
-
- // clear all PP IRQ bits to avoid unexpected interrupts immediately after init, disable all timer interrupts
- MCR20Drv_DirectAccessSPIWrite(IRQSTS1, (uint8_t) (cIRQSTS1_PLL_UNLOCK_IRQ | \
- cIRQSTS1_FILTERFAIL_IRQ | \
- cIRQSTS1_RXWTRMRKIRQ | \
- cIRQSTS1_CCAIRQ | \
- cIRQSTS1_RXIRQ | \
- cIRQSTS1_TXIRQ | \
- cIRQSTS1_SEQIRQ));
-
- MCR20Drv_DirectAccessSPIWrite(IRQSTS2, (uint8_t) (cIRQSTS2_ASM_IRQ | \
- cIRQSTS2_PB_ERR_IRQ | \
- cIRQSTS2_WAKE_IRQ));
-
- MCR20Drv_DirectAccessSPIWrite(IRQSTS3, (uint8_t) (cIRQSTS3_TMR4MSK | \
- cIRQSTS3_TMR3MSK | \
- cIRQSTS3_TMR2MSK | \
- cIRQSTS3_TMR1MSK | \
- cIRQSTS3_TMR4IRQ | \
- cIRQSTS3_TMR3IRQ | \
- cIRQSTS3_TMR2IRQ | \
- cIRQSTS3_TMR1IRQ));
-
- // PHY_CTRL1 default HW settings + AUTOACK enabled
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, (uint8_t) (cPHY_CTRL1_AUTOACK));
-
- // PHY_CTRL2 : disable all interrupts
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, (uint8_t) (cPHY_CTRL2_CRC_MSK | \
- cPHY_CTRL2_PLL_UNLOCK_MSK | \
- cPHY_CTRL2_FILTERFAIL_MSK | \
- cPHY_CTRL2_RX_WMRK_MSK | \
- cPHY_CTRL2_CCAMSK | \
- cPHY_CTRL2_RXMSK | \
- cPHY_CTRL2_TXMSK | \
- cPHY_CTRL2_SEQMSK));
-
- // PHY_CTRL3 : disable all timers and remaining interrupts
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, (uint8_t) (cPHY_CTRL3_ASM_MSK | \
- cPHY_CTRL3_PB_ERR_MSK | \
- cPHY_CTRL3_WAKE_MSK));
- // SRC_CTRL
- MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, (uint8_t) (cSRC_CTRL_ACK_FRM_PND | \
- (cSRC_CTRL_INDEX << cSRC_CTRL_INDEX_Shift_c)));
- // RX_FRAME_FILTER
- // FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others
- MCR20Drv_IndirectAccessSPIWrite(RX_FRAME_FILTER, (uint8_t)(cRX_FRAME_FLT_FRM_VER | \
- cRX_FRAME_FLT_BEACON_FT | \
- cRX_FRAME_FLT_DATA_FT | \
- cRX_FRAME_FLT_CMD_FT ));
- // Direct register overwrites
- for (index = 0; index < sizeof(overwrites_direct)/sizeof(overwrites_t); index++)
- MCR20Drv_DirectAccessSPIWrite(overwrites_direct[index].address, overwrites_direct[index].data);
-
- // Indirect register overwrites
- for (index = 0; index < sizeof(overwrites_indirect)/sizeof(overwrites_t); index++)
- MCR20Drv_IndirectAccessSPIWrite(overwrites_indirect[index].address, overwrites_indirect[index].data);
-
- // Clear HW indirect queue
- for( index = 0; index < gPhyIndirectQueueSize_c; index++ )
- PhyPp_RemoveFromIndirect( index, 0 );
-
- PhyPlmeSetCurrentChannelRequest(0x0B, 0); //2405 MHz
-#if gMpmIncluded_d
- PhyPlmeSetCurrentChannelRequest(0x0B, 1); //2405 MHz
-
- // Split the HW Indirect hash table in two
- PhyPpSetDualPanSamLvl( gPhyIndirectQueueSize_c/2 );
-#else
- // Assign HW Indirect hash table to PAN0
- PhyPpSetDualPanSamLvl( gPhyIndirectQueueSize_c );
-#endif
-
- // set the power level to 0dBm
- PhyPlmeSetPwrLevelRequest(0x17);
- // set CCA threshold to -75 dBm
- PhyPpSetCcaThreshold(0x4B);
- // Set prescaller to obtain 1 symbol (16us) timebase
- MCR20Drv_IndirectAccessSPIWrite(TMR_PRESCALE, 0x05);
- // write default Rx watermark level
- MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, 0);
-
- //Enable the RxWatermark IRQ and FilterFail IRQ
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL2);
- //phyReg &= (uint8_t)~(cPHY_CTRL2_FILTERFAIL_MSK);
- phyReg &= (uint8_t)~(cPHY_CTRL2_RX_WMRK_MSK);
- MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, phyReg);
-
- /* enable autodoze mode. */
- phyReg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PWR_MODES);
- phyReg |= (uint8_t) cPWR_MODES_AUTODOZE;
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PWR_MODES, phyReg);
- MCR20Drv_Set_CLK_OUT_Freq(gMCR20_ClkOutFreq_d);
-
- // Clear IRQn Pending Status
- MCR20Drv_IRQ_Clear();
- //NVIC_ClearPendingIRQ(g_portIrqId[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)]);
- /* enable the transceiver IRQ_B interrupt request */
- MCR20Drv_IRQ_Enable();
-}
-
-/*! *********************************************************************************
-* \brief Change the XCVR power state
-*
-* \param[in] state the new XCVR power state
-*
-* \return phyStatus_t
-*
-* \pre Before entering hibernate/reset states, the MCG clock source must be changed
-* to use an input other than the one generated by the XCVR!
-*
-* \post When XCVR is in hibernate, indirect registers cannot be accessed in burst mode
-* When XCVR is in reset, all registers are inaccessible!
-*
-* \remarks Putting the XCVR into hibernate/reset will stop the generated clock signal!
-*
-********************************************************************************** */
-phyStatus_t PhyPlmeSetPwrState( uint8_t state )
-{
- uint8_t phyPWR, xtalState;
-
- /* Parameter validation */
- if( state > gPhyPwrReset_c )
- return gPhyInvalidParameter_c;
-
- /* Check if the new power state = old power state */
- if( state == mPhyPwrState )
- return gPhyBusy_c;
-
- /* Check if the XCVR is in reset power mode */
- if( mPhyPwrState == gPhyPwrReset_c )
- {
- MCR20Drv_RST_B_Deassert();
- /* Wait for transceiver to deassert IRQ pin */
- while( MCR20Drv_IsIrqPending() );
- /* Wait for transceiver wakeup from POR iterrupt */
- while( !MCR20Drv_IsIrqPending() );
- /* After reset, the radio is in Idle state */
- mPhyPwrState = gPhyPwrIdle_c;
- /* Restore default radio settings */
- PhyHwInit();
- }
-
- if( state != gPhyPwrReset_c )
- {
- phyPWR = MCR20Drv_DirectAccessSPIRead( PWR_MODES );
- xtalState = phyPWR & cPWR_MODES_XTALEN;
- }
-
- switch( state )
- {
- case gPhyPwrIdle_c:
- phyPWR &= ~(cPWR_MODES_AUTODOZE);
- phyPWR |= (cPWR_MODES_XTALEN | cPWR_MODES_PMC_MODE);
- break;
-
- case gPhyPwrAutodoze_c:
- phyPWR |= (cPWR_MODES_XTALEN | cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
- break;
-
- case gPhyPwrDoze_c:
- phyPWR &= ~(cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
- phyPWR |= cPWR_MODES_XTALEN;
- break;
-
- case gPhyPwrHibernate_c:
- phyPWR &= ~(cPWR_MODES_XTALEN | cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
- break;
-
- case gPhyPwrReset_c:
- MCR20Drv_IRQ_Disable();
- mPhyPwrState = gPhyPwrReset_c;
- MCR20Drv_RST_B_Assert();
- return gPhySuccess_c;
- }
-
- mPhyPwrState = state;
- MCR20Drv_DirectAccessSPIWrite( PWR_MODES, phyPWR );
-
- if( !xtalState && (phyPWR & cPWR_MODES_XTALEN))
- {
- /* wait for crystal oscillator to complet its warmup */
- while( ( MCR20Drv_DirectAccessSPIRead(PWR_MODES) & cPWR_MODES_XTAL_READY ) != cPWR_MODES_XTAL_READY);
- /* wait for radio wakeup from hibernate interrupt */
- while( ( MCR20Drv_DirectAccessSPIRead(IRQSTS2) & (cIRQSTS2_WAKE_IRQ | cIRQSTS2_TMRSTATUS) ) != (cIRQSTS2_WAKE_IRQ | cIRQSTS2_TMRSTATUS) );
-
- MCR20Drv_DirectAccessSPIWrite(IRQSTS2, cIRQSTS2_WAKE_IRQ);
- }
-
- return gPhySuccess_c;
-}
\ No newline at end of file
--- a/RF_Drivers_Freescale/PhyPlmeData.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,676 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file PhyPlmeData.c
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-
-#include "EmbeddedTypes.h"
-
-//#include "fsl_os_abstraction.h"
-#include "MCR20Drv.h"
-#include "MCR20Reg.h"
-#include "Phy.h"
-#include "PhyTypes.h"
-#include "PhyInterface.h"
-
-
-
-/************************************************************************************
-*************************************************************************************
-* Private macros
-*************************************************************************************
-************************************************************************************/
-#define PHY_PARAMETERS_VALIDATION 1
-
-/************************************************************************************
-*************************************************************************************
-* Private memory declarations
-*************************************************************************************
-************************************************************************************/
- //2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
-static const uint8_t pll_int[16] = {0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D};
-static const uint16_t pll_frac[16] = {0x2800, 0x5000, 0x7800, 0xA000, 0xC800, 0xF000, 0x1800, 0x4000, 0x6800, 0x9000, 0xB800, 0xE000, 0x0800, 0x3000, 0x5800, 0x8000};
-
-extern Phy_PhyLocalStruct_t phyLocal[];
-static uint8_t gPhyCurrentChannelPAN0 = 0x0B;
-static uint8_t gPhyCurrentChannelPAN1 = 0x0B;
-
-
-/************************************************************************************
-*************************************************************************************
-* Private prototypes
-*************************************************************************************
-************************************************************************************/
-static void PhyRxRetry( uint32_t param );
-
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-
-/*! *********************************************************************************
-* \brief This function will start a TX sequence. The packet will be sent OTA
-*
-* \param[in] pTxPacket pointer to the TX packet structure
-* \param[in] pRxParams pointer to RX parameters
-* \param[in] pTxParams pointer to TX parameters
-*
-* \return phyStatus_t
-*
-********************************************************************************** */
-phyStatus_t PhyPdDataRequest( pdDataReq_t *pTxPacket,
- volatile phyRxParams_t *pRxParams,
- volatile phyTxParams_t *pTxParams )
-{
- uint8_t phyRegs[5], phyCtrl4Reg;
- uint8_t *pTmpPsdu, *tmp;
-
-#ifdef PHY_PARAMETERS_VALIDATION
- // null pointer
- if(NULL == pTxPacket)
- {
- return gPhyInvalidParameter_c;
- }
-
- // if CCA required ...
- if( (pTxPacket->CCABeforeTx == gPhyCCAMode3_c) || (pTxPacket->CCABeforeTx == gPhyEnergyDetectMode_c))
- { // ... cannot perform other types than MODE1 and MODE2
- return gPhyInvalidParameter_c;
- }
-
-#endif // PHY_PARAMETERS_VALIDATION
-
- if( gIdle_c != PhyPpGetState() )
- {
- return gPhyBusy_c;
- }
-
- // load data into PB
- tmp = pTxPacket->pPsdu;
-
- pTmpPsdu = (uint8_t *) ((&pTxPacket->pPsdu[0])-1);
- *pTmpPsdu = pTxPacket->psduLength + 2; /* including 2 bytes of FCS */
- MCR20Drv_PB_SPIBurstWrite( pTmpPsdu, (uint8_t) (pTxPacket->psduLength + 1)); /* including psduLength */
-
- pTxPacket->pPsdu = tmp;
-
- phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
- phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
-
- // perform CCA before TX if required
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_CCABFRTX);
- phyCtrl4Reg &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
-
- if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
- {
-#if (gUseStandaloneCCABeforeTx_d == 0)
- phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_CCABFRTX);
-#endif
- phyCtrl4Reg |= (uint8_t) ((cPHY_CTRL4_CCATYPE & pTxPacket->CCABeforeTx) << (cPHY_CTRL4_CCATYPE_Shift_c));
- }
-
- // slotted operation
- if( pTxPacket->slottedTx == gPhySlottedMode_c )
- {
- phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
- }
- else
- {
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
- }
-
- // perform TxRxAck sequence if required by phyTxMode
- if(pTxPacket->ackRequired == gPhyRxAckRqd_c)
- {
- PhyIsrPassRxParams(pRxParams);
-
- phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_RXACKRQD);
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
- phyRegs[PHY_CTRL1] |= gTR_c;
- }
- else
- {
- PhyIsrPassRxParams(NULL);
-
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_RXACKRQD);
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
- phyRegs[PHY_CTRL1] |= gTX_c;
- }
-
-#if gUseStandaloneCCABeforeTx_d
- if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
- {
- // start the CCA or ED sequence (this depends on CcaType used)
- // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
- if( pTxPacket->slottedTx == gPhySlottedMode_c )
- pTxParams->numOfCca = 2;
- else
- pTxParams->numOfCca = 1;
- pTxParams->ackRequired = pTxPacket->ackRequired;
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
- phyRegs[PHY_CTRL1] |= gCCA_c;
- // at the end of the scheduled sequence, an interrupt will occur:
- // CCA , SEQ or TMR3
- }
- else
- {
- pTxParams->numOfCca = 0;
- }
-#endif
-
- phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
-
- // ensure that no spurious interrupts are raised
- phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
- phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
- cIRQSTS3_TMR2IRQ |
- cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
-
- MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
-
- // start the TX or TRX sequence
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
-
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief This function will start a RX sequence
-*
-* \param[in] phyRxMode slotted/unslotted
-* \param[in] pRxParams pointer to RX parameters
-*
-* \return phyStatus_t
-*
-********************************************************************************** */
-phyStatus_t PhyPlmeRxRequest( phySlottedMode_t phyRxMode, phyRxParams_t * pRxParams )
-{
- uint8_t phyRegs[5];
-
-#ifdef PHY_PARAMETERS_VALIDATION
- if(NULL == pRxParams)
- {
- return gPhyInvalidParameter_c;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- if( gIdle_c != PhyPpGetState() )
- {
- return gPhyBusy_c;
- }
-
- pRxParams->phyRxMode = phyRxMode;
-
- if( NULL == pRxParams->pRxData )
- {
- //pRxParams->pRxData = MEM_BufferAlloc(sizeof(pdDataToMacMessage_t) + gMaxPHYPacketSize_c);
- pRxParams->pRxData = (pdDataToMacMessage_t *) malloc(sizeof(pdDataToMacMessage_t) + gMaxPHYPacketSize_c);
- }
-
- if( NULL == pRxParams->pRxData )
- {
- phyTimeEvent_t event = {
- .timestamp = PhyTime_GetTimestamp() + gPhyRxRetryInterval_c,
- .parameter = (uint32_t)pRxParams,
- .callback = PhyRxRetry,
- };
-
- PhyTime_ScheduleEvent( &event );
- return gPhyTRxOff_c;
- }
-
- PhyIsrPassRxParams(pRxParams);
-
- pRxParams->pRxData->msgData.dataInd.pPsdu =
- (uint8_t*)&pRxParams->pRxData->msgData.dataInd.pPsdu +
- sizeof(pRxParams->pRxData->msgData.dataInd.pPsdu);
-
- phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
-
- // slotted operation
- if(gPhySlottedMode_c == phyRxMode)
- {
- phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
- }
- else
- {
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
- }
-
- // program the RX sequence
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
- phyRegs[PHY_CTRL1] |= gRX_c;
-
- phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
-
- // ensure that no spurious interrupts are raised
- phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
- phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
- cIRQSTS3_TMR2IRQ |
- cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
-
- MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
-
- // start the RX sequence
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
-
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief This function will start a CCA / CCCA sequence
-*
-* \param[in] ccaParam the type of CCA
-* \param[in] cccaMode continuous or single CCA
-*
-* \return phyStatus_t
-*
-********************************************************************************** */
-phyStatus_t PhyPlmeCcaEdRequest( phyCCAType_t ccaParam, phyContCCAMode_t cccaMode )
-{
- uint8_t phyRegs[5];
-
-#ifdef PHY_PARAMETERS_VALIDATION
- // illegal CCA type
- if( (ccaParam != gPhyCCAMode1_c) && (ccaParam != gPhyCCAMode2_c) && (ccaParam != gPhyCCAMode3_c) && (ccaParam != gPhyEnergyDetectMode_c))
- {
- return gPhyInvalidParameter_c;
- }
-
- // cannot perform Continuous CCA using ED type
- if( (ccaParam == gPhyEnergyDetectMode_c) && (cccaMode == gPhyContCcaEnabled) )
- {
- return gPhyInvalidParameter_c;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- if( gIdle_c != PhyPpGetState() )
- {
- return gPhyBusy_c;
- }
-
- // write in PHY CTRL4 the desired type of CCA
- phyRegs[0] = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
- phyRegs[0] &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
- phyRegs[0] |= (uint8_t) ((cPHY_CTRL4_CCATYPE & ccaParam) << (cPHY_CTRL4_CCATYPE_Shift_c));
- MCR20Drv_DirectAccessSPIWrite( (uint8_t)PHY_CTRL4, phyRegs[0]);
-
- phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
-
- // continuous CCA
- if(cccaMode == gPhyContCcaEnabled)
- {
- // start the continuous CCA sequence
- // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
- phyRegs[PHY_CTRL1] |= gCCCA_c;
- // at the end of the scheduled sequence, an interrupt will occur:
- // CCA , SEQ or TMR3
- }
- // normal CCA (not continuous)
- else
- {
- // start the CCA or ED sequence (this depends on CcaType used)
- // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
- phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
- phyRegs[PHY_CTRL1] |= gCCA_c;
- // at the end of the scheduled sequence, an interrupt will occur:
- // CCA , SEQ or TMR3
- }
-
- phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
-
- // ensure that no spurious interrupts are raised
- phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
- phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
- cIRQSTS3_TMR2IRQ |
- cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
-
- MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
-
- // start the CCA/ED or CCCA sequence
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
-
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief This function will set the channel number for the specified PAN
-*
-* \param[in] channel new channel number
-* \param[in] pan the PAN registers (0/1)
-*
-* \return phyStatus_t
-*
-********************************************************************************** */
-phyStatus_t PhyPlmeSetCurrentChannelRequest
-(
- uint8_t channel,
- uint8_t pan
-)
-{
-
-#ifdef PHY_PARAMETERS_VALIDATION
- if((channel < 11) || (channel > 26))
- {
- return gPhyInvalidParameter_c;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- if( !pan )
- {
- gPhyCurrentChannelPAN0 = channel;
- MCR20Drv_DirectAccessSPIWrite(PLL_INT0, pll_int[channel - 11]);
- MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
- }
- else
- {
- gPhyCurrentChannelPAN1 = channel;
- MCR20Drv_IndirectAccessSPIWrite(PLL_INT1, pll_int[channel - 11]);
- MCR20Drv_IndirectAccessSPIMultiByteWrite(PLL_FRAC1_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
- }
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief This function will return the current channel for a specified PAN
-*
-* \param[in] pan the PAN registers (0/1)
-*
-* \return uint8_t current channel number
-*
-********************************************************************************** */
-uint8_t PhyPlmeGetCurrentChannelRequest
-(
- uint8_t pan
-)
-{
- if( !pan )
- return gPhyCurrentChannelPAN0;
- else
- return gPhyCurrentChannelPAN1;
-}
-
-/*! *********************************************************************************
-* \brief This function will set the radio Tx power
-*
-* \param[in] pwrStep the Tx power
-*
-* \return phyStatus_t
-*
-********************************************************************************** */
-phyStatus_t PhyPlmeSetPwrLevelRequest
-(
- uint8_t pwrStep
-)
-{
-#ifdef PHY_PARAMETERS_VALIDATION
- if((pwrStep < 3) || (pwrStep > 31)) //-40 dBm to 16 dBm
- {
- return gPhyInvalidParameter_c;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- MCR20Drv_DirectAccessSPIWrite(PA_PWR, (uint8_t)(pwrStep & 0x1F));
- return gPhySuccess_c;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeSetLQIModeRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPlmeSetLQIModeRequest(uint8_t lqiMode)
-{
- uint8_t currentMode;
-
- currentMode = MCR20Drv_IndirectAccessSPIRead(CCA_CTRL);
- lqiMode ? (currentMode |= cCCA_CTRL_LQI_RSSI_NOT_CORR) : (currentMode &= (~((uint8_t)cCCA_CTRL_LQI_RSSI_NOT_CORR)));
- MCR20Drv_IndirectAccessSPIWrite(CCA_CTRL, currentMode);
-
- return gPhySuccess_c;
-}
-
-/*---------------------------------------------------------------------------
- * Name: PhyPlmeGetRSSILevelRequest
- * Description: -
- * Parameters: -
- * Return: -
- *---------------------------------------------------------------------------*/
-uint8_t PhyPlmeGetRSSILevelRequest(void)
-{
- return MCR20Drv_IndirectAccessSPIRead(RSSI);
-}
-
-/*! *********************************************************************************
-* \brief This function will set the value of PHY PIBs
-*
-* \param[in] pibId the Id of the PIB
-* \param[in] pibValue the new value of the PIB
-* \param[in] phyRegistrySet the PAN registers (0/1)
-* \param[in] instanceId the instance of the PHY
-*
-* \return phyStatus_t
-*
-********************************************************************************** */
-phyStatus_t PhyPlmeSetPIBRequest(phyPibId_t pibId, uint64_t pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
-{
- phyStatus_t result = gPhySuccess_c;
-
- switch(pibId)
- {
- case gPhyPibCurrentChannel_c:
- {
- result = PhyPlmeSetCurrentChannelRequest((uint8_t) pibValue, phyRegistrySet);
- }
- break;
- case gPhyPibTransmitPower_c:
- {
- result = PhyPlmeSetPwrLevelRequest((uint8_t) pibValue);
- }
- break;
- case gPhyPibLongAddress_c:
- {
- uint64_t longAddr = pibValue;
- result = PhyPpSetLongAddr((uint8_t *) &longAddr, phyRegistrySet);
- }
- break;
- case gPhyPibShortAddress_c:
- {
- uint16_t shortAddr = (uint16_t) pibValue;
- result = PhyPpSetShortAddr((uint8_t *) &shortAddr, phyRegistrySet);
- }
- break;
- case gPhyPibPanId_c:
- {
- uint16_t panId = (uint16_t) pibValue;
- result = PhyPpSetPanId((uint8_t *) &panId, phyRegistrySet);
- }
- break;
- case gPhyPibPanCoordinator_c:
- {
- bool_t macRole = (bool_t) pibValue;
- result = PhyPpSetMacRole(macRole, phyRegistrySet);
- }
- break;
- case gPhyPibCurrentPage_c:
- {
- /* Nothinh to do... */
- }
- break;
- case gPhyPibPromiscuousMode_c:
- {
- PhyPpSetPromiscuous((uint8_t)pibValue);
- }
- break;
- case gPhyPibRxOnWhenIdle:
- {
- PhyPlmeSetRxOnWhenIdle( (bool_t)pibValue, instanceId );
- }
- break;
- case gPhyPibFrameWaitTime_c:
- {
- PhyPlmeSetFrameWaitTime( (uint32_t)pibValue, instanceId );
- }
- break;
- case gPhyPibDeferTxIfRxBusy_c:
- {
- if( pibValue )
- phyLocal[instanceId].flags |= gPhyFlagDeferTx_c;
- else
- phyLocal[instanceId].flags &= ~gPhyFlagDeferTx_c;
- }
- break;
- default:
- {
- result = gPhyUnsupportedAttribute_c;
- }
- break;
- }
-
- return result;
-}
-
-/*! *********************************************************************************
-* \brief This function will return the value of PHY PIBs
-*
-* \param[in] pibId the Id of the PIB
-* \param[out] pibValue pointer to a location where the value will be stored
-* \param[in] phyRegistrySet the PAN registers (0/1)
-* \param[in] instanceId the instance of the PHY
-*
-* \return phyStatus_t
-*
-********************************************************************************** */
-phyStatus_t PhyPlmeGetPIBRequest(phyPibId_t pibId, uint64_t * pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
-{
- phyStatus_t result = gPhySuccess_c;
- switch(pibId)
- {
- case gPhyPibCurrentChannel_c:
- {
- *((uint8_t*)pibValue) = (uint64_t) PhyPlmeGetCurrentChannelRequest(phyRegistrySet);
- }
- break;
- case gPhyPibTransmitPower_c:
- {
- *((uint8_t*)pibValue) = MCR20Drv_DirectAccessSPIRead(PA_PWR);
- }
- break;
- case gPhyPibLongAddress_c:
- {
- if( !phyRegistrySet )
- MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS0_0, (uint8_t*)pibValue, 8);
- else
- MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS1_0, (uint8_t*)pibValue, 8);
- }
- break;
- case gPhyPibShortAddress_c:
- {
- if( !phyRegistrySet )
- MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS0_LSB, (uint8_t*)pibValue, 2);
- else
- MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS1_LSB, (uint8_t*)pibValue, 2);
- }
- break;
- case gPhyPibPanId_c:
- {
- if( !phyRegistrySet )
- MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID0_LSB, (uint8_t*)pibValue, 2);
- else
- MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID1_LSB, (uint8_t*)pibValue, 2);
- }
- break;
- case gPhyPibPanCoordinator_c:
- {
- uint8_t phyReg;
-
- if( !phyRegistrySet )
- {
- phyReg = MCR20Drv_DirectAccessSPIRead( PHY_CTRL4);
- phyReg = (phyReg & cPHY_CTRL4_PANCORDNTR0) == cPHY_CTRL4_PANCORDNTR0;
- }
- else
- {
- phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
- phyReg = (phyReg & cDUAL_PAN_CTRL_PANCORDNTR1) == cDUAL_PAN_CTRL_PANCORDNTR1;
- }
-
- *((uint8_t*)pibValue) = phyReg;
- }
- break;
- case gPhyPibRxOnWhenIdle:
- {
- *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagRxOnWhenIdle_c);
- }
- break;
- case gPhyPibFrameWaitTime_c:
- {
- *((uint8_t*)pibValue) = phyLocal[instanceId].maxFrameWaitTime;
- }
- break;
- case gPhyPibDeferTxIfRxBusy_c:
- {
- *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagDeferTx_c);
- }
- break;
- default:
- {
- result = gPhyUnsupportedAttribute_c;
- }
- break;
- }
-
- return result;
-
-}
-
-/************************************************************************************
-*************************************************************************************
-* Private functions
-*************************************************************************************
-************************************************************************************/
-static void PhyRxRetry( uint32_t param )
-{
- PhyPlmeRxRequest( ((phyRxParams_t*)param)->phyRxMode, (phyRxParams_t*)param );
-}
\ No newline at end of file
--- a/RF_Drivers_Freescale/PhyStateMachine.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,982 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file PhyStateMachine.c
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-
-#ifdef gSrcTask_d
-#undef gSrcTask_d
-#endif
-
-#define gSrcTask_d PHY
-
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-#include "EmbeddedTypes.h"
-//#include "fsl_os_abstraction.h"
-
-#include "PhyInterface.h"
-#include "Phy.h"
-
-#if 0
-#include "MemManager.h"
-#include "Messaging.h"
-#include "Panic.h"
-#include "FunctionLib.h"
-#endif
-
-#include "MCR20Drv.h"
-#include "MCR20Reg.h"
-
-#include "AspInterface.h"
-#include "MpmInterface.h"
-
-#include "arm_hal_interrupt.h"
-
-/************************************************************************************
-*************************************************************************************
-* Public macros
-*************************************************************************************
-************************************************************************************/
-#define mPhyMaxIdleRxDuration_c (0xF00000) /* [sym] */
-
-#define ProtectFromXcvrInterrupt() ProtectFromMCR20Interrupt()
-#define UnprotectFromXcvrInterrupt() UnprotectFromMCR20Interrupt()
-
-/************************************************************************************
-*************************************************************************************
-* Private type definitions
-*************************************************************************************
-************************************************************************************/
-
-/************************************************************************************
-*************************************************************************************
-* Private prototypes
-*************************************************************************************
-************************************************************************************/
-static void Phy24Task(Phy_PhyLocalStruct_t *pPhyData);
-
-static phyStatus_t Phy_HandlePdDataReq( Phy_PhyLocalStruct_t *pPhyData, macToPdDataMessage_t * pMsg );
-
-static void Phy_EnterIdle( Phy_PhyLocalStruct_t *pPhyData );
-
-static void PLME_SendMessage(Phy_PhyLocalStruct_t *pPhyData, phyMessageId_t msgType);
-
-static void PD_SendMessage(Phy_PhyLocalStruct_t *pPhyData, phyMessageId_t msgType);
-
-/************************************************************************************
-*************************************************************************************
-* Private memory declarations
-*************************************************************************************
-************************************************************************************/
-Phy_PhyLocalStruct_t phyLocal[gPhyInstancesCnt_c];
-extern volatile uint32_t mPhySeqTimeout;
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-
-/*! *********************************************************************************
-* \brief This function creates the PHY task
-*
-********************************************************************************** */
-void Phy_Init(void)
-{
- uint32_t i;
-
- PhyHwInit();
- ASP_Init( 0, gAspInterfaceId );
- MPM_Init();
-
- for( i=0; i<gPhyInstancesCnt_c; i++ )
- {
- phyLocal[i].flags = gPhyFlagDeferTx_c;
- phyLocal[i].rxParams.pRxData = NULL;
-
- /* Prepare input queues.*/
- //MSG_InitQueue( &phyLocal[i].macPhyInputQueue );
- phyLocal[i].pMsgIn = NULL;
- }
-
- PhyIsrPassRxParams( NULL );
- PhyPlmeSetPwrState( gPhyDefaultIdlePwrMode_c );
-}
-
-/*! *********************************************************************************
-* \brief This function binds a MAC instance to a PHY instance
-*
-* \param[in] instanceId The instance of the MAC
-*
-* \return The instance of the PHY.
-*
-********************************************************************************** */
-instanceId_t BindToPHY( instanceId_t macInstance )
-{
- return 0;
-}
-
-/*! *********************************************************************************
-* \brief This function registers the MAC PD and PLME SAP handlers
-*
-* \param[in] pPD_MAC_SapHandler Pointer to the MAC PD handler function
-* \param[in] pPLME_MAC_SapHandler Pointer to the MAC PLME handler function
-* \param[in] instanceId The instance of the PHY
-*
-* \return The status of the operation.
-*
-********************************************************************************** */
-void Phy_RegisterSapHandlers( PD_MAC_SapHandler_t pPD_MAC_SapHandler,
- PLME_MAC_SapHandler_t pPLME_MAC_SapHandler,
- instanceId_t instanceId )
-{
- phyLocal[instanceId].PD_MAC_SapHandler = pPD_MAC_SapHandler;
- phyLocal[instanceId].PLME_MAC_SapHandler = pPLME_MAC_SapHandler;
-}
-
-/*! *********************************************************************************
-* \brief This function represents the PHY's task
-*
-* \param[in] taskParam The instance of the PHY
-*
-********************************************************************************** */
-static void Phy24Task(Phy_PhyLocalStruct_t *pPhyStruct)
-{
- uint8_t state;
- phyMessageHeader_t * pMsgIn;
- phyStatus_t status = gPhySuccess_c;
-
- ProtectFromXcvrInterrupt();
- state = PhyGetSeqState();
-
- /* Handling messages from upper layer */
- //while( MSG_Pending(&pPhyStruct->macPhyInputQueue) )
- //{
- /* PHY doesn't free dynamic alocated messages! */
- //pMsgIn = MSG_DeQueue( &pPhyStruct->macPhyInputQueue );
- pMsgIn = pPhyStruct->pMsgIn;
- pPhyStruct->pMsgIn = NULL;
- pPhyStruct->currentMacInstance = pMsgIn->macInstance;
-
- if( gRX_c == state )
- {
- if( (pPhyStruct->flags & gPhyFlagDeferTx_c) && (pMsgIn->msgType == gPdDataReq_c) )
- {
- macToPdDataMessage_t *pPD = (macToPdDataMessage_t*)pMsgIn;
- uint8_t phyReg = MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F;
- /* Check for an Rx in progress, and if the packet can be defered.
- Packet cannot be defered */
- if( (pPD->msgData.dataReq.CCABeforeTx != gPhyNoCCABeforeTx_c) &&
- (pPD->msgData.dataReq.startTime == gPhySeqStartAsap_c) &&
- (pPD->msgData.dataReq.slottedTx == gPhyUnslottedMode_c) &&
- (phyReg <= 0x06 || phyReg == 0x15 || phyReg == 0x16) )
- {
- //MSG_QueueHead( &pPhyStruct->macPhyInputQueue, pMsgIn );
- pPhyStruct->pMsgIn = pMsgIn;
- UnprotectFromXcvrInterrupt();
- return;
- }
- }
-
-// if( pPhyStruct->flags & gPhyFlagIdleRx_c )
- {
- PhyPlmeForceTrxOffRequest();
- state = gIdle_c;
- pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
- }
- }
-
- if( gIdle_c != state )
- {
- /* try again later */
- //MSG_QueueHead( &pPhyStruct->macPhyInputQueue, pMsgIn );
- pPhyStruct->pMsgIn = pMsgIn;
- UnprotectFromXcvrInterrupt();
- return;
- }
-
-#if gMpmIncluded_d
- if( status == gPhySuccess_c )
- {
- status = MPM_PrepareForTx( pMsgIn->macInstance );
- }
-#endif
-
- if( status == gPhySuccess_c )
- {
- pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
-
- switch( pMsgIn->msgType )
- {
- case gPdDataReq_c:
- status = Phy_HandlePdDataReq( pPhyStruct, (macToPdDataMessage_t *)pMsgIn );
- break;
- case gPlmeCcaReq_c:
- status = PhyPlmeCcaEdRequest(gPhyCCAMode1_c, gPhyContCcaDisabled);
- break;
- case gPlmeEdReq_c:
- status = PhyPlmeCcaEdRequest(gPhyEnergyDetectMode_c, gPhyContCcaDisabled);
- break;
- default:
- status = gPhyInvalidPrimitive_c;
- }
- }
-
- /* Check status */
- if( gPhySuccess_c == status )
- {
- UnprotectFromXcvrInterrupt();
- return;
- }
- else
- {
- switch( pMsgIn->msgType )
- {
- case gPdDataReq_c:
- if( ((macToPdDataMessage_t*)pMsgIn)->msgData.dataReq.CCABeforeTx == gPhyNoCCABeforeTx_c )
- {
- PD_SendMessage(pPhyStruct, gPdDataCnf_c);
- break;
- }
- /* Fallthorough */
- case gPlmeCcaReq_c:
- pPhyStruct->channelParams.channelStatus = gPhyChannelBusy_c;
- PLME_SendMessage(pPhyStruct, gPlmeCcaCnf_c);
- break;
- case gPlmeEdReq_c:
- pPhyStruct->channelParams.energyLeveldB = 0;
- PLME_SendMessage(pPhyStruct, gPlmeEdCnf_c);
- break;
- default:
- PLME_SendMessage(pPhyStruct, gPlmeTimeoutInd_c);
- }
- }
- //}/* while( MSG_Pending(&pPhyStruct->macPhyInputQueue) ) */
-
- UnprotectFromXcvrInterrupt();
-
- /* Check if PHY can enter Idle state */
- if( gIdle_c == state )
- {
- Phy_EnterIdle( pPhyStruct );
- }
-}
-
-/*! *********************************************************************************
-* \brief This is the PD SAP message handler
-*
-* \param[in] pMsg Pointer to the PD request message
-* \param[in] instanceId The instance of the PHY
-*
-* \return The status of the operation.
-*
-********************************************************************************** */
-phyStatus_t MAC_PD_SapHandler(macToPdDataMessage_t *pMsg, instanceId_t phyInstance)
-{
- phyStatus_t result = gPhySuccess_c;
- uint8_t baseIndex = 0;
-
- if( NULL == pMsg )
- {
- return gPhyInvalidParameter_c;
- }
-
-#if gMpmIncluded_d
- if( pMsg->msgType == gPdIndQueueInsertReq_c || pMsg->msgType == gPdIndQueueRemoveReq_c )
- {
- baseIndex = MPM_GetRegSet( MPM_GetPanIndex( pMsg->macInstance ) ) *
- (gPhyIndirectQueueSize_c/gMpmPhyPanRegSets_c);
- }
-#endif
-
- switch( pMsg->msgType )
- {
- case gPdIndQueueInsertReq_c:
- result = PhyPp_IndirectQueueInsert(baseIndex + pMsg->msgData.indQueueInsertReq.index,
- pMsg->msgData.indQueueInsertReq.checksum,
- phyInstance);
- break;
-
- case gPdIndQueueRemoveReq_c:
- result = PhyPp_RemoveFromIndirect(baseIndex + pMsg->msgData.indQueueRemoveReq.index,
- phyInstance);
- break;
-
- case gPdDataReq_c:
- //MSG_Queue(&phyLocal[phyInstance].macPhyInputQueue, pMsg);
- phyLocal[phyInstance].pMsgIn = (phyMessageHeader_t *)pMsg;
- Phy24Task( &phyLocal[phyInstance] );
- break;
-
- default:
- result = gPhyInvalidPrimitive_c;
- }
-
- return result;
-}
-
-/*! *********************************************************************************
-* \brief This is the PLME SAP message handler
-*
-* \param[in] pMsg Pointer to the PLME request message
-* \param[in] instanceId The instance of the PHY
-*
-* \return phyStatus_t The status of the operation.
-*
-********************************************************************************** */
-phyStatus_t MAC_PLME_SapHandler(macToPlmeMessage_t * pMsg, instanceId_t phyInstance)
-{
- Phy_PhyLocalStruct_t *pPhyStruct = &phyLocal[phyInstance];
- uint8_t phyRegSet = 0;
-#if gMpmIncluded_d
- phyStatus_t result;
- int32_t panIdx = MPM_GetPanIndex( pMsg->macInstance );
-
- phyRegSet = MPM_GetRegSet( panIdx );
-#endif
-
- if( NULL == pMsg )
- {
- return gPhyInvalidParameter_c;
- }
-
- switch( pMsg->msgType )
- {
- case gPlmeEdReq_c:
- case gPlmeCcaReq_c:
- //MSG_Queue(&phyLocal[phyInstance].macPhyInputQueue, pMsg);
- phyLocal[phyInstance].pMsgIn = (phyMessageHeader_t *)pMsg;
- Phy24Task( &phyLocal[phyInstance] );
- break;
-
- case gPlmeSetReq_c:
-#if gMpmIncluded_d
- result = MPM_SetPIB(pMsg->msgData.setReq.PibAttribute,
- &pMsg->msgData.setReq.PibAttributeValue,
- panIdx );
- if( !MPM_isPanActive(panIdx) )
- {
- return result;
- }
-#endif
- return PhyPlmeSetPIBRequest(pMsg->msgData.setReq.PibAttribute, pMsg->msgData.setReq.PibAttributeValue, phyRegSet, phyInstance);
-
- case gPlmeGetReq_c:
-#if gMpmIncluded_d
- if( gPhySuccess_c == MPM_GetPIB(pMsg->msgData.getReq.PibAttribute, pMsg->msgData.getReq.pPibAttributeValue, panIdx) )
- {
- break;
- }
-#endif
- return PhyPlmeGetPIBRequest( pMsg->msgData.getReq.PibAttribute, pMsg->msgData.getReq.pPibAttributeValue, phyRegSet, phyInstance);
-
- case gPlmeSetTRxStateReq_c:
- if(gPhySetRxOn_c == pMsg->msgData.setTRxStateReq.state)
- {
- if( PhyIsIdleRx(phyInstance) )
- {
- PhyPlmeForceTrxOffRequest();
- }
- else if( gIdle_c != PhyGetSeqState() )
- {
- return gPhyBusy_c;
- }
-#if gMpmIncluded_d
- /* If another PAN has the RxOnWhenIdle PIB set, enable the DualPan Auto mode */
- if( gPhySuccess_c != MPM_PrepareForRx( pMsg->macInstance ) )
- return gPhyBusy_c;
-#endif
- pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
- Phy_SetSequenceTiming(pMsg->msgData.setTRxStateReq.startTime,
- pMsg->msgData.setTRxStateReq.rxDuration);
-
- return PhyPlmeRxRequest(pMsg->msgData.setTRxStateReq.slottedMode, (phyRxParams_t *) &pPhyStruct->rxParams);
- }
- else if (gPhyForceTRxOff_c == pMsg->msgData.setTRxStateReq.state)
- {
-#if gMpmIncluded_d
- if( !MPM_isPanActive(panIdx) )
- return gPhySuccess_c;
-#endif
- pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
- PhyPlmeForceTrxOffRequest();
- }
- break;
-
- default:
- return gPhyInvalidPrimitive_c;
- }
-
- return gPhySuccess_c;
-}
-
-/*! *********************************************************************************
-* \brief This function programs a new TX sequence
-*
-* \param[in] pMsg Pointer to the PD request message
-* \param[in] pPhyData pointer to PHY data
-*
-* \return The status of the operation.
-*
-********************************************************************************** */
-static phyStatus_t Phy_HandlePdDataReq( Phy_PhyLocalStruct_t *pPhyData, macToPdDataMessage_t * pMsg )
-{
- phyStatus_t status = gPhySuccess_c;
- uint32_t time;
-
- if( NULL == pMsg->msgData.dataReq.pPsdu )
- {
- return gPhyInvalidParameter_c;
- }
-
- ProtectFromXcvrInterrupt();
-
- if( pMsg->msgData.dataReq.startTime != gPhySeqStartAsap_c )
- {
- PhyTimeSetEventTrigger( (uint16_t) pMsg->msgData.dataReq.startTime );
- }
-
- status = PhyPdDataRequest(&pMsg->msgData.dataReq , &pPhyData->rxParams, &pPhyData->txParams);
-
- if( pMsg->msgData.dataReq.txDuration != gPhySeqStartAsap_c )
- {
- arm_enter_critical();
- PhyTimeReadClock( &time );
- time += pMsg->msgData.dataReq.txDuration;
- /* Compensate PHY overhead, including WU time */
- time += 54;
- PhyTimeSetEventTimeout( &time );
- arm_exit_critical();
- }
-
- UnprotectFromXcvrInterrupt();
-
- if( gPhySuccess_c != status )
- {
- PhyTimeDisableEventTrigger();
- PhyTimeDisableEventTimeout();
- }
-
- return status;
-}
-
-/*! *********************************************************************************
-* \brief This function sets the start time and the timeout value for a sequence.
-*
-* \param[in] startTime The absolute start time for the sequence.
-* If startTime is gPhySeqStartAsap_c, the start timer is disabled.
-* \param[in] seqDuration The duration of the sequence.
-* If seqDuration is 0xFFFFFFFF, the timeout is disabled.
-*
-********************************************************************************** */
-void Phy_SetSequenceTiming(uint32_t startTime, uint32_t seqDuration)
-{
- uint32_t endTime;
-
- arm_enter_critical();
-
- if( gPhySeqStartAsap_c == startTime )
- {
- PhyTimeReadClock( &endTime );
- }
- else
- {
- PhyTimeSetEventTrigger( (uint16_t) startTime );
- endTime = startTime & gPhyTimeMask_c;
- }
-
- if( 0xFFFFFFFF != seqDuration )
- {
- endTime += seqDuration;
- endTime = endTime & gPhyTimeMask_c;
-
- PhyTimeSetEventTimeout( &(endTime) );
- }
-
- arm_exit_critical();
-}
-
-/*! *********************************************************************************
-* \brief This function starts the IdleRX if the PhyRxOnWhenIdle PIB is set
-*
-* \param[in] pPhyData pointer to PHY data
-*
-********************************************************************************** */
-void Phy_EnterIdle( Phy_PhyLocalStruct_t *pPhyData )
-{
- if( (pPhyData->flags & gPhyFlagRxOnWhenIdle_c)
-#if gMpmIncluded_d
- /* Prepare the Active PAN/PANs */
- && (gPhySuccess_c == MPM_PrepareForRx(gInvalidInstanceId_c))
-#endif
- )
- {
- pPhyData->flags |= gPhyFlagIdleRx_c;
- Phy_SetSequenceTiming( gPhySeqStartAsap_c, mPhyMaxIdleRxDuration_c );
- (void)PhyPlmeRxRequest( gPhyUnslottedMode_c, (phyRxParams_t*)&pPhyData->rxParams );
- }
- else
- {
- pPhyData->flags &= ~(gPhyFlagIdleRx_c);
- }
-}
-
-/*! *********************************************************************************
-* \brief This function sets the value of the maxFrameWaitTime PIB
-*
-* \param[in] instanceId The instance of the PHY
-* \param[in] time The maxFrameWaitTime value
-*
-********************************************************************************** */
-void PhyPlmeSetFrameWaitTime( uint32_t time, instanceId_t instanceId )
-{
- phyLocal[instanceId].maxFrameWaitTime = time;
-}
-
-/*! *********************************************************************************
-* \brief This function sets the state of the PhyRxOnWhenIdle PIB
-*
-* \param[in] instanceId The instance of the PHY
-* \param[in] state The PhyRxOnWhenIdle value
-*
-********************************************************************************** */
-void PhyPlmeSetRxOnWhenIdle( bool_t state, instanceId_t instanceId )
-{
- uint8_t radioState = PhyGetSeqState();
-#if gMpmIncluded_d
- /* Check if at least one PAN has RxOnWhenIdle set */
- if( FALSE == state )
- {
- uint32_t i;
-
- for( i=0; i<gMpmMaxPANs_c; i++ )
- {
- MPM_GetPIB( gPhyPibRxOnWhenIdle, &state, i );
- if( state )
- break;
- }
- }
-#endif
- if( state )
- {
- phyLocal[instanceId].flags |= gPhyFlagRxOnWhenIdle_c;
- if( radioState == gIdle_c)
- {
- Phy_EnterIdle( &phyLocal[instanceId] );
- }
-#if gMpmIncluded_d
- else if( (radioState == gRX_c) && (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
- {
- PhyPlmeForceTrxOffRequest();
- Phy_EnterIdle( &phyLocal[instanceId] );
- }
-#endif
- }
- else
- {
- phyLocal[instanceId].flags &= ~gPhyFlagRxOnWhenIdle_c;
- if( (radioState == gRX_c) && (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
- {
- PhyPlmeForceTrxOffRequest();
- phyLocal[instanceId].flags &= ~gPhyFlagIdleRx_c;
- }
- }
-}
-
-/*! *********************************************************************************
-* \brief This function starts the IdleRX if the PhyRxOnWhenIdle PIB is set
-*
-* \param[in] instanceId The instance of the PHY
-*
-********************************************************************************** */
-bool_t PhyIsIdleRx( instanceId_t instanceId )
-{
- if( (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) && (gRX_c == PhyGetSeqState()))
- return TRUE;
-
- return FALSE;
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that a TX operation completed successfully.
-* If the received ACK has FP=1, then the radio will enter RX state for
-* maxFrameWaitTime duration.
-*
-* \param[in] instanceId The instance of the PHY
-* \param[in] framePending The value of the framePending bit for the received ACK
-*
-********************************************************************************** */
-void Radio_Phy_PdDataConfirm(instanceId_t instanceId, bool_t framePending)
-{
- PhyTimeDisableEventTimeout();
-
- if( framePending )
- {
- phyLocal[instanceId].flags |= gPhyFlagFramePending_c;
- if( phyLocal[instanceId].maxFrameWaitTime > 0 )
- {
- /* Restart Rx asap if an ACK with FP=1 is received */
- phyLocal[instanceId].flags &= ~(gPhyFlagIdleRx_c);
- Phy_SetSequenceTiming( gPhySeqStartAsap_c, phyLocal[instanceId].maxFrameWaitTime );
- PhyPlmeRxRequest( gPhyUnslottedMode_c, (phyRxParams_t *) &phyLocal[instanceId].rxParams );
- }
- }
- else
- {
- phyLocal[instanceId].flags &= ~gPhyFlagFramePending_c;
- }
-
- PD_SendMessage(&phyLocal[instanceId], gPdDataCnf_c);
- Phy24Task(&phyLocal[instanceId]);
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that new data has been received
-*
-* \param[in] instanceId The instance of the PHY
-*
-********************************************************************************** */
-void Radio_Phy_PdDataIndication(instanceId_t instanceId)
-{
- PhyTimeDisableEventTimeout();
-
- PD_SendMessage(&phyLocal[instanceId], gPdDataInd_c);
- Phy24Task(&phyLocal[instanceId]);
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that timer1 compare match occured
-*
-* \param[in] instanceId The instance of the PHY
-*
-********************************************************************************** */
-void Radio_Phy_TimeWaitTimeoutIndication(instanceId_t instanceId)
-{
- PhyTime_ISR();
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that a CCA sequence has finished
-*
-* \param[in] instanceId The instance of the PHY
-* \param[in] phyChannelStatus The status of the channel: Idle/Busy
-*
-* \return None.
-*
-********************************************************************************** */
-void Radio_Phy_PlmeCcaConfirm(phyStatus_t phyChannelStatus, instanceId_t instanceId)
-{
- PhyTimeDisableEventTimeout();
-
- phyLocal[instanceId].channelParams.channelStatus = phyChannelStatus;
-
- PLME_SendMessage(&phyLocal[instanceId], gPlmeCcaCnf_c);
- Phy24Task(&phyLocal[instanceId]);
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that a ED sequence has finished
-*
-* \param[in] instanceId The instance of the PHY
-* \param[in] energyLevel The enetgy level on the channel.
-* \param[in] energyLeveldB The energy level in DB
-*
-********************************************************************************** */
-void Radio_Phy_PlmeEdConfirm(uint8_t energyLeveldB, instanceId_t instanceId)
-{
- PhyTimeDisableEventTimeout();
-
- phyLocal[instanceId].channelParams.energyLeveldB = energyLeveldB;
-
- PLME_SendMessage(&phyLocal[instanceId], gPlmeEdCnf_c);
- Phy24Task(&phyLocal[instanceId]);
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that the programmed sequence has timed out
-* The Radio is forced to Idle.
-*
-* \param[in] instanceId The instance of the PHY
-*
-********************************************************************************** */
-void Radio_Phy_TimeRxTimeoutIndication(instanceId_t instanceId)
-{
- if( !(phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
- PLME_SendMessage(&phyLocal[instanceId], gPlmeTimeoutInd_c);
-
- Phy24Task(&phyLocal[instanceId]);
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that the programmed sequence has started
-*
-* \param[in] instanceId The instance of the PHY
-*
-* \return None.
-*
-********************************************************************************** */
-void Radio_Phy_TimeStartEventIndication(instanceId_t instanceId)
-{
-#ifdef MAC_PHY_DEBUG
- PLME_SendMessage(&phyLocal[instanceId], gPlme_StartEventInd_c);
- Phy24Task(&phyLocal[instanceId]);
-#endif
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that a SFD was detected.
-* Also, if there is not enough time to receive the entire packet, the
-* RX timeout will be extended.
-*
-* \param[in] instanceId The instance of the PHY
-* \param[in] frameLen the length of the PSDU
-*
-********************************************************************************** */
-void Radio_Phy_PlmeRxSfdDetect(instanceId_t instanceId, uint32_t frameLen)
-{
- if( phyLocal[instanceId].flags & gPhyFlagDeferTx_c )
- {
- uint32_t currentTime;
- uint32_t time;
-
- arm_enter_critical();
-
- //Read currentTime and Timeout values [sym]
- PhyTimeReadClock(¤tTime);
-
- frameLen = frameLen * 2 + 12 + 22 + 2; //Convert to symbols and add IFS and ACK duration
-
- if( mPhySeqTimeout > currentTime )
- {
- time = mPhySeqTimeout - currentTime;
- }
- else
- {
- time = (gPhyTimeMask_c - currentTime + mPhySeqTimeout) & gPhyTimeMask_c;
- }
-
- if( time > 4 )
- {
- mPhySeqTimeout = (currentTime + frameLen) & gPhyTimeMask_c;
- MCR20Drv_DirectAccessSPIMultiByteWrite( T3CMP_LSB, (uint8_t *)&mPhySeqTimeout, 3);
- }
-
- arm_exit_critical();
- }
-
-#ifdef MAC_PHY_DEBUG
- PLME_SendMessage(&phyLocal[instanceId], gPlme_RxSfdDetectInd_c);
- Phy24Task(&phyLocal[instanceId]);
-#endif
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that a Sync Loss occured (PLL unlock)
-* The Radio is forced to Idle.
-*
-* \param[in] instanceId The instance of the PHY
-*
-********************************************************************************** */
-void Radio_Phy_PlmeSyncLossIndication(instanceId_t instanceId)
-{
- PhyPlmeForceTrxOffRequest();
-#ifdef MAC_PHY_DEBUG
- PLME_SendMessage(&phyLocal[instanceId], gPlme_SyncLossInd_c);
-#endif
- Radio_Phy_TimeRxTimeoutIndication(instanceId);
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that a Filter Fail occured
-*
-* \param[in] instanceId The instance of the PHY
-*
-********************************************************************************** */
-void Radio_Phy_PlmeFilterFailRx(instanceId_t instanceId)
-{
-#ifdef MAC_PHY_DEBUG
- PLME_SendMessage(&phyLocal[instanceId], gPlme_FilterFailInd_c);
- Phy24Task(&phyLocal[instanceId]);
-#endif
-}
-
-/*! *********************************************************************************
-* \brief This function signals the PHY task that an unexpected Transceiver Reset
-* occured and force the TRX to Off
-*
-* \param[in] instanceId The instance of the PHY
-*
-********************************************************************************** */
-void Radio_Phy_UnexpectedTransceiverReset(instanceId_t instanceId)
-{
- PhyPlmeForceTrxOffRequest();
-#ifdef MAC_PHY_DEBUG
- PLME_SendMessage(&phyLocal[instanceId], gPlme_UnexpectedRadioResetInd_c);
-#endif
- Radio_Phy_TimeRxTimeoutIndication(instanceId);
-}
-
-/*! *********************************************************************************
-* \brief Senf a PLME message to upper layer
-*
-* \param[in] instanceId The instance of the PHY
-* \param[in] msgType The type of message to be sent
-*
-********************************************************************************** */
-static void PLME_SendMessage(Phy_PhyLocalStruct_t *pPhyStruct, phyMessageId_t msgType)
-{
- //plmeToMacMessage_t * pMsg = MEM_BufferAlloc(sizeof(plmeToMacMessage_t));
- plmeToMacMessage_t * pMsg = (plmeToMacMessage_t *)malloc(sizeof(plmeToMacMessage_t));
-
- if(NULL == pMsg)
- {
- //panic(0,(uint32_t)PLME_SendMessage,0,msgType);
- return;
- }
-
- pMsg->msgType = msgType;
-
- switch(msgType)
- {
- case gPlmeCcaCnf_c:
- pMsg->msgData.ccaCnf.status = pPhyStruct->channelParams.channelStatus;
- break;
-
- case gPlmeEdCnf_c:
- pMsg->msgData.edCnf.status = gPhySuccess_c;
- pMsg->msgData.edCnf.energyLeveldB = pPhyStruct->channelParams.energyLeveldB;
- pMsg->msgData.edCnf.energyLevel = Phy_GetEnergyLevel(pPhyStruct->channelParams.energyLeveldB);
- break;
-
- default:
- /* No aditional info needs to be filled */
- break;
- }
-
- pPhyStruct->PLME_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
-}
-
-/*! *********************************************************************************
-* \brief Senf a PD message to upper layer
-*
-* \param[in] instanceId The instance of the PHY
-* \param[in] msgType The type of message to be sent
-*
-********************************************************************************** */
-static void PD_SendMessage(Phy_PhyLocalStruct_t *pPhyStruct, phyMessageId_t msgType)
-{
- pdDataToMacMessage_t *pMsg;
-
- if( msgType == gPdDataInd_c )
- {
- uint32_t temp;
- uint16_t len = pPhyStruct->rxParams.psduLength - 2; //Excluding FCS (2 bytes);
-
- pMsg = pPhyStruct->rxParams.pRxData;
- pPhyStruct->rxParams.pRxData = NULL;
-
-#if !gUsePBTransferThereshold_d
- MCR20Drv_PB_SPIBurstRead( (uint8_t *)(pMsg->msgData.dataInd.pPsdu), len );
-#endif
-
- pMsg->msgType = gPdDataInd_c;
- pMsg->msgData.dataInd.ppduLinkQuality = pPhyStruct->rxParams.linkQuality;
- pMsg->msgData.dataInd.psduLength = len;
-
- pMsg->msgData.dataInd.timeStamp = PhyTime_GetTimestamp(); //current timestamp (64bit)
- temp = (uint32_t)(pMsg->msgData.dataInd.timeStamp & gPhyTimeMask_c); //convert to 24bit
- pMsg->msgData.dataInd.timeStamp -= (temp - pPhyStruct->rxParams.timeStamp) & gPhyTimeMask_c;
-#if !(gMpmIncluded_d)
- pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
-#else
- {
- uint32_t i, bitMask = PhyPpGetPanOfRxPacket();
-
- for( i=0; i<gMpmPhyPanRegSets_c; i++ )
- {
- if( bitMask & (1 << i) )
- {
- bitMask &= ~(1 << i);
- pPhyStruct->currentMacInstance = MPM_GetMacInstanceFromRegSet(i);
-
- /* If the packet passed filtering on muliple PANs, send a copy to each one */
- if( bitMask )
- {
- pdDataToMacMessage_t *pDataIndCopy;
-
- //pDataIndCopy = MEM_BufferAlloc(sizeof(pdDataToMacMessage_t) + len);
- pDataIndCopy = (pdDataToMacMessage_t *)malloc(sizeof(pdDataToMacMessage_t) + len);
- if( pDataIndCopy )
- {
- FLib_MemCpy(pDataIndCopy, pMsg, sizeof(pdDataToMacMessage_t) + len);
- pPhyStruct->PD_MAC_SapHandler(pDataIndCopy, pPhyStruct->currentMacInstance);
- }
- }
- else
- {
- pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
- break;
- }
- }
- }
- }
-#endif
- }
- else
- {
- //pMsg = MEM_BufferAlloc( sizeof(pdDataToMacMessage_t) );
- pMsg = (pdDataToMacMessage_t *) malloc( sizeof(pdDataToMacMessage_t) );
-
- if(NULL == pMsg)
- {
- //panic(0,(uint32_t)PD_SendMessage,0,gPdDataCnf_c);
- return;
- }
-
- pMsg->msgType = gPdDataCnf_c;
-
- if( pPhyStruct->flags & gPhyFlagFramePending_c )
- {
- pPhyStruct->flags &= ~(gPhyFlagFramePending_c);
- pMsg->msgData.dataCnf.status = gPhyFramePending_c;
- }
- else
- {
- pMsg->msgData.dataCnf.status = gPhySuccess_c;
- }
-
- pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
- }
-}
\ No newline at end of file
--- a/RF_Drivers_Freescale/PhyTime.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,703 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file PhyTime.c
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-#include "EmbeddedTypes.h"
-//#include "fsl_os_abstraction.h"
-#include "MCR20Drv.h"
-#include "MCR20Reg.h"
-#include "Phy.h"
-
-//#include "FunctionLib.h"
-#include "arm_hal_interrupt.h"
-
-/************************************************************************************
-*************************************************************************************
-* Private macros
-*************************************************************************************
-************************************************************************************/
-#define gPhyTimeMinSetupTime_c (10) /* symbols */
-
-/************************************************************************************
-*************************************************************************************
-* Public memory declarations
-*************************************************************************************
-************************************************************************************/
-void (*gpfPhyTimeNotify)(void) = NULL;
-
-/************************************************************************************
-*************************************************************************************
-* Private memory declarations
-*************************************************************************************
-************************************************************************************/
-static phyTimeEvent_t mPhyTimers[gMaxPhyTimers_c];
-static phyTimeEvent_t *pNextEvent;
-volatile uint32_t mPhySeqTimeout;
-volatile uint64_t gPhyTimerOverflow;
-
-/************************************************************************************
-*************************************************************************************
-* Private prototypes
-*************************************************************************************
-************************************************************************************/
-static void PhyTime_OverflowCB( uint32_t param );
-static phyTimeEvent_t* PhyTime_GetNextEvent( void );
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-
-/*! *********************************************************************************
-* \brief Sets the start time of a sequence
-*
-* \param[in] startTime the start time for a sequence
-*
-********************************************************************************** */
-void PhyTimeSetEventTrigger
-(
- uint32_t startTime
-)
-{
- uint8_t phyReg, phyCtrl3Reg;
-
- arm_enter_critical();
-
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg |= cPHY_CTRL1_TMRTRIGEN; // enable autosequence start by TC2 match
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
-
- phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
- phyCtrl3Reg &= ~(cPHY_CTRL3_TMR2CMP_EN);// disable TMR2 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
-
- MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T2PRIMECMP_LSB, (uint8_t *) &startTime, 2);
-
- phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
- phyReg &= 0xF0; // do not change other IRQs status
- phyReg &= ~(cIRQSTS3_TMR2MSK); // unmask TMR2 interrupt
- phyReg |= (cIRQSTS3_TMR2IRQ); // aknowledge TMR2 IRQ
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
-
- // TC2PRIME_EN must be enabled in PHY_CTRL4 register
- phyCtrl3Reg |= cPHY_CTRL3_TMR2CMP_EN; // enable TMR2 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
-
- arm_exit_critical();
-}
-
-/*! *********************************************************************************
-* \brief Disable the time trigger for a sequence.
-*
-* \remarks The sequence will start asap
-*
-********************************************************************************** */
-void PhyTimeDisableEventTrigger
-(
- void
-)
-{
- uint8_t phyReg;
-
- arm_enter_critical();
-
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
- phyReg &= ~(cPHY_CTRL1_TMRTRIGEN); // disable autosequence start by TC2 match
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
-
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
- phyReg &= ~(cPHY_CTRL3_TMR2CMP_EN);// disable TMR2 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
-
- phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
- phyReg &= 0xF0; // do not change other IRQs status
- phyReg |= (cIRQSTS3_TMR2MSK); // mask TMR2 interrupt
- phyReg |= (cIRQSTS3_TMR2IRQ); // aknowledge TMR2 IRQ
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
-
- arm_exit_critical();
-}
-
-/*! *********************************************************************************
-* \brief Sets the timeout value for a sequence
-*
-* \param[in] pEndTime the absolute time when a sequence should terminate
-*
-* \remarks If the sequence does not finish until the timeout, it will be aborted
-*
-********************************************************************************** */
-void PhyTimeSetEventTimeout
-(
- uint32_t *pEndTime
-)
-{
- uint8_t phyReg, phyCtrl3Reg;
-
-#ifdef PHY_PARAMETERS_VALIDATION
- if(NULL == pEndTime)
- {
- return;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- arm_enter_critical();
-
- phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
- phyCtrl3Reg &= ~(cPHY_CTRL3_TMR3CMP_EN);// disable TMR3 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
-
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
- phyReg |= cPHY_CTRL4_TC3TMOUT; // enable autosequence stop by TC3 match
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
-
- mPhySeqTimeout = *pEndTime & 0x00FFFFFF;
- MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T3CMP_LSB, (uint8_t *) pEndTime, 3);
-
- phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
- phyReg &= 0xF0; // do not change IRQ status
-// phyReg &= ~(cIRQSTS3_TMR3MSK); // unmask TMR3 interrupt
- phyReg |= (cIRQSTS3_TMR3IRQ); // aknowledge TMR3 IRQ
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
-
- phyCtrl3Reg |= cPHY_CTRL3_TMR3CMP_EN; // enable TMR3 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
-
- arm_exit_critical();
-}
-
-/*! *********************************************************************************
-* \brief Return the timeout value for the current sequence
-*
-* \return uint32_t the timeout value
-*
-********************************************************************************** */
-uint32_t PhyTimeGetEventTimeout( void )
-{
- return mPhySeqTimeout;
-}
-
-/*! *********************************************************************************
-* \brief Disables the sequence timeout
-*
-********************************************************************************** */
-void PhyTimeDisableEventTimeout
-(
- void
-)
-{
- uint8_t phyReg;
-
- arm_enter_critical();
-
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
- phyReg &= ~(cPHY_CTRL4_TC3TMOUT); // disable autosequence stop by TC3 match
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
-
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
- phyReg &= ~(cPHY_CTRL3_TMR3CMP_EN);// disable TMR3 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
-
- phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
- phyReg &= 0xF0; // do not change IRQ status
- phyReg |= cIRQSTS3_TMR3IRQ; // aknowledge TMR3 IRQ
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
-
- arm_exit_critical();
-}
-
-/*! *********************************************************************************
-* \brief Reads the absolute clock from the radio
-*
-* \param[out] pRetClk pointer to a location where the current clock will be stored
-*
-********************************************************************************** */
-void PhyTimeReadClock
-(
- uint32_t *pRetClk
-)
-{
-#ifdef PHY_PARAMETERS_VALIDATION
- if(NULL == pRetClk)
- {
- return;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- arm_enter_critical();
-
- MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) EVENT_TMR_LSB, (uint8_t *) pRetClk, 3);
- *(((uint8_t *)pRetClk) + 3) = 0;
-
- arm_exit_critical();
-
-}
-
-/*! *********************************************************************************
-* \brief Initialize the Event Timer
-*
-* \param[in] pAbsTime pointer to the location where the new time is stored
-*
-********************************************************************************** */
-void PhyTimeInitEventTimer
-(
- uint32_t *pAbsTime
-)
-{
- uint8_t phyCtrl4Reg;
-
-#ifdef PHY_PARAMETERS_VALIDATION
- if(NULL == pAbsTime)
- {
- return;
- }
-#endif // PHY_PARAMETERS_VALIDATION
-
- arm_enter_critical();
-
- phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
- phyCtrl4Reg |= cPHY_CTRL4_TMRLOAD; // self clearing bit
-
- MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T1CMP_LSB, (uint8_t *) pAbsTime, 3);
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
-
- arm_exit_critical();
-}
-
-/*! *********************************************************************************
-* \brief Set TMR1 timeout value
-*
-* \param[in] pWaitTimeout the timeout value
-*
-********************************************************************************** */
-void PhyTimeSetWaitTimeout
-(
- uint32_t *pWaitTimeout
-)
-{
- uint8_t phyCtrl3Reg, irqSts3Reg;
-
- arm_enter_critical();
-
- phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
- phyCtrl3Reg &= ~(cPHY_CTRL3_TMR1CMP_EN);// disable TMR1 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
-
- MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T1CMP_LSB, (uint8_t *) pWaitTimeout, 3);
-
- irqSts3Reg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
- irqSts3Reg &= ~(cIRQSTS3_TMR1MSK); // unmask TMR1 interrupt
- irqSts3Reg &= 0xF0; // do not change other IRQs status
- irqSts3Reg |= (cIRQSTS3_TMR1IRQ); // aknowledge TMR1 IRQ
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, irqSts3Reg);
-
- phyCtrl3Reg |= cPHY_CTRL3_TMR1CMP_EN; // enable TMR1 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
-
- arm_exit_critical();
-
-}
-
-/*! *********************************************************************************
-* \brief Disable the TMR1 timeout
-*
-********************************************************************************** */
-void PhyTimeDisableWaitTimeout
-(
- void
-)
-{
- uint8_t phyReg;
-
- arm_enter_critical();
-
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
- phyReg &= ~(cPHY_CTRL3_TMR1CMP_EN);// disable TMR1 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
-
- phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
- phyReg &= 0xF0; // do not change IRQ status
- phyReg |= cIRQSTS3_TMR1IRQ; // aknowledge TMR1 IRQ
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
-
- arm_exit_critical();
-}
-
-/*! *********************************************************************************
-* \brief Set TMR4 timeout value
-*
-* \param[in] pWakeUpTime absolute time
-*
-********************************************************************************** */
-void PhyTimeSetWakeUpTime
-(
- uint32_t *pWakeUpTime
-)
-{
- uint8_t phyCtrl3Reg, irqSts3Reg;
-
- arm_enter_critical();
-
- phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
-// phyCtrl3Reg &= ~(cPHY_CTRL3_TMR4CMP_EN);// disable TMR4 compare
-// MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
-
- MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T4CMP_LSB, (uint8_t *) pWakeUpTime, 3);
-
- irqSts3Reg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
- irqSts3Reg &= ~(cIRQSTS3_TMR4MSK); // unmask TMR4 interrupt
- irqSts3Reg &= 0xF0; // do not change other IRQs status
- irqSts3Reg |= (cIRQSTS3_TMR4IRQ); // aknowledge TMR4 IRQ
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, irqSts3Reg);
-
- phyCtrl3Reg |= cPHY_CTRL3_TMR4CMP_EN; // enable TMR4 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
-
- arm_exit_critical();
-}
-
-/*! *********************************************************************************
-* \brief Check if TMR4 IRQ occured, and aknowledge it
-*
-* \return TRUE if TMR4 IRQ occured
-*
-********************************************************************************** */
-bool_t PhyTimeIsWakeUpTimeExpired
-(
- void
-)
-{
- bool_t wakeUpIrq = FALSE;
- uint8_t phyReg;
-
- arm_enter_critical();
-
- phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
- phyReg &= ~(cPHY_CTRL3_TMR4CMP_EN);// disable TMR4 compare
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
-
- phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
-
- if( (phyReg & cIRQSTS3_TMR4IRQ) == cIRQSTS3_TMR4IRQ )
- {
- wakeUpIrq = TRUE;
- }
-
- phyReg &= ~(cIRQSTS3_TMR4MSK); // unmask TMR4 interrupt
- phyReg &= 0xF0; // do not change other IRQs status
- phyReg |= (cIRQSTS3_TMR4IRQ); // aknowledge TMR2 IRQ
-
- MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
-
- arm_exit_critical();
-
- return wakeUpIrq;
-}
-
-
-/*! *********************************************************************************
-* \brief PHY Timer Interrupt Service Routine
-*
-********************************************************************************** */
-void PhyTime_ISR(void)
-{
- if( pNextEvent->callback == PhyTime_OverflowCB )
- {
- gPhyTimerOverflow++;
- }
-
- if( gpfPhyTimeNotify )
- {
- gpfPhyTimeNotify();
- }
- else
- {
- PhyTime_RunCallback();
- PhyTime_Maintenance();
- }
-}
-
-/*! *********************************************************************************
-* \brief Initialize the PHY Timer module
-*
-* \return phyTimeStatus_t
-*
-********************************************************************************** */
-phyTimeStatus_t PhyTime_TimerInit( void (*cb)(void) )
-{
- if( gpfPhyTimeNotify )
- return gPhyTimeError_c;
-
- gpfPhyTimeNotify = cb;
- gPhyTimerOverflow = 0;
- memset( mPhyTimers, 0, sizeof(mPhyTimers) );
-
- /* Schedule Overflow Calback */
- pNextEvent = &mPhyTimers[0];
- pNextEvent->callback = PhyTime_OverflowCB;
- pNextEvent->timestamp = (gPhyTimerOverflow+1) << gPhyTimeShift_c;
- PhyTimeSetWaitTimeout( (uint32_t*)&pNextEvent->timestamp );
-
- return gPhyTimeOk_c;
-}
-
-/*! *********************************************************************************
-* \brief Returns a 64bit timestamp value to be used by the MAC Layer
-*
-* \return phyTimeTimestamp_t PHY timestamp
-*
-********************************************************************************** */
-phyTimeTimestamp_t PhyTime_GetTimestamp(void)
-{
- phyTimeTimestamp_t time = 0;
-
- arm_enter_critical();
- PhyTimeReadClock( (uint32_t*)&time );
- time |= (gPhyTimerOverflow << gPhyTimeShift_c);
- arm_exit_critical();
-
- return time;
-}
-
-/*! *********************************************************************************
-* \brief Schedules an event
-*
-* \param[in] pEvent event to be scheduled
-*
-* \return phyTimeTimerId_t the id of the alocated timer
-*
-********************************************************************************** */
-phyTimeTimerId_t PhyTime_ScheduleEvent( phyTimeEvent_t *pEvent )
-{
- phyTimeTimerId_t tmr;
-
- /* Parameter validation */
- if( NULL == pEvent->callback )
- {
- return gInvalidTimerId_c;
- }
-
- /* Search for a free slot (slot 0 is reserved for the Overflow calback) */
- arm_enter_critical();
- for( tmr=1; tmr<gMaxPhyTimers_c; tmr++ )
- {
- if( mPhyTimers[tmr].callback == NULL )
- {
- mPhyTimers[tmr] = *pEvent;
- break;
- }
- }
- arm_exit_critical();
-
- if( tmr >= gMaxPhyTimers_c )
- return gInvalidTimerId_c;
-
- /* Program the next event */
- if((NULL == pNextEvent) ||
- (NULL != pNextEvent && mPhyTimers[tmr].timestamp < pNextEvent->timestamp))
- {
- PhyTime_Maintenance();
- }
-
- return tmr;
-}
-
-/*! *********************************************************************************
-* \brief Cancel an event
-*
-* \param[in] timerId the Id of the timer
-*
-* \return phyTimeStatus_t
-*
-********************************************************************************** */
-phyTimeStatus_t PhyTime_CancelEvent( phyTimeTimerId_t timerId )
-{
- if( (timerId == 0) || (timerId >= gMaxPhyTimers_c) || (NULL == mPhyTimers[timerId].callback) )
- {
- return gPhyTimeNotFound_c;
- }
-
- arm_enter_critical();
- if( pNextEvent == &mPhyTimers[timerId] )
- pNextEvent = NULL;
-
- mPhyTimers[timerId].callback = NULL;
- arm_exit_critical();
-
- return gPhyTimeOk_c;
-}
-
-/*! *********************************************************************************
-* \brief Cancel all event with the specified paameter
-*
-* \param[in] param event parameter
-*
-* \return phyTimeStatus_t
-*
-********************************************************************************** */
-phyTimeStatus_t PhyTime_CancelEventsWithParam ( uint32_t param )
-{
- uint32_t i;
- phyTimeStatus_t status = gPhyTimeNotFound_c;
-
- arm_enter_critical();
- for( i=1; i<gMaxPhyTimers_c; i++ )
- {
- if( mPhyTimers[i].callback && (param == mPhyTimers[i].parameter) )
- {
- status = gPhyTimeOk_c;
- mPhyTimers[i].callback = NULL;
- if( pNextEvent == &mPhyTimers[i] )
- pNextEvent = NULL;
- }
- }
- arm_exit_critical();
-
- return status;
-}
-
-/*! *********************************************************************************
-* \brief Run the callback for the recently expired event
-*
-********************************************************************************** */
-void PhyTime_RunCallback( void )
-{
- uint32_t param;
- phyTimeCallback_t cb;
-
- if( pNextEvent )
- {
- arm_enter_critical();
-
- param = pNextEvent->parameter;
- cb = pNextEvent->callback;
- pNextEvent->callback = NULL;
- pNextEvent = NULL;
-
- arm_exit_critical();
-
- cb(param);
- }
-}
-
-/*! *********************************************************************************
-* \brief Expire events too close to be scheduled.
-* Program the next event
-*
-********************************************************************************** */
-void PhyTime_Maintenance( void )
-{
- phyTimeTimestamp_t currentTime;
- phyTimeEvent_t *pEv;
-
- PhyTimeDisableWaitTimeout();
-
- while(1)
- {
- arm_enter_critical();
-
- pEv = PhyTime_GetNextEvent();
- currentTime = PhyTime_GetTimestamp();
-
- /* Program next event if exists */
- if( pEv )
- {
- pNextEvent = pEv;
-
- if( pEv->timestamp > (currentTime + gPhyTimeMinSetupTime_c) )
- {
- PhyTimeSetWaitTimeout( (uint32_t*)&pEv->timestamp );
- pEv = NULL;
- }
- }
-
- arm_exit_critical();
-
- if( !pEv )
- break;
-
- PhyTime_RunCallback();
- }
-
-}
-
-
-/*! *********************************************************************************
-* \brief Timer Overflow callback
-*
-* \param[in] param
-*
-********************************************************************************** */
-static void PhyTime_OverflowCB( uint32_t param )
-{
- (void)param;
-
- /* Reprogram the next overflow callback */
- mPhyTimers[0].callback = PhyTime_OverflowCB;
- mPhyTimers[0].timestamp = (gPhyTimerOverflow+1) << 24;
-}
-
-/*! *********************************************************************************
-* \brief Search for the next event to be scheduled
-*
-* \return phyTimeEvent_t pointer to the next event to be scheduled
-*
-********************************************************************************** */
-static phyTimeEvent_t* PhyTime_GetNextEvent( void )
-{
- phyTimeEvent_t *pEv = NULL;
- uint32_t i;
-
- /* Search for the next event to be serviced */
- for( i=0; i<gMaxPhyTimers_c; i++ )
- {
- if( NULL != mPhyTimers[i].callback )
- {
- if( NULL == pEv )
- {
- pEv = &mPhyTimers[i];
- }
- /* Check which event expires first */
- else if( mPhyTimers[i].timestamp < pEv->timestamp )
- {
- pEv = &mPhyTimers[i];
- }
- }
- }
-
- return pEv;
-}
--- a/RF_Drivers_Freescale/PhyTypes.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,363 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file PhyTypes.h
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#ifndef _PHY_TYPES_H
-#define _PHY_TYPES_H
-
-
-/************************************************************************************
-*************************************************************************************
-* Include
-*************************************************************************************
-************************************************************************************/
-
-/************************************************************************************
-*************************************************************************************
-* Public macros
-*************************************************************************************
-************************************************************************************/
-
-/* WARNING!!! Only one frequency can be declared at a time! */
-#ifdef gPHY_802_15_4g_d
- #ifndef gFreqBand_470__510MHz_d
- #define gFreqBand_470__510MHz_d 0
- #endif
-
- #ifndef gFreqBand_779__787MHz_d
- #define gFreqBand_779__787MHz_d 0
- #endif
-
- #ifndef gFreqBand_863__870MHz_d
- #define gFreqBand_863__870MHz_d 0
- #endif
-
- #ifndef gFreqBand_902__928MHz_d
- #define gFreqBand_902__928MHz_d 0
- #endif
-
- #ifndef gFreqBand_920__928MHz_d
- #define gFreqBand_920__928MHz_d 1
- #endif
-
- #ifndef gFreqBand_863__876MHz_d
- #define gFreqBand_863__876MHz_d 0
- #endif
-
- #ifndef gFreqBand_915__921MHz_d
- #define gFreqBand_915__921MHz_d 0
- #endif
-
- #if gFreqBand_470__510MHz_d
- #define gFreqBandId_d gFreq470__510MHz_c
-
- #elif gFreqBand_779__787MHz_d
- #define gFreqBandId_d gFreq779__787MHz_c
-
- #elif gFreqBand_863__870MHz_d
- #define gFreqBandId_d gFreq863__870MHz_c
-
- #elif gFreqBand_902__928MHz_d
- #define gFreqBandId_d gFreq902__928MHz_c
-
- #elif gFreqBand_920__928MHz_d
- #define gFreqBandId_d gFreq920__928MHz_c
-
- #elif gFreqBand_863__876MHz_d
- #define gFreqBandId_d gFreq863__876MHz_c
-
- #elif gFreqBand_915__921MHz_d
- #define gFreqBandId_d gFreq915__921MHz_c
-
- #else
- #error "No frequency band declared!!!"
- #endif
-#endif // gPHY_802_15_4g_d
-
-/// \note MUST REMAIN UNCHANGED:
-#ifdef gPHY_802_15_4g_d
- #define gPhySymbolsPerOctet_c 8
- #define gPhyMRFSKPHRLength_c 2 /* [bytes] */
-#if (gFreqBand_863__876MHz_d || gFreqBand_915__921MHz_d)
- #define gPhyFSKPreambleLength_c 8 /* [bytes] */
-#else
- #define gPhyFSKPreambleLength_c 16 /* [bytes] */
-#endif
- #define gPhyMRFSKSFDLength_c 2 /* [bytes] */
- #define gMinPHYPacketSize_c 5
- #define gMaxPHYPacketSize_c 254 /* maximum number of bytes that the PHY can transmit or receive */
- #define gPhyFCSSize_c 2 /* [bytes] */
- #define gCCADurationDefault_c 13 /* [symbols] */
- #define gPhySHRDuration_c (gPhySymbolsPerOctet_c * (gPhyFSKPreambleLength_c + gPhyMRFSKSFDLength_c)) /* [symbols] */
- #define gPhyMaxFrameDuration_c (gPhySHRDuration_c + (gPhyMRFSKPHRLength_c + gMaxPHYPacketSize_c) * gPhySymbolsPerOctet_c) /* [symbols] 802.15.4g page 48 formula */
-#else
- #define gCCATime_c 8 /* [symbols] */
- #define gPhyTurnaroundTime_c 12 /* [symbols] RX-to-TX or TX-to-RX maximum turnaround time (in symbol periods)*/
- #define gMinPHYPacketSize_c 5
- #define gMaxPHYPacketSize_c (127) /* maximum number of bytes that the PHY can transmit or receive */
- #define gPhySHRDuration_c (10) /* [symbols] */
- #define gPhySymbolsPerOctet_c (2)
- #define gPhyFCSSize_c (2) /* [bytes] */
- #define gPhyMaxFrameDuration_c (gPhySHRDuration_c + (gMaxPHYPacketSize_c + 1) * gPhySymbolsPerOctet_c)
- #define gUnitBackoffPeriod_c 20 /* [symbols] */
-#endif // gPHY_802_15_4g_d
-
-// Phy flags
-#define gPhyFlagRxOnWhenIdle_c (1 << 0)
-#define gPhyFlagFramePending_c (1 << 1)
-#define gPhyFlagIdleRx_c (1 << 2)
-#define gPhyFlagDeferTx_c (1 << 3)
-
-#ifdef gPHY_802_15_4g_d
-#ifndef gAfcRxTimeout_c
-#define gAfcRxTimeout_c gPhySHRDuration_c /* [symbols] */
-#endif
-#endif
-
-/************************************************************************************
-*************************************************************************************
-* Public prototypes
-*************************************************************************************
-************************************************************************************/
-
-/************************************************************************************
-*************************************************************************************
-* Public type definitions
-*************************************************************************************
-************************************************************************************/
-typedef enum
-{
- gPhyChannelBusy_c = 0x00, /*The CCA attempt has detected a busy channel.*/
- gPhyBusyRx_c = 0x01, /*The transceiver is asked to change its state while receiving.*/
- gPhyBusyTx_c = 0x02, /*The transceiver is asked to change its state while transmitting.*/
- gPhyChannelIdle_c = 0x04, /*The CCA attempt has detected an idle channel.*/
- gPhyInvalidParameter_c = 0x05, /*A SET request was issued with a parameter in the primitive that is out of the valid range.*/
- gPhyRxOn_c = 0x06, /*The transceiver is in the receiver enabled state.*/
- gPhySuccess_c = 0x07, /*A SET/GET, an ED operation, a data request, an indirect queue insert, or a transceiver state change was successful.*/
- gPhyTRxOff_c = 0x08, /*The transceiver is in the transceiver disabled state.*/
- gPhyTxOn_c = 0x09, /*The transceiver is in the transmitter enabled state.*/
- gPhyUnsupportedAttribute_c = 0x0a, /*A SET/GET request was issued with the identifier of an attribute that is not supported.*/
- gPhyReadOnly_c = 0x0b, /*A SET request was issued with the identifier of an attribute that is read-only.*/
- gPhyIndexUsed_c = 0x11, /*The indirect queue insert operation has detected an used index.*/
- gPhyNoAck_c = 0x14, /*No ACK was received for the last transmission.*/
- gPhyFramePending_c = 0x15, /*The ACK of a Data Request frame indicates a pending frame in the coordinators indirect TX queue.*/
- gPhyBusy_c = 0xF1, //
- gPhyInvalidPrimitive_c = 0xF2 //
-}phyStatus_t;
-
-typedef enum
-{
- gPhySlottedMode_c = 0x0c,
- gPhyUnslottedMode_c = 0x0d
-}phySlottedMode_t;
-
-typedef enum
-{
- gPhyEnergyDetectMode_c = 0x00,
- gPhyCCAMode1_c = 0x01,
- gPhyCCAMode2_c = 0x02,
- gPhyCCAMode3_c = 0x03,
- gPhyNoCCABeforeTx_c = 0x04
-}phyCCAType_t;
-
-typedef enum
-{
- gPhyContCcaEnabled = 0x00,
- gPhyContCcaDisabled
-}phyContCCAMode_t;
-
-typedef enum
-{
- gPhyForceTRxOff_c = 0x03, /*The transceiver is to be switched off immediately.*/
- gPhySetRxOn_c = 0x12, /*The transceiver is to be configured into the receiver enabled state.*/
- gPhySetTRxOff_c = 0x13, /*The transceiver is to be configured into the transceiver disabled state.*/
-}phyState_t;
-
-typedef enum
-{
- gPhyRxAckRqd_c = 0x00, /*A receive Ack frame is expected to follow the transmit frame (non-Ack frames are rejected)*/
- gPhyNoAckRqd_c = 0x01, /*An ordinary receive frame (any type of frame) follows the transmit frame*/
-#ifdef gPHY_802_15_4g_d
- gPhyEnhancedAckReq = 0x02
-#endif // gPHY_802_15_4g_d
-}phyAckRequired_t;
-
-typedef enum
-{
- gPhyPibCurrentChannel_c = 0x00, /*The channel currently used.*/
- gPhyPibCurrentPage_c = 0x01, /*The channel page currently used.*/
- gPhyPibTransmitPower_c = 0x02, /*The power used for TX operations.*/
- gPhyPibLongAddress_c = 0x03, /*The MAC long address to be used by the PHYs source address matching feature.*/
- gPhyPibShortAddress_c = 0x04, /*The MAC short address to be used by the PHYs source address matching feature.*/
- gPhyPibPanId_c = 0x05, /*The MAC PAN ID to be used by the PHYs source address matching feature.*/
- gPhyPibPanCoordinator_c = 0x06, /*Indicates if the device is a PAN coordinator or not.*/
- gPhyPibSrcAddrEnable_c = 0x07, /*Enables or disables the PHYs source address matching feature.*/
- gPhyPibPromiscuousMode_c = 0x08, /*Selects between normal, promiscuous and active promiscuous mode.*/
- gPhyPibAutoAckEnable_c = 0x09, /*Enables or disables automatic transmission of ACK frames.*/
- gPhyPibFrameVersion_c = 0x0A, /*Used in checking for allowed frame versions (0x00 - any version accepted, 0x01 - accept Frame Version 0 packets (2003 compliant), 0x02 - accept Frame Version 1 packets (2006 compliant), 0x03 - accept Frame Version 0 and 1 packets).*/
- gPhyPibFrameEnable_c = 0x0B, /*Used for enabling or disabling reception of MAC frames.*/
- gPhyPibAckFramePending_c = 0x0C, /*Used to copy its contents to the outgoing ACK frame's Frame Pending field as a response to a received Data Request frame with Source Address Matching disabled.*/
- gPhyPibRxOnWhenIdle = 0x0D, /*Enable RX when the radio is IDLE*/
- gPhyPibFrameWaitTime_c = 0x0E, /*The number of symbols the Rx should be on after receiving an ACK with FP=1 */
- gPhyPibDeferTxIfRxBusy_c = 0x0F,
-#ifdef gPHY_802_15_4g_d
- gPhyPibPhyModeSupported_c = 0x10,
- gPhyPibCurrentMode_c = 0x11,
- gPhyPibFSKPreambleRepetitions_c = 0x12,
- gPhyPibFSKScramblePSDU_c = 0x13,
- gPhyPibCCADuration_c = 0x14,
- gPhyPibCSLRxEnabled_c = 0x15,
- gPhyPibCSLTxEnabled_c = 0x16,
- gPhyPibFreqBandId_c = 0x17,
- gPhyPibAckWaitDuration_c = 0x18
-#endif // gPHY_802_15_4g_d
-}phyPibId_t;
-
-typedef struct phyFlags_tag
-{
- union{
- uint32_t mask;
- struct{
- uint32_t rxOnWhenIdle :1;
- uint32_t rxFramePending :1;
- uint32_t idleRx :1;
-#ifdef gPHY_802_15_4g_d
- uint32_t slotted :1;
- uint32_t ccaBfrTX :1;
- uint32_t rxAckRqd :1;
- uint32_t autoAck :1;
- uint32_t panCordntr :1;
- uint32_t promiscuous :1;
- uint32_t activePromiscuous :1;
- uint32_t cslRxEnabled :1;
- uint32_t cslTxEnabled :1;
- uint32_t rxEnhAckRqd :1;
- uint32_t ccaEdScan :1; // set for a CCA or ED request
- uint32_t ccaComplete :1; // set when a CCA period is over
- uint32_t waitTurnaroundComplete :1; // set when a Auto ACK send or receive sequence started
- uint32_t reserved :16;
-#else
- uint32_t phyState :3;
- uint32_t reserved :26;
-#endif // gPHY_802_15_4g_d
- };
- };
-}phyFlags_t;
-
-#define gInvalidTimerId_c (gMaxPhyTimers_c)
-
-#ifdef gPHY_802_15_4g_d
-#define gPhyTimeShift_c (16) // 16bit hw timer
-#define gPhyTimeMask_c (0x000000000000FFFF)
-#else
-#define gPhyTimeShift_c (24) // 24bit hw timer
-#define gPhyTimeMask_c (0x00FFFFFF)
-#endif
-
-typedef uint8_t phyTimeTimerId_t;
-typedef uint64_t phyTimeTimestamp_t;
-
-#ifdef gPHY_802_15_4g_d
-typedef uint64_t phyTime_t;
-#else
-typedef uint32_t phyTime_t;
-#endif
-
-typedef void (*phyTimeCallback_t) ( uint32_t param );
-
-typedef enum
-{
- gPhyTimeOk_c = 0x00,
- gPhyTimeAlreadyPassed_c = 0x01,
- gPhyTimeTooClose_c = 0x02,
- gPhyTimeTooMany_c = 0x03,
- gPhyTimeInvalidParameter_c = 0x04,
- gPhyTimeNotFound_c = 0x05,
- gPhyTimeError_c = 0x06
-}phyTimeStatus_t;
-
-#ifdef gPHY_802_15_4g_d
-typedef struct phyPHR_tag
-{
- union{
- uint16_t mask;
- uint8_t byteAccess[2];
- struct{
- uint8_t modeSwitch :1;
- uint8_t reserved :2;
- uint8_t fcsType :1;
- uint8_t dataWhitening :1;
- uint8_t frameLengthRsvd :3; // Max psdu 254
- uint8_t frameLength;
- };
- };
-}phyPHR_t;
-
-typedef enum{
- gPhyMode1_c = 0x00,
- gPhyMode2_c = 0x01,
- gPhyMode3_c = 0x02,
- gPhyMode4_c = 0x03,
- gPhyMode1ARIB_c = 0x04,
- gPhyMode2ARIB_c = 0x05,
- gPhyMode3ARIB_c = 0x06,
-}phyMode_t;
-
-//802.15.4g MAC sub-1GHz frequency bands
-typedef enum{
- gFreq470__510MHz_c = 0x02, // 470-510 (China)
- gFreq779__787MHz_c = 0x03, // 779-787 (China)
- gFreq863__870MHz_c = 0x04, // 863-870 (Europe)
- gFreq902__928MHz_c = 0x07, // 902-928 (U.S.)
- gFreq920__928MHz_c = 0x09, // 920-928 (Japan) - Includes ARIB modes
- gFreq863__876MHz_c = 0x0E, // 863-876 (UK) custom mode
- gFreq915__921MHz_c = 0x0F, // 915-921 (UK) custom mode
-}phyFreqBand_t;
-
-#ifndef gPhyModeDefault_d
-#define gPhyModeDefault_d gPhyMode1_c
-#endif
-
-#endif // gPHY_802_15_4g_d
-
-/************************************************************************************
-*************************************************************************************
-* Public memory declarations
-*************************************************************************************
-************************************************************************************/
-
-/************************************************************************************
-*************************************************************************************
-* Public functions
-*************************************************************************************
-************************************************************************************/
-
-#endif /* _PHY_TYPES_H */
--- a/RF_Drivers_Freescale/driverRFinterface.c Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,333 +0,0 @@
-/*
- * driverRFinterface.c
- *
- * Created on: 12 March 2015
- * Author: mBed Team
- */
-
-#include "EmbeddedTypes.h"
-#include "Phy.h"
-#include "driverRFinterface.h"
-
-#include "arm_hal_interrupt.h"
-#include "arm_hal_phy.h"
-
-#include <string.h>
-#include <stdio.h>
-
-
-static uint8_t fsl_MAC[8];
-static phy_device_driver_s device_driver;
-static phy_device_channel_info_s channel_info;
-
-static uint8_t rf_channel;
-static int8_t rf_radio_driver_id = -1;
-
-static uint8_t mac_tx_handle = 0;
-static uint8_t tx_sequence = 0xff;
-
- /*
- * \brief Function sets the MAC address array.
- *
- * \param ptr Pointer to given MAC address array
- *
- * \return none
- */
-void rf_set_mac_address(const uint8_t *ptr)
-{
- memcpy(fsl_MAC,ptr,8);
-}
-
-/*
- * \brief Function initialises and registers the RF driver.
- *
- * \param none
- *
- * \return rf_radio_driver_id Driver ID given by NET library
- */
-int8_t rf_device_register(void)
-{
- //rf_init();
-
- Phy_Init();
- rf_channel_set(RF_DEFAULT_CHANNEL);
-
- /*Set pointer to MAC address*/
- device_driver.PHY_MAC = fsl_MAC;
- device_driver.driver_description = "FSL_MAC";
-#if PHY_LINK_15_4_2_4GHZ_TYPE
- /*Number of channels in PHY*/
- channel_info.channel_count = 16;
- /*Channel mask 26-11*/
- channel_info.channel_mask = 0x07FFF800;
- /*Type of RF PHY is SubGHz*/
- device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
- device_driver.link_channel_info = &channel_info;
-#else
- /*Number of channels in PHY*/
- channel_info.channel_count = 11;
- /*Channel mask 0-10*/
- channel_info.channel_mask = 0x000007ff;
- /*Type of RF PHY is SubGHz*/
- device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
- device_driver.link_channel_info = &channel_info;
-#endif
- /*Maximum size of payload is 127*/
- device_driver.phy_MTU = 127;
- /*No header in PHY*/
- device_driver.phy_header_length = 0;
- /*No tail in PHY*/
- device_driver.phy_tail_length = 0;
- /*Set address write function*/
- device_driver.phy_xx_address_write = &rf_address_write;
- /*Set RF extension function*/
- device_driver.phy_xx_extension = &rf_extension;
- /*Set RF state control function*/
- device_driver.phy_xx_state_control = &rf_interface_state_control;
- /*Set transmit function*/
- device_driver.phy_xx_tx = &rf_tx;
- printf("RF Device Registration...");
- /*Register device driver*/
- rf_radio_driver_id = arm_net_phy_register(&device_driver);
- printf("OK\r\n");
- return rf_radio_driver_id;
-}
-
-/*
- * \brief Function sets the addresses to RF address filters.
- *
- * \param address_type Type of address
- * \param address_ptr Pointer to given address
- *
- * \return 0 Success
- */
-static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
-{
- int8_t ret_val = 0;
- uint64_t temp64 = 0;
- uint16_t temp16 = 0;
-
- switch (address_type)
- {
- /*Set 48-bit address*/
- case PHY_MAC_48BIT:
- break;
- /*Set 64-bit address*/
- case PHY_MAC_64BIT:
- temp64 = atouint64(address_ptr);
- PhyPlmeSetPIBRequest(gPhyPibLongAddress_c, temp64, 0, 0 );
- break;
- /*Set 16-bit address*/
- case PHY_MAC_16BIT:
- temp16 = atouint16(address_ptr);
- PhyPlmeSetPIBRequest(gPhyPibShortAddress_c, temp16, 0, 0 );
- break;
- /*Set PAN Id*/
- case PHY_MAC_PANID:
- temp16 = atouint16(address_ptr);
- PhyPlmeSetPIBRequest(gPhyPibPanId_c, temp16, 0, 0 );
- break;
- }
- return ret_val;
-}
-
-/*
- * \brief Function controls the ACK pending, channel setting and energy detection.
- *
- * \param extension_type Type of control
- * \param data_ptr Data from NET library
- *
- * \return 0 Success
- */
-static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
-{
- switch (extension_type)
- {
- /*Control MAC pending bit for Indirect data transmission*/
- case PHY_EXTENSION_CTRL_PENDING_BIT:
- if(*data_ptr)
- {
- //rf_if_ack_pending_ctrl(1);
- }
- else
- {
- //rf_if_ack_pending_ctrl(0);
- }
- break;
- /*Return frame pending status*/
- case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
- //*data_ptr = rf_if_last_acked_pending();
- break;
- /*Set channel*/
- case PHY_EXTENSION_SET_CHANNEL:
- break;
- /*Read energy on the channel*/
- case PHY_EXTENSION_READ_CHANNEL_ENERGY:
- break;
- /*Read status of the link*/
- case PHY_EXTENSION_READ_LINK_STATUS:
- break;
- }
- return 0;
-}
-
-/*
- * \brief Function gives the control of RF states to MAC.
- *
- * \param new_state RF state
- * \param rf_channel RF channel
- *
- * \return 0 Success
- */
-static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
-{
- int8_t ret_val = 0;
- switch (new_state)
- {
- /*Reset PHY driver and set to idle*/
- case PHY_INTERFACE_RESET:
- break;
- /*Disable PHY Interface driver*/
- case PHY_INTERFACE_DOWN:
- //rf_shutdown();
- break;
- /*Enable PHY Interface driver*/
- case PHY_INTERFACE_UP:
- rf_channel_set(rf_channel);
- //rf_receive();
- break;
- /*Enable wireless interface ED scan mode*/
- case PHY_INTERFACE_RX_ENERGY_STATE:
- break;
- }
- return ret_val;
-}
-
-
-/*
- * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
- *
- * \param data_ptr Pointer to TX data
- * \param data_length Length of the TX data
- * \param tx_handle Handle to transmission
- * \return 0 Success
- * \return -1 Busy
- */
-int8_t rf_tx(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle)
-{
- /*Store TX handle*/
- mac_tx_handle = tx_handle;
-
- /*Store the sequence number for ACK handling*/
- tx_sequence = *(data_ptr + 2);
-
- macToPdDataMessage_t *pPdSapMsg = (macToPdDataMessage_t *)malloc( sizeof(macToPdDataMessage_t));
- pPdSapMsg->macInstance = 0;
- pPdSapMsg->msgType = gPdDataReq_c;
-
- /*Check if transmitted data needs to be acked*/
- if(*data_ptr & 0x20)
- {
- pPdSapMsg->msgData.dataReq.ackRequired = gPhyRxAckRqd_c;
- }
- else
- {
- pPdSapMsg->msgData.dataReq.ackRequired = gPhyNoAckRqd_c;
- }
-
- pPdSapMsg->msgData.dataReq.startTime = gPhySeqStartAsap_c;
- pPdSapMsg->msgData.dataReq.txDuration = gPhySeqStartAsap_c;
- pPdSapMsg->msgData.dataReq.CCABeforeTx = gPhyCCAMode1_c;
- pPdSapMsg->msgData.dataReq.slottedTx = gPhyUnslottedMode_c;
- pPdSapMsg->msgData.dataReq.pPsdu = data_ptr;
- pPdSapMsg->msgData.dataReq.psduLength = data_length;
-
- MAC_PD_SapHandler(pPdSapMsg, 0);
-
-
-#if 0
- /*Check if transmitter is busy*/
- if((rf_if_read_trx_state() == BUSY_RX_AACK) || (rf_if_read_trx_state() == BUSY_RX))
- {
- /*Return busy*/
- return -1;
- }
- else
- {
- arm_enter_critical();
- /*Check if transmitted data needs to be acked*/
- if(*data_ptr & 0x20)
- need_ack = 1;
- else
- need_ack = 0;
- /*Store the sequence number for ACK handling*/
- tx_sequence = *(data_ptr + 2);
- /*Set radio in RX state to read channel*/
- rf_receive();
- /*Write TX FIFO*/
- rf_if_write_frame_buffer(data_ptr, (uint8_t)data_length);
- rf_flags_set(RFF_CCA);
- /*Start CCA process*/
- rf_if_enable_cca_ed_done_interrupt();
- rf_if_start_cca_process();
- /*Store TX handle*/
- mac_tx_handle = tx_handle;
- arm_exit_critical();
- }
-#endif
-
- /*Return success*/
- return 0;
-}
-
-/*
- * \brief Function sets the RF channel.
- *
- * \param ch New channel
- *
- * \return none
- */
-void rf_channel_set(uint8_t ch)
-{
- //arm_enter_critical();
- rf_channel = ch;
- if(ch < 0x1f)
- {
- PhyPlmeSetPIBRequest(gPhyPibCurrentChannel_c, ch, 0, 0 );
- //rf_if_set_channel_register(ch);
- }
- //arm_exit_critical();
-}
-
-uint16_t atouint16
-(
- uint8_t* pArray
-)
-{
- uuint16_t out;
-
- out.u8[1] = *pArray++;
- out.u8[0] = *pArray;
-
- return out.u16;
-}
-
-uint64_t atouint64
-(
- uint8_t* pArray
-)
-{
- uuint64_t out;
-
- out.u8[7] = *pArray++;
- out.u8[6] = *pArray++;
- out.u8[5] = *pArray++;
- out.u8[4] = *pArray++;
- out.u8[3] = *pArray++;
- out.u8[2] = *pArray++;
- out.u8[1] = *pArray++;
- out.u8[0] = *pArray;
-
- return out.u64;
-}
-
--- a/RF_Drivers_Freescale/driverRFinterface.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,56 +0,0 @@
-/*
- * driverRFinterface.h
- *
- * Created on: 12 March 2015
- * Author: mBed Team
- */
-
-#ifndef DRIVERRFINTERFACE_H_
-#define DRIVERRFINTERFACE_H_
-
-#include "arm_hal_phy.h"
-#include "EmbeddedTypes.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define RF_BUFFER_SIZE 128
-#define RF_DEFAULT_CHANNEL 11
-
-typedef union uuint16_tag
-{
- uint16_t u16;
- uint8_t u8[2];
-} uuint16_t;
-
-typedef union uuint32_tag
-{
- uint32_t u32;
- uint16_t u16[2];
- uint8_t u8[4];
-} uuint32_t;
-
-typedef union uuint64_tag
-{
- uint64_t u64;
- uint32_t u32[2];
- uint16_t u16[4];
- uint8_t u8[8];
-} uuint64_t;
-
-extern void rf_set_mac_address(const uint8_t *ptr);
-extern int8_t rf_device_register(void);
-extern void rf_channel_set(uint8_t ch);
-extern uint64_t atouint64(uint8_t* pArray);
-extern uint16_t atouint16(uint8_t* pArray);
-extern int8_t rf_tx(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle);
-static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
-static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
-static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* DRIVERRFINTERFACE_H_ */
\ No newline at end of file
--- a/Resources/battery.cpp Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,58 +0,0 @@
-// battery resource implementation
-
-#include "mbed.h"
-#include "nsdl_support.h"
-
-#define BATTERY_RES_ID "/dev/bat" //"battery/level" //"3/9"
-#define BATTERY_RES_RT "Battery Percent"
-
-char battPct[5];
-extern uint8_t batteryLevel;
-static uint8_t max_age = 0;
-static uint8_t content_type = 50;
-
-/* Only GET method allowed */
-static uint8_t battery_resource_cb(sn_coap_hdr_s *received_coap_ptr, sn_nsdl_addr_s *address, sn_proto_info_s * proto)
-{
- sn_coap_hdr_s *coap_res_ptr = 0;
- sprintf(battPct,"%d %%",batteryLevel);
- printf("battery callback\r\n");
- printf("battery percent %s\r\n", battPct);
-
- if(received_coap_ptr->msg_code == COAP_MSG_CODE_REQUEST_GET)
- {
- coap_res_ptr = sn_coap_build_response(received_coap_ptr, COAP_MSG_CODE_RESPONSE_CONTENT);
-
- coap_res_ptr->payload_len = strlen(battPct);
- coap_res_ptr->payload_ptr = (uint8_t*)battPct;
-
- coap_res_ptr->content_type_ptr = &content_type;
- coap_res_ptr->content_type_len = sizeof(content_type);
-
- coap_res_ptr->options_list_ptr = (sn_coap_options_list_s*)nsdl_alloc(sizeof(sn_coap_options_list_s));
- if(!coap_res_ptr->options_list_ptr)
- {
- printf("cant alloc option list for max-age\r\n");
- coap_res_ptr->options_list_ptr = NULL; //FIXME report error and recover
- }
- memset(coap_res_ptr->options_list_ptr, 0, sizeof(sn_coap_options_list_s));
- coap_res_ptr->options_list_ptr->max_age_ptr = &max_age;
- coap_res_ptr->options_list_ptr->max_age_len = sizeof(max_age);
-
- sn_nsdl_send_coap_message(address, coap_res_ptr);
- nsdl_free(coap_res_ptr->options_list_ptr);
- coap_res_ptr->options_list_ptr = NULL;
- coap_res_ptr->content_type_ptr = NULL;// parser_release below tries to free this memory
- }
-
- sn_coap_parser_release_allocated_coap_msg_mem(coap_res_ptr);
-
- return 0;
-}
-
-int create_battery_resource(sn_nsdl_resource_info_s *resource_ptr)
-{
- nsdl_create_dynamic_resource(resource_ptr, sizeof(BATTERY_RES_ID)-1, (uint8_t*)BATTERY_RES_ID, sizeof(BATTERY_RES_RT)-1, (uint8_t*)BATTERY_RES_RT, 0, &battery_resource_cb, (SN_GRS_GET_ALLOWED));
- return 0;
-}
-
--- a/Resources/battery.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,10 +0,0 @@ -// Battery resource implementation - -#ifndef BATTERY_H -#define BATTERY_H - -#include "nsdl_support.h" - -int create_battery_resource(sn_nsdl_resource_info_s *resource_ptr); - -#endif
--- a/Resources/rgb.cpp Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,78 +0,0 @@
-// RGB LED resource implementation
-
-#include "mbed.h"
-#include "nsdl_support.h"
-
-#define RED_LED_RES_ID "rgb/selected" //"3311/0/5860"
-#define RED_LED_RES_RT "RGB LED State"
-
-extern uint8_t ledState;
-extern DigitalOut ledR;
-extern DigitalOut ledG;
-extern DigitalOut ledB;
-static uint8_t max_age = 0;
-static uint8_t content_type = 50;
-
-
-/* only GET method allowed */
-static uint8_t rgb_led_resource_cb(sn_coap_hdr_s *received_coap_ptr, sn_nsdl_addr_s *address, sn_proto_info_s * proto)
-{
- sn_coap_hdr_s *coap_res_ptr = 0;
-
- printf("rgb_led callback\r\n");
-
- if(received_coap_ptr->msg_code == COAP_MSG_CODE_REQUEST_GET)
- {
- coap_res_ptr = sn_coap_build_response(received_coap_ptr, COAP_MSG_CODE_RESPONSE_CONTENT);
- uint8_t var[5];
- switch (ledState) {
- case 0:
- coap_res_ptr->payload_len = 4;
- memcpy(var,"NONE", 4);
- break;
- case 1:
- coap_res_ptr->payload_len = 3;
- memcpy(var,"RED", 3);
- break;
- case 2:
- coap_res_ptr->payload_len = 5;
- memcpy(var,"GREEN",5);
- break;
- case 3:
- coap_res_ptr->payload_len = 4;
- memcpy(var,"BLUE", 4);
- break;
- }
- coap_res_ptr->payload_ptr = var;
-
- coap_res_ptr->content_type_ptr = &content_type;
- coap_res_ptr->content_type_len = sizeof(content_type);
-
- coap_res_ptr->options_list_ptr = (sn_coap_options_list_s*)nsdl_alloc(sizeof(sn_coap_options_list_s));
- if(!coap_res_ptr->options_list_ptr)
- {
- printf("cant alloc option list for max-age\r\n");
- coap_res_ptr->options_list_ptr = NULL; //FIXME report error and recover
- }
- memset(coap_res_ptr->options_list_ptr, 0, sizeof(sn_coap_options_list_s));
- coap_res_ptr->options_list_ptr->max_age_ptr = &max_age;
- coap_res_ptr->options_list_ptr->max_age_len = sizeof(max_age);
-
- sn_nsdl_send_coap_message(address, coap_res_ptr);
- nsdl_free(coap_res_ptr->options_list_ptr);
- coap_res_ptr->options_list_ptr = NULL;
- coap_res_ptr->content_type_ptr = NULL;// parser_release below tries to free this memory
-
- }
- sn_coap_parser_release_allocated_coap_msg_mem(coap_res_ptr);
-
- return 0;
-}
-
-
-
-int create_rgbled_resource(sn_nsdl_resource_info_s *resource_ptr)
-{
- nsdl_create_dynamic_resource(resource_ptr, sizeof(RED_LED_RES_ID)-1, (uint8_t*)RED_LED_RES_ID, sizeof(RED_LED_RES_RT)-1, (uint8_t*)RED_LED_RES_RT, 0, &rgb_led_resource_cb, (SN_GRS_GET_ALLOWED));
- return 0;
-}
\ No newline at end of file
--- a/Resources/rgb.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,10 +0,0 @@ -// RGB LED resource implementation - -#ifndef RGB_H -#define RGB_H - -#include "nsdl_support.h" - -int create_rgbled_resource(sn_nsdl_resource_info_s *resource_ptr); - -#endif
--- a/main.cpp Wed Mar 18 18:52:47 2015 +0000
+++ b/main.cpp Fri Apr 03 05:23:33 2015 +0000
@@ -1,741 +1,43 @@
#include "mbed.h"
-
-#include "driverDebug.h"
-//#include "driverRFPhy.h"
-//#include "driverAtmelRFInterface.h"
-
-#include "driverRFinterface.h"
-
-#include "socket_api.h"
-#include "net_interface.h"
-#include "system_event.h"
-#include "string.h"
-#include "net_nwk_scan.h"
-#include "socket_security.h"
-#include "nwk_stats_api.h"
-#include "multicast_api.h"
-#include "nsdynmemLIB.h"
-#include "randLIB.h"
-#include "arm_hal_timer.h"
-#include "common_functions.h"
-#include "nsdl_support.h"
-#include "node_cfg.h"
+#include "rtos.h"
-/*** DEBUG ******/
-#define DEBUG 1
-#if DEBUG
-#define debug printf
-#else
-#define debug(...) ""
-#endif // DEBUG
-
-/******* Hardware Definition **********/
-#if NODE_CONTROLLER
- DigitalOut ledR(PTB22); // RGB - Red LED
- DigitalOut ledG(PTE26); // RGB - Green LED
- DigitalOut ledB(PTB21); // RGB - Blue LED
- InterruptIn TAP_INT(PTC6); // INT1 from FXOS8700Q
-#endif
-
-/******* Timers Definitions ************/
-#define RETRY_TIMER 1
-#define NSP_REGISTRATION_TIMER 2
-#if NODE_CONTROLLER
- #define ACCELEROMETER_TIMER 3
-#endif
-#if NODE_HOME
- #define DOOR_CHECK_TIMER 4
-#endif
-
-void app_heap_error_handler(heap_fail_t event);
-void tasklet_main(arm_event_s *event);
-void button_main(arm_event_s *event);
-
-#define APP_DEV_HEAP_SIZE 6000
-static uint8_t app_defined_stack_heap[APP_DEV_HEAP_SIZE];
-static int8_t main_tasklet_id = -1;
+DigitalOut led1(LED1);
+InterruptIn sw2(SW2);
+uint32_t button_pressed;
+Thread *thread2;
-static const uint8_t app_MAC_address[8] = NODE_MAC_ADDRESS;
-static int8_t rf_phy_device_register_id = -1;
-static int8_t net_6lowpan_id = -1;
-static uint32_t channel_list = 0x07FFF800; // All channels
-
-int8_t coap_udp_socket = -1;
-
-#define AUDP_SOCKET_PORT 61630
-#define RECV_CTRL_UDP_PORT 1050 // receive
-#define SEND_CTRL_UDP_PORT 1060 // send
-
-/** Used for Receive Data source Address store*/
-static ns_address_t app_src;
-static sn_nsdl_addr_s sn_addr_s;
-
-static int access_point_status = 0;
-
-link_layer_setups_s app_link_info;
-link_layer_address_s app_link_address_info;
-network_layer_address_s app_nd_address_info;
-
-/* Prototype functions */
-void NSDL_receive_socket(void *cb);
-void NSP_registration(void);
-
-extern void create_lqi_resource(uint8_t);
-void* own_alloc(uint16_t size);
-void own_free(void *ptr);
+void sw2_press(void)
+{
+ thread2->signal_set(0x1);
+}
-/*************** Application variables ***********************/
-uint8_t batteryLevel = 100;
-enum LED {NONE, RED, GREEN, BLUE};
-int ledState = NONE;
-
-
-/* #defines, definitions and declarations according node profile */
-
-#if NODE_CONTROLLER
-int8_t ctrl_udp_socket = -1;
-void empty_udp_receive(void * cb);
-void ctrl_udp_send(uint8_t cmd);
-
-#include "FXOS8700Q_TD.h"
-
-#define ACCEL_SAMPLE_TIME 200
-FXOS8700Q accel( PTE25, PTE24, FXOS8700CQ_SLAVE_ADDR1); // Proper Ports and I2C Address for K64F Freedom board
-bool accel_enable = 1;
-
-void tap_detector_handler(void) {
- printf("Tap Detected!\r\n");
-
- switch(ledState) {
- case NONE:
- break;
- case RED:
- ctrl_udp_send('R');
- break;
- case GREEN:
- ctrl_udp_send('G');
- break;
- case BLUE:
- ctrl_udp_send('B');
- break;
+void led_thread(void const *argument)
+{
+ while (true) {
+ led1 = !led1;
+ Thread::wait(1000);
}
}
-void update_LED(void) {
-
- switch(ledState) {
- case NONE:
- ledState = GREEN;
- ledR = 1;
- ledG = 0;
- ledB = 1;
- break;
-
- case GREEN:
- ledState = RED;
- ledR = 0;
- ledG = 1;
- ledB = 1;
- break;
-
- case RED:
- ledState = BLUE;
- ledR = 1;
- ledG = 1;
- ledB = 0;
- break;
-
- case BLUE:
- ledState = NONE;
- ledR = 1;
- ledG = 1;
- ledB = 1;
- break;
- }
-}
-
-#endif
-
-#if 1
-void printf_array(uint8_t *ptr , uint16_t len)
-{
- uint16_t i;
- for(i=0; i<len; i++)
- {
- if(i)
- {
- if(i%16== 0)
- {
- debug("\r\n");
- if(len > 64)
- {
- uint8_t x =254;
- while(x--);
- }
- }
- else
- {
- debug(":");
- }
- }
- debug_hex(*ptr++);
- }
- debug("\r\n");
-}
-
-
-
-void debug_integer(uint8_t width, uint8_t base, int16_t n)
+void button_thread(void const *argument)
{
- uint8_t bfr[8];
- uint8_t *ptr = bfr;
- uint8_t ctr = 0;
-
- if (width > 7) width = 7;
-
- ptr += width;
- *ptr-- = 0;
-
- if (base == 16)
- {
- do
- {
- *ptr = n & 0x0F;
- if (*ptr < 10) *ptr += '0';
- else *ptr += ('A'-10);
- ptr--;
- n >>= 4;
- ctr++;
- }while((ctr & 1) || (ctr < width));
- }
- else
- {
- uint8_t negative = 0;
- if (n < 0)
- { negative = 1;
- n = -n;
- }
- ctr++;
- do
- {
- *ptr-- = (n % 10) + '0';
- n /= 10;
- ctr++;
- }while ((ctr < width) && n);
- if (negative)
- {
- *ptr-- = '-';
- }
- else
- {
- *ptr-- = ' ';
- }
- }
- ptr++;
- //debug_send(ptr);
- debug((const char *)ptr);
+ while (true) {
+ Thread::signal_wait(0x1);
+ button_pressed++;
+ }
}
-
-void printf_ipv6_address(uint8_t *addr_ptr)
-{
- if(addr_ptr)
- {
- uint8_t i, d_colon = 0;
- uint16_t current_value = 0, last_value = 0;
-
- for(i=0; i< 16;i += 2)
- {
- current_value = (*addr_ptr++ << 8);
- current_value += *addr_ptr++;
-
- if(i == 0)
- {
- last_value = current_value;
- debug_hex(current_value >> 8);
- debug_hex(current_value );
- debug(":");
- }
- else
- {
- if(current_value == 0)
- {
- if(i== 14)
- {
- debug(":");
- //debug_put('0');
- debug("0");
- }
- else
- {
- if(last_value == 0)
- {
- if(d_colon == 0)
- {
- d_colon=1;
- }
- }
- else
- {
- if(d_colon == 2)
- {
- //debug_put('0');
- debug("0");
- debug(":");
- }
- }
- }
- }
- else
- {
- if(last_value == 0)
- {
- if(d_colon == 1)
- {
- debug(":");
- d_colon = 2;
- }
- else
- {
- //debug_put('0');
- debug("0");
- debug(":");
- }
- }
- if(current_value > 0x00ff)
- {
- debug_hex(current_value >> 8);
- }
- debug_hex(current_value );
- if(i< 14)
- {
- debug(":");
- }
- }
- last_value = current_value;
- }
- }
- }
- else
- {
- debug("Address Print: pointer NULL");
- }
- debug("\r\n");
-}
-#endif
-
int main()
{
-#if NODE_CONTROLLER
- ledR = 1;
- ledG = 1;
- ledB = 1;
- TAP_INT.rise(&tap_detector_handler);
-#endif
-
- debug("\r\nApplication Start\r\n");
- ns_dyn_mem_init(app_defined_stack_heap, APP_DEV_HEAP_SIZE, app_heap_error_handler,0);
- rf_set_mac_address(app_MAC_address);
-
- // init RF interface
- debug("Init RF Interface...\r\n");
- rf_phy_device_register_id = rf_device_register();
-
- randLIB_seed_random();
-
- debug("Init ARM Timer...\r\n");
- arm_timer_init();//Init Timer
-
- //Init nanostack & Event OS
- debug("Init Net Core...\r\n");
- net_init_core();
- debug("Create Tasklets...\r\n");
- main_tasklet_id = arm_ns_tasklet_create(&tasklet_main);
- if(main_tasklet_id < 0)
- {
- //Tasklet cerate fail
- error("Tasklet create fail..");
- while(1);
- }
-
- debug("Event Dispatch\r\n");
- event_dispatch();
-}
-
-/**
- * @brief This function handles Hard Fault exception.
- * @param None
- * @retval None
- */
-void HardFault_Handler(void)
-{
- /* Go to infinite loop when Hard Fault exception occurs */
- while (1)
- {
- }
-}
-void app_heap_error_handler(heap_fail_t event)
-{
- switch (event)
- {
- case NS_DYN_MEM_NULL_FREE:
- break;
- case NS_DYN_MEM_DOUBLE_FREE:
- break;
-
- case NS_DYN_MEM_ALLOCATE_SIZE_NOT_VALID:
- break;
- case NS_DYN_MEM_POINTER_NOT_VALID:
- break;
-
- case NS_DYN_MEM_HEAP_SECTOR_CORRUPTED:
- break;
-
- case NS_DYN_MEM_HEAP_SECTOR_UNITIALIZED:
- break;
-
- default:
-
- break;
- }
- while(1);
-}
-
-
-/**
- * \brief Network state event handler.
- * \param event show network start response or current network state.
- *
- * - NET_READY: Save NVK peristant data to NVM and Net role
- * - NET_NO_BEACON: Link Layer Active Scan Fail, Stack is Already at Idle state
- * - NET_NO_ND_ROUTER: No ND Router at current Channel Stack is Already at Idle state
- * - NET_BORDER_ROUTER_LOST: Connection to Access point is lost wait for Scan Result
- * - NET_PARENT_POLL_FAIL: Host should run net start without any PAN-id filter and all channels
- * - NET_PANA_SERVER_AUTH_FAIL: Pana Authentication fail, Stack is Already at Idle state
- */
-void app_parse_network_event(arm_event_s *event )
-{
- arm_nwk_interface_status_type_e status = (arm_nwk_interface_status_type_e)event->event_data;
- switch (status)
- {
- case ARM_NWK_BOOTSTRAP_READY:
- /* NEtwork is ready and node is connected to Access Point */
- if(access_point_status==0)
- {
- uint8_t temp_ipv6[16];
- debug("Network Connection Ready\r\n");
- access_point_status=1;
- //Read Address
-
- if( arm_nwk_nd_address_read(net_6lowpan_id,&app_nd_address_info) != 0)
- {
- debug("ND Address read fail\r\n");
- }
- else
- {
- debug("ND Access Point: ");
- printf_ipv6_address(app_nd_address_info.border_router); //REVIEW
-
- debug("ND Prefix 64: ");
- printf_array(app_nd_address_info.prefix, 8); //REVIEW
-
- if(arm_net_address_get(net_6lowpan_id,ADDR_IPV6_GP,temp_ipv6) == 0)
- {
- debug("GP IPv6: ");
- printf_ipv6_address(temp_ipv6); //REVIEW
- }
- }
-
- if( arm_nwk_mac_address_read(net_6lowpan_id,&app_link_address_info) != 0)
- {
- debug("MAC Address read fail\r\n");
- }
- else
- {
- uint8_t temp[2];
- common_write_16_bit(app_link_address_info.mac_short,temp);
- debug("MAC 16-bit: ");
- printf_array(temp, 2); //REVIEW
- common_write_16_bit(app_link_address_info.PANId,temp);
- debug("PAN-ID: ");
- printf_array(temp, 2); //REVIEW
- debug("MAC 64-bit: ");
- printf_array(app_link_address_info.long_euid64, 8); //REVIEW
- debug("EUID64(Based on MAC 64-bit address): ");
- printf_array(app_link_address_info.euid64, 8); //REVIEW
- }
- }
- break;
-
- case ARM_NWK_NWK_SCAN_FAIL:
- /* Link Layer Active Scan Fail, Stack is Already at Idle state */
- debug("Link Layer Scan Fail: No Beacons\r\n");
- access_point_status=0;
- //dnssd_disable(1);
- break;
-
- case ARM_NWK_IP_ADDRESS_ALLOCATION_FAIL:
- /* No ND Router at current Channel Stack is Already at Idle state */
- debug("ND Scan/ GP REG fail\r\n");
- access_point_status=0;
- //dnssd_disable(1);
- break;
-
- case ARM_NWK_NWK_CONNECTION_DOWN:
- /* Connection to Access point is lost wait for Scan Result */
- debug("ND/RPL scan new network\r\n");
- access_point_status=0;
- break;
-
- case ARM_NWK_NWK_PARENT_POLL_FAIL:
- access_point_status=0;
- break;
-
- case ARM_NWK_AUHTENTICATION_FAIL:
- debug("Network authentication fail\r\n");
- access_point_status=0;
- break;
-
- default:
- debug_hex(status); //REVIEW
- debug("Unknow event");
- break;
- }
-
- if(access_point_status == 0)
- {
- //Set Timer for new Trig
- timer_sys_event(RETRY_TIMER, 10000);
- }
-}
-
-
-/**
- * \brief Handler for events sent to the application.
- * \param event received event.
- *
- * - EV_NETWORK event, Network Event state event handler
- * - EV_INIT, Set Certificate Chain list, init multicast, Start net start if NVM have session
- * - EV_DEBUG, Terminal handler
- */
-void tasklet_main(arm_event_s *event)
-{
- if(event->sender == 0)
- {
- arm_library_event_type_e event_type;
- event_type = (arm_library_event_type_e)event->event_type;
-
- switch(event_type)
- {
- case ARM_LIB_NWK_INTERFACE_EVENT:
- /* Network Event state event handler */
- debug("Event: ARM_LIB_NWK_INTERFACE\r\n");
- app_parse_network_event(event);
- break;
+ Thread thread(led_thread);
+ thread2 = new Thread(button_thread);
- case ARM_LIB_TASKLET_INIT_EVENT:
- /*Init event from stack at start-up*/
- debug("Event: ARM_LIB_TASKLET_INIT\r\n");
-#if NODE_CONTROLLER
- timer_sys_event(ACCELEROMETER_TIMER, ACCEL_SAMPLE_TIME);
-#endif
- multicast_set_parameters(10,0,20,3,75 );
-
-#if NODE_CONTROLLER
- /* open a socket to support control for REMOTE_NODE */
- ctrl_udp_socket = socket_open(SOCKET_UDP, SEND_CTRL_UDP_PORT, empty_udp_receive);
-#endif
-
- net_6lowpan_id = arm_nwk_interface_init(NET_INTERFACE_RF_6LOWPAN, rf_phy_device_register_id, "6LoWPAN_BORDER_ROUTER");
- if(net_6lowpan_id < 0)
- {
- debug("Interface Generate Fail\r\n");
- while(1);
- }
- else
- {
- //SET Bootsrap
- if(arm_nwk_interface_configure_6lowpan_bootstrap_set(net_6lowpan_id, NET_6LOWPAN_HOST, 1) != 0) // Last parameter enables MLE protocol
- {
- //Bootsrap SET fail
- debug("Bootstrap Fail\r\n");
- while(1);
- }
- else
- {
- int8_t retval = -1;
- arm_nwk_6lowpan_gp_address_mode(net_6lowpan_id, NET_6LOWPAN_GP16_ADDRESS, NODE_SHORT_ADDRESS, 1); // 5 = short address for link-layer // 1 = generate automatically if duplicate address is encountered
- arm_nwk_link_layer_security_mode(net_6lowpan_id, NET_SEC_MODE_NO_LINK_SECURITY, 0, 0);
- arm_nwk_6lowpan_link_scan_paramameter_set(rf_phy_device_register_id, channel_list, 5);
- retval = arm_nwk_interface_up(net_6lowpan_id);
- if(retval != 0)
- {
- //6Lowpan Bootsrap start fail
- debug("6LowPAN Bootstrap start Fail\r\n");
- while(1);
- }
- else
- {
- //6Lowpan Bootsrap start OK
- debug("6LowPAN Bootstrap Start OK\r\n");
- }
- // open sockets
- coap_udp_socket = socket_open(SOCKET_UDP, AUDP_SOCKET_PORT, NSDL_receive_socket);
- // Start NSDL
- nsdl_run();
- }
- timer_sys_event(NSP_REGISTRATION_TIMER, RD_UPDATE_PERIOD);
- }
- break;
-
- case ARM_LIB_SYSTEM_TIMER_EVENT:
- timer_sys_event_cancel(event->event_id);
- if (event->event_id == NSP_REGISTRATION_TIMER)
- {
- printf("Time to register...\r\n");
- NSP_registration();
- #if BATTERY
- batteryLevel -= 10;
- if (batteryLevel == 0)
- batteryLevel = 100;
- #endif
- timer_sys_event(NSP_REGISTRATION_TIMER, RD_UPDATE_PERIOD);
- }
- else if (event->event_id == RETRY_TIMER)
- {
- debug("Event: ARM_LIB_SYSTEM_TIMER (event_id = 1)\r\n");
- int8_t retval = -1;
- retval = arm_nwk_interface_up(net_6lowpan_id);
- if(retval != 0)
- {
- //6Lowpan Bootsrap start fail
- debug("6LowPAN Bootstrap Start Failure\r\n");
- while(1);
- }
- else
- {
- //6Lowpan Bootsrap start OK
- debug("6LowPAN Bootstrap Start OK\r\n");
- }
- }
-#if NODE_CONTROLLER
- else if (event->event_id == ACCELEROMETER_TIMER)
- {
- if (accel.getAccX() < -0.85f && accel_enable)
- {
- accel_enable = 0;
- update_LED();
- }
- if (accel.getAccX() > -0.35f)
- accel_enable = 1;
-
- timer_sys_event(ACCELEROMETER_TIMER, ACCEL_SAMPLE_TIME);
- }
-#endif
-
- break;
-
- default:
- break;
+ button_pressed = 0;
+ sw2.fall(&sw2_press);
+ while (true) {
+ Thread::wait(5000);
+ printf("SW2 was pressed (last 5 seconds): %d \r\n", button_pressed);
+ fflush(stdout);
+ button_pressed = 0;
}
- }
}
-
-void NSDL_receive_socket(void * cb)
-{
- socket_callback_t * cb_res =0;
- int16_t length;
- cb_res = (socket_callback_t *) cb;
- uint8_t *payload;
-
- if(cb_res->event_type == SOCKET_DATA)
- {
- debug("LINK LQI:");
- debug_hex(cb_res->LINK_LQI);
- create_lqi_resource(cb_res->LINK_LQI);
- debug("\r\n");
-
- if ( cb_res->d_len > 0)
- {
- payload = (uint8_t *) own_alloc(cb_res->d_len);
- if(payload)
- {
- //Read data to the RX buffer
- length = socket_read(cb_res->socket_id, &app_src, payload, cb_res->d_len); //replace rx_buffer payload
- if(length)
- {
- if(cb_res->socket_id == coap_udp_socket)
- {
- // Handles data received in UDP socket
- // Call application protocol parser.
- sn_addr_s.type = SN_NSDL_ADDRESS_TYPE_IPV6;
- sn_addr_s.addr_len = 16;
- sn_addr_s.port = app_src.identifier;
- sn_addr_s.addr_ptr = app_src.address;
- printf("Data 1\r\n");
- if(sn_nsdl_process_coap(payload, length, &sn_addr_s)) // 0= ok, -1=failure
- {
- debug("Error processing CoAP packet\r\n");
- }
- printf("Data 4\r\n");
- }
- }
- own_free(payload);
- }
- }
- }
-#if 1 // enabled for debug
- else if(cb_res->event_type == SOCKET_TX_DONE)
- {
- //debug("*");
- }
- else if(cb_res->event_type == SOCKET_NO_ROUTE)
- {
- debug("SOCKET_NO_ROUTE\r\n");
- }
- else if(cb_res->event_type == SOCKET_TX_FAIL)
- {
- debug("SOCKET_TX_FAIL\r\n");
- }
-#endif
-}
-
-#if NODE_CONTROLLER
-void ctrl_udp_send(uint8_t cmd)
-{
- uint8_t * payload = 0;
- ns_address_t address;
- /*SET UDP echo Port*/
- address.identifier = RECV_CTRL_UDP_PORT;
-
- uint8_t node_address[16] = REMOTE_NODE;
-
- payload = (uint8_t *) ns_dyn_mem_alloc(1);
- if(payload)
- {
- uint8_t *ptr = payload;
-
- memcpy(address.address,node_address,16);
- address.type = ADDRESS_IPV6;
- *ptr = cmd;
- if(socket_sendto(ctrl_udp_socket, &address, payload, (1)) != 0)
- {
- debug("Ctrl UDP Failed\r\n");
- }
- else
- {
- debug("Ctrl UDP Ok\r\n");
- }
- ns_dyn_mem_free(payload);
- }
- else
- {
- debug("No Heap for Ctrl UDP\r\n");
- }
-}
-// we don't expect to receive data
-void empty_udp_receive(void * cb) {
-
-}
-#endif
-
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed-rtos.lib Fri Apr 03 05:23:33 2015 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/mbed_official/code/mbed-rtos/#d3d0e710b443
--- a/mbed.bld Wed Mar 18 18:52:47 2015 +0000 +++ b/mbed.bld Fri Apr 03 05:23:33 2015 +0000 @@ -1,1 +1,1 @@ -http://mbed.org/users/mbed_official/code/mbed/builds/7e07b6fb45cf \ No newline at end of file +http://mbed.org/users/mbed_official/code/mbed/builds/487b796308b0 \ No newline at end of file
--- a/mcr20_helloworld.ewt Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,796 +0,0 @@ -<?xml version="1.0" encoding="iso-8859-1"?> - -<project> - <fileVersion>2</fileVersion> - <configuration> - <name>Debug</name> - <toolchain> - <name>ARM</name> - </toolchain> - <debug>1</debug> - <settings> - <name>RuntimeChecking</name> - <archiveVersion>0</archiveVersion> - <data> - <version>2</version> - <wantNonLocal>1</wantNonLocal> - <debug>1</debug> - <option> - <name>GenRtcDebugHeap</name> - <state>0</state> - </option> - <option> - <name>GenRtcEnableBoundsChecking</name> - <state>0</state> - </option> - <option> - <name>GenRtcCheckPtrsNonInstrMem</name> - <state>1</state> - </option> - <option> - <name>GenRtcTrackPointerBounds</name> - <state>1</state> - </option> - <option> - <name>GenRtcCheckAccesses</name> - <state>1</state> - </option> - <option> - <name>GenRtcGenerateEntries</name> - <state>0</state> - </option> - <option> - <name>GenRtcNrTrackedPointers</name> - <state>1000</state> - </option> - <option> - <name>GenRtcIntOverflow</name> - <state>0</state> - </option> - <option> - <name>GenRtcIncUnsigned</name> - <state>0</state> - </option> - <option> - <name>GenRtcIntConversion</name> - <state>0</state> - </option> - <option> - <name>GenRtcInclExplicit</name> - <state>0</state> - </option> - <option> - <name>GenRtcIntShiftOverflow</name> - <state>0</state> - </option> - <option> - <name>GenRtcInclUnsignedShiftOverflow</name> - <state>0</state> - </option> - <option> - <name>GenRtcUnhandledCase</name> - <state>0</state> - </option> - <option> - <name>GenRtcDivByZero</name> - <state>0</state> - </option> - <option> - <name>GenRtcEnable</name> - <state>0</state> - </option> - <option> - <name>GenRtcCheckPtrsNonInstrFunc</name> - <state>1</state> - </option> - </data> - </settings> - </configuration> - <group> - <name>FXOS8700Q_TapDetector</name> - <file> - <name>$PROJ_DIR$\FXOS8700Q_TapDetector\FXOS8700Q_TD.cpp</name> - </file> - <file> - <name>$PROJ_DIR$\FXOS8700Q_TapDetector\FXOS8700Q_TD.h</name> - </file> - </group> - <group> - <name>mBed</name> - <file> - <name>$PROJ_DIR$\mbed\AnalogIn.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\analogin_api.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\AnalogOut.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\analogout_api.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\BusIn.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\BusInOut.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\BusOut.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\CallChain.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\CAN.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\can_api.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\can_helper.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\cmsis.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\cmsis_nvic.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_ca9.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_ca_mmu.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_caFunc.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_caInstr.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm0.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm0plus.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm3.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm4.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm4_simd.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cmFunc.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cmInstr.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\TARGET_Freescale\TARGET_KPSDK_MCUS\TARGET_MCU_K64F\TARGET_FRDM\device.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\DigitalIn.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\DigitalInOut.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\DigitalOut.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\DirHandle.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\Ethernet.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\ethernet_api.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\FileBase.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\FileHandle.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\FileLike.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\FilePath.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\FileSystemLike.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\TARGET_Freescale\TARGET_KPSDK_MCUS\TARGET_MCU_K64F\device\MK64F12\fsl_bitaccess.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\TARGET_Freescale\TARGET_KPSDK_MCUS\TARGET_MCU_K64F\MK64F12\fsl_clock_K64F12.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\TARGET_Freescale\TARGET_KPSDK_MCUS\TARGET_MCU_K64F\device\device\fsl_device_registers.h</name> - </file> - <file> - <name>$PROJ_DIR$\mbed\TARGET_K64F\TARGET_Freescale\TARGET_KPSDK_MCUS\TARGET_KPSDK_CODE\utilities\fsl_misc_utilities.h</name> - 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</file> - <file> - <name>$PROJ_DIR$\RF_Drivers_Freescale\PhyTypes.h</name> - </file> - </group> - <file> - <name>$PROJ_DIR$\main.cpp</name> - </file> - <file> - <name>$PROJ_DIR$\node_cfg.h</name> - </file> - <file> - <name>$PROJ_DIR$\options.h</name> - </file> -</project> - -
--- a/node_cfg.h Wed Mar 18 18:52:47 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,31 +0,0 @@
-#ifndef NODE_CFG_H_
-#define NODE_CFG_H_
-
-/************** NODE PROFILE SELECTION ***********************/
-#define NODE_CONTROLLER 1 // only for FRDM-K64F platform (running from battery)
-
-/******** Optional Resources ***********/
-#define BATTERY 1
-
-
-/*************** NODE PROFILE CONFIGURATION *****************/
-#if NODE_CONTROLLER
-#define NODE_SHORT_ADDRESS 2
-#define NODE_MAC_ADDRESS {0,0,6,0x02,0x00,0x00,0x09,0x63}
-#define NODE_NAME "mbed-controller"
-#define REMOTE_NODE {0x20,0x02,0x0d,0xb4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xfe,0x00,0x00,0x01}
-#endif
-
-#define ENDPOINT_TYPE {"mbed-device"}
-#define LIFE_TIME {"600"} //seconds, extra char needed to avoid truncation
-
-/************** REGISTRATION PARAMETERS ************************/
-#define RD_UPDATE_PERIOD 30000 // 30 seconds
-#define NSP_IP_ADDRESS {0x20, 0x02, 0x0d, 0xb4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x01, 0x00}
-
-/************* ALARM APPLICATION PARAMETERS *********************/
-#define ALARM_IP_ADDRESS NSP_IP_ADDRESS
-#define ALARM_CTRL_UDP_PORT 1010
-
-#endif // NODE_CFG_H_
-
--- a/options.h Wed Mar 18 18:52:47 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,8 +0,0 @@ -#ifndef OPTIONS_H -#define OPTIONS_H - - -/* define PHY_LINK_RADIO_BAND */ -#define PHY_LINK_15_4_2_4GHZ_TYPE 1 //( 0 = PHY_LINK_15_4_SUBGHZ_TYPE) - -#endif // OPTIONS_H