NXP / Mbed 2 deprecated mcr20_wireless_uart

The MCR20A Wireless UART application functions as an wireless UART bridge between two (one-to-one) or several (one to many) boards. The application can be used with both a TERM, or with software that is capable of opening a serial port and writing to or reading from it. The characters sent or received are not necessarily ASCII printable characters.

Dependencies:   fsl_phy_mcr20a fsl_smac mbed-rtos mbed

Fork of mcr20_wireless_uart by Freescale

By default, the application uses broadcast addresses for OTA communication. This way, the application can be directly downloaded and run without any user intervention. The following use case assumes no changes have been done to the project.

  • Two (or more) MCR20A platforms (plugged into the FRDM-K64F Freescale Freedom Development platform) have to be connected to the PC using the mini/micro-USB cables.
  • The code must be downloaded on the platforms via CMSIS-DAP (or other means).
  • After that, two or more TERM applications must be opened, and the serial ports must be configured with the same baud rate as the one in the project (default baud rate is 115200). Other necessary serial configurations are 8 bit, no parity, and 1 stop bit.
  • To start the setup, each platform must be reset, and one of the (user) push buttons found on the MCR20A platform must be pressed. The user can press any of the non-reset buttons on the FRDM-K64F Freescale Freedom Development platform as well. *This initiates the state machine of the application so user can start.

Documentation

SMAC Demo Applications User Guide

IEEE802_14_5_PHY/driverRFinterface.c@18:b02fc0e53df8, 2015-04-03 (annotated)

Committer:
cotigac
Date:
Fri Apr 03 05:23:33 2015 +0000
Revision:
18:b02fc0e53df8
Started creating wireless uart demo based on mbed-rtos

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cotigac 18:b02fc0e53df8 1 /*
cotigac 18:b02fc0e53df8 2 * driverRFinterface.c
cotigac 18:b02fc0e53df8 3 *
cotigac 18:b02fc0e53df8 4 * Created on: 12 March 2015
cotigac 18:b02fc0e53df8 5 * Author: mBed Team
cotigac 18:b02fc0e53df8 6 */
cotigac 18:b02fc0e53df8 7
cotigac 18:b02fc0e53df8 8 #include "EmbeddedTypes.h"
cotigac 18:b02fc0e53df8 9 #include "Phy.h"
cotigac 18:b02fc0e53df8 10 #include "driverRFinterface.h"
cotigac 18:b02fc0e53df8 11
cotigac 18:b02fc0e53df8 12 #if 0
cotigac 18:b02fc0e53df8 13 #include "arm_hal_interrupt.h"
cotigac 18:b02fc0e53df8 14 #include "arm_hal_phy.h"
cotigac 18:b02fc0e53df8 15
cotigac 18:b02fc0e53df8 16 static uint8_t fsl_MAC[8];
cotigac 18:b02fc0e53df8 17 static phy_device_driver_s device_driver;
cotigac 18:b02fc0e53df8 18 static phy_device_channel_info_s channel_info;
cotigac 18:b02fc0e53df8 19
cotigac 18:b02fc0e53df8 20 static uint8_t rf_channel;
cotigac 18:b02fc0e53df8 21 static int8_t rf_radio_driver_id = -1;
cotigac 18:b02fc0e53df8 22
cotigac 18:b02fc0e53df8 23 static uint8_t mac_tx_handle = 0;
cotigac 18:b02fc0e53df8 24 static uint8_t tx_sequence = 0xff;
cotigac 18:b02fc0e53df8 25 static macToPdDataMessage_t *pPdSapMsg = NULL;
cotigac 18:b02fc0e53df8 26
cotigac 18:b02fc0e53df8 27 /*
cotigac 18:b02fc0e53df8 28 * \brief Function sets the MAC address array.
cotigac 18:b02fc0e53df8 29 *
cotigac 18:b02fc0e53df8 30 * \param ptr Pointer to given MAC address array
cotigac 18:b02fc0e53df8 31 *
cotigac 18:b02fc0e53df8 32 * \return none
cotigac 18:b02fc0e53df8 33 */
cotigac 18:b02fc0e53df8 34 void rf_set_mac_address(const uint8_t *ptr)
cotigac 18:b02fc0e53df8 35 {
cotigac 18:b02fc0e53df8 36 memcpy(fsl_MAC,ptr,8);
cotigac 18:b02fc0e53df8 37 }
cotigac 18:b02fc0e53df8 38
cotigac 18:b02fc0e53df8 39 /*
cotigac 18:b02fc0e53df8 40 * \brief Function initialises and registers the RF driver.
cotigac 18:b02fc0e53df8 41 *
cotigac 18:b02fc0e53df8 42 * \param none
cotigac 18:b02fc0e53df8 43 *
cotigac 18:b02fc0e53df8 44 * \return rf_radio_driver_id Driver ID given by NET library
cotigac 18:b02fc0e53df8 45 */
cotigac 18:b02fc0e53df8 46 int8_t rf_device_register(void)
cotigac 18:b02fc0e53df8 47 {
cotigac 18:b02fc0e53df8 48 //rf_init();
cotigac 18:b02fc0e53df8 49
cotigac 18:b02fc0e53df8 50 Phy_Init();
cotigac 18:b02fc0e53df8 51 Phy_RegisterSapHandlers( (PD_MAC_SapHandler_t)PD_PLME_MAC_SapHandler,
cotigac 18:b02fc0e53df8 52 (PLME_MAC_SapHandler_t)PD_PLME_MAC_SapHandler,
cotigac 18:b02fc0e53df8 53 0);
cotigac 18:b02fc0e53df8 54 PhyPlmeSetPwrState( gPhyPwrAutodoze_c );
cotigac 18:b02fc0e53df8 55 PhyPlmeSetRxOnWhenIdle( TRUE, 0 );
cotigac 18:b02fc0e53df8 56 PhyPpSetPromiscuous(0);
cotigac 18:b02fc0e53df8 57
cotigac 18:b02fc0e53df8 58 /*Set pointer to MAC address*/
cotigac 18:b02fc0e53df8 59 device_driver.PHY_MAC = fsl_MAC;
cotigac 18:b02fc0e53df8 60 device_driver.driver_description = "FSL_MAC";
cotigac 18:b02fc0e53df8 61 #if PHY_LINK_15_4_2_4GHZ_TYPE
cotigac 18:b02fc0e53df8 62 /*Number of channels in PHY*/
cotigac 18:b02fc0e53df8 63 channel_info.channel_count = 16;
cotigac 18:b02fc0e53df8 64 /*Channel mask 26-11*/
cotigac 18:b02fc0e53df8 65 channel_info.channel_mask = 0x07FFF800;
cotigac 18:b02fc0e53df8 66 /*Type of RF PHY is SubGHz*/
cotigac 18:b02fc0e53df8 67 device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
cotigac 18:b02fc0e53df8 68 device_driver.link_channel_info = &channel_info;
cotigac 18:b02fc0e53df8 69 #else
cotigac 18:b02fc0e53df8 70 /*Number of channels in PHY*/
cotigac 18:b02fc0e53df8 71 channel_info.channel_count = 11;
cotigac 18:b02fc0e53df8 72 /*Channel mask 0-10*/
cotigac 18:b02fc0e53df8 73 channel_info.channel_mask = 0x000007ff;
cotigac 18:b02fc0e53df8 74 /*Type of RF PHY is SubGHz*/
cotigac 18:b02fc0e53df8 75 device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
cotigac 18:b02fc0e53df8 76 device_driver.link_channel_info = &channel_info;
cotigac 18:b02fc0e53df8 77 #endif
cotigac 18:b02fc0e53df8 78 /*Maximum size of payload is 127*/
cotigac 18:b02fc0e53df8 79 device_driver.phy_MTU = 127;
cotigac 18:b02fc0e53df8 80 /*No header in PHY*/
cotigac 18:b02fc0e53df8 81 device_driver.phy_header_length = 0;
cotigac 18:b02fc0e53df8 82 /*No tail in PHY*/
cotigac 18:b02fc0e53df8 83 device_driver.phy_tail_length = 0;
cotigac 18:b02fc0e53df8 84 /*Set address write function*/
cotigac 18:b02fc0e53df8 85 device_driver.phy_xx_address_write = &rf_address_write;
cotigac 18:b02fc0e53df8 86 /*Set RF extension function*/
cotigac 18:b02fc0e53df8 87 device_driver.phy_xx_extension = &rf_extension;
cotigac 18:b02fc0e53df8 88 /*Set RF state control function*/
cotigac 18:b02fc0e53df8 89 device_driver.phy_xx_state_control = &rf_interface_state_control;
cotigac 18:b02fc0e53df8 90 /*Set transmit function*/
cotigac 18:b02fc0e53df8 91 device_driver.phy_xx_tx = &rf_tx;
cotigac 18:b02fc0e53df8 92 printf("RF Device Registration...");
cotigac 18:b02fc0e53df8 93 /*Register device driver*/
cotigac 18:b02fc0e53df8 94 rf_radio_driver_id = arm_net_phy_register(&device_driver);
cotigac 18:b02fc0e53df8 95 printf("OK\r\n");
cotigac 18:b02fc0e53df8 96 return rf_radio_driver_id;
cotigac 18:b02fc0e53df8 97 }
cotigac 18:b02fc0e53df8 98
cotigac 18:b02fc0e53df8 99 /*! *********************************************************************************
cotigac 18:b02fc0e53df8 100 * \brief Sends a PD message from PHY to MAC
cotigac 18:b02fc0e53df8 101 *
cotigac 18:b02fc0e53df8 102 * \param[in] pMsg pointer to the Phy Message
cotigac 18:b02fc0e53df8 103 * \param[in] id the MAC instance which should be updated
cotigac 18:b02fc0e53df8 104 *
cotigac 18:b02fc0e53df8 105 * \return resultType_t
cotigac 18:b02fc0e53df8 106 *
cotigac 18:b02fc0e53df8 107 ********************************************************************************** */
cotigac 18:b02fc0e53df8 108 void PD_PLME_MAC_SapHandler( void* pMsg, instanceId_t id )
cotigac 18:b02fc0e53df8 109 {
cotigac 18:b02fc0e53df8 110 pdDataToMacMessage_t* pPhyMsg = pMsg;
cotigac 18:b02fc0e53df8 111 phy_link_tx_status_e phy_status = PHY_LINK_TX_FAIL;
cotigac 18:b02fc0e53df8 112 uint8_t * pPsdu;
cotigac 18:b02fc0e53df8 113 uint8_t psduLength = 0;
cotigac 18:b02fc0e53df8 114 uint8_t lqi = 0;
cotigac 18:b02fc0e53df8 115
cotigac 18:b02fc0e53df8 116 int retval = 5;
cotigac 18:b02fc0e53df8 117
cotigac 18:b02fc0e53df8 118 switch(pPhyMsg->msgType)
cotigac 18:b02fc0e53df8 119 {
cotigac 18:b02fc0e53df8 120 case gPdDataCnf_c:
cotigac 18:b02fc0e53df8 121 switch(pPhyMsg->msgData.dataCnf.status)
cotigac 18:b02fc0e53df8 122 {
cotigac 18:b02fc0e53df8 123 case gPhySuccess_c:
cotigac 18:b02fc0e53df8 124 phy_status = PHY_LINK_TX_DONE;
cotigac 18:b02fc0e53df8 125 break;
cotigac 18:b02fc0e53df8 126
cotigac 18:b02fc0e53df8 127 case gPhyChannelBusy_c:
cotigac 18:b02fc0e53df8 128 phy_status = PHY_LINK_CCA_FAIL;
cotigac 18:b02fc0e53df8 129 break;
cotigac 18:b02fc0e53df8 130
cotigac 18:b02fc0e53df8 131 case gPhyNoAck_c:
cotigac 18:b02fc0e53df8 132 phy_status = PHY_LINK_TX_DONE_PENDING;
cotigac 18:b02fc0e53df8 133 break;
cotigac 18:b02fc0e53df8 134
cotigac 18:b02fc0e53df8 135 case gPhyBusy_c:
cotigac 18:b02fc0e53df8 136 default:
cotigac 18:b02fc0e53df8 137 break;
cotigac 18:b02fc0e53df8 138 }
cotigac 18:b02fc0e53df8 139
cotigac 18:b02fc0e53df8 140 //free PHY PdSap Structure
cotigac 18:b02fc0e53df8 141 MEM_BufferFree(pPdSapMsg);
cotigac 18:b02fc0e53df8 142
cotigac 18:b02fc0e53df8 143 /*Call PHY TX Done API*/
cotigac 18:b02fc0e53df8 144 arm_net_phy_tx_done(rf_radio_driver_id, mac_tx_handle, phy_status, 1, 1);
cotigac 18:b02fc0e53df8 145 //printf("MSG: TX Done. \r\n");
cotigac 18:b02fc0e53df8 146 break;
cotigac 18:b02fc0e53df8 147
cotigac 18:b02fc0e53df8 148 case gPdDataInd_c:
cotigac 18:b02fc0e53df8 149 psduLength = pPhyMsg->msgData.dataInd.psduLength;
cotigac 18:b02fc0e53df8 150 pPsdu = MEM_BufferAlloc(psduLength);
cotigac 18:b02fc0e53df8 151 lqi = pPhyMsg->msgData.dataInd.ppduLinkQuality;
cotigac 18:b02fc0e53df8 152 FLib_MemCpy(pPsdu, pPhyMsg->msgData.dataInd.pPsdu, psduLength);
cotigac 18:b02fc0e53df8 153
cotigac 18:b02fc0e53df8 154 //free PHY PdSap Structure
cotigac 18:b02fc0e53df8 155 MEM_BufferFree(pPdSapMsg);
cotigac 18:b02fc0e53df8 156
cotigac 18:b02fc0e53df8 157 //retval = arm_net_phy_rx(pPhyMsg->msgData.dataInd.pPsdu, pPhyMsg->msgData.dataInd.psduLength, pPhyMsg->msgData.dataInd.ppduLinkQuality, rf_radio_driver_id);
cotigac 18:b02fc0e53df8 158 retval = arm_net_phy_rx(pPsdu, psduLength, lqi, rf_radio_driver_id);
cotigac 18:b02fc0e53df8 159
cotigac 18:b02fc0e53df8 160 if(-1 == retval)
cotigac 18:b02fc0e53df8 161 {
cotigac 18:b02fc0e53df8 162 //printf("MSG: RX Error. \r\n");
cotigac 18:b02fc0e53df8 163 while(1);
cotigac 18:b02fc0e53df8 164 }
cotigac 18:b02fc0e53df8 165 //printf("MSG: RX Done. \r\n");
cotigac 18:b02fc0e53df8 166 break;
cotigac 18:b02fc0e53df8 167
cotigac 18:b02fc0e53df8 168 default:
cotigac 18:b02fc0e53df8 169 break;
cotigac 18:b02fc0e53df8 170 }
cotigac 18:b02fc0e53df8 171 }
cotigac 18:b02fc0e53df8 172 #endif
cotigac 18:b02fc0e53df8 173 #if 0
cotigac 18:b02fc0e53df8 174
cotigac 18:b02fc0e53df8 175 typedef enum
cotigac 18:b02fc0e53df8 176 {
cotigac 18:b02fc0e53df8 177 PHY_LINK_TX_DONE, /**< TX process Ready and ACK RX */
cotigac 18:b02fc0e53df8 178 PHY_LINK_TX_DONE_PENDING, /**< TX process OK with ACK pending flag*/
cotigac 18:b02fc0e53df8 179 PHY_LINK_TX_SUCCESS, /**< MAC TX complete MAC will make decission to enter wait ack or TX Done state*/
cotigac 18:b02fc0e53df8 180 PHY_LINK_TX_FAIL, /**< Link TX process fail*/
cotigac 18:b02fc0e53df8 181 PHY_LINK_CCA_FAIL, /**< RF Link CCA process fail */
cotigac 18:b02fc0e53df8 182 } phy_link_tx_status_e;
cotigac 18:b02fc0e53df8 183 #endif
cotigac 18:b02fc0e53df8 184 #if 0
cotigac 18:b02fc0e53df8 185 /*
cotigac 18:b02fc0e53df8 186 * \brief Function sets the addresses to RF address filters.
cotigac 18:b02fc0e53df8 187 *
cotigac 18:b02fc0e53df8 188 * \param address_type Type of address
cotigac 18:b02fc0e53df8 189 * \param address_ptr Pointer to given address
cotigac 18:b02fc0e53df8 190 *
cotigac 18:b02fc0e53df8 191 * \return 0 Success
cotigac 18:b02fc0e53df8 192 */
cotigac 18:b02fc0e53df8 193 static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
cotigac 18:b02fc0e53df8 194 {
cotigac 18:b02fc0e53df8 195 int8_t ret_val = 0;
cotigac 18:b02fc0e53df8 196 uint64_t temp64 = 0;
cotigac 18:b02fc0e53df8 197 uint16_t temp16 = 0;
cotigac 18:b02fc0e53df8 198
cotigac 18:b02fc0e53df8 199 switch (address_type)
cotigac 18:b02fc0e53df8 200 {
cotigac 18:b02fc0e53df8 201 /*Set 48-bit address*/
cotigac 18:b02fc0e53df8 202 case PHY_MAC_48BIT:
cotigac 18:b02fc0e53df8 203 break;
cotigac 18:b02fc0e53df8 204 /*Set 64-bit address*/
cotigac 18:b02fc0e53df8 205 case PHY_MAC_64BIT:
cotigac 18:b02fc0e53df8 206 temp64 = atouint64(address_ptr);
cotigac 18:b02fc0e53df8 207 temp64 = NWKU_Revert64(temp64);
cotigac 18:b02fc0e53df8 208 PhyPlmeSetPIBRequest(gPhyPibLongAddress_c, temp64, 0, 0 );
cotigac 18:b02fc0e53df8 209 break;
cotigac 18:b02fc0e53df8 210 /*Set 16-bit address*/
cotigac 18:b02fc0e53df8 211 case PHY_MAC_16BIT:
cotigac 18:b02fc0e53df8 212 temp16 = atouint16(address_ptr);
cotigac 18:b02fc0e53df8 213 PhyPlmeSetPIBRequest(gPhyPibShortAddress_c, temp16, 0, 0 );
cotigac 18:b02fc0e53df8 214 break;
cotigac 18:b02fc0e53df8 215 /*Set PAN Id*/
cotigac 18:b02fc0e53df8 216 case PHY_MAC_PANID:
cotigac 18:b02fc0e53df8 217 temp16 = atouint16(address_ptr);
cotigac 18:b02fc0e53df8 218 PhyPlmeSetPIBRequest(gPhyPibPanId_c, temp16, 0, 0 );
cotigac 18:b02fc0e53df8 219 break;
cotigac 18:b02fc0e53df8 220 }
cotigac 18:b02fc0e53df8 221 return ret_val;
cotigac 18:b02fc0e53df8 222 }
cotigac 18:b02fc0e53df8 223
cotigac 18:b02fc0e53df8 224 /*
cotigac 18:b02fc0e53df8 225 * \brief Function controls the ACK pending, channel setting and energy detection.
cotigac 18:b02fc0e53df8 226 *
cotigac 18:b02fc0e53df8 227 * \param extension_type Type of control
cotigac 18:b02fc0e53df8 228 * \param data_ptr Data from NET library
cotigac 18:b02fc0e53df8 229 *
cotigac 18:b02fc0e53df8 230 * \return 0 Success
cotigac 18:b02fc0e53df8 231 */
cotigac 18:b02fc0e53df8 232 static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
cotigac 18:b02fc0e53df8 233 {
cotigac 18:b02fc0e53df8 234 switch (extension_type)
cotigac 18:b02fc0e53df8 235 {
cotigac 18:b02fc0e53df8 236 /*Control MAC pending bit for Indirect data transmission*/
cotigac 18:b02fc0e53df8 237 case PHY_EXTENSION_CTRL_PENDING_BIT:
cotigac 18:b02fc0e53df8 238 if(*data_ptr)
cotigac 18:b02fc0e53df8 239 {
cotigac 18:b02fc0e53df8 240 //rf_if_ack_pending_ctrl(1);
cotigac 18:b02fc0e53df8 241 }
cotigac 18:b02fc0e53df8 242 else
cotigac 18:b02fc0e53df8 243 {
cotigac 18:b02fc0e53df8 244 //rf_if_ack_pending_ctrl(0);
cotigac 18:b02fc0e53df8 245 }
cotigac 18:b02fc0e53df8 246 break;
cotigac 18:b02fc0e53df8 247 /*Return frame pending status*/
cotigac 18:b02fc0e53df8 248 case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
cotigac 18:b02fc0e53df8 249 //*data_ptr = rf_if_last_acked_pending();
cotigac 18:b02fc0e53df8 250 break;
cotigac 18:b02fc0e53df8 251 /*Set channel*/
cotigac 18:b02fc0e53df8 252 case PHY_EXTENSION_SET_CHANNEL:
cotigac 18:b02fc0e53df8 253 break;
cotigac 18:b02fc0e53df8 254 /*Read energy on the channel*/
cotigac 18:b02fc0e53df8 255 case PHY_EXTENSION_READ_CHANNEL_ENERGY:
cotigac 18:b02fc0e53df8 256 break;
cotigac 18:b02fc0e53df8 257 /*Read status of the link*/
cotigac 18:b02fc0e53df8 258 case PHY_EXTENSION_READ_LINK_STATUS:
cotigac 18:b02fc0e53df8 259 break;
cotigac 18:b02fc0e53df8 260 }
cotigac 18:b02fc0e53df8 261 return 0;
cotigac 18:b02fc0e53df8 262 }
cotigac 18:b02fc0e53df8 263
cotigac 18:b02fc0e53df8 264 /*
cotigac 18:b02fc0e53df8 265 * \brief Function gives the control of RF states to MAC.
cotigac 18:b02fc0e53df8 266 *
cotigac 18:b02fc0e53df8 267 * \param new_state RF state
cotigac 18:b02fc0e53df8 268 * \param rf_channel RF channel
cotigac 18:b02fc0e53df8 269 *
cotigac 18:b02fc0e53df8 270 * \return 0 Success
cotigac 18:b02fc0e53df8 271 */
cotigac 18:b02fc0e53df8 272 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
cotigac 18:b02fc0e53df8 273 {
cotigac 18:b02fc0e53df8 274 int8_t ret_val = 0;
cotigac 18:b02fc0e53df8 275 switch (new_state)
cotigac 18:b02fc0e53df8 276 {
cotigac 18:b02fc0e53df8 277 /*Reset PHY driver and set to idle*/
cotigac 18:b02fc0e53df8 278 case PHY_INTERFACE_RESET:
cotigac 18:b02fc0e53df8 279 break;
cotigac 18:b02fc0e53df8 280 /*Disable PHY Interface driver*/
cotigac 18:b02fc0e53df8 281 case PHY_INTERFACE_DOWN:
cotigac 18:b02fc0e53df8 282 //PhyPlmeForceTrxOffRequest();
cotigac 18:b02fc0e53df8 283 //rf_shutdown();
cotigac 18:b02fc0e53df8 284 break;
cotigac 18:b02fc0e53df8 285 /*Enable PHY Interface driver*/
cotigac 18:b02fc0e53df8 286 case PHY_INTERFACE_UP:
cotigac 18:b02fc0e53df8 287 //PhyPlmeSetPwrState( gPhyPwrAutodoze_c );
cotigac 18:b02fc0e53df8 288 //PhyPlmeSetRxOnWhenIdle( TRUE, 0 );
cotigac 18:b02fc0e53df8 289 //PhyPpSetPromiscuous(0);
cotigac 18:b02fc0e53df8 290 //rf_channel_set(rf_channel);
cotigac 18:b02fc0e53df8 291 //rf_receive();
cotigac 18:b02fc0e53df8 292 break;
cotigac 18:b02fc0e53df8 293 /*Enable wireless interface ED scan mode*/
cotigac 18:b02fc0e53df8 294 case PHY_INTERFACE_RX_ENERGY_STATE:
cotigac 18:b02fc0e53df8 295 break;
cotigac 18:b02fc0e53df8 296 }
cotigac 18:b02fc0e53df8 297 return ret_val;
cotigac 18:b02fc0e53df8 298 }
cotigac 18:b02fc0e53df8 299
cotigac 18:b02fc0e53df8 300
cotigac 18:b02fc0e53df8 301 /*
cotigac 18:b02fc0e53df8 302 * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
cotigac 18:b02fc0e53df8 303 *
cotigac 18:b02fc0e53df8 304 * \param data_ptr Pointer to TX data
cotigac 18:b02fc0e53df8 305 * \param data_length Length of the TX data
cotigac 18:b02fc0e53df8 306 * \param tx_handle Handle to transmission
cotigac 18:b02fc0e53df8 307 * \return 0 Success
cotigac 18:b02fc0e53df8 308 * \return -1 Busy
cotigac 18:b02fc0e53df8 309 */
cotigac 18:b02fc0e53df8 310 int8_t rf_tx(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle)
cotigac 18:b02fc0e53df8 311 {
cotigac 18:b02fc0e53df8 312 /*Store TX handle*/
cotigac 18:b02fc0e53df8 313 mac_tx_handle = tx_handle;
cotigac 18:b02fc0e53df8 314
cotigac 18:b02fc0e53df8 315 /*Store the sequence number for ACK handling*/
cotigac 18:b02fc0e53df8 316 tx_sequence = *(data_ptr + 2);
cotigac 18:b02fc0e53df8 317
cotigac 18:b02fc0e53df8 318 pPdSapMsg = MEM_BufferAlloc(sizeof(macToPdDataMessage_t));
cotigac 18:b02fc0e53df8 319 pPdSapMsg->macInstance = 0;
cotigac 18:b02fc0e53df8 320 pPdSapMsg->msgType = gPdDataReq_c;
cotigac 18:b02fc0e53df8 321
cotigac 18:b02fc0e53df8 322 /*Check if transmitted data needs to be acked*/
cotigac 18:b02fc0e53df8 323 if(*data_ptr & 0x20)
cotigac 18:b02fc0e53df8 324 {
cotigac 18:b02fc0e53df8 325 pPdSapMsg->msgData.dataReq.ackRequired = gPhyRxAckRqd_c;
cotigac 18:b02fc0e53df8 326 }
cotigac 18:b02fc0e53df8 327 else
cotigac 18:b02fc0e53df8 328 {
cotigac 18:b02fc0e53df8 329 pPdSapMsg->msgData.dataReq.ackRequired = gPhyNoAckRqd_c;
cotigac 18:b02fc0e53df8 330 }
cotigac 18:b02fc0e53df8 331
cotigac 18:b02fc0e53df8 332 pPdSapMsg->msgData.dataReq.startTime = gPhySeqStartAsap_c;
cotigac 18:b02fc0e53df8 333 pPdSapMsg->msgData.dataReq.txDuration = gPhySeqStartAsap_c;
cotigac 18:b02fc0e53df8 334 pPdSapMsg->msgData.dataReq.CCABeforeTx = gPhyCCAMode1_c;
cotigac 18:b02fc0e53df8 335 pPdSapMsg->msgData.dataReq.slottedTx = gPhyUnslottedMode_c;
cotigac 18:b02fc0e53df8 336 pPdSapMsg->msgData.dataReq.pPsdu = data_ptr;
cotigac 18:b02fc0e53df8 337 pPdSapMsg->msgData.dataReq.psduLength = data_length;
cotigac 18:b02fc0e53df8 338
cotigac 18:b02fc0e53df8 339 MAC_PD_SapHandler(pPdSapMsg, 0);
cotigac 18:b02fc0e53df8 340
cotigac 18:b02fc0e53df8 341
cotigac 18:b02fc0e53df8 342 #if 0
cotigac 18:b02fc0e53df8 343 /*Check if transmitter is busy*/
cotigac 18:b02fc0e53df8 344 if((rf_if_read_trx_state() == BUSY_RX_AACK) || (rf_if_read_trx_state() == BUSY_RX))
cotigac 18:b02fc0e53df8 345 {
cotigac 18:b02fc0e53df8 346 /*Return busy*/
cotigac 18:b02fc0e53df8 347 return -1;
cotigac 18:b02fc0e53df8 348 }
cotigac 18:b02fc0e53df8 349 else
cotigac 18:b02fc0e53df8 350 {
cotigac 18:b02fc0e53df8 351 arm_enter_critical();
cotigac 18:b02fc0e53df8 352 /*Check if transmitted data needs to be acked*/
cotigac 18:b02fc0e53df8 353 if(*data_ptr & 0x20)
cotigac 18:b02fc0e53df8 354 need_ack = 1;
cotigac 18:b02fc0e53df8 355 else
cotigac 18:b02fc0e53df8 356 need_ack = 0;
cotigac 18:b02fc0e53df8 357 /*Store the sequence number for ACK handling*/
cotigac 18:b02fc0e53df8 358 tx_sequence = *(data_ptr + 2);
cotigac 18:b02fc0e53df8 359 /*Set radio in RX state to read channel*/
cotigac 18:b02fc0e53df8 360 rf_receive();
cotigac 18:b02fc0e53df8 361 /*Write TX FIFO*/
cotigac 18:b02fc0e53df8 362 rf_if_write_frame_buffer(data_ptr, (uint8_t)data_length);
cotigac 18:b02fc0e53df8 363 rf_flags_set(RFF_CCA);
cotigac 18:b02fc0e53df8 364 /*Start CCA process*/
cotigac 18:b02fc0e53df8 365 rf_if_enable_cca_ed_done_interrupt();
cotigac 18:b02fc0e53df8 366 rf_if_start_cca_process();
cotigac 18:b02fc0e53df8 367 /*Store TX handle*/
cotigac 18:b02fc0e53df8 368 mac_tx_handle = tx_handle;
cotigac 18:b02fc0e53df8 369 arm_exit_critical();
cotigac 18:b02fc0e53df8 370 }
cotigac 18:b02fc0e53df8 371 #endif
cotigac 18:b02fc0e53df8 372
cotigac 18:b02fc0e53df8 373 /*Return success*/
cotigac 18:b02fc0e53df8 374 return 0;
cotigac 18:b02fc0e53df8 375 }
cotigac 18:b02fc0e53df8 376
cotigac 18:b02fc0e53df8 377 /*
cotigac 18:b02fc0e53df8 378 * \brief Function sets the RF channel.
cotigac 18:b02fc0e53df8 379 *
cotigac 18:b02fc0e53df8 380 * \param ch New channel
cotigac 18:b02fc0e53df8 381 *
cotigac 18:b02fc0e53df8 382 * \return none
cotigac 18:b02fc0e53df8 383 */
cotigac 18:b02fc0e53df8 384 void rf_channel_set(uint8_t ch)
cotigac 18:b02fc0e53df8 385 {
cotigac 18:b02fc0e53df8 386 //arm_enter_critical();
cotigac 18:b02fc0e53df8 387 if(ch < 0x1f)
cotigac 18:b02fc0e53df8 388 {
cotigac 18:b02fc0e53df8 389 rf_channel = ch;
cotigac 18:b02fc0e53df8 390 PhyPlmeSetPIBRequest(gPhyPibCurrentChannel_c, ch, 0, 0 );
cotigac 18:b02fc0e53df8 391 }
cotigac 18:b02fc0e53df8 392 //arm_exit_critical();
cotigac 18:b02fc0e53df8 393 }
cotigac 18:b02fc0e53df8 394 #endif
cotigac 18:b02fc0e53df8 395
cotigac 18:b02fc0e53df8 396 uint16_t atouint16
cotigac 18:b02fc0e53df8 397 (
cotigac 18:b02fc0e53df8 398 uint8_t* pArray
cotigac 18:b02fc0e53df8 399 )
cotigac 18:b02fc0e53df8 400 {
cotigac 18:b02fc0e53df8 401 uuint16_t out = {0};
cotigac 18:b02fc0e53df8 402
cotigac 18:b02fc0e53df8 403 out.u8[1] = *pArray++;
cotigac 18:b02fc0e53df8 404 out.u8[0] = *pArray;
cotigac 18:b02fc0e53df8 405
cotigac 18:b02fc0e53df8 406 return out.u16;
cotigac 18:b02fc0e53df8 407 }
cotigac 18:b02fc0e53df8 408
cotigac 18:b02fc0e53df8 409 uint64_t atouint64
cotigac 18:b02fc0e53df8 410 (
cotigac 18:b02fc0e53df8 411 uint8_t* pArray
cotigac 18:b02fc0e53df8 412 )
cotigac 18:b02fc0e53df8 413 {
cotigac 18:b02fc0e53df8 414 uuint64_t out;
cotigac 18:b02fc0e53df8 415
cotigac 18:b02fc0e53df8 416 out.u8[7] = *pArray++;
cotigac 18:b02fc0e53df8 417 out.u8[6] = *pArray++;
cotigac 18:b02fc0e53df8 418 out.u8[5] = *pArray++;
cotigac 18:b02fc0e53df8 419 out.u8[4] = *pArray++;
cotigac 18:b02fc0e53df8 420 out.u8[3] = *pArray++;
cotigac 18:b02fc0e53df8 421 out.u8[2] = *pArray++;
cotigac 18:b02fc0e53df8 422 out.u8[1] = *pArray++;
cotigac 18:b02fc0e53df8 423 out.u8[0] = *pArray;
cotigac 18:b02fc0e53df8 424
cotigac 18:b02fc0e53df8 425 return out.u64;
cotigac 18:b02fc0e53df8 426 }
cotigac 18:b02fc0e53df8 427
cotigac 18:b02fc0e53df8 428 uint64_t NWKU_Revert64
cotigac 18:b02fc0e53df8 429 (
cotigac 18:b02fc0e53df8 430 uint64_t value
cotigac 18:b02fc0e53df8 431 )
cotigac 18:b02fc0e53df8 432 {
cotigac 18:b02fc0e53df8 433 uuint64_t in;
cotigac 18:b02fc0e53df8 434 uuint64_t out;
cotigac 18:b02fc0e53df8 435 in.u64 = value;
cotigac 18:b02fc0e53df8 436
cotigac 18:b02fc0e53df8 437 out.u8[0] = in.u8[7];
cotigac 18:b02fc0e53df8 438 out.u8[1] = in.u8[6];
cotigac 18:b02fc0e53df8 439 out.u8[2] = in.u8[5];
cotigac 18:b02fc0e53df8 440 out.u8[3] = in.u8[4];
cotigac 18:b02fc0e53df8 441 out.u8[4] = in.u8[3];
cotigac 18:b02fc0e53df8 442 out.u8[5] = in.u8[2];
cotigac 18:b02fc0e53df8 443 out.u8[6] = in.u8[1];
cotigac 18:b02fc0e53df8 444 out.u8[7] = in.u8[0];
cotigac 18:b02fc0e53df8 445
cotigac 18:b02fc0e53df8 446 return out.u64;
cotigac 18:b02fc0e53df8 447 }