The MCR20A Wireless UART application functions as an wireless UART bridge between two (one-to-one) or several (one to many) boards. The application can be used with both a TERM, or with software that is capable of opening a serial port and writing to or reading from it. The characters sent or received are not necessarily ASCII printable characters.

Dependencies:   fsl_phy_mcr20a fsl_smac mbed-rtos mbed

Fork of mcr20_wireless_uart by Freescale

By default, the application uses broadcast addresses for OTA communication. This way, the application can be directly downloaded and run without any user intervention. The following use case assumes no changes have been done to the project.

  • Two (or more) MCR20A platforms (plugged into the FRDM-K64F Freescale Freedom Development platform) have to be connected to the PC using the mini/micro-USB cables.
  • The code must be downloaded on the platforms via CMSIS-DAP (or other means).
  • After that, two or more TERM applications must be opened, and the serial ports must be configured with the same baud rate as the one in the project (default baud rate is 115200). Other necessary serial configurations are 8 bit, no parity, and 1 stop bit.
  • To start the setup, each platform must be reset, and one of the (user) push buttons found on the MCR20A platform must be pressed. The user can press any of the non-reset buttons on the FRDM-K64F Freescale Freedom Development platform as well. *This initiates the state machine of the application so user can start.

Documentation

SMAC Demo Applications User Guide

Committer:
cotigac
Date:
Fri Apr 03 05:23:33 2015 +0000
Revision:
18:b02fc0e53df8
Started creating wireless uart demo based on mbed-rtos

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cotigac 18:b02fc0e53df8 1 /*!
cotigac 18:b02fc0e53df8 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
cotigac 18:b02fc0e53df8 3 * All rights reserved.
cotigac 18:b02fc0e53df8 4 *
cotigac 18:b02fc0e53df8 5 * \file PhyConfig.h
cotigac 18:b02fc0e53df8 6 *
cotigac 18:b02fc0e53df8 7 * Redistribution and use in source and binary forms, with or without modification,
cotigac 18:b02fc0e53df8 8 * are permitted provided that the following conditions are met:
cotigac 18:b02fc0e53df8 9 *
cotigac 18:b02fc0e53df8 10 * o Redistributions of source code must retain the above copyright notice, this list
cotigac 18:b02fc0e53df8 11 * of conditions and the following disclaimer.
cotigac 18:b02fc0e53df8 12 *
cotigac 18:b02fc0e53df8 13 * o Redistributions in binary form must reproduce the above copyright notice, this
cotigac 18:b02fc0e53df8 14 * list of conditions and the following disclaimer in the documentation and/or
cotigac 18:b02fc0e53df8 15 * other materials provided with the distribution.
cotigac 18:b02fc0e53df8 16 *
cotigac 18:b02fc0e53df8 17 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
cotigac 18:b02fc0e53df8 18 * contributors may be used to endorse or promote products derived from this
cotigac 18:b02fc0e53df8 19 * software without specific prior written permission.
cotigac 18:b02fc0e53df8 20 *
cotigac 18:b02fc0e53df8 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
cotigac 18:b02fc0e53df8 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
cotigac 18:b02fc0e53df8 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
cotigac 18:b02fc0e53df8 24 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
cotigac 18:b02fc0e53df8 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
cotigac 18:b02fc0e53df8 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
cotigac 18:b02fc0e53df8 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
cotigac 18:b02fc0e53df8 28 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
cotigac 18:b02fc0e53df8 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
cotigac 18:b02fc0e53df8 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cotigac 18:b02fc0e53df8 31 */
cotigac 18:b02fc0e53df8 32
cotigac 18:b02fc0e53df8 33 #ifndef _PHY_CONFIG_H_
cotigac 18:b02fc0e53df8 34 #define _PHY_CONFIG_H_
cotigac 18:b02fc0e53df8 35
cotigac 18:b02fc0e53df8 36 #ifndef gAspCapability_d
cotigac 18:b02fc0e53df8 37 #define gAspCapability_d 1
cotigac 18:b02fc0e53df8 38 #endif
cotigac 18:b02fc0e53df8 39
cotigac 18:b02fc0e53df8 40 #ifndef gMaxPhyTimers_c
cotigac 18:b02fc0e53df8 41 #define gMaxPhyTimers_c 10
cotigac 18:b02fc0e53df8 42 #endif
cotigac 18:b02fc0e53df8 43
cotigac 18:b02fc0e53df8 44 #ifndef gMpmMaxPANs_c
cotigac 18:b02fc0e53df8 45 #define gMpmMaxPANs_c 1
cotigac 18:b02fc0e53df8 46 #endif
cotigac 18:b02fc0e53df8 47
cotigac 18:b02fc0e53df8 48 #ifndef gPhyInstancesCnt_c
cotigac 18:b02fc0e53df8 49 #define gPhyInstancesCnt_c 1
cotigac 18:b02fc0e53df8 50 #endif
cotigac 18:b02fc0e53df8 51
cotigac 18:b02fc0e53df8 52 #ifndef gPhyTaskStackSize_c
cotigac 18:b02fc0e53df8 53 #define gPhyTaskStackSize_c 600
cotigac 18:b02fc0e53df8 54 #endif
cotigac 18:b02fc0e53df8 55
cotigac 18:b02fc0e53df8 56 #ifndef gPhyTaskPriority_c
cotigac 18:b02fc0e53df8 57 #define gPhyTaskPriority_c OSA_PRIORITY_REAL_TIME
cotigac 18:b02fc0e53df8 58 #endif
cotigac 18:b02fc0e53df8 59
cotigac 18:b02fc0e53df8 60 #ifndef gAfcEnabled_d
cotigac 18:b02fc0e53df8 61 #define gAfcEnabled_d 0
cotigac 18:b02fc0e53df8 62 #endif
cotigac 18:b02fc0e53df8 63
cotigac 18:b02fc0e53df8 64 #endif //_PHY_CONFIG_H_
cotigac 18:b02fc0e53df8 65