Tobias Naegeli / Mbed 2 deprecated AIT_UWB_Range

Tobi's ubw test branch

Dependencies:   mavlink_bridge mbed

Fork of AIT_UWB_Range by Benjamin Hepp

DW1000/DW1000.cpp@65:4c3bd79b57d2, 2016-01-05 (annotated)

Committer:
bhepp
Date:
Tue Jan 05 09:54:33 2016 +0000
Revision:
65:4c3bd79b57d2
Parent:
60:43be9228b3b9
Child:
67:bd0f0580af5a
Fixed bug in interrupt logic

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manumaet 0:f50e671ffff7 1 #include "DW1000.h"
manumaet 0:f50e671ffff7 2
bhepp 50:50b8aea54a51 3 // Change this depending on whether damaged or heatlhy DWM1000 modules are used.
bhepp 50:50b8aea54a51 4 const bool DWM1000_DAMAGED = true;
bhepp 50:50b8aea54a51 5
bhepp 48:5999e510f154 6 //#include "PC.h"
bhepp 48:5999e510f154 7 //static PC pc(USBTX, USBRX, 115200); // USB UART Terminal
bhepp 48:5999e510f154 8
bhepp 65:4c3bd79b57d2 9 DW1000::DW1000(SPI& spi, InterruptIn& irq, PinName CS, PinName RESET) : spi(spi), cs(CS), irq(irq), reset(RESET) {
manumaet 26:a65c6f26c458 10 setCallbacks(NULL, NULL);
naegelit 53:79a72d752ec4 11 deselect();
naegelit 53:79a72d752ec4 12 //wait(2);
naegelit 53:79a72d752ec4 13 select();
naegelit 53:79a72d752ec4 14
naegelit 53:79a72d752ec4 15 //wait(2);
naegelit 53:79a72d752ec4 16 deselect();
naegelit 53:79a72d752ec4 17 //wait(2); // Chip must be deselected first
manumaet 37:40f94c634c3e 18 resetAll(); // we do a soft reset of the DW1000 everytime the driver starts
manumaet 44:2e0045042a59 19
manumaet 18:bbc7ca7d3a95 20 // Configuration TODO: make method for that
manumaet 45:01a33363bc21 21 // User Manual "2.5.5 Default Configurations that should be modified" p. 22
manumaet 45:01a33363bc21 22 //Those values are for the standard mode (6.8Mbps, 5, 16Mhz, 32 Symbols) and are INCOMPLETE!
manumaet 45:01a33363bc21 23 // writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870);
manumaet 45:01a33363bc21 24 // writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907);
manumaet 45:01a33363bc21 25 // writeRegister32(DW1000_DRX_CONF, 0x08, 0x311A002D);
manumaet 45:01a33363bc21 26 // writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD);
manumaet 45:01a33363bc21 27 // writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607);
manumaet 45:01a33363bc21 28 // writeRegister32(DW1000_TX_POWER, 0, 0x0E082848);
manumaet 45:01a33363bc21 29 // writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0);
manumaet 45:01a33363bc21 30 // writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0);
manumaet 45:01a33363bc21 31 // writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6);
manumaet 44:2e0045042a59 32
manumaet 45:01a33363bc21 33
manumaet 45:01a33363bc21 34 //Those values are for the 110kbps mode (5, 16MHz, 1024 Symbols) and are quite complete
manumaet 45:01a33363bc21 35 writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870); //AGC_TUNE1 for 16MHz PRF
manumaet 45:01a33363bc21 36 writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907); //AGC_TUNE2 (Universal)
manumaet 45:01a33363bc21 37 writeRegister16(DW1000_AGC_CTRL, 0x12, 0x0055); //AGC_TUNE3 (Universal)
manumaet 45:01a33363bc21 38
manumaet 45:01a33363bc21 39 writeRegister16(DW1000_DRX_CONF, 0x02, 0x000A); //DRX_TUNE0b for 110kbps
manumaet 45:01a33363bc21 40 writeRegister16(DW1000_DRX_CONF, 0x04, 0x0087); //DRX_TUNE1a for 16MHz PRF
manumaet 45:01a33363bc21 41 writeRegister16(DW1000_DRX_CONF, 0x06, 0x0064); //DRX_TUNE1b for 110kbps & > 1024 symbols
manumaet 45:01a33363bc21 42 writeRegister32(DW1000_DRX_CONF, 0x08, 0x351A009A); //PAC size for 1024 symbols preamble & 16MHz PRF
manumaet 45:01a33363bc21 43 //writeRegister32(DW1000_DRX_CONF, 0x08, 0x371A011D); //PAC size for 2048 symbols preamble
manumaet 45:01a33363bc21 44
manumaet 45:01a33363bc21 45 writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD); //LDE_CFG1
manumaet 45:01a33363bc21 46 writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607); //LDE_CFG2 for 16MHz PRF
manumaet 45:01a33363bc21 47
manumaet 46:6398237672a0 48 writeRegister32(DW1000_TX_POWER, 0, 0x28282828); //Power for channel 5
manumaet 45:01a33363bc21 49
manumaet 45:01a33363bc21 50 writeRegister8(DW1000_RF_CONF, 0x0B, 0xD8); //RF_RXCTRLH for channel 5
manumaet 45:01a33363bc21 51 writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0); //RF_TXCTRL for channel 5
manumaet 45:01a33363bc21 52
manumaet 45:01a33363bc21 53 writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0); //TC_PGDELAY for channel 5
manumaet 45:01a33363bc21 54
manumaet 45:01a33363bc21 55 writeRegister32 (DW1000_FS_CTRL, 0x07, 0x0800041D); //FS_PLLCFG for channel 5
manumaet 45:01a33363bc21 56 writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6); //FS_PLLTUNE for channel 5
manumaet 45:01a33363bc21 57
manumaet 46:6398237672a0 58 loadLDE(); // important everytime DW1000 initialises/awakes otherwise the LDE algorithm must be turned off or there's receiving malfunction see User Manual LDELOAD on p22 & p158
manumaet 42:83931678c4de 59
manumaet 42:83931678c4de 60 // 110kbps CAUTION: a lot of other registers have to be set for an optimized operation on 110kbps
manumaet 45:01a33363bc21 61 writeRegister16(DW1000_TX_FCTRL, 1, 0x0800 | 0x0100 | 0x0080); // use 1024 symbols preamble (0x0800) (previously 2048 - 0x2800), 16MHz pulse repetition frequency (0x0100), 110kbps bit rate (0x0080) see p.69 of DW1000 User Manual
manumaet 45:01a33363bc21 62 writeRegister8(DW1000_SYS_CFG, 2, 0x44); // enable special receiving option for 110kbps (disable smartTxPower)!! (0x44) see p.64 of DW1000 User Manual [DO NOT enable 1024 byte frames (0x03) becuase it generates disturbance of ranging don't know why...]
manumaet 44:2e0045042a59 63
manumaet 42:83931678c4de 64 writeRegister16(DW1000_TX_ANTD, 0, 16384); // set TX and RX Antenna delay to neutral because we calibrate afterwards
manumaet 46:6398237672a0 65 writeRegister16(DW1000_LDE_CTRL, 0x1804, 16384); // = 2^14 a quarter of the range of the 16-Bit register which corresponds to zero calibration in a round trip (TX1+RX2+TX2+RX1)
manumaet 44:2e0045042a59 66
manumaet 42:83931678c4de 67 writeRegister8(DW1000_SYS_CFG, 3, 0x20); // enable auto reenabling receiver after error
manumaet 0:f50e671ffff7 68 }
manumaet 0:f50e671ffff7 69
manumaet 29:019ff388ed76 70 void DW1000::setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)) {
manumaet 29:019ff388ed76 71 bool RX = false;
manumaet 29:019ff388ed76 72 bool TX = false;
manumaet 29:019ff388ed76 73 if (callbackRX) {
bhepp 50:50b8aea54a51 74 this->callbackRX.attach(callbackRX);
manumaet 29:019ff388ed76 75 RX = true;
manumaet 29:019ff388ed76 76 }
manumaet 29:019ff388ed76 77 if (callbackTX) {
bhepp 50:50b8aea54a51 78 this->callbackTX.attach(callbackTX);
manumaet 29:019ff388ed76 79 TX = true;
manumaet 29:019ff388ed76 80 }
bhepp 50:50b8aea54a51 81 setInterrupt(RX, TX);
manumaet 26:a65c6f26c458 82 }
manumaet 26:a65c6f26c458 83
manumaet 0:f50e671ffff7 84 uint32_t DW1000::getDeviceID() {
manumaet 0:f50e671ffff7 85 uint32_t result;
manumaet 0:f50e671ffff7 86 readRegister(DW1000_DEV_ID, 0, (uint8_t*)&result, 4);
manumaet 0:f50e671ffff7 87 return result;
manumaet 0:f50e671ffff7 88 }
manumaet 0:f50e671ffff7 89
manumaet 0:f50e671ffff7 90 uint64_t DW1000::getEUI() {
manumaet 0:f50e671ffff7 91 uint64_t result;
manumaet 0:f50e671ffff7 92 readRegister(DW1000_EUI, 0, (uint8_t*)&result, 8);
manumaet 0:f50e671ffff7 93 return result;
manumaet 0:f50e671ffff7 94 }
manumaet 0:f50e671ffff7 95
manumaet 0:f50e671ffff7 96 void DW1000::setEUI(uint64_t EUI) {
manumaet 0:f50e671ffff7 97 writeRegister(DW1000_EUI, 0, (uint8_t*)&EUI, 8);
manumaet 0:f50e671ffff7 98 }
manumaet 0:f50e671ffff7 99
manumaet 0:f50e671ffff7 100 float DW1000::getVoltage() {
manumaet 12:985aa9843c3c 101 uint8_t buffer[7] = {0x80, 0x0A, 0x0F, 0x01, 0x00}; // algorithm form User Manual p57
manumaet 0:f50e671ffff7 102 writeRegister(DW1000_RF_CONF, 0x11, buffer, 2);
manumaet 0:f50e671ffff7 103 writeRegister(DW1000_RF_CONF, 0x12, &buffer[2], 1);
manumaet 0:f50e671ffff7 104 writeRegister(DW1000_TX_CAL, 0x00, &buffer[3], 1);
manumaet 0:f50e671ffff7 105 writeRegister(DW1000_TX_CAL, 0x00, &buffer[4], 1);
manumaet 8:7a9c61242e2f 106 readRegister(DW1000_TX_CAL, 0x03, &buffer[5], 2); // get the 8-Bit readings for Voltage and Temperature
manumaet 0:f50e671ffff7 107 float Voltage = buffer[5] * 0.0057 + 2.3;
manumaet 47:b6120c152ad1 108 //float Temperature = buffer[6] * 1.13 - 113.0; // TODO: getTemperature was always ~35 degree with better formula/calibration
manumaet 0:f50e671ffff7 109 return Voltage;
manumaet 0:f50e671ffff7 110 }
manumaet 0:f50e671ffff7 111
manumaet 18:bbc7ca7d3a95 112 uint64_t DW1000::getStatus() {
manumaet 18:bbc7ca7d3a95 113 return readRegister40(DW1000_SYS_STATUS, 0);
manumaet 18:bbc7ca7d3a95 114 }
manumaet 18:bbc7ca7d3a95 115
manumaet 26:a65c6f26c458 116 uint64_t DW1000::getRXTimestamp() {
manumaet 26:a65c6f26c458 117 return readRegister40(DW1000_RX_TIME, 0);
manumaet 26:a65c6f26c458 118 }
manumaet 26:a65c6f26c458 119
manumaet 26:a65c6f26c458 120 uint64_t DW1000::getTXTimestamp() {
manumaet 26:a65c6f26c458 121 return readRegister40(DW1000_TX_TIME, 0);
manumaet 26:a65c6f26c458 122 }
manumaet 26:a65c6f26c458 123
bhepp 48:5999e510f154 124 uint16_t DW1000::getStdNoise() {
bhepp 48:5999e510f154 125 return readRegister16(DW1000_RX_FQUAL, 0x00);
bhepp 48:5999e510f154 126 }
bhepp 48:5999e510f154 127
bhepp 48:5999e510f154 128 uint16_t DW1000::getPACC() {
bhepp 48:5999e510f154 129 uint32_t v = readRegister32(DW1000_RX_FINFO, 0x00);
bhepp 48:5999e510f154 130 v >>= 20;
bhepp 48:5999e510f154 131 return static_cast<uint16_t>(v);
bhepp 48:5999e510f154 132 }
bhepp 48:5999e510f154 133
bhepp 48:5999e510f154 134 uint16_t DW1000::getFPINDEX() {
bhepp 48:5999e510f154 135 return readRegister16(DW1000_RX_TIME, 0x05);
bhepp 48:5999e510f154 136 }
bhepp 48:5999e510f154 137
bhepp 48:5999e510f154 138 uint16_t DW1000::getFPAMPL1() {
bhepp 48:5999e510f154 139 return readRegister16(DW1000_RX_TIME, 0x07);
bhepp 48:5999e510f154 140 }
bhepp 48:5999e510f154 141
bhepp 48:5999e510f154 142 uint16_t DW1000::getFPAMPL2() {
bhepp 48:5999e510f154 143 return readRegister16(DW1000_RX_FQUAL, 0x02);
bhepp 48:5999e510f154 144 }
bhepp 48:5999e510f154 145
bhepp 48:5999e510f154 146 uint16_t DW1000::getFPAMPL3() {
bhepp 48:5999e510f154 147 return readRegister16(DW1000_RX_FQUAL, 0x04);
bhepp 48:5999e510f154 148 }
bhepp 48:5999e510f154 149
bhepp 48:5999e510f154 150 uint16_t DW1000::getCIRPWR() {
bhepp 48:5999e510f154 151 return readRegister16(DW1000_RX_FQUAL, 0x06);
bhepp 48:5999e510f154 152 }
bhepp 48:5999e510f154 153
bhepp 48:5999e510f154 154 uint8_t DW1000::getPRF() {
bhepp 48:5999e510f154 155 uint16_t prf_mask = (0x1 << 19) | (0x1 << 18);
bhepp 48:5999e510f154 156 uint16_t prf = readRegister16(DW1000_CHAN_CTRL, 0x00);
bhepp 48:5999e510f154 157 prf >> 18;
bhepp 48:5999e510f154 158 prf &= 0x03;
bhepp 48:5999e510f154 159 return static_cast<uint8_t>(prf);
bhepp 48:5999e510f154 160 }
bhepp 48:5999e510f154 161
manumaet 10:d077bb12d259 162 void DW1000::sendString(char* message) {
manumaet 10:d077bb12d259 163 sendFrame((uint8_t*)message, strlen(message)+1);
manumaet 10:d077bb12d259 164 }
manumaet 10:d077bb12d259 165
manumaet 24:6f25ba679490 166 void DW1000::receiveString(char* message) {
manumaet 31:6f76f3d518ac 167 readRegister(DW1000_RX_BUFFER, 0, (uint8_t*)message, getFramelength()); // get data from buffer
manumaet 10:d077bb12d259 168 }
manumaet 10:d077bb12d259 169
manumaet 11:c87d37db2c6f 170 void DW1000::sendFrame(uint8_t* message, uint16_t length) {
manumaet 38:8ef3b8d8b908 171 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
manumaet 38:8ef3b8d8b908 172 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
manumaet 13:b4d27bf7062a 173 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
manumaet 39:bb57aa77b015 174 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
manumaet 39:bb57aa77b015 175 length += 2; // including 2 CRC Bytes
manumaet 39:bb57aa77b015 176 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
manumaet 39:bb57aa77b015 177 writeRegister16(DW1000_TX_FCTRL, 0, length);
naegelit 53:79a72d752ec4 178 stopTRX(); // stop receiving
manumaet 23:661a79e56208 179 writeRegister8(DW1000_SYS_CTRL, 0, 0x02); // trigger sending process by setting the TXSTRT bit
naegelit 53:79a72d752ec4 180 //wait(0.1);
naegelit 53:79a72d752ec4 181 startRX(); // enable receiver again
manumaet 8:7a9c61242e2f 182 }
manumaet 8:7a9c61242e2f 183
manumaet 44:2e0045042a59 184 void DW1000::sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp) {
manumaet 44:2e0045042a59 185 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
manumaet 44:2e0045042a59 186 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
manumaet 44:2e0045042a59 187 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
manumaet 44:2e0045042a59 188
manumaet 44:2e0045042a59 189 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
manumaet 44:2e0045042a59 190 length += 2; // including 2 CRC Bytes
manumaet 44:2e0045042a59 191 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
manumaet 44:2e0045042a59 192 writeRegister16(DW1000_TX_FCTRL, 0, length);
manumaet 44:2e0045042a59 193
manumaet 45:01a33363bc21 194 writeRegister40(DW1000_DX_TIME, 0, TxTimestamp); //write the timestamp on which to send the message
manumaet 44:2e0045042a59 195
manumaet 44:2e0045042a59 196 stopTRX(); // stop receiving
manumaet 44:2e0045042a59 197 writeRegister8(DW1000_SYS_CTRL, 0, 0x02 | 0x04); // trigger sending process by setting the TXSTRT and TXDLYS bit
manumaet 44:2e0045042a59 198 startRX(); // enable receiver again
manumaet 44:2e0045042a59 199 }
manumaet 44:2e0045042a59 200
manumaet 17:8afa5f9122da 201 void DW1000::startRX() {
manumaet 20:257d56530ae1 202 writeRegister8(DW1000_SYS_CTRL, 0x01, 0x01); // start listening for preamble by setting the RXENAB bit
manumaet 7:e634eeafc4d2 203 }
manumaet 7:e634eeafc4d2 204
manumaet 25:d58b0595b300 205 void DW1000::stopTRX() {
manumaet 25:d58b0595b300 206 writeRegister8(DW1000_SYS_CTRL, 0, 0x40); // disable tranceiver go back to idle mode
manumaet 17:8afa5f9122da 207 }
manumaet 17:8afa5f9122da 208
manumaet 20:257d56530ae1 209 // PRIVATE Methods ------------------------------------------------------------------------------------
manumaet 18:bbc7ca7d3a95 210 void DW1000::loadLDE() { // initialise LDE algorithm LDELOAD User Manual p22
manumaet 18:bbc7ca7d3a95 211 writeRegister16(DW1000_PMSC, 0, 0x0301); // set clock to XTAL so OTP is reliable
manumaet 20:257d56530ae1 212 writeRegister16(DW1000_OTP_IF, 0x06, 0x8000); // set LDELOAD bit in OTP
manumaet 12:985aa9843c3c 213 wait_us(150);
manumaet 18:bbc7ca7d3a95 214 writeRegister16(DW1000_PMSC, 0, 0x0200); // recover to PLL clock
manumaet 12:985aa9843c3c 215 }
manumaet 12:985aa9843c3c 216
manumaet 12:985aa9843c3c 217 void DW1000::resetRX() {
manumaet 12:985aa9843c3c 218 writeRegister8(DW1000_PMSC, 3, 0xE0); // set RX reset
manumaet 12:985aa9843c3c 219 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear RX reset
manumaet 12:985aa9843c3c 220 }
manumaet 12:985aa9843c3c 221
bhepp 48:5999e510f154 222 void DW1000::hardwareReset(PinName reset_pin) {
bhepp 50:50b8aea54a51 223 // DWM1000 RESET logic.
bhepp 50:50b8aea54a51 224 if (DWM1000_DAMAGED) {
bhepp 50:50b8aea54a51 225 // The following code works for damaged DWM1000 modules.
bhepp 50:50b8aea54a51 226 // IMPORTANT: This will damage healthy DWM1000 modules!
bhepp 50:50b8aea54a51 227 DigitalInOut reset(reset_pin);
bhepp 50:50b8aea54a51 228 reset.output();
bhepp 50:50b8aea54a51 229 reset = 1;
bhepp 50:50b8aea54a51 230 wait_ms(100);
bhepp 50:50b8aea54a51 231 reset = 0;
bhepp 50:50b8aea54a51 232 wait_ms(100);
bhepp 50:50b8aea54a51 233 reset = 1;
bhepp 50:50b8aea54a51 234 wait_ms(100);
bhepp 50:50b8aea54a51 235 } else {
bhepp 50:50b8aea54a51 236 // The following code works for healthy DWM1000 modules
bhepp 50:50b8aea54a51 237 DigitalInOut reset(reset_pin);
bhepp 50:50b8aea54a51 238 reset.output();
bhepp 50:50b8aea54a51 239 reset = 0;
bhepp 50:50b8aea54a51 240 wait_ms(100);
bhepp 50:50b8aea54a51 241 reset.input();
bhepp 50:50b8aea54a51 242 }
bhepp 48:5999e510f154 243 }
bhepp 48:5999e510f154 244
manumaet 12:985aa9843c3c 245 void DW1000::resetAll() {
bhepp 48:5999e510f154 246 if (reset.is_connected()) {
bhepp 48:5999e510f154 247 reset = 1;
bhepp 48:5999e510f154 248 wait_ms(100);
bhepp 48:5999e510f154 249 reset = 0;
bhepp 48:5999e510f154 250 wait_ms(100);
bhepp 48:5999e510f154 251 reset = 1;
bhepp 48:5999e510f154 252 wait_ms(100);
bhepp 48:5999e510f154 253 }
bhepp 48:5999e510f154 254
manumaet 12:985aa9843c3c 255 writeRegister8(DW1000_PMSC, 0, 0x01); // set clock to XTAL
manumaet 12:985aa9843c3c 256 writeRegister8(DW1000_PMSC, 3, 0x00); // set All reset
manumaet 12:985aa9843c3c 257 wait_us(10); // wait for PLL to lock
manumaet 12:985aa9843c3c 258 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear All reset
manumaet 7:e634eeafc4d2 259 }
manumaet 0:f50e671ffff7 260
manumaet 29:019ff388ed76 261
manumaet 29:019ff388ed76 262 void DW1000::setInterrupt(bool RX, bool TX) {
manumaet 29:019ff388ed76 263 writeRegister16(DW1000_SYS_MASK, 0, RX*0x4000 | TX*0x0080); // RX good frame 0x4000, TX done 0x0080
manumaet 29:019ff388ed76 264 }
manumaet 29:019ff388ed76 265
bhepp 60:43be9228b3b9 266 void DW1000::resetInterruptFlags() {
bhepp 60:43be9228b3b9 267 uint64_t status = getStatus();
bhepp 60:43be9228b3b9 268 if (status & 0x4000) { // a frame was received
bhepp 60:43be9228b3b9 269 writeRegister16(DW1000_SYS_STATUS, 0, 0x6F00); // clearing of receiving status bits
bhepp 60:43be9228b3b9 270 }
bhepp 60:43be9228b3b9 271 if (status & 0x80) { // sending complete
bhepp 60:43be9228b3b9 272 writeRegister8(DW1000_SYS_STATUS, 0, 0xF8); // clearing of sending status bits
bhepp 60:43be9228b3b9 273 }
bhepp 60:43be9228b3b9 274 }
bhepp 60:43be9228b3b9 275
manumaet 20:257d56530ae1 276 void DW1000::ISR() {
manumaet 20:257d56530ae1 277 uint64_t status = getStatus();
manumaet 22:576ee999b004 278 if (status & 0x4000) { // a frame was received
manumaet 29:019ff388ed76 279 callbackRX.call();
manumaet 22:576ee999b004 280 writeRegister16(DW1000_SYS_STATUS, 0, 0x6F00); // clearing of receiving status bits
manumaet 20:257d56530ae1 281 }
manumaet 22:576ee999b004 282 if (status & 0x80) { // sending complete
manumaet 29:019ff388ed76 283 callbackTX.call();
manumaet 22:576ee999b004 284 writeRegister8(DW1000_SYS_STATUS, 0, 0xF8); // clearing of sending status bits
manumaet 20:257d56530ae1 285 }
naegelit 53:79a72d752ec4 286 //printf("irq_index: %d \n\r",this->irq_index);
manumaet 20:257d56530ae1 287 }
manumaet 20:257d56530ae1 288
manumaet 20:257d56530ae1 289 uint16_t DW1000::getFramelength() {
manumaet 20:257d56530ae1 290 uint16_t framelength = readRegister16(DW1000_RX_FINFO, 0); // get framelength
manumaet 20:257d56530ae1 291 framelength = (framelength & 0x03FF) - 2; // take only the right bits and subtract the 2 CRC Bytes
manumaet 20:257d56530ae1 292 return framelength;
manumaet 20:257d56530ae1 293 }
manumaet 20:257d56530ae1 294
manumaet 0:f50e671ffff7 295 // SPI Interface ------------------------------------------------------------------------------------
manumaet 10:d077bb12d259 296 uint8_t DW1000::readRegister8(uint8_t reg, uint16_t subaddress) {
manumaet 10:d077bb12d259 297 uint8_t result;
manumaet 10:d077bb12d259 298 readRegister(reg, subaddress, &result, 1);
manumaet 10:d077bb12d259 299 return result;
manumaet 10:d077bb12d259 300 }
manumaet 10:d077bb12d259 301
manumaet 18:bbc7ca7d3a95 302 uint16_t DW1000::readRegister16(uint8_t reg, uint16_t subaddress) {
manumaet 18:bbc7ca7d3a95 303 uint16_t result;
manumaet 18:bbc7ca7d3a95 304 readRegister(reg, subaddress, (uint8_t*)&result, 2);
manumaet 18:bbc7ca7d3a95 305 return result;
manumaet 18:bbc7ca7d3a95 306 }
manumaet 18:bbc7ca7d3a95 307
bhepp 48:5999e510f154 308 uint32_t DW1000::readRegister32(uint8_t reg, uint16_t subaddress) {
bhepp 48:5999e510f154 309 uint32_t result;
bhepp 48:5999e510f154 310 readRegister(reg, subaddress, (uint8_t*)&result, 4);
bhepp 48:5999e510f154 311 return result;
bhepp 48:5999e510f154 312 }
bhepp 48:5999e510f154 313
manumaet 18:bbc7ca7d3a95 314 uint64_t DW1000::readRegister40(uint8_t reg, uint16_t subaddress) {
manumaet 18:bbc7ca7d3a95 315 uint64_t result;
manumaet 18:bbc7ca7d3a95 316 readRegister(reg, subaddress, (uint8_t*)&result, 5);
manumaet 18:bbc7ca7d3a95 317 result &= 0xFFFFFFFFFF; // only 40-Bit
manumaet 18:bbc7ca7d3a95 318 return result;
manumaet 18:bbc7ca7d3a95 319 }
manumaet 18:bbc7ca7d3a95 320
manumaet 8:7a9c61242e2f 321 void DW1000::writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer) {
manumaet 8:7a9c61242e2f 322 writeRegister(reg, subaddress, &buffer, 1);
manumaet 8:7a9c61242e2f 323 }
manumaet 8:7a9c61242e2f 324
manumaet 18:bbc7ca7d3a95 325 void DW1000::writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer) {
manumaet 18:bbc7ca7d3a95 326 writeRegister(reg, subaddress, (uint8_t*)&buffer, 2);
manumaet 18:bbc7ca7d3a95 327 }
manumaet 18:bbc7ca7d3a95 328
manumaet 42:83931678c4de 329 void DW1000::writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer) {
manumaet 42:83931678c4de 330 writeRegister(reg, subaddress, (uint8_t*)&buffer, 4);
manumaet 42:83931678c4de 331 }
manumaet 42:83931678c4de 332
manumaet 44:2e0045042a59 333 void DW1000::writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer) {
manumaet 44:2e0045042a59 334 writeRegister(reg, subaddress, (uint8_t*)&buffer, 5);
manumaet 44:2e0045042a59 335 }
manumaet 44:2e0045042a59 336
manumaet 8:7a9c61242e2f 337 void DW1000::readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
manumaet 0:f50e671ffff7 338 setupTransaction(reg, subaddress, false);
manumaet 18:bbc7ca7d3a95 339 for(int i=0; i<length; i++) // get data
manumaet 0:f50e671ffff7 340 buffer[i] = spi.write(0x00);
manumaet 0:f50e671ffff7 341 deselect();
manumaet 0:f50e671ffff7 342 }
manumaet 0:f50e671ffff7 343
manumaet 8:7a9c61242e2f 344 void DW1000::writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
manumaet 0:f50e671ffff7 345 setupTransaction(reg, subaddress, true);
manumaet 18:bbc7ca7d3a95 346 for(int i=0; i<length; i++) // put data
manumaet 0:f50e671ffff7 347 spi.write(buffer[i]);
manumaet 0:f50e671ffff7 348 deselect();
manumaet 0:f50e671ffff7 349 }
manumaet 0:f50e671ffff7 350
manumaet 8:7a9c61242e2f 351 void DW1000::setupTransaction(uint8_t reg, uint16_t subaddress, bool write) {
manumaet 18:bbc7ca7d3a95 352 reg |= (write * DW1000_WRITE_FLAG); // set read/write flag
manumaet 0:f50e671ffff7 353 select();
manumaet 0:f50e671ffff7 354 if (subaddress > 0) { // there's a subadress, we need to set flag and send second header byte
manumaet 0:f50e671ffff7 355 spi.write(reg | DW1000_SUBADDRESS_FLAG);
manumaet 18:bbc7ca7d3a95 356 if (subaddress > 0x7F) { // sub address too long, we need to set flag and send third header byte
manumaet 18:bbc7ca7d3a95 357 spi.write((uint8_t)(subaddress & 0x7F) | DW1000_2_SUBADDRESS_FLAG); // and
manumaet 0:f50e671ffff7 358 spi.write((uint8_t)(subaddress >> 7));
manumaet 0:f50e671ffff7 359 } else {
manumaet 0:f50e671ffff7 360 spi.write((uint8_t)subaddress);
manumaet 0:f50e671ffff7 361 }
manumaet 0:f50e671ffff7 362 } else {
manumaet 18:bbc7ca7d3a95 363 spi.write(reg); // say which register address we want to access
manumaet 0:f50e671ffff7 364 }
manumaet 0:f50e671ffff7 365 }
manumaet 0:f50e671ffff7 366
manumaet 39:bb57aa77b015 367 void DW1000::select() { // always called to start an SPI transmission
bhepp 65:4c3bd79b57d2 368 irq.disable_irq();
manumaet 39:bb57aa77b015 369 cs = 0; // set Cable Select pin low to start transmission
manumaet 39:bb57aa77b015 370 }
bhepp 50:50b8aea54a51 371
manumaet 39:bb57aa77b015 372 void DW1000::deselect() { // always called to end an SPI transmission
manumaet 39:bb57aa77b015 373 cs = 1; // set Cable Select pin high to stop transmission
bhepp 65:4c3bd79b57d2 374 irq.enable_irq();
manumaet 45:01a33363bc21 375 }
bhepp 48:5999e510f154 376
bhepp 48:5999e510f154 377 void DW1000::enable_irq() { // always called to start an SPI transmission
naegelit 53:79a72d752ec4 378 //printf("Enabling irq %d\r\n", irq_index);
bhepp 65:4c3bd79b57d2 379 //irq_mp.enableCallback(irq_index);
bhepp 50:50b8aea54a51 380 //irq_mp.enable_irq();
bhepp 48:5999e510f154 381 }
bhepp 50:50b8aea54a51 382
bhepp 48:5999e510f154 383 void DW1000::disable_irq() { // always called to end an SPI transmission
bhepp 65:4c3bd79b57d2 384 //irq_mp.disableCallback(irq_index);
bhepp 50:50b8aea54a51 385 //irq_mp.disable_irq();
bhepp 48:5999e510f154 386 }