Tobias Naegeli / Mbed 2 deprecated AIT_UWB_Range

Tobi's ubw test branch

Dependencies:   mavlink_bridge mbed

Fork of AIT_UWB_Range by Benjamin Hepp

DW1000/DW1000.cpp@50:50b8aea54a51, 2015-11-26 (annotated)

Committer:
bhepp
Date:
Thu Nov 26 21:42:51 2015 +0000
Revision:
50:50b8aea54a51
Parent:
48:5999e510f154
Child:
53:79a72d752ec4
Multiple receiver basically working.; ; * Receiving from two DWM1000 modules working.; * Still issues with interrupts. Cleanup necessary.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manumaet 0:f50e671ffff7 1 #include "DW1000.h"
manumaet 0:f50e671ffff7 2
bhepp 50:50b8aea54a51 3 // Change this depending on whether damaged or heatlhy DWM1000 modules are used.
bhepp 50:50b8aea54a51 4 const bool DWM1000_DAMAGED = true;
bhepp 50:50b8aea54a51 5
bhepp 48:5999e510f154 6 //#include "PC.h"
bhepp 48:5999e510f154 7 //static PC pc(USBTX, USBRX, 115200); // USB UART Terminal
bhepp 48:5999e510f154 8
bhepp 48:5999e510f154 9 DW1000::DW1000(SPI& spi, InterruptMultiplexer& irq_mp, PinName CS, PinName RESET) : spi(spi), cs(CS), irq_mp(irq_mp), reset(RESET) {
bhepp 50:50b8aea54a51 10 irq_index = irq_mp.addCallback(this, &DW1000::ISR, false);
bhepp 50:50b8aea54a51 11
manumaet 26:a65c6f26c458 12 setCallbacks(NULL, NULL);
bhepp 48:5999e510f154 13
manumaet 0:f50e671ffff7 14 deselect(); // Chip must be deselected first
manumaet 37:40f94c634c3e 15 resetAll(); // we do a soft reset of the DW1000 everytime the driver starts
manumaet 44:2e0045042a59 16
manumaet 18:bbc7ca7d3a95 17 // Configuration TODO: make method for that
manumaet 45:01a33363bc21 18 // User Manual "2.5.5 Default Configurations that should be modified" p. 22
manumaet 45:01a33363bc21 19 //Those values are for the standard mode (6.8Mbps, 5, 16Mhz, 32 Symbols) and are INCOMPLETE!
manumaet 45:01a33363bc21 20 // writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870);
manumaet 45:01a33363bc21 21 // writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907);
manumaet 45:01a33363bc21 22 // writeRegister32(DW1000_DRX_CONF, 0x08, 0x311A002D);
manumaet 45:01a33363bc21 23 // writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD);
manumaet 45:01a33363bc21 24 // writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607);
manumaet 45:01a33363bc21 25 // writeRegister32(DW1000_TX_POWER, 0, 0x0E082848);
manumaet 45:01a33363bc21 26 // writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0);
manumaet 45:01a33363bc21 27 // writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0);
manumaet 45:01a33363bc21 28 // writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6);
manumaet 44:2e0045042a59 29
manumaet 45:01a33363bc21 30
manumaet 45:01a33363bc21 31 //Those values are for the 110kbps mode (5, 16MHz, 1024 Symbols) and are quite complete
manumaet 45:01a33363bc21 32 writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870); //AGC_TUNE1 for 16MHz PRF
manumaet 45:01a33363bc21 33 writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907); //AGC_TUNE2 (Universal)
manumaet 45:01a33363bc21 34 writeRegister16(DW1000_AGC_CTRL, 0x12, 0x0055); //AGC_TUNE3 (Universal)
manumaet 45:01a33363bc21 35
manumaet 45:01a33363bc21 36 writeRegister16(DW1000_DRX_CONF, 0x02, 0x000A); //DRX_TUNE0b for 110kbps
manumaet 45:01a33363bc21 37 writeRegister16(DW1000_DRX_CONF, 0x04, 0x0087); //DRX_TUNE1a for 16MHz PRF
manumaet 45:01a33363bc21 38 writeRegister16(DW1000_DRX_CONF, 0x06, 0x0064); //DRX_TUNE1b for 110kbps & > 1024 symbols
manumaet 45:01a33363bc21 39 writeRegister32(DW1000_DRX_CONF, 0x08, 0x351A009A); //PAC size for 1024 symbols preamble & 16MHz PRF
manumaet 45:01a33363bc21 40 //writeRegister32(DW1000_DRX_CONF, 0x08, 0x371A011D); //PAC size for 2048 symbols preamble
manumaet 45:01a33363bc21 41
manumaet 45:01a33363bc21 42 writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD); //LDE_CFG1
manumaet 45:01a33363bc21 43 writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607); //LDE_CFG2 for 16MHz PRF
manumaet 45:01a33363bc21 44
manumaet 46:6398237672a0 45 writeRegister32(DW1000_TX_POWER, 0, 0x28282828); //Power for channel 5
manumaet 45:01a33363bc21 46
manumaet 45:01a33363bc21 47 writeRegister8(DW1000_RF_CONF, 0x0B, 0xD8); //RF_RXCTRLH for channel 5
manumaet 45:01a33363bc21 48 writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0); //RF_TXCTRL for channel 5
manumaet 45:01a33363bc21 49
manumaet 45:01a33363bc21 50 writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0); //TC_PGDELAY for channel 5
manumaet 45:01a33363bc21 51
manumaet 45:01a33363bc21 52 writeRegister32 (DW1000_FS_CTRL, 0x07, 0x0800041D); //FS_PLLCFG for channel 5
manumaet 45:01a33363bc21 53 writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6); //FS_PLLTUNE for channel 5
manumaet 45:01a33363bc21 54
manumaet 46:6398237672a0 55 loadLDE(); // important everytime DW1000 initialises/awakes otherwise the LDE algorithm must be turned off or there's receiving malfunction see User Manual LDELOAD on p22 & p158
manumaet 42:83931678c4de 56
manumaet 42:83931678c4de 57 // 110kbps CAUTION: a lot of other registers have to be set for an optimized operation on 110kbps
manumaet 45:01a33363bc21 58 writeRegister16(DW1000_TX_FCTRL, 1, 0x0800 | 0x0100 | 0x0080); // use 1024 symbols preamble (0x0800) (previously 2048 - 0x2800), 16MHz pulse repetition frequency (0x0100), 110kbps bit rate (0x0080) see p.69 of DW1000 User Manual
manumaet 45:01a33363bc21 59 writeRegister8(DW1000_SYS_CFG, 2, 0x44); // enable special receiving option for 110kbps (disable smartTxPower)!! (0x44) see p.64 of DW1000 User Manual [DO NOT enable 1024 byte frames (0x03) becuase it generates disturbance of ranging don't know why...]
manumaet 44:2e0045042a59 60
manumaet 42:83931678c4de 61 writeRegister16(DW1000_TX_ANTD, 0, 16384); // set TX and RX Antenna delay to neutral because we calibrate afterwards
manumaet 46:6398237672a0 62 writeRegister16(DW1000_LDE_CTRL, 0x1804, 16384); // = 2^14 a quarter of the range of the 16-Bit register which corresponds to zero calibration in a round trip (TX1+RX2+TX2+RX1)
manumaet 44:2e0045042a59 63
manumaet 42:83931678c4de 64 writeRegister8(DW1000_SYS_CFG, 3, 0x20); // enable auto reenabling receiver after error
manumaet 0:f50e671ffff7 65 }
manumaet 0:f50e671ffff7 66
manumaet 29:019ff388ed76 67 void DW1000::setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)) {
manumaet 29:019ff388ed76 68 bool RX = false;
manumaet 29:019ff388ed76 69 bool TX = false;
manumaet 29:019ff388ed76 70 if (callbackRX) {
bhepp 50:50b8aea54a51 71 this->callbackRX.attach(callbackRX);
manumaet 29:019ff388ed76 72 RX = true;
manumaet 29:019ff388ed76 73 }
manumaet 29:019ff388ed76 74 if (callbackTX) {
bhepp 50:50b8aea54a51 75 this->callbackTX.attach(callbackTX);
manumaet 29:019ff388ed76 76 TX = true;
manumaet 29:019ff388ed76 77 }
bhepp 50:50b8aea54a51 78 setInterrupt(RX, TX);
manumaet 26:a65c6f26c458 79 }
manumaet 26:a65c6f26c458 80
manumaet 0:f50e671ffff7 81 uint32_t DW1000::getDeviceID() {
manumaet 0:f50e671ffff7 82 uint32_t result;
manumaet 0:f50e671ffff7 83 readRegister(DW1000_DEV_ID, 0, (uint8_t*)&result, 4);
manumaet 0:f50e671ffff7 84 return result;
manumaet 0:f50e671ffff7 85 }
manumaet 0:f50e671ffff7 86
manumaet 0:f50e671ffff7 87 uint64_t DW1000::getEUI() {
manumaet 0:f50e671ffff7 88 uint64_t result;
manumaet 0:f50e671ffff7 89 readRegister(DW1000_EUI, 0, (uint8_t*)&result, 8);
manumaet 0:f50e671ffff7 90 return result;
manumaet 0:f50e671ffff7 91 }
manumaet 0:f50e671ffff7 92
manumaet 0:f50e671ffff7 93 void DW1000::setEUI(uint64_t EUI) {
manumaet 0:f50e671ffff7 94 writeRegister(DW1000_EUI, 0, (uint8_t*)&EUI, 8);
manumaet 0:f50e671ffff7 95 }
manumaet 0:f50e671ffff7 96
manumaet 0:f50e671ffff7 97 float DW1000::getVoltage() {
manumaet 12:985aa9843c3c 98 uint8_t buffer[7] = {0x80, 0x0A, 0x0F, 0x01, 0x00}; // algorithm form User Manual p57
manumaet 0:f50e671ffff7 99 writeRegister(DW1000_RF_CONF, 0x11, buffer, 2);
manumaet 0:f50e671ffff7 100 writeRegister(DW1000_RF_CONF, 0x12, &buffer[2], 1);
manumaet 0:f50e671ffff7 101 writeRegister(DW1000_TX_CAL, 0x00, &buffer[3], 1);
manumaet 0:f50e671ffff7 102 writeRegister(DW1000_TX_CAL, 0x00, &buffer[4], 1);
manumaet 8:7a9c61242e2f 103 readRegister(DW1000_TX_CAL, 0x03, &buffer[5], 2); // get the 8-Bit readings for Voltage and Temperature
manumaet 0:f50e671ffff7 104 float Voltage = buffer[5] * 0.0057 + 2.3;
manumaet 47:b6120c152ad1 105 //float Temperature = buffer[6] * 1.13 - 113.0; // TODO: getTemperature was always ~35 degree with better formula/calibration
manumaet 0:f50e671ffff7 106 return Voltage;
manumaet 0:f50e671ffff7 107 }
manumaet 0:f50e671ffff7 108
manumaet 18:bbc7ca7d3a95 109 uint64_t DW1000::getStatus() {
manumaet 18:bbc7ca7d3a95 110 return readRegister40(DW1000_SYS_STATUS, 0);
manumaet 18:bbc7ca7d3a95 111 }
manumaet 18:bbc7ca7d3a95 112
manumaet 26:a65c6f26c458 113 uint64_t DW1000::getRXTimestamp() {
manumaet 26:a65c6f26c458 114 return readRegister40(DW1000_RX_TIME, 0);
manumaet 26:a65c6f26c458 115 }
manumaet 26:a65c6f26c458 116
manumaet 26:a65c6f26c458 117 uint64_t DW1000::getTXTimestamp() {
manumaet 26:a65c6f26c458 118 return readRegister40(DW1000_TX_TIME, 0);
manumaet 26:a65c6f26c458 119 }
manumaet 26:a65c6f26c458 120
bhepp 48:5999e510f154 121 uint16_t DW1000::getStdNoise() {
bhepp 48:5999e510f154 122 return readRegister16(DW1000_RX_FQUAL, 0x00);
bhepp 48:5999e510f154 123 }
bhepp 48:5999e510f154 124
bhepp 48:5999e510f154 125 uint16_t DW1000::getPACC() {
bhepp 48:5999e510f154 126 uint32_t v = readRegister32(DW1000_RX_FINFO, 0x00);
bhepp 48:5999e510f154 127 v >>= 20;
bhepp 48:5999e510f154 128 return static_cast<uint16_t>(v);
bhepp 48:5999e510f154 129 }
bhepp 48:5999e510f154 130
bhepp 48:5999e510f154 131 uint16_t DW1000::getFPINDEX() {
bhepp 48:5999e510f154 132 return readRegister16(DW1000_RX_TIME, 0x05);
bhepp 48:5999e510f154 133 }
bhepp 48:5999e510f154 134
bhepp 48:5999e510f154 135 uint16_t DW1000::getFPAMPL1() {
bhepp 48:5999e510f154 136 return readRegister16(DW1000_RX_TIME, 0x07);
bhepp 48:5999e510f154 137 }
bhepp 48:5999e510f154 138
bhepp 48:5999e510f154 139 uint16_t DW1000::getFPAMPL2() {
bhepp 48:5999e510f154 140 return readRegister16(DW1000_RX_FQUAL, 0x02);
bhepp 48:5999e510f154 141 }
bhepp 48:5999e510f154 142
bhepp 48:5999e510f154 143 uint16_t DW1000::getFPAMPL3() {
bhepp 48:5999e510f154 144 return readRegister16(DW1000_RX_FQUAL, 0x04);
bhepp 48:5999e510f154 145 }
bhepp 48:5999e510f154 146
bhepp 48:5999e510f154 147 uint16_t DW1000::getCIRPWR() {
bhepp 48:5999e510f154 148 return readRegister16(DW1000_RX_FQUAL, 0x06);
bhepp 48:5999e510f154 149 }
bhepp 48:5999e510f154 150
bhepp 48:5999e510f154 151 uint8_t DW1000::getPRF() {
bhepp 48:5999e510f154 152 uint16_t prf_mask = (0x1 << 19) | (0x1 << 18);
bhepp 48:5999e510f154 153 uint16_t prf = readRegister16(DW1000_CHAN_CTRL, 0x00);
bhepp 48:5999e510f154 154 prf >> 18;
bhepp 48:5999e510f154 155 prf &= 0x03;
bhepp 48:5999e510f154 156 return static_cast<uint8_t>(prf);
bhepp 48:5999e510f154 157 }
bhepp 48:5999e510f154 158
manumaet 10:d077bb12d259 159 void DW1000::sendString(char* message) {
manumaet 10:d077bb12d259 160 sendFrame((uint8_t*)message, strlen(message)+1);
manumaet 10:d077bb12d259 161 }
manumaet 10:d077bb12d259 162
manumaet 24:6f25ba679490 163 void DW1000::receiveString(char* message) {
manumaet 31:6f76f3d518ac 164 readRegister(DW1000_RX_BUFFER, 0, (uint8_t*)message, getFramelength()); // get data from buffer
manumaet 10:d077bb12d259 165 }
manumaet 10:d077bb12d259 166
manumaet 11:c87d37db2c6f 167 void DW1000::sendFrame(uint8_t* message, uint16_t length) {
manumaet 38:8ef3b8d8b908 168 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
manumaet 38:8ef3b8d8b908 169 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
manumaet 13:b4d27bf7062a 170 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
manumaet 7:e634eeafc4d2 171
manumaet 39:bb57aa77b015 172 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
manumaet 39:bb57aa77b015 173 length += 2; // including 2 CRC Bytes
manumaet 39:bb57aa77b015 174 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
manumaet 39:bb57aa77b015 175 writeRegister16(DW1000_TX_FCTRL, 0, length);
manumaet 11:c87d37db2c6f 176
manumaet 25:d58b0595b300 177 stopTRX(); // stop receiving
manumaet 23:661a79e56208 178 writeRegister8(DW1000_SYS_CTRL, 0, 0x02); // trigger sending process by setting the TXSTRT bit
manumaet 25:d58b0595b300 179 startRX(); // enable receiver again
manumaet 8:7a9c61242e2f 180 }
manumaet 8:7a9c61242e2f 181
manumaet 44:2e0045042a59 182 void DW1000::sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp) {
manumaet 44:2e0045042a59 183 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
manumaet 44:2e0045042a59 184 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
manumaet 44:2e0045042a59 185 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
manumaet 44:2e0045042a59 186
manumaet 44:2e0045042a59 187 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
manumaet 44:2e0045042a59 188 length += 2; // including 2 CRC Bytes
manumaet 44:2e0045042a59 189 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
manumaet 44:2e0045042a59 190 writeRegister16(DW1000_TX_FCTRL, 0, length);
manumaet 44:2e0045042a59 191
manumaet 45:01a33363bc21 192 writeRegister40(DW1000_DX_TIME, 0, TxTimestamp); //write the timestamp on which to send the message
manumaet 44:2e0045042a59 193
manumaet 44:2e0045042a59 194 stopTRX(); // stop receiving
manumaet 44:2e0045042a59 195 writeRegister8(DW1000_SYS_CTRL, 0, 0x02 | 0x04); // trigger sending process by setting the TXSTRT and TXDLYS bit
manumaet 44:2e0045042a59 196 startRX(); // enable receiver again
manumaet 44:2e0045042a59 197 }
manumaet 44:2e0045042a59 198
manumaet 17:8afa5f9122da 199 void DW1000::startRX() {
manumaet 20:257d56530ae1 200 writeRegister8(DW1000_SYS_CTRL, 0x01, 0x01); // start listening for preamble by setting the RXENAB bit
manumaet 7:e634eeafc4d2 201 }
manumaet 7:e634eeafc4d2 202
manumaet 25:d58b0595b300 203 void DW1000::stopTRX() {
manumaet 25:d58b0595b300 204 writeRegister8(DW1000_SYS_CTRL, 0, 0x40); // disable tranceiver go back to idle mode
manumaet 17:8afa5f9122da 205 }
manumaet 17:8afa5f9122da 206
manumaet 20:257d56530ae1 207 // PRIVATE Methods ------------------------------------------------------------------------------------
manumaet 18:bbc7ca7d3a95 208 void DW1000::loadLDE() { // initialise LDE algorithm LDELOAD User Manual p22
manumaet 18:bbc7ca7d3a95 209 writeRegister16(DW1000_PMSC, 0, 0x0301); // set clock to XTAL so OTP is reliable
manumaet 20:257d56530ae1 210 writeRegister16(DW1000_OTP_IF, 0x06, 0x8000); // set LDELOAD bit in OTP
manumaet 12:985aa9843c3c 211 wait_us(150);
manumaet 18:bbc7ca7d3a95 212 writeRegister16(DW1000_PMSC, 0, 0x0200); // recover to PLL clock
manumaet 12:985aa9843c3c 213 }
manumaet 12:985aa9843c3c 214
manumaet 12:985aa9843c3c 215 void DW1000::resetRX() {
manumaet 12:985aa9843c3c 216 writeRegister8(DW1000_PMSC, 3, 0xE0); // set RX reset
manumaet 12:985aa9843c3c 217 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear RX reset
manumaet 12:985aa9843c3c 218 }
manumaet 12:985aa9843c3c 219
bhepp 48:5999e510f154 220 void DW1000::hardwareReset(PinName reset_pin) {
bhepp 50:50b8aea54a51 221 // DWM1000 RESET logic.
bhepp 50:50b8aea54a51 222 if (DWM1000_DAMAGED) {
bhepp 50:50b8aea54a51 223 // The following code works for damaged DWM1000 modules.
bhepp 50:50b8aea54a51 224 // IMPORTANT: This will damage healthy DWM1000 modules!
bhepp 50:50b8aea54a51 225 DigitalInOut reset(reset_pin);
bhepp 50:50b8aea54a51 226 reset.output();
bhepp 50:50b8aea54a51 227 reset = 1;
bhepp 50:50b8aea54a51 228 wait_ms(100);
bhepp 50:50b8aea54a51 229 reset = 0;
bhepp 50:50b8aea54a51 230 wait_ms(100);
bhepp 50:50b8aea54a51 231 reset = 1;
bhepp 50:50b8aea54a51 232 wait_ms(100);
bhepp 50:50b8aea54a51 233 } else {
bhepp 50:50b8aea54a51 234 // The following code works for healthy DWM1000 modules
bhepp 50:50b8aea54a51 235 DigitalInOut reset(reset_pin);
bhepp 50:50b8aea54a51 236 reset.output();
bhepp 50:50b8aea54a51 237 reset = 0;
bhepp 50:50b8aea54a51 238 wait_ms(100);
bhepp 50:50b8aea54a51 239 reset.input();
bhepp 50:50b8aea54a51 240 }
bhepp 48:5999e510f154 241 }
bhepp 48:5999e510f154 242
manumaet 12:985aa9843c3c 243 void DW1000::resetAll() {
bhepp 48:5999e510f154 244 if (reset.is_connected()) {
bhepp 48:5999e510f154 245 reset = 1;
bhepp 48:5999e510f154 246 wait_ms(100);
bhepp 48:5999e510f154 247 reset = 0;
bhepp 48:5999e510f154 248 wait_ms(100);
bhepp 48:5999e510f154 249 reset = 1;
bhepp 48:5999e510f154 250 wait_ms(100);
bhepp 48:5999e510f154 251 }
bhepp 48:5999e510f154 252
manumaet 12:985aa9843c3c 253 writeRegister8(DW1000_PMSC, 0, 0x01); // set clock to XTAL
manumaet 12:985aa9843c3c 254 writeRegister8(DW1000_PMSC, 3, 0x00); // set All reset
manumaet 12:985aa9843c3c 255 wait_us(10); // wait for PLL to lock
manumaet 12:985aa9843c3c 256 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear All reset
manumaet 7:e634eeafc4d2 257 }
manumaet 0:f50e671ffff7 258
manumaet 29:019ff388ed76 259
manumaet 29:019ff388ed76 260 void DW1000::setInterrupt(bool RX, bool TX) {
manumaet 29:019ff388ed76 261 writeRegister16(DW1000_SYS_MASK, 0, RX*0x4000 | TX*0x0080); // RX good frame 0x4000, TX done 0x0080
manumaet 29:019ff388ed76 262 }
manumaet 29:019ff388ed76 263
manumaet 20:257d56530ae1 264 void DW1000::ISR() {
manumaet 20:257d56530ae1 265 uint64_t status = getStatus();
manumaet 22:576ee999b004 266 if (status & 0x4000) { // a frame was received
manumaet 29:019ff388ed76 267 callbackRX.call();
manumaet 22:576ee999b004 268 writeRegister16(DW1000_SYS_STATUS, 0, 0x6F00); // clearing of receiving status bits
manumaet 20:257d56530ae1 269 }
manumaet 22:576ee999b004 270 if (status & 0x80) { // sending complete
manumaet 29:019ff388ed76 271 callbackTX.call();
manumaet 22:576ee999b004 272 writeRegister8(DW1000_SYS_STATUS, 0, 0xF8); // clearing of sending status bits
manumaet 20:257d56530ae1 273 }
manumaet 20:257d56530ae1 274 }
manumaet 20:257d56530ae1 275
manumaet 20:257d56530ae1 276 uint16_t DW1000::getFramelength() {
manumaet 20:257d56530ae1 277 uint16_t framelength = readRegister16(DW1000_RX_FINFO, 0); // get framelength
manumaet 20:257d56530ae1 278 framelength = (framelength & 0x03FF) - 2; // take only the right bits and subtract the 2 CRC Bytes
manumaet 20:257d56530ae1 279 return framelength;
manumaet 20:257d56530ae1 280 }
manumaet 20:257d56530ae1 281
manumaet 0:f50e671ffff7 282 // SPI Interface ------------------------------------------------------------------------------------
manumaet 10:d077bb12d259 283 uint8_t DW1000::readRegister8(uint8_t reg, uint16_t subaddress) {
manumaet 10:d077bb12d259 284 uint8_t result;
manumaet 10:d077bb12d259 285 readRegister(reg, subaddress, &result, 1);
manumaet 10:d077bb12d259 286 return result;
manumaet 10:d077bb12d259 287 }
manumaet 10:d077bb12d259 288
manumaet 18:bbc7ca7d3a95 289 uint16_t DW1000::readRegister16(uint8_t reg, uint16_t subaddress) {
manumaet 18:bbc7ca7d3a95 290 uint16_t result;
manumaet 18:bbc7ca7d3a95 291 readRegister(reg, subaddress, (uint8_t*)&result, 2);
manumaet 18:bbc7ca7d3a95 292 return result;
manumaet 18:bbc7ca7d3a95 293 }
manumaet 18:bbc7ca7d3a95 294
bhepp 48:5999e510f154 295 uint32_t DW1000::readRegister32(uint8_t reg, uint16_t subaddress) {
bhepp 48:5999e510f154 296 uint32_t result;
bhepp 48:5999e510f154 297 readRegister(reg, subaddress, (uint8_t*)&result, 4);
bhepp 48:5999e510f154 298 return result;
bhepp 48:5999e510f154 299 }
bhepp 48:5999e510f154 300
manumaet 18:bbc7ca7d3a95 301 uint64_t DW1000::readRegister40(uint8_t reg, uint16_t subaddress) {
manumaet 18:bbc7ca7d3a95 302 uint64_t result;
manumaet 18:bbc7ca7d3a95 303 readRegister(reg, subaddress, (uint8_t*)&result, 5);
manumaet 18:bbc7ca7d3a95 304 result &= 0xFFFFFFFFFF; // only 40-Bit
manumaet 18:bbc7ca7d3a95 305 return result;
manumaet 18:bbc7ca7d3a95 306 }
manumaet 18:bbc7ca7d3a95 307
manumaet 8:7a9c61242e2f 308 void DW1000::writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer) {
manumaet 8:7a9c61242e2f 309 writeRegister(reg, subaddress, &buffer, 1);
manumaet 8:7a9c61242e2f 310 }
manumaet 8:7a9c61242e2f 311
manumaet 18:bbc7ca7d3a95 312 void DW1000::writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer) {
manumaet 18:bbc7ca7d3a95 313 writeRegister(reg, subaddress, (uint8_t*)&buffer, 2);
manumaet 18:bbc7ca7d3a95 314 }
manumaet 18:bbc7ca7d3a95 315
manumaet 42:83931678c4de 316 void DW1000::writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer) {
manumaet 42:83931678c4de 317 writeRegister(reg, subaddress, (uint8_t*)&buffer, 4);
manumaet 42:83931678c4de 318 }
manumaet 42:83931678c4de 319
manumaet 44:2e0045042a59 320 void DW1000::writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer) {
manumaet 44:2e0045042a59 321 writeRegister(reg, subaddress, (uint8_t*)&buffer, 5);
manumaet 44:2e0045042a59 322 }
manumaet 44:2e0045042a59 323
manumaet 8:7a9c61242e2f 324 void DW1000::readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
manumaet 0:f50e671ffff7 325 setupTransaction(reg, subaddress, false);
manumaet 18:bbc7ca7d3a95 326 for(int i=0; i<length; i++) // get data
manumaet 0:f50e671ffff7 327 buffer[i] = spi.write(0x00);
manumaet 0:f50e671ffff7 328 deselect();
manumaet 0:f50e671ffff7 329 }
manumaet 0:f50e671ffff7 330
manumaet 8:7a9c61242e2f 331 void DW1000::writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
manumaet 0:f50e671ffff7 332 setupTransaction(reg, subaddress, true);
manumaet 18:bbc7ca7d3a95 333 for(int i=0; i<length; i++) // put data
manumaet 0:f50e671ffff7 334 spi.write(buffer[i]);
manumaet 0:f50e671ffff7 335 deselect();
manumaet 0:f50e671ffff7 336 }
manumaet 0:f50e671ffff7 337
manumaet 8:7a9c61242e2f 338 void DW1000::setupTransaction(uint8_t reg, uint16_t subaddress, bool write) {
manumaet 18:bbc7ca7d3a95 339 reg |= (write * DW1000_WRITE_FLAG); // set read/write flag
manumaet 0:f50e671ffff7 340 select();
manumaet 0:f50e671ffff7 341 if (subaddress > 0) { // there's a subadress, we need to set flag and send second header byte
manumaet 0:f50e671ffff7 342 spi.write(reg | DW1000_SUBADDRESS_FLAG);
manumaet 18:bbc7ca7d3a95 343 if (subaddress > 0x7F) { // sub address too long, we need to set flag and send third header byte
manumaet 18:bbc7ca7d3a95 344 spi.write((uint8_t)(subaddress & 0x7F) | DW1000_2_SUBADDRESS_FLAG); // and
manumaet 0:f50e671ffff7 345 spi.write((uint8_t)(subaddress >> 7));
manumaet 0:f50e671ffff7 346 } else {
manumaet 0:f50e671ffff7 347 spi.write((uint8_t)subaddress);
manumaet 0:f50e671ffff7 348 }
manumaet 0:f50e671ffff7 349 } else {
manumaet 18:bbc7ca7d3a95 350 spi.write(reg); // say which register address we want to access
manumaet 0:f50e671ffff7 351 }
manumaet 0:f50e671ffff7 352 }
manumaet 0:f50e671ffff7 353
manumaet 39:bb57aa77b015 354 void DW1000::select() { // always called to start an SPI transmission
bhepp 50:50b8aea54a51 355 irq_mp.getIRQ().disable_irq();
manumaet 39:bb57aa77b015 356 cs = 0; // set Cable Select pin low to start transmission
manumaet 39:bb57aa77b015 357 }
bhepp 50:50b8aea54a51 358
manumaet 39:bb57aa77b015 359 void DW1000::deselect() { // always called to end an SPI transmission
manumaet 39:bb57aa77b015 360 cs = 1; // set Cable Select pin high to stop transmission
bhepp 50:50b8aea54a51 361 irq_mp.getIRQ().enable_irq();
manumaet 45:01a33363bc21 362 }
bhepp 48:5999e510f154 363
bhepp 48:5999e510f154 364 void DW1000::enable_irq() { // always called to start an SPI transmission
bhepp 48:5999e510f154 365 //pc.printf("Enabling irq %d\r\n", irq_index);
bhepp 50:50b8aea54a51 366 irq_mp.enableCallback(irq_index);
bhepp 50:50b8aea54a51 367 //irq_mp.enable_irq();
bhepp 48:5999e510f154 368 }
bhepp 50:50b8aea54a51 369
bhepp 48:5999e510f154 370 void DW1000::disable_irq() { // always called to end an SPI transmission
bhepp 50:50b8aea54a51 371 irq_mp.disableCallback(irq_index);
bhepp 50:50b8aea54a51 372 //irq_mp.disable_irq();
bhepp 48:5999e510f154 373 }