Tobias Naegeli / Mbed 2 deprecated AIT_UWB_Range

Tobi's ubw test branch

Dependencies:   mavlink_bridge mbed

Fork of AIT_UWB_Range by Benjamin Hepp

DW1000/DW1000.cpp@48:5999e510f154, 2015-11-24 (annotated)

Committer:
bhepp
Date:
Tue Nov 24 16:41:23 2015 +0000
Revision:
48:5999e510f154
Parent:
47:b6120c152ad1
Child:
50:50b8aea54a51
Multiple Receivers implemented

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manumaet 0:f50e671ffff7 1 #include "DW1000.h"
manumaet 0:f50e671ffff7 2
bhepp 48:5999e510f154 3 //#include "PC.h"
bhepp 48:5999e510f154 4 //static PC pc(USBTX, USBRX, 115200); // USB UART Terminal
bhepp 48:5999e510f154 5
bhepp 48:5999e510f154 6 DW1000::DW1000(SPI& spi, InterruptMultiplexer& irq_mp, PinName CS, PinName RESET) : spi(spi), cs(CS), irq_mp(irq_mp), reset(RESET) {
manumaet 26:a65c6f26c458 7 setCallbacks(NULL, NULL);
bhepp 48:5999e510f154 8
manumaet 0:f50e671ffff7 9 deselect(); // Chip must be deselected first
manumaet 37:40f94c634c3e 10 resetAll(); // we do a soft reset of the DW1000 everytime the driver starts
manumaet 44:2e0045042a59 11
manumaet 18:bbc7ca7d3a95 12 // Configuration TODO: make method for that
manumaet 45:01a33363bc21 13 // User Manual "2.5.5 Default Configurations that should be modified" p. 22
manumaet 45:01a33363bc21 14 //Those values are for the standard mode (6.8Mbps, 5, 16Mhz, 32 Symbols) and are INCOMPLETE!
manumaet 45:01a33363bc21 15 // writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870);
manumaet 45:01a33363bc21 16 // writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907);
manumaet 45:01a33363bc21 17 // writeRegister32(DW1000_DRX_CONF, 0x08, 0x311A002D);
manumaet 45:01a33363bc21 18 // writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD);
manumaet 45:01a33363bc21 19 // writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607);
manumaet 45:01a33363bc21 20 // writeRegister32(DW1000_TX_POWER, 0, 0x0E082848);
manumaet 45:01a33363bc21 21 // writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0);
manumaet 45:01a33363bc21 22 // writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0);
manumaet 45:01a33363bc21 23 // writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6);
manumaet 44:2e0045042a59 24
manumaet 45:01a33363bc21 25
manumaet 45:01a33363bc21 26 //Those values are for the 110kbps mode (5, 16MHz, 1024 Symbols) and are quite complete
manumaet 45:01a33363bc21 27 writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870); //AGC_TUNE1 for 16MHz PRF
manumaet 45:01a33363bc21 28 writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907); //AGC_TUNE2 (Universal)
manumaet 45:01a33363bc21 29 writeRegister16(DW1000_AGC_CTRL, 0x12, 0x0055); //AGC_TUNE3 (Universal)
manumaet 45:01a33363bc21 30
manumaet 45:01a33363bc21 31 writeRegister16(DW1000_DRX_CONF, 0x02, 0x000A); //DRX_TUNE0b for 110kbps
manumaet 45:01a33363bc21 32 writeRegister16(DW1000_DRX_CONF, 0x04, 0x0087); //DRX_TUNE1a for 16MHz PRF
manumaet 45:01a33363bc21 33 writeRegister16(DW1000_DRX_CONF, 0x06, 0x0064); //DRX_TUNE1b for 110kbps & > 1024 symbols
manumaet 45:01a33363bc21 34 writeRegister32(DW1000_DRX_CONF, 0x08, 0x351A009A); //PAC size for 1024 symbols preamble & 16MHz PRF
manumaet 45:01a33363bc21 35 //writeRegister32(DW1000_DRX_CONF, 0x08, 0x371A011D); //PAC size for 2048 symbols preamble
manumaet 45:01a33363bc21 36
manumaet 45:01a33363bc21 37 writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD); //LDE_CFG1
manumaet 45:01a33363bc21 38 writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607); //LDE_CFG2 for 16MHz PRF
manumaet 45:01a33363bc21 39
manumaet 46:6398237672a0 40 writeRegister32(DW1000_TX_POWER, 0, 0x28282828); //Power for channel 5
manumaet 45:01a33363bc21 41
manumaet 45:01a33363bc21 42 writeRegister8(DW1000_RF_CONF, 0x0B, 0xD8); //RF_RXCTRLH for channel 5
manumaet 45:01a33363bc21 43 writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0); //RF_TXCTRL for channel 5
manumaet 45:01a33363bc21 44
manumaet 45:01a33363bc21 45 writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0); //TC_PGDELAY for channel 5
manumaet 45:01a33363bc21 46
manumaet 45:01a33363bc21 47 writeRegister32 (DW1000_FS_CTRL, 0x07, 0x0800041D); //FS_PLLCFG for channel 5
manumaet 45:01a33363bc21 48 writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6); //FS_PLLTUNE for channel 5
manumaet 45:01a33363bc21 49
manumaet 46:6398237672a0 50 loadLDE(); // important everytime DW1000 initialises/awakes otherwise the LDE algorithm must be turned off or there's receiving malfunction see User Manual LDELOAD on p22 & p158
manumaet 42:83931678c4de 51
manumaet 42:83931678c4de 52 // 110kbps CAUTION: a lot of other registers have to be set for an optimized operation on 110kbps
manumaet 45:01a33363bc21 53 writeRegister16(DW1000_TX_FCTRL, 1, 0x0800 | 0x0100 | 0x0080); // use 1024 symbols preamble (0x0800) (previously 2048 - 0x2800), 16MHz pulse repetition frequency (0x0100), 110kbps bit rate (0x0080) see p.69 of DW1000 User Manual
manumaet 45:01a33363bc21 54 writeRegister8(DW1000_SYS_CFG, 2, 0x44); // enable special receiving option for 110kbps (disable smartTxPower)!! (0x44) see p.64 of DW1000 User Manual [DO NOT enable 1024 byte frames (0x03) becuase it generates disturbance of ranging don't know why...]
manumaet 44:2e0045042a59 55
manumaet 42:83931678c4de 56 writeRegister16(DW1000_TX_ANTD, 0, 16384); // set TX and RX Antenna delay to neutral because we calibrate afterwards
manumaet 46:6398237672a0 57 writeRegister16(DW1000_LDE_CTRL, 0x1804, 16384); // = 2^14 a quarter of the range of the 16-Bit register which corresponds to zero calibration in a round trip (TX1+RX2+TX2+RX1)
manumaet 44:2e0045042a59 58
manumaet 42:83931678c4de 59 writeRegister8(DW1000_SYS_CFG, 3, 0x20); // enable auto reenabling receiver after error
manumaet 42:83931678c4de 60
bhepp 48:5999e510f154 61 irq_index = irq_mp.addISR(this, &DW1000::ISR);
manumaet 0:f50e671ffff7 62 }
manumaet 0:f50e671ffff7 63
manumaet 29:019ff388ed76 64 void DW1000::setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)) {
manumaet 29:019ff388ed76 65 bool RX = false;
manumaet 29:019ff388ed76 66 bool TX = false;
manumaet 29:019ff388ed76 67 if (callbackRX) {
manumaet 29:019ff388ed76 68 DW1000::callbackRX.attach(callbackRX);
manumaet 29:019ff388ed76 69 RX = true;
manumaet 29:019ff388ed76 70 }
manumaet 29:019ff388ed76 71 if (callbackTX) {
manumaet 29:019ff388ed76 72 DW1000::callbackTX.attach(callbackTX);
manumaet 29:019ff388ed76 73 TX = true;
manumaet 29:019ff388ed76 74 }
manumaet 29:019ff388ed76 75 setInterrupt(RX,TX);
manumaet 26:a65c6f26c458 76 }
manumaet 26:a65c6f26c458 77
manumaet 0:f50e671ffff7 78 uint32_t DW1000::getDeviceID() {
manumaet 0:f50e671ffff7 79 uint32_t result;
manumaet 0:f50e671ffff7 80 readRegister(DW1000_DEV_ID, 0, (uint8_t*)&result, 4);
manumaet 0:f50e671ffff7 81 return result;
manumaet 0:f50e671ffff7 82 }
manumaet 0:f50e671ffff7 83
manumaet 0:f50e671ffff7 84 uint64_t DW1000::getEUI() {
manumaet 0:f50e671ffff7 85 uint64_t result;
manumaet 0:f50e671ffff7 86 readRegister(DW1000_EUI, 0, (uint8_t*)&result, 8);
manumaet 0:f50e671ffff7 87 return result;
manumaet 0:f50e671ffff7 88 }
manumaet 0:f50e671ffff7 89
manumaet 0:f50e671ffff7 90 void DW1000::setEUI(uint64_t EUI) {
manumaet 0:f50e671ffff7 91 writeRegister(DW1000_EUI, 0, (uint8_t*)&EUI, 8);
manumaet 0:f50e671ffff7 92 }
manumaet 0:f50e671ffff7 93
manumaet 0:f50e671ffff7 94 float DW1000::getVoltage() {
manumaet 12:985aa9843c3c 95 uint8_t buffer[7] = {0x80, 0x0A, 0x0F, 0x01, 0x00}; // algorithm form User Manual p57
manumaet 0:f50e671ffff7 96 writeRegister(DW1000_RF_CONF, 0x11, buffer, 2);
manumaet 0:f50e671ffff7 97 writeRegister(DW1000_RF_CONF, 0x12, &buffer[2], 1);
manumaet 0:f50e671ffff7 98 writeRegister(DW1000_TX_CAL, 0x00, &buffer[3], 1);
manumaet 0:f50e671ffff7 99 writeRegister(DW1000_TX_CAL, 0x00, &buffer[4], 1);
manumaet 8:7a9c61242e2f 100 readRegister(DW1000_TX_CAL, 0x03, &buffer[5], 2); // get the 8-Bit readings for Voltage and Temperature
manumaet 0:f50e671ffff7 101 float Voltage = buffer[5] * 0.0057 + 2.3;
manumaet 47:b6120c152ad1 102 //float Temperature = buffer[6] * 1.13 - 113.0; // TODO: getTemperature was always ~35 degree with better formula/calibration
manumaet 0:f50e671ffff7 103 return Voltage;
manumaet 0:f50e671ffff7 104 }
manumaet 0:f50e671ffff7 105
manumaet 18:bbc7ca7d3a95 106 uint64_t DW1000::getStatus() {
manumaet 18:bbc7ca7d3a95 107 return readRegister40(DW1000_SYS_STATUS, 0);
manumaet 18:bbc7ca7d3a95 108 }
manumaet 18:bbc7ca7d3a95 109
manumaet 26:a65c6f26c458 110 uint64_t DW1000::getRXTimestamp() {
manumaet 26:a65c6f26c458 111 return readRegister40(DW1000_RX_TIME, 0);
manumaet 26:a65c6f26c458 112 }
manumaet 26:a65c6f26c458 113
manumaet 26:a65c6f26c458 114 uint64_t DW1000::getTXTimestamp() {
manumaet 26:a65c6f26c458 115 return readRegister40(DW1000_TX_TIME, 0);
manumaet 26:a65c6f26c458 116 }
manumaet 26:a65c6f26c458 117
bhepp 48:5999e510f154 118 uint16_t DW1000::getStdNoise() {
bhepp 48:5999e510f154 119 return readRegister16(DW1000_RX_FQUAL, 0x00);
bhepp 48:5999e510f154 120 }
bhepp 48:5999e510f154 121
bhepp 48:5999e510f154 122 uint16_t DW1000::getPACC() {
bhepp 48:5999e510f154 123 uint32_t v = readRegister32(DW1000_RX_FINFO, 0x00);
bhepp 48:5999e510f154 124 v >>= 20;
bhepp 48:5999e510f154 125 return static_cast<uint16_t>(v);
bhepp 48:5999e510f154 126 }
bhepp 48:5999e510f154 127
bhepp 48:5999e510f154 128 uint16_t DW1000::getFPINDEX() {
bhepp 48:5999e510f154 129 return readRegister16(DW1000_RX_TIME, 0x05);
bhepp 48:5999e510f154 130 }
bhepp 48:5999e510f154 131
bhepp 48:5999e510f154 132 uint16_t DW1000::getFPAMPL1() {
bhepp 48:5999e510f154 133 return readRegister16(DW1000_RX_TIME, 0x07);
bhepp 48:5999e510f154 134 }
bhepp 48:5999e510f154 135
bhepp 48:5999e510f154 136 uint16_t DW1000::getFPAMPL2() {
bhepp 48:5999e510f154 137 return readRegister16(DW1000_RX_FQUAL, 0x02);
bhepp 48:5999e510f154 138 }
bhepp 48:5999e510f154 139
bhepp 48:5999e510f154 140 uint16_t DW1000::getFPAMPL3() {
bhepp 48:5999e510f154 141 return readRegister16(DW1000_RX_FQUAL, 0x04);
bhepp 48:5999e510f154 142 }
bhepp 48:5999e510f154 143
bhepp 48:5999e510f154 144 uint16_t DW1000::getCIRPWR() {
bhepp 48:5999e510f154 145 return readRegister16(DW1000_RX_FQUAL, 0x06);
bhepp 48:5999e510f154 146 }
bhepp 48:5999e510f154 147
bhepp 48:5999e510f154 148 uint8_t DW1000::getPRF() {
bhepp 48:5999e510f154 149 uint16_t prf_mask = (0x1 << 19) | (0x1 << 18);
bhepp 48:5999e510f154 150 uint16_t prf = readRegister16(DW1000_CHAN_CTRL, 0x00);
bhepp 48:5999e510f154 151 prf >> 18;
bhepp 48:5999e510f154 152 prf &= 0x03;
bhepp 48:5999e510f154 153 return static_cast<uint8_t>(prf);
bhepp 48:5999e510f154 154 }
bhepp 48:5999e510f154 155
manumaet 10:d077bb12d259 156 void DW1000::sendString(char* message) {
manumaet 10:d077bb12d259 157 sendFrame((uint8_t*)message, strlen(message)+1);
manumaet 10:d077bb12d259 158 }
manumaet 10:d077bb12d259 159
manumaet 24:6f25ba679490 160 void DW1000::receiveString(char* message) {
manumaet 31:6f76f3d518ac 161 readRegister(DW1000_RX_BUFFER, 0, (uint8_t*)message, getFramelength()); // get data from buffer
manumaet 10:d077bb12d259 162 }
manumaet 10:d077bb12d259 163
manumaet 11:c87d37db2c6f 164 void DW1000::sendFrame(uint8_t* message, uint16_t length) {
manumaet 38:8ef3b8d8b908 165 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
manumaet 38:8ef3b8d8b908 166 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
manumaet 13:b4d27bf7062a 167 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
manumaet 7:e634eeafc4d2 168
manumaet 39:bb57aa77b015 169 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
manumaet 39:bb57aa77b015 170 length += 2; // including 2 CRC Bytes
manumaet 39:bb57aa77b015 171 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
manumaet 39:bb57aa77b015 172 writeRegister16(DW1000_TX_FCTRL, 0, length);
manumaet 11:c87d37db2c6f 173
manumaet 25:d58b0595b300 174 stopTRX(); // stop receiving
manumaet 23:661a79e56208 175 writeRegister8(DW1000_SYS_CTRL, 0, 0x02); // trigger sending process by setting the TXSTRT bit
manumaet 25:d58b0595b300 176 startRX(); // enable receiver again
manumaet 8:7a9c61242e2f 177 }
manumaet 8:7a9c61242e2f 178
manumaet 44:2e0045042a59 179 void DW1000::sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp) {
manumaet 44:2e0045042a59 180 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
manumaet 44:2e0045042a59 181 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
manumaet 44:2e0045042a59 182 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
manumaet 44:2e0045042a59 183
manumaet 44:2e0045042a59 184 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
manumaet 44:2e0045042a59 185 length += 2; // including 2 CRC Bytes
manumaet 44:2e0045042a59 186 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
manumaet 44:2e0045042a59 187 writeRegister16(DW1000_TX_FCTRL, 0, length);
manumaet 44:2e0045042a59 188
manumaet 45:01a33363bc21 189 writeRegister40(DW1000_DX_TIME, 0, TxTimestamp); //write the timestamp on which to send the message
manumaet 44:2e0045042a59 190
manumaet 44:2e0045042a59 191 stopTRX(); // stop receiving
manumaet 44:2e0045042a59 192 writeRegister8(DW1000_SYS_CTRL, 0, 0x02 | 0x04); // trigger sending process by setting the TXSTRT and TXDLYS bit
manumaet 44:2e0045042a59 193 startRX(); // enable receiver again
manumaet 44:2e0045042a59 194 }
manumaet 44:2e0045042a59 195
manumaet 17:8afa5f9122da 196 void DW1000::startRX() {
manumaet 20:257d56530ae1 197 writeRegister8(DW1000_SYS_CTRL, 0x01, 0x01); // start listening for preamble by setting the RXENAB bit
manumaet 7:e634eeafc4d2 198 }
manumaet 7:e634eeafc4d2 199
manumaet 25:d58b0595b300 200 void DW1000::stopTRX() {
manumaet 25:d58b0595b300 201 writeRegister8(DW1000_SYS_CTRL, 0, 0x40); // disable tranceiver go back to idle mode
manumaet 17:8afa5f9122da 202 }
manumaet 17:8afa5f9122da 203
manumaet 20:257d56530ae1 204 // PRIVATE Methods ------------------------------------------------------------------------------------
manumaet 18:bbc7ca7d3a95 205 void DW1000::loadLDE() { // initialise LDE algorithm LDELOAD User Manual p22
manumaet 18:bbc7ca7d3a95 206 writeRegister16(DW1000_PMSC, 0, 0x0301); // set clock to XTAL so OTP is reliable
manumaet 20:257d56530ae1 207 writeRegister16(DW1000_OTP_IF, 0x06, 0x8000); // set LDELOAD bit in OTP
manumaet 12:985aa9843c3c 208 wait_us(150);
manumaet 18:bbc7ca7d3a95 209 writeRegister16(DW1000_PMSC, 0, 0x0200); // recover to PLL clock
manumaet 12:985aa9843c3c 210 }
manumaet 12:985aa9843c3c 211
manumaet 12:985aa9843c3c 212 void DW1000::resetRX() {
manumaet 12:985aa9843c3c 213 writeRegister8(DW1000_PMSC, 3, 0xE0); // set RX reset
manumaet 12:985aa9843c3c 214 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear RX reset
manumaet 12:985aa9843c3c 215 }
manumaet 12:985aa9843c3c 216
bhepp 48:5999e510f154 217 void DW1000::hardwareReset(PinName reset_pin) {
bhepp 48:5999e510f154 218 DigitalOut reset(reset_pin);
bhepp 48:5999e510f154 219 reset = 1;
bhepp 48:5999e510f154 220 wait_ms(100);
bhepp 48:5999e510f154 221 reset = 0;
bhepp 48:5999e510f154 222 wait_ms(100);
bhepp 48:5999e510f154 223 reset = 1;
bhepp 48:5999e510f154 224 wait_ms(100);
bhepp 48:5999e510f154 225 }
bhepp 48:5999e510f154 226
manumaet 12:985aa9843c3c 227 void DW1000::resetAll() {
bhepp 48:5999e510f154 228 if (reset.is_connected()) {
bhepp 48:5999e510f154 229 reset = 1;
bhepp 48:5999e510f154 230 wait_ms(100);
bhepp 48:5999e510f154 231 reset = 0;
bhepp 48:5999e510f154 232 wait_ms(100);
bhepp 48:5999e510f154 233 reset = 1;
bhepp 48:5999e510f154 234 wait_ms(100);
bhepp 48:5999e510f154 235 }
bhepp 48:5999e510f154 236
manumaet 12:985aa9843c3c 237 writeRegister8(DW1000_PMSC, 0, 0x01); // set clock to XTAL
manumaet 12:985aa9843c3c 238 writeRegister8(DW1000_PMSC, 3, 0x00); // set All reset
manumaet 12:985aa9843c3c 239 wait_us(10); // wait for PLL to lock
manumaet 12:985aa9843c3c 240 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear All reset
manumaet 7:e634eeafc4d2 241 }
manumaet 0:f50e671ffff7 242
manumaet 29:019ff388ed76 243
manumaet 29:019ff388ed76 244 void DW1000::setInterrupt(bool RX, bool TX) {
manumaet 29:019ff388ed76 245 writeRegister16(DW1000_SYS_MASK, 0, RX*0x4000 | TX*0x0080); // RX good frame 0x4000, TX done 0x0080
manumaet 29:019ff388ed76 246 }
manumaet 29:019ff388ed76 247
manumaet 20:257d56530ae1 248 void DW1000::ISR() {
bhepp 48:5999e510f154 249 // pc.printf("ISR\r\n");
manumaet 20:257d56530ae1 250 uint64_t status = getStatus();
manumaet 22:576ee999b004 251 if (status & 0x4000) { // a frame was received
manumaet 29:019ff388ed76 252 callbackRX.call();
manumaet 22:576ee999b004 253 writeRegister16(DW1000_SYS_STATUS, 0, 0x6F00); // clearing of receiving status bits
manumaet 20:257d56530ae1 254 }
manumaet 22:576ee999b004 255 if (status & 0x80) { // sending complete
manumaet 29:019ff388ed76 256 callbackTX.call();
manumaet 22:576ee999b004 257 writeRegister8(DW1000_SYS_STATUS, 0, 0xF8); // clearing of sending status bits
manumaet 20:257d56530ae1 258 }
manumaet 20:257d56530ae1 259 }
manumaet 20:257d56530ae1 260
manumaet 20:257d56530ae1 261 uint16_t DW1000::getFramelength() {
manumaet 20:257d56530ae1 262 uint16_t framelength = readRegister16(DW1000_RX_FINFO, 0); // get framelength
manumaet 20:257d56530ae1 263 framelength = (framelength & 0x03FF) - 2; // take only the right bits and subtract the 2 CRC Bytes
manumaet 20:257d56530ae1 264 return framelength;
manumaet 20:257d56530ae1 265 }
manumaet 20:257d56530ae1 266
manumaet 0:f50e671ffff7 267 // SPI Interface ------------------------------------------------------------------------------------
manumaet 10:d077bb12d259 268 uint8_t DW1000::readRegister8(uint8_t reg, uint16_t subaddress) {
manumaet 10:d077bb12d259 269 uint8_t result;
manumaet 10:d077bb12d259 270 readRegister(reg, subaddress, &result, 1);
manumaet 10:d077bb12d259 271 return result;
manumaet 10:d077bb12d259 272 }
manumaet 10:d077bb12d259 273
manumaet 18:bbc7ca7d3a95 274 uint16_t DW1000::readRegister16(uint8_t reg, uint16_t subaddress) {
manumaet 18:bbc7ca7d3a95 275 uint16_t result;
manumaet 18:bbc7ca7d3a95 276 readRegister(reg, subaddress, (uint8_t*)&result, 2);
manumaet 18:bbc7ca7d3a95 277 return result;
manumaet 18:bbc7ca7d3a95 278 }
manumaet 18:bbc7ca7d3a95 279
bhepp 48:5999e510f154 280 uint32_t DW1000::readRegister32(uint8_t reg, uint16_t subaddress) {
bhepp 48:5999e510f154 281 uint32_t result;
bhepp 48:5999e510f154 282 readRegister(reg, subaddress, (uint8_t*)&result, 4);
bhepp 48:5999e510f154 283 return result;
bhepp 48:5999e510f154 284 }
bhepp 48:5999e510f154 285
manumaet 18:bbc7ca7d3a95 286 uint64_t DW1000::readRegister40(uint8_t reg, uint16_t subaddress) {
manumaet 18:bbc7ca7d3a95 287 uint64_t result;
manumaet 18:bbc7ca7d3a95 288 readRegister(reg, subaddress, (uint8_t*)&result, 5);
manumaet 18:bbc7ca7d3a95 289 result &= 0xFFFFFFFFFF; // only 40-Bit
manumaet 18:bbc7ca7d3a95 290 return result;
manumaet 18:bbc7ca7d3a95 291 }
manumaet 18:bbc7ca7d3a95 292
manumaet 8:7a9c61242e2f 293 void DW1000::writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer) {
manumaet 8:7a9c61242e2f 294 writeRegister(reg, subaddress, &buffer, 1);
manumaet 8:7a9c61242e2f 295 }
manumaet 8:7a9c61242e2f 296
manumaet 18:bbc7ca7d3a95 297 void DW1000::writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer) {
manumaet 18:bbc7ca7d3a95 298 writeRegister(reg, subaddress, (uint8_t*)&buffer, 2);
manumaet 18:bbc7ca7d3a95 299 }
manumaet 18:bbc7ca7d3a95 300
manumaet 42:83931678c4de 301 void DW1000::writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer) {
manumaet 42:83931678c4de 302 writeRegister(reg, subaddress, (uint8_t*)&buffer, 4);
manumaet 42:83931678c4de 303 }
manumaet 42:83931678c4de 304
manumaet 44:2e0045042a59 305 void DW1000::writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer) {
manumaet 44:2e0045042a59 306 writeRegister(reg, subaddress, (uint8_t*)&buffer, 5);
manumaet 44:2e0045042a59 307 }
manumaet 44:2e0045042a59 308
manumaet 8:7a9c61242e2f 309 void DW1000::readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
manumaet 0:f50e671ffff7 310 setupTransaction(reg, subaddress, false);
manumaet 18:bbc7ca7d3a95 311 for(int i=0; i<length; i++) // get data
manumaet 0:f50e671ffff7 312 buffer[i] = spi.write(0x00);
manumaet 0:f50e671ffff7 313 deselect();
manumaet 0:f50e671ffff7 314 }
manumaet 0:f50e671ffff7 315
manumaet 8:7a9c61242e2f 316 void DW1000::writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
manumaet 0:f50e671ffff7 317 setupTransaction(reg, subaddress, true);
manumaet 18:bbc7ca7d3a95 318 for(int i=0; i<length; i++) // put data
manumaet 0:f50e671ffff7 319 spi.write(buffer[i]);
manumaet 0:f50e671ffff7 320 deselect();
manumaet 0:f50e671ffff7 321 }
manumaet 0:f50e671ffff7 322
manumaet 8:7a9c61242e2f 323 void DW1000::setupTransaction(uint8_t reg, uint16_t subaddress, bool write) {
manumaet 18:bbc7ca7d3a95 324 reg |= (write * DW1000_WRITE_FLAG); // set read/write flag
manumaet 0:f50e671ffff7 325 select();
manumaet 0:f50e671ffff7 326 if (subaddress > 0) { // there's a subadress, we need to set flag and send second header byte
manumaet 0:f50e671ffff7 327 spi.write(reg | DW1000_SUBADDRESS_FLAG);
manumaet 18:bbc7ca7d3a95 328 if (subaddress > 0x7F) { // sub address too long, we need to set flag and send third header byte
manumaet 18:bbc7ca7d3a95 329 spi.write((uint8_t)(subaddress & 0x7F) | DW1000_2_SUBADDRESS_FLAG); // and
manumaet 0:f50e671ffff7 330 spi.write((uint8_t)(subaddress >> 7));
manumaet 0:f50e671ffff7 331 } else {
manumaet 0:f50e671ffff7 332 spi.write((uint8_t)subaddress);
manumaet 0:f50e671ffff7 333 }
manumaet 0:f50e671ffff7 334 } else {
manumaet 18:bbc7ca7d3a95 335 spi.write(reg); // say which register address we want to access
manumaet 0:f50e671ffff7 336 }
manumaet 0:f50e671ffff7 337 }
manumaet 0:f50e671ffff7 338
manumaet 39:bb57aa77b015 339 void DW1000::select() { // always called to start an SPI transmission
bhepp 48:5999e510f154 340 irq_mp.disable(irq_index);
manumaet 39:bb57aa77b015 341 cs = 0; // set Cable Select pin low to start transmission
manumaet 39:bb57aa77b015 342 }
manumaet 39:bb57aa77b015 343 void DW1000::deselect() { // always called to end an SPI transmission
manumaet 39:bb57aa77b015 344 cs = 1; // set Cable Select pin high to stop transmission
bhepp 48:5999e510f154 345 irq_mp.enable(irq_index);
manumaet 45:01a33363bc21 346 }
bhepp 48:5999e510f154 347
bhepp 48:5999e510f154 348 void DW1000::enable_irq() { // always called to start an SPI transmission
bhepp 48:5999e510f154 349 //pc.printf("Enabling irq %d\r\n", irq_index);
bhepp 48:5999e510f154 350 irq_mp.enable(irq_index);
bhepp 48:5999e510f154 351 }
bhepp 48:5999e510f154 352 void DW1000::disable_irq() { // always called to end an SPI transmission
bhepp 48:5999e510f154 353 irq_mp.disable(irq_index);
bhepp 48:5999e510f154 354 }