Tobias Naegeli / Mbed 2 deprecated AIT_UWB_Range

Tobi's ubw test branch

Dependencies:   mavlink_bridge mbed

Fork of AIT_UWB_Range by Benjamin Hepp

DW1000/DW1000.cpp@60:43be9228b3b9, 2016-01-05 (annotated)

Committer:
bhepp
Date:
Tue Jan 05 08:59:30 2016 +0000
Revision:
60:43be9228b3b9
Parent:
53:79a72d752ec4
Child:
65:4c3bd79b57d2
Now resetting interrupt flags when disabling interrupts

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manumaet 0:f50e671ffff7 1 #include "DW1000.h"
manumaet 0:f50e671ffff7 2
bhepp 50:50b8aea54a51 3 // Change this depending on whether damaged or heatlhy DWM1000 modules are used.
bhepp 50:50b8aea54a51 4 const bool DWM1000_DAMAGED = true;
bhepp 50:50b8aea54a51 5
bhepp 48:5999e510f154 6 //#include "PC.h"
bhepp 48:5999e510f154 7 //static PC pc(USBTX, USBRX, 115200); // USB UART Terminal
bhepp 48:5999e510f154 8
bhepp 48:5999e510f154 9 DW1000::DW1000(SPI& spi, InterruptMultiplexer& irq_mp, PinName CS, PinName RESET) : spi(spi), cs(CS), irq_mp(irq_mp), reset(RESET) {
bhepp 50:50b8aea54a51 10 irq_index = irq_mp.addCallback(this, &DW1000::ISR, false);
bhepp 50:50b8aea54a51 11
naegelit 53:79a72d752ec4 12
manumaet 26:a65c6f26c458 13 setCallbacks(NULL, NULL);
naegelit 53:79a72d752ec4 14 deselect();
naegelit 53:79a72d752ec4 15 //wait(2);
naegelit 53:79a72d752ec4 16 select();
naegelit 53:79a72d752ec4 17
naegelit 53:79a72d752ec4 18 //wait(2);
naegelit 53:79a72d752ec4 19 deselect();
naegelit 53:79a72d752ec4 20 //wait(2); // Chip must be deselected first
manumaet 37:40f94c634c3e 21 resetAll(); // we do a soft reset of the DW1000 everytime the driver starts
manumaet 44:2e0045042a59 22
manumaet 18:bbc7ca7d3a95 23 // Configuration TODO: make method for that
manumaet 45:01a33363bc21 24 // User Manual "2.5.5 Default Configurations that should be modified" p. 22
manumaet 45:01a33363bc21 25 //Those values are for the standard mode (6.8Mbps, 5, 16Mhz, 32 Symbols) and are INCOMPLETE!
manumaet 45:01a33363bc21 26 // writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870);
manumaet 45:01a33363bc21 27 // writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907);
manumaet 45:01a33363bc21 28 // writeRegister32(DW1000_DRX_CONF, 0x08, 0x311A002D);
manumaet 45:01a33363bc21 29 // writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD);
manumaet 45:01a33363bc21 30 // writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607);
manumaet 45:01a33363bc21 31 // writeRegister32(DW1000_TX_POWER, 0, 0x0E082848);
manumaet 45:01a33363bc21 32 // writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0);
manumaet 45:01a33363bc21 33 // writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0);
manumaet 45:01a33363bc21 34 // writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6);
manumaet 44:2e0045042a59 35
manumaet 45:01a33363bc21 36
manumaet 45:01a33363bc21 37 //Those values are for the 110kbps mode (5, 16MHz, 1024 Symbols) and are quite complete
manumaet 45:01a33363bc21 38 writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870); //AGC_TUNE1 for 16MHz PRF
manumaet 45:01a33363bc21 39 writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907); //AGC_TUNE2 (Universal)
manumaet 45:01a33363bc21 40 writeRegister16(DW1000_AGC_CTRL, 0x12, 0x0055); //AGC_TUNE3 (Universal)
manumaet 45:01a33363bc21 41
manumaet 45:01a33363bc21 42 writeRegister16(DW1000_DRX_CONF, 0x02, 0x000A); //DRX_TUNE0b for 110kbps
manumaet 45:01a33363bc21 43 writeRegister16(DW1000_DRX_CONF, 0x04, 0x0087); //DRX_TUNE1a for 16MHz PRF
manumaet 45:01a33363bc21 44 writeRegister16(DW1000_DRX_CONF, 0x06, 0x0064); //DRX_TUNE1b for 110kbps & > 1024 symbols
manumaet 45:01a33363bc21 45 writeRegister32(DW1000_DRX_CONF, 0x08, 0x351A009A); //PAC size for 1024 symbols preamble & 16MHz PRF
manumaet 45:01a33363bc21 46 //writeRegister32(DW1000_DRX_CONF, 0x08, 0x371A011D); //PAC size for 2048 symbols preamble
manumaet 45:01a33363bc21 47
manumaet 45:01a33363bc21 48 writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD); //LDE_CFG1
manumaet 45:01a33363bc21 49 writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607); //LDE_CFG2 for 16MHz PRF
manumaet 45:01a33363bc21 50
manumaet 46:6398237672a0 51 writeRegister32(DW1000_TX_POWER, 0, 0x28282828); //Power for channel 5
manumaet 45:01a33363bc21 52
manumaet 45:01a33363bc21 53 writeRegister8(DW1000_RF_CONF, 0x0B, 0xD8); //RF_RXCTRLH for channel 5
manumaet 45:01a33363bc21 54 writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0); //RF_TXCTRL for channel 5
manumaet 45:01a33363bc21 55
manumaet 45:01a33363bc21 56 writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0); //TC_PGDELAY for channel 5
manumaet 45:01a33363bc21 57
manumaet 45:01a33363bc21 58 writeRegister32 (DW1000_FS_CTRL, 0x07, 0x0800041D); //FS_PLLCFG for channel 5
manumaet 45:01a33363bc21 59 writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6); //FS_PLLTUNE for channel 5
manumaet 45:01a33363bc21 60
manumaet 46:6398237672a0 61 loadLDE(); // important everytime DW1000 initialises/awakes otherwise the LDE algorithm must be turned off or there's receiving malfunction see User Manual LDELOAD on p22 & p158
manumaet 42:83931678c4de 62
manumaet 42:83931678c4de 63 // 110kbps CAUTION: a lot of other registers have to be set for an optimized operation on 110kbps
manumaet 45:01a33363bc21 64 writeRegister16(DW1000_TX_FCTRL, 1, 0x0800 | 0x0100 | 0x0080); // use 1024 symbols preamble (0x0800) (previously 2048 - 0x2800), 16MHz pulse repetition frequency (0x0100), 110kbps bit rate (0x0080) see p.69 of DW1000 User Manual
manumaet 45:01a33363bc21 65 writeRegister8(DW1000_SYS_CFG, 2, 0x44); // enable special receiving option for 110kbps (disable smartTxPower)!! (0x44) see p.64 of DW1000 User Manual [DO NOT enable 1024 byte frames (0x03) becuase it generates disturbance of ranging don't know why...]
manumaet 44:2e0045042a59 66
manumaet 42:83931678c4de 67 writeRegister16(DW1000_TX_ANTD, 0, 16384); // set TX and RX Antenna delay to neutral because we calibrate afterwards
manumaet 46:6398237672a0 68 writeRegister16(DW1000_LDE_CTRL, 0x1804, 16384); // = 2^14 a quarter of the range of the 16-Bit register which corresponds to zero calibration in a round trip (TX1+RX2+TX2+RX1)
manumaet 44:2e0045042a59 69
manumaet 42:83931678c4de 70 writeRegister8(DW1000_SYS_CFG, 3, 0x20); // enable auto reenabling receiver after error
manumaet 0:f50e671ffff7 71 }
manumaet 0:f50e671ffff7 72
manumaet 29:019ff388ed76 73 void DW1000::setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)) {
manumaet 29:019ff388ed76 74 bool RX = false;
manumaet 29:019ff388ed76 75 bool TX = false;
manumaet 29:019ff388ed76 76 if (callbackRX) {
bhepp 50:50b8aea54a51 77 this->callbackRX.attach(callbackRX);
manumaet 29:019ff388ed76 78 RX = true;
manumaet 29:019ff388ed76 79 }
manumaet 29:019ff388ed76 80 if (callbackTX) {
bhepp 50:50b8aea54a51 81 this->callbackTX.attach(callbackTX);
manumaet 29:019ff388ed76 82 TX = true;
manumaet 29:019ff388ed76 83 }
bhepp 50:50b8aea54a51 84 setInterrupt(RX, TX);
manumaet 26:a65c6f26c458 85 }
manumaet 26:a65c6f26c458 86
manumaet 0:f50e671ffff7 87 uint32_t DW1000::getDeviceID() {
manumaet 0:f50e671ffff7 88 uint32_t result;
manumaet 0:f50e671ffff7 89 readRegister(DW1000_DEV_ID, 0, (uint8_t*)&result, 4);
manumaet 0:f50e671ffff7 90 return result;
manumaet 0:f50e671ffff7 91 }
manumaet 0:f50e671ffff7 92
manumaet 0:f50e671ffff7 93 uint64_t DW1000::getEUI() {
manumaet 0:f50e671ffff7 94 uint64_t result;
manumaet 0:f50e671ffff7 95 readRegister(DW1000_EUI, 0, (uint8_t*)&result, 8);
manumaet 0:f50e671ffff7 96 return result;
manumaet 0:f50e671ffff7 97 }
manumaet 0:f50e671ffff7 98
manumaet 0:f50e671ffff7 99 void DW1000::setEUI(uint64_t EUI) {
manumaet 0:f50e671ffff7 100 writeRegister(DW1000_EUI, 0, (uint8_t*)&EUI, 8);
manumaet 0:f50e671ffff7 101 }
manumaet 0:f50e671ffff7 102
manumaet 0:f50e671ffff7 103 float DW1000::getVoltage() {
manumaet 12:985aa9843c3c 104 uint8_t buffer[7] = {0x80, 0x0A, 0x0F, 0x01, 0x00}; // algorithm form User Manual p57
manumaet 0:f50e671ffff7 105 writeRegister(DW1000_RF_CONF, 0x11, buffer, 2);
manumaet 0:f50e671ffff7 106 writeRegister(DW1000_RF_CONF, 0x12, &buffer[2], 1);
manumaet 0:f50e671ffff7 107 writeRegister(DW1000_TX_CAL, 0x00, &buffer[3], 1);
manumaet 0:f50e671ffff7 108 writeRegister(DW1000_TX_CAL, 0x00, &buffer[4], 1);
manumaet 8:7a9c61242e2f 109 readRegister(DW1000_TX_CAL, 0x03, &buffer[5], 2); // get the 8-Bit readings for Voltage and Temperature
manumaet 0:f50e671ffff7 110 float Voltage = buffer[5] * 0.0057 + 2.3;
manumaet 47:b6120c152ad1 111 //float Temperature = buffer[6] * 1.13 - 113.0; // TODO: getTemperature was always ~35 degree with better formula/calibration
manumaet 0:f50e671ffff7 112 return Voltage;
manumaet 0:f50e671ffff7 113 }
manumaet 0:f50e671ffff7 114
manumaet 18:bbc7ca7d3a95 115 uint64_t DW1000::getStatus() {
manumaet 18:bbc7ca7d3a95 116 return readRegister40(DW1000_SYS_STATUS, 0);
manumaet 18:bbc7ca7d3a95 117 }
manumaet 18:bbc7ca7d3a95 118
manumaet 26:a65c6f26c458 119 uint64_t DW1000::getRXTimestamp() {
manumaet 26:a65c6f26c458 120 return readRegister40(DW1000_RX_TIME, 0);
manumaet 26:a65c6f26c458 121 }
manumaet 26:a65c6f26c458 122
manumaet 26:a65c6f26c458 123 uint64_t DW1000::getTXTimestamp() {
manumaet 26:a65c6f26c458 124 return readRegister40(DW1000_TX_TIME, 0);
manumaet 26:a65c6f26c458 125 }
manumaet 26:a65c6f26c458 126
bhepp 48:5999e510f154 127 uint16_t DW1000::getStdNoise() {
bhepp 48:5999e510f154 128 return readRegister16(DW1000_RX_FQUAL, 0x00);
bhepp 48:5999e510f154 129 }
bhepp 48:5999e510f154 130
bhepp 48:5999e510f154 131 uint16_t DW1000::getPACC() {
bhepp 48:5999e510f154 132 uint32_t v = readRegister32(DW1000_RX_FINFO, 0x00);
bhepp 48:5999e510f154 133 v >>= 20;
bhepp 48:5999e510f154 134 return static_cast<uint16_t>(v);
bhepp 48:5999e510f154 135 }
bhepp 48:5999e510f154 136
bhepp 48:5999e510f154 137 uint16_t DW1000::getFPINDEX() {
bhepp 48:5999e510f154 138 return readRegister16(DW1000_RX_TIME, 0x05);
bhepp 48:5999e510f154 139 }
bhepp 48:5999e510f154 140
bhepp 48:5999e510f154 141 uint16_t DW1000::getFPAMPL1() {
bhepp 48:5999e510f154 142 return readRegister16(DW1000_RX_TIME, 0x07);
bhepp 48:5999e510f154 143 }
bhepp 48:5999e510f154 144
bhepp 48:5999e510f154 145 uint16_t DW1000::getFPAMPL2() {
bhepp 48:5999e510f154 146 return readRegister16(DW1000_RX_FQUAL, 0x02);
bhepp 48:5999e510f154 147 }
bhepp 48:5999e510f154 148
bhepp 48:5999e510f154 149 uint16_t DW1000::getFPAMPL3() {
bhepp 48:5999e510f154 150 return readRegister16(DW1000_RX_FQUAL, 0x04);
bhepp 48:5999e510f154 151 }
bhepp 48:5999e510f154 152
bhepp 48:5999e510f154 153 uint16_t DW1000::getCIRPWR() {
bhepp 48:5999e510f154 154 return readRegister16(DW1000_RX_FQUAL, 0x06);
bhepp 48:5999e510f154 155 }
bhepp 48:5999e510f154 156
bhepp 48:5999e510f154 157 uint8_t DW1000::getPRF() {
bhepp 48:5999e510f154 158 uint16_t prf_mask = (0x1 << 19) | (0x1 << 18);
bhepp 48:5999e510f154 159 uint16_t prf = readRegister16(DW1000_CHAN_CTRL, 0x00);
bhepp 48:5999e510f154 160 prf >> 18;
bhepp 48:5999e510f154 161 prf &= 0x03;
bhepp 48:5999e510f154 162 return static_cast<uint8_t>(prf);
bhepp 48:5999e510f154 163 }
bhepp 48:5999e510f154 164
manumaet 10:d077bb12d259 165 void DW1000::sendString(char* message) {
manumaet 10:d077bb12d259 166 sendFrame((uint8_t*)message, strlen(message)+1);
manumaet 10:d077bb12d259 167 }
manumaet 10:d077bb12d259 168
manumaet 24:6f25ba679490 169 void DW1000::receiveString(char* message) {
manumaet 31:6f76f3d518ac 170 readRegister(DW1000_RX_BUFFER, 0, (uint8_t*)message, getFramelength()); // get data from buffer
manumaet 10:d077bb12d259 171 }
manumaet 10:d077bb12d259 172
manumaet 11:c87d37db2c6f 173 void DW1000::sendFrame(uint8_t* message, uint16_t length) {
manumaet 38:8ef3b8d8b908 174 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
manumaet 38:8ef3b8d8b908 175 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
manumaet 13:b4d27bf7062a 176 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
manumaet 39:bb57aa77b015 177 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
manumaet 39:bb57aa77b015 178 length += 2; // including 2 CRC Bytes
manumaet 39:bb57aa77b015 179 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
manumaet 39:bb57aa77b015 180 writeRegister16(DW1000_TX_FCTRL, 0, length);
naegelit 53:79a72d752ec4 181 stopTRX(); // stop receiving
manumaet 23:661a79e56208 182 writeRegister8(DW1000_SYS_CTRL, 0, 0x02); // trigger sending process by setting the TXSTRT bit
naegelit 53:79a72d752ec4 183 //wait(0.1);
naegelit 53:79a72d752ec4 184 startRX(); // enable receiver again
manumaet 8:7a9c61242e2f 185 }
manumaet 8:7a9c61242e2f 186
manumaet 44:2e0045042a59 187 void DW1000::sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp) {
manumaet 44:2e0045042a59 188 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
manumaet 44:2e0045042a59 189 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
manumaet 44:2e0045042a59 190 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
manumaet 44:2e0045042a59 191
manumaet 44:2e0045042a59 192 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
manumaet 44:2e0045042a59 193 length += 2; // including 2 CRC Bytes
manumaet 44:2e0045042a59 194 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
manumaet 44:2e0045042a59 195 writeRegister16(DW1000_TX_FCTRL, 0, length);
manumaet 44:2e0045042a59 196
manumaet 45:01a33363bc21 197 writeRegister40(DW1000_DX_TIME, 0, TxTimestamp); //write the timestamp on which to send the message
manumaet 44:2e0045042a59 198
manumaet 44:2e0045042a59 199 stopTRX(); // stop receiving
manumaet 44:2e0045042a59 200 writeRegister8(DW1000_SYS_CTRL, 0, 0x02 | 0x04); // trigger sending process by setting the TXSTRT and TXDLYS bit
manumaet 44:2e0045042a59 201 startRX(); // enable receiver again
manumaet 44:2e0045042a59 202 }
manumaet 44:2e0045042a59 203
manumaet 17:8afa5f9122da 204 void DW1000::startRX() {
manumaet 20:257d56530ae1 205 writeRegister8(DW1000_SYS_CTRL, 0x01, 0x01); // start listening for preamble by setting the RXENAB bit
manumaet 7:e634eeafc4d2 206 }
manumaet 7:e634eeafc4d2 207
manumaet 25:d58b0595b300 208 void DW1000::stopTRX() {
manumaet 25:d58b0595b300 209 writeRegister8(DW1000_SYS_CTRL, 0, 0x40); // disable tranceiver go back to idle mode
manumaet 17:8afa5f9122da 210 }
manumaet 17:8afa5f9122da 211
manumaet 20:257d56530ae1 212 // PRIVATE Methods ------------------------------------------------------------------------------------
manumaet 18:bbc7ca7d3a95 213 void DW1000::loadLDE() { // initialise LDE algorithm LDELOAD User Manual p22
manumaet 18:bbc7ca7d3a95 214 writeRegister16(DW1000_PMSC, 0, 0x0301); // set clock to XTAL so OTP is reliable
manumaet 20:257d56530ae1 215 writeRegister16(DW1000_OTP_IF, 0x06, 0x8000); // set LDELOAD bit in OTP
manumaet 12:985aa9843c3c 216 wait_us(150);
manumaet 18:bbc7ca7d3a95 217 writeRegister16(DW1000_PMSC, 0, 0x0200); // recover to PLL clock
manumaet 12:985aa9843c3c 218 }
manumaet 12:985aa9843c3c 219
manumaet 12:985aa9843c3c 220 void DW1000::resetRX() {
manumaet 12:985aa9843c3c 221 writeRegister8(DW1000_PMSC, 3, 0xE0); // set RX reset
manumaet 12:985aa9843c3c 222 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear RX reset
manumaet 12:985aa9843c3c 223 }
manumaet 12:985aa9843c3c 224
bhepp 48:5999e510f154 225 void DW1000::hardwareReset(PinName reset_pin) {
bhepp 50:50b8aea54a51 226 // DWM1000 RESET logic.
bhepp 50:50b8aea54a51 227 if (DWM1000_DAMAGED) {
bhepp 50:50b8aea54a51 228 // The following code works for damaged DWM1000 modules.
bhepp 50:50b8aea54a51 229 // IMPORTANT: This will damage healthy DWM1000 modules!
bhepp 50:50b8aea54a51 230 DigitalInOut reset(reset_pin);
bhepp 50:50b8aea54a51 231 reset.output();
bhepp 50:50b8aea54a51 232 reset = 1;
bhepp 50:50b8aea54a51 233 wait_ms(100);
bhepp 50:50b8aea54a51 234 reset = 0;
bhepp 50:50b8aea54a51 235 wait_ms(100);
bhepp 50:50b8aea54a51 236 reset = 1;
bhepp 50:50b8aea54a51 237 wait_ms(100);
bhepp 50:50b8aea54a51 238 } else {
bhepp 50:50b8aea54a51 239 // The following code works for healthy DWM1000 modules
bhepp 50:50b8aea54a51 240 DigitalInOut reset(reset_pin);
bhepp 50:50b8aea54a51 241 reset.output();
bhepp 50:50b8aea54a51 242 reset = 0;
bhepp 50:50b8aea54a51 243 wait_ms(100);
bhepp 50:50b8aea54a51 244 reset.input();
bhepp 50:50b8aea54a51 245 }
bhepp 48:5999e510f154 246 }
bhepp 48:5999e510f154 247
manumaet 12:985aa9843c3c 248 void DW1000::resetAll() {
bhepp 48:5999e510f154 249 if (reset.is_connected()) {
bhepp 48:5999e510f154 250 reset = 1;
bhepp 48:5999e510f154 251 wait_ms(100);
bhepp 48:5999e510f154 252 reset = 0;
bhepp 48:5999e510f154 253 wait_ms(100);
bhepp 48:5999e510f154 254 reset = 1;
bhepp 48:5999e510f154 255 wait_ms(100);
bhepp 48:5999e510f154 256 }
bhepp 48:5999e510f154 257
manumaet 12:985aa9843c3c 258 writeRegister8(DW1000_PMSC, 0, 0x01); // set clock to XTAL
manumaet 12:985aa9843c3c 259 writeRegister8(DW1000_PMSC, 3, 0x00); // set All reset
manumaet 12:985aa9843c3c 260 wait_us(10); // wait for PLL to lock
manumaet 12:985aa9843c3c 261 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear All reset
manumaet 7:e634eeafc4d2 262 }
manumaet 0:f50e671ffff7 263
manumaet 29:019ff388ed76 264
manumaet 29:019ff388ed76 265 void DW1000::setInterrupt(bool RX, bool TX) {
manumaet 29:019ff388ed76 266 writeRegister16(DW1000_SYS_MASK, 0, RX*0x4000 | TX*0x0080); // RX good frame 0x4000, TX done 0x0080
manumaet 29:019ff388ed76 267 }
manumaet 29:019ff388ed76 268
bhepp 60:43be9228b3b9 269 void DW1000::resetInterruptFlags() {
bhepp 60:43be9228b3b9 270 uint64_t status = getStatus();
bhepp 60:43be9228b3b9 271 if (status & 0x4000) { // a frame was received
bhepp 60:43be9228b3b9 272 writeRegister16(DW1000_SYS_STATUS, 0, 0x6F00); // clearing of receiving status bits
bhepp 60:43be9228b3b9 273 }
bhepp 60:43be9228b3b9 274 if (status & 0x80) { // sending complete
bhepp 60:43be9228b3b9 275 writeRegister8(DW1000_SYS_STATUS, 0, 0xF8); // clearing of sending status bits
bhepp 60:43be9228b3b9 276 }
bhepp 60:43be9228b3b9 277 }
bhepp 60:43be9228b3b9 278
manumaet 20:257d56530ae1 279 void DW1000::ISR() {
manumaet 20:257d56530ae1 280 uint64_t status = getStatus();
manumaet 22:576ee999b004 281 if (status & 0x4000) { // a frame was received
manumaet 29:019ff388ed76 282 callbackRX.call();
manumaet 22:576ee999b004 283 writeRegister16(DW1000_SYS_STATUS, 0, 0x6F00); // clearing of receiving status bits
manumaet 20:257d56530ae1 284 }
manumaet 22:576ee999b004 285 if (status & 0x80) { // sending complete
manumaet 29:019ff388ed76 286 callbackTX.call();
manumaet 22:576ee999b004 287 writeRegister8(DW1000_SYS_STATUS, 0, 0xF8); // clearing of sending status bits
manumaet 20:257d56530ae1 288 }
naegelit 53:79a72d752ec4 289 //printf("irq_index: %d \n\r",this->irq_index);
manumaet 20:257d56530ae1 290 }
manumaet 20:257d56530ae1 291
manumaet 20:257d56530ae1 292 uint16_t DW1000::getFramelength() {
manumaet 20:257d56530ae1 293 uint16_t framelength = readRegister16(DW1000_RX_FINFO, 0); // get framelength
manumaet 20:257d56530ae1 294 framelength = (framelength & 0x03FF) - 2; // take only the right bits and subtract the 2 CRC Bytes
manumaet 20:257d56530ae1 295 return framelength;
manumaet 20:257d56530ae1 296 }
manumaet 20:257d56530ae1 297
manumaet 0:f50e671ffff7 298 // SPI Interface ------------------------------------------------------------------------------------
manumaet 10:d077bb12d259 299 uint8_t DW1000::readRegister8(uint8_t reg, uint16_t subaddress) {
manumaet 10:d077bb12d259 300 uint8_t result;
manumaet 10:d077bb12d259 301 readRegister(reg, subaddress, &result, 1);
manumaet 10:d077bb12d259 302 return result;
manumaet 10:d077bb12d259 303 }
manumaet 10:d077bb12d259 304
manumaet 18:bbc7ca7d3a95 305 uint16_t DW1000::readRegister16(uint8_t reg, uint16_t subaddress) {
manumaet 18:bbc7ca7d3a95 306 uint16_t result;
manumaet 18:bbc7ca7d3a95 307 readRegister(reg, subaddress, (uint8_t*)&result, 2);
manumaet 18:bbc7ca7d3a95 308 return result;
manumaet 18:bbc7ca7d3a95 309 }
manumaet 18:bbc7ca7d3a95 310
bhepp 48:5999e510f154 311 uint32_t DW1000::readRegister32(uint8_t reg, uint16_t subaddress) {
bhepp 48:5999e510f154 312 uint32_t result;
bhepp 48:5999e510f154 313 readRegister(reg, subaddress, (uint8_t*)&result, 4);
bhepp 48:5999e510f154 314 return result;
bhepp 48:5999e510f154 315 }
bhepp 48:5999e510f154 316
manumaet 18:bbc7ca7d3a95 317 uint64_t DW1000::readRegister40(uint8_t reg, uint16_t subaddress) {
manumaet 18:bbc7ca7d3a95 318 uint64_t result;
manumaet 18:bbc7ca7d3a95 319 readRegister(reg, subaddress, (uint8_t*)&result, 5);
manumaet 18:bbc7ca7d3a95 320 result &= 0xFFFFFFFFFF; // only 40-Bit
manumaet 18:bbc7ca7d3a95 321 return result;
manumaet 18:bbc7ca7d3a95 322 }
manumaet 18:bbc7ca7d3a95 323
manumaet 8:7a9c61242e2f 324 void DW1000::writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer) {
manumaet 8:7a9c61242e2f 325 writeRegister(reg, subaddress, &buffer, 1);
manumaet 8:7a9c61242e2f 326 }
manumaet 8:7a9c61242e2f 327
manumaet 18:bbc7ca7d3a95 328 void DW1000::writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer) {
manumaet 18:bbc7ca7d3a95 329 writeRegister(reg, subaddress, (uint8_t*)&buffer, 2);
manumaet 18:bbc7ca7d3a95 330 }
manumaet 18:bbc7ca7d3a95 331
manumaet 42:83931678c4de 332 void DW1000::writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer) {
manumaet 42:83931678c4de 333 writeRegister(reg, subaddress, (uint8_t*)&buffer, 4);
manumaet 42:83931678c4de 334 }
manumaet 42:83931678c4de 335
manumaet 44:2e0045042a59 336 void DW1000::writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer) {
manumaet 44:2e0045042a59 337 writeRegister(reg, subaddress, (uint8_t*)&buffer, 5);
manumaet 44:2e0045042a59 338 }
manumaet 44:2e0045042a59 339
manumaet 8:7a9c61242e2f 340 void DW1000::readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
manumaet 0:f50e671ffff7 341 setupTransaction(reg, subaddress, false);
manumaet 18:bbc7ca7d3a95 342 for(int i=0; i<length; i++) // get data
manumaet 0:f50e671ffff7 343 buffer[i] = spi.write(0x00);
manumaet 0:f50e671ffff7 344 deselect();
manumaet 0:f50e671ffff7 345 }
manumaet 0:f50e671ffff7 346
manumaet 8:7a9c61242e2f 347 void DW1000::writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
manumaet 0:f50e671ffff7 348 setupTransaction(reg, subaddress, true);
manumaet 18:bbc7ca7d3a95 349 for(int i=0; i<length; i++) // put data
manumaet 0:f50e671ffff7 350 spi.write(buffer[i]);
manumaet 0:f50e671ffff7 351 deselect();
manumaet 0:f50e671ffff7 352 }
manumaet 0:f50e671ffff7 353
manumaet 8:7a9c61242e2f 354 void DW1000::setupTransaction(uint8_t reg, uint16_t subaddress, bool write) {
manumaet 18:bbc7ca7d3a95 355 reg |= (write * DW1000_WRITE_FLAG); // set read/write flag
manumaet 0:f50e671ffff7 356 select();
manumaet 0:f50e671ffff7 357 if (subaddress > 0) { // there's a subadress, we need to set flag and send second header byte
manumaet 0:f50e671ffff7 358 spi.write(reg | DW1000_SUBADDRESS_FLAG);
manumaet 18:bbc7ca7d3a95 359 if (subaddress > 0x7F) { // sub address too long, we need to set flag and send third header byte
manumaet 18:bbc7ca7d3a95 360 spi.write((uint8_t)(subaddress & 0x7F) | DW1000_2_SUBADDRESS_FLAG); // and
manumaet 0:f50e671ffff7 361 spi.write((uint8_t)(subaddress >> 7));
manumaet 0:f50e671ffff7 362 } else {
manumaet 0:f50e671ffff7 363 spi.write((uint8_t)subaddress);
manumaet 0:f50e671ffff7 364 }
manumaet 0:f50e671ffff7 365 } else {
manumaet 18:bbc7ca7d3a95 366 spi.write(reg); // say which register address we want to access
manumaet 0:f50e671ffff7 367 }
manumaet 0:f50e671ffff7 368 }
manumaet 0:f50e671ffff7 369
manumaet 39:bb57aa77b015 370 void DW1000::select() { // always called to start an SPI transmission
bhepp 50:50b8aea54a51 371 irq_mp.getIRQ().disable_irq();
manumaet 39:bb57aa77b015 372 cs = 0; // set Cable Select pin low to start transmission
manumaet 39:bb57aa77b015 373 }
bhepp 50:50b8aea54a51 374
manumaet 39:bb57aa77b015 375 void DW1000::deselect() { // always called to end an SPI transmission
manumaet 39:bb57aa77b015 376 cs = 1; // set Cable Select pin high to stop transmission
bhepp 50:50b8aea54a51 377 irq_mp.getIRQ().enable_irq();
manumaet 45:01a33363bc21 378 }
bhepp 48:5999e510f154 379
bhepp 48:5999e510f154 380 void DW1000::enable_irq() { // always called to start an SPI transmission
naegelit 53:79a72d752ec4 381 //printf("Enabling irq %d\r\n", irq_index);
bhepp 50:50b8aea54a51 382 irq_mp.enableCallback(irq_index);
bhepp 50:50b8aea54a51 383 //irq_mp.enable_irq();
bhepp 48:5999e510f154 384 }
bhepp 50:50b8aea54a51 385
bhepp 48:5999e510f154 386 void DW1000::disable_irq() { // always called to end an SPI transmission
bhepp 50:50b8aea54a51 387 irq_mp.disableCallback(irq_index);
bhepp 50:50b8aea54a51 388 //irq_mp.disable_irq();
bhepp 48:5999e510f154 389 }