FPGA_bus - Comms between MAX 10 FPGA and ST uP

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Comms between MAX 10 FPGA and ST uP

Revisions of FPGA_bus.h

Revision	Date	Message	Actions
7:c0bef9c1f5d5	2020-04-13	Change to remove default constructor error with Arm V6 compiler.	File Diff Annotate
6:e68defb7b775	2019-05-08	Added code to read system data from FPGA	File Diff Annotate
5:64c677e9995c	2019-04-18	Added routines to read and measure speed from quadrature encoder signals.	File Diff Annotate
4:e5d36eee9245	2019-04-18	Fixed errors in register address calculations in high level routines in module FPGA_bus.	File Diff Annotate
2:fd5c862b86db	2019-04-17	Fixed problem with not enabling gloobal RC subsystem flag.	File Diff Annotate
1:b819a72b3b5d	2019-04-17	Added higher level routines to set RC channels.	File Diff Annotate
0:9600ed6fd725	2019-02-20	Added PWM config function	File Diff Annotate