jim herd / FPGA_bus

Comms between MAX 10 FPGA and ST uP

Changes

RevisionDateWhoCommit message
27:fe3dddcd448c 2020-07-25 jimherd Made 'hard_check_bus' routine public. default tip
26:1837bc6df8ef 2020-07-07 jimherd Computed PWM, QE, and RC base register addresses made public
25:9cdeb5267a47 2020-06-28 jimherd Removed "wait_ms" from bus initialise code. Routine is deprecated.
24:551a996eb5c2 2020-06-28 jimherd motor command config values fixed
23:4b391cfd4f2d 2020-06-26 jimherd "soft_bus_check" changed to use decrementing timeout counter rather than fixed delay.
22:c47d4177d59c 2020-06-23 jimherd Added soft bus check that does not need a hard RESET therefore retians system configuration.
21:6b2b7a0e2d9a 2020-06-16 jimherd Bus check routine ammended to look for low to high transition on handshake_2
20:aacf2ebd93ff 2020-06-15 jimherd Added routine to test bus on initialisation. Code documented.
19:bc9910b1c186 2020-05-25 jimherd REmoved reference to serial debug channel
18:62462a30d513 2020-05-24 jimherd Updated H-bridge bit enum definitions
17:928b755cba80 2020-05-23 jimherd Initial test for PWM channel
16:d69a36a541c5 2020-05-23 jimherd Register address pointers now calculated at run-time rather than #define compile constants
15:6420b52d30cc 2020-05-22 jimherd FPGA unit base register pointers are now variables rather than #define constants
14:b56473e54f6f 2020-05-22 jimherd Removed commented out code
13:67382358d024 2020-05-02 jimherd merge
12:b9b4ff729fef 2020-05-02 jimherd fix
11:16b526669574 2020-05-02 jimherd simple layout change
10:56a045a02047 2020-05-02 jimherd do-transaction changed to public function
9:6fe95fb0c7ea 2019-05-29 jimherd Added compile time configuration to disable return of 32-bit status word.; Added log data output to allow simple timing of units of code. e.g. 6 byte out and 4 byte in transaction is timed at 9.6uS.
8:65d1b1a7bfcc 2019-05-12 jimherd Named bits in QE configuration register
7:c0bef9c1f5d5 2020-04-13 jimherd Change to remove default constructor error with Arm V6 compiler.
6:e68defb7b775 2019-05-08 jimherd Added code to read system data from FPGA
5:64c677e9995c 2019-04-18 jimherd Added routines to read and measure speed from quadrature encoder signals.
4:e5d36eee9245 2019-04-18 jimherd Fixed errors in register address calculations in high level routines in module FPGA_bus.
3:cf36c2d4208f 2019-04-17 jimherd Converted "Servo_test_2" code to use higher level routines.
2:fd5c862b86db 2019-04-17 jimherd Fixed problem with not enabling gloobal RC subsystem flag.
1:b819a72b3b5d 2019-04-17 jimherd Added higher level routines to set RC channels.
0:9600ed6fd725 2019-02-20 jimherd Added PWM config function