Peter Drescher / SPI_TFT

Library to control a QVGA TFT connected to SPI. You can use printf to print text The lib can handle different fonts, draw lines, circles, rect and bmp

Dependents:   TFT_Test1 SourceCodePro31-SB Mandelbrot Mindwave-screen ... more

See http://mbed.org/cookbook/SPI-driven-QVGA-TFT for details.

SPI_TFT.cpp@15:f5772cffc2b2, 2013-03-05 (annotated)

Committer:
dreschpe
Date:
Tue Mar 05 21:58:25 2013 +0000
Revision:
15:f5772cffc2b2
Parent:
14:ea3206e8e3bd
Child:
16:2efcbb2814fa
KL25Z Version patch

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 8:65a4de035c3c 1 /* mbed library for 240*320 pixel display TFT based on HX8347D LCD Controller
dreschpe 8:65a4de035c3c 2 * Copyright (c) 2011 Peter Drescher - DC2PD
dreschpe 8:65a4de035c3c 3 *
dreschpe 8:65a4de035c3c 4 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
dreschpe 8:65a4de035c3c 5 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
dreschpe 8:65a4de035c3c 6 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
dreschpe 8:65a4de035c3c 7 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
dreschpe 8:65a4de035c3c 8 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
dreschpe 8:65a4de035c3c 9 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
dreschpe 8:65a4de035c3c 10 * THE SOFTWARE.
dreschpe 8:65a4de035c3c 11 */
dreschpe 8:65a4de035c3c 12
dreschpe 8:65a4de035c3c 13
dreschpe 8:65a4de035c3c 14 // fix bmp padding for Bitmap function
dreschpe 8:65a4de035c3c 15 // speed up pixel
dreschpe 8:65a4de035c3c 16 // 30.12.11 fix cls
dreschpe 8:65a4de035c3c 17 // 11.03.12 use DMA to speed up
dreschpe 8:65a4de035c3c 18 // 15.03.12 use SSEL for TFT CS to enable DMA Register writes
dreschpe 8:65a4de035c3c 19 // 06.04.12 fix SSEL CS problem
dreschpe 8:65a4de035c3c 20 // 06.04.12 use direct access to the spi register to speed up the library.
dreschpe 8:65a4de035c3c 21 // 11.09.12 switch back to using io pin as cs to avoid problems with SSEL CS.
dreschpe 13:2c91cb947161 22 // 21.09.12 fix Bug in BMP_16
dreschpe 8:65a4de035c3c 23 // 11.10.12 patch from Hans Bergles to get SPI1 working again
dreschpe 8:65a4de035c3c 24 // 03.02.13 add a switch to switch off DMA use for LPC11U24
dreschpe 13:2c91cb947161 25 // 04.03.13 add support for new Kinetis board
dreschpe 8:65a4de035c3c 26
dreschpe 8:65a4de035c3c 27 #include "SPI_TFT.h"
dreschpe 8:65a4de035c3c 28 #include "mbed.h"
dreschpe 8:65a4de035c3c 29
dreschpe 8:65a4de035c3c 30 #define BPP 16 // Bits per pixel
dreschpe 13:2c91cb947161 31
dreschpe 13:2c91cb947161 32 #if defined TARGET_LPC1768
dreschpe 14:ea3206e8e3bd 33 #define USE_DMA // we use dma to speed up
dreschpe 14:ea3206e8e3bd 34 #define NO_MBED_LIB // we write direct to the SPI register to speed up
dreschpe 8:65a4de035c3c 35 #endif
dreschpe 8:65a4de035c3c 36
dreschpe 13:2c91cb947161 37 #if defined NO_DMA // if LPC1768 user want no DMA
dreschpe 8:65a4de035c3c 38 #undef USE_DMA
dreschpe 8:65a4de035c3c 39 #endif
dreschpe 13:2c91cb947161 40
dreschpe 8:65a4de035c3c 41
dreschpe 8:65a4de035c3c 42 //extern Serial pc;
dreschpe 8:65a4de035c3c 43 //extern DigitalOut xx; // debug !!
dreschpe 8:65a4de035c3c 44
dreschpe 8:65a4de035c3c 45 SPI_TFT::SPI_TFT(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset, const char *name)
dreschpe 8:65a4de035c3c 46 : _spi(mosi, miso, sclk), _cs(cs), _reset(reset),GraphicsDisplay(name)
dreschpe 8:65a4de035c3c 47 {
dreschpe 8:65a4de035c3c 48 orientation = 0;
dreschpe 8:65a4de035c3c 49 char_x = 0;
dreschpe 14:ea3206e8e3bd 50 #if defined TARGET_LPC1768
dreschpe 14:ea3206e8e3bd 51 if (mosi == p11 || mosi == P0_18){
dreschpe 14:ea3206e8e3bd 52 spi_port = 0; // we must know the used SPI port to setup the DMA
dreschpe 14:ea3206e8e3bd 53 }
dreschpe 14:ea3206e8e3bd 54 else {
dreschpe 14:ea3206e8e3bd 55 spi_port = 1;
dreschpe 14:ea3206e8e3bd 56 }
dreschpe 14:ea3206e8e3bd 57 #endif
dreschpe 8:65a4de035c3c 58 tft_reset();
dreschpe 8:65a4de035c3c 59 }
dreschpe 8:65a4de035c3c 60
dreschpe 8:65a4de035c3c 61 int SPI_TFT::width()
dreschpe 8:65a4de035c3c 62 {
dreschpe 8:65a4de035c3c 63 if (orientation == 0 || orientation == 2) return 240;
dreschpe 8:65a4de035c3c 64 else return 320;
dreschpe 8:65a4de035c3c 65 }
dreschpe 8:65a4de035c3c 66
dreschpe 8:65a4de035c3c 67
dreschpe 8:65a4de035c3c 68 int SPI_TFT::height()
dreschpe 8:65a4de035c3c 69 {
dreschpe 8:65a4de035c3c 70 if (orientation == 0 || orientation == 2) return 320;
dreschpe 8:65a4de035c3c 71 else return 240;
dreschpe 8:65a4de035c3c 72 }
dreschpe 8:65a4de035c3c 73
dreschpe 8:65a4de035c3c 74
dreschpe 8:65a4de035c3c 75 void SPI_TFT::set_orientation(unsigned int o)
dreschpe 8:65a4de035c3c 76 {
dreschpe 8:65a4de035c3c 77 orientation = o;
dreschpe 8:65a4de035c3c 78 switch (orientation) {
dreschpe 8:65a4de035c3c 79 case 0:
dreschpe 8:65a4de035c3c 80 wr_reg(0x16, 0x08);
dreschpe 8:65a4de035c3c 81 break;
dreschpe 8:65a4de035c3c 82 case 1:
dreschpe 8:65a4de035c3c 83 wr_reg(0x16, 0x68);
dreschpe 8:65a4de035c3c 84 break;
dreschpe 8:65a4de035c3c 85 case 2:
dreschpe 8:65a4de035c3c 86 wr_reg(0x16, 0xC8);
dreschpe 8:65a4de035c3c 87 break;
dreschpe 8:65a4de035c3c 88 case 3:
dreschpe 8:65a4de035c3c 89 wr_reg(0x16, 0xA8);
dreschpe 8:65a4de035c3c 90 break;
dreschpe 8:65a4de035c3c 91 }
dreschpe 8:65a4de035c3c 92 WindowMax();
dreschpe 8:65a4de035c3c 93 }
dreschpe 8:65a4de035c3c 94
dreschpe 8:65a4de035c3c 95
dreschpe 8:65a4de035c3c 96 // write command to tft register
dreschpe 8:65a4de035c3c 97
dreschpe 8:65a4de035c3c 98 void SPI_TFT::wr_cmd(unsigned char cmd)
dreschpe 8:65a4de035c3c 99 {
dreschpe 8:65a4de035c3c 100 _cs = 0;
dreschpe 14:ea3206e8e3bd 101 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 102 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 103 spi_d = 0x7000 | cmd ;
dreschpe 14:ea3206e8e3bd 104 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 105 LPC_SSP0->DR = spi_d;
dreschpe 14:ea3206e8e3bd 106 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 107 do {
dreschpe 14:ea3206e8e3bd 108 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 109 } else {
dreschpe 14:ea3206e8e3bd 110 LPC_SSP1->DR = spi_d;
dreschpe 14:ea3206e8e3bd 111 do {
dreschpe 14:ea3206e8e3bd 112 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 113 }
dreschpe 14:ea3206e8e3bd 114 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 115 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 116 _spi.write(0x70);
dreschpe 14:ea3206e8e3bd 117 _spi.write(cmd);
dreschpe 14:ea3206e8e3bd 118 #else // 16 Bit SPI
dreschpe 14:ea3206e8e3bd 119 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 120 spi_d = 0x7000 | cmd ;
dreschpe 14:ea3206e8e3bd 121 _spi.write(spi_d); // mbed lib
dreschpe 14:ea3206e8e3bd 122 #endif
dreschpe 14:ea3206e8e3bd 123 #endif
dreschpe 8:65a4de035c3c 124 _cs = 1;
dreschpe 8:65a4de035c3c 125 }
dreschpe 8:65a4de035c3c 126
dreschpe 8:65a4de035c3c 127
dreschpe 13:2c91cb947161 128 // write data to tft register
dreschpe 8:65a4de035c3c 129 void SPI_TFT::wr_dat(unsigned char dat)
dreschpe 8:65a4de035c3c 130 {
dreschpe 14:ea3206e8e3bd 131 _cs = 0;
dreschpe 14:ea3206e8e3bd 132 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 133 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 134 spi_d = 0x7200 | dat;
dreschpe 14:ea3206e8e3bd 135 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 136 LPC_SSP0->DR = spi_d;
dreschpe 14:ea3206e8e3bd 137 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 138 do {
dreschpe 14:ea3206e8e3bd 139 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 140 } else {
dreschpe 14:ea3206e8e3bd 141 LPC_SSP1->DR = spi_d;
dreschpe 14:ea3206e8e3bd 142 do {
dreschpe 14:ea3206e8e3bd 143 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 144 }
dreschpe 14:ea3206e8e3bd 145 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 146 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 147 _spi.write(0x72);
dreschpe 14:ea3206e8e3bd 148 _spi.write(dat);
dreschpe 14:ea3206e8e3bd 149 #else // 16 Bit SPI
dreschpe 14:ea3206e8e3bd 150 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 151 spi_d = 0x7200 | dat;
dreschpe 14:ea3206e8e3bd 152 _spi.write(spi_d);
dreschpe 14:ea3206e8e3bd 153 #endif
dreschpe 14:ea3206e8e3bd 154 #endif
dreschpe 8:65a4de035c3c 155 _cs = 1;
dreschpe 8:65a4de035c3c 156 }
dreschpe 8:65a4de035c3c 157
dreschpe 8:65a4de035c3c 158
dreschpe 8:65a4de035c3c 159
dreschpe 8:65a4de035c3c 160 // the HX8347-D controller do not use the MISO (SDO) Signal.
dreschpe 8:65a4de035c3c 161 // This is a bug - ?
dreschpe 14:ea3206e8e3bd 162 // A read will return 0 at the moment
dreschpe 8:65a4de035c3c 163
dreschpe 8:65a4de035c3c 164 unsigned short SPI_TFT::rd_dat (void)
dreschpe 8:65a4de035c3c 165 {
dreschpe 8:65a4de035c3c 166 unsigned short val = 0;
dreschpe 8:65a4de035c3c 167
dreschpe 8:65a4de035c3c 168 //val = _spi.write(0x73ff); /* Dummy read 1 */
dreschpe 8:65a4de035c3c 169 //val = _spi.write(0x0000); /* Read D8..D15 */
dreschpe 8:65a4de035c3c 170 return (val);
dreschpe 8:65a4de035c3c 171 }
dreschpe 8:65a4de035c3c 172
dreschpe 13:2c91cb947161 173 // write to a TFT register
dreschpe 8:65a4de035c3c 174 void SPI_TFT::wr_reg (unsigned char reg, unsigned char val)
dreschpe 8:65a4de035c3c 175 {
dreschpe 8:65a4de035c3c 176 wr_cmd(reg);
dreschpe 8:65a4de035c3c 177 wr_dat(val);
dreschpe 8:65a4de035c3c 178 }
dreschpe 8:65a4de035c3c 179
dreschpe 13:2c91cb947161 180 // read from a TFT register
dreschpe 8:65a4de035c3c 181 unsigned short SPI_TFT::rd_reg (unsigned char reg)
dreschpe 8:65a4de035c3c 182 {
dreschpe 8:65a4de035c3c 183 wr_cmd(reg);
dreschpe 8:65a4de035c3c 184 return(rd_dat());
dreschpe 8:65a4de035c3c 185 }
dreschpe 8:65a4de035c3c 186
dreschpe 13:2c91cb947161 187 // setup TFT controller - this is called by constructor
dreschpe 8:65a4de035c3c 188 void SPI_TFT::tft_reset()
dreschpe 8:65a4de035c3c 189 {
dreschpe 13:2c91cb947161 190 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 13:2c91cb947161 191 _spi.format(8,3);
dreschpe 13:2c91cb947161 192 #else // 16 Bit SPI
dreschpe 8:65a4de035c3c 193 _spi.format(16,3); // 16 bit spi mode 3
dreschpe 13:2c91cb947161 194 #endif
dreschpe 8:65a4de035c3c 195 _spi.frequency(48000000); // 48 Mhz SPI clock
dreschpe 8:65a4de035c3c 196 _cs = 1; // cs high
dreschpe 8:65a4de035c3c 197 _reset = 0; // display reset
dreschpe 8:65a4de035c3c 198
dreschpe 8:65a4de035c3c 199 wait_us(50);
dreschpe 8:65a4de035c3c 200 _reset = 1; // end reset
dreschpe 8:65a4de035c3c 201 wait_ms(5);
dreschpe 8:65a4de035c3c 202
dreschpe 8:65a4de035c3c 203 /* Start Initial Sequence ----------------------------------------------------*/
dreschpe 8:65a4de035c3c 204 wr_reg(0xEA, 0x00); /* Reset Power Control 1 */
dreschpe 8:65a4de035c3c 205 wr_reg(0xEB, 0x20); /* Power Control 2 */
dreschpe 8:65a4de035c3c 206 wr_reg(0xEC, 0x0C); /* Power Control 3 */
dreschpe 8:65a4de035c3c 207 wr_reg(0xED, 0xC4); /* Power Control 4 */
dreschpe 8:65a4de035c3c 208 wr_reg(0xE8, 0x40); /* Source OPON_N */
dreschpe 8:65a4de035c3c 209 wr_reg(0xE9, 0x38); /* Source OPON_I */
dreschpe 8:65a4de035c3c 210 wr_reg(0xF1, 0x01); /* */
dreschpe 8:65a4de035c3c 211 wr_reg(0xF2, 0x10); /* */
dreschpe 8:65a4de035c3c 212 wr_reg(0x27, 0xA3); /* Display Control 2 */
dreschpe 8:65a4de035c3c 213
dreschpe 8:65a4de035c3c 214 /* Power On sequence ---------------------------------------------------------*/
dreschpe 8:65a4de035c3c 215 wr_reg(0x1B, 0x1B); /* Power Control 2 */
dreschpe 8:65a4de035c3c 216 wr_reg(0x1A, 0x01); /* Power Control 1 */
dreschpe 8:65a4de035c3c 217 wr_reg(0x24, 0x2F); /* Vcom Control 2 */
dreschpe 8:65a4de035c3c 218 wr_reg(0x25, 0x57); /* Vcom Control 3 */
dreschpe 8:65a4de035c3c 219 wr_reg(0x23, 0x8D); /* Vcom Control 1 */
dreschpe 8:65a4de035c3c 220
dreschpe 8:65a4de035c3c 221 /* Gamma settings -----------------------------------------------------------*/
dreschpe 13:2c91cb947161 222 wr_reg(0x40,0x00); // default setup
dreschpe 8:65a4de035c3c 223 wr_reg(0x41,0x00); //
dreschpe 8:65a4de035c3c 224 wr_reg(0x42,0x01); //
dreschpe 8:65a4de035c3c 225 wr_reg(0x43,0x13); //
dreschpe 8:65a4de035c3c 226 wr_reg(0x44,0x10); //
dreschpe 8:65a4de035c3c 227 wr_reg(0x45,0x26); //
dreschpe 8:65a4de035c3c 228 wr_reg(0x46,0x08); //
dreschpe 8:65a4de035c3c 229 wr_reg(0x47,0x51); //
dreschpe 8:65a4de035c3c 230 wr_reg(0x48,0x02); //
dreschpe 8:65a4de035c3c 231 wr_reg(0x49,0x12); //
dreschpe 8:65a4de035c3c 232 wr_reg(0x4A,0x18); //
dreschpe 8:65a4de035c3c 233 wr_reg(0x4B,0x19); //
dreschpe 8:65a4de035c3c 234 wr_reg(0x4C,0x14); //
dreschpe 8:65a4de035c3c 235 wr_reg(0x50,0x19); //
dreschpe 8:65a4de035c3c 236 wr_reg(0x51,0x2F); //
dreschpe 8:65a4de035c3c 237 wr_reg(0x52,0x2C); //
dreschpe 8:65a4de035c3c 238 wr_reg(0x53,0x3E); //
dreschpe 8:65a4de035c3c 239 wr_reg(0x54,0x3F); //
dreschpe 8:65a4de035c3c 240 wr_reg(0x55,0x3F); //
dreschpe 8:65a4de035c3c 241 wr_reg(0x56,0x2E); //
dreschpe 8:65a4de035c3c 242 wr_reg(0x57,0x77); //
dreschpe 8:65a4de035c3c 243 wr_reg(0x58,0x0B); //
dreschpe 8:65a4de035c3c 244 wr_reg(0x59,0x06); //
dreschpe 8:65a4de035c3c 245 wr_reg(0x5A,0x07); //
dreschpe 8:65a4de035c3c 246 wr_reg(0x5B,0x0D); //
dreschpe 8:65a4de035c3c 247 wr_reg(0x5C,0x1D); //
dreschpe 8:65a4de035c3c 248 wr_reg(0x5D,0xCC); //
dreschpe 8:65a4de035c3c 249
dreschpe 8:65a4de035c3c 250 /* Power + Osc ---------------------------------------------------------------*/
dreschpe 14:ea3206e8e3bd 251 wr_reg(0x18, 0x36); /* OSC Control 1 */
dreschpe 14:ea3206e8e3bd 252 wr_reg(0x19, 0x01); /* OSC Control 2 */
dreschpe 14:ea3206e8e3bd 253 wr_reg(0x01, 0x00); /* Display Mode Control */
dreschpe 14:ea3206e8e3bd 254 wr_reg(0x1F, 0x88); /* Power Control 6 */
dreschpe 8:65a4de035c3c 255 wait_ms(5); /* Delay 5 ms */
dreschpe 14:ea3206e8e3bd 256 wr_reg(0x1F, 0x80); /* Power Control 6 */
dreschpe 14:ea3206e8e3bd 257 wait_ms(5); /* Delay 5 ms */
dreschpe 14:ea3206e8e3bd 258 wr_reg(0x1F, 0x90); /* Power Control 6 */
dreschpe 8:65a4de035c3c 259 wait_ms(5); /* Delay 5 ms */
dreschpe 14:ea3206e8e3bd 260 wr_reg(0x1F, 0xD0); /* Power Control 6 */
dreschpe 8:65a4de035c3c 261 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 262
dreschpe 14:ea3206e8e3bd 263 wr_reg(0x17, 0x05); /* Colmod 16Bit/Pixel */
dreschpe 8:65a4de035c3c 264
dreschpe 14:ea3206e8e3bd 265 wr_reg(0x36, 0x00); /* Panel Characteristic */
dreschpe 14:ea3206e8e3bd 266 wr_reg(0x28, 0x38); /* Display Control 3 */
dreschpe 8:65a4de035c3c 267 wait_ms(40);
dreschpe 14:ea3206e8e3bd 268 wr_reg(0x28, 0x3C); /* Display Control 3 */
dreschpe 8:65a4de035c3c 269 switch (orientation) {
dreschpe 8:65a4de035c3c 270 case 0:
dreschpe 14:ea3206e8e3bd 271 wr_reg(0x16, 0x08);
dreschpe 8:65a4de035c3c 272 break;
dreschpe 8:65a4de035c3c 273 case 2:
dreschpe 14:ea3206e8e3bd 274 wr_reg(0x16, 0xC8);
dreschpe 8:65a4de035c3c 275 break;
dreschpe 8:65a4de035c3c 276 case 3:
dreschpe 14:ea3206e8e3bd 277 wr_reg(0x16, 0xA8);
dreschpe 14:ea3206e8e3bd 278 break;
dreschpe 14:ea3206e8e3bd 279 case 1:
dreschpe 14:ea3206e8e3bd 280 default:
dreschpe 14:ea3206e8e3bd 281 wr_reg(0x16, 0x68);
dreschpe 14:ea3206e8e3bd 282 break;
dreschpe 14:ea3206e8e3bd 283
dreschpe 8:65a4de035c3c 284 }
dreschpe 13:2c91cb947161 285 #if defined USE_DMA // setup DMA channel 0
dreschpe 13:2c91cb947161 286 LPC_SC->PCONP |= (1UL << 29); // Power up the GPDMA.
dreschpe 8:65a4de035c3c 287 LPC_GPDMA->DMACConfig = 1; // enable DMA controller
dreschpe 13:2c91cb947161 288 LPC_GPDMA->DMACIntTCClear = 0x1; // Reset the Interrupt status
dreschpe 8:65a4de035c3c 289 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 290 LPC_GPDMACH0->DMACCLLI = 0;
dreschpe 8:65a4de035c3c 291 #endif
dreschpe 8:65a4de035c3c 292 WindowMax ();
dreschpe 8:65a4de035c3c 293 }
dreschpe 8:65a4de035c3c 294
dreschpe 13:2c91cb947161 295 // Set one pixel
dreschpe 8:65a4de035c3c 296 void SPI_TFT::pixel(int x, int y, int color)
dreschpe 8:65a4de035c3c 297 {
dreschpe 8:65a4de035c3c 298 wr_reg(0x03, (x >> 0));
dreschpe 8:65a4de035c3c 299 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 300 wr_reg(0x07, (y >> 0));
dreschpe 8:65a4de035c3c 301 wr_reg(0x06, (y >> 8));
dreschpe 8:65a4de035c3c 302 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 303 _cs = 0;
dreschpe 14:ea3206e8e3bd 304 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 305 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 306 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 307 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 308 LPC_SSP0->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 14:ea3206e8e3bd 309 LPC_SSP0->DR = color; // Pixel
dreschpe 14:ea3206e8e3bd 310 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 311 do {
dreschpe 14:ea3206e8e3bd 312 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 313 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 314 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 315 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 316 LPC_SSP1->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 14:ea3206e8e3bd 317 LPC_SSP1->DR = color;
dreschpe 14:ea3206e8e3bd 318 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 319 do {
dreschpe 14:ea3206e8e3bd 320 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 321 }
dreschpe 14:ea3206e8e3bd 322 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 323
dreschpe 14:ea3206e8e3bd 324 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 325 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 326 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 327 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 328 #else
dreschpe 14:ea3206e8e3bd 329 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 330 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 331 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 332 _spi.write(color); // Write D0..D15
dreschpe 14:ea3206e8e3bd 333 #endif
dreschpe 14:ea3206e8e3bd 334 #endif
dreschpe 8:65a4de035c3c 335 _cs = 1;
dreschpe 8:65a4de035c3c 336 }
dreschpe 8:65a4de035c3c 337
dreschpe 13:2c91cb947161 338 // define draw area
dreschpe 8:65a4de035c3c 339 void SPI_TFT::window (unsigned int x, unsigned int y, unsigned int w, unsigned int h)
dreschpe 8:65a4de035c3c 340 {
dreschpe 8:65a4de035c3c 341 wr_reg(0x03, x );
dreschpe 8:65a4de035c3c 342 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 343 wr_reg(0x05, x+w-1 );
dreschpe 8:65a4de035c3c 344 wr_reg(0x04, (x+w-1 >> 8));
dreschpe 8:65a4de035c3c 345 wr_reg(0x07, y );
dreschpe 8:65a4de035c3c 346 wr_reg(0x06, ( y >> 8));
dreschpe 8:65a4de035c3c 347 wr_reg(0x09, ( y+h-1 ));
dreschpe 8:65a4de035c3c 348 wr_reg(0x08, ( y+h-1 >> 8));
dreschpe 8:65a4de035c3c 349 }
dreschpe 8:65a4de035c3c 350
dreschpe 13:2c91cb947161 351 // set draw area to max
dreschpe 8:65a4de035c3c 352 void SPI_TFT::WindowMax (void)
dreschpe 8:65a4de035c3c 353 {
dreschpe 8:65a4de035c3c 354 window (0, 0, width(), height());
dreschpe 8:65a4de035c3c 355 }
dreschpe 8:65a4de035c3c 356
dreschpe 8:65a4de035c3c 357
dreschpe 13:2c91cb947161 358 // clear screen
dreschpe 8:65a4de035c3c 359 void SPI_TFT::cls (void)
dreschpe 8:65a4de035c3c 360 {
dreschpe 14:ea3206e8e3bd 361 fprintf(stderr, "CLS \n\r");
dreschpe 8:65a4de035c3c 362 int pixel = ( width() * height());
dreschpe 14:ea3206e8e3bd 363 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 364 int dma_count;
dreschpe 14:ea3206e8e3bd 365 int color = _background;
dreschpe 14:ea3206e8e3bd 366 #endif
dreschpe 8:65a4de035c3c 367 WindowMax();
dreschpe 8:65a4de035c3c 368 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 369
dreschpe 14:ea3206e8e3bd 370 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 371 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 372 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 373 #endif
dreschpe 14:ea3206e8e3bd 374 _cs = 0;
dreschpe 14:ea3206e8e3bd 375 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 376 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 377 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 378 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 379 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 380 #endif
dreschpe 14:ea3206e8e3bd 381 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 382 LPC_SSP0->DR = 0x72; // start byte
dreschpe 14:ea3206e8e3bd 383 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 384 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 385 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 386 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 387 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 388 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 389 #endif
dreschpe 14:ea3206e8e3bd 390 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 391 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 392 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 393 }
dreschpe 8:65a4de035c3c 394
dreschpe 14:ea3206e8e3bd 395 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 396 // start DMA
dreschpe 14:ea3206e8e3bd 397 do {
dreschpe 14:ea3206e8e3bd 398 if (pixel > 4095) {
dreschpe 14:ea3206e8e3bd 399 dma_count = 4095;
dreschpe 14:ea3206e8e3bd 400 pixel = pixel - 4095;
dreschpe 14:ea3206e8e3bd 401 } else {
dreschpe 14:ea3206e8e3bd 402 dma_count = pixel;
dreschpe 14:ea3206e8e3bd 403 pixel = 0;
dreschpe 14:ea3206e8e3bd 404 }
dreschpe 14:ea3206e8e3bd 405 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 406 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 407 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 408 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 409 LPC_GPDMA->DMACSoftSReq = 0x1; // DMA request
dreschpe 14:ea3206e8e3bd 410 do {
dreschpe 14:ea3206e8e3bd 411 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 14:ea3206e8e3bd 412 } while (pixel > 0);
dreschpe 14:ea3206e8e3bd 413 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 414 do {
dreschpe 14:ea3206e8e3bd 415 } while ((0x0010 & LPC_SSP0->SR) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 416 /* disable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 417 LPC_SSP0->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 418 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 419 do {
dreschpe 14:ea3206e8e3bd 420 } while ((0x0010 & LPC_SSP1->SR) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 421 /* disable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 422 LPC_SSP1->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 423 }
dreschpe 13:2c91cb947161 424
dreschpe 14:ea3206e8e3bd 425 #else // no DMA
dreschpe 14:ea3206e8e3bd 426 unsigned int i;
dreschpe 14:ea3206e8e3bd 427 for (i = 0; i < ( width() * height()); i++)
dreschpe 14:ea3206e8e3bd 428 _spi.write(_background);
dreschpe 14:ea3206e8e3bd 429 #endif
dreschpe 14:ea3206e8e3bd 430
dreschpe 14:ea3206e8e3bd 431 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 432 _cs = 0;
dreschpe 14:ea3206e8e3bd 433 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 434 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 435 unsigned int i;
dreschpe 14:ea3206e8e3bd 436 for (i = 0; i < ( width() * height()); i++) {
dreschpe 14:ea3206e8e3bd 437 _spi.write(_background >> 8);
dreschpe 14:ea3206e8e3bd 438 _spi.write(_background & 0xff);
dreschpe 14:ea3206e8e3bd 439 }
dreschpe 14:ea3206e8e3bd 440 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 441 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 442 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 443 _spi.format(16,3); // switch back to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 444 unsigned int i;
dreschpe 14:ea3206e8e3bd 445 for (i = 0; i < ( width() * height()); i++)
dreschpe 14:ea3206e8e3bd 446 _spi.write(_background);
dreschpe 14:ea3206e8e3bd 447 #endif
dreschpe 14:ea3206e8e3bd 448 #endif
dreschpe 8:65a4de035c3c 449 _cs = 1;
dreschpe 8:65a4de035c3c 450 }
dreschpe 8:65a4de035c3c 451
dreschpe 13:2c91cb947161 452 // draw circle
dreschpe 8:65a4de035c3c 453 void SPI_TFT::circle(int x0, int y0, int r, int color)
dreschpe 8:65a4de035c3c 454 {
dreschpe 8:65a4de035c3c 455
dreschpe 8:65a4de035c3c 456 int draw_x0, draw_y0;
dreschpe 8:65a4de035c3c 457 int draw_x1, draw_y1;
dreschpe 8:65a4de035c3c 458 int draw_x2, draw_y2;
dreschpe 8:65a4de035c3c 459 int draw_x3, draw_y3;
dreschpe 8:65a4de035c3c 460 int draw_x4, draw_y4;
dreschpe 8:65a4de035c3c 461 int draw_x5, draw_y5;
dreschpe 8:65a4de035c3c 462 int draw_x6, draw_y6;
dreschpe 8:65a4de035c3c 463 int draw_x7, draw_y7;
dreschpe 8:65a4de035c3c 464 int xx, yy;
dreschpe 8:65a4de035c3c 465 int di;
dreschpe 8:65a4de035c3c 466 //WindowMax();
dreschpe 8:65a4de035c3c 467 if (r == 0) { /* no radius */
dreschpe 8:65a4de035c3c 468 return;
dreschpe 8:65a4de035c3c 469 }
dreschpe 8:65a4de035c3c 470
dreschpe 8:65a4de035c3c 471 draw_x0 = draw_x1 = x0;
dreschpe 8:65a4de035c3c 472 draw_y0 = draw_y1 = y0 + r;
dreschpe 8:65a4de035c3c 473 if (draw_y0 < height()) {
dreschpe 8:65a4de035c3c 474 pixel(draw_x0, draw_y0, color); /* 90 degree */
dreschpe 8:65a4de035c3c 475 }
dreschpe 8:65a4de035c3c 476
dreschpe 8:65a4de035c3c 477 draw_x2 = draw_x3 = x0;
dreschpe 8:65a4de035c3c 478 draw_y2 = draw_y3 = y0 - r;
dreschpe 8:65a4de035c3c 479 if (draw_y2 >= 0) {
dreschpe 8:65a4de035c3c 480 pixel(draw_x2, draw_y2, color); /* 270 degree */
dreschpe 8:65a4de035c3c 481 }
dreschpe 8:65a4de035c3c 482
dreschpe 8:65a4de035c3c 483 draw_x4 = draw_x6 = x0 + r;
dreschpe 8:65a4de035c3c 484 draw_y4 = draw_y6 = y0;
dreschpe 8:65a4de035c3c 485 if (draw_x4 < width()) {
dreschpe 8:65a4de035c3c 486 pixel(draw_x4, draw_y4, color); /* 0 degree */
dreschpe 8:65a4de035c3c 487 }
dreschpe 8:65a4de035c3c 488
dreschpe 8:65a4de035c3c 489 draw_x5 = draw_x7 = x0 - r;
dreschpe 8:65a4de035c3c 490 draw_y5 = draw_y7 = y0;
dreschpe 8:65a4de035c3c 491 if (draw_x5>=0) {
dreschpe 8:65a4de035c3c 492 pixel(draw_x5, draw_y5, color); /* 180 degree */
dreschpe 8:65a4de035c3c 493 }
dreschpe 8:65a4de035c3c 494
dreschpe 8:65a4de035c3c 495 if (r == 1) {
dreschpe 8:65a4de035c3c 496 return;
dreschpe 8:65a4de035c3c 497 }
dreschpe 8:65a4de035c3c 498
dreschpe 8:65a4de035c3c 499 di = 3 - 2*r;
dreschpe 8:65a4de035c3c 500 xx = 0;
dreschpe 8:65a4de035c3c 501 yy = r;
dreschpe 8:65a4de035c3c 502 while (xx < yy) {
dreschpe 8:65a4de035c3c 503
dreschpe 8:65a4de035c3c 504 if (di < 0) {
dreschpe 8:65a4de035c3c 505 di += 4*xx + 6;
dreschpe 8:65a4de035c3c 506 } else {
dreschpe 8:65a4de035c3c 507 di += 4*(xx - yy) + 10;
dreschpe 8:65a4de035c3c 508 yy--;
dreschpe 8:65a4de035c3c 509 draw_y0--;
dreschpe 8:65a4de035c3c 510 draw_y1--;
dreschpe 8:65a4de035c3c 511 draw_y2++;
dreschpe 8:65a4de035c3c 512 draw_y3++;
dreschpe 8:65a4de035c3c 513 draw_x4--;
dreschpe 8:65a4de035c3c 514 draw_x5++;
dreschpe 8:65a4de035c3c 515 draw_x6--;
dreschpe 8:65a4de035c3c 516 draw_x7++;
dreschpe 8:65a4de035c3c 517 }
dreschpe 8:65a4de035c3c 518 xx++;
dreschpe 8:65a4de035c3c 519 draw_x0++;
dreschpe 8:65a4de035c3c 520 draw_x1--;
dreschpe 8:65a4de035c3c 521 draw_x2++;
dreschpe 8:65a4de035c3c 522 draw_x3--;
dreschpe 8:65a4de035c3c 523 draw_y4++;
dreschpe 8:65a4de035c3c 524 draw_y5++;
dreschpe 8:65a4de035c3c 525 draw_y6--;
dreschpe 8:65a4de035c3c 526 draw_y7--;
dreschpe 8:65a4de035c3c 527
dreschpe 8:65a4de035c3c 528 if ( (draw_x0 <= width()) && (draw_y0>=0) ) {
dreschpe 8:65a4de035c3c 529 pixel(draw_x0, draw_y0, color);
dreschpe 8:65a4de035c3c 530 }
dreschpe 8:65a4de035c3c 531
dreschpe 8:65a4de035c3c 532 if ( (draw_x1 >= 0) && (draw_y1 >= 0) ) {
dreschpe 8:65a4de035c3c 533 pixel(draw_x1, draw_y1, color);
dreschpe 8:65a4de035c3c 534 }
dreschpe 8:65a4de035c3c 535
dreschpe 8:65a4de035c3c 536 if ( (draw_x2 <= width()) && (draw_y2 <= height()) ) {
dreschpe 8:65a4de035c3c 537 pixel(draw_x2, draw_y2, color);
dreschpe 8:65a4de035c3c 538 }
dreschpe 8:65a4de035c3c 539
dreschpe 8:65a4de035c3c 540 if ( (draw_x3 >=0 ) && (draw_y3 <= height()) ) {
dreschpe 8:65a4de035c3c 541 pixel(draw_x3, draw_y3, color);
dreschpe 8:65a4de035c3c 542 }
dreschpe 8:65a4de035c3c 543
dreschpe 8:65a4de035c3c 544 if ( (draw_x4 <= width()) && (draw_y4 >= 0) ) {
dreschpe 8:65a4de035c3c 545 pixel(draw_x4, draw_y4, color);
dreschpe 8:65a4de035c3c 546 }
dreschpe 8:65a4de035c3c 547
dreschpe 8:65a4de035c3c 548 if ( (draw_x5 >= 0) && (draw_y5 >= 0) ) {
dreschpe 8:65a4de035c3c 549 pixel(draw_x5, draw_y5, color);
dreschpe 8:65a4de035c3c 550 }
dreschpe 8:65a4de035c3c 551 if ( (draw_x6 <=width()) && (draw_y6 <= height()) ) {
dreschpe 8:65a4de035c3c 552 pixel(draw_x6, draw_y6, color);
dreschpe 8:65a4de035c3c 553 }
dreschpe 8:65a4de035c3c 554 if ( (draw_x7 >= 0) && (draw_y7 <= height()) ) {
dreschpe 8:65a4de035c3c 555 pixel(draw_x7, draw_y7, color);
dreschpe 8:65a4de035c3c 556 }
dreschpe 8:65a4de035c3c 557 }
dreschpe 8:65a4de035c3c 558 return;
dreschpe 8:65a4de035c3c 559 }
dreschpe 8:65a4de035c3c 560
dreschpe 8:65a4de035c3c 561 void SPI_TFT::fillcircle(int x, int y, int r, int color)
dreschpe 8:65a4de035c3c 562 {
dreschpe 8:65a4de035c3c 563 int i;
dreschpe 8:65a4de035c3c 564 for (i = 0; i <= r; i++)
dreschpe 8:65a4de035c3c 565 circle(x,y,i,color);
dreschpe 8:65a4de035c3c 566 }
dreschpe 8:65a4de035c3c 567
dreschpe 8:65a4de035c3c 568
dreschpe 13:2c91cb947161 569 // draw horizontal line
dreschpe 8:65a4de035c3c 570 void SPI_TFT::hline(int x0, int x1, int y, int color)
dreschpe 8:65a4de035c3c 571 {
dreschpe 11:9bb71766cafc 572 int w;
dreschpe 8:65a4de035c3c 573 w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 574 window(x0,y,w,1);
dreschpe 8:65a4de035c3c 575 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 576 _cs = 0;
dreschpe 14:ea3206e8e3bd 577 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 578 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 579 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 580 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 581 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 582 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 583 #endif
dreschpe 14:ea3206e8e3bd 584 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 585 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 586 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 587 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 588 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 589 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 590 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 591 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 592 #endif
dreschpe 14:ea3206e8e3bd 593 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 594 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 595 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 596 }
dreschpe 14:ea3206e8e3bd 597 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 598 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 599 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 600 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 601 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 602 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 603 LPC_GPDMA->DMACSoftSReq = 0x1; // start DMA
dreschpe 14:ea3206e8e3bd 604 do {
dreschpe 14:ea3206e8e3bd 605 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 14:ea3206e8e3bd 606 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 607 do {
dreschpe 14:ea3206e8e3bd 608 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 609 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 610 do {
dreschpe 14:ea3206e8e3bd 611 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 612 }
dreschpe 14:ea3206e8e3bd 613 #else // no DMA
dreschpe 14:ea3206e8e3bd 614 int i;
dreschpe 14:ea3206e8e3bd 615 for (i=0; i<w; i++) {
dreschpe 14:ea3206e8e3bd 616 _spi.write(color);
dreschpe 14:ea3206e8e3bd 617 }
dreschpe 14:ea3206e8e3bd 618 #endif
dreschpe 14:ea3206e8e3bd 619 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 620 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 621 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 622 for (int j=0; j<w; j++) {
dreschpe 14:ea3206e8e3bd 623 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 624 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 625 }
dreschpe 14:ea3206e8e3bd 626 #else // 16 Bit SPI
dreschpe 14:ea3206e8e3bd 627 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 628 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 629 _spi.format(16,3); // switch back to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 630 for (int j=0; j<w; j++) {
dreschpe 14:ea3206e8e3bd 631 _spi.write(color);
dreschpe 14:ea3206e8e3bd 632 }
dreschpe 14:ea3206e8e3bd 633 #endif
dreschpe 14:ea3206e8e3bd 634 #endif
dreschpe 8:65a4de035c3c 635 _cs = 1;
dreschpe 8:65a4de035c3c 636 WindowMax();
dreschpe 8:65a4de035c3c 637 return;
dreschpe 8:65a4de035c3c 638 }
dreschpe 8:65a4de035c3c 639
dreschpe 13:2c91cb947161 640 // draw vertical line
dreschpe 8:65a4de035c3c 641 void SPI_TFT::vline(int x, int y0, int y1, int color)
dreschpe 8:65a4de035c3c 642 {
dreschpe 8:65a4de035c3c 643 int h;
dreschpe 8:65a4de035c3c 644 h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 645 window(x,y0,1,h);
dreschpe 8:65a4de035c3c 646 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 647 _cs = 0;
dreschpe 14:ea3206e8e3bd 648 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 649 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 650 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 651 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 652 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 653 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 654 #endif
dreschpe 14:ea3206e8e3bd 655 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 656 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 657 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 658 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 659 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 660 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 661 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 662 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 663 #endif
dreschpe 14:ea3206e8e3bd 664 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 665 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 666 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 667 }
dreschpe 14:ea3206e8e3bd 668 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 669 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 670 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 671 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 672 LPC_GPDMACH0->DMACCControl = h | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 673 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 674 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 14:ea3206e8e3bd 675 do {
dreschpe 14:ea3206e8e3bd 676 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 677
dreschpe 14:ea3206e8e3bd 678 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 679 do {
dreschpe 14:ea3206e8e3bd 680 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 681 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 682 do {
dreschpe 14:ea3206e8e3bd 683 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 684 }
dreschpe 14:ea3206e8e3bd 685 #else // no DMA
dreschpe 14:ea3206e8e3bd 686 for (int y=0; y<h; y++) {
dreschpe 14:ea3206e8e3bd 687 _spi.write(color);
dreschpe 14:ea3206e8e3bd 688 }
dreschpe 14:ea3206e8e3bd 689 #endif
dreschpe 14:ea3206e8e3bd 690 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 691 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 692 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 693 for (int y=0; y<h; y++) {
dreschpe 14:ea3206e8e3bd 694 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 695 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 696 }
dreschpe 14:ea3206e8e3bd 697 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 698 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 699 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 700 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 701 for (int y=0; y<h; y++) {
dreschpe 14:ea3206e8e3bd 702 _spi.write(color);
dreschpe 14:ea3206e8e3bd 703 }
dreschpe 14:ea3206e8e3bd 704 #endif
dreschpe 14:ea3206e8e3bd 705 #endif
dreschpe 8:65a4de035c3c 706 _cs = 1;
dreschpe 8:65a4de035c3c 707 WindowMax();
dreschpe 8:65a4de035c3c 708 return;
dreschpe 8:65a4de035c3c 709 }
dreschpe 8:65a4de035c3c 710
dreschpe 8:65a4de035c3c 711
dreschpe 13:2c91cb947161 712 // draw line
dreschpe 8:65a4de035c3c 713 void SPI_TFT::line(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 714 {
dreschpe 8:65a4de035c3c 715 //WindowMax();
dreschpe 8:65a4de035c3c 716 int dx = 0, dy = 0;
dreschpe 8:65a4de035c3c 717 int dx_sym = 0, dy_sym = 0;
dreschpe 8:65a4de035c3c 718 int dx_x2 = 0, dy_x2 = 0;
dreschpe 8:65a4de035c3c 719 int di = 0;
dreschpe 8:65a4de035c3c 720
dreschpe 8:65a4de035c3c 721 dx = x1-x0;
dreschpe 8:65a4de035c3c 722 dy = y1-y0;
dreschpe 8:65a4de035c3c 723
dreschpe 8:65a4de035c3c 724 if (dx == 0) { /* vertical line */
dreschpe 8:65a4de035c3c 725 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 726 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 727 return;
dreschpe 8:65a4de035c3c 728 }
dreschpe 8:65a4de035c3c 729
dreschpe 8:65a4de035c3c 730 if (dx > 0) {
dreschpe 8:65a4de035c3c 731 dx_sym = 1;
dreschpe 8:65a4de035c3c 732 } else {
dreschpe 8:65a4de035c3c 733 dx_sym = -1;
dreschpe 8:65a4de035c3c 734 }
dreschpe 8:65a4de035c3c 735 if (dy == 0) { /* horizontal line */
dreschpe 8:65a4de035c3c 736 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 737 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 738 return;
dreschpe 8:65a4de035c3c 739 }
dreschpe 8:65a4de035c3c 740
dreschpe 8:65a4de035c3c 741 if (dy > 0) {
dreschpe 8:65a4de035c3c 742 dy_sym = 1;
dreschpe 8:65a4de035c3c 743 } else {
dreschpe 8:65a4de035c3c 744 dy_sym = -1;
dreschpe 8:65a4de035c3c 745 }
dreschpe 8:65a4de035c3c 746
dreschpe 8:65a4de035c3c 747 dx = dx_sym*dx;
dreschpe 8:65a4de035c3c 748 dy = dy_sym*dy;
dreschpe 8:65a4de035c3c 749
dreschpe 8:65a4de035c3c 750 dx_x2 = dx*2;
dreschpe 8:65a4de035c3c 751 dy_x2 = dy*2;
dreschpe 8:65a4de035c3c 752
dreschpe 8:65a4de035c3c 753 if (dx >= dy) {
dreschpe 8:65a4de035c3c 754 di = dy_x2 - dx;
dreschpe 8:65a4de035c3c 755 while (x0 != x1) {
dreschpe 8:65a4de035c3c 756
dreschpe 8:65a4de035c3c 757 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 758 x0 += dx_sym;
dreschpe 8:65a4de035c3c 759 if (di<0) {
dreschpe 8:65a4de035c3c 760 di += dy_x2;
dreschpe 8:65a4de035c3c 761 } else {
dreschpe 8:65a4de035c3c 762 di += dy_x2 - dx_x2;
dreschpe 8:65a4de035c3c 763 y0 += dy_sym;
dreschpe 8:65a4de035c3c 764 }
dreschpe 8:65a4de035c3c 765 }
dreschpe 8:65a4de035c3c 766 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 767 } else {
dreschpe 8:65a4de035c3c 768 di = dx_x2 - dy;
dreschpe 8:65a4de035c3c 769 while (y0 != y1) {
dreschpe 8:65a4de035c3c 770 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 771 y0 += dy_sym;
dreschpe 8:65a4de035c3c 772 if (di < 0) {
dreschpe 8:65a4de035c3c 773 di += dx_x2;
dreschpe 8:65a4de035c3c 774 } else {
dreschpe 8:65a4de035c3c 775 di += dx_x2 - dy_x2;
dreschpe 8:65a4de035c3c 776 x0 += dx_sym;
dreschpe 8:65a4de035c3c 777 }
dreschpe 8:65a4de035c3c 778 }
dreschpe 8:65a4de035c3c 779 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 780 }
dreschpe 8:65a4de035c3c 781 return;
dreschpe 8:65a4de035c3c 782 }
dreschpe 8:65a4de035c3c 783
dreschpe 13:2c91cb947161 784 // draw rect
dreschpe 8:65a4de035c3c 785 void SPI_TFT::rect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 786 {
dreschpe 8:65a4de035c3c 787
dreschpe 8:65a4de035c3c 788 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 789 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 790
dreschpe 8:65a4de035c3c 791 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 792 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 793
dreschpe 8:65a4de035c3c 794 if (x1 > x0) hline(x0,x1,y1,color);
dreschpe 8:65a4de035c3c 795 else hline(x1,x0,y1,color);
dreschpe 8:65a4de035c3c 796
dreschpe 8:65a4de035c3c 797 if (y1 > y0) vline(x1,y0,y1,color);
dreschpe 8:65a4de035c3c 798 else vline(x1,y1,y0,color);
dreschpe 8:65a4de035c3c 799
dreschpe 8:65a4de035c3c 800 return;
dreschpe 8:65a4de035c3c 801 }
dreschpe 8:65a4de035c3c 802
dreschpe 8:65a4de035c3c 803
dreschpe 13:2c91cb947161 804 // fill rect
dreschpe 8:65a4de035c3c 805 void SPI_TFT::fillrect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 806 {
dreschpe 8:65a4de035c3c 807
dreschpe 8:65a4de035c3c 808 int h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 809 int w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 810 int pixel = h * w;
dreschpe 14:ea3206e8e3bd 811 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 812 int dma_count;
dreschpe 14:ea3206e8e3bd 813 #endif
dreschpe 8:65a4de035c3c 814 window(x0,y0,w,h);
dreschpe 8:65a4de035c3c 815 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 816 _cs = 0;
dreschpe 14:ea3206e8e3bd 817 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 818 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 819 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 820 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 821 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 822 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 823 #endif
dreschpe 14:ea3206e8e3bd 824 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 825 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 826 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 827 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 828 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 829 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 830 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 831 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 832 #endif
dreschpe 14:ea3206e8e3bd 833 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 834 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 835 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 836 }
dreschpe 14:ea3206e8e3bd 837 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 838 do {
dreschpe 14:ea3206e8e3bd 839 if (pixel > 4095) {
dreschpe 14:ea3206e8e3bd 840 dma_count = 4095;
dreschpe 14:ea3206e8e3bd 841 pixel = pixel - 4095;
dreschpe 14:ea3206e8e3bd 842 } else {
dreschpe 14:ea3206e8e3bd 843 dma_count = pixel;
dreschpe 14:ea3206e8e3bd 844 pixel = 0;
dreschpe 14:ea3206e8e3bd 845 }
dreschpe 14:ea3206e8e3bd 846 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 847 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 848 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 849 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 850 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 851 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 14:ea3206e8e3bd 852 do {
dreschpe 14:ea3206e8e3bd 853 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 854
dreschpe 14:ea3206e8e3bd 855 } while (pixel > 0);
dreschpe 13:2c91cb947161 856
dreschpe 14:ea3206e8e3bd 857 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 858 do {
dreschpe 14:ea3206e8e3bd 859 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 860 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 861 do {
dreschpe 14:ea3206e8e3bd 862 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 863 }
dreschpe 14:ea3206e8e3bd 864
dreschpe 14:ea3206e8e3bd 865 #else // no DMA
dreschpe 14:ea3206e8e3bd 866 for (int p=0; p<pixel; p++) {
dreschpe 14:ea3206e8e3bd 867 _spi.write(color);
dreschpe 14:ea3206e8e3bd 868 }
dreschpe 14:ea3206e8e3bd 869 #endif
dreschpe 13:2c91cb947161 870
dreschpe 14:ea3206e8e3bd 871 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 872 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 873 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 874 for (int p=0; p<pixel; p++) {
dreschpe 14:ea3206e8e3bd 875 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 876 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 877 }
dreschpe 13:2c91cb947161 878
dreschpe 14:ea3206e8e3bd 879 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 880 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 881 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 882 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 883 for (int p=0; p<pixel; p++) {
dreschpe 14:ea3206e8e3bd 884 _spi.write(color);
dreschpe 14:ea3206e8e3bd 885 }
dreschpe 14:ea3206e8e3bd 886 #endif
dreschpe 14:ea3206e8e3bd 887 #endif
dreschpe 8:65a4de035c3c 888 _cs = 1;
dreschpe 8:65a4de035c3c 889 WindowMax();
dreschpe 8:65a4de035c3c 890 return;
dreschpe 8:65a4de035c3c 891 }
dreschpe 8:65a4de035c3c 892
dreschpe 13:2c91cb947161 893 // set cursor position
dreschpe 8:65a4de035c3c 894 void SPI_TFT::locate(int x, int y)
dreschpe 8:65a4de035c3c 895 {
dreschpe 8:65a4de035c3c 896 char_x = x;
dreschpe 8:65a4de035c3c 897 char_y = y;
dreschpe 8:65a4de035c3c 898 }
dreschpe 8:65a4de035c3c 899
dreschpe 8:65a4de035c3c 900
dreschpe 13:2c91cb947161 901 // calculate num of chars in a row
dreschpe 8:65a4de035c3c 902 int SPI_TFT::columns()
dreschpe 8:65a4de035c3c 903 {
dreschpe 8:65a4de035c3c 904 return width() / font[1];
dreschpe 8:65a4de035c3c 905 }
dreschpe 8:65a4de035c3c 906
dreschpe 13:2c91cb947161 907 // calculate num of rows on the screen
dreschpe 8:65a4de035c3c 908 int SPI_TFT::rows()
dreschpe 8:65a4de035c3c 909 {
dreschpe 8:65a4de035c3c 910 return height() / font[2];
dreschpe 8:65a4de035c3c 911 }
dreschpe 8:65a4de035c3c 912
dreschpe 13:2c91cb947161 913 // print a char on the screen
dreschpe 8:65a4de035c3c 914 int SPI_TFT::_putc(int value)
dreschpe 8:65a4de035c3c 915 {
dreschpe 8:65a4de035c3c 916 if (value == '\n') { // new line
dreschpe 8:65a4de035c3c 917 char_x = 0;
dreschpe 8:65a4de035c3c 918 char_y = char_y + font[2];
dreschpe 8:65a4de035c3c 919 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 920 char_y = 0;
dreschpe 8:65a4de035c3c 921 }
dreschpe 8:65a4de035c3c 922 } else {
dreschpe 8:65a4de035c3c 923 character(char_x, char_y, value);
dreschpe 8:65a4de035c3c 924 }
dreschpe 8:65a4de035c3c 925 return value;
dreschpe 8:65a4de035c3c 926 }
dreschpe 8:65a4de035c3c 927
dreschpe 13:2c91cb947161 928 // consrtuct the char out of the font
dreschpe 8:65a4de035c3c 929 void SPI_TFT::character(int x, int y, int c)
dreschpe 8:65a4de035c3c 930 {
dreschpe 9:a63fd1ad41b0 931 unsigned int hor,vert,offset,bpl,j,i,b;
dreschpe 8:65a4de035c3c 932 unsigned char* zeichen;
dreschpe 8:65a4de035c3c 933 unsigned char z,w;
dreschpe 14:ea3206e8e3bd 934 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 935 unsigned int pixel;
dreschpe 14:ea3206e8e3bd 936 unsigned int p;
dreschpe 14:ea3206e8e3bd 937 unsigned int dma_count,dma_off;
dreschpe 14:ea3206e8e3bd 938 uint16_t *buffer;
dreschpe 14:ea3206e8e3bd 939 #endif
dreschpe 8:65a4de035c3c 940
dreschpe 8:65a4de035c3c 941 if ((c < 31) || (c > 127)) return; // test char range
dreschpe 8:65a4de035c3c 942
dreschpe 8:65a4de035c3c 943 // read font parameter from start of array
dreschpe 8:65a4de035c3c 944 offset = font[0]; // bytes / char
dreschpe 8:65a4de035c3c 945 hor = font[1]; // get hor size of font
dreschpe 8:65a4de035c3c 946 vert = font[2]; // get vert size of font
dreschpe 8:65a4de035c3c 947 bpl = font[3]; // bytes per line
dreschpe 8:65a4de035c3c 948
dreschpe 8:65a4de035c3c 949 if (char_x + hor > width()) {
dreschpe 8:65a4de035c3c 950 char_x = 0;
dreschpe 8:65a4de035c3c 951 char_y = char_y + vert;
dreschpe 8:65a4de035c3c 952 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 953 char_y = 0;
dreschpe 8:65a4de035c3c 954 }
dreschpe 8:65a4de035c3c 955 }
dreschpe 8:65a4de035c3c 956 window(char_x, char_y,hor,vert); // char box
dreschpe 8:65a4de035c3c 957 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 958
dreschpe 14:ea3206e8e3bd 959 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 960 pixel = hor * vert; // calculate buffer size
dreschpe 8:65a4de035c3c 961
dreschpe 14:ea3206e8e3bd 962 buffer = (uint16_t *) malloc (2*pixel); // we need a buffer for the 16 bit
dreschpe 14:ea3206e8e3bd 963 if (buffer == NULL) {
dreschpe 14:ea3206e8e3bd 964 //led = 1;
dreschpe 14:ea3206e8e3bd 965 //pc.printf("Malloc error !\n\r");
dreschpe 14:ea3206e8e3bd 966 return; // error no memory
dreschpe 8:65a4de035c3c 967 }
dreschpe 8:65a4de035c3c 968
dreschpe 14:ea3206e8e3bd 969 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 14:ea3206e8e3bd 970 w = zeichen[0]; // width of actual char
dreschpe 14:ea3206e8e3bd 971 p = 0;
dreschpe 14:ea3206e8e3bd 972 // construct the char into the buffer
dreschpe 14:ea3206e8e3bd 973 for (j=0; j<vert; j++) { // vert line
dreschpe 14:ea3206e8e3bd 974 for (i=0; i<hor; i++) { // horz line
dreschpe 14:ea3206e8e3bd 975 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 14:ea3206e8e3bd 976 b = 1 << (j & 0x07);
dreschpe 14:ea3206e8e3bd 977 if (( z & b ) == 0x00) {
dreschpe 14:ea3206e8e3bd 978 buffer[p] = _background;
dreschpe 14:ea3206e8e3bd 979 } else {
dreschpe 14:ea3206e8e3bd 980 buffer[p] = _foreground;
dreschpe 14:ea3206e8e3bd 981 }
dreschpe 14:ea3206e8e3bd 982 p++;
dreschpe 8:65a4de035c3c 983 }
dreschpe 8:65a4de035c3c 984 }
dreschpe 14:ea3206e8e3bd 985
dreschpe 14:ea3206e8e3bd 986 // copy the buffer with DMA SPI to display
dreschpe 14:ea3206e8e3bd 987 dma_off = 0; // offset for DMA transfer
dreschpe 14:ea3206e8e3bd 988 _cs = 0;
dreschpe 14:ea3206e8e3bd 989 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 990 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 991 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 992 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 993 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 994 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 995 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 996 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 997 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 998 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 999 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 1000 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 1001 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 1002 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 1003 }
dreschpe 14:ea3206e8e3bd 1004
dreschpe 14:ea3206e8e3bd 1005 // start DMA
dreschpe 14:ea3206e8e3bd 1006 do {
dreschpe 14:ea3206e8e3bd 1007 if (pixel > 4095) { // this is a giant font !
dreschpe 14:ea3206e8e3bd 1008 dma_count = 4095;
dreschpe 14:ea3206e8e3bd 1009 pixel = pixel - 4095;
dreschpe 14:ea3206e8e3bd 1010 } else {
dreschpe 14:ea3206e8e3bd 1011 dma_count = pixel;
dreschpe 14:ea3206e8e3bd 1012 pixel = 0;
dreschpe 14:ea3206e8e3bd 1013 }
dreschpe 14:ea3206e8e3bd 1014 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 1015 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 1016 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer + dma_off);
dreschpe 14:ea3206e8e3bd 1017 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 14:ea3206e8e3bd 1018 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 1019 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 14:ea3206e8e3bd 1020 do {
dreschpe 14:ea3206e8e3bd 1021 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 14:ea3206e8e3bd 1022 dma_off = dma_off + dma_count;
dreschpe 14:ea3206e8e3bd 1023 } while (pixel > 0);
dreschpe 14:ea3206e8e3bd 1024
dreschpe 14:ea3206e8e3bd 1025 free ((uint16_t *) buffer);
dreschpe 14:ea3206e8e3bd 1026
dreschpe 14:ea3206e8e3bd 1027 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 1028 do {
dreschpe 14:ea3206e8e3bd 1029 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 1030 /* disable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 1031 LPC_SSP0->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 1032 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 1033 do {
dreschpe 14:ea3206e8e3bd 1034 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 1035 /* disable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 1036 LPC_SSP1->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 1037 }
dreschpe 14:ea3206e8e3bd 1038
dreschpe 14:ea3206e8e3bd 1039 #else // no dma
dreschpe 14:ea3206e8e3bd 1040 _cs = 0;
dreschpe 14:ea3206e8e3bd 1041 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 1042 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 1043 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 1044 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 1045 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 1046 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 1047 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 1048 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 1049 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 1050 }
dreschpe 14:ea3206e8e3bd 1051 #else // mbed lib
dreschpe 14:ea3206e8e3bd 1052 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 1053 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 1054 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 1055 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 1056 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 1057 _spi.format(16,3); // switch back to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 1058 #endif
dreschpe 14:ea3206e8e3bd 1059 #endif
dreschpe 14:ea3206e8e3bd 1060
dreschpe 14:ea3206e8e3bd 1061 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 14:ea3206e8e3bd 1062 w = zeichen[0]; // width of actual char
dreschpe 14:ea3206e8e3bd 1063 for (j=0; j<vert; j++) { // vert line
dreschpe 14:ea3206e8e3bd 1064 for (i=0; i<hor; i++) { // horz line
dreschpe 14:ea3206e8e3bd 1065 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 14:ea3206e8e3bd 1066 b = 1 << (j & 0x07);
dreschpe 14:ea3206e8e3bd 1067 if (( z & b ) == 0x00) {
dreschpe 14:ea3206e8e3bd 1068 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 1069 _spi.write(_background >> 8);
dreschpe 14:ea3206e8e3bd 1070 _spi.write(_background & 0xff);
dreschpe 14:ea3206e8e3bd 1071 #else
dreschpe 14:ea3206e8e3bd 1072 _spi.write(_background);
dreschpe 14:ea3206e8e3bd 1073 #endif
dreschpe 14:ea3206e8e3bd 1074 } else {
dreschpe 14:ea3206e8e3bd 1075 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 1076 _spi.write(_foreground >> 8);
dreschpe 14:ea3206e8e3bd 1077 _spi.write(_foreground & 0xff);
dreschpe 14:ea3206e8e3bd 1078 #else
dreschpe 14:ea3206e8e3bd 1079 _spi.write(_foreground);
dreschpe 14:ea3206e8e3bd 1080 #endif
dreschpe 14:ea3206e8e3bd 1081 }
dreschpe 14:ea3206e8e3bd 1082 }
dreschpe 14:ea3206e8e3bd 1083 }
dreschpe 14:ea3206e8e3bd 1084 #endif // no DMA
dreschpe 8:65a4de035c3c 1085 _cs = 1;
dreschpe 8:65a4de035c3c 1086 WindowMax();
dreschpe 8:65a4de035c3c 1087 if ((w + 2) < hor) { // x offset to next char
dreschpe 8:65a4de035c3c 1088 char_x += w + 2;
dreschpe 8:65a4de035c3c 1089 } else char_x += hor;
dreschpe 8:65a4de035c3c 1090 }
dreschpe 8:65a4de035c3c 1091
dreschpe 8:65a4de035c3c 1092
dreschpe 8:65a4de035c3c 1093 void SPI_TFT::set_font(unsigned char* f)
dreschpe 8:65a4de035c3c 1094 {
dreschpe 8:65a4de035c3c 1095 font = f;
dreschpe 8:65a4de035c3c 1096 }
dreschpe 8:65a4de035c3c 1097
dreschpe 8:65a4de035c3c 1098
dreschpe 8:65a4de035c3c 1099 void SPI_TFT::Bitmap(unsigned int x, unsigned int y, unsigned int w, unsigned int h,unsigned char *bitmap)
dreschpe 8:65a4de035c3c 1100 {
dreschpe 8:65a4de035c3c 1101 unsigned int j;
dreschpe 8:65a4de035c3c 1102 int padd;
dreschpe 14:ea3206e8e3bd 1103 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 1104 unsigned char *bitmap_ptr = (unsigned char *)bitmap;
dreschpe 14:ea3206e8e3bd 1105 #else
dreschpe 14:ea3206e8e3bd 1106 unsigned short *bitmap_ptr = (unsigned short *)bitmap;
dreschpe 14:ea3206e8e3bd 1107 #endif
dreschpe 8:65a4de035c3c 1108 // the lines are padded to multiple of 4 bytes in a bitmap
dreschpe 8:65a4de035c3c 1109 padd = -1;
dreschpe 8:65a4de035c3c 1110 do {
dreschpe 8:65a4de035c3c 1111 padd ++;
dreschpe 8:65a4de035c3c 1112 } while (2*(w + padd)%4 != 0);
dreschpe 8:65a4de035c3c 1113 window(x, y, w, h);
dreschpe 8:65a4de035c3c 1114 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 1115 _cs = 0;
dreschpe 13:2c91cb947161 1116 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 1117 if (spi_port == 0) { // TFT on SSP0
dreschpe 13:2c91cb947161 1118 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1119 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 1120 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 1121 LPC_SSP0->DMACR = 0x2;
dreschpe 13:2c91cb947161 1122 #endif
dreschpe 8:65a4de035c3c 1123 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1124 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1125 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1126
dreschpe 8:65a4de035c3c 1127 } else {
dreschpe 13:2c91cb947161 1128 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1129 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 1130 /* Enable SSP1 for DMA. */
dreschpe 13:2c91cb947161 1131 LPC_SSP1->DMACR = 0x2;
dreschpe 13:2c91cb947161 1132 #endif
dreschpe 8:65a4de035c3c 1133 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1134 LPC_SSP1->DR = 0x72; // start Data command
dreschpe 8:65a4de035c3c 1135 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1136 }
dreschpe 8:65a4de035c3c 1137
dreschpe 8:65a4de035c3c 1138 bitmap_ptr += ((h - 1)* (w + padd));
dreschpe 13:2c91cb947161 1139 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1140 for (j = 0; j < h; j++) { //Lines
dreschpe 8:65a4de035c3c 1141 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 1142 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 1143 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)bitmap_ptr;
dreschpe 8:65a4de035c3c 1144 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 1145 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 1146 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 1147 do {
dreschpe 8:65a4de035c3c 1148 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 1149
dreschpe 8:65a4de035c3c 1150 bitmap_ptr -= w;
dreschpe 8:65a4de035c3c 1151 bitmap_ptr -= padd;
dreschpe 8:65a4de035c3c 1152 }
dreschpe 8:65a4de035c3c 1153 #else
dreschpe 8:65a4de035c3c 1154 unsigned int i;
dreschpe 8:65a4de035c3c 1155 for (j = 0; j < h; j++) { //Lines
dreschpe 8:65a4de035c3c 1156 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 8:65a4de035c3c 1157 _spi.write(*bitmap_ptr); // one line
dreschpe 8:65a4de035c3c 1158 bitmap_ptr++;
dreschpe 8:65a4de035c3c 1159 }
dreschpe 8:65a4de035c3c 1160 bitmap_ptr -= 2*w;
dreschpe 8:65a4de035c3c 1161 bitmap_ptr -= padd;
dreschpe 13:2c91cb947161 1162 }
dreschpe 13:2c91cb947161 1163 #endif
dreschpe 8:65a4de035c3c 1164 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1165 do {
dreschpe 8:65a4de035c3c 1166 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1167 } else {
dreschpe 8:65a4de035c3c 1168 do {
dreschpe 8:65a4de035c3c 1169 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1170 }
dreschpe 9:a63fd1ad41b0 1171 #else // use mbed lib
dreschpe 13:2c91cb947161 1172 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 13:2c91cb947161 1173 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 13:2c91cb947161 1174 #else
dreschpe 9:a63fd1ad41b0 1175 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 1176 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 1177 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 13:2c91cb947161 1178 #endif
dreschpe 9:a63fd1ad41b0 1179 unsigned int i;
dreschpe 9:a63fd1ad41b0 1180 for (j = 0; j < h; j++) { //Lines
dreschpe 9:a63fd1ad41b0 1181 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 13:2c91cb947161 1182 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 13:2c91cb947161 1183 _spi.write(*bitmap_ptr);
dreschpe 13:2c91cb947161 1184 bitmap_ptr++;
dreschpe 13:2c91cb947161 1185 _spi.write(*bitmap_ptr);
dreschpe 13:2c91cb947161 1186 bitmap_ptr++;
dreschpe 13:2c91cb947161 1187 #else
dreschpe 9:a63fd1ad41b0 1188 _spi.write(*bitmap_ptr); // one line
dreschpe 9:a63fd1ad41b0 1189 bitmap_ptr++;
dreschpe 13:2c91cb947161 1190 #endif
dreschpe 9:a63fd1ad41b0 1191 }
dreschpe 9:a63fd1ad41b0 1192 bitmap_ptr -= 2*w;
dreschpe 9:a63fd1ad41b0 1193 bitmap_ptr -= padd;
dreschpe 9:a63fd1ad41b0 1194 }
dreschpe 13:2c91cb947161 1195 #endif
dreschpe 8:65a4de035c3c 1196 _cs = 1;
dreschpe 8:65a4de035c3c 1197 WindowMax();
dreschpe 8:65a4de035c3c 1198 }
dreschpe 8:65a4de035c3c 1199
dreschpe 8:65a4de035c3c 1200
dreschpe 13:2c91cb947161 1201 // local filesystem is not implemented in kinetis board
dreschpe 13:2c91cb947161 1202 #if defined TARGET_LPC1768 || defined TARGET_LPC11U24
dreschpe 13:2c91cb947161 1203
dreschpe 13:2c91cb947161 1204
dreschpe 8:65a4de035c3c 1205 int SPI_TFT::BMP_16(unsigned int x, unsigned int y, const char *Name_BMP)
dreschpe 8:65a4de035c3c 1206 {
dreschpe 8:65a4de035c3c 1207
dreschpe 8:65a4de035c3c 1208 #define OffsetPixelWidth 18
dreschpe 8:65a4de035c3c 1209 #define OffsetPixelHeigh 22
dreschpe 8:65a4de035c3c 1210 #define OffsetFileSize 34
dreschpe 8:65a4de035c3c 1211 #define OffsetPixData 10
dreschpe 8:65a4de035c3c 1212 #define OffsetBPP 28
dreschpe 8:65a4de035c3c 1213
dreschpe 8:65a4de035c3c 1214 char filename[50];
dreschpe 8:65a4de035c3c 1215 unsigned char BMP_Header[54];
dreschpe 8:65a4de035c3c 1216 unsigned short BPP_t;
dreschpe 8:65a4de035c3c 1217 unsigned int PixelWidth,PixelHeigh,start_data;
dreschpe 8:65a4de035c3c 1218 unsigned int i,off;
dreschpe 8:65a4de035c3c 1219 int padd,j;
dreschpe 8:65a4de035c3c 1220 unsigned short *line;
dreschpe 8:65a4de035c3c 1221
dreschpe 8:65a4de035c3c 1222 // get the filename
dreschpe 8:65a4de035c3c 1223 LocalFileSystem local("local");
dreschpe 8:65a4de035c3c 1224 sprintf(&filename[0],"/local/");
dreschpe 8:65a4de035c3c 1225 i=7;
dreschpe 8:65a4de035c3c 1226 while (*Name_BMP!='\0') {
dreschpe 8:65a4de035c3c 1227 filename[i++]=*Name_BMP++;
dreschpe 8:65a4de035c3c 1228 }
dreschpe 8:65a4de035c3c 1229
dreschpe 8:65a4de035c3c 1230 fprintf(stderr, "filename : %s \n\r",filename);
dreschpe 8:65a4de035c3c 1231
dreschpe 8:65a4de035c3c 1232 FILE *Image = fopen((const char *)&filename[0], "rb"); // open the bmp file
dreschpe 8:65a4de035c3c 1233 if (!Image) {
dreschpe 8:65a4de035c3c 1234 return(0); // error file not found !
dreschpe 8:65a4de035c3c 1235 }
dreschpe 8:65a4de035c3c 1236
dreschpe 8:65a4de035c3c 1237 fread(&BMP_Header[0],1,54,Image); // get the BMP Header
dreschpe 8:65a4de035c3c 1238
dreschpe 8:65a4de035c3c 1239 if (BMP_Header[0] != 0x42 || BMP_Header[1] != 0x4D) { // check magic byte
dreschpe 8:65a4de035c3c 1240 fclose(Image);
dreschpe 8:65a4de035c3c 1241 return(-1); // error no BMP file
dreschpe 8:65a4de035c3c 1242 }
dreschpe 8:65a4de035c3c 1243
dreschpe 8:65a4de035c3c 1244 BPP_t = BMP_Header[OffsetBPP] + (BMP_Header[OffsetBPP + 1] << 8);
dreschpe 8:65a4de035c3c 1245 if (BPP_t != 0x0010) {
dreschpe 8:65a4de035c3c 1246 fclose(Image);
dreschpe 8:65a4de035c3c 1247 return(-2); // error no 16 bit BMP
dreschpe 8:65a4de035c3c 1248 }
dreschpe 8:65a4de035c3c 1249
dreschpe 8:65a4de035c3c 1250 PixelHeigh = BMP_Header[OffsetPixelHeigh] + (BMP_Header[OffsetPixelHeigh + 1] << 8) + (BMP_Header[OffsetPixelHeigh + 2] << 16) + (BMP_Header[OffsetPixelHeigh + 3] << 24);
dreschpe 8:65a4de035c3c 1251 PixelWidth = BMP_Header[OffsetPixelWidth] + (BMP_Header[OffsetPixelWidth + 1] << 8) + (BMP_Header[OffsetPixelWidth + 2] << 16) + (BMP_Header[OffsetPixelWidth + 3] << 24);
dreschpe 8:65a4de035c3c 1252 if (PixelHeigh > height() + y || PixelWidth > width() + x) {
dreschpe 8:65a4de035c3c 1253 fclose(Image);
dreschpe 8:65a4de035c3c 1254 return(-3); // to big
dreschpe 8:65a4de035c3c 1255 }
dreschpe 8:65a4de035c3c 1256
dreschpe 8:65a4de035c3c 1257 start_data = BMP_Header[OffsetPixData] + (BMP_Header[OffsetPixData + 1] << 8) + (BMP_Header[OffsetPixData + 2] << 16) + (BMP_Header[OffsetPixData + 3] << 24);
dreschpe 8:65a4de035c3c 1258
dreschpe 8:65a4de035c3c 1259 line = (unsigned short *) malloc (2 * PixelWidth); // we need a buffer for a line
dreschpe 8:65a4de035c3c 1260 if (line == NULL) {
dreschpe 8:65a4de035c3c 1261 return(-4); // error no memory
dreschpe 8:65a4de035c3c 1262 }
dreschpe 8:65a4de035c3c 1263
dreschpe 8:65a4de035c3c 1264 // the bmp lines are padded to multiple of 4 bytes
dreschpe 8:65a4de035c3c 1265 padd = -1;
dreschpe 8:65a4de035c3c 1266 do {
dreschpe 8:65a4de035c3c 1267 padd ++;
dreschpe 8:65a4de035c3c 1268 } while ((PixelWidth * 2 + padd)%4 != 0);
dreschpe 8:65a4de035c3c 1269
dreschpe 8:65a4de035c3c 1270
dreschpe 8:65a4de035c3c 1271 //fseek(Image, 70 ,SEEK_SET);
dreschpe 8:65a4de035c3c 1272 window(x, y,PixelWidth ,PixelHeigh);
dreschpe 8:65a4de035c3c 1273 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 1274 _cs = 0;
dreschpe 13:2c91cb947161 1275 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 1276 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1277 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1278 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 1279 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 1280 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1281 #endif
dreschpe 8:65a4de035c3c 1282 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1283 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1284 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1285
dreschpe 8:65a4de035c3c 1286 } else {
dreschpe 13:2c91cb947161 1287 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1288 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 1289 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 1290 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1291 #endif
dreschpe 8:65a4de035c3c 1292 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1293 LPC_SSP1->DR = 0x72; // start Data
dreschpe 13:2c91cb947161 1294 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1295 }
dreschpe 8:65a4de035c3c 1296 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 8:65a4de035c3c 1297 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 8:65a4de035c3c 1298 fseek(Image, off ,SEEK_SET);
dreschpe 8:65a4de035c3c 1299 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 8:65a4de035c3c 1300 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1301 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 1302 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 1303 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)line;
dreschpe 8:65a4de035c3c 1304 LPC_GPDMACH0->DMACCControl = PixelWidth | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 1305 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 1306 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 1307 do {
dreschpe 8:65a4de035c3c 1308 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 1309 #else
dreschpe 13:2c91cb947161 1310 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 8:65a4de035c3c 1311 _spi.write(line[i]); // one 16 bit pixel
dreschpe 13:2c91cb947161 1312 }
dreschpe 13:2c91cb947161 1313 #endif
dreschpe 8:65a4de035c3c 1314 }
dreschpe 8:65a4de035c3c 1315 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1316 do {
dreschpe 8:65a4de035c3c 1317 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1318 } else {
dreschpe 8:65a4de035c3c 1319 do {
dreschpe 8:65a4de035c3c 1320 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1321 }
dreschpe 13:2c91cb947161 1322
dreschpe 9:a63fd1ad41b0 1323 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 1324 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 1325 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 1326 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 1327 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 9:a63fd1ad41b0 1328 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 9:a63fd1ad41b0 1329 fseek(Image, off ,SEEK_SET);
dreschpe 9:a63fd1ad41b0 1330 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 9:a63fd1ad41b0 1331 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 9:a63fd1ad41b0 1332 _spi.write(line[i]); // one 16 bit pixel
dreschpe 13:2c91cb947161 1333 }
dreschpe 13:2c91cb947161 1334 }
dreschpe 13:2c91cb947161 1335 #endif
dreschpe 8:65a4de035c3c 1336 _cs = 1;
dreschpe 8:65a4de035c3c 1337 free (line);
dreschpe 8:65a4de035c3c 1338 fclose(Image);
dreschpe 8:65a4de035c3c 1339 WindowMax();
dreschpe 8:65a4de035c3c 1340 return(1);
dreschpe 13:2c91cb947161 1341 }
dreschpe 13:2c91cb947161 1342
dreschpe 13:2c91cb947161 1343 #endif