Peter Drescher / SPI_TFT

Library to control a QVGA TFT connected to SPI. You can use printf to print text The lib can handle different fonts, draw lines, circles, rect and bmp

Dependents:   TFT_Test1 SourceCodePro31-SB Mandelbrot Mindwave-screen ... more

See http://mbed.org/cookbook/SPI-driven-QVGA-TFT for details.

SPI_TFT.cpp@11:9bb71766cafc, 2013-02-19 (annotated)

Committer:
dreschpe
Date:
Tue Feb 19 21:49:55 2013 +0000
Revision:
11:9bb71766cafc
Parent:
10:071ae6e02fcf
Child:
12:9de056a58793
Child:
13:2c91cb947161
fix warnings

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 8:65a4de035c3c 1 /* mbed library for 240*320 pixel display TFT based on HX8347D LCD Controller
dreschpe 8:65a4de035c3c 2 * Copyright (c) 2011 Peter Drescher - DC2PD
dreschpe 8:65a4de035c3c 3 *
dreschpe 8:65a4de035c3c 4 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
dreschpe 8:65a4de035c3c 5 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
dreschpe 8:65a4de035c3c 6 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
dreschpe 8:65a4de035c3c 7 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
dreschpe 8:65a4de035c3c 8 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
dreschpe 8:65a4de035c3c 9 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
dreschpe 8:65a4de035c3c 10 * THE SOFTWARE.
dreschpe 8:65a4de035c3c 11 */
dreschpe 8:65a4de035c3c 12
dreschpe 8:65a4de035c3c 13
dreschpe 8:65a4de035c3c 14 // fix bmp padding for Bitmap function
dreschpe 8:65a4de035c3c 15 // speed up pixel
dreschpe 8:65a4de035c3c 16 // 30.12.11 fix cls
dreschpe 8:65a4de035c3c 17 // 11.03.12 use DMA to speed up
dreschpe 8:65a4de035c3c 18 // 15.03.12 use SSEL for TFT CS to enable DMA Register writes
dreschpe 8:65a4de035c3c 19 // 06.04.12 fix SSEL CS problem
dreschpe 8:65a4de035c3c 20 // 06.04.12 use direct access to the spi register to speed up the library.
dreschpe 8:65a4de035c3c 21 // 11.09.12 switch back to using io pin as cs to avoid problems with SSEL CS.
dreschpe 8:65a4de035c3c 22 // 21.09.12 fix Bug in BMP_16
dreschpe 8:65a4de035c3c 23 // 11.10.12 patch from Hans Bergles to get SPI1 working again
dreschpe 8:65a4de035c3c 24 // 03.02.13 add a switch to switch off DMA use for LPC11U24
dreschpe 8:65a4de035c3c 25
dreschpe 8:65a4de035c3c 26 #include "SPI_TFT.h"
dreschpe 8:65a4de035c3c 27 #include "mbed.h"
dreschpe 8:65a4de035c3c 28
dreschpe 8:65a4de035c3c 29 #define BPP 16 // Bits per pixel
dreschpe 8:65a4de035c3c 30
dreschpe 8:65a4de035c3c 31 #if defined TARGET_LPC1768
dreschpe 9:a63fd1ad41b0 32 #define USE_DMA // we use dma to speed up
dreschpe 9:a63fd1ad41b0 33 #define NO_MBED_LIB // we write direct to the SPI register to speed up
dreschpe 8:65a4de035c3c 34 #endif
dreschpe 8:65a4de035c3c 35
dreschpe 8:65a4de035c3c 36 #if defined NO_DMA
dreschpe 8:65a4de035c3c 37 #undef USE_DMA
dreschpe 8:65a4de035c3c 38 #endif
dreschpe 9:a63fd1ad41b0 39
dreschpe 8:65a4de035c3c 40
dreschpe 8:65a4de035c3c 41 //extern Serial pc;
dreschpe 8:65a4de035c3c 42 //extern DigitalOut xx; // debug !!
dreschpe 8:65a4de035c3c 43
dreschpe 8:65a4de035c3c 44 SPI_TFT::SPI_TFT(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset, const char *name)
dreschpe 8:65a4de035c3c 45 : _spi(mosi, miso, sclk), _cs(cs), _reset(reset),GraphicsDisplay(name)
dreschpe 8:65a4de035c3c 46 {
dreschpe 8:65a4de035c3c 47 orientation = 0;
dreschpe 8:65a4de035c3c 48 char_x = 0;
dreschpe 8:65a4de035c3c 49 if (mosi == p11 || mosi == P0_18) spi_port = 0; // we must know the used SPI port to setup the DMA
dreschpe 8:65a4de035c3c 50 else spi_port = 1;
dreschpe 8:65a4de035c3c 51 tft_reset();
dreschpe 8:65a4de035c3c 52 }
dreschpe 8:65a4de035c3c 53
dreschpe 8:65a4de035c3c 54 int SPI_TFT::width()
dreschpe 8:65a4de035c3c 55 {
dreschpe 8:65a4de035c3c 56 if (orientation == 0 || orientation == 2) return 240;
dreschpe 8:65a4de035c3c 57 else return 320;
dreschpe 8:65a4de035c3c 58 }
dreschpe 8:65a4de035c3c 59
dreschpe 8:65a4de035c3c 60
dreschpe 8:65a4de035c3c 61 int SPI_TFT::height()
dreschpe 8:65a4de035c3c 62 {
dreschpe 8:65a4de035c3c 63 if (orientation == 0 || orientation == 2) return 320;
dreschpe 8:65a4de035c3c 64 else return 240;
dreschpe 8:65a4de035c3c 65 }
dreschpe 8:65a4de035c3c 66
dreschpe 8:65a4de035c3c 67
dreschpe 8:65a4de035c3c 68 void SPI_TFT::set_orientation(unsigned int o)
dreschpe 8:65a4de035c3c 69 {
dreschpe 8:65a4de035c3c 70 orientation = o;
dreschpe 8:65a4de035c3c 71 switch (orientation) {
dreschpe 8:65a4de035c3c 72 case 0:
dreschpe 8:65a4de035c3c 73 wr_reg(0x16, 0x08);
dreschpe 8:65a4de035c3c 74 break;
dreschpe 8:65a4de035c3c 75 case 1:
dreschpe 8:65a4de035c3c 76 wr_reg(0x16, 0x68);
dreschpe 8:65a4de035c3c 77 break;
dreschpe 8:65a4de035c3c 78 case 2:
dreschpe 8:65a4de035c3c 79 wr_reg(0x16, 0xC8);
dreschpe 8:65a4de035c3c 80 break;
dreschpe 8:65a4de035c3c 81 case 3:
dreschpe 8:65a4de035c3c 82 wr_reg(0x16, 0xA8);
dreschpe 8:65a4de035c3c 83 break;
dreschpe 8:65a4de035c3c 84 }
dreschpe 8:65a4de035c3c 85 WindowMax();
dreschpe 8:65a4de035c3c 86 }
dreschpe 8:65a4de035c3c 87
dreschpe 8:65a4de035c3c 88
dreschpe 8:65a4de035c3c 89 // write command to tft register
dreschpe 8:65a4de035c3c 90
dreschpe 8:65a4de035c3c 91 void SPI_TFT::wr_cmd(unsigned char cmd)
dreschpe 8:65a4de035c3c 92 {
dreschpe 8:65a4de035c3c 93 unsigned short spi_d;
dreschpe 8:65a4de035c3c 94 spi_d = 0x7000 | cmd ;
dreschpe 8:65a4de035c3c 95 _cs = 0;
dreschpe 9:a63fd1ad41b0 96 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 97 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 98 LPC_SSP0->DR = spi_d;
dreschpe 8:65a4de035c3c 99 // we have to wait for SPI IDLE to set CS back to high
dreschpe 8:65a4de035c3c 100 do {
dreschpe 8:65a4de035c3c 101 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 8:65a4de035c3c 102 } else {
dreschpe 8:65a4de035c3c 103 LPC_SSP1->DR = spi_d;
dreschpe 8:65a4de035c3c 104 do {
dreschpe 8:65a4de035c3c 105 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 8:65a4de035c3c 106 }
dreschpe 9:a63fd1ad41b0 107 #else
dreschpe 9:a63fd1ad41b0 108 _spi.write(spi_d); // mbed lib
dreschpe 9:a63fd1ad41b0 109 #endif
dreschpe 8:65a4de035c3c 110 _cs = 1;
dreschpe 8:65a4de035c3c 111 }
dreschpe 8:65a4de035c3c 112
dreschpe 8:65a4de035c3c 113
dreschpe 8:65a4de035c3c 114
dreschpe 8:65a4de035c3c 115 void SPI_TFT::wr_dat(unsigned char dat)
dreschpe 8:65a4de035c3c 116 {
dreschpe 8:65a4de035c3c 117 unsigned short spi_d;
dreschpe 8:65a4de035c3c 118 spi_d = 0x7200 | dat;
dreschpe 8:65a4de035c3c 119 _cs = 0;
dreschpe 9:a63fd1ad41b0 120 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 121 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 122 LPC_SSP0->DR = spi_d;
dreschpe 8:65a4de035c3c 123 // we have to wait for SPI IDLE to set CS back to high
dreschpe 8:65a4de035c3c 124 do {
dreschpe 8:65a4de035c3c 125 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 8:65a4de035c3c 126 } else {
dreschpe 8:65a4de035c3c 127 LPC_SSP1->DR = spi_d;
dreschpe 8:65a4de035c3c 128 do {
dreschpe 8:65a4de035c3c 129 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 8:65a4de035c3c 130 }
dreschpe 9:a63fd1ad41b0 131 #else
dreschpe 9:a63fd1ad41b0 132 _spi.write(spi_d); // mbed lib
dreschpe 9:a63fd1ad41b0 133 #endif
dreschpe 8:65a4de035c3c 134 _cs = 1;
dreschpe 8:65a4de035c3c 135 }
dreschpe 8:65a4de035c3c 136
dreschpe 8:65a4de035c3c 137
dreschpe 8:65a4de035c3c 138
dreschpe 8:65a4de035c3c 139 // the HX8347-D controller do not use the MISO (SDO) Signal.
dreschpe 8:65a4de035c3c 140 // This is a bug - ?
dreschpe 8:65a4de035c3c 141 // A read will return 0 at the moment
dreschpe 8:65a4de035c3c 142
dreschpe 8:65a4de035c3c 143 unsigned short SPI_TFT::rd_dat (void)
dreschpe 8:65a4de035c3c 144 {
dreschpe 8:65a4de035c3c 145 unsigned short val = 0;
dreschpe 8:65a4de035c3c 146
dreschpe 8:65a4de035c3c 147 //val = _spi.write(0x73ff); /* Dummy read 1 */
dreschpe 8:65a4de035c3c 148 //val = _spi.write(0x0000); /* Read D8..D15 */
dreschpe 8:65a4de035c3c 149 return (val);
dreschpe 8:65a4de035c3c 150 }
dreschpe 8:65a4de035c3c 151
dreschpe 8:65a4de035c3c 152 void SPI_TFT::wr_reg (unsigned char reg, unsigned char val)
dreschpe 8:65a4de035c3c 153 {
dreschpe 8:65a4de035c3c 154 wr_cmd(reg);
dreschpe 8:65a4de035c3c 155 wr_dat(val);
dreschpe 8:65a4de035c3c 156 }
dreschpe 8:65a4de035c3c 157
dreschpe 8:65a4de035c3c 158 unsigned short SPI_TFT::rd_reg (unsigned char reg)
dreschpe 8:65a4de035c3c 159 {
dreschpe 8:65a4de035c3c 160 wr_cmd(reg);
dreschpe 8:65a4de035c3c 161 return(rd_dat());
dreschpe 8:65a4de035c3c 162 }
dreschpe 8:65a4de035c3c 163
dreschpe 8:65a4de035c3c 164 void SPI_TFT::tft_reset()
dreschpe 8:65a4de035c3c 165 {
dreschpe 8:65a4de035c3c 166 //static unsigned short driverCode;
dreschpe 8:65a4de035c3c 167 _spi.format(16,3); // 16 bit spi mode 3
dreschpe 8:65a4de035c3c 168 _spi.frequency(48000000); // 48 Mhz SPI clock
dreschpe 8:65a4de035c3c 169 _cs = 1; // cs high
dreschpe 8:65a4de035c3c 170 _reset = 0; // display reset
dreschpe 8:65a4de035c3c 171
dreschpe 8:65a4de035c3c 172 wait_us(50);
dreschpe 8:65a4de035c3c 173 _reset = 1; // end reset
dreschpe 8:65a4de035c3c 174 wait_ms(5);
dreschpe 8:65a4de035c3c 175
dreschpe 8:65a4de035c3c 176 /* Start Initial Sequence ----------------------------------------------------*/
dreschpe 8:65a4de035c3c 177 wr_reg(0xEA, 0x00); /* Reset Power Control 1 */
dreschpe 8:65a4de035c3c 178 wr_reg(0xEB, 0x20); /* Power Control 2 */
dreschpe 8:65a4de035c3c 179 wr_reg(0xEC, 0x0C); /* Power Control 3 */
dreschpe 8:65a4de035c3c 180 wr_reg(0xED, 0xC4); /* Power Control 4 */
dreschpe 8:65a4de035c3c 181 wr_reg(0xE8, 0x40); /* Source OPON_N */
dreschpe 8:65a4de035c3c 182 wr_reg(0xE9, 0x38); /* Source OPON_I */
dreschpe 8:65a4de035c3c 183 wr_reg(0xF1, 0x01); /* */
dreschpe 8:65a4de035c3c 184 wr_reg(0xF2, 0x10); /* */
dreschpe 8:65a4de035c3c 185 wr_reg(0x27, 0xA3); /* Display Control 2 */
dreschpe 8:65a4de035c3c 186
dreschpe 8:65a4de035c3c 187 /* Power On sequence ---------------------------------------------------------*/
dreschpe 8:65a4de035c3c 188 wr_reg(0x1B, 0x1B); /* Power Control 2 */
dreschpe 8:65a4de035c3c 189 wr_reg(0x1A, 0x01); /* Power Control 1 */
dreschpe 8:65a4de035c3c 190 wr_reg(0x24, 0x2F); /* Vcom Control 2 */
dreschpe 8:65a4de035c3c 191 wr_reg(0x25, 0x57); /* Vcom Control 3 */
dreschpe 8:65a4de035c3c 192 wr_reg(0x23, 0x8D); /* Vcom Control 1 */
dreschpe 8:65a4de035c3c 193
dreschpe 8:65a4de035c3c 194 /* Gamma settings -----------------------------------------------------------*/
dreschpe 8:65a4de035c3c 195 wr_reg(0x40,0x00); //
dreschpe 8:65a4de035c3c 196 wr_reg(0x41,0x00); //
dreschpe 8:65a4de035c3c 197 wr_reg(0x42,0x01); //
dreschpe 8:65a4de035c3c 198 wr_reg(0x43,0x13); //
dreschpe 8:65a4de035c3c 199 wr_reg(0x44,0x10); //
dreschpe 8:65a4de035c3c 200 wr_reg(0x45,0x26); //
dreschpe 8:65a4de035c3c 201 wr_reg(0x46,0x08); //
dreschpe 8:65a4de035c3c 202 wr_reg(0x47,0x51); //
dreschpe 8:65a4de035c3c 203 wr_reg(0x48,0x02); //
dreschpe 8:65a4de035c3c 204 wr_reg(0x49,0x12); //
dreschpe 8:65a4de035c3c 205 wr_reg(0x4A,0x18); //
dreschpe 8:65a4de035c3c 206 wr_reg(0x4B,0x19); //
dreschpe 8:65a4de035c3c 207 wr_reg(0x4C,0x14); //
dreschpe 8:65a4de035c3c 208 wr_reg(0x50,0x19); //
dreschpe 8:65a4de035c3c 209 wr_reg(0x51,0x2F); //
dreschpe 8:65a4de035c3c 210 wr_reg(0x52,0x2C); //
dreschpe 8:65a4de035c3c 211 wr_reg(0x53,0x3E); //
dreschpe 8:65a4de035c3c 212 wr_reg(0x54,0x3F); //
dreschpe 8:65a4de035c3c 213 wr_reg(0x55,0x3F); //
dreschpe 8:65a4de035c3c 214 wr_reg(0x56,0x2E); //
dreschpe 8:65a4de035c3c 215 wr_reg(0x57,0x77); //
dreschpe 8:65a4de035c3c 216 wr_reg(0x58,0x0B); //
dreschpe 8:65a4de035c3c 217 wr_reg(0x59,0x06); //
dreschpe 8:65a4de035c3c 218 wr_reg(0x5A,0x07); //
dreschpe 8:65a4de035c3c 219 wr_reg(0x5B,0x0D); //
dreschpe 8:65a4de035c3c 220 wr_reg(0x5C,0x1D); //
dreschpe 8:65a4de035c3c 221 wr_reg(0x5D,0xCC); //
dreschpe 8:65a4de035c3c 222
dreschpe 8:65a4de035c3c 223 /* Power + Osc ---------------------------------------------------------------*/
dreschpe 8:65a4de035c3c 224 wr_reg(0x18, 0x0036); /* OSC Control 1 */
dreschpe 8:65a4de035c3c 225 wr_reg(0x19, 0x0001); /* OSC Control 2 */
dreschpe 8:65a4de035c3c 226 wr_reg(0x01, 0x0000); /* Display Mode Control */
dreschpe 8:65a4de035c3c 227 wr_reg(0x1F, 0x0088); /* Power Control 6 */
dreschpe 8:65a4de035c3c 228 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 229 wr_reg(0x1F, 0x0080); /* Power Control 6 */
dreschpe 8:65a4de035c3c 230 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 231 wr_reg(0x1F, 0x0090); /* Power Control 6 */
dreschpe 8:65a4de035c3c 232 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 233 wr_reg(0x1F, 0x00D0); /* Power Control 6 */
dreschpe 8:65a4de035c3c 234 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 235
dreschpe 8:65a4de035c3c 236 wr_reg(0x17, 0x0005); /* Colmod 16Bit/Pixel */
dreschpe 8:65a4de035c3c 237
dreschpe 8:65a4de035c3c 238 wr_reg(0x36, 0x0000); /* Panel Characteristic */
dreschpe 8:65a4de035c3c 239 wr_reg(0x28, 0x0038); /* Display Control 3 */
dreschpe 8:65a4de035c3c 240 wait_ms(40);
dreschpe 8:65a4de035c3c 241 wr_reg(0x28, 0x003C); /* Display Control 3 */
dreschpe 8:65a4de035c3c 242 switch (orientation) {
dreschpe 8:65a4de035c3c 243 case 0:
dreschpe 8:65a4de035c3c 244 wr_reg(0x16, 0x0008);
dreschpe 8:65a4de035c3c 245 break;
dreschpe 8:65a4de035c3c 246 case 1:
dreschpe 8:65a4de035c3c 247 wr_reg(0x16, 0x0068);
dreschpe 8:65a4de035c3c 248 break;
dreschpe 8:65a4de035c3c 249 case 2:
dreschpe 8:65a4de035c3c 250 wr_reg(0x16, 0x00C8);
dreschpe 8:65a4de035c3c 251 break;
dreschpe 8:65a4de035c3c 252 case 3:
dreschpe 8:65a4de035c3c 253 wr_reg(0x16, 0x00A8);
dreschpe 8:65a4de035c3c 254 break;
dreschpe 8:65a4de035c3c 255 }
dreschpe 9:a63fd1ad41b0 256 #if defined USE_DMA
dreschpe 8:65a4de035c3c 257 // setup DMA channel 0
dreschpe 8:65a4de035c3c 258 // Power up the GPDMA.
dreschpe 8:65a4de035c3c 259 LPC_SC->PCONP |= (1UL << 29);
dreschpe 8:65a4de035c3c 260 LPC_GPDMA->DMACConfig = 1; // enable DMA controller
dreschpe 8:65a4de035c3c 261 // Reset the Interrupt status
dreschpe 8:65a4de035c3c 262 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 263 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 264 LPC_GPDMACH0->DMACCLLI = 0;
dreschpe 8:65a4de035c3c 265 #endif
dreschpe 8:65a4de035c3c 266 WindowMax ();
dreschpe 8:65a4de035c3c 267 }
dreschpe 8:65a4de035c3c 268
dreschpe 8:65a4de035c3c 269
dreschpe 8:65a4de035c3c 270 void SPI_TFT::pixel(int x, int y, int color)
dreschpe 8:65a4de035c3c 271 {
dreschpe 8:65a4de035c3c 272 wr_reg(0x03, (x >> 0));
dreschpe 8:65a4de035c3c 273 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 274 wr_reg(0x07, (y >> 0));
dreschpe 8:65a4de035c3c 275 wr_reg(0x06, (y >> 8));
dreschpe 8:65a4de035c3c 276 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 277 _cs = 0;
dreschpe 9:a63fd1ad41b0 278 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 279 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 280 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 281 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 282 LPC_SSP0->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 9:a63fd1ad41b0 283 LPC_SSP0->DR = color; // Pixel
dreschpe 8:65a4de035c3c 284 // we have to wait for SPI IDLE to set CS back to high
dreschpe 8:65a4de035c3c 285 do {
dreschpe 8:65a4de035c3c 286 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 8:65a4de035c3c 287 } else {
dreschpe 8:65a4de035c3c 288 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 289 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 290 LPC_SSP1->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 9:a63fd1ad41b0 291 LPC_SSP1->DR = color;
dreschpe 8:65a4de035c3c 292 // we have to wait for SPI IDLE to set CS back to high
dreschpe 8:65a4de035c3c 293 do {
dreschpe 8:65a4de035c3c 294 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 8:65a4de035c3c 295 }
dreschpe 9:a63fd1ad41b0 296 #else
dreschpe 9:a63fd1ad41b0 297 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 298 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 299 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 300 _spi.write(color); // Write D0..D15
dreschpe 9:a63fd1ad41b0 301 #endif
dreschpe 8:65a4de035c3c 302 _cs = 1;
dreschpe 8:65a4de035c3c 303 }
dreschpe 8:65a4de035c3c 304
dreschpe 8:65a4de035c3c 305
dreschpe 8:65a4de035c3c 306 void SPI_TFT::window (unsigned int x, unsigned int y, unsigned int w, unsigned int h)
dreschpe 8:65a4de035c3c 307 {
dreschpe 8:65a4de035c3c 308 wr_reg(0x03, x );
dreschpe 8:65a4de035c3c 309 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 310 wr_reg(0x05, x+w-1 );
dreschpe 8:65a4de035c3c 311 wr_reg(0x04, (x+w-1 >> 8));
dreschpe 8:65a4de035c3c 312 wr_reg(0x07, y );
dreschpe 8:65a4de035c3c 313 wr_reg(0x06, ( y >> 8));
dreschpe 8:65a4de035c3c 314 wr_reg(0x09, ( y+h-1 ));
dreschpe 8:65a4de035c3c 315 wr_reg(0x08, ( y+h-1 >> 8));
dreschpe 8:65a4de035c3c 316 }
dreschpe 8:65a4de035c3c 317
dreschpe 8:65a4de035c3c 318
dreschpe 8:65a4de035c3c 319 void SPI_TFT::WindowMax (void)
dreschpe 8:65a4de035c3c 320 {
dreschpe 8:65a4de035c3c 321 window (0, 0, width(), height());
dreschpe 8:65a4de035c3c 322 }
dreschpe 8:65a4de035c3c 323
dreschpe 8:65a4de035c3c 324
dreschpe 8:65a4de035c3c 325
dreschpe 8:65a4de035c3c 326 void SPI_TFT::cls (void)
dreschpe 8:65a4de035c3c 327 {
dreschpe 8:65a4de035c3c 328 int pixel = ( width() * height());
dreschpe 8:65a4de035c3c 329 #if defined USE_DMA
dreschpe 8:65a4de035c3c 330 int dma_count;
dreschpe 8:65a4de035c3c 331 int color = _background;
dreschpe 8:65a4de035c3c 332 #endif
dreschpe 8:65a4de035c3c 333 WindowMax();
dreschpe 8:65a4de035c3c 334 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 335
dreschpe 9:a63fd1ad41b0 336 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 337 #if defined USE_DMA
dreschpe 8:65a4de035c3c 338 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 8:65a4de035c3c 339 #endif
dreschpe 8:65a4de035c3c 340 _cs = 0;
dreschpe 8:65a4de035c3c 341 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 342 #if defined USE_DMA
dreschpe 8:65a4de035c3c 343 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 344 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 345 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 346 #endif
dreschpe 8:65a4de035c3c 347 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 348 LPC_SSP0->DR = 0x72; // start byte
dreschpe 8:65a4de035c3c 349 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 350 } else {
dreschpe 8:65a4de035c3c 351 #if defined USE_DMA
dreschpe 8:65a4de035c3c 352 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 353 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 354 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 355 #endif
dreschpe 8:65a4de035c3c 356 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 357 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 358 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 359 }
dreschpe 8:65a4de035c3c 360
dreschpe 8:65a4de035c3c 361 #if defined USE_DMA
dreschpe 8:65a4de035c3c 362 // start DMA
dreschpe 8:65a4de035c3c 363 do {
dreschpe 8:65a4de035c3c 364 if (pixel > 4095) {
dreschpe 8:65a4de035c3c 365 dma_count = 4095;
dreschpe 8:65a4de035c3c 366 pixel = pixel - 4095;
dreschpe 8:65a4de035c3c 367 } else {
dreschpe 8:65a4de035c3c 368 dma_count = pixel;
dreschpe 8:65a4de035c3c 369 pixel = 0;
dreschpe 8:65a4de035c3c 370 }
dreschpe 8:65a4de035c3c 371 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 372 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 373 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 8:65a4de035c3c 374 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 375 LPC_GPDMA->DMACSoftSReq = 0x1; // DMA request
dreschpe 8:65a4de035c3c 376
dreschpe 8:65a4de035c3c 377 do {
dreschpe 8:65a4de035c3c 378 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 379
dreschpe 8:65a4de035c3c 380 } while (pixel > 0);
dreschpe 8:65a4de035c3c 381 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 382 do {
dreschpe 8:65a4de035c3c 383 } while ((0x0010 & LPC_SSP0->SR) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 384 /* disable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 385 LPC_SSP0->DMACR = 0x0;
dreschpe 8:65a4de035c3c 386 } else {
dreschpe 8:65a4de035c3c 387 do {
dreschpe 8:65a4de035c3c 388 } while ((0x0010 & LPC_SSP1->SR) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 389 /* disable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 390 LPC_SSP1->DMACR = 0x0;
dreschpe 8:65a4de035c3c 391 }
dreschpe 8:65a4de035c3c 392 #else // no DMA
dreschpe 8:65a4de035c3c 393 unsigned int i;
dreschpe 8:65a4de035c3c 394 for (i = 0; i < ( width() * height()); i++)
dreschpe 8:65a4de035c3c 395 _spi.write(_background);
dreschpe 8:65a4de035c3c 396 #endif
dreschpe 9:a63fd1ad41b0 397 #else // mbed lib
dreschpe 9:a63fd1ad41b0 398 _cs = 0;
dreschpe 9:a63fd1ad41b0 399 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 400 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 401 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 402 unsigned int i;
dreschpe 9:a63fd1ad41b0 403 for (i = 0; i < ( width() * height()); i++)
dreschpe 9:a63fd1ad41b0 404 _spi.write(_background);
dreschpe 9:a63fd1ad41b0 405 #endif
dreschpe 8:65a4de035c3c 406 _cs = 1;
dreschpe 8:65a4de035c3c 407 }
dreschpe 8:65a4de035c3c 408
dreschpe 8:65a4de035c3c 409
dreschpe 8:65a4de035c3c 410 void SPI_TFT::circle(int x0, int y0, int r, int color)
dreschpe 8:65a4de035c3c 411 {
dreschpe 8:65a4de035c3c 412
dreschpe 8:65a4de035c3c 413 int draw_x0, draw_y0;
dreschpe 8:65a4de035c3c 414 int draw_x1, draw_y1;
dreschpe 8:65a4de035c3c 415 int draw_x2, draw_y2;
dreschpe 8:65a4de035c3c 416 int draw_x3, draw_y3;
dreschpe 8:65a4de035c3c 417 int draw_x4, draw_y4;
dreschpe 8:65a4de035c3c 418 int draw_x5, draw_y5;
dreschpe 8:65a4de035c3c 419 int draw_x6, draw_y6;
dreschpe 8:65a4de035c3c 420 int draw_x7, draw_y7;
dreschpe 8:65a4de035c3c 421 int xx, yy;
dreschpe 8:65a4de035c3c 422 int di;
dreschpe 8:65a4de035c3c 423 //WindowMax();
dreschpe 8:65a4de035c3c 424 if (r == 0) { /* no radius */
dreschpe 8:65a4de035c3c 425 return;
dreschpe 8:65a4de035c3c 426 }
dreschpe 8:65a4de035c3c 427
dreschpe 8:65a4de035c3c 428 draw_x0 = draw_x1 = x0;
dreschpe 8:65a4de035c3c 429 draw_y0 = draw_y1 = y0 + r;
dreschpe 8:65a4de035c3c 430 if (draw_y0 < height()) {
dreschpe 8:65a4de035c3c 431 pixel(draw_x0, draw_y0, color); /* 90 degree */
dreschpe 8:65a4de035c3c 432 }
dreschpe 8:65a4de035c3c 433
dreschpe 8:65a4de035c3c 434 draw_x2 = draw_x3 = x0;
dreschpe 8:65a4de035c3c 435 draw_y2 = draw_y3 = y0 - r;
dreschpe 8:65a4de035c3c 436 if (draw_y2 >= 0) {
dreschpe 8:65a4de035c3c 437 pixel(draw_x2, draw_y2, color); /* 270 degree */
dreschpe 8:65a4de035c3c 438 }
dreschpe 8:65a4de035c3c 439
dreschpe 8:65a4de035c3c 440 draw_x4 = draw_x6 = x0 + r;
dreschpe 8:65a4de035c3c 441 draw_y4 = draw_y6 = y0;
dreschpe 8:65a4de035c3c 442 if (draw_x4 < width()) {
dreschpe 8:65a4de035c3c 443 pixel(draw_x4, draw_y4, color); /* 0 degree */
dreschpe 8:65a4de035c3c 444 }
dreschpe 8:65a4de035c3c 445
dreschpe 8:65a4de035c3c 446 draw_x5 = draw_x7 = x0 - r;
dreschpe 8:65a4de035c3c 447 draw_y5 = draw_y7 = y0;
dreschpe 8:65a4de035c3c 448 if (draw_x5>=0) {
dreschpe 8:65a4de035c3c 449 pixel(draw_x5, draw_y5, color); /* 180 degree */
dreschpe 8:65a4de035c3c 450 }
dreschpe 8:65a4de035c3c 451
dreschpe 8:65a4de035c3c 452 if (r == 1) {
dreschpe 8:65a4de035c3c 453 return;
dreschpe 8:65a4de035c3c 454 }
dreschpe 8:65a4de035c3c 455
dreschpe 8:65a4de035c3c 456 di = 3 - 2*r;
dreschpe 8:65a4de035c3c 457 xx = 0;
dreschpe 8:65a4de035c3c 458 yy = r;
dreschpe 8:65a4de035c3c 459 while (xx < yy) {
dreschpe 8:65a4de035c3c 460
dreschpe 8:65a4de035c3c 461 if (di < 0) {
dreschpe 8:65a4de035c3c 462 di += 4*xx + 6;
dreschpe 8:65a4de035c3c 463 } else {
dreschpe 8:65a4de035c3c 464 di += 4*(xx - yy) + 10;
dreschpe 8:65a4de035c3c 465 yy--;
dreschpe 8:65a4de035c3c 466 draw_y0--;
dreschpe 8:65a4de035c3c 467 draw_y1--;
dreschpe 8:65a4de035c3c 468 draw_y2++;
dreschpe 8:65a4de035c3c 469 draw_y3++;
dreschpe 8:65a4de035c3c 470 draw_x4--;
dreschpe 8:65a4de035c3c 471 draw_x5++;
dreschpe 8:65a4de035c3c 472 draw_x6--;
dreschpe 8:65a4de035c3c 473 draw_x7++;
dreschpe 8:65a4de035c3c 474 }
dreschpe 8:65a4de035c3c 475 xx++;
dreschpe 8:65a4de035c3c 476 draw_x0++;
dreschpe 8:65a4de035c3c 477 draw_x1--;
dreschpe 8:65a4de035c3c 478 draw_x2++;
dreschpe 8:65a4de035c3c 479 draw_x3--;
dreschpe 8:65a4de035c3c 480 draw_y4++;
dreschpe 8:65a4de035c3c 481 draw_y5++;
dreschpe 8:65a4de035c3c 482 draw_y6--;
dreschpe 8:65a4de035c3c 483 draw_y7--;
dreschpe 8:65a4de035c3c 484
dreschpe 8:65a4de035c3c 485 if ( (draw_x0 <= width()) && (draw_y0>=0) ) {
dreschpe 8:65a4de035c3c 486 pixel(draw_x0, draw_y0, color);
dreschpe 8:65a4de035c3c 487 }
dreschpe 8:65a4de035c3c 488
dreschpe 8:65a4de035c3c 489 if ( (draw_x1 >= 0) && (draw_y1 >= 0) ) {
dreschpe 8:65a4de035c3c 490 pixel(draw_x1, draw_y1, color);
dreschpe 8:65a4de035c3c 491 }
dreschpe 8:65a4de035c3c 492
dreschpe 8:65a4de035c3c 493 if ( (draw_x2 <= width()) && (draw_y2 <= height()) ) {
dreschpe 8:65a4de035c3c 494 pixel(draw_x2, draw_y2, color);
dreschpe 8:65a4de035c3c 495 }
dreschpe 8:65a4de035c3c 496
dreschpe 8:65a4de035c3c 497 if ( (draw_x3 >=0 ) && (draw_y3 <= height()) ) {
dreschpe 8:65a4de035c3c 498 pixel(draw_x3, draw_y3, color);
dreschpe 8:65a4de035c3c 499 }
dreschpe 8:65a4de035c3c 500
dreschpe 8:65a4de035c3c 501 if ( (draw_x4 <= width()) && (draw_y4 >= 0) ) {
dreschpe 8:65a4de035c3c 502 pixel(draw_x4, draw_y4, color);
dreschpe 8:65a4de035c3c 503 }
dreschpe 8:65a4de035c3c 504
dreschpe 8:65a4de035c3c 505 if ( (draw_x5 >= 0) && (draw_y5 >= 0) ) {
dreschpe 8:65a4de035c3c 506 pixel(draw_x5, draw_y5, color);
dreschpe 8:65a4de035c3c 507 }
dreschpe 8:65a4de035c3c 508 if ( (draw_x6 <=width()) && (draw_y6 <= height()) ) {
dreschpe 8:65a4de035c3c 509 pixel(draw_x6, draw_y6, color);
dreschpe 8:65a4de035c3c 510 }
dreschpe 8:65a4de035c3c 511 if ( (draw_x7 >= 0) && (draw_y7 <= height()) ) {
dreschpe 8:65a4de035c3c 512 pixel(draw_x7, draw_y7, color);
dreschpe 8:65a4de035c3c 513 }
dreschpe 8:65a4de035c3c 514 }
dreschpe 8:65a4de035c3c 515 return;
dreschpe 8:65a4de035c3c 516 }
dreschpe 8:65a4de035c3c 517
dreschpe 8:65a4de035c3c 518 void SPI_TFT::fillcircle(int x, int y, int r, int color)
dreschpe 8:65a4de035c3c 519 {
dreschpe 8:65a4de035c3c 520 int i;
dreschpe 8:65a4de035c3c 521 for (i = 0; i <= r; i++)
dreschpe 8:65a4de035c3c 522 circle(x,y,i,color);
dreschpe 8:65a4de035c3c 523 }
dreschpe 8:65a4de035c3c 524
dreschpe 8:65a4de035c3c 525
dreschpe 8:65a4de035c3c 526
dreschpe 8:65a4de035c3c 527 void SPI_TFT::hline(int x0, int x1, int y, int color)
dreschpe 8:65a4de035c3c 528 {
dreschpe 11:9bb71766cafc 529 int w;
dreschpe 8:65a4de035c3c 530 w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 531 window(x0,y,w,1);
dreschpe 8:65a4de035c3c 532 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 533 _cs = 0;
dreschpe 9:a63fd1ad41b0 534 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 535 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 536 #if defined USE_DMA
dreschpe 8:65a4de035c3c 537 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 538 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 539 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 540 #endif
dreschpe 8:65a4de035c3c 541 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 542 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 543 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 544 } else {
dreschpe 8:65a4de035c3c 545 #if defined USE_DMA
dreschpe 8:65a4de035c3c 546 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 547 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 548 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 549 #endif
dreschpe 8:65a4de035c3c 550 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 551 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 552 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 553 }
dreschpe 8:65a4de035c3c 554 #if defined USE_DMA
dreschpe 8:65a4de035c3c 555 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 556 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 557 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 8:65a4de035c3c 558 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 8:65a4de035c3c 559 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 560 LPC_GPDMA->DMACSoftSReq = 0x1; // start DMA
dreschpe 8:65a4de035c3c 561 do {
dreschpe 8:65a4de035c3c 562 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 563 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 564 do {
dreschpe 8:65a4de035c3c 565 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 566 } else {
dreschpe 8:65a4de035c3c 567 do {
dreschpe 8:65a4de035c3c 568 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 569 }
dreschpe 8:65a4de035c3c 570 #else
dreschpe 11:9bb71766cafc 571 int i;
dreschpe 8:65a4de035c3c 572 for (i=0; i<w; i++) {
dreschpe 8:65a4de035c3c 573 _spi.write(color);
dreschpe 8:65a4de035c3c 574 }
dreschpe 9:a63fd1ad41b0 575 #endif
dreschpe 9:a63fd1ad41b0 576 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 577 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 578 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 579 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 580 for (i=0; i<w; i++) {
dreschpe 9:a63fd1ad41b0 581 _spi.write(color);
dreschpe 9:a63fd1ad41b0 582 }
dreschpe 9:a63fd1ad41b0 583 #endif
dreschpe 8:65a4de035c3c 584 _cs = 1;
dreschpe 8:65a4de035c3c 585 WindowMax();
dreschpe 8:65a4de035c3c 586 return;
dreschpe 8:65a4de035c3c 587 }
dreschpe 8:65a4de035c3c 588
dreschpe 8:65a4de035c3c 589 void SPI_TFT::vline(int x, int y0, int y1, int color)
dreschpe 8:65a4de035c3c 590 {
dreschpe 8:65a4de035c3c 591 int h;
dreschpe 8:65a4de035c3c 592 h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 593 window(x,y0,1,h);
dreschpe 8:65a4de035c3c 594 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 595 _cs = 0;
dreschpe 9:a63fd1ad41b0 596 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 597 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 598 #if defined USE_DMA
dreschpe 8:65a4de035c3c 599 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 600 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 601 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 602 #endif
dreschpe 8:65a4de035c3c 603 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 604 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 605 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 606 } else {
dreschpe 8:65a4de035c3c 607 #if defined USE_DMA
dreschpe 8:65a4de035c3c 608 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 609 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 610 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 611 #endif
dreschpe 8:65a4de035c3c 612 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 613 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 614 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 615 }
dreschpe 8:65a4de035c3c 616 #if defined USE_DMA
dreschpe 8:65a4de035c3c 617 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 618 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 619 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 8:65a4de035c3c 620 LPC_GPDMACH0->DMACCControl = h | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 8:65a4de035c3c 621 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 622 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 623 do {
dreschpe 8:65a4de035c3c 624 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 625
dreschpe 8:65a4de035c3c 626 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 627 do {
dreschpe 8:65a4de035c3c 628 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 629 } else {
dreschpe 8:65a4de035c3c 630 do {
dreschpe 8:65a4de035c3c 631 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 632 }
dreschpe 8:65a4de035c3c 633 #else
dreschpe 8:65a4de035c3c 634 for (int y=0; y<h; y++) {
dreschpe 8:65a4de035c3c 635 _spi.write(color);
dreschpe 8:65a4de035c3c 636 }
dreschpe 8:65a4de035c3c 637 #endif
dreschpe 9:a63fd1ad41b0 638 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 639 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 640 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 641 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 642 for (int y=0; y<h; y++) {
dreschpe 9:a63fd1ad41b0 643 _spi.write(color);
dreschpe 9:a63fd1ad41b0 644 }
dreschpe 9:a63fd1ad41b0 645 #endif
dreschpe 8:65a4de035c3c 646 _cs = 1;
dreschpe 8:65a4de035c3c 647 WindowMax();
dreschpe 8:65a4de035c3c 648 return;
dreschpe 8:65a4de035c3c 649 }
dreschpe 8:65a4de035c3c 650
dreschpe 8:65a4de035c3c 651
dreschpe 8:65a4de035c3c 652
dreschpe 8:65a4de035c3c 653 void SPI_TFT::line(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 654 {
dreschpe 8:65a4de035c3c 655 //WindowMax();
dreschpe 8:65a4de035c3c 656 int dx = 0, dy = 0;
dreschpe 8:65a4de035c3c 657 int dx_sym = 0, dy_sym = 0;
dreschpe 8:65a4de035c3c 658 int dx_x2 = 0, dy_x2 = 0;
dreschpe 8:65a4de035c3c 659 int di = 0;
dreschpe 8:65a4de035c3c 660
dreschpe 8:65a4de035c3c 661 dx = x1-x0;
dreschpe 8:65a4de035c3c 662 dy = y1-y0;
dreschpe 8:65a4de035c3c 663
dreschpe 8:65a4de035c3c 664 if (dx == 0) { /* vertical line */
dreschpe 8:65a4de035c3c 665 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 666 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 667 return;
dreschpe 8:65a4de035c3c 668 }
dreschpe 8:65a4de035c3c 669
dreschpe 8:65a4de035c3c 670 if (dx > 0) {
dreschpe 8:65a4de035c3c 671 dx_sym = 1;
dreschpe 8:65a4de035c3c 672 } else {
dreschpe 8:65a4de035c3c 673 dx_sym = -1;
dreschpe 8:65a4de035c3c 674 }
dreschpe 8:65a4de035c3c 675 if (dy == 0) { /* horizontal line */
dreschpe 8:65a4de035c3c 676 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 677 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 678 return;
dreschpe 8:65a4de035c3c 679 }
dreschpe 8:65a4de035c3c 680
dreschpe 8:65a4de035c3c 681 if (dy > 0) {
dreschpe 8:65a4de035c3c 682 dy_sym = 1;
dreschpe 8:65a4de035c3c 683 } else {
dreschpe 8:65a4de035c3c 684 dy_sym = -1;
dreschpe 8:65a4de035c3c 685 }
dreschpe 8:65a4de035c3c 686
dreschpe 8:65a4de035c3c 687 dx = dx_sym*dx;
dreschpe 8:65a4de035c3c 688 dy = dy_sym*dy;
dreschpe 8:65a4de035c3c 689
dreschpe 8:65a4de035c3c 690 dx_x2 = dx*2;
dreschpe 8:65a4de035c3c 691 dy_x2 = dy*2;
dreschpe 8:65a4de035c3c 692
dreschpe 8:65a4de035c3c 693 if (dx >= dy) {
dreschpe 8:65a4de035c3c 694 di = dy_x2 - dx;
dreschpe 8:65a4de035c3c 695 while (x0 != x1) {
dreschpe 8:65a4de035c3c 696
dreschpe 8:65a4de035c3c 697 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 698 x0 += dx_sym;
dreschpe 8:65a4de035c3c 699 if (di<0) {
dreschpe 8:65a4de035c3c 700 di += dy_x2;
dreschpe 8:65a4de035c3c 701 } else {
dreschpe 8:65a4de035c3c 702 di += dy_x2 - dx_x2;
dreschpe 8:65a4de035c3c 703 y0 += dy_sym;
dreschpe 8:65a4de035c3c 704 }
dreschpe 8:65a4de035c3c 705 }
dreschpe 8:65a4de035c3c 706 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 707 } else {
dreschpe 8:65a4de035c3c 708 di = dx_x2 - dy;
dreschpe 8:65a4de035c3c 709 while (y0 != y1) {
dreschpe 8:65a4de035c3c 710 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 711 y0 += dy_sym;
dreschpe 8:65a4de035c3c 712 if (di < 0) {
dreschpe 8:65a4de035c3c 713 di += dx_x2;
dreschpe 8:65a4de035c3c 714 } else {
dreschpe 8:65a4de035c3c 715 di += dx_x2 - dy_x2;
dreschpe 8:65a4de035c3c 716 x0 += dx_sym;
dreschpe 8:65a4de035c3c 717 }
dreschpe 8:65a4de035c3c 718 }
dreschpe 8:65a4de035c3c 719 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 720 }
dreschpe 8:65a4de035c3c 721 return;
dreschpe 8:65a4de035c3c 722 }
dreschpe 8:65a4de035c3c 723
dreschpe 8:65a4de035c3c 724
dreschpe 8:65a4de035c3c 725 void SPI_TFT::rect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 726 {
dreschpe 8:65a4de035c3c 727
dreschpe 8:65a4de035c3c 728 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 729 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 730
dreschpe 8:65a4de035c3c 731 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 732 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 733
dreschpe 8:65a4de035c3c 734 if (x1 > x0) hline(x0,x1,y1,color);
dreschpe 8:65a4de035c3c 735 else hline(x1,x0,y1,color);
dreschpe 8:65a4de035c3c 736
dreschpe 8:65a4de035c3c 737 if (y1 > y0) vline(x1,y0,y1,color);
dreschpe 8:65a4de035c3c 738 else vline(x1,y1,y0,color);
dreschpe 8:65a4de035c3c 739
dreschpe 8:65a4de035c3c 740 return;
dreschpe 8:65a4de035c3c 741 }
dreschpe 8:65a4de035c3c 742
dreschpe 8:65a4de035c3c 743
dreschpe 8:65a4de035c3c 744
dreschpe 8:65a4de035c3c 745 void SPI_TFT::fillrect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 746 {
dreschpe 8:65a4de035c3c 747
dreschpe 8:65a4de035c3c 748 int h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 749 int w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 750 int pixel = h * w;
dreschpe 8:65a4de035c3c 751 #if defined USE_DMA
dreschpe 8:65a4de035c3c 752 int dma_count;
dreschpe 8:65a4de035c3c 753 #endif
dreschpe 8:65a4de035c3c 754 window(x0,y0,w,h);
dreschpe 8:65a4de035c3c 755 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 756 _cs = 0;
dreschpe 9:a63fd1ad41b0 757 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 758 if (spi_port == 0) { // TFT on SSP0
dreschpe 9:a63fd1ad41b0 759 #if defined USE_DMA
dreschpe 8:65a4de035c3c 760 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 761 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 762 LPC_SSP0->DMACR = 0x2;
dreschpe 9:a63fd1ad41b0 763 #endif
dreschpe 8:65a4de035c3c 764 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 765 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 766 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 767 } else {
dreschpe 9:a63fd1ad41b0 768 #if defined USE_DMA
dreschpe 8:65a4de035c3c 769 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 770 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 771 LPC_SSP1->DMACR = 0x2;
dreschpe 9:a63fd1ad41b0 772 #endif
dreschpe 8:65a4de035c3c 773 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 774 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 775 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 776 }
dreschpe 9:a63fd1ad41b0 777 #if defined USE_DMA
dreschpe 8:65a4de035c3c 778 do {
dreschpe 8:65a4de035c3c 779 if (pixel > 4095) {
dreschpe 8:65a4de035c3c 780 dma_count = 4095;
dreschpe 8:65a4de035c3c 781 pixel = pixel - 4095;
dreschpe 8:65a4de035c3c 782 } else {
dreschpe 8:65a4de035c3c 783 dma_count = pixel;
dreschpe 8:65a4de035c3c 784 pixel = 0;
dreschpe 8:65a4de035c3c 785 }
dreschpe 8:65a4de035c3c 786 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 787 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 788 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 8:65a4de035c3c 789 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 8:65a4de035c3c 790 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 791 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 792 do {
dreschpe 8:65a4de035c3c 793 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 794
dreschpe 8:65a4de035c3c 795 } while (pixel > 0);
dreschpe 8:65a4de035c3c 796
dreschpe 8:65a4de035c3c 797 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 798 do {
dreschpe 8:65a4de035c3c 799 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 800 } else {
dreschpe 8:65a4de035c3c 801 do {
dreschpe 8:65a4de035c3c 802 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 803 }
dreschpe 8:65a4de035c3c 804
dreschpe 9:a63fd1ad41b0 805 #else // no DMA
dreschpe 8:65a4de035c3c 806 for (int p=0; p<pixel; p++) {
dreschpe 8:65a4de035c3c 807 _spi.write(color);
dreschpe 8:65a4de035c3c 808 }
dreschpe 9:a63fd1ad41b0 809 #endif
dreschpe 9:a63fd1ad41b0 810 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 811 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 812 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 813 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 814 for (int p=0; p<pixel; p++) {
dreschpe 9:a63fd1ad41b0 815 _spi.write(color);
dreschpe 9:a63fd1ad41b0 816 }
dreschpe 9:a63fd1ad41b0 817 #endif
dreschpe 8:65a4de035c3c 818 _cs = 1;
dreschpe 8:65a4de035c3c 819 WindowMax();
dreschpe 8:65a4de035c3c 820 return;
dreschpe 8:65a4de035c3c 821 }
dreschpe 8:65a4de035c3c 822
dreschpe 8:65a4de035c3c 823
dreschpe 8:65a4de035c3c 824 void SPI_TFT::locate(int x, int y)
dreschpe 8:65a4de035c3c 825 {
dreschpe 8:65a4de035c3c 826 char_x = x;
dreschpe 8:65a4de035c3c 827 char_y = y;
dreschpe 8:65a4de035c3c 828 }
dreschpe 8:65a4de035c3c 829
dreschpe 8:65a4de035c3c 830
dreschpe 8:65a4de035c3c 831
dreschpe 8:65a4de035c3c 832 int SPI_TFT::columns()
dreschpe 8:65a4de035c3c 833 {
dreschpe 8:65a4de035c3c 834 return width() / font[1];
dreschpe 8:65a4de035c3c 835 }
dreschpe 8:65a4de035c3c 836
dreschpe 8:65a4de035c3c 837
dreschpe 8:65a4de035c3c 838
dreschpe 8:65a4de035c3c 839 int SPI_TFT::rows()
dreschpe 8:65a4de035c3c 840 {
dreschpe 8:65a4de035c3c 841 return height() / font[2];
dreschpe 8:65a4de035c3c 842 }
dreschpe 8:65a4de035c3c 843
dreschpe 8:65a4de035c3c 844
dreschpe 8:65a4de035c3c 845
dreschpe 8:65a4de035c3c 846 int SPI_TFT::_putc(int value)
dreschpe 8:65a4de035c3c 847 {
dreschpe 8:65a4de035c3c 848 if (value == '\n') { // new line
dreschpe 8:65a4de035c3c 849 char_x = 0;
dreschpe 8:65a4de035c3c 850 char_y = char_y + font[2];
dreschpe 8:65a4de035c3c 851 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 852 char_y = 0;
dreschpe 8:65a4de035c3c 853 }
dreschpe 8:65a4de035c3c 854 } else {
dreschpe 8:65a4de035c3c 855 character(char_x, char_y, value);
dreschpe 8:65a4de035c3c 856 }
dreschpe 8:65a4de035c3c 857 return value;
dreschpe 8:65a4de035c3c 858 }
dreschpe 8:65a4de035c3c 859
dreschpe 8:65a4de035c3c 860
dreschpe 8:65a4de035c3c 861 void SPI_TFT::character(int x, int y, int c)
dreschpe 8:65a4de035c3c 862 {
dreschpe 9:a63fd1ad41b0 863 unsigned int hor,vert,offset,bpl,j,i,b;
dreschpe 8:65a4de035c3c 864 unsigned char* zeichen;
dreschpe 8:65a4de035c3c 865 unsigned char z,w;
dreschpe 8:65a4de035c3c 866 #if defined USE_DMA
dreschpe 8:65a4de035c3c 867 unsigned int pixel;
dreschpe 9:a63fd1ad41b0 868 unsigned int p;
dreschpe 8:65a4de035c3c 869 unsigned int dma_count,dma_off;
dreschpe 8:65a4de035c3c 870 uint16_t *buffer;
dreschpe 8:65a4de035c3c 871 #endif
dreschpe 8:65a4de035c3c 872
dreschpe 8:65a4de035c3c 873 if ((c < 31) || (c > 127)) return; // test char range
dreschpe 8:65a4de035c3c 874
dreschpe 8:65a4de035c3c 875 // read font parameter from start of array
dreschpe 8:65a4de035c3c 876 offset = font[0]; // bytes / char
dreschpe 8:65a4de035c3c 877 hor = font[1]; // get hor size of font
dreschpe 8:65a4de035c3c 878 vert = font[2]; // get vert size of font
dreschpe 8:65a4de035c3c 879 bpl = font[3]; // bytes per line
dreschpe 8:65a4de035c3c 880
dreschpe 8:65a4de035c3c 881 if (char_x + hor > width()) {
dreschpe 8:65a4de035c3c 882 char_x = 0;
dreschpe 8:65a4de035c3c 883 char_y = char_y + vert;
dreschpe 8:65a4de035c3c 884 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 885 char_y = 0;
dreschpe 8:65a4de035c3c 886 }
dreschpe 8:65a4de035c3c 887 }
dreschpe 8:65a4de035c3c 888 window(char_x, char_y,hor,vert); // char box
dreschpe 8:65a4de035c3c 889 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 890
dreschpe 8:65a4de035c3c 891 #if defined USE_DMA
dreschpe 8:65a4de035c3c 892 pixel = hor * vert; // calculate buffer size
dreschpe 8:65a4de035c3c 893
dreschpe 8:65a4de035c3c 894 buffer = (uint16_t *) malloc (2*pixel); // we need a buffer for the 16 bit
dreschpe 8:65a4de035c3c 895 if (buffer == NULL) {
dreschpe 8:65a4de035c3c 896 //led = 1;
dreschpe 8:65a4de035c3c 897 //pc.printf("Malloc error !\n\r");
dreschpe 8:65a4de035c3c 898 return; // error no memory
dreschpe 8:65a4de035c3c 899 }
dreschpe 8:65a4de035c3c 900
dreschpe 8:65a4de035c3c 901 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 8:65a4de035c3c 902 w = zeichen[0]; // width of actual char
dreschpe 8:65a4de035c3c 903 p = 0;
dreschpe 8:65a4de035c3c 904 // construct the char into the buffer
dreschpe 8:65a4de035c3c 905 for (j=0; j<vert; j++) { // vert line
dreschpe 8:65a4de035c3c 906 for (i=0; i<hor; i++) { // horz line
dreschpe 8:65a4de035c3c 907 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 8:65a4de035c3c 908 b = 1 << (j & 0x07);
dreschpe 8:65a4de035c3c 909 if (( z & b ) == 0x00) {
dreschpe 8:65a4de035c3c 910 buffer[p] = _background;
dreschpe 8:65a4de035c3c 911 } else {
dreschpe 8:65a4de035c3c 912 buffer[p] = _foreground;
dreschpe 8:65a4de035c3c 913 }
dreschpe 8:65a4de035c3c 914 p++;
dreschpe 8:65a4de035c3c 915 }
dreschpe 8:65a4de035c3c 916 }
dreschpe 8:65a4de035c3c 917
dreschpe 8:65a4de035c3c 918 // copy the buffer with DMA SPI to display
dreschpe 8:65a4de035c3c 919 dma_off = 0; // offset for DMA transfer
dreschpe 8:65a4de035c3c 920 _cs = 0;
dreschpe 8:65a4de035c3c 921 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 922 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 923 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 924 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 925 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 926 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 927 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 928 } else {
dreschpe 8:65a4de035c3c 929 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 930 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 931 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 932 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 933 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 934 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 935 }
dreschpe 8:65a4de035c3c 936
dreschpe 8:65a4de035c3c 937 // start DMA
dreschpe 8:65a4de035c3c 938 do {
dreschpe 8:65a4de035c3c 939 if (pixel > 4095) { // this is a giant font !
dreschpe 8:65a4de035c3c 940 dma_count = 4095;
dreschpe 8:65a4de035c3c 941 pixel = pixel - 4095;
dreschpe 8:65a4de035c3c 942 } else {
dreschpe 8:65a4de035c3c 943 dma_count = pixel;
dreschpe 8:65a4de035c3c 944 pixel = 0;
dreschpe 8:65a4de035c3c 945 }
dreschpe 8:65a4de035c3c 946 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 947 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 948 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer + dma_off);
dreschpe 8:65a4de035c3c 949 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 950 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 951 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 952 do {
dreschpe 8:65a4de035c3c 953 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 954 dma_off = dma_off + dma_count;
dreschpe 8:65a4de035c3c 955 } while (pixel > 0);
dreschpe 8:65a4de035c3c 956
dreschpe 8:65a4de035c3c 957 free ((uint16_t *) buffer);
dreschpe 8:65a4de035c3c 958
dreschpe 8:65a4de035c3c 959 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 960 do {
dreschpe 8:65a4de035c3c 961 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 8:65a4de035c3c 962 /* disable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 963 LPC_SSP0->DMACR = 0x0;
dreschpe 8:65a4de035c3c 964 } else {
dreschpe 8:65a4de035c3c 965 do {
dreschpe 8:65a4de035c3c 966 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 8:65a4de035c3c 967 /* disable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 968 LPC_SSP1->DMACR = 0x0;
dreschpe 8:65a4de035c3c 969 }
dreschpe 8:65a4de035c3c 970
dreschpe 9:a63fd1ad41b0 971 #else // no dma
dreschpe 8:65a4de035c3c 972 _cs = 0;
dreschpe 9:a63fd1ad41b0 973 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 974 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 975 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 976 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 977 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 978 } else {
dreschpe 8:65a4de035c3c 979 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 980 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 981 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 982 }
dreschpe 9:a63fd1ad41b0 983 #else // mbed lib
dreschpe 9:a63fd1ad41b0 984 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 985 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 986 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 987 #endif
dreschpe 8:65a4de035c3c 988 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 8:65a4de035c3c 989 w = zeichen[0]; // width of actual char
dreschpe 8:65a4de035c3c 990 for (j=0; j<vert; j++) { // vert line
dreschpe 8:65a4de035c3c 991 for (i=0; i<hor; i++) { // horz line
dreschpe 8:65a4de035c3c 992 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 8:65a4de035c3c 993 b = 1 << (j & 0x07);
dreschpe 8:65a4de035c3c 994 if (( z & b ) == 0x00) {
dreschpe 8:65a4de035c3c 995 _spi.write(_background);
dreschpe 8:65a4de035c3c 996 } else {
dreschpe 8:65a4de035c3c 997 _spi.write(_foreground);
dreschpe 8:65a4de035c3c 998 }
dreschpe 8:65a4de035c3c 999 }
dreschpe 8:65a4de035c3c 1000 }
dreschpe 9:a63fd1ad41b0 1001 #endif // no DMA
dreschpe 8:65a4de035c3c 1002 _cs = 1;
dreschpe 8:65a4de035c3c 1003 WindowMax();
dreschpe 8:65a4de035c3c 1004 if ((w + 2) < hor) { // x offset to next char
dreschpe 8:65a4de035c3c 1005 char_x += w + 2;
dreschpe 8:65a4de035c3c 1006 } else char_x += hor;
dreschpe 8:65a4de035c3c 1007 }
dreschpe 8:65a4de035c3c 1008
dreschpe 8:65a4de035c3c 1009
dreschpe 8:65a4de035c3c 1010 void SPI_TFT::set_font(unsigned char* f)
dreschpe 8:65a4de035c3c 1011 {
dreschpe 8:65a4de035c3c 1012 font = f;
dreschpe 8:65a4de035c3c 1013 }
dreschpe 8:65a4de035c3c 1014
dreschpe 8:65a4de035c3c 1015
dreschpe 8:65a4de035c3c 1016
dreschpe 8:65a4de035c3c 1017 void SPI_TFT::Bitmap(unsigned int x, unsigned int y, unsigned int w, unsigned int h,unsigned char *bitmap)
dreschpe 8:65a4de035c3c 1018 {
dreschpe 8:65a4de035c3c 1019 unsigned int j;
dreschpe 8:65a4de035c3c 1020 int padd;
dreschpe 8:65a4de035c3c 1021 unsigned short *bitmap_ptr = (unsigned short *)bitmap;
dreschpe 8:65a4de035c3c 1022 // the lines are padded to multiple of 4 bytes in a bitmap
dreschpe 8:65a4de035c3c 1023 padd = -1;
dreschpe 8:65a4de035c3c 1024 do {
dreschpe 8:65a4de035c3c 1025 padd ++;
dreschpe 8:65a4de035c3c 1026 } while (2*(w + padd)%4 != 0);
dreschpe 8:65a4de035c3c 1027 window(x, y, w, h);
dreschpe 8:65a4de035c3c 1028 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 1029 _cs = 0;
dreschpe 9:a63fd1ad41b0 1030 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 1031 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1032 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1033 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 1034 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 1035 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1036 #endif
dreschpe 8:65a4de035c3c 1037 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1038 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1039 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1040
dreschpe 8:65a4de035c3c 1041 } else {
dreschpe 8:65a4de035c3c 1042 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1043 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 1044 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 1045 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1046 #endif
dreschpe 8:65a4de035c3c 1047 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1048 LPC_SSP1->DR = 0x72; // start Data command
dreschpe 8:65a4de035c3c 1049 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1050 }
dreschpe 8:65a4de035c3c 1051
dreschpe 8:65a4de035c3c 1052 bitmap_ptr += ((h - 1)* (w + padd));
dreschpe 8:65a4de035c3c 1053 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1054 for (j = 0; j < h; j++) { //Lines
dreschpe 8:65a4de035c3c 1055 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 1056 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 1057 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)bitmap_ptr;
dreschpe 8:65a4de035c3c 1058 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 1059 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 1060 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 1061 do {
dreschpe 8:65a4de035c3c 1062 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 1063
dreschpe 8:65a4de035c3c 1064 bitmap_ptr -= w;
dreschpe 8:65a4de035c3c 1065 bitmap_ptr -= padd;
dreschpe 8:65a4de035c3c 1066 }
dreschpe 8:65a4de035c3c 1067 #else
dreschpe 8:65a4de035c3c 1068 unsigned int i;
dreschpe 8:65a4de035c3c 1069 for (j = 0; j < h; j++) { //Lines
dreschpe 8:65a4de035c3c 1070 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 8:65a4de035c3c 1071 _spi.write(*bitmap_ptr); // one line
dreschpe 8:65a4de035c3c 1072 bitmap_ptr++;
dreschpe 8:65a4de035c3c 1073 }
dreschpe 8:65a4de035c3c 1074 bitmap_ptr -= 2*w;
dreschpe 8:65a4de035c3c 1075 bitmap_ptr -= padd;
dreschpe 8:65a4de035c3c 1076 }
dreschpe 8:65a4de035c3c 1077 #endif
dreschpe 8:65a4de035c3c 1078 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1079 do {
dreschpe 8:65a4de035c3c 1080 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1081 } else {
dreschpe 8:65a4de035c3c 1082 do {
dreschpe 8:65a4de035c3c 1083 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1084 }
dreschpe 9:a63fd1ad41b0 1085 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 1086 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 1087 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 1088 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 1089 unsigned int i;
dreschpe 9:a63fd1ad41b0 1090 for (j = 0; j < h; j++) { //Lines
dreschpe 9:a63fd1ad41b0 1091 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 9:a63fd1ad41b0 1092 _spi.write(*bitmap_ptr); // one line
dreschpe 9:a63fd1ad41b0 1093 bitmap_ptr++;
dreschpe 9:a63fd1ad41b0 1094 }
dreschpe 9:a63fd1ad41b0 1095 bitmap_ptr -= 2*w;
dreschpe 9:a63fd1ad41b0 1096 bitmap_ptr -= padd;
dreschpe 9:a63fd1ad41b0 1097 }
dreschpe 9:a63fd1ad41b0 1098 #endif
dreschpe 8:65a4de035c3c 1099 _cs = 1;
dreschpe 8:65a4de035c3c 1100 WindowMax();
dreschpe 8:65a4de035c3c 1101 }
dreschpe 8:65a4de035c3c 1102
dreschpe 8:65a4de035c3c 1103
dreschpe 8:65a4de035c3c 1104 int SPI_TFT::BMP_16(unsigned int x, unsigned int y, const char *Name_BMP)
dreschpe 8:65a4de035c3c 1105 {
dreschpe 8:65a4de035c3c 1106
dreschpe 8:65a4de035c3c 1107 #define OffsetPixelWidth 18
dreschpe 8:65a4de035c3c 1108 #define OffsetPixelHeigh 22
dreschpe 8:65a4de035c3c 1109 #define OffsetFileSize 34
dreschpe 8:65a4de035c3c 1110 #define OffsetPixData 10
dreschpe 8:65a4de035c3c 1111 #define OffsetBPP 28
dreschpe 8:65a4de035c3c 1112
dreschpe 8:65a4de035c3c 1113 char filename[50];
dreschpe 8:65a4de035c3c 1114 unsigned char BMP_Header[54];
dreschpe 8:65a4de035c3c 1115 unsigned short BPP_t;
dreschpe 8:65a4de035c3c 1116 unsigned int PixelWidth,PixelHeigh,start_data;
dreschpe 8:65a4de035c3c 1117 unsigned int i,off;
dreschpe 8:65a4de035c3c 1118 int padd,j;
dreschpe 8:65a4de035c3c 1119 unsigned short *line;
dreschpe 8:65a4de035c3c 1120
dreschpe 8:65a4de035c3c 1121 // get the filename
dreschpe 8:65a4de035c3c 1122 LocalFileSystem local("local");
dreschpe 8:65a4de035c3c 1123 sprintf(&filename[0],"/local/");
dreschpe 8:65a4de035c3c 1124 i=7;
dreschpe 8:65a4de035c3c 1125 while (*Name_BMP!='\0') {
dreschpe 8:65a4de035c3c 1126 filename[i++]=*Name_BMP++;
dreschpe 8:65a4de035c3c 1127 }
dreschpe 8:65a4de035c3c 1128
dreschpe 8:65a4de035c3c 1129 fprintf(stderr, "filename : %s \n\r",filename);
dreschpe 8:65a4de035c3c 1130
dreschpe 8:65a4de035c3c 1131 FILE *Image = fopen((const char *)&filename[0], "rb"); // open the bmp file
dreschpe 8:65a4de035c3c 1132 if (!Image) {
dreschpe 8:65a4de035c3c 1133 return(0); // error file not found !
dreschpe 8:65a4de035c3c 1134 }
dreschpe 8:65a4de035c3c 1135
dreschpe 8:65a4de035c3c 1136 fread(&BMP_Header[0],1,54,Image); // get the BMP Header
dreschpe 8:65a4de035c3c 1137
dreschpe 8:65a4de035c3c 1138 if (BMP_Header[0] != 0x42 || BMP_Header[1] != 0x4D) { // check magic byte
dreschpe 8:65a4de035c3c 1139 fclose(Image);
dreschpe 8:65a4de035c3c 1140 return(-1); // error no BMP file
dreschpe 8:65a4de035c3c 1141 }
dreschpe 8:65a4de035c3c 1142
dreschpe 8:65a4de035c3c 1143 BPP_t = BMP_Header[OffsetBPP] + (BMP_Header[OffsetBPP + 1] << 8);
dreschpe 8:65a4de035c3c 1144 if (BPP_t != 0x0010) {
dreschpe 8:65a4de035c3c 1145 fclose(Image);
dreschpe 8:65a4de035c3c 1146 return(-2); // error no 16 bit BMP
dreschpe 8:65a4de035c3c 1147 }
dreschpe 8:65a4de035c3c 1148
dreschpe 8:65a4de035c3c 1149 PixelHeigh = BMP_Header[OffsetPixelHeigh] + (BMP_Header[OffsetPixelHeigh + 1] << 8) + (BMP_Header[OffsetPixelHeigh + 2] << 16) + (BMP_Header[OffsetPixelHeigh + 3] << 24);
dreschpe 8:65a4de035c3c 1150 PixelWidth = BMP_Header[OffsetPixelWidth] + (BMP_Header[OffsetPixelWidth + 1] << 8) + (BMP_Header[OffsetPixelWidth + 2] << 16) + (BMP_Header[OffsetPixelWidth + 3] << 24);
dreschpe 8:65a4de035c3c 1151 if (PixelHeigh > height() + y || PixelWidth > width() + x) {
dreschpe 8:65a4de035c3c 1152 fclose(Image);
dreschpe 8:65a4de035c3c 1153 return(-3); // to big
dreschpe 8:65a4de035c3c 1154 }
dreschpe 8:65a4de035c3c 1155
dreschpe 8:65a4de035c3c 1156 start_data = BMP_Header[OffsetPixData] + (BMP_Header[OffsetPixData + 1] << 8) + (BMP_Header[OffsetPixData + 2] << 16) + (BMP_Header[OffsetPixData + 3] << 24);
dreschpe 8:65a4de035c3c 1157
dreschpe 8:65a4de035c3c 1158 line = (unsigned short *) malloc (2 * PixelWidth); // we need a buffer for a line
dreschpe 8:65a4de035c3c 1159 if (line == NULL) {
dreschpe 8:65a4de035c3c 1160 return(-4); // error no memory
dreschpe 8:65a4de035c3c 1161 }
dreschpe 8:65a4de035c3c 1162
dreschpe 8:65a4de035c3c 1163 // the bmp lines are padded to multiple of 4 bytes
dreschpe 8:65a4de035c3c 1164 padd = -1;
dreschpe 8:65a4de035c3c 1165 do {
dreschpe 8:65a4de035c3c 1166 padd ++;
dreschpe 8:65a4de035c3c 1167 } while ((PixelWidth * 2 + padd)%4 != 0);
dreschpe 8:65a4de035c3c 1168
dreschpe 8:65a4de035c3c 1169
dreschpe 8:65a4de035c3c 1170 //fseek(Image, 70 ,SEEK_SET);
dreschpe 8:65a4de035c3c 1171 window(x, y,PixelWidth ,PixelHeigh);
dreschpe 8:65a4de035c3c 1172 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 1173 _cs = 0;
dreschpe 9:a63fd1ad41b0 1174 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 1175 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1176 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1177 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 1178 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 1179 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1180 #endif
dreschpe 8:65a4de035c3c 1181 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1182 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1183 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1184
dreschpe 8:65a4de035c3c 1185 } else {
dreschpe 8:65a4de035c3c 1186 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1187 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 1188 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 1189 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1190 #endif
dreschpe 8:65a4de035c3c 1191 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1192 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1193 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1194 }
dreschpe 8:65a4de035c3c 1195 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 8:65a4de035c3c 1196 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 8:65a4de035c3c 1197 fseek(Image, off ,SEEK_SET);
dreschpe 8:65a4de035c3c 1198 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 8:65a4de035c3c 1199 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1200 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 1201 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 1202 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)line;
dreschpe 8:65a4de035c3c 1203 LPC_GPDMACH0->DMACCControl = PixelWidth | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 1204 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 1205 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 1206 do {
dreschpe 8:65a4de035c3c 1207 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 1208 #else
dreschpe 8:65a4de035c3c 1209 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 8:65a4de035c3c 1210 _spi.write(line[i]); // one 16 bit pixel
dreschpe 8:65a4de035c3c 1211 }
dreschpe 8:65a4de035c3c 1212 #endif
dreschpe 8:65a4de035c3c 1213 }
dreschpe 8:65a4de035c3c 1214 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1215 do {
dreschpe 8:65a4de035c3c 1216 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1217 } else {
dreschpe 8:65a4de035c3c 1218 do {
dreschpe 8:65a4de035c3c 1219 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1220 }
dreschpe 9:a63fd1ad41b0 1221
dreschpe 9:a63fd1ad41b0 1222 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 1223 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 1224 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 1225 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 1226 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 9:a63fd1ad41b0 1227 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 9:a63fd1ad41b0 1228 fseek(Image, off ,SEEK_SET);
dreschpe 9:a63fd1ad41b0 1229 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 9:a63fd1ad41b0 1230 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 9:a63fd1ad41b0 1231 _spi.write(line[i]); // one 16 bit pixel
dreschpe 9:a63fd1ad41b0 1232 }
dreschpe 9:a63fd1ad41b0 1233 }
dreschpe 9:a63fd1ad41b0 1234 #endif
dreschpe 8:65a4de035c3c 1235 _cs = 1;
dreschpe 8:65a4de035c3c 1236 free (line);
dreschpe 8:65a4de035c3c 1237 fclose(Image);
dreschpe 8:65a4de035c3c 1238 WindowMax();
dreschpe 8:65a4de035c3c 1239 return(1);
dreschpe 0:de9d1462a835 1240 }