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MKL25Z4.h File Reference
CMSIS Peripheral Access Layer for MKL25Z4. More...
Go to the source code of this file.
Data Structures | |
| struct | ADC_Type |
| ADC - Register Layout Typedef. More... | |
| struct | CMP_Type |
| CMP - Register Layout Typedef. More... | |
| struct | DAC_Type |
| DAC - Register Layout Typedef. More... | |
| struct | DMA_Type |
| DMA - Register Layout Typedef. More... | |
| struct | DMAMUX_Type |
| DMAMUX - Register Layout Typedef. More... | |
| struct | FGPIO_Type |
| FGPIO - Register Layout Typedef. More... | |
| struct | FTFA_Type |
| FTFA - Register Layout Typedef. More... | |
| struct | GPIO_Type |
| GPIO - Register Layout Typedef. More... | |
| struct | I2C_Type |
| I2C - Register Layout Typedef. More... | |
| struct | LLWU_Type |
| LLWU - Register Layout Typedef. More... | |
| struct | LPTMR_Type |
| LPTMR - Register Layout Typedef. More... | |
| struct | MCG_Type |
| MCG - Register Layout Typedef. More... | |
| struct | MCM_Type |
| MCM - Register Layout Typedef. More... | |
| struct | MTB_Type |
| MTB - Register Layout Typedef. More... | |
| struct | MTBDWT_Type |
| MTBDWT - Register Layout Typedef. More... | |
| struct | NV_Type |
| NV - Register Layout Typedef. More... | |
| struct | OSC_Type |
| OSC - Register Layout Typedef. More... | |
| struct | PIT_Type |
| PIT - Register Layout Typedef. More... | |
| struct | PMC_Type |
| PMC - Register Layout Typedef. More... | |
| struct | PORT_Type |
| PORT - Register Layout Typedef. More... | |
| struct | RCM_Type |
| RCM - Register Layout Typedef. More... | |
| struct | ROM_Type |
| ROM - Register Layout Typedef. More... | |
| struct | RTC_Type |
| RTC - Register Layout Typedef. More... | |
| struct | SIM_Type |
| SIM - Register Layout Typedef. More... | |
| struct | SMC_Type |
| SMC - Register Layout Typedef. More... | |
| struct | SPI_Type |
| SPI - Register Layout Typedef. More... | |
| struct | TPM_Type |
| TPM - Register Layout Typedef. More... | |
| struct | TSI_Type |
| TSI - Register Layout Typedef. More... | |
| struct | UART_Type |
| UART - Register Layout Typedef. More... | |
| struct | UARTLP_Type |
| UARTLP - Register Layout Typedef. More... | |
| struct | USB_Type |
| USB - Register Layout Typedef. More... | |
Typedefs | |
| typedef enum IRQn | IRQn_Type |
| Interrupt Number Definitions. | |
Enumerations | |
| enum | IRQn { NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, PendSV_IRQn = -2, SysTick_IRQn = -1, DMA0_IRQn = 0, DMA1_IRQn = 1, DMA2_IRQn = 2, DMA3_IRQn = 3, Reserved20_IRQn = 4, FTFA_IRQn = 5, LVD_LVW_IRQn = 6, LLW_IRQn = 7, I2C0_IRQn = 8, I2C1_IRQn = 9, SPI0_IRQn = 10, SPI1_IRQn = 11, UART0_IRQn = 12, UART1_IRQn = 13, UART2_IRQn = 14, ADC0_IRQn = 15, CMP0_IRQn = 16, TPM0_IRQn = 17, TPM1_IRQn = 18, TPM2_IRQn = 19, RTC_IRQn = 20, RTC_Seconds_IRQn = 21, PIT_IRQn = 22, Reserved39_IRQn = 23, USB0_IRQn = 24, DAC0_IRQn = 25, TSI0_IRQn = 26, MCG_IRQn = 27, LPTimer_IRQn = 28, Reserved45_IRQn = 29, PORTA_IRQn = 30, PORTD_IRQn = 31, NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3, TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7, UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11, I2C2_IRQn = 12, SPI_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15, PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19, EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23, USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27, ENET_IRQn = 28, RIT_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31, PLL1_IRQn = 32 , WDT_IRQn = 0, TIMER0_IRQn = 4, TIMER1_IRQn = 5, UART0_IRQn = 6, UART1_IRQn = 7, PWM1_IRQn = 8, I2C0_IRQn = 9, SPI_IRQn = 10, SSP0_IRQn = 10, SSP1_IRQn = 11, PLL0_IRQn = 12, RTC_IRQn = 13, EINT0_IRQn = 14, EINT1_IRQn = 15, EINT2_IRQn = 16, EINT3_IRQn = 17, ADC_IRQn = 18, I2C1_IRQn = 19, BOD_IRQn = 20, ENET_IRQn = 21, USB_IRQn = 22, CAN_IRQn = 23, MIC_IRQn = 24, DMA_IRQn = 25, TIMER2_IRQn = 26, TIMER3_IRQn = 27, UART2_IRQn = 28, UART3_IRQn = 29, I2C2_IRQn = 30, I2S_IRQn = 31, Reset_IRQn = -15, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3, TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7, UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11, I2C2_IRQn = 12, Reserved0_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15, PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19, EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23, USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27, ENET_IRQn = 28, MCI_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31, PLL1_IRQn = 32, USBActivity_IRQn = 33, CANActivity_IRQn = 34, UART4_IRQn = 35, SSP2_IRQn = 36, LCD_IRQn = 37, GPIO_IRQn = 38, PWM0_IRQn = 39, EEPROM_IRQn = 40, CMP0_IRQn = 41, CMP1_IRQn = 42 } |
Interrupt Number Definitions. More... | |
Detailed Description
CMSIS Peripheral Access Layer for MKL25Z4.
- Version:
- 1.1
- Date:
- 2012-06-21 CMSIS Peripheral Access Layer for MKL25Z4
Definition in file MKL25Z4.h.
Generated on Tue Jul 12 2022 13:47:02 by
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