Fork of Smoothie to port to mbed non-LPC targets.
Fork of Smoothie by
Revision 3:f151d08d335c, committed 2014-03-02
- Comitter:
- Bigcheese
- Date:
- Sun Mar 02 06:33:08 2014 +0000
- Parent:
- 2:1df0b61d3b5a
- Commit message:
- Bunch of stuff. Need to locally merge in updated USB changes.
Changed in this revision
--- a/libs/ADC/adc.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,439 +0,0 @@ -/* mbed Library - ADC - * Copyright (c) 2010, sblandford - * released under MIT license http://mbed.org/licence/mit - */ -#include "mbed.h" -#include "adc.h" - - -ADC *ADC::instance; - -ADC::ADC(int sample_rate, int cclk_div) - { - - int i, adc_clk_freq, pclk, clock_div, max_div=1; - - //Work out CCLK - adc_clk_freq=CLKS_PER_SAMPLE*sample_rate; - int m = (LPC_SC->PLL0CFG & 0xFFFF) + 1; - int n = (LPC_SC->PLL0CFG >> 16) + 1; - int cclkdiv = LPC_SC->CCLKCFG + 1; - int Fcco = (2 * m * XTAL_FREQ) / n; - int cclk = Fcco / cclkdiv; - - //Power up the ADC - LPC_SC->PCONP |= (1 << 12); - //Set clock at cclk / 1. - LPC_SC->PCLKSEL0 &= ~(0x3 << 24); - switch (cclk_div) { - case 1: - LPC_SC->PCLKSEL0 |= 0x1 << 24; - break; - case 2: - LPC_SC->PCLKSEL0 |= 0x2 << 24; - break; - case 4: - LPC_SC->PCLKSEL0 |= 0x0 << 24; - break; - case 8: - LPC_SC->PCLKSEL0 |= 0x3 << 24; - break; - default: - printf("Warning: ADC CCLK clock divider must be 1, 2, 4 or 8. %u supplied.\n", - cclk_div); - printf("Defaulting to 1.\n"); - LPC_SC->PCLKSEL0 |= 0x1 << 24; - break; - } - pclk = cclk / cclk_div; - clock_div=pclk / adc_clk_freq; - - if (clock_div > 0xFF) { - //printf("Warning: Clock division is %u which is above 255 limit. Re-Setting at limit.\n", - // clock_div); - clock_div=0xFF; - } - if (clock_div == 0) { - printf("Warning: Clock division is 0. Re-Setting to 1.\n"); - clock_div=1; - } - - _adc_clk_freq=pclk / clock_div; - if (_adc_clk_freq > MAX_ADC_CLOCK) { - printf("Warning: Actual ADC sample rate of %u which is above %u limit\n", - _adc_clk_freq / CLKS_PER_SAMPLE, MAX_ADC_CLOCK / CLKS_PER_SAMPLE); - while ((pclk / max_div) > MAX_ADC_CLOCK) max_div++; - printf("Maximum recommended sample rate is %u\n", (pclk / max_div) / CLKS_PER_SAMPLE); - } - - LPC_ADC->ADCR = - ((clock_div - 1 ) << 8 ) | //Clkdiv - ( 1 << 21 ); //A/D operational - - //Default no channels enabled - LPC_ADC->ADCR &= ~0xFF; - //Default NULL global custom isr - _adc_g_isr = NULL; - //Initialize arrays - for (i=7; i>=0; i--) { - _adc_data[i] = 0; - _adc_isr[i] = NULL; - } - - - //* Attach IRQ - instance = this; - NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr); - - //Disable global interrupt - LPC_ADC->ADINTEN &= ~0x100; - -}; - -void ADC::_adcisr(void) -{ - instance->adcisr(); -} - - -void ADC::adcisr(void) -{ - uint32_t stat; - int chan; - - // Read status - stat = LPC_ADC->ADSTAT; - //Scan channels for over-run or done and update array - if (stat & 0x0101) _adc_data[0] = LPC_ADC->ADDR0; - if (stat & 0x0202) _adc_data[1] = LPC_ADC->ADDR1; - if (stat & 0x0404) _adc_data[2] = LPC_ADC->ADDR2; - if (stat & 0x0808) _adc_data[3] = LPC_ADC->ADDR3; - if (stat & 0x1010) _adc_data[4] = LPC_ADC->ADDR4; - if (stat & 0x2020) _adc_data[5] = LPC_ADC->ADDR5; - if (stat & 0x4040) _adc_data[6] = LPC_ADC->ADDR6; - if (stat & 0x8080) _adc_data[7] = LPC_ADC->ADDR7; - - // Channel that triggered interrupt - chan = (LPC_ADC->ADGDR >> 24) & 0x07; - //User defined interrupt handlers - if (_adc_isr[chan] != NULL) - _adc_isr[chan](_adc_data[chan]); - if (_adc_g_isr != NULL) - _adc_g_isr(chan, _adc_data[chan]); - return; -} - -int ADC::_pin_to_channel(PinName pin) { - int chan; - switch (pin) { - case p15://=p0.23 of LPC1768 - default: - chan=0; - break; - case p16://=p0.24 of LPC1768 - chan=1; - break; - case p17://=p0.25 of LPC1768 - chan=2; - break; - case p18://=p0.26 of LPC1768 - chan=3; - break; - case p19://=p1.30 of LPC1768 - chan=4; - break; - case p20://=p1.31 of LPC1768 - chan=5; - break; - } - return(chan); -} - -PinName ADC::channel_to_pin(int chan) { - const PinName pin[8]={p15, p16, p17, p18, p19, p20, p15, p15}; - - if ((chan < 0) || (chan > 5)) - fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan); - return(pin[chan & 0x07]); -} - - -int ADC::channel_to_pin_number(int chan) { - const int pin[8]={15, 16, 17, 18, 19, 20, 0, 0}; - - if ((chan < 0) || (chan > 5)) - fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan); - return(pin[chan & 0x07]); -} - - -uint32_t ADC::_data_of_pin(PinName pin) { - //If in burst mode and at least one interrupt enabled then - //take all values from _adc_data - if (burst() && (LPC_ADC->ADINTEN & 0x3F)) { - return(_adc_data[_pin_to_channel(pin)]); - } else { - //Return current register value or last value from interrupt - switch (pin) { - case p15://=p0.23 of LPC1768 - default: - return(LPC_ADC->ADINTEN & 0x01?_adc_data[0]:LPC_ADC->ADDR0); - case p16://=p0.24 of LPC1768 - return(LPC_ADC->ADINTEN & 0x02?_adc_data[1]:LPC_ADC->ADDR1); - case p17://=p0.25 of LPC1768 - return(LPC_ADC->ADINTEN & 0x04?_adc_data[2]:LPC_ADC->ADDR2); - case p18://=p0.26 of LPC1768: - return(LPC_ADC->ADINTEN & 0x08?_adc_data[3]:LPC_ADC->ADDR3); - case p19://=p1.30 of LPC1768 - return(LPC_ADC->ADINTEN & 0x10?_adc_data[4]:LPC_ADC->ADDR4); - case p20://=p1.31 of LPC1768 - return(LPC_ADC->ADINTEN & 0x20?_adc_data[5]:LPC_ADC->ADDR5); - } - } -} - -//Enable or disable an ADC pin -void ADC::setup(PinName pin, int state) { - int chan; - chan=_pin_to_channel(pin); - if ((state & 1) == 1) { - switch(pin) { - case p15://=p0.23 of LPC1768 - default: - LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14); - LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 14; - LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14); - LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 14; - break; - case p16://=p0.24 of LPC1768 - LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16); - LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 16; - LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16); - LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 16; - break; - case p17://=p0.25 of LPC1768 - LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18); - LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 18; - LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18); - LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 18; - break; - case p18://=p0.26 of LPC1768: - LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20); - LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 20; - LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20); - LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 20; - break; - case p19://=p1.30 of LPC1768 - LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28); - LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 28; - LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28); - LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 28; - break; - case p20://=p1.31 of LPC1768 - LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30); - LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 30; - LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30); - LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 30; - break; - } - //Only one channel can be selected at a time if not in burst mode - if (!burst()) LPC_ADC->ADCR &= ~0xFF; - //Select channel - LPC_ADC->ADCR |= (1 << chan); - } - else { - switch(pin) { - case p15://=p0.23 of LPC1768 - default: - LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14); - LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14); - break; - case p16://=p0.24 of LPC1768 - LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16); - LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16); - break; - case p17://=p0.25 of LPC1768 - LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18); - LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18); - break; - case p18://=p0.26 of LPC1768: - LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20); - LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20); - break; - case p19://=p1.30 of LPC1768 - LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28); - LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28); - break; - case p20://=p1.31 of LPC1768 - LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30); - LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30); - break; - } - LPC_ADC->ADCR &= ~(1 << chan); - } -} -//Return channel enabled/disabled state -int ADC::setup(PinName pin) { - int chan; - - chan = _pin_to_channel(pin); - return((LPC_ADC->ADCR & (1 << chan)) >> chan); -} - -//Select channel already setup -void ADC::select(PinName pin) { - int chan; - - //Only one channel can be selected at a time if not in burst mode - if (!burst()) LPC_ADC->ADCR &= ~0xFF; - //Select channel - chan = _pin_to_channel(pin); - LPC_ADC->ADCR |= (1 << chan); -} - -//Enable or disable burst mode -void ADC::burst(int state) { - if ((state & 1) == 1) { - if (startmode(0) != 0) - fprintf(stderr, "Warning. startmode is %u. Must be 0 for burst mode.\n", startmode(0)); - LPC_ADC->ADCR |= (1 << 16); - } - else - LPC_ADC->ADCR &= ~(1 << 16); -} -//Return burst mode state -int ADC::burst(void) { - return((LPC_ADC->ADCR & (1 << 16)) >> 16); -} - -//Set startmode and edge -void ADC::startmode(int mode, int edge) { - int lpc_adc_temp; - - //Reset start mode and edge bit, - lpc_adc_temp = LPC_ADC->ADCR & ~(0x0F << 24); - //Write with new values - lpc_adc_temp |= ((mode & 7) << 24) | ((edge & 1) << 27); - LPC_ADC->ADCR = lpc_adc_temp; -} - -//Return startmode state according to mode_edge=0: mode and mode_edge=1: edge -int ADC::startmode(int mode_edge){ - switch (mode_edge) { - case 0: - default: - return((LPC_ADC->ADCR >> 24) & 0x07); - case 1: - return((LPC_ADC->ADCR >> 27) & 0x01); - } -} - -//Start ADC conversion -void ADC::start(void) { - startmode(1,0); -} - - -//Set interrupt enable/disable for pin to state -void ADC::interrupt_state(PinName pin, int state) { - int chan; - - chan = _pin_to_channel(pin); - if (state == 1) { - LPC_ADC->ADINTEN &= ~0x100; - LPC_ADC->ADINTEN |= 1 << chan; - /* Enable the ADC Interrupt */ - NVIC_EnableIRQ(ADC_IRQn); - } else { - LPC_ADC->ADINTEN &= ~( 1 << chan ); - //Disable interrrupt if no active pins left - if ((LPC_ADC->ADINTEN & 0xFF) == 0) - NVIC_DisableIRQ(ADC_IRQn); - } -} - -//Return enable/disable state of interrupt for pin -int ADC::interrupt_state(PinName pin) { - int chan; - - chan = _pin_to_channel(pin); - return((LPC_ADC->ADINTEN >> chan) & 0x01); -} - - -//Attach custom interrupt handler replacing default -void ADC::attach(void(*fptr)(void)) { - //* Attach IRQ - NVIC_SetVector(ADC_IRQn, (uint32_t)fptr); -} - -//Restore default interrupt handler -void ADC::detach(void) { - //* Attach IRQ - instance = this; - NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr); -} - - -//Append interrupt handler for pin to function isr -void ADC::append(PinName pin, void(*fptr)(uint32_t value)) { - int chan; - - chan = _pin_to_channel(pin); - _adc_isr[chan] = fptr; -} - -//Append interrupt handler for pin to function isr -void ADC::unappend(PinName pin) { - int chan; - - chan = _pin_to_channel(pin); - _adc_isr[chan] = NULL; -} - -//Unappend global interrupt handler to function isr -void ADC::append(void(*fptr)(int chan, uint32_t value)) { - _adc_g_isr = fptr; -} - -//Detach global interrupt handler to function isr -void ADC::unappend() { - _adc_g_isr = NULL; -} - -//Set ADC offset -void offset(int offset) { - LPC_ADC->ADTRM &= ~(0x07 << 4); - LPC_ADC->ADTRM |= (offset & 0x07) << 4; -} - -//Return current ADC offset -int offset(void) { - return((LPC_ADC->ADTRM >> 4) & 0x07); -} - -//Return value of ADC on pin -int ADC::read(PinName pin) { - //Reset DONE and OVERRUN flags of interrupt handled ADC data - _adc_data[_pin_to_channel(pin)] &= ~(((uint32_t)0x01 << 31) | ((uint32_t)0x01 << 30)); - //Return value - return((_data_of_pin(pin) >> 4) & 0xFFF); -} - -//Return DONE flag of ADC on pin -int ADC::done(PinName pin) { - return((_data_of_pin(pin) >> 31) & 0x01); -} - -//Return OVERRUN flag of ADC on pin -int ADC::overrun(PinName pin) { - return((_data_of_pin(pin) >> 30) & 0x01); -} - -int ADC::actual_adc_clock(void) { - return(_adc_clk_freq); -} - -int ADC::actual_sample_rate(void) { - return(_adc_clk_freq / CLKS_PER_SAMPLE); -}
--- a/libs/ADC/adc.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,131 +0,0 @@ -/* mbed Library - ADC - * Copyright (c) 2010, sblandford - * released under MIT license http://mbed.org/licence/mit - */ - -#ifndef MBED_ADC_H -#define MBED_ADC_H - -#include "PinNames.h" // mbed.h lib -#define XTAL_FREQ 12000000 -#define MAX_ADC_CLOCK 13000000 -#define CLKS_PER_SAMPLE 64 - -class ADC { -public: - - //Initialize ADC with ADC maximum sample rate of - //sample_rate and system clock divider of cclk_div - //Maximum recommened sample rate is 184000 - ADC(int sample_rate, int cclk_div); - - //Enable/disable ADC on pin according to state - //and also select/de-select for next conversion - void setup(PinName pin, int state); - - //Return enabled/disabled state of ADC on pin - int setup(PinName pin); - - //Enable/disable burst mode according to state - void burst(int state); - - //Select channel already setup - void select(PinName pin); - - //Return burst mode enabled/disabled - int burst(void); - - /*Set start condition and edge according to mode: - 0 - No start (this value should be used when clearing PDN to 0). - 1 - Start conversion now. - 2 - Start conversion when the edge selected by bit 27 occurs on the P2.10 / EINT0 / NMI pin. - 3 - Start conversion when the edge selected by bit 27 occurs on the P1.27 / CLKOUT / - USB_OVRCRn / CAP0.1 pin. - 4 - Start conversion when the edge selected by bit 27 occurs on MAT0.1. Note that this does - not require that the MAT0.1 function appear on a device pin. - 5 - Start conversion when the edge selected by bit 27 occurs on MAT0.3. Note that it is not - possible to cause the MAT0.3 function to appear on a device pin. - 6 - Start conversion when the edge selected by bit 27 occurs on MAT1.0. Note that this does - not require that the MAT1.0 function appear on a device pin. - 7 - Start conversion when the edge selected by bit 27 occurs on MAT1.1. Note that this does - not require that the MAT1.1 function appear on a device pin. - When mode >= 2, conversion is triggered by edge: - 0 - Rising edge - 1 - Falling edge - */ - void startmode(int mode, int edge); - - //Return startmode state according to mode_edge=0: mode and mode_edge=1: edge - int startmode(int mode_edge); - - //Start ADC conversion - void start(void); - - //Set interrupt enable/disable for pin to state - void interrupt_state(PinName pin, int state); - - //Return enable/disable state of interrupt for pin - int interrupt_state(PinName pin); - - //Attach custom interrupt handler replacing default - void attach(void(*fptr)(void)); - - //Restore default interrupt handler - void detach(void); - - //Append custom interrupt handler for pin - void append(PinName pin, void(*fptr)(uint32_t value)); - - //Unappend custom interrupt handler for pin - void unappend(PinName pin); - - //Append custom global interrupt handler - void append(void(*fptr)(int chan, uint32_t value)); - - //Unappend custom global interrupt handler - void unappend(void); - - //Set ADC offset to a value 0-7 - void offset(int offset); - - //Return current ADC offset - int offset(void); - - //Return value of ADC on pin - int read(PinName pin); - - //Return DONE flag of ADC on pin - int done(PinName pin); - - //Return OVERRUN flag of ADC on pin - int overrun(PinName pin); - - //Return actual ADC clock - int actual_adc_clock(void); - - //Return actual maximum sample rate - int actual_sample_rate(void); - - //Return pin ID of ADC channel - PinName channel_to_pin(int chan); - - //Return pin number of ADC channel - int channel_to_pin_number(int chan); - - -private: - int _pin_to_channel(PinName pin); - uint32_t _data_of_pin(PinName pin); - - int _adc_clk_freq; - void adcisr(void); - static void _adcisr(void); - static ADC *instance; - - uint32_t _adc_data[8]; - void(*_adc_isr[8])(uint32_t value); - void(*_adc_g_isr)(int chan, uint32_t value); - void(*_adc_m_isr)(void); -}; - -#endif
--- a/libs/Adc.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,56 +0,0 @@ -/* - This file is part of Smoothie (http://smoothieware.org/). The motion control part is heavily based on Grbl (https://github.com/simen/grbl). - Smoothie is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. - Smoothie is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License along with Smoothie. If not, see <http://www.gnu.org/licenses/>. -*/ - -using namespace std; -#include <vector> -#include "libs/nuts_bolts.h" -#include "libs/Module.h" -#include "libs/Kernel.h" -#include "Adc.h" -#include "libs/ADC/adc.h" -#include "libs/Pin.h" - -// This is an interface to the mbed.org ADC library you can find in libs/ADC/adc.h -// TODO : Having the same name is confusing, should change that - -Adc::Adc(){ - this->adc = new ADC(1000, 1); -} - -// Enables ADC on a given pin -void Adc::enable_pin(Pin* pin){ - PinName pin_name = this->_pin_to_pinname(pin); - this->adc->burst(1); - this->adc->setup(pin_name,1); - this->adc->interrupt_state(pin_name,1); -} - -// Read the last value ( burst mode ) on a given pin -unsigned int Adc::read(Pin* pin){ - return this->adc->read(this->_pin_to_pinname(pin)); -} - -// Convert a smoothie Pin into a mBed Pin -PinName Adc::_pin_to_pinname(Pin* pin){ - if( pin->port == LPC_GPIO0 && pin->pin == 23 ){ - return p15; - }else if( pin->port == LPC_GPIO0 && pin->pin == 24 ){ - return p16; - }else if( pin->port == LPC_GPIO0 && pin->pin == 25 ){ - return p17; - }else if( pin->port == LPC_GPIO0 && pin->pin == 26 ){ - return p18; - }else if( pin->port == LPC_GPIO1 && pin->pin == 30 ){ - return p19; - }else if( pin->port == LPC_GPIO1 && pin->pin == 31 ){ - return p20; - }else{ - //TODO: Error - return NC; - } -} -
--- a/libs/Adc.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,34 +0,0 @@ -/* - This file is part of Smoothie (http://smoothieware.org/). The motion control part is heavily based on Grbl (https://github.com/simen/grbl). - Smoothie is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. - Smoothie is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License along with Smoothie. If not, see <http://www.gnu.org/licenses/>. -*/ - - - -#ifndef ADC_H -#define ADC_H - -using namespace std; -#include <vector> -#include "libs/nuts_bolts.h" -#include "libs/Module.h" -#include "libs/Kernel.h" -#include "PinNames.h" // mbed.h lib -#include "libs/ADC/adc.h" -#include "libs/Pin.h" - -class Adc : public Module{ - public: - Adc(); - void enable_pin(Pin* pin); - unsigned int read(Pin* pin); - PinName _pin_to_pinname(Pin* pin); - - ADC* adc; -}; - - - -#endif
--- a/libs/AppendFileStream.h Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/AppendFileStream.h Sun Mar 02 06:33:08 2014 +0000 @@ -2,17 +2,17 @@ #define _APPENDFILESTREAM_H_ #include "StreamOutput.h" -#include "string.h" -#include "stdlib.h" +#include <string.h> +#include <stdlib.h> class AppendFileStream : public StreamOutput { public: - AppendFileStream(const char *filename) { fn= strdup(filename); } - virtual ~AppendFileStream(){ free(fn); } + AppendFileStream(const char *filename) { fn= filename; } + virtual ~AppendFileStream(){} int puts(const char*); private: - char *fn; + const char *fn; }; #endif
--- a/libs/ConfigSources/FileConfigSource.cpp Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/ConfigSources/FileConfigSource.cpp Sun Mar 02 06:33:08 2014 +0000 @@ -9,7 +9,6 @@ #include "ConfigValue.h" #include "FileConfigSource.h" #include "ConfigCache.h" -#include <malloc.h> using namespace std; @@ -68,8 +67,8 @@ // Update value for( int i = value.length(); i < free_space; i++){ value += " "; } fpos_t pos; - fgetpos( lp, &pos ); - int start = pos - buffer.length() + begin_value - 1; + int position = fgetpos( lp, &pos ); + int start = position - buffer.length() + begin_value - 1; fseek(lp, start, SEEK_SET); fputs(value.c_str(), lp); fclose(lp);
--- a/libs/ConfigSources/FirmConfigSource.cpp Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/ConfigSources/FirmConfigSource.cpp Sun Mar 02 06:33:08 2014 +0000 @@ -9,7 +9,6 @@ #include "ConfigValue.h" #include "FirmConfigSource.h" #include "ConfigCache.h" -#include <malloc.h> using namespace std;
--- a/libs/Kernel.cpp Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/Kernel.cpp Sun Mar 02 06:33:08 2014 +0000 @@ -10,10 +10,8 @@ #include "libs/Config.h" #include "libs/nuts_bolts.h" #include "libs/SlowTicker.h" -#include "libs/Adc.h" #include "libs/Pauser.h" #include "libs/StreamOutputPool.h" -#include <mri.h> #include "modules/communication/SerialConsole.h" #include "modules/communication/GcodeDispatch.h" @@ -22,7 +20,6 @@ #include "modules/robot/Stepper.h" #include "modules/robot/Conveyor.h" #include "modules/tools/endstops/Endstops.h" -#include <malloc.h> #define baud_rate_setting_checksum CHECKSUM("baud_rate") #define uart0_checksum CHECKSUM("uart0") @@ -41,55 +38,13 @@ this->current_path = "/"; - // Configure UART depending on MRI config - // Match up the SerialConsole to MRI UART. This makes it easy to use only one UART for both debug and actual commands. - NVIC_SetPriorityGrouping(0); - switch( __mriPlatform_CommUartIndex() ) { - case 0: - this->serial = new SerialConsole(USBTX, USBRX, this->config->value(uart0_checksum,baud_rate_setting_checksum)->by_default(9600)->as_number()); - break; - case 1: - this->serial = new SerialConsole( p13, p14, this->config->value(uart0_checksum,baud_rate_setting_checksum)->by_default(9600)->as_number()); - break; - case 2: - this->serial = new SerialConsole( p28, p27, this->config->value(uart0_checksum,baud_rate_setting_checksum)->by_default(9600)->as_number()); - break; - case 3: - this->serial = new SerialConsole( p9, p10, this->config->value(uart0_checksum,baud_rate_setting_checksum)->by_default(9600)->as_number()); - break; - } - this->add_module( this->config ); this->add_module( this->serial ); // HAL stuff add_module( this->slow_ticker = new SlowTicker()); this->step_ticker = new StepTicker(); - this->adc = new Adc(); - - // TODO : These should go into platform-specific files - // LPC17xx-specific - NVIC_SetPriorityGrouping(0); - NVIC_SetPriority(TIMER0_IRQn, 2); - NVIC_SetPriority(TIMER1_IRQn, 1); - NVIC_SetPriority(TIMER2_IRQn, 3); - - // Set other priorities lower than the timers - NVIC_SetPriority(ADC_IRQn, 4); - NVIC_SetPriority(USB_IRQn, 4); - - // If MRI is enabled - if( MRI_ENABLE ){ - if( NVIC_GetPriority(UART0_IRQn) > 0 ){ NVIC_SetPriority(UART0_IRQn, 4); } - if( NVIC_GetPriority(UART1_IRQn) > 0 ){ NVIC_SetPriority(UART1_IRQn, 4); } - if( NVIC_GetPriority(UART2_IRQn) > 0 ){ NVIC_SetPriority(UART2_IRQn, 4); } - if( NVIC_GetPriority(UART3_IRQn) > 0 ){ NVIC_SetPriority(UART3_IRQn, 4); } - }else{ - NVIC_SetPriority(UART0_IRQn, 4); - NVIC_SetPriority(UART1_IRQn, 4); - NVIC_SetPriority(UART2_IRQn, 4); - NVIC_SetPriority(UART3_IRQn, 4); - } +// this->adc = new Adc(); // Configure the step ticker int base_stepping_frequency = this->config->value(base_stepping_frequency_checksum )->by_default(100000)->as_number();
--- a/libs/Kernel.h Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/Kernel.h Sun Mar 02 06:33:08 2014 +0000 @@ -7,12 +7,14 @@ #ifndef KERNEL_H #define KERNEL_H + +#include "mbed.h" + #include "libs/Module.h" #include "libs/Config.h" #include "libs/SlowTicker.h" #include "libs/StreamOutputPool.h" #include "libs/StepTicker.h" -#include "libs/Adc.h" #include "libs/Pauser.h" #include "libs/PublicData.h" #include "modules/communication/SerialConsole.h" @@ -21,8 +23,6 @@ #include "modules/robot/Planner.h" #include "modules/robot/Robot.h" #include "modules/robot/Stepper.h" -#include "mri.h" -#include <array> #define THEKERNEL Kernel::instance @@ -60,13 +60,13 @@ int debug; SlowTicker* slow_ticker; StepTicker* step_ticker; - Adc* adc; + AnalogIn* adc; PublicData* public_data; bool use_leds; string current_path; private: - std::array<std::vector<Module*>, NUMBER_OF_DEFINED_EVENTS> hooks; // When a module asks to be called for a specific event ( a hook ), this is where that request is remembered + std::vector<Module*> hooks[NUMBER_OF_DEFINED_EVENTS]; // When a module asks to be called for a specific event ( a hook ), this is where that request is remembered };
--- a/libs/LPC17xx/LPC17xxLib/inc/debug_frmwrk.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,74 +0,0 @@ -/********************************************************************** -* $Id$ debug_frmwrk.h 2010-05-21 -*//** -* @file debug_frmwrk.h -* @brief Contains some utilities that used for debugging through UART -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ -#ifndef DEBUG_FRMWRK_H_ -#define DEBUG_FRMWRK_H_ - -//#include <stdarg.h> -#include "lpc17xx_uart.h" - -#define USED_UART_DEBUG_PORT 0 - -#if (USED_UART_DEBUG_PORT==0) -#define DEBUG_UART_PORT LPC_UART0 -#elif (USED_UART_DEBUG_PORT==1) -#define DEBUG_UART_PORT LPC_UART1 -#endif - -#define _DBG(x) _db_msg(DEBUG_UART_PORT, x) -#define _DBG_(x) _db_msg_(DEBUG_UART_PORT, x) -#define _DBC(x) _db_char(DEBUG_UART_PORT, x) -#define _DBD(x) _db_dec(DEBUG_UART_PORT, x) -#define _DBD16(x) _db_dec_16(DEBUG_UART_PORT, x) -#define _DBD32(x) _db_dec_32(DEBUG_UART_PORT, x) -#define _DBH(x) _db_hex(DEBUG_UART_PORT, x) -#define _DBH16(x) _db_hex_16(DEBUG_UART_PORT, x) -#define _DBH32(x) _db_hex_32(DEBUG_UART_PORT, x) -#define _DG _db_get_char(DEBUG_UART_PORT) -//void _printf (const char *format, ...); - -extern void (*_db_msg)(LPC_UART_TypeDef *UARTx, const void *s); -extern void (*_db_msg_)(LPC_UART_TypeDef *UARTx, const void *s); -extern void (*_db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch); -extern void (*_db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn); -extern void (*_db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn); -extern void (*_db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn); -extern void (*_db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn); -extern void (*_db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn); -extern void (*_db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn); -extern uint8_t (*_db_get_char)(LPC_UART_TypeDef *UARTx); - -void UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch); -void UARTPuts(LPC_UART_TypeDef *UARTx, const void *str); -void UARTPuts_(LPC_UART_TypeDef *UARTx, const void *str); -void UARTPutDec(LPC_UART_TypeDef *UARTx, uint8_t decnum); -void UARTPutDec16(LPC_UART_TypeDef *UARTx, uint16_t decnum); -void UARTPutDec32(LPC_UART_TypeDef *UARTx, uint32_t decnum); -void UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum); -void UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum); -void UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum); -uint8_t UARTGetChar (LPC_UART_TypeDef *UARTx); -void debug_frmwrk_init(void); - -#endif /* DEBUG_FRMWRK_H_ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_adc.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,296 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_adc.h 2008-07-27 -*//** -* @file lpc17xx_adc.h -* @brief Contains the NXP ABL typedefs for C standard types. -* It is intended to be used in ISO C conforming development -* environments and checks for this insofar as it is possible -* to do so. -* @version 2.0 -* @date 27 Jul. 2008 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2008, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup ADC ADC (Analog-to-Digital Converter) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_ADC_H_ -#define LPC17XX_ADC_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Private macros ------------------------------------------------------------- */ -/** @defgroup ADC_Private_Macros ADC Private Macros - * @{ - */ - -/* -------------------------- BIT DEFINITIONS ----------------------------------- */ -/*********************************************************************//** - * Macro defines for ADC control register - **********************************************************************/ -/** Selects which of the AD0.0:7 pins is (are) to be sampled and converted */ -#define ADC_CR_CH_SEL(n) ((1UL << n)) -/** The APB clock (PCLK) is divided by (this value plus one) -* to produce the clock for the A/D */ -#define ADC_CR_CLKDIV(n) ((n<<8)) -/** Repeated conversions A/D enable bit */ -#define ADC_CR_BURST ((1UL<<16)) -/** ADC convert in power down mode */ -#define ADC_CR_PDN ((1UL<<21)) -/** Start mask bits */ -#define ADC_CR_START_MASK ((7UL<<24)) -/** Select Start Mode */ -#define ADC_CR_START_MODE_SEL(SEL) ((SEL<<24)) -/** Start conversion now */ -#define ADC_CR_START_NOW ((1UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0 */ -#define ADC_CR_START_EINT0 ((2UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1 */ -#define ADC_CR_START_CAP01 ((3UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on MAT0.1 */ -#define ADC_CR_START_MAT01 ((4UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on MAT0.3 */ -#define ADC_CR_START_MAT03 ((5UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on MAT1.0 */ -#define ADC_CR_START_MAT10 ((6UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on MAT1.1 */ -#define ADC_CR_START_MAT11 ((7UL<<24)) -/** Start conversion on a falling edge on the selected CAP/MAT signal */ -#define ADC_CR_EDGE ((1UL<<27)) - -/*********************************************************************//** - * Macro defines for ADC Global Data register - **********************************************************************/ -/** When DONE is 1, this field contains result value of ADC conversion */ -#define ADC_GDR_RESULT(n) (((n>>4)&0xFFF)) -/** These bits contain the channel from which the LS bits were converted */ -#define ADC_GDR_CH(n) (((n>>24)&0x7)) -/** This bit is 1 in burst mode if the results of one or - * more conversions was (were) lost */ -#define ADC_GDR_OVERRUN_FLAG ((1UL<<30)) -/** This bit is set to 1 when an A/D conversion completes */ -#define ADC_GDR_DONE_FLAG ((1UL<<31)) - -/** This bits is used to mask for Channel */ -#define ADC_GDR_CH_MASK ((7UL<<24)) -/*********************************************************************//** - * Macro defines for ADC Interrupt register - **********************************************************************/ -/** These bits allow control over which A/D channels generate - * interrupts for conversion completion */ -#define ADC_INTEN_CH(n) ((1UL<<n)) -/** When 1, enables the global DONE flag in ADDR to generate an interrupt */ -#define ADC_INTEN_GLOBAL ((1UL<<8)) - -/*********************************************************************//** - * Macro defines for ADC Data register - **********************************************************************/ -/** When DONE is 1, this field contains result value of ADC conversion */ -#define ADC_DR_RESULT(n) (((n>>4)&0xFFF)) -/** These bits mirror the OVERRRUN status flags that appear in the - * result register for each A/D channel */ -#define ADC_DR_OVERRUN_FLAG ((1UL<<30)) -/** This bit is set to 1 when an A/D conversion completes. It is cleared - * when this register is read */ -#define ADC_DR_DONE_FLAG ((1UL<<31)) - -/*********************************************************************//** - * Macro defines for ADC Status register -**********************************************************************/ -/** These bits mirror the DONE status flags that appear in the result - * register for each A/D channel */ -#define ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF)) -/** These bits mirror the OVERRRUN status flags that appear in the - * result register for each A/D channel */ -#define ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF)) -/** This bit is the A/D interrupt flag */ -#define ADC_STAT_INT_FLAG ((1UL<<16)) - -/*********************************************************************//** - * Macro defines for ADC Trim register -**********************************************************************/ -/** Offset trim bits for ADC operation */ -#define ADC_ADCOFFS(n) (((n&0xF)<<4)) -/** Written to boot code*/ -#define ADC_TRIM(n) (((n&0xF)<<8)) - -/* ------------------- CHECK PARAM DEFINITIONS ------------------------- */ -/** Check ADC parameter */ -#define PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC)) - -/** Check ADC state parameter */ -#define PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING)) - -/** Check ADC state parameter */ -#define PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE)) - -/** Check ADC rate parameter */ -#define PARAM_ADC_RATE(rate) ((rate>0)&&(rate<=200000)) - -/** Check ADC channel selection parameter */ -#define PARAM_ADC_CHANNEL_SELECTION(SEL) ((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\ -||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\ -||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\ -||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7)) - -/** Check ADC start option parameter */ -#define PARAM_ADC_START_OPT(OPT) ((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\ -||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\ -||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\ -||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11)) - -/** Check ADC interrupt type parameter */ -#define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\ -||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\ -||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\ -||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\ -||(OPT == ADC_ADGINTEN)) - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup ADC_Public_Types ADC Public Types - * @{ - */ - -/*********************************************************************//** - * @brief ADC enumeration - **********************************************************************/ -/** @brief Channel Selection */ -typedef enum -{ - ADC_CHANNEL_0 = 0, /*!< Channel 0 */ - ADC_CHANNEL_1, /*!< Channel 1 */ - ADC_CHANNEL_2, /*!< Channel 2 */ - ADC_CHANNEL_3, /*!< Channel 3 */ - ADC_CHANNEL_4, /*!< Channel 4 */ - ADC_CHANNEL_5, /*!< Channel 5 */ - ADC_CHANNEL_6, /*!< Channel 6 */ - ADC_CHANNEL_7 /*!< Channel 7 */ -}ADC_CHANNEL_SELECTION; - -/** @brief Type of start option */ -typedef enum -{ - ADC_START_CONTINUOUS =0, /*!< Continuous mode */ - ADC_START_NOW, /*!< Start conversion now */ - ADC_START_ON_EINT0, /*!< Start conversion when the edge selected - * by bit 27 occurs on P2.10/EINT0 */ - ADC_START_ON_CAP01, /*!< Start conversion when the edge selected - * by bit 27 occurs on P1.27/CAP0.1 */ - ADC_START_ON_MAT01, /*!< Start conversion when the edge selected - * by bit 27 occurs on MAT0.1 */ - ADC_START_ON_MAT03, /*!< Start conversion when the edge selected - * by bit 27 occurs on MAT0.3 */ - ADC_START_ON_MAT10, /*!< Start conversion when the edge selected - * by bit 27 occurs on MAT1.0 */ - ADC_START_ON_MAT11 /*!< Start conversion when the edge selected - * by bit 27 occurs on MAT1.1 */ -} ADC_START_OPT; - - -/** @brief Type of edge when start conversion on the selected CAP/MAT signal */ -typedef enum -{ - ADC_START_ON_RISING = 0, /*!< Start conversion on a rising edge - *on the selected CAP/MAT signal */ - ADC_START_ON_FALLING /*!< Start conversion on a falling edge - *on the selected CAP/MAT signal */ -} ADC_START_ON_EDGE_OPT; - -/** @brief* ADC type interrupt enum */ -typedef enum -{ - ADC_ADINTEN0 = 0, /*!< Interrupt channel 0 */ - ADC_ADINTEN1, /*!< Interrupt channel 1 */ - ADC_ADINTEN2, /*!< Interrupt channel 2 */ - ADC_ADINTEN3, /*!< Interrupt channel 3 */ - ADC_ADINTEN4, /*!< Interrupt channel 4 */ - ADC_ADINTEN5, /*!< Interrupt channel 5 */ - ADC_ADINTEN6, /*!< Interrupt channel 6 */ - ADC_ADINTEN7, /*!< Interrupt channel 7 */ - ADC_ADGINTEN /*!< Individual channel/global flag done generate an interrupt */ -}ADC_TYPE_INT_OPT; - -/** @brief ADC Data status */ -typedef enum -{ - ADC_DATA_BURST = 0, /*Burst bit*/ - ADC_DATA_DONE /*Done bit*/ -}ADC_DATA_STATUS; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup ADC_Public_Functions ADC Public Functions - * @{ - */ -/* Init/DeInit ADC peripheral ----------------*/ -void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate); -void ADC_DeInit(LPC_ADC_TypeDef *ADCx); - -/* Enable/Disable ADC functions --------------*/ -void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState); -void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState); -void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode); -void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState); - -/* Configure ADC functions -------------------*/ -void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption); -void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState); - -/* Get ADC information functions -------------------*/ -uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel); -FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType); -uint32_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx); -FlagStatus ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - - -#endif /* LPC17XX_ADC_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_can.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,866 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_can.h 2010-06-18 -*//** -* @file lpc17xx_can.h -* @brief Contains all macro definitions and function prototypes -* support for CAN firmware library on LPC17xx -* @version 3.0 -* @date 18. June. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup CAN CAN (Control Area Network) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_CAN_H_ -#define LPC17XX_CAN_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup CAN_Public_Macros CAN Public Macros - * @{ - */ -#define MSG_ENABLE ((uint8_t)(0)) -#define MSG_DISABLE ((uint8_t)(1)) -#define CAN1_CTRL ((uint8_t)(0)) -#define CAN2_CTRL ((uint8_t)(1)) -#define PARAM_FULLCAN_IC(n) ((n==FULLCAN_IC0)||(n==FULLCAN_IC1)) -#define ID_11 1 -#define MAX_HW_FULLCAN_OBJ 64 -#define MAX_SW_FULLCAN_OBJ 32 - -/** - * @} - */ - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup CAN_Private_Macros CAN Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/*********************************************************************//** - * Macro defines for CAN Mode Register - **********************************************************************/ -/** CAN Reset mode */ -#define CAN_MOD_RM ((uint32_t)(1)) -/** CAN Listen Only Mode */ -#define CAN_MOD_LOM ((uint32_t)(1<<1)) -/** CAN Self Test mode */ -#define CAN_MOD_STM ((uint32_t)(1<<2)) -/** CAN Transmit Priority mode */ -#define CAN_MOD_TPM ((uint32_t)(1<<3)) -/** CAN Sleep mode */ -#define CAN_MOD_SM ((uint32_t)(1<<4)) -/** CAN Receive Polarity mode */ -#define CAN_MOD_RPM ((uint32_t)(1<<5)) -/** CAN Test mode */ -#define CAN_MOD_TM ((uint32_t)(1<<7)) - -/*********************************************************************//** - * Macro defines for CAN Command Register - **********************************************************************/ -/** CAN Transmission Request */ -#define CAN_CMR_TR ((uint32_t)(1)) -/** CAN Abort Transmission */ -#define CAN_CMR_AT ((uint32_t)(1<<1)) -/** CAN Release Receive Buffer */ -#define CAN_CMR_RRB ((uint32_t)(1<<2)) -/** CAN Clear Data Overrun */ -#define CAN_CMR_CDO ((uint32_t)(1<<3)) -/** CAN Self Reception Request */ -#define CAN_CMR_SRR ((uint32_t)(1<<4)) -/** CAN Select Tx Buffer 1 */ -#define CAN_CMR_STB1 ((uint32_t)(1<<5)) -/** CAN Select Tx Buffer 2 */ -#define CAN_CMR_STB2 ((uint32_t)(1<<6)) -/** CAN Select Tx Buffer 3 */ -#define CAN_CMR_STB3 ((uint32_t)(1<<7)) - -/*********************************************************************//** - * Macro defines for CAN Global Status Register - **********************************************************************/ -/** CAN Receive Buffer Status */ -#define CAN_GSR_RBS ((uint32_t)(1)) -/** CAN Data Overrun Status */ -#define CAN_GSR_DOS ((uint32_t)(1<<1)) -/** CAN Transmit Buffer Status */ -#define CAN_GSR_TBS ((uint32_t)(1<<2)) -/** CAN Transmit Complete Status */ -#define CAN_GSR_TCS ((uint32_t)(1<<3)) -/** CAN Receive Status */ -#define CAN_GSR_RS ((uint32_t)(1<<4)) -/** CAN Transmit Status */ -#define CAN_GSR_TS ((uint32_t)(1<<5)) -/** CAN Error Status */ -#define CAN_GSR_ES ((uint32_t)(1<<6)) -/** CAN Bus Status */ -#define CAN_GSR_BS ((uint32_t)(1<<7)) -/** CAN Current value of the Rx Error Counter */ -#define CAN_GSR_RXERR(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Current value of the Tx Error Counter */ -#define CAN_GSR_TXERR(n) ((uint32_t)(n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Interrupt and Capture Register - **********************************************************************/ -/** CAN Receive Interrupt */ -#define CAN_ICR_RI ((uint32_t)(1)) -/** CAN Transmit Interrupt 1 */ -#define CAN_ICR_TI1 ((uint32_t)(1<<1)) -/** CAN Error Warning Interrupt */ -#define CAN_ICR_EI ((uint32_t)(1<<2)) -/** CAN Data Overrun Interrupt */ -#define CAN_ICR_DOI ((uint32_t)(1<<3)) -/** CAN Wake-Up Interrupt */ -#define CAN_ICR_WUI ((uint32_t)(1<<4)) -/** CAN Error Passive Interrupt */ -#define CAN_ICR_EPI ((uint32_t)(1<<5)) -/** CAN Arbitration Lost Interrupt */ -#define CAN_ICR_ALI ((uint32_t)(1<<6)) -/** CAN Bus Error Interrupt */ -#define CAN_ICR_BEI ((uint32_t)(1<<7)) -/** CAN ID Ready Interrupt */ -#define CAN_ICR_IDI ((uint32_t)(1<<8)) -/** CAN Transmit Interrupt 2 */ -#define CAN_ICR_TI2 ((uint32_t)(1<<9)) -/** CAN Transmit Interrupt 3 */ -#define CAN_ICR_TI3 ((uint32_t)(1<<10)) -/** CAN Error Code Capture */ -#define CAN_ICR_ERRBIT(n) ((uint32_t)((n&0x1F)<<16)) -/** CAN Error Direction */ -#define CAN_ICR_ERRDIR ((uint32_t)(1<<21)) -/** CAN Error Capture */ -#define CAN_ICR_ERRC(n) ((uint32_t)((n&0x3)<<22)) -/** CAN Arbitration Lost Capture */ -#define CAN_ICR_ALCBIT(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Interrupt Enable Register - **********************************************************************/ -/** CAN Receive Interrupt Enable */ -#define CAN_IER_RIE ((uint32_t)(1)) -/** CAN Transmit Interrupt Enable for buffer 1 */ -#define CAN_IER_TIE1 ((uint32_t)(1<<1)) -/** CAN Error Warning Interrupt Enable */ -#define CAN_IER_EIE ((uint32_t)(1<<2)) -/** CAN Data Overrun Interrupt Enable */ -#define CAN_IER_DOIE ((uint32_t)(1<<3)) -/** CAN Wake-Up Interrupt Enable */ -#define CAN_IER_WUIE ((uint32_t)(1<<4)) -/** CAN Error Passive Interrupt Enable */ -#define CAN_IER_EPIE ((uint32_t)(1<<5)) -/** CAN Arbitration Lost Interrupt Enable */ -#define CAN_IER_ALIE ((uint32_t)(1<<6)) -/** CAN Bus Error Interrupt Enable */ -#define CAN_IER_BEIE ((uint32_t)(1<<7)) -/** CAN ID Ready Interrupt Enable */ -#define CAN_IER_IDIE ((uint32_t)(1<<8)) -/** CAN Transmit Enable Interrupt for Buffer 2 */ -#define CAN_IER_TIE2 ((uint32_t)(1<<9)) -/** CAN Transmit Enable Interrupt for Buffer 3 */ -#define CAN_IER_TIE3 ((uint32_t)(1<<10)) - -/*********************************************************************//** - * Macro defines for CAN Bus Timing Register - **********************************************************************/ -/** CAN Baudrate Prescaler */ -#define CAN_BTR_BRP(n) ((uint32_t)(n&0x3FF)) -/** CAN Synchronization Jump Width */ -#define CAN_BTR_SJM(n) ((uint32_t)((n&0x3)<<14)) -/** CAN Time Segment 1 */ -#define CAN_BTR_TESG1(n) ((uint32_t)(n&0xF)<<16)) -/** CAN Time Segment 2 */ -#define CAN_BTR_TESG2(n) ((uint32_t)(n&0xF)<<20)) -/** CAN Sampling */ -#define CAN_BTR_SAM(n) ((uint32_t)(1<<23)) - -/*********************************************************************//** - * Macro defines for CAN Error Warning Limit Register - **********************************************************************/ -/** CAN Error Warning Limit */ -#define CAN_EWL_EWL(n) ((uint32_t)(n&0xFF)) - -/*********************************************************************//** - * Macro defines for CAN Status Register - **********************************************************************/ -/** CAN Receive Buffer Status */ -#define CAN_SR_RBS ((uint32_t)(1)) -/** CAN Data Overrun Status */ -#define CAN_SR_DOS ((uint32_t)(1<<1)) -/** CAN Transmit Buffer Status 1 */ -#define CAN_SR_TBS1 ((uint32_t)(1<<2)) -/** CAN Transmission Complete Status of Buffer 1 */ -#define CAN_SR_TCS1 ((uint32_t)(1<<3)) -/** CAN Receive Status */ -#define CAN_SR_RS ((uint32_t)(1<<4)) -/** CAN Transmit Status 1 */ -#define CAN_SR_TS1 ((uint32_t)(1<<5)) -/** CAN Error Status */ -#define CAN_SR_ES ((uint32_t)(1<<6)) -/** CAN Bus Status */ -#define CAN_SR_BS ((uint32_t)(1<<7)) -/** CAN Transmit Buffer Status 2 */ -#define CAN_SR_TBS2 ((uint32_t)(1<<10)) -/** CAN Transmission Complete Status of Buffer 2 */ -#define CAN_SR_TCS2 ((uint32_t)(1<<11)) -/** CAN Transmit Status 2 */ -#define CAN_SR_TS2 ((uint32_t)(1<<13)) -/** CAN Transmit Buffer Status 2 */ -#define CAN_SR_TBS3 ((uint32_t)(1<<18)) -/** CAN Transmission Complete Status of Buffer 2 */ -#define CAN_SR_TCS3 ((uint32_t)(1<<19)) -/** CAN Transmit Status 2 */ -#define CAN_SR_TS3 ((uint32_t)(1<<21)) - -/*********************************************************************//** - * Macro defines for CAN Receive Frame Status Register - **********************************************************************/ -/** CAN ID Index */ -#define CAN_RFS_ID_INDEX(n) ((uint32_t)(n&0x3FF)) -/** CAN Bypass */ -#define CAN_RFS_BP ((uint32_t)(1<<10)) -/** CAN Data Length Code */ -#define CAN_RFS_DLC(n) ((uint32_t)((n&0xF)<<16) -/** CAN Remote Transmission Request */ -#define CAN_RFS_RTR ((uint32_t)(1<<30)) -/** CAN control 11 bit or 29 bit Identifier */ -#define CAN_RFS_FF ((uint32_t)(1<<31)) - -/*********************************************************************//** - * Macro defines for CAN Receive Identifier Register - **********************************************************************/ -/** CAN 11 bit Identifier */ -#define CAN_RID_ID_11(n) ((uint32_t)(n&0x7FF)) -/** CAN 29 bit Identifier */ -#define CAN_RID_ID_29(n) ((uint32_t)(n&0x1FFFFFFF)) - -/*********************************************************************//** - * Macro defines for CAN Receive Data A Register - **********************************************************************/ -/** CAN Receive Data 1 */ -#define CAN_RDA_DATA1(n) ((uint32_t)(n&0xFF)) -/** CAN Receive Data 2 */ -#define CAN_RDA_DATA2(n) ((uint32_t)((n&0xFF)<<8)) -/** CAN Receive Data 3 */ -#define CAN_RDA_DATA3(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Receive Data 4 */ -#define CAN_RDA_DATA4(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Receive Data B Register - **********************************************************************/ -/** CAN Receive Data 5 */ -#define CAN_RDB_DATA5(n) ((uint32_t)(n&0xFF)) -/** CAN Receive Data 6 */ -#define CAN_RDB_DATA6(n) ((uint32_t)((n&0xFF)<<8)) -/** CAN Receive Data 7 */ -#define CAN_RDB_DATA7(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Receive Data 8 */ -#define CAN_RDB_DATA8(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Transmit Frame Information Register - **********************************************************************/ -/** CAN Priority */ -#define CAN_TFI_PRIO(n) ((uint32_t)(n&0xFF)) -/** CAN Data Length Code */ -#define CAN_TFI_DLC(n) ((uint32_t)((n&0xF)<<16)) -/** CAN Remote Frame Transmission */ -#define CAN_TFI_RTR ((uint32_t)(1<<30)) -/** CAN control 11-bit or 29-bit Identifier */ -#define CAN_TFI_FF ((uint32_t)(1<<31)) - -/*********************************************************************//** - * Macro defines for CAN Transmit Identifier Register - **********************************************************************/ -/** CAN 11-bit Identifier */ -#define CAN_TID_ID11(n) ((uint32_t)(n&0x7FF)) -/** CAN 11-bit Identifier */ -#define CAN_TID_ID29(n) ((uint32_t)(n&0x1FFFFFFF)) - -/*********************************************************************//** - * Macro defines for CAN Transmit Data A Register - **********************************************************************/ -/** CAN Transmit Data 1 */ -#define CAN_TDA_DATA1(n) ((uint32_t)(n&0xFF)) -/** CAN Transmit Data 2 */ -#define CAN_TDA_DATA2(n) ((uint32_t)((n&0xFF)<<8)) -/** CAN Transmit Data 3 */ -#define CAN_TDA_DATA3(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Transmit Data 4 */ -#define CAN_TDA_DATA4(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Transmit Data B Register - **********************************************************************/ -/** CAN Transmit Data 5 */ -#define CAN_TDA_DATA5(n) ((uint32_t)(n&0xFF)) -/** CAN Transmit Data 6 */ -#define CAN_TDA_DATA6(n) ((uint32_t)((n&0xFF)<<8)) -/** CAN Transmit Data 7 */ -#define CAN_TDA_DATA7(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Transmit Data 8 */ -#define CAN_TDA_DATA8(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Sleep Clear Register - **********************************************************************/ -/** CAN1 Sleep mode */ -#define CAN1SLEEPCLR ((uint32_t)(1<<1)) -/** CAN2 Sleep Mode */ -#define CAN2SLEEPCLR ((uint32_t)(1<<2)) - -/*********************************************************************//** - * Macro defines for CAN Wake up Flags Register - **********************************************************************/ -/** CAN1 Sleep mode */ -#define CAN_WAKEFLAGES_CAN1WAKE ((uint32_t)(1<<1)) -/** CAN2 Sleep Mode */ -#define CAN_WAKEFLAGES_CAN2WAKE ((uint32_t)(1<<2)) - -/*********************************************************************//** - * Macro defines for Central transmit Status Register - **********************************************************************/ -/** CAN Transmit 1 */ -#define CAN_TSR_TS1 ((uint32_t)(1)) -/** CAN Transmit 2 */ -#define CAN_TSR_TS2 ((uint32_t)(1<<1)) -/** CAN Transmit Buffer Status 1 */ -#define CAN_TSR_TBS1 ((uint32_t)(1<<8)) -/** CAN Transmit Buffer Status 2 */ -#define CAN_TSR_TBS2 ((uint32_t)(1<<9)) -/** CAN Transmission Complete Status 1 */ -#define CAN_TSR_TCS1 ((uint32_t)(1<<16)) -/** CAN Transmission Complete Status 2 */ -#define CAN_TSR_TCS2 ((uint32_t)(1<<17)) - -/*********************************************************************//** - * Macro defines for Central Receive Status Register - **********************************************************************/ -/** CAN Receive Status 1 */ -#define CAN_RSR_RS1 ((uint32_t)(1)) -/** CAN Receive Status 1 */ -#define CAN_RSR_RS2 ((uint32_t)(1<<1)) -/** CAN Receive Buffer Status 1*/ -#define CAN_RSR_RB1 ((uint32_t)(1<<8)) -/** CAN Receive Buffer Status 2*/ -#define CAN_RSR_RB2 ((uint32_t)(1<<9)) -/** CAN Data Overrun Status 1 */ -#define CAN_RSR_DOS1 ((uint32_t)(1<<16)) -/** CAN Data Overrun Status 1 */ -#define CAN_RSR_DOS2 ((uint32_t)(1<<17)) - -/*********************************************************************//** - * Macro defines for Central Miscellaneous Status Register - **********************************************************************/ -/** Same CAN Error Status in CAN1GSR */ -#define CAN_MSR_E1 ((uint32_t)(1)) -/** Same CAN Error Status in CAN2GSR */ -#define CAN_MSR_E2 ((uint32_t)(1<<1)) -/** Same CAN Bus Status in CAN1GSR */ -#define CAN_MSR_BS1 ((uint32_t)(1<<8)) -/** Same CAN Bus Status in CAN2GSR */ -#define CAN_MSR_BS2 ((uint32_t)(1<<9)) - -/*********************************************************************//** - * Macro defines for Acceptance Filter Mode Register - **********************************************************************/ -/** CAN Acceptance Filter Off mode */ -#define CAN_AFMR_AccOff ((uint32_t)(1)) -/** CAN Acceptance File Bypass mode */ -#define CAN_AFMR_AccBP ((uint32_t)(1<<1)) -/** FullCAN Mode Enhancements */ -#define CAN_AFMR_eFCAN ((uint32_t)(1<<2)) - -/*********************************************************************//** - * Macro defines for Standard Frame Individual Start Address Register - **********************************************************************/ -/** The start address of the table of individual Standard Identifier */ -#define CAN_STT_sa(n) ((uint32_t)((n&1FF)<<2)) - -/*********************************************************************//** - * Macro defines for Standard Frame Group Start Address Register - **********************************************************************/ -/** The start address of the table of grouped Standard Identifier */ -#define CAN_SFF_GRP_sa(n) ((uint32_t)((n&3FF)<<2)) - -/*********************************************************************//** - * Macro defines for Extended Frame Start Address Register - **********************************************************************/ -/** The start address of the table of individual Extended Identifier */ -#define CAN_EFF_sa(n) ((uint32_t)((n&1FF)<<2)) - -/*********************************************************************//** - * Macro defines for Extended Frame Group Start Address Register - **********************************************************************/ -/** The start address of the table of grouped Extended Identifier */ -#define CAN_Eff_GRP_sa(n) ((uint32_t)((n&3FF)<<2)) - -/*********************************************************************//** - * Macro defines for End Of AF Table Register - **********************************************************************/ -/** The End of Table of AF LookUp Table */ -#define CAN_EndofTable(n) ((uint32_t)((n&3FF)<<2)) - -/*********************************************************************//** - * Macro defines for LUT Error Address Register - **********************************************************************/ -/** CAN Look-Up Table Error Address */ -#define CAN_LUTerrAd(n) ((uint32_t)((n&1FF)<<2)) - -/*********************************************************************//** - * Macro defines for LUT Error Register - **********************************************************************/ -/** CAN Look-Up Table Error */ -#define CAN_LUTerr ((uint32_t)(1)) - -/*********************************************************************//** - * Macro defines for Global FullCANInterrupt Enable Register - **********************************************************************/ -/** Global FullCANInterrupt Enable */ -#define CAN_FCANIE ((uint32_t)(1)) - -/*********************************************************************//** - * Macro defines for FullCAN Interrupt and Capture Register 0 - **********************************************************************/ -/** FullCAN Interrupt and Capture (0-31)*/ -#define CAN_FCANIC0_IntPnd(n) ((uint32_t)(1<<n)) - -/*********************************************************************//** - * Macro defines for FullCAN Interrupt and Capture Register 1 - **********************************************************************/ -/** FullCAN Interrupt and Capture (0-31)*/ -#define CAN_FCANIC1_IntPnd(n) ((uint32_t)(1<<(n-32))) - - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/** Macro to determine if it is valid CAN peripheral or not */ -#define PARAM_CANx(x) ((((uint32_t*)x)==((uint32_t *)LPC_CAN1)) \ -||(((uint32_t*)x)==((uint32_t *)LPC_CAN2))) - -/* Macro to determine if it is valid CANAF or not*/ -#define PARAM_CANAFx(x) (((uint32_t*)x)== ((uint32_t*)LPC_CANAF)) - -/* Macro to determine if it is valid CANAF RAM or not*/ -#define PARAM_CANAFRAMx(x) (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM) - -/* Macro to determine if it is valid CANCR or not*/ -#define PARAM_CANCRx(x) (((uint32_t*)x)==((uint32_t*)LPC_CANCR)) - -/** Macro to check Data to send valid */ -#define PARAM_I2S_DATA(data) ((data>=0)&&(data <= 0xFFFFFFFF)) - -/** Macro to check frequency value */ -#define PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000)) - -/** Macro to check Frame Identifier */ -#define PARAM_ID_11(n) ((n>>11)==0) /*-- 11 bit --*/ -#define PARAM_ID_29(n) ((n>>29)==0) /*-- 29 bit --*/ - -/** Macro to check DLC value */ -#define PARAM_DLC(n) ((n>>4)==0) /*-- 4 bit --*/ -/** Macro to check ID format type */ -#define PARAM_ID_FORMAT(n) ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT)) - -/** Macro to check Group identifier */ -#define PARAM_GRP_ID(x, y) ((x<=y)) - -/** Macro to check Frame type */ -#define PARAM_FRAME_TYPE(n) ((n==DATA_FRAME)||(n==REMOTE_FRAME)) - -/** Macro to check Control/Central Status type parameter */ -#define PARAM_CTRL_STS_TYPE(n) ((n==CANCTRL_GLOBAL_STS)||(n==CANCTRL_INT_CAP) \ -||(n==CANCTRL_ERR_WRN)||(n==CANCTRL_STS)) - -/** Macro to check CR status type */ -#define PARAM_CR_STS_TYPE(n) ((n==CANCR_TX_STS)||(n==CANCR_RX_STS) \ -||(n==CANCR_MS)) -/** Macro to check AF Mode type parameter */ -#define PARAM_AFMODE_TYPE(n) ((n==CAN_Normal)||(n==CAN_AccOff) \ -||(n==CAN_AccBP)||(n==CAN_eFCAN)) - -/** Macro to check Operation Mode */ -#define PARAM_MODE_TYPE(n) ((n==CAN_OPERATING_MODE)||(n==CAN_RESET_MODE) \ -||(n==CAN_LISTENONLY_MODE)||(n==CAN_SELFTEST_MODE) \ -||(n==CAN_TXPRIORITY_MODE)||(n==CAN_SLEEP_MODE) \ -||(n==CAN_RXPOLARITY_MODE)||(n==CAN_TEST_MODE)) - -/** Macro define for struct AF_Section parameter */ -#define PARAM_CTRL(n) ((n==CAN1_CTRL)|(n==CAN2_CTRL)) - -/** Macro define for struct AF_Section parameter */ -#define PARAM_MSG_DISABLE(n) ((n==MSG_ENABLE)|(n==MSG_DISABLE)) - -/**Macro to check Interrupt Type parameter */ -#define PARAM_INT_EN_TYPE(n) ((n==CANINT_RIE)||(n==CANINT_TIE1) \ -||(n==CANINT_EIE)||(n==CANINT_DOIE) \ -||(n==CANINT_WUIE)||(n==CANINT_EPIE) \ -||(n==CANINT_ALIE)||(n==CANINT_BEIE) \ -||(n==CANINT_IDIE)||(n==CANINT_TIE2) \ -||(n==CANINT_TIE3)||(n==CANINT_FCE)) - -/** Macro to check AFLUT Entry type */ -#define PARAM_AFLUT_ENTRY_TYPE(n) ((n==FULLCAN_ENTRY)||(n==EXPLICIT_STANDARD_ENTRY)\ -||(n==GROUP_STANDARD_ENTRY)||(n==EXPLICIT_EXTEND_ENTRY) \ -||(n==GROUP_EXTEND_ENTRY)) - -/** Macro to check position */ -#define PARAM_POSITION(n) ((n>=0)&&(n<512)) - -/** - * @} - */ - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup CAN_Public_Types CAN Public Types - * @{ - */ - -/** CAN configuration structure */ -/*********************************************************************** - * CAN device configuration commands (IOCTL commands and arguments) - **********************************************************************/ -/** - * @brief CAN ID format definition - */ -typedef enum { - STD_ID_FORMAT = 0, /**< Use standard ID format (11 bit ID) */ - EXT_ID_FORMAT = 1 /**< Use extended ID format (29 bit ID) */ -} CAN_ID_FORMAT_Type; - -/** - * @brief AFLUT Entry type definition - */ -typedef enum { - FULLCAN_ENTRY = 0, - EXPLICIT_STANDARD_ENTRY, - GROUP_STANDARD_ENTRY, - EXPLICIT_EXTEND_ENTRY, - GROUP_EXTEND_ENTRY -} AFLUT_ENTRY_Type; - -/** - * @brief Symbolic names for type of CAN message - */ -typedef enum { - DATA_FRAME = 0, /**< Data frame */ - REMOTE_FRAME = 1 /**< Remote frame */ -} CAN_FRAME_Type; - -/** - * @brief CAN Control status definition - */ -typedef enum { - CANCTRL_GLOBAL_STS = 0, /**< CAN Global Status */ - CANCTRL_INT_CAP, /**< CAN Interrupt and Capture */ - CANCTRL_ERR_WRN, /**< CAN Error Warning Limit */ - CANCTRL_STS /**< CAN Control Status */ -} CAN_CTRL_STS_Type; - -/** - * @brief Central CAN status type definition - */ -typedef enum { - CANCR_TX_STS = 0, /**< Central CAN Tx Status */ - CANCR_RX_STS, /**< Central CAN Rx Status */ - CANCR_MS /**< Central CAN Miscellaneous Status */ -} CAN_CR_STS_Type; - -/** - * @brief FullCAN Interrupt Capture type definition - */ -typedef enum{ - FULLCAN_IC0, /**< FullCAN Interrupt and Capture 0 */ - FULLCAN_IC1 /**< FullCAN Interrupt and Capture 1 */ -}FullCAN_IC_Type; - -/** - * @brief CAN interrupt enable type definition - */ -typedef enum { - CANINT_RIE = 0, /**< CAN Receiver Interrupt Enable */ - CANINT_TIE1, /**< CAN Transmit Interrupt Enable */ - CANINT_EIE, /**< CAN Error Warning Interrupt Enable */ - CANINT_DOIE, /**< CAN Data Overrun Interrupt Enable */ - CANINT_WUIE, /**< CAN Wake-Up Interrupt Enable */ - CANINT_EPIE, /**< CAN Error Passive Interrupt Enable */ - CANINT_ALIE, /**< CAN Arbitration Lost Interrupt Enable */ - CANINT_BEIE, /**< CAN Bus Error Inter rupt Enable */ - CANINT_IDIE, /**< CAN ID Ready Interrupt Enable */ - CANINT_TIE2, /**< CAN Transmit Interrupt Enable for Buffer2 */ - CANINT_TIE3, /**< CAN Transmit Interrupt Enable for Buffer3 */ - CANINT_FCE /**< FullCAN Interrupt Enable */ -} CAN_INT_EN_Type; - -/** - * @brief Acceptance Filter Mode type definition - */ -typedef enum { - CAN_Normal = 0, /**< Normal Mode */ - CAN_AccOff, /**< Acceptance Filter Off Mode */ - CAN_AccBP, /**< Acceptance Fileter Bypass Mode */ - CAN_eFCAN /**< FullCAN Mode Enhancement */ -} CAN_AFMODE_Type; - -/** - * @brief CAN Mode Type definition - */ -typedef enum { - CAN_OPERATING_MODE = 0, /**< Operating Mode */ - CAN_RESET_MODE, /**< Reset Mode */ - CAN_LISTENONLY_MODE, /**< Listen Only Mode */ - CAN_SELFTEST_MODE, /**< Seft Test Mode */ - CAN_TXPRIORITY_MODE, /**< Transmit Priority Mode */ - CAN_SLEEP_MODE, /**< Sleep Mode */ - CAN_RXPOLARITY_MODE, /**< Receive Polarity Mode */ - CAN_TEST_MODE /**< Test Mode */ -} CAN_MODE_Type; - -/** - * @brief Error values that functions can return - */ -typedef enum { - CAN_OK = 1, /**< No error */ - CAN_OBJECTS_FULL_ERROR, /**< No more rx or tx objects available */ - CAN_FULL_OBJ_NOT_RCV, /**< Full CAN object not received */ - CAN_NO_RECEIVE_DATA, /**< No have receive data available */ - CAN_AF_ENTRY_ERROR, /**< Entry load in AFLUT is unvalid */ - CAN_CONFLICT_ID_ERROR, /**< Conflict ID occur */ - CAN_ENTRY_NOT_EXIT_ERROR /**< Entry remove outo AFLUT is not exit */ -} CAN_ERROR; - -/** - * @brief Pin Configuration structure - */ -typedef struct { - uint8_t RD; /**< Serial Inputs, from CAN transceivers, should be: - ** For CAN1: - - CAN_RD1_P0_0: RD pin is on P0.0 - - CAN_RD1_P0_21 : RD pin is on P0.21 - ** For CAN2: - - CAN_RD2_P0_4: RD pin is on P0.4 - - CAN_RD2_P2_7: RD pin is on P2.7 - */ - uint8_t TD; /**< Serial Outputs, To CAN transceivers, should be: - ** For CAN1: - - CAN_TD1_P0_1: TD pin is on P0.1 - - CAN_TD1_P0_22: TD pin is on P0.22 - ** For CAN2: - - CAN_TD2_P0_5: TD pin is on P0.5 - - CAN_TD2_P2_8: TD pin is on P2.8 - */ -} CAN_PinCFG_Type; - -/** - * @brief CAN message object structure - */ -typedef struct { - uint32_t id; /**< 29 bit identifier, it depend on "format" value - - if format = STD_ID_FORMAT, id should be 11 bit identifier - - if format = EXT_ID_FORMAT, id should be 29 bit identifier - */ - uint8_t dataA[4]; /**< Data field A */ - uint8_t dataB[4]; /**< Data field B */ - uint8_t len; /**< Length of data field in bytes, should be: - - 0000b-0111b: 0-7 bytes - - 1xxxb: 8 bytes - */ - uint8_t format; /**< Identifier Format, should be: - - STD_ID_FORMAT: Standard ID - 11 bit format - - EXT_ID_FORMAT: Extended ID - 29 bit format - */ - uint8_t type; /**< Remote Frame transmission, should be: - - DATA_FRAME: the number of data bytes called out by the DLC - field are send from the CANxTDA and CANxTDB registers - - REMOTE_FRAME: Remote Frame is sent - */ -} CAN_MSG_Type; - -/** - * @brief FullCAN Entry structure - */ -typedef struct { - uint8_t controller; /**< CAN Controller, should be: - - CAN1_CTRL: CAN1 Controller - - CAN2_CTRL: CAN2 Controller - */ - uint8_t disable; /**< Disable bit, should be: - - MSG_ENABLE: disable bit = 0 - - MSG_DISABLE: disable bit = 1 - */ - uint16_t id_11; /**< Standard ID, should be 11-bit value */ -} FullCAN_Entry; - -/** - * @brief Standard ID Frame Format Entry structure - */ -typedef struct { - uint8_t controller; /**< CAN Controller, should be: - - CAN1_CTRL: CAN1 Controller - - CAN2_CTRL: CAN2 Controller - */ - uint8_t disable; /**< Disable bit, should be: - - MSG_ENABLE: disable bit = 0 - - MSG_DISABLE: disable bit = 1 - */ - uint16_t id_11; /**< Standard ID, should be 11-bit value */ -} SFF_Entry; - -/** - * @brief Group of Standard ID Frame Format Entry structure - */ -typedef struct { - uint8_t controller1; /**< First CAN Controller, should be: - - CAN1_CTRL: CAN1 Controller - - CAN2_CTRL: CAN2 Controller - */ - uint8_t disable1; /**< First Disable bit, should be: - - MSG_ENABLE: disable bit = 0) - - MSG_DISABLE: disable bit = 1 - */ - uint16_t lowerID; /**< ID lower bound, should be 11-bit value */ - uint8_t controller2; /**< Second CAN Controller, should be: - - CAN1_CTRL: CAN1 Controller - - CAN2_CTRL: CAN2 Controller - */ - uint8_t disable2; /**< Second Disable bit, should be: - - MSG_ENABLE: disable bit = 0 - - MSG_DISABLE: disable bit = 1 - */ - uint16_t upperID; /**< ID upper bound, should be 11-bit value and - equal or greater than lowerID - */ -} SFF_GPR_Entry; - -/** - * @brief Extended ID Frame Format Entry structure - */ -typedef struct { - uint8_t controller; /**< CAN Controller, should be: - - CAN1_CTRL: CAN1 Controller - - CAN2_CTRL: CAN2 Controller - */ - uint32_t ID_29; /**< Extend ID, shoud be 29-bit value */ -} EFF_Entry; - - -/** - * @brief Group of Extended ID Frame Format Entry structure - */ -typedef struct { - uint8_t controller1; /**< First CAN Controller, should be: - - CAN1_CTRL: CAN1 Controller - - CAN2_CTRL: CAN2 Controller - */ - uint8_t controller2; /**< Second Disable bit, should be: - - MSG_ENABLE: disable bit = 0(default) - - MSG_DISABLE: disable bit = 1 - */ - uint32_t lowerEID; /**< Extended ID lower bound, should be 29-bit value */ - uint32_t upperEID; /**< Extended ID upper bound, should be 29-bit value */ -} EFF_GPR_Entry; - - -/** - * @brief Acceptance Filter Section Table structure - */ -typedef struct { - FullCAN_Entry* FullCAN_Sec; /**< The pointer point to FullCAN_Entry */ - uint8_t FC_NumEntry; /**< FullCAN Entry Number */ - SFF_Entry* SFF_Sec; /**< The pointer point to SFF_Entry */ - uint8_t SFF_NumEntry; /**< Standard ID Entry Number */ - SFF_GPR_Entry* SFF_GPR_Sec; /**< The pointer point to SFF_GPR_Entry */ - uint8_t SFF_GPR_NumEntry; /**< Group Standard ID Entry Number */ - EFF_Entry* EFF_Sec; /**< The pointer point to EFF_Entry */ - uint8_t EFF_NumEntry; /**< Extended ID Entry Number */ - EFF_GPR_Entry* EFF_GPR_Sec; /**< The pointer point to EFF_GPR_Entry */ - uint8_t EFF_GPR_NumEntry; /**< Group Extended ID Entry Number */ -} AF_SectionDef; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup CAN_Public_Functions CAN Public Functions - * @{ - */ - -/* Init/DeInit CAN peripheral -----------*/ -void CAN_Init(LPC_CAN_TypeDef *CANx, uint32_t baudrate); -void CAN_DeInit(LPC_CAN_TypeDef *CANx); - -/* CAN messages functions ---------------*/ -Status CAN_SendMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg); -Status CAN_ReceiveMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg); -CAN_ERROR FCAN_ReadObj(LPC_CANAF_TypeDef* CANAFx, CAN_MSG_Type *CAN_Msg); - -/* CAN configure functions ---------------*/ -void CAN_ModeConfig(LPC_CAN_TypeDef* CANx, CAN_MODE_Type mode, - FunctionalState NewState); -void CAN_SetAFMode(LPC_CANAF_TypeDef* CANAFx, CAN_AFMODE_Type AFmode); -void CAN_SetCommand(LPC_CAN_TypeDef* CANx, uint32_t CMRType); - -/* AFLUT functions ---------------------- */ -CAN_ERROR CAN_SetupAFLUT(LPC_CANAF_TypeDef* CANAFx, AF_SectionDef* AFSection); -CAN_ERROR CAN_LoadFullCANEntry(LPC_CAN_TypeDef* CANx, uint16_t ID); -CAN_ERROR CAN_LoadExplicitEntry(LPC_CAN_TypeDef* CANx, uint32_t ID, - CAN_ID_FORMAT_Type format); -CAN_ERROR CAN_LoadGroupEntry(LPC_CAN_TypeDef* CANx, uint32_t lowerID, - uint32_t upperID, CAN_ID_FORMAT_Type format); -CAN_ERROR CAN_RemoveEntry(AFLUT_ENTRY_Type EntryType, uint16_t position); - -/* CAN interrupt functions -----------------*/ -void CAN_IRQCmd(LPC_CAN_TypeDef* CANx, CAN_INT_EN_Type arg, FunctionalState NewState); -uint32_t CAN_IntGetStatus(LPC_CAN_TypeDef* CANx); - -/* CAN get status functions ----------------*/ -IntStatus CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef* CANAFx); -uint32_t CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef* CANAFx, FullCAN_IC_Type type); -uint32_t CAN_GetCTRLStatus(LPC_CAN_TypeDef* CANx, CAN_CTRL_STS_Type arg); -uint32_t CAN_GetCRStatus(LPC_CANCR_TypeDef* CANCRx, CAN_CR_STS_Type arg); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_CAN_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_clkpwr.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,400 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_clkpwr.h 2010-05-21 -*//** -* @file lpc17xx_clkpwr.h -* @brief Contains all macro definitions and function prototypes -* support for Clock and Power Control firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup CLKPWR CLKPWR (Clock Power) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_CLKPWR_H_ -#define LPC17XX_CLKPWR_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup CLKPWR_Public_Macros CLKPWR Public Macros - * @{ - */ - -/********************************************************************** - * Peripheral Clock Selection Definitions - **********************************************************************/ -/** Peripheral clock divider bit position for WDT */ -#define CLKPWR_PCLKSEL_WDT ((uint32_t)(0)) -/** Peripheral clock divider bit position for TIMER0 */ -#define CLKPWR_PCLKSEL_TIMER0 ((uint32_t)(2)) -/** Peripheral clock divider bit position for TIMER1 */ -#define CLKPWR_PCLKSEL_TIMER1 ((uint32_t)(4)) -/** Peripheral clock divider bit position for UART0 */ -#define CLKPWR_PCLKSEL_UART0 ((uint32_t)(6)) -/** Peripheral clock divider bit position for UART1 */ -#define CLKPWR_PCLKSEL_UART1 ((uint32_t)(8)) -/** Peripheral clock divider bit position for PWM1 */ -#define CLKPWR_PCLKSEL_PWM1 ((uint32_t)(12)) -/** Peripheral clock divider bit position for I2C0 */ -#define CLKPWR_PCLKSEL_I2C0 ((uint32_t)(14)) -/** Peripheral clock divider bit position for SPI */ -#define CLKPWR_PCLKSEL_SPI ((uint32_t)(16)) -/** Peripheral clock divider bit position for SSP1 */ -#define CLKPWR_PCLKSEL_SSP1 ((uint32_t)(20)) -/** Peripheral clock divider bit position for DAC */ -#define CLKPWR_PCLKSEL_DAC ((uint32_t)(22)) -/** Peripheral clock divider bit position for ADC */ -#define CLKPWR_PCLKSEL_ADC ((uint32_t)(24)) -/** Peripheral clock divider bit position for CAN1 */ -#define CLKPWR_PCLKSEL_CAN1 ((uint32_t)(26)) -/** Peripheral clock divider bit position for CAN2 */ -#define CLKPWR_PCLKSEL_CAN2 ((uint32_t)(28)) -/** Peripheral clock divider bit position for ACF */ -#define CLKPWR_PCLKSEL_ACF ((uint32_t)(30)) -/** Peripheral clock divider bit position for QEI */ -#define CLKPWR_PCLKSEL_QEI ((uint32_t)(32)) -/** Peripheral clock divider bit position for PCB */ -#define CLKPWR_PCLKSEL_PCB ((uint32_t)(36)) -/** Peripheral clock divider bit position for I2C1 */ -#define CLKPWR_PCLKSEL_I2C1 ((uint32_t)(38)) -/** Peripheral clock divider bit position for SSP0 */ -#define CLKPWR_PCLKSEL_SSP0 ((uint32_t)(42)) -/** Peripheral clock divider bit position for TIMER2 */ -#define CLKPWR_PCLKSEL_TIMER2 ((uint32_t)(44)) -/** Peripheral clock divider bit position for TIMER3 */ -#define CLKPWR_PCLKSEL_TIMER3 ((uint32_t)(46)) -/** Peripheral clock divider bit position for UART2 */ -#define CLKPWR_PCLKSEL_UART2 ((uint32_t)(48)) -/** Peripheral clock divider bit position for UART3 */ -#define CLKPWR_PCLKSEL_UART3 ((uint32_t)(50)) -/** Peripheral clock divider bit position for I2C2 */ -#define CLKPWR_PCLKSEL_I2C2 ((uint32_t)(52)) -/** Peripheral clock divider bit position for I2S */ -#define CLKPWR_PCLKSEL_I2S ((uint32_t)(54)) -/** Peripheral clock divider bit position for RIT */ -#define CLKPWR_PCLKSEL_RIT ((uint32_t)(58)) -/** Peripheral clock divider bit position for SYSCON */ -#define CLKPWR_PCLKSEL_SYSCON ((uint32_t)(60)) -/** Peripheral clock divider bit position for MC */ -#define CLKPWR_PCLKSEL_MC ((uint32_t)(62)) - -/** Macro for Peripheral Clock Selection register bit values - * Note: When CCLK_DIV_8, Peripheral's clock is selected to - * PCLK_xyz = CCLK/8 except for CAN1, CAN2, and CAN filtering - * when '11'selects PCLK_xyz = CCLK/6 */ -/* Peripheral clock divider is set to 4 from CCLK */ -#define CLKPWR_PCLKSEL_CCLK_DIV_4 ((uint32_t)(0)) -/** Peripheral clock divider is the same with CCLK */ -#define CLKPWR_PCLKSEL_CCLK_DIV_1 ((uint32_t)(1)) -/** Peripheral clock divider is set to 2 from CCLK */ -#define CLKPWR_PCLKSEL_CCLK_DIV_2 ((uint32_t)(2)) - - -/******************************************************************** -* Power Control for Peripherals Definitions -**********************************************************************/ -/** Timer/Counter 0 power/clock control bit */ -#define CLKPWR_PCONP_PCTIM0 ((uint32_t)(1<<1)) -/* Timer/Counter 1 power/clock control bit */ -#define CLKPWR_PCONP_PCTIM1 ((uint32_t)(1<<2)) -/** UART0 power/clock control bit */ -#define CLKPWR_PCONP_PCUART0 ((uint32_t)(1<<3)) -/** UART1 power/clock control bit */ -#define CLKPWR_PCONP_PCUART1 ((uint32_t)(1<<4)) -/** PWM1 power/clock control bit */ -#define CLKPWR_PCONP_PCPWM1 ((uint32_t)(1<<6)) -/** The I2C0 interface power/clock control bit */ -#define CLKPWR_PCONP_PCI2C0 ((uint32_t)(1<<7)) -/** The SPI interface power/clock control bit */ -#define CLKPWR_PCONP_PCSPI ((uint32_t)(1<<8)) -/** The RTC power/clock control bit */ -#define CLKPWR_PCONP_PCRTC ((uint32_t)(1<<9)) -/** The SSP1 interface power/clock control bit */ -#define CLKPWR_PCONP_PCSSP1 ((uint32_t)(1<<10)) -/** A/D converter 0 (ADC0) power/clock control bit */ -#define CLKPWR_PCONP_PCAD ((uint32_t)(1<<12)) -/** CAN Controller 1 power/clock control bit */ -#define CLKPWR_PCONP_PCAN1 ((uint32_t)(1<<13)) -/** CAN Controller 2 power/clock control bit */ -#define CLKPWR_PCONP_PCAN2 ((uint32_t)(1<<14)) -/** GPIO power/clock control bit */ -#define CLKPWR_PCONP_PCGPIO ((uint32_t)(1<<15)) -/** Repetitive Interrupt Timer power/clock control bit */ -#define CLKPWR_PCONP_PCRIT ((uint32_t)(1<<16)) -/** Motor Control PWM */ -#define CLKPWR_PCONP_PCMC ((uint32_t)(1<<17)) -/** Quadrature Encoder Interface power/clock control bit */ -#define CLKPWR_PCONP_PCQEI ((uint32_t)(1<<18)) -/** The I2C1 interface power/clock control bit */ -#define CLKPWR_PCONP_PCI2C1 ((uint32_t)(1<<19)) -/** The SSP0 interface power/clock control bit */ -#define CLKPWR_PCONP_PCSSP0 ((uint32_t)(1<<21)) -/** Timer 2 power/clock control bit */ -#define CLKPWR_PCONP_PCTIM2 ((uint32_t)(1<<22)) -/** Timer 3 power/clock control bit */ -#define CLKPWR_PCONP_PCTIM3 ((uint32_t)(1<<23)) -/** UART 2 power/clock control bit */ -#define CLKPWR_PCONP_PCUART2 ((uint32_t)(1<<24)) -/** UART 3 power/clock control bit */ -#define CLKPWR_PCONP_PCUART3 ((uint32_t)(1<<25)) -/** I2C interface 2 power/clock control bit */ -#define CLKPWR_PCONP_PCI2C2 ((uint32_t)(1<<26)) -/** I2S interface power/clock control bit*/ -#define CLKPWR_PCONP_PCI2S ((uint32_t)(1<<27)) -/** GP DMA function power/clock control bit*/ -#define CLKPWR_PCONP_PCGPDMA ((uint32_t)(1<<29)) -/** Ethernet block power/clock control bit*/ -#define CLKPWR_PCONP_PCENET ((uint32_t)(1<<30)) -/** USB interface power/clock control bit*/ -#define CLKPWR_PCONP_PCUSB ((uint32_t)(1<<31)) - - -/** - * @} - */ -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup CLKPWR_Private_Macros CLKPWR Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/*********************************************************************//** - * Macro defines for Clock Source Select Register - **********************************************************************/ -/** Internal RC oscillator */ -#define CLKPWR_CLKSRCSEL_CLKSRC_IRC ((uint32_t)(0x00)) -/** Main oscillator */ -#define CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC ((uint32_t)(0x01)) -/** RTC oscillator */ -#define CLKPWR_CLKSRCSEL_CLKSRC_RTC ((uint32_t)(0x02)) -/** Clock source selection bit mask */ -#define CLKPWR_CLKSRCSEL_BITMASK ((uint32_t)(0x03)) - -/*********************************************************************//** - * Macro defines for Clock Output Configuration Register - **********************************************************************/ -/* Clock Output Configuration register definition */ -/** Selects the CPU clock as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU ((uint32_t)(0x00)) -/** Selects the main oscillator as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC ((uint32_t)(0x01)) -/** Selects the Internal RC oscillator as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RC ((uint32_t)(0x02)) -/** Selects the USB clock as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_USB ((uint32_t)(0x03)) -/** Selects the RTC oscillator as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC ((uint32_t)(0x04)) -/** Integer value to divide the output clock by, minus one */ -#define CLKPWR_CLKOUTCFG_CLKOUTDIV(n) ((uint32_t)((n&0x0F)<<4)) -/** CLKOUT enable control */ -#define CLKPWR_CLKOUTCFG_CLKOUT_EN ((uint32_t)(1<<8)) -/** CLKOUT activity indication */ -#define CLKPWR_CLKOUTCFG_CLKOUT_ACT ((uint32_t)(1<<9)) -/** Clock source selection bit mask */ -#define CLKPWR_CLKOUTCFG_BITMASK ((uint32_t)(0x3FF)) - -/*********************************************************************//** - * Macro defines for PPL0 Control Register - **********************************************************************/ -/** PLL 0 control enable */ -#define CLKPWR_PLL0CON_ENABLE ((uint32_t)(0x01)) -/** PLL 0 control connect */ -#define CLKPWR_PLL0CON_CONNECT ((uint32_t)(0x02)) -/** PLL 0 control bit mask */ -#define CLKPWR_PLL0CON_BITMASK ((uint32_t)(0x03)) - -/*********************************************************************//** - * Macro defines for PPL0 Configuration Register - **********************************************************************/ -/** PLL 0 Configuration MSEL field */ -#define CLKPWR_PLL0CFG_MSEL(n) ((uint32_t)(n&0x7FFF)) -/** PLL 0 Configuration NSEL field */ -#define CLKPWR_PLL0CFG_NSEL(n) ((uint32_t)((n<<16)&0xFF0000)) -/** PLL 0 Configuration bit mask */ -#define CLKPWR_PLL0CFG_BITMASK ((uint32_t)(0xFF7FFF)) - - -/*********************************************************************//** - * Macro defines for PPL0 Status Register - **********************************************************************/ -/** PLL 0 MSEL value */ -#define CLKPWR_PLL0STAT_MSEL(n) ((uint32_t)(n&0x7FFF)) -/** PLL NSEL get value */ -#define CLKPWR_PLL0STAT_NSEL(n) ((uint32_t)((n>>16)&0xFF)) -/** PLL status enable bit */ -#define CLKPWR_PLL0STAT_PLLE ((uint32_t)(1<<24)) -/** PLL status Connect bit */ -#define CLKPWR_PLL0STAT_PLLC ((uint32_t)(1<<25)) -/** PLL status lock */ -#define CLKPWR_PLL0STAT_PLOCK ((uint32_t)(1<<26)) - -/*********************************************************************//** - * Macro defines for PPL0 Feed Register - **********************************************************************/ -/** PLL0 Feed bit mask */ -#define CLKPWR_PLL0FEED_BITMASK ((uint32_t)0xFF) - -/*********************************************************************//** - * Macro defines for PLL1 Control Register - **********************************************************************/ -/** USB PLL control enable */ -#define CLKPWR_PLL1CON_ENABLE ((uint32_t)(0x01)) -/** USB PLL control connect */ -#define CLKPWR_PLL1CON_CONNECT ((uint32_t)(0x02)) -/** USB PLL control bit mask */ -#define CLKPWR_PLL1CON_BITMASK ((uint32_t)(0x03)) - -/*********************************************************************//** - * Macro defines for PLL1 Configuration Register - **********************************************************************/ -/** USB PLL MSEL set value */ -#define CLKPWR_PLL1CFG_MSEL(n) ((uint32_t)(n&0x1F)) -/** USB PLL PSEL set value */ -#define CLKPWR_PLL1CFG_PSEL(n) ((uint32_t)((n&0x03)<<5)) -/** USB PLL configuration bit mask */ -#define CLKPWR_PLL1CFG_BITMASK ((uint32_t)(0x7F)) - -/*********************************************************************//** - * Macro defines for PLL1 Status Register - **********************************************************************/ -/** USB PLL MSEL get value */ -#define CLKPWR_PLL1STAT_MSEL(n) ((uint32_t)(n&0x1F)) -/** USB PLL PSEL get value */ -#define CLKPWR_PLL1STAT_PSEL(n) ((uint32_t)((n>>5)&0x03)) -/** USB PLL status enable bit */ -#define CLKPWR_PLL1STAT_PLLE ((uint32_t)(1<<8)) -/** USB PLL status Connect bit */ -#define CLKPWR_PLL1STAT_PLLC ((uint32_t)(1<<9)) -/** USB PLL status lock */ -#define CLKPWR_PLL1STAT_PLOCK ((uint32_t)(1<<10)) - -/*********************************************************************//** - * Macro defines for PLL1 Feed Register - **********************************************************************/ -/** PLL1 Feed bit mask */ -#define CLKPWR_PLL1FEED_BITMASK ((uint32_t)0xFF) - -/*********************************************************************//** - * Macro defines for CPU Clock Configuration Register - **********************************************************************/ -/** CPU Clock configuration bit mask */ -#define CLKPWR_CCLKCFG_BITMASK ((uint32_t)(0xFF)) - -/*********************************************************************//** - * Macro defines for USB Clock Configuration Register - **********************************************************************/ -/** USB Clock Configuration bit mask */ -#define CLKPWR_USBCLKCFG_BITMASK ((uint32_t)(0x0F)) - -/*********************************************************************//** - * Macro defines for IRC Trim Register - **********************************************************************/ -/** IRC Trim bit mask */ -#define CLKPWR_IRCTRIM_BITMASK ((uint32_t)(0x0F)) - -/*********************************************************************//** - * Macro defines for Peripheral Clock Selection Register 0 and 1 - **********************************************************************/ -/** Peripheral Clock Selection 0 mask bit */ -#define CLKPWR_PCLKSEL0_BITMASK ((uint32_t)(0xFFF3F3FF)) -/** Peripheral Clock Selection 1 mask bit */ -#define CLKPWR_PCLKSEL1_BITMASK ((uint32_t)(0xFCF3F0F3)) -/** Macro to set peripheral clock of each type - * p: position of two bits that hold divider of peripheral clock - * n: value of divider of peripheral clock to be set */ -#define CLKPWR_PCLKSEL_SET(p,n) _SBF(p,n) -/** Macro to mask peripheral clock of each type */ -#define CLKPWR_PCLKSEL_BITMASK(p) _SBF(p,0x03) -/** Macro to get peripheral clock of each type */ -#define CLKPWR_PCLKSEL_GET(p, n) ((uint32_t)((n>>p)&0x03)) - -/*********************************************************************//** - * Macro defines for Power Mode Control Register - **********************************************************************/ -/** Power mode control bit 0 */ -#define CLKPWR_PCON_PM0 ((uint32_t)(1<<0)) -/** Power mode control bit 1 */ -#define CLKPWR_PCON_PM1 ((uint32_t)(1<<1)) -/** Brown-Out Reduced Power Mode */ -#define CLKPWR_PCON_BODPDM ((uint32_t)(1<<2)) -/** Brown-Out Global Disable */ -#define CLKPWR_PCON_BOGD ((uint32_t)(1<<3)) -/** Brown Out Reset Disable */ -#define CLKPWR_PCON_BORD ((uint32_t)(1<<4)) -/** Sleep Mode entry flag */ -#define CLKPWR_PCON_SMFLAG ((uint32_t)(1<<8)) -/** Deep Sleep entry flag */ -#define CLKPWR_PCON_DSFLAG ((uint32_t)(1<<9)) -/** Power-down entry flag */ -#define CLKPWR_PCON_PDFLAG ((uint32_t)(1<<10)) -/** Deep Power-down entry flag */ -#define CLKPWR_PCON_DPDFLAG ((uint32_t)(1<<11)) - -/*********************************************************************//** - * Macro defines for Power Control for Peripheral Register - **********************************************************************/ -/** Power Control for Peripherals bit mask */ -#define CLKPWR_PCONP_BITMASK 0xEFEFF7DE - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup CLKPWR_Public_Functions CLKPWR Public Functions - * @{ - */ - -void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal); -uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType); -uint32_t CLKPWR_GetPCLK (uint32_t ClkType); -void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState); -void CLKPWR_Sleep(void); -void CLKPWR_DeepSleep(void); -void CLKPWR_PowerDown(void); -void CLKPWR_DeepPowerDown(void); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_CLKPWR_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_dac.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,148 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_dac.h 2010-05-21 -*//** -* @file lpc17xx_dac.h -* @brief Contains all macro definitions and function prototypes -* support for Clock and Power Control firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup DAC DAC (Digital-to-Analog Controller) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_DAC_H_ -#define LPC17XX_DAC_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup DAC_Private_Macros DAC Private Macros - * @{ - */ - -/** After the selected settling time after this field is written with a -new VALUE, the voltage on the AOUT pin (with respect to VSSA) -is VALUE/1024 × VREF */ -#define DAC_VALUE(n) ((uint32_t)((n&0x3FF)<<6)) -/** If this bit = 0: The settling time of the DAC is 1 microsecond max, - * and the maximum current is 700 microAmpere - * If this bit = 1: The settling time of the DAC is 2.5 microsecond - * and the maximum current is 350 microAmpere */ -#define DAC_BIAS_EN ((uint32_t)(1<<16)) -/** Value to reload interrupt DMA counter */ -#define DAC_CCNT_VALUE(n) ((uint32_t)(n&0xffff)) - -/** DCAR double buffering */ -#define DAC_DBLBUF_ENA ((uint32_t)(1<<1)) -/** DCAR Time out count enable */ -#define DAC_CNT_ENA ((uint32_t)(1<<2)) -/** DCAR DMA access */ -#define DAC_DMA_ENA ((uint32_t)(1<<3)) -/** DCAR DACCTRL mask bit */ -#define DAC_DACCTRL_MASK ((uint32_t)(0x0F)) - -/** Macro to determine if it is valid DAC peripheral */ -#define PARAM_DACx(n) (((uint32_t *)n)==((uint32_t *)LPC_DAC)) - -/** Macro to check DAC current optional parameter */ -#define PARAM_DAC_CURRENT_OPT(OPTION) ((OPTION == DAC_MAX_CURRENT_700uA)\ -||(OPTION == DAC_MAX_CURRENT_350uA)) -/** - * @} - */ -/* Public Types --------------------------------------------------------------- */ -/** @defgroup DAC_Public_Types DAC Public Types - * @{ - */ - -/** - * @brief Current option in DAC configuration option */ -typedef enum -{ - DAC_MAX_CURRENT_700uA = 0, /*!< The settling time of the DAC is 1 us max, - and the maximum current is 700 uA */ - DAC_MAX_CURRENT_350uA /*!< The settling time of the DAC is 2.5 us - and the maximum current is 350 uA */ -} DAC_CURRENT_OPT; - -/** - * @brief Configuration for DAC converter control register */ -typedef struct -{ - - uint8_t DBLBUF_ENA; /**< - -0: Disable DACR double buffering - -1: when bit CNT_ENA, enable DACR double buffering feature - */ - uint8_t CNT_ENA; /*!< - -0: Time out counter is disable - -1: Time out conter is enable - */ - uint8_t DMA_ENA; /*!< - -0: DMA access is disable - -1: DMA burst request - */ - uint8_t RESERVED; - -} DAC_CONVERTER_CFG_Type; - -/** - * @} - */ - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup DAC_Public_Functions DAC Public Functions - * @{ - */ - -void DAC_Init(LPC_DAC_TypeDef *DACx); -void DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value); -void DAC_SetBias (LPC_DAC_TypeDef *DACx,uint32_t bias); -void DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx,DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct); -void DAC_SetDMATimeOut(LPC_DAC_TypeDef *DACx,uint32_t time_out); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* LPC17XX_DAC_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_emac.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,705 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_emac.h 2010-05-21 -*//** -* @file lpc17xx_emac.h -* @brief Contains all macro definitions and function prototypes -* support for Ethernet MAC firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup EMAC EMAC (Ethernet Media Access Controller) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_EMAC_H_ -#define LPC17XX_EMAC_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -#define MCB_LPC_1768 -//#define IAR_LPC_1768 - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup EMAC_Public_Macros EMAC Public Macros - * @{ - */ - - -/* EMAC PHY status type definitions */ -#define EMAC_PHY_STAT_LINK (0) /**< Link Status */ -#define EMAC_PHY_STAT_SPEED (1) /**< Speed Status */ -#define EMAC_PHY_STAT_DUP (2) /**< Duplex Status */ - -/* EMAC PHY device Speed definitions */ -#define EMAC_MODE_AUTO (0) /**< Auto-negotiation mode */ -#define EMAC_MODE_10M_FULL (1) /**< 10Mbps FullDuplex mode */ -#define EMAC_MODE_10M_HALF (2) /**< 10Mbps HalfDuplex mode */ -#define EMAC_MODE_100M_FULL (3) /**< 100Mbps FullDuplex mode */ -#define EMAC_MODE_100M_HALF (4) /**< 100Mbps HalfDuplex mode */ - -/** - * @} - */ -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup EMAC_Private_Macros EMAC Private Macros - * @{ - */ - - -/* EMAC Memory Buffer configuration for 16K Ethernet RAM */ -#define EMAC_NUM_RX_FRAG 4 /**< Num.of RX Fragments 4*1536= 6.0kB */ -#define EMAC_NUM_TX_FRAG 3 /**< Num.of TX Fragments 3*1536= 4.6kB */ -#define EMAC_ETH_MAX_FLEN 1536 /**< Max. Ethernet Frame Size */ -#define EMAC_TX_FRAME_TOUT 0x00100000 /**< Frame Transmit timeout count */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/*********************************************************************//** - * Macro defines for MAC Configuration Register 1 - **********************************************************************/ -#define EMAC_MAC1_REC_EN 0x00000001 /**< Receive Enable */ -#define EMAC_MAC1_PASS_ALL 0x00000002 /**< Pass All Receive Frames */ -#define EMAC_MAC1_RX_FLOWC 0x00000004 /**< RX Flow Control */ -#define EMAC_MAC1_TX_FLOWC 0x00000008 /**< TX Flow Control */ -#define EMAC_MAC1_LOOPB 0x00000010 /**< Loop Back Mode */ -#define EMAC_MAC1_RES_TX 0x00000100 /**< Reset TX Logic */ -#define EMAC_MAC1_RES_MCS_TX 0x00000200 /**< Reset MAC TX Control Sublayer */ -#define EMAC_MAC1_RES_RX 0x00000400 /**< Reset RX Logic */ -#define EMAC_MAC1_RES_MCS_RX 0x00000800 /**< Reset MAC RX Control Sublayer */ -#define EMAC_MAC1_SIM_RES 0x00004000 /**< Simulation Reset */ -#define EMAC_MAC1_SOFT_RES 0x00008000 /**< Soft Reset MAC */ - -/*********************************************************************//** - * Macro defines for MAC Configuration Register 2 - **********************************************************************/ -#define EMAC_MAC2_FULL_DUP 0x00000001 /**< Full-Duplex Mode */ -#define EMAC_MAC2_FRM_LEN_CHK 0x00000002 /**< Frame Length Checking */ -#define EMAC_MAC2_HUGE_FRM_EN 0x00000004 /**< Huge Frame Enable */ -#define EMAC_MAC2_DLY_CRC 0x00000008 /**< Delayed CRC Mode */ -#define EMAC_MAC2_CRC_EN 0x00000010 /**< Append CRC to every Frame */ -#define EMAC_MAC2_PAD_EN 0x00000020 /**< Pad all Short Frames */ -#define EMAC_MAC2_VLAN_PAD_EN 0x00000040 /**< VLAN Pad Enable */ -#define EMAC_MAC2_ADET_PAD_EN 0x00000080 /**< Auto Detect Pad Enable */ -#define EMAC_MAC2_PPREAM_ENF 0x00000100 /**< Pure Preamble Enforcement */ -#define EMAC_MAC2_LPREAM_ENF 0x00000200 /**< Long Preamble Enforcement */ -#define EMAC_MAC2_NO_BACKOFF 0x00001000 /**< No Backoff Algorithm */ -#define EMAC_MAC2_BACK_PRESSURE 0x00002000 /**< Backoff Presurre / No Backoff */ -#define EMAC_MAC2_EXCESS_DEF 0x00004000 /**< Excess Defer */ - -/*********************************************************************//** - * Macro defines for Back-to-Back Inter-Packet-Gap Register - **********************************************************************/ -/** Programmable field representing the nibble time offset of the minimum possible period - * between the end of any transmitted packet to the beginning of the next */ -#define EMAC_IPGT_BBIPG(n) (n&0x7F) -/** Recommended value for Full Duplex of Programmable field representing the nibble time - * offset of the minimum possible period between the end of any transmitted packet to the - * beginning of the next */ -#define EMAC_IPGT_FULL_DUP (EMAC_IPGT_BBIPG(0x15)) -/** Recommended value for Half Duplex of Programmable field representing the nibble time - * offset of the minimum possible period between the end of any transmitted packet to the - * beginning of the next */ -#define EMAC_IPGT_HALF_DUP (EMAC_IPGT_BBIPG(0x12)) - -/*********************************************************************//** - * Macro defines for Non Back-to-Back Inter-Packet-Gap Register - **********************************************************************/ -/** Programmable field representing the Non-Back-to-Back Inter-Packet-Gap */ -#define EMAC_IPGR_NBBIPG_P2(n) (n&0x7F) -/** Recommended value for Programmable field representing the Non-Back-to-Back Inter-Packet-Gap Part 1 */ -#define EMAC_IPGR_P2_DEF (EMAC_IPGR_NBBIPG_P2(0x12)) -/** Programmable field representing the optional carrierSense window referenced in - * IEEE 802.3/4.2.3.2.1 'Carrier Deference' */ -#define EMAC_IPGR_NBBIPG_P1(n) ((n&0x7F)<<8) -/** Recommended value for Programmable field representing the Non-Back-to-Back Inter-Packet-Gap Part 2 */ -#define EMAC_IPGR_P1_DEF EMAC_IPGR_NBBIPG_P1(0x0C) - -/*********************************************************************//** - * Macro defines for Collision Window/Retry Register - **********************************************************************/ -/** Programmable field specifying the number of retransmission attempts following a collision before - * aborting the packet due to excessive collisions */ -#define EMAC_CLRT_MAX_RETX(n) (n&0x0F) -/** Programmable field representing the slot time or collision window during which collisions occur - * in properly configured networks */ -#define EMAC_CLRT_COLL(n) ((n&0x3F)<<8) -/** Default value for Collision Window / Retry register */ -#define EMAC_CLRT_DEF ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37))) - -/*********************************************************************//** - * Macro defines for Maximum Frame Register - **********************************************************************/ -/** Represents a maximum receive frame of 1536 octets */ -#define EMAC_MAXF_MAXFRMLEN(n) (n&0xFFFF) - -/*********************************************************************//** - * Macro defines for PHY Support Register - **********************************************************************/ -#define EMAC_SUPP_SPEED 0x00000100 /**< Reduced MII Logic Current Speed */ -#define EMAC_SUPP_RES_RMII 0x00000800 /**< Reset Reduced MII Logic */ - -/*********************************************************************//** - * Macro defines for Test Register - **********************************************************************/ -#define EMAC_TEST_SHCUT_PQUANTA 0x00000001 /**< Shortcut Pause Quanta */ -#define EMAC_TEST_TST_PAUSE 0x00000002 /**< Test Pause */ -#define EMAC_TEST_TST_BACKP 0x00000004 /**< Test Back Pressure */ - -/*********************************************************************//** - * Macro defines for MII Management Configuration Register - **********************************************************************/ -#define EMAC_MCFG_SCAN_INC 0x00000001 /**< Scan Increment PHY Address */ -#define EMAC_MCFG_SUPP_PREAM 0x00000002 /**< Suppress Preamble */ -#define EMAC_MCFG_CLK_SEL(n) ((n&0x0F)<<2) /**< Clock Select Field */ -#define EMAC_MCFG_RES_MII 0x00008000 /**< Reset MII Management Hardware */ -#define EMAC_MCFG_MII_MAXCLK 2500000UL /**< MII Clock max */ - -/*********************************************************************//** - * Macro defines for MII Management Command Register - **********************************************************************/ -#define EMAC_MCMD_READ 0x00000001 /**< MII Read */ -#define EMAC_MCMD_SCAN 0x00000002 /**< MII Scan continuously */ - -#define EMAC_MII_WR_TOUT 0x00050000 /**< MII Write timeout count */ -#define EMAC_MII_RD_TOUT 0x00050000 /**< MII Read timeout count */ - -/*********************************************************************//** - * Macro defines for MII Management Address Register - **********************************************************************/ -#define EMAC_MADR_REG_ADR(n) (n&0x1F) /**< MII Register Address field */ -#define EMAC_MADR_PHY_ADR(n) ((n&0x1F)<<8) /**< PHY Address Field */ - -/*********************************************************************//** - * Macro defines for MII Management Write Data Register - **********************************************************************/ -#define EMAC_MWTD_DATA(n) (n&0xFFFF) /**< Data field for MMI Management Write Data register */ - -/*********************************************************************//** - * Macro defines for MII Management Read Data Register - **********************************************************************/ -#define EMAC_MRDD_DATA(n) (n&0xFFFF) /**< Data field for MMI Management Read Data register */ - -/*********************************************************************//** - * Macro defines for MII Management Indicators Register - **********************************************************************/ -#define EMAC_MIND_BUSY 0x00000001 /**< MII is Busy */ -#define EMAC_MIND_SCAN 0x00000002 /**< MII Scanning in Progress */ -#define EMAC_MIND_NOT_VAL 0x00000004 /**< MII Read Data not valid */ -#define EMAC_MIND_MII_LINK_FAIL 0x00000008 /**< MII Link Failed */ - -/* Station Address 0 Register */ -/* Station Address 1 Register */ -/* Station Address 2 Register */ - - -/* Control register definitions --------------------------------------------------------------------------- */ -/*********************************************************************//** - * Macro defines for Command Register - **********************************************************************/ -#define EMAC_CR_RX_EN 0x00000001 /**< Enable Receive */ -#define EMAC_CR_TX_EN 0x00000002 /**< Enable Transmit */ -#define EMAC_CR_REG_RES 0x00000008 /**< Reset Host Registers */ -#define EMAC_CR_TX_RES 0x00000010 /**< Reset Transmit Datapath */ -#define EMAC_CR_RX_RES 0x00000020 /**< Reset Receive Datapath */ -#define EMAC_CR_PASS_RUNT_FRM 0x00000040 /**< Pass Runt Frames */ -#define EMAC_CR_PASS_RX_FILT 0x00000080 /**< Pass RX Filter */ -#define EMAC_CR_TX_FLOW_CTRL 0x00000100 /**< TX Flow Control */ -#define EMAC_CR_RMII 0x00000200 /**< Reduced MII Interface */ -#define EMAC_CR_FULL_DUP 0x00000400 /**< Full Duplex */ - -/*********************************************************************//** - * Macro defines for Status Register - **********************************************************************/ -#define EMAC_SR_RX_EN 0x00000001 /**< Enable Receive */ -#define EMAC_SR_TX_EN 0x00000002 /**< Enable Transmit */ - -/*********************************************************************//** - * Macro defines for Transmit Status Vector 0 Register - **********************************************************************/ -#define EMAC_TSV0_CRC_ERR 0x00000001 /**< CRC error */ -#define EMAC_TSV0_LEN_CHKERR 0x00000002 /**< Length Check Error */ -#define EMAC_TSV0_LEN_OUTRNG 0x00000004 /**< Length Out of Range */ -#define EMAC_TSV0_DONE 0x00000008 /**< Tramsmission Completed */ -#define EMAC_TSV0_MCAST 0x00000010 /**< Multicast Destination */ -#define EMAC_TSV0_BCAST 0x00000020 /**< Broadcast Destination */ -#define EMAC_TSV0_PKT_DEFER 0x00000040 /**< Packet Deferred */ -#define EMAC_TSV0_EXC_DEFER 0x00000080 /**< Excessive Packet Deferral */ -#define EMAC_TSV0_EXC_COLL 0x00000100 /**< Excessive Collision */ -#define EMAC_TSV0_LATE_COLL 0x00000200 /**< Late Collision Occured */ -#define EMAC_TSV0_GIANT 0x00000400 /**< Giant Frame */ -#define EMAC_TSV0_UNDERRUN 0x00000800 /**< Buffer Underrun */ -#define EMAC_TSV0_BYTES 0x0FFFF000 /**< Total Bytes Transferred */ -#define EMAC_TSV0_CTRL_FRAME 0x10000000 /**< Control Frame */ -#define EMAC_TSV0_PAUSE 0x20000000 /**< Pause Frame */ -#define EMAC_TSV0_BACK_PRESS 0x40000000 /**< Backpressure Method Applied */ -#define EMAC_TSV0_VLAN 0x80000000 /**< VLAN Frame */ - -/*********************************************************************//** - * Macro defines for Transmit Status Vector 1 Register - **********************************************************************/ -#define EMAC_TSV1_BYTE_CNT 0x0000FFFF /**< Transmit Byte Count */ -#define EMAC_TSV1_COLL_CNT 0x000F0000 /**< Transmit Collision Count */ - -/*********************************************************************//** - * Macro defines for Receive Status Vector Register - **********************************************************************/ -#define EMAC_RSV_BYTE_CNT 0x0000FFFF /**< Receive Byte Count */ -#define EMAC_RSV_PKT_IGNORED 0x00010000 /**< Packet Previously Ignored */ -#define EMAC_RSV_RXDV_SEEN 0x00020000 /**< RXDV Event Previously Seen */ -#define EMAC_RSV_CARR_SEEN 0x00040000 /**< Carrier Event Previously Seen */ -#define EMAC_RSV_REC_CODEV 0x00080000 /**< Receive Code Violation */ -#define EMAC_RSV_CRC_ERR 0x00100000 /**< CRC Error */ -#define EMAC_RSV_LEN_CHKERR 0x00200000 /**< Length Check Error */ -#define EMAC_RSV_LEN_OUTRNG 0x00400000 /**< Length Out of Range */ -#define EMAC_RSV_REC_OK 0x00800000 /**< Frame Received OK */ -#define EMAC_RSV_MCAST 0x01000000 /**< Multicast Frame */ -#define EMAC_RSV_BCAST 0x02000000 /**< Broadcast Frame */ -#define EMAC_RSV_DRIB_NIBB 0x04000000 /**< Dribble Nibble */ -#define EMAC_RSV_CTRL_FRAME 0x08000000 /**< Control Frame */ -#define EMAC_RSV_PAUSE 0x10000000 /**< Pause Frame */ -#define EMAC_RSV_UNSUPP_OPC 0x20000000 /**< Unsupported Opcode */ -#define EMAC_RSV_VLAN 0x40000000 /**< VLAN Frame */ - -/*********************************************************************//** - * Macro defines for Flow Control Counter Register - **********************************************************************/ -#define EMAC_FCC_MIRR_CNT(n) (n&0xFFFF) /**< Mirror Counter */ -#define EMAC_FCC_PAUSE_TIM(n) ((n&0xFFFF)<<16) /**< Pause Timer */ - -/*********************************************************************//** - * Macro defines for Flow Control Status Register - **********************************************************************/ -#define EMAC_FCS_MIRR_CNT(n) (n&0xFFFF) /**< Mirror Counter Current */ - - -/* Receive filter register definitions -------------------------------------------------------- */ -/*********************************************************************//** - * Macro defines for Receive Filter Control Register - **********************************************************************/ -#define EMAC_RFC_UCAST_EN 0x00000001 /**< Accept Unicast Frames Enable */ -#define EMAC_RFC_BCAST_EN 0x00000002 /**< Accept Broadcast Frames Enable */ -#define EMAC_RFC_MCAST_EN 0x00000004 /**< Accept Multicast Frames Enable */ -#define EMAC_RFC_UCAST_HASH_EN 0x00000008 /**< Accept Unicast Hash Filter Frames */ -#define EMAC_RFC_MCAST_HASH_EN 0x00000010 /**< Accept Multicast Hash Filter Fram.*/ -#define EMAC_RFC_PERFECT_EN 0x00000020 /**< Accept Perfect Match Enable */ -#define EMAC_RFC_MAGP_WOL_EN 0x00001000 /**< Magic Packet Filter WoL Enable */ -#define EMAC_RFC_PFILT_WOL_EN 0x00002000 /**< Perfect Filter WoL Enable */ - -/*********************************************************************//** - * Macro defines for Receive Filter WoL Status/Clear Registers - **********************************************************************/ -#define EMAC_WOL_UCAST 0x00000001 /**< Unicast Frame caused WoL */ -#define EMAC_WOL_BCAST 0x00000002 /**< Broadcast Frame caused WoL */ -#define EMAC_WOL_MCAST 0x00000004 /**< Multicast Frame caused WoL */ -#define EMAC_WOL_UCAST_HASH 0x00000008 /**< Unicast Hash Filter Frame WoL */ -#define EMAC_WOL_MCAST_HASH 0x00000010 /**< Multicast Hash Filter Frame WoL */ -#define EMAC_WOL_PERFECT 0x00000020 /**< Perfect Filter WoL */ -#define EMAC_WOL_RX_FILTER 0x00000080 /**< RX Filter caused WoL */ -#define EMAC_WOL_MAG_PACKET 0x00000100 /**< Magic Packet Filter caused WoL */ -#define EMAC_WOL_BITMASK 0x01BF /**< Receive Filter WoL Status/Clear bitmasl value */ - - -/* Module control register definitions ---------------------------------------------------- */ -/*********************************************************************//** - * Macro defines for Interrupt Status/Enable/Clear/Set Registers - **********************************************************************/ -#define EMAC_INT_RX_OVERRUN 0x00000001 /**< Overrun Error in RX Queue */ -#define EMAC_INT_RX_ERR 0x00000002 /**< Receive Error */ -#define EMAC_INT_RX_FIN 0x00000004 /**< RX Finished Process Descriptors */ -#define EMAC_INT_RX_DONE 0x00000008 /**< Receive Done */ -#define EMAC_INT_TX_UNDERRUN 0x00000010 /**< Transmit Underrun */ -#define EMAC_INT_TX_ERR 0x00000020 /**< Transmit Error */ -#define EMAC_INT_TX_FIN 0x00000040 /**< TX Finished Process Descriptors */ -#define EMAC_INT_TX_DONE 0x00000080 /**< Transmit Done */ -#define EMAC_INT_SOFT_INT 0x00001000 /**< Software Triggered Interrupt */ -#define EMAC_INT_WAKEUP 0x00002000 /**< Wakeup Event Interrupt */ - -/*********************************************************************//** - * Macro defines for Power Down Register - **********************************************************************/ -#define EMAC_PD_POWER_DOWN 0x80000000 /**< Power Down MAC */ - -/* Descriptor and status formats ---------------------------------------------------- */ -/*********************************************************************//** - * Macro defines for RX Descriptor Control Word - **********************************************************************/ -#define EMAC_RCTRL_SIZE(n) (n&0x7FF) /**< Buffer size field */ -#define EMAC_RCTRL_INT 0x80000000 /**< Generate RxDone Interrupt */ - -/*********************************************************************//** - * Macro defines for RX Status Hash CRC Word - **********************************************************************/ -#define EMAC_RHASH_SA 0x000001FF /**< Hash CRC for Source Address */ -#define EMAC_RHASH_DA 0x001FF000 /**< Hash CRC for Destination Address */ - -/*********************************************************************//** - * Macro defines for RX Status Information Word - **********************************************************************/ -#define EMAC_RINFO_SIZE 0x000007FF /**< Data size in bytes */ -#define EMAC_RINFO_CTRL_FRAME 0x00040000 /**< Control Frame */ -#define EMAC_RINFO_VLAN 0x00080000 /**< VLAN Frame */ -#define EMAC_RINFO_FAIL_FILT 0x00100000 /**< RX Filter Failed */ -#define EMAC_RINFO_MCAST 0x00200000 /**< Multicast Frame */ -#define EMAC_RINFO_BCAST 0x00400000 /**< Broadcast Frame */ -#define EMAC_RINFO_CRC_ERR 0x00800000 /**< CRC Error in Frame */ -#define EMAC_RINFO_SYM_ERR 0x01000000 /**< Symbol Error from PHY */ -#define EMAC_RINFO_LEN_ERR 0x02000000 /**< Length Error */ -#define EMAC_RINFO_RANGE_ERR 0x04000000 /**< Range Error (exceeded max. size) */ -#define EMAC_RINFO_ALIGN_ERR 0x08000000 /**< Alignment Error */ -#define EMAC_RINFO_OVERRUN 0x10000000 /**< Receive overrun */ -#define EMAC_RINFO_NO_DESCR 0x20000000 /**< No new Descriptor available */ -#define EMAC_RINFO_LAST_FLAG 0x40000000 /**< Last Fragment in Frame */ -#define EMAC_RINFO_ERR 0x80000000 /**< Error Occured (OR of all errors) */ -#define EMAC_RINFO_ERR_MASK (EMAC_RINFO_FAIL_FILT | EMAC_RINFO_CRC_ERR | EMAC_RINFO_SYM_ERR | \ -EMAC_RINFO_LEN_ERR | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN) - -/*********************************************************************//** - * Macro defines for TX Descriptor Control Word - **********************************************************************/ -#define EMAC_TCTRL_SIZE 0x000007FF /**< Size of data buffer in bytes */ -#define EMAC_TCTRL_OVERRIDE 0x04000000 /**< Override Default MAC Registers */ -#define EMAC_TCTRL_HUGE 0x08000000 /**< Enable Huge Frame */ -#define EMAC_TCTRL_PAD 0x10000000 /**< Pad short Frames to 64 bytes */ -#define EMAC_TCTRL_CRC 0x20000000 /**< Append a hardware CRC to Frame */ -#define EMAC_TCTRL_LAST 0x40000000 /**< Last Descriptor for TX Frame */ -#define EMAC_TCTRL_INT 0x80000000 /**< Generate TxDone Interrupt */ - -/*********************************************************************//** - * Macro defines for TX Status Information Word - **********************************************************************/ -#define EMAC_TINFO_COL_CNT 0x01E00000 /**< Collision Count */ -#define EMAC_TINFO_DEFER 0x02000000 /**< Packet Deferred (not an error) */ -#define EMAC_TINFO_EXCESS_DEF 0x04000000 /**< Excessive Deferral */ -#define EMAC_TINFO_EXCESS_COL 0x08000000 /**< Excessive Collision */ -#define EMAC_TINFO_LATE_COL 0x10000000 /**< Late Collision Occured */ -#define EMAC_TINFO_UNDERRUN 0x20000000 /**< Transmit Underrun */ -#define EMAC_TINFO_NO_DESCR 0x40000000 /**< No new Descriptor available */ -#define EMAC_TINFO_ERR 0x80000000 /**< Error Occured (OR of all errors) */ - -#ifdef MCB_LPC_1768 -/* DP83848C PHY definition ------------------------------------------------------------ */ - -/** PHY device reset time out definition */ -#define EMAC_PHY_RESP_TOUT 0x100000UL - -/* ENET Device Revision ID */ -#define EMAC_OLD_EMAC_MODULE_ID 0x39022000 /**< Rev. ID for first rev '-' */ - -/*********************************************************************//** - * Macro defines for DP83848C PHY Registers - **********************************************************************/ -#define EMAC_PHY_REG_BMCR 0x00 /**< Basic Mode Control Register */ -#define EMAC_PHY_REG_BMSR 0x01 /**< Basic Mode Status Register */ -#define EMAC_PHY_REG_IDR1 0x02 /**< PHY Identifier 1 */ -#define EMAC_PHY_REG_IDR2 0x03 /**< PHY Identifier 2 */ -#define EMAC_PHY_REG_ANAR 0x04 /**< Auto-Negotiation Advertisement */ -#define EMAC_PHY_REG_ANLPAR 0x05 /**< Auto-Neg. Link Partner Abitily */ -#define EMAC_PHY_REG_ANER 0x06 /**< Auto-Neg. Expansion Register */ -#define EMAC_PHY_REG_ANNPTR 0x07 /**< Auto-Neg. Next Page TX */ -#define EMAC_PHY_REG_LPNPA 0x08 - -/*********************************************************************//** - * Macro defines for PHY Extended Registers - **********************************************************************/ -#define EMAC_PHY_REG_STS 0x10 /**< Status Register */ -#define EMAC_PHY_REG_MICR 0x11 /**< MII Interrupt Control Register */ -#define EMAC_PHY_REG_MISR 0x12 /**< MII Interrupt Status Register */ -#define EMAC_PHY_REG_FCSCR 0x14 /**< False Carrier Sense Counter */ -#define EMAC_PHY_REG_RECR 0x15 /**< Receive Error Counter */ -#define EMAC_PHY_REG_PCSR 0x16 /**< PCS Sublayer Config. and Status */ -#define EMAC_PHY_REG_RBR 0x17 /**< RMII and Bypass Register */ -#define EMAC_PHY_REG_LEDCR 0x18 /**< LED Direct Control Register */ -#define EMAC_PHY_REG_PHYCR 0x19 /**< PHY Control Register */ -#define EMAC_PHY_REG_10BTSCR 0x1A /**< 10Base-T Status/Control Register */ -#define EMAC_PHY_REG_CDCTRL1 0x1B /**< CD Test Control and BIST Extens. */ -#define EMAC_PHY_REG_EDCR 0x1D /**< Energy Detect Control Register */ - -/*********************************************************************//** - * Macro defines for PHY Basic Mode Control Register - **********************************************************************/ -#define EMAC_PHY_BMCR_RESET (1<<15) /**< Reset bit */ -#define EMAC_PHY_BMCR_LOOPBACK (1<<14) /**< Loop back */ -#define EMAC_PHY_BMCR_SPEED_SEL (1<<13) /**< Speed selection */ -#define EMAC_PHY_BMCR_AN (1<<12) /**< Auto Negotiation */ -#define EMAC_PHY_BMCR_POWERDOWN (1<<11) /**< Power down mode */ -#define EMAC_PHY_BMCR_ISOLATE (1<<10) /**< Isolate */ -#define EMAC_PHY_BMCR_RE_AN (1<<9) /**< Restart auto negotiation */ -#define EMAC_PHY_BMCR_DUPLEX (1<<8) /**< Duplex mode */ - -/*********************************************************************//** - * Macro defines for PHY Basic Mode Status Status Register - **********************************************************************/ -#define EMAC_PHY_BMSR_100BE_T4 (1<<15) /**< 100 base T4 */ -#define EMAC_PHY_BMSR_100TX_FULL (1<<14) /**< 100 base full duplex */ -#define EMAC_PHY_BMSR_100TX_HALF (1<<13) /**< 100 base half duplex */ -#define EMAC_PHY_BMSR_10BE_FULL (1<<12) /**< 10 base T full duplex */ -#define EMAC_PHY_BMSR_10BE_HALF (1<<11) /**< 10 base T half duplex */ -#define EMAC_PHY_BMSR_NOPREAM (1<<6) /**< MF Preamable Supress */ -#define EMAC_PHY_BMSR_AUTO_DONE (1<<5) /**< Auto negotiation complete */ -#define EMAC_PHY_BMSR_REMOTE_FAULT (1<<4) /**< Remote fault */ -#define EMAC_PHY_BMSR_NO_AUTO (1<<3) /**< Auto Negotiation ability */ -#define EMAC_PHY_BMSR_LINK_ESTABLISHED (1<<2) /**< Link status */ - -/*********************************************************************//** - * Macro defines for PHY Status Register - **********************************************************************/ -#define EMAC_PHY_SR_REMOTE_FAULT (1<<6) /**< Remote Fault */ -#define EMAC_PHY_SR_JABBER (1<<5) /**< Jabber detect */ -#define EMAC_PHY_SR_AUTO_DONE (1<<4) /**< Auto Negotiation complete */ -#define EMAC_PHY_SR_LOOPBACK (1<<3) /**< Loop back status */ -#define EMAC_PHY_SR_DUP (1<<2) /**< Duplex status */ -#define EMAC_PHY_SR_SPEED (1<<1) /**< Speed status */ -#define EMAC_PHY_SR_LINK (1<<0) /**< Link Status */ - -#define EMAC_PHY_FULLD_100M 0x2100 /**< Full Duplex 100Mbit */ -#define EMAC_PHY_HALFD_100M 0x2000 /**< Half Duplex 100Mbit */ -#define EMAC_PHY_FULLD_10M 0x0100 /**< Full Duplex 10Mbit */ -#define EMAC_PHY_HALFD_10M 0x0000 /**< Half Duplex 10MBit */ -#define EMAC_PHY_AUTO_NEG 0x3000 /**< Select Auto Negotiation */ - -#define EMAC_DEF_ADR 0x0100 /**< Default PHY device address */ -#define EMAC_DP83848C_ID 0x20005C90 /**< PHY Identifier */ - -#define EMAC_PHY_SR_100_SPEED ((1<<14)|(1<<13)) -#define EMAC_PHY_SR_FULL_DUP ((1<<14)|(1<<12)) -#define EMAC_PHY_BMSR_LINK_STATUS (1<<2) /**< Link status */ - -#elif defined(IAR_LPC_1768) -/* KSZ8721BL PHY definition ------------------------------------------------------------ */ -/** PHY device reset time out definition */ -#define EMAC_PHY_RESP_TOUT 0x100000UL - -/* ENET Device Revision ID */ -#define EMAC_OLD_EMAC_MODULE_ID 0x39022000 /**< Rev. ID for first rev '-' */ - -/*********************************************************************//** - * Macro defines for KSZ8721BL PHY Registers - **********************************************************************/ -#define EMAC_PHY_REG_BMCR 0x00 /**< Basic Mode Control Register */ -#define EMAC_PHY_REG_BMSR 0x01 /**< Basic Mode Status Register */ -#define EMAC_PHY_REG_IDR1 0x02 /**< PHY Identifier 1 */ -#define EMAC_PHY_REG_IDR2 0x03 /**< PHY Identifier 2 */ -#define EMAC_PHY_REG_ANAR 0x04 /**< Auto-Negotiation Advertisement */ -#define EMAC_PHY_REG_ANLPAR 0x05 /**< Auto-Neg. Link Partner Abitily */ -#define EMAC_PHY_REG_ANER 0x06 /**< Auto-Neg. Expansion Register */ -#define EMAC_PHY_REG_ANNPTR 0x07 /**< Auto-Neg. Next Page TX */ -#define EMAC_PHY_REG_LPNPA 0x08 /**< Link Partner Next Page Ability */ -#define EMAC_PHY_REG_REC 0x15 /**< RXError Counter Register */ -#define EMAC_PHY_REG_ISC 0x1b /**< Interrupt Control/Status Register */ -#define EMAC_PHY_REG_100BASE 0x1f /**< 100BASE-TX PHY Control Register */ - -/*********************************************************************//** - * Macro defines for PHY Basic Mode Control Register - **********************************************************************/ -#define EMAC_PHY_BMCR_RESET (1<<15) /**< Reset bit */ -#define EMAC_PHY_BMCR_LOOPBACK (1<<14) /**< Loop back */ -#define EMAC_PHY_BMCR_SPEED_SEL (1<<13) /**< Speed selection */ -#define EMAC_PHY_BMCR_AN (1<<12) /**< Auto Negotiation */ -#define EMAC_PHY_BMCR_POWERDOWN (1<<11) /**< Power down mode */ -#define EMAC_PHY_BMCR_ISOLATE (1<<10) /**< Isolate */ -#define EMAC_PHY_BMCR_RE_AN (1<<9) /**< Restart auto negotiation */ -#define EMAC_PHY_BMCR_DUPLEX (1<<8) /**< Duplex mode */ -#define EMAC_PHY_BMCR_COLLISION (1<<7) /**< Collision test */ -#define EMAC_PHY_BMCR_TXDIS (1<<0) /**< Disable transmit */ - -/*********************************************************************//** - * Macro defines for PHY Basic Mode Status Register - **********************************************************************/ -#define EMAC_PHY_BMSR_100BE_T4 (1<<15) /**< 100 base T4 */ -#define EMAC_PHY_BMSR_100TX_FULL (1<<14) /**< 100 base full duplex */ -#define EMAC_PHY_BMSR_100TX_HALF (1<<13) /**< 100 base half duplex */ -#define EMAC_PHY_BMSR_10BE_FULL (1<<12) /**< 10 base T full duplex */ -#define EMAC_PHY_BMSR_10BE_HALF (1<<11) /**< 10 base T half duplex */ -#define EMAC_PHY_BMSR_NOPREAM (1<<6) /**< MF Preamable Supress */ -#define EMAC_PHY_BMSR_AUTO_DONE (1<<5) /**< Auto negotiation complete */ -#define EMAC_PHY_BMSR_REMOTE_FAULT (1<<4) /**< Remote fault */ -#define EMAC_PHY_BMSR_NO_AUTO (1<<3) /**< Auto Negotiation ability */ -#define EMAC_PHY_BMSR_LINK_STATUS (1<<2) /**< Link status */ -#define EMAC_PHY_BMSR_JABBER_DETECT (1<<1) /**< Jabber detect */ -#define EMAC_PHY_BMSR_EXTEND (1<<0) /**< Extended support */ - -/*********************************************************************//** - * Macro defines for PHY Identifier - **********************************************************************/ -/* PHY Identifier 1 bitmap definitions */ -#define EMAC_PHY_IDR1(n) (n & 0xFFFF) /**< PHY ID1 Number */ - -/* PHY Identifier 2 bitmap definitions */ -#define EMAC_PHY_IDR2(n) (n & 0xFFFF) /**< PHY ID2 Number */ - -/*********************************************************************//** - * Macro defines for Auto-Negotiation Advertisement - **********************************************************************/ -#define EMAC_PHY_AN_NEXTPAGE (1<<15) /**< Next page capable */ -#define EMAC_PHY_AN_REMOTE_FAULT (1<<13) /**< Remote Fault support */ -#define EMAC_PHY_AN_PAUSE (1<<10) /**< Pause support */ -#define EMAC_PHY_AN_100BASE_T4 (1<<9) /**< T4 capable */ -#define EMAC_PHY_AN_100BASE_TX_FD (1<<8) /**< TX with Full-duplex capable */ -#define EMAC_PHY_AN_100BASE_TX (1<<7) /**< TX capable */ -#define EMAC_PHY_AN_10BASE_T_FD (1<<6) /**< 10Mbps with full-duplex capable */ -#define EMAC_PHY_AN_10BASE_T (1<<5) /**< 10Mbps capable */ -#define EMAC_PHY_AN_FIELD(n) (n & 0x1F) /**< Selector Field */ - -#define EMAC_PHY_FULLD_100M 0x2100 /**< Full Duplex 100Mbit */ -#define EMAC_PHY_HALFD_100M 0x2000 /**< Half Duplex 100Mbit */ -#define EMAC_PHY_FULLD_10M 0x0100 /**< Full Duplex 10Mbit */ -#define EMAC_PHY_HALFD_10M 0x0000 /**< Half Duplex 10MBit */ -#define EMAC_PHY_AUTO_NEG 0x3000 /**< Select Auto Negotiation */ - -#define EMAC_PHY_SR_100_SPEED ((1<<14)|(1<<13)) -#define EMAC_PHY_SR_FULL_DUP ((1<<14)|(1<<12)) - -#define EMAC_DEF_ADR (0x01<<8) /**< Default PHY device address */ -#define EMAC_KSZ8721BL_ID ((0x22 << 16) | 0x1619 ) /**< PHY Identifier */ -#endif - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup EMAC_Public_Types EMAC Public Types - * @{ - */ - -/* Descriptor and status formats ---------------------------------------------- */ - -/** - * @brief RX Descriptor structure type definition - */ -typedef struct { - uint32_t Packet; /**< Receive Packet Descriptor */ - uint32_t Ctrl; /**< Receive Control Descriptor */ -} RX_Desc; - -/** - * @brief RX Status structure type definition - */ -typedef struct { - uint32_t Info; /**< Receive Information Status */ - uint32_t HashCRC; /**< Receive Hash CRC Status */ -} RX_Stat; - -/** - * @brief TX Descriptor structure type definition - */ -typedef struct { - uint32_t Packet; /**< Transmit Packet Descriptor */ - uint32_t Ctrl; /**< Transmit Control Descriptor */ -} TX_Desc; - -/** - * @brief TX Status structure type definition - */ -typedef struct { - uint32_t Info; /**< Transmit Information Status */ -} TX_Stat; - - -/** - * @brief TX Data Buffer structure definition - */ -typedef struct { - uint32_t ulDataLen; /**< Data length */ - uint32_t *pbDataBuf; /**< A word-align data pointer to data buffer */ -} EMAC_PACKETBUF_Type; - -/** - * @brief EMAC configuration structure definition - */ -typedef struct { - uint32_t Mode; /**< Supported EMAC PHY device speed, should be one of the following: - - EMAC_MODE_AUTO - - EMAC_MODE_10M_FULL - - EMAC_MODE_10M_HALF - - EMAC_MODE_100M_FULL - - EMAC_MODE_100M_HALF - */ - uint8_t *pbEMAC_Addr; /**< Pointer to EMAC Station address that contains 6-bytes - of MAC address, it must be sorted in order (bEMAC_Addr[0]..[5]) - */ -} EMAC_CFG_Type; - - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup EMAC_Public_Functions EMAC Public Functions - * @{ - */ -/* Init/DeInit EMAC peripheral */ -Status EMAC_Init(EMAC_CFG_Type *EMAC_ConfigStruct); -void EMAC_DeInit(void); - -/* PHY functions --------------*/ -int32_t EMAC_CheckPHYStatus(uint32_t ulPHYState); -int32_t EMAC_SetPHYMode(uint32_t ulPHYMode); -int32_t EMAC_UpdatePHYStatus(void); - -/* Filter functions ----------*/ -void EMAC_SetHashFilter(uint8_t dstMAC_addr[], FunctionalState NewState); -void EMAC_SetFilterMode(uint32_t ulFilterMode, FunctionalState NewState); - -/* EMAC Packet Buffer functions */ -void EMAC_WritePacketBuffer(EMAC_PACKETBUF_Type *pDataStruct); -void EMAC_ReadPacketBuffer(EMAC_PACKETBUF_Type *pDataStruct); - -/* EMAC Interrupt functions -------*/ -void EMAC_IntCmd(uint32_t ulIntType, FunctionalState NewState); -IntStatus EMAC_IntGetStatus(uint32_t ulIntType); - -/* EMAC Index functions -----------*/ -Bool EMAC_CheckReceiveIndex(void); -Bool EMAC_CheckTransmitIndex(void); -void EMAC_UpdateRxConsumeIndex(void); -void EMAC_UpdateTxProduceIndex(void); - -FlagStatus EMAC_CheckReceiveDataStatus(uint32_t ulRxStatType); -uint32_t EMAC_GetReceiveDataSize(void); -FlagStatus EMAC_GetWoLStatus(uint32_t ulWoLMode); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_EMAC_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_exti.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,149 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_exti.h 2010-05-21 -*//** -* @file lpc17xx_exti.h -* @brief Contains all macro definitions and function prototypes -* support for External interrupt firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup EXTI EXTI (External Interrupt) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_EXTI_H_ -#define LPC17XX_EXTI_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup EXTI_Private_Macros EXTI Private Macros - * @{ - */ -/*********************************************************************//** - * Macro defines for EXTI control register - **********************************************************************/ -#define EXTI_EINT0_BIT_MARK 0x01 -#define EXTI_EINT1_BIT_MARK 0x02 -#define EXTI_EINT2_BIT_MARK 0x04 -#define EXTI_EINT3_BIT_MARK 0x08 - -/** - * @} - */ - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup EXTI_Public_Types EXTI Public Types - * @{ - */ - -/** - * @brief EXTI external interrupt line option - */ -typedef enum -{ - EXTI_EINT0, /*!< External interrupt 0, P2.10 */ - EXTI_EINT1, /*!< External interrupt 0, P2.11 */ - EXTI_EINT2, /*!< External interrupt 0, P2.12 */ - EXTI_EINT3 /*!< External interrupt 0, P2.13 */ -} EXTI_LINE_ENUM; - -/** - * @brief EXTI mode option - */ -typedef enum -{ - EXTI_MODE_LEVEL_SENSITIVE, /*!< Level sensitivity is selected */ - EXTI_MODE_EDGE_SENSITIVE /*!< Edge sensitivity is selected */ -} EXTI_MODE_ENUM; - -/** - * @brief EXTI polarity option - */ -typedef enum -{ - EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE, /*!< Low active or falling edge sensitive - depending on pin mode */ - EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE /*!< High active or rising edge sensitive - depending on pin mode */ -} EXTI_POLARITY_ENUM; - -/** - * @brief EXTI Initialize structure - */ -typedef struct -{ - EXTI_LINE_ENUM EXTI_Line; /*!<Select external interrupt pin (EINT0, EINT1, EINT 2, EINT3) */ - - EXTI_MODE_ENUM EXTI_Mode; /*!< Choose between Level-sensitivity or Edge sensitivity */ - - EXTI_POLARITY_ENUM EXTI_polarity; /*!< If EXTI mode is level-sensitive: this element use to select low or high active level - if EXTI mode is polarity-sensitive: this element use to select falling or rising edge */ - -}EXTI_InitTypeDef; - - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup EXTI_Public_Functions EXTI Public Functions - * @{ - */ - -void EXTI_Init(void); -void EXTI_DeInit(void); - -void EXTI_Config(EXTI_InitTypeDef *EXTICfg); -void EXTI_SetMode(EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode); -void EXTI_SetPolarity(EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity); -void EXTI_ClearEXTIFlag(EXTI_LINE_ENUM EXTILine); - - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - - -#endif /* LPC17XX_EXTI_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_gpdma.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,423 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_gpdma.h 2010-05-21 -*//** -* @file lpc17xx_gpdma.h -* @brief Contains all macro definitions and function prototypes -* support for GPDMA firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup GPDMA GPDMA (General Purpose Direct Memory Access) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_GPDMA_H_ -#define LPC17XX_GPDMA_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup GPDMA_Public_Macros GPDMA Public Macros - * @{ - */ - -/** DMA Connection number definitions */ -#define GPDMA_CONN_SSP0_Tx ((0UL)) /**< SSP0 Tx */ -#define GPDMA_CONN_SSP0_Rx ((1UL)) /**< SSP0 Rx */ -#define GPDMA_CONN_SSP1_Tx ((2UL)) /**< SSP1 Tx */ -#define GPDMA_CONN_SSP1_Rx ((3UL)) /**< SSP1 Rx */ -#define GPDMA_CONN_ADC ((4UL)) /**< ADC */ -#define GPDMA_CONN_I2S_Channel_0 ((5UL)) /**< I2S channel 0 */ -#define GPDMA_CONN_I2S_Channel_1 ((6UL)) /**< I2S channel 1 */ -#define GPDMA_CONN_DAC ((7UL)) /**< DAC */ -#define GPDMA_CONN_UART0_Tx ((8UL)) /**< UART0 Tx */ -#define GPDMA_CONN_UART0_Rx ((9UL)) /**< UART0 Rx */ -#define GPDMA_CONN_UART1_Tx ((10UL)) /**< UART1 Tx */ -#define GPDMA_CONN_UART1_Rx ((11UL)) /**< UART1 Rx */ -#define GPDMA_CONN_UART2_Tx ((12UL)) /**< UART2 Tx */ -#define GPDMA_CONN_UART2_Rx ((13UL)) /**< UART2 Rx */ -#define GPDMA_CONN_UART3_Tx ((14UL)) /**< UART3 Tx */ -#define GPDMA_CONN_UART3_Rx ((15UL)) /**< UART3 Rx */ -#define GPDMA_CONN_MAT0_0 ((16UL)) /**< MAT0.0 */ -#define GPDMA_CONN_MAT0_1 ((17UL)) /**< MAT0.1 */ -#define GPDMA_CONN_MAT1_0 ((18UL)) /**< MAT1.0 */ -#define GPDMA_CONN_MAT1_1 ((19UL)) /**< MAT1.1 */ -#define GPDMA_CONN_MAT2_0 ((20UL)) /**< MAT2.0 */ -#define GPDMA_CONN_MAT2_1 ((21UL)) /**< MAT2.1 */ -#define GPDMA_CONN_MAT3_0 ((22UL)) /**< MAT3.0 */ -#define GPDMA_CONN_MAT3_1 ((23UL)) /**< MAT3.1 */ - -/** GPDMA Transfer type definitions */ -#define GPDMA_TRANSFERTYPE_M2M ((0UL)) /**< Memory to memory - DMA control */ -#define GPDMA_TRANSFERTYPE_M2P ((1UL)) /**< Memory to peripheral - DMA control */ -#define GPDMA_TRANSFERTYPE_P2M ((2UL)) /**< Peripheral to memory - DMA control */ -#define GPDMA_TRANSFERTYPE_P2P ((3UL)) /**< Source peripheral to destination peripheral - DMA control */ - -/** Burst size in Source and Destination definitions */ -#define GPDMA_BSIZE_1 ((0UL)) /**< Burst size = 1 */ -#define GPDMA_BSIZE_4 ((1UL)) /**< Burst size = 4 */ -#define GPDMA_BSIZE_8 ((2UL)) /**< Burst size = 8 */ -#define GPDMA_BSIZE_16 ((3UL)) /**< Burst size = 16 */ -#define GPDMA_BSIZE_32 ((4UL)) /**< Burst size = 32 */ -#define GPDMA_BSIZE_64 ((5UL)) /**< Burst size = 64 */ -#define GPDMA_BSIZE_128 ((6UL)) /**< Burst size = 128 */ -#define GPDMA_BSIZE_256 ((7UL)) /**< Burst size = 256 */ - -/** Width in Source transfer width and Destination transfer width definitions */ -#define GPDMA_WIDTH_BYTE ((0UL)) /**< Width = 1 byte */ -#define GPDMA_WIDTH_HALFWORD ((1UL)) /**< Width = 2 bytes */ -#define GPDMA_WIDTH_WORD ((2UL)) /**< Width = 4 bytes */ - -/** DMA Request Select Mode definitions */ -#define GPDMA_REQSEL_UART ((0UL)) /**< UART TX/RX is selected */ -#define GPDMA_REQSEL_TIMER ((1UL)) /**< Timer match is selected */ - -/** - * @} - */ - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup GPDMA_Private_Macros GPDMA Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/*********************************************************************//** - * Macro defines for DMA Interrupt Status register - **********************************************************************/ -#define GPDMA_DMACIntStat_Ch(n) (((1UL<<n)&0xFF)) -#define GPDMA_DMACIntStat_BITMASK ((0xFF)) - -/*********************************************************************//** - * Macro defines for DMA Interrupt Terminal Count Request Status register - **********************************************************************/ -#define GPDMA_DMACIntTCStat_Ch(n) (((1UL<<n)&0xFF)) -#define GPDMA_DMACIntTCStat_BITMASK ((0xFF)) - -/*********************************************************************//** - * Macro defines for DMA Interrupt Terminal Count Request Clear register - **********************************************************************/ -#define GPDMA_DMACIntTCClear_Ch(n) (((1UL<<n)&0xFF)) -#define GPDMA_DMACIntTCClear_BITMASK ((0xFF)) - -/*********************************************************************//** - * Macro defines for DMA Interrupt Error Status register - **********************************************************************/ -#define GPDMA_DMACIntErrStat_Ch(n) (((1UL<<n)&0xFF)) -#define GPDMA_DMACIntErrStat_BITMASK ((0xFF)) - -/*********************************************************************//** - * Macro defines for DMA Interrupt Error Clear register - **********************************************************************/ -#define GPDMA_DMACIntErrClr_Ch(n) (((1UL<<n)&0xFF)) -#define GPDMA_DMACIntErrClr_BITMASK ((0xFF)) - -/*********************************************************************//** - * Macro defines for DMA Raw Interrupt Terminal Count Status register - **********************************************************************/ -#define GPDMA_DMACRawIntTCStat_Ch(n) (((1UL<<n)&0xFF)) -#define GPDMA_DMACRawIntTCStat_BITMASK ((0xFF)) - -/*********************************************************************//** - * Macro defines for DMA Raw Error Interrupt Status register - **********************************************************************/ -#define GPDMA_DMACRawIntErrStat_Ch(n) (((1UL<<n)&0xFF)) -#define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF)) - -/*********************************************************************//** - * Macro defines for DMA Enabled Channel register - **********************************************************************/ -#define GPDMA_DMACEnbldChns_Ch(n) (((1UL<<n)&0xFF)) -#define GPDMA_DMACEnbldChns_BITMASK ((0xFF)) - -/*********************************************************************//** - * Macro defines for DMA Software Burst Request register - **********************************************************************/ -#define GPDMA_DMACSoftBReq_Src(n) (((1UL<<n)&0xFFFF)) -#define GPDMA_DMACSoftBReq_BITMASK ((0xFFFF)) - -/*********************************************************************//** - * Macro defines for DMA Software Single Request register - **********************************************************************/ -#define GPDMA_DMACSoftSReq_Src(n) (((1UL<<n)&0xFFFF)) -#define GPDMA_DMACSoftSReq_BITMASK ((0xFFFF)) - -/*********************************************************************//** - * Macro defines for DMA Software Last Burst Request register - **********************************************************************/ -#define GPDMA_DMACSoftLBReq_Src(n) (((1UL<<n)&0xFFFF)) -#define GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF)) - -/*********************************************************************//** - * Macro defines for DMA Software Last Single Request register - **********************************************************************/ -#define GPDMA_DMACSoftLSReq_Src(n) (((1UL<<n)&0xFFFF)) -#define GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF)) - -/*********************************************************************//** - * Macro defines for DMA Configuration register - **********************************************************************/ -#define GPDMA_DMACConfig_E ((0x01)) /**< DMA Controller enable*/ -#define GPDMA_DMACConfig_M ((0x02)) /**< AHB Master endianness configuration*/ -#define GPDMA_DMACConfig_BITMASK ((0x03)) - -/*********************************************************************//** - * Macro defines for DMA Synchronization register - **********************************************************************/ -#define GPDMA_DMACSync_Src(n) (((1UL<<n)&0xFFFF)) -#define GPDMA_DMACSync_BITMASK ((0xFFFF)) - -/*********************************************************************//** - * Macro defines for DMA Request Select register - **********************************************************************/ -#define GPDMA_DMAReqSel_Input(n) (((1UL<<(n-8))&0xFF)) -#define GPDMA_DMAReqSel_BITMASK ((0xFF)) - -/*********************************************************************//** - * Macro defines for DMA Channel Linked List Item registers - **********************************************************************/ -/** DMA Channel Linked List Item registers bit mask*/ -#define GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC)) - -/*********************************************************************//** - * Macro defines for DMA channel control registers - **********************************************************************/ -#define GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0)) /**< Transfer size*/ -#define GPDMA_DMACCxControl_SBSize(n) (((n&0x07)<<12)) /**< Source burst size*/ -#define GPDMA_DMACCxControl_DBSize(n) (((n&0x07)<<15)) /**< Destination burst size*/ -#define GPDMA_DMACCxControl_SWidth(n) (((n&0x07)<<18)) /**< Source transfer width*/ -#define GPDMA_DMACCxControl_DWidth(n) (((n&0x07)<<21)) /**< Destination transfer width*/ -#define GPDMA_DMACCxControl_SI ((1UL<<26)) /**< Source increment*/ -#define GPDMA_DMACCxControl_DI ((1UL<<27)) /**< Destination increment*/ -#define GPDMA_DMACCxControl_Prot1 ((1UL<<28)) /**< Indicates that the access is in user mode or privileged mode*/ -#define GPDMA_DMACCxControl_Prot2 ((1UL<<29)) /**< Indicates that the access is bufferable or not bufferable*/ -#define GPDMA_DMACCxControl_Prot3 ((1UL<<30)) /**< Indicates that the access is cacheable or not cacheable*/ -#define GPDMA_DMACCxControl_I ((1UL<<31)) /**< Terminal count interrupt enable bit */ -/** DMA channel control registers bit mask */ -#define GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF)) - -/*********************************************************************//** - * Macro defines for DMA Channel Configuration registers - **********************************************************************/ -#define GPDMA_DMACCxConfig_E ((1UL<<0)) /**< DMA control enable*/ -#define GPDMA_DMACCxConfig_SrcPeripheral(n) (((n&0x1F)<<1)) /**< Source peripheral*/ -#define GPDMA_DMACCxConfig_DestPeripheral(n) (((n&0x1F)<<6)) /**< Destination peripheral*/ -#define GPDMA_DMACCxConfig_TransferType(n) (((n&0x7)<<11)) /**< This value indicates the type of transfer*/ -#define GPDMA_DMACCxConfig_IE ((1UL<<14)) /**< Interrupt error mask*/ -#define GPDMA_DMACCxConfig_ITC ((1UL<<15)) /**< Terminal count interrupt mask*/ -#define GPDMA_DMACCxConfig_L ((1UL<<16)) /**< Lock*/ -#define GPDMA_DMACCxConfig_A ((1UL<<17)) /**< Active*/ -#define GPDMA_DMACCxConfig_H ((1UL<<18)) /**< Halt*/ -/** DMA Channel Configuration registers bit mask */ -#define GPDMA_DMACCxConfig_BITMASK ((0x7FFFF)) - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/* Macros check GPDMA channel */ -#define PARAM_GPDMA_CHANNEL(n) ((n>=0) && (n<=7)) - -/* Macros check GPDMA connection type */ -#define PARAM_GPDMA_CONN(n) ((n==GPDMA_CONN_SSP0_Tx) || (n==GPDMA_CONN_SSP0_Rx) \ -|| (n==GPDMA_CONN_SSP1_Tx) || (n==GPDMA_CONN_SSP1_Rx) \ -|| (n==GPDMA_CONN_ADC) || (n==GPDMA_CONN_I2S_Channel_0) \ -|| (n==GPDMA_CONN_I2S_Channel_1) || (n==GPDMA_CONN_DAC) \ -|| (n==GPDMA_CONN_UART0_Tx) || (n==GPDMA_CONN_UART0_Rx) \ -|| (n==GPDMA_CONN_UART1_Tx) || (n==GPDMA_CONN_UART1_Rx) \ -|| (n==GPDMA_CONN_UART2_Tx) || (n==GPDMA_CONN_UART2_Rx) \ -|| (n==GPDMA_CONN_UART3_Tx) || (n==GPDMA_CONN_UART3_Rx) \ -|| (n==GPDMA_CONN_MAT0_0) || (n==GPDMA_CONN_MAT0_1) \ -|| (n==GPDMA_CONN_MAT1_0) || (n==GPDMA_CONN_MAT1_1) \ -|| (n==GPDMA_CONN_MAT2_0) || (n==GPDMA_CONN_MAT2_1) \ -|| (n==GPDMA_CONN_MAT3_0) || (n==GPDMA_CONN_MAT3_1)) - -/* Macros check GPDMA burst size type */ -#define PARAM_GPDMA_BSIZE(n) ((n==GPDMA_BSIZE_1) || (n==GPDMA_BSIZE_4) \ -|| (n==GPDMA_BSIZE_8) || (n==GPDMA_BSIZE_16) \ -|| (n==GPDMA_BSIZE_32) || (n==GPDMA_BSIZE_64) \ -|| (n==GPDMA_BSIZE_128) || (n==GPDMA_BSIZE_256)) - -/* Macros check GPDMA width type */ -#define PARAM_GPDMA_WIDTH(n) ((n==GPDMA_WIDTH_BYTE) || (n==GPDMA_WIDTH_HALFWORD) \ -|| (n==GPDMA_WIDTH_WORD)) - -/* Macros check GPDMA status type */ -#define PARAM_GPDMA_STAT(n) ((n==GPDMA_STAT_INT) || (n==GPDMA_STAT_INTTC) \ -|| (n==GPDMA_STAT_INTERR) || (n==GPDMA_STAT_RAWINTTC) \ -|| (n==GPDMA_STAT_RAWINTERR) || (n==GPDMA_STAT_ENABLED_CH)) - -/* Macros check GPDMA transfer type */ -#define PARAM_GPDMA_TRANSFERTYPE(n) ((n==GPDMA_TRANSFERTYPE_M2M)||(n==GPDMA_TRANSFERTYPE_M2P) \ -||(n==GPDMA_TRANSFERTYPE_P2M)||(n==GPDMA_TRANSFERTYPE_P2P)) - -/* Macros check GPDMA state clear type */ -#define PARAM_GPDMA_STATCLR(n) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR)) - -/* Macros check GPDMA request select type */ -#define PARAM_GPDMA_REQSEL(n) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER)) -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup GPDMA_Public_Types GPDMA Public Types - * @{ - */ - -/** - * @brief GPDMA Status enumeration - */ -typedef enum { - GPDMA_STAT_INT, /**< GPDMA Interrupt Status */ - GPDMA_STAT_INTTC, /**< GPDMA Interrupt Terminal Count Request Status */ - GPDMA_STAT_INTERR, /**< GPDMA Interrupt Error Status */ - GPDMA_STAT_RAWINTTC, /**< GPDMA Raw Interrupt Terminal Count Status */ - GPDMA_STAT_RAWINTERR, /**< GPDMA Raw Error Interrupt Status */ - GPDMA_STAT_ENABLED_CH /**< GPDMA Enabled Channel Status */ -} GPDMA_Status_Type; - -/** - * @brief GPDMA Interrupt clear status enumeration - */ -typedef enum{ - GPDMA_STATCLR_INTTC, /**< GPDMA Interrupt Terminal Count Request Clear */ - GPDMA_STATCLR_INTERR /**< GPDMA Interrupt Error Clear */ -}GPDMA_StateClear_Type; - -/** - * @brief GPDMA Channel configuration structure type definition - */ -typedef struct { - uint32_t ChannelNum; /**< DMA channel number, should be in - range from 0 to 7. - Note: DMA channel 0 has the highest priority - and DMA channel 7 the lowest priority. - */ - uint32_t TransferSize; /**< Length/Size of transfer */ - uint32_t TransferWidth; /**< Transfer width - used for TransferType is GPDMA_TRANSFERTYPE_M2M only */ - uint32_t SrcMemAddr; /**< Physical Source Address, used in case TransferType is chosen as - GPDMA_TRANSFERTYPE_M2M or GPDMA_TRANSFERTYPE_M2P */ - uint32_t DstMemAddr; /**< Physical Destination Address, used in case TransferType is chosen as - GPDMA_TRANSFERTYPE_M2M or GPDMA_TRANSFERTYPE_P2M */ - uint32_t TransferType; /**< Transfer Type, should be one of the following: - - GPDMA_TRANSFERTYPE_M2M: Memory to memory - DMA control - - GPDMA_TRANSFERTYPE_M2P: Memory to peripheral - DMA control - - GPDMA_TRANSFERTYPE_P2M: Peripheral to memory - DMA control - - GPDMA_TRANSFERTYPE_P2P: Source peripheral to destination peripheral - DMA control - */ - uint32_t SrcConn; /**< Peripheral Source Connection type, used in case TransferType is chosen as - GPDMA_TRANSFERTYPE_P2M or GPDMA_TRANSFERTYPE_P2P, should be one of - following: - - GPDMA_CONN_SSP0_Tx: SSP0, Tx - - GPDMA_CONN_SSP0_Rx: SSP0, Rx - - GPDMA_CONN_SSP1_Tx: SSP1, Tx - - GPDMA_CONN_SSP1_Rx: SSP1, Rx - - GPDMA_CONN_ADC: ADC - - GPDMA_CONN_I2S_Channel_0: I2S Channel 0 - - GPDMA_CONN_I2S_Channel_1: I2S Channel 1 - - GPDMA_CONN_DAC: DAC - - GPDMA_CONN_UART0_Tx_MAT0_0: UART0 Tx / MAT0.0 - - GPDMA_CONN_UART0_Rx_MAT0_1: UART0 Rx / MAT0.1 - - GPDMA_CONN_UART1_Tx_MAT1_0: UART1 Tx / MAT1.0 - - GPDMA_CONN_UART1_Rx_MAT1_1: UART1 Rx / MAT1.1 - - GPDMA_CONN_UART2_Tx_MAT2_0: UART2 Tx / MAT2.0 - - GPDMA_CONN_UART2_Rx_MAT2_1: UART2 Rx / MAT2.1 - - GPDMA_CONN_UART3_Tx_MAT3_0: UART3 Tx / MAT3.0 - - GPDMA_CONN_UART3_Rx_MAT3_1: UART3 Rx / MAT3.1 - */ - uint32_t DstConn; /**< Peripheral Destination Connection type, used in case TransferType is chosen as - GPDMA_TRANSFERTYPE_M2P or GPDMA_TRANSFERTYPE_P2P, should be one of - following: - - GPDMA_CONN_SSP0_Tx: SSP0, Tx - - GPDMA_CONN_SSP0_Rx: SSP0, Rx - - GPDMA_CONN_SSP1_Tx: SSP1, Tx - - GPDMA_CONN_SSP1_Rx: SSP1, Rx - - GPDMA_CONN_ADC: ADC - - GPDMA_CONN_I2S_Channel_0: I2S Channel 0 - - GPDMA_CONN_I2S_Channel_1: I2S Channel 1 - - GPDMA_CONN_DAC: DAC - - GPDMA_CONN_UART0_Tx_MAT0_0: UART0 Tx / MAT0.0 - - GPDMA_CONN_UART0_Rx_MAT0_1: UART0 Rx / MAT0.1 - - GPDMA_CONN_UART1_Tx_MAT1_0: UART1 Tx / MAT1.0 - - GPDMA_CONN_UART1_Rx_MAT1_1: UART1 Rx / MAT1.1 - - GPDMA_CONN_UART2_Tx_MAT2_0: UART2 Tx / MAT2.0 - - GPDMA_CONN_UART2_Rx_MAT2_1: UART2 Rx / MAT2.1 - - GPDMA_CONN_UART3_Tx_MAT3_0: UART3 Tx / MAT3.0 - - GPDMA_CONN_UART3_Rx_MAT3_1: UART3 Rx / MAT3.1 - */ - uint32_t DMALLI; /**< Linker List Item structure data address - if there's no Linker List, set as '0' - */ -} GPDMA_Channel_CFG_Type; - -/** - * @brief GPDMA Linker List Item structure type definition - */ -typedef struct { - uint32_t SrcAddr; /**< Source Address */ - uint32_t DstAddr; /**< Destination address */ - uint32_t NextLLI; /**< Next LLI address, otherwise set to '0' */ - uint32_t Control; /**< GPDMA Control of this LLI */ -} GPDMA_LLI_Type; - - -/** - * @} - */ - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup GPDMA_Public_Functions GPDMA Public Functions - * @{ - */ - -void GPDMA_Init(void); -//Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig, fnGPDMACbs_Type *pfnGPDMACbs); -Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig); -IntStatus GPDMA_IntGetStatus(GPDMA_Status_Type type, uint8_t channel); -void GPDMA_ClearIntPending(GPDMA_StateClear_Type type, uint8_t channel); -void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState); -//void GPDMA_IntHandler(void); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_GPDMA_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_gpio.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,171 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_gpio.h 2010-06-18 -*//** -* @file lpc17xx_gpio.h -* @brief Contains all macro definitions and function prototypes -* support for GPDMA firmware library on LPC17xx -* @version 3.0 -* @date 18. June. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup GPIO GPIO (General Purpose Input/Output) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_GPIO_H_ -#define LPC17XX_GPIO_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup GPIO_Public_Macros GPIO Public Macros - * @{ - */ - -/** Fast GPIO port 0 byte accessible definition */ -#define GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE)) -/** Fast GPIO port 1 byte accessible definition */ -#define GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE)) -/** Fast GPIO port 2 byte accessible definition */ -#define GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE)) -/** Fast GPIO port 3 byte accessible definition */ -#define GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE)) -/** Fast GPIO port 4 byte accessible definition */ -#define GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE)) - - -/** Fast GPIO port 0 half-word accessible definition */ -#define GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE)) -/** Fast GPIO port 1 half-word accessible definition */ -#define GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE)) -/** Fast GPIO port 2 half-word accessible definition */ -#define GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE)) -/** Fast GPIO port 3 half-word accessible definition */ -#define GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE)) -/** Fast GPIO port 4 half-word accessible definition */ -#define GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE)) - -/** - * @} - */ - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup GPIO_Public_Types GPIO Public Types - * @{ - */ - -/** - * @brief Fast GPIO port byte type definition - */ -typedef struct { - __IO uint8_t FIODIR[4]; /**< FIO direction register in byte-align */ - uint32_t RESERVED0[3]; /**< Reserved */ - __IO uint8_t FIOMASK[4]; /**< FIO mask register in byte-align */ - __IO uint8_t FIOPIN[4]; /**< FIO pin register in byte align */ - __IO uint8_t FIOSET[4]; /**< FIO set register in byte-align */ - __O uint8_t FIOCLR[4]; /**< FIO clear register in byte-align */ -} GPIO_Byte_TypeDef; - - -/** - * @brief Fast GPIO port half-word type definition - */ -typedef struct { - __IO uint16_t FIODIRL; /**< FIO direction register lower halfword part */ - __IO uint16_t FIODIRU; /**< FIO direction register upper halfword part */ - uint32_t RESERVED0[3]; /**< Reserved */ - __IO uint16_t FIOMASKL; /**< FIO mask register lower halfword part */ - __IO uint16_t FIOMASKU; /**< FIO mask register upper halfword part */ - __IO uint16_t FIOPINL; /**< FIO pin register lower halfword part */ - __IO uint16_t FIOPINU; /**< FIO pin register upper halfword part */ - __IO uint16_t FIOSETL; /**< FIO set register lower halfword part */ - __IO uint16_t FIOSETU; /**< FIO set register upper halfword part */ - __O uint16_t FIOCLRL; /**< FIO clear register lower halfword part */ - __O uint16_t FIOCLRU; /**< FIO clear register upper halfword part */ -} GPIO_HalfWord_TypeDef; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup GPIO_Public_Functions GPIO Public Functions - * @{ - */ - -/* GPIO style ------------------------------- */ -void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir); -void GPIO_SetValue(uint8_t portNum, uint32_t bitValue); -void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue); -uint32_t GPIO_ReadValue(uint8_t portNum); -void GPIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState); -FunctionalState GPIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState); -void GPIO_ClearInt(uint8_t portNum, uint32_t bitValue); - -/* FIO (word-accessible) style ------------------------------- */ -void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir); -void FIO_SetValue(uint8_t portNum, uint32_t bitValue); -void FIO_ClearValue(uint8_t portNum, uint32_t bitValue); -uint32_t FIO_ReadValue(uint8_t portNum); -void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue); -void FIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState); -FunctionalState FIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState); -void FIO_ClearInt(uint8_t portNum, uint32_t pinNum); - -/* FIO (halfword-accessible) style ------------------------------- */ -void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir); -void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue); -void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue); -void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue); -uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum); - -/* FIO (byte-accessible) style ------------------------------- */ -void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir); -void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue); -void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue); -void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue); -uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_GPIO_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_i2c.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,383 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_i2c.h 2010-05-21 -*//** -* @file lpc17xx_i2c.h -* @brief Contains all macro definitions and function prototypes -* support for I2C firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup I2C I2C (Inter-IC Control bus) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_I2C_H_ -#define LPC17XX_I2C_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup I2C_Private_Macros I2C Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/*******************************************************************//** - * I2C Control Set register description - *********************************************************************/ -#define I2C_I2CONSET_AA ((0x04)) /*!< Assert acknowledge flag */ -#define I2C_I2CONSET_SI ((0x08)) /*!< I2C interrupt flag */ -#define I2C_I2CONSET_STO ((0x10)) /*!< STOP flag */ -#define I2C_I2CONSET_STA ((0x20)) /*!< START flag */ -#define I2C_I2CONSET_I2EN ((0x40)) /*!< I2C interface enable */ - -/*******************************************************************//** - * I2C Control Clear register description - *********************************************************************/ -/** Assert acknowledge Clear bit */ -#define I2C_I2CONCLR_AAC ((1<<2)) -/** I2C interrupt Clear bit */ -#define I2C_I2CONCLR_SIC ((1<<3)) -/** START flag Clear bit */ -#define I2C_I2CONCLR_STAC ((1<<5)) -/** I2C interface Disable bit */ -#define I2C_I2CONCLR_I2ENC ((1<<6)) - -/********************************************************************//** - * I2C Status Code definition (I2C Status register) - *********************************************************************/ -/* Return Code in I2C status register */ -#define I2C_STAT_CODE_BITMASK ((0xF8)) - -/* I2C return status code definitions ----------------------------- */ - -/** No relevant information */ -#define I2C_I2STAT_NO_INF ((0xF8)) - -/* Master transmit mode -------------------------------------------- */ -/** A start condition has been transmitted */ -#define I2C_I2STAT_M_TX_START ((0x08)) -/** A repeat start condition has been transmitted */ -#define I2C_I2STAT_M_TX_RESTART ((0x10)) -/** SLA+W has been transmitted, ACK has been received */ -#define I2C_I2STAT_M_TX_SLAW_ACK ((0x18)) -/** SLA+W has been transmitted, NACK has been received */ -#define I2C_I2STAT_M_TX_SLAW_NACK ((0x20)) -/** Data has been transmitted, ACK has been received */ -#define I2C_I2STAT_M_TX_DAT_ACK ((0x28)) -/** Data has been transmitted, NACK has been received */ -#define I2C_I2STAT_M_TX_DAT_NACK ((0x30)) -/** Arbitration lost in SLA+R/W or Data bytes */ -#define I2C_I2STAT_M_TX_ARB_LOST ((0x38)) - -/* Master receive mode -------------------------------------------- */ -/** A start condition has been transmitted */ -#define I2C_I2STAT_M_RX_START ((0x08)) -/** A repeat start condition has been transmitted */ -#define I2C_I2STAT_M_RX_RESTART ((0x10)) -/** Arbitration lost */ -#define I2C_I2STAT_M_RX_ARB_LOST ((0x38)) -/** SLA+R has been transmitted, ACK has been received */ -#define I2C_I2STAT_M_RX_SLAR_ACK ((0x40)) -/** SLA+R has been transmitted, NACK has been received */ -#define I2C_I2STAT_M_RX_SLAR_NACK ((0x48)) -/** Data has been received, ACK has been returned */ -#define I2C_I2STAT_M_RX_DAT_ACK ((0x50)) -/** Data has been received, NACK has been return */ -#define I2C_I2STAT_M_RX_DAT_NACK ((0x58)) - -/* Slave receive mode -------------------------------------------- */ -/** Own slave address has been received, ACK has been returned */ -#define I2C_I2STAT_S_RX_SLAW_ACK ((0x60)) - -/** Arbitration lost in SLA+R/W as master */ -#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68)) -/** Own SLA+W has been received, ACK returned */ -//#define I2C_I2STAT_S_RX_SLAW_ACK ((0x68)) - -/** General call address has been received, ACK has been returned */ -#define I2C_I2STAT_S_RX_GENCALL_ACK ((0x70)) - -/** Arbitration lost in SLA+R/W (GENERAL CALL) as master */ -#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78)) -/** General call address has been received, ACK has been returned */ -//#define I2C_I2STAT_S_RX_GENCALL_ACK ((0x78)) - -/** Previously addressed with own SLV address; - * Data has been received, ACK has been return */ -#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80)) -/** Previously addressed with own SLA; - * Data has been received and NOT ACK has been return */ -#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88)) -/** Previously addressed with General Call; - * Data has been received and ACK has been return */ -#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90)) -/** Previously addressed with General Call; - * Data has been received and NOT ACK has been return */ -#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98)) -/** A STOP condition or repeated START condition has - * been received while still addressed as SLV/REC - * (Slave Receive) or SLV/TRX (Slave Transmit) */ -#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0)) - -/** Slave transmit mode */ -/** Own SLA+R has been received, ACK has been returned */ -#define I2C_I2STAT_S_TX_SLAR_ACK ((0xA8)) - -/** Arbitration lost in SLA+R/W as master */ -#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0)) -/** Own SLA+R has been received, ACK has been returned */ -//#define I2C_I2STAT_S_TX_SLAR_ACK ((0xB0)) - -/** Data has been transmitted, ACK has been received */ -#define I2C_I2STAT_S_TX_DAT_ACK ((0xB8)) -/** Data has been transmitted, NACK has been received */ -#define I2C_I2STAT_S_TX_DAT_NACK ((0xC0)) -/** Last data byte in I2DAT has been transmitted (AA = 0); - ACK has been received */ -#define I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8)) - -/** Time out in case of using I2C slave mode */ -#define I2C_SLAVE_TIME_OUT 0x10000UL - -/********************************************************************//** - * I2C Data register definition - *********************************************************************/ -/** Mask for I2DAT register*/ -#define I2C_I2DAT_BITMASK ((0xFF)) - -/** Idle data value will be send out in slave mode in case of the actual - * expecting data requested from the master is greater than its sending data - * length that can be supported */ -#define I2C_I2DAT_IDLE_CHAR (0xFF) - -/********************************************************************//** - * I2C Monitor mode control register description - *********************************************************************/ -#define I2C_I2MMCTRL_MM_ENA ((1<<0)) /**< Monitor mode enable */ -#define I2C_I2MMCTRL_ENA_SCL ((1<<1)) /**< SCL output enable */ -#define I2C_I2MMCTRL_MATCH_ALL ((1<<2)) /**< Select interrupt register match */ -#define I2C_I2MMCTRL_BITMASK ((0x07)) /**< Mask for I2MMCTRL register */ - -/********************************************************************//** - * I2C Data buffer register description - *********************************************************************/ -/** I2C Data buffer register bit mask */ -#define I2DATA_BUFFER_BITMASK ((0xFF)) - -/********************************************************************//** - * I2C Slave Address registers definition - *********************************************************************/ -/** General Call enable bit */ -#define I2C_I2ADR_GC ((1<<0)) -/** I2C Slave Address registers bit mask */ -#define I2C_I2ADR_BITMASK ((0xFF)) - -/********************************************************************//** - * I2C Mask Register definition - *********************************************************************/ -/** I2C Mask Register mask field */ -#define I2C_I2MASK_MASK(n) ((n&0xFE)) - -/********************************************************************//** - * I2C SCL HIGH duty cycle Register definition - *********************************************************************/ -/** I2C SCL HIGH duty cycle Register bit mask */ -#define I2C_I2SCLH_BITMASK ((0xFFFF)) - -/********************************************************************//** - * I2C SCL LOW duty cycle Register definition - *********************************************************************/ -/** I2C SCL LOW duty cycle Register bit mask */ -#define I2C_I2SCLL_BITMASK ((0xFFFF)) - -/* I2C status values */ -#define I2C_SETUP_STATUS_ARBF (1<<8) /**< Arbitration false */ -#define I2C_SETUP_STATUS_NOACKF (1<<9) /**< No ACK returned */ -#define I2C_SETUP_STATUS_DONE (1<<10) /**< Status DONE */ - -/*********************************************************************//** - * I2C monitor control configuration defines - **********************************************************************/ -#define I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL /**< SCL output enable */ -#define I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL /**< Select interrupt register match */ - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/* Macros check I2C slave address */ -#define PARAM_I2C_SLAVEADDR_CH(n) ((n>=0) && (n<=3)) - -/** Macro to determine if it is valid SSP port number */ -#define PARAM_I2Cx(n) ((((uint32_t *)n)==((uint32_t *)LPC_I2C0)) \ -|| (((uint32_t *)n)==((uint32_t *)LPC_I2C1)) \ -|| (((uint32_t *)n)==((uint32_t *)LPC_I2C2))) - -/* Macros check I2C monitor configuration type */ -#define PARAM_I2C_MONITOR_CFG(n) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL)) - -/** - * @} - */ - - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup I2C_Public_Types I2C Public Types - * @{ - */ - -/** - * @brief I2C Own slave address setting structure - */ -typedef struct { - uint8_t SlaveAddrChannel; /**< Slave Address channel in I2C control, - should be in range from 0..3 - */ - uint8_t SlaveAddr_7bit; /**< Value of 7-bit slave address */ - uint8_t GeneralCallState; /**< Enable/Disable General Call Functionality - when I2C control being in Slave mode, should be: - - ENABLE: Enable General Call function. - - DISABLE: Disable General Call function. - */ - uint8_t SlaveAddrMaskValue; /**< Any bit in this 8-bit value (bit 7:1) - which is set to '1' will cause an automatic compare on - the corresponding bit of the received address when it - is compared to the SlaveAddr_7bit value associated with this - mask register. In other words, bits in SlaveAddr_7bit value - which are masked are not taken into account in determining - an address match - */ -} I2C_OWNSLAVEADDR_CFG_Type; - - -/** - * @brief Master transfer setup data structure definitions - */ -typedef struct -{ - uint32_t sl_addr7bit; /**< Slave address in 7bit mode */ - uint8_t* tx_data; /**< Pointer to Transmit data - NULL if data transmit - is not used */ - uint32_t tx_length; /**< Transmit data length - 0 if data transmit - is not used*/ - uint32_t tx_count; /**< Current Transmit data counter */ - uint8_t* rx_data; /**< Pointer to Receive data - NULL if data receive - is not used */ - uint32_t rx_length; /**< Receive data length - 0 if data receive is - not used */ - uint32_t rx_count; /**< Current Receive data counter */ - uint32_t retransmissions_max; /**< Max Re-Transmission value */ - uint32_t retransmissions_count; /**< Current Re-Transmission counter */ - uint32_t status; /**< Current status of I2C activity */ - void (*callback)(void); /**< Pointer to Call back function when transmission complete - used in interrupt transfer mode */ -} I2C_M_SETUP_Type; - - -/** - * @brief Slave transfer setup data structure definitions - */ -typedef struct -{ - uint8_t* tx_data; - uint32_t tx_length; - uint32_t tx_count; - uint8_t* rx_data; - uint32_t rx_length; - uint32_t rx_count; - uint32_t status; - void (*callback)(void); -} I2C_S_SETUP_Type; - -/** - * @brief Transfer option type definitions - */ -typedef enum { - I2C_TRANSFER_POLLING = 0, /**< Transfer in polling mode */ - I2C_TRANSFER_INTERRUPT /**< Transfer in interrupt mode */ -} I2C_TRANSFER_OPT_Type; - - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup I2C_Public_Functions I2C Public Functions - * @{ - */ - -/* I2C Init/DeInit functions ---------- */ -void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate); -void I2C_DeInit(LPC_I2C_TypeDef* I2Cx); -//void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock); -void I2C_Cmd(LPC_I2C_TypeDef* I2Cx, FunctionalState NewState); - -/* I2C transfer data functions -------- */ -Status I2C_MasterTransferData(LPC_I2C_TypeDef *I2Cx, \ - I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt); -Status I2C_SlaveTransferData(LPC_I2C_TypeDef *I2Cx, \ - I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt); -uint32_t I2C_MasterTransferComplete(LPC_I2C_TypeDef *I2Cx); -uint32_t I2C_SlaveTransferComplete(LPC_I2C_TypeDef *I2Cx); - - -void I2C_SetOwnSlaveAddr(LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct); -uint8_t I2C_GetLastStatusCode(LPC_I2C_TypeDef* I2Cx); - -/* I2C Monitor functions ---------------*/ -void I2C_MonitorModeConfig(LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState); -void I2C_MonitorModeCmd(LPC_I2C_TypeDef *I2Cx, FunctionalState NewState); -uint8_t I2C_MonitorGetDatabuffer(LPC_I2C_TypeDef *I2Cx); -BOOL_8 I2C_MonitorHandler(LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size); - -/* I2C Interrupt handler functions ------*/ -void I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState); -void I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx); -void I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx); - - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_I2C_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_i2s.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,378 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_i2s.h 2011-06-06 -*//** -* @file lpc17xx_i2s.h -* @brief Contains all macro definitions and function prototypes -* support for I2S firmware library on LPC17xx -* @version 3.1 -* @date 06. June. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2011, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup I2S I2S (Inter-IC Sound bus) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_I2S_H_ -#define LPC17XX_I2S_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup I2S_Public_Macros I2S Public Macros - * @{ - */ - -/*********************************************************************//** - * I2S configuration parameter defines - **********************************************************************/ -/** I2S Wordwidth bit */ -#define I2S_WORDWIDTH_8 ((uint32_t)(0)) -#define I2S_WORDWIDTH_16 ((uint32_t)(1)) -#define I2S_WORDWIDTH_32 ((uint32_t)(3)) -/** I2S Channel bit */ -#define I2S_STEREO ((uint32_t)(0)) -#define I2S_MONO ((uint32_t)(1)) -/** I2S Master/Slave mode bit */ -#define I2S_MASTER_MODE ((uint8_t)(0)) -#define I2S_SLAVE_MODE ((uint8_t)(1)) -/** I2S Stop bit */ -#define I2S_STOP_ENABLE ((uint8_t)(1)) -#define I2S_STOP_DISABLE ((uint8_t)(0)) -/** I2S Reset bit */ -#define I2S_RESET_ENABLE ((uint8_t)(1)) -#define I2S_RESET_DISABLE ((uint8_t)(0)) -/** I2S Mute bit */ -#define I2S_MUTE_ENABLE ((uint8_t)(1)) -#define I2S_MUTE_DISABLE ((uint8_t)(0)) -/** I2S Transmit/Receive bit */ -#define I2S_TX_MODE ((uint8_t)(0)) -#define I2S_RX_MODE ((uint8_t)(1)) -/** I2S Clock Select bit */ -#define I2S_CLKSEL_FRDCLK ((uint8_t)(0)) -#define I2S_CLKSEL_MCLK ((uint8_t)(2)) -/** I2S 4-pin Mode bit */ -#define I2S_4PIN_ENABLE ((uint8_t)(1)) -#define I2S_4PIN_DISABLE ((uint8_t)(0)) -/** I2S MCLK Enable bit */ -#define I2S_MCLK_ENABLE ((uint8_t)(1)) -#define I2S_MCLK_DISABLE ((uint8_t)(0)) -/** I2S select DMA bit */ -#define I2S_DMA_1 ((uint8_t)(0)) -#define I2S_DMA_2 ((uint8_t)(1)) - -/** - * @} - */ - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup I2S_Private_Macros I2S Private Macros - * @{ - */ - -/*********************************************************************//** - * Macro defines for DAO-Digital Audio Output register - **********************************************************************/ -/** I2S wordwide - the number of bytes in data*/ -#define I2S_DAO_WORDWIDTH_8 ((uint32_t)(0)) /** 8 bit */ -#define I2S_DAO_WORDWIDTH_16 ((uint32_t)(1)) /** 16 bit */ -#define I2S_DAO_WORDWIDTH_32 ((uint32_t)(3)) /** 32 bit */ -/** I2S control mono or stereo format */ -#define I2S_DAO_MONO ((uint32_t)(1<<2)) -/** I2S control stop mode */ -#define I2S_DAO_STOP ((uint32_t)(1<<3)) -/** I2S control reset mode */ -#define I2S_DAO_RESET ((uint32_t)(1<<4)) -/** I2S control master/slave mode */ -#define I2S_DAO_SLAVE ((uint32_t)(1<<5)) -/** I2S word select half period minus one */ -#define I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6)) -/** I2S control mute mode */ -#define I2S_DAO_MUTE ((uint32_t)(1<<15)) - -/*********************************************************************//** - * Macro defines for DAI-Digital Audio Input register -**********************************************************************/ -/** I2S wordwide - the number of bytes in data*/ -#define I2S_DAI_WORDWIDTH_8 ((uint32_t)(0)) /** 8 bit */ -#define I2S_DAI_WORDWIDTH_16 ((uint32_t)(1)) /** 16 bit */ -#define I2S_DAI_WORDWIDTH_32 ((uint32_t)(3)) /** 32 bit */ -/** I2S control mono or stereo format */ -#define I2S_DAI_MONO ((uint32_t)(1<<2)) -/** I2S control stop mode */ -#define I2S_DAI_STOP ((uint32_t)(1<<3)) -/** I2S control reset mode */ -#define I2S_DAI_RESET ((uint32_t)(1<<4)) -/** I2S control master/slave mode */ -#define I2S_DAI_SLAVE ((uint32_t)(1<<5)) -/** I2S word select half period minus one (9 bits)*/ -#define I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6)) -/** I2S control mute mode */ -#define I2S_DAI_MUTE ((uint32_t)(1<<15)) - -/*********************************************************************//** - * Macro defines for STAT register (Status Feedback register) -**********************************************************************/ -/** I2S Status Receive or Transmit Interrupt */ -#define I2S_STATE_IRQ ((uint32_t)(1)) -/** I2S Status Receive or Transmit DMA1 */ -#define I2S_STATE_DMA1 ((uint32_t)(1<<1)) -/** I2S Status Receive or Transmit DMA2 */ -#define I2S_STATE_DMA2 ((uint32_t)(1<<2)) -/** I2S Status Current level of the Receive FIFO (5 bits)*/ -#define I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8)) -/** I2S Status Current level of the Transmit FIFO (5 bits)*/ -#define I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16)) - -/*********************************************************************//** - * Macro defines for DMA1 register (DMA1 Configuration register) -**********************************************************************/ -/** I2S control DMA1 for I2S receive */ -#define I2S_DMA1_RX_ENABLE ((uint32_t)(1)) -/** I2S control DMA1 for I2S transmit */ -#define I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1)) -/** I2S set FIFO level that trigger a receive DMA request on DMA1 */ -#define I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) -/** I2S set FIFO level that trigger a transmit DMA request on DMA1 */ -#define I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) - -/*********************************************************************//** - * Macro defines for DMA2 register (DMA2 Configuration register) -**********************************************************************/ -/** I2S control DMA2 for I2S receive */ -#define I2S_DMA2_RX_ENABLE ((uint32_t)(1)) -/** I2S control DMA1 for I2S transmit */ -#define I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1)) -/** I2S set FIFO level that trigger a receive DMA request on DMA1 */ -#define I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) -/** I2S set FIFO level that trigger a transmit DMA request on DMA1 */ -#define I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) - -/*********************************************************************//** -* Macro defines for IRQ register (Interrupt Request Control register) -**********************************************************************/ -/** I2S control I2S receive interrupt */ -#define I2S_IRQ_RX_ENABLE ((uint32_t)(1)) -/** I2S control I2S transmit interrupt */ -#define I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1)) -/** I2S set the FIFO level on which to create an irq request */ -#define I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) -/** I2S set the FIFO level on which to create an irq request */ -#define I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) - -/********************************************************************************//** - * Macro defines for TXRATE/RXRATE register (Transmit/Receive Clock Rate register) -*********************************************************************************/ -/** I2S Transmit MCLK rate denominator */ -#define I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) -/** I2S Transmit MCLK rate denominator */ -#define I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) -/** I2S Receive MCLK rate denominator */ -#define I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) -/** I2S Receive MCLK rate denominator */ -#define I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) - -/*************************************************************************************//** - * Macro defines for TXBITRATE & RXBITRATE register (Transmit/Receive Bit Rate register) -**************************************************************************************/ -#define I2S_TXBITRATE(n) ((uint32_t)(n&0x3F)) -#define I2S_RXBITRATE(n) ((uint32_t)(n&0x3F)) - -/**********************************************************************************//** - * Macro defines for TXMODE/RXMODE register (Transmit/Receive Mode Control register) -************************************************************************************/ -/** I2S Transmit select clock source (2 bits)*/ -#define I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) -/** I2S Transmit control 4-pin mode */ -#define I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) -/** I2S Transmit control the TX_MCLK output */ -#define I2S_TXMODE_MCENA ((uint32_t)(1<<3)) -/** I2S Receive select clock source */ -#define I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) -/** I2S Receive control 4-pin mode */ -#define I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) -/** I2S Receive control the TX_MCLK output */ -#define I2S_RXMODE_MCENA ((uint32_t)(1<<3)) - - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/** Macro to determine if it is valid I2S peripheral */ -#define PARAM_I2Sx(n) (((uint32_t *)n)==((uint32_t *)LPC_I2S)) -/** Macro to check Data to send valid */ -#define PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000)) -/* Macro check I2S word width type */ -#define PARAM_I2S_WORDWIDTH(n) ((n==I2S_WORDWIDTH_8)||(n==I2S_WORDWIDTH_16)\ -||(n==I2S_WORDWIDTH_32)) -/* Macro check I2S channel type */ -#define PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO)) -/* Macro check I2S master/slave mode */ -#define PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE)) -/* Macro check I2S stop mode */ -#define PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE)) -/* Macro check I2S reset mode */ -#define PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE)) -/* Macro check I2S reset mode */ -#define PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE)) -/* Macro check I2S transmit/receive mode */ -#define PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE)) -/* Macro check I2S clock select mode */ -#define PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK)) -/* Macro check I2S 4-pin mode */ -#define PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE)) -/* Macro check I2S MCLK mode */ -#define PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE)) -/* Macro check I2S DMA mode */ -#define PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2)) -/* Macro check I2S DMA depth value */ -#define PARAM_I2S_DMA_DEPTH(n) (n<=31) -/* Macro check I2S irq level value */ -#define PARAM_I2S_IRQ_LEVEL(n) (n<=31) -/* Macro check I2S half-period value */ -#define PARAM_I2S_HALFPERIOD(n) (n<512) -/* Macro check I2S bit-rate value */ -#define PARAM_I2S_BITRATE(n) (n<=63) -/** - * @} - */ - - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup I2S_Public_Types I2S Public Types - * @{ - */ - -/** - * @brief I2S configuration structure definition - */ -typedef struct { - uint8_t wordwidth; /** the number of bytes in data as follow: - -I2S_WORDWIDTH_8: 8 bit data - -I2S_WORDWIDTH_16: 16 bit data - -I2S_WORDWIDTH_32: 32 bit data */ - uint8_t mono; /** Set mono/stereo mode, should be: - - I2S_STEREO: stereo mode - - I2S_MONO: mono mode */ - uint8_t stop; /** Disables accesses on FIFOs, should be: - - I2S_STOP_ENABLE: enable stop mode - - I2S_STOP_DISABLE: disable stop mode */ - uint8_t reset; /** Asynchronously reset tje transmit channel and FIFO, should be: - - I2S_RESET_ENABLE: enable reset mode - - I2S_RESET_DISABLE: disable reset mode */ - uint8_t ws_sel; /** Set Master/Slave mode, should be: - - I2S_MASTER_MODE: I2S master mode - - I2S_SLAVE_MODE: I2S slave mode */ - uint8_t mute; /** MUTE mode: when true, the transmit channel sends only zeroes, shoule be: - - I2S_MUTE_ENABLE: enable mute mode - - I2S_MUTE_DISABLE: disable mute mode */ - uint8_t Reserved0[2]; -} I2S_CFG_Type; - -/** - * @brief I2S DMA configuration structure definition - */ -typedef struct { - uint8_t DMAIndex; /** Select DMA1 or DMA2, should be: - - I2S_DMA_1: DMA1 - - I2S_DMA_2: DMA2 */ - uint8_t depth; /** FIFO level that triggers a DMA request */ - uint8_t Reserved0[2]; -}I2S_DMAConf_Type; - -/** - * @brief I2S mode configuration structure definition - */ -typedef struct{ - uint8_t clksel; /** Clock source selection, should be: - - I2S_CLKSEL_FRDCLK: Select the fractional rate divider clock output - - I2S_CLKSEL_MCLK: Select the MCLK signal as the clock source */ - uint8_t fpin; /** Select four pin mode, should be: - - I2S_4PIN_ENABLE: 4-pin enable - - I2S_4PIN_DISABLE: 4-pin disable */ - uint8_t mcena; /** Select MCLK mode, should be: - - I2S_MCLK_ENABLE: MCLK enable for output - - I2S_MCLK_DISABLE: MCLK disable for output */ - uint8_t Reserved; -}I2S_MODEConf_Type; - - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup I2S_Public_Functions I2S Public Functions - * @{ - */ -/* I2S Init/DeInit functions ---------*/ -void I2S_Init(LPC_I2S_TypeDef *I2Sx); -void I2S_DeInit(LPC_I2S_TypeDef *I2Sx); - -/* I2S configuration functions --------*/ -void I2S_Config(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct); -Status I2S_FreqConfig(LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode); -void I2S_SetBitRate(LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode); -void I2S_ModeConfig(LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type* ModeConfig, uint8_t TRMode); -uint8_t I2S_GetLevel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); - -/* I2S operate functions -------------*/ -void I2S_Send(LPC_I2S_TypeDef *I2Sx, uint32_t BufferData); -uint32_t I2S_Receive(LPC_I2S_TypeDef* I2Sx); -void I2S_Start(LPC_I2S_TypeDef *I2Sx); -void I2S_Pause(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); -void I2S_Mute(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); -void I2S_Stop(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); - -/* I2S DMA functions ----------------*/ -void I2S_DMAConfig(LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type* DMAConfig, uint8_t TRMode); -void I2S_DMACmd(LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex,uint8_t TRMode, FunctionalState NewState); - -/* I2S IRQ functions ----------------*/ -void I2S_IRQCmd(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode, FunctionalState NewState); -void I2S_IRQConfig(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level); -FunctionalState I2S_GetIRQStatus(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode); -uint8_t I2S_GetIRQDepth(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - - -#endif /* LPC17XX_SSP_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_libcfg_default.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,176 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_libcfg_default.h 2010-05-21 -*//** -* @file lpc17xx_libcfg_default.h -* @brief Default Library configuration header file -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Library Configuration group ----------------------------------------------------------- */ -/** @defgroup LIBCFG_DEFAULT LIBCFG_DEFAULT (Default Library Configuration) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_LIBCFG_DEFAULT_H_ -#define LPC17XX_LIBCFG_DEFAULT_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc_types.h" - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup LIBCFG_DEFAULT_Public_Macros LIBCFG_DEFAULT Public Macros - * @{ - */ - -/************************** DEBUG MODE DEFINITIONS *********************************/ -/* Un-comment the line below to compile the library in DEBUG mode, this will expanse - the "CHECK_PARAM" macro in the FW library code */ - -//#define DEBUG - - -/******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/ -/* Comment the line below to disable the specific peripheral inclusion */ - -/* DEBUG_FRAMWORK ------------------------------ */ -#define _DBGFWK - -/* GPIO ------------------------------- */ -#define _GPIO - -/* EXTI ------------------------------- */ -#define _EXTI - -/* UART ------------------------------- */ -#define _UART -#define _UART0 -#define _UART1 -#define _UART2 -#define _UART3 - -/* SPI ------------------------------- */ -#define _SPI - -/* SYSTICK --------------------------- */ -#define _SYSTICK - -/* SSP ------------------------------- */ -#define _SSP -#define _SSP0 -#define _SSP1 - - -/* I2C ------------------------------- */ -#define _I2C -#define _I2C0 -#define _I2C1 -#define _I2C2 - -/* TIMER ------------------------------- */ -#define _TIM - -/* WDT ------------------------------- */ -#define _WDT - - -/* GPDMA ------------------------------- */ -#define _GPDMA - - -/* DAC ------------------------------- */ -#define _DAC - -/* DAC ------------------------------- */ -#define _ADC - - -/* PWM ------------------------------- */ -#define _PWM -#define _PWM1 - -/* RTC ------------------------------- */ -#define _RTC - -/* I2S ------------------------------- */ -#define _I2S - -/* USB device ------------------------------- */ -#define _USBDEV -#define _USB_DMA - -/* QEI ------------------------------- */ -#define _QEI - -/* MCPWM ------------------------------- */ -#define _MCPWM - -/* CAN--------------------------------*/ -//#define _CAN - -/* RIT ------------------------------- */ -#define _RIT - -/* EMAC ------------------------------ */ -//#define _EMAC - -/************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/ - -#ifdef DEBUG -/******************************************************************************* -* @brief The CHECK_PARAM macro is used for function's parameters check. -* It is used only if the library is compiled in DEBUG mode. -* @param[in] expr - If expr is false, it calls check_failed() function -* which reports the name of the source file and the source -* line number of the call that failed. -* - If expr is true, it returns no value. -* @return None -*******************************************************************************/ -#define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__)) -#else -#define CHECK_PARAM(expr) -#endif /* DEBUG */ - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup LIBCFG_DEFAULT_Public_Functions LIBCFG_DEFAULT Public Functions - * @{ - */ - -#ifdef DEBUG -void check_failed(uint8_t *file, uint32_t line); -#endif - -/** - * @} - */ - -#endif /* LPC17XX_LIBCFG_DEFAULT_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_mcpwm.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,323 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_mcpwm.h 2010-05-21 -*//** -* @file lpc17xx_mcpwm.h -* @brief Contains all macro definitions and function prototypes -* support for Motor Control PWM firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup MCPWM MCPWM (Motor Control PWM) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_MCPWM_H_ -#define LPC17XX_MCPWM_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup MCPWM_Public_Macros MCPWM Public Macros - * @{ - */ - - -/** Edge aligned mode for channel in MCPWM */ -#define MCPWM_CHANNEL_EDGE_MODE ((uint32_t)(0)) -/** Center aligned mode for channel in MCPWM */ -#define MCPWM_CHANNEL_CENTER_MODE ((uint32_t)(1)) - -/** Polarity of the MCOA and MCOB pins: Passive state is LOW, active state is HIGH */ -#define MCPWM_CHANNEL_PASSIVE_LO ((uint32_t)(0)) -/** Polarity of the MCOA and MCOB pins: Passive state is HIGH, active state is LOW */ -#define MCPWM_CHANNEL_PASSIVE_HI ((uint32_t)(1)) - -/* Output Patent in 3-phase DC mode, the internal MCOA0 signal is routed to any or all of - * the six output pins under the control of the bits in this register */ -#define MCPWM_PATENT_A0 ((uint32_t)(1<<0)) /**< MCOA0 tracks internal MCOA0 */ -#define MCPWM_PATENT_B0 ((uint32_t)(1<<1)) /**< MCOB0 tracks internal MCOA0 */ -#define MCPWM_PATENT_A1 ((uint32_t)(1<<2)) /**< MCOA1 tracks internal MCOA0 */ -#define MCPWM_PATENT_B1 ((uint32_t)(1<<3)) /**< MCOB1 tracks internal MCOA0 */ -#define MCPWM_PATENT_A2 ((uint32_t)(1<<4)) /**< MCOA2 tracks internal MCOA0 */ -#define MCPWM_PATENT_B2 ((uint32_t)(1<<5)) /**< MCOB2 tracks internal MCOA0 */ - -/* Interrupt type in MCPWM */ -/** Limit interrupt for channel (0) */ -#define MCPWM_INTFLAG_LIM0 MCPWM_INT_ILIM(0) -/** Match interrupt for channel (0) */ -#define MCPWM_INTFLAG_MAT0 MCPWM_INT_IMAT(0) -/** Capture interrupt for channel (0) */ -#define MCPWM_INTFLAG_CAP0 MCPWM_INT_ICAP(0) - -/** Limit interrupt for channel (1) */ -#define MCPWM_INTFLAG_LIM1 MCPWM_INT_ILIM(1) -/** Match interrupt for channel (1) */ -#define MCPWM_INTFLAG_MAT1 MCPWM_INT_IMAT(1) -/** Capture interrupt for channel (1) */ -#define MCPWM_INTFLAG_CAP1 MCPWM_INT_ICAP(1) - -/** Limit interrupt for channel (2) */ -#define MCPWM_INTFLAG_LIM2 MCPWM_INT_ILIM(2) -/** Match interrupt for channel (2) */ -#define MCPWM_INTFLAG_MAT2 MCPWM_INT_IMAT(2) -/** Capture interrupt for channel (2) */ -#define MCPWM_INTFLAG_CAP2 MCPWM_INT_ICAP(2) - -/** Fast abort interrupt */ -#define MCPWM_INTFLAG_ABORT MCPWM_INT_ABORT - -/** - * @} - */ - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup MCPWM_Private_Macros MCPWM Private Macros - * @{ - */ - -/*********************************************************************//** - * Macro defines for MCPWM Control register - **********************************************************************/ -/* MCPWM Control register, these macro definitions below can be applied for these - * register type: - * - MCPWM Control read address - * - MCPWM Control set address - * - MCPWM Control clear address - */ -#define MCPWM_CON_RUN(n) ((n<=2) ? ((uint32_t)(1UL<<((n*8)+0))) : (0)) /**< Stops/starts timer channel n */ -#define MCPWM_CON_CENTER(n) ((n<=2) ? ((uint32_t)(1UL<<((n*8)+1))) : (0)) /**< Edge/center aligned operation for channel n */ -#define MCPWM_CON_POLAR(n) ((n<=2) ? ((uint32_t)(1UL<<((n*8)+2))) : (0)) /**< Select polarity of the MCOAn and MCOBn pin */ -#define MCPWM_CON_DTE(n) ((n<=2) ? ((uint32_t)(1UL<<((n*8)+3))) : (0)) /**< Control the dead-time feature for channel n */ -#define MCPWM_CON_DISUP(n) ((n<=2) ? ((uint32_t)(1UL<<((n*8)+4))) : (0)) /**< Enable/Disable update of functional register for channel n */ -#define MCPWM_CON_INVBDC ((uint32_t)(1UL<<29)) /**< Control the polarity for all 3 channels */ -#define MCPWM_CON_ACMODE ((uint32_t)(1UL<<30)) /**< 3-phase AC mode select */ -#define MCPWM_CON_DCMODE ((uint32_t)(1UL<<31)) /**< 3-phase DC mode select */ - -/*********************************************************************//** - * Macro defines for MCPWM Capture Control register - **********************************************************************/ -/* Capture Control register, these macro definitions below can be applied for these - * register type: - * - MCPWM Capture Control read address - * - MCPWM Capture Control set address - * - MCPWM Capture control clear address - */ -/** Enables/Disable channel (cap) capture event on a rising edge on MCI(mci) */ -#define MCPWM_CAPCON_CAPMCI_RE(cap,mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0)) -/** Enables/Disable channel (cap) capture event on a falling edge on MCI(mci) */ -#define MCPWM_CAPCON_CAPMCI_FE(cap,mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0)) -/** TC(n) is reset by channel (n) capture event */ -#define MCPWM_CAPCON_RT(n) ((n<=2) ? ((uint32_t)(1<<(18+(n)))) : (0)) -/** Hardware noise filter: channel (n) capture events are delayed */ -#define MCPWM_CAPCON_HNFCAP(n) ((n<=2) ? ((uint32_t)(1<<(21+(n)))) : (0)) - -/*********************************************************************//** - * Macro defines for MCPWM Interrupt register - **********************************************************************/ -/* Interrupt registers, these macro definitions below can be applied for these - * register type: - * - MCPWM Interrupt Enable read address - * - MCPWM Interrupt Enable set address - * - MCPWM Interrupt Enable clear address - * - MCPWM Interrupt Flags read address - * - MCPWM Interrupt Flags set address - * - MCPWM Interrupt Flags clear address - */ -/** Limit interrupt for channel (n) */ -#define MCPWM_INT_ILIM(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0)) -/** Match interrupt for channel (n) */ -#define MCPWM_INT_IMAT(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0)) -/** Capture interrupt for channel (n) */ -#define MCPWM_INT_ICAP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0)) -/** Fast abort interrupt */ -#define MCPWM_INT_ABORT ((uint32_t)(1<<15)) - -/*********************************************************************//** - * Macro defines for MCPWM Count Control register - **********************************************************************/ -/* MCPWM Count Control register, these macro definitions below can be applied for these - * register type: - * - MCPWM Count Control read address - * - MCPWM Count Control set address - * - MCPWM Count Control clear address - */ -/** Counter(tc) advances on a rising edge on MCI(mci) pin */ -#define MCPWM_CNTCON_TCMCI_RE(tc,mci) (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0)) -/** Counter(cnt) advances on a falling edge on MCI(mci) pin */ -#define MCPWM_CNTCON_TCMCI_FE(tc,mci) (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0)) -/** Channel (n) is in counter mode */ -#define MCPWM_CNTCON_CNTR(n) ((n<=2) ? ((uint32_t)(1<<(29+n))) : (0)) - -/*********************************************************************//** - * Macro defines for MCPWM Dead-time register - **********************************************************************/ -/** Dead time value x for channel n */ -#define MCPWM_DT(n,x) ((n<=2) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0)) - -/*********************************************************************//** - * Macro defines for MCPWM Communication Pattern register - **********************************************************************/ -#define MCPWM_CP_A0 ((uint32_t)(1<<0)) /**< MCOA0 tracks internal MCOA0 */ -#define MCPWM_CP_B0 ((uint32_t)(1<<1)) /**< MCOB0 tracks internal MCOA0 */ -#define MCPWM_CP_A1 ((uint32_t)(1<<2)) /**< MCOA1 tracks internal MCOA0 */ -#define MCPWM_CP_B1 ((uint32_t)(1<<3)) /**< MCOB1 tracks internal MCOA0 */ -#define MCPWM_CP_A2 ((uint32_t)(1<<4)) /**< MCOA2 tracks internal MCOA0 */ -#define MCPWM_CP_B2 ((uint32_t)(1<<5)) /**< MCOB2 tracks internal MCOA0 */ - -/*********************************************************************//** - * Macro defines for MCPWM Capture clear address register - **********************************************************************/ -/** Clear the MCCAP (n) register */ -#define MCPWM_CAPCLR_CAP(n) ((n<=2) ? ((uint32_t)(1<<n)) : (0)) - - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup MCPWM_Public_Types MCPWM Public Types - * @{ - */ - -/** - * @brief Motor Control PWM Channel Configuration structure type definition - */ -typedef struct { - uint32_t channelType; /**< Edge/center aligned mode for this channel, - should be: - - MCPWM_CHANNEL_EDGE_MODE: Channel is in Edge mode - - MCPWM_CHANNEL_CENTER_MODE: Channel is in Center mode - */ - uint32_t channelPolarity; /**< Polarity of the MCOA and MCOB pins, should be: - - MCPWM_CHANNEL_PASSIVE_LO: Passive state is LOW, active state is HIGH - - MCPWM_CHANNEL_PASSIVE_HI: Passive state is HIGH, active state is LOW - */ - uint32_t channelDeadtimeEnable; /**< Enable/Disable DeadTime function for channel, should be: - - ENABLE. - - DISABLE. - */ - uint32_t channelDeadtimeValue; /**< DeadTime value, should be less than 0x3FF */ - uint32_t channelUpdateEnable; /**< Enable/Disable updates of functional registers, - should be: - - ENABLE. - - DISABLE. - */ - uint32_t channelTimercounterValue; /**< MCPWM Timer Counter value */ - uint32_t channelPeriodValue; /**< MCPWM Period value */ - uint32_t channelPulsewidthValue; /**< MCPWM Pulse Width value */ -} MCPWM_CHANNEL_CFG_Type; - -/** - * @brief MCPWM Capture Configuration type definition - */ -typedef struct { - uint32_t captureChannel; /**< Capture Channel Number, should be in range from 0 to 2 */ - uint32_t captureRising; /**< Enable/Disable Capture on Rising Edge event, should be: - - ENABLE. - - DISABLE. - */ - uint32_t captureFalling; /**< Enable/Disable Capture on Falling Edge event, should be: - - ENABLE. - - DISABLE. - */ - uint32_t timerReset; /**< Enable/Disable Timer reset function an capture, should be: - - ENABLE. - - DISABLE. - */ - uint32_t hnfEnable; /**< Enable/Disable Hardware noise filter function, should be: - - ENABLE. - - DISABLE. - */ -} MCPWM_CAPTURE_CFG_Type; - - -/** - * @brief MCPWM Count Control Configuration type definition - */ -typedef struct { - uint32_t counterChannel; /**< Counter Channel Number, should be in range from 0 to 2 */ - uint32_t countRising; /**< Enable/Disable Capture on Rising Edge event, should be: - - ENABLE. - - DISABLE. - */ - uint32_t countFalling; /**< Enable/Disable Capture on Falling Edge event, should be: - - ENABLE. - - DISABLE. - */ -} MCPWM_COUNT_CFG_Type; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup MCPWM_Public_Functions MCPWM Public Functions - * @{ - */ - -void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx); -void MCPWM_ConfigChannel(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, - MCPWM_CHANNEL_CFG_Type * channelSetup); -void MCPWM_WriteToShadow(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, - MCPWM_CHANNEL_CFG_Type *channelSetup); -void MCPWM_ConfigCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, - MCPWM_CAPTURE_CFG_Type *captureConfig); -void MCPWM_ClearCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel); -uint32_t MCPWM_GetCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel); -void MCPWM_CountConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, - uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig); -void MCPWM_Start(LPC_MCPWM_TypeDef *MCPWMx,uint32_t channel0, uint32_t channel1, uint32_t channel2); -void MCPWM_Stop(LPC_MCPWM_TypeDef *MCPWMx,uint32_t channel0, uint32_t channel1, uint32_t channel2); -void MCPWM_ACMode(LPC_MCPWM_TypeDef *MCPWMx,uint32_t acMode); -void MCPWM_DCMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode, - uint32_t outputInvered, uint32_t outputPattern); -void MCPWM_IntConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState); -void MCPWM_IntSet(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType); -void MCPWM_IntClear(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType); -FlagStatus MCPWM_GetIntStatus(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_MCPWM_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_nvic.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,70 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_nvic.h 2010-05-21 -*//** -* @file lpc17xx_nvic.h -* @brief Contains all macro definitions and function prototypes -* support for Nesting Vectored Interrupt firmware library -* on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup NVIC NVIC (Nested Vectored Interrupt Controller) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_NVIC_H_ -#define LPC17XX_NVIC_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup NVIC_Public_Functions NVIC Public Functions - * @{ - */ - -void NVIC_DeInit(void); -void NVIC_SCBDeInit(void); -void NVIC_SetVTOR(uint32_t offset); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_NVIC_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_pinsel.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,197 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_pinsel.h 2010-05-21 -*//** -* @file lpc17xx_pinsel.h -* @brief Contains all macro definitions and function prototypes -* support for Pin connect block firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup PINSEL PINSEL (Pin Selection) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_PINSEL_H_ -#define LPC17XX_PINSEL_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup PINSEL_Public_Macros PINSEL Public Macros - * @{ - */ - -/*********************************************************************//** - *!< Macros define for PORT Selection - ***********************************************************************/ -#define PINSEL_PORT_0 ((0)) /**< PORT 0*/ -#define PINSEL_PORT_1 ((1)) /**< PORT 1*/ -#define PINSEL_PORT_2 ((2)) /**< PORT 2*/ -#define PINSEL_PORT_3 ((3)) /**< PORT 3*/ -#define PINSEL_PORT_4 ((4)) /**< PORT 4*/ - -/*********************************************************************** - * Macros define for Pin Function selection - **********************************************************************/ -#define PINSEL_FUNC_0 ((0)) /**< default function*/ -#define PINSEL_FUNC_1 ((1)) /**< first alternate function*/ -#define PINSEL_FUNC_2 ((2)) /**< second alternate function*/ -#define PINSEL_FUNC_3 ((3)) /**< third or reserved alternate function*/ - -/*********************************************************************** - * Macros define for Pin Number of Port - **********************************************************************/ -#define PINSEL_PIN_0 ((0)) /**< Pin 0 */ -#define PINSEL_PIN_1 ((1)) /**< Pin 1 */ -#define PINSEL_PIN_2 ((2)) /**< Pin 2 */ -#define PINSEL_PIN_3 ((3)) /**< Pin 3 */ -#define PINSEL_PIN_4 ((4)) /**< Pin 4 */ -#define PINSEL_PIN_5 ((5)) /**< Pin 5 */ -#define PINSEL_PIN_6 ((6)) /**< Pin 6 */ -#define PINSEL_PIN_7 ((7)) /**< Pin 7 */ -#define PINSEL_PIN_8 ((8)) /**< Pin 8 */ -#define PINSEL_PIN_9 ((9)) /**< Pin 9 */ -#define PINSEL_PIN_10 ((10)) /**< Pin 10 */ -#define PINSEL_PIN_11 ((11)) /**< Pin 11 */ -#define PINSEL_PIN_12 ((12)) /**< Pin 12 */ -#define PINSEL_PIN_13 ((13)) /**< Pin 13 */ -#define PINSEL_PIN_14 ((14)) /**< Pin 14 */ -#define PINSEL_PIN_15 ((15)) /**< Pin 15 */ -#define PINSEL_PIN_16 ((16)) /**< Pin 16 */ -#define PINSEL_PIN_17 ((17)) /**< Pin 17 */ -#define PINSEL_PIN_18 ((18)) /**< Pin 18 */ -#define PINSEL_PIN_19 ((19)) /**< Pin 19 */ -#define PINSEL_PIN_20 ((20)) /**< Pin 20 */ -#define PINSEL_PIN_21 ((21)) /**< Pin 21 */ -#define PINSEL_PIN_22 ((22)) /**< Pin 22 */ -#define PINSEL_PIN_23 ((23)) /**< Pin 23 */ -#define PINSEL_PIN_24 ((24)) /**< Pin 24 */ -#define PINSEL_PIN_25 ((25)) /**< Pin 25 */ -#define PINSEL_PIN_26 ((26)) /**< Pin 26 */ -#define PINSEL_PIN_27 ((27)) /**< Pin 27 */ -#define PINSEL_PIN_28 ((28)) /**< Pin 28 */ -#define PINSEL_PIN_29 ((29)) /**< Pin 29 */ -#define PINSEL_PIN_30 ((30)) /**< Pin 30 */ -#define PINSEL_PIN_31 ((31)) /**< Pin 31 */ - -/*********************************************************************** - * Macros define for Pin mode - **********************************************************************/ -#define PINSEL_PINMODE_PULLUP ((0)) /**< Internal pull-up resistor*/ -#define PINSEL_PINMODE_TRISTATE ((2)) /**< Tri-state */ -#define PINSEL_PINMODE_PULLDOWN ((3)) /**< Internal pull-down resistor */ - -/*********************************************************************** - * Macros define for Pin mode (normal/open drain) - **********************************************************************/ -#define PINSEL_PINMODE_NORMAL ((0)) /**< Pin is in the normal (not open drain) mode.*/ -#define PINSEL_PINMODE_OPENDRAIN ((1)) /**< Pin is in the open drain mode */ - -/*********************************************************************** - * Macros define for I2C mode - ***********************************************************************/ -#define PINSEL_I2C_Normal_Mode ((0)) /**< The standard drive mode */ -#define PINSEL_I2C_Fast_Mode ((1)) /**< Fast Mode Plus drive mode */ - -/** - * @} - */ - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup PINSEL_Private_Macros PINSEL Private Macros - * @{ - */ - -/* Pin selection define */ -/* I2C Pin Configuration register bit description */ -#define PINSEL_I2CPADCFG_SDADRV0 _BIT(0) /**< Drive mode control for the SDA0 pin, P0.27 */ -#define PINSEL_I2CPADCFG_SDAI2C0 _BIT(1) /**< I2C mode control for the SDA0 pin, P0.27 */ -#define PINSEL_I2CPADCFG_SCLDRV0 _BIT(2) /**< Drive mode control for the SCL0 pin, P0.28 */ -#define PINSEL_I2CPADCFG_SCLI2C0 _BIT(3) /**< I2C mode control for the SCL0 pin, P0.28 */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup PINSEL_Public_Types PINSEL Public Types - * @{ - */ - -/** @brief Pin configuration structure */ -typedef struct -{ - uint8_t Portnum; /**< Port Number, should be PINSEL_PORT_x, - where x should be in range from 0 to 4 */ - uint8_t Pinnum; /**< Pin Number, should be PINSEL_PIN_x, - where x should be in range from 0 to 31 */ - uint8_t Funcnum; /**< Function Number, should be PINSEL_FUNC_x, - where x should be in range from 0 to 3 */ - uint8_t Pinmode; /**< Pin Mode, should be: - - PINSEL_PINMODE_PULLUP: Internal pull-up resistor - - PINSEL_PINMODE_TRISTATE: Tri-state - - PINSEL_PINMODE_PULLDOWN: Internal pull-down resistor */ - uint8_t OpenDrain; /**< OpenDrain mode, should be: - - PINSEL_PINMODE_NORMAL: Pin is in the normal (not open drain) mode - - PINSEL_PINMODE_OPENDRAIN: Pin is in the open drain mode */ -} PINSEL_CFG_Type; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup PINSEL_Public_Functions PINSEL Public Functions - * @{ - */ - -void PINSEL_ConfigPin(PINSEL_CFG_Type *PinCfg); -void PINSEL_ConfigTraceFunc (FunctionalState NewState); -void PINSEL_SetI2C0Pins(uint8_t i2cPinMode, FunctionalState filterSlewRateEnable); - - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_PINSEL_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_pwm.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,342 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_pwm.h 2011-03-31 -*//** -* @file lpc17xx_pwm.h -* @brief Contains all macro definitions and function prototypes -* support for PWM firmware library on LPC17xx -* @version 2.1 -* @date 31. Mar. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2011, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup PWM PWM (Pulse Width Modulator) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_PWM_H_ -#define LPC17XX_PWM_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup PWM_Private_Macros PWM Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/********************************************************************** -* IR register definitions -**********************************************************************/ -/** Interrupt flag for PWM match channel for 6 channel */ -#define PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4)))) -/** Interrupt flag for capture input */ -#define PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4))) -/** IR register mask */ -#define PWM_IR_BITMASK ((uint32_t)(0x0000073F)) - -/********************************************************************** -* TCR register definitions -**********************************************************************/ -/** TCR register mask */ -#define PWM_TCR_BITMASK ((uint32_t)(0x0000000B)) -#define PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0)) /*!< PWM Counter Enable */ -#define PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1)) /*!< PWM Counter Reset */ -#define PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3)) /*!< PWM Enable */ - -/********************************************************************** -* CTCR register definitions -**********************************************************************/ -/** CTCR register mask */ -#define PWM_CTCR_BITMASK ((uint32_t)(0x0000000F)) -/** PWM Counter-Timer Mode */ -#define PWM_CTCR_MODE(n) ((uint32_t)(n&0x03)) -/** PWM Capture input select */ -#define PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2)) - -/********************************************************************** -* MCR register definitions -**********************************************************************/ -/** MCR register mask */ -#define PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF)) -/** generate a PWM interrupt when a MATCHn occurs */ -#define PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)))) -/** reset the PWM when a MATCHn occurs */ -#define PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1))) -/** stop the PWM when a MATCHn occurs */ -#define PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2))) - -/********************************************************************** -* CCR register definitions -**********************************************************************/ -/** CCR register mask */ -#define PWM_CCR_BITMASK ((uint32_t)(0x0000003F)) -/** PCAPn is rising edge sensitive */ -#define PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)))) -/** PCAPn is falling edge sensitive */ -#define PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1))) -/** PWM interrupt is generated on a PCAP event */ -#define PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2))) - -/********************************************************************** -* PCR register definitions -**********************************************************************/ -/** PCR register mask */ -#define PWM_PCR_BITMASK (uint32_t)0x00007E7C -/** PWM output n is a single edge controlled output */ -#define PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n))) -/** enable PWM output n */ -#define PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8)))) - -/********************************************************************** -* LER register definitions -**********************************************************************/ -/** LER register mask*/ -#define PWM_LER_BITMASK ((uint32_t)(0x0000007F)) -/** PWM MATCHn register update control */ -#define PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0)) - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/** Macro to determine if it is valid PWM peripheral or not */ -#define PARAM_PWMx(n) (((uint32_t *)n)==((uint32_t *)LPC_PWM1)) - -/** Macro check PWM1 match channel value */ -#define PARAM_PWM1_MATCH_CHANNEL(n) ((n>=0) && (n<=6)) - -/** Macro check PWM1 channel value */ -#define PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6)) - -/** Macro check PWM1 edge channel mode */ -#define PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6)) - -/** Macro check PWM1 capture channel mode */ -#define PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1)) - -/** Macro check PWM1 interrupt status type */ -#define PARAM_PWM_INTSTAT(n) ((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \ -|| (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \ -|| (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1)) -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup PWM_Public_Types PWM Public Types - * @{ - */ - -/** @brief Configuration structure in PWM TIMER mode */ -typedef struct { - - uint8_t PrescaleOption; /**< Prescale option, should be: - - PWM_TIMER_PRESCALE_TICKVAL: Prescale in absolute value - - PWM_TIMER_PRESCALE_USVAL: Prescale in microsecond value - */ - uint8_t Reserved[3]; - uint32_t PrescaleValue; /**< Prescale value, 32-bit long, should be matched - with PrescaleOption - */ -} PWM_TIMERCFG_Type; - -/** @brief Configuration structure in PWM COUNTER mode */ -typedef struct { - - uint8_t CounterOption; /**< Counter Option, should be: - - PWM_COUNTER_RISING: Rising Edge - - PWM_COUNTER_FALLING: Falling Edge - - PWM_COUNTER_ANY: Both rising and falling mode - */ - uint8_t CountInputSelect; /**< Counter input select, should be: - - PWM_COUNTER_PCAP1_0: PWM Counter input selected is PCAP1.0 pin - - PWM_COUNTER_PCAP1_1: PWM Counter input selected is PCAP1.1 pin - */ - uint8_t Reserved[2]; -} PWM_COUNTERCFG_Type; - -/** @brief PWM Match channel configuration structure */ -typedef struct { - uint8_t MatchChannel; /**< Match channel, should be in range - from 0..6 */ - uint8_t IntOnMatch; /**< Interrupt On match, should be: - - ENABLE: Enable this function. - - DISABLE: Disable this function. - */ - uint8_t StopOnMatch; /**< Stop On match, should be: - - ENABLE: Enable this function. - - DISABLE: Disable this function. - */ - uint8_t ResetOnMatch; /**< Reset On match, should be: - - ENABLE: Enable this function. - - DISABLE: Disable this function. - */ -} PWM_MATCHCFG_Type; - - -/** @brief PWM Capture Input configuration structure */ -typedef struct { - uint8_t CaptureChannel; /**< Capture channel, should be in range - from 0..1 */ - uint8_t RisingEdge; /**< caption rising edge, should be: - - ENABLE: Enable rising edge. - - DISABLE: Disable this function. - */ - uint8_t FallingEdge; /**< caption falling edge, should be: - - ENABLE: Enable falling edge. - - DISABLE: Disable this function. - */ - uint8_t IntOnCaption; /**< Interrupt On caption, should be: - - ENABLE: Enable interrupt function. - - DISABLE: Disable this function. - */ -} PWM_CAPTURECFG_Type; - -/* Timer/Counter in PWM configuration type definition -----------------------------------*/ - -/** @brief PMW TC mode select option */ -typedef enum { - PWM_MODE_TIMER = 0, /*!< PWM using Timer mode */ - PWM_MODE_COUNTER /*!< PWM using Counter mode */ -} PWM_TC_MODE_OPT; - -#define PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER)) - - -/** @brief PWM Timer/Counter prescale option */ -typedef enum -{ - PWM_TIMER_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */ - PWM_TIMER_PRESCALE_USVAL /*!< Prescale in microsecond value */ -} PWM_TIMER_PRESCALE_OPT; - -#define PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL)) - - -/** @brief PWM Input Select in counter mode */ -typedef enum { - PWM_COUNTER_PCAP1_0 = 0, /*!< PWM Counter input selected is PCAP1.0 pin */ - PWM_COUNTER_PCAP1_1 /*!< PWM counter input selected is CAP1.1 pin */ -} PWM_COUNTER_INPUTSEL_OPT; - -#define PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1)) - -/** @brief PWM Input Edge Option in counter mode */ -typedef enum { - PWM_COUNTER_RISING = 1, /*!< Rising edge mode */ - PWM_COUNTER_FALLING = 2, /*!< Falling edge mode */ - PWM_COUNTER_ANY = 3 /*!< Both rising and falling mode */ -} PWM_COUNTER_EDGE_OPT; - -#define PARAM_PWM_COUNTER_EDGE(n) ((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \ -|| (n==PWM_COUNTER_ANY)) - - -/* PWM configuration type definition ----------------------------------------------------- */ -/** @brief PWM operating mode options */ -typedef enum { - PWM_CHANNEL_SINGLE_EDGE, /*!< PWM Channel Single edge mode */ - PWM_CHANNEL_DUAL_EDGE /*!< PWM Channel Dual edge mode */ -} PWM_CHANNEL_EDGE_OPT; - -#define PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE)) - - -/** @brief PWM update type */ -typedef enum { - PWM_MATCH_UPDATE_NOW = 0, /**< PWM Match Channel Update Now */ - PWM_MATCH_UPDATE_NEXT_RST /**< PWM Match Channel Update on next - PWM Counter resetting */ -} PWM_MATCH_UPDATE_OPT; - -#define PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST)) - - -/** @brief PWM interrupt status type definition ----------------------------------------------------- */ -/** @brief PWM Interrupt status type */ -typedef enum -{ - PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), /**< Interrupt flag for PWM match channel 0 */ - PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), /**< Interrupt flag for PWM match channel 1 */ - PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), /**< Interrupt flag for PWM match channel 2 */ - PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3), /**< Interrupt flag for PWM match channel 3 */ - PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), /**< Interrupt flag for capture input 0 */ - PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), /**< Interrupt flag for capture input 1 */ - PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), /**< Interrupt flag for PWM match channel 4 */ - PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5), /**< Interrupt flag for PWM match channel 5 */ - PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6) /**< Interrupt flag for PWM match channel 6 */ -}PWM_INTSTAT_TYPE; - -/** @brief Match update structure */ -typedef struct -{ - uint32_t Matchvalue; - FlagStatus Status; -}PWM_Match_T; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup PWM_Public_Functions PWM Public Functions - * @{ - */ - -void PWM_PinConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption); -IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag); -void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag); -void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct); -void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct); -void PWM_DeInit (LPC_PWM_TypeDef *PWMx); -void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState); -void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState); -void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx); -void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct); -void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct); -uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel); -void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \ - uint32_t MatchValue, uint8_t UpdateType); -void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption); -void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_PWM_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_qei.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,418 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_qei.h 2010-05-21 -*//** -* @file lpc17xx_qei.h -* @brief Contains all macro definitions and function prototypes -* support for QEI firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup QEI QEI (Quadrature Encoder Interface) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_QEI_H_ -#define LPC17XX_QEI_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup QEI_Public_Macros QEI Public Macros - * @{ - */ - -/* QEI Reset types */ -#define QEI_RESET_POS QEI_CON_RESP /**< Reset position counter */ -#define QEI_RESET_POSOnIDX QEI_CON_RESPI /**< Reset Posistion Counter on Index */ -#define QEI_RESET_VEL QEI_CON_RESV /**< Reset Velocity */ -#define QEI_RESET_IDX QEI_CON_RESI /**< Reset Index Counter */ - -/* QEI Direction Invert Type Option */ -#define QEI_DIRINV_NONE ((uint32_t)(0)) /**< Direction is not inverted */ -#define QEI_DIRINV_CMPL ((uint32_t)(1)) /**< Direction is complemented */ - -/* QEI Signal Mode Option */ -#define QEI_SIGNALMODE_QUAD ((uint32_t)(0)) /**< Signal operation: Quadrature phase mode */ -#define QEI_SIGNALMODE_CLKDIR ((uint32_t)(1)) /**< Signal operation: Clock/Direction mode */ - -/* QEI Capture Mode Option */ -#define QEI_CAPMODE_2X ((uint32_t)(0)) /**< Capture mode: Only Phase-A edges are counted (2X) */ -#define QEI_CAPMODE_4X ((uint32_t)(1)) /**< Capture mode: BOTH PhA and PhB edges are counted (4X)*/ - -/* QEI Invert Index Signal Option */ -#define QEI_INVINX_NONE ((uint32_t)(0)) /**< Invert Index signal option: None */ -#define QEI_INVINX_EN ((uint32_t)(1)) /**< Invert Index signal option: Enable */ - -/* QEI timer reload option */ -#define QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0)) /**< Reload value in absolute value */ -#define QEI_TIMERRELOAD_USVAL ((uint8_t)(1)) /**< Reload value in microsecond value */ - -/* QEI Flag Status type */ -#define QEI_STATUS_DIR ((uint32_t)(1<<0)) /**< Direction status */ - -/* QEI Compare Position channel option */ -#define QEI_COMPPOS_CH_0 ((uint8_t)(0)) /**< QEI compare position channel 0 */ -#define QEI_COMPPOS_CH_1 ((uint8_t)(1)) /**< QEI compare position channel 1 */ -#define QEI_COMPPOS_CH_2 ((uint8_t)(2)) /**< QEI compare position channel 2 */ - -/* QEI interrupt flag type */ -#define QEI_INTFLAG_INX_Int ((uint32_t)(1<<0)) /**< index pulse was detected interrupt */ -#define QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1)) /**< Velocity timer over flow interrupt */ -#define QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2)) /**< Capture velocity is less than compare interrupt */ -#define QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3)) /**< Change of direction interrupt */ -#define QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4)) /**< An encoder phase error interrupt */ -#define QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5)) /**< An encoder clock pulse was detected interrupt */ -#define QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6)) /**< position 0 compare value is equal to the - current position interrupt */ -#define QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7)) /**< position 1 compare value is equal to the - current position interrupt */ -#define QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8)) /**< position 2 compare value is equal to the - current position interrupt */ -#define QEI_INTFLAG_REV_Int ((uint32_t)(1<<9)) /**< Index compare value is equal to the current - index count interrupt */ -#define QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10)) /**< Combined position 0 and revolution count interrupt */ -#define QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11)) /**< Combined position 1 and revolution count interrupt */ -#define QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12)) /**< Combined position 2 and revolution count interrupt */ - -/** - * @} - */ - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup QEI_Private_Macros QEI Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/* Quadrature Encoder Interface Control Register Definition --------------------- */ -/*********************************************************************//** - * Macro defines for QEI Control register - **********************************************************************/ -#define QEI_CON_RESP ((uint32_t)(1<<0)) /**< Reset position counter */ -#define QEI_CON_RESPI ((uint32_t)(1<<1)) /**< Reset Posistion Counter on Index */ -#define QEI_CON_RESV ((uint32_t)(1<<2)) /**< Reset Velocity */ -#define QEI_CON_RESI ((uint32_t)(1<<3)) /**< Reset Index Counter */ -#define QEI_CON_BITMASK ((uint32_t)(0x0F)) /**< QEI Control register bit-mask */ - -/*********************************************************************//** - * Macro defines for QEI Configuration register - **********************************************************************/ -#define QEI_CONF_DIRINV ((uint32_t)(1<<0)) /**< Direction Invert */ -#define QEI_CONF_SIGMODE ((uint32_t)(1<<1)) /**< Signal mode */ -#define QEI_CONF_CAPMODE ((uint32_t)(1<<2)) /**< Capture mode */ -#define QEI_CONF_INVINX ((uint32_t)(1<<3)) /**< Invert index */ -#define QEI_CONF_BITMASK ((uint32_t)(0x0F)) /**< QEI Configuration register bit-mask */ - -/*********************************************************************//** - * Macro defines for QEI Status register - **********************************************************************/ -#define QEI_STAT_DIR ((uint32_t)(1<<0)) /**< Direction bit */ -#define QEI_STAT_BITMASK ((uint32_t)(1<<0)) /**< QEI status register bit-mask */ - -/* Quadrature Encoder Interface Interrupt registers definitions --------------------- */ -/*********************************************************************//** - * Macro defines for QEI Interrupt Status register - **********************************************************************/ -#define QEI_INTSTAT_INX_Int ((uint32_t)(1<<0)) /**< Indicates that an index pulse was detected */ -#define QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1)) /**< Indicates that a velocity timer overflow occurred */ -#define QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2)) /**< Indicates that capture velocity is less than compare velocity */ -#define QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3)) /**< Indicates that a change of direction was detected */ -#define QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4)) /**< Indicates that an encoder phase error was detected */ -#define QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5)) /**< Indicates that and encoder clock pulse was detected */ -#define QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6)) /**< Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7)) /**< Indicates that the position 1compare value is equal to the - current position */ -#define QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8)) /**< Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_INTSTAT_REV_Int ((uint32_t)(1<<9)) /**< Indicates that the index compare value is equal to the current - index count */ -#define QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10)) /**< Combined position 0 and revolution count interrupt. Set when - both the POS0_Int bit is set and the REV_Int is set */ -#define QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11)) /**< Combined position 1 and revolution count interrupt. Set when - both the POS1_Int bit is set and the REV_Int is set */ -#define QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12)) /**< Combined position 2 and revolution count interrupt. Set when - both the POS2_Int bit is set and the REV_Int is set */ -#define QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Status register bit-mask */ - -/*********************************************************************//** - * Macro defines for QEI Interrupt Set register - **********************************************************************/ -#define QEI_INTSET_INX_Int ((uint32_t)(1<<0)) /**< Set Bit Indicates that an index pulse was detected */ -#define QEI_INTSET_TIM_Int ((uint32_t)(1<<1)) /**< Set Bit Indicates that a velocity timer overflow occurred */ -#define QEI_INTSET_VELC_Int ((uint32_t)(1<<2)) /**< Set Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_INTSET_DIR_Int ((uint32_t)(1<<3)) /**< Set Bit Indicates that a change of direction was detected */ -#define QEI_INTSET_ERR_Int ((uint32_t)(1<<4)) /**< Set Bit Indicates that an encoder phase error was detected */ -#define QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5)) /**< Set Bit Indicates that and encoder clock pulse was detected */ -#define QEI_INTSET_POS0_Int ((uint32_t)(1<<6)) /**< Set Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_INTSET_POS1_Int ((uint32_t)(1<<7)) /**< Set Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_INTSET_POS2_Int ((uint32_t)(1<<8)) /**< Set Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_INTSET_REV_Int ((uint32_t)(1<<9)) /**< Set Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10)) /**< Set Bit that combined position 0 and revolution count interrupt */ -#define QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11)) /**< Set Bit that Combined position 1 and revolution count interrupt */ -#define QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12)) /**< Set Bit that Combined position 2 and revolution count interrupt */ -#define QEI_INTSET_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Set register bit-mask */ - -/*********************************************************************//** - * Macro defines for QEI Interrupt Clear register - **********************************************************************/ -#define QEI_INTCLR_INX_Int ((uint32_t)(1<<0)) /**< Clear Bit Indicates that an index pulse was detected */ -#define QEI_INTCLR_TIM_Int ((uint32_t)(1<<1)) /**< Clear Bit Indicates that a velocity timer overflow occurred */ -#define QEI_INTCLR_VELC_Int ((uint32_t)(1<<2)) /**< Clear Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_INTCLR_DIR_Int ((uint32_t)(1<<3)) /**< Clear Bit Indicates that a change of direction was detected */ -#define QEI_INTCLR_ERR_Int ((uint32_t)(1<<4)) /**< Clear Bit Indicates that an encoder phase error was detected */ -#define QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5)) /**< Clear Bit Indicates that and encoder clock pulse was detected */ -#define QEI_INTCLR_POS0_Int ((uint32_t)(1<<6)) /**< Clear Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_INTCLR_POS1_Int ((uint32_t)(1<<7)) /**< Clear Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_INTCLR_POS2_Int ((uint32_t)(1<<8)) /**< Clear Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_INTCLR_REV_Int ((uint32_t)(1<<9)) /**< Clear Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10)) /**< Clear Bit that combined position 0 and revolution count interrupt */ -#define QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11)) /**< Clear Bit that Combined position 1 and revolution count interrupt */ -#define QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12)) /**< Clear Bit that Combined position 2 and revolution count interrupt */ -#define QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Clear register bit-mask */ - -/*********************************************************************//** - * Macro defines for QEI Interrupt Enable register - **********************************************************************/ -#define QEI_INTEN_INX_Int ((uint32_t)(1<<0)) /**< Enabled Interrupt Bit Indicates that an index pulse was detected */ -#define QEI_INTEN_TIM_Int ((uint32_t)(1<<1)) /**< Enabled Interrupt Bit Indicates that a velocity timer overflow occurred */ -#define QEI_INTEN_VELC_Int ((uint32_t)(1<<2)) /**< Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_INTEN_DIR_Int ((uint32_t)(1<<3)) /**< Enabled Interrupt Bit Indicates that a change of direction was detected */ -#define QEI_INTEN_ERR_Int ((uint32_t)(1<<4)) /**< Enabled Interrupt Bit Indicates that an encoder phase error was detected */ -#define QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5)) /**< Enabled Interrupt Bit Indicates that and encoder clock pulse was detected */ -#define QEI_INTEN_POS0_Int ((uint32_t)(1<<6)) /**< Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_INTEN_POS1_Int ((uint32_t)(1<<7)) /**< Enabled Interrupt Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_INTEN_POS2_Int ((uint32_t)(1<<8)) /**< Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_INTEN_REV_Int ((uint32_t)(1<<9)) /**< Enabled Interrupt Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10)) /**< Enabled Interrupt Bit that combined position 0 and revolution count interrupt */ -#define QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11)) /**< Enabled Interrupt Bit that Combined position 1 and revolution count interrupt */ -#define QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12)) /**< Enabled Interrupt Bit that Combined position 2 and revolution count interrupt */ -#define QEI_INTEN_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable register bit-mask */ - -/*********************************************************************//** - * Macro defines for QEI Interrupt Enable Set register - **********************************************************************/ -#define QEI_IESET_INX_Int ((uint32_t)(1<<0)) /**< Set Enable Interrupt Bit Indicates that an index pulse was detected */ -#define QEI_IESET_TIM_Int ((uint32_t)(1<<1)) /**< Set Enable Interrupt Bit Indicates that a velocity timer overflow occurred */ -#define QEI_IESET_VELC_Int ((uint32_t)(1<<2)) /**< Set Enable Interrupt Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_IESET_DIR_Int ((uint32_t)(1<<3)) /**< Set Enable Interrupt Bit Indicates that a change of direction was detected */ -#define QEI_IESET_ERR_Int ((uint32_t)(1<<4)) /**< Set Enable Interrupt Bit Indicates that an encoder phase error was detected */ -#define QEI_IESET_ENCLK_Int ((uint32_t)(1<<5)) /**< Set Enable Interrupt Bit Indicates that and encoder clock pulse was detected */ -#define QEI_IESET_POS0_Int ((uint32_t)(1<<6)) /**< Set Enable Interrupt Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_IESET_POS1_Int ((uint32_t)(1<<7)) /**< Set Enable Interrupt Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_IESET_POS2_Int ((uint32_t)(1<<8)) /**< Set Enable Interrupt Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_IESET_REV_Int ((uint32_t)(1<<9)) /**< Set Enable Interrupt Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_IESET_POS0REV_Int ((uint32_t)(1<<10)) /**< Set Enable Interrupt Bit that combined position 0 and revolution count interrupt */ -#define QEI_IESET_POS1REV_Int ((uint32_t)(1<<11)) /**< Set Enable Interrupt Bit that Combined position 1 and revolution count interrupt */ -#define QEI_IESET_POS2REV_Int ((uint32_t)(1<<12)) /**< Set Enable Interrupt Bit that Combined position 2 and revolution count interrupt */ -#define QEI_IESET_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable Set register bit-mask */ - -/*********************************************************************//** - * Macro defines for QEI Interrupt Enable Clear register - **********************************************************************/ -#define QEI_IECLR_INX_Int ((uint32_t)(1<<0)) /**< Clear Enabled Interrupt Bit Indicates that an index pulse was detected */ -#define QEI_IECLR_TIM_Int ((uint32_t)(1<<1)) /**< Clear Enabled Interrupt Bit Indicates that a velocity timer overflow occurred */ -#define QEI_IECLR_VELC_Int ((uint32_t)(1<<2)) /**< Clear Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_IECLR_DIR_Int ((uint32_t)(1<<3)) /**< Clear Enabled Interrupt Bit Indicates that a change of direction was detected */ -#define QEI_IECLR_ERR_Int ((uint32_t)(1<<4)) /**< Clear Enabled Interrupt Bit Indicates that an encoder phase error was detected */ -#define QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5)) /**< Clear Enabled Interrupt Bit Indicates that and encoder clock pulse was detected */ -#define QEI_IECLR_POS0_Int ((uint32_t)(1<<6)) /**< Clear Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_IECLR_POS1_Int ((uint32_t)(1<<7)) /**< Clear Enabled Interrupt Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_IECLR_POS2_Int ((uint32_t)(1<<8)) /**< Clear Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_IECLR_REV_Int ((uint32_t)(1<<9)) /**< Clear Enabled Interrupt Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10)) /**< Clear Enabled Interrupt Bit that combined position 0 and revolution count interrupt */ -#define QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11)) /**< Clear Enabled Interrupt Bit that Combined position 1 and revolution count interrupt */ -#define QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12)) /**< Clear Enabled Interrupt Bit that Combined position 2 and revolution count interrupt */ -#define QEI_IECLR_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable Clear register bit-mask */ - - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/* Macro check QEI peripheral */ -#define PARAM_QEIx(n) ((n==LPC_QEI)) - -/* Macro check QEI reset type */ -#define PARAM_QEI_RESET(n) ((n==QEI_CON_RESP) \ -|| (n==QEI_RESET_POSOnIDX) \ -|| (n==QEI_RESET_VEL) \ -|| (n==QEI_RESET_IDX)) - -/* Macro check QEI Direction invert mode */ -#define PARAM_QEI_DIRINV(n) ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL)) - -/* Macro check QEI signal mode */ -#define PARAM_QEI_SIGNALMODE(n) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR)) - -/* Macro check QEI Capture mode */ -#define PARAM_QEI_CAPMODE(n) ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X)) - -/* Macro check QEI Invert index mode */ -#define PARAM_QEI_INVINX(n) ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN)) - -/* Macro check QEI Direction invert mode */ -#define PARAM_QEI_TIMERRELOAD(n) ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL)) - -/* Macro check QEI status type */ -#define PARAM_QEI_STATUS(n) ((n==QEI_STATUS_DIR)) - -/* Macro check QEI combine position type */ -#define PARAM_QEI_COMPPOS_CH(n) ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2)) - -/* Macro check QEI interrupt flag type */ -#define PARAM_QEI_INTFLAG(n) ((n==QEI_INTFLAG_INX_Int) \ -|| (n==QEI_INTFLAG_TIM_Int) \ -|| (n==QEI_INTFLAG_VELC_Int) \ -|| (n==QEI_INTFLAG_DIR_Int) \ -|| (n==QEI_INTFLAG_ERR_Int) \ -|| (n==QEI_INTFLAG_ENCLK_Int) \ -|| (n==QEI_INTFLAG_POS0_Int) \ -|| (n==QEI_INTFLAG_POS1_Int) \ -|| (n==QEI_INTFLAG_POS2_Int) \ -|| (n==QEI_INTFLAG_REV_Int) \ -|| (n==QEI_INTFLAG_POS0REV_Int) \ -|| (n==QEI_INTFLAG_POS1REV_Int) \ -|| (n==QEI_INTFLAG_POS2REV_Int)) -/** - * @} - */ - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup QEI_Public_Types QEI Public Types - * @{ - */ - -/** - * @brief QEI Configuration structure type definition - */ -typedef struct { - uint32_t DirectionInvert :1; /**< Direction invert option: - - QEI_DIRINV_NONE: QEI Direction is normal - - QEI_DIRINV_CMPL: QEI Direction is complemented - */ - uint32_t SignalMode :1; /**< Signal mode Option: - - QEI_SIGNALMODE_QUAD: Signal is in Quadrature phase mode - - QEI_SIGNALMODE_CLKDIR: Signal is in Clock/Direction mode - */ - uint32_t CaptureMode :1; /**< Capture Mode Option: - - QEI_CAPMODE_2X: Only Phase-A edges are counted (2X) - - QEI_CAPMODE_4X: BOTH Phase-A and Phase-B edges are counted (4X) - */ - uint32_t InvertIndex :1; /**< Invert Index Option: - - QEI_INVINX_NONE: the sense of the index input is normal - - QEI_INVINX_EN: inverts the sense of the index input - */ -} QEI_CFG_Type; - -/** - * @brief Timer Reload Configuration structure type definition - */ -typedef struct { - - uint8_t ReloadOption; /**< Velocity Timer Reload Option, should be: - - QEI_TIMERRELOAD_TICKVAL: Reload value in absolute value - - QEI_TIMERRELOAD_USVAL: Reload value in microsecond value - */ - uint8_t Reserved[3]; - uint32_t ReloadValue; /**< Velocity Timer Reload Value, 32-bit long, should be matched - with Velocity Timer Reload Option - */ -} QEI_RELOADCFG_Type; - -/** - * @} - */ - - - - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup QEI_Public_Functions QEI Public Functions - * @{ - */ - -void QEI_Reset(LPC_QEI_TypeDef *QEIx, uint32_t ulResetType); -void QEI_Init(LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct); -void QEI_ConfigStructInit(QEI_CFG_Type *QIE_InitStruct); -void QEI_DeInit(LPC_QEI_TypeDef *QEIx); -FlagStatus QEI_GetStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType); -uint32_t QEI_GetPosition(LPC_QEI_TypeDef *QEIx); -void QEI_SetMaxPosition(LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos); -void QEI_SetPositionComp(LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp); -uint32_t QEI_GetIndex(LPC_QEI_TypeDef *QEIx); -void QEI_SetIndexComp(LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp); -void QEI_SetTimerReload(LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct); -uint32_t QEI_GetTimer(LPC_QEI_TypeDef *QEIx); -uint32_t QEI_GetVelocity(LPC_QEI_TypeDef *QEIx); -uint32_t QEI_GetVelocityCap(LPC_QEI_TypeDef *QEIx); -void QEI_SetVelocityComp(LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp); -void QEI_SetDigiFilter(LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse); -FlagStatus QEI_GetIntStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType); -void QEI_IntCmd(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState); -void QEI_IntSet(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType); -void QEI_IntClear(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType); -uint32_t QEI_CalculateRPM(LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR); - - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_QEI_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_rit.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,106 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_rit.h 2010-05-21 -*//** -* @file lpc17xx_rit.h -* @brief Contains all macro definitions and function prototypes -* support for RIT firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup RIT RIT (Repetitive Interrupt Timer) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_RIT_H_ -#define LPC17XX_RIT_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup RIT_Private_Macros RIT Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/*********************************************************************//** - * Macro defines for RIT control register - **********************************************************************/ -/** Set interrupt flag when the counter value equals the masked compare value */ -#define RIT_CTRL_INTEN ((uint32_t) (1)) -/** Set timer enable clear to 0 when the counter value equals the masked compare value */ -#define RIT_CTRL_ENCLR ((uint32_t) _BIT(1)) -/** Set timer enable on debug */ -#define RIT_CTRL_ENBR ((uint32_t) _BIT(2)) -/** Set timer enable */ -#define RIT_CTRL_TEN ((uint32_t) _BIT(3)) - -/** Macro to determine if it is valid RIT peripheral */ -#define PARAM_RITx(n) (((uint32_t *)n)==((uint32_t *)LPC_RIT)) -/** - * @} - */ - - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup RIT_Public_Functions RIT Public Functions - * @{ - */ -/* RIT Init/DeInit functions */ -void RIT_Init(LPC_RIT_TypeDef *RITx); -void RIT_DeInit(LPC_RIT_TypeDef *RITx); - -/* RIT config timer functions */ -void RIT_TimerConfig(LPC_RIT_TypeDef *RITx, uint32_t time_interval); - -/* Enable/Disable RIT functions */ -void RIT_TimerClearCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState); -void RIT_Cmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState); -void RIT_TimerDebugCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState); - -/* RIT Interrupt functions */ -IntStatus RIT_GetIntStatus(LPC_RIT_TypeDef *RITx); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_RIT_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_rtc.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,308 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_rtc.h 2010-05-21 -*//** -* @file lpc17xx_rtc.h -* @brief Contains all macro definitions and function prototypes -* support for RTC firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup RTC RTC (Real Time Clock) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_RTC_H_ -#define LPC17XX_RTC_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup RTC_Private_Macros RTC Private Macros - * @{ - */ - -/* ----------------------- BIT DEFINITIONS ----------------------------------- */ -/* Miscellaneous register group --------------------------------------------- */ -/********************************************************************** -* ILR register definitions -**********************************************************************/ -/** ILR register mask */ -#define RTC_ILR_BITMASK ((0x00000003)) -/** Bit inform the source interrupt is counter increment*/ -#define RTC_IRL_RTCCIF ((1<<0)) -/** Bit inform the source interrupt is alarm match*/ -#define RTC_IRL_RTCALF ((1<<1)) - -/********************************************************************** -* CCR register definitions -**********************************************************************/ -/** CCR register mask */ -#define RTC_CCR_BITMASK ((0x00000013)) -/** Clock enable */ -#define RTC_CCR_CLKEN ((1<<0)) -/** Clock reset */ -#define RTC_CCR_CTCRST ((1<<1)) -/** Calibration counter enable */ -#define RTC_CCR_CCALEN ((1<<4)) - -/********************************************************************** -* CIIR register definitions -**********************************************************************/ -/** Counter Increment Interrupt bit for second */ -#define RTC_CIIR_IMSEC ((1<<0)) -/** Counter Increment Interrupt bit for minute */ -#define RTC_CIIR_IMMIN ((1<<1)) -/** Counter Increment Interrupt bit for hour */ -#define RTC_CIIR_IMHOUR ((1<<2)) -/** Counter Increment Interrupt bit for day of month */ -#define RTC_CIIR_IMDOM ((1<<3)) -/** Counter Increment Interrupt bit for day of week */ -#define RTC_CIIR_IMDOW ((1<<4)) -/** Counter Increment Interrupt bit for day of year */ -#define RTC_CIIR_IMDOY ((1<<5)) -/** Counter Increment Interrupt bit for month */ -#define RTC_CIIR_IMMON ((1<<6)) -/** Counter Increment Interrupt bit for year */ -#define RTC_CIIR_IMYEAR ((1<<7)) -/** CIIR bit mask */ -#define RTC_CIIR_BITMASK ((0xFF)) - -/********************************************************************** -* AMR register definitions -**********************************************************************/ -/** Counter Increment Select Mask bit for second */ -#define RTC_AMR_AMRSEC ((1<<0)) -/** Counter Increment Select Mask bit for minute */ -#define RTC_AMR_AMRMIN ((1<<1)) -/** Counter Increment Select Mask bit for hour */ -#define RTC_AMR_AMRHOUR ((1<<2)) -/** Counter Increment Select Mask bit for day of month */ -#define RTC_AMR_AMRDOM ((1<<3)) -/** Counter Increment Select Mask bit for day of week */ -#define RTC_AMR_AMRDOW ((1<<4)) -/** Counter Increment Select Mask bit for day of year */ -#define RTC_AMR_AMRDOY ((1<<5)) -/** Counter Increment Select Mask bit for month */ -#define RTC_AMR_AMRMON ((1<<6)) -/** Counter Increment Select Mask bit for year */ -#define RTC_AMR_AMRYEAR ((1<<7)) -/** AMR bit mask */ -#define RTC_AMR_BITMASK ((0xFF)) - -/********************************************************************** -* RTC_AUX register definitions -**********************************************************************/ -/** RTC Oscillator Fail detect flag */ -#define RTC_AUX_RTC_OSCF ((1<<4)) - -/********************************************************************** -* RTC_AUXEN register definitions -**********************************************************************/ -/** Oscillator Fail Detect interrupt enable*/ -#define RTC_AUXEN_RTC_OSCFEN ((1<<4)) - -/* Consolidated time register group ----------------------------------- */ -/********************************************************************** -* Consolidated Time Register 0 definitions -**********************************************************************/ -#define RTC_CTIME0_SECONDS_MASK ((0x3F)) -#define RTC_CTIME0_MINUTES_MASK ((0x3F00)) -#define RTC_CTIME0_HOURS_MASK ((0x1F0000)) -#define RTC_CTIME0_DOW_MASK ((0x7000000)) - -/********************************************************************** -* Consolidated Time Register 1 definitions -**********************************************************************/ -#define RTC_CTIME1_DOM_MASK ((0x1F)) -#define RTC_CTIME1_MONTH_MASK ((0xF00)) -#define RTC_CTIME1_YEAR_MASK ((0xFFF0000)) - -/********************************************************************** -* Consolidated Time Register 2 definitions -**********************************************************************/ -#define RTC_CTIME2_DOY_MASK ((0xFFF)) - -/********************************************************************** -* Time Counter Group and Alarm register group -**********************************************************************/ -/** SEC register mask */ -#define RTC_SEC_MASK (0x0000003F) -/** MIN register mask */ -#define RTC_MIN_MASK (0x0000003F) -/** HOUR register mask */ -#define RTC_HOUR_MASK (0x0000001F) -/** DOM register mask */ -#define RTC_DOM_MASK (0x0000001F) -/** DOW register mask */ -#define RTC_DOW_MASK (0x00000007) -/** DOY register mask */ -#define RTC_DOY_MASK (0x000001FF) -/** MONTH register mask */ -#define RTC_MONTH_MASK (0x0000000F) -/** YEAR register mask */ -#define RTC_YEAR_MASK (0x00000FFF) - -#define RTC_SECOND_MAX 59 /*!< Maximum value of second */ -#define RTC_MINUTE_MAX 59 /*!< Maximum value of minute*/ -#define RTC_HOUR_MAX 23 /*!< Maximum value of hour*/ -#define RTC_MONTH_MIN 1 /*!< Minimum value of month*/ -#define RTC_MONTH_MAX 12 /*!< Maximum value of month*/ -#define RTC_DAYOFMONTH_MIN 1 /*!< Minimum value of day of month*/ -#define RTC_DAYOFMONTH_MAX 31 /*!< Maximum value of day of month*/ -#define RTC_DAYOFWEEK_MAX 6 /*!< Maximum value of day of week*/ -#define RTC_DAYOFYEAR_MIN 1 /*!< Minimum value of day of year*/ -#define RTC_DAYOFYEAR_MAX 366 /*!< Maximum value of day of year*/ -#define RTC_YEAR_MAX 4095 /*!< Maximum value of year*/ - -/********************************************************************** -* Calibration register -**********************************************************************/ -/* Calibration register */ -/** Calibration value */ -#define RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF)) -/** Calibration direction */ -#define RTC_CALIBRATION_LIBDIR ((1<<17)) -/** Calibration max value */ -#define RTC_CALIBRATION_MAX ((0x20000)) -/** Calibration definitions */ -#define RTC_CALIB_DIR_FORWARD ((uint8_t)(0)) -#define RTC_CALIB_DIR_BACKWARD ((uint8_t)(1)) - - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/** Macro to determine if it is valid RTC peripheral */ -#define PARAM_RTCx(x) (((uint32_t *)x)==((uint32_t *)LPC_RTC)) - -/* Macro check RTC interrupt type */ -#define PARAM_RTC_INT(n) ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM)) - -/* Macro check RTC time type */ -#define PARAM_RTC_TIMETYPE(n) ((n==RTC_TIMETYPE_SECOND) || (n==RTC_TIMETYPE_MINUTE) \ -|| (n==RTC_TIMETYPE_HOUR) || (n==RTC_TIMETYPE_DAYOFWEEK) \ -|| (n==RTC_TIMETYPE_DAYOFMONTH) || (n==RTC_TIMETYPE_DAYOFYEAR) \ -|| (n==RTC_TIMETYPE_MONTH) || (n==RTC_TIMETYPE_YEAR)) - -/* Macro check RTC calibration type */ -#define PARAM_RTC_CALIB_DIR(n) ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD)) - -/* Macro check RTC GPREG type */ -#define PARAM_RTC_GPREG_CH(n) ((n>=0) && (n<=4)) - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup RTC_Public_Types RTC Public Types - * @{ - */ - -/** @brief Time structure definitions for easy manipulate the data */ -typedef struct { - uint32_t SEC; /*!< Seconds Register */ - uint32_t MIN; /*!< Minutes Register */ - uint32_t HOUR; /*!< Hours Register */ - uint32_t DOM; /*!< Day of Month Register */ - uint32_t DOW; /*!< Day of Week Register */ - uint32_t DOY; /*!< Day of Year Register */ - uint32_t MONTH; /*!< Months Register */ - uint32_t YEAR; /*!< Years Register */ -} RTC_TIME_Type; - -/** @brief RTC interrupt source */ -typedef enum { - RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF, /*!< Counter Increment Interrupt */ - RTC_INT_ALARM = RTC_IRL_RTCALF /*!< The alarm interrupt */ -} RTC_INT_OPT; - - -/** @brief RTC time type option */ -typedef enum { - RTC_TIMETYPE_SECOND = 0, /*!< Second */ - RTC_TIMETYPE_MINUTE = 1, /*!< Month */ - RTC_TIMETYPE_HOUR = 2, /*!< Hour */ - RTC_TIMETYPE_DAYOFWEEK = 3, /*!< Day of week */ - RTC_TIMETYPE_DAYOFMONTH = 4, /*!< Day of month */ - RTC_TIMETYPE_DAYOFYEAR = 5, /*!< Day of year */ - RTC_TIMETYPE_MONTH = 6, /*!< Month */ - RTC_TIMETYPE_YEAR = 7 /*!< Year */ -} RTC_TIMETYPE_Num; - -/** - * @} - */ - - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup RTC_Public_Functions RTC Public Functions - * @{ - */ - -void RTC_Init (LPC_RTC_TypeDef *RTCx); -void RTC_DeInit(LPC_RTC_TypeDef *RTCx); -void RTC_ResetClockTickCounter(LPC_RTC_TypeDef *RTCx); -void RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState); -void RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, \ - FunctionalState NewState); -void RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, \ - FunctionalState NewState); -void RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue); -uint32_t RTC_GetTime(LPC_RTC_TypeDef *RTCx, uint32_t Timetype); -void RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime); -void RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime); -void RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue); -uint32_t RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype); -void RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime); -void RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime); -IntStatus RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType); -void RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType); -void RTC_CalibCounterCmd(LPC_RTC_TypeDef *RTCx, FunctionalState NewState); -void RTC_CalibConfig(LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir); -void RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value); -uint32_t RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_RTC_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_spi.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,322 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_spi.h 2010-05-21 -*//** -* @file lpc17xx_spi.h -* @brief Contains all macro definitions and function prototypes -* support for SPI firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup SPI SPI (Serial Peripheral Interface) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_SPI_H_ -#define LPC17XX_SPI_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup SPI_Public_Macros SPI Public Macros - * @{ - */ - -/*********************************************************************//** - * SPI configuration parameter defines - **********************************************************************/ -/** Clock phase control bit */ -#define SPI_CPHA_FIRST ((uint32_t)(0)) -#define SPI_CPHA_SECOND ((uint32_t)(1<<3)) - -/** Clock polarity control bit */ -#define SPI_CPOL_HI ((uint32_t)(0)) -#define SPI_CPOL_LO ((uint32_t)(1<<4)) - -/** SPI master mode enable */ -#define SPI_SLAVE_MODE ((uint32_t)(0)) -#define SPI_MASTER_MODE ((uint32_t)(1<<5)) - -/** LSB enable bit */ -#define SPI_DATA_MSB_FIRST ((uint32_t)(0)) -#define SPI_DATA_LSB_FIRST ((uint32_t)(1<<6)) - -/** SPI data bit number defines */ -#define SPI_DATABIT_16 SPI_SPCR_BITS(0) /*!< Databit number = 16 */ -#define SPI_DATABIT_8 SPI_SPCR_BITS(0x08) /*!< Databit number = 8 */ -#define SPI_DATABIT_9 SPI_SPCR_BITS(0x09) /*!< Databit number = 9 */ -#define SPI_DATABIT_10 SPI_SPCR_BITS(0x0A) /*!< Databit number = 10 */ -#define SPI_DATABIT_11 SPI_SPCR_BITS(0x0B) /*!< Databit number = 11 */ -#define SPI_DATABIT_12 SPI_SPCR_BITS(0x0C) /*!< Databit number = 12 */ -#define SPI_DATABIT_13 SPI_SPCR_BITS(0x0D) /*!< Databit number = 13 */ -#define SPI_DATABIT_14 SPI_SPCR_BITS(0x0E) /*!< Databit number = 14 */ -#define SPI_DATABIT_15 SPI_SPCR_BITS(0x0F) /*!< Databit number = 15 */ - -/*********************************************************************//** - * SPI Status Flag defines - **********************************************************************/ -/** Slave abort */ -#define SPI_STAT_ABRT SPI_SPSR_ABRT -/** Mode fault */ -#define SPI_STAT_MODF SPI_SPSR_MODF -/** Read overrun */ -#define SPI_STAT_ROVR SPI_SPSR_ROVR -/** Write collision */ -#define SPI_STAT_WCOL SPI_SPSR_WCOL -/** SPI transfer complete flag */ -#define SPI_STAT_SPIF SPI_SPSR_SPIF - -/* SPI Status Implementation definitions */ -#define SPI_STAT_DONE (1UL<<8) /**< Done */ -#define SPI_STAT_ERROR (1UL<<9) /**< Error */ - -/** - * @} - */ - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup SPI_Private_Macros SPI Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/*********************************************************************//** - * Macro defines for SPI Control Register - **********************************************************************/ -/** Bit enable, the SPI controller sends and receives the number - * of bits selected by bits 11:8 */ -#define SPI_SPCR_BIT_EN ((uint32_t)(1<<2)) -/** Clock phase control bit */ -#define SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3)) -/** Clock polarity control bit */ -#define SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4)) -/** SPI master mode enable */ -#define SPI_SPCR_MSTR ((uint32_t)(1<<5)) -/** LSB enable bit */ -#define SPI_SPCR_LSBF ((uint32_t)(1<<6)) -/** SPI interrupt enable bit */ -#define SPI_SPCR_SPIE ((uint32_t)(1<<7)) -/** When bit 2 of this register is 1, this field controls the -number of bits per transfer */ -#define SPI_SPCR_BITS(n) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8))) -/** SPI Control bit mask */ -#define SPI_SPCR_BITMASK ((uint32_t)(0xFFC)) - -/*********************************************************************//** - * Macro defines for SPI Status Register - **********************************************************************/ -/** Slave abort */ -#define SPI_SPSR_ABRT ((uint32_t)(1<<3)) -/** Mode fault */ -#define SPI_SPSR_MODF ((uint32_t)(1<<4)) -/** Read overrun */ -#define SPI_SPSR_ROVR ((uint32_t)(1<<5)) -/** Write collision */ -#define SPI_SPSR_WCOL ((uint32_t)(1<<6)) -/** SPI transfer complete flag */ -#define SPI_SPSR_SPIF ((uint32_t)(1<<7)) -/** SPI Status bit mask */ -#define SPI_SPSR_BITMASK ((uint32_t)(0xF8)) - -/*********************************************************************//** - * Macro defines for SPI Data Register - **********************************************************************/ -/** SPI Data low bit-mask */ -#define SPI_SPDR_LO_MASK ((uint32_t)(0xFF)) -/** SPI Data high bit-mask */ -#define SPI_SPDR_HI_MASK ((uint32_t)(0xFF00)) -/** SPI Data bit-mask */ -#define SPI_SPDR_BITMASK ((uint32_t)(0xFFFF)) - -/*********************************************************************//** - * Macro defines for SPI Clock Counter Register - **********************************************************************/ -/** SPI clock counter setting */ -#define SPI_SPCCR_COUNTER(n) ((uint32_t)(n&0xFF)) -/** SPI clock counter bit-mask */ -#define SPI_SPCCR_BITMASK ((uint32_t)(0xFF)) - -/*********************************************************************** - * Macro defines for SPI Test Control Register - **********************************************************************/ -/** SPI Test bit */ -#define SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE)) -/** SPI Test register bit mask */ -#define SPI_SPTCR_BITMASK ((uint32_t)(0xFE)) - -/*********************************************************************//** - * Macro defines for SPI Test Status Register - **********************************************************************/ -/** Slave abort */ -#define SPI_SPTSR_ABRT ((uint32_t)(1<<3)) -/** Mode fault */ -#define SPI_SPTSR_MODF ((uint32_t)(1<<4)) -/** Read overrun */ -#define SPI_SPTSR_ROVR ((uint32_t)(1<<5)) -/** Write collision */ -#define SPI_SPTSR_WCOL ((uint32_t)(1<<6)) -/** SPI transfer complete flag */ -#define SPI_SPTSR_SPIF ((uint32_t)(1<<7)) -/** SPI Status bit mask */ -#define SPI_SPTSR_MASKBIT ((uint32_t)(0xF8)) - -/*********************************************************************//** - * Macro defines for SPI Interrupt Register - **********************************************************************/ -/** SPI interrupt flag */ -#define SPI_SPINT_INTFLAG ((uint32_t)(1<<0)) -/** SPI interrupt register bit mask */ -#define SPI_SPINT_BITMASK ((uint32_t)(0x01)) - - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/** Macro to determine if it is valid SPI port number */ -#define PARAM_SPIx(n) (((uint32_t *)n)==((uint32_t *)LPC_SPI)) - -/** Macro check Clock phase control mode */ -#define PARAM_SPI_CPHA(n) ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND)) - -/** Macro check Clock polarity control mode */ -#define PARAM_SPI_CPOL(n) ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO)) - -/** Macro check master/slave mode */ -#define PARAM_SPI_MODE(n) ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE)) - -/** Macro check LSB/MSB mode */ -#define PARAM_SPI_DATA_ORDER(n) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST)) - -/** Macro check databit value */ -#define PARAM_SPI_DATABIT(n) ((n==SPI_DATABIT_16) || (n==SPI_DATABIT_8) \ -|| (n==SPI_DATABIT_9) || (n==SPI_DATABIT_10) \ -|| (n==SPI_DATABIT_11) || (n==SPI_DATABIT_12) \ -|| (n==SPI_DATABIT_13) || (n==SPI_DATABIT_14) \ -|| (n==SPI_DATABIT_15)) - -/** Macro check status flag */ -#define PARAM_SPI_STAT(n) ((n==SPI_STAT_ABRT) || (n==SPI_STAT_MODF) \ -|| (n==SPI_STAT_ROVR) || (n==SPI_STAT_WCOL) \ -|| (n==SPI_STAT_SPIF)) - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup SPI_Public_Types SPI Public Types - * @{ - */ - -/** @brief SPI configuration structure */ -typedef struct { - uint32_t Databit; /** Databit number, should be SPI_DATABIT_x, - where x is in range from 8 - 16 */ - uint32_t CPHA; /** Clock phase, should be: - - SPI_CPHA_FIRST: first clock edge - - SPI_CPHA_SECOND: second clock edge */ - uint32_t CPOL; /** Clock polarity, should be: - - SPI_CPOL_HI: high level - - SPI_CPOL_LO: low level */ - uint32_t Mode; /** SPI mode, should be: - - SPI_MASTER_MODE: Master mode - - SPI_SLAVE_MODE: Slave mode */ - uint32_t DataOrder; /** Data order, should be: - - SPI_DATA_MSB_FIRST: MSB first - - SPI_DATA_LSB_FIRST: LSB first */ - uint32_t ClockRate; /** Clock rate,in Hz, should not exceed - (SPI peripheral clock)/8 */ -} SPI_CFG_Type; - - -/** - * @brief SPI Transfer Type definitions - */ -typedef enum { - SPI_TRANSFER_POLLING = 0, /**< Polling transfer */ - SPI_TRANSFER_INTERRUPT /**< Interrupt transfer */ -} SPI_TRANSFER_Type; - -/** - * @brief SPI Data configuration structure definitions - */ -typedef struct { - void *tx_data; /**< Pointer to transmit data */ - void *rx_data; /**< Pointer to transmit data */ - uint32_t length; /**< Length of transfer data */ - uint32_t counter; /**< Data counter index */ - uint32_t status; /**< Current status of SPI activity */ -} SPI_DATA_SETUP_Type; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup SPI_Public_Functions SPI Public Functions - * @{ - */ - -/* SPI Init/DeInit functions ---------*/ -void SPI_Init(LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct); -void SPI_DeInit(LPC_SPI_TypeDef *SPIx); -void SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock); -void SPI_ConfigStructInit(SPI_CFG_Type *SPI_InitStruct); - -/* SPI transfer functions ------------*/ -void SPI_SendData(LPC_SPI_TypeDef *SPIx, uint16_t Data); -uint16_t SPI_ReceiveData(LPC_SPI_TypeDef *SPIx); -int32_t SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType); - -/* SPI Interrupt functions ---------*/ -void SPI_IntCmd(LPC_SPI_TypeDef *SPIx, FunctionalState NewState); -IntStatus SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx); -void SPI_ClearIntPending(LPC_SPI_TypeDef *SPIx); - -/* SPI get information functions-----*/ -uint8_t SPI_GetDataSize (LPC_SPI_TypeDef *SPIx); -uint32_t SPI_GetStatus(LPC_SPI_TypeDef *SPIx); -FlagStatus SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_SPI_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_ssp.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,466 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_ssp.h 2010-06-18 -*//** -* @file lpc17xx_ssp.h -* @brief Contains all macro definitions and function prototypes -* support for SSP firmware library on LPC17xx -* @version 3.0 -* @date 18. June. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup SSP SSP (Synchronous Serial Port) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_SSP_H_ -#define LPC17XX_SSP_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup SSP_Public_Macros SSP Public Macros - * @{ - */ - -/*********************************************************************//** - * SSP configuration parameter defines - **********************************************************************/ -/** Clock phase control bit */ -#define SSP_CPHA_FIRST ((uint32_t)(0)) -#define SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND - - -/** Clock polarity control bit */ -/* There's no bug here!!! - * - If bit[6] in SSPnCR0 is 0: SSP controller maintains the bus clock low between frames. - * That means the active clock is in HI state. - * - If bit[6] in SSPnCR0 is 1 (SSP_CR0_CPOL_HI): SSP controller maintains the bus clock - * high between frames. That means the active clock is in LO state. - */ -#define SSP_CPOL_HI ((uint32_t)(0)) -#define SSP_CPOL_LO SSP_CR0_CPOL_HI - -/** SSP master mode enable */ -#define SSP_SLAVE_MODE SSP_CR1_SLAVE_EN -#define SSP_MASTER_MODE ((uint32_t)(0)) - -/** SSP data bit number defines */ -#define SSP_DATABIT_4 SSP_CR0_DSS(4) /*!< Databit number = 4 */ -#define SSP_DATABIT_5 SSP_CR0_DSS(5) /*!< Databit number = 5 */ -#define SSP_DATABIT_6 SSP_CR0_DSS(6) /*!< Databit number = 6 */ -#define SSP_DATABIT_7 SSP_CR0_DSS(7) /*!< Databit number = 7 */ -#define SSP_DATABIT_8 SSP_CR0_DSS(8) /*!< Databit number = 8 */ -#define SSP_DATABIT_9 SSP_CR0_DSS(9) /*!< Databit number = 9 */ -#define SSP_DATABIT_10 SSP_CR0_DSS(10) /*!< Databit number = 10 */ -#define SSP_DATABIT_11 SSP_CR0_DSS(11) /*!< Databit number = 11 */ -#define SSP_DATABIT_12 SSP_CR0_DSS(12) /*!< Databit number = 12 */ -#define SSP_DATABIT_13 SSP_CR0_DSS(13) /*!< Databit number = 13 */ -#define SSP_DATABIT_14 SSP_CR0_DSS(14) /*!< Databit number = 14 */ -#define SSP_DATABIT_15 SSP_CR0_DSS(15) /*!< Databit number = 15 */ -#define SSP_DATABIT_16 SSP_CR0_DSS(16) /*!< Databit number = 16 */ - -/** SSP Frame Format definition */ -/** Motorola SPI mode */ -#define SSP_FRAME_SPI SSP_CR0_FRF_SPI -/** TI synchronous serial mode */ -#define SSP_FRAME_TI SSP_CR0_FRF_TI -/** National Micro-wire mode */ -#define SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE - -/*********************************************************************//** - * SSP Status defines - **********************************************************************/ -/** SSP status TX FIFO Empty bit */ -#define SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE -/** SSP status TX FIFO not full bit */ -#define SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF -/** SSP status RX FIFO not empty bit */ -#define SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE -/** SSP status RX FIFO full bit */ -#define SSP_STAT_RXFIFO_FULL SSP_SR_RFF -/** SSP status SSP Busy bit */ -#define SSP_STAT_BUSY SSP_SR_BSY - -/*********************************************************************//** - * SSP Interrupt Configuration defines - **********************************************************************/ -/** Receive Overrun */ -#define SSP_INTCFG_ROR SSP_IMSC_ROR -/** Receive TimeOut */ -#define SSP_INTCFG_RT SSP_IMSC_RT -/** Rx FIFO is at least half full */ -#define SSP_INTCFG_RX SSP_IMSC_RX -/** Tx FIFO is at least half empty */ -#define SSP_INTCFG_TX SSP_IMSC_TX - -/*********************************************************************//** - * SSP Configured Interrupt Status defines - **********************************************************************/ -/** Receive Overrun */ -#define SSP_INTSTAT_ROR SSP_MIS_ROR -/** Receive TimeOut */ -#define SSP_INTSTAT_RT SSP_MIS_RT -/** Rx FIFO is at least half full */ -#define SSP_INTSTAT_RX SSP_MIS_RX -/** Tx FIFO is at least half empty */ -#define SSP_INTSTAT_TX SSP_MIS_TX - -/*********************************************************************//** - * SSP Raw Interrupt Status defines - **********************************************************************/ -/** Receive Overrun */ -#define SSP_INTSTAT_RAW_ROR SSP_RIS_ROR -/** Receive TimeOut */ -#define SSP_INTSTAT_RAW_RT SSP_RIS_RT -/** Rx FIFO is at least half full */ -#define SSP_INTSTAT_RAW_RX SSP_RIS_RX -/** Tx FIFO is at least half empty */ -#define SSP_INTSTAT_RAW_TX SSP_RIS_TX - -/*********************************************************************//** - * SSP Interrupt Clear defines - **********************************************************************/ -/** Writing a 1 to this bit clears the "frame was received when - * RxFIFO was full" interrupt */ -#define SSP_INTCLR_ROR SSP_ICR_ROR -/** Writing a 1 to this bit clears the "Rx FIFO was not empty and - * has not been read for a timeout period" interrupt */ -#define SSP_INTCLR_RT SSP_ICR_RT - -/*********************************************************************//** - * SSP DMA defines - **********************************************************************/ -/** SSP bit for enabling RX DMA */ -#define SSP_DMA_RX SSP_DMA_RXDMA_EN -/** SSP bit for enabling TX DMA */ -#define SSP_DMA_TX SSP_DMA_TXDMA_EN - -/* SSP Status Implementation definitions */ -#define SSP_STAT_DONE (1UL<<8) /**< Done */ -#define SSP_STAT_ERROR (1UL<<9) /**< Error */ - -/** - * @} - */ - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup SSP_Private_Macros SSP Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/*********************************************************************//** - * Macro defines for CR0 register - **********************************************************************/ -/** SSP data size select, must be 4 bits to 16 bits */ -#define SSP_CR0_DSS(n) ((uint32_t)((n-1)&0xF)) -/** SSP control 0 Motorola SPI mode */ -#define SSP_CR0_FRF_SPI ((uint32_t)(0<<4)) -/** SSP control 0 TI synchronous serial mode */ -#define SSP_CR0_FRF_TI ((uint32_t)(1<<4)) -/** SSP control 0 National Micro-wire mode */ -#define SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4)) -/** SPI clock polarity bit (used in SPI mode only), (1) = maintains the - bus clock high between frames, (0) = low */ -#define SSP_CR0_CPOL_HI ((uint32_t)(1<<6)) -/** SPI clock out phase bit (used in SPI mode only), (1) = captures data - on the second clock transition of the frame, (0) = first */ -#define SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7)) -/** SSP serial clock rate value load macro, divider rate is - PERIPH_CLK / (cpsr * (SCR + 1)) */ -#define SSP_CR0_SCR(n) ((uint32_t)((n&0xFF)<<8)) -/** SSP CR0 bit mask */ -#define SSP_CR0_BITMASK ((uint32_t)(0xFFFF)) - -/*********************************************************************//** - * Macro defines for CR1 register - **********************************************************************/ -/** SSP control 1 loopback mode enable bit */ -#define SSP_CR1_LBM_EN ((uint32_t)(1<<0)) -/** SSP control 1 enable bit */ -#define SSP_CR1_SSP_EN ((uint32_t)(1<<1)) -/** SSP control 1 slave enable */ -#define SSP_CR1_SLAVE_EN ((uint32_t)(1<<2)) -/** SSP control 1 slave out disable bit, disables transmit line in slave - mode */ -#define SSP_CR1_SO_DISABLE ((uint32_t)(1<<3)) -/** SSP CR1 bit mask */ -#define SSP_CR1_BITMASK ((uint32_t)(0x0F)) - -/*********************************************************************//** - * Macro defines for DR register - **********************************************************************/ -/** SSP data bit mask */ -#define SSP_DR_BITMASK(n) ((n)&0xFFFF) - -/*********************************************************************//** - * Macro defines for SR register - **********************************************************************/ -/** SSP status TX FIFO Empty bit */ -#define SSP_SR_TFE ((uint32_t)(1<<0)) -/** SSP status TX FIFO not full bit */ -#define SSP_SR_TNF ((uint32_t)(1<<1)) -/** SSP status RX FIFO not empty bit */ -#define SSP_SR_RNE ((uint32_t)(1<<2)) -/** SSP status RX FIFO full bit */ -#define SSP_SR_RFF ((uint32_t)(1<<3)) -/** SSP status SSP Busy bit */ -#define SSP_SR_BSY ((uint32_t)(1<<4)) -/** SSP SR bit mask */ -#define SSP_SR_BITMASK ((uint32_t)(0x1F)) - -/*********************************************************************//** - * Macro defines for CPSR register - **********************************************************************/ -/** SSP clock prescaler */ -#define SSP_CPSR_CPDVSR(n) ((uint32_t)(n&0xFF)) -/** SSP CPSR bit mask */ -#define SSP_CPSR_BITMASK ((uint32_t)(0xFF)) - -/*********************************************************************//** - * Macro define for (IMSC) Interrupt Mask Set/Clear registers - **********************************************************************/ -/** Receive Overrun */ -#define SSP_IMSC_ROR ((uint32_t)(1<<0)) -/** Receive TimeOut */ -#define SSP_IMSC_RT ((uint32_t)(1<<1)) -/** Rx FIFO is at least half full */ -#define SSP_IMSC_RX ((uint32_t)(1<<2)) -/** Tx FIFO is at least half empty */ -#define SSP_IMSC_TX ((uint32_t)(1<<3)) -/** IMSC bit mask */ -#define SSP_IMSC_BITMASK ((uint32_t)(0x0F)) - -/*********************************************************************//** - * Macro define for (RIS) Raw Interrupt Status registers - **********************************************************************/ -/** Receive Overrun */ -#define SSP_RIS_ROR ((uint32_t)(1<<0)) -/** Receive TimeOut */ -#define SSP_RIS_RT ((uint32_t)(1<<1)) -/** Rx FIFO is at least half full */ -#define SSP_RIS_RX ((uint32_t)(1<<2)) -/** Tx FIFO is at least half empty */ -#define SSP_RIS_TX ((uint32_t)(1<<3)) -/** RIS bit mask */ -#define SSP_RIS_BITMASK ((uint32_t)(0x0F)) - -/*********************************************************************//** - * Macro define for (MIS) Masked Interrupt Status registers - **********************************************************************/ -/** Receive Overrun */ -#define SSP_MIS_ROR ((uint32_t)(1<<0)) -/** Receive TimeOut */ -#define SSP_MIS_RT ((uint32_t)(1<<1)) -/** Rx FIFO is at least half full */ -#define SSP_MIS_RX ((uint32_t)(1<<2)) -/** Tx FIFO is at least half empty */ -#define SSP_MIS_TX ((uint32_t)(1<<3)) -/** MIS bit mask */ -#define SSP_MIS_BITMASK ((uint32_t)(0x0F)) - -/*********************************************************************//** - * Macro define for (ICR) Interrupt Clear registers - **********************************************************************/ -/** Writing a 1 to this bit clears the "frame was received when - * RxFIFO was full" interrupt */ -#define SSP_ICR_ROR ((uint32_t)(1<<0)) -/** Writing a 1 to this bit clears the "Rx FIFO was not empty and - * has not been read for a timeout period" interrupt */ -#define SSP_ICR_RT ((uint32_t)(1<<1)) -/** ICR bit mask */ -#define SSP_ICR_BITMASK ((uint32_t)(0x03)) - -/*********************************************************************//** - * Macro defines for DMACR register - **********************************************************************/ -/** SSP bit for enabling RX DMA */ -#define SSP_DMA_RXDMA_EN ((uint32_t)(1<<0)) -/** SSP bit for enabling TX DMA */ -#define SSP_DMA_TXDMA_EN ((uint32_t)(1<<1)) -/** DMACR bit mask */ -#define SSP_DMA_BITMASK ((uint32_t)(0x03)) - - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/** Macro to determine if it is valid SSP port number */ -#define PARAM_SSPx(n) ((((uint32_t *)n)==((uint32_t *)LPC_SSP0)) \ -|| (((uint32_t *)n)==((uint32_t *)LPC_SSP1))) - -/** Macro check clock phase control mode */ -#define PARAM_SSP_CPHA(n) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND)) - -/** Macro check clock polarity mode */ -#define PARAM_SSP_CPOL(n) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO)) - -/* Macro check master/slave mode */ -#define PARAM_SSP_MODE(n) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE)) - -/* Macro check databit value */ -#define PARAM_SSP_DATABIT(n) ((n==SSP_DATABIT_4) || (n==SSP_DATABIT_5) \ -|| (n==SSP_DATABIT_6) || (n==SSP_DATABIT_16) \ -|| (n==SSP_DATABIT_7) || (n==SSP_DATABIT_8) \ -|| (n==SSP_DATABIT_9) || (n==SSP_DATABIT_10) \ -|| (n==SSP_DATABIT_11) || (n==SSP_DATABIT_12) \ -|| (n==SSP_DATABIT_13) || (n==SSP_DATABIT_14) \ -|| (n==SSP_DATABIT_15)) - -/* Macro check frame type */ -#define PARAM_SSP_FRAME(n) ((n==SSP_FRAME_SPI) || (n==SSP_FRAME_TI)\ -|| (n==SSP_FRAME_MICROWIRE)) - -/* Macro check SSP status */ -#define PARAM_SSP_STAT(n) ((n==SSP_STAT_TXFIFO_EMPTY) || (n==SSP_STAT_TXFIFO_NOTFULL) \ -|| (n==SSP_STAT_RXFIFO_NOTEMPTY) || (n==SSP_STAT_RXFIFO_FULL) \ -|| (n==SSP_STAT_BUSY)) - -/* Macro check interrupt configuration */ -#define PARAM_SSP_INTCFG(n) ((n==SSP_INTCFG_ROR) || (n==SSP_INTCFG_RT) \ -|| (n==SSP_INTCFG_RX) || (n==SSP_INTCFG_TX)) - -/* Macro check interrupt status value */ -#define PARAM_SSP_INTSTAT(n) ((n==SSP_INTSTAT_ROR) || (n==SSP_INTSTAT_RT) \ -|| (n==SSP_INTSTAT_RX) || (n==SSP_INTSTAT_TX)) - -/* Macro check interrupt status raw value */ -#define PARAM_SSP_INTSTAT_RAW(n) ((n==SSP_INTSTAT_RAW_ROR) || (n==SSP_INTSTAT_RAW_RT) \ -|| (n==SSP_INTSTAT_RAW_RX) || (n==SSP_INTSTAT_RAW_TX)) - -/* Macro check interrupt clear mode */ -#define PARAM_SSP_INTCLR(n) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT)) - -/* Macro check DMA mode */ -#define PARAM_SSP_DMA(n) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX)) -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup SSP_Public_Types SSP Public Types - * @{ - */ - -/** @brief SSP configuration structure */ -typedef struct { - uint32_t Databit; /** Databit number, should be SSP_DATABIT_x, - where x is in range from 4 - 16 */ - uint32_t CPHA; /** Clock phase, should be: - - SSP_CPHA_FIRST: first clock edge - - SSP_CPHA_SECOND: second clock edge */ - uint32_t CPOL; /** Clock polarity, should be: - - SSP_CPOL_HI: high level - - SSP_CPOL_LO: low level */ - uint32_t Mode; /** SSP mode, should be: - - SSP_MASTER_MODE: Master mode - - SSP_SLAVE_MODE: Slave mode */ - uint32_t FrameFormat; /** Frame Format: - - SSP_FRAME_SPI: Motorola SPI frame format - - SSP_FRAME_TI: TI frame format - - SSP_FRAME_MICROWIRE: National Microwire frame format */ - uint32_t ClockRate; /** Clock rate,in Hz */ -} SSP_CFG_Type; - -/** - * @brief SSP Transfer Type definitions - */ -typedef enum { - SSP_TRANSFER_POLLING = 0, /**< Polling transfer */ - SSP_TRANSFER_INTERRUPT /**< Interrupt transfer */ -} SSP_TRANSFER_Type; - -/** - * @brief SPI Data configuration structure definitions - */ -typedef struct { - void *tx_data; /**< Pointer to transmit data */ - uint32_t tx_cnt; /**< Transmit counter */ - void *rx_data; /**< Pointer to transmit data */ - uint32_t rx_cnt; /**< Receive counter */ - uint32_t length; /**< Length of transfer data */ - uint32_t status; /**< Current status of SSP activity */ -} SSP_DATA_SETUP_Type; - - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup SSP_Public_Functions SSP Public Functions - * @{ - */ - -/* SSP Init/DeInit functions --------------------------------------------------*/ -void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct); -void SSP_DeInit(LPC_SSP_TypeDef* SSPx); - -/* SSP configure functions ----------------------------------------------------*/ -void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct); - -/* SSP enable/disable functions -----------------------------------------------*/ -void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState); -void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState); -void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState); -void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState); - -/* SSP get information functions ----------------------------------------------*/ -FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType); -uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx); -IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType); -uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx); -IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType); - -/* SSP transfer data functions ------------------------------------------------*/ -void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data); -uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx); -int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \ - SSP_TRANSFER_Type xfType); - -/* SSP IRQ function ------------------------------------------------------------*/ -void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState); -void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType); - - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_SSP_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_systick.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,113 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_systick.h 2010-05-21 -*//** -* @file lpc17xx_systick.h -* @brief Contains all macro definitions and function prototypes -* support for SYSTICK firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup SYSTICK SYSTICK (System Tick) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_SYSTICK_H_ -#define LPC17XX_SYSTICK_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup SYSTICK_Private_Macros SYSTICK Private Macros - * @{ - */ -/*********************************************************************//** - * Macro defines for System Timer Control and status (STCTRL) register - **********************************************************************/ -#define ST_CTRL_ENABLE ((uint32_t)(1<<0)) -#define ST_CTRL_TICKINT ((uint32_t)(1<<1)) -#define ST_CTRL_CLKSOURCE ((uint32_t)(1<<2)) -#define ST_CTRL_COUNTFLAG ((uint32_t)(1<<16)) - -/*********************************************************************//** - * Macro defines for System Timer Reload value (STRELOAD) register - **********************************************************************/ -#define ST_RELOAD_RELOAD(n) ((uint32_t)(n & 0x00FFFFFF)) - -/*********************************************************************//** - * Macro defines for System Timer Current value (STCURRENT) register - **********************************************************************/ -#define ST_RELOAD_CURRENT(n) ((uint32_t)(n & 0x00FFFFFF)) - -/*********************************************************************//** - * Macro defines for System Timer Calibration value (STCALIB) register - **********************************************************************/ -#define ST_CALIB_TENMS(n) ((uint32_t)(n & 0x00FFFFFF)) -#define ST_CALIB_SKEW ((uint32_t)(1<<30)) -#define ST_CALIB_NOREF ((uint32_t)(1<<31)) - -#define CLKSOURCE_EXT ((uint32_t)(0)) -#define CLKSOURCE_CPU ((uint32_t)(1)) - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup SYSTICK_Public_Functions SYSTICK Public Functions - * @{ - */ - -void SYSTICK_InternalInit(uint32_t time); -void SYSTICK_ExternalInit(uint32_t freq, uint32_t time); - -void SYSTICK_Cmd(FunctionalState NewState); -void SYSTICK_IntCmd(FunctionalState NewState); -uint32_t SYSTICK_GetCurrentValue(void); -void SYSTICK_ClearCounterFlag(void); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - - -#endif /* LPC17XX_SYSTICK_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_timer.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,342 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_timer.h 2010-05-21 -*//** -* @file lpc17xx_timer.h -* @brief Contains all macro definitions and function prototypes -* support for Timer firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup TIM TIM (Timer) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef __LPC17XX_TIMER_H_ -#define __LPC17XX_TIMER_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup TIM_Private_Macros TIM Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/********************************************************************** -** Interrupt information -**********************************************************************/ -/** Macro to clean interrupt pending */ -#define TIM_IR_CLR(n) _BIT(n) - -/********************************************************************** -** Timer interrupt register definitions -**********************************************************************/ -/** Macro for getting a timer match interrupt bit */ -#define TIM_MATCH_INT(n) (_BIT(n & 0x0F)) -/** Macro for getting a capture event interrupt bit */ -#define TIM_CAP_INT(n) (_BIT(((n & 0x0F) + 4))) - -/********************************************************************** -* Timer control register definitions -**********************************************************************/ -/** Timer/counter enable bit */ -#define TIM_ENABLE ((uint32_t)(1<<0)) -/** Timer/counter reset bit */ -#define TIM_RESET ((uint32_t)(1<<1)) -/** Timer control bit mask */ -#define TIM_TCR_MASKBIT ((uint32_t)(3)) - -/********************************************************************** -* Timer match control register definitions -**********************************************************************/ -/** Bit location for interrupt on MRx match, n = 0 to 3 */ -#define TIM_INT_ON_MATCH(n) (_BIT((n * 3))) -/** Bit location for reset on MRx match, n = 0 to 3 */ -#define TIM_RESET_ON_MATCH(n) (_BIT(((n * 3) + 1))) -/** Bit location for stop on MRx match, n = 0 to 3 */ -#define TIM_STOP_ON_MATCH(n) (_BIT(((n * 3) + 2))) -/** Timer Match control bit mask */ -#define TIM_MCR_MASKBIT ((uint32_t)(0x0FFF)) -/** Timer Match control bit mask for specific channel*/ -#define TIM_MCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3))) - -/********************************************************************** -* Timer capture control register definitions -**********************************************************************/ -/** Bit location for CAP.n on CRx rising edge, n = 0 to 3 */ -#define TIM_CAP_RISING(n) (_BIT((n * 3))) -/** Bit location for CAP.n on CRx falling edge, n = 0 to 3 */ -#define TIM_CAP_FALLING(n) (_BIT(((n * 3) + 1))) -/** Bit location for CAP.n on CRx interrupt enable, n = 0 to 3 */ -#define TIM_INT_ON_CAP(n) (_BIT(((n * 3) + 2))) -/** Mask bit for rising and falling edge bit */ -#define TIM_EDGE_MASK(n) (_SBF((n * 3), 0x03)) -/** Timer capture control bit mask */ -#define TIM_CCR_MASKBIT ((uint32_t)(0x3F)) -/** Timer Capture control bit mask for specific channel*/ -#define TIM_CCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3))) - -/********************************************************************** -* Timer external match register definitions -**********************************************************************/ -/** Bit location for output state change of MAT.n when external match - happens, n = 0 to 3 */ -#define TIM_EM(n) _BIT(n) -/** Output state change of MAT.n when external match happens: no change */ -#define TIM_EM_NOTHING ((uint8_t)(0x0)) -/** Output state change of MAT.n when external match happens: low */ -#define TIM_EM_LOW ((uint8_t)(0x1)) -/** Output state change of MAT.n when external match happens: high */ -#define TIM_EM_HIGH ((uint8_t)(0x2)) -/** Output state change of MAT.n when external match happens: toggle */ -#define TIM_EM_TOGGLE ((uint8_t)(0x3)) -/** Macro for setting for the MAT.n change state bits */ -#define TIM_EM_SET(n,s) (_SBF(((n << 1) + 4), (s & 0x03))) -/** Mask for the MAT.n change state bits */ -#define TIM_EM_MASK(n) (_SBF(((n << 1) + 4), 0x03)) -/** Timer external match bit mask */ -#define TIM_EMR_MASKBIT 0x0FFF - -/********************************************************************** -* Timer Count Control Register definitions -**********************************************************************/ -/** Mask to get the Counter/timer mode bits */ -#define TIM_CTCR_MODE_MASK 0x3 -/** Mask to get the count input select bits */ -#define TIM_CTCR_INPUT_MASK 0xC -/** Timer Count control bit mask */ -#define TIM_CTCR_MASKBIT 0xF -#define TIM_COUNTER_MODE ((uint8_t)(1)) - - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/** Macro to determine if it is valid TIMER peripheral */ -#define PARAM_TIMx(n) ((((uint32_t *)n)==((uint32_t *)LPC_TIM0)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM1)) \ -|| (((uint32_t *)n)==((uint32_t *)LPC_TIM2)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM3))) - -/* Macro check interrupt type */ -#define PARAM_TIM_INT_TYPE(TYPE) ((TYPE ==TIM_MR0_INT)||(TYPE ==TIM_MR1_INT)\ -||(TYPE ==TIM_MR2_INT)||(TYPE ==TIM_MR3_INT)\ -||(TYPE ==TIM_CR0_INT)||(TYPE ==TIM_CR1_INT)) - -/* Macro check TIMER mode */ -#define PARAM_TIM_MODE_OPT(MODE) ((MODE == TIM_TIMER_MODE)||(MODE == TIM_COUNTER_RISING_MODE)\ -|| (MODE == TIM_COUNTER_RISING_MODE)||(MODE == TIM_COUNTER_RISING_MODE)) - -/* Macro check TIMER prescale value */ -#define PARAM_TIM_PRESCALE_OPT(OPT) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL)) - -/* Macro check TIMER counter intput mode */ -#define PARAM_TIM_COUNTER_INPUT_OPT(OPT) ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1)) - -/* Macro check TIMER external match mode */ -#define PARAM_TIM_EXTMATCH_OPT(OPT) ((OPT == TIM_EXTMATCH_NOTHING)||(OPT == TIM_EXTMATCH_LOW)\ -||(OPT == TIM_EXTMATCH_HIGH)||(OPT == TIM_EXTMATCH_TOGGLE)) - -/* Macro check TIMER external match mode */ -#define PARAM_TIM_CAP_MODE_OPT(OPT) ((OPT == TIM_CAPTURE_NONE)||(OPT == TIM_CAPTURE_RISING) \ -||(OPT == TIM_CAPTURE_FALLING)||(OPT == TIM_CAPTURE_ANY)) - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup TIM_Public_Types TIM Public Types - * @{ - */ - -/*********************************************************************** - * Timer device enumeration -**********************************************************************/ -/** @brief interrupt type */ -typedef enum -{ - TIM_MR0_INT =0, /*!< interrupt for Match channel 0*/ - TIM_MR1_INT =1, /*!< interrupt for Match channel 1*/ - TIM_MR2_INT =2, /*!< interrupt for Match channel 2*/ - TIM_MR3_INT =3, /*!< interrupt for Match channel 3*/ - TIM_CR0_INT =4, /*!< interrupt for Capture channel 0*/ - TIM_CR1_INT =5 /*!< interrupt for Capture channel 1*/ -}TIM_INT_TYPE; - -/** @brief Timer/counter operating mode */ -typedef enum -{ - TIM_TIMER_MODE = 0, /*!< Timer mode */ - TIM_COUNTER_RISING_MODE, /*!< Counter rising mode */ - TIM_COUNTER_FALLING_MODE, /*!< Counter falling mode */ - TIM_COUNTER_ANY_MODE /*!< Counter on both edges */ -} TIM_MODE_OPT; - -/** @brief Timer/Counter prescale option */ -typedef enum -{ - TIM_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */ - TIM_PRESCALE_USVAL /*!< Prescale in microsecond value */ -} TIM_PRESCALE_OPT; - -/** @brief Counter input option */ -typedef enum -{ - TIM_COUNTER_INCAP0 = 0, /*!< CAPn.0 input pin for TIMERn */ - TIM_COUNTER_INCAP1, /*!< CAPn.1 input pin for TIMERn */ -} TIM_COUNTER_INPUT_OPT; - -/** @brief Timer/Counter external match option */ -typedef enum -{ - TIM_EXTMATCH_NOTHING = 0, /*!< Do nothing for external output pin if match */ - TIM_EXTMATCH_LOW, /*!< Force external output pin to low if match */ - TIM_EXTMATCH_HIGH, /*!< Force external output pin to high if match */ - TIM_EXTMATCH_TOGGLE /*!< Toggle external output pin if match */ -}TIM_EXTMATCH_OPT; - -/** @brief Timer/counter capture mode options */ -typedef enum { - TIM_CAPTURE_NONE = 0, /*!< No Capture */ - TIM_CAPTURE_RISING, /*!< Rising capture mode */ - TIM_CAPTURE_FALLING, /*!< Falling capture mode */ - TIM_CAPTURE_ANY /*!< On both edges */ -} TIM_CAP_MODE_OPT; - -/** @brief Configuration structure in TIMER mode */ -typedef struct -{ - - uint8_t PrescaleOption; /**< Timer Prescale option, should be: - - TIM_PRESCALE_TICKVAL: Prescale in absolute value - - TIM_PRESCALE_USVAL: Prescale in microsecond value - */ - uint8_t Reserved[3]; /**< Reserved */ - uint32_t PrescaleValue; /**< Prescale value */ -} TIM_TIMERCFG_Type; - -/** @brief Configuration structure in COUNTER mode */ -typedef struct { - - uint8_t CounterOption; /**< Counter Option, should be: - - TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn - - TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn - */ - uint8_t CountInputSelect; - uint8_t Reserved[2]; -} TIM_COUNTERCFG_Type; - -/** @brief Match channel configuration structure */ -typedef struct { - uint8_t MatchChannel; /**< Match channel, should be in range - from 0..3 */ - uint8_t IntOnMatch; /**< Interrupt On match, should be: - - ENABLE: Enable this function. - - DISABLE: Disable this function. - */ - uint8_t StopOnMatch; /**< Stop On match, should be: - - ENABLE: Enable this function. - - DISABLE: Disable this function. - */ - uint8_t ResetOnMatch; /**< Reset On match, should be: - - ENABLE: Enable this function. - - DISABLE: Disable this function. - */ - - uint8_t ExtMatchOutputType; /**< External Match Output type, should be: - - TIM_EXTMATCH_NOTHING: Do nothing for external output pin if match - - TIM_EXTMATCH_LOW: Force external output pin to low if match - - TIM_EXTMATCH_HIGH: Force external output pin to high if match - - TIM_EXTMATCH_TOGGLE: Toggle external output pin if match. - */ - uint8_t Reserved[3]; /** Reserved */ - uint32_t MatchValue; /** Match value */ -} TIM_MATCHCFG_Type; - -/** @brief Capture Input configuration structure */ -typedef struct { - uint8_t CaptureChannel; /**< Capture channel, should be in range - from 0..1 */ - uint8_t RisingEdge; /**< caption rising edge, should be: - - ENABLE: Enable rising edge. - - DISABLE: Disable this function. - */ - uint8_t FallingEdge; /**< caption falling edge, should be: - - ENABLE: Enable falling edge. - - DISABLE: Disable this function. - */ - uint8_t IntOnCaption; /**< Interrupt On caption, should be: - - ENABLE: Enable interrupt function. - - DISABLE: Disable this function. - */ - -} TIM_CAPTURECFG_Type; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup TIM_Public_Functions TIM Public Functions - * @{ - */ -/* Init/DeInit TIM functions -----------*/ -void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct); -void TIM_DeInit(LPC_TIM_TypeDef *TIMx); - -/* TIM interrupt functions -------------*/ -void TIM_ClearIntPending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag); -void TIM_ClearIntCapturePending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag); -FlagStatus TIM_GetIntStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag); -FlagStatus TIM_GetIntCaptureStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag); - -/* TIM configuration functions --------*/ -void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct); -void TIM_ConfigMatch(LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct); -void TIM_UpdateMatchValue(LPC_TIM_TypeDef *TIMx,uint8_t MatchChannel, uint32_t MatchValue); -void TIM_SetMatchExt(LPC_TIM_TypeDef *TIMx,TIM_EXTMATCH_OPT ext_match ); -void TIM_ConfigCapture(LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct); -void TIM_Cmd(LPC_TIM_TypeDef *TIMx, FunctionalState NewState); - -uint32_t TIM_GetCaptureValue(LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel); -void TIM_ResetCounter(LPC_TIM_TypeDef *TIMx); - -/** - * @} - */ -#ifdef __cplusplus -} -#endif - -#endif /* __LPC17XX_TIMER_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_uart.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,650 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_uart.h 2010-06-18 -*//** -* @file lpc17xx_uart.h -* @brief Contains all macro definitions and function prototypes -* support for UART firmware library on LPC17xx -* @version 3.0 -* @date 18. June. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup UART UART (Universal Asynchronous Receiver/Transmitter) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef __LPC17XX_UART_H -#define __LPC17XX_UART_H - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup UART_Public_Macros UART Public Macros - * @{ - */ - -/** UART time-out definitions in case of using Read() and Write function - * with Blocking Flag mode - */ -#define UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL) - -/** - * @} - */ - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup UART_Private_Macros UART Private Macros - * @{ - */ - -/* Accepted Error baud rate value (in percent unit) */ -#define UART_ACCEPTED_BAUDRATE_ERROR (3) /*!< Acceptable UART baudrate error */ - - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/*********************************************************************//** - * Macro defines for Macro defines for UARTn Receiver Buffer Register - **********************************************************************/ -#define UART_RBR_MASKBIT ((uint8_t)0xFF) /*!< UART Received Buffer mask bit (8 bits) */ - -/*********************************************************************//** - * Macro defines for Macro defines for UARTn Transmit Holding Register - **********************************************************************/ -#define UART_THR_MASKBIT ((uint8_t)0xFF) /*!< UART Transmit Holding mask bit (8 bits) */ - -/*********************************************************************//** - * Macro defines for Macro defines for UARTn Divisor Latch LSB register - **********************************************************************/ -#define UART_LOAD_DLL(div) ((div) & 0xFF) /**< Macro for loading least significant halfs of divisors */ -#define UART_DLL_MASKBIT ((uint8_t)0xFF) /*!< Divisor latch LSB bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UARTn Divisor Latch MSB register - **********************************************************************/ -#define UART_DLM_MASKBIT ((uint8_t)0xFF) /*!< Divisor latch MSB bit mask */ -#define UART_LOAD_DLM(div) (((div) >> 8) & 0xFF) /**< Macro for loading most significant halfs of divisors */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART interrupt enable register - **********************************************************************/ -#define UART_IER_RBRINT_EN ((uint32_t)(1<<0)) /*!< RBR Interrupt enable*/ -#define UART_IER_THREINT_EN ((uint32_t)(1<<1)) /*!< THR Interrupt enable*/ -#define UART_IER_RLSINT_EN ((uint32_t)(1<<2)) /*!< RX line status interrupt enable*/ -#define UART1_IER_MSINT_EN ((uint32_t)(1<<3)) /*!< Modem status interrupt enable */ -#define UART1_IER_CTSINT_EN ((uint32_t)(1<<7)) /*!< CTS1 signal transition interrupt enable */ -#define UART_IER_ABEOINT_EN ((uint32_t)(1<<8)) /*!< Enables the end of auto-baud interrupt */ -#define UART_IER_ABTOINT_EN ((uint32_t)(1<<9)) /*!< Enables the auto-baud time-out interrupt */ -#define UART_IER_BITMASK ((uint32_t)(0x307)) /*!< UART interrupt enable register bit mask */ -#define UART1_IER_BITMASK ((uint32_t)(0x38F)) /*!< UART1 interrupt enable register bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART interrupt identification register - **********************************************************************/ -#define UART_IIR_INTSTAT_PEND ((uint32_t)(1<<0)) /*!<Interrupt Status - Active low */ -#define UART_IIR_INTID_RLS ((uint32_t)(3<<1)) /*!<Interrupt identification: Receive line status*/ -#define UART_IIR_INTID_RDA ((uint32_t)(2<<1)) /*!<Interrupt identification: Receive data available*/ -#define UART_IIR_INTID_CTI ((uint32_t)(6<<1)) /*!<Interrupt identification: Character time-out indicator*/ -#define UART_IIR_INTID_THRE ((uint32_t)(1<<1)) /*!<Interrupt identification: THRE interrupt*/ -#define UART1_IIR_INTID_MODEM ((uint32_t)(0<<1)) /*!<Interrupt identification: Modem interrupt*/ -#define UART_IIR_INTID_MASK ((uint32_t)(7<<1)) /*!<Interrupt identification: Interrupt ID mask */ -#define UART_IIR_FIFO_EN ((uint32_t)(3<<6)) /*!<These bits are equivalent to UnFCR[0] */ -#define UART_IIR_ABEO_INT ((uint32_t)(1<<8)) /*!< End of auto-baud interrupt */ -#define UART_IIR_ABTO_INT ((uint32_t)(1<<9)) /*!< Auto-baud time-out interrupt */ -#define UART_IIR_BITMASK ((uint32_t)(0x3CF)) /*!< UART interrupt identification register bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART FIFO control register - **********************************************************************/ -#define UART_FCR_FIFO_EN ((uint8_t)(1<<0)) /*!< UART FIFO enable */ -#define UART_FCR_RX_RS ((uint8_t)(1<<1)) /*!< UART FIFO RX reset */ -#define UART_FCR_TX_RS ((uint8_t)(1<<2)) /*!< UART FIFO TX reset */ -#define UART_FCR_DMAMODE_SEL ((uint8_t)(1<<3)) /*!< UART DMA mode selection */ -#define UART_FCR_TRG_LEV0 ((uint8_t)(0)) /*!< UART FIFO trigger level 0: 1 character */ -#define UART_FCR_TRG_LEV1 ((uint8_t)(1<<6)) /*!< UART FIFO trigger level 1: 4 character */ -#define UART_FCR_TRG_LEV2 ((uint8_t)(2<<6)) /*!< UART FIFO trigger level 2: 8 character */ -#define UART_FCR_TRG_LEV3 ((uint8_t)(3<<6)) /*!< UART FIFO trigger level 3: 14 character */ -#define UART_FCR_BITMASK ((uint8_t)(0xCF)) /*!< UART FIFO control bit mask */ -#define UART_TX_FIFO_SIZE (16) - -/*********************************************************************//** - * Macro defines for Macro defines for UART line control register - **********************************************************************/ -#define UART_LCR_WLEN5 ((uint8_t)(0)) /*!< UART 5 bit data mode */ -#define UART_LCR_WLEN6 ((uint8_t)(1<<0)) /*!< UART 6 bit data mode */ -#define UART_LCR_WLEN7 ((uint8_t)(2<<0)) /*!< UART 7 bit data mode */ -#define UART_LCR_WLEN8 ((uint8_t)(3<<0)) /*!< UART 8 bit data mode */ -#define UART_LCR_STOPBIT_SEL ((uint8_t)(1<<2)) /*!< UART Two Stop Bits Select */ -#define UART_LCR_PARITY_EN ((uint8_t)(1<<3)) /*!< UART Parity Enable */ -#define UART_LCR_PARITY_ODD ((uint8_t)(0)) /*!< UART Odd Parity Select */ -#define UART_LCR_PARITY_EVEN ((uint8_t)(1<<4)) /*!< UART Even Parity Select */ -#define UART_LCR_PARITY_F_1 ((uint8_t)(2<<4)) /*!< UART force 1 stick parity */ -#define UART_LCR_PARITY_F_0 ((uint8_t)(3<<4)) /*!< UART force 0 stick parity */ -#define UART_LCR_BREAK_EN ((uint8_t)(1<<6)) /*!< UART Transmission Break enable */ -#define UART_LCR_DLAB_EN ((uint8_t)(1<<7)) /*!< UART Divisor Latches Access bit enable */ -#define UART_LCR_BITMASK ((uint8_t)(0xFF)) /*!< UART line control bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART1 Modem Control Register - **********************************************************************/ -#define UART1_MCR_DTR_CTRL ((uint8_t)(1<<0)) /*!< Source for modem output pin DTR */ -#define UART1_MCR_RTS_CTRL ((uint8_t)(1<<1)) /*!< Source for modem output pin RTS */ -#define UART1_MCR_LOOPB_EN ((uint8_t)(1<<4)) /*!< Loop back mode select */ -#define UART1_MCR_AUTO_RTS_EN ((uint8_t)(1<<6)) /*!< Enable Auto RTS flow-control */ -#define UART1_MCR_AUTO_CTS_EN ((uint8_t)(1<<7)) /*!< Enable Auto CTS flow-control */ -#define UART1_MCR_BITMASK ((uint8_t)(0x0F3)) /*!< UART1 bit mask value */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART line status register - **********************************************************************/ -#define UART_LSR_RDR ((uint8_t)(1<<0)) /*!<Line status register: Receive data ready*/ -#define UART_LSR_OE ((uint8_t)(1<<1)) /*!<Line status register: Overrun error*/ -#define UART_LSR_PE ((uint8_t)(1<<2)) /*!<Line status register: Parity error*/ -#define UART_LSR_FE ((uint8_t)(1<<3)) /*!<Line status register: Framing error*/ -#define UART_LSR_BI ((uint8_t)(1<<4)) /*!<Line status register: Break interrupt*/ -#define UART_LSR_THRE ((uint8_t)(1<<5)) /*!<Line status register: Transmit holding register empty*/ -#define UART_LSR_TEMT ((uint8_t)(1<<6)) /*!<Line status register: Transmitter empty*/ -#define UART_LSR_RXFE ((uint8_t)(1<<7)) /*!<Error in RX FIFO*/ -#define UART_LSR_BITMASK ((uint8_t)(0xFF)) /*!<UART Line status bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART Modem (UART1 only) status register - **********************************************************************/ -#define UART1_MSR_DELTA_CTS ((uint8_t)(1<<0)) /*!< Set upon state change of input CTS */ -#define UART1_MSR_DELTA_DSR ((uint8_t)(1<<1)) /*!< Set upon state change of input DSR */ -#define UART1_MSR_LO2HI_RI ((uint8_t)(1<<2)) /*!< Set upon low to high transition of input RI */ -#define UART1_MSR_DELTA_DCD ((uint8_t)(1<<3)) /*!< Set upon state change of input DCD */ -#define UART1_MSR_CTS ((uint8_t)(1<<4)) /*!< Clear To Send State */ -#define UART1_MSR_DSR ((uint8_t)(1<<5)) /*!< Data Set Ready State */ -#define UART1_MSR_RI ((uint8_t)(1<<6)) /*!< Ring Indicator State */ -#define UART1_MSR_DCD ((uint8_t)(1<<7)) /*!< Data Carrier Detect State */ -#define UART1_MSR_BITMASK ((uint8_t)(0xFF)) /*!< MSR register bit-mask value */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART Scratch Pad Register - **********************************************************************/ -#define UART_SCR_BIMASK ((uint8_t)(0xFF)) /*!< UART Scratch Pad bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART Auto baudrate control register - **********************************************************************/ -#define UART_ACR_START ((uint32_t)(1<<0)) /**< UART Auto-baud start */ -#define UART_ACR_MODE ((uint32_t)(1<<1)) /**< UART Auto baudrate Mode 1 */ -#define UART_ACR_AUTO_RESTART ((uint32_t)(1<<2)) /**< UART Auto baudrate restart */ -#define UART_ACR_ABEOINT_CLR ((uint32_t)(1<<8)) /**< UART End of auto-baud interrupt clear */ -#define UART_ACR_ABTOINT_CLR ((uint32_t)(1<<9)) /**< UART Auto-baud time-out interrupt clear */ -#define UART_ACR_BITMASK ((uint32_t)(0x307)) /**< UART Auto Baudrate register bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART IrDA control register - **********************************************************************/ -#define UART_ICR_IRDAEN ((uint32_t)(1<<0)) /**< IrDA mode enable */ -#define UART_ICR_IRDAINV ((uint32_t)(1<<1)) /**< IrDA serial input inverted */ -#define UART_ICR_FIXPULSE_EN ((uint32_t)(1<<2)) /**< IrDA fixed pulse width mode */ -#define UART_ICR_PULSEDIV(n) ((uint32_t)((n&0x07)<<3)) /**< PulseDiv - Configures the pulse when FixPulseEn = 1 */ -#define UART_ICR_BITMASK ((uint32_t)(0x3F)) /*!< UART IRDA bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART Fractional divider register - **********************************************************************/ -#define UART_FDR_DIVADDVAL(n) ((uint32_t)(n&0x0F)) /**< Baud-rate generation pre-scaler divisor */ -#define UART_FDR_MULVAL(n) ((uint32_t)((n<<4)&0xF0)) /**< Baud-rate pre-scaler multiplier value */ -#define UART_FDR_BITMASK ((uint32_t)(0xFF)) /**< UART Fractional Divider register bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART Tx Enable register - **********************************************************************/ -#define UART_TER_TXEN ((uint8_t)(1<<7)) /*!< Transmit enable bit */ -#define UART_TER_BITMASK ((uint8_t)(0x80)) /**< UART Transmit Enable Register bit mask */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART1 RS485 Control register - **********************************************************************/ -#define UART1_RS485CTRL_NMM_EN ((uint32_t)(1<<0)) /*!< RS-485/EIA-485 Normal Multi-drop Mode (NMM) - is disabled */ -#define UART1_RS485CTRL_RX_DIS ((uint32_t)(1<<1)) /*!< The receiver is disabled */ -#define UART1_RS485CTRL_AADEN ((uint32_t)(1<<2)) /*!< Auto Address Detect (AAD) is enabled */ -#define UART1_RS485CTRL_SEL_DTR ((uint32_t)(1<<3)) /*!< If direction control is enabled - (bit DCTRL = 1), pin DTR is used for direction control */ -#define UART1_RS485CTRL_DCTRL_EN ((uint32_t)(1<<4)) /*!< Enable Auto Direction Control */ -#define UART1_RS485CTRL_OINV_1 ((uint32_t)(1<<5)) /*!< This bit reverses the polarity of the direction - control signal on the RTS (or DTR) pin. The direction control pin - will be driven to logic "1" when the transmitter has data to be sent */ -#define UART1_RS485CTRL_BITMASK ((uint32_t)(0x3F)) /**< RS485 control bit-mask value */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART1 RS-485 Address Match register - **********************************************************************/ -#define UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF)) /**< Bit mask value */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART1 RS-485 Delay value register - **********************************************************************/ -/* Macro defines for UART1 RS-485 Delay value register */ -#define UART1_RS485DLY_BITMASK ((uint8_t)(0xFF)) /** Bit mask value */ - -/*********************************************************************//** - * Macro defines for Macro defines for UART FIFO Level register - **********************************************************************/ -#define UART_FIFOLVL_RXFIFOLVL(n) ((uint32_t)(n&0x0F)) /**< Reflects the current level of the UART receiver FIFO */ -#define UART_FIFOLVL_TXFIFOLVL(n) ((uint32_t)((n>>8)&0x0F)) /**< Reflects the current level of the UART transmitter FIFO */ -#define UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F)) /**< UART FIFO Level Register bit mask */ - - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ - -/** Macro to check the input UART_DATABIT parameters */ -#define PARAM_UART_DATABIT(databit) ((databit==UART_DATABIT_5) || (databit==UART_DATABIT_6)\ -|| (databit==UART_DATABIT_7) || (databit==UART_DATABIT_8)) - -/** Macro to check the input UART_STOPBIT parameters */ -#define PARAM_UART_STOPBIT(stopbit) ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2)) - -/** Macro to check the input UART_PARITY parameters */ -#define PARAM_UART_PARITY(parity) ((parity==UART_PARITY_NONE) || (parity==UART_PARITY_ODD) \ -|| (parity==UART_PARITY_EVEN) || (parity==UART_PARITY_SP_1) \ -|| (parity==UART_PARITY_SP_0)) - -/** Macro to check the input UART_FIFO parameters */ -#define PARAM_UART_FIFO_LEVEL(fifo) ((fifo==UART_FIFO_TRGLEV0) \ -|| (fifo==UART_FIFO_TRGLEV1) || (fifo==UART_FIFO_TRGLEV2) \ -|| (fifo==UART_FIFO_TRGLEV3)) - -/** Macro to check the input UART_INTCFG parameters */ -#define PARAM_UART_INTCFG(IntCfg) ((IntCfg==UART_INTCFG_RBR) || (IntCfg==UART_INTCFG_THRE) \ -|| (IntCfg==UART_INTCFG_RLS) || (IntCfg==UART_INTCFG_ABEO) \ -|| (IntCfg==UART_INTCFG_ABTO)) - -/** Macro to check the input UART1_INTCFG parameters - expansion input parameter for UART1 */ -#define PARAM_UART1_INTCFG(IntCfg) ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS)) - -/** Macro to check the input UART_AUTOBAUD_MODE parameters */ -#define PARAM_UART_AUTOBAUD_MODE(ABmode) ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1)) - -/** Macro to check the input UART_AUTOBAUD_INTSTAT parameters */ -#define PARAM_UART_AUTOBAUD_INTSTAT(ABIntStat) ((ABIntStat==UART_AUTOBAUD_INTSTAT_ABEO) || \ - (ABIntStat==UART_AUTOBAUD_INTSTAT_ABTO)) - -/** Macro to check the input UART_IrDA_PULSEDIV parameters */ -#define PARAM_UART_IrDA_PULSEDIV(PulseDiv) ((PulseDiv==UART_IrDA_PULSEDIV2) || (PulseDiv==UART_IrDA_PULSEDIV4) \ -|| (PulseDiv==UART_IrDA_PULSEDIV8) || (PulseDiv==UART_IrDA_PULSEDIV16) \ -|| (PulseDiv==UART_IrDA_PULSEDIV32) || (PulseDiv==UART_IrDA_PULSEDIV64) \ -|| (PulseDiv==UART_IrDA_PULSEDIV128) || (PulseDiv==UART_IrDA_PULSEDIV256)) - -/* Macro to check the input UART1_SignalState parameters */ -#define PARAM_UART1_SIGNALSTATE(x) ((x==INACTIVE) || (x==ACTIVE)) - -/** Macro to check the input PARAM_UART1_MODEM_PIN parameters */ -#define PARAM_UART1_MODEM_PIN(x) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS)) - -/** Macro to check the input PARAM_UART1_MODEM_MODE parameters */ -#define PARAM_UART1_MODEM_MODE(x) ((x==UART1_MODEM_MODE_LOOPBACK) || (x==UART1_MODEM_MODE_AUTO_RTS) \ -|| (x==UART1_MODEM_MODE_AUTO_CTS)) - -/** Macro to check the direction control pin type */ -#define PARAM_UART_RS485_DIRCTRL_PIN(x) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR)) - -/* Macro to determine if it is valid UART port number */ -#define PARAM_UARTx(x) ((((uint32_t *)x)==((uint32_t *)LPC_UART0)) \ -|| (((uint32_t *)x)==((uint32_t *)LPC_UART1)) \ -|| (((uint32_t *)x)==((uint32_t *)LPC_UART2)) \ -|| (((uint32_t *)x)==((uint32_t *)LPC_UART3))) -#define PARAM_UART_IrDA(x) (((uint32_t *)x)==((uint32_t *)LPC_UART3)) -#define PARAM_UART1_MODEM(x) (((uint32_t *)x)==((uint32_t *)LPC_UART1)) - -/** Macro to check the input value for UART1_RS485_CFG_MATCHADDRVALUE parameter */ -#define PARAM_UART1_RS485_CFG_MATCHADDRVALUE(x) ((x<0xFF)) - -/** Macro to check the input value for UART1_RS485_CFG_DELAYVALUE parameter */ -#define PARAM_UART1_RS485_CFG_DELAYVALUE(x) ((x<0xFF)) - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup UART_Public_Types UART Public Types - * @{ - */ - -/** - * @brief UART Databit type definitions - */ -typedef enum { - UART_DATABIT_5 = 0, /*!< UART 5 bit data mode */ - UART_DATABIT_6, /*!< UART 6 bit data mode */ - UART_DATABIT_7, /*!< UART 7 bit data mode */ - UART_DATABIT_8 /*!< UART 8 bit data mode */ -} UART_DATABIT_Type; - -/** - * @brief UART Stop bit type definitions - */ -typedef enum { - UART_STOPBIT_1 = (0), /*!< UART 1 Stop Bits Select */ - UART_STOPBIT_2 /*!< UART Two Stop Bits Select */ -} UART_STOPBIT_Type; - -/** - * @brief UART Parity type definitions - */ -typedef enum { - UART_PARITY_NONE = 0, /*!< No parity */ - UART_PARITY_ODD, /*!< Odd parity */ - UART_PARITY_EVEN, /*!< Even parity */ - UART_PARITY_SP_1, /*!< Forced "1" stick parity */ - UART_PARITY_SP_0 /*!< Forced "0" stick parity */ -} UART_PARITY_Type; - -/** - * @brief FIFO Level type definitions - */ -typedef enum { - UART_FIFO_TRGLEV0 = 0, /*!< UART FIFO trigger level 0: 1 character */ - UART_FIFO_TRGLEV1, /*!< UART FIFO trigger level 1: 4 character */ - UART_FIFO_TRGLEV2, /*!< UART FIFO trigger level 2: 8 character */ - UART_FIFO_TRGLEV3 /*!< UART FIFO trigger level 3: 14 character */ -} UART_FITO_LEVEL_Type; - -/********************************************************************//** -* @brief UART Interrupt Type definitions -**********************************************************************/ -typedef enum { - UART_INTCFG_RBR = 0, /*!< RBR Interrupt enable*/ - UART_INTCFG_THRE, /*!< THR Interrupt enable*/ - UART_INTCFG_RLS, /*!< RX line status interrupt enable*/ - UART1_INTCFG_MS, /*!< Modem status interrupt enable (UART1 only) */ - UART1_INTCFG_CTS, /*!< CTS1 signal transition interrupt enable (UART1 only) */ - UART_INTCFG_ABEO, /*!< Enables the end of auto-baud interrupt */ - UART_INTCFG_ABTO /*!< Enables the auto-baud time-out interrupt */ -} UART_INT_Type; - -/** - * @brief UART Line Status Type definition - */ -typedef enum { - UART_LINESTAT_RDR = UART_LSR_RDR, /*!<Line status register: Receive data ready*/ - UART_LINESTAT_OE = UART_LSR_OE, /*!<Line status register: Overrun error*/ - UART_LINESTAT_PE = UART_LSR_PE, /*!<Line status register: Parity error*/ - UART_LINESTAT_FE = UART_LSR_FE, /*!<Line status register: Framing error*/ - UART_LINESTAT_BI = UART_LSR_BI, /*!<Line status register: Break interrupt*/ - UART_LINESTAT_THRE = UART_LSR_THRE, /*!<Line status register: Transmit holding register empty*/ - UART_LINESTAT_TEMT = UART_LSR_TEMT, /*!<Line status register: Transmitter empty*/ - UART_LINESTAT_RXFE = UART_LSR_RXFE /*!<Error in RX FIFO*/ -} UART_LS_Type; - -/** - * @brief UART Auto-baudrate mode type definition - */ -typedef enum { - UART_AUTOBAUD_MODE0 = 0, /**< UART Auto baudrate Mode 0 */ - UART_AUTOBAUD_MODE1 /**< UART Auto baudrate Mode 1 */ -} UART_AB_MODE_Type; - -/** - * @brief Auto Baudrate mode configuration type definition - */ -typedef struct { - UART_AB_MODE_Type ABMode; /**< Autobaudrate mode */ - FunctionalState AutoRestart; /**< Auto Restart state */ -} UART_AB_CFG_Type; - -/** - * @brief UART End of Auto-baudrate type definition - */ -typedef enum { - UART_AUTOBAUD_INTSTAT_ABEO = UART_IIR_ABEO_INT, /**< UART End of auto-baud interrupt */ - UART_AUTOBAUD_INTSTAT_ABTO = UART_IIR_ABTO_INT /**< UART Auto-baud time-out interrupt */ -}UART_ABEO_Type; - -/** - * UART IrDA Control type Definition - */ -typedef enum { - UART_IrDA_PULSEDIV2 = 0, /**< Pulse width = 2 * Tpclk - - Configures the pulse when FixPulseEn = 1 */ - UART_IrDA_PULSEDIV4, /**< Pulse width = 4 * Tpclk - - Configures the pulse when FixPulseEn = 1 */ - UART_IrDA_PULSEDIV8, /**< Pulse width = 8 * Tpclk - - Configures the pulse when FixPulseEn = 1 */ - UART_IrDA_PULSEDIV16, /**< Pulse width = 16 * Tpclk - - Configures the pulse when FixPulseEn = 1 */ - UART_IrDA_PULSEDIV32, /**< Pulse width = 32 * Tpclk - - Configures the pulse when FixPulseEn = 1 */ - UART_IrDA_PULSEDIV64, /**< Pulse width = 64 * Tpclk - - Configures the pulse when FixPulseEn = 1 */ - UART_IrDA_PULSEDIV128, /**< Pulse width = 128 * Tpclk - - Configures the pulse when FixPulseEn = 1 */ - UART_IrDA_PULSEDIV256 /**< Pulse width = 256 * Tpclk - - Configures the pulse when FixPulseEn = 1 */ -} UART_IrDA_PULSE_Type; - -/********************************************************************//** -* @brief UART1 Full modem - Signal states definition -**********************************************************************/ -typedef enum { - INACTIVE = 0, /* In-active state */ - ACTIVE = !INACTIVE /* Active state */ -}UART1_SignalState; - -/** - * @brief UART modem status type definition - */ -typedef enum { - UART1_MODEM_STAT_DELTA_CTS = UART1_MSR_DELTA_CTS, /*!< Set upon state change of input CTS */ - UART1_MODEM_STAT_DELTA_DSR = UART1_MSR_DELTA_DSR, /*!< Set upon state change of input DSR */ - UART1_MODEM_STAT_LO2HI_RI = UART1_MSR_LO2HI_RI, /*!< Set upon low to high transition of input RI */ - UART1_MODEM_STAT_DELTA_DCD = UART1_MSR_DELTA_DCD, /*!< Set upon state change of input DCD */ - UART1_MODEM_STAT_CTS = UART1_MSR_CTS, /*!< Clear To Send State */ - UART1_MODEM_STAT_DSR = UART1_MSR_DSR, /*!< Data Set Ready State */ - UART1_MODEM_STAT_RI = UART1_MSR_RI, /*!< Ring Indicator State */ - UART1_MODEM_STAT_DCD = UART1_MSR_DCD /*!< Data Carrier Detect State */ -} UART_MODEM_STAT_type; - -/** - * @brief Modem output pin type definition - */ -typedef enum { - UART1_MODEM_PIN_DTR = 0, /*!< Source for modem output pin DTR */ - UART1_MODEM_PIN_RTS /*!< Source for modem output pin RTS */ -} UART_MODEM_PIN_Type; - -/** - * @brief UART Modem mode type definition - */ -typedef enum { - UART1_MODEM_MODE_LOOPBACK = 0, /*!< Loop back mode select */ - UART1_MODEM_MODE_AUTO_RTS, /*!< Enable Auto RTS flow-control */ - UART1_MODEM_MODE_AUTO_CTS /*!< Enable Auto CTS flow-control */ -} UART_MODEM_MODE_Type; - -/** - * @brief UART Direction Control Pin type definition - */ -typedef enum { - UART1_RS485_DIRCTRL_RTS = 0, /**< Pin RTS is used for direction control */ - UART1_RS485_DIRCTRL_DTR /**< Pin DTR is used for direction control */ -} UART_RS485_DIRCTRL_PIN_Type; - -/********************************************************************//** -* @brief UART Configuration Structure definition -**********************************************************************/ -typedef struct { - uint32_t Baud_rate; /**< UART baud rate */ - UART_PARITY_Type Parity; /**< Parity selection, should be: - - UART_PARITY_NONE: No parity - - UART_PARITY_ODD: Odd parity - - UART_PARITY_EVEN: Even parity - - UART_PARITY_SP_1: Forced "1" stick parity - - UART_PARITY_SP_0: Forced "0" stick parity - */ - UART_DATABIT_Type Databits; /**< Number of data bits, should be: - - UART_DATABIT_5: UART 5 bit data mode - - UART_DATABIT_6: UART 6 bit data mode - - UART_DATABIT_7: UART 7 bit data mode - - UART_DATABIT_8: UART 8 bit data mode - */ - UART_STOPBIT_Type Stopbits; /**< Number of stop bits, should be: - - UART_STOPBIT_1: UART 1 Stop Bits Select - - UART_STOPBIT_2: UART 2 Stop Bits Select - */ -} UART_CFG_Type; - -/********************************************************************//** -* @brief UART FIFO Configuration Structure definition -**********************************************************************/ - -typedef struct { - FunctionalState FIFO_ResetRxBuf; /**< Reset Rx FIFO command state , should be: - - ENABLE: Reset Rx FIFO in UART - - DISABLE: Do not reset Rx FIFO in UART - */ - FunctionalState FIFO_ResetTxBuf; /**< Reset Tx FIFO command state , should be: - - ENABLE: Reset Tx FIFO in UART - - DISABLE: Do not reset Tx FIFO in UART - */ - FunctionalState FIFO_DMAMode; /**< DMA mode, should be: - - ENABLE: Enable DMA mode in UART - - DISABLE: Disable DMA mode in UART - */ - UART_FITO_LEVEL_Type FIFO_Level; /**< Rx FIFO trigger level, should be: - - UART_FIFO_TRGLEV0: UART FIFO trigger level 0: 1 character - - UART_FIFO_TRGLEV1: UART FIFO trigger level 1: 4 character - - UART_FIFO_TRGLEV2: UART FIFO trigger level 2: 8 character - - UART_FIFO_TRGLEV3: UART FIFO trigger level 3: 14 character - */ -} UART_FIFO_CFG_Type; - -/********************************************************************//** -* @brief UART1 Full modem - RS485 Control configuration type -**********************************************************************/ -typedef struct { - FunctionalState NormalMultiDropMode_State; /*!< Normal MultiDrop mode State: - - ENABLE: Enable this function. - - DISABLE: Disable this function. */ - FunctionalState Rx_State; /*!< Receiver State: - - ENABLE: Enable Receiver. - - DISABLE: Disable Receiver. */ - FunctionalState AutoAddrDetect_State; /*!< Auto Address Detect mode state: - - ENABLE: ENABLE this function. - - DISABLE: Disable this function. */ - FunctionalState AutoDirCtrl_State; /*!< Auto Direction Control State: - - ENABLE: Enable this function. - - DISABLE: Disable this function. */ - UART_RS485_DIRCTRL_PIN_Type DirCtrlPin; /*!< If direction control is enabled, state: - - UART1_RS485_DIRCTRL_RTS: - pin RTS is used for direction control. - - UART1_RS485_DIRCTRL_DTR: - pin DTR is used for direction control. */ - SetState DirCtrlPol_Level; /*!< Polarity of the direction control signal on - the RTS (or DTR) pin: - - RESET: The direction control pin will be driven - to logic "0" when the transmitter has data to be sent. - - SET: The direction control pin will be driven - to logic "1" when the transmitter has data to be sent. */ - uint8_t MatchAddrValue; /*!< address match value for RS-485/EIA-485 mode, 8-bit long */ - uint8_t DelayValue; /*!< delay time is in periods of the baud clock, 8-bit long */ -} UART1_RS485_CTRLCFG_Type; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup UART_Public_Functions UART Public Functions - * @{ - */ -/* UART Init/DeInit functions --------------------------------------------------*/ -void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct); -void UART_DeInit(LPC_UART_TypeDef* UARTx); -void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct); - -/* UART Send/Receive functions -------------------------------------------------*/ -void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data); -uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx); -uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf, - uint32_t buflen, TRANSFER_BLOCK_Type flag); -uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, \ - uint32_t buflen, TRANSFER_BLOCK_Type flag); - -/* UART FIFO functions ----------------------------------------------------------*/ -void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg); -void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct); - -/* UART get information functions -----------------------------------------------*/ -uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx); -uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx); - -/* UART operate functions -------------------------------------------------------*/ -void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, \ - FunctionalState NewState); -void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState); -FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx); -void UART_ForceBreak(LPC_UART_TypeDef* UARTx); - -/* UART Auto-baud functions -----------------------------------------------------*/ -void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType); -void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, \ - FunctionalState NewState); - -/* UART1 FullModem functions ----------------------------------------------------*/ -void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \ - UART1_SignalState NewState); -void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \ - FunctionalState NewState); -uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx); - -/* UART RS485 functions ----------------------------------------------------------*/ -void UART_RS485Config(LPC_UART1_TypeDef *UARTx, \ - UART1_RS485_CTRLCFG_Type *RS485ConfigStruct); -void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState); -void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr); -uint32_t UART_RS485SendData(LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size); - -/* UART IrDA functions-------------------------------------------------------------*/ -void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState); -void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState); -void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv); -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - - -#endif /* __LPC17XX_UART_H */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc17xx_wdt.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,148 +0,0 @@ -/********************************************************************** -* $Id$ lpc17xx_wdt.h 2010-05-21 -*//** -* @file lpc17xx_wdt.h -* @brief Contains all macro definitions and function prototypes -* support for WDT firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup WDT WDT (Watch-Dog Timer) - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_WDT_H_ -#define LPC17XX_WDT_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup WDT_Private_Macros WDT Private Macros - * @{ - */ - -/* --------------------- BIT DEFINITIONS -------------------------------------- */ -/** WDT interrupt enable bit */ -#define WDT_WDMOD_WDEN ((uint32_t)(1<<0)) -/** WDT interrupt enable bit */ -#define WDT_WDMOD_WDRESET ((uint32_t)(1<<1)) -/** WDT time out flag bit */ -#define WDT_WDMOD_WDTOF ((uint32_t)(1<<2)) -/** WDT Time Out flag bit */ -#define WDT_WDMOD_WDINT ((uint32_t)(1<<3)) -/** WDT Mode */ -#define WDT_WDMOD(n) ((uint32_t)(1<<1)) - -/** Define divider index for microsecond ( us ) */ -#define WDT_US_INDEX ((uint32_t)(1000000)) -/** WDT Time out minimum value */ -#define WDT_TIMEOUT_MIN ((uint32_t)(0xFF)) -/** WDT Time out maximum value */ -#define WDT_TIMEOUT_MAX ((uint32_t)(0xFFFFFFFF)) - -/** Watchdog mode register mask */ -#define WDT_WDMOD_MASK (uint8_t)(0x02) -/** Watchdog timer constant register mask */ -#define WDT_WDTC_MASK (uint8_t)(0xFFFFFFFF) -/** Watchdog feed sequence register mask */ -#define WDT_WDFEED_MASK (uint8_t)(0x000000FF) -/** Watchdog timer value register mask */ -#define WDT_WDCLKSEL_MASK (uint8_t)(0x03) -/** Clock selected from internal RC */ -#define WDT_WDCLKSEL_RC (uint8_t)(0x00) -/** Clock selected from PCLK */ -#define WDT_WDCLKSEL_PCLK (uint8_t)(0x01) -/** Clock selected from external RTC */ -#define WDT_WDCLKSEL_RTC (uint8_t)(0x02) - -/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ -/* Macro check clock source selection */ -#define PARAM_WDT_CLK_OPT(OPTION) ((OPTION ==WDT_CLKSRC_IRC)||(OPTION ==WDT_CLKSRC_IRC)\ -||(OPTION ==WDT_CLKSRC_IRC)) - -/* Macro check WDT mode */ -#define PARAM_WDT_MODE_OPT(OPTION) ((OPTION ==WDT_MODE_INT_ONLY)||(OPTION ==WDT_MODE_RESET)) -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup WDT_Public_Types WDT Public Types - * @{ - */ - -/** @brief Clock source option for WDT */ -typedef enum { - WDT_CLKSRC_IRC = 0, /*!< Clock source from Internal RC oscillator */ - WDT_CLKSRC_PCLK = 1, /*!< Selects the APB peripheral clock (PCLK) */ - WDT_CLKSRC_RTC = 2 /*!< Selects the RTC oscillator */ -} WDT_CLK_OPT; - -/** @brief WDT operation mode */ -typedef enum { - WDT_MODE_INT_ONLY = 0, /*!< Use WDT to generate interrupt only */ - WDT_MODE_RESET = 1 /*!< Use WDT to generate interrupt and reset MCU */ -} WDT_MODE_OPT; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup WDT_Public_Functions WDT Public Functions - * @{ - */ - -void WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode); -void WDT_Start(uint32_t TimeOut); -void WDT_Feed (void); -void WDT_UpdateTimeOut ( uint32_t TimeOut); -FlagStatus WDT_ReadTimeOutFlag (void); -void WDT_ClrTimeOutFlag (void); -uint32_t WDT_GetCurrentCount(void); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_WDT_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/inc/lpc_types.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,206 +0,0 @@ -/********************************************************************** -* $Id$ lpc_types.h 2008-07-27 -*//** -* @file lpc_types.h -* @brief Contains the NXP ABL typedefs for C standard types. -* It is intended to be used in ISO C conforming development -* environments and checks for this insofar as it is possible -* to do so. -* @version 2.0 -* @date 27 Jul. 2008 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2008, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Type group ----------------------------------------------------------- */ -/** @defgroup LPC_Types LPC_Types - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC_TYPES_H -#define LPC_TYPES_H - -/* Includes ------------------------------------------------------------------- */ -#include <stdint.h> - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup LPC_Types_Public_Types LPC_Types Public Types - * @{ - */ - -/** - * @brief Boolean Type definition - */ -typedef enum {FALSE = 0, TRUE = !FALSE} Bool; - -/** - * @brief Flag Status and Interrupt Flag Status type definition - */ -typedef enum {RESET = 0, SET = !RESET} FlagStatus, IntStatus, SetState; -#define PARAM_SETSTATE(State) ((State==RESET) || (State==SET)) - -/** - * @brief Functional State Definition - */ -typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; -#define PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE)) - -/** - * @ Status type definition - */ -typedef enum {ERROR = 0, SUCCESS = !ERROR} Status; - - -/** - * Read/Write transfer type mode (Block or non-block) - */ -typedef enum -{ - NONE_BLOCKING = 0, /**< None Blocking type */ - BLOCKING /**< Blocking type */ -} TRANSFER_BLOCK_Type; - - -/** Pointer to Function returning Void (any number of parameters) */ -typedef void (*PFV)(); - -/** Pointer to Function returning int32_t (any number of parameters) */ -typedef int32_t(*PFI)(); - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup LPC_Types_Public_Macros LPC_Types Public Macros - * @{ - */ - -/* _BIT(n) sets the bit at position "n" - * _BIT(n) is intended to be used in "OR" and "AND" expressions: - * e.g., "(_BIT(3) | _BIT(7))". - */ -#undef _BIT -/* Set bit macro */ -#define _BIT(n) (1<<n) - -/* _SBF(f,v) sets the bit field starting at position "f" to value "v". - * _SBF(f,v) is intended to be used in "OR" and "AND" expressions: - * e.g., "((_SBF(5,7) | _SBF(12,0xF)) & 0xFFFF)" - */ -#undef _SBF -/* Set bit field macro */ -#define _SBF(f,v) (v<<f) - -/* _BITMASK constructs a symbol with 'field_width' least significant - * bits set. - * e.g., _BITMASK(5) constructs '0x1F', _BITMASK(16) == 0xFFFF - * The symbol is intended to be used to limit the bit field width - * thusly: - * <a_register> = (any_expression) & _BITMASK(x), where 0 < x <= 32. - * If "any_expression" results in a value that is larger than can be - * contained in 'x' bits, the bits above 'x - 1' are masked off. When - * used with the _SBF example above, the example would be written: - * a_reg = ((_SBF(5,7) | _SBF(12,0xF)) & _BITMASK(16)) - * This ensures that the value written to a_reg is no wider than - * 16 bits, and makes the code easier to read and understand. - */ -#undef _BITMASK -/* Bitmask creation macro */ -#define _BITMASK(field_width) ( _BIT(field_width) - 1) - -/* NULL pointer */ -#ifndef NULL -#define NULL ((void*) 0) -#endif - -/* Number of elements in an array */ -#define NELEMENTS(array) (sizeof (array) / sizeof (array[0])) - -/* Static data/function define */ -#define STATIC static -/* External data/function define */ -#define EXTERN extern - -#if !defined(MAX) -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) -#endif -#if !defined(MIN) -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif - -/** - * @} - */ - - -/* Old Type Definition compatibility ------------------------------------------ */ -/** @addtogroup LPC_Types_Public_Types LPC_Types Public Types - * @{ - */ - -/** SMA type for character type */ -typedef char CHAR; - -/** SMA type for 8 bit unsigned value */ -typedef uint8_t UNS_8; - -/** SMA type for 8 bit signed value */ -typedef int8_t INT_8; - -/** SMA type for 16 bit unsigned value */ -typedef uint16_t UNS_16; - -/** SMA type for 16 bit signed value */ -typedef int16_t INT_16; - -/** SMA type for 32 bit unsigned value */ -typedef uint32_t UNS_32; - -/** SMA type for 32 bit signed value */ -typedef int32_t INT_32; - -/** SMA type for 64 bit signed value */ -typedef int64_t INT_64; - -/** SMA type for 64 bit unsigned value */ -typedef uint64_t UNS_64; - -/** 32 bit boolean type */ -typedef Bool BOOL_32; - -/** 16 bit boolean type */ -typedef Bool BOOL_16; - -/** 8 bit boolean type */ -typedef Bool BOOL_8; - -/** - * @} - */ - - -#endif /* LPC_TYPES_H */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_adc.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,350 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_adc.c 2010-06-18 -*//** -* @file lpc17xx_adc.c -* @brief Contains all functions support for ADC firmware library on LPC17xx -* @version 3.1 -* @date 26. July. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2011, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup ADC - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_adc.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _ADC - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup ADC_Public_Functions - * @{ - */ - -/*********************************************************************//** - * @brief Initial for ADC - * + Set bit PCADC - * + Set clock for ADC - * + Set Clock Frequency - * @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC - * @param[in] rate ADC conversion rate, should be <=200KHz - * @return None - **********************************************************************/ -void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate) -{ - uint32_t ADCPClk, temp, tmp; - - CHECK_PARAM(PARAM_ADCx(ADCx)); - CHECK_PARAM(PARAM_ADC_RATE(rate)); - - // Turn on power and clock - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, ENABLE); - - ADCx->ADCR = 0; - - //Enable PDN bit - tmp = ADC_CR_PDN; - // Set clock frequency - ADCPClk = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_ADC); - /* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for - * A/D converter, which should be less than or equal to 13MHz. - * A fully conversion requires 65 of these clocks. - * ADC clock = PCLK_ADC0 / (CLKDIV + 1); - * ADC rate = ADC clock / 65; - */ - temp = rate * 65; - temp = (ADCPClk * 2 + temp)/(2 * temp) - 1; //get the round value by fomular: (2*A + B)/(2*B) - tmp |= ADC_CR_CLKDIV(temp); - - ADCx->ADCR = tmp; -} - - -/*********************************************************************//** -* @brief Close ADC -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @return None -**********************************************************************/ -void ADC_DeInit(LPC_ADC_TypeDef *ADCx) -{ - CHECK_PARAM(PARAM_ADCx(ADCx)); - - // Clear PDN bit - ADCx->ADCR &= ~ADC_CR_PDN; - // Turn on power and clock - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, DISABLE); -} - - -/*********************************************************************//** -* @brief Get Result conversion from A/D data register -* @param[in] channel number which want to read back the result -* @return Result of conversion -*********************************************************************/ -uint32_t ADC_GetData(uint32_t channel) -{ - uint32_t adc_value; - - CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel)); - - adc_value = *(const volatile uint32_t *)((&LPC_ADC->ADDR0) + channel); - return ADC_GDR_RESULT(adc_value); -} - -/*********************************************************************//** -* @brief Set start mode for ADC -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @param[in] start_mode Start mode choose one of modes in -* 'ADC_START_OPT' enumeration type definition, should be: -* - ADC_START_CONTINUOUS -* - ADC_START_NOW -* - ADC_START_ON_EINT0 -* - ADC_START_ON_CAP01 -* - ADC_START_ON_MAT01 -* - ADC_START_ON_MAT03 -* - ADC_START_ON_MAT10 -* - ADC_START_ON_MAT11 -* @return None -*********************************************************************/ -void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode) -{ - CHECK_PARAM(PARAM_ADCx(ADCx)); - CHECK_PARAM(PARAM_ADC_START_OPT(start_mode)); - - ADCx->ADCR &= ~ADC_CR_START_MASK; - ADCx->ADCR |=ADC_CR_START_MODE_SEL((uint32_t)start_mode); -} - - -/*********************************************************************//** -* @brief ADC Burst mode setting -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @param[in] NewState -* - 1: Set Burst mode -* - 0: reset Burst mode -* @return None -**********************************************************************/ -void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_ADCx(ADCx)); - - ADCx->ADCR &= ~ADC_CR_BURST; - if (NewState){ - ADCx->ADCR |= ADC_CR_BURST; - } -} - -/*********************************************************************//** -* @brief Set AD conversion in power mode -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @param[in] NewState -* - 1: AD converter is optional -* - 0: AD Converter is in power down mode -* @return None -**********************************************************************/ -void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_ADCx(ADCx)); - - ADCx->ADCR &= ~ADC_CR_PDN; - if (NewState){ - ADCx->ADCR |= ADC_CR_PDN; - } -} - -/*********************************************************************//** -* @brief Set Edge start configuration -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @param[in] EdgeOption is ADC_START_ON_RISING and ADC_START_ON_FALLING -* 0:ADC_START_ON_RISING -* 1:ADC_START_ON_FALLING -* @return None -**********************************************************************/ -void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption) -{ - CHECK_PARAM(PARAM_ADCx(ADCx)); - CHECK_PARAM(PARAM_ADC_START_ON_EDGE_OPT(EdgeOption)); - - ADCx->ADCR &= ~ADC_CR_EDGE; - if (EdgeOption){ - ADCx->ADCR |= ADC_CR_EDGE; - } -} - -/*********************************************************************//** -* @brief ADC interrupt configuration -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @param[in] IntType: type of interrupt, should be: -* - ADC_ADINTEN0: Interrupt channel 0 -* - ADC_ADINTEN1: Interrupt channel 1 -* ... -* - ADC_ADINTEN7: Interrupt channel 7 -* - ADC_ADGINTEN: Individual channel/global flag done generate an interrupt -* @param[in] NewState: -* - SET : enable ADC interrupt -* - RESET: disable ADC interrupt -* @return None -**********************************************************************/ -void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_ADCx(ADCx)); - CHECK_PARAM(PARAM_ADC_TYPE_INT_OPT(IntType)); - - ADCx->ADINTEN &= ~ADC_INTEN_CH(IntType); - if (NewState){ - ADCx->ADINTEN |= ADC_INTEN_CH(IntType); - } -} - -/*********************************************************************//** -* @brief Enable/Disable ADC channel number -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @param[in] Channel channel number -* @param[in] NewState Enable or Disable -* -* @return None -**********************************************************************/ -void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_ADCx(ADCx)); - CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(Channel)); - - if (NewState == ENABLE) { - ADCx->ADCR |= ADC_CR_CH_SEL(Channel); - } else { - ADCx->ADCR &= ~ADC_CR_CH_SEL(Channel); - } -} - -/*********************************************************************//** -* @brief Get ADC result -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @param[in] channel: channel number, should be 0...7 -* @return Data conversion -**********************************************************************/ -uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel) -{ - uint32_t adc_value; - - CHECK_PARAM(PARAM_ADCx(ADCx)); - CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel)); - - adc_value = *(const volatile uint32_t *) ((&ADCx->ADDR0) + channel); - return ADC_DR_RESULT(adc_value); -} - -/*********************************************************************//** -* @brief Get ADC Chanel status from ADC data register -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @param[in] channel: channel number, should be 0..7 -* @param[in] StatusType -* 0:Burst status -* 1:Done status -* @return SET / RESET -**********************************************************************/ -FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType) -{ - uint32_t temp; - - CHECK_PARAM(PARAM_ADCx(ADCx)); - CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel)); - CHECK_PARAM(PARAM_ADC_DATA_STATUS(StatusType)); - - temp = *(const volatile uint32_t *) ((&ADCx->ADDR0) + channel); - if (StatusType) { - temp &= ADC_DR_DONE_FLAG; - }else{ - temp &= ADC_DR_OVERRUN_FLAG; - } - if (temp) { - return SET; - } else { - return RESET; - } - -} - -/*********************************************************************//** -* @brief Get ADC Data from AD Global register -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @return Result of conversion -**********************************************************************/ -uint32_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx) -{ - CHECK_PARAM(PARAM_ADCx(ADCx)); - - return ((uint32_t)(ADCx->ADGDR)); -} - -/*********************************************************************//** -* @brief Get ADC Chanel status from AD global data register -* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC -* @param[in] StatusType -* 0:Burst status -* 1:Done status -* @return SET / RESET -**********************************************************************/ -FlagStatus ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType) -{ - uint32_t temp; - - CHECK_PARAM(PARAM_ADCx(ADCx)); - CHECK_PARAM(PARAM_ADC_DATA_STATUS(StatusType)); - - temp = ADCx->ADGDR; - if (StatusType){ - temp &= ADC_DR_DONE_FLAG; - }else{ - temp &= ADC_DR_OVERRUN_FLAG; - } - if (temp){ - return SET; - }else{ - return RESET; - } -} - -/** - * @} - */ - -#endif /* _ADC */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ - -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_can.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1937 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_can.c 2011-03-09 -*//** -* @file lpc17xx_can.c -* @brief Contains all functions support for CAN firmware library on LPC17xx -* @version 3.3 -* @date 09. March. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2011, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup CAN - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_can.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _CAN - -/* Private Variables ---------------------------------------------------------- */ -/** @defgroup CAN_Private_Variables CAN Private Variables - * @{ - */ - -FunctionalState FULLCAN_ENABLE; - - -/* Counts number of filters (CAN message objects) used */ -uint16_t CANAF_FullCAN_cnt = 0; -uint16_t CANAF_std_cnt = 0; -uint16_t CANAF_gstd_cnt = 0; -uint16_t CANAF_ext_cnt = 0; -uint16_t CANAF_gext_cnt = 0; - -/* End of Private Variables ----------------------------------------------------*/ -/** - * @} - */ - -/* Private Variables ---------------------------------------------------------- */ -static void can_SetBaudrate (LPC_CAN_TypeDef *CANx, uint32_t baudrate); - -/*********************************************************************//** - * @brief Setting CAN baud rate (bps) - * @param[in] CANx point to LPC_CAN_TypeDef object, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] baudrate: is the baud rate value will be set - * @return None - ***********************************************************************/ -static void can_SetBaudrate (LPC_CAN_TypeDef *CANx, uint32_t baudrate) -{ - uint32_t result = 0; - uint8_t NT, TSEG1, TSEG2, BRFail; - uint32_t CANPclk = 0; - uint32_t BRP; - CHECK_PARAM(PARAM_CANx(CANx)); - - if (CANx == LPC_CAN1) - { - CANPclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_CAN1); - } - else - { - CANPclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_CAN2); - } - result = CANPclk / baudrate; - /* Calculate suitable nominal time value - * NT (nominal time) = (TSEG1 + TSEG2 + 3) - * NT <= 24 - * TSEG1 >= 2*TSEG2 - */ - BRFail = 1; - for(NT=24;NT>0;NT=NT-2) - { - if ((result%NT)==0) - { - BRP = result / NT - 1; - NT--; - TSEG2 = (NT/3) - 1; - TSEG1 = NT -(NT/3) - 1; - BRFail = 0; - break; - } - } - if(BRFail) - while(1); // Failed to calculate exact CAN baud rate - /* Enter reset mode */ - CANx->MOD = 0x01; - /* Set bit timing - * Default: SAM = 0x00; - * SJW = 0x03; - */ - CANx->BTR = (TSEG2<<20)|(TSEG1<<16)|(3<<14)|BRP; - /* Return to normal operating */ - CANx->MOD = 0; -} -/* End of Private Functions ----------------------------------------------------*/ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup CAN_Public_Functions - * @{ - */ - -/********************************************************************//** - * @brief Initialize CAN peripheral with given baudrate - * @param[in] CANx pointer to LPC_CAN_TypeDef, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] baudrate: the value of CAN baudrate will be set (bps) - * @return None - *********************************************************************/ -void CAN_Init(LPC_CAN_TypeDef *CANx, uint32_t baudrate) -{ - volatile uint32_t temp; - uint16_t i; - CHECK_PARAM(PARAM_CANx(CANx)); - - if(CANx == LPC_CAN1) - { - /* Turn on power and clock for CAN1 */ - CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN1, ENABLE); - /* Set clock divide for CAN1 */ - } - else - { - /* Turn on power and clock for CAN1 */ - CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN2, ENABLE); - /* Set clock divide for CAN2 */ - } - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_CAN1, CLKPWR_PCLKSEL_CCLK_DIV_2); - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_CAN2, CLKPWR_PCLKSEL_CCLK_DIV_2); - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_ACF, CLKPWR_PCLKSEL_CCLK_DIV_2); - - CANx->MOD = 1; // Enter Reset Mode - CANx->IER = 0; // Disable All CAN Interrupts - CANx->GSR = 0; - /* Request command to release Rx, Tx buffer and clear data overrun */ - //CANx->CMR = CAN_CMR_AT | CAN_CMR_RRB | CAN_CMR_CDO; - CANx->CMR = (1<<1)|(1<<2)|(1<<3); - /* Read to clear interrupt pending in interrupt capture register */ - temp = CANx->ICR; - CANx->MOD = 0;// Return Normal operating - - //Reset CANAF value - LPC_CANAF->AFMR = 0x01; - - //clear ALUT RAM - for (i = 0; i < 512; i++) { - LPC_CANAF_RAM->mask[i] = 0x00; - } - - LPC_CANAF->SFF_sa = 0x00; - LPC_CANAF->SFF_GRP_sa = 0x00; - LPC_CANAF->EFF_sa = 0x00; - LPC_CANAF->EFF_GRP_sa = 0x00; - LPC_CANAF->ENDofTable = 0x00; - - LPC_CANAF->AFMR = 0x00; - /* Set baudrate */ - can_SetBaudrate (CANx, baudrate); -} - -/********************************************************************//** - * @brief CAN deInit - * @param[in] CANx pointer to LPC_CAN_TypeDef, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @return None - *********************************************************************/ -void CAN_DeInit(LPC_CAN_TypeDef *CANx) -{ - CHECK_PARAM(PARAM_CANx(CANx)); - - if(CANx == LPC_CAN1) - { - /* Turn on power and clock for CAN1 */ - CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN1, DISABLE); - } - else - { - /* Turn on power and clock for CAN1 */ - CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN2, DISABLE); - } -} - -/********************************************************************//** - * @brief Setup Acceptance Filter Look-Up Table - * @param[in] CANAFx pointer to LPC_CANAF_TypeDef - * Should be: LPC_CANAF - * @param[in] AFSection the pointer to AF_SectionDef structure - * It contain information about 5 sections will be install in AFLUT - * @return CAN Error could be: - * - CAN_OBJECTS_FULL_ERROR: No more rx or tx objects available - * - CAN_AF_ENTRY_ERROR: table error-violation of ascending numerical order - * - CAN_OK: ID is added into table successfully - *********************************************************************/ -CAN_ERROR CAN_SetupAFLUT(LPC_CANAF_TypeDef* CANAFx, AF_SectionDef* AFSection) -{ - uint8_t ctrl1,ctrl2; - uint8_t dis1, dis2; - uint16_t SID, ID_temp,i, count = 0; - uint32_t EID, entry, buf; - uint16_t lowerSID, upperSID; - uint32_t lowerEID, upperEID; - - CHECK_PARAM(PARAM_CANAFx(CANAFx)); - CANAFx->AFMR = 0x01; - -/***** setup FullCAN Table *****/ - if(AFSection->FullCAN_Sec == NULL) - { - FULLCAN_ENABLE = DISABLE; - } - else - { - FULLCAN_ENABLE = ENABLE; - for(i=0;i<(AFSection->FC_NumEntry);i++) - { - if(count + 1 > 64) - { - return CAN_OBJECTS_FULL_ERROR; - } - ctrl1 = AFSection->FullCAN_Sec->controller; - SID = AFSection->FullCAN_Sec->id_11; - dis1 = AFSection->FullCAN_Sec->disable; - - CHECK_PARAM(PARAM_CTRL(ctrl1)); - CHECK_PARAM(PARAM_ID_11(SID)); - CHECK_PARAM(PARAM_MSG_DISABLE(dis1)); - entry = 0x00; //reset entry value - if((CANAF_FullCAN_cnt & 0x00000001)==0) - { - if(count!=0x00) - { - buf = LPC_CANAF_RAM->mask[count-1]; - ID_temp = (buf & 0xE7FF); //mask controller & identifier bits - if(ID_temp > ((ctrl1<<13)|SID)) - { - return CAN_AF_ENTRY_ERROR; - } - } - entry = (ctrl1<<29)|(dis1<<28)|(SID<<16)|(1<<27); - LPC_CANAF_RAM->mask[count] &= 0x0000FFFF; - LPC_CANAF_RAM->mask[count] |= entry; - CANAF_FullCAN_cnt++; - if(CANAF_FullCAN_cnt == AFSection->FC_NumEntry) //this is the lastest FullCAN entry - count++; - } - else - { - buf = LPC_CANAF_RAM->mask[count]; - ID_temp = (buf >>16) & 0xE7FF; - if(ID_temp > ((ctrl1<<13)|SID)) - { - return CAN_AF_ENTRY_ERROR; - } - entry = (ctrl1<<13)|(dis1<<12)|(SID<<0)|(1<<11); - LPC_CANAF_RAM->mask[count] &= 0xFFFF0000; - LPC_CANAF_RAM->mask[count]|= entry; - count++; - CANAF_FullCAN_cnt++; - } - AFSection->FullCAN_Sec = (FullCAN_Entry *)((uint32_t)(AFSection->FullCAN_Sec)+ sizeof(FullCAN_Entry)); - } - } - -/***** Setup Explicit Standard Frame Format Section *****/ - if(AFSection->SFF_Sec != NULL) - { - for(i=0;i<(AFSection->SFF_NumEntry);i++) - { - if(count + 1 > 512) - { - return CAN_OBJECTS_FULL_ERROR; - } - ctrl1 = AFSection->SFF_Sec->controller; - SID = AFSection->SFF_Sec->id_11; - dis1 = AFSection->SFF_Sec->disable; - - //check parameter - CHECK_PARAM(PARAM_CTRL(ctrl1)); - CHECK_PARAM(PARAM_ID_11(SID)); - CHECK_PARAM(PARAM_MSG_DISABLE(dis1)); - - entry = 0x00; //reset entry value - if((CANAF_std_cnt & 0x00000001)==0) - { - if(CANAF_std_cnt !=0 ) - { - buf = LPC_CANAF_RAM->mask[count-1]; - ID_temp = (buf & 0xE7FF); //mask controller & identifier bits - if(ID_temp > ((ctrl1<<13)|SID)) - { - return CAN_AF_ENTRY_ERROR; - } - } - entry = (ctrl1<<29)|(dis1<<28)|(SID<<16); - LPC_CANAF_RAM->mask[count] &= 0x0000FFFF; - LPC_CANAF_RAM->mask[count] |= entry; - CANAF_std_cnt++; - if(CANAF_std_cnt == AFSection->SFF_NumEntry)//if this is the last SFF entry - count++; - } - else - { - buf = LPC_CANAF_RAM->mask[count]; - ID_temp = (buf >>16) & 0xE7FF; - if(ID_temp > ((ctrl1<<13)|SID)) - { - return CAN_AF_ENTRY_ERROR; - } - entry = (ctrl1<<13)|(dis1<<12)|(SID<<0); - LPC_CANAF_RAM->mask[count] &= 0xFFFF0000; - LPC_CANAF_RAM->mask[count] |= entry; - count++; - CANAF_std_cnt++; - } - AFSection->SFF_Sec = (SFF_Entry *)((uint32_t)(AFSection->SFF_Sec)+ sizeof(SFF_Entry)); - } - } - -/***** Setup Group of Standard Frame Format Identifier Section *****/ - if(AFSection->SFF_GPR_Sec != NULL) - { - for(i=0;i<(AFSection->SFF_GPR_NumEntry);i++) - { - if(count + 1 > 512) - { - return CAN_OBJECTS_FULL_ERROR; - } - ctrl1 = AFSection->SFF_GPR_Sec->controller1; - ctrl2 = AFSection->SFF_GPR_Sec->controller2; - dis1 = AFSection->SFF_GPR_Sec->disable1; - dis2 = AFSection->SFF_GPR_Sec->disable2; - lowerSID = AFSection->SFF_GPR_Sec->lowerID; - upperSID = AFSection->SFF_GPR_Sec->upperID; - - /* check parameter */ - CHECK_PARAM(PARAM_CTRL(ctrl1)); - CHECK_PARAM(PARAM_CTRL(ctrl2)); - CHECK_PARAM(PARAM_MSG_DISABLE(dis1)); - CHECK_PARAM(PARAM_MSG_DISABLE(dis2)); - CHECK_PARAM(PARAM_ID_11(lowerSID)); - CHECK_PARAM(PARAM_ID_11(upperSID)); - - entry = 0x00; - if(CANAF_gstd_cnt!=0) - { - buf = LPC_CANAF_RAM->mask[count-1]; - ID_temp = buf & 0xE7FF; - if((ctrl1 != ctrl2)||(lowerSID > upperSID)||(ID_temp > ((ctrl1<<13)|lowerSID))) - { - return CAN_AF_ENTRY_ERROR; - } - } - entry = (ctrl1 << 29)|(dis1 << 28)|(lowerSID << 16)| \ - (ctrl2 << 13)|(dis2 << 12)|(upperSID << 0); - LPC_CANAF_RAM->mask[count] = entry; - CANAF_gstd_cnt++; - count++; - AFSection->SFF_GPR_Sec = (SFF_GPR_Entry *)((uint32_t)(AFSection->SFF_GPR_Sec)+ sizeof(SFF_GPR_Entry)); - } - } - -/***** Setup Explicit Extend Frame Format Identifier Section *****/ - if(AFSection->EFF_Sec != NULL) - { - for(i=0;i<(AFSection->EFF_NumEntry);i++) - { - if(count + 1 > 512) - { - return CAN_OBJECTS_FULL_ERROR; - } - EID = AFSection->EFF_Sec->ID_29; - ctrl1 = AFSection->EFF_Sec->controller; - - // check parameter - CHECK_PARAM(PARAM_ID_29(EID)); - CHECK_PARAM(PARAM_CTRL(ctrl1)); - - entry = (ctrl1 << 29)|(EID << 0); - if(CANAF_ext_cnt != 0) - { - buf = LPC_CANAF_RAM->mask[count-1]; -// EID_temp = buf & 0x0FFFFFFF; - if(buf > entry) - { - return CAN_AF_ENTRY_ERROR; - } - } - LPC_CANAF_RAM->mask[count] = entry; - CANAF_ext_cnt ++; - count++; - AFSection->EFF_Sec = (EFF_Entry *)((uint32_t)(AFSection->EFF_Sec)+ sizeof(EFF_Entry)); - } - } - -/***** Setup Group of Extended Frame Format Identifier Section *****/ - if(AFSection->EFF_GPR_Sec != NULL) - { - for(i=0;i<(AFSection->EFF_GPR_NumEntry);i++) - { - if(count + 2 > 512) - { - return CAN_OBJECTS_FULL_ERROR; - } - ctrl1 = AFSection->EFF_GPR_Sec->controller1; - ctrl2 = AFSection->EFF_GPR_Sec->controller2; - lowerEID = AFSection->EFF_GPR_Sec->lowerEID; - upperEID = AFSection->EFF_GPR_Sec->upperEID; - - //check parameter - CHECK_PARAM(PARAM_CTRL(ctrl1)); - CHECK_PARAM(PARAM_CTRL(ctrl2)); - CHECK_PARAM(PARAM_ID_29(lowerEID)); - CHECK_PARAM(PARAM_ID_29(upperEID)); - - entry = 0x00; - if(CANAF_gext_cnt != 0) - { - buf = LPC_CANAF_RAM->mask[count-1]; -// EID_temp = buf & 0x0FFFFFFF; - if((ctrl1 != ctrl2) || (lowerEID > upperEID) || (buf > ((ctrl1 << 29)|(lowerEID << 0)))) - { - return CAN_AF_ENTRY_ERROR; - } - } - entry = (ctrl1 << 29)|(lowerEID << 0); - LPC_CANAF_RAM->mask[count++] = entry; - entry = (ctrl2 << 29)|(upperEID << 0); - LPC_CANAF_RAM->mask[count++] = entry; - CANAF_gext_cnt++; - AFSection->EFF_GPR_Sec = (EFF_GPR_Entry *)((uint32_t)(AFSection->EFF_GPR_Sec)+ sizeof(EFF_GPR_Entry)); - } - } - //update address values - LPC_CANAF->SFF_sa = ((CANAF_FullCAN_cnt + 1)>>1)<<2; - LPC_CANAF->SFF_GRP_sa = LPC_CANAF->SFF_sa + (((CANAF_std_cnt+1)>>1)<< 2); - LPC_CANAF->EFF_sa = LPC_CANAF->SFF_GRP_sa + (CANAF_gstd_cnt << 2); - LPC_CANAF->EFF_GRP_sa = LPC_CANAF->EFF_sa + (CANAF_ext_cnt << 2); - LPC_CANAF->ENDofTable = LPC_CANAF->EFF_GRP_sa + (CANAF_gext_cnt << 3); - - if(FULLCAN_ENABLE == DISABLE) - { - LPC_CANAF->AFMR = 0x00; // Normal mode - } - else - { - LPC_CANAF->AFMR = 0x04; - } - return CAN_OK; -} -/********************************************************************//** - * @brief Add Explicit ID into AF Look-Up Table dynamically. - * @param[in] CANx pointer to LPC_CAN_TypeDef, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] id: The ID of entry will be added - * @param[in] format: is the type of ID Frame Format, should be: - * - STD_ID_FORMAT: 11-bit ID value - * - EXT_ID_FORMAT: 29-bit ID value - * @return CAN Error, could be: - * - CAN_OBJECTS_FULL_ERROR: No more rx or tx objects available - * - CAN_ID_EXIT_ERROR: ID exited in table - * - CAN_OK: ID is added into table successfully - *********************************************************************/ -CAN_ERROR CAN_LoadExplicitEntry(LPC_CAN_TypeDef* CANx, uint32_t id, CAN_ID_FORMAT_Type format) -{ - uint32_t tmp0 = 0; - uint32_t buf0=0, buf1=0; - int16_t cnt1=0, cnt2=0, bound1=0, total=0; - - - CHECK_PARAM(PARAM_CANx(CANx)); - CHECK_PARAM(PARAM_ID_FORMAT(format)); - - if (CANx == LPC_CAN1) - { - tmp0 = 0; - } - else if (CANx == LPC_CAN2) - { - tmp0 = 1; - } - - /* Acceptance Filter Memory full - return */ - total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+ \ - CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1); - if (total >= 512){ //don't have enough space - return CAN_OBJECTS_FULL_ERROR; - } - - /* Setup Acceptance Filter Configuration - Acceptance Filter Mode Register = Off */ - LPC_CANAF->AFMR = 0x00000001; - -/*********** Add Explicit Standard Identifier Frame Format entry *********/ - if(format == STD_ID_FORMAT) - { - id &= 0x07FF; - id |= (tmp0 << 13); /* Add controller number */ - /* Move all remaining sections one place up - if new entry will increase FullCAN list */ - if ((CANAF_std_cnt & 0x0001) == 0) - { - cnt1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1); - bound1 = total - cnt1; - buf0 = LPC_CANAF_RAM->mask[cnt1]; - while(bound1--) - { - cnt1++; - buf1 = LPC_CANAF_RAM->mask[cnt1]; - LPC_CANAF_RAM->mask[cnt1] = buf0; - buf0 = buf1; - } - } - if (CANAF_std_cnt == 0) - { - cnt2 = (CANAF_FullCAN_cnt + 1)>>1; - /* For entering first ID */ - LPC_CANAF_RAM->mask[cnt2] = 0x0000FFFF | (id << 16); - } - else if (CANAF_std_cnt == 1) - { - cnt2 = (CANAF_FullCAN_cnt + 1)>>1; - /* For entering second ID */ - if (((LPC_CANAF_RAM->mask[cnt2] >> 16)& 0xE7FF) > id) - { - LPC_CANAF_RAM->mask[cnt2] = (LPC_CANAF_RAM->mask[cnt2] >> 16) | (id << 16); - } - else - { - LPC_CANAF_RAM->mask[cnt2] = (LPC_CANAF_RAM->mask[cnt2] & 0xFFFF0000) | id; - } - } - else - { - /* Find where to insert new ID */ - cnt1 = (CANAF_FullCAN_cnt+1)>>1; - cnt2 = CANAF_std_cnt; - bound1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1); - while (cnt1 < bound1) - { - /* Loop through standard existing IDs */ - if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) > id) - { - cnt2 = cnt1 * 2; - break; - } - - if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) > id) - { - cnt2 = cnt1 * 2 + 1; - break; - } - - cnt1++; - } - /* cnt1 = U32 where to insert new ID */ - /* cnt2 = U16 where to insert new ID */ - - if (cnt1 == bound1) - { - /* Adding ID as last entry */ - /* Even number of IDs exists */ - if ((CANAF_std_cnt & 0x0001) == 0) - { - LPC_CANAF_RAM->mask[cnt1] = 0x0000FFFF | (id << 16); - } - /* Odd number of IDs exists */ - else - { - LPC_CANAF_RAM->mask[cnt1] = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000) | id; - } - } - else - { - buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */ - if ((cnt2 & 0x0001) == 0) - { - /* Insert new mask to even address*/ - buf1 = (id << 16) | (buf0 >> 16); - } - else - { - /* Insert new mask to odd address */ - buf1 = (buf0 & 0xFFFF0000) | id; - } - LPC_CANAF_RAM->mask[cnt1] = buf1;/* Insert mask */ - bound1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1)-1; - /* Move all remaining standard mask entries one place up */ - while (cnt1 < bound1) - { - cnt1++; - buf1 = LPC_CANAF_RAM->mask[cnt1]; - LPC_CANAF_RAM->mask[cnt1] = (buf1 >> 16) | (buf0 << 16); - buf0 = buf1; - } - - if ((CANAF_std_cnt & 0x0001) == 0) - { - /* Even number of IDs exists */ - LPC_CANAF_RAM->mask[cnt1+1] = (buf0 <<16) |(0x0000FFFF); - } - } - } - CANAF_std_cnt++; - //update address values - LPC_CANAF->SFF_GRP_sa +=0x04 ; - LPC_CANAF->EFF_sa +=0x04 ; - LPC_CANAF->EFF_GRP_sa +=0x04; - LPC_CANAF->ENDofTable +=0x04; - } - -/*********** Add Explicit Extended Identifier Frame Format entry *********/ - else - { - /* Add controller number */ - id |= (tmp0) << 29; - - cnt1 = ((CANAF_FullCAN_cnt+1)>>1)+(((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt); - cnt2 = 0; - while (cnt2 < CANAF_ext_cnt) - { - /* Loop through extended existing masks*/ - if (LPC_CANAF_RAM->mask[cnt1] > id) - { - break; - } - cnt1++;/* cnt1 = U32 where to insert new mask */ - cnt2++; - } - - buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */ - LPC_CANAF_RAM->mask[cnt1] = id; /* Insert mask */ - - CANAF_ext_cnt++; - - bound1 = total; - /* Move all remaining extended mask entries one place up*/ - while (cnt2 < bound1) - { - cnt1++; - cnt2++; - buf1 = LPC_CANAF_RAM->mask[cnt1]; - LPC_CANAF_RAM->mask[cnt1] = buf0; - buf0 = buf1; - } - /* update address values */ - LPC_CANAF->EFF_GRP_sa += 4; - LPC_CANAF->ENDofTable += 4; - } - if(CANAF_FullCAN_cnt == 0) //not use FullCAN mode - { - LPC_CANAF->AFMR = 0x00;//not use FullCAN mode - } - else - { - LPC_CANAF->AFMR = 0x04; - } - - return CAN_OK; -} - -/********************************************************************//** - * @brief Load FullCAN entry into AFLUT - * @param[in] CANx: CAN peripheral selected, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] id: identifier of entry that will be added - * @return CAN_ERROR, could be: - * - CAN_OK: loading is successful - * - CAN_ID_EXIT_ERROR: ID exited in FullCAN Section - * - CAN_OBJECTS_FULL_ERROR: no more space available - *********************************************************************/ -CAN_ERROR CAN_LoadFullCANEntry (LPC_CAN_TypeDef* CANx, uint16_t id) -{ - uint32_t ctrl0 = 0; - uint32_t buf0=0, buf1=0, buf2=0; - uint32_t tmp0=0, tmp1=0, tmp2=0; - int16_t cnt1=0, cnt2=0, bound1=0, total=0; - volatile uint32_t abc; - - CHECK_PARAM(PARAM_CANx(CANx)); - - if (CANx == LPC_CAN1) - { - ctrl0 = 0; - } - else if (CANx == LPC_CAN2) - { - ctrl0 = 1; - } - - /* Acceptance Filter Memory full - return */ - total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+ \ - CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1); - //don't have enough space for this fullCAN Entry and its Object(3*32 bytes) - if ((total >=508)||(CANAF_FullCAN_cnt>=64)){ - return CAN_OBJECTS_FULL_ERROR; - } - /* Setup Acceptance Filter Configuration - Acceptance Filter Mode Register = Off */ - LPC_CANAF->AFMR = 0x00000001; - - /* Add mask for standard identifiers */ - id &= 0x07FF; - id |= (ctrl0 << 13) | (1 << 11); /* Add controller number */ -// total = ((CANAF_std_cnt + 1) >> 1)+ CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1); - /* Move all remaining sections one place up - if new entry will increase FullCAN list */ - if (((CANAF_FullCAN_cnt & 0x0001) == 0)&&(total!=0)) - { - //then remove remaining section - cnt1 = (CANAF_FullCAN_cnt >> 1); - bound1 = total; - buf0 = LPC_CANAF_RAM->mask[cnt1]; - - while (bound1--) - { - cnt1++; - buf1 = LPC_CANAF_RAM->mask[cnt1]; - LPC_CANAF_RAM->mask[cnt1] = buf0; - buf0 = buf1; - } - } - if (CANAF_FullCAN_cnt == 0) - { - /* For entering first ID */ - LPC_CANAF_RAM->mask[0] = 0x0000FFFF | (id << 16); - } - else if (CANAF_FullCAN_cnt == 1) - { - /* For entering second ID */ - if (((LPC_CANAF_RAM->mask[0] >> 16)& 0xE7FF) > id) - { - LPC_CANAF_RAM->mask[0] = (LPC_CANAF_RAM->mask[0] >> 16) | (id << 16); - } - else - { - LPC_CANAF_RAM->mask[0] = (LPC_CANAF_RAM->mask[0] & 0xFFFF0000) | id; - } - } - else - { - /* Find where to insert new ID */ - cnt1 = 0; - cnt2 = CANAF_FullCAN_cnt; - bound1 = (CANAF_FullCAN_cnt - 1) >> 1; - while (cnt1 <= bound1) - { - abc = (LPC_CANAF_RAM->mask[cnt1] >> 16)& 0xE7FF; - /* Loop through standard existing IDs */ - if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) > (id & 0xE7FF)) - { - cnt2 = cnt1 * 2; - break; - } - - abc = LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF; - if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) > (id & 0xE7FF)) - { - cnt2 = cnt1 * 2 + 1; - break; - } - - cnt1++; - } - /* cnt1 = U32 where to insert new ID */ - /* cnt2 = U16 where to insert new ID */ - - if (cnt1 > bound1) - { - /* Adding ID as last entry */ - /* Even number of IDs exists */ - if ((CANAF_FullCAN_cnt & 0x0001) == 0) - { - LPC_CANAF_RAM->mask[cnt1] = 0x0000FFFF | (id << 16); - } - /* Odd number of IDs exists */ - else - { - LPC_CANAF_RAM->mask[cnt1] = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000) | id; - } - } - else - { - buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */ - if ((cnt2 & 0x0001) == 0) - { - /* Insert new mask to even address*/ - buf1 = (id << 16) | (buf0 >> 16); - } - else - { - /* Insert new mask to odd address */ - buf1 = (buf0 & 0xFFFF0000) | id; - } - LPC_CANAF_RAM->mask[cnt1] = buf1;/* Insert mask */ - bound1 = CANAF_FullCAN_cnt >> 1; - /* Move all remaining standard mask entries one place up */ - while (cnt1 < bound1) - { - cnt1++; - buf1 = LPC_CANAF_RAM->mask[cnt1]; - LPC_CANAF_RAM->mask[cnt1] = (buf1 >> 16) | (buf0 << 16); - buf0 = buf1; - } - - if ((CANAF_FullCAN_cnt & 0x0001) == 0) - { - /* Even number of IDs exists */ - LPC_CANAF_RAM->mask[cnt1] = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000) - | (0x0000FFFF); - } - } - } - //restruct FulCAN Object Section - bound1 = CANAF_FullCAN_cnt - cnt2; - cnt1 = total - (CANAF_FullCAN_cnt)*3 + cnt2*3 + 1; - buf0 = LPC_CANAF_RAM->mask[cnt1]; - buf1 = LPC_CANAF_RAM->mask[cnt1+1]; - buf2 = LPC_CANAF_RAM->mask[cnt1+2]; - LPC_CANAF_RAM->mask[cnt1]=LPC_CANAF_RAM->mask[cnt1+1]= LPC_CANAF_RAM->mask[cnt1+2]=0x00; - cnt1+=3; - while(bound1--) - { - tmp0 = LPC_CANAF_RAM->mask[cnt1]; - tmp1 = LPC_CANAF_RAM->mask[cnt1+1]; - tmp2 = LPC_CANAF_RAM->mask[cnt1+2]; - LPC_CANAF_RAM->mask[cnt1]= buf0; - LPC_CANAF_RAM->mask[cnt1+1]= buf1; - LPC_CANAF_RAM->mask[cnt1+2]= buf2; - buf0 = tmp0; - buf1 = tmp1; - buf2 = tmp2; - cnt1+=3; - } - CANAF_FullCAN_cnt++; - //update address values - LPC_CANAF->SFF_sa +=0x04; - LPC_CANAF->SFF_GRP_sa +=0x04 ; - LPC_CANAF->EFF_sa +=0x04 ; - LPC_CANAF->EFF_GRP_sa +=0x04; - LPC_CANAF->ENDofTable +=0x04; - - LPC_CANAF->AFMR = 0x04; - return CAN_OK; -} - -/********************************************************************//** - * @brief Load Group entry into AFLUT - * @param[in] CANx: CAN peripheral selected, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] lowerID, upperID: lower and upper identifier of entry - * @param[in] format: type of ID format, should be: - * - STD_ID_FORMAT: Standard ID format (11-bit value) - * - EXT_ID_FORMAT: Extended ID format (29-bit value) - * @return CAN_ERROR, could be: - * - CAN_OK: loading is successful - * - CAN_CONFLICT_ID_ERROR: Conflict ID occurs - * - CAN_OBJECTS_FULL_ERROR: no more space available - *********************************************************************/ -CAN_ERROR CAN_LoadGroupEntry(LPC_CAN_TypeDef* CANx, uint32_t lowerID, \ - uint32_t upperID, CAN_ID_FORMAT_Type format) -{ - uint16_t tmp = 0; - uint32_t buf0, buf1, entry1, entry2, LID,UID; - int16_t cnt1, bound1, total; - //LPC_CANAF_RAM_TypeDef *AFLUTTest = LPC_CANAF_RAM; - - CHECK_PARAM(PARAM_CANx(CANx)); - CHECK_PARAM(PARAM_ID_FORMAT(format)); - - if(lowerID > upperID) return CAN_CONFLICT_ID_ERROR; - if(CANx == LPC_CAN1) - { - tmp = 0; - } - else - { - tmp = 1; - } - - total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+ \ - CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1); - - /* Setup Acceptance Filter Configuration - Acceptance Filter Mode Register = Off */ - LPC_CANAF->AFMR = 0x00000001; - -/*********Add Group of Standard Identifier Frame Format************/ - if(format == STD_ID_FORMAT) - { - if ((total >= 512)){//don't have enough space - return CAN_OBJECTS_FULL_ERROR; - } - lowerID &=0x7FF; //mask ID - upperID &=0x7FF; - entry1 = (tmp << 29)|(lowerID << 16)|(tmp << 13)|(upperID << 0); - cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1); - - //if this is the first Group standard ID entry - if(CANAF_gstd_cnt == 0) - { - LPC_CANAF_RAM->mask[cnt1] = entry1; - } - else - { - //find the position to add new Group entry - bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt; - while(cnt1 < bound1) - { - //compare controller first - while((LPC_CANAF_RAM->mask[cnt1] >> 29)< (entry1 >> 29))//increase until meet greater or equal controller - cnt1++; - buf0 = LPC_CANAF_RAM->mask[cnt1]; - if((LPC_CANAF_RAM->mask[cnt1] >> 29)> (entry1 >> 29)) //meet greater controller - { - //add at this position - LPC_CANAF_RAM->mask[cnt1] = entry1; - break; - } - else //meet equal controller - { - LID = (buf0 >> 16)&0x7FF; - UID = buf0 & 0x7FF; - if (upperID <= LID) - { - //add new entry before this entry - LPC_CANAF_RAM->mask[cnt1] = entry1; - break; - } - else if (lowerID >= UID) - { - //load next entry to compare - cnt1 ++; - } - else - return CAN_CONFLICT_ID_ERROR; - } - } - if(cnt1 >= bound1) - { - //add new entry at the last position in this list - buf0 = LPC_CANAF_RAM->mask[cnt1]; - LPC_CANAF_RAM->mask[cnt1] = entry1; - } - - //remove all remaining entry of this section one place up - bound1 = total - cnt1; - while(bound1--) - { - cnt1++; - buf1 = LPC_CANAF_RAM->mask[cnt1]; - LPC_CANAF_RAM->mask[cnt1] = buf0; - buf0 = buf1; - } - } - CANAF_gstd_cnt++; - //update address values - LPC_CANAF->EFF_sa +=0x04 ; - LPC_CANAF->EFF_GRP_sa +=0x04; - LPC_CANAF->ENDofTable +=0x04; - } - - -/*********Add Group of Extended Identifier Frame Format************/ - else - { - if ((total >= 511)){//don't have enough space - return CAN_OBJECTS_FULL_ERROR; - } - lowerID &= 0x1FFFFFFF; //mask ID - upperID &= 0x1FFFFFFF; - entry1 = (tmp << 29)|(lowerID << 0); - entry2 = (tmp << 29)|(upperID << 0); - - cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt + CANAF_ext_cnt; - //if this is the first Group standard ID entry - if(CANAF_gext_cnt == 0) - { - LPC_CANAF_RAM->mask[cnt1] = entry1; - LPC_CANAF_RAM->mask[cnt1+1] = entry2; - } - else - { - //find the position to add new Group entry - bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt \ - + CANAF_ext_cnt + (CANAF_gext_cnt<<1); - while(cnt1 < bound1) - { - while((LPC_CANAF_RAM->mask[cnt1] >>29)< tmp) //increase until meet greater or equal controller - cnt1++; - buf0 = LPC_CANAF_RAM->mask[cnt1]; - buf1 = LPC_CANAF_RAM->mask[cnt1+1]; - if((LPC_CANAF_RAM->mask[cnt1] >> 29)> (entry1 >> 29)) //meet greater controller - { - //add at this position - LPC_CANAF_RAM->mask[cnt1] = entry1; - LPC_CANAF_RAM->mask[++cnt1] = entry2; - break; - } - else //meet equal controller - { - LID = buf0 & 0x1FFFFFFF; //mask ID - UID = buf1 & 0x1FFFFFFF; - if (upperID <= LID) - { - //add new entry before this entry - LPC_CANAF_RAM->mask[cnt1] = entry1; - LPC_CANAF_RAM->mask[++cnt1] = entry2; - break; - } - else if (lowerID >= UID) - { - //load next entry to compare - cnt1 +=2; - } - else - return CAN_CONFLICT_ID_ERROR; - } - } - if(cnt1 >= bound1) - { - //add new entry at the last position in this list - buf0 = LPC_CANAF_RAM->mask[cnt1]; - buf1 = LPC_CANAF_RAM->mask[cnt1+1]; - LPC_CANAF_RAM->mask[cnt1] = entry1; - LPC_CANAF_RAM->mask[++cnt1] = entry2; - } - //remove all remaining entry of this section two place up - bound1 = total - cnt1 + 1; - cnt1++; - while(bound1>0) - { - entry1 = LPC_CANAF_RAM->mask[cnt1]; - entry2 = LPC_CANAF_RAM->mask[cnt1+1]; - LPC_CANAF_RAM->mask[cnt1] = buf0; - LPC_CANAF_RAM->mask[cnt1+1] = buf1; - buf0 = entry1; - buf1 = entry2; - cnt1 +=2; - bound1 -=2; - } - } - CANAF_gext_cnt++; - //update address values - LPC_CANAF->ENDofTable +=0x08; - } - LPC_CANAF->AFMR = 0x04; - return CAN_OK; -} - -/********************************************************************//** - * @brief Remove AFLUT entry (FullCAN entry and Explicit Standard entry) - * @param[in] EntryType: the type of entry that want to remove, should be: - * - FULLCAN_ENTRY - * - EXPLICIT_STANDARD_ENTRY - * - GROUP_STANDARD_ENTRY - * - EXPLICIT_EXTEND_ENTRY - * - GROUP_EXTEND_ENTRY - * @param[in] position: the position of this entry in its section - * Note: the first position is 0 - * @return CAN_ERROR, could be: - * - CAN_OK: removing is successful - * - CAN_ENTRY_NOT_EXIT_ERROR: entry want to remove is not exit - *********************************************************************/ -CAN_ERROR CAN_RemoveEntry(AFLUT_ENTRY_Type EntryType, uint16_t position) -{ - uint16_t cnt, bound, total; - uint32_t buf0, buf1; - CHECK_PARAM(PARAM_AFLUT_ENTRY_TYPE(EntryType)); - CHECK_PARAM(PARAM_POSITION(position)); - - /* Setup Acceptance Filter Configuration - Acceptance Filter Mode Register = Off */ - LPC_CANAF->AFMR = 0x00000001; - total = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt + 1) >> 1) + \ - CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1); - - -/************** Remove FullCAN Entry *************/ - if(EntryType == FULLCAN_ENTRY) - { - if((CANAF_FullCAN_cnt==0)||(position >= CANAF_FullCAN_cnt)) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else - { - cnt = position >> 1; - buf0 = LPC_CANAF_RAM->mask[cnt]; - bound = (CANAF_FullCAN_cnt - position -1)>>1; - if((position & 0x0001) == 0) //event position - { - while(bound--) - { - //remove all remaining FullCAN entry one place down - buf1 = LPC_CANAF_RAM->mask[cnt+1]; - LPC_CANAF_RAM->mask[cnt] = (buf1 >> 16) | (buf0 << 16); - buf0 = buf1; - cnt++; - } - } - else //odd position - { - while(bound--) - { - //remove all remaining FullCAN entry one place down - buf1 = LPC_CANAF_RAM->mask[cnt+1]; - LPC_CANAF_RAM->mask[cnt] = (buf0 & 0xFFFF0000)|(buf1 >> 16); - LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+1] << 16; - buf0 = buf1<<16; - cnt++; - } - } - if((CANAF_FullCAN_cnt & 0x0001) == 0) - { - if((position & 0x0001)==0) - LPC_CANAF_RAM->mask[cnt] = (buf0 << 16) | (0x0000FFFF); - else - LPC_CANAF_RAM->mask[cnt] = buf0 | 0x0000FFFF; - } - else - { - //remove all remaining section one place down - cnt = (CANAF_FullCAN_cnt + 1)>>1; - bound = total + CANAF_FullCAN_cnt * 3; - while(bound>cnt) - { - LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt]; - cnt++; - } - LPC_CANAF_RAM->mask[cnt-1]=0x00; - //update address values - LPC_CANAF->SFF_sa -=0x04; - LPC_CANAF->SFF_GRP_sa -=0x04 ; - LPC_CANAF->EFF_sa -=0x04 ; - LPC_CANAF->EFF_GRP_sa -=0x04; - LPC_CANAF->ENDofTable -=0x04; - } - CANAF_FullCAN_cnt--; - - //delete its FullCAN Object in the FullCAN Object section - //remove all remaining FullCAN Object three place down - cnt = total + position * 3; - bound = (CANAF_FullCAN_cnt - position + 1) * 3; - - while(bound) - { - LPC_CANAF_RAM->mask[cnt]=LPC_CANAF_RAM->mask[cnt+3];; - LPC_CANAF_RAM->mask[cnt+1]=LPC_CANAF_RAM->mask[cnt+4]; - LPC_CANAF_RAM->mask[cnt+2]=LPC_CANAF_RAM->mask[cnt+5]; - bound -=3; - cnt +=3; - } - } - } - -/************** Remove Explicit Standard ID Entry *************/ - else if(EntryType == EXPLICIT_STANDARD_ENTRY) - { - if((CANAF_std_cnt==0)||(position >= CANAF_std_cnt)) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else - { - cnt = ((CANAF_FullCAN_cnt+1)>>1)+ (position >> 1); - buf0 = LPC_CANAF_RAM->mask[cnt]; - bound = (CANAF_std_cnt - position - 1)>>1; - if((position & 0x0001) == 0) //event position - { - while(bound--) - { - //remove all remaining FullCAN entry one place down - buf1 = LPC_CANAF_RAM->mask[cnt+1]; - LPC_CANAF_RAM->mask[cnt] = (buf1 >> 16) | (buf0 << 16); - buf0 = buf1; - cnt++; - } - } - else //odd position - { - while(bound--) - { - //remove all remaining FullCAN entry one place down - buf1 = LPC_CANAF_RAM->mask[cnt+1]; - LPC_CANAF_RAM->mask[cnt] = (buf0 & 0xFFFF0000)|(buf1 >> 16); - LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+1] << 16; - buf0 = buf1<<16; - cnt++; - } - } - if((CANAF_std_cnt & 0x0001) == 0) - { - if((position & 0x0001)==0) - LPC_CANAF_RAM->mask[cnt] = (buf0 << 16) | (0x0000FFFF); - else - LPC_CANAF_RAM->mask[cnt] = buf0 | 0x0000FFFF; - } - else - { - //remove all remaining section one place down - cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1); - bound = total + CANAF_FullCAN_cnt * 3; - while(bound>cnt) - { - LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt]; - cnt++; - } - LPC_CANAF_RAM->mask[cnt-1]=0x00; - //update address value - LPC_CANAF->SFF_GRP_sa -=0x04 ; - LPC_CANAF->EFF_sa -=0x04 ; - LPC_CANAF->EFF_GRP_sa -=0x04; - LPC_CANAF->ENDofTable -=0x04; - } - CANAF_std_cnt--; - } - } - -/************** Remove Group of Standard ID Entry *************/ - else if(EntryType == GROUP_STANDARD_ENTRY) - { - if((CANAF_gstd_cnt==0)||(position >= CANAF_gstd_cnt)) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else - { - cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1)+ position + 1; - bound = total + CANAF_FullCAN_cnt * 3; - while (cnt<bound) - { - LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt]; - cnt++; - } - LPC_CANAF_RAM->mask[cnt-1]=0x00; - } - CANAF_gstd_cnt--; - //update address value - LPC_CANAF->EFF_sa -=0x04; - LPC_CANAF->EFF_GRP_sa -=0x04; - LPC_CANAF->ENDofTable -=0x04; - } - -/************** Remove Explicit Extended ID Entry *************/ - else if(EntryType == EXPLICIT_EXTEND_ENTRY) - { - if((CANAF_ext_cnt==0)||(position >= CANAF_ext_cnt)) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else - { - cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1)+ CANAF_gstd_cnt + position + 1; - bound = total + CANAF_FullCAN_cnt * 3; - while (cnt<bound) - { - LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt]; - cnt++; - } - LPC_CANAF_RAM->mask[cnt-1]=0x00; - } - CANAF_ext_cnt--; - LPC_CANAF->EFF_GRP_sa -=0x04; - LPC_CANAF->ENDofTable -=0x04; - } - -/************** Remove Group of Extended ID Entry *************/ - else - { - if((CANAF_gext_cnt==0)||(position >= CANAF_gext_cnt)) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else - { - cnt = total - (CANAF_gext_cnt<<1) + (position<<1); - bound = total + CANAF_FullCAN_cnt * 3; - while (cnt<bound) - { - //remove all remaining entry two place up - LPC_CANAF_RAM->mask[cnt] = LPC_CANAF_RAM->mask[cnt+2]; - LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+3]; - cnt+=2; - } - } - CANAF_gext_cnt--; - LPC_CANAF->ENDofTable -=0x08; - } - LPC_CANAF->AFMR = 0x04; - return CAN_OK; -} - -/********************************************************************//** - * @brief Send message data - * @param[in] CANx pointer to LPC_CAN_TypeDef, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] CAN_Msg point to the CAN_MSG_Type Structure, it contains message - * information such as: ID, DLC, RTR, ID Format - * @return Status: - * - SUCCESS: send message successfully - * - ERROR: send message unsuccessfully - *********************************************************************/ -Status CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg) -{ - uint32_t data; - CHECK_PARAM(PARAM_CANx(CANx)); - CHECK_PARAM(PARAM_ID_FORMAT(CAN_Msg->format)); - if(CAN_Msg->format==STD_ID_FORMAT) - { - CHECK_PARAM(PARAM_ID_11(CAN_Msg->id)); - } - else - { - CHECK_PARAM(PARAM_ID_29(CAN_Msg->id)); - } - CHECK_PARAM(PARAM_DLC(CAN_Msg->len)); - CHECK_PARAM(PARAM_FRAME_TYPE(CAN_Msg->type)); - - //Check status of Transmit Buffer 1 - if (CANx->SR & (1<<2)) - { - /* Transmit Channel 1 is available */ - /* Write frame informations and frame data into its CANxTFI1, - * CANxTID1, CANxTDA1, CANxTDB1 register */ - CANx->TFI1 &= ~0x000F0000; - CANx->TFI1 |= (CAN_Msg->len)<<16; - if(CAN_Msg->type == REMOTE_FRAME) - { - CANx->TFI1 |= (1<<30); //set bit RTR - } - else - { - CANx->TFI1 &= ~(1<<30); - } - if(CAN_Msg->format == EXT_ID_FORMAT) - { - CANx->TFI1 |= (1UL<<31); //set bit FF - } - else - { - CANx->TFI1 &= ~(1UL<<31); - } - - /* Write CAN ID*/ - CANx->TID1 = CAN_Msg->id; - - /*Write first 4 data bytes*/ - data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24); - CANx->TDA1 = data; - - /*Write second 4 data bytes*/ - data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24); - CANx->TDB1 = data; - - /*Write transmission request*/ - CANx->CMR = 0x21; - return SUCCESS; - } - //check status of Transmit Buffer 2 - else if(CANx->SR & (1<<10)) - { - /* Transmit Channel 2 is available */ - /* Write frame informations and frame data into its CANxTFI2, - * CANxTID2, CANxTDA2, CANxTDB2 register */ - CANx->TFI2 &= ~0x000F0000; - CANx->TFI2 |= (CAN_Msg->len)<<16; - if(CAN_Msg->type == REMOTE_FRAME) - { - CANx->TFI2 |= (1<<30); //set bit RTR - } - else - { - CANx->TFI2 &= ~(1<<30); - } - if(CAN_Msg->format == EXT_ID_FORMAT) - { - CANx->TFI2 |= (1UL<<31); //set bit FF - } - else - { - CANx->TFI2 &= ~(1UL<<31); - } - - /* Write CAN ID*/ - CANx->TID2 = CAN_Msg->id; - - /*Write first 4 data bytes*/ - data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24); - CANx->TDA2 = data; - - /*Write second 4 data bytes*/ - data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24); - CANx->TDB2 = data; - - /*Write transmission request*/ - CANx->CMR = 0x41; - return SUCCESS; - } - //check status of Transmit Buffer 3 - else if (CANx->SR & (1<<18)) - { - /* Transmit Channel 3 is available */ - /* Write frame informations and frame data into its CANxTFI3, - * CANxTID3, CANxTDA3, CANxTDB3 register */ - CANx->TFI3 &= ~0x000F0000; - CANx->TFI3 |= (CAN_Msg->len)<<16; - if(CAN_Msg->type == REMOTE_FRAME) - { - CANx->TFI3 |= (1<<30); //set bit RTR - } - else - { - CANx->TFI3 &= ~(1<<30); - } - if(CAN_Msg->format == EXT_ID_FORMAT) - { - CANx->TFI3 |= (1UL<<31); //set bit FF - } - else - { - CANx->TFI3 &= ~(1UL<<31); - } - - /* Write CAN ID*/ - CANx->TID3 = CAN_Msg->id; - - /*Write first 4 data bytes*/ - data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24); - CANx->TDA3 = data; - - /*Write second 4 data bytes*/ - data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24); - CANx->TDB3 = data; - - /*Write transmission request*/ - CANx->CMR = 0x81; - return SUCCESS; - } - else - { - return ERROR; - } -} - -/********************************************************************//** - * @brief Receive message data - * @param[in] CANx pointer to LPC_CAN_TypeDef, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] CAN_Msg point to the CAN_MSG_Type Struct, it will contain received - * message information such as: ID, DLC, RTR, ID Format - * @return Status: - * - SUCCESS: receive message successfully - * - ERROR: receive message unsuccessfully - *********************************************************************/ -Status CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg) -{ - uint32_t data; - - CHECK_PARAM(PARAM_CANx(CANx)); - - //check status of Receive Buffer - if((CANx->SR &0x00000001)) - { - /* Receive message is available */ - /* Read frame informations */ - CAN_Msg->format = (uint8_t)(((CANx->RFS) & 0x80000000)>>31); - CAN_Msg->type = (uint8_t)(((CANx->RFS) & 0x40000000)>>30); - CAN_Msg->len = (uint8_t)(((CANx->RFS) & 0x000F0000)>>16); - - - /* Read CAN message identifier */ - CAN_Msg->id = CANx->RID; - - /* Read the data if received message was DATA FRAME */ - if (CAN_Msg->type == DATA_FRAME) - { - /* Read first 4 data bytes */ - data = CANx->RDA; - *((uint8_t *) &CAN_Msg->dataA[0])= data & 0x000000FF; - *((uint8_t *) &CAN_Msg->dataA[1])= (data & 0x0000FF00)>>8;; - *((uint8_t *) &CAN_Msg->dataA[2])= (data & 0x00FF0000)>>16; - *((uint8_t *) &CAN_Msg->dataA[3])= (data & 0xFF000000)>>24; - - /* Read second 4 data bytes */ - data = CANx->RDB; - *((uint8_t *) &CAN_Msg->dataB[0])= data & 0x000000FF; - *((uint8_t *) &CAN_Msg->dataB[1])= (data & 0x0000FF00)>>8; - *((uint8_t *) &CAN_Msg->dataB[2])= (data & 0x00FF0000)>>16; - *((uint8_t *) &CAN_Msg->dataB[3])= (data & 0xFF000000)>>24; - - /*release receive buffer*/ - CANx->CMR = 0x04; - } - else - { - /* Received Frame is a Remote Frame, not have data, we just receive - * message information only */ - CANx->CMR = 0x04; /*release receive buffer*/ - return SUCCESS; - } - } - else - { - // no receive message available - return ERROR; - } - return SUCCESS; -} - -/********************************************************************//** - * @brief Receive FullCAN Object - * @param[in] CANAFx: CAN Acceptance Filter register, should be: LPC_CANAF - * @param[in] CAN_Msg point to the CAN_MSG_Type Struct, it will contain received - * message information such as: ID, DLC, RTR, ID Format - * @return CAN_ERROR, could be: - * - CAN_FULL_OBJ_NOT_RCV: FullCAN Object is not be received - * - CAN_OK: Received FullCAN Object successful - * - *********************************************************************/ -CAN_ERROR FCAN_ReadObj (LPC_CANAF_TypeDef* CANAFx, CAN_MSG_Type *CAN_Msg) -{ - uint32_t *pSrc, data; - uint32_t interrut_word, msg_idx, test_bit, head_idx, tail_idx; - - CHECK_PARAM(PARAM_CANAFx(CANAFx)); - - interrut_word = 0; - - if (LPC_CANAF->FCANIC0 != 0) - { - interrut_word = LPC_CANAF->FCANIC0; - head_idx = 0; - tail_idx = 31; - } - else if (LPC_CANAF->FCANIC1 != 0) - { - interrut_word = LPC_CANAF->FCANIC1; - head_idx = 32; - tail_idx = 63; - } - - if (interrut_word != 0) - { - /* Detect for interrupt pending */ - msg_idx = 0; - for (msg_idx = head_idx; msg_idx <= tail_idx; msg_idx++) - { - test_bit = interrut_word & 0x1; - interrut_word = interrut_word >> 1; - - if (test_bit) - { - pSrc = (uint32_t *) (LPC_CANAF->ENDofTable + LPC_CANAF_RAM_BASE + msg_idx * 12); - - /* Has been finished updating the content */ - if ((*pSrc & 0x03000000L) == 0x03000000L) - { - /*clear semaphore*/ - *pSrc &= 0xFCFFFFFF; - - /*Set to DatA*/ - pSrc++; - /* Copy to dest buf */ - data = *pSrc; - *((uint8_t *) &CAN_Msg->dataA[0])= data & 0x000000FF; - *((uint8_t *) &CAN_Msg->dataA[1])= (data & 0x0000FF00)>>8; - *((uint8_t *) &CAN_Msg->dataA[2])= (data & 0x00FF0000)>>16; - *((uint8_t *) &CAN_Msg->dataA[3])= (data & 0xFF000000)>>24; - - /*Set to DatB*/ - pSrc++; - /* Copy to dest buf */ - data = *pSrc; - *((uint8_t *) &CAN_Msg->dataB[0])= data & 0x000000FF; - *((uint8_t *) &CAN_Msg->dataB[1])= (data & 0x0000FF00)>>8; - *((uint8_t *) &CAN_Msg->dataB[2])= (data & 0x00FF0000)>>16; - *((uint8_t *) &CAN_Msg->dataB[3])= (data & 0xFF000000)>>24; - /*Back to Dat1*/ - pSrc -= 2; - - CAN_Msg->id = *pSrc & 0x7FF; - CAN_Msg->len = (uint8_t) (*pSrc >> 16) & 0x0F; - CAN_Msg->format = 0; //FullCAN Object ID always is 11-bit value - CAN_Msg->type = (uint8_t)(*pSrc >> 30) &0x01; - /*Re-read semaphore*/ - if ((*pSrc & 0x03000000L) == 0) - { - return CAN_OK; - } - } - } - } - } - return CAN_FULL_OBJ_NOT_RCV; -} -/********************************************************************//** - * @brief Get CAN Control Status - * @param[in] CANx pointer to LPC_CAN_TypeDef, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] arg: type of CAN status to get from CAN status register - * Should be: - * - CANCTRL_GLOBAL_STS: CAN Global Status - * - CANCTRL_INT_CAP: CAN Interrupt and Capture - * - CANCTRL_ERR_WRN: CAN Error Warning Limit - * - CANCTRL_STS: CAN Control Status - * @return Current Control Status that you want to get value - *********************************************************************/ -uint32_t CAN_GetCTRLStatus (LPC_CAN_TypeDef* CANx, CAN_CTRL_STS_Type arg) -{ - CHECK_PARAM(PARAM_CANx(CANx)); - CHECK_PARAM(PARAM_CTRL_STS_TYPE(arg)); - - switch (arg) - { - case CANCTRL_GLOBAL_STS: - return CANx->GSR; - - case CANCTRL_INT_CAP: - return CANx->ICR; - - case CANCTRL_ERR_WRN: - return CANx->EWL; - - default: // CANCTRL_STS - return CANx->SR; - } -} -/********************************************************************//** - * @brief Get CAN Central Status - * @param[in] CANCRx point to LPC_CANCR_TypeDef, should be: LPC_CANCR - * @param[in] arg: type of CAN status to get from CAN Central status register - * Should be: - * - CANCR_TX_STS: Central CAN Tx Status - * - CANCR_RX_STS: Central CAN Rx Status - * - CANCR_MS: Central CAN Miscellaneous Status - * @return Current Central Status that you want to get value - *********************************************************************/ -uint32_t CAN_GetCRStatus (LPC_CANCR_TypeDef* CANCRx, CAN_CR_STS_Type arg) -{ - CHECK_PARAM(PARAM_CANCRx(CANCRx)); - CHECK_PARAM(PARAM_CR_STS_TYPE(arg)); - - switch (arg) - { - case CANCR_TX_STS: - return CANCRx->CANTxSR; - - case CANCR_RX_STS: - return CANCRx->CANRxSR; - - default: // CANCR_MS - return CANCRx->CANMSR; - } -} -/********************************************************************//** - * @brief Enable/Disable CAN Interrupt - * @param[in] CANx pointer to LPC_CAN_TypeDef, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] arg: type of CAN interrupt that you want to enable/disable - * Should be: - * - CANINT_RIE: CAN Receiver Interrupt Enable - * - CANINT_TIE1: CAN Transmit Interrupt Enable - * - CANINT_EIE: CAN Error Warning Interrupt Enable - * - CANINT_DOIE: CAN Data Overrun Interrupt Enable - * - CANINT_WUIE: CAN Wake-Up Interrupt Enable - * - CANINT_EPIE: CAN Error Passive Interrupt Enable - * - CANINT_ALIE: CAN Arbitration Lost Interrupt Enable - * - CANINT_BEIE: CAN Bus Error Interrupt Enable - * - CANINT_IDIE: CAN ID Ready Interrupt Enable - * - CANINT_TIE2: CAN Transmit Interrupt Enable for Buffer2 - * - CANINT_TIE3: CAN Transmit Interrupt Enable for Buffer3 - * - CANINT_FCE: FullCAN Interrupt Enable - * @param[in] NewState: New state of this function, should be: - * - ENABLE - * - DISABLE - * @return none - *********************************************************************/ -void CAN_IRQCmd (LPC_CAN_TypeDef* CANx, CAN_INT_EN_Type arg, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_CANx(CANx)); - CHECK_PARAM(PARAM_INT_EN_TYPE(arg)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if(NewState == ENABLE) - { - if(arg==CANINT_FCE) - { - LPC_CANAF->AFMR = 0x01; - LPC_CANAF->FCANIE = 0x01; - LPC_CANAF->AFMR = 0x04; - } - else - CANx->IER |= (1 << arg); - } - else - { - if(arg==CANINT_FCE){ - LPC_CANAF->AFMR = 0x01; - LPC_CANAF->FCANIE = 0x01; - LPC_CANAF->AFMR = 0x00; - } - else - CANx->IER &= ~(1 << arg); - } -} - -/********************************************************************//** - * @brief Setting Acceptance Filter mode - * @param[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF - * @param[in] AFMode: type of AF mode that you want to set, should be: - * - CAN_Normal: Normal mode - * - CAN_AccOff: Acceptance Filter Off Mode - * - CAN_AccBP: Acceptance Fileter Bypass Mode - * - CAN_eFCAN: FullCAN Mode Enhancement - * @return none - *********************************************************************/ -void CAN_SetAFMode (LPC_CANAF_TypeDef* CANAFx, CAN_AFMODE_Type AFMode) -{ - CHECK_PARAM(PARAM_CANAFx(CANAFx)); - CHECK_PARAM(PARAM_AFMODE_TYPE(AFMode)); - - switch(AFMode) - { - case CAN_Normal: - CANAFx->AFMR = 0x00; - break; - case CAN_AccOff: - CANAFx->AFMR = 0x01; - break; - case CAN_AccBP: - CANAFx->AFMR = 0x02; - break; - case CAN_eFCAN: - CANAFx->AFMR = 0x04; - break; - } -} - -/********************************************************************//** - * @brief Enable/Disable CAN Mode - * @param[in] CANx pointer to LPC_CAN_TypeDef, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] mode: type of CAN mode that you want to enable/disable, should be: - * - CAN_OPERATING_MODE: Normal Operating Mode - * - CAN_RESET_MODE: Reset Mode - * - CAN_LISTENONLY_MODE: Listen Only Mode - * - CAN_SELFTEST_MODE: Self Test Mode - * - CAN_TXPRIORITY_MODE: Transmit Priority Mode - * - CAN_SLEEP_MODE: Sleep Mode - * - CAN_RXPOLARITY_MODE: Receive Polarity Mode - * - CAN_TEST_MODE: Test Mode - * @param[in] NewState: New State of this function, should be: - * - ENABLE - * - DISABLE - * @return none - *********************************************************************/ -void CAN_ModeConfig(LPC_CAN_TypeDef* CANx, CAN_MODE_Type mode, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_CANx(CANx)); - CHECK_PARAM(PARAM_MODE_TYPE(mode)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - switch(mode) - { - case CAN_OPERATING_MODE: - CANx->MOD = 0x00; - break; - case CAN_RESET_MODE: - if(NewState == ENABLE) - CANx->MOD |=CAN_MOD_RM; - else - CANx->MOD &= ~CAN_MOD_RM; - break; - case CAN_LISTENONLY_MODE: - CANx->MOD |=CAN_MOD_RM;//Enter Reset mode - if(NewState == ENABLE) - CANx->MOD |=CAN_MOD_LOM; - else - CANx->MOD &=~CAN_MOD_LOM; - CANx->MOD &=~CAN_MOD_RM;//Release Reset mode - break; - case CAN_SELFTEST_MODE: - CANx->MOD |=CAN_MOD_RM;//Enter Reset mode - if(NewState == ENABLE) - CANx->MOD |=CAN_MOD_STM; - else - CANx->MOD &=~CAN_MOD_STM; - CANx->MOD &=~CAN_MOD_RM;//Release Reset mode - break; - case CAN_TXPRIORITY_MODE: - if(NewState == ENABLE) - CANx->MOD |=CAN_MOD_TPM; - else - CANx->MOD &=~CAN_MOD_TPM; - break; - case CAN_SLEEP_MODE: - if(NewState == ENABLE) - CANx->MOD |=CAN_MOD_SM; - else - CANx->MOD &=~CAN_MOD_SM; - break; - case CAN_RXPOLARITY_MODE: - if(NewState == ENABLE) - CANx->MOD |=CAN_MOD_RPM; - else - CANx->MOD &=~CAN_MOD_RPM; - break; - case CAN_TEST_MODE: - if(NewState == ENABLE) - CANx->MOD |=CAN_MOD_TM; - else - CANx->MOD &=~CAN_MOD_TM; - break; - } -} -/*********************************************************************//** - * @brief Set CAN command request - * @param[in] CANx point to CAN peripheral selected, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @param[in] CMRType command request type, should be: - * - CAN_CMR_TR: Transmission request - * - CAN_CMR_AT: Abort Transmission request - * - CAN_CMR_RRB: Release Receive Buffer request - * - CAN_CMR_CDO: Clear Data Overrun request - * - CAN_CMR_SRR: Self Reception request - * - CAN_CMR_STB1: Select Tx Buffer 1 request - * - CAN_CMR_STB2: Select Tx Buffer 2 request - * - CAN_CMR_STB3: Select Tx Buffer 3 request - * @return CANICR (CAN interrupt and Capture register) value - **********************************************************************/ -void CAN_SetCommand(LPC_CAN_TypeDef* CANx, uint32_t CMRType) -{ - CHECK_PARAM(PARAM_CANx(CANx)); - CANx->CMR |= CMRType; -} - -/*********************************************************************//** - * @brief Get CAN interrupt status - * @param[in] CANx point to CAN peripheral selected, should be: - * - LPC_CAN1: CAN1 peripheral - * - LPC_CAN2: CAN2 peripheral - * @return CANICR (CAN interrupt and Capture register) value - **********************************************************************/ -uint32_t CAN_IntGetStatus(LPC_CAN_TypeDef* CANx) -{ - CHECK_PARAM(PARAM_CANx(CANx)); - return CANx->ICR; -} - -/*********************************************************************//** - * @brief Check if FullCAN interrupt enable or not - * @param[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF - * @return IntStatus, could be: - * - SET: if FullCAN interrupt is enable - * - RESET: if FullCAN interrupt is disable - **********************************************************************/ -IntStatus CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef* CANAFx) -{ - CHECK_PARAM( PARAM_CANAFx(CANAFx)); - if (CANAFx->FCANIE) - return SET; - return RESET; -} - -/*********************************************************************//** - * @brief Get value of FullCAN interrupt and capture register - * @param[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF - * @param[in] type: FullCAN IC type, should be: - * - FULLCAN_IC0: FullCAN Interrupt Capture 0 - * - FULLCAN_IC1: FullCAN Interrupt Capture 1 - * @return FCANIC0 or FCANIC1 (FullCAN interrupt and Capture register) value - **********************************************************************/ -uint32_t CAN_FullCANPendGetStatus(LPC_CANAF_TypeDef* CANAFx, FullCAN_IC_Type type) -{ - CHECK_PARAM(PARAM_CANAFx(CANAFx)); - CHECK_PARAM( PARAM_FULLCAN_IC(type)); - if (type == FULLCAN_IC0) - return CANAFx->FCANIC0; - return CANAFx->FCANIC1; -} -/* End of Public Variables ---------------------------------------------------------- */ -/** - * @} - */ - -#endif /* _CAN */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_clkpwr.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,347 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_clkpwr.c 2010-06-18 -*//** -* @file lpc17xx_clkpwr.c -* @brief Contains all functions support for Clock and Power Control -* firmware library on LPC17xx -* @version 3.0 -* @date 18. June. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup CLKPWR - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_clkpwr.h" - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup CLKPWR_Public_Functions - * @{ - */ - -/*********************************************************************//** - * @brief Set value of each Peripheral Clock Selection - * @param[in] ClkType Peripheral Clock Selection of each type, - * should be one of the following: - * - CLKPWR_PCLKSEL_WDT : WDT - - CLKPWR_PCLKSEL_TIMER0 : Timer 0 - - CLKPWR_PCLKSEL_TIMER1 : Timer 1 - - CLKPWR_PCLKSEL_UART0 : UART 0 - - CLKPWR_PCLKSEL_UART1 : UART 1 - - CLKPWR_PCLKSEL_PWM1 : PWM 1 - - CLKPWR_PCLKSEL_I2C0 : I2C 0 - - CLKPWR_PCLKSEL_SPI : SPI - - CLKPWR_PCLKSEL_SSP1 : SSP 1 - - CLKPWR_PCLKSEL_DAC : DAC - - CLKPWR_PCLKSEL_ADC : ADC - - CLKPWR_PCLKSEL_CAN1 : CAN 1 - - CLKPWR_PCLKSEL_CAN2 : CAN 2 - - CLKPWR_PCLKSEL_ACF : ACF - - CLKPWR_PCLKSEL_QEI : QEI - - CLKPWR_PCLKSEL_PCB : PCB - - CLKPWR_PCLKSEL_I2C1 : I2C 1 - - CLKPWR_PCLKSEL_SSP0 : SSP 0 - - CLKPWR_PCLKSEL_TIMER2 : Timer 2 - - CLKPWR_PCLKSEL_TIMER3 : Timer 3 - - CLKPWR_PCLKSEL_UART2 : UART 2 - - CLKPWR_PCLKSEL_UART3 : UART 3 - - CLKPWR_PCLKSEL_I2C2 : I2C 2 - - CLKPWR_PCLKSEL_I2S : I2S - - CLKPWR_PCLKSEL_RIT : RIT - - CLKPWR_PCLKSEL_SYSCON : SYSCON - - CLKPWR_PCLKSEL_MC : MC - - * @param[in] DivVal Value of divider, should be: - * - CLKPWR_PCLKSEL_CCLK_DIV_4 : PCLK_peripheral = CCLK/4 - * - CLKPWR_PCLKSEL_CCLK_DIV_1 : PCLK_peripheral = CCLK/1 - * - CLKPWR_PCLKSEL_CCLK_DIV_2 : PCLK_peripheral = CCLK/2 - * - * @return none - **********************************************************************/ -void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal) -{ - uint32_t bitpos; - - bitpos = (ClkType < 32) ? (ClkType) : (ClkType - 32); - - /* PCLKSEL0 selected */ - if (ClkType < 32) - { - /* Clear two bit at bit position */ - LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos))); - - /* Set two selected bit */ - LPC_SC->PCLKSEL0 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal)); - } - /* PCLKSEL1 selected */ - else - { - /* Clear two bit at bit position */ - LPC_SC->PCLKSEL1 &= ~(CLKPWR_PCLKSEL_BITMASK(bitpos)); - - /* Set two selected bit */ - LPC_SC->PCLKSEL1 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal)); - } -} - - -/*********************************************************************//** - * @brief Get current value of each Peripheral Clock Selection - * @param[in] ClkType Peripheral Clock Selection of each type, - * should be one of the following: - * - CLKPWR_PCLKSEL_WDT : WDT - - CLKPWR_PCLKSEL_TIMER0 : Timer 0 - - CLKPWR_PCLKSEL_TIMER1 : Timer 1 - - CLKPWR_PCLKSEL_UART0 : UART 0 - - CLKPWR_PCLKSEL_UART1 : UART 1 - - CLKPWR_PCLKSEL_PWM1 : PWM 1 - - CLKPWR_PCLKSEL_I2C0 : I2C 0 - - CLKPWR_PCLKSEL_SPI : SPI - - CLKPWR_PCLKSEL_SSP1 : SSP 1 - - CLKPWR_PCLKSEL_DAC : DAC - - CLKPWR_PCLKSEL_ADC : ADC - - CLKPWR_PCLKSEL_CAN1 : CAN 1 - - CLKPWR_PCLKSEL_CAN2 : CAN 2 - - CLKPWR_PCLKSEL_ACF : ACF - - CLKPWR_PCLKSEL_QEI : QEI - - CLKPWR_PCLKSEL_PCB : PCB - - CLKPWR_PCLKSEL_I2C1 : I2C 1 - - CLKPWR_PCLKSEL_SSP0 : SSP 0 - - CLKPWR_PCLKSEL_TIMER2 : Timer 2 - - CLKPWR_PCLKSEL_TIMER3 : Timer 3 - - CLKPWR_PCLKSEL_UART2 : UART 2 - - CLKPWR_PCLKSEL_UART3 : UART 3 - - CLKPWR_PCLKSEL_I2C2 : I2C 2 - - CLKPWR_PCLKSEL_I2S : I2S - - CLKPWR_PCLKSEL_RIT : RIT - - CLKPWR_PCLKSEL_SYSCON : SYSCON - - CLKPWR_PCLKSEL_MC : MC - - * @return Value of Selected Peripheral Clock Selection - **********************************************************************/ -uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType) -{ - uint32_t bitpos, retval; - - if (ClkType < 32) - { - bitpos = ClkType; - retval = LPC_SC->PCLKSEL0; - } - else - { - bitpos = ClkType - 32; - retval = LPC_SC->PCLKSEL1; - } - - retval = CLKPWR_PCLKSEL_GET(bitpos, retval); - return retval; -} - - - -/*********************************************************************//** - * @brief Get current value of each Peripheral Clock - * @param[in] ClkType Peripheral Clock Selection of each type, - * should be one of the following: - * - CLKPWR_PCLKSEL_WDT : WDT - - CLKPWR_PCLKSEL_TIMER0 : Timer 0 - - CLKPWR_PCLKSEL_TIMER1 : Timer 1 - - CLKPWR_PCLKSEL_UART0 : UART 0 - - CLKPWR_PCLKSEL_UART1 : UART 1 - - CLKPWR_PCLKSEL_PWM1 : PWM 1 - - CLKPWR_PCLKSEL_I2C0 : I2C 0 - - CLKPWR_PCLKSEL_SPI : SPI - - CLKPWR_PCLKSEL_SSP1 : SSP 1 - - CLKPWR_PCLKSEL_DAC : DAC - - CLKPWR_PCLKSEL_ADC : ADC - - CLKPWR_PCLKSEL_CAN1 : CAN 1 - - CLKPWR_PCLKSEL_CAN2 : CAN 2 - - CLKPWR_PCLKSEL_ACF : ACF - - CLKPWR_PCLKSEL_QEI : QEI - - CLKPWR_PCLKSEL_PCB : PCB - - CLKPWR_PCLKSEL_I2C1 : I2C 1 - - CLKPWR_PCLKSEL_SSP0 : SSP 0 - - CLKPWR_PCLKSEL_TIMER2 : Timer 2 - - CLKPWR_PCLKSEL_TIMER3 : Timer 3 - - CLKPWR_PCLKSEL_UART2 : UART 2 - - CLKPWR_PCLKSEL_UART3 : UART 3 - - CLKPWR_PCLKSEL_I2C2 : I2C 2 - - CLKPWR_PCLKSEL_I2S : I2S - - CLKPWR_PCLKSEL_RIT : RIT - - CLKPWR_PCLKSEL_SYSCON : SYSCON - - CLKPWR_PCLKSEL_MC : MC - - * @return Value of Selected Peripheral Clock - **********************************************************************/ -uint32_t CLKPWR_GetPCLK (uint32_t ClkType) -{ - uint32_t retval, div; - - retval = SystemCoreClock; - div = CLKPWR_GetPCLKSEL(ClkType); - - switch (div) - { - case 0: - div = 4; - break; - - case 1: - div = 1; - break; - - case 2: - div = 2; - break; - - case 3: - div = 8; - break; - } - retval /= div; - - return retval; -} - - - -/*********************************************************************//** - * @brief Configure power supply for each peripheral according to NewState - * @param[in] PPType Type of peripheral used to enable power, - * should be one of the following: - * - CLKPWR_PCONP_PCTIM0 : Timer 0 - - CLKPWR_PCONP_PCTIM1 : Timer 1 - - CLKPWR_PCONP_PCUART0 : UART 0 - - CLKPWR_PCONP_PCUART1 : UART 1 - - CLKPWR_PCONP_PCPWM1 : PWM 1 - - CLKPWR_PCONP_PCI2C0 : I2C 0 - - CLKPWR_PCONP_PCSPI : SPI - - CLKPWR_PCONP_PCRTC : RTC - - CLKPWR_PCONP_PCSSP1 : SSP 1 - - CLKPWR_PCONP_PCAD : ADC - - CLKPWR_PCONP_PCAN1 : CAN 1 - - CLKPWR_PCONP_PCAN2 : CAN 2 - - CLKPWR_PCONP_PCGPIO : GPIO - - CLKPWR_PCONP_PCRIT : RIT - - CLKPWR_PCONP_PCMC : MC - - CLKPWR_PCONP_PCQEI : QEI - - CLKPWR_PCONP_PCI2C1 : I2C 1 - - CLKPWR_PCONP_PCSSP0 : SSP 0 - - CLKPWR_PCONP_PCTIM2 : Timer 2 - - CLKPWR_PCONP_PCTIM3 : Timer 3 - - CLKPWR_PCONP_PCUART2 : UART 2 - - CLKPWR_PCONP_PCUART3 : UART 3 - - CLKPWR_PCONP_PCI2C2 : I2C 2 - - CLKPWR_PCONP_PCI2S : I2S - - CLKPWR_PCONP_PCGPDMA : GPDMA - - CLKPWR_PCONP_PCENET : Ethernet - - CLKPWR_PCONP_PCUSB : USB - * - * @param[in] NewState New state of Peripheral Power, should be: - * - ENABLE : Enable power for this peripheral - * - DISABLE : Disable power for this peripheral - * - * @return none - **********************************************************************/ -void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState) -{ - if (NewState == ENABLE) - { - LPC_SC->PCONP |= PPType & CLKPWR_PCONP_BITMASK; - } - else if (NewState == DISABLE) - { - LPC_SC->PCONP &= (~PPType) & CLKPWR_PCONP_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Enter Sleep mode with co-operated instruction by the Cortex-M3. - * @param[in] None - * @return None - **********************************************************************/ -void CLKPWR_Sleep(void) -{ - LPC_SC->PCON = 0x00; - /* Sleep Mode*/ - __WFI(); -} - - -/*********************************************************************//** - * @brief Enter Deep Sleep mode with co-operated instruction by the Cortex-M3. - * @param[in] None - * @return None - **********************************************************************/ -void CLKPWR_DeepSleep(void) -{ - /* Deep-Sleep Mode, set SLEEPDEEP bit */ - SCB->SCR = 0x4; - LPC_SC->PCON = 0x8; - /* Deep Sleep Mode*/ - __WFI(); -} - - -/*********************************************************************//** - * @brief Enter Power Down mode with co-operated instruction by the Cortex-M3. - * @param[in] None - * @return None - **********************************************************************/ -void CLKPWR_PowerDown(void) -{ - /* Deep-Sleep Mode, set SLEEPDEEP bit */ - SCB->SCR = 0x4; - LPC_SC->PCON = 0x09; - /* Power Down Mode*/ - __WFI(); -} - - -/*********************************************************************//** - * @brief Enter Deep Power Down mode with co-operated instruction by the Cortex-M3. - * @param[in] None - * @return None - **********************************************************************/ -void CLKPWR_DeepPowerDown(void) -{ - /* Deep-Sleep Mode, set SLEEPDEEP bit */ - SCB->SCR = 0x4; - LPC_SC->PCON = 0x03; - /* Deep Power Down Mode*/ - __WFI(); -} - -/** - * @} - */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_dac.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,148 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_dac.c 2010-05-21 -*//** -* @file lpc17xx_dac.c -* @brief Contains all functions support for DAC firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup DAC - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_dac.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _DAC - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup DAC_Public_Functions - * @{ - */ - -/*********************************************************************//** - * @brief Initial ADC configuration - * - Maximum current is 700 uA - * - Value to AOUT is 0 - * @param[in] DACx pointer to LPC_DAC_TypeDef, should be: LPC_DAC - * @return None - ***********************************************************************/ -void DAC_Init(LPC_DAC_TypeDef *DACx) -{ - CHECK_PARAM(PARAM_DACx(DACx)); - /* Set default clock divider for DAC */ - // CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_DAC, CLKPWR_PCLKSEL_CCLK_DIV_4); - //Set maximum current output - DAC_SetBias(LPC_DAC,DAC_MAX_CURRENT_700uA); -} - -/*********************************************************************//** - * @brief Update value to DAC - * @param[in] DACx pointer to LPC_DAC_TypeDef, should be: LPC_DAC - * @param[in] dac_value : value 10 bit to be converted to output - * @return None - ***********************************************************************/ -void DAC_UpdateValue (LPC_DAC_TypeDef *DACx,uint32_t dac_value) -{ - uint32_t tmp; - CHECK_PARAM(PARAM_DACx(DACx)); - tmp = DACx->DACR & DAC_BIAS_EN; - tmp |= DAC_VALUE(dac_value); - // Update value - DACx->DACR = tmp; -} - -/*********************************************************************//** - * @brief Set Maximum current for DAC - * @param[in] DACx pointer to LPC_DAC_TypeDef, should be: LPC_DAC - * @param[in] bias : 0 is 700 uA - * 1 350 uA - * @return None - ***********************************************************************/ -void DAC_SetBias (LPC_DAC_TypeDef *DACx,uint32_t bias) -{ - CHECK_PARAM(PARAM_DAC_CURRENT_OPT(bias)); - DACx->DACR &=~DAC_BIAS_EN; - if (bias == DAC_MAX_CURRENT_350uA) - { - DACx->DACR |= DAC_BIAS_EN; - } -} - -/*********************************************************************//** - * @brief To enable the DMA operation and control DMA timer - * @param[in] DACx pointer to LPC_DAC_TypeDef, should be: LPC_DAC - * @param[in] DAC_ConverterConfigStruct pointer to DAC_CONVERTER_CFG_Type - * - DBLBUF_ENA : enable/disable DACR double buffering feature - * - CNT_ENA : enable/disable timer out counter - * - DMA_ENA : enable/disable DMA access - * @return None - ***********************************************************************/ -void DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx,DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct) -{ - CHECK_PARAM(PARAM_DACx(DACx)); - DACx->DACCTRL &= ~DAC_DACCTRL_MASK; - if (DAC_ConverterConfigStruct->DBLBUF_ENA) - DACx->DACCTRL |= DAC_DBLBUF_ENA; - if (DAC_ConverterConfigStruct->CNT_ENA) - DACx->DACCTRL |= DAC_CNT_ENA; - if (DAC_ConverterConfigStruct->DMA_ENA) - DACx->DACCTRL |= DAC_DMA_ENA; -} - -/*********************************************************************//** - * @brief Set reload value for interrupt/DMA counter - * @param[in] DACx pointer to LPC_DAC_TypeDef, should be: LPC_DAC - * @param[in] time_out time out to reload for interrupt/DMA counter - * @return None - ***********************************************************************/ -void DAC_SetDMATimeOut(LPC_DAC_TypeDef *DACx, uint32_t time_out) -{ - CHECK_PARAM(PARAM_DACx(DACx)); - DACx->DACCNTVAL = DAC_CCNT_VALUE(time_out); -} - -/** - * @} - */ - -#endif /* _DAC */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_debug_frmwrk.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,319 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ debug_frmwrk.c 2010-05-21 -*//** -* @file debug_frmwrk.c -* @brief Contains some utilities that used for debugging through UART -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -#include "debug_frmwrk.h" -#include "lpc17xx_pinsel.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - -#ifdef _DBGFWK -/* Debug framework */ - -void (*_db_msg)(LPC_UART_TypeDef *UARTx, const void *s); -void (*_db_msg_)(LPC_UART_TypeDef *UARTx, const void *s); -void (*_db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch); -void (*_db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn); -void (*_db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn); -void (*_db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn); -void (*_db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn); -void (*_db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn); -void (*_db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn); -uint8_t (*_db_get_char)(LPC_UART_TypeDef *UARTx); - - -/*********************************************************************//** - * @brief Puts a character to UART port - * @param[in] UARTx Pointer to UART peripheral - * @param[in] ch Character to put - * @return None - **********************************************************************/ -void UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch) -{ - UART_Send(UARTx, &ch, 1, BLOCKING); -} - - -/*********************************************************************//** - * @brief Get a character to UART port - * @param[in] UARTx Pointer to UART peripheral - * @return character value that returned - **********************************************************************/ -uint8_t UARTGetChar (LPC_UART_TypeDef *UARTx) -{ - uint8_t tmp = 0; - UART_Receive(UARTx, &tmp, 1, BLOCKING); - return(tmp); -} - - -/*********************************************************************//** - * @brief Puts a string to UART port - * @param[in] UARTx Pointer to UART peripheral - * @param[in] str string to put - * @return None - **********************************************************************/ -void UARTPuts(LPC_UART_TypeDef *UARTx, const void *str) -{ - const uint8_t *s = (const uint8_t *) str; - - while (*s) - { - UARTPutChar(UARTx, *s++); - } -} - - -/*********************************************************************//** - * @brief Puts a string to UART port and print new line - * @param[in] UARTx Pointer to UART peripheral - * @param[in] str String to put - * @return None - **********************************************************************/ -void UARTPuts_(LPC_UART_TypeDef *UARTx, const void *str) -{ - UARTPuts (UARTx, str); - UARTPuts (UARTx, "\n\r"); -} - - -/*********************************************************************//** - * @brief Puts a decimal number to UART port - * @param[in] UARTx Pointer to UART peripheral - * @param[in] decnum Decimal number (8-bit long) - * @return None - **********************************************************************/ -void UARTPutDec(LPC_UART_TypeDef *UARTx, uint8_t decnum) -{ - uint8_t c1=decnum%10; - uint8_t c2=(decnum/10)%10; - uint8_t c3=(decnum/100)%10; - UARTPutChar(UARTx, '0'+c3); - UARTPutChar(UARTx, '0'+c2); - UARTPutChar(UARTx, '0'+c1); -} - -/*********************************************************************//** - * @brief Puts a decimal number to UART port - * @param[in] UARTx Pointer to UART peripheral - * @param[in] decnum Decimal number (8-bit long) - * @return None - **********************************************************************/ -void UARTPutDec16(LPC_UART_TypeDef *UARTx, uint16_t decnum) -{ - uint8_t c1=decnum%10; - uint8_t c2=(decnum/10)%10; - uint8_t c3=(decnum/100)%10; - uint8_t c4=(decnum/1000)%10; - uint8_t c5=(decnum/10000)%10; - UARTPutChar(UARTx, '0'+c5); - UARTPutChar(UARTx, '0'+c4); - UARTPutChar(UARTx, '0'+c3); - UARTPutChar(UARTx, '0'+c2); - UARTPutChar(UARTx, '0'+c1); -} - -/*********************************************************************//** - * @brief Puts a decimal number to UART port - * @param[in] UARTx Pointer to UART peripheral - * @param[in] decnum Decimal number (8-bit long) - * @return None - **********************************************************************/ -void UARTPutDec32(LPC_UART_TypeDef *UARTx, uint32_t decnum) -{ - uint8_t c1=decnum%10; - uint8_t c2=(decnum/10)%10; - uint8_t c3=(decnum/100)%10; - uint8_t c4=(decnum/1000)%10; - uint8_t c5=(decnum/10000)%10; - uint8_t c6=(decnum/100000)%10; - uint8_t c7=(decnum/1000000)%10; - uint8_t c8=(decnum/10000000)%10; - uint8_t c9=(decnum/100000000)%10; - uint8_t c10=(decnum/1000000000)%10; - UARTPutChar(UARTx, '0'+c10); - UARTPutChar(UARTx, '0'+c9); - UARTPutChar(UARTx, '0'+c8); - UARTPutChar(UARTx, '0'+c7); - UARTPutChar(UARTx, '0'+c6); - UARTPutChar(UARTx, '0'+c5); - UARTPutChar(UARTx, '0'+c4); - UARTPutChar(UARTx, '0'+c3); - UARTPutChar(UARTx, '0'+c2); - UARTPutChar(UARTx, '0'+c1); -} - -/*********************************************************************//** - * @brief Puts a hex number to UART port - * @param[in] UARTx Pointer to UART peripheral - * @param[in] hexnum Hex number (8-bit long) - * @return None - **********************************************************************/ -void UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum) -{ - uint8_t nibble, i; - - UARTPuts(UARTx, "0x"); - i = 1; - do { - nibble = (hexnum >> (4*i)) & 0x0F; - UARTPutChar(UARTx, (nibble > 9) ? ('A' + nibble - 10) : ('0' + nibble)); - } while (i--); -} - - -/*********************************************************************//** - * @brief Puts a hex number to UART port - * @param[in] UARTx Pointer to UART peripheral - * @param[in] hexnum Hex number (16-bit long) - * @return None - **********************************************************************/ -void UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum) -{ - uint8_t nibble, i; - - UARTPuts(UARTx, "0x"); - i = 3; - do { - nibble = (hexnum >> (4*i)) & 0x0F; - UARTPutChar(UARTx, (nibble > 9) ? ('A' + nibble - 10) : ('0' + nibble)); - } while (i--); -} - -/*********************************************************************//** - * @brief Puts a hex number to UART port - * @param[in] UARTx Pointer to UART peripheral - * @param[in] hexnum Hex number (32-bit long) - * @return None - **********************************************************************/ -void UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum) -{ - uint8_t nibble, i; - - UARTPuts(UARTx, "0x"); - i = 7; - do { - nibble = (hexnum >> (4*i)) & 0x0F; - UARTPutChar(UARTx, (nibble > 9) ? ('A' + nibble - 10) : ('0' + nibble)); - } while (i--); -} - -///*********************************************************************//** -// * @brief print function that supports format as same as printf() -// * function of <stdio.h> library -// * @param[in] None -// * @return None -// **********************************************************************/ -//void _printf (const char *format, ...) -//{ -// static char buffer[512 + 1]; -// va_list vArgs; -// char *tmp; -// va_start(vArgs, format); -// vsprintf((char *)buffer, (char const *)format, vArgs); -// va_end(vArgs); -// -// _DBG(buffer); -//} - -/*********************************************************************//** - * @brief Initialize Debug frame work through initializing UART port - * @param[in] None - * @return None - **********************************************************************/ -void debug_frmwrk_init(void) -{ - UART_CFG_Type UARTConfigStruct; - PINSEL_CFG_Type PinCfg; - -#if (USED_UART_DEBUG_PORT==0) - /* - * Initialize UART0 pin connect - */ - PinCfg.Funcnum = 1; - PinCfg.OpenDrain = 0; - PinCfg.Pinmode = 0; - PinCfg.Pinnum = 2; - PinCfg.Portnum = 0; - PINSEL_ConfigPin(&PinCfg); - PinCfg.Pinnum = 3; - PINSEL_ConfigPin(&PinCfg); - -#elif (USED_UART_DEBUG_PORT==1) - /* - * Initialize UART1 pin connect - */ - PinCfg.Funcnum = 1; - PinCfg.OpenDrain = 0; - PinCfg.Pinmode = 0; - PinCfg.Pinnum = 15; - PinCfg.Portnum = 0; - PINSEL_ConfigPin(&PinCfg); - PinCfg.Pinnum = 16; - PINSEL_ConfigPin(&PinCfg); -#endif - - /* Initialize UART Configuration parameter structure to default state: - * Baudrate = 9600bps - * 8 data bit - * 1 Stop bit - * None parity - */ - UART_ConfigStructInit(&UARTConfigStruct); - - // Re-configure baudrate to 115200bps - UARTConfigStruct.Baud_rate = 115200; - - // Initialize DEBUG_UART_PORT peripheral with given to corresponding parameter - UART_Init((LPC_UART_TypeDef *) DEBUG_UART_PORT, &UARTConfigStruct); - - // Enable UART Transmit - UART_TxCmd((LPC_UART_TypeDef *) DEBUG_UART_PORT, ENABLE); - - _db_msg = UARTPuts; - _db_msg_ = UARTPuts_; - _db_char = UARTPutChar; - _db_hex = UARTPutHex; - _db_hex_16 = UARTPutHex16; - _db_hex_32 = UARTPutHex32; - _db_dec = UARTPutDec; - _db_dec_16 = UARTPutDec16; - _db_dec_32 = UARTPutDec32; - _db_get_char = UARTGetChar; -} -#endif /*_DBGFWK */ - - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_emac.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,960 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_dac.c 2010-05-21 -*//** -* @file lpc17xx_dac.c -* @brief Contains all functions support for Ethernet MAC firmware -* library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup EMAC - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_emac.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _EMAC - -/* Private Variables ---------------------------------------------------------- */ -/** @defgroup EMAC_Private_Variables EMAC Private Variables - * @{ - */ - -/* MII Mgmt Configuration register - Clock divider setting */ -const uint8_t EMAC_clkdiv[] = { 4, 6, 8, 10, 14, 20, 28 }; - -/* EMAC local DMA Descriptors */ - -/** Rx Descriptor data array */ -static RX_Desc Rx_Desc[EMAC_NUM_RX_FRAG]; - -/** Rx Status data array - Must be 8-Byte aligned */ -#if defined ( __CC_ARM ) -static __align(8) RX_Stat Rx_Stat[EMAC_NUM_RX_FRAG]; -#elif defined ( __ICCARM__ ) -#pragma data_alignment=8 -static RX_Stat Rx_Stat[EMAC_NUM_RX_FRAG]; -#elif defined ( __GNUC__ ) -static __attribute__ ((aligned (8))) RX_Stat Rx_Stat[EMAC_NUM_RX_FRAG]; -#endif - -/** Tx Descriptor data array */ -static TX_Desc Tx_Desc[EMAC_NUM_TX_FRAG]; -/** Tx Status data array */ -static TX_Stat Tx_Stat[EMAC_NUM_TX_FRAG]; - -/* EMAC local DMA buffers */ -/** Rx buffer data */ -static uint32_t rx_buf[EMAC_NUM_RX_FRAG][EMAC_ETH_MAX_FLEN>>2]; -/** Tx buffer data */ -static uint32_t tx_buf[EMAC_NUM_TX_FRAG][EMAC_ETH_MAX_FLEN>>2]; - -/** - * @} - */ - -/* Private Functions ---------------------------------------------------------- */ -static void rx_descr_init (void); -static void tx_descr_init (void); -static int32_t write_PHY (uint32_t PhyReg, uint16_t Value); -static int32_t read_PHY (uint32_t PhyReg); - -static void setEmacAddr(uint8_t abStationAddr[]); -static int32_t emac_CRCCalc(uint8_t frame_no_fcs[], int32_t frame_len); - - -/*--------------------------- rx_descr_init ---------------------------------*/ -/*********************************************************************//** - * @brief Initializes RX Descriptor - * @param[in] None - * @return None - ***********************************************************************/ -static void rx_descr_init (void) -{ - /* Initialize Receive Descriptor and Status array. */ - uint32_t i; - - for (i = 0; i < EMAC_NUM_RX_FRAG; i++) { - Rx_Desc[i].Packet = (uint32_t)&rx_buf[i]; - Rx_Desc[i].Ctrl = EMAC_RCTRL_INT | (EMAC_ETH_MAX_FLEN - 1); - Rx_Stat[i].Info = 0; - Rx_Stat[i].HashCRC = 0; - } - - /* Set EMAC Receive Descriptor Registers. */ - LPC_EMAC->RxDescriptor = (uint32_t)&Rx_Desc[0]; - LPC_EMAC->RxStatus = (uint32_t)&Rx_Stat[0]; - LPC_EMAC->RxDescriptorNumber = EMAC_NUM_RX_FRAG - 1; - - /* Rx Descriptors Point to 0 */ - LPC_EMAC->RxConsumeIndex = 0; -} - - -/*--------------------------- tx_descr_init ---- ----------------------------*/ -/*********************************************************************//** - * @brief Initializes TX Descriptor - * @param[in] None - * @return None - ***********************************************************************/ -static void tx_descr_init (void) { - /* Initialize Transmit Descriptor and Status array. */ - uint32_t i; - - for (i = 0; i < EMAC_NUM_TX_FRAG; i++) { - Tx_Desc[i].Packet = (uint32_t)&tx_buf[i]; - Tx_Desc[i].Ctrl = 0; - Tx_Stat[i].Info = 0; - } - - /* Set EMAC Transmit Descriptor Registers. */ - LPC_EMAC->TxDescriptor = (uint32_t)&Tx_Desc[0]; - LPC_EMAC->TxStatus = (uint32_t)&Tx_Stat[0]; - LPC_EMAC->TxDescriptorNumber = EMAC_NUM_TX_FRAG - 1; - - /* Tx Descriptors Point to 0 */ - LPC_EMAC->TxProduceIndex = 0; -} - - -/*--------------------------- write_PHY -------------------------------------*/ -/*********************************************************************//** - * @brief Write value to PHY device - * @param[in] PhyReg: PHY Register address - * @param[in] Value: Value to write - * @return 0 - if success - * 1 - if fail - ***********************************************************************/ -static int32_t write_PHY (uint32_t PhyReg, uint16_t Value) -{ - /* Write a data 'Value' to PHY register 'PhyReg'. */ - uint32_t tout; - - LPC_EMAC->MADR = EMAC_DEF_ADR | PhyReg; - LPC_EMAC->MWTD = Value; - - /* Wait until operation completed */ - tout = 0; - for (tout = 0; tout < EMAC_MII_WR_TOUT; tout++) { - if ((LPC_EMAC->MIND & EMAC_MIND_BUSY) == 0) { - return (0); - } - } - // Time out! - return (-1); -} - - -/*--------------------------- read_PHY --------------------------------------*/ -/*********************************************************************//** - * @brief Read value from PHY device - * @param[in] PhyReg: PHY Register address - * @return 0 - if success - * 1 - if fail - ***********************************************************************/ -static int32_t read_PHY (uint32_t PhyReg) -{ - /* Read a PHY register 'PhyReg'. */ - uint32_t tout; - - LPC_EMAC->MADR = EMAC_DEF_ADR | PhyReg; - LPC_EMAC->MCMD = EMAC_MCMD_READ; - - /* Wait until operation completed */ - tout = 0; - for (tout = 0; tout < EMAC_MII_RD_TOUT; tout++) { - if ((LPC_EMAC->MIND & EMAC_MIND_BUSY) == 0) { - LPC_EMAC->MCMD = 0; - return (LPC_EMAC->MRDD); - } - } - // Time out! - return (-1); -} - -/*********************************************************************//** - * @brief Set Station MAC address for EMAC module - * @param[in] abStationAddr Pointer to Station address that contains 6-bytes - * of MAC address (should be in order from MAC Address 1 to MAC Address 6) - * @return None - **********************************************************************/ -static void setEmacAddr(uint8_t abStationAddr[]) -{ - /* Set the Ethernet MAC Address registers */ - LPC_EMAC->SA0 = ((uint32_t)abStationAddr[5] << 8) | (uint32_t)abStationAddr[4]; - LPC_EMAC->SA1 = ((uint32_t)abStationAddr[3] << 8) | (uint32_t)abStationAddr[2]; - LPC_EMAC->SA2 = ((uint32_t)abStationAddr[1] << 8) | (uint32_t)abStationAddr[0]; -} - - -/*********************************************************************//** - * @brief Calculates CRC code for number of bytes in the frame - * @param[in] frame_no_fcs Pointer to the first byte of the frame - * @param[in] frame_len length of the frame without the FCS - * @return the CRC as a 32 bit integer - **********************************************************************/ -static int32_t emac_CRCCalc(uint8_t frame_no_fcs[], int32_t frame_len) -{ - int i; // iterator - int j; // another iterator - char byte; // current byte - int crc; // CRC result - int q0, q1, q2, q3; // temporary variables - crc = 0xFFFFFFFF; - for (i = 0; i < frame_len; i++) { - byte = *frame_no_fcs++; - for (j = 0; j < 2; j++) { - if (((crc >> 28) ^ (byte >> 3)) & 0x00000001) { - q3 = 0x04C11DB7; - } else { - q3 = 0x00000000; - } - if (((crc >> 29) ^ (byte >> 2)) & 0x00000001) { - q2 = 0x09823B6E; - } else { - q2 = 0x00000000; - } - if (((crc >> 30) ^ (byte >> 1)) & 0x00000001) { - q1 = 0x130476DC; - } else { - q1 = 0x00000000; - } - if (((crc >> 31) ^ (byte >> 0)) & 0x00000001) { - q0 = 0x2608EDB8; - } else { - q0 = 0x00000000; - } - crc = (crc << 4) ^ q3 ^ q2 ^ q1 ^ q0; - byte >>= 4; - } - } - return crc; -} -/* End of Private Functions --------------------------------------------------- */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup EMAC_Public_Functions - * @{ - */ - - -/*********************************************************************//** - * @brief Initializes the EMAC peripheral according to the specified -* parameters in the EMAC_ConfigStruct. - * @param[in] EMAC_ConfigStruct Pointer to a EMAC_CFG_Type structure -* that contains the configuration information for the -* specified EMAC peripheral. - * @return None - * - * Note: This function will initialize EMAC module according to procedure below: - * - Remove the soft reset condition from the MAC - * - Configure the PHY via the MIIM interface of the MAC - * - Select RMII mode - * - Configure the transmit and receive DMA engines, including the descriptor arrays - * - Configure the host registers (MAC1,MAC2 etc.) in the MAC - * - Enable the receive and transmit data paths - * In default state after initializing, only Rx Done and Tx Done interrupt are enabled, - * all remain interrupts are disabled - * (Ref. from LPC17xx UM) - **********************************************************************/ -Status EMAC_Init(EMAC_CFG_Type *EMAC_ConfigStruct) -{ - /* Initialize the EMAC Ethernet controller. */ - int32_t regv,tout, tmp; - - /* Set up clock and power for Ethernet module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCENET, ENABLE); - - /* Reset all EMAC internal modules */ - LPC_EMAC->MAC1 = EMAC_MAC1_RES_TX | EMAC_MAC1_RES_MCS_TX | EMAC_MAC1_RES_RX | - EMAC_MAC1_RES_MCS_RX | EMAC_MAC1_SIM_RES | EMAC_MAC1_SOFT_RES; - - LPC_EMAC->Command = EMAC_CR_REG_RES | EMAC_CR_TX_RES | EMAC_CR_RX_RES | EMAC_CR_PASS_RUNT_FRM; - - /* A short delay after reset. */ - for (tout = 100; tout; tout--); - - /* Initialize MAC control registers. */ - LPC_EMAC->MAC1 = EMAC_MAC1_PASS_ALL; - LPC_EMAC->MAC2 = EMAC_MAC2_CRC_EN | EMAC_MAC2_PAD_EN; - LPC_EMAC->MAXF = EMAC_ETH_MAX_FLEN; - /* - * Find the clock that close to desired target clock - */ - tmp = SystemCoreClock / EMAC_MCFG_MII_MAXCLK; - for (tout = 0; tout < (int32_t) sizeof (EMAC_clkdiv); tout++){ - if (EMAC_clkdiv[tout] >= tmp) break; - } - tout++; - // Write to MAC configuration register and reset - LPC_EMAC->MCFG = EMAC_MCFG_CLK_SEL(tout) | EMAC_MCFG_RES_MII; - // release reset - LPC_EMAC->MCFG &= ~(EMAC_MCFG_RES_MII); - LPC_EMAC->CLRT = EMAC_CLRT_DEF; - LPC_EMAC->IPGR = EMAC_IPGR_P2_DEF; - - /* Enable Reduced MII interface. */ - LPC_EMAC->Command = EMAC_CR_RMII | EMAC_CR_PASS_RUNT_FRM; - - /* Reset Reduced MII Logic. */ - LPC_EMAC->SUPP = EMAC_SUPP_RES_RMII; - - for (tout = 100; tout; tout--); - LPC_EMAC->SUPP = 0; - - /* Put the DP83848C in reset mode */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_BMCR_RESET); - - /* Wait for hardware reset to end. */ - for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) { - regv = read_PHY (EMAC_PHY_REG_BMCR); - if (!(regv & (EMAC_PHY_BMCR_RESET | EMAC_PHY_BMCR_POWERDOWN))) { - /* Reset complete, device not Power Down. */ - break; - } - if (tout == 0){ - // Time out, return ERROR - return (ERROR); - } - } - - // Set PHY mode - if (EMAC_SetPHYMode(EMAC_ConfigStruct->Mode) < 0){ - return (ERROR); - } - - // Set EMAC address - setEmacAddr(EMAC_ConfigStruct->pbEMAC_Addr); - - /* Initialize Tx and Rx DMA Descriptors */ - rx_descr_init (); - tx_descr_init (); - - // Set Receive Filter register: enable broadcast and multicast - LPC_EMAC->RxFilterCtrl = EMAC_RFC_MCAST_EN | EMAC_RFC_BCAST_EN | EMAC_RFC_PERFECT_EN; - - /* Enable Rx Done and Tx Done interrupt for EMAC */ - LPC_EMAC->IntEnable = EMAC_INT_RX_DONE | EMAC_INT_TX_DONE; - - /* Reset all interrupts */ - LPC_EMAC->IntClear = 0xFFFF; - - /* Enable receive and transmit mode of MAC Ethernet core */ - LPC_EMAC->Command |= (EMAC_CR_RX_EN | EMAC_CR_TX_EN); - LPC_EMAC->MAC1 |= EMAC_MAC1_REC_EN; - - return SUCCESS; -} - - -/*********************************************************************//** - * @brief De-initializes the EMAC peripheral registers to their -* default reset values. - * @param[in] None - * @return None - **********************************************************************/ -void EMAC_DeInit(void) -{ - // Disable all interrupt - LPC_EMAC->IntEnable = 0x00; - // Clear all pending interrupt - LPC_EMAC->IntClear = (0xFF) | (EMAC_INT_SOFT_INT | EMAC_INT_WAKEUP); - - /* TurnOff clock and power for Ethernet module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCENET, DISABLE); -} - - -/*********************************************************************//** - * @brief Check specified PHY status in EMAC peripheral - * @param[in] ulPHYState Specified PHY Status Type, should be: - * - EMAC_PHY_STAT_LINK: Link Status - * - EMAC_PHY_STAT_SPEED: Speed Status - * - EMAC_PHY_STAT_DUP: Duplex Status - * @return Status of specified PHY status (0 or 1). - * (-1) if error. - * - * Note: - * For EMAC_PHY_STAT_LINK, return value: - * - 0: Link Down - * - 1: Link Up - * For EMAC_PHY_STAT_SPEED, return value: - * - 0: 10Mbps - * - 1: 100Mbps - * For EMAC_PHY_STAT_DUP, return value: - * - 0: Half-Duplex - * - 1: Full-Duplex - **********************************************************************/ -int32_t EMAC_CheckPHYStatus(uint32_t ulPHYState) -{ - int32_t regv, tmp; -#ifdef MCB_LPC_1768 - regv = read_PHY (EMAC_PHY_REG_STS); - switch(ulPHYState){ - case EMAC_PHY_STAT_LINK: - tmp = (regv & EMAC_PHY_SR_LINK) ? 1 : 0; - break; - case EMAC_PHY_STAT_SPEED: - tmp = (regv & EMAC_PHY_SR_SPEED) ? 0 : 1; - break; - case EMAC_PHY_STAT_DUP: - tmp = (regv & EMAC_PHY_SR_FULL_DUP) ? 1 : 0; - break; -#elif defined(IAR_LPC_1768) - /* Use IAR_LPC_1768 board: - * FSZ8721BL doesn't have Status Register - * so we read Basic Mode Status Register (0x01h) instead - */ - regv = read_PHY (EMAC_PHY_REG_BMSR); - switch(ulPHYState){ - case EMAC_PHY_STAT_LINK: - tmp = (regv & EMAC_PHY_BMSR_LINK_STATUS) ? 1 : 0; - break; - case EMAC_PHY_STAT_SPEED: - tmp = (regv & EMAC_PHY_SR_100_SPEED) ? 1 : 0; - break; - case EMAC_PHY_STAT_DUP: - tmp = (regv & EMAC_PHY_SR_FULL_DUP) ? 1 : 0; - break; -#endif - default: - tmp = -1; - break; - } - return (tmp); -} - - -/*********************************************************************//** - * @brief Set specified PHY mode in EMAC peripheral - * @param[in] ulPHYMode Specified PHY mode, should be: - * - EMAC_MODE_AUTO - * - EMAC_MODE_10M_FULL - * - EMAC_MODE_10M_HALF - * - EMAC_MODE_100M_FULL - * - EMAC_MODE_100M_HALF - * @return Return (0) if no error, otherwise return (-1) - **********************************************************************/ -int32_t EMAC_SetPHYMode(uint32_t ulPHYMode) -{ - int32_t id1, id2, tout, regv; - - /* Check if this is a DP83848C PHY. */ - id1 = read_PHY (EMAC_PHY_REG_IDR1); - id2 = read_PHY (EMAC_PHY_REG_IDR2); - -#ifdef MCB_LPC_1768 - if (((id1 << 16) | (id2 & 0xFFF0)) == EMAC_DP83848C_ID) { - switch(ulPHYMode){ - case EMAC_MODE_AUTO: - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_AUTO_NEG); -#elif defined(IAR_LPC_1768) /* Use IAR LPC1768 KickStart board */ - if (((id1 << 16) | id2) == EMAC_KSZ8721BL_ID) { - /* Configure the PHY device */ - switch(ulPHYMode){ - case EMAC_MODE_AUTO: - /* Use auto-negotiation about the link speed. */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_AUTO_NEG); -// write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_BMCR_AN); -#endif - /* Wait to complete Auto_Negotiation */ - for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) { - regv = read_PHY (EMAC_PHY_REG_BMSR); - if (regv & EMAC_PHY_BMSR_AUTO_DONE) { - /* Auto-negotiation Complete. */ - break; - } - if (tout == 0){ - // Time out, return error - return (-1); - } - } - break; - case EMAC_MODE_10M_FULL: - /* Connect at 10MBit full-duplex */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_FULLD_10M); - break; - case EMAC_MODE_10M_HALF: - /* Connect at 10MBit half-duplex */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_HALFD_10M); - break; - case EMAC_MODE_100M_FULL: - /* Connect at 100MBit full-duplex */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_FULLD_100M); - break; - case EMAC_MODE_100M_HALF: - /* Connect at 100MBit half-duplex */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_HALFD_100M); - break; - default: - // un-supported - return (-1); - } - } - // It's not correct module ID - else { - return (-1); - } - - // Update EMAC configuration with current PHY status - if (EMAC_UpdatePHYStatus() < 0){ - return (-1); - } - - // Complete - return (0); -} - - -/*********************************************************************//** - * @brief Auto-Configures value for the EMAC configuration register to - * match with current PHY mode - * @param[in] None - * @return Return (0) if no error, otherwise return (-1) - * - * Note: The EMAC configuration will be auto-configured: - * - Speed mode. - * - Half/Full duplex mode - **********************************************************************/ -int32_t EMAC_UpdatePHYStatus(void) -{ - int32_t regv, tout; - - /* Check the link status. */ -#ifdef MCB_LPC_1768 - for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) { - regv = read_PHY (EMAC_PHY_REG_STS); - if (regv & EMAC_PHY_SR_LINK) { - /* Link is on. */ - break; - } - if (tout == 0){ - // time out - return (-1); - } - } - /* Configure Full/Half Duplex mode. */ - if (regv & EMAC_PHY_SR_DUP) { - /* Full duplex is enabled. */ - LPC_EMAC->MAC2 |= EMAC_MAC2_FULL_DUP; - LPC_EMAC->Command |= EMAC_CR_FULL_DUP; - LPC_EMAC->IPGT = EMAC_IPGT_FULL_DUP; - } else { - /* Half duplex mode. */ - LPC_EMAC->IPGT = EMAC_IPGT_HALF_DUP; - } - if (regv & EMAC_PHY_SR_SPEED) { - /* 10MBit mode. */ - LPC_EMAC->SUPP = 0; - } else { - /* 100MBit mode. */ - LPC_EMAC->SUPP = EMAC_SUPP_SPEED; - } -#elif defined(IAR_LPC_1768) - for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) { - regv = read_PHY (EMAC_PHY_REG_BMSR); - if (regv & EMAC_PHY_BMSR_LINK_STATUS) { - /* Link is on. */ - break; - } - if (tout == 0){ - // time out - return (-1); - } - } - - /* Configure Full/Half Duplex mode. */ - if (regv & EMAC_PHY_SR_FULL_DUP) { - /* Full duplex is enabled. */ - LPC_EMAC->MAC2 |= EMAC_MAC2_FULL_DUP; - LPC_EMAC->Command |= EMAC_CR_FULL_DUP; - LPC_EMAC->IPGT = EMAC_IPGT_FULL_DUP; - } else { - /* Half duplex mode. */ - LPC_EMAC->IPGT = EMAC_IPGT_HALF_DUP; - } - - /* Configure 100MBit/10MBit mode. */ - if (!(regv & EMAC_PHY_SR_100_SPEED)) { - /* 10MBit mode. */ - LPC_EMAC->SUPP = 0; - } else { - /* 100MBit mode. */ - LPC_EMAC->SUPP = EMAC_SUPP_SPEED; - } -#endif - // Complete - return (0); -} - - -/*********************************************************************//** - * @brief Enable/Disable hash filter functionality for specified destination - * MAC address in EMAC module - * @param[in] dstMAC_addr Pointer to the first MAC destination address, should - * be 6-bytes length, in order LSB to the MSB - * @param[in] NewState New State of this command, should be: - * - ENABLE. - * - DISABLE. - * @return None - * - * Note: - * The standard Ethernet cyclic redundancy check (CRC) function is calculated from - * the 6 byte destination address in the Ethernet frame (this CRC is calculated - * anyway as part of calculating the CRC of the whole frame), then bits [28:23] out of - * the 32 bits CRC result are taken to form the hash. The 6 bit hash is used to access - * the hash table: it is used as an index in the 64 bit HashFilter register that has been - * programmed with accept values. If the selected accept value is 1, the frame is - * accepted. - **********************************************************************/ -void EMAC_SetHashFilter(uint8_t dstMAC_addr[], FunctionalState NewState) -{ - volatile uint32_t *pReg; - uint32_t tmp; - int32_t crc; - - // Calculate the CRC from the destination MAC address - crc = emac_CRCCalc(dstMAC_addr, 6); - // Extract the value from CRC to get index value for hash filter table - crc = (crc >> 23) & 0x3F; - - pReg = (crc > 31) ? ((volatile uint32_t *)&LPC_EMAC->HashFilterH) \ - : ((volatile uint32_t *)&LPC_EMAC->HashFilterL); - tmp = (crc > 31) ? (crc - 32) : crc; - if (NewState == ENABLE) { - (*pReg) |= (1UL << tmp); - } else { - (*pReg) &= ~(1UL << tmp); - } - // Enable Rx Filter - LPC_EMAC->Command &= ~EMAC_CR_PASS_RX_FILT; -} - -/*********************************************************************//** - * @brief Enable/Disable Filter mode for each specified type EMAC peripheral - * @param[in] ulFilterMode Filter mode, should be: - * - EMAC_RFC_UCAST_EN: all frames of unicast types - * will be accepted - * - EMAC_RFC_BCAST_EN: broadcast frame will be - * accepted - * - EMAC_RFC_MCAST_EN: all frames of multicast - * types will be accepted - * - EMAC_RFC_UCAST_HASH_EN: The imperfect hash - * filter will be applied to unicast addresses - * - EMAC_RFC_MCAST_HASH_EN: The imperfect hash - * filter will be applied to multicast addresses - * - EMAC_RFC_PERFECT_EN: the destination address - * will be compared with the 6 byte station address - * programmed in the station address by the filter - * - EMAC_RFC_MAGP_WOL_EN: the result of the magic - * packet filter will generate a WoL interrupt when - * there is a match - * - EMAC_RFC_PFILT_WOL_EN: the result of the perfect address - * matching filter and the imperfect hash filter will - * generate a WoL interrupt when there is a match - * @param[in] NewState New State of this command, should be: - * - ENABLE - * - DISABLE - * @return None - **********************************************************************/ -void EMAC_SetFilterMode(uint32_t ulFilterMode, FunctionalState NewState) -{ - if (NewState == ENABLE){ - LPC_EMAC->RxFilterCtrl |= ulFilterMode; - } else { - LPC_EMAC->RxFilterCtrl &= ~ulFilterMode; - } -} - -/*********************************************************************//** - * @brief Get status of Wake On LAN Filter for each specified - * type in EMAC peripheral, clear this status if it is set - * @param[in] ulWoLMode WoL Filter mode, should be: - * - EMAC_WOL_UCAST: unicast frames caused WoL - * - EMAC_WOL_UCAST: broadcast frame caused WoL - * - EMAC_WOL_MCAST: multicast frame caused WoL - * - EMAC_WOL_UCAST_HASH: unicast frame that passes the - * imperfect hash filter caused WoL - * - EMAC_WOL_MCAST_HASH: multicast frame that passes the - * imperfect hash filter caused WoL - * - EMAC_WOL_PERFECT:perfect address matching filter - * caused WoL - * - EMAC_WOL_RX_FILTER: the receive filter caused WoL - * - EMAC_WOL_MAG_PACKET: the magic packet filter caused WoL - * @return SET/RESET - **********************************************************************/ -FlagStatus EMAC_GetWoLStatus(uint32_t ulWoLMode) -{ - if (LPC_EMAC->RxFilterWoLStatus & ulWoLMode) { - LPC_EMAC->RxFilterWoLClear = ulWoLMode; - return SET; - } else { - return RESET; - } -} - - -/*********************************************************************//** - * @brief Write data to Tx packet data buffer at current index due to - * TxProduceIndex - * @param[in] pDataStruct Pointer to a EMAC_PACKETBUF_Type structure - * data that contain specified information about - * Packet data buffer. - * @return None - **********************************************************************/ -void EMAC_WritePacketBuffer(EMAC_PACKETBUF_Type *pDataStruct) -{ - uint32_t idx,len; - uint32_t *sp,*dp; - - idx = LPC_EMAC->TxProduceIndex; - sp = (uint32_t *)pDataStruct->pbDataBuf; - dp = (uint32_t *)Tx_Desc[idx].Packet; - /* Copy frame data to EMAC packet buffers. */ - for (len = (pDataStruct->ulDataLen + 3) >> 2; len; len--) { - *dp++ = *sp++; - } - Tx_Desc[idx].Ctrl = (pDataStruct->ulDataLen - 1) | (EMAC_TCTRL_INT | EMAC_TCTRL_LAST); -} - -/*********************************************************************//** - * @brief Read data from Rx packet data buffer at current index due - * to RxConsumeIndex - * @param[in] pDataStruct Pointer to a EMAC_PACKETBUF_Type structure - * data that contain specified information about - * Packet data buffer. - * @return None - **********************************************************************/ -void EMAC_ReadPacketBuffer(EMAC_PACKETBUF_Type *pDataStruct) -{ - uint32_t idx, len; - uint32_t *dp, *sp; - - idx = LPC_EMAC->RxConsumeIndex; - dp = (uint32_t *)pDataStruct->pbDataBuf; - sp = (uint32_t *)Rx_Desc[idx].Packet; - - if (pDataStruct->pbDataBuf != NULL) { - for (len = (pDataStruct->ulDataLen + 3) >> 2; len; len--) { - *dp++ = *sp++; - } - } -} - -/*********************************************************************//** - * @brief Enable/Disable interrupt for each type in EMAC - * @param[in] ulIntType Interrupt Type, should be: - * - EMAC_INT_RX_OVERRUN: Receive Overrun - * - EMAC_INT_RX_ERR: Receive Error - * - EMAC_INT_RX_FIN: Receive Descriptor Finish - * - EMAC_INT_RX_DONE: Receive Done - * - EMAC_INT_TX_UNDERRUN: Transmit Under-run - * - EMAC_INT_TX_ERR: Transmit Error - * - EMAC_INT_TX_FIN: Transmit descriptor finish - * - EMAC_INT_TX_DONE: Transmit Done - * - EMAC_INT_SOFT_INT: Software interrupt - * - EMAC_INT_WAKEUP: Wakeup interrupt - * @param[in] NewState New State of this function, should be: - * - ENABLE. - * - DISABLE. - * @return None - **********************************************************************/ -void EMAC_IntCmd(uint32_t ulIntType, FunctionalState NewState) -{ - if (NewState == ENABLE) { - LPC_EMAC->IntEnable |= ulIntType; - } else { - LPC_EMAC->IntEnable &= ~(ulIntType); - } -} - -/*********************************************************************//** - * @brief Check whether if specified interrupt flag is set or not - * for each interrupt type in EMAC and clear interrupt pending - * if it is set. - * @param[in] ulIntType Interrupt Type, should be: - * - EMAC_INT_RX_OVERRUN: Receive Overrun - * - EMAC_INT_RX_ERR: Receive Error - * - EMAC_INT_RX_FIN: Receive Descriptor Finish - * - EMAC_INT_RX_DONE: Receive Done - * - EMAC_INT_TX_UNDERRUN: Transmit Under-run - * - EMAC_INT_TX_ERR: Transmit Error - * - EMAC_INT_TX_FIN: Transmit descriptor finish - * - EMAC_INT_TX_DONE: Transmit Done - * - EMAC_INT_SOFT_INT: Software interrupt - * - EMAC_INT_WAKEUP: Wakeup interrupt - * @return New state of specified interrupt (SET or RESET) - **********************************************************************/ -IntStatus EMAC_IntGetStatus(uint32_t ulIntType) -{ - if (LPC_EMAC->IntStatus & ulIntType) { - LPC_EMAC->IntClear = ulIntType; - return SET; - } else { - return RESET; - } -} - - -/*********************************************************************//** - * @brief Check whether if the current RxConsumeIndex is not equal to the - * current RxProduceIndex. - * @param[in] None - * @return TRUE if they're not equal, otherwise return FALSE - * - * Note: In case the RxConsumeIndex is not equal to the RxProduceIndex, - * it means there're available data has been received. They should be read - * out and released the Receive Data Buffer by updating the RxConsumeIndex value. - **********************************************************************/ -Bool EMAC_CheckReceiveIndex(void) -{ - if (LPC_EMAC->RxConsumeIndex != LPC_EMAC->RxProduceIndex) { - return TRUE; - } else { - return FALSE; - } -} - - -/*********************************************************************//** - * @brief Check whether if the current TxProduceIndex is not equal to the - * current RxProduceIndex - 1. - * @param[in] None - * @return TRUE if they're not equal, otherwise return FALSE - * - * Note: In case the RxConsumeIndex is equal to the RxProduceIndex - 1, - * it means the transmit buffer is available and data can be written to transmit - * buffer to be sent. - **********************************************************************/ -Bool EMAC_CheckTransmitIndex(void) -{ - uint32_t tmp = LPC_EMAC->TxConsumeIndex -1; - if (LPC_EMAC->TxProduceIndex == tmp) { - return FALSE; - } else { - return TRUE; - } -} - - -/*********************************************************************//** - * @brief Get current status value of receive data (due to RxConsumeIndex) - * @param[in] ulRxStatType Received Status type, should be one of following: - * - EMAC_RINFO_CTRL_FRAME: Control Frame - * - EMAC_RINFO_VLAN: VLAN Frame - * - EMAC_RINFO_FAIL_FILT: RX Filter Failed - * - EMAC_RINFO_MCAST: Multicast Frame - * - EMAC_RINFO_BCAST: Broadcast Frame - * - EMAC_RINFO_CRC_ERR: CRC Error in Frame - * - EMAC_RINFO_SYM_ERR: Symbol Error from PHY - * - EMAC_RINFO_LEN_ERR: Length Error - * - EMAC_RINFO_RANGE_ERR: Range error(exceeded max size) - * - EMAC_RINFO_ALIGN_ERR: Alignment error - * - EMAC_RINFO_OVERRUN: Receive overrun - * - EMAC_RINFO_NO_DESCR: No new Descriptor available - * - EMAC_RINFO_LAST_FLAG: last Fragment in Frame - * - EMAC_RINFO_ERR: Error Occurred (OR of all error) - * @return Current value of receive data (due to RxConsumeIndex) - **********************************************************************/ -FlagStatus EMAC_CheckReceiveDataStatus(uint32_t ulRxStatType) -{ - uint32_t idx; - idx = LPC_EMAC->RxConsumeIndex; - return (((Rx_Stat[idx].Info) & ulRxStatType) ? SET : RESET); -} - - -/*********************************************************************//** - * @brief Get size of current Received data in received buffer (due to - * RxConsumeIndex) - * @param[in] None - * @return Size of received data - **********************************************************************/ -uint32_t EMAC_GetReceiveDataSize(void) -{ - uint32_t idx; - idx =LPC_EMAC->RxConsumeIndex; - return ((Rx_Stat[idx].Info) & EMAC_RINFO_SIZE); -} - -/*********************************************************************//** - * @brief Increase the RxConsumeIndex (after reading the Receive buffer - * to release the Receive buffer) and wrap-around the index if - * it reaches the maximum Receive Number - * @param[in] None - * @return None - **********************************************************************/ -void EMAC_UpdateRxConsumeIndex(void) -{ - // Get current Rx consume index - uint32_t idx = LPC_EMAC->RxConsumeIndex; - - /* Release frame from EMAC buffer */ - if (++idx == EMAC_NUM_RX_FRAG) idx = 0; - LPC_EMAC->RxConsumeIndex = idx; -} - -/*********************************************************************//** - * @brief Increase the TxProduceIndex (after writting to the Transmit buffer - * to enable the Transmit buffer) and wrap-around the index if - * it reaches the maximum Transmit Number - * @param[in] None - * @return None - **********************************************************************/ -void EMAC_UpdateTxProduceIndex(void) -{ - // Get current Tx produce index - uint32_t idx = LPC_EMAC->TxProduceIndex; - - /* Start frame transmission */ - if (++idx == EMAC_NUM_TX_FRAG) idx = 0; - LPC_EMAC->TxProduceIndex = idx; -} - - -/** - * @} - */ - -#endif /* _EMAC */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_exti.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,168 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_exti.c 2010-06-18 -*//** -* @file lpc17xx_exti.c -* @brief Contains all functions support for External interrupt firmware -* library on LPC17xx -* @version 3.0 -* @date 18. June. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup EXTI - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_exti.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _EXTI - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup EXTI_Public_Functions - * @{ - */ - -/*********************************************************************//** - * @brief Initial for EXT - * - Set EXTINT, EXTMODE, EXTPOLAR registers to default value - * @param[in] None - * @return None - **********************************************************************/ -void EXTI_Init(void) -{ - LPC_SC->EXTINT = 0xF; - LPC_SC->EXTMODE = 0x0; - LPC_SC->EXTPOLAR = 0x0; -} - - -/*********************************************************************//** -* @brief Close EXT -* @param[in] None -* @return None -**********************************************************************/ -void EXTI_DeInit(void) -{ - ; -} - -/*********************************************************************//** - * @brief Configuration for EXT - * - Set EXTINT, EXTMODE, EXTPOLAR register - * @param[in] EXTICfg Pointer to a EXTI_InitTypeDef structure - * that contains the configuration information for the - * specified external interrupt - * @return None - **********************************************************************/ -void EXTI_Config(EXTI_InitTypeDef *EXTICfg) -{ - LPC_SC->EXTINT = 0x0; - EXTI_SetMode(EXTICfg->EXTI_Line, EXTICfg->EXTI_Mode); - EXTI_SetPolarity(EXTICfg->EXTI_Line, EXTICfg->EXTI_polarity); -} - -/*********************************************************************//** -* @brief Set mode for EXTI pin -* @param[in] EXTILine external interrupt line, should be: -* - EXTI_EINT0: external interrupt line 0 -* - EXTI_EINT1: external interrupt line 1 -* - EXTI_EINT2: external interrupt line 2 -* - EXTI_EINT3: external interrupt line 3 -* @param[in] mode external mode, should be: -* - EXTI_MODE_LEVEL_SENSITIVE -* - EXTI_MODE_EDGE_SENSITIVE -* @return None -*********************************************************************/ -void EXTI_SetMode(EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode) -{ - if(mode == EXTI_MODE_EDGE_SENSITIVE) - { - LPC_SC->EXTMODE |= (1 << EXTILine); - } - else if(mode == EXTI_MODE_LEVEL_SENSITIVE) - { - LPC_SC->EXTMODE &= ~(1 << EXTILine); - } -} - -/*********************************************************************//** -* @brief Set polarity for EXTI pin -* @param[in] EXTILine external interrupt line, should be: -* - EXTI_EINT0: external interrupt line 0 -* - EXTI_EINT1: external interrupt line 1 -* - EXTI_EINT2: external interrupt line 2 -* - EXTI_EINT3: external interrupt line 3 -* @param[in] polarity external polarity value, should be: -* - EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE -* - EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE -* @return None -*********************************************************************/ -void EXTI_SetPolarity(EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity) -{ - if(polarity == EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE) - { - LPC_SC->EXTPOLAR |= (1 << EXTILine); - } - else if(polarity == EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE) - { - LPC_SC->EXTPOLAR &= ~(1 << EXTILine); - } -} - -/*********************************************************************//** -* @brief Clear External interrupt flag -* @param[in] EXTILine external interrupt line, should be: -* - EXTI_EINT0: external interrupt line 0 -* - EXTI_EINT1: external interrupt line 1 -* - EXTI_EINT2: external interrupt line 2 -* - EXTI_EINT3: external interrupt line 3 -* @return None -*********************************************************************/ -void EXTI_ClearEXTIFlag(EXTI_LINE_ENUM EXTILine) -{ - LPC_SC->EXTINT |= (1 << EXTILine); -} - -/** - * @} - */ - -#endif /* _EXTI */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ - -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_gpdma.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,460 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_gpdma.c 2010-03-21 -*//** -* @file lpc17xx_gpdma.c -* @brief Contains all functions support for GPDMA firmware -* library on LPC17xx -* @version 2.1 -* @date 25. July. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup GPDMA - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_gpdma.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - -#ifdef _GPDMA - - -/* Private Variables ---------------------------------------------------------- */ -/** @defgroup GPDMA_Private_Variables GPDMA Private Variables - * @{ - */ - -/** - * @brief Lookup Table of Connection Type matched with - * Peripheral Data (FIFO) register base address - */ -#ifdef __IAR_SYSTEMS_ICC__ -volatile const void *GPDMA_LUTPerAddr[] = { - (&LPC_SSP0->DR), // SSP0 Tx - (&LPC_SSP0->DR), // SSP0 Rx - (&LPC_SSP1->DR), // SSP1 Tx - (&LPC_SSP1->DR), // SSP1 Rx - (&LPC_ADC->ADGDR), // ADC - (&LPC_I2S->I2STXFIFO), // I2S Tx - (&LPC_I2S->I2SRXFIFO), // I2S Rx - (&LPC_DAC->DACR), // DAC - (&LPC_UART0->/*RBTHDLR.*/THR), // UART0 Tx - (&LPC_UART0->/*RBTHDLR.*/RBR), // UART0 Rx - (&LPC_UART1->/*RBTHDLR.*/THR), // UART1 Tx - (&LPC_UART1->/*RBTHDLR.*/RBR), // UART1 Rx - (&LPC_UART2->/*RBTHDLR.*/THR), // UART2 Tx - (&LPC_UART2->/*RBTHDLR.*/RBR), // UART2 Rx - (&LPC_UART3->/*RBTHDLR.*/THR), // UART3 Tx - (&LPC_UART3->/*RBTHDLR.*/RBR), // UART3 Rx - (&LPC_TIM0->MR0), // MAT0.0 - (&LPC_TIM0->MR1), // MAT0.1 - (&LPC_TIM1->MR0), // MAT1.0 - (&LPC_TIM1->MR1), // MAT1.1 - (&LPC_TIM2->MR0), // MAT2.0 - (&LPC_TIM2->MR1), // MAT2.1 - (&LPC_TIM3->MR0), // MAT3.0 - (&LPC_TIM3->MR1) // MAT3.1 -}; -#else -const uint32_t GPDMA_LUTPerAddr[] = { - ((uint32_t)&LPC_SSP0->DR), // SSP0 Tx - ((uint32_t)&LPC_SSP0->DR), // SSP0 Rx - ((uint32_t)&LPC_SSP1->DR), // SSP1 Tx - ((uint32_t)&LPC_SSP1->DR), // SSP1 Rx - ((uint32_t)&LPC_ADC->ADGDR), // ADC - ((uint32_t)&LPC_I2S->I2STXFIFO), // I2S Tx - ((uint32_t)&LPC_I2S->I2SRXFIFO), // I2S Rx - ((uint32_t)&LPC_DAC->DACR), // DAC - ((uint32_t)&LPC_UART0->/*RBTHDLR.*/THR), // UART0 Tx - ((uint32_t)&LPC_UART0->/*RBTHDLR.*/RBR), // UART0 Rx - ((uint32_t)&LPC_UART1->/*RBTHDLR.*/THR), // UART1 Tx - ((uint32_t)&LPC_UART1->/*RBTHDLR.*/RBR), // UART1 Rx - ((uint32_t)&LPC_UART2->/*RBTHDLR.*/THR), // UART2 Tx - ((uint32_t)&LPC_UART2->/*RBTHDLR.*/RBR), // UART2 Rx - ((uint32_t)&LPC_UART3->/*RBTHDLR.*/THR), // UART3 Tx - ((uint32_t)&LPC_UART3->/*RBTHDLR.*/RBR), // UART3 Rx - ((uint32_t)&LPC_TIM0->MR0), // MAT0.0 - ((uint32_t)&LPC_TIM0->MR1), // MAT0.1 - ((uint32_t)&LPC_TIM1->MR0), // MAT1.0 - ((uint32_t)&LPC_TIM1->MR1), // MAT1.1 - ((uint32_t)&LPC_TIM2->MR0), // MAT2.0 - ((uint32_t)&LPC_TIM2->MR1), // MAT2.1 - ((uint32_t)&LPC_TIM3->MR0), // MAT3.0 - ((uint32_t)&LPC_TIM3->MR1) // MAT3.1 -}; -#endif -/** - * @brief Lookup Table of GPDMA Channel Number matched with - * GPDMA channel pointer - */ -const LPC_GPDMACH_TypeDef *pGPDMACh[8] = { - LPC_GPDMACH0, // GPDMA Channel 0 - LPC_GPDMACH1, // GPDMA Channel 1 - LPC_GPDMACH2, // GPDMA Channel 2 - LPC_GPDMACH3, // GPDMA Channel 3 - LPC_GPDMACH4, // GPDMA Channel 4 - LPC_GPDMACH5, // GPDMA Channel 5 - LPC_GPDMACH6, // GPDMA Channel 6 - LPC_GPDMACH7 // GPDMA Channel 7 -}; -/** - * @brief Optimized Peripheral Source and Destination burst size - */ -const uint8_t GPDMA_LUTPerBurst[] = { - GPDMA_BSIZE_4, // SSP0 Tx - GPDMA_BSIZE_4, // SSP0 Rx - GPDMA_BSIZE_4, // SSP1 Tx - GPDMA_BSIZE_4, // SSP1 Rx - GPDMA_BSIZE_4, // ADC - GPDMA_BSIZE_32, // I2S channel 0 - GPDMA_BSIZE_32, // I2S channel 1 - GPDMA_BSIZE_1, // DAC - GPDMA_BSIZE_1, // UART0 Tx - GPDMA_BSIZE_1, // UART0 Rx - GPDMA_BSIZE_1, // UART1 Tx - GPDMA_BSIZE_1, // UART1 Rx - GPDMA_BSIZE_1, // UART2 Tx - GPDMA_BSIZE_1, // UART2 Rx - GPDMA_BSIZE_1, // UART3 Tx - GPDMA_BSIZE_1, // UART3 Rx - GPDMA_BSIZE_1, // MAT0.0 - GPDMA_BSIZE_1, // MAT0.1 - GPDMA_BSIZE_1, // MAT1.0 - GPDMA_BSIZE_1, // MAT1.1 - GPDMA_BSIZE_1, // MAT2.0 - GPDMA_BSIZE_1, // MAT2.1 - GPDMA_BSIZE_1, // MAT3.0 - GPDMA_BSIZE_1 // MAT3.1 -}; -/** - * @brief Optimized Peripheral Source and Destination transfer width - */ -const uint8_t GPDMA_LUTPerWid[] = { - GPDMA_WIDTH_BYTE, // SSP0 Tx - GPDMA_WIDTH_BYTE, // SSP0 Rx - GPDMA_WIDTH_BYTE, // SSP1 Tx - GPDMA_WIDTH_BYTE, // SSP1 Rx - GPDMA_WIDTH_WORD, // ADC - GPDMA_WIDTH_WORD, // I2S channel 0 - GPDMA_WIDTH_WORD, // I2S channel 1 - GPDMA_WIDTH_BYTE, // DAC - GPDMA_WIDTH_BYTE, // UART0 Tx - GPDMA_WIDTH_BYTE, // UART0 Rx - GPDMA_WIDTH_BYTE, // UART1 Tx - GPDMA_WIDTH_BYTE, // UART1 Rx - GPDMA_WIDTH_BYTE, // UART2 Tx - GPDMA_WIDTH_BYTE, // UART2 Rx - GPDMA_WIDTH_BYTE, // UART3 Tx - GPDMA_WIDTH_BYTE, // UART3 Rx - GPDMA_WIDTH_WORD, // MAT0.0 - GPDMA_WIDTH_WORD, // MAT0.1 - GPDMA_WIDTH_WORD, // MAT1.0 - GPDMA_WIDTH_WORD, // MAT1.1 - GPDMA_WIDTH_WORD, // MAT2.0 - GPDMA_WIDTH_WORD, // MAT2.1 - GPDMA_WIDTH_WORD, // MAT3.0 - GPDMA_WIDTH_WORD // MAT3.1 -}; - -/** - * @} - */ - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup GPDMA_Public_Functions - * @{ - */ - -/********************************************************************//** - * @brief Initialize GPDMA controller - * @param None - * @return None - *********************************************************************/ -void GPDMA_Init(void) -{ - /* Enable GPDMA clock */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCGPDMA, ENABLE); - - // Reset all channel configuration register - LPC_GPDMACH0->DMACCConfig = 0; - LPC_GPDMACH1->DMACCConfig = 0; - LPC_GPDMACH2->DMACCConfig = 0; - LPC_GPDMACH3->DMACCConfig = 0; - LPC_GPDMACH4->DMACCConfig = 0; - LPC_GPDMACH5->DMACCConfig = 0; - LPC_GPDMACH6->DMACCConfig = 0; - LPC_GPDMACH7->DMACCConfig = 0; - - /* Clear all DMA interrupt and error flag */ - LPC_GPDMA->DMACIntTCClear = 0xFF; - LPC_GPDMA->DMACIntErrClr = 0xFF; -} - -/********************************************************************//** - * @brief Setup GPDMA channel peripheral according to the specified - * parameters in the GPDMAChannelConfig. - * @param[in] GPDMAChannelConfig Pointer to a GPDMA_CH_CFG_Type - * structure that contains the configuration - * information for the specified GPDMA channel peripheral. - * @return ERROR if selected channel is enabled before - * or SUCCESS if channel is configured successfully - *********************************************************************/ -Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig) -{ - LPC_GPDMACH_TypeDef *pDMAch; - uint32_t tmp1, tmp2; - - if (LPC_GPDMA->DMACEnbldChns & (GPDMA_DMACEnbldChns_Ch(GPDMAChannelConfig->ChannelNum))) { - // This channel is enabled, return ERROR, need to release this channel first - return ERROR; - } - - // Get Channel pointer - pDMAch = (LPC_GPDMACH_TypeDef *) pGPDMACh[GPDMAChannelConfig->ChannelNum]; - - // Reset the Interrupt status - LPC_GPDMA->DMACIntTCClear = GPDMA_DMACIntTCClear_Ch(GPDMAChannelConfig->ChannelNum); - LPC_GPDMA->DMACIntErrClr = GPDMA_DMACIntErrClr_Ch(GPDMAChannelConfig->ChannelNum); - - // Clear DMA configure - pDMAch->DMACCControl = 0x00; - pDMAch->DMACCConfig = 0x00; - - /* Assign Linker List Item value */ - pDMAch->DMACCLLI = GPDMAChannelConfig->DMALLI; - - /* Set value to Channel Control Registers */ - switch (GPDMAChannelConfig->TransferType) - { - // Memory to memory - case GPDMA_TRANSFERTYPE_M2M: - // Assign physical source and destination address - pDMAch->DMACCSrcAddr = GPDMAChannelConfig->SrcMemAddr; - pDMAch->DMACCDestAddr = GPDMAChannelConfig->DstMemAddr; - pDMAch->DMACCControl - = GPDMA_DMACCxControl_TransferSize(GPDMAChannelConfig->TransferSize) \ - | GPDMA_DMACCxControl_SBSize(GPDMA_BSIZE_32) \ - | GPDMA_DMACCxControl_DBSize(GPDMA_BSIZE_32) \ - | GPDMA_DMACCxControl_SWidth(GPDMAChannelConfig->TransferWidth) \ - | GPDMA_DMACCxControl_DWidth(GPDMAChannelConfig->TransferWidth) \ - | GPDMA_DMACCxControl_SI \ - | GPDMA_DMACCxControl_DI \ - | GPDMA_DMACCxControl_I; - break; - // Memory to peripheral - case GPDMA_TRANSFERTYPE_M2P: - // Assign physical source - pDMAch->DMACCSrcAddr = GPDMAChannelConfig->SrcMemAddr; - // Assign peripheral destination address - pDMAch->DMACCDestAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->DstConn]; - pDMAch->DMACCControl - = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \ - | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \ - | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \ - | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \ - | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \ - | GPDMA_DMACCxControl_SI \ - | GPDMA_DMACCxControl_I; - break; - // Peripheral to memory - case GPDMA_TRANSFERTYPE_P2M: - // Assign peripheral source address - pDMAch->DMACCSrcAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->SrcConn]; - // Assign memory destination address - pDMAch->DMACCDestAddr = GPDMAChannelConfig->DstMemAddr; - pDMAch->DMACCControl - = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \ - | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \ - | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \ - | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \ - | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \ - | GPDMA_DMACCxControl_DI \ - | GPDMA_DMACCxControl_I; - break; - // Peripheral to peripheral - case GPDMA_TRANSFERTYPE_P2P: - // Assign peripheral source address - pDMAch->DMACCSrcAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->SrcConn]; - // Assign peripheral destination address - pDMAch->DMACCDestAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->DstConn]; - pDMAch->DMACCControl - = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \ - | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \ - | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \ - | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \ - | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \ - | GPDMA_DMACCxControl_I; - break; - // Do not support any more transfer type, return ERROR - default: - return ERROR; - } - - /* Re-Configure DMA Request Select for source peripheral */ - if (GPDMAChannelConfig->SrcConn > 15) - { - LPC_SC->DMAREQSEL |= (1<<(GPDMAChannelConfig->SrcConn - 16)); - } else { - LPC_SC->DMAREQSEL &= ~(1<<(GPDMAChannelConfig->SrcConn - 8)); - } - - /* Re-Configure DMA Request Select for Destination peripheral */ - if (GPDMAChannelConfig->DstConn > 15) - { - LPC_SC->DMAREQSEL |= (1<<(GPDMAChannelConfig->DstConn - 16)); - } else { - LPC_SC->DMAREQSEL &= ~(1<<(GPDMAChannelConfig->DstConn - 8)); - } - - /* Enable DMA channels, little endian */ - LPC_GPDMA->DMACConfig = GPDMA_DMACConfig_E; - while (!(LPC_GPDMA->DMACConfig & GPDMA_DMACConfig_E)); - - // Calculate absolute value for Connection number - tmp1 = GPDMAChannelConfig->SrcConn; - tmp1 = ((tmp1 > 15) ? (tmp1 - 8) : tmp1); - tmp2 = GPDMAChannelConfig->DstConn; - tmp2 = ((tmp2 > 15) ? (tmp2 - 8) : tmp2); - - // Configure DMA Channel, enable Error Counter and Terminate counter - pDMAch->DMACCConfig = GPDMA_DMACCxConfig_IE | GPDMA_DMACCxConfig_ITC /*| GPDMA_DMACCxConfig_E*/ \ - | GPDMA_DMACCxConfig_TransferType((uint32_t)GPDMAChannelConfig->TransferType) \ - | GPDMA_DMACCxConfig_SrcPeripheral(tmp1) \ - | GPDMA_DMACCxConfig_DestPeripheral(tmp2); - - return SUCCESS; -} - - -/*********************************************************************//** - * @brief Enable/Disable DMA channel - * @param[in] channelNum GPDMA channel, should be in range from 0 to 7 - * @param[in] NewState New State of this command, should be: - * - ENABLE. - * - DISABLE. - * @return None - **********************************************************************/ -void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState) -{ - LPC_GPDMACH_TypeDef *pDMAch; - - // Get Channel pointer - pDMAch = (const LPC_GPDMACH_TypeDef *) pGPDMACh[channelNum]; - - if (NewState == ENABLE) { - pDMAch->DMACCConfig |= GPDMA_DMACCxConfig_E; - } else { - pDMAch->DMACCConfig &= ~GPDMA_DMACCxConfig_E; - } -} -/*********************************************************************//** - * @brief Check if corresponding channel does have an active interrupt - * request or not - * @param[in] type type of status, should be: - * - GPDMA_STAT_INT: GPDMA Interrupt Status - * - GPDMA_STAT_INTTC: GPDMA Interrupt Terminal Count Request Status - * - GPDMA_STAT_INTERR: GPDMA Interrupt Error Status - * - GPDMA_STAT_RAWINTTC: GPDMA Raw Interrupt Terminal Count Status - * - GPDMA_STAT_RAWINTERR: GPDMA Raw Error Interrupt Status - * - GPDMA_STAT_ENABLED_CH:GPDMA Enabled Channel Status - * @param[in] channel GPDMA channel, should be in range from 0 to 7 - * @return IntStatus status of DMA channel interrupt after masking - * Should be: - * - SET: the corresponding channel has no active interrupt request - * - RESET: the corresponding channel does have an active interrupt request - **********************************************************************/ -IntStatus GPDMA_IntGetStatus(GPDMA_Status_Type type, uint8_t channel) -{ - CHECK_PARAM(PARAM_GPDMA_STAT(type)); - CHECK_PARAM(PARAM_GPDMA_CHANNEL(channel)); - - switch (type) - { - case GPDMA_STAT_INT: //check status of DMA channel interrupts - if (LPC_GPDMA->DMACIntStat & (GPDMA_DMACIntStat_Ch(channel))) - return SET; - return RESET; - case GPDMA_STAT_INTTC: // check terminal count interrupt request status for DMA - if (LPC_GPDMA->DMACIntTCStat & GPDMA_DMACIntTCStat_Ch(channel)) - return SET; - return RESET; - case GPDMA_STAT_INTERR: //check interrupt status for DMA channels - if (LPC_GPDMA->DMACIntErrStat & GPDMA_DMACIntTCClear_Ch(channel)) - return SET; - return RESET; - case GPDMA_STAT_RAWINTTC: //check status of the terminal count interrupt for DMA channels - if (LPC_GPDMA->DMACRawIntErrStat & GPDMA_DMACRawIntTCStat_Ch(channel)) - return SET; - return RESET; - case GPDMA_STAT_RAWINTERR: //check status of the error interrupt for DMA channels - if (LPC_GPDMA->DMACRawIntTCStat & GPDMA_DMACRawIntErrStat_Ch(channel)) - return SET; - return RESET; - default: //check enable status for DMA channels - if (LPC_GPDMA->DMACEnbldChns & GPDMA_DMACEnbldChns_Ch(channel)) - return SET; - return RESET; - } -} - -/*********************************************************************//** - * @brief Clear one or more interrupt requests on DMA channels - * @param[in] type type of interrupt request, should be: - * - GPDMA_STATCLR_INTTC: GPDMA Interrupt Terminal Count Request Clear - * - GPDMA_STATCLR_INTERR: GPDMA Interrupt Error Clear - * @param[in] channel GPDMA channel, should be in range from 0 to 7 - * @return None - **********************************************************************/ -void GPDMA_ClearIntPending(GPDMA_StateClear_Type type, uint8_t channel) -{ - CHECK_PARAM(PARAM_GPDMA_STATCLR(type)); - CHECK_PARAM(PARAM_GPDMA_CHANNEL(channel)); - - if (type == GPDMA_STATCLR_INTTC) // clears the terminal count interrupt request on DMA channel - LPC_GPDMA->DMACIntTCClear = GPDMA_DMACIntTCClear_Ch(channel); - else // clear the error interrupt request - LPC_GPDMA->DMACIntErrClr = GPDMA_DMACIntErrClr_Ch(channel); -} - -/** - * @} - */ - -#endif /* _GPDMA */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ - -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_gpio.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,759 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_gpio.c 2010-05-21 -*//** -* @file lpc17xx_gpio.c -* @brief Contains all functions support for GPIO firmware -* library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup GPIO - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_gpio.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _GPIO - -/* Private Functions ---------------------------------------------------------- */ - -static LPC_GPIO_TypeDef *GPIO_GetPointer(uint8_t portNum); -static GPIO_HalfWord_TypeDef *FIO_HalfWordGetPointer(uint8_t portNum); -static GPIO_Byte_TypeDef *FIO_ByteGetPointer(uint8_t portNum); - -/*********************************************************************//** - * @brief Get pointer to GPIO peripheral due to GPIO port - * @param[in] portNum Port Number value, should be in range from 0 to 4. - * @return Pointer to GPIO peripheral - **********************************************************************/ -static LPC_GPIO_TypeDef *GPIO_GetPointer(uint8_t portNum) -{ - LPC_GPIO_TypeDef *pGPIO = NULL; - - switch (portNum) { - case 0: - pGPIO = LPC_GPIO0; - break; - case 1: - pGPIO = LPC_GPIO1; - break; - case 2: - pGPIO = LPC_GPIO2; - break; - case 3: - pGPIO = LPC_GPIO3; - break; - case 4: - pGPIO = LPC_GPIO4; - break; - default: - break; - } - - return pGPIO; -} - -/*********************************************************************//** - * @brief Get pointer to FIO peripheral in halfword accessible style - * due to FIO port - * @param[in] portNum Port Number value, should be in range from 0 to 4. - * @return Pointer to FIO peripheral - **********************************************************************/ -static GPIO_HalfWord_TypeDef *FIO_HalfWordGetPointer(uint8_t portNum) -{ - GPIO_HalfWord_TypeDef *pFIO = NULL; - - switch (portNum) { - case 0: - pFIO = GPIO0_HalfWord; - break; - case 1: - pFIO = GPIO1_HalfWord; - break; - case 2: - pFIO = GPIO2_HalfWord; - break; - case 3: - pFIO = GPIO3_HalfWord; - break; - case 4: - pFIO = GPIO4_HalfWord; - break; - default: - break; - } - - return pFIO; -} - -/*********************************************************************//** - * @brief Get pointer to FIO peripheral in byte accessible style - * due to FIO port - * @param[in] portNum Port Number value, should be in range from 0 to 4. - * @return Pointer to FIO peripheral - **********************************************************************/ -static GPIO_Byte_TypeDef *FIO_ByteGetPointer(uint8_t portNum) -{ - GPIO_Byte_TypeDef *pFIO = NULL; - - switch (portNum) { - case 0: - pFIO = GPIO0_Byte; - break; - case 1: - pFIO = GPIO1_Byte; - break; - case 2: - pFIO = GPIO2_Byte; - break; - case 3: - pFIO = GPIO3_Byte; - break; - case 4: - pFIO = GPIO4_Byte; - break; - default: - break; - } - - return pFIO; -} - -/* End of Private Functions --------------------------------------------------- */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup GPIO_Public_Functions - * @{ - */ - - -/* GPIO ------------------------------------------------------------------------------ */ - -/*********************************************************************//** - * @brief Set Direction for GPIO port. - * @param[in] portNum Port Number value, should be in range from 0 to 4 - * @param[in] bitValue Value that contains all bits to set direction, - * in range from 0 to 0xFFFFFFFF. - * example: value 0x5 to set direction for bit 0 and bit 1. - * @param[in] dir Direction value, should be: - * - 0: Input. - * - 1: Output. - * @return None - * - * Note: All remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - **********************************************************************/ -void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir) -{ - LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum); - - if (pGPIO != NULL) { - // Enable Output - if (dir) { - pGPIO->FIODIR |= bitValue; - } - // Enable Input - else { - pGPIO->FIODIR &= ~bitValue; - } - } -} - - -/*********************************************************************//** - * @brief Set Value for bits that have output direction on GPIO port. - * @param[in] portNum Port number value, should be in range from 0 to 4 - * @param[in] bitValue Value that contains all bits on GPIO to set, - * in range from 0 to 0xFFFFFFFF. - * example: value 0x5 to set bit 0 and bit 1. - * @return None - * - * Note: - * - For all bits that has been set as input direction, this function will - * not effect. - * - For all remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - **********************************************************************/ -void GPIO_SetValue(uint8_t portNum, uint32_t bitValue) -{ - LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum); - - if (pGPIO != NULL) { - pGPIO->FIOSET = bitValue; - } -} - -/*********************************************************************//** - * @brief Clear Value for bits that have output direction on GPIO port. - * @param[in] portNum Port number value, should be in range from 0 to 4 - * @param[in] bitValue Value that contains all bits on GPIO to clear, - * in range from 0 to 0xFFFFFFFF. - * example: value 0x5 to clear bit 0 and bit 1. - * @return None - * - * Note: - * - For all bits that has been set as input direction, this function will - * not effect. - * - For all remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - **********************************************************************/ -void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue) -{ - LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum); - - if (pGPIO != NULL) { - pGPIO->FIOCLR = bitValue; - } -} - -/*********************************************************************//** - * @brief Read Current state on port pin that have input direction of GPIO - * @param[in] portNum Port number to read value, in range from 0 to 4 - * @return Current value of GPIO port. - * - * Note: Return value contain state of each port pin (bit) on that GPIO regardless - * its direction is input or output. - **********************************************************************/ -uint32_t GPIO_ReadValue(uint8_t portNum) -{ - LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum); - - if (pGPIO != NULL) { - return pGPIO->FIOPIN; - } - - return (0); -} - -/*********************************************************************//** - * @brief Enable GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13) - * @param[in] portNum Port number to read value, should be: 0 or 2 - * @param[in] bitValue Value that contains all bits on GPIO to enable, - * in range from 0 to 0xFFFFFFFF. - * @param[in] edgeState state of edge, should be: - * - 0: Rising edge - * - 1: Falling edge - * @return None - **********************************************************************/ -void GPIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState) -{ - if((portNum == 0)&&(edgeState == 0)) - LPC_GPIOINT->IO0IntEnR = bitValue; - else if ((portNum == 2)&&(edgeState == 0)) - LPC_GPIOINT->IO2IntEnR = bitValue; - else if ((portNum == 0)&&(edgeState == 1)) - LPC_GPIOINT->IO0IntEnF = bitValue; - else if ((portNum == 2)&&(edgeState == 1)) - LPC_GPIOINT->IO2IntEnF = bitValue; - else - //Error - while(1); -} - -/*********************************************************************//** - * @brief Get GPIO Interrupt Status (just used for P0.0-P0.30, P2.0-P2.13) - * @param[in] portNum Port number to read value, should be: 0 or 2 - * @param[in] pinNum Pin number, should be: 0..30(with port 0) and 0..13 - * (with port 2) - * @param[in] edgeState state of edge, should be: - * - 0: Rising edge - * - 1: Falling edge - * @return Bool could be: - * - ENABLE: Interrupt has been generated due to a rising - * edge on P0.0 - * - DISABLE: A rising edge has not been detected on P0.0 - **********************************************************************/ -FunctionalState GPIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState) -{ - if((portNum == 0) && (edgeState == 0))//Rising Edge - return ((FunctionalState)(((LPC_GPIOINT->IO0IntStatR)>>pinNum)& 0x1)); - else if ((portNum == 2) && (edgeState == 0)) - return ((FunctionalState)(((LPC_GPIOINT->IO2IntStatR)>>pinNum)& 0x1)); - else if ((portNum == 0) && (edgeState == 1))//Falling Edge - return ((FunctionalState)(((LPC_GPIOINT->IO0IntStatF)>>pinNum)& 0x1)); - else if ((portNum == 2) && (edgeState == 1)) - return ((FunctionalState)(((LPC_GPIOINT->IO2IntStatF)>>pinNum)& 0x1)); - else - //Error - while(1); -} -/*********************************************************************//** - * @brief Clear GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13) - * @param[in] portNum Port number to read value, should be: 0 or 2 - * @param[in] bitValue Value that contains all bits on GPIO to enable, - * in range from 0 to 0xFFFFFFFF. - * @return None - **********************************************************************/ -void GPIO_ClearInt(uint8_t portNum, uint32_t bitValue) -{ - if(portNum == 0) - LPC_GPIOINT->IO0IntClr = bitValue; - else if (portNum == 2) - LPC_GPIOINT->IO2IntClr = bitValue; - else - //Invalid portNum - while(1); -} - -/* FIO word accessible ----------------------------------------------------------------- */ -/* Stub function for FIO (word-accessible) style */ - -/** - * @brief The same with GPIO_SetDir() - */ -void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir) -{ - GPIO_SetDir(portNum, bitValue, dir); -} - -/** - * @brief The same with GPIO_SetValue() - */ -void FIO_SetValue(uint8_t portNum, uint32_t bitValue) -{ - GPIO_SetValue(portNum, bitValue); -} - -/** - * @brief The same with GPIO_ClearValue() - */ -void FIO_ClearValue(uint8_t portNum, uint32_t bitValue) -{ - GPIO_ClearValue(portNum, bitValue); -} - -/** - * @brief The same with GPIO_ReadValue() - */ -uint32_t FIO_ReadValue(uint8_t portNum) -{ - return (GPIO_ReadValue(portNum)); -} - -/** - * @brief The same with GPIO_IntCmd() - */ -void FIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState) -{ - GPIO_IntCmd(portNum, bitValue, edgeState); -} - -/** - * @brief The same with GPIO_GetIntStatus() - */ -FunctionalState FIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState) -{ - return (GPIO_GetIntStatus(portNum, pinNum, edgeState)); -} - -/** - * @brief The same with GPIO_ClearInt() - */ -void FIO_ClearInt(uint8_t portNum, uint32_t bitValue) -{ - GPIO_ClearInt(portNum, bitValue); -} -/*********************************************************************//** - * @brief Set mask value for bits in FIO port - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] bitValue Value that contains all bits in to set, - * in range from 0 to 0xFFFFFFFF. - * @param[in] maskValue Mask value contains state value for each bit: - * - 0: not mask. - * - 1: mask. - * @return None - * - * Note: - * - All remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - * - After executing this function, in mask register, value '0' on each bit - * enables an access to the corresponding physical pin via a read or write access, - * while value '1' on bit (masked) that corresponding pin will not be changed - * with write access and if read, will not be reflected in the updated pin. - **********************************************************************/ -void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue) -{ - LPC_GPIO_TypeDef *pFIO = GPIO_GetPointer(portNum); - if(pFIO != NULL) { - // Mask - if (maskValue){ - pFIO->FIOMASK |= bitValue; - } - // Un-mask - else { - pFIO->FIOMASK &= ~bitValue; - } - } -} - - -/* FIO halfword accessible ------------------------------------------------------------- */ - -/*********************************************************************//** - * @brief Set direction for FIO port in halfword accessible style - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] halfwordNum HalfWord part number, should be 0 (lower) or 1(upper) - * @param[in] bitValue Value that contains all bits in to set direction, - * in range from 0 to 0xFFFF. - * @param[in] dir Direction value, should be: - * - 0: Input. - * - 1: Output. - * @return None - * - * Note: All remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - **********************************************************************/ -void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir) -{ - GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum); - if(pFIO != NULL) { - // Output direction - if (dir) { - // Upper - if(halfwordNum) { - pFIO->FIODIRU |= bitValue; - } - // lower - else { - pFIO->FIODIRL |= bitValue; - } - } - // Input direction - else { - // Upper - if(halfwordNum) { - pFIO->FIODIRU &= ~bitValue; - } - // lower - else { - pFIO->FIODIRL &= ~bitValue; - } - } - } -} - - -/*********************************************************************//** - * @brief Set mask value for bits in FIO port in halfword accessible style - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] halfwordNum HalfWord part number, should be 0 (lower) or 1(upper) - * @param[in] bitValue Value that contains all bits in to set, - * in range from 0 to 0xFFFF. - * @param[in] maskValue Mask value contains state value for each bit: - * - 0: not mask. - * - 1: mask. - * @return None - * - * Note: - * - All remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - * - After executing this function, in mask register, value '0' on each bit - * enables an access to the corresponding physical pin via a read or write access, - * while value '1' on bit (masked) that corresponding pin will not be changed - * with write access and if read, will not be reflected in the updated pin. - **********************************************************************/ -void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue) -{ - GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum); - if(pFIO != NULL) { - // Mask - if (maskValue){ - // Upper - if(halfwordNum) { - pFIO->FIOMASKU |= bitValue; - } - // lower - else { - pFIO->FIOMASKL |= bitValue; - } - } - // Un-mask - else { - // Upper - if(halfwordNum) { - pFIO->FIOMASKU &= ~bitValue; - } - // lower - else { - pFIO->FIOMASKL &= ~bitValue; - } - } - } -} - - -/*********************************************************************//** - * @brief Set bits for FIO port in halfword accessible style - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] halfwordNum HalfWord part number, should be 0 (lower) or 1(upper) - * @param[in] bitValue Value that contains all bits in to set, - * in range from 0 to 0xFFFF. - * @return None - * - * Note: - * - For all bits that has been set as input direction, this function will - * not effect. - * - For all remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - **********************************************************************/ -void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue) -{ - GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum); - if(pFIO != NULL) { - // Upper - if(halfwordNum) { - pFIO->FIOSETU = bitValue; - } - // lower - else { - pFIO->FIOSETL = bitValue; - } - } -} - - -/*********************************************************************//** - * @brief Clear bits for FIO port in halfword accessible style - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] halfwordNum HalfWord part number, should be 0 (lower) or 1(upper) - * @param[in] bitValue Value that contains all bits in to clear, - * in range from 0 to 0xFFFF. - * @return None - * - * Note: - * - For all bits that has been set as input direction, this function will - * not effect. - * - For all remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - **********************************************************************/ -void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue) -{ - GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum); - if(pFIO != NULL) { - // Upper - if(halfwordNum) { - pFIO->FIOCLRU = bitValue; - } - // lower - else { - pFIO->FIOCLRL = bitValue; - } - } -} - - -/*********************************************************************//** - * @brief Read Current state on port pin that have input direction of GPIO - * in halfword accessible style. - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] halfwordNum HalfWord part number, should be 0 (lower) or 1(upper) - * @return Current value of FIO port pin of specified halfword. - * Note: Return value contain state of each port pin (bit) on that FIO regardless - * its direction is input or output. - **********************************************************************/ -uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum) -{ - GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum); - if(pFIO != NULL) { - // Upper - if(halfwordNum) { - return (pFIO->FIOPINU); - } - // lower - else { - return (pFIO->FIOPINL); - } - } - return (0); -} - - -/* FIO Byte accessible ------------------------------------------------------------ */ - -/*********************************************************************//** - * @brief Set direction for FIO port in byte accessible style - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] byteNum Byte part number, should be in range from 0 to 3 - * @param[in] bitValue Value that contains all bits in to set direction, - * in range from 0 to 0xFF. - * @param[in] dir Direction value, should be: - * - 0: Input. - * - 1: Output. - * @return None - * - * Note: All remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - **********************************************************************/ -void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir) -{ - GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum); - if(pFIO != NULL) { - // Output direction - if (dir) { - if (byteNum <= 3) { - pFIO->FIODIR[byteNum] |= bitValue; - } - } - // Input direction - else { - if (byteNum <= 3) { - pFIO->FIODIR[byteNum] &= ~bitValue; - } - } - } -} - -/*********************************************************************//** - * @brief Set mask value for bits in FIO port in byte accessible style - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] byteNum Byte part number, should be in range from 0 to 3 - * @param[in] bitValue Value that contains all bits in to set mask, - * in range from 0 to 0xFF. - * @param[in] maskValue Mask value contains state value for each bit: - * - 0: not mask. - * - 1: mask. - * @return None - * - * Note: - * - All remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - * - After executing this function, in mask register, value '0' on each bit - * enables an access to the corresponding physical pin via a read or write access, - * while value '1' on bit (masked) that corresponding pin will not be changed - * with write access and if read, will not be reflected in the updated pin. - **********************************************************************/ -void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue) -{ - GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum); - if(pFIO != NULL) { - // Mask - if (maskValue) { - if (byteNum <= 3) { - pFIO->FIOMASK[byteNum] |= bitValue; - } - } - // Un-mask - else { - if (byteNum <= 3) { - pFIO->FIOMASK[byteNum] &= ~bitValue; - } - } - } -} - - -/*********************************************************************//** - * @brief Set bits for FIO port in byte accessible style - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] byteNum Byte part number, should be in range from 0 to 3 - * @param[in] bitValue Value that contains all bits in to set, - * in range from 0 to 0xFF. - * @return None - * - * Note: - * - For all bits that has been set as input direction, this function will - * not effect. - * - For all remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - **********************************************************************/ -void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue) -{ - GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum); - if (pFIO != NULL) { - if (byteNum <= 3){ - pFIO->FIOSET[byteNum] = bitValue; - } - } -} - - -/*********************************************************************//** - * @brief Clear bits for FIO port in byte accessible style - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] byteNum Byte part number, should be in range from 0 to 3 - * @param[in] bitValue Value that contains all bits in to clear, - * in range from 0 to 0xFF. - * @return None - * - * Note: - * - For all bits that has been set as input direction, this function will - * not effect. - * - For all remaining bits that are not activated in bitValue (value '0') - * will not be effected by this function. - **********************************************************************/ -void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue) -{ - GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum); - if (pFIO != NULL) { - if (byteNum <= 3){ - pFIO->FIOCLR[byteNum] = bitValue; - } - } -} - - -/*********************************************************************//** - * @brief Read Current state on port pin that have input direction of GPIO - * in byte accessible style. - * @param[in] portNum Port number, in range from 0 to 4 - * @param[in] byteNum Byte part number, should be in range from 0 to 3 - * @return Current value of FIO port pin of specified byte part. - * Note: Return value contain state of each port pin (bit) on that FIO regardless - * its direction is input or output. - **********************************************************************/ -uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum) -{ - GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum); - if (pFIO != NULL) { - if (byteNum <= 3){ - return (pFIO->FIOPIN[byteNum]); - } - } - return (0); -} - -/** - * @} - */ - -#endif /* _GPIO */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_i2c.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1383 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_gpio.c 2011-03-31 -*//** -* @file lpc17xx_gpio.c -* @brief Contains all functions support for I2C firmware -* library on LPC17xx -* @version 2.1 -* @date 31. Mar. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup I2C - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_i2c.h" -#include "lpc17xx_clkpwr.h" -#include "lpc17xx_pinsel.h" - - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _I2C - - -/* Private Types -------------------------------------------------------------- */ -/** @defgroup I2C_Private_Types I2C Private Types - * @{ - */ - -/** - * @brief I2C device configuration structure type - */ -typedef struct -{ - uint32_t txrx_setup; /* Transmission setup */ - int32_t dir; /* Current direction phase, 0 - write, 1 - read */ -} I2C_CFG_T; - -/** - * @} - */ - -/* Private Variables ---------------------------------------------------------- */ -/** - * @brief II2C driver data for I2C0, I2C1 and I2C2 - */ -static I2C_CFG_T i2cdat[3]; - -static uint32_t I2C_MasterComplete[3]; -static uint32_t I2C_SlaveComplete[3]; - -static uint32_t I2C_MonitorBufferIndex; - -/* Private Functions ---------------------------------------------------------- */ - -/* Get I2C number */ -static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx); - -/* Generate a start condition on I2C bus (in master mode only) */ -static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx); - -/* Generate a stop condition on I2C bus (in master mode only) */ -static void I2C_Stop (LPC_I2C_TypeDef *I2Cx); - -/* I2C send byte subroutine */ -static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte); - -/* I2C get byte subroutine */ -static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack); - -/* I2C set clock (hz) */ -static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock); - -/*--------------------------------------------------------------------------------*/ -/********************************************************************//** - * @brief Convert from I2C peripheral to number - * @param[in] I2Cx: I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @return I2C number, could be: 0..2 - *********************************************************************/ -static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx){ - if (I2Cx == LPC_I2C0) { - return (0); - } else if (I2Cx == LPC_I2C1) { - return (1); - } else if (I2Cx == LPC_I2C2) { - return (2); - } - return (-1); -} - -/********************************************************************//** - * @brief Generate a start condition on I2C bus (in master mode only) - * @param[in] I2Cx: I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @return value of I2C status register after generate a start condition - *********************************************************************/ -static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx) -{ - I2Cx->I2CONSET = I2C_I2CONSET_STA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - - // Wait for complete - while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI)); - I2Cx->I2CONCLR = I2C_I2CONCLR_STAC; - return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK); -} - -/********************************************************************//** - * @brief Generate a stop condition on I2C bus (in master mode only) - * @param[in] I2Cx: I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @return None - *********************************************************************/ -static void I2C_Stop (LPC_I2C_TypeDef *I2Cx) -{ - - /* Make sure start bit is not active */ - if (I2Cx->I2CONSET & I2C_I2CONSET_STA) - { - I2Cx->I2CONCLR = I2C_I2CONCLR_STAC; - } - I2Cx->I2CONSET = I2C_I2CONSET_STO; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; -} - -/********************************************************************//** - * @brief Send a byte - * @param[in] I2Cx: I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] databyte: number of byte - * @return value of I2C status register after sending - *********************************************************************/ -static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte) -{ - /* Make sure start bit is not active */ - if (I2Cx->I2CONSET & I2C_I2CONSET_STA) - { - I2Cx->I2CONCLR = I2C_I2CONCLR_STAC; - } - I2Cx->I2DAT = databyte & I2C_I2DAT_BITMASK; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - - while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI)); - return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK); -} - -/********************************************************************//** - * @brief Get a byte - * @param[in] I2Cx: I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[out] retdat pointer to return data - * @param[in] ack assert acknowledge or not, should be: TRUE/FALSE - * @return value of I2C status register after sending - *********************************************************************/ -static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack) -{ - if (ack == TRUE) - { - I2Cx->I2CONSET = I2C_I2CONSET_AA; - } - else - { - I2Cx->I2CONCLR = I2C_I2CONCLR_AAC; - } - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - - while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI)); - *retdat = (uint8_t) (I2Cx->I2DAT & I2C_I2DAT_BITMASK); - return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK); -} - -/*********************************************************************//** - * @brief Setup clock rate for I2C peripheral - * @param[in] I2Cx I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] target_clock : clock of SSP (Hz) - * @return None - ***********************************************************************/ -static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock) -{ - uint32_t temp = 0; - - CHECK_PARAM(PARAM_I2Cx(I2Cx)); - - // Get PCLK of I2C controller - if (I2Cx == LPC_I2C0) - { - temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C0) / target_clock; - } - else if (I2Cx == LPC_I2C1) - { - temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C1) / target_clock; - } - else if (I2Cx == LPC_I2C2) - { - temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C2) / target_clock; - } - - /* Set the I2C clock value to register */ - I2Cx->I2SCLH = (uint32_t)(temp / 2); - I2Cx->I2SCLL = (uint32_t)(temp - I2Cx->I2SCLH); -} -/* End of Private Functions --------------------------------------------------- */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup I2C_Public_Functions - * @{ - */ - -/********************************************************************//** - * @brief Initializes the I2Cx peripheral with specified parameter. - * @param[in] I2Cx I2C peripheral selected, should be - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] clockrate Target clock rate value to initialized I2C - * peripheral (Hz) - * @return None - *********************************************************************/ -void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate) -{ - CHECK_PARAM(PARAM_I2Cx(I2Cx)); - - if (I2Cx==LPC_I2C0) - { - /* Set up clock and power for I2C0 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, ENABLE); - /* As default, peripheral clock for I2C0 module - * is set to FCCLK / 2 */ - CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C0, CLKPWR_PCLKSEL_CCLK_DIV_2); - } - else if (I2Cx==LPC_I2C1) - { - /* Set up clock and power for I2C1 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, ENABLE); - /* As default, peripheral clock for I2C1 module - * is set to FCCLK / 2 */ - CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C1, CLKPWR_PCLKSEL_CCLK_DIV_2); - } - else if (I2Cx==LPC_I2C2) - { - /* Set up clock and power for I2C2 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, ENABLE); - /* As default, peripheral clock for I2C2 module - * is set to FCCLK / 2 */ - CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C2, CLKPWR_PCLKSEL_CCLK_DIV_2); - } - else { - // Up-Support this device - return; - } - - /* Set clock rate */ - I2C_SetClock(I2Cx, clockrate); - /* Set I2C operation to default */ - I2Cx->I2CONCLR = (I2C_I2CONCLR_AAC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_I2ENC); -} - -/*********************************************************************//** - * @brief De-initializes the I2C peripheral registers to their - * default reset values. - * @param[in] I2Cx I2C peripheral selected, should be - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @return None - **********************************************************************/ -void I2C_DeInit(LPC_I2C_TypeDef* I2Cx) -{ - CHECK_PARAM(PARAM_I2Cx(I2Cx)); - - /* Disable I2C control */ - I2Cx->I2CONCLR = I2C_I2CONCLR_I2ENC; - - if (I2Cx==LPC_I2C0) - { - /* Disable power for I2C0 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, DISABLE); - } - else if (I2Cx==LPC_I2C1) - { - /* Disable power for I2C1 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, DISABLE); - } - else if (I2Cx==LPC_I2C2) - { - /* Disable power for I2C2 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, DISABLE); - } -} - -/*********************************************************************//** - * @brief Enable or disable I2C peripheral's operation - * @param[in] I2Cx I2C peripheral selected, should be - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] NewState New State of I2Cx peripheral's operation - * @return none - **********************************************************************/ -void I2C_Cmd(LPC_I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - CHECK_PARAM(PARAM_I2Cx(I2Cx)); - - if (NewState == ENABLE) - { - I2Cx->I2CONSET = I2C_I2CONSET_I2EN; - } - else - { - I2Cx->I2CONCLR = I2C_I2CONCLR_I2ENC; - } -} - -/*********************************************************************//** - * @brief Enable/Disable interrupt for I2C peripheral - * @param[in] I2Cx I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] NewState New State of I2C peripheral interrupt in NVIC core - * should be: - * - ENABLE: enable interrupt for this I2C peripheral - * - DISABLE: disable interrupt for this I2C peripheral - * @return None - **********************************************************************/ -void I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState) -{ - if (NewState) - { - if(I2Cx == LPC_I2C0) - { - NVIC_EnableIRQ(I2C0_IRQn); - } - else if (I2Cx == LPC_I2C1) - { - NVIC_EnableIRQ(I2C1_IRQn); - } - else if (I2Cx == LPC_I2C2) - { - NVIC_EnableIRQ(I2C2_IRQn); - } - } - else - { - if(I2Cx == LPC_I2C0) - { - NVIC_DisableIRQ(I2C0_IRQn); - } - else if (I2Cx == LPC_I2C1) - { - NVIC_DisableIRQ(I2C1_IRQn); - } - else if (I2Cx == LPC_I2C2) - { - NVIC_DisableIRQ(I2C2_IRQn); - } - } - return; -} - - -/*********************************************************************//** - * @brief General Master Interrupt handler for I2C peripheral - * @param[in] I2Cx I2C peripheral selected, should be: - * - LPC_I2C - * - LPC_I2C1 - * - LPC_I2C2 - * @return None - **********************************************************************/ -void I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx) -{ - int32_t tmp; - uint8_t returnCode; - I2C_M_SETUP_Type *txrx_setup; - - tmp = I2C_getNum(I2Cx); - txrx_setup = (I2C_M_SETUP_Type *) i2cdat[tmp].txrx_setup; - - returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK); - // Save current status - txrx_setup->status = returnCode; - // there's no relevant information - if (returnCode == I2C_I2STAT_NO_INF){ - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - return; - } - - /* ----------------------------- TRANSMIT PHASE --------------------------*/ - if (i2cdat[tmp].dir == 0){ - switch (returnCode) - { - /* A start/repeat start condition has been transmitted -------------------*/ - case I2C_I2STAT_M_TX_START: - case I2C_I2STAT_M_TX_RESTART: - I2Cx->I2CONCLR = I2C_I2CONCLR_STAC; - /* - * If there's any transmit data, then start to - * send SLA+W right now, otherwise check whether if there's - * any receive data for next state. - */ - if ((txrx_setup->tx_data != NULL) && (txrx_setup->tx_length != 0)){ - I2Cx->I2DAT = (txrx_setup->sl_addr7bit << 1); - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - } else { - goto next_stage; - } - break; - - /* SLA+W has been transmitted, ACK has been received ----------------------*/ - case I2C_I2STAT_M_TX_SLAW_ACK: - /* Data has been transmitted, ACK has been received */ - case I2C_I2STAT_M_TX_DAT_ACK: - /* Send more data */ - if ((txrx_setup->tx_count < txrx_setup->tx_length) \ - && (txrx_setup->tx_data != NULL)){ - I2Cx->I2DAT = *(uint8_t *)(txrx_setup->tx_data + txrx_setup->tx_count); - txrx_setup->tx_count++; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - } - // no more data, switch to next stage - else { -next_stage: - // change direction - i2cdat[tmp].dir = 1; - // Check if any data to receive - if ((txrx_setup->rx_length != 0) && (txrx_setup->rx_data != NULL)){ - // check whether if we need to issue an repeat start - if ((txrx_setup->tx_length != 0) && (txrx_setup->tx_data != NULL)){ - // Send out an repeat start command - I2Cx->I2CONSET = I2C_I2CONSET_STA; - I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC; - } - // Don't need issue an repeat start, just goto send SLA+R - else { - goto send_slar; - } - } - // no more data send, the go to end stage now - else { - // success, goto end stage - txrx_setup->status |= I2C_SETUP_STATUS_DONE; - goto end_stage; - } - } - break; - - /* SLA+W has been transmitted, NACK has been received ----------------------*/ - case I2C_I2STAT_M_TX_SLAW_NACK: - /* Data has been transmitted, NACK has been received -----------------------*/ - case I2C_I2STAT_M_TX_DAT_NACK: - // update status - txrx_setup->status |= I2C_SETUP_STATUS_NOACKF; - goto retry; - /* Arbitration lost in SLA+R/W or Data bytes -------------------------------*/ - case I2C_I2STAT_M_TX_ARB_LOST: - // update status - txrx_setup->status |= I2C_SETUP_STATUS_ARBF; - default: - goto retry; - } - } - - /* ----------------------------- RECEIVE PHASE --------------------------*/ - else if (i2cdat[tmp].dir == 1){ - switch (returnCode){ - /* A start/repeat start condition has been transmitted ---------------------*/ - case I2C_I2STAT_M_RX_START: - case I2C_I2STAT_M_RX_RESTART: - I2Cx->I2CONCLR = I2C_I2CONCLR_STAC; - /* - * If there's any receive data, then start to - * send SLA+R right now, otherwise check whether if there's - * any receive data for end of state. - */ - if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_length != 0)){ -send_slar: - I2Cx->I2DAT = (txrx_setup->sl_addr7bit << 1) | 0x01; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - } else { - // Success, goto end stage - txrx_setup->status |= I2C_SETUP_STATUS_DONE; - goto end_stage; - } - break; - - /* SLA+R has been transmitted, ACK has been received -----------------*/ - case I2C_I2STAT_M_RX_SLAR_ACK: - if (txrx_setup->rx_count < (txrx_setup->rx_length - 1)) { - /*Data will be received, ACK will be return*/ - I2Cx->I2CONSET = I2C_I2CONSET_AA; - } - else { - /*Last data will be received, NACK will be return*/ - I2Cx->I2CONCLR = I2C_I2CONSET_AA; - } - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Data has been received, ACK has been returned ----------------------*/ - case I2C_I2STAT_M_RX_DAT_ACK: - // Note save data and increase counter first, then check later - /* Save data */ - if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_count < txrx_setup->rx_length)){ - *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (I2Cx->I2DAT & I2C_I2DAT_BITMASK); - txrx_setup->rx_count++; - } - if (txrx_setup->rx_count < (txrx_setup->rx_length - 1)) { - /*Data will be received, ACK will be return*/ - I2Cx->I2CONSET = I2C_I2CONSET_AA; - } - else { - /*Last data will be received, NACK will be return*/ - I2Cx->I2CONCLR = I2C_I2CONSET_AA; - } - - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Data has been received, NACK has been return -------------------------*/ - case I2C_I2STAT_M_RX_DAT_NACK: - /* Save the last data */ - if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_count < txrx_setup->rx_length)){ - *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (I2Cx->I2DAT & I2C_I2DAT_BITMASK); - txrx_setup->rx_count++; - } - // success, go to end stage - txrx_setup->status |= I2C_SETUP_STATUS_DONE; - goto end_stage; - - /* SLA+R has been transmitted, NACK has been received ------------------*/ - case I2C_I2STAT_M_RX_SLAR_NACK: - // update status - txrx_setup->status |= I2C_SETUP_STATUS_NOACKF; - goto retry; - - /* Arbitration lost ----------------------------------------------------*/ - case I2C_I2STAT_M_RX_ARB_LOST: - // update status - txrx_setup->status |= I2C_SETUP_STATUS_ARBF; - default: -retry: - // check if retransmission is available - if (txrx_setup->retransmissions_count < txrx_setup->retransmissions_max){ - // Clear tx count - txrx_setup->tx_count = 0; - I2Cx->I2CONSET = I2C_I2CONSET_STA; - I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC; - txrx_setup->retransmissions_count++; - } - // End of stage - else { -end_stage: - // Disable interrupt - I2C_IntCmd(I2Cx, FALSE); - // Send stop - I2C_Stop(I2Cx); - - I2C_MasterComplete[tmp] = TRUE; - } - break; - } - } -} - - -/*********************************************************************//** - * @brief General Slave Interrupt handler for I2C peripheral - * @param[in] I2Cx I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @return None - **********************************************************************/ -void I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx) -{ - int32_t tmp; - uint8_t returnCode; - I2C_S_SETUP_Type *txrx_setup; - uint32_t timeout; - - tmp = I2C_getNum(I2Cx); - txrx_setup = (I2C_S_SETUP_Type *) i2cdat[tmp].txrx_setup; - - returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK); - // Save current status - txrx_setup->status = returnCode; - // there's no relevant information - if (returnCode == I2C_I2STAT_NO_INF){ - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - return; - } - - - switch (returnCode) - { - - /* No status information */ - case I2C_I2STAT_NO_INF: - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Reading phase -------------------------------------------------------- */ - /* Own SLA+R has been received, ACK has been returned */ - case I2C_I2STAT_S_RX_SLAW_ACK: - /* General call address has been received, ACK has been returned */ - case I2C_I2STAT_S_RX_GENCALL_ACK: - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Previously addressed with own SLA; - * DATA byte has been received; - * ACK has been returned */ - case I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK: - /* DATA has been received, ACK hasn been return */ - case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK: - /* - * All data bytes that over-flow the specified receive - * data length, just ignore them. - */ - if ((txrx_setup->rx_count < txrx_setup->rx_length) \ - && (txrx_setup->rx_data != NULL)){ - *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (uint8_t)I2Cx->I2DAT; - txrx_setup->rx_count++; - } - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Previously addressed with own SLA; - * DATA byte has been received; - * NOT ACK has been returned */ - case I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK: - /* DATA has been received, NOT ACK has been returned */ - case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK: - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* - * Note that: Return code only let us know a stop condition mixed - * with a repeat start condition in the same code value. - * So we should provide a time-out. In case this is really a stop - * condition, this will return back after time out condition. Otherwise, - * next session that is slave receive data will be completed. - */ - - /* A Stop or a repeat start condition */ - case I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX: - // Temporally lock the interrupt for timeout condition - I2C_IntCmd(I2Cx, FALSE); - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - // enable time out - timeout = I2C_SLAVE_TIME_OUT; - while(1){ - if (I2Cx->I2CONSET & I2C_I2CONSET_SI){ - // re-Enable interrupt - I2C_IntCmd(I2Cx, TRUE); - break; - } else { - timeout--; - if (timeout == 0){ - // timeout occur, it's really a stop condition - txrx_setup->status |= I2C_SETUP_STATUS_DONE; - goto s_int_end; - } - } - } - break; - - /* Writing phase -------------------------------------------------------- */ - /* Own SLA+R has been received, ACK has been returned */ - case I2C_I2STAT_S_TX_SLAR_ACK: - /* Data has been transmitted, ACK has been received */ - case I2C_I2STAT_S_TX_DAT_ACK: - /* - * All data bytes that over-flow the specified receive - * data length, just ignore them. - */ - if ((txrx_setup->tx_count < txrx_setup->tx_length) \ - && (txrx_setup->tx_data != NULL)){ - I2Cx->I2DAT = *(uint8_t *) (txrx_setup->tx_data + txrx_setup->tx_count); - txrx_setup->tx_count++; - } - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Data has been transmitted, NACK has been received, - * that means there's no more data to send, exit now */ - /* - * Note: Don't wait for stop event since in slave transmit mode, - * since there no proof lets us know when a stop signal has been received - * on slave side. - */ - case I2C_I2STAT_S_TX_DAT_NACK: - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - txrx_setup->status |= I2C_SETUP_STATUS_DONE; - goto s_int_end; - - // Other status must be captured - default: -s_int_end: - // Disable interrupt - I2C_IntCmd(I2Cx, FALSE); - I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC; - I2C_SlaveComplete[tmp] = TRUE; - break; - } -} - -/*********************************************************************//** - * @brief Transmit and Receive data in master mode - * @param[in] I2Cx I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] TransferCfg Pointer to a I2C_M_SETUP_Type structure that - * contains specified information about the - * configuration for master transfer. - * @param[in] Opt a I2C_TRANSFER_OPT_Type type that selected for - * interrupt or polling mode. - * @return SUCCESS or ERROR - * - * Note: - * - In case of using I2C to transmit data only, either transmit length set to 0 - * or transmit data pointer set to NULL. - * - In case of using I2C to receive data only, either receive length set to 0 - * or receive data pointer set to NULL. - * - In case of using I2C to transmit followed by receive data, transmit length, - * transmit data pointer, receive length and receive data pointer should be set - * corresponding. - **********************************************************************/ -Status I2C_MasterTransferData(LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, \ - I2C_TRANSFER_OPT_Type Opt) -{ - uint8_t *txdat; - uint8_t *rxdat; - uint32_t CodeStatus; - uint8_t tmp; - - // reset all default state - txdat = (uint8_t *) TransferCfg->tx_data; - rxdat = (uint8_t *) TransferCfg->rx_data; - // Reset I2C setup value to default state - TransferCfg->tx_count = 0; - TransferCfg->rx_count = 0; - TransferCfg->status = 0; - - if (Opt == I2C_TRANSFER_POLLING){ - - /* First Start condition -------------------------------------------------------------- */ - TransferCfg->retransmissions_count = 0; -retry: - // reset all default state - txdat = (uint8_t *) TransferCfg->tx_data; - rxdat = (uint8_t *) TransferCfg->rx_data; - // Reset I2C setup value to default state - TransferCfg->tx_count = 0; - TransferCfg->rx_count = 0; - CodeStatus = 0; - - // Start command - CodeStatus = I2C_Start(I2Cx); - if ((CodeStatus != I2C_I2STAT_M_TX_START) \ - && (CodeStatus != I2C_I2STAT_M_TX_RESTART)){ - TransferCfg->retransmissions_count++; - if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){ - // save status - TransferCfg->status = CodeStatus; - goto error; - } else { - goto retry; - } - } - - /* In case of sending data first --------------------------------------------------- */ - if ((TransferCfg->tx_length != 0) && (TransferCfg->tx_data != NULL)){ - - /* Send slave address + WR direction bit = 0 ----------------------------------- */ - CodeStatus = I2C_SendByte(I2Cx, (TransferCfg->sl_addr7bit << 1)); - if (CodeStatus != I2C_I2STAT_M_TX_SLAW_ACK){ - TransferCfg->retransmissions_count++; - if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){ - // save status - TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF; - goto error; - } else { - goto retry; - } - } - - /* Send a number of data bytes ---------------------------------------- */ - while (TransferCfg->tx_count < TransferCfg->tx_length) - { - CodeStatus = I2C_SendByte(I2Cx, *txdat); - if (CodeStatus != I2C_I2STAT_M_TX_DAT_ACK){ - TransferCfg->retransmissions_count++; - if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){ - // save status - TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF; - goto error; - } else { - goto retry; - } - } - - txdat++; - TransferCfg->tx_count++; - } - } - - /* Second Start condition (Repeat Start) ------------------------------------------- */ - if ((TransferCfg->tx_length != 0) && (TransferCfg->tx_data != NULL) \ - && (TransferCfg->rx_length != 0) && (TransferCfg->rx_data != NULL)){ - - CodeStatus = I2C_Start(I2Cx); - if ((CodeStatus != I2C_I2STAT_M_RX_START) \ - && (CodeStatus != I2C_I2STAT_M_RX_RESTART)){ - TransferCfg->retransmissions_count++; - if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){ - // Update status - TransferCfg->status = CodeStatus; - goto error; - } else { - goto retry; - } - } - } - - /* Then, start reading after sending data -------------------------------------- */ - if ((TransferCfg->rx_length != 0) && (TransferCfg->rx_data != NULL)){ - /* Send slave address + RD direction bit = 1 ----------------------------------- */ - - CodeStatus = I2C_SendByte(I2Cx, ((TransferCfg->sl_addr7bit << 1) | 0x01)); - if (CodeStatus != I2C_I2STAT_M_RX_SLAR_ACK){ - TransferCfg->retransmissions_count++; - if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){ - // update status - TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF; - goto error; - } else { - goto retry; - } - } - - /* Receive a number of data bytes ------------------------------------------------- */ - while (TransferCfg->rx_count < TransferCfg->rx_length){ - - /* - * Note that: if data length is only one, the master should not - * issue an ACK signal on bus after reading to avoid of next data frame - * on slave side - */ - if (TransferCfg->rx_count < (TransferCfg->rx_length - 1)){ - // Issue an ACK signal for next data frame - CodeStatus = I2C_GetByte(I2Cx, &tmp, TRUE); - if (CodeStatus != I2C_I2STAT_M_RX_DAT_ACK){ - TransferCfg->retransmissions_count++; - if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){ - // update status - TransferCfg->status = CodeStatus; - goto error; - } else { - goto retry; - } - } - } else { - // Do not issue an ACK signal - CodeStatus = I2C_GetByte(I2Cx, &tmp, FALSE); - if (CodeStatus != I2C_I2STAT_M_RX_DAT_NACK){ - TransferCfg->retransmissions_count++; - if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){ - // update status - TransferCfg->status = CodeStatus; - goto error; - } else { - goto retry; - } - } - } - *rxdat++ = tmp; - TransferCfg->rx_count++; - } - } - - /* Send STOP condition ------------------------------------------------- */ - I2C_Stop(I2Cx); - return SUCCESS; - -error: - // Send stop condition - I2C_Stop(I2Cx); - return ERROR; - } - - else if (Opt == I2C_TRANSFER_INTERRUPT){ - // Setup tx_rx data, callback and interrupt handler - tmp = I2C_getNum(I2Cx); - i2cdat[tmp].txrx_setup = (uint32_t) TransferCfg; - // Set direction phase, write first - i2cdat[tmp].dir = 0; - - /* First Start condition -------------------------------------------------------------- */ - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - I2Cx->I2CONSET = I2C_I2CONSET_STA; - I2C_IntCmd(I2Cx, TRUE); - - return (SUCCESS); - } - - return ERROR; -} - -/*********************************************************************//** - * @brief Receive and Transmit data in slave mode - * @param[in] I2Cx I2C peripheral selected, should be - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] TransferCfg Pointer to a I2C_S_SETUP_Type structure that - * contains specified information about the - * configuration for master transfer. - * @param[in] Opt I2C_TRANSFER_OPT_Type type that selected for - * interrupt or polling mode. - * @return SUCCESS or ERROR - * - * Note: - * The mode of slave's operation depends on the command sent from master on - * the I2C bus. If the master send a SLA+W command, this sub-routine will - * use receive data length and receive data pointer. If the master send a SLA+R - * command, this sub-routine will use transmit data length and transmit data - * pointer. - * If the master issue an repeat start command or a stop command, the slave will - * enable an time out condition, during time out condition, if there's no activity - * on I2C bus, the slave will exit, otherwise (i.e. the master send a SLA+R/W), - * the slave then switch to relevant operation mode. The time out should be used - * because the return status code can not show difference from stop and repeat - * start command in slave operation. - * In case of the expected data length from master is greater than data length - * that slave can support: - * - In case of reading operation (from master): slave will return I2C_I2DAT_IDLE_CHAR - * value. - * - In case of writing operation (from master): slave will ignore remain data from master. - **********************************************************************/ -Status I2C_SlaveTransferData(LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, \ - I2C_TRANSFER_OPT_Type Opt) -{ - uint8_t *txdat; - uint8_t *rxdat; - uint32_t CodeStatus = 0; - uint32_t timeout; - int32_t time_en; - int32_t tmp; - - // reset all default state - txdat = (uint8_t *) TransferCfg->tx_data; - rxdat = (uint8_t *) TransferCfg->rx_data; - // Reset I2C setup value to default state - TransferCfg->tx_count = 0; - TransferCfg->rx_count = 0; - TransferCfg->status = 0; - - - // Polling option - if (Opt == I2C_TRANSFER_POLLING){ - - /* Set AA bit to ACK command on I2C bus */ - I2Cx->I2CONSET = I2C_I2CONSET_AA; - /* Clear SI bit to be ready ... */ - I2Cx->I2CONCLR = (I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC); - - time_en = 0; - timeout = 0; - - while (1) - { - /* Check SI flag ready */ - if (I2Cx->I2CONSET & I2C_I2CONSET_SI) - { - time_en = 0; - - switch (CodeStatus = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK)) - { - - /* No status information */ - case I2C_I2STAT_NO_INF: - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Reading phase -------------------------------------------------------- */ - /* Own SLA+R has been received, ACK has been returned */ - case I2C_I2STAT_S_RX_SLAW_ACK: - /* General call address has been received, ACK has been returned */ - case I2C_I2STAT_S_RX_GENCALL_ACK: - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Previously addressed with own SLA; - * DATA byte has been received; - * ACK has been returned */ - case I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK: - /* DATA has been received, ACK hasn been return */ - case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK: - /* - * All data bytes that over-flow the specified receive - * data length, just ignore them. - */ - if ((TransferCfg->rx_count < TransferCfg->rx_length) \ - && (TransferCfg->rx_data != NULL)){ - *rxdat++ = (uint8_t)I2Cx->I2DAT; - TransferCfg->rx_count++; - } - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Previously addressed with own SLA; - * DATA byte has been received; - * NOT ACK has been returned */ - case I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK: - /* DATA has been received, NOT ACK has been returned */ - case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK: - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* - * Note that: Return code only let us know a stop condition mixed - * with a repeat start condition in the same code value. - * So we should provide a time-out. In case this is really a stop - * condition, this will return back after time out condition. Otherwise, - * next session that is slave receive data will be completed. - */ - - /* A Stop or a repeat start condition */ - case I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX: - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - // enable time out - time_en = 1; - timeout = 0; - break; - - /* Writing phase -------------------------------------------------------- */ - /* Own SLA+R has been received, ACK has been returned */ - case I2C_I2STAT_S_TX_SLAR_ACK: - /* Data has been transmitted, ACK has been received */ - case I2C_I2STAT_S_TX_DAT_ACK: - /* - * All data bytes that over-flow the specified receive - * data length, just ignore them. - */ - if ((TransferCfg->tx_count < TransferCfg->tx_length) \ - && (TransferCfg->tx_data != NULL)){ - I2Cx->I2DAT = *txdat++; - TransferCfg->tx_count++; - } - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - break; - - /* Data has been transmitted, NACK has been received, - * that means there's no more data to send, exit now */ - /* - * Note: Don't wait for stop event since in slave transmit mode, - * since there no proof lets us know when a stop signal has been received - * on slave side. - */ - case I2C_I2STAT_S_TX_DAT_NACK: - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - // enable time out - time_en = 1; - timeout = 0; - break; - - // Other status must be captured - default: - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - goto s_error; - } - } else if (time_en){ - if (timeout++ > I2C_SLAVE_TIME_OUT){ - // it's really a stop condition, goto end stage - goto s_end_stage; - } - } - } - -s_end_stage: - /* Clear AA bit to disable ACK on I2C bus */ - I2Cx->I2CONCLR = I2C_I2CONCLR_AAC; - // Check if there's no error during operation - // Update status - TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_DONE; - return SUCCESS; - -s_error: - /* Clear AA bit to disable ACK on I2C bus */ - I2Cx->I2CONCLR = I2C_I2CONCLR_AAC; - // Update status - TransferCfg->status = CodeStatus; - return ERROR; - } - - else if (Opt == I2C_TRANSFER_INTERRUPT){ - // Setup tx_rx data, callback and interrupt handler - tmp = I2C_getNum(I2Cx); - i2cdat[tmp].txrx_setup = (uint32_t) TransferCfg; - // Set direction phase, read first - i2cdat[tmp].dir = 1; - - // Enable AA - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC; - I2C_IntCmd(I2Cx, TRUE); - - return (SUCCESS); - } - - return ERROR; -} - -/*********************************************************************//** - * @brief Set Own slave address in I2C peripheral corresponding to - * parameter specified in OwnSlaveAddrConfigStruct. - * @param[in] I2Cx I2C peripheral selected, should be - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] OwnSlaveAddrConfigStruct Pointer to a I2C_OWNSLAVEADDR_CFG_Type - * structure that contains the configuration information for the -* specified I2C slave address. - * @return None - **********************************************************************/ -void I2C_SetOwnSlaveAddr(LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct) -{ - uint32_t tmp; - CHECK_PARAM(PARAM_I2Cx(I2Cx)); - CHECK_PARAM(PARAM_I2C_SLAVEADDR_CH(OwnSlaveAddrConfigStruct->SlaveAddrChannel)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(OwnSlaveAddrConfigStruct->GeneralCallState)); - - tmp = (((uint32_t)(OwnSlaveAddrConfigStruct->SlaveAddr_7bit << 1)) \ - | ((OwnSlaveAddrConfigStruct->GeneralCallState == ENABLE) ? 0x01 : 0x00))& I2C_I2ADR_BITMASK; - switch (OwnSlaveAddrConfigStruct->SlaveAddrChannel) - { - case 0: - I2Cx->I2ADR0 = tmp; - I2Cx->I2MASK0 = I2C_I2MASK_MASK((uint32_t) \ - (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue)); - break; - case 1: - I2Cx->I2ADR1 = tmp; - I2Cx->I2MASK1 = I2C_I2MASK_MASK((uint32_t) \ - (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue)); - break; - case 2: - I2Cx->I2ADR2 = tmp; - I2Cx->I2MASK2 = I2C_I2MASK_MASK((uint32_t) \ - (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue)); - break; - case 3: - I2Cx->I2ADR3 = tmp; - I2Cx->I2MASK3 = I2C_I2MASK_MASK((uint32_t) \ - (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue)); - break; - } -} - - -/*********************************************************************//** - * @brief Configures functionality in I2C monitor mode - * @param[in] I2Cx I2C peripheral selected, should be - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] MonitorCfgType Monitor Configuration type, should be: - * - I2C_MONITOR_CFG_SCL_OUTPUT: I2C module can 'stretch' - * the clock line (hold it low) until it has had time to - * respond to an I2C interrupt. - * - I2C_MONITOR_CFG_MATCHALL: When this bit is set to '1' - * and the I2C is in monitor mode, an interrupt will be - * generated on ANY address received. - * @param[in] NewState New State of this function, should be: - * - ENABLE: Enable this function. - * - DISABLE: Disable this function. - * @return None - **********************************************************************/ -void I2C_MonitorModeConfig(LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_I2Cx(I2Cx)); - CHECK_PARAM(PARAM_I2C_MONITOR_CFG(MonitorCfgType)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - I2Cx->MMCTRL |= MonitorCfgType; - } - else - { - I2Cx->MMCTRL &= (~MonitorCfgType) & I2C_I2MMCTRL_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Enable/Disable I2C monitor mode - * @param[in] I2Cx I2C peripheral selected, should be - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @param[in] NewState New State of this function, should be: - * - ENABLE: Enable monitor mode. - * - DISABLE: Disable monitor mode. - * @return None - **********************************************************************/ -void I2C_MonitorModeCmd(LPC_I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_I2Cx(I2Cx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - I2Cx->MMCTRL |= I2C_I2MMCTRL_MM_ENA; - I2Cx->I2CONSET = I2C_I2CONSET_AA; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC; - } - else - { - I2Cx->MMCTRL &= (~I2C_I2MMCTRL_MM_ENA) & I2C_I2MMCTRL_BITMASK; - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_AAC; - } - I2C_MonitorBufferIndex = 0; -} - - -/*********************************************************************//** - * @brief Get data from I2C data buffer in monitor mode. - * @param[in] I2Cx I2C peripheral selected, should be - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @return None - * Note: In monitor mode, the I2C module may lose the ability to stretch - * the clock (stall the bus) if the ENA_SCL bit is not set. This means that - * the processor will have a limited amount of time to read the contents of - * the data received on the bus. If the processor reads the I2DAT shift - * register, as it ordinarily would, it could have only one bit-time to - * respond to the interrupt before the received data is overwritten by - * new data. - **********************************************************************/ -uint8_t I2C_MonitorGetDatabuffer(LPC_I2C_TypeDef *I2Cx) -{ - CHECK_PARAM(PARAM_I2Cx(I2Cx)); - return ((uint8_t)(I2Cx->I2DATA_BUFFER)); -} - -/*********************************************************************//** - * @brief Get data from I2C data buffer in monitor mode. - * @param[in] I2Cx I2C peripheral selected, should be - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @return None - * Note: In monitor mode, the I2C module may lose the ability to stretch - * the clock (stall the bus) if the ENA_SCL bit is not set. This means that - * the processor will have a limited amount of time to read the contents of - * the data received on the bus. If the processor reads the I2DAT shift - * register, as it ordinarily would, it could have only one bit-time to - * respond to the interrupt before the received data is overwritten by - * new data. - **********************************************************************/ -BOOL_8 I2C_MonitorHandler(LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size) -{ - BOOL_8 ret=FALSE; - - I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; - - buffer[I2C_MonitorBufferIndex] = (uint8_t)(I2Cx->I2DATA_BUFFER); - I2C_MonitorBufferIndex++; - if(I2C_MonitorBufferIndex >= size) - { - ret = TRUE; - } - return ret; -} -/*********************************************************************//** - * @brief Get status of Master Transfer - * @param[in] I2Cx I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @return Master transfer status, could be: - * - TRUE master transfer completed - * - FALSE master transfer have not completed yet - **********************************************************************/ -uint32_t I2C_MasterTransferComplete(LPC_I2C_TypeDef *I2Cx) -{ - uint32_t retval, tmp; - tmp = I2C_getNum(I2Cx); - retval = I2C_MasterComplete[tmp]; - I2C_MasterComplete[tmp] = FALSE; - return retval; -} - -/*********************************************************************//** - * @brief Get status of Slave Transfer - * @param[in] I2Cx I2C peripheral selected, should be: - * - LPC_I2C0 - * - LPC_I2C1 - * - LPC_I2C2 - * @return Complete status, could be: TRUE/FALSE - **********************************************************************/ -uint32_t I2C_SlaveTransferComplete(LPC_I2C_TypeDef *I2Cx) -{ - uint32_t retval, tmp; - tmp = I2C_getNum(I2Cx); - retval = I2C_SlaveComplete[tmp]; - I2C_SlaveComplete[tmp] = FALSE; - return retval; -} - - - -/** - * @} - */ - -#endif /* _I2C */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_i2s.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,604 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_i2s.c 2010-09-23 -*//** -* @file lpc17xx_gpio.c -* @brief Contains all functions support for I2S firmware -* library on LPC17xx -* @version 3.1 -* @date 23. Sep. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup I2S - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_i2s.h" -#include "lpc17xx_clkpwr.h" - - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _I2S - -/* Private Functions ---------------------------------------------------------- */ - -static uint8_t i2s_GetWordWidth(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); -static uint8_t i2s_GetChannel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); - -/********************************************************************//** - * @brief Get I2S wordwidth value - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode is the I2S mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return The wordwidth value, should be: 8,16 or 32 - *********************************************************************/ -static uint8_t i2s_GetWordWidth(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) { - uint8_t value; - - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if (TRMode == I2S_TX_MODE) { - value = (I2Sx->I2SDAO) & 0x03; /* get wordwidth bit */ - } else { - value = (I2Sx->I2SDAI) & 0x03; /* get wordwidth bit */ - } - switch (value) { - case I2S_WORDWIDTH_8: - return 8; - case I2S_WORDWIDTH_16: - return 16; - default: - return 32; - } -} - -/********************************************************************//** - * @brief Get I2S channel value - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode is the I2S mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return The channel value, should be: 1(mono) or 2(stereo) - *********************************************************************/ -static uint8_t i2s_GetChannel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) { - uint8_t value; - - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if (TRMode == I2S_TX_MODE) { - value = ((I2Sx->I2SDAO) & 0x04)>>2; /* get bit[2] */ - } else { - value = ((I2Sx->I2SDAI) & 0x04)>>2; /* get bit[2] */ - } - if(value == I2S_MONO) return 1; - return 2; -} - -/* End of Private Functions --------------------------------------------------- */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup I2S_Public_Functions - * @{ - */ - -/********************************************************************//** - * @brief Initialize I2S - * - Turn on power and clock - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @return none - *********************************************************************/ -void I2S_Init(LPC_I2S_TypeDef *I2Sx) { - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - - // Turn on power and clock - CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCI2S, ENABLE); - LPC_I2S->I2SDAI = LPC_I2S->I2SDAO = 0x00; -} - -/********************************************************************//** - * @brief Configuration I2S, setting: - * - master/slave mode - * - wordwidth value - * - channel mode - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @param[in] ConfigStruct pointer to I2S_CFG_Type structure - * which will be initialized. - * @return none - *********************************************************************/ -void I2S_Config(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct) -{ - uint32_t bps, config; - - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - - CHECK_PARAM(PARAM_I2S_WORDWIDTH(ConfigStruct->wordwidth)); - CHECK_PARAM(PARAM_I2S_CHANNEL(ConfigStruct->mono)); - CHECK_PARAM(PARAM_I2S_STOP(ConfigStruct->stop)); - CHECK_PARAM(PARAM_I2S_RESET(ConfigStruct->reset)); - CHECK_PARAM(PARAM_I2S_WS_SEL(ConfigStruct->ws_sel)); - CHECK_PARAM(PARAM_I2S_MUTE(ConfigStruct->mute)); - - /* Setup clock */ - bps = (ConfigStruct->wordwidth +1)*8; - - /* Calculate audio config */ - config = (bps - 1)<<6 | (ConfigStruct->ws_sel)<<5 | (ConfigStruct->reset)<<4 | - (ConfigStruct->stop)<<3 | (ConfigStruct->mono)<<2 | (ConfigStruct->wordwidth); - - if(TRMode == I2S_RX_MODE){ - LPC_I2S->I2SDAI = config; - }else{ - LPC_I2S->I2SDAO = config; - } -} - -/********************************************************************//** - * @brief DeInitial both I2S transmit or receive - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @return none - *********************************************************************/ -void I2S_DeInit(LPC_I2S_TypeDef *I2Sx) { - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - - // Turn off power and clock - CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCI2S, DISABLE); -} - -/********************************************************************//** - * @brief Get I2S Buffer Level - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode Transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return current level of Transmit/Receive Buffer - *********************************************************************/ -uint8_t I2S_GetLevel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) -{ - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if(TRMode == I2S_TX_MODE) - { - return ((I2Sx->I2SSTATE >> 16) & 0xFF); - } - else - { - return ((I2Sx->I2SSTATE >> 8) & 0xFF); - } -} - -/********************************************************************//** - * @brief I2S Start: clear all STOP,RESET and MUTE bit, ready to operate - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @return none - *********************************************************************/ -void I2S_Start(LPC_I2S_TypeDef *I2Sx) -{ - //Clear STOP,RESET and MUTE bit - I2Sx->I2SDAO &= ~I2S_DAI_RESET; - I2Sx->I2SDAI &= ~I2S_DAI_RESET; - I2Sx->I2SDAO &= ~I2S_DAI_STOP; - I2Sx->I2SDAI &= ~I2S_DAI_STOP; - I2Sx->I2SDAO &= ~I2S_DAI_MUTE; -} - -/********************************************************************//** - * @brief I2S Send data - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] BufferData pointer to uint32_t is the data will be send - * @return none - *********************************************************************/ -void I2S_Send(LPC_I2S_TypeDef *I2Sx, uint32_t BufferData) { - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - - I2Sx->I2STXFIFO = BufferData; -} - -/********************************************************************//** - * @brief I2S Receive Data - * @param[in] I2Sx pointer to LPC_I2S_TypeDef - * @return received value - *********************************************************************/ -uint32_t I2S_Receive(LPC_I2S_TypeDef* I2Sx) { - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - - return (I2Sx->I2SRXFIFO); - -} - -/********************************************************************//** - * @brief I2S Pause - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return none - *********************************************************************/ -void I2S_Pause(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) { - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if (TRMode == I2S_TX_MODE) //Transmit mode - { - I2Sx->I2SDAO |= I2S_DAO_STOP; - } else //Receive mode - { - I2Sx->I2SDAI |= I2S_DAI_STOP; - } -} - -/********************************************************************//** - * @brief I2S Mute - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return none - *********************************************************************/ -void I2S_Mute(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) { - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if (TRMode == I2S_TX_MODE) //Transmit mode - { - I2Sx->I2SDAO |= I2S_DAO_MUTE; - } else //Receive mode - { - I2Sx->I2SDAI |= I2S_DAI_MUTE; - } -} - -/********************************************************************//** - * @brief I2S Stop - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return none - *********************************************************************/ -void I2S_Stop(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) { - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if (TRMode == I2S_TX_MODE) //Transmit mode - { - I2Sx->I2SDAO &= ~I2S_DAO_MUTE; - I2Sx->I2SDAO |= I2S_DAO_STOP; - I2Sx->I2SDAO |= I2S_DAO_RESET; - } else //Receive mode - { - I2Sx->I2SDAI |= I2S_DAI_STOP; - I2Sx->I2SDAI |= I2S_DAI_RESET; - } -} - -/********************************************************************//** - * @brief Set frequency for I2S - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] Freq is the frequency for I2S will be set. It can range - * from 16-96 kHz(16, 22.05, 32, 44.1, 48, 96kHz) - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return Status: ERROR or SUCCESS - *********************************************************************/ -Status I2S_FreqConfig(LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode) { - - uint32_t i2sMclk; - uint8_t bitrate, channel, wordwidth; - - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PRAM_I2S_FREQ(Freq)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - //set i2s reference is i2s_pclk/2 as default - i2sMclk = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_I2S)/2; - I2Sx->I2STXRATE = 1 | (1<<8); - I2Sx->I2SRXRATE = 1 | (1<<8); - if(TRMode == I2S_TX_MODE) - { - channel = i2s_GetChannel(I2Sx,I2S_TX_MODE); - wordwidth = i2s_GetWordWidth(I2Sx,I2S_TX_MODE); - } - else - { - channel = i2s_GetChannel(I2Sx,I2S_RX_MODE); - wordwidth = i2s_GetWordWidth(I2Sx,I2S_RX_MODE); - } - bitrate = i2sMclk/(Freq * channel * wordwidth) - 1; - if (TRMode == I2S_TX_MODE)// Transmitter - { - I2Sx->I2STXBITRATE = bitrate; - } else //Receiver - { - I2Sx->I2SRXBITRATE = bitrate; - } - return SUCCESS; -} - -/********************************************************************//** - * @brief I2S set bitrate - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] bitrate value will be set - * bitrate value should be in range: 0 .. 63 - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return none - *********************************************************************/ -void I2S_SetBitRate(LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode) -{ - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_BITRATE(bitrate)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if(TRMode == I2S_TX_MODE) - { - I2Sx->I2STXBITRATE = bitrate; - } - else - { - I2Sx->I2SRXBITRATE = bitrate; - } -} - -/********************************************************************//** - * @brief Configuration operating mode for I2S - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] ModeConfig pointer to I2S_MODEConf_Type will be used to - * configure - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return none - *********************************************************************/ -void I2S_ModeConfig(LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type* ModeConfig, - uint8_t TRMode) -{ - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_CLKSEL(ModeConfig->clksel)); - CHECK_PARAM(PARAM_I2S_4PIN(ModeConfig->fpin)); - CHECK_PARAM(PARAM_I2S_MCLK(ModeConfig->mcena)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if (TRMode == I2S_TX_MODE) { - I2Sx->I2STXMODE &= ~0x0F; //clear bit 3:0 in I2STXMODE register - if (ModeConfig->clksel == I2S_CLKSEL_MCLK) { - I2Sx->I2STXMODE |= 0x02; - } - if (ModeConfig->fpin == I2S_4PIN_ENABLE) { - I2Sx->I2STXMODE |= (1 << 2); - } - if (ModeConfig->mcena == I2S_MCLK_ENABLE) { - I2Sx->I2STXMODE |= (1 << 3); - } - } else { - I2Sx->I2SRXMODE &= ~0x0F; //clear bit 3:0 in I2STXMODE register - if (ModeConfig->clksel == I2S_CLKSEL_MCLK) { - I2Sx->I2SRXMODE |= 0x02; - } - if (ModeConfig->fpin == I2S_4PIN_ENABLE) { - I2Sx->I2SRXMODE |= (1 << 2); - } - if (ModeConfig->mcena == I2S_MCLK_ENABLE) { - I2Sx->I2SRXMODE |= (1 << 3); - } - } -} - -/********************************************************************//** - * @brief Configure DMA operation for I2S - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] DMAConfig pointer to I2S_DMAConf_Type will be used to configure - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return none - *********************************************************************/ -void I2S_DMAConfig(LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type* DMAConfig, - uint8_t TRMode) -{ - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_DMA(DMAConfig->DMAIndex)); - CHECK_PARAM(PARAM_I2S_DMA_DEPTH(DMAConfig->depth)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if (TRMode == I2S_RX_MODE) { - if (DMAConfig->DMAIndex == I2S_DMA_1) { - LPC_I2S->I2SDMA1 = (DMAConfig->depth) << 8; - } else { - LPC_I2S->I2SDMA2 = (DMAConfig->depth) << 8; - } - } else { - if (DMAConfig->DMAIndex == I2S_DMA_1) { - LPC_I2S->I2SDMA1 = (DMAConfig->depth) << 16; - } else { - LPC_I2S->I2SDMA2 = (DMAConfig->depth) << 16; - } - } -} - -/********************************************************************//** - * @brief Enable/Disable DMA operation for I2S - * @param[in] I2Sx: I2S peripheral selected, should be: LPC_I2S - * @param[in] DMAIndex chose what DMA is used, should be: - * - I2S_DMA_1 = 0: DMA1 - * - I2S_DMA_2 = 1: DMA2 - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @param[in] NewState is new state of DMA operation, should be: - * - ENABLE - * - DISABLE - * @return none - *********************************************************************/ -void I2S_DMACmd(LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode, - FunctionalState NewState) -{ - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - CHECK_PARAM(PARAM_I2S_DMA(DMAIndex)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - - if (TRMode == I2S_RX_MODE) { - if (DMAIndex == I2S_DMA_1) { - if (NewState == ENABLE) - I2Sx->I2SDMA1 |= 0x01; - else - I2Sx->I2SDMA1 &= ~0x01; - } else { - if (NewState == ENABLE) - I2Sx->I2SDMA2 |= 0x01; - else - I2Sx->I2SDMA2 &= ~0x01; - } - } else { - if (DMAIndex == I2S_DMA_1) { - if (NewState == ENABLE) - I2Sx->I2SDMA1 |= 0x02; - else - I2Sx->I2SDMA1 &= ~0x02; - } else { - if (NewState == ENABLE) - I2Sx->I2SDMA2 |= 0x02; - else - I2Sx->I2SDMA2 &= ~0x02; - } - } -} - -/********************************************************************//** - * @brief Configure IRQ for I2S - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @param[in] level is the FIFO level that triggers IRQ request - * @return none - *********************************************************************/ -void I2S_IRQConfig(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level) { - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_I2S_TRX(TRMode)); - CHECK_PARAM(PARAM_I2S_IRQ_LEVEL(level)); - - if (TRMode == I2S_RX_MODE) { - I2Sx->I2SIRQ |= (level << 8); - } else { - I2Sx->I2SIRQ |= (level << 16); - } -} - -/********************************************************************//** - * @brief Enable/Disable IRQ for I2S - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @param[in] NewState is new state of DMA operation, should be: - * - ENABLE - * - DISABLE - * @return none - *********************************************************************/ -void I2S_IRQCmd(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState) { - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (TRMode == I2S_RX_MODE) { - if (NewState == ENABLE) - I2Sx->I2SIRQ |= 0x01; - else - I2Sx->I2SIRQ &= ~0x01; - //Enable DMA - - } else { - if (NewState == ENABLE) - I2Sx->I2SIRQ |= 0x02; - else - I2Sx->I2SIRQ &= ~0x02; - } -} - -/********************************************************************//** - * @brief Get I2S interrupt status - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return FunctionState should be: - * - ENABLE: interrupt is enable - * - DISABLE: interrupt is disable - *********************************************************************/ -FunctionalState I2S_GetIRQStatus(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode) -{ - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - if(TRMode == I2S_TX_MODE) - return ((FunctionalState)((I2Sx->I2SIRQ >> 1)&0x01)); - else - return ((FunctionalState)((I2Sx->I2SIRQ)&0x01)); -} - -/********************************************************************//** - * @brief Get I2S interrupt depth - * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S - * @param[in] TRMode is transmit/receive mode, should be: - * - I2S_TX_MODE = 0: transmit mode - * - I2S_RX_MODE = 1: receive mode - * @return depth of FIFO level on which to create an irq request - *********************************************************************/ -uint8_t I2S_GetIRQDepth(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode) -{ - CHECK_PARAM(PARAM_I2Sx(I2Sx)); - if(TRMode == I2S_TX_MODE) - return (((I2Sx->I2SIRQ)>>16)&0xFF); - else - return (((I2Sx->I2SIRQ)>>8)&0xFF); -} -/** - * @} - */ - -#endif /* _I2S */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ - -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_libcfg_default.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,73 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_libcfg_default.c 2010-05-21 -*//** -* @file lpc17xx_libcfg_default.c -* @brief Library configuration source file (default), used to build -* library without examples -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Library group ----------------------------------------------------------- */ -/** @addtogroup LIBCFG_DEFAULT - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_libcfg_default.h" - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup LIBCFG_DEFAULT_Public_Functions - * @{ - */ - -#ifndef __BUILD_WITH_EXAMPLE__ - -#ifdef DEBUG -/******************************************************************************* -* @brief Reports the name of the source file and the source line number -* where the CHECK_PARAM error has occurred. -* @param[in] file Pointer to the source file name -* @param[in] line assert_param error line source number -* @return None -*******************************************************************************/ -void check_failed(uint8_t *file, uint32_t line) -{ - /* User can add his own implementation to report the file name and line number, - ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ - - /* Infinite loop */ - while(1); -} -#endif /* DEBUG */ - -#endif /* __BUILD_WITH_EXAMPLE__ */ - -/** - * @} - */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_mcpwm.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,506 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_mcpwm.c 2010-05-21 -*//** -* @file lpc17xx_mcpwm.c -* @brief Contains all functions support for Motor Control PWM firmware -* library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup MCPWM - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_mcpwm.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _MCPWM - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup MCPWM_Public_Functions - * @{ - */ - -/*********************************************************************//** - * @brief Initializes the MCPWM peripheral - * @param[in] MCPWMx Motor Control PWM peripheral selected, - * Should be: LPC_MCPWM - * @return None - **********************************************************************/ -void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx) -{ - - /* Turn On MCPWM PCLK */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCMC, ENABLE); - /* As default, peripheral clock for MCPWM module - * is set to FCCLK / 2 */ - // CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_MC, CLKPWR_PCLKSEL_CCLK_DIV_2); - - MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(0) | MCPWM_CAPCLR_CAP(1) | MCPWM_CAPCLR_CAP(2); - MCPWMx->MCINTFLAG_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \ - | MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \ - | MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2); - MCPWMx->MCINTEN_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \ - | MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \ - | MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2); -} - - -/*********************************************************************//** - * @brief Configures each channel in MCPWM peripheral according to the - * specified parameters in the MCPWM_CHANNEL_CFG_Type. - * @param[in] MCPWMx Motor Control PWM peripheral selected - * should be: LPC_MCPWM - * @param[in] channelNum Channel number, should be: 0..2. - * @param[in] channelSetup Pointer to a MCPWM_CHANNEL_CFG_Type structure -* that contains the configuration information for the -* specified MCPWM channel. - * @return None - **********************************************************************/ -void MCPWM_ConfigChannel(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, - MCPWM_CHANNEL_CFG_Type * channelSetup) -{ - if (channelNum <= 2) { - if (channelNum == 0) { - MCPWMx->MCTIM0 = channelSetup->channelTimercounterValue; - MCPWMx->MCPER0 = channelSetup->channelPeriodValue; - MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue; - } else if (channelNum == 1) { - MCPWMx->MCTIM1 = channelSetup->channelTimercounterValue; - MCPWMx->MCPER1 = channelSetup->channelPeriodValue; - MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue; - } else if (channelNum == 2) { - MCPWMx->MCTIM2 = channelSetup->channelTimercounterValue; - MCPWMx->MCPER2 = channelSetup->channelPeriodValue; - MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue; - } else { - return; - } - - if (channelSetup->channelType /* == MCPWM_CHANNEL_CENTER_MODE */){ - MCPWMx->MCCON_SET = MCPWM_CON_CENTER(channelNum); - } else { - MCPWMx->MCCON_CLR = MCPWM_CON_CENTER(channelNum); - } - - if (channelSetup->channelPolarity /* == MCPWM_CHANNEL_PASSIVE_HI */){ - MCPWMx->MCCON_SET = MCPWM_CON_POLAR(channelNum); - } else { - MCPWMx->MCCON_CLR = MCPWM_CON_POLAR(channelNum); - } - - if (channelSetup->channelDeadtimeEnable /* == ENABLE */){ - MCPWMx->MCCON_SET = MCPWM_CON_DTE(channelNum); - MCPWMx->MCDEADTIME &= ~(MCPWM_DT(channelNum, 0x3FF)); - MCPWMx->MCDEADTIME |= MCPWM_DT(channelNum, channelSetup->channelDeadtimeValue); - } else { - MCPWMx->MCCON_CLR = MCPWM_CON_DTE(channelNum); - } - - if (channelSetup->channelUpdateEnable /* == ENABLE */){ - MCPWMx->MCCON_CLR = MCPWM_CON_DISUP(channelNum); - } else { - MCPWMx->MCCON_SET = MCPWM_CON_DISUP(channelNum); - } - } -} - - -/*********************************************************************//** - * @brief Write to MCPWM shadow registers - Update the value for period - * and pulse width in MCPWM peripheral. - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be: LPC_MCPWM - * @param[in] channelNum Channel Number, should be: 0..2. - * @param[in] channelSetup Pointer to a MCPWM_CHANNEL_CFG_Type structure -* that contains the configuration information for the -* specified MCPWM channel. - * @return None - **********************************************************************/ -void MCPWM_WriteToShadow(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, - MCPWM_CHANNEL_CFG_Type *channelSetup) -{ - if (channelNum == 0){ - MCPWMx->MCPER0 = channelSetup->channelPeriodValue; - MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue; - } else if (channelNum == 1) { - MCPWMx->MCPER1 = channelSetup->channelPeriodValue; - MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue; - } else if (channelNum == 2) { - MCPWMx->MCPER2 = channelSetup->channelPeriodValue; - MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue; - } -} - - - -/*********************************************************************//** - * @brief Configures capture function in MCPWM peripheral - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be: LPC_MCPWM - * @param[in] channelNum MCI (Motor Control Input pin) number - * Should be: 0..2 - * @param[in] captureConfig Pointer to a MCPWM_CAPTURE_CFG_Type structure -* that contains the configuration information for the -* specified MCPWM capture. - * @return - **********************************************************************/ -void MCPWM_ConfigCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, - MCPWM_CAPTURE_CFG_Type *captureConfig) -{ - if (channelNum <= 2) { - - if (captureConfig->captureFalling /* == ENABLE */) { - MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum); - } else { - MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum); - } - - if (captureConfig->captureRising /* == ENABLE */) { - MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum); - } else { - MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum); - } - - if (captureConfig->timerReset /* == ENABLE */){ - MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_RT(captureConfig->captureChannel); - } else { - MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_RT(captureConfig->captureChannel); - } - - if (captureConfig->hnfEnable /* == ENABLE */){ - MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_HNFCAP(channelNum); - } else { - MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_HNFCAP(channelNum); - } - } -} - - -/*********************************************************************//** - * @brief Clears current captured value in specified capture channel - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be: LPC_MCPWM - * @param[in] captureChannel Capture channel number, should be: 0..2 - * @return None - **********************************************************************/ -void MCPWM_ClearCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel) -{ - MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(captureChannel); -} - -/*********************************************************************//** - * @brief Get current captured value in specified capture channel - * @param[in] MCPWMx Motor Control PWM peripheral selected, - * Should be: LPC_MCPWM - * @param[in] captureChannel Capture channel number, should be: 0..2 - * @return None - **********************************************************************/ -uint32_t MCPWM_GetCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel) -{ - if (captureChannel == 0){ - return (MCPWMx->MCCR0); - } else if (captureChannel == 1) { - return (MCPWMx->MCCR1); - } else if (captureChannel == 2) { - return (MCPWMx->MCCR2); - } - return (0); -} - - -/*********************************************************************//** - * @brief Configures Count control in MCPWM peripheral - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be: LPC_MCPWM - * @param[in] channelNum Channel number, should be: 0..2 - * @param[in] countMode Count mode, should be: - * - ENABLE: Enables count mode. - * - DISABLE: Disable count mode, the channel is in timer mode. - * @param[in] countConfig Pointer to a MCPWM_COUNT_CFG_Type structure -* that contains the configuration information for the -* specified MCPWM count control. - * @return None - **********************************************************************/ -void MCPWM_CountConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, - uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig) -{ - if (channelNum <= 2) { - if (countMode /* == ENABLE */){ - MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_CNTR(channelNum); - if (countConfig->countFalling /* == ENABLE */) { - MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum); - } else { - MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum); - } - if (countConfig->countRising /* == ENABLE */) { - MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum); - } else { - MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum); - } - } else { - MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_CNTR(channelNum); - } - } -} - - -/*********************************************************************//** - * @brief Start MCPWM activity for each MCPWM channel - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be: LPC_MCPWM - * @param[in] channel0 State of this command on channel 0: - * - ENABLE: 'Start' command will effect on channel 0 - * - DISABLE: 'Start' command will not effect on channel 0 - * @param[in] channel1 State of this command on channel 1: - * - ENABLE: 'Start' command will effect on channel 1 - * - DISABLE: 'Start' command will not effect on channel 1 - * @param[in] channel2 State of this command on channel 2: - * - ENABLE: 'Start' command will effect on channel 2 - * - DISABLE: 'Start' command will not effect on channel 2 - * @return None - **********************************************************************/ -void MCPWM_Start(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, - uint32_t channel1, uint32_t channel2) -{ - uint32_t regVal = 0; - regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) | (channel1 ? MCPWM_CON_RUN(1) : 0) \ - | (channel2 ? MCPWM_CON_RUN(2) : 0); - MCPWMx->MCCON_SET = regVal; -} - - -/*********************************************************************//** - * @brief Stop MCPWM activity for each MCPWM channel - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be: LPC_MCPWM - * @param[in] channel0 State of this command on channel 0: - * - ENABLE: 'Stop' command will effect on channel 0 - * - DISABLE: 'Stop' command will not effect on channel 0 - * @param[in] channel1 State of this command on channel 1: - * - ENABLE: 'Stop' command will effect on channel 1 - * - DISABLE: 'Stop' command will not effect on channel 1 - * @param[in] channel2 State of this command on channel 2: - * - ENABLE: 'Stop' command will effect on channel 2 - * - DISABLE: 'Stop' command will not effect on channel 2 - * @return None - **********************************************************************/ -void MCPWM_Stop(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, - uint32_t channel1, uint32_t channel2) -{ - uint32_t regVal = 0; - regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) | (channel1 ? MCPWM_CON_RUN(1) : 0) \ - | (channel2 ? MCPWM_CON_RUN(2) : 0); - MCPWMx->MCCON_CLR = regVal; -} - - -/*********************************************************************//** - * @brief Enables/Disables 3-phase AC motor mode on MCPWM peripheral - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be: LPC_MCPWM - * @param[in] acMode State of this command, should be: - * - ENABLE. - * - DISABLE. - * @return None - **********************************************************************/ -void MCPWM_ACMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode) -{ - if (acMode){ - MCPWMx->MCCON_SET = MCPWM_CON_ACMODE; - } else { - MCPWMx->MCCON_CLR = MCPWM_CON_ACMODE; - } -} - - -/*********************************************************************//** - * @brief Enables/Disables 3-phase DC motor mode on MCPWM peripheral - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be: LPC_MCPWM - * @param[in] dcMode State of this command, should be: - * - ENABLE. - * - DISABLE. - * @param[in] outputInvered Polarity of the MCOB outputs for all 3 channels, - * should be: - * - ENABLE: The MCOB outputs have opposite polarity - * from the MCOA outputs. - * - DISABLE: The MCOB outputs have the same basic - * polarity as the MCOA outputs. - * @param[in] outputPattern A value contains bits that enables/disables the specified - * output pins route to the internal MCOA0 signal, should be: - - MCPWM_PATENT_A0: MCOA0 tracks internal MCOA0 - - MCPWM_PATENT_B0: MCOB0 tracks internal MCOA0 - - MCPWM_PATENT_A1: MCOA1 tracks internal MCOA0 - - MCPWM_PATENT_B1: MCOB1 tracks internal MCOA0 - - MCPWM_PATENT_A2: MCOA2 tracks internal MCOA0 - - MCPWM_PATENT_B2: MCOB2 tracks internal MCOA0 - * @return None - * - * Note: all these outputPatent values above can be ORed together for using as input parameter. - **********************************************************************/ -void MCPWM_DCMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode, - uint32_t outputInvered, uint32_t outputPattern) -{ - if (dcMode){ - MCPWMx->MCCON_SET = MCPWM_CON_DCMODE; - } else { - MCPWMx->MCCON_CLR = MCPWM_CON_DCMODE; - } - - if (outputInvered) { - MCPWMx->MCCON_SET = MCPWM_CON_INVBDC; - } else { - MCPWMx->MCCON_CLR = MCPWM_CON_INVBDC; - } - - MCPWMx->MCCCP = outputPattern; -} - - -/*********************************************************************//** - * @brief Configures the specified interrupt in MCPWM peripheral - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be: LPC_MCPWM - * @param[in] ulIntType Interrupt type, should be: - * - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0) - * - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0) - * - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0) - * - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1) - * - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1) - * - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1) - * - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2) - * - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2) - * - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2) - * - MCPWM_INTFLAG_ABORT: Fast abort interrupt - * @param[in] NewState New State of this command, should be: - * - ENABLE. - * - DISABLE. - * @return None - * - * Note: all these ulIntType values above can be ORed together for using as input parameter. - **********************************************************************/ -void MCPWM_IntConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState) -{ - if (NewState) { - MCPWMx->MCINTEN_SET = ulIntType; - } else { - MCPWMx->MCINTEN_CLR = ulIntType; - } -} - - -/*********************************************************************//** - * @brief Sets/Forces the specified interrupt for MCPWM peripheral - * @param[in] MCPWMx Motor Control PWM peripheral selected - * Should be LPC_MCPWM - * @param[in] ulIntType Interrupt type, should be: - * - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0) - * - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0) - * - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0) - * - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1) - * - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1) - * - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1) - * - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2) - * - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2) - * - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2) - * - MCPWM_INTFLAG_ABORT: Fast abort interrupt - * @return None - * Note: all these ulIntType values above can be ORed together for using as input parameter. - **********************************************************************/ -void MCPWM_IntSet(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType) -{ - MCPWMx->MCINTFLAG_SET = ulIntType; -} - - -/*********************************************************************//** - * @brief Clear the specified interrupt pending for MCPWM peripheral - * @param[in] MCPWMx Motor Control PWM peripheral selected, - * should be: LPC_MCPWM - * @param[in] ulIntType Interrupt type, should be: - * - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0) - * - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0) - * - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0) - * - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1) - * - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1) - * - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1) - * - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2) - * - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2) - * - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2) - * - MCPWM_INTFLAG_ABORT: Fast abort interrupt - * @return None - * Note: all these ulIntType values above can be ORed together for using as input parameter. - **********************************************************************/ -void MCPWM_IntClear(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType) -{ - MCPWMx->MCINTFLAG_CLR = ulIntType; -} - - -/*********************************************************************//** - * @brief Check whether if the specified interrupt in MCPWM is set or not - * @param[in] MCPWMx Motor Control PWM peripheral selected, - * should be: LPC_MCPWM - * @param[in] ulIntType Interrupt type, should be: - * - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0) - * - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0) - * - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0) - * - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1) - * - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1) - * - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1) - * - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2) - * - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2) - * - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2) - * - MCPWM_INTFLAG_ABORT: Fast abort interrupt - * @return None - **********************************************************************/ -FlagStatus MCPWM_GetIntStatus(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType) -{ - return ((MCPWMx->MCINTFLAG & ulIntType) ? SET : RESET); -} - -/** - * @} - */ - -#endif /* _MCPWM */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_nvic.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,145 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_nvic.c 2010-05-21 -*//** -* @file lpc17xx_nvic.c -* @brief Contains all expansion functions support for -* NVIC firmware library on LPC17xx. The main -* NVIC functions are defined in core_cm3.h -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup NVIC - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_nvic.h" - - -/* Private Macros ------------------------------------------------------------- */ -/** @addtogroup NVIC_Private_Macros - * @{ - */ - -/* Vector table offset bit mask */ -#define NVIC_VTOR_MASK 0x3FFFFF80 - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup NVIC_Public_Functions - * @{ - */ - - -/*****************************************************************************//** - * @brief De-initializes the NVIC peripheral registers to their default - * reset values. - * @param None - * @return None - * - * These following NVIC peripheral registers will be de-initialized: - * - Disable Interrupt (32 IRQ interrupt sources that matched with LPC17xx) - * - Clear all Pending Interrupts (32 IRQ interrupt source that matched with LPC17xx) - * - Clear all Interrupt Priorities (32 IRQ interrupt source that matched with LPC17xx) - *******************************************************************************/ -void NVIC_DeInit(void) -{ - uint8_t tmp; - - /* Disable all interrupts */ - NVIC->ICER[0] = 0xFFFFFFFF; - NVIC->ICER[1] = 0x00000001; - /* Clear all pending interrupts */ - NVIC->ICPR[0] = 0xFFFFFFFF; - NVIC->ICPR[1] = 0x00000001; - - /* Clear all interrupt priority */ - for (tmp = 0; tmp < 32; tmp++) { - NVIC->IP[tmp] = 0x00; - } -} - -/*****************************************************************************//** - * @brief De-initializes the SCB peripheral registers to their default - * reset values. - * @param none - * @return none - * - * These following SCB NVIC peripheral registers will be de-initialized: - * - Interrupt Control State register - * - Interrupt Vector Table Offset register - * - Application Interrupt/Reset Control register - * - System Control register - * - Configuration Control register - * - System Handlers Priority Registers - * - System Handler Control and State Register - * - Configurable Fault Status Register - * - Hard Fault Status Register - * - Debug Fault Status Register - *******************************************************************************/ -void NVIC_SCBDeInit(void) -{ - uint8_t tmp; - - SCB->ICSR = 0x0A000000; - SCB->VTOR = 0x00000000; - SCB->AIRCR = 0x05FA0000; - SCB->SCR = 0x00000000; - SCB->CCR = 0x00000000; - - for (tmp = 0; tmp < 32; tmp++) { - SCB->SHP[tmp] = 0x00; - } - - SCB->SHCSR = 0x00000000; - SCB->CFSR = 0xFFFFFFFF; - SCB->HFSR = 0xFFFFFFFF; - SCB->DFSR = 0xFFFFFFFF; -} - - -/*****************************************************************************//** - * @brief Set Vector Table Offset value - * @param offset Offset value - * @return None - *******************************************************************************/ -void NVIC_SetVTOR(uint32_t offset) -{ -// SCB->VTOR = (offset & NVIC_VTOR_MASK); - SCB->VTOR = offset; -} - -/** - * @} - */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_pinsel.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,315 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_pinsel.c 2010-05-21 -*//** -* @file lpc17xx_pinsel.c -* @brief Contains all functions support for Pin connect block firmware -* library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup PINSEL - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_pinsel.h" - -/* Public Functions ----------------------------------------------------------- */ - -static void set_PinFunc ( uint8_t portnum, uint8_t pinnum, uint8_t funcnum); -static void set_ResistorMode ( uint8_t portnum, uint8_t pinnum, uint8_t modenum); -static void set_OpenDrainMode( uint8_t portnum, uint8_t pinnum, uint8_t modenum); - -/*********************************************************************//** - * @brief Setup the pin selection function - * @param[in] portnum PORT number, - * should be one of the following: - * - PINSEL_PORT_0 : Port 0 - * - PINSEL_PORT_1 : Port 1 - * - PINSEL_PORT_2 : Port 2 - * - PINSEL_PORT_3 : Port 3 - * - * @param[in] pinnum Pin number, - * should be one of the following: - - PINSEL_PIN_0 : Pin 0 - - PINSEL_PIN_1 : Pin 1 - - PINSEL_PIN_2 : Pin 2 - - PINSEL_PIN_3 : Pin 3 - - PINSEL_PIN_4 : Pin 4 - - PINSEL_PIN_5 : Pin 5 - - PINSEL_PIN_6 : Pin 6 - - PINSEL_PIN_7 : Pin 7 - - PINSEL_PIN_8 : Pin 8 - - PINSEL_PIN_9 : Pin 9 - - PINSEL_PIN_10 : Pin 10 - - PINSEL_PIN_11 : Pin 11 - - PINSEL_PIN_12 : Pin 12 - - PINSEL_PIN_13 : Pin 13 - - PINSEL_PIN_14 : Pin 14 - - PINSEL_PIN_15 : Pin 15 - - PINSEL_PIN_16 : Pin 16 - - PINSEL_PIN_17 : Pin 17 - - PINSEL_PIN_18 : Pin 18 - - PINSEL_PIN_19 : Pin 19 - - PINSEL_PIN_20 : Pin 20 - - PINSEL_PIN_21 : Pin 21 - - PINSEL_PIN_22 : Pin 22 - - PINSEL_PIN_23 : Pin 23 - - PINSEL_PIN_24 : Pin 24 - - PINSEL_PIN_25 : Pin 25 - - PINSEL_PIN_26 : Pin 26 - - PINSEL_PIN_27 : Pin 27 - - PINSEL_PIN_28 : Pin 28 - - PINSEL_PIN_29 : Pin 29 - - PINSEL_PIN_30 : Pin 30 - - PINSEL_PIN_31 : Pin 31 - - * @param[in] funcnum Function number, - * should be one of the following: - * - PINSEL_FUNC_0 : default function - * - PINSEL_FUNC_1 : first alternate function - * - PINSEL_FUNC_2 : second alternate function - * - PINSEL_FUNC_3 : third alternate function - * - * @return None - **********************************************************************/ -static void set_PinFunc ( uint8_t portnum, uint8_t pinnum, uint8_t funcnum) -{ - uint32_t pinnum_t = pinnum; - uint32_t pinselreg_idx = 2 * portnum; - volatile uint32_t *pPinCon = (volatile uint32_t *)&LPC_PINCON->PINSEL0; - - if (pinnum_t >= 16) { - pinnum_t -= 16; - pinselreg_idx++; - } - *(volatile uint32_t *)(pPinCon + pinselreg_idx) &= ~(0x03UL << (pinnum_t * 2)); - *(volatile uint32_t *)(pPinCon + pinselreg_idx) |= ((uint32_t)funcnum) << (pinnum_t * 2); -} - -/*********************************************************************//** - * @brief Setup resistor mode for each pin - * @param[in] portnum PORT number, - * should be one of the following: - * - PINSEL_PORT_0 : Port 0 - * - PINSEL_PORT_1 : Port 1 - * - PINSEL_PORT_2 : Port 2 - * - PINSEL_PORT_3 : Port 3 - * @param[in] pinnum Pin number, - * should be one of the following: - - PINSEL_PIN_0 : Pin 0 - - PINSEL_PIN_1 : Pin 1 - - PINSEL_PIN_2 : Pin 2 - - PINSEL_PIN_3 : Pin 3 - - PINSEL_PIN_4 : Pin 4 - - PINSEL_PIN_5 : Pin 5 - - PINSEL_PIN_6 : Pin 6 - - PINSEL_PIN_7 : Pin 7 - - PINSEL_PIN_8 : Pin 8 - - PINSEL_PIN_9 : Pin 9 - - PINSEL_PIN_10 : Pin 10 - - PINSEL_PIN_11 : Pin 11 - - PINSEL_PIN_12 : Pin 12 - - PINSEL_PIN_13 : Pin 13 - - PINSEL_PIN_14 : Pin 14 - - PINSEL_PIN_15 : Pin 15 - - PINSEL_PIN_16 : Pin 16 - - PINSEL_PIN_17 : Pin 17 - - PINSEL_PIN_18 : Pin 18 - - PINSEL_PIN_19 : Pin 19 - - PINSEL_PIN_20 : Pin 20 - - PINSEL_PIN_21 : Pin 21 - - PINSEL_PIN_22 : Pin 22 - - PINSEL_PIN_23 : Pin 23 - - PINSEL_PIN_24 : Pin 24 - - PINSEL_PIN_25 : Pin 25 - - PINSEL_PIN_26 : Pin 26 - - PINSEL_PIN_27 : Pin 27 - - PINSEL_PIN_28 : Pin 28 - - PINSEL_PIN_29 : Pin 29 - - PINSEL_PIN_30 : Pin 30 - - PINSEL_PIN_31 : Pin 31 - - * @param[in] modenum: Mode number, - * should be one of the following: - - PINSEL_PINMODE_PULLUP : Internal pull-up resistor - - PINSEL_PINMODE_TRISTATE : Tri-state - - PINSEL_PINMODE_PULLDOWN : Internal pull-down resistor - - * @return None - **********************************************************************/ -void set_ResistorMode ( uint8_t portnum, uint8_t pinnum, uint8_t modenum) -{ - uint32_t pinnum_t = pinnum; - uint32_t pinmodereg_idx = 2 * portnum; - volatile uint32_t *pPinCon = (volatile uint32_t *)&LPC_PINCON->PINMODE0; - - if (pinnum_t >= 16) { - pinnum_t -= 16; - pinmodereg_idx++ ; - } - - *(volatile uint32_t *)(pPinCon + pinmodereg_idx) &= ~(0x03UL << (pinnum_t * 2)); - *(volatile uint32_t *)(pPinCon + pinmodereg_idx) |= ((uint32_t)modenum) << (pinnum_t * 2); -} - -/*********************************************************************//** - * @brief Setup Open drain mode for each pin - * @param[in] portnum PORT number, - * should be one of the following: - * - PINSEL_PORT_0 : Port 0 - * - PINSEL_PORT_1 : Port 1 - * - PINSEL_PORT_2 : Port 2 - * - PINSEL_PORT_3 : Port 3 - * - * @param[in] pinnum Pin number, - * should be one of the following: - - PINSEL_PIN_0 : Pin 0 - - PINSEL_PIN_1 : Pin 1 - - PINSEL_PIN_2 : Pin 2 - - PINSEL_PIN_3 : Pin 3 - - PINSEL_PIN_4 : Pin 4 - - PINSEL_PIN_5 : Pin 5 - - PINSEL_PIN_6 : Pin 6 - - PINSEL_PIN_7 : Pin 7 - - PINSEL_PIN_8 : Pin 8 - - PINSEL_PIN_9 : Pin 9 - - PINSEL_PIN_10 : Pin 10 - - PINSEL_PIN_11 : Pin 11 - - PINSEL_PIN_12 : Pin 12 - - PINSEL_PIN_13 : Pin 13 - - PINSEL_PIN_14 : Pin 14 - - PINSEL_PIN_15 : Pin 15 - - PINSEL_PIN_16 : Pin 16 - - PINSEL_PIN_17 : Pin 17 - - PINSEL_PIN_18 : Pin 18 - - PINSEL_PIN_19 : Pin 19 - - PINSEL_PIN_20 : Pin 20 - - PINSEL_PIN_21 : Pin 21 - - PINSEL_PIN_22 : Pin 22 - - PINSEL_PIN_23 : Pin 23 - - PINSEL_PIN_24 : Pin 24 - - PINSEL_PIN_25 : Pin 25 - - PINSEL_PIN_26 : Pin 26 - - PINSEL_PIN_27 : Pin 27 - - PINSEL_PIN_28 : Pin 28 - - PINSEL_PIN_29 : Pin 29 - - PINSEL_PIN_30 : Pin 30 - - PINSEL_PIN_31 : Pin 31 - - * @param[in] modenum Open drain mode number, - * should be one of the following: - * - PINSEL_PINMODE_NORMAL : Pin is in the normal (not open drain) mode - * - PINSEL_PINMODE_OPENDRAIN : Pin is in the open drain mode - * - * @return None - **********************************************************************/ -void set_OpenDrainMode( uint8_t portnum, uint8_t pinnum, uint8_t modenum) -{ - volatile uint32_t *pPinCon = (volatile uint32_t *)&LPC_PINCON->PINMODE_OD0; - - if (modenum == PINSEL_PINMODE_OPENDRAIN){ - *(volatile uint32_t *)(pPinCon + portnum) |= (0x01UL << pinnum); - } else { - *(volatile uint32_t *)(pPinCon + portnum) &= ~(0x01UL << pinnum); - } -} - -/* End of Public Functions ---------------------------------------------------- */ - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup PINSEL_Public_Functions - * @{ - */ -/*********************************************************************//** - * @brief Configure trace function - * @param[in] NewState State of the Trace function configuration, - * should be one of the following: - * - ENABLE : Enable Trace Function - * - DISABLE : Disable Trace Function - * - * @return None - **********************************************************************/ -void PINSEL_ConfigTraceFunc(FunctionalState NewState) -{ - if (NewState == ENABLE) { - LPC_PINCON->PINSEL10 |= (0x01UL << 3); - } else if (NewState == DISABLE) { - LPC_PINCON->PINSEL10 &= ~(0x01UL << 3); - } -} - -/*********************************************************************//** - * @brief Setup I2C0 pins - * @param[in] i2cPinMode I2C pin mode, - * should be one of the following: - * - PINSEL_I2C_Normal_Mode : The standard drive mode - * - PINSEL_I2C_Fast_Mode : Fast Mode Plus drive mode - * - * @param[in] filterSlewRateEnable should be: - * - ENABLE: Enable filter and slew rate. - * - DISABLE: Disable filter and slew rate. - * - * @return None - **********************************************************************/ -void PINSEL_SetI2C0Pins(uint8_t i2cPinMode, FunctionalState filterSlewRateEnable) -{ - uint32_t regVal; - - if (i2cPinMode == PINSEL_I2C_Fast_Mode){ - regVal = PINSEL_I2CPADCFG_SCLDRV0 | PINSEL_I2CPADCFG_SDADRV0; - } - - if (filterSlewRateEnable == DISABLE){ - regVal = PINSEL_I2CPADCFG_SCLI2C0 | PINSEL_I2CPADCFG_SDAI2C0; - } - LPC_PINCON->I2CPADCFG = regVal; -} - - -/*********************************************************************//** - * @brief Configure Pin corresponding to specified parameters passed - * in the PinCfg - * @param[in] PinCfg Pointer to a PINSEL_CFG_Type structure - * that contains the configuration information for the - * specified pin. - * @return None - **********************************************************************/ -void PINSEL_ConfigPin(PINSEL_CFG_Type *PinCfg) -{ - set_PinFunc(PinCfg->Portnum, PinCfg->Pinnum, PinCfg->Funcnum); - set_ResistorMode(PinCfg->Portnum, PinCfg->Pinnum, PinCfg->Pinmode); - set_OpenDrainMode(PinCfg->Portnum, PinCfg->Pinnum, PinCfg->OpenDrain); -} - - -/** - * @} - */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_pwm.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,585 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_pwm.c 2011-03-31 -*//** -* @file lpc17xx_pwm.c -* @brief Contains all functions support for PWM firmware library on LPC17xx -* @version 2.1 -* @date 31. Mar. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2011, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup PWM - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_pwm.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _PWM - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup PWM_Public_Functions - * @{ - */ - - -/*********************************************************************//** - * @brief Check whether specified interrupt flag in PWM is set or not - * @param[in] PWMx: PWM peripheral, should be LPC_PWM1 - * @param[in] IntFlag: PWM interrupt flag, should be: - * - PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0 - * - PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1 - * - PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2 - * - PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3 - * - PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4 - * - PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5 - * - PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6 - * - PWM_INTSTAT_CAP0: Interrupt flag for capture input 0 - * - PWM_INTSTAT_CAP1: Interrupt flag for capture input 1 - * @return New State of PWM interrupt flag (SET or RESET) - **********************************************************************/ -IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag)); - - return ((PWMx->IR & IntFlag) ? SET : RESET); -} - - - -/*********************************************************************//** - * @brief Clear specified PWM Interrupt pending - * @param[in] PWMx: PWM peripheral, should be LPC_PWM1 - * @param[in] IntFlag: PWM interrupt flag, should be: - * - PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0 - * - PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1 - * - PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2 - * - PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3 - * - PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4 - * - PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5 - * - PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6 - * - PWM_INTSTAT_CAP0: Interrupt flag for capture input 0 - * - PWM_INTSTAT_CAP1: Interrupt flag for capture input 1 - * @return None - **********************************************************************/ -void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag)); - PWMx->IR = IntFlag; -} - - - -/*****************************************************************************//** -* @brief Fills each PWM_InitStruct member with its default value: -* - If PWMCounterMode = PWM_MODE_TIMER: -* + PrescaleOption = PWM_TIMER_PRESCALE_USVAL -* + PrescaleValue = 1 -* - If PWMCounterMode = PWM_MODE_COUNTER: -* + CountInputSelect = PWM_COUNTER_PCAP1_0 -* + CounterOption = PWM_COUNTER_RISING -* @param[in] PWMTimerCounterMode Timer or Counter mode, should be: -* - PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode -* - PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode -* @param[in] PWM_InitStruct Pointer to structure (PWM_TIMERCFG_Type or -* PWM_COUNTERCFG_Type) which will be initialized. -* @return None -* Note: PWM_InitStruct pointer will be assigned to corresponding structure -* (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode. -*******************************************************************************/ -void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct) -{ - PWM_TIMERCFG_Type *pTimeCfg; - PWM_COUNTERCFG_Type *pCounterCfg; - CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode)); - - pTimeCfg = (PWM_TIMERCFG_Type *) PWM_InitStruct; - pCounterCfg = (PWM_COUNTERCFG_Type *) PWM_InitStruct; - - if (PWMTimerCounterMode == PWM_MODE_TIMER ) - { - pTimeCfg->PrescaleOption = PWM_TIMER_PRESCALE_USVAL; - pTimeCfg->PrescaleValue = 1; - } - else if (PWMTimerCounterMode == PWM_MODE_COUNTER) - { - pCounterCfg->CountInputSelect = PWM_COUNTER_PCAP1_0; - pCounterCfg->CounterOption = PWM_COUNTER_RISING; - } -} - - -/*********************************************************************//** - * @brief Initializes the PWMx peripheral corresponding to the specified - * parameters in the PWM_ConfigStruct. - * @param[in] PWMx PWM peripheral, should be LPC_PWM1 - * @param[in] PWMTimerCounterMode Timer or Counter mode, should be: - * - PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode - * - PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode - * @param[in] PWM_ConfigStruct Pointer to structure (PWM_TIMERCFG_Type or - * PWM_COUNTERCFG_Type) which will be initialized. - * @return None - * Note: PWM_ConfigStruct pointer will be assigned to corresponding structure - * (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode. - **********************************************************************/ -void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct) -{ - PWM_TIMERCFG_Type *pTimeCfg; - PWM_COUNTERCFG_Type *pCounterCfg; - uint64_t clkdlycnt; - - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode)); - - pTimeCfg = (PWM_TIMERCFG_Type *)PWM_ConfigStruct; - pCounterCfg = (PWM_COUNTERCFG_Type *)PWM_ConfigStruct; - - - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, ENABLE); - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_PWM1, CLKPWR_PCLKSEL_CCLK_DIV_4); - // Get peripheral clock of PWM1 - clkdlycnt = (uint64_t) CLKPWR_GetPCLK (CLKPWR_PCLKSEL_PWM1); - - - // Clear all interrupts pending - PWMx->IR = 0xFF & PWM_IR_BITMASK; - PWMx->TCR = 0x00; - PWMx->CTCR = 0x00; - PWMx->MCR = 0x00; - PWMx->CCR = 0x00; - PWMx->PCR = 0x00; - PWMx->LER = 0x00; - - if (PWMTimerCounterMode == PWM_MODE_TIMER) - { - CHECK_PARAM(PARAM_PWM_TIMER_PRESCALE(pTimeCfg->PrescaleOption)); - - /* Absolute prescale value */ - if (pTimeCfg->PrescaleOption == PWM_TIMER_PRESCALE_TICKVAL) - { - PWMx->PR = pTimeCfg->PrescaleValue - 1; - } - /* uSecond prescale value */ - else - { - clkdlycnt = (clkdlycnt * pTimeCfg->PrescaleValue) / 1000000; - PWMx->PR = ((uint32_t) clkdlycnt) - 1; - } - - } - else if (PWMTimerCounterMode == PWM_MODE_COUNTER) - { - CHECK_PARAM(PARAM_PWM_COUNTER_INPUTSEL(pCounterCfg->CountInputSelect)); - CHECK_PARAM(PARAM_PWM_COUNTER_EDGE(pCounterCfg->CounterOption)); - - PWMx->CTCR |= (PWM_CTCR_MODE((uint32_t)pCounterCfg->CounterOption)) \ - | (PWM_CTCR_SELECT_INPUT((uint32_t)pCounterCfg->CountInputSelect)); - } -} - -/*********************************************************************//** - * @brief De-initializes the PWM peripheral registers to their -* default reset values. - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @return None - **********************************************************************/ -void PWM_DeInit (LPC_PWM_TypeDef *PWMx) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - - // Disable PWM control (timer, counter and PWM) - PWMx->TCR = 0x00; - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, DISABLE); - -} - - -/*********************************************************************//** - * @brief Enable/Disable PWM peripheral - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @param[in] NewState New State of this function, should be: - * - ENABLE: Enable PWM peripheral - * - DISABLE: Disable PWM peripheral - * @return None - **********************************************************************/ -void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - PWMx->TCR |= PWM_TCR_PWM_ENABLE; - } - else - { - PWMx->TCR &= (~PWM_TCR_PWM_ENABLE) & PWM_TCR_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Enable/Disable Counter in PWM peripheral - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @param[in] NewState New State of this function, should be: - * - ENABLE: Enable Counter in PWM peripheral - * - DISABLE: Disable Counter in PWM peripheral - * @return None - **********************************************************************/ -void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - if (NewState == ENABLE) - { - PWMx->TCR |= PWM_TCR_COUNTER_ENABLE; - } - else - { - PWMx->TCR &= (~PWM_TCR_COUNTER_ENABLE) & PWM_TCR_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Reset Counter in PWM peripheral - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @return None - **********************************************************************/ -void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - PWMx->TCR |= PWM_TCR_COUNTER_RESET; - PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK; -} - - -/*********************************************************************//** - * @brief Configures match for PWM peripheral - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @param[in] PWM_MatchConfigStruct Pointer to a PWM_MATCHCFG_Type structure -* that contains the configuration information for the -* specified PWM match function. - * @return None - **********************************************************************/ -void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(PWM_MatchConfigStruct->MatchChannel)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->IntOnMatch)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->ResetOnMatch)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->StopOnMatch)); - - //interrupt on MRn - if (PWM_MatchConfigStruct->IntOnMatch == ENABLE) - { - PWMx->MCR |= PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel); - } - else - { - PWMx->MCR &= (~PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \ - & PWM_MCR_BITMASK; - } - - //reset on MRn - if (PWM_MatchConfigStruct->ResetOnMatch == ENABLE) - { - PWMx->MCR |= PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel); - } - else - { - PWMx->MCR &= (~PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \ - & PWM_MCR_BITMASK; - } - - //stop on MRn - if (PWM_MatchConfigStruct->StopOnMatch == ENABLE) - { - PWMx->MCR |= PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel); - } - else - { - PWMx->MCR &= (~PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \ - & PWM_MCR_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Configures capture input for PWM peripheral - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @param[in] PWM_CaptureConfigStruct Pointer to a PWM_CAPTURECFG_Type structure -* that contains the configuration information for the -* specified PWM capture input function. - * @return None - **********************************************************************/ -void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(PWM_CaptureConfigStruct->CaptureChannel)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->FallingEdge)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->IntOnCaption)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->RisingEdge)); - - if (PWM_CaptureConfigStruct->RisingEdge == ENABLE) - { - PWMx->CCR |= PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel); - } - else - { - PWMx->CCR &= (~PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel)) \ - & PWM_CCR_BITMASK; - } - - if (PWM_CaptureConfigStruct->FallingEdge == ENABLE) - { - PWMx->CCR |= PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel); - } - else - { - PWMx->CCR &= (~PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel)) \ - & PWM_CCR_BITMASK; - } - - if (PWM_CaptureConfigStruct->IntOnCaption == ENABLE) - { - PWMx->CCR |= PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel); - } - else - { - PWMx->CCR &= (~PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel)) \ - & PWM_CCR_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Read value of capture register PWM peripheral - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @param[in] CaptureChannel: capture channel number, should be in - * range 0 to 1 - * @return Value of capture register - **********************************************************************/ -uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(CaptureChannel)); - - switch (CaptureChannel) - { - case 0: - return PWMx->CR0; - - case 1: - return PWMx->CR1; - - default: - return (0); - } -} - - -/********************************************************************//** - * @brief Update value for each PWM channel with update type option - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @param[in] MatchChannel Match channel - * @param[in] MatchValue Match value - * @param[in] UpdateType Type of Update, should be: - * - PWM_MATCH_UPDATE_NOW: The update value will be updated for - * this channel immediately - * - PWM_MATCH_UPDATE_NEXT_RST: The update value will be updated for - * this channel on next reset by a PWM Match event. - * @return None - *********************************************************************/ -void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \ - uint32_t MatchValue, uint8_t UpdateType) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(MatchChannel)); - CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType)); - - switch (MatchChannel) - { - case 0: - PWMx->MR0 = MatchValue; - break; - - case 1: - PWMx->MR1 = MatchValue; - break; - - case 2: - PWMx->MR2 = MatchValue; - break; - - case 3: - PWMx->MR3 = MatchValue; - break; - - case 4: - PWMx->MR4 = MatchValue; - break; - - case 5: - PWMx->MR5 = MatchValue; - break; - - case 6: - PWMx->MR6 = MatchValue; - break; - } - - // Write Latch register - PWMx->LER |= PWM_LER_EN_MATCHn_LATCH(MatchChannel); - - // In case of update now - if (UpdateType == PWM_MATCH_UPDATE_NOW) - { - PWMx->TCR |= PWM_TCR_COUNTER_RESET; - PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK; - } -} - -/********************************************************************//** - * @brief Update value for multi PWM channel with update type option - * at the same time - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @param[in] MatchStruct Structure that contents match value of 7 pwm channels - * @param[in] UpdateType Type of Update, should be: - * - PWM_MATCH_UPDATE_NOW: The update value will be updated for - * this channel immediately - * - PWM_MATCH_UPDATE_NEXT_RST: The update value will be updated for - * this channel on next reset by a PWM Match event. - * @return None - *********************************************************************/ -void PWM_MultiMatchUpdate(LPC_PWM_TypeDef *PWMx, PWM_Match_T *MatchStruct , uint8_t UpdateType) -{ - uint8_t LatchValue = 0; - uint8_t i; - - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType)); - - //Update match value - for(i=0;i<7;i++) - { - if(MatchStruct[i].Status == SET) - { - if(i<4) - *((volatile unsigned int *)(&(PWMx->MR0) + i)) = MatchStruct[i].Matchvalue; - else - { - *((volatile unsigned int *)(&(PWMx->MR4) + (i-4))) = MatchStruct[i].Matchvalue; - } - LatchValue |=(1<<i); - } - } - //set update for multi-channel at the same time - PWMx->LER = LatchValue; - - // In case of update now - if (UpdateType == PWM_MATCH_UPDATE_NOW) - { - PWMx->TCR |= PWM_TCR_COUNTER_RESET; - PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK; - } -} -/********************************************************************//** - * @brief Configure Edge mode for each PWM channel - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @param[in] PWMChannel PWM channel, should be in range from 2 to 6 - * @param[in] ModeOption PWM mode option, should be: - * - PWM_CHANNEL_SINGLE_EDGE: Single Edge mode - * - PWM_CHANNEL_DUAL_EDGE: Dual Edge mode - * @return None - * Note: PWM Channel 1 can not be selected for mode option - *********************************************************************/ -void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM1_EDGE_MODE_CHANNEL(PWMChannel)); - CHECK_PARAM(PARAM_PWM_CHANNEL_EDGE(ModeOption)); - - // Single edge mode - if (ModeOption == PWM_CHANNEL_SINGLE_EDGE) - { - PWMx->PCR &= (~PWM_PCR_PWMSELn(PWMChannel)) & PWM_PCR_BITMASK; - } - // Double edge mode - else if (PWM_CHANNEL_DUAL_EDGE) - { - PWMx->PCR |= PWM_PCR_PWMSELn(PWMChannel); - } -} - - - -/********************************************************************//** - * @brief Enable/Disable PWM channel output - * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1 - * @param[in] PWMChannel PWM channel, should be in range from 1 to 6 - * @param[in] NewState New State of this function, should be: - * - ENABLE: Enable this PWM channel output - * - DISABLE: Disable this PWM channel output - * @return None - *********************************************************************/ -void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_PWMx(PWMx)); - CHECK_PARAM(PARAM_PWM1_CHANNEL(PWMChannel)); - - if (NewState == ENABLE) - { - PWMx->PCR |= PWM_PCR_PWMENAn(PWMChannel); - } - else - { - PWMx->PCR &= (~PWM_PCR_PWMENAn(PWMChannel)) & PWM_PCR_BITMASK; - } -} - -/** - * @} - */ - -#endif /* _PWM */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_qei.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,511 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_qei.c 2010-05-21 -*//** -* @file lpc17xx_qei.c -* @brief Contains all functions support for QEI firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup QEI - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_qei.h" -#include "lpc17xx_clkpwr.h" - - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _QEI - -/* Private Types -------------------------------------------------------------- */ -/** @defgroup QEI_Private_Types QEI Private Types - * @{ - */ - -/** - * @brief QEI configuration union type definition - */ -typedef union { - QEI_CFG_Type bmQEIConfig; - uint32_t ulQEIConfig; -} QEI_CFGOPT_Type; - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup QEI_Public_Functions - * @{ - */ - -/*********************************************************************//** - * @brief Resets value for each type of QEI value, such as velocity, - * counter, position, etc.. - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulResetType QEI Reset Type, should be one of the following: - * - QEI_RESET_POS: Reset Position Counter - * - QEI_RESET_POSOnIDX: Reset Position Counter on Index signal - * - QEI_RESET_VEL: Reset Velocity - * - QEI_RESET_IDX: Reset Index Counter - * @return None - **********************************************************************/ -void QEI_Reset(LPC_QEI_TypeDef *QEIx, uint32_t ulResetType) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - CHECK_PARAM(PARAM_QEI_RESET(ulResetType)); - - QEIx->QEICON = ulResetType; -} - -/*********************************************************************//** - * @brief Initializes the QEI peripheral according to the specified -* parameters in the QEI_ConfigStruct. - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] QEI_ConfigStruct Pointer to a QEI_CFG_Type structure -* that contains the configuration information for the -* specified QEI peripheral - * @return None - **********************************************************************/ -void QEI_Init(LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct) -{ - - CHECK_PARAM(PARAM_QEIx(QEIx)); - CHECK_PARAM(PARAM_QEI_DIRINV(QEI_ConfigStruct->DirectionInvert)); - CHECK_PARAM(PARAM_QEI_SIGNALMODE(QEI_ConfigStruct->SignalMode)); - CHECK_PARAM(PARAM_QEI_CAPMODE(QEI_ConfigStruct->CaptureMode)); - CHECK_PARAM(PARAM_QEI_INVINX(QEI_ConfigStruct->InvertIndex)); - - /* Set up clock and power for QEI module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCQEI, ENABLE); - - /* As default, peripheral clock for QEI module - * is set to FCCLK / 2 */ - CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_QEI, CLKPWR_PCLKSEL_CCLK_DIV_1); - - // Reset all remaining value in QEI peripheral - QEIx->QEICON = QEI_CON_RESP | QEI_CON_RESV | QEI_CON_RESI; - QEIx->QEIMAXPOS = 0x00; - QEIx->CMPOS0 = 0x00; - QEIx->CMPOS1 = 0x00; - QEIx->CMPOS2 = 0x00; - QEIx->INXCMP = 0x00; - QEIx->QEILOAD = 0x00; - QEIx->VELCOMP = 0x00; - QEIx->FILTER = 0x00; - // Disable all Interrupt - QEIx->QEIIEC = QEI_IECLR_BITMASK; - // Clear all Interrupt pending - QEIx->QEICLR = QEI_INTCLR_BITMASK; - // Set QEI configuration value corresponding to its setting up value - QEIx->QEICONF = ((QEI_CFGOPT_Type *)QEI_ConfigStruct)->ulQEIConfig; -} - - -/*********************************************************************//** - * @brief De-initializes the QEI peripheral registers to their -* default reset values. - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @return None - **********************************************************************/ -void QEI_DeInit(LPC_QEI_TypeDef *QEIx) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - - /* Turn off clock and power for QEI module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCQEI, DISABLE); -} - - -/*****************************************************************************//** -* @brief Fills each QIE_InitStruct member with its default value: -* - DirectionInvert = QEI_DIRINV_NONE -* - SignalMode = QEI_SIGNALMODE_QUAD -* - CaptureMode = QEI_CAPMODE_4X -* - InvertIndex = QEI_INVINX_NONE -* @param[in] QIE_InitStruct Pointer to a QEI_CFG_Type structure -* which will be initialized. -* @return None -*******************************************************************************/ -void QEI_ConfigStructInit(QEI_CFG_Type *QIE_InitStruct) -{ - QIE_InitStruct->CaptureMode = QEI_CAPMODE_4X; - QIE_InitStruct->DirectionInvert = QEI_DIRINV_NONE; - QIE_InitStruct->InvertIndex = QEI_INVINX_NONE; - QIE_InitStruct->SignalMode = QEI_SIGNALMODE_QUAD; -} - - -/*********************************************************************//** - * @brief Check whether if specified flag status is set or not - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulFlagType Status Flag Type, should be one of the following: - * - QEI_STATUS_DIR: Direction Status - * @return New Status of this status flag (SET or RESET) - **********************************************************************/ -FlagStatus QEI_GetStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - CHECK_PARAM(PARAM_QEI_STATUS(ulFlagType)); - return ((QEIx->QEISTAT & ulFlagType) ? SET : RESET); -} - -/*********************************************************************//** - * @brief Get current position value in QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @return Current position value of QEI peripheral - **********************************************************************/ -uint32_t QEI_GetPosition(LPC_QEI_TypeDef *QEIx) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - return (QEIx->QEIPOS); -} - -/*********************************************************************//** - * @brief Set max position value for QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulMaxPos Max position value to set - * @return None - **********************************************************************/ -void QEI_SetMaxPosition(LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - QEIx->QEIMAXPOS = ulMaxPos; -} - -/*********************************************************************//** - * @brief Set position compare value for QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] bPosCompCh Compare Position channel, should be: - * - QEI_COMPPOS_CH_0: QEI compare position channel 0 - * - QEI_COMPPOS_CH_1: QEI compare position channel 1 - * - QEI_COMPPOS_CH_2: QEI compare position channel 2 - * @param[in] ulPosComp Compare Position value to set - * @return None - **********************************************************************/ -void QEI_SetPositionComp(LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp) -{ - volatile uint32_t *tmp; - - CHECK_PARAM(PARAM_QEIx(QEIx)); - CHECK_PARAM(PARAM_QEI_COMPPOS_CH(bPosCompCh)); - tmp = (volatile uint32_t *) (&(QEIx->CMPOS0) + bPosCompCh * 4); - *tmp = ulPosComp; - -} - -/*********************************************************************//** - * @brief Get current index counter of QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @return Current value of QEI index counter - **********************************************************************/ -uint32_t QEI_GetIndex(LPC_QEI_TypeDef *QEIx) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - return (QEIx->INXCNT); -} - -/*********************************************************************//** - * @brief Set value for index compare in QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulIndexComp Compare Index Value to set - * @return None - **********************************************************************/ -void QEI_SetIndexComp(LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - QEIx->INXCMP = ulIndexComp; -} - -/*********************************************************************//** - * @brief Set timer reload value for QEI peripheral. When the velocity timer is - * over-flow, the value that set for Timer Reload register will be loaded - * into the velocity timer for next period. The calculated velocity in RPM - * therefore will be affect by this value. - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] QEIReloadStruct QEI reload structure - * @return None - **********************************************************************/ -void QEI_SetTimerReload(LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct) -{ - uint64_t pclk; - - CHECK_PARAM(PARAM_QEIx(QEIx)); - CHECK_PARAM(PARAM_QEI_TIMERRELOAD(QEIReloadStruct->ReloadOption)); - - if (QEIReloadStruct->ReloadOption == QEI_TIMERRELOAD_TICKVAL) { - QEIx->QEILOAD = QEIReloadStruct->ReloadValue - 1; - } else { - pclk = (uint64_t)CLKPWR_GetPCLK(CLKPWR_PCLKSEL_QEI); - pclk = (pclk /(1000000/QEIReloadStruct->ReloadValue)) - 1; - QEIx->QEILOAD = (uint32_t)pclk; - } -} - -/*********************************************************************//** - * @brief Get current timer counter in QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @return Current timer counter in QEI peripheral - **********************************************************************/ -uint32_t QEI_GetTimer(LPC_QEI_TypeDef *QEIx) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - return (QEIx->QEITIME); -} - -/*********************************************************************//** - * @brief Get current velocity pulse counter in current time period - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @return Current velocity pulse counter value - **********************************************************************/ -uint32_t QEI_GetVelocity(LPC_QEI_TypeDef *QEIx) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - return (QEIx->QEIVEL); -} - -/*********************************************************************//** - * @brief Get the most recently measured velocity of the QEI. When - * the Velocity timer in QEI is over-flow, the current velocity - * value will be loaded into Velocity Capture register. - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @return The most recently measured velocity value - **********************************************************************/ -uint32_t QEI_GetVelocityCap(LPC_QEI_TypeDef *QEIx) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - return (QEIx->QEICAP); -} - -/*********************************************************************//** - * @brief Set Velocity Compare value for QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulVelComp Compare Velocity value to set - * @return None - **********************************************************************/ -void QEI_SetVelocityComp(LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - QEIx->VELCOMP = ulVelComp; -} - -/*********************************************************************//** - * @brief Set value of sampling count for the digital filter in - * QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulSamplingPulse Value of sampling count to set - * @return None - **********************************************************************/ -void QEI_SetDigiFilter(LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - QEIx->FILTER = ulSamplingPulse; -} - -/*********************************************************************//** - * @brief Check whether if specified interrupt flag status in QEI - * peripheral is set or not - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulIntType Interrupt Flag Status type, should be: - - QEI_INTFLAG_INX_Int: index pulse was detected interrupt - - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt - - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt - - QEI_INTFLAG_DIR_Int: Change of direction interrupt - - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt - - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt - - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the - current position interrupt - - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the - current position interrupt - - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the - current position interrupt - - QEI_INTFLAG_REV_Int: Index compare value is equal to the current - index count interrupt - - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt - - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt - - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt - * @return New State of specified interrupt flag status (SET or RESET) - **********************************************************************/ -FlagStatus QEI_GetIntStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType)); - - return((QEIx->QEIINTSTAT & ulIntType) ? SET : RESET); -} - -/*********************************************************************//** - * @brief Enable/Disable specified interrupt in QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulIntType Interrupt Flag Status type, should be: - * - QEI_INTFLAG_INX_Int: index pulse was detected interrupt - * - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt - * - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt - * - QEI_INTFLAG_DIR_Int: Change of direction interrupt - * - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt - * - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt - * - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the - * current position interrupt - * - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the - * current position interrupt - * - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the - * current position interrupt - * - QEI_INTFLAG_REV_Int: Index compare value is equal to the current - * index count interrupt - * - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt - * - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt - * - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt - * @param[in] NewState New function state, should be: - * - DISABLE - * - ENABLE - * @return None - **********************************************************************/ -void QEI_IntCmd(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) { - QEIx->QEIIES = ulIntType; - } else { - QEIx->QEIIEC = ulIntType; - } -} - - -/*********************************************************************//** - * @brief Sets (forces) specified interrupt in QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulIntType Interrupt Flag Status type, should be: - - QEI_INTFLAG_INX_Int: index pulse was detected interrupt - - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt - - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt - - QEI_INTFLAG_DIR_Int: Change of direction interrupt - - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt - - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt - - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the - current position interrupt - - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the - current position interrupt - - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the - current position interrupt - - QEI_INTFLAG_REV_Int: Index compare value is equal to the current - index count interrupt - - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt - - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt - - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt - * @return None - **********************************************************************/ -void QEI_IntSet(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType)); - - QEIx->QEISET = ulIntType; -} - -/*********************************************************************//** - * @brief Clear (force) specified interrupt (pending) in QEI peripheral - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulIntType Interrupt Flag Status type, should be: - - QEI_INTFLAG_INX_Int: index pulse was detected interrupt - - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt - - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt - - QEI_INTFLAG_DIR_Int: Change of direction interrupt - - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt - - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt - - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the - current position interrupt - - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the - current position interrupt - - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the - current position interrupt - - QEI_INTFLAG_REV_Int: Index compare value is equal to the current - index count interrupt - - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt - - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt - - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt - * @return None - **********************************************************************/ -void QEI_IntClear(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType) -{ - CHECK_PARAM(PARAM_QEIx(QEIx)); - CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType)); - - QEIx->QEICLR = ulIntType; -} - - -/*********************************************************************//** - * @brief Calculates the actual velocity in RPM passed via velocity - * capture value and Pulse Per Round (of the encoder) value - * parameter input. - * @param[in] QEIx QEI peripheral, should be LPC_QEI - * @param[in] ulVelCapValue Velocity capture input value that can - * be got from QEI_GetVelocityCap() function - * @param[in] ulPPR Pulse per round of encoder - * @return The actual value of velocity in RPM (Round per minute) - **********************************************************************/ -uint32_t QEI_CalculateRPM(LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR) -{ - uint64_t rpm, clock, Load, edges; - - // Get current Clock rate for timer input - clock = (uint64_t)CLKPWR_GetPCLK(CLKPWR_PCLKSEL_QEI); - // Get Timer load value (velocity capture period) - Load = (uint64_t)(QEIx->QEILOAD + 1); - // Get Edge - edges = (uint64_t)((QEIx->QEICONF & QEI_CONF_CAPMODE) ? 4 : 2); - // Calculate RPM - rpm = ((clock * ulVelCapValue * 60) / (Load * ulPPR * edges)); - - return (uint32_t)(rpm); -} - - -/** - * @} - */ - -#endif /* _QEI */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ - -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_rit.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,196 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_rit.c 2010-05-21 -*//** -* @file lpc17xx_rit.c -* @brief Contains all functions support for RIT firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup RIT - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_rit.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - -#ifdef _RIT - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup RIT_Public_Functions - * @{ - */ - -/******************************************************************************//* - * @brief Initial for RIT - * - Turn on power and clock - * - Setup default register values - * @param[in] RITx is RIT peripheral selected, should be: LPC_RIT - * @return None - *******************************************************************************/ -void RIT_Init(LPC_RIT_TypeDef *RITx) -{ - CHECK_PARAM(PARAM_RITx(RITx)); - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRIT, ENABLE); - //Set up default register values - RITx->RICOMPVAL = 0xFFFFFFFF; - RITx->RIMASK = 0x00000000; - RITx->RICTRL = 0x0C; - RITx->RICOUNTER = 0x00000000; - // Turn on power and clock - -} -/******************************************************************************//* - * @brief DeInitial for RIT - * - Turn off power and clock - * - ReSetup default register values - * @param[in] RITx is RIT peripheral selected, should be: LPC_RIT - * @return None - *******************************************************************************/ -void RIT_DeInit(LPC_RIT_TypeDef *RITx) -{ - CHECK_PARAM(PARAM_RITx(RITx)); - - // Turn off power and clock - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRIT, DISABLE); - //ReSetup default register values - RITx->RICOMPVAL = 0xFFFFFFFF; - RITx->RIMASK = 0x00000000; - RITx->RICTRL = 0x0C; - RITx->RICOUNTER = 0x00000000; -} - -/******************************************************************************//* - * @brief Set compare value, mask value and time counter value - * @param[in] RITx is RIT peripheral selected, should be: LPC_RIT - * @param[in] time_interval: timer interval value (ms) - * @return None - *******************************************************************************/ -void RIT_TimerConfig(LPC_RIT_TypeDef *RITx, uint32_t time_interval) -{ - uint32_t clock_rate, cmp_value; - CHECK_PARAM(PARAM_RITx(RITx)); - - // Get PCLK value of RIT - clock_rate = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_RIT); - - /* calculate compare value for RIT to generate interrupt at - * specified time interval - * COMPVAL = (RIT_PCLK * time_interval)/1000 - * (with time_interval unit is millisecond) - */ - cmp_value = (clock_rate /1000) * time_interval; - RITx->RICOMPVAL = cmp_value; - - /* Set timer enable clear bit to clear timer to 0 whenever - * counter value equals the contents of RICOMPVAL - */ - RITx->RICTRL |= (1<<1); -} - - -/******************************************************************************//* - * @brief Enable/Disable Timer - * @param[in] RITx is RIT peripheral selected, should be: LPC_RIT - * @param[in] NewState New State of this function - * -ENABLE: Enable Timer - * -DISABLE: Disable Timer - * @return None - *******************************************************************************/ -void RIT_Cmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_RITx(RITx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - //Enable or Disable Timer - if(NewState==ENABLE) - { - RITx->RICTRL |= RIT_CTRL_TEN; - } - else - { - RITx->RICTRL &= ~RIT_CTRL_TEN; - } -} - -/******************************************************************************//* - * @brief Timer Enable/Disable on debug - * @param[in] RITx is RIT peripheral selected, should be: LPC_RIT - * @param[in] NewState New State of this function - * -ENABLE: The timer is halted whenever a hardware break condition occurs - * -DISABLE: Hardware break has no effect on the timer operation - * @return None - *******************************************************************************/ -void RIT_TimerDebugCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_RITx(RITx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - //Timer Enable/Disable on break - if(NewState==ENABLE) - { - RITx->RICTRL |= RIT_CTRL_ENBR; - } - else - { - RITx->RICTRL &= ~RIT_CTRL_ENBR; - } -} -/******************************************************************************//* - * @brief Check whether interrupt flag is set or not - * @param[in] RITx is RIT peripheral selected, should be: LPC_RIT - * @return Current interrupt status, could be: SET/RESET - *******************************************************************************/ -IntStatus RIT_GetIntStatus(LPC_RIT_TypeDef *RITx) -{ - uint8_t result; - CHECK_PARAM(PARAM_RITx(RITx)); - if((RITx->RICTRL&RIT_CTRL_INTEN)==1) result= SET; - else return RESET; - //clear interrupt flag - RITx->RICTRL |= RIT_CTRL_INTEN; - return (IntStatus)result; -} - -/** - * @} - */ - -#endif /* _RIT */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_rtc.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,780 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_rtc.c 2011-06-06 -*//** -* @file lpc17xx_rtc.c -* @brief Contains all functions support for RTC firmware library on LPC17xx -* @version 3.1 -* @date 6. June. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2011, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup RTC - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_rtc.h" -#include "lpc17xx_clkpwr.h" - - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _RTC - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup RTC_Public_Functions - * @{ - */ - -/********************************************************************//** - * @brief Initializes the RTC peripheral. - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @return None - *********************************************************************/ -void RTC_Init (LPC_RTC_TypeDef *RTCx) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - - /* Set up clock and power for RTC module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRTC, ENABLE); - - // Clear all register to be default - RTCx->ILR = 0x00; - RTCx->CCR = 0x00; - RTCx->CIIR = 0x00; - RTCx->AMR = 0xFF; - RTCx->CALIBRATION = 0x00; -} - - -/*********************************************************************//** - * @brief De-initializes the RTC peripheral registers to their -* default reset values. - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @return None - **********************************************************************/ -void RTC_DeInit(LPC_RTC_TypeDef *RTCx) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - - RTCx->CCR = 0x00; - // Disable power and clock for RTC module - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRTC, DISABLE); -} - -/*********************************************************************//** - * @brief Reset clock tick counter in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @return None - **********************************************************************/ -void RTC_ResetClockTickCounter(LPC_RTC_TypeDef *RTCx) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - - RTCx->CCR |= RTC_CCR_CTCRST; - RTCx->CCR &= (~RTC_CCR_CTCRST) & RTC_CCR_BITMASK; -} - -/*********************************************************************//** - * @brief Start/Stop RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] NewState New State of this function, should be: - * - ENABLE: The time counters are enabled - * - DISABLE: The time counters are disabled - * @return None - **********************************************************************/ -void RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - RTCx->CCR |= RTC_CCR_CLKEN; - } - else - { - RTCx->CCR &= (~RTC_CCR_CLKEN) & RTC_CCR_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Enable/Disable Counter increment interrupt for each time type - * in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] CntIncrIntType: Counter Increment Interrupt type, - * an increment of this type value below will generates - * an interrupt, should be: - * - RTC_TIMETYPE_SECOND - * - RTC_TIMETYPE_MINUTE - * - RTC_TIMETYPE_HOUR - * - RTC_TIMETYPE_DAYOFWEEK - * - RTC_TIMETYPE_DAYOFMONTH - * - RTC_TIMETYPE_DAYOFYEAR - * - RTC_TIMETYPE_MONTH - * - RTC_TIMETYPE_YEAR - * @param[in] NewState New State of this function, should be: - * - ENABLE: Counter Increment interrupt for this - * time type are enabled - * - DISABLE: Counter Increment interrupt for this - * time type are disabled - * @return None - **********************************************************************/ -void RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, \ - FunctionalState NewState) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - CHECK_PARAM(PARAM_RTC_TIMETYPE(CntIncrIntType)); - - if (NewState == ENABLE) - { - switch (CntIncrIntType) - { - case RTC_TIMETYPE_SECOND: - RTCx->CIIR |= RTC_CIIR_IMSEC; - break; - case RTC_TIMETYPE_MINUTE: - RTCx->CIIR |= RTC_CIIR_IMMIN; - break; - case RTC_TIMETYPE_HOUR: - RTCx->CIIR |= RTC_CIIR_IMHOUR; - break; - case RTC_TIMETYPE_DAYOFWEEK: - RTCx->CIIR |= RTC_CIIR_IMDOW; - break; - case RTC_TIMETYPE_DAYOFMONTH: - RTCx->CIIR |= RTC_CIIR_IMDOM; - break; - case RTC_TIMETYPE_DAYOFYEAR: - RTCx->CIIR |= RTC_CIIR_IMDOY; - break; - case RTC_TIMETYPE_MONTH: - RTCx->CIIR |= RTC_CIIR_IMMON; - break; - case RTC_TIMETYPE_YEAR: - RTCx->CIIR |= RTC_CIIR_IMYEAR; - break; - } - } - else - { - switch (CntIncrIntType) - { - case RTC_TIMETYPE_SECOND: - RTCx->CIIR &= (~RTC_CIIR_IMSEC) & RTC_CIIR_BITMASK; - break; - case RTC_TIMETYPE_MINUTE: - RTCx->CIIR &= (~RTC_CIIR_IMMIN) & RTC_CIIR_BITMASK; - break; - case RTC_TIMETYPE_HOUR: - RTCx->CIIR &= (~RTC_CIIR_IMHOUR) & RTC_CIIR_BITMASK; - break; - case RTC_TIMETYPE_DAYOFWEEK: - RTCx->CIIR &= (~RTC_CIIR_IMDOW) & RTC_CIIR_BITMASK; - break; - case RTC_TIMETYPE_DAYOFMONTH: - RTCx->CIIR &= (~RTC_CIIR_IMDOM) & RTC_CIIR_BITMASK; - break; - case RTC_TIMETYPE_DAYOFYEAR: - RTCx->CIIR &= (~RTC_CIIR_IMDOY) & RTC_CIIR_BITMASK; - break; - case RTC_TIMETYPE_MONTH: - RTCx->CIIR &= (~RTC_CIIR_IMMON) & RTC_CIIR_BITMASK; - break; - case RTC_TIMETYPE_YEAR: - RTCx->CIIR &= (~RTC_CIIR_IMYEAR) & RTC_CIIR_BITMASK; - break; - } - } -} - - -/*********************************************************************//** - * @brief Enable/Disable Alarm interrupt for each time type - * in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] AlarmTimeType: Alarm Time Interrupt type, - * an matching of this type value below with current time - * in RTC will generates an interrupt, should be: - * - RTC_TIMETYPE_SECOND - * - RTC_TIMETYPE_MINUTE - * - RTC_TIMETYPE_HOUR - * - RTC_TIMETYPE_DAYOFWEEK - * - RTC_TIMETYPE_DAYOFMONTH - * - RTC_TIMETYPE_DAYOFYEAR - * - RTC_TIMETYPE_MONTH - * - RTC_TIMETYPE_YEAR - * @param[in] NewState New State of this function, should be: - * - ENABLE: Alarm interrupt for this - * time type are enabled - * - DISABLE: Alarm interrupt for this - * time type are disabled - * @return None - **********************************************************************/ -void RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, \ - FunctionalState NewState) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - CHECK_PARAM(PARAM_RTC_TIMETYPE(AlarmTimeType)); - - if (NewState == ENABLE) - { - switch (AlarmTimeType) - { - case RTC_TIMETYPE_SECOND: - RTCx->AMR &= (~RTC_AMR_AMRSEC) & RTC_AMR_BITMASK; - break; - case RTC_TIMETYPE_MINUTE: - RTCx->AMR &= (~RTC_AMR_AMRMIN) & RTC_AMR_BITMASK; - break; - case RTC_TIMETYPE_HOUR: - RTCx->AMR &= (~RTC_AMR_AMRHOUR) & RTC_AMR_BITMASK; - break; - case RTC_TIMETYPE_DAYOFWEEK: - RTCx->AMR &= (~RTC_AMR_AMRDOW) & RTC_AMR_BITMASK; - break; - case RTC_TIMETYPE_DAYOFMONTH: - RTCx->AMR &= (~RTC_AMR_AMRDOM) & RTC_AMR_BITMASK; - break; - case RTC_TIMETYPE_DAYOFYEAR: - RTCx->AMR &= (~RTC_AMR_AMRDOY) & RTC_AMR_BITMASK; - break; - case RTC_TIMETYPE_MONTH: - RTCx->AMR &= (~RTC_AMR_AMRMON) & RTC_AMR_BITMASK; - break; - case RTC_TIMETYPE_YEAR: - RTCx->AMR &= (~RTC_AMR_AMRYEAR) & RTC_AMR_BITMASK; - break; - } - } - else - { - switch (AlarmTimeType) - { - case RTC_TIMETYPE_SECOND: - RTCx->AMR |= (RTC_AMR_AMRSEC); - break; - case RTC_TIMETYPE_MINUTE: - RTCx->AMR |= (RTC_AMR_AMRMIN); - break; - case RTC_TIMETYPE_HOUR: - RTCx->AMR |= (RTC_AMR_AMRHOUR); - break; - case RTC_TIMETYPE_DAYOFWEEK: - RTCx->AMR |= (RTC_AMR_AMRDOW); - break; - case RTC_TIMETYPE_DAYOFMONTH: - RTCx->AMR |= (RTC_AMR_AMRDOM); - break; - case RTC_TIMETYPE_DAYOFYEAR: - RTCx->AMR |= (RTC_AMR_AMRDOY); - break; - case RTC_TIMETYPE_MONTH: - RTCx->AMR |= (RTC_AMR_AMRMON); - break; - case RTC_TIMETYPE_YEAR: - RTCx->AMR |= (RTC_AMR_AMRYEAR); - break; - } - } -} - - -/*********************************************************************//** - * @brief Set current time value for each time type in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] Timetype: Time Type, should be: - * - RTC_TIMETYPE_SECOND - * - RTC_TIMETYPE_MINUTE - * - RTC_TIMETYPE_HOUR - * - RTC_TIMETYPE_DAYOFWEEK - * - RTC_TIMETYPE_DAYOFMONTH - * - RTC_TIMETYPE_DAYOFYEAR - * - RTC_TIMETYPE_MONTH - * - RTC_TIMETYPE_YEAR - * @param[in] TimeValue Time value to set - * @return None - **********************************************************************/ -void RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_RTC_TIMETYPE(Timetype)); - - switch ( Timetype) - { - case RTC_TIMETYPE_SECOND: - CHECK_PARAM(TimeValue <= RTC_SECOND_MAX); - - RTCx->SEC = TimeValue & RTC_SEC_MASK; - break; - - case RTC_TIMETYPE_MINUTE: - CHECK_PARAM(TimeValue <= RTC_MINUTE_MAX); - - RTCx->MIN = TimeValue & RTC_MIN_MASK; - break; - - case RTC_TIMETYPE_HOUR: - CHECK_PARAM(TimeValue <= RTC_HOUR_MAX); - - RTCx->HOUR = TimeValue & RTC_HOUR_MASK; - break; - - case RTC_TIMETYPE_DAYOFWEEK: - CHECK_PARAM(TimeValue <= RTC_DAYOFWEEK_MAX); - - RTCx->DOW = TimeValue & RTC_DOW_MASK; - break; - - case RTC_TIMETYPE_DAYOFMONTH: - CHECK_PARAM((TimeValue <= RTC_DAYOFMONTH_MAX) \ - && (TimeValue >= RTC_DAYOFMONTH_MIN)); - - RTCx->DOM = TimeValue & RTC_DOM_MASK; - break; - - case RTC_TIMETYPE_DAYOFYEAR: - CHECK_PARAM((TimeValue >= RTC_DAYOFYEAR_MIN) \ - && (TimeValue <= RTC_DAYOFYEAR_MAX)); - - RTCx->DOY = TimeValue & RTC_DOY_MASK; - break; - - case RTC_TIMETYPE_MONTH: - CHECK_PARAM((TimeValue >= RTC_MONTH_MIN) \ - && (TimeValue <= RTC_MONTH_MAX)); - - RTCx->MONTH = TimeValue & RTC_MONTH_MASK; - break; - - case RTC_TIMETYPE_YEAR: - CHECK_PARAM(TimeValue <= RTC_YEAR_MAX); - - RTCx->YEAR = TimeValue & RTC_YEAR_MASK; - break; - } -} - -/*********************************************************************//** - * @brief Get current time value for each type time type - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] Timetype: Time Type, should be: - * - RTC_TIMETYPE_SECOND - * - RTC_TIMETYPE_MINUTE - * - RTC_TIMETYPE_HOUR - * - RTC_TIMETYPE_DAYOFWEEK - * - RTC_TIMETYPE_DAYOFMONTH - * - RTC_TIMETYPE_DAYOFYEAR - * - RTC_TIMETYPE_MONTH - * - RTC_TIMETYPE_YEAR - * @return Value of time according to specified time type - **********************************************************************/ -uint32_t RTC_GetTime(LPC_RTC_TypeDef *RTCx, uint32_t Timetype) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_RTC_TIMETYPE(Timetype)); - - switch (Timetype) - { - case RTC_TIMETYPE_SECOND: - return (RTCx->SEC & RTC_SEC_MASK); - case RTC_TIMETYPE_MINUTE: - return (RTCx->MIN & RTC_MIN_MASK); - case RTC_TIMETYPE_HOUR: - return (RTCx->HOUR & RTC_HOUR_MASK); - case RTC_TIMETYPE_DAYOFWEEK: - return (RTCx->DOW & RTC_DOW_MASK); - case RTC_TIMETYPE_DAYOFMONTH: - return (RTCx->DOM & RTC_DOM_MASK); - case RTC_TIMETYPE_DAYOFYEAR: - return (RTCx->DOY & RTC_DOY_MASK); - case RTC_TIMETYPE_MONTH: - return (RTCx->MONTH & RTC_MONTH_MASK); - case RTC_TIMETYPE_YEAR: - return (RTCx->YEAR & RTC_YEAR_MASK); - default: - return (0); - } -} - - -/*********************************************************************//** - * @brief Set full of time in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] pFullTime Pointer to a RTC_TIME_Type structure that - * contains time value in full. - * @return None - **********************************************************************/ -void RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - - RTCx->DOM = pFullTime->DOM & RTC_DOM_MASK; - RTCx->DOW = pFullTime->DOW & RTC_DOW_MASK; - RTCx->DOY = pFullTime->DOY & RTC_DOY_MASK; - RTCx->HOUR = pFullTime->HOUR & RTC_HOUR_MASK; - RTCx->MIN = pFullTime->MIN & RTC_MIN_MASK; - RTCx->SEC = pFullTime->SEC & RTC_SEC_MASK; - RTCx->MONTH = pFullTime->MONTH & RTC_MONTH_MASK; - RTCx->YEAR = pFullTime->YEAR & RTC_YEAR_MASK; -} - - -/*********************************************************************//** - * @brief Get full of time in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] pFullTime Pointer to a RTC_TIME_Type structure that - * will be stored time in full. - * @return None - **********************************************************************/ -void RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - - pFullTime->DOM = RTCx->DOM & RTC_DOM_MASK; - pFullTime->DOW = RTCx->DOW & RTC_DOW_MASK; - pFullTime->DOY = RTCx->DOY & RTC_DOY_MASK; - pFullTime->HOUR = RTCx->HOUR & RTC_HOUR_MASK; - pFullTime->MIN = RTCx->MIN & RTC_MIN_MASK; - pFullTime->SEC = RTCx->SEC & RTC_SEC_MASK; - pFullTime->MONTH = RTCx->MONTH & RTC_MONTH_MASK; - pFullTime->YEAR = RTCx->YEAR & RTC_YEAR_MASK; -} - - -/*********************************************************************//** - * @brief Set alarm time value for each time type - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] Timetype: Time Type, should be: - * - RTC_TIMETYPE_SECOND - * - RTC_TIMETYPE_MINUTE - * - RTC_TIMETYPE_HOUR - * - RTC_TIMETYPE_DAYOFWEEK - * - RTC_TIMETYPE_DAYOFMONTH - * - RTC_TIMETYPE_DAYOFYEAR - * - RTC_TIMETYPE_MONTH - * - RTC_TIMETYPE_YEAR - * @param[in] ALValue Alarm time value to set - * @return None - **********************************************************************/ -void RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - - switch (Timetype) - { - case RTC_TIMETYPE_SECOND: - CHECK_PARAM(ALValue <= RTC_SECOND_MAX); - - RTCx->ALSEC = ALValue & RTC_SEC_MASK; - break; - - case RTC_TIMETYPE_MINUTE: - CHECK_PARAM(ALValue <= RTC_MINUTE_MAX); - - RTCx->ALMIN = ALValue & RTC_MIN_MASK; - break; - - case RTC_TIMETYPE_HOUR: - CHECK_PARAM(ALValue <= RTC_HOUR_MAX); - - RTCx->ALHOUR = ALValue & RTC_HOUR_MASK; - break; - - case RTC_TIMETYPE_DAYOFWEEK: - CHECK_PARAM(ALValue <= RTC_DAYOFWEEK_MAX); - - RTCx->ALDOW = ALValue & RTC_DOW_MASK; - break; - - case RTC_TIMETYPE_DAYOFMONTH: - CHECK_PARAM((ALValue <= RTC_DAYOFMONTH_MAX) \ - && (ALValue >= RTC_DAYOFMONTH_MIN)); - - RTCx->ALDOM = ALValue & RTC_DOM_MASK; - break; - - case RTC_TIMETYPE_DAYOFYEAR: - CHECK_PARAM((ALValue >= RTC_DAYOFYEAR_MIN) \ - && (ALValue <= RTC_DAYOFYEAR_MAX)); - - RTCx->ALDOY = ALValue & RTC_DOY_MASK; - break; - - case RTC_TIMETYPE_MONTH: - CHECK_PARAM((ALValue >= RTC_MONTH_MIN) \ - && (ALValue <= RTC_MONTH_MAX)); - - RTCx->ALMON = ALValue & RTC_MONTH_MASK; - break; - - case RTC_TIMETYPE_YEAR: - CHECK_PARAM(ALValue <= RTC_YEAR_MAX); - - RTCx->ALYEAR = ALValue & RTC_YEAR_MASK; - break; - } -} - - - -/*********************************************************************//** - * @brief Get alarm time value for each time type - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] Timetype: Time Type, should be: - * - RTC_TIMETYPE_SECOND - * - RTC_TIMETYPE_MINUTE - * - RTC_TIMETYPE_HOUR - * - RTC_TIMETYPE_DAYOFWEEK - * - RTC_TIMETYPE_DAYOFMONTH - * - RTC_TIMETYPE_DAYOFYEAR - * - RTC_TIMETYPE_MONTH - * - RTC_TIMETYPE_YEAR - * @return Value of Alarm time according to specified time type - **********************************************************************/ -uint32_t RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype) -{ - switch (Timetype) - { - case RTC_TIMETYPE_SECOND: - return (RTCx->ALSEC & RTC_SEC_MASK); - case RTC_TIMETYPE_MINUTE: - return (RTCx->ALMIN & RTC_MIN_MASK); - case RTC_TIMETYPE_HOUR: - return (RTCx->ALHOUR & RTC_HOUR_MASK); - case RTC_TIMETYPE_DAYOFWEEK: - return (RTCx->ALDOW & RTC_DOW_MASK); - case RTC_TIMETYPE_DAYOFMONTH: - return (RTCx->ALDOM & RTC_DOM_MASK); - case RTC_TIMETYPE_DAYOFYEAR: - return (RTCx->ALDOY & RTC_DOY_MASK); - case RTC_TIMETYPE_MONTH: - return (RTCx->ALMON & RTC_MONTH_MASK); - case RTC_TIMETYPE_YEAR: - return (RTCx->ALYEAR & RTC_YEAR_MASK); - default: - return (0); - } -} - - -/*********************************************************************//** - * @brief Set full of alarm time in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] pFullTime Pointer to a RTC_TIME_Type structure that - * contains alarm time value in full. - * @return None - **********************************************************************/ -void RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - - RTCx->ALDOM = pFullTime->DOM & RTC_DOM_MASK; - RTCx->ALDOW = pFullTime->DOW & RTC_DOW_MASK; - RTCx->ALDOY = pFullTime->DOY & RTC_DOY_MASK; - RTCx->ALHOUR = pFullTime->HOUR & RTC_HOUR_MASK; - RTCx->ALMIN = pFullTime->MIN & RTC_MIN_MASK; - RTCx->ALSEC = pFullTime->SEC & RTC_SEC_MASK; - RTCx->ALMON = pFullTime->MONTH & RTC_MONTH_MASK; - RTCx->ALYEAR = pFullTime->YEAR & RTC_YEAR_MASK; -} - - -/*********************************************************************//** - * @brief Get full of alarm time in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] pFullTime Pointer to a RTC_TIME_Type structure that - * will be stored alarm time in full. - * @return None - **********************************************************************/ -void RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - - pFullTime->DOM = RTCx->ALDOM & RTC_DOM_MASK; - pFullTime->DOW = RTCx->ALDOW & RTC_DOW_MASK; - pFullTime->DOY = RTCx->ALDOY & RTC_DOY_MASK; - pFullTime->HOUR = RTCx->ALHOUR & RTC_HOUR_MASK; - pFullTime->MIN = RTCx->ALMIN & RTC_MIN_MASK; - pFullTime->SEC = RTCx->ALSEC & RTC_SEC_MASK; - pFullTime->MONTH = RTCx->ALMON & RTC_MONTH_MASK; - pFullTime->YEAR = RTCx->ALYEAR & RTC_YEAR_MASK; -} - - -/*********************************************************************//** - * @brief Check whether if specified Location interrupt in - * RTC peripheral is set or not - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] IntType Interrupt location type, should be: - * - RTC_INT_COUNTER_INCREASE: Counter Increment Interrupt - * block generated an interrupt. - * - RTC_INT_ALARM: Alarm generated an - * interrupt. - * @return New state of specified Location interrupt in RTC peripheral - * (SET or RESET) - **********************************************************************/ -IntStatus RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_RTC_INT(IntType)); - - return ((RTCx->ILR & IntType) ? SET : RESET); -} - - -/*********************************************************************//** - * @brief Clear specified Location interrupt pending in - * RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] IntType Interrupt location type, should be: - * - RTC_INT_COUNTER_INCREASE: Clear Counter Increment - * Interrupt pending. - * - RTC_INT_ALARM: Clear alarm interrupt pending - * @return None - **********************************************************************/ -void RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_RTC_INT(IntType)); - - RTCx->ILR |= IntType; -} - -/*********************************************************************//** - * @brief Enable/Disable calibration counter in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] NewState New State of this function, should be: - * - ENABLE: The calibration counter is enabled and counting - * - DISABLE: The calibration counter is disabled and reset to zero - * @return None - **********************************************************************/ -void RTC_CalibCounterCmd(LPC_RTC_TypeDef *RTCx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - RTCx->CCR &= (~RTC_CCR_CCALEN) & RTC_CCR_BITMASK; - } - else - { - RTCx->CCR |= RTC_CCR_CCALEN; - } -} - - -/*********************************************************************//** - * @brief Configures Calibration in RTC peripheral - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] CalibValue Calibration value, should be in range from - * 0 to 131,072 - * @param[in] CalibDir Calibration Direction, should be: - * - RTC_CALIB_DIR_FORWARD: Forward calibration - * - RTC_CALIB_DIR_BACKWARD: Backward calibration - * @return None - **********************************************************************/ -void RTC_CalibConfig(LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir) -{ - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_RTC_CALIB_DIR(CalibDir)); - CHECK_PARAM(CalibValue < RTC_CALIBRATION_MAX); - - RTCx->CALIBRATION = ((CalibValue - 1) & RTC_CALIBRATION_CALVAL_MASK) \ - | ((CalibDir == RTC_CALIB_DIR_BACKWARD) ? RTC_CALIBRATION_LIBDIR : 0); -} - - -/*********************************************************************//** - * @brief Write value to General purpose registers - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] Channel General purpose registers Channel number, - * should be in range from 0 to 4. - * @param[in] Value Value to write - * @return None - * Note: These General purpose registers can be used to store important - * information when the main power supply is off. The value in these - * registers is not affected by chip reset. - **********************************************************************/ -void RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value) -{ - volatile uint32_t *preg; - - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_RTC_GPREG_CH(Channel)); - - preg = (volatile uint32_t *)&RTCx->GPREG0; - preg += Channel; - *preg = Value; -} - - -/*********************************************************************//** - * @brief Read value from General purpose registers - * @param[in] RTCx RTC peripheral selected, should be LPC_RTC - * @param[in] Channel General purpose registers Channel number, - * should be in range from 0 to 4. - * @return Read Value - * Note: These General purpose registers can be used to store important - * information when the main power supply is off. The value in these - * registers is not affected by chip reset. - **********************************************************************/ -uint32_t RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel) -{ - volatile uint32_t *preg; - uint32_t value; - - CHECK_PARAM(PARAM_RTCx(RTCx)); - CHECK_PARAM(PARAM_RTC_GPREG_CH(Channel)); - - preg = (volatile uint32_t *)&RTCx->GPREG0; - preg += Channel; - value = *preg; - return (value); -} - -/** - * @} - */ - -#endif /* _RTC */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ - -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_spi.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,440 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_spi.c 2010-05-21 -*//** -* @file lpc17xx_spi.c -* @brief Contains all functions support for SPI firmware library on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup SPI - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_spi.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - -#ifdef _SPI - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup SPI_Public_Functions - * @{ - */ - -/*********************************************************************//** - * @brief Setup clock rate for SPI device - * @param[in] SPIx SPI peripheral definition, should be LPC_SPI - * @param[in] target_clock : clock of SPI (Hz) - * @return None - ***********************************************************************/ -void SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock) -{ - uint32_t spi_pclk; - uint32_t prescale, temp; - - CHECK_PARAM(PARAM_SPIx(SPIx)); - - if (SPIx == LPC_SPI){ - spi_pclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SPI); - } else { - return; - } - - prescale = 8; - // Find closest clock to target clock - while (1){ - temp = target_clock * prescale; - if (temp >= spi_pclk){ - break; - } - prescale += 2; - if(prescale >= 254){ - break; - } - } - - // Write to register - SPIx->SPCCR = SPI_SPCCR_COUNTER(prescale); -} - - -/*********************************************************************//** - * @brief De-initializes the SPIx peripheral registers to their -* default reset values. - * @param[in] SPIx SPI peripheral selected, should be LPC_SPI - * @return None - **********************************************************************/ -void SPI_DeInit(LPC_SPI_TypeDef *SPIx) -{ - CHECK_PARAM(PARAM_SPIx(SPIx)); - - if (SPIx == LPC_SPI){ - /* Set up clock and power for SPI module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, DISABLE); - } -} - -/*********************************************************************//** - * @brief Get data bit size per transfer - * @param[in] SPIx SPI peripheral selected, should be LPC_SPI - * @return number of bit per transfer, could be 8-16 - **********************************************************************/ -uint8_t SPI_GetDataSize (LPC_SPI_TypeDef *SPIx) -{ - CHECK_PARAM(PARAM_SPIx(SPIx)); - return ((SPIx->SPCR)>>8 & 0xF); -} - -/********************************************************************//** - * @brief Initializes the SPIx peripheral according to the specified -* parameters in the UART_ConfigStruct. - * @param[in] SPIx SPI peripheral selected, should be LPC_SPI - * @param[in] SPI_ConfigStruct Pointer to a SPI_CFG_Type structure -* that contains the configuration information for the -* specified SPI peripheral. - * @return None - *********************************************************************/ -void SPI_Init(LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct) -{ - uint32_t tmp; - - CHECK_PARAM(PARAM_SPIx(SPIx)); - - if(SPIx == LPC_SPI){ - /* Set up clock and power for UART module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, ENABLE); - } else { - return; - } - - // Configure SPI, interrupt is disable as default - tmp = ((SPI_ConfigStruct->CPHA) | (SPI_ConfigStruct->CPOL) \ - | (SPI_ConfigStruct->DataOrder) | (SPI_ConfigStruct->Databit) \ - | (SPI_ConfigStruct->Mode) | SPI_SPCR_BIT_EN) & SPI_SPCR_BITMASK; - // write back to SPI control register - SPIx->SPCR = tmp; - - // Set clock rate for SPI peripheral - SPI_SetClock(SPIx, SPI_ConfigStruct->ClockRate); - - // If interrupt flag is set, Write '1' to Clear interrupt flag - if (SPIx->SPINT & SPI_SPINT_INTFLAG){ - SPIx->SPINT = SPI_SPINT_INTFLAG; - } -} - - - -/*****************************************************************************//** -* @brief Fills each SPI_InitStruct member with its default value: -* - CPHA = SPI_CPHA_FIRST -* - CPOL = SPI_CPOL_HI -* - ClockRate = 1000000 -* - DataOrder = SPI_DATA_MSB_FIRST -* - Databit = SPI_DATABIT_8 -* - Mode = SPI_MASTER_MODE -* @param[in] SPI_InitStruct Pointer to a SPI_CFG_Type structure -* which will be initialized. -* @return None -*******************************************************************************/ -void SPI_ConfigStructInit(SPI_CFG_Type *SPI_InitStruct) -{ - SPI_InitStruct->CPHA = SPI_CPHA_FIRST; - SPI_InitStruct->CPOL = SPI_CPOL_HI; - SPI_InitStruct->ClockRate = 1000000; - SPI_InitStruct->DataOrder = SPI_DATA_MSB_FIRST; - SPI_InitStruct->Databit = SPI_DATABIT_8; - SPI_InitStruct->Mode = SPI_MASTER_MODE; -} - -/*********************************************************************//** - * @brief Transmit a single data through SPIx peripheral - * @param[in] SPIx SPI peripheral selected, should be LPC_SPI - * @param[in] Data Data to transmit (must be 16 or 8-bit long, - * this depend on SPI data bit number configured) - * @return none - **********************************************************************/ -void SPI_SendData(LPC_SPI_TypeDef* SPIx, uint16_t Data) -{ - CHECK_PARAM(PARAM_SPIx(SPIx)); - - SPIx->SPDR = Data & SPI_SPDR_BITMASK; -} - - - -/*********************************************************************//** - * @brief Receive a single data from SPIx peripheral - * @param[in] SPIx SPI peripheral selected, should be LPC_SPI - * @return Data received (16-bit long) - **********************************************************************/ -uint16_t SPI_ReceiveData(LPC_SPI_TypeDef* SPIx) -{ - CHECK_PARAM(PARAM_SPIx(SPIx)); - - return ((uint16_t) (SPIx->SPDR & SPI_SPDR_BITMASK)); -} - -/*********************************************************************//** - * @brief SPI Read write data function - * @param[in] SPIx Pointer to SPI peripheral, should be LPC_SPI - * @param[in] dataCfg Pointer to a SPI_DATA_SETUP_Type structure that - * contains specified information about transmit - * data configuration. - * @param[in] xfType Transfer type, should be: - * - SPI_TRANSFER_POLLING: Polling mode - * - SPI_TRANSFER_INTERRUPT: Interrupt mode - * @return Actual Data length has been transferred in polling mode. - * In interrupt mode, always return (0) - * Return (-1) if error. - * Note: This function can be used in both master and slave mode. - ***********************************************************************/ -int32_t SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, \ - SPI_TRANSFER_Type xfType) -{ - uint8_t *rdata8 = NULL; - uint8_t *wdata8 = NULL; - uint16_t *rdata16 = NULL; - uint16_t *wdata16 = NULL; - uint32_t stat = 0; - uint32_t temp; - uint8_t dataword; - - //read for empty buffer - temp = SPIx->SPDR; - //dummy to clear status - temp = SPIx->SPSR; - dataCfg->counter = 0; - dataCfg->status = 0; - - if(SPI_GetDataSize (SPIx) == 8) - dataword = 0; - else dataword = 1; - if (xfType == SPI_TRANSFER_POLLING){ - - if (dataword == 0){ - rdata8 = (uint8_t *)dataCfg->rx_data; - wdata8 = (uint8_t *)dataCfg->tx_data; - } else { - rdata16 = (uint16_t *)dataCfg->rx_data; - wdata16 = (uint16_t *)dataCfg->tx_data; - } - - while(dataCfg->counter < dataCfg->length) - { - // Write data to buffer - if(dataCfg->tx_data == NULL){ - if (dataword == 0){ - SPI_SendData(SPIx, 0xFF); - } else { - SPI_SendData(SPIx, 0xFFFF); - } - } else { - if (dataword == 0){ - SPI_SendData(SPIx, *wdata8); - wdata8++; - } else { - SPI_SendData(SPIx, *wdata16); - wdata16++; - } - } - // Wait for transfer complete - while (!((stat = SPIx->SPSR) & SPI_SPSR_SPIF)); - // Check for error - if (stat & (SPI_SPSR_ABRT | SPI_SPSR_MODF | SPI_SPSR_ROVR | SPI_SPSR_WCOL)){ - // save status - dataCfg->status = stat | SPI_STAT_ERROR; - return (dataCfg->counter); - } - // Read data from SPI dat - temp = (uint32_t) SPI_ReceiveData(SPIx); - - // Store data to destination - if (dataCfg->rx_data != NULL) - { - if (dataword == 0){ - *(rdata8) = (uint8_t) temp; - rdata8++; - } else { - *(rdata16) = (uint16_t) temp; - rdata16++; - } - } - // Increase counter - if (dataword == 0){ - dataCfg->counter++; - } else { - dataCfg->counter += 2; - } - } - - // Return length of actual data transferred - // save status - dataCfg->status = stat | SPI_STAT_DONE; - return (dataCfg->counter); - } - // Interrupt mode - else { - - // Check if interrupt flag is already set - if(SPIx->SPINT & SPI_SPINT_INTFLAG){ - SPIx->SPINT = SPI_SPINT_INTFLAG; - } - if (dataCfg->counter < dataCfg->length){ - // Write data to buffer - if(dataCfg->tx_data == NULL){ - if (dataword == 0){ - SPI_SendData(SPIx, 0xFF); - } else { - SPI_SendData(SPIx, 0xFFFF); - } - } else { - if (dataword == 0){ - SPI_SendData(SPIx, (*(uint8_t *)dataCfg->tx_data)); - } else { - SPI_SendData(SPIx, (*(uint16_t *)dataCfg->tx_data)); - } - } - SPI_IntCmd(SPIx, ENABLE); - } else { - // Save status - dataCfg->status = SPI_STAT_DONE; - } - return (0); - } -} - - -/********************************************************************//** - * @brief Enable or disable SPIx interrupt. - * @param[in] SPIx SPI peripheral selected, should be LPC_SPI - * @param[in] NewState New state of specified UART interrupt type, - * should be: - * - ENALBE: Enable this SPI interrupt. -* - DISALBE: Disable this SPI interrupt. - * @return None - *********************************************************************/ -void SPI_IntCmd(LPC_SPI_TypeDef *SPIx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_SPIx(SPIx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - SPIx->SPCR |= SPI_SPCR_SPIE; - } - else - { - SPIx->SPCR &= (~SPI_SPCR_SPIE) & SPI_SPCR_BITMASK; - } -} - - -/********************************************************************//** - * @brief Checks whether the SPI interrupt flag is set or not. - * @param[in] SPIx SPI peripheral selected, should be LPC_SPI - * @return The new state of SPI Interrupt Flag (SET or RESET) - *********************************************************************/ -IntStatus SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx) -{ - CHECK_PARAM(PARAM_SPIx(SPIx)); - - return ((SPIx->SPINT & SPI_SPINT_INTFLAG) ? SET : RESET); -} - -/********************************************************************//** - * @brief Clear SPI interrupt flag. - * @param[in] SPIx SPI peripheral selected, should be LPC_SPI - * @return None - *********************************************************************/ -void SPI_ClearIntPending(LPC_SPI_TypeDef *SPIx) -{ - CHECK_PARAM(PARAM_SPIx(SPIx)); - - SPIx->SPINT = SPI_SPINT_INTFLAG; -} - -/********************************************************************//** - * @brief Get current value of SPI Status register in SPIx peripheral. - * @param[in] SPIx SPI peripheral selected, should be LPC_SPI - * @return Current value of SPI Status register in SPI peripheral. - * Note: The return value of this function must be used with - * SPI_CheckStatus() to determine current flag status - * corresponding to each SPI status type. Because some flags in - * SPI Status register will be cleared after reading, the next reading - * SPI Status register could not be correct. So this function used to - * read SPI status register in one time only, then the return value - * used to check all flags. - *********************************************************************/ -uint32_t SPI_GetStatus(LPC_SPI_TypeDef* SPIx) -{ - CHECK_PARAM(PARAM_SPIx(SPIx)); - - return (SPIx->SPSR & SPI_SPSR_BITMASK); -} - -/********************************************************************//** - * @brief Checks whether the specified SPI Status flag is set or not - * via inputSPIStatus parameter. - * @param[in] inputSPIStatus Value to check status of each flag type. - * This value is the return value from SPI_GetStatus(). - * @param[in] SPIStatus Specifies the SPI status flag to check, - * should be one of the following: - - SPI_STAT_ABRT: Slave abort. - - SPI_STAT_MODF: Mode fault. - - SPI_STAT_ROVR: Read overrun. - - SPI_STAT_WCOL: Write collision. - - SPI_STAT_SPIF: SPI transfer complete. - * @return The new state of SPIStatus (SET or RESET) - *********************************************************************/ -FlagStatus SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus) -{ - CHECK_PARAM(PARAM_SPI_STAT(SPIStatus)); - - return ((inputSPIStatus & SPIStatus) ? SET : RESET); -} - - -/** - * @} - */ - -#endif /* _SPI */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_ssp.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,691 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_ssp.c 2010-06-18 -*//** -* @file lpc17xx_ssp.c -* @brief Contains all functions support for SSP firmware library on LPC17xx -* @version 3.0 -* @date 18. June. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup SSP - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_ssp.h" -#include "lpc17xx_clkpwr.h" - - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _SSP - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup SSP_Public_Functions - * @{ - */ -static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock); - -/*********************************************************************//** - * @brief Setup clock rate for SSP device - * @param[in] SSPx SSP peripheral definition, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] target_clock : clock of SSP (Hz) - * @return None - ***********************************************************************/ -static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock) -{ - uint32_t prescale, cr0_div, cmp_clk, ssp_clk; - - CHECK_PARAM(PARAM_SSPx(SSPx)); - - /* The SSP clock is derived from the (main system oscillator / 2), - so compute the best divider from that clock */ - if (SSPx == LPC_SSP0){ - ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP0); - } else if (SSPx == LPC_SSP1) { - ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP1); - } else { - return; - } - - /* Find closest divider to get at or under the target frequency. - Use smallest prescale possible and rely on the divider to get - the closest target frequency */ - cr0_div = 0; - cmp_clk = 0xFFFFFFFF; - prescale = 2; - while (cmp_clk > target_clock) - { - cmp_clk = ssp_clk / ((cr0_div + 1) * prescale); - if (cmp_clk > target_clock) - { - cr0_div++; - if (cr0_div > 0xFF) - { - cr0_div = 0; - prescale += 2; - } - } - } - - /* Write computed prescaler and divider back to register */ - SSPx->CR0 &= (~SSP_CR0_SCR(0xFF)) & SSP_CR0_BITMASK; - SSPx->CR0 |= (SSP_CR0_SCR(cr0_div)) & SSP_CR0_BITMASK; - SSPx->CPSR = prescale & SSP_CPSR_BITMASK; -} - -/** - * @} - */ - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup SSP_Public_Functions - * @{ - */ - -/********************************************************************//** - * @brief Initializes the SSPx peripheral according to the specified -* parameters in the SSP_ConfigStruct. - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] SSP_ConfigStruct Pointer to a SSP_CFG_Type structure -* that contains the configuration information for the -* specified SSP peripheral. - * @return None - *********************************************************************/ -void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct) -{ - uint32_t tmp; - - CHECK_PARAM(PARAM_SSPx(SSPx)); - - if(SSPx == LPC_SSP0) { - /* Set up clock and power for SSP0 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, ENABLE); - } else if(SSPx == LPC_SSP1) { - /* Set up clock and power for SSP1 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, ENABLE); - } else { - return; - } - - /* Configure SSP, interrupt is disable, LoopBack mode is disable, - * SSP is disable, Slave output is disable as default - */ - tmp = ((SSP_ConfigStruct->CPHA) | (SSP_ConfigStruct->CPOL) \ - | (SSP_ConfigStruct->FrameFormat) | (SSP_ConfigStruct->Databit)) - & SSP_CR0_BITMASK; - // write back to SSP control register - SSPx->CR0 = tmp; - - tmp = SSP_ConfigStruct->Mode & SSP_CR1_BITMASK; - // Write back to CR1 - SSPx->CR1 = tmp; - - // Set clock rate for SSP peripheral - setSSPclock(SSPx, SSP_ConfigStruct->ClockRate); -} - -/*********************************************************************//** - * @brief De-initializes the SSPx peripheral registers to their -* default reset values. - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @return None - **********************************************************************/ -void SSP_DeInit(LPC_SSP_TypeDef* SSPx) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - - if (SSPx == LPC_SSP0){ - /* Set up clock and power for SSP0 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, DISABLE); - } else if (SSPx == LPC_SSP1) { - /* Set up clock and power for SSP1 module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, DISABLE); - } -} - -/*****************************************************************************//** -* @brief Get data size bit selected -* @param[in] SSPx pointer to LPC_SSP_TypeDef structure, should be: -* - LPC_SSP0: SSP0 peripheral -* - LPC_SSP1: SSP1 peripheral -* @return Data size, could be: -* - SSP_DATABIT_4: 4 bit transfer -* - SSP_DATABIT_5: 5 bit transfer -* ... -* - SSP_DATABIT_16: 16 bit transfer -*******************************************************************************/ -uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - return (SSPx->CR0 & (0xF)); -} - -/*****************************************************************************//** -* @brief Fills each SSP_InitStruct member with its default value: -* - CPHA = SSP_CPHA_FIRST -* - CPOL = SSP_CPOL_HI -* - ClockRate = 1000000 -* - Databit = SSP_DATABIT_8 -* - Mode = SSP_MASTER_MODE -* - FrameFormat = SSP_FRAME_SSP -* @param[in] SSP_InitStruct Pointer to a SSP_CFG_Type structure -* which will be initialized. -* @return None -*******************************************************************************/ -void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct) -{ - SSP_InitStruct->CPHA = SSP_CPHA_FIRST; - SSP_InitStruct->CPOL = SSP_CPOL_HI; - SSP_InitStruct->ClockRate = 1000000; - SSP_InitStruct->Databit = SSP_DATABIT_8; - SSP_InitStruct->Mode = SSP_MASTER_MODE; - SSP_InitStruct->FrameFormat = SSP_FRAME_SPI; -} - - -/*********************************************************************//** - * @brief Enable or disable SSP peripheral's operation - * @param[in] SSPx SSP peripheral, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] NewState New State of SSPx peripheral's operation - * @return none - **********************************************************************/ -void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - SSPx->CR1 |= SSP_CR1_SSP_EN; - } - else - { - SSPx->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK; - } -} - -/*********************************************************************//** - * @brief Enable or disable Loop Back mode function in SSP peripheral - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] NewState New State of Loop Back mode, should be: - * - ENABLE: Enable this function - * - DISABLE: Disable this function - * @return None - **********************************************************************/ -void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - SSPx->CR1 |= SSP_CR1_LBM_EN; - } - else - { - SSPx->CR1 &= (~SSP_CR1_LBM_EN) & SSP_CR1_BITMASK; - } -} - -/*********************************************************************//** - * @brief Enable or disable Slave Output function in SSP peripheral - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] NewState New State of Slave Output function, should be: - * - ENABLE: Slave Output in normal operation - * - DISABLE: Slave Output is disabled. This blocks - * SSP controller from driving the transmit data - * line (MISO) - * Note: This function is available when SSP peripheral in Slave mode - * @return None - **********************************************************************/ -void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - SSPx->CR1 &= (~SSP_CR1_SO_DISABLE) & SSP_CR1_BITMASK; - } - else - { - SSPx->CR1 |= SSP_CR1_SO_DISABLE; - } -} - - - -/*********************************************************************//** - * @brief Transmit a single data through SSPx peripheral - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] Data Data to transmit (must be 16 or 8-bit long, - * this depend on SSP data bit number configured) - * @return none - **********************************************************************/ -void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - - SSPx->DR = SSP_DR_BITMASK(Data); -} - - - -/*********************************************************************//** - * @brief Receive a single data from SSPx peripheral - * @param[in] SSPx SSP peripheral selected, should be - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @return Data received (16-bit long) - **********************************************************************/ -uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - - return ((uint16_t) (SSP_DR_BITMASK(SSPx->DR))); -} - -/*********************************************************************//** - * @brief SSP Read write data function - * @param[in] SSPx Pointer to SSP peripheral, should be - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] dataCfg Pointer to a SSP_DATA_SETUP_Type structure that - * contains specified information about transmit - * data configuration. - * @param[in] xfType Transfer type, should be: - * - SSP_TRANSFER_POLLING: Polling mode - * - SSP_TRANSFER_INTERRUPT: Interrupt mode - * @return Actual Data length has been transferred in polling mode. - * In interrupt mode, always return (0) - * Return (-1) if error. - * Note: This function can be used in both master and slave mode. - ***********************************************************************/ -int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \ - SSP_TRANSFER_Type xfType) -{ - uint8_t *rdata8 = NULL; - uint8_t *wdata8 = NULL; - uint16_t *rdata16 = NULL; - uint16_t *wdata16 = NULL; - uint32_t stat; - uint32_t tmp; - int32_t dataword; - - dataCfg->rx_cnt = 0; - dataCfg->tx_cnt = 0; - dataCfg->status = 0; - - - /* Clear all remaining data in RX FIFO */ - while (SSPx->SR & SSP_SR_RNE){ - tmp = (uint32_t) SSP_ReceiveData(SSPx); - } - - // Clear status - SSPx->ICR = SSP_ICR_BITMASK; - if(SSP_GetDataSize(SSPx)>8) - dataword = 1; - else dataword = 0; - - // Polling mode ---------------------------------------------------------------------- - if (xfType == SSP_TRANSFER_POLLING){ - if (dataword == 0){ - rdata8 = (uint8_t *)dataCfg->rx_data; - wdata8 = (uint8_t *)dataCfg->tx_data; - } else { - rdata16 = (uint16_t *)dataCfg->rx_data; - wdata16 = (uint16_t *)dataCfg->tx_data; - } - while ((dataCfg->tx_cnt != dataCfg->length) || (dataCfg->rx_cnt != dataCfg->length)){ - if ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt != dataCfg->length)){ - // Write data to buffer - if(dataCfg->tx_data == NULL){ - if (dataword == 0){ - SSP_SendData(SSPx, 0xFF); - dataCfg->tx_cnt++; - } else { - SSP_SendData(SSPx, 0xFFFF); - dataCfg->tx_cnt += 2; - } - } else { - if (dataword == 0){ - SSP_SendData(SSPx, *wdata8); - wdata8++; - dataCfg->tx_cnt++; - } else { - SSP_SendData(SSPx, *wdata16); - wdata16++; - dataCfg->tx_cnt += 2; - } - } - } - - // Check overrun error - if ((stat = SSPx->RIS) & SSP_RIS_ROR){ - // save status and return - dataCfg->status = stat | SSP_STAT_ERROR; - return (-1); - } - - // Check for any data available in RX FIFO - while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt != dataCfg->length)){ - // Read data from SSP data - tmp = SSP_ReceiveData(SSPx); - - // Store data to destination - if (dataCfg->rx_data != NULL) - { - if (dataword == 0){ - *(rdata8) = (uint8_t) tmp; - rdata8++; - } else { - *(rdata16) = (uint16_t) tmp; - rdata16++; - } - } - // Increase counter - if (dataword == 0){ - dataCfg->rx_cnt++; - } else { - dataCfg->rx_cnt += 2; - } - } - } - - // save status - dataCfg->status = SSP_STAT_DONE; - - if (dataCfg->tx_data != NULL){ - return dataCfg->tx_cnt; - } else if (dataCfg->rx_data != NULL){ - return dataCfg->rx_cnt; - } else { - return (0); - } - } - - // Interrupt mode ---------------------------------------------------------------------- - else if (xfType == SSP_TRANSFER_INTERRUPT){ - - while ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt != dataCfg->length)){ - // Write data to buffer - if(dataCfg->tx_data == NULL){ - if (dataword == 0){ - SSP_SendData(SSPx, 0xFF); - dataCfg->tx_cnt++; - } else { - SSP_SendData(SSPx, 0xFFFF); - dataCfg->tx_cnt += 2; - } - } else { - if (dataword == 0){ - SSP_SendData(SSPx, (*(uint8_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt))); - dataCfg->tx_cnt++; - } else { - SSP_SendData(SSPx, (*(uint16_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt))); - dataCfg->tx_cnt += 2; - } - } - - // Check error - if ((stat = SSPx->RIS) & SSP_RIS_ROR){ - // save status and return - dataCfg->status = stat | SSP_STAT_ERROR; - return (-1); - } - - // Check for any data available in RX FIFO - while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt != dataCfg->length)){ - // Read data from SSP data - tmp = SSP_ReceiveData(SSPx); - - // Store data to destination - if (dataCfg->rx_data != NULL) - { - if (dataword == 0){ - *(uint8_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint8_t) tmp; - } else { - *(uint16_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint16_t) tmp; - } - } - // Increase counter - if (dataword == 0){ - dataCfg->rx_cnt++; - } else { - dataCfg->rx_cnt += 2; - } - } - } - - // If there more data to sent or receive - if ((dataCfg->rx_cnt != dataCfg->length) || (dataCfg->tx_cnt != dataCfg->length)){ - // Enable all interrupt - SSPx->IMSC = SSP_IMSC_BITMASK; - } else { - // Save status - dataCfg->status = SSP_STAT_DONE; - } - return (0); - } - - return (-1); -} - -/*********************************************************************//** - * @brief Checks whether the specified SSP status flag is set or not - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] FlagType Type of flag to check status, should be one - * of following: - * - SSP_STAT_TXFIFO_EMPTY: TX FIFO is empty - * - SSP_STAT_TXFIFO_NOTFULL: TX FIFO is not full - * - SSP_STAT_RXFIFO_NOTEMPTY: RX FIFO is not empty - * - SSP_STAT_RXFIFO_FULL: RX FIFO is full - * - SSP_STAT_BUSY: SSP peripheral is busy - * @return New State of specified SSP status flag - **********************************************************************/ -FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - CHECK_PARAM(PARAM_SSP_STAT(FlagType)); - - return ((SSPx->SR & FlagType) ? SET : RESET); -} - -/*********************************************************************//** - * @brief Enable or disable specified interrupt type in SSP peripheral - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] IntType Interrupt type in SSP peripheral, should be: - * - SSP_INTCFG_ROR: Receive Overrun interrupt - * - SSP_INTCFG_RT: Receive Time out interrupt - * - SSP_INTCFG_RX: RX FIFO is at least half full interrupt - * - SSP_INTCFG_TX: TX FIFO is at least half empty interrupt - * @param[in] NewState New State of specified interrupt type, should be: - * - ENABLE: Enable this interrupt type - * - DISABLE: Disable this interrupt type - * @return None - * Note: We can enable/disable multi-interrupt type by OR multi value - **********************************************************************/ -void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - - if (NewState == ENABLE) - { - SSPx->IMSC |= IntType; - } - else - { - SSPx->IMSC &= (~IntType) & SSP_IMSC_BITMASK; - } -} - -/*********************************************************************//** - * @brief Check whether the specified Raw interrupt status flag is - * set or not - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] RawIntType Raw Interrupt Type, should be: - * - SSP_INTSTAT_RAW_ROR: Receive Overrun interrupt - * - SSP_INTSTAT_RAW_RT: Receive Time out interrupt - * - SSP_INTSTAT_RAW_RX: RX FIFO is at least half full interrupt - * - SSP_INTSTAT_RAW_TX: TX FIFO is at least half empty interrupt - * @return New State of specified Raw interrupt status flag in SSP peripheral - * Note: Enabling/Disabling specified interrupt in SSP peripheral does not - * effect to Raw Interrupt Status flag. - **********************************************************************/ -IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - CHECK_PARAM(PARAM_SSP_INTSTAT_RAW(RawIntType)); - - return ((SSPx->RIS & RawIntType) ? SET : RESET); -} - -/*********************************************************************//** - * @brief Get Raw Interrupt Status register - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @return Raw Interrupt Status (RIS) register value - **********************************************************************/ -uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - return (SSPx->RIS); -} - -/*********************************************************************//** - * @brief Check whether the specified interrupt status flag is - * set or not - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] IntType Raw Interrupt Type, should be: - * - SSP_INTSTAT_ROR: Receive Overrun interrupt - * - SSP_INTSTAT_RT: Receive Time out interrupt - * - SSP_INTSTAT_RX: RX FIFO is at least half full interrupt - * - SSP_INTSTAT_TX: TX FIFO is at least half empty interrupt - * @return New State of specified interrupt status flag in SSP peripheral - * Note: Enabling/Disabling specified interrupt in SSP peripheral effects - * to Interrupt Status flag. - **********************************************************************/ -IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - CHECK_PARAM(PARAM_SSP_INTSTAT(IntType)); - - return ((SSPx->MIS & IntType) ? SET :RESET); -} - -/*********************************************************************//** - * @brief Clear specified interrupt pending in SSP peripheral - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] IntType Interrupt pending to clear, should be: - * - SSP_INTCLR_ROR: clears the "frame was received when - * RxFIFO was full" interrupt. - * - SSP_INTCLR_RT: clears the "Rx FIFO was not empty and - * has not been read for a timeout period" interrupt. - * @return None - **********************************************************************/ -void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - CHECK_PARAM(PARAM_SSP_INTCLR(IntType)); - - SSPx->ICR = IntType; -} - -/*********************************************************************//** - * @brief Enable/Disable DMA function for SSP peripheral - * @param[in] SSPx SSP peripheral selected, should be: - * - LPC_SSP0: SSP0 peripheral - * - LPC_SSP1: SSP1 peripheral - * @param[in] DMAMode Type of DMA, should be: - * - SSP_DMA_TX: DMA for the transmit FIFO - * - SSP_DMA_RX: DMA for the Receive FIFO - * @param[in] NewState New State of DMA function on SSP peripheral, - * should be: - * - ENALBE: Enable this function - * - DISABLE: Disable this function - * @return None - **********************************************************************/ -void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_SSPx(SSPx)); - CHECK_PARAM(PARAM_SSP_DMA(DMAMode)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - SSPx->DMACR |= DMAMode; - } - else - { - SSPx->DMACR &= (~DMAMode) & SSP_DMA_BITMASK; - } -} - -/** - * @} - */ - -#endif /* _SSP */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ - -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_systick.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,190 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_systick.c 2010-05-21 -*//** -* @file lpc17xx_systick.c -* @brief Contains all functions support for SYSTICK firmware library -* on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup SYSTICK - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_systick.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _SYSTICK - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup SYSTICK_Public_Functions - * @{ - */ -/*********************************************************************//** - * @brief Initial System Tick with using internal CPU clock source - * @param[in] time time interval(ms) - * @return None - **********************************************************************/ -void SYSTICK_InternalInit(uint32_t time) -{ - uint32_t cclk; - float maxtime; - - cclk = SystemCoreClock; - /* With internal CPU clock frequency for LPC17xx is 'SystemCoreClock' - * And limit 24 bit for RELOAD value - * So the maximum time can be set: - * 1/SystemCoreClock * (2^24) * 1000 (ms) - */ - //check time value is available or not - maxtime = (1<<24)/(SystemCoreClock / 1000) ; - if(time > maxtime) - //Error loop - while(1); - else - { - //Select CPU clock is System Tick clock source - SysTick->CTRL |= ST_CTRL_CLKSOURCE; - /* Set RELOAD value - * RELOAD = (SystemCoreClock/1000) * time - 1 - * with time base is millisecond - */ - SysTick->LOAD = (cclk/1000)*time - 1; - } -} - -/*********************************************************************//** - * @brief Initial System Tick with using external clock source - * @param[in] freq external clock frequency(Hz) - * @param[in] time time interval(ms) - * @return None - **********************************************************************/ -void SYSTICK_ExternalInit(uint32_t freq, uint32_t time) -{ - float maxtime; - - /* With external clock frequency for LPC17xx is 'freq' - * And limit 24 bit for RELOAD value - * So the maximum time can be set: - * 1/freq * (2^24) * 1000 (ms) - */ - //check time value is available or not - maxtime = (1<<24)/(freq / 1000) ; - if (time>maxtime) - //Error Loop - while(1); - else - { - //Select external clock is System Tick clock source - SysTick->CTRL &= ~ ST_CTRL_CLKSOURCE; - /* Set RELOAD value - * RELOAD = (freq/1000) * time - 1 - * with time base is millisecond - */ - maxtime = (freq/1000)*time - 1; - SysTick->LOAD = (freq/1000)*time - 1; - } -} - -/*********************************************************************//** - * @brief Enable/disable System Tick counter - * @param[in] NewState System Tick counter status, should be: - * - ENABLE - * - DISABLE - * @return None - **********************************************************************/ -void SYSTICK_Cmd(FunctionalState NewState) -{ - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if(NewState == ENABLE) - //Enable System Tick counter - SysTick->CTRL |= ST_CTRL_ENABLE; - else - //Disable System Tick counter - SysTick->CTRL &= ~ST_CTRL_ENABLE; -} - -/*********************************************************************//** - * @brief Enable/disable System Tick interrupt - * @param[in] NewState System Tick interrupt status, should be: - * - ENABLE - * - DISABLE - * @return None - **********************************************************************/ -void SYSTICK_IntCmd(FunctionalState NewState) -{ - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if(NewState == ENABLE) - //Enable System Tick counter - SysTick->CTRL |= ST_CTRL_TICKINT; - else - //Disable System Tick counter - SysTick->CTRL &= ~ST_CTRL_TICKINT; -} - -/*********************************************************************//** - * @brief Get current value of System Tick counter - * @param[in] None - * @return current value of System Tick counter - **********************************************************************/ -uint32_t SYSTICK_GetCurrentValue(void) -{ - return (SysTick->VAL); -} - -/*********************************************************************//** - * @brief Clear Counter flag - * @param[in] None - * @return None - **********************************************************************/ -void SYSTICK_ClearCounterFlag(void) -{ - SysTick->CTRL &= ~ST_CTRL_COUNTFLAG; -} -/** - * @} - */ - -#endif /* _SYSTICK */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ - -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_timer.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,606 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_timer.c 2011-03-10 -*//** -* @file lpc17xx_timer.c -* @brief Contains all functions support for Timer firmware library -* on LPC17xx -* @version 3.1 -* @date 10. March. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2011, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup TIM - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_timer.h" -#include "lpc17xx_clkpwr.h" -#include "lpc17xx_pinsel.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - -#ifdef _TIM - -/* Private Functions ---------------------------------------------------------- */ - -static uint32_t getPClock (uint32_t timernum); -static uint32_t converUSecToVal (uint32_t timernum, uint32_t usec); -static uint32_t converPtrToTimeNum (LPC_TIM_TypeDef *TIMx); - - -/*********************************************************************//** - * @brief Get peripheral clock of each timer controller - * @param[in] timernum Timer number - * @return Peripheral clock of timer - **********************************************************************/ -static uint32_t getPClock (uint32_t timernum) -{ - uint32_t clkdlycnt = 0; - switch (timernum) - { - case 0: - clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER0); - break; - - case 1: - clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER1); - break; - - case 2: - clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER2); - break; - - case 3: - clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER3); - break; - } - return clkdlycnt; -} - - -/*********************************************************************//** - * @brief Convert a time to a timer count value - * @param[in] timernum Timer number - * @param[in] usec Time in microseconds - * @return The number of required clock ticks to give the time delay - **********************************************************************/ -uint32_t converUSecToVal (uint32_t timernum, uint32_t usec) -{ - uint64_t clkdlycnt; - - // Get Pclock of timer - clkdlycnt = (uint64_t) getPClock(timernum); - - clkdlycnt = (clkdlycnt * usec) / 1000000; - return (uint32_t) clkdlycnt; -} - - -/*********************************************************************//** - * @brief Convert a timer register pointer to a timer number - * @param[in] TIMx Pointer to LPC_TIM_TypeDef, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @return The timer number (0 to 3) or -1 if register pointer is bad - **********************************************************************/ -uint32_t converPtrToTimeNum (LPC_TIM_TypeDef *TIMx) -{ - uint32_t tnum = (uint32_t)-1; - - if (TIMx == LPC_TIM0) - { - tnum = 0; - } - else if (TIMx == LPC_TIM1) - { - tnum = 1; - } - else if (TIMx == LPC_TIM2) - { - tnum = 2; - } - else if (TIMx == LPC_TIM3) - { - tnum = 3; - } - - return tnum; -} - -/* End of Private Functions ---------------------------------------------------- */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup TIM_Public_Functions - * @{ - */ - -/*********************************************************************//** - * @brief Get Interrupt Status - * @param[in] TIMx Timer selection, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @param[in] IntFlag: interrupt type, should be: - * - TIM_MR0_INT: Interrupt for Match channel 0 - * - TIM_MR1_INT: Interrupt for Match channel 1 - * - TIM_MR2_INT: Interrupt for Match channel 2 - * - TIM_MR3_INT: Interrupt for Match channel 3 - * - TIM_CR0_INT: Interrupt for Capture channel 0 - * - TIM_CR1_INT: Interrupt for Capture channel 1 - * @return FlagStatus - * - SET : interrupt - * - RESET : no interrupt - **********************************************************************/ -FlagStatus TIM_GetIntStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag) -{ - uint8_t temp; - CHECK_PARAM(PARAM_TIMx(TIMx)); - CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag)); - temp = (TIMx->IR)& TIM_IR_CLR(IntFlag); - if (temp) - return SET; - - return RESET; - -} -/*********************************************************************//** - * @brief Get Capture Interrupt Status - * @param[in] TIMx Timer selection, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @param[in] IntFlag: interrupt type, should be: - * - TIM_MR0_INT: Interrupt for Match channel 0 - * - TIM_MR1_INT: Interrupt for Match channel 1 - * - TIM_MR2_INT: Interrupt for Match channel 2 - * - TIM_MR3_INT: Interrupt for Match channel 3 - * - TIM_CR0_INT: Interrupt for Capture channel 0 - * - TIM_CR1_INT: Interrupt for Capture channel 1 - * @return FlagStatus - * - SET : interrupt - * - RESET : no interrupt - **********************************************************************/ -FlagStatus TIM_GetIntCaptureStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag) -{ - uint8_t temp; - CHECK_PARAM(PARAM_TIMx(TIMx)); - CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag)); - temp = (TIMx->IR) & (1<<(4+IntFlag)); - if(temp) - return SET; - return RESET; -} -/*********************************************************************//** - * @brief Clear Interrupt pending - * @param[in] TIMx Timer selection, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @param[in] IntFlag: interrupt type, should be: - * - TIM_MR0_INT: Interrupt for Match channel 0 - * - TIM_MR1_INT: Interrupt for Match channel 1 - * - TIM_MR2_INT: Interrupt for Match channel 2 - * - TIM_MR3_INT: Interrupt for Match channel 3 - * - TIM_CR0_INT: Interrupt for Capture channel 0 - * - TIM_CR1_INT: Interrupt for Capture channel 1 - * @return None - **********************************************************************/ -void TIM_ClearIntPending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag) -{ - CHECK_PARAM(PARAM_TIMx(TIMx)); - CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag)); - TIMx->IR = TIM_IR_CLR(IntFlag); -} - -/*********************************************************************//** - * @brief Clear Capture Interrupt pending - * @param[in] TIMx Timer selection, should be - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @param[in] IntFlag interrupt type, should be: - * - TIM_MR0_INT: Interrupt for Match channel 0 - * - TIM_MR1_INT: Interrupt for Match channel 1 - * - TIM_MR2_INT: Interrupt for Match channel 2 - * - TIM_MR3_INT: Interrupt for Match channel 3 - * - TIM_CR0_INT: Interrupt for Capture channel 0 - * - TIM_CR1_INT: Interrupt for Capture channel 1 - * @return None - **********************************************************************/ -void TIM_ClearIntCapturePending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag) -{ - CHECK_PARAM(PARAM_TIMx(TIMx)); - CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag)); - TIMx->IR = (1<<(4+IntFlag)); -} - -/*********************************************************************//** - * @brief Configuration for Timer at initial time - * @param[in] TimerCounterMode timer counter mode, should be: - * - TIM_TIMER_MODE: Timer mode - * - TIM_COUNTER_RISING_MODE: Counter rising mode - * - TIM_COUNTER_FALLING_MODE: Counter falling mode - * - TIM_COUNTER_ANY_MODE:Counter on both edges - * @param[in] TIM_ConfigStruct pointer to TIM_TIMERCFG_Type or - * TIM_COUNTERCFG_Type - * @return None - **********************************************************************/ -void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct) -{ - if (TimerCounterMode == TIM_TIMER_MODE ) - { - TIM_TIMERCFG_Type * pTimeCfg = (TIM_TIMERCFG_Type *)TIM_ConfigStruct; - pTimeCfg->PrescaleOption = TIM_PRESCALE_USVAL; - pTimeCfg->PrescaleValue = 1; - } - else - { - TIM_COUNTERCFG_Type * pCounterCfg = (TIM_COUNTERCFG_Type *)TIM_ConfigStruct; - pCounterCfg->CountInputSelect = TIM_COUNTER_INCAP0; - } -} - -/*********************************************************************//** - * @brief Initial Timer/Counter device - * Set Clock frequency for Timer - * Set initial configuration for Timer - * @param[in] TIMx Timer selection, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @param[in] TimerCounterMode Timer counter mode, should be: - * - TIM_TIMER_MODE: Timer mode - * - TIM_COUNTER_RISING_MODE: Counter rising mode - * - TIM_COUNTER_FALLING_MODE: Counter falling mode - * - TIM_COUNTER_ANY_MODE:Counter on both edges - * @param[in] TIM_ConfigStruct pointer to TIM_TIMERCFG_Type - * that contains the configuration information for the - * specified Timer peripheral. - * @return None - **********************************************************************/ -void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct) -{ - TIM_TIMERCFG_Type *pTimeCfg; - TIM_COUNTERCFG_Type *pCounterCfg; - - CHECK_PARAM(PARAM_TIMx(TIMx)); - CHECK_PARAM(PARAM_TIM_MODE_OPT(TimerCounterMode)); - - //set power - - if (TIMx== LPC_TIM0) - { - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, ENABLE); - //PCLK_Timer0 = CCLK/4 - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER0, CLKPWR_PCLKSEL_CCLK_DIV_4); - } - else if (TIMx== LPC_TIM1) - { - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, ENABLE); - //PCLK_Timer1 = CCLK/4 - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER1, CLKPWR_PCLKSEL_CCLK_DIV_4); - - } - - else if (TIMx== LPC_TIM2) - { - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, ENABLE); - //PCLK_Timer2= CCLK/4 - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER2, CLKPWR_PCLKSEL_CCLK_DIV_4); - } - else if (TIMx== LPC_TIM3) - { - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM3, ENABLE); - //PCLK_Timer3= CCLK/4 - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER3, CLKPWR_PCLKSEL_CCLK_DIV_4); - - } - - TIMx->CCR &= ~TIM_CTCR_MODE_MASK; - TIMx->CCR |= TIM_TIMER_MODE; - - TIMx->TC =0; - TIMx->PC =0; - TIMx->PR =0; - TIMx->TCR |= (1<<1); //Reset Counter - TIMx->TCR &= ~(1<<1); //release reset - if (TimerCounterMode == TIM_TIMER_MODE ) - { - pTimeCfg = (TIM_TIMERCFG_Type *)TIM_ConfigStruct; - if (pTimeCfg->PrescaleOption == TIM_PRESCALE_TICKVAL) - { - TIMx->PR = pTimeCfg->PrescaleValue -1 ; - } - else - { - TIMx->PR = converUSecToVal (converPtrToTimeNum(TIMx),pTimeCfg->PrescaleValue)-1; - } - } - else - { - - pCounterCfg = (TIM_COUNTERCFG_Type *)TIM_ConfigStruct; - TIMx->CCR &= ~TIM_CTCR_INPUT_MASK; - if (pCounterCfg->CountInputSelect == TIM_COUNTER_INCAP1) - TIMx->CCR |= _BIT(2); - } - - // Clear interrupt pending - TIMx->IR = 0xFFFFFFFF; - -} - -/*********************************************************************//** - * @brief Close Timer/Counter device - * @param[in] TIMx Pointer to timer device, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @return None - **********************************************************************/ -void TIM_DeInit (LPC_TIM_TypeDef *TIMx) -{ - CHECK_PARAM(PARAM_TIMx(TIMx)); - // Disable timer/counter - TIMx->TCR = 0x00; - - // Disable power - if (TIMx== LPC_TIM0) - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, DISABLE); - - else if (TIMx== LPC_TIM1) - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, DISABLE); - - else if (TIMx== LPC_TIM2) - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE); - - else if (TIMx== LPC_TIM3) - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE); - -} - -/*********************************************************************//** - * @brief Start/Stop Timer/Counter device - * @param[in] TIMx Pointer to timer device, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @param[in] NewState - * - ENABLE : set timer enable - * - DISABLE : disable timer - * @return None - **********************************************************************/ -void TIM_Cmd(LPC_TIM_TypeDef *TIMx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_TIMx(TIMx)); - if (NewState == ENABLE) - { - TIMx->TCR |= TIM_ENABLE; - } - else - { - TIMx->TCR &= ~TIM_ENABLE; - } -} - -/*********************************************************************//** - * @brief Reset Timer/Counter device, - * Make TC and PC are synchronously reset on the next - * positive edge of PCLK - * @param[in] TIMx Pointer to timer device, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @return None - **********************************************************************/ -void TIM_ResetCounter(LPC_TIM_TypeDef *TIMx) -{ - CHECK_PARAM(PARAM_TIMx(TIMx)); - TIMx->TCR |= TIM_RESET; - TIMx->TCR &= ~TIM_RESET; -} - -/*********************************************************************//** - * @brief Configuration for Match register - * @param[in] TIMx Pointer to timer device, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @param[in] TIM_MatchConfigStruct Pointer to TIM_MATCHCFG_Type - * - MatchChannel : choose channel 0 or 1 - * - IntOnMatch : if SET, interrupt will be generated when MRxx match - * the value in TC - * - StopOnMatch : if SET, TC and PC will be stopped whenM Rxx match - * the value in TC - * - ResetOnMatch : if SET, Reset on MR0 when MRxx match - * the value in TC - * -ExtMatchOutputType: Select output for external match - * + 0: Do nothing for external output pin if match - * + 1: Force external output pin to low if match - * + 2: Force external output pin to high if match - * + 3: Toggle external output pin if match - * MatchValue: Set the value to be compared with TC value - * @return None - **********************************************************************/ -void TIM_ConfigMatch(LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct) -{ - - CHECK_PARAM(PARAM_TIMx(TIMx)); - CHECK_PARAM(PARAM_TIM_EXTMATCH_OPT(TIM_MatchConfigStruct->ExtMatchOutputType)); - - switch(TIM_MatchConfigStruct->MatchChannel) - { - case 0: - TIMx->MR0 = TIM_MatchConfigStruct->MatchValue; - break; - case 1: - TIMx->MR1 = TIM_MatchConfigStruct->MatchValue; - break; - case 2: - TIMx->MR2 = TIM_MatchConfigStruct->MatchValue; - break; - case 3: - TIMx->MR3 = TIM_MatchConfigStruct->MatchValue; - break; - default: - //Error match value - //Error loop - while(1); - } - //interrupt on MRn - TIMx->MCR &=~TIM_MCR_CHANNEL_MASKBIT(TIM_MatchConfigStruct->MatchChannel); - - if (TIM_MatchConfigStruct->IntOnMatch) - TIMx->MCR |= TIM_INT_ON_MATCH(TIM_MatchConfigStruct->MatchChannel); - - //reset on MRn - if (TIM_MatchConfigStruct->ResetOnMatch) - TIMx->MCR |= TIM_RESET_ON_MATCH(TIM_MatchConfigStruct->MatchChannel); - - //stop on MRn - if (TIM_MatchConfigStruct->StopOnMatch) - TIMx->MCR |= TIM_STOP_ON_MATCH(TIM_MatchConfigStruct->MatchChannel); - - // match output type - - TIMx->EMR &= ~TIM_EM_MASK(TIM_MatchConfigStruct->MatchChannel); - TIMx->EMR |= TIM_EM_SET(TIM_MatchConfigStruct->MatchChannel,TIM_MatchConfigStruct->ExtMatchOutputType); -} -/*********************************************************************//** - * @brief Update Match value - * @param[in] TIMx Pointer to timer device, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @param[in] MatchChannel Match channel, should be: 0..3 - * @param[in] MatchValue updated match value - * @return None - **********************************************************************/ -void TIM_UpdateMatchValue(LPC_TIM_TypeDef *TIMx,uint8_t MatchChannel, uint32_t MatchValue) -{ - CHECK_PARAM(PARAM_TIMx(TIMx)); - switch(MatchChannel) - { - case 0: - TIMx->MR0 = MatchValue; - break; - case 1: - TIMx->MR1 = MatchValue; - break; - case 2: - TIMx->MR2 = MatchValue; - break; - case 3: - TIMx->MR3 = MatchValue; - break; - default: - //Error Loop - while(1); - } - -} -/*********************************************************************//** - * @brief Configuration for Capture register - * @param[in] TIMx Pointer to timer device, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * - CaptureChannel: set the channel to capture data - * - RisingEdge : if SET, Capture at rising edge - * - FallingEdge : if SET, Capture at falling edge - * - IntOnCaption : if SET, Capture generate interrupt - * @param[in] TIM_CaptureConfigStruct Pointer to TIM_CAPTURECFG_Type - * @return None - **********************************************************************/ -void TIM_ConfigCapture(LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct) -{ - - CHECK_PARAM(PARAM_TIMx(TIMx)); - TIMx->CCR &= ~TIM_CCR_CHANNEL_MASKBIT(TIM_CaptureConfigStruct->CaptureChannel); - - if (TIM_CaptureConfigStruct->RisingEdge) - TIMx->CCR |= TIM_CAP_RISING(TIM_CaptureConfigStruct->CaptureChannel); - - if (TIM_CaptureConfigStruct->FallingEdge) - TIMx->CCR |= TIM_CAP_FALLING(TIM_CaptureConfigStruct->CaptureChannel); - - if (TIM_CaptureConfigStruct->IntOnCaption) - TIMx->CCR |= TIM_INT_ON_CAP(TIM_CaptureConfigStruct->CaptureChannel); -} - -/*********************************************************************//** - * @brief Read value of capture register in timer/counter device - * @param[in] TIMx Pointer to timer/counter device, should be: - * - LPC_TIM0: TIMER0 peripheral - * - LPC_TIM1: TIMER1 peripheral - * - LPC_TIM2: TIMER2 peripheral - * - LPC_TIM3: TIMER3 peripheral - * @param[in] CaptureChannel: capture channel number, should be: - * - TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn - * - TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn - * @return Value of capture register - **********************************************************************/ -uint32_t TIM_GetCaptureValue(LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel) -{ - CHECK_PARAM(PARAM_TIMx(TIMx)); - CHECK_PARAM(PARAM_TIM_COUNTER_INPUT_OPT(CaptureChannel)); - - if(CaptureChannel==0) - return TIMx->CR0; - else - return TIMx->CR1; -} - -/** - * @} - */ - -#endif /* _TIMER */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_uart.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1379 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_uart.c 2011-06-06 -*//** -* @file lpc17xx_uart.c -* @brief Contains all functions support for UART firmware library -* on LPC17xx -* @version 3.2 -* @date 25. July. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2011, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup UART - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_uart.h" -#include "lpc17xx_clkpwr.h" - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _UART - -/* Private Functions ---------------------------------------------------------- */ - -static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate); - - -/*********************************************************************//** - * @brief Determines best dividers to get a target clock rate - * @param[in] UARTx Pointer to selected UART peripheral, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[in] baudrate Desired UART baud rate. - * @return Error status, could be: - * - SUCCESS - * - ERROR - **********************************************************************/ -static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate) -{ - Status errorStatus = ERROR; - - uint32_t uClk = 0; - uint32_t d, m, bestd, bestm, tmp; - uint64_t best_divisor, divisor; - uint32_t current_error, best_error; - uint32_t recalcbaud; - - /* get UART block clock */ - if (UARTx == (LPC_UART_TypeDef *) LPC_UART0) - { - uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART0); - } - else if (UARTx == (LPC_UART_TypeDef *)LPC_UART1) - { - uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART1); - } - else if (UARTx == LPC_UART2) - { - uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART2); - } - else if (UARTx == LPC_UART3) - { - uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART3); - } - - - /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers - * The formula is : - * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL) - * It involves floating point calculations. That's the reason the formulae are adjusted with - * Multiply and divide method.*/ - /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions: - * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */ - best_error = 0xFFFFFFFF; /* Worst case */ - bestd = 0; - bestm = 0; - best_divisor = 0; - for (m = 1 ; m <= 15 ;m++) - { - for (d = 0 ; d < m ; d++) - { - divisor = ((uint64_t)uClk<<28)*m/(baudrate*(m+d)); - current_error = divisor & 0xFFFFFFFF; - - tmp = divisor>>32; - - /* Adjust error */ - if(current_error > ((uint32_t)1<<31)){ - current_error = -current_error; - tmp++; - } - - if(tmp<1 || tmp>65536) /* Out of range */ - continue; - - if( current_error < best_error){ - best_error = current_error; - best_divisor = tmp; - bestd = d; - bestm = m; - if(best_error == 0) break; - } - } /* end of inner for loop */ - - if (best_error == 0) - break; - } /* end of outer for loop */ - - if(best_divisor == 0) return ERROR; /* can not find best match */ - - recalcbaud = (uClk>>4) * bestm/(best_divisor * (bestm + bestd)); - - /* reuse best_error to evaluate baud error*/ - if(baudrate>recalcbaud) best_error = baudrate - recalcbaud; - else best_error = recalcbaud -baudrate; - - best_error = best_error * 100 / baudrate; - - if (best_error < UART_ACCEPTED_BAUDRATE_ERROR) - { - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN; - ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor); - ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor); - /* Then reset DLAB bit */ - ((LPC_UART1_TypeDef *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; - ((LPC_UART1_TypeDef *)UARTx)->FDR = (UART_FDR_MULVAL(bestm) \ - | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; - } - else - { - UARTx->LCR |= UART_LCR_DLAB_EN; - UARTx->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor); - UARTx->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor); - /* Then reset DLAB bit */ - UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; - UARTx->FDR = (UART_FDR_MULVAL(bestm) \ - | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; - } - errorStatus = SUCCESS; - } - - return errorStatus; -} - -/* End of Private Functions ---------------------------------------------------- */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup UART_Public_Functions - * @{ - */ -/* UART Init/DeInit functions -------------------------------------------------*/ -/********************************************************************//** - * @brief Initializes the UARTx peripheral according to the specified - * parameters in the UART_ConfigStruct. - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure -* that contains the configuration information for the -* specified UART peripheral. - * @return None - *********************************************************************/ -void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct) -{ - uint32_t tmp; - - // For debug mode - CHECK_PARAM(PARAM_UARTx(UARTx)); - CHECK_PARAM(PARAM_UART_DATABIT(UART_ConfigStruct->Databits)); - CHECK_PARAM(PARAM_UART_STOPBIT(UART_ConfigStruct->Stopbits)); - CHECK_PARAM(PARAM_UART_PARITY(UART_ConfigStruct->Parity)); - -#ifdef _UART0 - if(UARTx == (LPC_UART_TypeDef *) LPC_UART0) - { - /* Set up clock and power for UART module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE); - } -#endif - -#ifdef _UART1 - if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - /* Set up clock and power for UART module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE); - } -#endif - -#ifdef _UART2 - if(UARTx == LPC_UART2) - { - /* Set up clock and power for UART module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE); - } -#endif - -#ifdef _UART3 - if(UARTx == LPC_UART3) - { - /* Set up clock and power for UART module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE); - } -#endif - - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - /* FIFOs are empty */ - ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN \ - | UART_FCR_RX_RS | UART_FCR_TX_RS); - // Disable FIFO - ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = 0; - - // Dummy reading - while (((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_RDR) - { - tmp = ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR; - } - - ((LPC_UART1_TypeDef *)UARTx)->TER = UART_TER_TXEN; - // Wait for current transmit complete - while (!(((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_THRE)); - // Disable Tx - ((LPC_UART1_TypeDef *)UARTx)->TER = 0; - - // Disable interrupt - ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER = 0; - // Set LCR to default state - ((LPC_UART1_TypeDef *)UARTx)->LCR = 0; - // Set ACR to default state - ((LPC_UART1_TypeDef *)UARTx)->ACR = 0; - // Set Modem Control to default state - ((LPC_UART1_TypeDef *)UARTx)->MCR = 0; - // Set RS485 control to default state - ((LPC_UART1_TypeDef *)UARTx)->RS485CTRL = 0; - // Set RS485 delay timer to default state - ((LPC_UART1_TypeDef *)UARTx)->RS485DLY = 0; - // Set RS485 addr match to default state - ((LPC_UART1_TypeDef *)UARTx)->ADRMATCH = 0; - //Dummy Reading to Clear Status - tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR; - tmp = ((LPC_UART1_TypeDef *)UARTx)->LSR; - } - else - { - /* FIFOs are empty */ - UARTx->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS); - // Disable FIFO - UARTx->/*IIFCR.*/FCR = 0; - - // Dummy reading - while (UARTx->LSR & UART_LSR_RDR) - { - tmp = UARTx->/*RBTHDLR.*/RBR; - } - - UARTx->TER = UART_TER_TXEN; - // Wait for current transmit complete - while (!(UARTx->LSR & UART_LSR_THRE)); - // Disable Tx - UARTx->TER = 0; - - // Disable interrupt - UARTx->/*DLIER.*/IER = 0; - // Set LCR to default state - UARTx->LCR = 0; - // Set ACR to default state - UARTx->ACR = 0; - // Dummy reading - tmp = UARTx->LSR; - } - - if (UARTx == LPC_UART3) - { - // Set IrDA to default state - UARTx->ICR = 0; - } - - // Set Line Control register ---------------------------- - - uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate)); - - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \ - & UART_LCR_BITMASK; - } - else - { - tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK; - } - - switch (UART_ConfigStruct->Databits){ - case UART_DATABIT_5: - tmp |= UART_LCR_WLEN5; - break; - case UART_DATABIT_6: - tmp |= UART_LCR_WLEN6; - break; - case UART_DATABIT_7: - tmp |= UART_LCR_WLEN7; - break; - case UART_DATABIT_8: - default: - tmp |= UART_LCR_WLEN8; - break; - } - - if (UART_ConfigStruct->Parity == UART_PARITY_NONE) - { - // Do nothing... - } - else - { - tmp |= UART_LCR_PARITY_EN; - switch (UART_ConfigStruct->Parity) - { - case UART_PARITY_ODD: - tmp |= UART_LCR_PARITY_ODD; - break; - - case UART_PARITY_EVEN: - tmp |= UART_LCR_PARITY_EVEN; - break; - - case UART_PARITY_SP_1: - tmp |= UART_LCR_PARITY_F_1; - break; - - case UART_PARITY_SP_0: - tmp |= UART_LCR_PARITY_F_0; - break; - default: - break; - } - } - - switch (UART_ConfigStruct->Stopbits){ - case UART_STOPBIT_2: - tmp |= UART_LCR_STOPBIT_SEL; - break; - case UART_STOPBIT_1: - default: - // Do no thing - break; - } - - - // Write back to LCR, configure FIFO and Disable Tx - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - ((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); - } - else - { - UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); - } -} - -/*********************************************************************//** - * @brief De-initializes the UARTx peripheral registers to their - * default reset values. - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @return None - **********************************************************************/ -void UART_DeInit(LPC_UART_TypeDef* UARTx) -{ - // For debug mode - CHECK_PARAM(PARAM_UARTx(UARTx)); - - UART_TxCmd(UARTx, DISABLE); - -#ifdef _UART0 - if (UARTx == (LPC_UART_TypeDef *) LPC_UART0) - { - /* Set up clock and power for UART module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE); - } -#endif - -#ifdef _UART1 - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - /* Set up clock and power for UART module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE); - } -#endif - -#ifdef _UART2 - if (UARTx == LPC_UART2) - { - /* Set up clock and power for UART module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE); - } -#endif - -#ifdef _UART3 - if (UARTx == LPC_UART3) - { - /* Set up clock and power for UART module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE); - } -#endif -} - -/*****************************************************************************//** -* @brief Fills each UART_InitStruct member with its default value: -* - 9600 bps -* - 8-bit data -* - 1 Stopbit -* - None Parity -* @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure -* which will be initialized. -* @return None -*******************************************************************************/ -void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct) -{ - UART_InitStruct->Baud_rate = 9600; - UART_InitStruct->Databits = UART_DATABIT_8; - UART_InitStruct->Parity = UART_PARITY_NONE; - UART_InitStruct->Stopbits = UART_STOPBIT_1; -} - -/* UART Send/Recieve functions -------------------------------------------------*/ -/*********************************************************************//** - * @brief Transmit a single data through UART peripheral - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[in] Data Data to transmit (must be 8-bit long) - * @return None - **********************************************************************/ -void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data) -{ - CHECK_PARAM(PARAM_UARTx(UARTx)); - - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT; - } - else - { - UARTx->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT; - } - -} - - -/*********************************************************************//** - * @brief Receive a single data from UART peripheral - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @return Data received - **********************************************************************/ -uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx) -{ - CHECK_PARAM(PARAM_UARTx(UARTx)); - - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - return (((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT); - } - else - { - return (UARTx->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT); - } -} - -/*********************************************************************//** - * @brief Send a block of data via UART peripheral - * @param[in] UARTx Selected UART peripheral used to send data, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[in] txbuf Pointer to Transmit buffer - * @param[in] buflen Length of Transmit buffer - * @param[in] flag Flag used in UART transfer, should be - * NONE_BLOCKING or BLOCKING - * @return Number of bytes sent. - * - * Note: when using UART in BLOCKING mode, a time-out condition is used - * via defined symbol UART_BLOCKING_TIMEOUT. - **********************************************************************/ -uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf, - uint32_t buflen, TRANSFER_BLOCK_Type flag) -{ - uint32_t bToSend, bSent, timeOut, fifo_cnt; - uint8_t *pChar = txbuf; - - bToSend = buflen; - - // blocking mode - if (flag == BLOCKING) { - bSent = 0; - while (bToSend){ - timeOut = UART_BLOCKING_TIMEOUT; - // Wait for THR empty with timeout - while (!(UARTx->LSR & UART_LSR_THRE)) { - if (timeOut == 0) break; - timeOut--; - } - // Time out! - if(timeOut == 0) break; - fifo_cnt = UART_TX_FIFO_SIZE; - while (fifo_cnt && bToSend){ - UART_SendByte(UARTx, (*pChar++)); - fifo_cnt--; - bToSend--; - bSent++; - } - } - } - // None blocking mode - else { - bSent = 0; - while (bToSend) { - if (!(UARTx->LSR & UART_LSR_THRE)){ - break; - } - fifo_cnt = UART_TX_FIFO_SIZE; - while (fifo_cnt && bToSend) { - UART_SendByte(UARTx, (*pChar++)); - bToSend--; - fifo_cnt--; - bSent++; - } - } - } - return bSent; -} - -/*********************************************************************//** - * @brief Receive a block of data via UART peripheral - * @param[in] UARTx Selected UART peripheral used to send data, - * should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[out] rxbuf Pointer to Received buffer - * @param[in] buflen Length of Received buffer - * @param[in] flag Flag mode, should be NONE_BLOCKING or BLOCKING - - * @return Number of bytes received - * - * Note: when using UART in BLOCKING mode, a time-out condition is used - * via defined symbol UART_BLOCKING_TIMEOUT. - **********************************************************************/ -uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, \ - uint32_t buflen, TRANSFER_BLOCK_Type flag) -{ - uint32_t bToRecv, bRecv, timeOut; - uint8_t *pChar = rxbuf; - - bToRecv = buflen; - - // Blocking mode - if (flag == BLOCKING) { - bRecv = 0; - while (bToRecv){ - timeOut = UART_BLOCKING_TIMEOUT; - while (!(UARTx->LSR & UART_LSR_RDR)){ - if (timeOut == 0) break; - timeOut--; - } - // Time out! - if(timeOut == 0) break; - // Get data from the buffer - (*pChar++) = UART_ReceiveByte(UARTx); - bToRecv--; - bRecv++; - } - } - // None blocking mode - else { - bRecv = 0; - while (bToRecv) { - if (!(UARTx->LSR & UART_LSR_RDR)) { - break; - } else { - (*pChar++) = UART_ReceiveByte(UARTx); - bRecv++; - bToRecv--; - } - } - } - return bRecv; -} - -/*********************************************************************//** - * @brief Force BREAK character on UART line, output pin UARTx TXD is - forced to logic 0. - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @return None - **********************************************************************/ -void UART_ForceBreak(LPC_UART_TypeDef* UARTx) -{ - CHECK_PARAM(PARAM_UARTx(UARTx)); - - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_BREAK_EN; - } - else - { - UARTx->LCR |= UART_LCR_BREAK_EN; - } -} - - -/********************************************************************//** - * @brief Enable or disable specified UART interrupt. - * @param[in] UARTx UART peripheral selected, should be - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[in] UARTIntCfg Specifies the interrupt flag, - * should be one of the following: - - UART_INTCFG_RBR : RBR Interrupt enable - - UART_INTCFG_THRE : THR Interrupt enable - - UART_INTCFG_RLS : RX line status interrupt enable - - UART1_INTCFG_MS : Modem status interrupt enable (UART1 only) - - UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only) - - UART_INTCFG_ABEO : Enables the end of auto-baud interrupt - - UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt - * @param[in] NewState New state of specified UART interrupt type, - * should be: - * - ENALBE: Enable this UART interrupt type. -* - DISALBE: Disable this UART interrupt type. - * @return None - *********************************************************************/ -void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState) -{ - uint32_t tmp = 0; - - CHECK_PARAM(PARAM_UARTx(UARTx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - switch(UARTIntCfg){ - case UART_INTCFG_RBR: - tmp = UART_IER_RBRINT_EN; - break; - case UART_INTCFG_THRE: - tmp = UART_IER_THREINT_EN; - break; - case UART_INTCFG_RLS: - tmp = UART_IER_RLSINT_EN; - break; - case UART1_INTCFG_MS: - tmp = UART1_IER_MSINT_EN; - break; - case UART1_INTCFG_CTS: - tmp = UART1_IER_CTSINT_EN; - break; - case UART_INTCFG_ABEO: - tmp = UART_IER_ABEOINT_EN; - break; - case UART_INTCFG_ABTO: - tmp = UART_IER_ABTOINT_EN; - break; - } - - if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1) - { - CHECK_PARAM((PARAM_UART_INTCFG(UARTIntCfg)) || (PARAM_UART1_INTCFG(UARTIntCfg))); - } - else - { - CHECK_PARAM(PARAM_UART_INTCFG(UARTIntCfg)); - } - - if (NewState == ENABLE) - { - if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1) - { - ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER |= tmp; - } - else - { - UARTx->/*DLIER.*/IER |= tmp; - } - } - else - { - if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1) - { - ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER &= (~tmp) & UART1_IER_BITMASK; - } - else - { - UARTx->/*DLIER.*/IER &= (~tmp) & UART_IER_BITMASK; - } - } -} - - -/********************************************************************//** - * @brief Get current value of Line Status register in UART peripheral. - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @return Current value of Line Status register in UART peripheral. - * Note: The return value of this function must be ANDed with each member in - * UART_LS_Type enumeration to determine current flag status - * corresponding to each Line status type. Because some flags in - * Line Status register will be cleared after reading, the next reading - * Line Status register could not be correct. So this function used to - * read Line status register in one time only, then the return value - * used to check all flags. - *********************************************************************/ -uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx) -{ - CHECK_PARAM(PARAM_UARTx(UARTx)); - - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - return ((((LPC_UART1_TypeDef *)LPC_UART1)->LSR) & UART_LSR_BITMASK); - } - else - { - return ((UARTx->LSR) & UART_LSR_BITMASK); - } -} - -/********************************************************************//** - * @brief Get Interrupt Identification value - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @return Current value of UART UIIR register in UART peripheral. - *********************************************************************/ -uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx) -{ - CHECK_PARAM(PARAM_UARTx(UARTx)); - return (UARTx->IIR & 0x03CF); -} - -/*********************************************************************//** - * @brief Check whether if UART is busy or not - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @return RESET if UART is not busy, otherwise return SET. - **********************************************************************/ -FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx) -{ - if (UARTx->LSR & UART_LSR_TEMT){ - return RESET; - } else { - return SET; - } -} - - -/*********************************************************************//** - * @brief Configure FIFO function on selected UART peripheral - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that - * contains specified information about FIFO configuration - * @return none - **********************************************************************/ -void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg) -{ - uint8_t tmp = 0; - - CHECK_PARAM(PARAM_UARTx(UARTx)); - CHECK_PARAM(PARAM_UART_FIFO_LEVEL(FIFOCfg->FIFO_Level)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_DMAMode)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetRxBuf)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetTxBuf)); - - tmp |= UART_FCR_FIFO_EN; - switch (FIFOCfg->FIFO_Level){ - case UART_FIFO_TRGLEV0: - tmp |= UART_FCR_TRG_LEV0; - break; - case UART_FIFO_TRGLEV1: - tmp |= UART_FCR_TRG_LEV1; - break; - case UART_FIFO_TRGLEV2: - tmp |= UART_FCR_TRG_LEV2; - break; - case UART_FIFO_TRGLEV3: - default: - tmp |= UART_FCR_TRG_LEV3; - break; - } - - if (FIFOCfg->FIFO_ResetTxBuf == ENABLE) - { - tmp |= UART_FCR_TX_RS; - } - if (FIFOCfg->FIFO_ResetRxBuf == ENABLE) - { - tmp |= UART_FCR_RX_RS; - } - if (FIFOCfg->FIFO_DMAMode == ENABLE) - { - tmp |= UART_FCR_DMAMODE_SEL; - } - - - //write to FIFO control register - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK; - } - else - { - UARTx->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK; - } -} - -/*****************************************************************************//** -* @brief Fills each UART_FIFOInitStruct member with its default value: -* - FIFO_DMAMode = DISABLE -* - FIFO_Level = UART_FIFO_TRGLEV0 -* - FIFO_ResetRxBuf = ENABLE -* - FIFO_ResetTxBuf = ENABLE -* - FIFO_State = ENABLE - -* @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure -* which will be initialized. -* @return None -*******************************************************************************/ -void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct) -{ - UART_FIFOInitStruct->FIFO_DMAMode = DISABLE; - UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0; - UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE; - UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE; -} - - -/*********************************************************************//** - * @brief Start/Stop Auto Baudrate activity - * @param[in] UARTx UART peripheral selected, should be - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that - * contains specified information about UART - * auto baudrate configuration - * @param[in] NewState New State of Auto baudrate activity, should be: - * - ENABLE: Start this activity - * - DISABLE: Stop this activity - * Note: Auto-baudrate mode enable bit will be cleared once this mode - * completed. - * @return none - **********************************************************************/ -void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, \ - FunctionalState NewState) -{ - uint32_t tmp; - - CHECK_PARAM(PARAM_UARTx(UARTx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - tmp = 0; - if (NewState == ENABLE) { - if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1){ - tmp |= UART_ACR_MODE; - } - if (ABConfigStruct->AutoRestart == ENABLE){ - tmp |= UART_ACR_AUTO_RESTART; - } - } - - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - if (NewState == ENABLE) - { - // Clear DLL and DLM value - ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN; - ((LPC_UART1_TypeDef *)UARTx)->DLL = 0; - ((LPC_UART1_TypeDef *)UARTx)->DLM = 0; - ((LPC_UART1_TypeDef *)UARTx)->LCR &= ~UART_LCR_DLAB_EN; - // FDR value must be reset to default value - ((LPC_UART1_TypeDef *)UARTx)->FDR = 0x10; - ((LPC_UART1_TypeDef *)UARTx)->ACR = UART_ACR_START | tmp; - } - else - { - ((LPC_UART1_TypeDef *)UARTx)->ACR = 0; - } - } - else - { - if (NewState == ENABLE) - { - // Clear DLL and DLM value - UARTx->LCR |= UART_LCR_DLAB_EN; - UARTx->DLL = 0; - UARTx->DLM = 0; - UARTx->LCR &= ~UART_LCR_DLAB_EN; - // FDR value must be reset to default value - UARTx->FDR = 0x10; - UARTx->ACR = UART_ACR_START | tmp; - } - else - { - UARTx->ACR = 0; - } - } -} - -/*********************************************************************//** - * @brief Clear Autobaud Interrupt Pending - * @param[in] UARTx UART peripheral selected, should be - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[in] ABIntType type of auto-baud interrupt, should be: - * - UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt - * - UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt - * @return none - **********************************************************************/ -void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType) -{ - CHECK_PARAM(PARAM_UARTx(UARTx)); - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - UARTx->ACR |= ABIntType; - } - else - UARTx->ACR |= ABIntType; -} - -/*********************************************************************//** - * @brief Enable/Disable transmission on UART TxD pin - * @param[in] UARTx UART peripheral selected, should be: - * - LPC_UART0: UART0 peripheral - * - LPC_UART1: UART1 peripheral - * - LPC_UART2: UART2 peripheral - * - LPC_UART3: UART3 peripheral - * @param[in] NewState New State of Tx transmission function, should be: - * - ENABLE: Enable this function - - DISABLE: Disable this function - * @return none - **********************************************************************/ -void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_UARTx(UARTx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - ((LPC_UART1_TypeDef *)UARTx)->TER |= UART_TER_TXEN; - } - else - { - UARTx->TER |= UART_TER_TXEN; - } - } - else - { - if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) - { - ((LPC_UART1_TypeDef *)UARTx)->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK; - } - else - { - UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK; - } - } -} - -/* UART IrDA functions ---------------------------------------------------*/ - -#ifdef _UART3 - -/*********************************************************************//** - * @brief Enable or disable inverting serial input function of IrDA - * on UART peripheral. - * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only) - * @param[in] NewState New state of inverting serial input, should be: - * - ENABLE: Enable this function. - * - DISABLE: Disable this function. - * @return none - **********************************************************************/ -void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_UART_IrDA(UARTx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - UARTx->ICR |= UART_ICR_IRDAINV; - } - else if (NewState == DISABLE) - { - UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Enable or disable IrDA function on UART peripheral. - * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only) - * @param[in] NewState New state of IrDA function, should be: - * - ENABLE: Enable this function. - * - DISABLE: Disable this function. - * @return none - **********************************************************************/ -void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState) -{ - CHECK_PARAM(PARAM_UART_IrDA(UARTx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - if (NewState == ENABLE) - { - UARTx->ICR |= UART_ICR_IRDAEN; - } - else - { - UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Configure Pulse divider for IrDA function on UART peripheral. - * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only) - * @param[in] PulseDiv Pulse Divider value from Peripheral clock, - * should be one of the following: - - UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk - - UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk - - UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk - - UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk - - UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk - - UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk - - UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk - - UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk - - * @return none - **********************************************************************/ -void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv) -{ - uint32_t tmp, tmp1; - CHECK_PARAM(PARAM_UART_IrDA(UARTx)); - CHECK_PARAM(PARAM_UART_IrDA_PULSEDIV(PulseDiv)); - - tmp1 = UART_ICR_PULSEDIV(PulseDiv); - tmp = UARTx->ICR & (~UART_ICR_PULSEDIV(7)); - tmp |= tmp1 | UART_ICR_FIXPULSE_EN; - UARTx->ICR = tmp & UART_ICR_BITMASK; -} - -#endif - - -/* UART1 FullModem function ---------------------------------------------*/ - -#ifdef _UART1 - -/*********************************************************************//** - * @brief Force pin DTR/RTS corresponding to given state (Full modem mode) - * @param[in] UARTx LPC_UART1 (only) - * @param[in] Pin Pin that NewState will be applied to, should be: - * - UART1_MODEM_PIN_DTR: DTR pin. - * - UART1_MODEM_PIN_RTS: RTS pin. - * @param[in] NewState New State of DTR/RTS pin, should be: - * - INACTIVE: Force the pin to inactive signal. - - ACTIVE: Force the pin to active signal. - * @return none - **********************************************************************/ -void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \ - UART1_SignalState NewState) -{ - uint8_t tmp = 0; - - CHECK_PARAM(PARAM_UART1_MODEM(UARTx)); - CHECK_PARAM(PARAM_UART1_MODEM_PIN(Pin)); - CHECK_PARAM(PARAM_UART1_SIGNALSTATE(NewState)); - - switch (Pin){ - case UART1_MODEM_PIN_DTR: - tmp = UART1_MCR_DTR_CTRL; - break; - case UART1_MODEM_PIN_RTS: - tmp = UART1_MCR_RTS_CTRL; - break; - default: - break; - } - - if (NewState == ACTIVE){ - UARTx->MCR |= tmp; - } else { - UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Configure Full Modem mode for UART peripheral - * @param[in] UARTx LPC_UART1 (only) - * @param[in] Mode Full Modem mode, should be: - * - UART1_MODEM_MODE_LOOPBACK: Loop back mode. - * - UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode. - * - UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode. - * @param[in] NewState New State of this mode, should be: - * - ENABLE: Enable this mode. - - DISABLE: Disable this mode. - * @return none - **********************************************************************/ -void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \ - FunctionalState NewState) -{ - uint8_t tmp = 0; - - CHECK_PARAM(PARAM_UART1_MODEM(UARTx)); - CHECK_PARAM(PARAM_UART1_MODEM_MODE(Mode)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); - - switch(Mode){ - case UART1_MODEM_MODE_LOOPBACK: - tmp = UART1_MCR_LOOPB_EN; - break; - case UART1_MODEM_MODE_AUTO_RTS: - tmp = UART1_MCR_AUTO_RTS_EN; - break; - case UART1_MODEM_MODE_AUTO_CTS: - tmp = UART1_MCR_AUTO_CTS_EN; - break; - default: - break; - } - - if (NewState == ENABLE) - { - UARTx->MCR |= tmp; - } - else - { - UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK; - } -} - - -/*********************************************************************//** - * @brief Get current status of modem status register - * @param[in] UARTx LPC_UART1 (only) - * @return Current value of modem status register - * Note: The return value of this function must be ANDed with each member - * UART_MODEM_STAT_type enumeration to determine current flag status - * corresponding to each modem flag status. Because some flags in - * modem status register will be cleared after reading, the next reading - * modem register could not be correct. So this function used to - * read modem status register in one time only, then the return value - * used to check all flags. - **********************************************************************/ -uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx) -{ - CHECK_PARAM(PARAM_UART1_MODEM(UARTx)); - return ((UARTx->MSR) & UART1_MSR_BITMASK); -} - - -/* UART RS485 functions --------------------------------------------------------------*/ - -/*********************************************************************//** - * @brief Configure UART peripheral in RS485 mode according to the specified -* parameters in the RS485ConfigStruct. - * @param[in] UARTx LPC_UART1 (only) - * @param[in] RS485ConfigStruct Pointer to a UART1_RS485_CTRLCFG_Type structure -* that contains the configuration information for specified UART -* in RS485 mode. - * @return None - **********************************************************************/ -void UART_RS485Config(LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct) -{ - uint32_t tmp; - - CHECK_PARAM(PARAM_UART1_MODEM(UARTx)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoAddrDetect_State)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoDirCtrl_State)); - CHECK_PARAM(PARAM_UART1_RS485_CFG_DELAYVALUE(RS485ConfigStruct->DelayValue)); - CHECK_PARAM(PARAM_SETSTATE(RS485ConfigStruct->DirCtrlPol_Level)); - CHECK_PARAM(PARAM_UART_RS485_DIRCTRL_PIN(RS485ConfigStruct->DirCtrlPin)); - CHECK_PARAM(PARAM_UART1_RS485_CFG_MATCHADDRVALUE(RS485ConfigStruct->MatchAddrValue)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->NormalMultiDropMode_State)); - CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->Rx_State)); - - tmp = 0; - // If Auto Direction Control is enabled - This function is used in Master mode - if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE) - { - tmp |= UART1_RS485CTRL_DCTRL_EN; - - // Set polar - if (RS485ConfigStruct->DirCtrlPol_Level == SET) - { - tmp |= UART1_RS485CTRL_OINV_1; - } - - // Set pin according to - if (RS485ConfigStruct->DirCtrlPin == UART1_RS485_DIRCTRL_DTR) - { - tmp |= UART1_RS485CTRL_SEL_DTR; - } - - // Fill delay time - UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART1_RS485DLY_BITMASK; - } - - // MultiDrop mode is enable - if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE) - { - tmp |= UART1_RS485CTRL_NMM_EN; - } - - // Auto Address Detect function - if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE) - { - tmp |= UART1_RS485CTRL_AADEN; - // Fill Match Address - UARTx->ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART1_RS485ADRMATCH_BITMASK; - } - - - // Receiver is disable - if (RS485ConfigStruct->Rx_State == DISABLE) - { - tmp |= UART1_RS485CTRL_RX_DIS; - } - - // write back to RS485 control register - UARTx->RS485CTRL = tmp & UART1_RS485CTRL_BITMASK; - - // Enable Parity function and leave parity in stick '0' parity as default - UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN); -} - -/*********************************************************************//** - * @brief Enable/Disable receiver in RS485 module in UART1 - * @param[in] UARTx LPC_UART1 (only) - * @param[in] NewState New State of command, should be: - * - ENABLE: Enable this function. - * - DISABLE: Disable this function. - * @return None - **********************************************************************/ -void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState == ENABLE){ - UARTx->RS485CTRL &= ~UART1_RS485CTRL_RX_DIS; - } else { - UARTx->RS485CTRL |= UART1_RS485CTRL_RX_DIS; - } -} - -/*********************************************************************//** - * @brief Send data on RS485 bus with specified parity stick value (9-bit mode). - * @param[in] UARTx LPC_UART1 (only) - * @param[in] pDatFrm Pointer to data frame. - * @param[in] size Size of data. - * @param[in] ParityStick Parity Stick value, should be 0 or 1. - * @return None - **********************************************************************/ -uint32_t UART_RS485Send(LPC_UART1_TypeDef *UARTx, uint8_t *pDatFrm, \ - uint32_t size, uint8_t ParityStick) -{ - uint8_t tmp, save; - uint32_t cnt; - - if (ParityStick){ - save = tmp = UARTx->LCR & UART_LCR_BITMASK; - tmp &= ~(UART_LCR_PARITY_EVEN); - UARTx->LCR = tmp; - cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING); - while (!(UARTx->LSR & UART_LSR_TEMT)); - UARTx->LCR = save; - } else { - cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING); - while (!(UARTx->LSR & UART_LSR_TEMT)); - } - return cnt; -} - -/*********************************************************************//** - * @brief Send Slave address frames on RS485 bus. - * @param[in] UARTx LPC_UART1 (only) - * @param[in] SlvAddr Slave Address. - * @return None - **********************************************************************/ -void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr) -{ - UART_RS485Send(UARTx, &SlvAddr, 1, 1); -} - -/*********************************************************************//** - * @brief Send Data frames on RS485 bus. - * @param[in] UARTx LPC_UART1 (only) - * @param[in] pData Pointer to data to be sent. - * @param[in] size Size of data frame to be sent. - * @return None - **********************************************************************/ -uint32_t UART_RS485SendData(LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size) -{ - return (UART_RS485Send(UARTx, pData, size, 0)); -} - -#endif /* _UART1 */ - -#endif /* _UART */ - -/** - * @} - */ - -/** - * @} - */ -/* --------------------------------- End Of File ------------------------------ */ - -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/LPC17xxLib/src/lpc17xx_wdt.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,271 +0,0 @@ -#ifdef __LPC17XX__ - -/********************************************************************** -* $Id$ lpc17xx_wdt.c 2010-05-21 -*//** -* @file lpc17xx_wdt.c -* @brief Contains all functions support for WDT firmware library -* on LPC17xx -* @version 2.0 -* @date 21. May. 2010 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2010, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @addtogroup WDT - * @{ - */ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx_wdt.h" -#include "lpc17xx_clkpwr.h" -#include "lpc17xx_pinsel.h" - - -/* If this source file built with example, the LPC17xx FW library configuration - * file in each example directory ("lpc17xx_libcfg.h") must be included, - * otherwise the default FW library configuration file must be included instead - */ -#ifdef __BUILD_WITH_EXAMPLE__ -#include "lpc17xx_libcfg.h" -#else -#include "lpc17xx_libcfg_default.h" -#endif /* __BUILD_WITH_EXAMPLE__ */ - - -#ifdef _WDT - -/* Private Functions ---------------------------------------------------------- */ - -static uint8_t WDT_SetTimeOut (uint8_t clk_source, uint32_t timeout); - -/********************************************************************//** - * @brief Set WDT time out value and WDT mode - * @param[in] clk_source select Clock source for WDT device - * @param[in] timeout value of time-out for WDT (us) - * @return None - *********************************************************************/ -static uint8_t WDT_SetTimeOut (uint8_t clk_source, uint32_t timeout) -{ - - uint32_t pclk_wdt = 0; - uint32_t tempval = 0; - - switch ((WDT_CLK_OPT) clk_source) - { - case WDT_CLKSRC_IRC: - pclk_wdt = 4000000; - // Calculate TC in WDT - tempval = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4)); - // Check if it valid - if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX)) - { - LPC_WDT->WDTC = tempval; - return SUCCESS; - } - - break; - - case WDT_CLKSRC_PCLK: - - // Get WDT clock with CCLK divider = 4 - pclk_wdt = SystemCoreClock / 4; - // Calculate TC in WDT - tempval = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4)); - - if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX)) - { - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_4); - LPC_WDT->WDTC = (uint32_t) tempval; - return SUCCESS; - } - - // Get WDT clock with CCLK divider = 2 - pclk_wdt = SystemCoreClock / 2; - // Calculate TC in WDT - tempval = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4)); - - if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX)) - { - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_2); - LPC_WDT->WDTC = (uint32_t) tempval; - return SUCCESS; - } - - // Get WDT clock with CCLK divider = 1 - pclk_wdt = SystemCoreClock; - // Calculate TC in WDT - tempval = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4)); - - if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX)) - { - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_1); - LPC_WDT->WDTC = (uint32_t) tempval; - return SUCCESS; - } - break ; - - - case WDT_CLKSRC_RTC: - pclk_wdt = 32768; - // Calculate TC in WDT - tempval = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4)); - // Check if it valid - if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX)) - { - LPC_WDT->WDTC = (uint32_t) tempval; - return SUCCESS; - } - - break; - -// Error parameter - default: - break; -} - - return ERROR; -} - -/* End of Private Functions --------------------------------------------------- */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @addtogroup WDT_Public_Functions - * @{ - */ - - -/*********************************************************************//** -* @brief Initial for Watchdog function -* Clock source = RTC , -* @param[in] ClkSrc Select clock source, should be: -* - WDT_CLKSRC_IRC: Clock source from Internal RC oscillator -* - WDT_CLKSRC_PCLK: Selects the APB peripheral clock (PCLK) -* - WDT_CLKSRC_RTC: Selects the RTC oscillator -* @param[in] WDTMode WDT mode, should be: -* - WDT_MODE_INT_ONLY: Use WDT to generate interrupt only -* - WDT_MODE_RESET: Use WDT to generate interrupt and reset MCU -* @return None - **********************************************************************/ -void WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode) -{ - CHECK_PARAM(PARAM_WDT_CLK_OPT(ClkSrc)); - CHECK_PARAM(PARAM_WDT_MODE_OPT(WDTMode)); - CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_4); - - //Set clock source - LPC_WDT->WDCLKSEL &= ~WDT_WDCLKSEL_MASK; - LPC_WDT->WDCLKSEL |= ClkSrc; - //Set WDT mode - if (WDTMode == WDT_MODE_RESET){ - LPC_WDT->WDMOD |= WDT_WDMOD(WDTMode); - } -} - -/*********************************************************************//** -* @brief Start WDT activity with given timeout value -* @param[in] TimeOut WDT reset after timeout if it is not feed -* @return None - **********************************************************************/ -void WDT_Start(uint32_t TimeOut) -{ - uint32_t ClkSrc; - - ClkSrc = LPC_WDT->WDCLKSEL; - ClkSrc &=WDT_WDCLKSEL_MASK; - WDT_SetTimeOut(ClkSrc,TimeOut); - //enable watchdog - LPC_WDT->WDMOD |= WDT_WDMOD_WDEN; - WDT_Feed(); -} - -/********************************************************************//** - * @brief Read WDT Time out flag - * @param[in] None - * @return Time out flag status of WDT - *********************************************************************/ -FlagStatus WDT_ReadTimeOutFlag (void) -{ - return ((FlagStatus)((LPC_WDT->WDMOD & WDT_WDMOD_WDTOF) >>2)); -} - -/********************************************************************//** - * @brief Clear WDT Time out flag - * @param[in] None - * @return None - *********************************************************************/ -void WDT_ClrTimeOutFlag (void) -{ - LPC_WDT->WDMOD &=~WDT_WDMOD_WDTOF; -} - -/********************************************************************//** - * @brief Update WDT timeout value and feed - * @param[in] TimeOut TimeOut value to be updated - * @return None - *********************************************************************/ -void WDT_UpdateTimeOut ( uint32_t TimeOut) -{ - uint32_t ClkSrc; - ClkSrc = LPC_WDT->WDCLKSEL; - ClkSrc &=WDT_WDCLKSEL_MASK; - WDT_SetTimeOut(ClkSrc,TimeOut); - WDT_Feed(); -} - - -/********************************************************************//** - * @brief After set WDTEN, call this function to start Watchdog - * or reload the Watchdog timer - * @param[in] None - * - * @return None - *********************************************************************/ -void WDT_Feed (void) -{ - // Disable irq interrupt - __disable_irq(); - LPC_WDT->WDFEED = 0xAA; - LPC_WDT->WDFEED = 0x55; - // Then enable irq interrupt - __enable_irq(); -} - -/********************************************************************//** - * @brief Get the current value of WDT - * @param[in] None - * @return current value of WDT - *********************************************************************/ -uint32_t WDT_GetCurrentCount(void) -{ - return LPC_WDT->WDTV; -} - -/** - * @} - */ - -#endif /* _WDT */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ -#endif /* __LPC17XX__ */
--- a/libs/LPC17xx/sLPC17xx.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,968 +0,0 @@ -/****************************************************************************** - * @file: LPC17xx.h - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File for - * NXP LPC17xx Device Series - * @version: V1.04 - * @date: 2. July 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2008 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-M3 - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#ifndef __LPC17xx_H__ -#define __LPC17xx_H__ - -/* - * ========================================================================== - * ---------- Interrupt Number Definition ----------------------------------- - * ========================================================================== - */ - -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ - -/****** LPC17xx Specific Interrupt Numbers *******************************************************/ - WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */ - TIMER0_IRQn = 1, /*!< Timer0 Interrupt */ - TIMER1_IRQn = 2, /*!< Timer1 Interrupt */ - TIMER2_IRQn = 3, /*!< Timer2 Interrupt */ - TIMER3_IRQn = 4, /*!< Timer3 Interrupt */ - UART0_IRQn = 5, /*!< UART0 Interrupt */ - UART1_IRQn = 6, /*!< UART1 Interrupt */ - UART2_IRQn = 7, /*!< UART2 Interrupt */ - UART3_IRQn = 8, /*!< UART3 Interrupt */ - PWM1_IRQn = 9, /*!< PWM1 Interrupt */ - I2C0_IRQn = 10, /*!< I2C0 Interrupt */ - I2C1_IRQn = 11, /*!< I2C1 Interrupt */ - I2C2_IRQn = 12, /*!< I2C2 Interrupt */ - SPI_IRQn = 13, /*!< SPI Interrupt */ - SSP0_IRQn = 14, /*!< SSP0 Interrupt */ - SSP1_IRQn = 15, /*!< SSP1 Interrupt */ - PLL0_IRQn = 16, /*!< PLL0 Lock (Main PLL) Interrupt */ - RTC_IRQn = 17, /*!< Real Time Clock Interrupt */ - EINT0_IRQn = 18, /*!< External Interrupt 0 Interrupt */ - EINT1_IRQn = 19, /*!< External Interrupt 1 Interrupt */ - EINT2_IRQn = 20, /*!< External Interrupt 2 Interrupt */ - EINT3_IRQn = 21, /*!< External Interrupt 3 Interrupt */ - ADC_IRQn = 22, /*!< A/D Converter Interrupt */ - BOD_IRQn = 23, /*!< Brown-Out Detect Interrupt */ - USB_IRQn = 24, /*!< USB Interrupt */ - CAN_IRQn = 25, /*!< CAN Interrupt */ - DMA_IRQn = 26, /*!< General Purpose DMA Interrupt */ - I2S_IRQn = 27, /*!< I2S Interrupt */ - ENET_IRQn = 28, /*!< Ethernet Interrupt */ - RIT_IRQn = 29, /*!< Repetitive Interrupt Timer Interrupt */ - MCPWM_IRQn = 30, /*!< Motor Control PWM Interrupt */ - QEI_IRQn = 31, /*!< Quadrature Encoder Interface Interrupt */ - PLL1_IRQn = 32, /*!< PLL1 Lock (USB PLL) Interrupt */ -} IRQn_Type; - - -/* - * ========================================================================== - * ----------- Processor and Core Peripheral Section ------------------------ - * ========================================================================== - */ - -/* Configuration of the Cortex-M3 Processor and Core Peripherals */ -#define __MPU_PRESENT 1 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 5 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - - -#include "score_cm3.h" /* Cortex-M3 processor and core peripherals */ -//#include "system_LPC17xx.h" /* System Header */ - - -/******************************************************************************/ -/* Device Specific Peripheral registers structures */ -/******************************************************************************/ - -#if defined ( __CC_ARM ) -#pragma anon_unions -#endif - -/*------------- System Control (SC) ------------------------------------------*/ -typedef struct -{ - __IO uint32_t FLASHCFG; /* Flash Accelerator Module */ - uint32_t RESERVED0[31]; - __IO uint32_t PLL0CON; /* Clocking and Power Control */ - __IO uint32_t PLL0CFG; - __I uint32_t PLL0STAT; - __O uint32_t PLL0FEED; - uint32_t RESERVED1[4]; - __IO uint32_t PLL1CON; - __IO uint32_t PLL1CFG; - __I uint32_t PLL1STAT; - __O uint32_t PLL1FEED; - uint32_t RESERVED2[4]; - __IO uint32_t PCON; - __IO uint32_t PCONP; - uint32_t RESERVED3[15]; - __IO uint32_t CCLKCFG; - __IO uint32_t USBCLKCFG; - __IO uint32_t CLKSRCSEL; - uint32_t RESERVED4[12]; - __IO uint32_t EXTINT; /* External Interrupts */ - uint32_t RESERVED5; - __IO uint32_t EXTMODE; - __IO uint32_t EXTPOLAR; - uint32_t RESERVED6[12]; - __IO uint32_t RSID; /* Reset */ - uint32_t RESERVED7[7]; - __IO uint32_t SCS; /* Syscon Miscellaneous Registers */ - __IO uint32_t IRCTRIM; /* Clock Dividers */ - __IO uint32_t PCLKSEL0; - __IO uint32_t PCLKSEL1; - uint32_t RESERVED8[4]; - __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */ - uint32_t RESERVED9; - __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */ - } LPC_SC_TypeDef; - -/*------------- Pin Connect Block (PINCON) -----------------------------------*/ -typedef struct -{ - __IO uint32_t PINSEL0; - __IO uint32_t PINSEL1; - __IO uint32_t PINSEL2; - __IO uint32_t PINSEL3; - __IO uint32_t PINSEL4; - __IO uint32_t PINSEL5; - __IO uint32_t PINSEL6; - __IO uint32_t PINSEL7; - __IO uint32_t PINSEL8; - __IO uint32_t PINSEL9; - __IO uint32_t PINSEL10; - uint32_t RESERVED0[5]; - __IO uint32_t PINMODE0; - __IO uint32_t PINMODE1; - __IO uint32_t PINMODE2; - __IO uint32_t PINMODE3; - __IO uint32_t PINMODE4; - __IO uint32_t PINMODE5; - __IO uint32_t PINMODE6; - __IO uint32_t PINMODE7; - __IO uint32_t PINMODE8; - __IO uint32_t PINMODE9; - __IO uint32_t PINMODE_OD0; - __IO uint32_t PINMODE_OD1; - __IO uint32_t PINMODE_OD2; - __IO uint32_t PINMODE_OD3; - __IO uint32_t PINMODE_OD4; - __IO uint32_t I2CPADCFG; -} LPC_PINCON_TypeDef; - -/*------------- General Purpose Input/Output (GPIO) --------------------------*/ -typedef struct -{ - __IO uint32_t FIODIR; - uint32_t RESERVED0[3]; - __IO uint32_t FIOMASK; - __IO uint32_t FIOPIN; - __IO uint32_t FIOSET; - __O uint32_t FIOCLR; -} LPC_GPIO_TypeDef; - -typedef struct -{ - __I uint32_t IntStatus; - __I uint32_t IO0IntStatR; - __I uint32_t IO0IntStatF; - __O uint32_t IO0IntClr; - __IO uint32_t IO0IntEnR; - __IO uint32_t IO0IntEnF; - uint32_t RESERVED0[3]; - __I uint32_t IO2IntStatR; - __I uint32_t IO2IntStatF; - __O uint32_t IO2IntClr; - __IO uint32_t IO2IntEnR; - __IO uint32_t IO2IntEnF; -} LPC_GPIOINT_TypeDef; - -/*------------- Timer (TIM) --------------------------------------------------*/ -typedef struct -{ - __IO uint32_t IR; - __IO uint32_t TCR; - __IO uint32_t TC; - __IO uint32_t PR; - __IO uint32_t PC; - __IO uint32_t MCR; - __IO uint32_t MR0; - __IO uint32_t MR1; - __IO uint32_t MR2; - __IO uint32_t MR3; - __IO uint32_t CCR; - __I uint32_t CR0; - __I uint32_t CR1; - uint32_t RESERVED0[2]; - __IO uint32_t EMR; - uint32_t RESERVED1[12]; - __IO uint32_t CTCR; -} LPC_TIM_TypeDef; - -/*------------- Pulse-Width Modulation (PWM) ---------------------------------*/ -typedef struct -{ - __IO uint32_t IR; - __IO uint32_t TCR; - __IO uint32_t TC; - __IO uint32_t PR; - __IO uint32_t PC; - __IO uint32_t MCR; - __IO uint32_t MR0; - __IO uint32_t MR1; - __IO uint32_t MR2; - __IO uint32_t MR3; - __IO uint32_t CCR; - __I uint32_t CR0; - __I uint32_t CR1; - __I uint32_t CR2; - __I uint32_t CR3; - uint32_t RESERVED0; - __IO uint32_t MR4; - __IO uint32_t MR5; - __IO uint32_t MR6; - __IO uint32_t PCR; - __IO uint32_t LER; - uint32_t RESERVED1[7]; - __IO uint32_t CTCR; -} LPC_PWM_TypeDef; - -/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[7]; - __I uint8_t LSR; - uint8_t RESERVED2[7]; - __IO uint8_t SCR; - uint8_t RESERVED3[3]; - __IO uint32_t ACR; - __IO uint8_t ICR; - uint8_t RESERVED4[3]; - __IO uint8_t FDR; - uint8_t RESERVED5[7]; - __IO uint8_t TER; - uint8_t RESERVED6[39]; - __I uint8_t FIFOLVL; -} LPC_UART_TypeDef; - -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[7]; - __I uint8_t LSR; - uint8_t RESERVED2[7]; - __IO uint8_t SCR; - uint8_t RESERVED3[3]; - __IO uint32_t ACR; - __IO uint8_t ICR; - uint8_t RESERVED4[3]; - __IO uint8_t FDR; - uint8_t RESERVED5[7]; - __IO uint8_t TER; - uint8_t RESERVED6[39]; - __I uint8_t FIFOLVL; - uint8_t RESERVED7[363]; - __IO uint32_t DMAREQSEL; -} LPC_UART0_TypeDef; - -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[3]; - __IO uint8_t MCR; - uint8_t RESERVED2[3]; - __I uint8_t LSR; - uint8_t RESERVED3[3]; - __I uint8_t MSR; - uint8_t RESERVED4[3]; - __IO uint8_t SCR; - uint8_t RESERVED5[3]; - __IO uint32_t ACR; - uint32_t RESERVED6; - __IO uint32_t FDR; - uint32_t RESERVED7; - __IO uint8_t TER; - uint8_t RESERVED8[27]; - __IO uint8_t RS485CTRL; - uint8_t RESERVED9[3]; - __IO uint8_t ADRMATCH; - uint8_t RESERVED10[3]; - __IO uint8_t RS485DLY; - uint8_t RESERVED11[3]; - __I uint8_t FIFOLVL; -} LPC_UART1_TypeDef; - -/*------------- Serial Peripheral Interface (SPI) ----------------------------*/ -typedef struct -{ - __IO uint32_t SPCR; - __I uint32_t SPSR; - __IO uint32_t SPDR; - __IO uint32_t SPCCR; - uint32_t RESERVED0[3]; - __IO uint32_t SPINT; -} LPC_SPI_TypeDef; - -/*------------- Synchronous Serial Communication (SSP) -----------------------*/ -typedef struct -{ - __IO uint32_t CR0; - __IO uint32_t CR1; - __IO uint32_t DR; - __I uint32_t SR; - __IO uint32_t CPSR; - __IO uint32_t IMSC; - __IO uint32_t RIS; - __IO uint32_t MIS; - __IO uint32_t ICR; - __IO uint32_t DMACR; -} LPC_SSP_TypeDef; - -/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/ -typedef struct -{ - __IO uint32_t I2CONSET; - __I uint32_t I2STAT; - __IO uint32_t I2DAT; - __IO uint32_t I2ADR0; - __IO uint32_t I2SCLH; - __IO uint32_t I2SCLL; - __O uint32_t I2CONCLR; - __IO uint32_t MMCTRL; - __IO uint32_t I2ADR1; - __IO uint32_t I2ADR2; - __IO uint32_t I2ADR3; - __I uint32_t I2DATA_BUFFER; - __IO uint32_t I2MASK0; - __IO uint32_t I2MASK1; - __IO uint32_t I2MASK2; - __IO uint32_t I2MASK3; -} LPC_I2C_TypeDef; - -/*------------- Inter IC Sound (I2S) -----------------------------------------*/ -typedef struct -{ - __IO uint32_t I2SDAO; - __IO uint32_t I2SDAI; - __O uint32_t I2STXFIFO; - __I uint32_t I2SRXFIFO; - __I uint32_t I2SSTATE; - __IO uint32_t I2SDMA1; - __IO uint32_t I2SDMA2; - __IO uint32_t I2SIRQ; - __IO uint32_t I2STXRATE; - __IO uint32_t I2SRXRATE; - __IO uint32_t I2STXBITRATE; - __IO uint32_t I2SRXBITRATE; - __IO uint32_t I2STXMODE; - __IO uint32_t I2SRXMODE; -} LPC_I2S_TypeDef; - -/*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/ -typedef struct -{ - __IO uint32_t RICOMPVAL; - __IO uint32_t RIMASK; - __IO uint8_t RICTRL; - uint8_t RESERVED0[3]; - __IO uint32_t RICOUNTER; -} LPC_RIT_TypeDef; - -/*------------- Real-Time Clock (RTC) ----------------------------------------*/ -typedef struct -{ - __IO uint8_t ILR; - uint8_t RESERVED0[7]; - __IO uint8_t CCR; - uint8_t RESERVED1[3]; - __IO uint8_t CIIR; - uint8_t RESERVED2[3]; - __IO uint8_t AMR; - uint8_t RESERVED3[3]; - __I uint32_t CTIME0; - __I uint32_t CTIME1; - __I uint32_t CTIME2; - __IO uint8_t SEC; - uint8_t RESERVED4[3]; - __IO uint8_t MIN; - uint8_t RESERVED5[3]; - __IO uint8_t HOUR; - uint8_t RESERVED6[3]; - __IO uint8_t DOM; - uint8_t RESERVED7[3]; - __IO uint8_t DOW; - uint8_t RESERVED8[3]; - __IO uint16_t DOY; - uint16_t RESERVED9; - __IO uint8_t MONTH; - uint8_t RESERVED10[3]; - __IO uint16_t YEAR; - uint16_t RESERVED11; - __IO uint32_t CALIBRATION; - __IO uint32_t GPREG0; - __IO uint32_t GPREG1; - __IO uint32_t GPREG2; - __IO uint32_t GPREG3; - __IO uint32_t GPREG4; - __IO uint8_t RTC_AUXEN; - uint8_t RESERVED12[3]; - __IO uint8_t RTC_AUX; - uint8_t RESERVED13[3]; - __IO uint8_t ALSEC; - uint8_t RESERVED14[3]; - __IO uint8_t ALMIN; - uint8_t RESERVED15[3]; - __IO uint8_t ALHOUR; - uint8_t RESERVED16[3]; - __IO uint8_t ALDOM; - uint8_t RESERVED17[3]; - __IO uint8_t ALDOW; - uint8_t RESERVED18[3]; - __IO uint16_t ALDOY; - uint16_t RESERVED19; - __IO uint8_t ALMON; - uint8_t RESERVED20[3]; - __IO uint16_t ALYEAR; - uint16_t RESERVED21; -} LPC_RTC_TypeDef; - -/*------------- Watchdog Timer (WDT) -----------------------------------------*/ -typedef struct -{ - __IO uint8_t WDMOD; - uint8_t RESERVED0[3]; - __IO uint32_t WDTC; - __O uint8_t WDFEED; - uint8_t RESERVED1[3]; - __I uint32_t WDTV; - __IO uint32_t WDCLKSEL; -} LPC_WDT_TypeDef; - -/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/ -typedef struct -{ - __IO uint32_t ADCR; - __IO uint32_t ADGDR; - uint32_t RESERVED0; - __IO uint32_t ADINTEN; - __I uint32_t ADDR0; - __I uint32_t ADDR1; - __I uint32_t ADDR2; - __I uint32_t ADDR3; - __I uint32_t ADDR4; - __I uint32_t ADDR5; - __I uint32_t ADDR6; - __I uint32_t ADDR7; - __I uint32_t ADSTAT; - __IO uint32_t ADTRM; -} LPC_ADC_TypeDef; - -/*------------- Digital-to-Analog Converter (DAC) ----------------------------*/ -typedef struct -{ - __IO uint32_t DACR; - __IO uint32_t DACCTRL; - __IO uint16_t DACCNTVAL; -} LPC_DAC_TypeDef; - -/*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/ -typedef struct -{ - __I uint32_t MCCON; - __O uint32_t MCCON_SET; - __O uint32_t MCCON_CLR; - __I uint32_t MCCAPCON; - __O uint32_t MCCAPCON_SET; - __O uint32_t MCCAPCON_CLR; - __IO uint32_t MCTIM0; - __IO uint32_t MCTIM1; - __IO uint32_t MCTIM2; - __IO uint32_t MCPER0; - __IO uint32_t MCPER1; - __IO uint32_t MCPER2; - __IO uint32_t MCPW0; - __IO uint32_t MCPW1; - __IO uint32_t MCPW2; - __IO uint32_t MCDEADTIME; - __IO uint32_t MCCCP; - __IO uint32_t MCCR0; - __IO uint32_t MCCR1; - __IO uint32_t MCCR2; - __I uint32_t MCINTEN; - __O uint32_t MCINTEN_SET; - __O uint32_t MCINTEN_CLR; - __I uint32_t MCCNTCON; - __O uint32_t MCCNTCON_SET; - __O uint32_t MCCNTCON_CLR; - __I uint32_t MCINTFLAG; - __O uint32_t MCINTFLAG_SET; - __O uint32_t MCINTFLAG_CLR; - __O uint32_t MCCAP_CLR; -} LPC_MCPWM_TypeDef; - -/*------------- Quadrature Encoder Interface (QEI) ---------------------------*/ -typedef struct -{ - __O uint32_t QEICON; - __I uint32_t QEISTAT; - __IO uint32_t QEICONF; - __I uint32_t QEIPOS; - __IO uint32_t QEIMAXPOS; - __IO uint32_t CMPOS0; - __IO uint32_t CMPOS1; - __IO uint32_t CMPOS2; - __I uint32_t INXCNT; - __IO uint32_t INXCMP; - __IO uint32_t QEILOAD; - __I uint32_t QEITIME; - __I uint32_t QEIVEL; - __I uint32_t QEICAP; - __IO uint32_t VELCOMP; - __IO uint32_t FILTER; - uint32_t RESERVED0[998]; - __O uint32_t QEIIEC; - __O uint32_t QEIIES; - __I uint32_t QEIINTSTAT; - __I uint32_t QEIIE; - __O uint32_t QEICLR; - __O uint32_t QEISET; -} LPC_QEI_TypeDef; - -/*------------- Controller Area Network (CAN) --------------------------------*/ -typedef struct -{ - __IO uint32_t mask[512]; /* ID Masks */ -} LPC_CANAF_RAM_TypeDef; - -typedef struct /* Acceptance Filter Registers */ -{ - __IO uint32_t AFMR; - __IO uint32_t SFF_sa; - __IO uint32_t SFF_GRP_sa; - __IO uint32_t EFF_sa; - __IO uint32_t EFF_GRP_sa; - __IO uint32_t ENDofTable; - __I uint32_t LUTerrAd; - __I uint32_t LUTerr; - __IO uint32_t FCANIE; - __IO uint32_t FCANIC0; - __IO uint32_t FCANIC1; -} LPC_CANAF_TypeDef; - -typedef struct /* Central Registers */ -{ - __I uint32_t CANTxSR; - __I uint32_t CANRxSR; - __I uint32_t CANMSR; -} LPC_CANCR_TypeDef; - -typedef struct /* Controller Registers */ -{ - __IO uint32_t MOD; - __O uint32_t CMR; - __IO uint32_t GSR; - __I uint32_t ICR; - __IO uint32_t IER; - __IO uint32_t BTR; - __IO uint32_t EWL; - __I uint32_t SR; - __IO uint32_t RFS; - __IO uint32_t RID; - __IO uint32_t RDA; - __IO uint32_t RDB; - __IO uint32_t TFI1; - __IO uint32_t TID1; - __IO uint32_t TDA1; - __IO uint32_t TDB1; - __IO uint32_t TFI2; - __IO uint32_t TID2; - __IO uint32_t TDA2; - __IO uint32_t TDB2; - __IO uint32_t TFI3; - __IO uint32_t TID3; - __IO uint32_t TDA3; - __IO uint32_t TDB3; -} LPC_CAN_TypeDef; - -/*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/ -typedef struct /* Common Registers */ -{ - __I uint32_t DMACIntStat; - __I uint32_t DMACIntTCStat; - __O uint32_t DMACIntTCClear; - __I uint32_t DMACIntErrStat; - __O uint32_t DMACIntErrClr; - __I uint32_t DMACRawIntTCStat; - __I uint32_t DMACRawIntErrStat; - __I uint32_t DMACEnbldChns; - __IO uint32_t DMACSoftBReq; - __IO uint32_t DMACSoftSReq; - __IO uint32_t DMACSoftLBReq; - __IO uint32_t DMACSoftLSReq; - __IO uint32_t DMACConfig; - __IO uint32_t DMACSync; -} LPC_GPDMA_TypeDef; - -typedef struct /* Channel Registers */ -{ - __IO uint32_t DMACCSrcAddr; - __IO uint32_t DMACCDestAddr; - __IO uint32_t DMACCLLI; - __IO uint32_t DMACCControl; - __IO uint32_t DMACCConfig; -} LPC_GPDMACH_TypeDef; - -/*------------- Universal Serial Bus (USB) -----------------------------------*/ -typedef struct -{ - __I uint32_t HcRevision; /* USB Host Registers */ - __IO uint32_t HcControl; - __IO uint32_t HcCommandStatus; - __IO uint32_t HcInterruptStatus; - __IO uint32_t HcInterruptEnable; - __IO uint32_t HcInterruptDisable; - __IO uint32_t HcHCCA; - __I uint32_t HcPeriodCurrentED; - __IO uint32_t HcControlHeadED; - __IO uint32_t HcControlCurrentED; - __IO uint32_t HcBulkHeadED; - __IO uint32_t HcBulkCurrentED; - __I uint32_t HcDoneHead; - __IO uint32_t HcFmInterval; - __I uint32_t HcFmRemaining; - __I uint32_t HcFmNumber; - __IO uint32_t HcPeriodicStart; - __IO uint32_t HcLSTreshold; - __IO uint32_t HcRhDescriptorA; - __IO uint32_t HcRhDescriptorB; - __IO uint32_t HcRhStatus; - __IO uint32_t HcRhPortStatus1; - __IO uint32_t HcRhPortStatus2; - uint32_t RESERVED0[40]; - __I uint32_t Module_ID; - - __I uint32_t OTGIntSt; /* USB On-The-Go Registers */ - __IO uint32_t OTGIntEn; - __O uint32_t OTGIntSet; - __O uint32_t OTGIntClr; - __IO uint32_t OTGStCtrl; - __IO uint32_t OTGTmr; - uint32_t RESERVED1[58]; - - __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */ - __IO uint32_t USBDevIntEn; - __O uint32_t USBDevIntClr; - __O uint32_t USBDevIntSet; - - __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */ - __I uint32_t USBCmdData; - - __I uint32_t USBRxData; /* USB Device Transfer Registers */ - __O uint32_t USBTxData; - __I uint32_t USBRxPLen; - __O uint32_t USBTxPLen; - __IO uint32_t USBCtrl; - __O uint32_t USBDevIntPri; - - __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */ - __IO uint32_t USBEpIntEn; - __O uint32_t USBEpIntClr; - __O uint32_t USBEpIntSet; - __O uint32_t USBEpIntPri; - - __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/ - __O uint32_t USBEpInd; - __IO uint32_t USBMaxPSize; - - __I uint32_t USBDMARSt; /* USB Device DMA Registers */ - __O uint32_t USBDMARClr; - __O uint32_t USBDMARSet; - uint32_t RESERVED2[9]; - __IO uint32_t USBUDCAH; - __I uint32_t USBEpDMASt; - __O uint32_t USBEpDMAEn; - __O uint32_t USBEpDMADis; - __I uint32_t USBDMAIntSt; - __IO uint32_t USBDMAIntEn; - uint32_t RESERVED3[2]; - __I uint32_t USBEoTIntSt; - __O uint32_t USBEoTIntClr; - __O uint32_t USBEoTIntSet; - __I uint32_t USBNDDRIntSt; - __O uint32_t USBNDDRIntClr; - __O uint32_t USBNDDRIntSet; - __I uint32_t USBSysErrIntSt; - __O uint32_t USBSysErrIntClr; - __O uint32_t USBSysErrIntSet; - uint32_t RESERVED4[15]; - - __I uint32_t I2C_RX; /* USB OTG I2C Registers */ - __O uint32_t I2C_WO; - __I uint32_t I2C_STS; - __IO uint32_t I2C_CTL; - __IO uint32_t I2C_CLKHI; - __O uint32_t I2C_CLKLO; - uint32_t RESERVED5[823]; - - union { - __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */ - __IO uint32_t OTGClkCtrl; - }; - union { - __I uint32_t USBClkSt; - __I uint32_t OTGClkSt; - }; -} LPC_USB_TypeDef; - -/*------------- Ethernet Media Access Controller (EMAC) ----------------------*/ -typedef struct -{ - __IO uint32_t MAC1; /* MAC Registers */ - __IO uint32_t MAC2; - __IO uint32_t IPGT; - __IO uint32_t IPGR; - __IO uint32_t CLRT; - __IO uint32_t MAXF; - __IO uint32_t SUPP; - __IO uint32_t TEST; - __IO uint32_t MCFG; - __IO uint32_t MCMD; - __IO uint32_t MADR; - __O uint32_t MWTD; - __I uint32_t MRDD; - __I uint32_t MIND; - uint32_t RESERVED0[2]; - __IO uint32_t SA0; - __IO uint32_t SA1; - __IO uint32_t SA2; - uint32_t RESERVED1[45]; - __IO uint32_t Command; /* Control Registers */ - __I uint32_t Status; - __IO uint32_t RxDescriptor; - __IO uint32_t RxStatus; - __IO uint32_t RxDescriptorNumber; - __I uint32_t RxProduceIndex; - __IO uint32_t RxConsumeIndex; - __IO uint32_t TxDescriptor; - __IO uint32_t TxStatus; - __IO uint32_t TxDescriptorNumber; - __IO uint32_t TxProduceIndex; - __I uint32_t TxConsumeIndex; - uint32_t RESERVED2[10]; - __I uint32_t TSV0; - __I uint32_t TSV1; - __I uint32_t RSV; - uint32_t RESERVED3[3]; - __IO uint32_t FlowControlCounter; - __I uint32_t FlowControlStatus; - uint32_t RESERVED4[34]; - __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */ - __IO uint32_t RxFilterWoLStatus; - __IO uint32_t RxFilterWoLClear; - uint32_t RESERVED5; - __IO uint32_t HashFilterL; - __IO uint32_t HashFilterH; - uint32_t RESERVED6[882]; - __I uint32_t IntStatus; /* Module Control Registers */ - __IO uint32_t IntEnable; - __O uint32_t IntClear; - __O uint32_t IntSet; - uint32_t RESERVED7; - __IO uint32_t PowerDown; - uint32_t RESERVED8; - __IO uint32_t Module_ID; -} LPC_EMAC_TypeDef; - -#if defined ( __CC_ARM ) -#pragma anon_unions -#endif - - -/******************************************************************************/ -/* Peripheral memory map */ -/******************************************************************************/ -/* Base addresses */ -#define LPC_FLASH_BASE (0x00000000UL) -#define LPC_RAM_BASE (0x10000000UL) -#define LPC_GPIO_BASE (0x2009C000UL) -#define LPC_APB0_BASE (0x40000000UL) -#define LPC_APB1_BASE (0x40080000UL) -#define LPC_AHB_BASE (0x50000000UL) -#define LPC_CM3_BASE (0xE0000000UL) - -/* APB0 peripherals */ -#define LPC_WDT_BASE (LPC_APB0_BASE + 0x00000) -#define LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000) -#define LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000) -#define LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000) -#define LPC_UART1_BASE (LPC_APB0_BASE + 0x10000) -#define LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000) -#define LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000) -#define LPC_SPI_BASE (LPC_APB0_BASE + 0x20000) -#define LPC_RTC_BASE (LPC_APB0_BASE + 0x24000) -#define LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080) -#define LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000) -#define LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000) -#define LPC_ADC_BASE (LPC_APB0_BASE + 0x34000) -#define LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000) -#define LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000) -#define LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000) -#define LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000) -#define LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000) -#define LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000) - -/* APB1 peripherals */ -#define LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000) -#define LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000) -#define LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000) -#define LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000) -#define LPC_UART2_BASE (LPC_APB1_BASE + 0x18000) -#define LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000) -#define LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000) -#define LPC_I2S_BASE (LPC_APB1_BASE + 0x28000) -#define LPC_RIT_BASE (LPC_APB1_BASE + 0x30000) -#define LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000) -#define LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000) -#define LPC_SC_BASE (LPC_APB1_BASE + 0x7C000) - -/* AHB peripherals */ -#define LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000) -#define LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000) -#define LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100) -#define LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120) -#define LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140) -#define LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160) -#define LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180) -#define LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0) -#define LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0) -#define LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0) -#define LPC_USB_BASE (LPC_AHB_BASE + 0x0C000) - -/* GPIOs */ -#define LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000) -#define LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020) -#define LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040) -#define LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060) -#define LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080) - - -/******************************************************************************/ -/* Peripheral declaration */ -/******************************************************************************/ -#define LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE ) -#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE ) -#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE ) -#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE ) -#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE ) -#define LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE ) -#define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE ) -#define LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE ) -#define LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE ) -#define LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE ) -#define LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE ) -#define LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE ) -#define LPC_UART0 ((LPC_UART0_TypeDef *) LPC_UART0_BASE ) -#define LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE ) -#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE ) -#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE ) -#define LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE ) -#define LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE ) -#define LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE ) -#define LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE ) -#define LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE ) -#define LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE ) -#define LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE ) -#define LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE ) -#define LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE ) -#define LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE ) -#define LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE ) -#define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE ) -#define LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE ) -#define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE) -#define LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE ) -#define LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE ) -#define LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE ) -#define LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE ) -#define LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE ) -#define LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE ) -#define LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE ) -#define LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE ) -#define LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE ) -#define LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE ) -#define LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE ) -#define LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE ) -#define LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE ) -#define LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE ) -#define LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE ) -#define LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE ) -#define LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE ) - -#endif // __LPC17xx_H__
--- a/libs/LPC17xx/score_cm3.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,899 +0,0 @@ -/****************************************************************************** - * @file: core_cm3.h - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version: V1.30 PRE-RELEASE - * @date: 30. July 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#ifndef __CM3_CORE_H__ -#define __CM3_CORE_H__ - -#ifdef __cplusplus - extern "C" { -#endif - -#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x30) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03) /*!< Cortex core */ - -/** - * Lint configuration \n - * ----------------------- \n - * - * The following Lint messages will be suppressed and not shown: \n - * \n - * --- Error 10: --- \n - * register uint32_t __regBasePri __asm("basepri"); \n - * Error 10: Expecting ';' \n - * \n - * --- Error 530: --- \n - * return(__regBasePri); \n - * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n - * \n - * --- Error 550: --- \n - * __regBasePri = (basePri & 0x1ff); \n - * } \n - * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n - * \n - * --- Error 754: --- \n - * uint32_t RESERVED0[24]; \n - * Info 754: local structure member '<some, not used in the HAL>' (line 109, file ./cm3_core.h) not referenced \n - * \n - * --- Error 750: --- \n - * #define __CM3_CORE_H__ \n - * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n - * \n - * --- Error 528: --- \n - * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n - * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n - * \n - * --- Error 751: --- \n - * } InterruptType_Type; \n - * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n - * \n - * \n - * Note: To re-enable a Message, insert a space before 'lint' * \n - * - */ - -/*lint -save */ -/*lint -e10 */ -/*lint -e530 */ -/*lint -e550 */ -/*lint -e754 */ -/*lint -e750 */ -/*lint -e528 */ -/*lint -e751 */ - - -#include <stdint.h> /* Include standard types */ - -#if defined (__ICCARM__) - #include <intrinsics.h> /* IAR Intrinsics */ -#endif - - -#ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ -#endif - - - - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ - -#ifdef __cplusplus -#define __I volatile /*!< defines 'read only' permissions */ -#else -#define __I volatile const /*!< defines 'read only' permissions */ -#endif -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - - - -/******************************************************************************* - * Register Abstraction - ******************************************************************************/ - - -/* System Reset */ -#define NVIC_VECTRESET 0 /*!< Vector Reset Bit */ -#define NVIC_SYSRESETREQ 2 /*!< System Reset Request */ -#define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */ -#define NVIC_AIRCR_ENDIANESS 15 /*!< Endianess */ - -/* Core Debug */ -#define CoreDebug_DEMCR_TRCENA (1 << 24) /*!< DEMCR TRCENA enable */ -#define ITM_TCR_ITMENA 1 /*!< ITM enable */ - - - - -/* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */ -typedef struct -{ - __IO uint32_t ISER[8]; /*!< Interrupt Set Enable Register */ - uint32_t RESERVED0[24]; - __IO uint32_t ICER[8]; /*!< Interrupt Clear Enable Register */ - uint32_t RSERVED1[24]; - __IO uint32_t ISPR[8]; /*!< Interrupt Set Pending Register */ - uint32_t RESERVED2[24]; - __IO uint32_t ICPR[8]; /*!< Interrupt Clear Pending Register */ - uint32_t RESERVED3[24]; - __IO uint32_t IABR[8]; /*!< Interrupt Active bit Register */ - uint32_t RESERVED4[56]; - __IO uint8_t IP[240]; /*!< Interrupt Priority Register, 8Bit wide */ - uint32_t RESERVED5[644]; - __O uint32_t STIR; /*!< Software Trigger Interrupt Register */ -} NVIC_Type; - - -/* memory mapping struct for System Control Block */ -typedef struct -{ - __I uint32_t CPUID; /*!< CPU ID Base Register */ - __IO uint32_t ICSR; /*!< Interrupt Control State Register */ - __IO uint32_t VTOR; /*!< Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */ - __IO uint32_t SCR; /*!< System Control Register */ - __IO uint32_t CCR; /*!< Configuration Control Register */ - __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IO uint32_t SHCSR; /*!< System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< Hard Fault Status Register */ - __IO uint32_t DFSR; /*!< Debug Fault Status Register */ - __IO uint32_t MMFAR; /*!< Mem Manage Address Register */ - __IO uint32_t BFAR; /*!< Bus Fault Address Register */ - __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */ - __I uint32_t PFR[2]; /*!< Processor Feature Register */ - __I uint32_t DFR; /*!< Debug Feature Register */ - __I uint32_t ADR; /*!< Auxiliary Feature Register */ - __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */ - __I uint32_t ISAR[5]; /*!< ISA Feature Register */ -} SCB_Type; - - -/* memory mapping struct for SysTick */ -typedef struct -{ - __IO uint32_t CTRL; /*!< SysTick Control and Status Register */ - __IO uint32_t LOAD; /*!< SysTick Reload Value Register */ - __IO uint32_t VAL; /*!< SysTick Current Value Register */ - __I uint32_t CALIB; /*!< SysTick Calibration Register */ -} SysTick_Type; - - -/* memory mapping structur for ITM */ -typedef struct -{ - __O union - { - __O uint8_t u8; /*!< ITM Stimulus Port 8-bit */ - __O uint16_t u16; /*!< ITM Stimulus Port 16-bit */ - __O uint32_t u32; /*!< ITM Stimulus Port 32-bit */ - } PORT [32]; /*!< ITM Stimulus Port Registers */ - uint32_t RESERVED0[864]; - __IO uint32_t TER; /*!< ITM Trace Enable Register */ - uint32_t RESERVED1[15]; - __IO uint32_t TPR; /*!< ITM Trace Privilege Register */ - uint32_t RESERVED2[15]; - __IO uint32_t TCR; /*!< ITM Trace Control Register */ - uint32_t RESERVED3[29]; - __IO uint32_t IWR; /*!< ITM Integration Write Register */ - __IO uint32_t IRR; /*!< ITM Integration Read Register */ - __IO uint32_t IMCR; /*!< ITM Integration Mode Control Register */ - uint32_t RESERVED4[43]; - __IO uint32_t LAR; /*!< ITM Lock Access Register */ - __IO uint32_t LSR; /*!< ITM Lock Status Register */ - uint32_t RESERVED5[6]; - __I uint32_t PID4; /*!< ITM Product ID Registers */ - __I uint32_t PID5; - __I uint32_t PID6; - __I uint32_t PID7; - __I uint32_t PID0; - __I uint32_t PID1; - __I uint32_t PID2; - __I uint32_t PID3; - __I uint32_t CID0; - __I uint32_t CID1; - __I uint32_t CID2; - __I uint32_t CID3; -} ITM_Type; - - -/* memory mapped struct for Interrupt Type */ -typedef struct -{ - uint32_t RESERVED0; - __I uint32_t ICTR; /*!< Interrupt Control Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) - __IO uint32_t ACTLR; /*!< Auxiliary Control Register */ -#else - uint32_t RESERVED1; -#endif -} InterruptType_Type; - - -/* Memory Protection Unit */ -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) -typedef struct -{ - __I uint32_t TYPE; /*!< MPU Type Register */ - __IO uint32_t CTRL; /*!< MPU Control Register */ - __IO uint32_t RNR; /*!< MPU Region RNRber Register */ - __IO uint32_t RBAR; /*!< MPU Region Base Address Register */ - __IO uint32_t RASR; /*!< MPU Region Attribute and Size Register */ - __IO uint32_t RBAR_A1; /*!< MPU Alias 1 Region Base Address Register */ - __IO uint32_t RASR_A1; /*!< MPU Alias 1 Region Attribute and Size Register */ - __IO uint32_t RBAR_A2; /*!< MPU Alias 2 Region Base Address Register */ - __IO uint32_t RASR_A2; /*!< MPU Alias 2 Region Attribute and Size Register */ - __IO uint32_t RBAR_A3; /*!< MPU Alias 3 Region Base Address Register */ - __IO uint32_t RASR_A3; /*!< MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; -#endif - - -/* Core Debug Register */ -typedef struct -{ - __IO uint32_t DHCSR; /*!< Debug Halting Control and Status Register */ - __O uint32_t DCRSR; /*!< Debug Core Register Selector Register */ - __IO uint32_t DCRDR; /*!< Debug Core Register Data Register */ - __IO uint32_t DEMCR; /*!< Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ -#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ - -#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ -#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) - #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ -#endif - - -/******************************************************************************* - * Hardware Abstraction Layer - ******************************************************************************/ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -#define __enable_fault_irq __enable_fiq -#define __disable_fault_irq __disable_fiq - -#define __NOP __nop -#define __WFI __wfi -#define __WFE __wfe -#define __SEV __sev -#define __ISB() __isb(0) -#define __DSB() __dsb(0) -#define __DMB() __dmb(0) -#define __REV __rev -#define __RBIT __rbit -#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) -#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) -#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) -#define __STREXB(value, ptr) __strex(value, ptr) -#define __STREXH(value, ptr) __strex(value, ptr) -#define __STREXW(value, ptr) __strex(value, ptr) - - -/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ -/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ -/* intrinsic void __enable_irq(); */ -/* intrinsic void __disable_irq(); */ - - -#if (__ARMCC_VERSION < 400000) - -#else /* (__ARMCC_VERSION >= 400000) */ - - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -#define __CLREX __clrex - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -static __INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -static __INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0xff); -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -static __INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -static __INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -static __INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -static __INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & 1); -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -static __INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -static __INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ - -#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ -#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ - -static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } - -#define __NOP __no_operation() /*!< no operation intrinsic in IAR Compiler */ -static __INLINE void __WFI() { __ASM ("wfi"); } -static __INLINE void __WFE() { __ASM ("wfe"); } -static __INLINE void __SEV() { __ASM ("sev"); } -static __INLINE void __CLREX() { __ASM ("clrex"); } - -/* intrinsic void __ISB(void) */ -/* intrinsic void __DSB(void) */ -/* intrinsic void __DMB(void) */ -/* intrinsic void __set_PRIMASK(); */ -/* intrinsic void __get_PRIMASK(); */ -/* intrinsic void __set_FAULTMASK(); */ -/* intrinsic void __get_FAULTMASK(); */ -/* intrinsic uint32_t __REV(uint32_t value); */ -/* intrinsic uint32_t __REVSH(uint32_t value); */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ -/* intrinsic unsigned long __LDREX(unsigned long *); */ - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } -static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } - -static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } - -static __INLINE void __NOP() { __ASM volatile ("nop"); } -static __INLINE void __WFI() { __ASM volatile ("wfi"); } -static __INLINE void __WFE() { __ASM volatile ("wfe"); } -static __INLINE void __SEV() { __ASM volatile ("sev"); } -static __INLINE void __ISB() { __ASM volatile ("isb"); } -static __INLINE void __DSB() { __ASM volatile ("dsb"); } -static __INLINE void __DMB() { __ASM volatile ("dmb"); } -static __INLINE void __CLREX() { __ASM volatile ("clrex"); } - - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif - - - -/* ########################## NVIC functions #################################### */ - - -/** - * @brief Set the Priority Grouping in NVIC Interrupt Controller - * - * @param uint32_t priority_grouping is priority grouping field - * @return none - * - * Set the priority grouping field using the required unlock sequence. - * The parameter priority_grouping is assigned to the field - * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - */ -static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */ - reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (PriorityGroupTmp << 8))); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - -/** - * @brief Get the Priority Grouping from NVIC Interrupt Controller - * - * @param none - * @return uint32_t priority grouping field - * - * Get the priority grouping from NVIC Interrupt Controller. - * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. - */ -static __INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((SCB->AIRCR >> 8) & 0x07); /* read priority grouping field */ -} - -/** - * @brief Enable Interrupt in NVIC Interrupt Controller - * - * @param IRQn_Type IRQn specifies the interrupt number - * @return none - * - * Enable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ -} - -/** - * @brief Disable the interrupt line for external interrupt specified - * - * @param IRQn_Type IRQn is the positive number of the external interrupt - * @return none - * - * Disable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ -} - -/** - * @brief Read the interrupt pending bit for a device specific interrupt source - * - * @param IRQn_Type IRQn is the number of the device specifc interrupt - * @return uint32_t 1 if pending interrupt else 0 - * - * Read the pending register in NVIC and return 1 if its status is pending, - * otherwise it returns 0 - */ -static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ -} - -/** - * @brief Set the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Set the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ -} - -/** - * @brief Clear the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Clear the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ -} - -/** - * @brief Read the active bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return uint32_t 1 if active else 0 - * - * Read the active register in NVIC and returns 1 if its status is active, - * otherwise it returns 0. - */ -static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ -} - -/** - * @brief Set the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @param priority is the priority for the interrupt - * @return none - * - * Set the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. \n - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if(IRQn < 0) { - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ - else { - NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ -} - -/** - * @brief Read the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return uint32_t priority is the priority for the interrupt - * - * Read the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * The returned priority value is automatically aligned to the implemented - * priority bits of the microcontroller. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if(IRQn < 0) { - return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ - else { - return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ -} - - -/** - * @brief Encode the priority for an interrupt - * - * @param uint32_t PriorityGroup is the used priority group - * @param uint32_t PreemptPriority is the preemptive priority value (starting from 0) - * @param uint32_t SubPriority is the sub priority value (starting from 0) - * @return uint32_t the priority for the interrupt - * - * Encode the priority for an interrupt with the given priority group, - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The returned priority value can be used for NVIC_SetPriority(...) function - */ -static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - return ( - ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | - ((SubPriority & ((1 << (SubPriorityBits )) - 1))) - ); -} - - -/** - * @brief Decode the priority of an interrupt - * - * @param uint32_t Priority the priority for the interrupt - * @param uint32_t PrioGroup is the used priority group - * @param uint32_t* pPreemptPrio is the preemptive priority value (starting from 0) - * @param uint32_t* pSubPrio is the sub priority value (starting from 0) - * @return none - * - * Decode an interrupt priority value with the given priority group to - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The priority value can be retrieved with NVIC_GetPriority(...) function - */ -static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); - *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); -} - - - -/* ################################## SysTick function ############################################ */ - -#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) - -/* SysTick constants */ -#define SYSTICK_ENABLE 0 /* Config-Bit to start or stop the SysTick Timer */ -#define SYSTICK_TICKINT 1 /* Config-Bit to enable or disable the SysTick interrupt */ -#define SYSTICK_CLKSOURCE 2 /* Clocksource has the offset 2 in SysTick Control and Status Register */ -#define SYSTICK_MAXCOUNT ((1<<24) -1) /* SysTick MaxCount */ - -/** - * @brief Initialize and start the SysTick counter and its interrupt. - * - * @param uint32_t ticks is the number of ticks between two interrupts - * @return none - * - * Initialise the system tick timer and its interrupt and start the - * system tick timer / counter in free running mode to generate - * periodical interrupts. - */ -static __INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if (ticks > SYSTICK_MAXCOUNT) return (1); /* Reload value impossible */ - - SysTick->LOAD = (ticks & SYSTICK_MAXCOUNT) - 1; /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ - SysTick->VAL = (0x00); /* Load the SysTick Counter Value */ - SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<<SYSTICK_ENABLE) | (1<<SYSTICK_TICKINT); /* Enable SysTick IRQ and SysTick Timer */ - return (0); /* Function successful */ -} - -#endif - - - - - -/* ################################## Reset function ############################################ */ - -/** - * @brief Initiate a system reset request. - * - * @param none - * @return none - * - * Initialize a system reset request to reset the MCU - */ -static __INLINE void NVIC_SystemReset(void) -{ - SCB->AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<<NVIC_SYSRESETREQ)); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - while(1); /* wait until reset */ -} - - -/* ##################################### Debug In/Output function ########################################### */ - -extern volatile int ITM_RxBuffer; /* variable to receive characters */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */ - - -/** - * @brief Outputs a character via the ITM channel 0 - * - * @param uint32_t character to output - * @return uint32_t input character - * - * The function outputs a character via the ITM channel 0. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) && - (ITM->TCR & ITM_TCR_ITMENA) && - (ITM->TER & (1UL << 0)) ) - { - while (ITM->PORT[0].u32 == 0); - ITM->PORT[0].u8 = (uint8_t) ch; - } - return (ch); -} - - -/** - * @brief Inputs a character via variable ITM_RxBuffer - * - * @param none - * @return uint32_t input character - * - * The function inputs a character via variable ITM_RxBuffer. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE int ITM_ReceiveChar (void) { - int ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - * @brief Check if a character via variable ITM_RxBuffer is available - * - * @param none - * @return int 1 = character available, 0 = no character available - * - * The function checks variable ITM_RxBuffer whether a character is available or not. - * The function returns '1' if a character is available and '0' if no character is available. - */ -static __INLINE int ITM_CheckChar (void) { - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) { - return (0); /* no character available */ - } else { - return (1); /* character available */ - } -} - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CM3_CORE_H__ */ - -/*lint -restore */
--- a/libs/MRI_Hooks.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,74 +0,0 @@ -#include "MRI_Hooks.h" - -#include <sLPC17xx.h> -#include <mri.h> - -// This is used by MRI to turn pins on and off when entering and leaving MRI. Useful for not burning everything down -// See http://smoothieware.org/mri-debugging - -extern "C" { - static uint32_t _set_high_on_debug[5] = { -// (1 << 4) | (1 << 10) | (1 << 19) | (1 << 21), // smoothieboard stepper EN pins - 0, - 0, - 0, - 0, - 0 - }; - static uint32_t _set_low_on_debug[5] = { - 0, - 0, -// (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7), // smoothieboard heater outputs - 0, - 0, - 0 - }; - - static uint32_t _previous_state[5]; - - static LPC_GPIO_TypeDef* io; - static int i; - - void __mriPlatform_EnteringDebuggerHook() - { - for (i = 0; i < 5; i++) - { - io = (LPC_GPIO_TypeDef*) (LPC_GPIO_BASE + (0x20 * i)); - io->FIOMASK &= ~(_set_high_on_debug[i] | _set_low_on_debug[i]); - - _previous_state[i] = io->FIOPIN; - - io->FIOSET = _set_high_on_debug[i]; - io->FIOCLR = _set_low_on_debug[i]; - } - } - - void __mriPlatform_LeavingDebuggerHook() - { - for (i = 0; i < 5; i++) - { - io = (LPC_GPIO_TypeDef*) (LPC_GPIO_BASE + (0x20 * i)); - io->FIOMASK &= ~(_set_high_on_debug[i] | _set_low_on_debug[i]); - io->FIOSET = _previous_state[i] & (_set_high_on_debug[i] | _set_low_on_debug[i]); - io->FIOCLR = (~_previous_state[i]) & (_set_high_on_debug[i] | _set_low_on_debug[i]); - } - } - - void set_high_on_debug(int port, int pin) - { - if ((port >= 5) || (port < 0)) - return; - if ((pin >= 32) || (pin < 0)) - return; - _set_high_on_debug[port] |= (1<<pin); - } - - void set_low_on_debug(int port, int pin) - { - if ((port >= 5) || (port < 0)) - return; - if ((pin >= 32) || (pin < 0)) - return; - _set_low_on_debug[port] |= (1<<pin); - } -}
--- a/libs/MRI_Hooks.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,12 +0,0 @@ -#ifndef _MRI_HOOKS_H -#define _MRI_HOOKS_H - -extern "C" { - void __mriPlatform_EnteringDebuggerHook(); - void __mriPlatform_LeavingDebuggerHook(); - - void set_high_on_debug(int port, int pin); - void set_low_on_debug(int port, int pin); -} - -#endif /* _MRI_HOOKS_H */
--- a/libs/MemoryPool.cpp Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/MemoryPool.cpp Sun Mar 02 06:33:08 2014 +0000 @@ -1,6 +1,5 @@ #include "MemoryPool.h" -#include <mri.h> #include <cstdio> #define offset(x) (((uint8_t*) x) - ((uint8_t*) this->base)) @@ -94,7 +93,7 @@ { // captain, we have a problem! // this can only happen if something has corrupted our heap, since we should simply fail to find a free block if it's full - __debugbreak(); + //__debugbreak(); } } @@ -130,7 +129,7 @@ { // captain, we have a problem! // this can only happen if something has corrupted our heap, since we should simply fail to find a free block if it's full - __debugbreak(); + //__debugbreak(); } p->next += q->next; @@ -154,7 +153,7 @@ { // captain, we have a problem! // this can only happen if something has corrupted our heap, since we should simply fail to find a free block if it's full - __debugbreak(); + //__debugbreak(); } }
--- a/libs/MemoryPool.h Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/MemoryPool.h Sun Mar 02 06:33:08 2014 +0000 @@ -1,9 +1,9 @@ #ifndef _MEMORYPOOL_H #define _MEMORYPOOL_H -#include <cstdint> +#include <stdint.h> // #include <cstdio> -#include <cstdlib> +#include <stdlib.h> #ifdef MEMDEBUG #define MDEBUG(...) printf(__VA_ARGS__)
--- a/libs/Network/Drivers/LPC17XX_Ethernet.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,508 +0,0 @@ -#if 1 -#include "LPC17XX_Ethernet.h" - -#include "Kernel.h" - -#include <cstring> -#include <cstdio> - -#include "lpc17xx_clkpwr.h" - -#include <mri.h> - -// #include "netcore.h" - -static const uint8_t EMAC_clkdiv[] = { 4, 6, 8, 10, 14, 20, 28 }; - -/*--------------------------- write_PHY -------------------------------------*/ -/*********************************************************************//** -* @brief Write value to PHY device -* @param[in] PhyReg: PHY Register address -* @param[in] Value: Value to write -* @return 0 - if success -* 1 - if fail -***********************************************************************/ -static int32_t write_PHY (uint32_t PhyReg, uint16_t Value) -{ - /* Write a data 'Value' to PHY register 'PhyReg'. */ - uint32_t tout; - - LPC_EMAC->MADR = EMAC_DEF_ADR | PhyReg; - LPC_EMAC->MWTD = Value; - - /* Wait until operation completed */ - tout = 0; - for (tout = 0; tout < EMAC_MII_WR_TOUT; tout++) { - if ((LPC_EMAC->MIND & EMAC_MIND_BUSY) == 0) { - return (0); - } - } - printf("write PHY %lu %04X failed!\n", PhyReg, Value); - // Time out! - return (-1); -} - - -/*--------------------------- read_PHY --------------------------------------*/ -/*********************************************************************//** -* @brief Read value from PHY device -* @param[in] PhyReg: PHY Register address -* @return 0 - if success -* 1 - if fail -***********************************************************************/ -static int32_t read_PHY (uint32_t PhyReg) -{ - /* Read a PHY register 'PhyReg'. */ - uint32_t tout; - - LPC_EMAC->MADR = EMAC_DEF_ADR | PhyReg; - LPC_EMAC->MCMD = EMAC_MCMD_READ; - - /* Wait until operation completed */ - tout = 0; - for (tout = 0; tout < EMAC_MII_RD_TOUT; tout++) { - if ((LPC_EMAC->MIND & EMAC_MIND_BUSY) == 0) { - LPC_EMAC->MCMD = 0; - return (LPC_EMAC->MRDD); - } - } - printf("read PHY %lu failed!\n", PhyReg); - // Time out! - return (-1); -} - -/*********************************************************************//** -* @brief Set Station MAC address for EMAC module -* @param[in] abStationAddr Pointer to Station address that contains 6-bytes -* of MAC address (should be in order from MAC Address 1 to MAC Address 6) -* @return None -**********************************************************************/ -static void setEmacAddr(uint8_t abStationAddr[]) -{ - /* Set the Ethernet MAC Address registers */ - LPC_EMAC->SA0 = ((uint32_t)abStationAddr[5] << 8) | (uint32_t)abStationAddr[4]; - LPC_EMAC->SA1 = ((uint32_t)abStationAddr[3] << 8) | (uint32_t)abStationAddr[2]; - LPC_EMAC->SA2 = ((uint32_t)abStationAddr[1] << 8) | (uint32_t)abStationAddr[0]; -} - -/*********************************************************************//** -* @brief Set specified PHY mode in EMAC peripheral -* @param[in] ulPHYMode Specified PHY mode, should be: -* - EMAC_MODE_AUTO -* - EMAC_MODE_10M_FULL -* - EMAC_MODE_10M_HALF -* - EMAC_MODE_100M_FULL -* - EMAC_MODE_100M_HALF -* @return Return (0) if no error, otherwise return (-1) -**********************************************************************/ -int32_t emac_SetPHYMode(uint32_t ulPHYMode) -{ - int32_t id1, id2, tout, regv; - - id1 = read_PHY (EMAC_PHY_REG_IDR1); - id2 = read_PHY (EMAC_PHY_REG_IDR2); - - if (((id1 << 16) | (id2 & 0xFFF0)) == EMAC_SMSC_8720A) { - switch(ulPHYMode){ - case EMAC_MODE_AUTO: - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_AUTO_NEG); - /* Wait to complete Auto_Negotiation */ - for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) { - regv = read_PHY (EMAC_PHY_REG_BMSR); - if (regv & EMAC_PHY_BMSR_AUTO_DONE) { - /* Auto-negotiation Complete. */ - break; - } - if (tout == 0){ - // Time out, return error - return (-1); - } - } - break; - case EMAC_MODE_10M_FULL: - /* Connect at 10MBit full-duplex */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_FULLD_10M); - break; - case EMAC_MODE_10M_HALF: - /* Connect at 10MBit half-duplex */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_HALFD_10M); - break; - case EMAC_MODE_100M_FULL: - /* Connect at 100MBit full-duplex */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_FULLD_100M); - break; - case EMAC_MODE_100M_HALF: - /* Connect at 100MBit half-duplex */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_HALFD_100M); - break; - default: - // un-supported - return (-1); - } - } - // It's not correct module ID - else { - printf("PHY reports id %04lX %04lX - not an SMSC 8720A\n", id1, id2); - return (-1); - } - - // Update EMAC configuration with current PHY status - if (EMAC_UpdatePHYStatus() < 0){ - return (-1); - } - - // Complete - return (0); -} - -_rxbuf_t LPC17XX_Ethernet::rxbuf __attribute__ ((section ("AHBSRAM1"))) __attribute__((aligned(8))); -_txbuf_t LPC17XX_Ethernet::txbuf __attribute__ ((section ("AHBSRAM1"))) __attribute__((aligned(8))); - -LPC17XX_Ethernet* LPC17XX_Ethernet::instance; - -LPC17XX_Ethernet::LPC17XX_Ethernet() -{ - // TODO these need to be configurable - // mac_address[0] = 0xAE; - // mac_address[1] = 0xF0; - // mac_address[2] = 0x28; - // mac_address[3] = 0x5D; - // mac_address[4] = 0x66; - // mac_address[5] = 0x41; - - // ip_address = IPA(192,168,3,222); - // ip_mask = 0xFFFFFF00; - - for (int i = 0; i < LPC17XX_RXBUFS; i++) { - rxbuf.rxdesc[i].packet = rxbuf.buf[i]; - rxbuf.rxdesc[i].control = (LPC17XX_MAX_PACKET - 1) | EMAC_RCTRL_INT; - - rxbuf.rxstat[i].Info = 0; - rxbuf.rxstat[i].HashCRC = 0; - } - - for (int i = 0; i < LPC17XX_TXBUFS; i++) { - txbuf.txdesc[i].packet = txbuf.buf[i]; - txbuf.txdesc[i].control = (LPC17XX_MAX_PACKET - 1) | EMAC_TCTRL_PAD | EMAC_TCTRL_CRC | EMAC_TCTRL_LAST | EMAC_TCTRL_INT; - - txbuf.txstat[i].Info = 0; - } - - interface_name = (uint8_t*) malloc(5); - memcpy(interface_name, "eth0", 5); - - instance = this; - - up = false; -} - -void LPC17XX_Ethernet::on_module_loaded() -{ - LPC_PINCON->PINSEL2 = (1 << 0) | (1 << 2) | (1 << 8) | (1 << 16) | (1 << 18) | (1 << 20) | (1 << 28) | (1 << 30); - LPC_PINCON->PINSEL3 &= (2 << 0) | (2 << 2); - LPC_PINCON->PINSEL3 |= (1 << 0) | (1 << 2); - - printf("EMAC_INIT\n"); - emac_init(); - printf("INIT OK\n"); - - //register_for_event(ON_IDLE); - register_for_event(ON_SECOND_TICK); -} - -void LPC17XX_Ethernet::on_idle(void*) -{ - //_receive_frame(); -} - -void LPC17XX_Ethernet::on_second_tick(void *) { - check_interface(); -} - -void LPC17XX_Ethernet::check_interface() -{ -// LPC_EMAC->Command = 0x303; -// setEmacAddr(mac_address); - - uint32_t st; - st = read_PHY (EMAC_PHY_REG_BMSR); - - if ((st & EMAC_PHY_BMSR_LINK_ESTABLISHED) && (st & EMAC_PHY_BMSR_AUTO_DONE) && (up == false)) - { - // TODO: link up event - up = true; -// net->set_interface_status(this, up); - uint32_t scsr = read_PHY(EMAC_PHY_REG_SCSR); - printf("%s: link up: ", interface_name); - switch ((scsr >> 2) & 0x7) - { - case 1: - printf("10MBit Half Duplex\n"); - break; - case 5: - printf("10MBit Full Duplex\n"); - break; - case 2: - printf("100MBit Half Duplex\n"); - break; - case 6: - printf("100MBit Full Duplex\n"); - break; - default: - printf("Unknown speed: SCSR = 0x%04lX\n", scsr); - break; - } - printf("MAC Address: %02lX:%02lX:%02lX:%02lX:%02lX:%02lX\n", (LPC_EMAC->SA2) & 0xFF, (LPC_EMAC->SA2 >> 8) & 0xFF, (LPC_EMAC->SA1) & 0xFF, (LPC_EMAC->SA1 >> 8) & 0xFF, (LPC_EMAC->SA0) & 0xFF, (LPC_EMAC->SA0 >> 8) & 0xFF); - } - else if (((st & EMAC_PHY_BMSR_LINK_ESTABLISHED) == 0) && up) - { - // TODO: link down event - up = false; -// net->set_interface_status(this, up); - printf("%s: link down\n", interface_name); - } - - //printf("PHY: id:%04lX %04lX st:%04lX\n", id1, id2, st); - // printf("ETH: Rx:%lu/%lu Tx:%lu/%lu\n", LPC_EMAC->RxConsumeIndex, LPC_EMAC->RxProduceIndex, LPC_EMAC->TxProduceIndex, LPC_EMAC->TxConsumeIndex); - // printf("MII: 0x%1lX\n", LPC_EMAC->MIND); - // printf("Command: 0x%03lX Status: 0x%1lX\n", LPC_EMAC->Command, LPC_EMAC->Status); - // printf("RxN: %lu TxN: %lu\n", LPC_EMAC->RxDescriptorNumber, LPC_EMAC->TxDescriptorNumber); - // printf("MAC1: 0x%04lX MAC2: 0x%04lX\n", LPC_EMAC->MAC1, LPC_EMAC->MAC2); - // printf("MAC Address: %02lX:%02lX:%02lX:%02lX:%02lX:%02lX\n", (LPC_EMAC->SA2) & 0xFF, (LPC_EMAC->SA2 >> 8) & 0xFF, (LPC_EMAC->SA1) & 0xFF, (LPC_EMAC->SA1 >> 8) & 0xFF, (LPC_EMAC->SA0) & 0xFF, (LPC_EMAC->SA0 >> 8) & 0xFF); -} - -void LPC17XX_Ethernet::emac_init() -{ - /* Initialize the EMAC Ethernet controller. */ - int32_t regv,tout, tmp; - volatile uint32_t d; - - /* Set up clock and power for Ethernet module */ - CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCENET, ENABLE); - - /* Reset all EMAC internal modules */ - LPC_EMAC->MAC1 = EMAC_MAC1_RES_TX | EMAC_MAC1_RES_MCS_TX | EMAC_MAC1_RES_RX | - EMAC_MAC1_RES_MCS_RX | EMAC_MAC1_SIM_RES | EMAC_MAC1_SOFT_RES; - - LPC_EMAC->Command = EMAC_CR_REG_RES | EMAC_CR_TX_RES | EMAC_CR_RX_RES; - - /* A short delay after reset. */ - for (d = 256; d; d--); - - /* Initialize MAC control registers. */ - LPC_EMAC->MAC1 = EMAC_MAC1_PASS_ALL; - LPC_EMAC->MAC2 = EMAC_MAC2_CRC_EN | EMAC_MAC2_PAD_EN | EMAC_MAC2_FULL_DUP; - LPC_EMAC->MAXF = EMAC_ETH_MAX_FLEN; - /* - * Find the clock that close to desired target clock - */ - tmp = SystemCoreClock / EMAC_MCFG_MII_MAXCLK; - for (tout = 0; tout < (int32_t) sizeof (EMAC_clkdiv); tout++){ - if (EMAC_clkdiv[tout] >= tmp) break; - } - tout++; - // Write to MAC configuration register and reset - LPC_EMAC->MCFG = EMAC_MCFG_CLK_SEL(tout) | EMAC_MCFG_RES_MII; - // release reset - LPC_EMAC->MCFG &= ~(EMAC_MCFG_RES_MII); - LPC_EMAC->CLRT = EMAC_CLRT_DEF; - LPC_EMAC->IPGR = EMAC_IPGR_P2_DEF; - - /* Enable Reduced MII interface. */ - LPC_EMAC->Command = EMAC_CR_RMII; - - /* Reset Reduced MII Logic. */ - LPC_EMAC->SUPP = EMAC_SUPP_RES_RMII; - - for (d = 256; d; d--); - LPC_EMAC->SUPP = EMAC_SUPP_SPEED; - - /* Put the DP83848C in reset mode */ - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_BMCR_RESET); - - /* Wait for hardware reset to end. */ - for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) { - regv = read_PHY (EMAC_PHY_REG_BMCR); - if (!(regv & (EMAC_PHY_BMCR_RESET | EMAC_PHY_BMCR_POWERDOWN))) { - /* Reset complete, device not Power Down. */ - break; - } - if (tout == 0){ - // Time out, return ERROR - printf("ETH: PHY TIMEOUT\n"); - return; - } - } - - // Set PHY mode -// if (emac_SetPHYMode(EMAC_MODE_AUTO) < 0){ -// printf("ETH: Error Setting Mode\n"); -// return; -// } - write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_AUTO_NEG); - - // Set EMAC address - setEmacAddr(mac_address); - - /* Initialize Tx and Rx DMA Descriptors */ - LPC_EMAC->RxDescriptor = (uint32_t) rxbuf.rxdesc; - LPC_EMAC->RxStatus = (uint32_t) rxbuf.rxstat; - LPC_EMAC->RxDescriptorNumber = LPC17XX_RXBUFS-1; - - LPC_EMAC->TxDescriptor = (uint32_t) txbuf.txdesc; - LPC_EMAC->TxStatus = (uint32_t) txbuf.txstat; - LPC_EMAC->TxDescriptorNumber = LPC17XX_TXBUFS-1; - - // Set Receive Filter register: enable broadcast and multicast - LPC_EMAC->RxFilterCtrl = EMAC_RFC_BCAST_EN | EMAC_RFC_PERFECT_EN; - - /* Enable Rx Done and Tx Done interrupt for EMAC */ - LPC_EMAC->IntEnable = EMAC_INT_RX_DONE | EMAC_INT_TX_DONE; - - /* Reset all interrupts */ - LPC_EMAC->IntClear = 0xFFFF; - - /* Enable receive and transmit mode of MAC Ethernet core */ - LPC_EMAC->Command = EMAC_CR_RX_EN | EMAC_CR_TX_EN | EMAC_CR_RMII | EMAC_CR_FULL_DUP | EMAC_CR_PASS_RUNT_FRM; - LPC_EMAC->MAC1 |= EMAC_MAC1_REC_EN; - - printf("ETH:EMAC INITIALISED\n"); -} - -void LPC17XX_Ethernet::set_mac(uint8_t* newmac) -{ - memcpy(mac_address, newmac, 6); -} - -bool LPC17XX_Ethernet::_receive_frame(void *packet, int *size) -{ - if (can_read_packet() && can_write_packet()) - { - int i = LPC_EMAC->RxConsumeIndex; - RX_Stat* stat = &(rxbuf.rxstat[i]); - *size = stat->Info & EMAC_RINFO_SIZE; - memcpy(packet, rxbuf.buf[i], *size); - - //printf("Received %d byte Ethernet frame %lu/%lu\n", *size, LPC_EMAC->RxProduceIndex, LPC_EMAC->RxConsumeIndex); - - uint32_t r = LPC_EMAC->RxConsumeIndex + 1; - if (r > LPC_EMAC->RxDescriptorNumber) - r = 0; - LPC_EMAC->RxConsumeIndex = r; - - return true; - } - - return false; -} - -void LPC17XX_Ethernet::irq() -{ - // if (EMAC_IntGetStatus(EMAC_INT_RX_DONE)) - // { - // //_receive_frame(); - // } - - // if (EMAC_IntGetStatus(EMAC_INT_TX_DONE)) - // { - // } -} - -bool LPC17XX_Ethernet::can_read_packet() -{ - return (LPC_EMAC->RxProduceIndex != LPC_EMAC->RxConsumeIndex); -} - -int LPC17XX_Ethernet::read_packet(uint8_t** buf) -{ - *buf = rxbuf.buf[LPC_EMAC->RxConsumeIndex]; - return rxbuf.rxstat[LPC_EMAC->RxConsumeIndex].Info & EMAC_RINFO_SIZE; -} - -void LPC17XX_Ethernet::release_read_packet(uint8_t*) -{ - uint32_t r = LPC_EMAC->RxConsumeIndex + 1; - if (r > LPC_EMAC->RxDescriptorNumber) - r = 0; - LPC_EMAC->RxConsumeIndex = r; -} - -bool LPC17XX_Ethernet::can_write_packet() -{ - uint32_t r = LPC_EMAC->TxProduceIndex + 1; - if (r > LPC_EMAC->TxDescriptorNumber) - r = 0; - return (r != LPC_EMAC->TxConsumeIndex); -} - -int LPC17XX_Ethernet::write_packet(uint8_t* buf, int size) -{ - txbuf.txdesc[LPC_EMAC->TxProduceIndex].control = ((size - 1) & 0x7ff) | EMAC_TCTRL_LAST | EMAC_TCTRL_CRC | EMAC_TCTRL_PAD | EMAC_TCTRL_INT; - - uint32_t r = LPC_EMAC->TxProduceIndex + 1; - if (r > LPC_EMAC->TxDescriptorNumber) - r = 0; - - if (r == LPC_EMAC->TxConsumeIndex) - return 0; - - LPC_EMAC->TxProduceIndex = r; - - return size; -} - -void* LPC17XX_Ethernet::request_packet_buffer() -{ - return txbuf.txdesc[LPC_EMAC->TxProduceIndex].packet; -} - -NET_PACKET LPC17XX_Ethernet::get_new_packet_buffer(NetworkInterface* ni) -{ - if (ni != this) - return NULL; - - return (NET_PACKET) request_packet_buffer(); -} - -NET_PAYLOAD LPC17XX_Ethernet::get_payload_buffer(NET_PACKET packet) -{ - return (NET_PAYLOAD) packet; -} - -void LPC17XX_Ethernet::set_payload_length(NET_PACKET packet, int length) -{ - uint32_t offset = ((uint8_t*) packet) - txbuf.buf[0]; - int i = (offset / LPC17XX_MAX_PACKET); - if ((i < LPC17XX_TXBUFS) && ((offset % LPC17XX_MAX_PACKET) == 0)) - { - txbuf.txdesc[i].control = (txbuf.txdesc[i].control & ~EMAC_TCTRL_SIZE) | (length & EMAC_TCTRL_SIZE); - } -} - -int LPC17XX_Ethernet::receive(NetworkInterface* ni, NET_PACKET packet, int length) -{ - if (can_write_packet()) - return write_packet((uint8_t*) packet, length); - return 0; -} - -int LPC17XX_Ethernet::construct(NetworkInterface* ni, NET_PACKET packet, int length) -{ - return length; -} - -extern "C" { - void ENET_IRQHandler() - { - LPC17XX_Ethernet::instance->irq(); - } -} - -// void LPC17XX_Ethernet::provide_net(netcore* n) -// { -// NetworkInterface::provide_net(n); -// up = false; -// n->set_interface_status(this, up); -// } - -#endif
--- a/libs/Network/Drivers/LPC17XX_Ethernet.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,82 +0,0 @@ -#ifndef _LPC17XX_ETHERNET_H -#define _LPC17XX_ETHERNET_H - -#include "lpc17xx_emac.h" - -#include "Module.h" -#include "net_util.h" - -#define EMAC_SMSC_8720A 0x0007C0F0 - -// SMSC 8720A special control/status register -#define EMAC_PHY_REG_SCSR 0x1F - -#define LPC17XX_MAX_PACKET 600 -#define LPC17XX_TXBUFS 4 -#define LPC17XX_RXBUFS 4 - -typedef struct { - void* packet; - uint32_t control; -} packet_desc; - -typedef struct { - uint8_t buf[LPC17XX_RXBUFS][LPC17XX_MAX_PACKET]; - RX_Stat rxstat[LPC17XX_RXBUFS]; - packet_desc rxdesc[LPC17XX_RXBUFS]; -} _rxbuf_t; - -typedef struct { - uint8_t buf[LPC17XX_TXBUFS][LPC17XX_MAX_PACKET]; - TX_Stat txstat[LPC17XX_TXBUFS]; - packet_desc txdesc[LPC17XX_TXBUFS]; -} _txbuf_t; - -class LPC17XX_Ethernet; - -class LPC17XX_Ethernet : public Module, public NetworkInterface -{ -public: - LPC17XX_Ethernet(); - - void on_module_loaded(); - void on_idle(void*); - void on_second_tick(void*); - - void emac_init(void) __attribute__ ((optimize("O0"))); - - void set_mac(uint8_t*); - - void irq(void); - - bool _receive_frame(void *packet, int* size); - - // NetworkInterface methods -// void provide_net(netcore* n); - bool can_read_packet(void); - int read_packet(uint8_t**); - void release_read_packet(uint8_t*); - void periodical(int); - - bool can_write_packet(void); - int write_packet(uint8_t *, int); - - void* request_packet_buffer(void); - - // Encapsulator methods - int receive(NetworkInterface* ni, NET_PACKET, int); - int construct(NetworkInterface* ni, NET_PACKET, int); - NET_PACKET get_new_packet_buffer(NetworkInterface*); - NET_PAYLOAD get_payload_buffer(NET_PACKET); - void set_payload_length(NET_PACKET, int); - - static LPC17XX_Ethernet* instance; - -private: - static _rxbuf_t rxbuf; - static _txbuf_t txbuf; - - void check_interface(); -}; - -#endif /* _LPC17XX_ETHERNET_H */
--- a/libs/Network/net_util.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,103 +0,0 @@ -#include "net_util.h" - -#include <cstdio> -#include <cstring> - -static uint8_t hexalpha[] = "0123456789ABCDEF"; -const uint8_t broadcast[6] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; - -bool compare_mac(const uint8_t* mac1, const uint8_t* mac2, const uint8_t* mask) -{ - uint8_t m; - for (int i = 0; i < 6; i++) - { - m = 0xFF; - if (mask) - m = mask[i]; - if ((mac1[i] & m) != (mac2[i] & m)) - return false; - } - return true; -} - -uint32_t unaligned_u32(uint8_t* buf) -{ - return buf[0] | (buf[1] << 8) | (buf[2] << 16) | (buf[3] << 24); -} - -uint16_t unaligned_u16(uint8_t* buf) -{ - return buf[0] | (buf[1] << 8); -} - -int format_ip(uint32_t ip, uint8_t* buf) -{ - uint8_t *p = (uint8_t*) &ip; - return snprintf((char*) buf, IP_STR_LEN, "%d.%d.%d.%d", p[3], p[2], p[1], p[0]); -} - -int format_mac(uint8_t mac[6], uint8_t buf[MAC_STR_LEN]) -{ - if (compare_mac(mac, broadcast, broadcast)) - { - memcpy(buf, "[Broadcast ]", MAC_STR_LEN); - return MAC_STR_LEN - 1; - } - - int i; - for (i = 0; i < 12; i++) - { - buf[i + (i >> 1)] = hexalpha[(mac[i >> 1] >> ((i & 1)?0:4)) & 0x0F]; - if (i < 5) - buf[(i * 3) + 2] = ':'; - } - buf[MAC_STR_LEN - 1] = 0; - return MAC_STR_LEN - 1; -} - -int checksum16(uint8_t* buf, int count, int start) -{ - /* Compute Internet Checksum for "count" bytes - * beginning at location "addr". - */ - register uint32_t sum = start; - - while( count > 1 ) { - /* This is the inner loop */ - sum += unaligned_u16(buf); - buf += 2; - count -= 2; - } - - /* Add left-over byte, if any */ - if( count > 0 ) - sum += * (uint8_t *) buf; - - /* Fold 32-bit sum to 16 bits */ - while (sum & 0xFFFF0000) - sum = (sum & 0xFFFF) + (sum >> 16); - - return (~sum) & 0xFFFF; -} - -uint32_t crc32(uint8_t* buf, int length) -{ - static const uint32_t crc32_table[] = - { - 0x4DBDF21C, 0x500AE278, 0x76D3D2D4, 0x6B64C2B0, - 0x3B61B38C, 0x26D6A3E8, 0x000F9344, 0x1DB88320, - 0xA005713C, 0xBDB26158, 0x9B6B51F4, 0x86DC4190, - 0xD6D930AC, 0xCB6E20C8, 0xEDB71064, 0xF0000000 - }; - - int n; - uint32_t crc=0; - - for (n = 0; n < length; n++) - { - crc = (crc >> 4) ^ crc32_table[(crc ^ (buf[n] >> 0)) & 0x0F]; /* lower nibble */ - crc = (crc >> 4) ^ crc32_table[(crc ^ (buf[n] >> 4)) & 0x0F]; /* upper nibble */ - } - - return crc; -}
--- a/libs/Network/net_util.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,99 +0,0 @@ -#ifndef _NET_UTIL_H -#define _NET_UTIL_H - -#include <cstdint> -#include <cstdlib> -#include <cstdio> -#include <cstring> - -#define HARDWARE_TYPE_ETHERNET 1 - -#define SIZEOF_MAC 6 -#define SIZEOF_IP 4 - -#define MAC_STR_LEN 18 -#define IP_STR_LEN 16 - -// uint16_t htons(uint16_t v); -#define htons(a) ((((a) >> 8) & 0xFF) | (((a) << 8) & 0xFF00)) -#define ntohs(a) htons(a) - -// uint32_t htonl(uint32_t v); -#define htonl(a) ((((a) >> 24) & 0x000000FF) | (((a) >> 8) & 0x0000FF00) | (((a) << 8) & 0x00FF0000) | (((a) << 24) & 0xFF000000)) -#define ntohl(a) htonl(a) - -#define compare_ip(ip1, ip2, mask) (((ip1) & (mask)) == ((ip2) & (mask))) - -#define IPA(a, b, c, d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d)) - -typedef uint32_t IP_ADDR; -typedef uint32_t* NET_PACKET; -typedef uint8_t* NET_PAYLOAD; - -// class netcore; -class Encapsulated; -class Encapsulator; -class NetworkInterface; - -class Encapsulated -{ -public: - virtual int receive(NetworkInterface*, NET_PACKET, int) = 0; - virtual int construct(NetworkInterface*, NET_PACKET, int) = 0; -}; - -class Encapsulator : public Encapsulated -{ -public: - virtual NET_PACKET get_new_packet_buffer(NetworkInterface*) = 0; - virtual NET_PAYLOAD get_payload_buffer(NET_PACKET) = 0; - virtual void set_payload_length(NET_PACKET, int) = 0; -}; - -class Period_receiver -{ -public: - virtual int periodical(int, NetworkInterface*, NET_PACKET, int) = 0; -}; - -class NetworkInterface : public Encapsulator { -public: - virtual const uint8_t* get_name(void) { return interface_name; }; -// virtual void provide_net(netcore* n){ net = n; } - -// virtual bool if_up(void) = 0; - - virtual bool can_read_packet(void) = 0; - virtual int read_packet(uint8_t**) = 0; - void release_read_packet(uint8_t*); - - virtual bool can_write_packet(void) = 0; - virtual int write_packet(uint8_t *, int) = 0; - - virtual void* request_packet_buffer(void) = 0; - - virtual void set_ip(uint32_t new_ip) { ip_address = new_ip; }; - virtual void set_mac(uint8_t new_mac[6]) { memcpy(mac_address, new_mac, 6); }; - - bool isUp() { return up; } - -// netcore* net; - uint8_t* interface_name; - - IP_ADDR ip_address; - IP_ADDR ip_mask; - - uint8_t mac_address[6]; - - bool up; -}; - -extern const uint8_t broadcast[6]; - -bool compare_mac(const uint8_t*, const uint8_t*, const uint8_t*); -int format_mac(uint8_t*, uint8_t*); -int format_ip(uint32_t, uint8_t*); -int checksum16(uint8_t*, int, int); -uint32_t crc32(uint8_t* buf, int length); - -#endif /* _NET_UTIL_H */
--- a/libs/Network/uip/CallbackStream.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,67 +0,0 @@ -#include "CallbackStream.h" -#include "Kernel.h" - -#define DEBUG_PRINTF std::printf - -CallbackStream::CallbackStream(cb_t cb, void *u) -{ - DEBUG_PRINTF("Callbackstream ctor: %p\n", this); - callback= cb; - user= u; - closed= false; - use_count= 0; -} - -CallbackStream::~CallbackStream() -{ - DEBUG_PRINTF("Callbackstream dtor: %p\n", this); -} - -int CallbackStream::puts(const char *s) -{ - if(closed) return 0; - - if(s == NULL) return (*callback)(NULL, user); - - int len = strlen(s); - int n; - do { - // call this streams result callback - n= (*callback)(s, user); - - // if closed just pretend we sent it - if(n == -1) { - closed= true; - return len; - - }else if(n == 0) { - // if output queue is full - // call idle until we can output more - THEKERNEL->call_event(ON_IDLE); - } - } while(n == 0); - - return len; -} - -void CallbackStream::mark_closed() -{ - closed= true; - if(use_count <= 0) delete this; -} -void CallbackStream::dec() -{ - use_count--; - if(closed && use_count <= 0) delete this; -} - -extern "C" void *new_callback_stream(cb_t cb, void *u) -{ - return new CallbackStream(cb, u); -} - -extern "C" void delete_callback_stream(void *p) -{ - // we don't delete it in case it is still on the command queue - ((CallbackStream*)p)->mark_closed(); -}
--- a/libs/Network/uip/CallbackStream.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,34 +0,0 @@ -#ifndef CALLBACKSTREAM_H -#define CALLBACKSTREAM_H - -typedef int (*cb_t)(const char *, void *); - -#ifdef __cplusplus -#include "libs/StreamOutput.h" - - -class CallbackStream : public StreamOutput { - public: - CallbackStream(cb_t cb, void *u); - virtual ~CallbackStream(); - int puts(const char*); - void inc() { use_count++; } - void dec(); - int get_count() { return use_count; } - void mark_closed(); - - private: - cb_t callback; - void *user; - bool closed; - int use_count; -}; - -#else - -extern void *new_callback_stream(cb_t cb, void *); -extern void delete_callback_stream(void *); - -#endif // __cplusplus - -#endif
--- a/libs/Network/uip/CommandQueue.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,68 +0,0 @@ -#include "CommandQueue.h" - -#include "stdio.h" -#include "string.h" -#include "stdlib.h" - -#include "Kernel.h" -#include "libs/SerialMessage.h" -#include "CallbackStream.h" - -static CommandQueue *command_queue_instance; -CommandQueue *CommandQueue::instance = NULL; - - -CommandQueue::CommandQueue() -{ - command_queue_instance = this; - null_stream= &(StreamOutput::NullStream); -} - -CommandQueue* CommandQueue::getInstance() -{ - if(instance == 0) instance= new CommandQueue(); - return instance; -} - -extern "C" { - int network_add_command(const char *cmd, void *pstream) - { - return command_queue_instance->add(cmd, (StreamOutput*)pstream); - } -} - -int CommandQueue::add(const char *cmd, StreamOutput *pstream) -{ - cmd_t c= {strdup(cmd), pstream==NULL?null_stream:pstream}; - q.push(c); - if(pstream != NULL) { - // count how many times this is on the queue - CallbackStream *s= static_cast<CallbackStream *>(pstream); - s->inc(); - } - return q.size(); -} - -// pops the next command off the queue and submits it. -bool CommandQueue::pop() -{ - if (q.size() == 0) return false; - - cmd_t c= q.pop(); - char *cmd= c.str; - - struct SerialMessage message; - message.message = cmd; - message.stream = c.pstream; - - free(cmd); - THEKERNEL->call_event(ON_CONSOLE_LINE_RECEIVED, &message ); - - if(message.stream != null_stream) { - message.stream->puts(NULL); // indicates command is done - // decrement usage count - CallbackStream *s= static_cast<CallbackStream *>(message.stream); - s->dec(); - } - return true; -}
--- a/libs/Network/uip/CommandQueue.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,33 +0,0 @@ -#ifndef _COMMANDQUEUE_H_ -#define _COMMANDQUEUE_H_ - -#ifdef __cplusplus - -#include "fifo.h" -#include <string> - -#include "StreamOutput.h" - -class CommandQueue -{ -public: - CommandQueue(); - ~CommandQueue(); - bool pop(); - int add(const char* cmd, StreamOutput *pstream); - int size() {return q.size();} - static CommandQueue* getInstance(); - -private: - typedef struct {char* str; StreamOutput *pstream; } cmd_t; - Fifo<cmd_t> q; - static CommandQueue *instance; - StreamOutput *null_stream; -}; - -#else - -extern int network_add_command(const char * cmd, void *pstream); -#endif - -#endif
--- a/libs/Network/uip/Network.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,428 +0,0 @@ -#pragma GCC diagnostic ignored "-Wstrict-aliasing" -#pragma GCC diagnostic ignored "-Wcast-qual" -#pragma GCC diagnostic ignored "-Wcast-align" - -#include "CommandQueue.h" - -#include "Kernel.h" - -#include "Network.h" -#include "PublicDataRequest.h" -#include "PlayerPublicAccess.h" -#include "net_util.h" -#include "uip_arp.h" -#include "clock-arch.h" - -#include "uip.h" -#include "telnetd.h" -#include "webserver.h" -#include "dhcpc.h" -#include "sftpd.h" - - -#include <mri.h> - -#define BUF ((struct uip_eth_hdr *)&uip_buf[0]) - -extern "C" void uip_log(char *m) -{ - printf("uIP log message: %s\n", m); -} - -static bool webserver_enabled, telnet_enabled, use_dhcp; -static Network *theNetwork; -static Sftpd *sftpd; -static CommandQueue *command_q= CommandQueue::getInstance(); - -Network* Network::instance; -Network::Network() -{ - ethernet = new LPC17XX_Ethernet(); - tickcnt= 0; - theNetwork= this; - sftpd= NULL; - instance= this; -} - -Network::~Network() -{ - delete ethernet; -} - -static uint32_t getSerialNumberHash() -{ -#define IAP_LOCATION 0x1FFF1FF1 - uint32_t command[1]; - uint32_t result[5]; - typedef void (*IAP)(uint32_t *, uint32_t *); - IAP iap = (IAP) IAP_LOCATION; - - __disable_irq(); - - command[0] = 58; - iap(command, result); - __enable_irq(); - return crc32((uint8_t *)&result[1], 4 * 4); -} - -static bool parse_ip_str(const string &s, uint8_t *a, int len, char sep = '.') -{ - int p = 0; - const char *n; - for (int i = 0; i < len; i++) { - if (i < len - 1) { - size_t o = s.find(sep, p); - if (o == string::npos) return false; - n = s.substr(p, o - p).c_str(); - p = o + 1; - } else { - n = s.substr(p).c_str(); - } - a[i] = atoi(n); - } - return true; -} - -void Network::on_module_loaded() -{ - if ( !THEKERNEL->config->value( network_checksum, network_enable_checksum )->by_default(false)->as_bool() ) { - // as not needed free up resource - delete this; - return; - } - - webserver_enabled = THEKERNEL->config->value( network_checksum, network_webserver_checksum, network_enable_checksum )->by_default(false)->as_bool(); - telnet_enabled = THEKERNEL->config->value( network_checksum, network_telnet_checksum, network_enable_checksum )->by_default(false)->as_bool(); - - string mac = THEKERNEL->config->value( network_checksum, network_mac_override_checksum )->by_default("")->as_string(); - if (mac.size() == 17 ) { // parse mac address - if (!parse_ip_str(mac, mac_address, 6, ':')) { - printf("Invalid MAC address: %s\n", mac.c_str()); - printf("Network not started due to errors in config"); - return; - } - - } else { // autogenerate - uint32_t h = getSerialNumberHash(); - mac_address[0] = 0x00; // OUI - mac_address[1] = 0x1F; // OUI - mac_address[2] = 0x11; // OUI - mac_address[3] = 0x02; // Openmoko allocation for smoothie board - mac_address[4] = 0x04; // 04-14 03 bits -> chip id, 1 bits -> hashed serial - mac_address[5] = h & 0xFF; // 00-FF 8bits -> hashed serial - } - - ethernet->set_mac(mac_address); - - // get IP address, mask and gateway address here.... - bool bad = false; - string s = THEKERNEL->config->value( network_checksum, network_ip_address_checksum )->by_default("auto")->as_string(); - if (s == "auto") { - use_dhcp = true; - - } else { - use_dhcp = false; - if (!parse_ip_str(s, ipaddr, 4)) { - printf("Invalid IP address: %s\n", s.c_str()); - bad = true; - } - s = THEKERNEL->config->value( network_checksum, network_ip_mask_checksum )->by_default("255.255.255.0")->as_string(); - if (!parse_ip_str(s, ipmask, 4)) { - printf("Invalid IP Mask: %s\n", s.c_str()); - bad = true; - } - s = THEKERNEL->config->value( network_checksum, network_ip_gateway_checksum )->by_default("192.168.3.1")->as_string(); - if (!parse_ip_str(s, ipgw, 4)) { - printf("Invalid IP gateway: %s\n", s.c_str()); - bad = true; - } - - if (bad) { - printf("Network not started due to errors in config"); - return; - } - } - - THEKERNEL->add_module( ethernet ); - THEKERNEL->slow_ticker->attach( 100, this, &Network::tick ); - - // Register for events - this->register_for_event(ON_IDLE); - this->register_for_event(ON_MAIN_LOOP); - this->register_for_event(ON_GET_PUBLIC_DATA); - - this->init(); -} - -void Network::on_get_public_data(void* argument) { - PublicDataRequest* pdr = static_cast<PublicDataRequest*>(argument); - - if(!pdr->starts_with(network_checksum)) return; - - if(pdr->second_element_is(get_ip_checksum)) { - pdr->set_data_ptr(this->ipaddr); - pdr->set_taken(); - - }else if(pdr->second_element_is(get_ipconfig_checksum)) { - // NOTE caller must free the returned string when done - char buf[200]; - int n1= snprintf(buf, sizeof(buf), "IP Addr: %d.%d.%d.%d\n", ipaddr[0], ipaddr[1], ipaddr[2], ipaddr[3]); - int n2= snprintf(&buf[n1], sizeof(buf)-n1, "IP GW: %d.%d.%d.%d\n", ipgw[0], ipgw[1], ipgw[2], ipgw[3]); - int n3= snprintf(&buf[n1+n2], sizeof(buf)-n1-n2, "IP mask: %d.%d.%d.%d\n", ipmask[0], ipmask[1], ipmask[2], ipmask[3]); - int n4= snprintf(&buf[n1+n2+n3], sizeof(buf)-n1-n2-n3, "MAC Address: %02X:%02X:%02X:%02X:%02X:%02X\n", - mac_address[0], mac_address[1], mac_address[2], mac_address[3], mac_address[4], mac_address[5]); - char *str = (char *)malloc(n1+n2+n3+n4+1); - memcpy(str, buf, n1+n2+n3+n4); - str[n1+n2+n3+n4]= '\0'; - pdr->set_data_ptr(str); - pdr->set_taken(); - } -} - -uint32_t Network::tick(uint32_t dummy) -{ - do_tick(); - tickcnt++; - return 0; -} - -void Network::on_idle(void *argument) -{ - if (!ethernet->isUp()) return; - - int len; - if (ethernet->_receive_frame(uip_buf, &len)) { - uip_len = len; - this->handlePacket(); - - } else { - - if (timer_expired(&periodic_timer)) { /* no packet but periodic_timer time out (0.1s)*/ - timer_reset(&periodic_timer); - - for (int i = 0; i < UIP_CONNS; i++) { - uip_periodic(i); - /* If the above function invocation resulted in data that - should be sent out on the network, the global variable - uip_len is set to a value > 0. */ - if (uip_len > 0) { - uip_arp_out(); - tapdev_send(uip_buf, uip_len); - } - } - -#if UIP_CONF_UDP - for (int i = 0; i < UIP_UDP_CONNS; i++) { - uip_udp_periodic(i); - /* If the above function invocation resulted in data that - should be sent out on the network, the global variable - uip_len is set to a value > 0. */ - if (uip_len > 0) { - uip_arp_out(); - tapdev_send(uip_buf, uip_len); - } - } -#endif - } -/* - This didn't work actually made it worse,it should have worked though - else{ - // TODO if the command queue is below a certain amount we should poll any stopped connections - if(command_q->size() < 4) { - for (struct uip_conn *connr = &uip_conns[0]; connr <= &uip_conns[UIP_CONNS - 1]; ++connr) { - if(uip_stopped(connr)){ - // Force a poll of this - printf("Force poll of connection\n"); - uip_poll_conn(connr); - } - } - } - } -*/ - /* Call the ARP timer function every 10 seconds. */ - if (timer_expired(&arp_timer)) { - timer_reset(&arp_timer); - uip_arp_timer(); - } - } -} - -static void setup_servers() -{ - if (webserver_enabled) { - // Initialize the HTTP server, listen to port 80. - httpd_init(); - printf("Webserver initialized\n"); - } - - if (telnet_enabled) { - // Initialize the telnet server - Telnetd::init(); - printf("Telnetd initialized\n"); - } - - // sftpd service, which is lazily created on reciept of first packet - uip_listen(HTONS(115)); -} - -extern "C" void dhcpc_configured(const struct dhcpc_state *s) -{ - printf("Got IP address %d.%d.%d.%d\n", - uip_ipaddr1(&s->ipaddr), uip_ipaddr2(&s->ipaddr), - uip_ipaddr3(&s->ipaddr), uip_ipaddr4(&s->ipaddr)); - printf("Got netmask %d.%d.%d.%d\n", - uip_ipaddr1(&s->netmask), uip_ipaddr2(&s->netmask), - uip_ipaddr3(&s->netmask), uip_ipaddr4(&s->netmask)); - printf("Got DNS server %d.%d.%d.%d\n", - uip_ipaddr1(&s->dnsaddr), uip_ipaddr2(&s->dnsaddr), - uip_ipaddr3(&s->dnsaddr), uip_ipaddr4(&s->dnsaddr)); - printf("Got default router %d.%d.%d.%d\n", - uip_ipaddr1(&s->default_router), uip_ipaddr2(&s->default_router), - uip_ipaddr3(&s->default_router), uip_ipaddr4(&s->default_router)); - printf("Lease expires in %ld seconds\n", ntohl(s->lease_time)); - - theNetwork->dhcpc_configured(s->ipaddr, s->netmask, s->default_router); -} - -void Network::dhcpc_configured(uint32_t ipaddr, uint32_t ipmask, uint32_t ipgw) -{ - memcpy(this->ipaddr, &ipaddr, 4); - memcpy(this->ipmask, &ipmask, 4); - memcpy(this->ipgw, &ipgw, 4); - - uip_sethostaddr((u16_t*)this->ipaddr); - uip_setnetmask((u16_t*)this->ipmask); - uip_setdraddr((u16_t*)this->ipgw); - - setup_servers(); -} - -void Network::init(void) -{ - // two timers for tcp/ip - timer_set(&periodic_timer, CLOCK_SECOND / 2); /* 0.5s */ - timer_set(&arp_timer, CLOCK_SECOND * 10); /* 10s */ - - // Initialize the uIP TCP/IP stack. - uip_init(); - - uip_setethaddr(mac_address); - - if (!use_dhcp) { // manual setup of ip - uip_ipaddr_t tip; /* local IP address */ - uip_ipaddr(tip, ipaddr[0], ipaddr[1], ipaddr[2], ipaddr[3]); - uip_sethostaddr(tip); /* host IP address */ - printf("IP Addr: %d.%d.%d.%d\n", ipaddr[0], ipaddr[1], ipaddr[2], ipaddr[3]); - - uip_ipaddr(tip, ipgw[0], ipgw[1], ipgw[2], ipgw[3]); - uip_setdraddr(tip); /* router IP address */ - printf("IP GW: %d.%d.%d.%d\n", ipgw[0], ipgw[1], ipgw[2], ipgw[3]); - - uip_ipaddr(tip, ipmask[0], ipmask[1], ipmask[2], ipmask[3]); - uip_setnetmask(tip); /* mask */ - printf("IP mask: %d.%d.%d.%d\n", ipmask[0], ipmask[1], ipmask[2], ipmask[3]); - setup_servers(); - - }else{ - #if UIP_CONF_UDP - dhcpc_init(mac_address, sizeof(mac_address)); - dhcpc_request(); - printf("Getting IP address....\n"); - #endif - } -} - -void Network::on_main_loop(void *argument) -{ - // issue commands here if any available - while(command_q->pop()) { - // keep feeding them until empty - } -} - -// select between webserver and telnetd server -extern "C" void app_select_appcall(void) -{ - switch (uip_conn->lport) { - case HTONS(80): - if (webserver_enabled) httpd_appcall(); - break; - - case HTONS(23): - if (telnet_enabled) Telnetd::appcall(); - break; - - case HTONS(115): - if(sftpd == NULL) { - sftpd= new Sftpd(); - sftpd->init(); - printf("Created sftpd service\n"); - } - sftpd->appcall(); - break; - - default: - printf("unknown app for port: %d\n", uip_conn->lport); - - } -} - -void Network::tapdev_send(void *pPacket, unsigned int size) -{ - memcpy(ethernet->request_packet_buffer(), pPacket, size); - ethernet->write_packet((uint8_t *) pPacket, size); -} - -// define this to split full frames into two to illicit an ack from the endpoint -#define SPLIT_OUTPUT - -#ifdef SPLIT_OUTPUT -extern "C" void uip_split_output(void); -extern "C" void tcpip_output() -{ - theNetwork->tapdev_send(uip_buf, uip_len); -} -void network_device_send() -{ - uip_split_output(); - //tcpip_output(); -} -#else -void network_device_send() -{ - tapdev_send(uip_buf, uip_len); -} -#endif - -void Network::handlePacket(void) -{ - if (uip_len > 0) { /* received packet */ - //printf("handlePacket: %d\n", uip_len); - - if (BUF->type == htons(UIP_ETHTYPE_IP)) { /* IP packet */ - uip_arp_ipin(); - uip_input(); - /* If the above function invocation resulted in data that - should be sent out on the network, the global variable - uip_len is set to a value > 0. */ - - if (uip_len > 0) { - uip_arp_out(); - network_device_send(); - } - - } else if (BUF->type == htons(UIP_ETHTYPE_ARP)) { /*ARP packet */ - uip_arp_arpin(); - /* If the above function invocation resulted in data that - should be sent out on the network, the global variable - uip_len is set to a value > 0. */ - if (uip_len > 0) { - tapdev_send(uip_buf, uip_len); /* ARP ack*/ - } - - } else { - printf("Unknown ethernet packet type %04X\n", htons(BUF->type)); - uip_len = 0; - } - } -}
--- a/libs/Network/uip/Network.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,49 +0,0 @@ -#ifndef _NETWORK_H -#define _NETWORK_H - -#include "timer.h" -#include "LPC17XX_Ethernet.h" -#include "Module.h" -#include "NetworkPublicAccess.h" - -#define network_enable_checksum CHECKSUM("enable") -#define network_webserver_checksum CHECKSUM("webserver") -#define network_telnet_checksum CHECKSUM("telnet") -#define network_mac_override_checksum CHECKSUM("mac_override") -#define network_ip_address_checksum CHECKSUM("ip_address") -#define network_ip_gateway_checksum CHECKSUM("ip_gateway") -#define network_ip_mask_checksum CHECKSUM("ip_mask") - -class Network : public Module -{ -public: - Network(); - virtual ~Network(); - - void on_module_loaded(); - void on_idle(void* argument); - void on_main_loop(void* argument); - void on_get_public_data(void* argument); - void dhcpc_configured(uint32_t ipaddr, uint32_t ipmask, uint32_t ipgw); - static Network *getInstance() { return instance;} - void tapdev_send(void *pPacket, unsigned int size); - -private: - void init(); - uint32_t tick(uint32_t dummy); - void handlePacket(); - - static Network *instance; - - LPC17XX_Ethernet *ethernet; - - struct timer periodic_timer, arp_timer; - uint8_t mac_address[6]; - uint8_t ipaddr[4]; - uint8_t ipmask[4]; - uint8_t ipgw[4]; - volatile uint32_t tickcnt; - -}; - -#endif
--- a/libs/Network/uip/NetworkPublicAccess.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,8 +0,0 @@ -#ifndef NETWORKPUBLICACCESS_H -#define NETWORKPUBLICACCESS_H - -#define network_checksum CHECKSUM("network") -#define get_ip_checksum CHECKSUM("getip") -#define get_ipconfig_checksum CHECKSUM("getipconfig") - -#endif
--- a/libs/Network/uip/c-fifo.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,18 +0,0 @@ -#ifndef _CFIFO_H_ -#define _CFIFO_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -void *new_fifo(); -void delete_fifo(void *); -char *fifo_pop(void *); -void fifo_push(void *, char *); -int fifo_size(void *); - -#ifdef __cplusplus -} -#endif - -#endif
--- a/libs/Network/uip/clock-arch.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2006, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: clock-arch.c,v 1.2 2006/06/12 08:00:31 adam Exp $ - */ - -/** - * \file - * Implementation of architecture-specific clock functionality - * \author - * Adam Dunkels <adam@sics.se> - */ - -#include "clock-arch.h" -static clock_time_t Ticks; - -void do_tick() { - Ticks++; -} - -/*---------------------------------------------------------------------------*/ -clock_time_t clock_time(void) -{ - return Ticks; -} -/*---------------------------------------------------------------------------*/
--- a/libs/Network/uip/clock-arch.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2006, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $ - */ - -#ifndef __CLOCK_ARCH_H__ -#define __CLOCK_ARCH_H__ - -typedef unsigned clock_time_t; -#define CLOCK_CONF_SECOND 100 - -#ifdef __cplusplus -extern "C" { -#endif - -void do_tick(); - -#ifdef __cplusplus -} -#endif - -#endif /* __CLOCK_ARCH_H__ */
--- a/libs/Network/uip/dhcpc/dhcpc.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,388 +0,0 @@ -/* - * Copyright (c) 2005, Swedish Institute of Computer Science - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * @(#)$Id: dhcpc.c,v 1.2 2006/06/11 21:46:37 adam Exp $ - */ - -#include <stdio.h> -#include <string.h> - -#include "uip.h" -#include "dhcpc.h" -#include "timer.h" -#include "pt.h" - -#if UIP_CONF_UDP - -#define STATE_INITIAL 0 -#define STATE_SENDING 1 -#define STATE_OFFER_RECEIVED 2 -#define STATE_CONFIG_RECEIVED 3 - -#define ntohl(a) ((((a) >> 24) & 0x000000FF) | (((a) >> 8) & 0x0000FF00) | (((a) << 8) & 0x00FF0000) | (((a) << 24) & 0xFF000000)) -static struct dhcpc_state s __attribute__ ((section ("AHBSRAM1"))); -//#define UIP_CONF_DHCP_LIGHT - -struct dhcp_msg { - u8_t op, htype, hlen, hops; - u8_t xid[4]; - u16_t secs, flags; - u8_t ciaddr[4]; - u8_t yiaddr[4]; - u8_t siaddr[4]; - u8_t giaddr[4]; - u8_t chaddr[16]; -#ifndef UIP_CONF_DHCP_LIGHT - u8_t sname[64]; - u8_t file[128]; -#endif - u8_t options[312]; -}; - -#define BOOTP_BROADCAST 0x8000 - -#define DHCP_REQUEST 1 -#define DHCP_REPLY 2 -#define DHCP_HTYPE_ETHERNET 1 -#define DHCP_HLEN_ETHERNET 6 -#define DHCP_MSG_LEN 236 - -#define DHCPC_SERVER_PORT 67 -#define DHCPC_CLIENT_PORT 68 - -#define DHCPDISCOVER 1 -#define DHCPOFFER 2 -#define DHCPREQUEST 3 -#define DHCPDECLINE 4 -#define DHCPACK 5 -#define DHCPNAK 6 -#define DHCPRELEASE 7 - -#define DHCP_OPTION_SUBNET_MASK 1 -#define DHCP_OPTION_ROUTER 3 -#define DHCP_OPTION_DNS_SERVER 6 -#define DHCP_OPTION_REQ_IPADDR 50 -#define DHCP_OPTION_LEASE_TIME 51 -#define DHCP_OPTION_MSG_TYPE 53 -#define DHCP_OPTION_SERVER_ID 54 -#define DHCP_OPTION_REQ_LIST 55 -#define DHCP_OPTION_END 255 - -static uint32_t xid= 0x00112233; - -static const u8_t magic_cookie[4] = {99, 130, 83, 99}; -/*---------------------------------------------------------------------------*/ -static u8_t * -add_msg_type(u8_t *optptr, u8_t type) -{ - *optptr++ = DHCP_OPTION_MSG_TYPE; - *optptr++ = 1; - *optptr++ = type; - return optptr; -} -/*---------------------------------------------------------------------------*/ -static u8_t * -add_server_id(u8_t *optptr) -{ - *optptr++ = DHCP_OPTION_SERVER_ID; - *optptr++ = 4; - memcpy(optptr, &s.serverid, 4); - return optptr + 4; -} -/*---------------------------------------------------------------------------*/ -static u8_t * -add_req_ipaddr(u8_t *optptr) -{ - *optptr++ = DHCP_OPTION_REQ_IPADDR; - *optptr++ = 4; - memcpy(optptr, &s.ipaddr, 4); - return optptr + 4; -} -/*---------------------------------------------------------------------------*/ -static u8_t * -add_req_options(u8_t *optptr) -{ - *optptr++ = DHCP_OPTION_REQ_LIST; - *optptr++ = 3; - *optptr++ = DHCP_OPTION_SUBNET_MASK; - *optptr++ = DHCP_OPTION_ROUTER; - *optptr++ = DHCP_OPTION_DNS_SERVER; - return optptr; -} -/*---------------------------------------------------------------------------*/ -static u8_t * -add_end(u8_t *optptr) -{ - *optptr++ = DHCP_OPTION_END; - return optptr; -} -/*---------------------------------------------------------------------------*/ -static void -create_msg(register struct dhcp_msg *m, int rea) -{ - m->op = DHCP_REQUEST; - m->htype = DHCP_HTYPE_ETHERNET; - m->hlen = s.mac_len; - m->hops = 0; - memcpy(m->xid, &xid, sizeof(m->xid)); - m->secs = 0; - m->flags = HTONS(BOOTP_BROADCAST); /* Broadcast bit. */ - /* uip_ipaddr_copy(m->ciaddr, uip_hostaddr);*/ - if(rea == 0 ) memcpy(m->ciaddr, uip_hostaddr, sizeof(m->ciaddr)); - else memset(m->ciaddr, 0, sizeof(m->ciaddr)); - memset(m->yiaddr, 0, sizeof(m->yiaddr)); - memset(m->siaddr, 0, sizeof(m->siaddr)); - memset(m->giaddr, 0, sizeof(m->giaddr)); - memcpy(m->chaddr, s.mac_addr, s.mac_len); - memset(&m->chaddr[s.mac_len], 0, sizeof(m->chaddr) - s.mac_len); -#ifndef UIP_CONF_DHCP_LIGHT - memset(m->sname, 0, sizeof(m->sname)); - memset(m->file, 0, sizeof(m->file)); -#endif - - memcpy(m->options, magic_cookie, sizeof(magic_cookie)); -} -/*---------------------------------------------------------------------------*/ -static void -send_discover(void) -{ - u8_t *end; - struct dhcp_msg *m = (struct dhcp_msg *)uip_appdata; - - create_msg(m, 0); - - end = add_msg_type(&m->options[4], DHCPDISCOVER); - end = add_req_options(end); - end = add_end(end); - - uip_send(uip_appdata, end - (u8_t *)uip_appdata); -} -/*---------------------------------------------------------------------------*/ -static void -send_request(int rea) -{ - u8_t *end; - struct dhcp_msg *m = (struct dhcp_msg *)uip_appdata; - - create_msg(m, rea); - - end = add_msg_type(&m->options[4], DHCPREQUEST); - end = add_server_id(end); - end = add_req_ipaddr(end); - end = add_end(end); - - uip_send(uip_appdata, end - (u8_t *)uip_appdata); -} -/*---------------------------------------------------------------------------*/ -static u8_t -parse_options(u8_t *optptr, int len) -{ - u8_t *end = optptr + len; - u8_t type = 0; - - while (optptr < end) { - switch (*optptr) { - case DHCP_OPTION_SUBNET_MASK: - memcpy(&s.netmask, optptr + 2, 4); - break; - case DHCP_OPTION_ROUTER: - memcpy(&s.default_router, optptr + 2, 4); - break; - case DHCP_OPTION_DNS_SERVER: - memcpy(&s.dnsaddr, optptr + 2, 4); - break; - case DHCP_OPTION_MSG_TYPE: - type = *(optptr + 2); - break; - case DHCP_OPTION_SERVER_ID: - memcpy(s.serverid, optptr + 2, 4); - break; - case DHCP_OPTION_LEASE_TIME: - memcpy(&s.lease_time, optptr + 2, 4); - break; - case DHCP_OPTION_END: - return type; - } - - optptr += optptr[1] + 2; - } - return type; -} -/*---------------------------------------------------------------------------*/ -u8_t -parse_msg(void) -{ - struct dhcp_msg *m = (struct dhcp_msg *)uip_appdata; - - if (m->op == DHCP_REPLY && - memcmp(m->xid, &xid, sizeof(xid)) == 0 && - memcmp(m->chaddr, s.mac_addr, s.mac_len) == 0) { - memcpy(&s.ipaddr, m->yiaddr, 4); - return parse_options(&m->options[4], uip_datalen()); - } - return 0; -} -/*---------------------------------------------------------------------------*/ -static -PT_THREAD(handle_dhcp(void)) -{ - PT_BEGIN(&s.pt); - - /* try_again:*/ - s.state = STATE_SENDING; - s.ticks = CLOCK_SECOND; - xid++; - - send_discover(); - do { - timer_set(&s.timer, s.ticks); - PT_WAIT_UNTIL(&s.pt, uip_newdata() || timer_expired(&s.timer)); - // if we timed out then increase time out and send discover again - if (timer_expired(&s.timer)) { - if (s.ticks < CLOCK_SECOND * 60) { - s.ticks *= 2; - } - send_discover(); - }else{ - // we may have gotten some other UDP packet in which case just wait some more for the right packet - if (uip_newdata() && parse_msg() == DHCPOFFER) { - s.state = STATE_OFFER_RECEIVED; - break; - } - } - PT_YIELD(&s.pt); - - } while (s.state != STATE_OFFER_RECEIVED); - - s.ticks = CLOCK_SECOND; - xid++; - - send_request(0); - do { - timer_set(&s.timer, s.ticks); - PT_WAIT_UNTIL(&s.pt, uip_newdata() || timer_expired(&s.timer)); - - if (timer_expired(&s.timer)) { - if (s.ticks <= CLOCK_SECOND * 10) { - s.ticks += CLOCK_SECOND; - send_request(0); // resend only on timeout - } else { - PT_RESTART(&s.pt); - } - }else{ - if (uip_newdata() && parse_msg() == DHCPACK) { - s.state = STATE_CONFIG_RECEIVED; - break; - } - } - PT_YIELD(&s.pt); - - } while (s.state != STATE_CONFIG_RECEIVED); - - dhcpc_configured(&s); - - // now we wait for close to expiration and renew the lease - do { - // we should reacquire expired leases here. - timer_set(&s.timer, (ntohl(s.lease_time) * 0.5)*CLOCK_SECOND); // half of lease expire time - PT_WAIT_UNTIL(&s.pt, timer_expired(&s.timer)); - - uip_log("reaquire dhcp lease"); - - // spec says send request direct to server that gave it to us, but seems to be unecessary - //uip_ipaddr_copy(&s.conn->ripaddr, s.serverid); - - s.ticks = CLOCK_SECOND; - xid++; - send_request(0); - do { - timer_set(&s.timer, s.ticks); - PT_WAIT_UNTIL(&s.pt, uip_newdata() || timer_expired(&s.timer)); - - if (timer_expired(&s.timer)) { - if (s.ticks <= CLOCK_SECOND * 10) { - s.ticks += CLOCK_SECOND; - send_request(0); // resend only on timeout - } else { - // give up - // TODO probably need to deal with upstream apps and stop them then reinit them - PT_RESTART(&s.pt); - } - }else{ - if (parse_msg() == DHCPACK) { - uip_log("dhcp lease renewed"); - break; - } - } - PT_YIELD(&s.pt); - }while(1); - - }while(1); - - PT_END(&s.pt); -} -/*---------------------------------------------------------------------------*/ -void -dhcpc_init(const void *mac_addr, int mac_len) -{ - uip_ipaddr_t addr; - - s.mac_addr = mac_addr; - s.mac_len = mac_len; - - s.state = STATE_INITIAL; - uip_ipaddr(addr, 255, 255, 255, 255); - s.conn = uip_udp_new(&addr, HTONS(DHCPC_SERVER_PORT)); - if (s.conn != NULL) { - uip_udp_bind(s.conn, HTONS(DHCPC_CLIENT_PORT)); - } - PT_INIT(&s.pt); -} -/*---------------------------------------------------------------------------*/ -void -dhcpc_appcall(void) -{ - handle_dhcp(); -} -/*---------------------------------------------------------------------------*/ -void -dhcpc_request(void) -{ - u16_t ipaddr[2]; - - if (s.state == STATE_INITIAL) { - uip_ipaddr(ipaddr, 0, 0, 0, 0); - uip_sethostaddr(ipaddr); - /* handle_dhcp(PROCESS_EVENT_NONE, NULL);*/ - } -} -/*---------------------------------------------------------------------------*/ - -#endif
--- a/libs/Network/uip/dhcpc/dhcpc.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,76 +0,0 @@ -/* - * Copyright (c) 2005, Swedish Institute of Computer Science - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * @(#)$Id: dhcpc.h,v 1.3 2006/06/11 21:46:37 adam Exp $ - */ -#ifndef __DHCPC_H__ -#define __DHCPC_H__ - -#include "timer.h" -#include "pt.h" - -struct dhcpc_state { - struct pt pt; - char state; - struct uip_udp_conn *conn; - struct timer timer; - u16_t ticks; - const void *mac_addr; - int mac_len; - - u8_t serverid[4]; - - uint32_t lease_time; - uint32_t ipaddr; - uint32_t netmask; - uint32_t dnsaddr; - uint32_t default_router; -}; - -#ifdef __cplusplus -extern "C" { -#endif - -void dhcpc_init(const void *mac_addr, int mac_len); -void dhcpc_request(void); - -void dhcpc_appcall(void); - -void dhcpc_configured(const struct dhcpc_state *s); - -#ifdef __cplusplus -} -#endif - -typedef struct dhcpc_state uip_udp_appstate_t; -#define UIP_UDP_APPCALL dhcpc_appcall - - -#endif /* __DHCPC_H__ */
--- a/libs/Network/uip/fifo.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,39 +0,0 @@ -// c accessibllity to the c++ fifo class -#include "fifo.h" -#include "c-fifo.h" - -void *new_fifo() -{ - return new Fifo<char*>; -} - -void delete_fifo(void *fifo) -{ - if(fifo == NULL) return; - Fifo<char *> *f= static_cast<Fifo<char *> *>(fifo); - while(f->size() > 0) { - char *s= f->pop(); - if (s != NULL) { - free(s); - } - } - delete f; -} - -char *fifo_pop(void *fifo) -{ - Fifo<char *> *f= static_cast<Fifo<char *> *>(fifo); - return f->pop(); -} - -void fifo_push(void *fifo, char *str) -{ - Fifo<char *> *f= static_cast<Fifo<char *> *>(fifo); - f->push(str); -} - -int fifo_size(void *fifo) -{ - Fifo<char *> *f= static_cast<Fifo<char *> *>(fifo); - return f->size(); -}
--- a/libs/Network/uip/fifo.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,180 +0,0 @@ -/************************************************************************* - * - * $Author: Jim Morris $ - * $Date: 1999/02/05 21:05:00 $ - * - * this code is Licensed LGPL - * - *************************************************************************/ -#ifndef _FIFO_H_ -#define _FIFO_H_ - -#include <stdlib.h> - -// Doubly Linked list class - -template<class T> class LList; - -template<class T> -class Tlink -{ -public: - Tlink<T> *pnext; - Tlink<T> *pprev; - -public: - Tlink() - { - pnext = pprev = 0; - } - Tlink(Tlink *p, Tlink *n) - { - pprev = p; - pnext = n; - } - Tlink(const T &d) : data(d) - { - pnext = pprev = 0; - } - T data; -}; - -template<class T> -class list_base -{ -private: - Tlink<T> *head; - Tlink<T> *tail; - int cnt; - -protected: - list_base() - { - head = tail = NULL; - cnt = 0; - } - - list_base(Tlink<T> *n) // link into head of list - { - cnt = 1; - n->pnext = NULL; - n->pprev = NULL; - head = n; - tail = n; - } - - Tlink<T> *gethead(void) const - { - return head; - } - Tlink<T> *gettail(void) const - { - return tail; - } - Tlink<T> *getnext(Tlink<T> *n) const - { - return n->pnext; - } - Tlink<T> *getprev(Tlink<T> *n) const - { - return n->pprev; - } - - void addtohead(Tlink<T> *n) // add at head of list - { - n->pnext = head; - n->pprev = NULL; - if (head) head->pprev = n; - head = n; - if (tail == NULL) // first one - tail = n; - cnt++; - } - - void addtohead(int c, Tlink<T> *a, Tlink<T> *b) // add list at head of list - { - b->pnext = head; - a->pprev = NULL; - if (head) head->pprev = b; - head = a; - if (tail == NULL) // first one - tail = b; - cnt += c; - } - - void addtotail(Tlink<T> *n) // add to tail of list - { - n->pnext = NULL; - n->pprev = tail; - if (tail) tail->pnext = n; - tail = n; - if (head == NULL) // first one - head = n; - cnt++; - } - - void remove(Tlink<T> *n) // remove it by relinking - { - cnt--; - if (n->pprev) n->pprev->pnext = n->pnext; - else head = n->pnext; // it must be the head - if (n->pnext) n->pnext->pprev = n->pprev; - else tail = n->pprev; - } - - void reset() - { - head = tail = NULL; - cnt = 0; - } - int count() const - { - return cnt; - } -}; - -// fifo -template<class T> -class Fifo : private list_base<T> -{ -public: - Fifo(){} - - void push(const T &a); - T pop(); - T peek(); - int size() const; -}; - -template <class T> -int Fifo<T>::size() const -{ - return list_base<T>::count(); -} - -// add to end of list (FIFO) -template <class T> -void Fifo<T>::push(const T &a) -{ - list_base<T>::addtotail(new Tlink<T>(a)); -} - -// return the first item in the list -template <class T> -T Fifo<T>::peek() -{ - Tlink<T> *p = list_base<T>::gethead(); - return p->data; -} - -// pop the first item off the fifo -template <class T> -T Fifo<T>::pop() -{ - Tlink<T> *p = list_base<T>::gethead(); - T data = p->data; - list_base<T>::remove(p); - delete p; - return data; -}; -#endif
--- a/libs/Network/uip/lib/memb.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,104 +0,0 @@ -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: memb.c,v 1.1 2006/06/12 08:21:43 adam Exp $ - */ - -/** - * \addtogroup memb - * @{ - */ - - /** - * \file - * Memory block allocation routines. - * \author Adam Dunkels <adam@sics.se> - */ -#include <string.h> - -#include "memb.h" - -/*---------------------------------------------------------------------------*/ -void -memb_init(struct memb_blocks *m) -{ - memset(m->count, 0, m->num); - memset(m->mem, 0, m->size * m->num); -} -/*---------------------------------------------------------------------------*/ -void * -memb_alloc(struct memb_blocks *m) -{ - int i; - - for(i = 0; i < m->num; ++i) { - if(m->count[i] == 0) { - /* If this block was unused, we increase the reference count to - indicate that it now is used and return a pointer to the - memory block. */ - ++(m->count[i]); - return (void *)((char *)m->mem + (i * m->size)); - } - } - - /* No free block was found, so we return NULL to indicate failure to - allocate block. */ - return NULL; -} -/*---------------------------------------------------------------------------*/ -char -memb_free(struct memb_blocks *m, void *ptr) -{ - int i; - char *ptr2; - - /* Walk through the list of blocks and try to find the block to - which the pointer "ptr" points to. */ - ptr2 = (char *)m->mem; - for(i = 0; i < m->num; ++i) { - - if(ptr2 == (char *)ptr) { - /* We've found to block to which "ptr" points so we decrease the - reference count and return the new value of it. */ - if(m->count[i] > 0) { - /* Make sure that we don't deallocate free memory. */ - --(m->count[i]); - } - return m->count[i]; - } - ptr2 += m->size; - } - return -1; -} -/*---------------------------------------------------------------------------*/ - -/** @} */
--- a/libs/Network/uip/lib/memb.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,141 +0,0 @@ -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: memb.h,v 1.1 2006/06/12 08:21:43 adam Exp $ - */ - -/** - * \defgroup memb Memory block management functions - * - * The memory block allocation routines provide a simple yet powerful - * set of functions for managing a set of memory blocks of fixed - * size. A set of memory blocks is statically declared with the - * MEMB() macro. Memory blocks are allocated from the declared - * memory by the memb_alloc() function, and are deallocated with the - * memb_free() function. - * - * \note Because of namespace clashes only one MEMB() can be - * declared per C module, and the name scope of a MEMB() memory - * block is local to each C module. - * - * The following example shows how to declare and use a memory block - * called "cmem" which has 8 chunks of memory with each memory chunk - * being 20 bytes large. - * - * @{ - */ - - -/** - * \file - * Memory block allocation routines. - * \author - * Adam Dunkels <adam@sics.se> - * - */ - -#ifndef __MEMB_H__ -#define __MEMB_H__ - -/* - * Here we define a C preprocessing macro for concatenating to - * strings. We need use two macros in order to allow concatenation of - * two #defined macros. - */ -#define MEMB_CONCAT2(s1, s2) s1##s2 -#define MEMB_CONCAT(s1, s2) MEMB_CONCAT2(s1, s2) - -/** - * Declare a memory block. - * - * This macro is used to staticall declare a block of memory that can - * be used by the block allocation functions. The macro statically - * declares a C array with a size that matches the specified number of - * blocks and their individual sizes. - * - * Example: - \code -MEMB(connections, sizeof(struct connection), 16); - \endcode - * - * \param name The name of the memory block (later used with - * memb_init(), memb_alloc() and memb_free()). - * - * \param size The size of each memory chunk, in bytes. - * - * \param num The total number of memory chunks in the block. - * - */ -#define MEMB(name, structure, num) static char MEMB_CONCAT(name,_memb_count)[num]; \ - static structure MEMB_CONCAT(name,_memb_mem)[num]; \ - static struct memb_blocks name = {sizeof(structure), num, MEMB_CONCAT(name,_memb_count), (void *)MEMB_CONCAT(name,_memb_mem) } - - - -struct memb_blocks { - unsigned short size; - unsigned short num; - char *count; - void *mem; -}; - -/** - * Initialize a memory block that was declared with MEMB(). - * - * \param m A memory block previosly declared with MEMB(). - */ -void memb_init(struct memb_blocks *m); - -/** - * Allocate a memory block from a block of memory declared with MEMB(). - * - * \param m A memory block previosly declared with MEMB(). - */ -void *memb_alloc(struct memb_blocks *m); - -/** - * Deallocate a memory block from a memory block previously declared - * with MEMB(). - * - * \param m m A memory block previosly declared with MEMB(). - * - * \param ptr A pointer to the memory block that is to be deallocated. - * - * \return The new reference count for the memory block (should be 0 - * if successfully deallocated) or -1 if the pointer "ptr" did not - * point to a legal memory block. - */ -char memb_free(struct memb_blocks *m, void *ptr); - -/** @} */ - -#endif /* __MEMB_H__ */
--- a/libs/Network/uip/sftp/sftpd.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,228 +0,0 @@ -#pragma GCC diagnostic ignored "-Wunused-but-set-variable" - -#include "sftpd.h" -#include "string.h" -#include "stdlib.h" - -extern "C" { -#include "uip.h" -} - -#define ISO_nl 0x0a -#define ISO_cr 0x0d -#define ISO_sp 0x20 - -#define DEBUG_PRINTF(...) - -Sftpd::Sftpd() -{ - fd = NULL; - state = STATE_NORMAL; - outbuf = NULL; - filename= NULL; -} - -Sftpd::~Sftpd() -{ - if (fd != NULL) { - fclose(fd); - } -} - -int Sftpd::senddata() -{ - if (outbuf != NULL) { - DEBUG_PRINTF("sftp: senddata %s\n", outbuf); - strcpy((char *)uip_appdata, outbuf); - uip_send(uip_appdata, strlen(outbuf)); - } - return 0; -} - -int Sftpd::handle_command() -{ - PSOCK_BEGIN(&sin); - - do { - PSOCK_READTO(&sin, ISO_nl); - buf[PSOCK_DATALEN(&sin) - 1] = 0; - int len = PSOCK_DATALEN(&sin) - 1; - DEBUG_PRINTF("sftp: got command: %s, %d\n", buf, len); - - if (state == STATE_CONNECTED) { - if (strncmp(buf, "USER", 4) == 0) { - outbuf = "!user logged in\n"; - - } else if (strncmp(buf, "KILL", 4) == 0) { - if (len < 6) { - outbuf = "- incomplete KILL command\n"; - } else { - char *fn = &buf[5]; - int s = remove(fn); - if (s == 0) outbuf = "+ deleted\n"; - else outbuf = "- delete failed\n"; - } - - } else if (strncmp(buf, "DONE", 4) == 0) { - outbuf = "+ exit\n"; - state = STATE_CLOSE; - - } else if (strncmp(buf, "STOR", 4) == 0) { - if (len < 11) { - outbuf = "- incomplete STOR command\n"; - } else { - char *fn = &buf[9]; - if(this->filename != NULL) free(this->filename); - this->filename= strdup(fn); // REMOVE when bug fixed - // get { NEW|OLD|APP } - if (strncmp(&buf[5], "OLD", 3) == 0) { - DEBUG_PRINTF("sftp: Opening file: %s\n", fn); - fd = fopen(fn, "w"); - if (fd != NULL) { - outbuf = "+ new file\n"; - state = STATE_GET_LENGTH; - } else { - outbuf = "- failed\n"; - } - } else if (strncmp(&buf[5], "APP", 3) == 0) { - fd = fopen(fn, "a"); - if (fd != NULL) { - outbuf = "+ append file\n"; - state = STATE_GET_LENGTH; - } else { - outbuf = "- failed\n"; - } - } else { - outbuf = "- Only OLD|APP supported\n"; - } - } - - } else { - outbuf = "- Unknown command\n"; - } - - } else if (state == STATE_GET_LENGTH) { - if (len < 6 || strncmp(buf, "SIZE", 4) != 0) { - fclose(fd); - fd = NULL; - outbuf = "- Expected size\n"; - state = STATE_CONNECTED; - - } else { - filesize = atoi(&buf[5]); - if (filesize > 0) { - outbuf = "+ ok, waiting for file\n"; - state = STATE_DOWNLOAD; - } else { - fclose(fd); - fd = NULL; - outbuf = "- bad filesize\n"; - state = STATE_CONNECTED; - } - } - - } else { - DEBUG_PRINTF("WTF state: %d\n", state); - } - - } while(state == STATE_CONNECTED || state == STATE_GET_LENGTH); - - PSOCK_END(&sin); -} - -int Sftpd::handle_download() -{ - // Note this is not using PSOCK and it consumes all read data - char *readptr = (char *)uip_appdata; - unsigned int readlen = uip_datalen(); - DEBUG_PRINTF("sftp: starting download, expecting %d bytes, read %d\n", filesize, readlen); - - if (filesize > 0 && readlen > 0) { - if (readlen > filesize) readlen = filesize; - if (fwrite(readptr, 1, readlen, fd) != readlen) { - DEBUG_PRINTF("sftp: Error writing file\n"); - fclose(fd); - fd = NULL; - outbuf = "- Error saving file\n"; - state = STATE_CONNECTED; - return 0; - } - filesize -= readlen; - DEBUG_PRINTF("sftp: saved %d bytes %d left\n", readlen, filesize); - // HACK ALERT... to work around the fwrite/filesystem bug where writing large amounts of data corrupts the file - // we workaround by closing the file, the reopening for append until we are done - fclose(fd); - fd = fopen(this->filename, "a"); - } - if (filesize == 0) { - DEBUG_PRINTF("sftp: download complete\n"); - fclose(fd); - fd = NULL; - outbuf = "+ Saved file\n"; - state = STATE_CONNECTED; - return 0; - } - return 1; -} - -int Sftpd::acked() -{ - outbuf= NULL; - return 0; -} - - -void Sftpd::appcall(void) -{ - if (uip_connected()) { - // TODO check for other connections - PSOCK_INIT(&sin, buf, sizeof(buf)); - state = STATE_CONNECTED; - outbuf = "+Smoothie SFTP Service\n"; - } - - if (state == STATE_CLOSE) { - DEBUG_PRINTF("sftp: state close\n"); - state = STATE_NORMAL; - uip_close(); - return; - } - - if (uip_closed() || uip_aborted() || uip_timedout()) { - DEBUG_PRINTF("sftp: closed\n"); - if (fd != NULL) - fclose(fd); - fd = NULL; - state = STATE_NORMAL; - return; - } - - if (uip_acked()) { - DEBUG_PRINTF("sftp: acked\n"); - this->acked(); - } - - if (uip_newdata()) { - DEBUG_PRINTF("sftp: newdata\n"); - if (state == STATE_DOWNLOAD) { - if(handle_download() == 0) { - // we need to reset the input PSOCK again before using it after using the raw input buffer - PSOCK_INIT(&sin, buf, sizeof(buf)); - } - } else { - handle_command(); - } - } - - if (uip_rexmit() || uip_newdata() || uip_acked() || uip_connected() || uip_poll()) { - this->senddata(); - } - -} - -void Sftpd::init(void) -{ - -} - -
--- a/libs/Network/uip/sftp/sftpd.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,39 +0,0 @@ -#ifndef __SFTPD_H__ -#define __SFTPD_H__ - -/* - * Implement RFC913 Simple File Transfer - */ - - -#include <stdio.h> -extern "C" { -#include "psock.h" -} - -class Sftpd -{ -public: - Sftpd(); - virtual ~Sftpd(); - - void appcall(void); - void init(void); - -private: - FILE *fd; - enum STATES { STATE_NORMAL, STATE_CONNECTED, STATE_GET_LENGTH, STATE_DOWNLOAD, STATE_CLOSE }; - STATES state; - int acked(); - int handle_command(); - int handle_download(); - int senddata(); - - struct psock sin; - char buf[80]; - const char *outbuf; - unsigned int filesize; - char *filename; -}; - -#endif /* __sftpd_H__ */
--- a/libs/Network/uip/telnetd/shell.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,280 +0,0 @@ -/* -* Copyright (c) 2003, Adam Dunkels. -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* 1. Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* 2. Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in the -* documentation and/or other materials provided with the distribution. -* 3. The name of the author may not be used to endorse or promote -* products derived from this software without specific prior -* written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS -* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY -* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -* This file is part of the uIP TCP/IP stack. -* -* $Id: shell.c,v 1.1 2006/06/07 09:43:54 adam Exp $ -* -*/ - -#include "stdlib.h" -#include "shell.h" -#include "uip.h" -#include <string.h> -#include "checksumm.h" -#include "utils.h" -#include "stdio.h" -#include "stdlib.h" -#include "telnetd.h" -#include "CallbackStream.h" -#include "Kernel.h" - -//#define DEBUG_PRINTF(...) -#define DEBUG_PRINTF printf - -struct ptentry { - uint16_t command_cs; - void (* pfunc)(char *str, Shell *sh); -}; - -#define SHELL_PROMPT "> " - -/*---------------------------------------------------------------------------*/ -bool Shell::parse(register char *str, struct ptentry *t) -{ - struct ptentry *p; - for (p = t; p->command_cs != 0; ++p) { - if (get_checksum(str) == p->command_cs) { - break; - } - } - - p->pfunc(str, this); - - return p->command_cs != 0; -} -/*---------------------------------------------------------------------------*/ -static void help(char *str, Shell *sh) -{ - sh->output("Available commands: All others are passed on\n"); - sh->output("netstat - show network info\n"); - sh->output("? - show network help\n"); - sh->output("help - show command help\n"); - sh->output("exit, quit - exit shell\n"); -} - -/*---------------------------------------------------------------------------*/ -static const char *states[] = { - "CLOSED", - "SYN_RCVD", - "SYN_SENT", - "ESTABLISHED", - "FIN_WAIT_1", - "FIN_WAIT_2", - "CLOSING", - "TIME_WAIT", - "LAST_ACK", - "NONE", - "RUNNING", - "CALLED" -}; -static void connections(char *str, Shell *sh) -{ - char istr[128]; - struct uip_conn *connr; - snprintf(istr, sizeof(istr), "Initial MSS: %d, MSS: %d\n", uip_initialmss(), uip_mss()); - sh->output(istr); - sh->output("Current connections: \n"); - - for (connr = &uip_conns[0]; connr <= &uip_conns[UIP_CONNS - 1]; ++connr) { - if(connr->tcpstateflags != UIP_CLOSED) { - snprintf(istr, sizeof(istr), "%d, %u.%u.%u.%u:%u, %s, %u, %u, %c %c\n", - HTONS(connr->lport), - uip_ipaddr1(connr->ripaddr), uip_ipaddr2(connr->ripaddr), uip_ipaddr3(connr->ripaddr), uip_ipaddr4(connr->ripaddr), - HTONS(connr->rport), - states[connr->tcpstateflags & UIP_TS_MASK], - connr->nrtx, - connr->timer, - (uip_outstanding(connr)) ? '*' : ' ', - (uip_stopped(connr)) ? '!' : ' '); - - sh->output(istr); - } - } -} - -static void quit(char *str, Shell *sh) -{ - sh->close(); -} - -//#include "clock.h" -static void test(char *str, Shell *sh) -{ - printf("In Test\n"); - - // struct timer t; - // u16_t ticks= CLOCK_SECOND*5; - // timer_set(&t, ticks); - // printf("Wait....\n"); - // while(!timer_expired(&t)) { - - // } - // printf("Done\n"); - /* - const char *fn= "/sd/test6.txt"; - uint16_t *buf= (uint16_t *)malloc(200*2); - int cnt= 0; - FILE *fp; - for(int i=0;i<10;i++) { - fp= fopen(fn, i == 0 ? "w" : "a"); - if(fp == NULL) { - printf("failed to open file\n"); - return; - } - for (int x = 0; x < 200; ++x) { - buf[x]= x+cnt; - } - cnt+=200; - int n= fwrite(buf, 2, 200, fp); - printf("wrote %d, %d\n", i, n); - fclose(fp); - } - - fp= fopen(fn, "r"); - if(fp == NULL) { - printf("failed to open file for read\n"); - return; - } - printf("Opened file %s for read\n", fn); - do { - int n= fread(buf, 2, 200, fp); - if(n <= 0) break; - for(int x=0;x<n;x++) { - printf("%04X, ", buf[x]); - } - }while(1); - fclose(fp); - free(buf); - */ -} - -/*---------------------------------------------------------------------------*/ - -static void unknown(char *str, Shell *sh) -{ - // its some other command, so queue it for mainloop to find - if (strlen(str) > 0) { - CommandQueue::getInstance()->add(str, sh->getStream()); - } -} -/*---------------------------------------------------------------------------*/ -static struct ptentry parsetab[] = { - {CHECKSUM("netstat"), connections}, - {CHECKSUM("exit"), quit}, - {CHECKSUM("quit"), quit}, - {CHECKSUM("test"), test}, - {CHECKSUM("?"), help}, - - /* Default action */ - {0, unknown} -}; -/*---------------------------------------------------------------------------*/ -// this callback gets the results of a command, line by line -// NULL means command completed -// static -int Shell::command_result(const char *str, void *p) -{ - // FIXME problem when shell is deleted and this gets called from slow command - // need a way to know this shell was closed or deleted - Shell *sh = (Shell *)p; - if (str == NULL) { - // indicates command is complete - // only prompt when command is completed - sh->telnet->output_prompt(SHELL_PROMPT); - return 0; - - } else { - if (sh->telnet->can_output()) { - if (sh->telnet->output(str) == -1) return -1; // connection was closed - return 1; - } - // we are stalled - return 0; - } -} - -/*---------------------------------------------------------------------------*/ -void Shell::start() -{ - telnet->output("Smoothie command shell\r\n> "); -} - -int Shell::queue_size() -{ - return CommandQueue::getInstance()->size(); -} -/*---------------------------------------------------------------------------*/ -void Shell::input(char *cmd) -{ - if (parse(cmd, parsetab)) { - telnet->output_prompt(SHELL_PROMPT); - } -} -/*---------------------------------------------------------------------------*/ - -int Shell::output(const char *str) -{ - return telnet->output(str); -} - -void Shell::close() -{ - telnet->close(); -} - -void Shell::setConsole() -{ - // add it to the kernels output stream if we are a console - // TODO do we do this for all connections? so pronterface will get file done when playing from M24? - // then we need to turn it off for the streaming app - DEBUG_PRINTF("Shell: Adding stream to kernel streams\n"); - THEKERNEL->streams->append_stream(pstream); - isConsole= true; -} - -Shell::Shell(Telnetd *telnet) -{ - DEBUG_PRINTF("Shell: ctor %p - %p\n", this, telnet); - this->telnet= telnet; - // create a callback StreamOutput for this connection - pstream = new CallbackStream(command_result, this); - isConsole= false; -} - -Shell::~Shell() -{ - if(isConsole) { - DEBUG_PRINTF("Shell: Removing stream from kernel streams\n"); - THEKERNEL->streams->remove_stream(pstream); - } - // we cannot delete this stream until it is no longer in any command queue entries - // so mark it as closed, and allow it to delete itself when it is no longer being used - static_cast<CallbackStream*>(pstream)->mark_closed(); // mark the stream as closed so we do not get any callbacks - DEBUG_PRINTF("Shell: dtor %p\n", this); -}
--- a/libs/Network/uip/telnetd/shell.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,104 +0,0 @@ -/** - * \file - * Interface for the Contiki shell. - * \author Adam Dunkels <adam@dunkels.com> - * - * Some of the functions declared in this file must be implemented as - * a shell back-end in the architecture specific files of a Contiki - * port. - */ - - -/* - * Copyright (c) 2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the Contiki desktop OS. - * - * $Id: shell.h,v 1.1 2006/06/07 09:43:54 adam Exp $ - * - */ -#ifndef __SHELL_H__ -#define __SHELL_H__ - -#include "telnetd.h" -#include "CommandQueue.h" - -class Telnetd; - -class Shell -{ -public: - Shell(Telnetd *telnet); - ~Shell(); - - /** - * Start the shell back-end. - * - * Called by the front-end when a new shell is started. - */ - void start(void); - - /** - * Process a shell command. - * - * This function will be called by the shell GUI / telnet server whan - * a command has been entered that should be processed by the shell - * back-end. - * - * \param command The command to be processed. - */ - void input(char *command); - - int output(const char *str); - void close(); - - /** - * Print a prompt to the shell window. - * - * This function can be used by the shell back-end to print out a - * prompt to the shell window. - * - * \param prompt The prompt to be printed. - * - */ - void prompt(const char *prompt); - - int queue_size(); - int can_output(); - static int command_result(const char *str, void *ti); - StreamOutput *getStream() { return pstream; } - void setConsole(); - -private: - bool parse(register char *str, struct ptentry *t); - Telnetd *telnet; // telnet instance we are connected to - StreamOutput *pstream; - bool isConsole; -}; - -#endif /* __SHELL_H__ */
--- a/libs/Network/uip/telnetd/telnetd.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,413 +0,0 @@ -/* - * Copyright (c) 2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: telnetd.c,v 1.2 2006/06/07 09:43:54 adam Exp $ - * - */ - -#include "uip.h" -#include "telnetd.h" -#include "shell.h" - -#include <string.h> -#include <stdlib.h> -#include <stdio.h> - -#define ISO_nl 0x0a -#define ISO_cr 0x0d - -#define STATE_NORMAL 0 -#define STATE_IAC 1 -#define STATE_WILL 2 -#define STATE_WONT 3 -#define STATE_DO 4 -#define STATE_DONT 5 -#define STATE_CLOSE 6 - -#define TELNET_IAC 255 -#define TELNET_WILL 251 -#define TELNET_WONT 252 -#define TELNET_DO 253 -#define TELNET_DONT 254 - -#define TELNET_LINEMODE 0x22 -#define TELNET_GA 0x03 -#define TELNET_X_PROMPT 0x55 - -//#define DEBUG_PRINTF(...) -#define DEBUG_PRINTF printf - -static char *alloc_line(int size) -{ - return (char *)malloc(size); -} - -static void dealloc_line(char *line) -{ - free(line); -} - -void Telnetd::close() -{ - state = STATE_CLOSE; -} - -int Telnetd::sendline(char *line) -{ - int i; - for (i = 0; i < TELNETD_CONF_NUMLINES; ++i) { - if (lines[i] == NULL) { - lines[i] = line; - return i; - } - } - if (i == TELNETD_CONF_NUMLINES) { - dealloc_line(line); - } - return TELNETD_CONF_NUMLINES; -} - -void Telnetd::output_prompt(const char *str) -{ - if(prompt) output(str); -} - -int Telnetd::output(const char *str) -{ - if(state == STATE_CLOSE) return -1; - - unsigned chunk = 256; // small chunk size so we don't allocate huge blocks, and must be less than mss - unsigned len = strlen(str); - char *line; - if (len < chunk) { - // can be sent in one tcp buffer - line = alloc_line(len + 1); - if (line != NULL) { - strcpy(line, str); - return sendline(line); - }else{ - // out of memory treat like full - return TELNETD_CONF_NUMLINES; - } - } else { - // need to split line over multiple send lines - int size = chunk; // size to copy - int off = 0; - int n= 0; - while (len >= chunk) { - line = alloc_line(chunk + 1); - if (line != NULL) { - memcpy(line, str + off, size); - line[size] = 0; - n= sendline(line); - len -= size; - off += size; - }else{ - // out of memory treat like full - return TELNETD_CONF_NUMLINES; - } - } - if (len > 0) { - // send rest - line = alloc_line(len + 1); - if (line != NULL) { - strcpy(line, str + off); - n= sendline(line); - }else{ - // out of memory treat like full - return TELNETD_CONF_NUMLINES; - } - } - return n; - } -} - -// check if we can queue or if queue is full -int Telnetd::can_output() -{ - if(state == STATE_CLOSE) return -1; - - int i; - int cnt = 0; - for (i = 0; i < TELNETD_CONF_NUMLINES; ++i) { - if (lines[i] == NULL) cnt++; - } - return cnt < 4 ? 0 : 1; -} - -void Telnetd::acked(void) -{ - while (numsent > 0) { - dealloc_line(lines[0]); - for (int i = 1; i < TELNETD_CONF_NUMLINES; ++i) { - lines[i - 1] = lines[i]; - } - lines[TELNETD_CONF_NUMLINES - 1] = NULL; - --numsent; - } -} - -void Telnetd::senddata(void) -{ - // NOTE this sends as many lines as it can fit in one tcp frame - // we need to keep the lines under the size of the tcp frame - char *bufptr, *lineptr; - int buflen, linelen; - - bufptr = (char *)uip_appdata; - buflen = 0; - for (numsent = 0; numsent < TELNETD_CONF_NUMLINES && lines[numsent] != NULL ; ++numsent) { - lineptr = lines[numsent]; - linelen = strlen(lineptr); - if (buflen + linelen < uip_mss()) { - memcpy(bufptr, lineptr, linelen); - bufptr += linelen; - buflen += linelen; - } else { - break; - } - } - uip_send(uip_appdata, buflen); -} - -void Telnetd::get_char(u8_t c) -{ - if (c == ISO_cr) { - return; - } - - buf[(int)bufptr] = c; - if (buf[(int)bufptr] == ISO_nl || bufptr == sizeof(buf) - 1) { - if (bufptr > 0) { - buf[(int)bufptr] = 0; - } - shell->input(buf); - bufptr = 0; - - } else { - ++bufptr; - } -} - -// static void sendopt(u8_t option, u8_t value) -// { -// char *line; -// line = alloc_line(4); -// if (line != NULL) { -// line[0] = TELNET_IAC; -// line[1] = option; -// line[2] = value; -// line[3] = 0; -// sendline(line); -// } -// } - -void Telnetd::newdata(void) -{ - u16_t len; - u8_t c; - char *dataptr; - - len = uip_datalen(); - dataptr = (char *)uip_appdata; - - while (len > 0 && bufptr < sizeof(buf)) { - c = *dataptr; - ++dataptr; - --len; - switch (state) { - case STATE_IAC: - if (c == TELNET_IAC) { - get_char(c); - state = STATE_NORMAL; - } else { - switch (c) { - case TELNET_WILL: - state = STATE_WILL; - break; - case TELNET_WONT: - state = STATE_WONT; - break; - case TELNET_DO: - state = STATE_DO; - break; - case TELNET_DONT: - state = STATE_DONT; - break; - default: - state = STATE_NORMAL; - break; - } - } - break; - case STATE_WILL: - if (c == TELNET_LINEMODE) { - //sendopt(TELNET_DO, c); - } - state = STATE_NORMAL; - break; - - case STATE_WONT: - /* Reply with a DONT */ - //sendopt(TELNET_DONT, c); - state = STATE_NORMAL; - break; - case STATE_DO: - if (c == TELNET_X_PROMPT) { - prompt= true; - }else if (c == TELNET_GA) { - // enable prompt if telnet client running - prompt= true; - shell->setConsole(); // tell shell we are a console, as this is sent be telnet clients - }else{ - /* Reply with a WONT */ - //sendopt(TELNET_WONT, c); - } - state = STATE_NORMAL; - break; - case STATE_DONT: - if (c == TELNET_X_PROMPT) { - prompt= false; - }else{ - /* Reply with a WONT */ - //sendopt(TELNET_WONT, c); - } - state = STATE_NORMAL; - break; - case STATE_NORMAL: - if (c == TELNET_IAC) { - state = STATE_IAC; - } else { - get_char(c); - } - break; - } - } - - // if the command queue is getting too big we stop TCP - if(shell->queue_size() > 20) { - DEBUG_PRINTF("Telnet: stopped: %d\n", shell->queue_size()); - uip_stop(); - } -} - -void Telnetd::poll() -{ - if(first_time) { - first_time= false; - shell->start(); - senddata(); - } -} - -Telnetd::Telnetd() -{ - DEBUG_PRINTF("Telnetd: ctor %p\n", this); - for (int i = 0; i < TELNETD_CONF_NUMLINES; ++i) { - lines[i] = NULL; - } - - first_time= true; - bufptr = 0; - state = STATE_NORMAL; - prompt= false; - shell= new Shell(this); -} - -Telnetd::~Telnetd() -{ - DEBUG_PRINTF("Telnetd: dtor %p\n", this); - for (int i = 0; i < TELNETD_CONF_NUMLINES; ++i) { - if (lines[i] != NULL) dealloc_line(lines[i]); - } - delete shell; -} - -// static -void Telnetd::appcall(void) -{ - Telnetd *instance= reinterpret_cast<Telnetd *>(uip_conn->appstate); - - if (uip_connected()) { - // create a new telnet class instance - instance= new Telnetd; - DEBUG_PRINTF("Telnetd new instance: %p\n", instance); - uip_conn->appstate= instance; // and store it in the appstate of the connection - instance->rport= uip_conn->rport; - } - - if (uip_closed() || uip_aborted() || uip_timedout()) { - DEBUG_PRINTF("Telnetd: closed: %p\n", instance); - if(instance != NULL) { - delete instance; - uip_conn->appstate= NULL; - } - return; - } - - // sanity check - if(instance == NULL || instance->rport != uip_conn->rport) { - DEBUG_PRINTF("Telnetd: ERROR Null instance or rport is wrong: %p - %u, %d\n", instance, HTONS(uip_conn->rport), uip_flags); - uip_abort(); - return; - } - - if (instance->state == STATE_CLOSE) { - uip_close(); - } - - - if (uip_acked()) { - instance->acked(); - } - - if (uip_newdata()) { - instance->newdata(); - } - - if (uip_rexmit() || uip_newdata() || uip_acked() || uip_connected() || uip_poll()) { - instance->senddata(); - } - - if(uip_poll() && uip_stopped(uip_conn) && instance->shell->queue_size() < 5) { - DEBUG_PRINTF("restarted %d - %p\n", instance->shell->queue_size(), instance); - uip_restart(); - } - - if(uip_poll()) { - instance->poll(); - } -} - -// static -void Telnetd::init(void) -{ - uip_listen(HTONS(23)); -}
--- a/libs/Network/uip/telnetd/telnetd.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,84 +0,0 @@ -/* - * Copyright (c) 2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: telnetd.h,v 1.2 2006/06/07 09:43:54 adam Exp $ - * - */ -#ifndef __TELNETD_H__ -#define __TELNETD_H__ - -#include "shell.h" -#include "stdint.h" - -class Shell; - -class Telnetd -{ -public: - Telnetd(); - ~Telnetd(); - - static void init(void); - static void appcall(void); - - void output_prompt(const char *str); - int output(const char *str); - int can_output(); - void close(); - -private: - static const int TELNETD_CONF_MAXCOMMANDLENGTH= 132; - static const int TELNETD_CONF_NUMLINES= 32; - - Shell *shell; - - // FIXME this needs to be a FIFO - char *lines[TELNETD_CONF_NUMLINES]; - char buf[TELNETD_CONF_MAXCOMMANDLENGTH]; - char bufptr; - uint8_t numsent; - uint8_t state; - uint16_t rport; - - bool prompt; - - bool first_time; - - int sendline(char *line); - void acked(void); - void senddata(void); - void get_char(uint8_t c); - void newdata(void); - void poll(void); - -}; - -#endif /* __TELNETD_H__ */
--- a/libs/Network/uip/uip-conf.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,168 +0,0 @@ -/** - * \addtogroup uipopt - * @{ - */ - -/** - * \name Project-specific configuration options - * @{ - * - * uIP has a number of configuration options that can be overridden - * for each project. These are kept in a project-specific uip-conf.h - * file and all configuration names have the prefix UIP_CONF. - */ - -/* - * Copyright (c) 2006, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $ - */ - -/** - * \file - * An example uIP configuration file - * \author - * Adam Dunkels <adam@sics.se> - */ - -#ifndef __UIP_CONF_H__ -#define __UIP_CONF_H__ - -#include <inttypes.h> - -/** - * 8 bit datatype - * - * This typedef defines the 8-bit type used throughout uIP. - * - * \hideinitializer - */ -typedef uint8_t u8_t; - -/** - * 16 bit datatype - * - * This typedef defines the 16-bit type used throughout uIP. - * - * \hideinitializer - */ -typedef uint16_t u16_t; - -/** - * Statistics datatype - * - * This typedef defines the dataype used for keeping statistics in - * uIP. - * - * \hideinitializer - */ -typedef unsigned short uip_stats_t; - -/** - * Maximum number of TCP connections. - * - * \hideinitializer - */ -#define UIP_CONF_MAX_CONNECTIONS 6 - -/** - * Maximum number of listening TCP ports. - * - * \hideinitializer - */ -#define UIP_CONF_MAX_LISTENPORTS 6 - -/** - * uIP buffer size. - * - * \hideinitializer - */ -#define UIP_CONF_BUFFER_SIZE 400 - -#define UIP_CONF_BROADCAST 1 - -/** - * CPU byte order. - * - * \hideinitializer - */ -#define UIP_CONF_BYTE_ORDER LITTLE_ENDIAN - -/** - * Logging on or off - * - * \hideinitializer - */ -#define UIP_CONF_LOGGING 1 - -/** - * UDP support on or off - * - * \hideinitializer - */ -#define UIP_CONF_UDP 1 -#define UIP_CONF_UDP_CONNS 4 -/** - * UDP checksums on or off - * - * \hideinitializer - */ -#define UIP_CONF_UDP_CHECKSUMS 0 - -/** - * uIP statistics on or off - * - * \hideinitializer - */ -#define UIP_CONF_STATISTICS 0 - -#ifdef __cplusplus -extern "C" void app_select_appcall(void); -#else -extern void app_select_appcall(void); -#endif - -#define UIP_APPCALL app_select_appcall -typedef void* uip_tcp_appstate_t; - -/* Here we include the header file for the application(s) we use in - our project. */ -/*#include "smtp.h"*/ -//#include "hello-world.h" -// #include "telnetd.h" -// #include "webserver.h" -#include "dhcpc.h" -/*#include "resolv.h"*/ -/*#include "webclient.h"*/ - -#endif /* __UIP_CONF_H__ */ - -/** @} */ -/** @} */
--- a/libs/Network/uip/uip/clock.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,95 +0,0 @@ -/** - * \defgroup clock Clock interface - * - * The clock interface is the interface between the \ref timer "timer library" - * and the platform specific clock functionality. The clock - * interface must be implemented for each platform that uses the \ref - * timer "timer library". - * - * The clock interface does only one this: it measures time. The clock - * interface provides a macro, CLOCK_SECOND, which corresponds to one - * second of system time. - * - * \sa \ref timer "Timer library" - * - * @{ - */ - -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: clock.h,v 1.3 2006/06/11 21:46:39 adam Exp $ - */ -#ifndef __CLOCK_H__ -#define __CLOCK_H__ - -#include "clock-arch.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * Initialize the clock library. - * - * This function initializes the clock library and should be called - * from the main() function of the system. - * - */ -void clock_init(void); - -/** - * Get the current clock time. - * - * This function returns the current system clock time. - * - * \return The current clock time, measured in system ticks. - */ -clock_time_t clock_time(void); - -#ifdef __cplusplus -} -#endif -/** - * A second, measured in system clock time. - * - * \hideinitializer - */ -#ifdef CLOCK_CONF_SECOND -#define CLOCK_SECOND CLOCK_CONF_SECOND -#else -#define CLOCK_SECOND (clock_time_t)32 -#endif - -#endif /* __CLOCK_H__ */ - -/** @} */
--- a/libs/Network/uip/uip/lc-addrlabels.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,83 +0,0 @@ -/* - * Copyright (c) 2004-2005, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: lc-addrlabels.h,v 1.3 2006/06/12 08:00:30 adam Exp $ - */ - -/** - * \addtogroup lc - * @{ - */ - -/** - * \file - * Implementation of local continuations based on the "Labels as - * values" feature of gcc - * \author - * Adam Dunkels <adam@sics.se> - * - * This implementation of local continuations is based on a special - * feature of the GCC C compiler called "labels as values". This - * feature allows assigning pointers with the address of the code - * corresponding to a particular C label. - * - * For more information, see the GCC documentation: - * http://gcc.gnu.org/onlinedocs/gcc/Labels-as-Values.html - * - * Thanks to dividuum for finding the nice local scope label - * implementation. - */ - -#ifndef __LC_ADDRLABELS_H__ -#define __LC_ADDRLABELS_H__ - -/** \hideinitializer */ -typedef void * lc_t; - -#define LC_INIT(s) s = NULL - - -#define LC_RESUME(s) \ - do { \ - if(s != NULL) { \ - goto *s; \ - } \ - } while(0) - -#define LC_SET(s) \ - do { ({ __label__ resume; resume: (s) = &&resume; }); }while(0) - -#define LC_END(s) - -#endif /* __LC_ADDRLABELS_H__ */ - -/** @} */
--- a/libs/Network/uip/uip/lc-switch.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,76 +0,0 @@ -/* - * Copyright (c) 2004-2005, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: lc-switch.h,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ - -/** - * \addtogroup lc - * @{ - */ - -/** - * \file - * Implementation of local continuations based on switch() statment - * \author Adam Dunkels <adam@sics.se> - * - * This implementation of local continuations uses the C switch() - * statement to resume execution of a function somewhere inside the - * function's body. The implementation is based on the fact that - * switch() statements are able to jump directly into the bodies of - * control structures such as if() or while() statmenets. - * - * This implementation borrows heavily from Simon Tatham's coroutines - * implementation in C: - * http://www.chiark.greenend.org.uk/~sgtatham/coroutines.html - */ - -#ifndef __LC_SWITCH_H__ -#define __LC_SWTICH_H__ - -/* WARNING! lc implementation using switch() does not work if an - LC_SET() is done within another switch() statement! */ - -/** \hideinitializer */ -typedef unsigned short lc_t; - -#define LC_INIT(s) s = 0; - -#define LC_RESUME(s) switch(s) { case 0: - -#define LC_SET(s) s = __LINE__; case __LINE__: - -#define LC_END(s) } - -#endif /* __LC_SWITCH_H__ */ - -/** @} */
--- a/libs/Network/uip/uip/lc.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,131 +0,0 @@ -/* - * Copyright (c) 2004-2005, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: lc.h,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ - -/** - * \addtogroup pt - * @{ - */ - -/** - * \defgroup lc Local continuations - * @{ - * - * Local continuations form the basis for implementing protothreads. A - * local continuation can be <i>set</i> in a specific function to - * capture the state of the function. After a local continuation has - * been set can be <i>resumed</i> in order to restore the state of the - * function at the point where the local continuation was set. - * - * - */ - -/** - * \file lc.h - * Local continuations - * \author - * Adam Dunkels <adam@sics.se> - * - */ - -#ifdef DOXYGEN -/** - * Initialize a local continuation. - * - * This operation initializes the local continuation, thereby - * unsetting any previously set continuation state. - * - * \hideinitializer - */ -#define LC_INIT(lc) - -/** - * Set a local continuation. - * - * The set operation saves the state of the function at the point - * where the operation is executed. As far as the set operation is - * concerned, the state of the function does <b>not</b> include the - * call-stack or local (automatic) variables, but only the program - * counter and such CPU registers that needs to be saved. - * - * \hideinitializer - */ -#define LC_SET(lc) - -/** - * Resume a local continuation. - * - * The resume operation resumes a previously set local continuation, thus - * restoring the state in which the function was when the local - * continuation was set. If the local continuation has not been - * previously set, the resume operation does nothing. - * - * \hideinitializer - */ -#define LC_RESUME(lc) - -/** - * Mark the end of local continuation usage. - * - * The end operation signifies that local continuations should not be - * used any more in the function. This operation is not needed for - * most implementations of local continuation, but is required by a - * few implementations. - * - * \hideinitializer - */ -#define LC_END(lc) - -/** - * \var typedef lc_t; - * - * The local continuation type. - * - * \hideinitializer - */ -#endif /* DOXYGEN */ - -#ifndef __LC_H__ -#define __LC_H__ - -#ifdef LC_CONF_INCLUDE -#include LC_CONF_INCLUDE -#else -#include "lc-switch.h" -#endif /* LC_CONF_INCLUDE */ - -#endif /* __LC_H__ */ - -/** @} */ -/** @} */
--- a/libs/Network/uip/uip/psock.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,373 +0,0 @@ -#pragma GCC diagnostic ignored "-Wpointer-sign" -#pragma GCC diagnostic ignored "-Wstrict-aliasing" -#pragma GCC diagnostic ignored "-Wcast-align" -#pragma GCC diagnostic ignored "-Wcast-qual" -#pragma GCC diagnostic ignored "-Wunused-but-set-variable" - -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: psock.c,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ - -#include <stdio.h> -#include <string.h> - -#include "uipopt.h" -#include "psock.h" -#include "uip.h" - -#define STATE_NONE 0 -#define STATE_ACKED 1 -#define STATE_READ 2 -#define STATE_BLOCKED_NEWDATA 3 -#define STATE_BLOCKED_CLOSE 4 -#define STATE_BLOCKED_SEND 5 -#define STATE_DATA_SENT 6 - -/* - * Return value of the buffering functions that indicates that a - * buffer was not filled by incoming data. - * - */ -#define BUF_NOT_FULL 0 -#define BUF_NOT_FOUND 0 - -/* - * Return value of the buffering functions that indicates that a - * buffer was completely filled by incoming data. - * - */ -#define BUF_FULL 1 - -/* - * Return value of the buffering functions that indicates that an - * end-marker byte was found. - * - */ -#define BUF_FOUND 2 - -/*---------------------------------------------------------------------------*/ -static void -buf_setup(struct psock_buf *buf, - u8_t *bufptr, u16_t bufsize) -{ - buf->ptr = bufptr; - buf->left = bufsize; -} -/*---------------------------------------------------------------------------*/ -static u8_t -buf_bufdata(struct psock_buf *buf, u16_t len, - u8_t **dataptr, u16_t *datalen) -{ - if (*datalen < buf->left) { - memcpy(buf->ptr, *dataptr, *datalen); - buf->ptr += *datalen; - buf->left -= *datalen; - *dataptr += *datalen; - *datalen = 0; - return BUF_NOT_FULL; - } else if (*datalen == buf->left) { - memcpy(buf->ptr, *dataptr, *datalen); - buf->ptr += *datalen; - buf->left = 0; - *dataptr += *datalen; - *datalen = 0; - return BUF_FULL; - } else { - memcpy(buf->ptr, *dataptr, buf->left); - buf->ptr += buf->left; - *datalen -= buf->left; - *dataptr += buf->left; - buf->left = 0; - return BUF_FULL; - } -} -/*---------------------------------------------------------------------------*/ -static u8_t -buf_bufto(register struct psock_buf *buf, u8_t endmarker, - register u8_t **dataptr, register u16_t *datalen) -{ - u8_t c; - while (buf->left > 0 && *datalen > 0) { - c = *buf->ptr = **dataptr; - ++*dataptr; - ++buf->ptr; - --*datalen; - --buf->left; - - if (c == endmarker) { - return BUF_FOUND; - } - } - - if (*datalen == 0) { - return BUF_NOT_FOUND; - } - - while (*datalen > 0) { - c = **dataptr; - --*datalen; - ++*dataptr; - - if (c == endmarker) { - return BUF_FOUND | BUF_FULL; - } - } - - return BUF_FULL; -} -/*---------------------------------------------------------------------------*/ -static char -send_data(register struct psock *s) -{ - if (s->state != STATE_DATA_SENT || uip_rexmit()) { - if (s->sendlen > uip_mss()) { - uip_send(s->sendptr, uip_mss()); - } else { - uip_send(s->sendptr, s->sendlen); - } - s->state = STATE_DATA_SENT; - return 1; - } - return 0; -} -/*---------------------------------------------------------------------------*/ -static char -data_acked(register struct psock *s) -{ - if (s->state == STATE_DATA_SENT && uip_acked()) { - if (s->sendlen > uip_mss()) { - s->sendlen -= uip_mss(); - s->sendptr += uip_mss(); - } else { - s->sendptr += s->sendlen; - s->sendlen = 0; - } - s->state = STATE_ACKED; - return 1; - } - return 0; -} -/*---------------------------------------------------------------------------*/ -PT_THREAD(psock_send(register struct psock *s, const char *buf, - unsigned int len)) -{ - PT_BEGIN(&s->psockpt); - - /* If there is no data to send, we exit immediately. */ - if (len == 0) { - PT_EXIT(&s->psockpt); - } - - /* Save the length of and a pointer to the data that is to be - sent. */ - s->sendptr = buf; - s->sendlen = len; - - s->state = STATE_NONE; - - /* We loop here until all data is sent. The s->sendlen variable is - updated by the data_sent() function. */ - while (s->sendlen > 0) { - - /* - * The condition for this PT_WAIT_UNTIL is a little tricky: the - * protothread will wait here until all data has been acknowledged - * (data_acked() returns true) and until all data has been sent - * (send_data() returns true). The two functions data_acked() and - * send_data() must be called in succession to ensure that all - * data is sent. Therefore the & operator is used instead of the - * && operator, which would cause only the data_acked() function - * to be called when it returns false. - */ - PT_WAIT_UNTIL(&s->psockpt, data_acked(s) & send_data(s)); - } - - s->state = STATE_NONE; - - PT_END(&s->psockpt); -} -/*---------------------------------------------------------------------------*/ -PT_THREAD(psock_generator_send(register struct psock *s, - unsigned short (*generate)(void *), void *arg)) -{ - PT_BEGIN(&s->psockpt); - - /* Ensure that there is a generator function to call. */ - if (generate == NULL) { - PT_EXIT(&s->psockpt); - } - - /* Call the generator function to generate the data in the - uip_appdata buffer. */ - s->sendlen = generate(arg); - s->sendptr = uip_appdata; - - s->state = STATE_NONE; - do { - /* Call the generator function again if we are called to perform a - retransmission. */ - if (uip_rexmit()) { - generate(arg); - } - /* Wait until all data is sent and acknowledged. */ - PT_WAIT_UNTIL(&s->psockpt, data_acked(s) & send_data(s)); - } while (s->sendlen > 0); - - s->state = STATE_NONE; - - PT_END(&s->psockpt); -} -/*---------------------------------------------------------------------------*/ -u16_t -psock_datalen(struct psock *psock) -{ - return psock->bufsize - psock->buf.left; -} -/*---------------------------------------------------------------------------*/ -char -psock_newdata(struct psock *s) -{ - if (s->readlen > 0) { - /* There is data in the uip_appdata buffer that has not yet been - read with the PSOCK_READ functions. */ - return 1; - } else if (s->state == STATE_READ) { - /* All data in uip_appdata buffer already consumed. */ - s->state = STATE_BLOCKED_NEWDATA; - return 0; - } else if (uip_newdata()) { - /* There is new data that has not been consumed. */ - return 1; - } else { - /* There is no new data. */ - return 0; - } -} -/*---------------------------------------------------------------------------*/ -PT_THREAD(psock_readto(register struct psock *psock, unsigned char c)) -{ - PT_BEGIN(&psock->psockpt); - - buf_setup(&psock->buf, psock->bufptr, psock->bufsize); - - /* XXX: Should add buf_checkmarker() before do{} loop, if - incoming data has been handled while waiting for a write. */ - - do { - if (psock->readlen == 0) { - PT_WAIT_UNTIL(&psock->psockpt, psock_newdata(psock)); - psock->state = STATE_READ; - psock->readptr = (u8_t *)uip_appdata; - psock->readlen = uip_datalen(); - } - } while ((buf_bufto(&psock->buf, c, - &psock->readptr, - &psock->readlen) & BUF_FOUND) == 0); - - if (psock_datalen(psock) == 0) { - psock->state = STATE_NONE; - PT_RESTART(&psock->psockpt); - } - PT_END(&psock->psockpt); -} -/*---------------------------------------------------------------------------*/ -PT_THREAD(psock_readbuf(register struct psock *psock)) -{ - PT_BEGIN(&psock->psockpt); - - buf_setup(&psock->buf, psock->bufptr, psock->bufsize); - - /* XXX: Should add buf_checkmarker() before do{} loop, if - incoming data has been handled while waiting for a write. */ - - do { - if (psock->readlen == 0) { - PT_WAIT_UNTIL(&psock->psockpt, psock_newdata(psock)); - //printf("Waited for newdata\n"); - psock->state = STATE_READ; - psock->readptr = (u8_t *)uip_appdata; - psock->readlen = uip_datalen(); - } - } while (buf_bufdata(&psock->buf, psock->bufsize, - &psock->readptr, - &psock->readlen) != BUF_FULL); - - if (psock_datalen(psock) == 0) { - psock->state = STATE_NONE; - PT_RESTART(&psock->psockpt); - } - PT_END(&psock->psockpt); -} -/*---------------------------------------------------------------------------*/ -PT_THREAD(psock_readbuf_len(register struct psock *psock, uint16_t len)) -{ - PT_BEGIN(&psock->psockpt); - - // setup to read the smaller of buffer size or len - if(len > psock->bufsize) len= psock->bufsize; - buf_setup(&psock->buf, psock->bufptr, len); - - /* XXX: Should add buf_checkmarker() before do{} loop, if - incoming data has been handled while waiting for a write. */ - - /* read len bytes or to end of data */ - do { - if (psock->readlen == 0) { - PT_WAIT_UNTIL(&psock->psockpt, psock_newdata(psock)); - psock->state = STATE_READ; - psock->readptr = (uint8_t *)uip_appdata; - psock->readlen = uip_datalen(); - } - } while (buf_bufdata(&psock->buf, psock->bufsize, - &psock->readptr, &psock->readlen) != BUF_FULL); - - if (psock_datalen(psock) == 0) { - psock->state = STATE_NONE; - PT_RESTART(&psock->psockpt); - } - PT_END(&psock->psockpt); -} -/*---------------------------------------------------------------------------*/ -void -psock_init(register struct psock *psock, char *buffer, unsigned int buffersize) -{ - psock->state = STATE_NONE; - psock->readlen = 0; - psock->bufptr = buffer; - psock->bufsize = buffersize; - buf_setup(&psock->buf, buffer, buffersize); - PT_INIT(&psock->pt); - PT_INIT(&psock->psockpt); -} -/*---------------------------------------------------------------------------*/
--- a/libs/Network/uip/uip/psock.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,409 +0,0 @@ -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: psock.h,v 1.3 2006/06/12 08:00:30 adam Exp $ - */ - -/** - * \defgroup psock Protosockets library - * @{ - * - * The protosocket library provides an interface to the uIP stack that is - * similar to the traditional BSD socket interface. Unlike programs - * written for the ordinary uIP event-driven interface, programs - * written with the protosocket library are executed in a sequential - * fashion and does not have to be implemented as explicit state - * machines. - * - * Protosockets only work with TCP connections. - * - * The protosocket library uses \ref pt protothreads to provide - * sequential control flow. This makes the protosockets lightweight in - * terms of memory, but also means that protosockets inherits the - * functional limitations of protothreads. Each protosocket lives only - * within a single function. Automatic variables (stack variables) are - * not retained across a protosocket library function call. - * - * \note Because the protosocket library uses protothreads, local - * variables will not always be saved across a call to a protosocket - * library function. It is therefore advised that local variables are - * used with extreme care. - * - * The protosocket library provides functions for sending data without - * having to deal with retransmissions and acknowledgements, as well - * as functions for reading data without having to deal with data - * being split across more than one TCP segment. - * - * Because each protosocket runs as a protothread, the protosocket has to be - * started with a call to PSOCK_BEGIN() at the start of the function - * in which the protosocket is used. Similarly, the protosocket protothread can - * be terminated by a call to PSOCK_EXIT(). - * - */ - -/** - * \file - * Protosocket library header file - * \author - * Adam Dunkels <adam@sics.se> - * - */ - -#ifndef __PSOCK_H__ -#define __PSOCK_H__ - -#include "uipopt.h" -#include "pt.h" - - /* - * The structure that holds the state of a buffer. - * - * This structure holds the state of a uIP buffer. The structure has - * no user-visible elements, but is used through the functions - * provided by the library. - * - */ -struct psock_buf { - u8_t *ptr; - unsigned short left; -}; - -/** - * The representation of a protosocket. - * - * The protosocket structrure is an opaque structure with no user-visible - * elements. - */ -struct psock { - struct pt pt, psockpt; /* Protothreads - one that's using the psock - functions, and one that runs inside the - psock functions. */ - const u8_t *sendptr; /* Pointer to the next data to be sent. */ - u8_t *readptr; /* Pointer to the next data to be read. */ - - char *bufptr; /* Pointer to the buffer used for buffering - incoming data. */ - - u16_t sendlen; /* The number of bytes left to be sent. */ - u16_t readlen; /* The number of bytes left to be read. */ - - struct psock_buf buf; /* The structure holding the state of the - input buffer. */ - unsigned int bufsize; /* The size of the input buffer. */ - - unsigned char state; /* The state of the protosocket. */ -}; - -void psock_init(struct psock *psock, char *buffer, unsigned int buffersize); -/** - * Initialize a protosocket. - * - * This macro initializes a protosocket and must be called before the - * protosocket is used. The initialization also specifies the input buffer - * for the protosocket. - * - * \param psock (struct psock *) A pointer to the protosocket to be - * initialized - * - * \param buffer (char *) A pointer to the input buffer for the - * protosocket. - * - * \param buffersize (unsigned int) The size of the input buffer. - * - * \hideinitializer - */ -#define PSOCK_INIT(psock, buffer, buffersize) \ - psock_init(psock, buffer, buffersize) - -/** - * Start the protosocket protothread in a function. - * - * This macro starts the protothread associated with the protosocket and - * must come before other protosocket calls in the function it is used. - * - * \param psock (struct psock *) A pointer to the protosocket to be - * started. - * - * \hideinitializer - */ -#define PSOCK_BEGIN(psock) PT_BEGIN(&((psock)->pt)) - -PT_THREAD(psock_send(struct psock *psock, const char *buf, unsigned int len)); -/** - * Send data. - * - * This macro sends data over a protosocket. The protosocket protothread blocks - * until all data has been sent and is known to have been received by - * the remote end of the TCP connection. - * - * \param psock (struct psock *) A pointer to the protosocket over which - * data is to be sent. - * - * \param data (char *) A pointer to the data that is to be sent. - * - * \param datalen (unsigned int) The length of the data that is to be - * sent. - * - * \hideinitializer - */ -#define PSOCK_SEND(psock, data, datalen) \ - PT_WAIT_THREAD(&((psock)->pt), psock_send(psock, data, datalen)) - -/** - * \brief Send a null-terminated string. - * \param psock Pointer to the protosocket. - * \param str The string to be sent. - * - * This function sends a null-terminated string over the - * protosocket. - * - * \hideinitializer - */ -#define PSOCK_SEND_STR(psock, str) \ - PT_WAIT_THREAD(&((psock)->pt), psock_send(psock, str, strlen(str))) - -PT_THREAD(psock_generator_send(struct psock *psock, - unsigned short (*f)(void *), void *arg)); - -/** - * \brief Generate data with a function and send it - * \param psock Pointer to the protosocket. - * \param generator Pointer to the generator function - * \param arg Argument to the generator function - * - * This function generates data and sends it over the - * protosocket. This can be used to dynamically generate - * data for a transmission, instead of generating the data - * in a buffer beforehand. This function reduces the need for - * buffer memory. The generator function is implemented by - * the application, and a pointer to the function is given - * as an argument with the call to PSOCK_GENERATOR_SEND(). - * - * The generator function should place the generated data - * directly in the uip_appdata buffer, and return the - * length of the generated data. The generator function is - * called by the protosocket layer when the data first is - * sent, and once for every retransmission that is needed. - * - * \hideinitializer - */ -#define PSOCK_GENERATOR_SEND(psock, generator, arg) \ - PT_WAIT_THREAD(&((psock)->pt), \ - psock_generator_send(psock, generator, arg)) - - -/** - * Close a protosocket. - * - * This macro closes a protosocket and can only be called from within the - * protothread in which the protosocket lives. - * - * \param psock (struct psock *) A pointer to the protosocket that is to - * be closed. - * - * \hideinitializer - */ -#define PSOCK_CLOSE(psock) uip_close() - -PT_THREAD(psock_readbuf(struct psock *psock)); -/** - * Read data until the buffer is full. - * - * This macro will block waiting for data and read the data into the - * input buffer specified with the call to PSOCK_INIT(). Data is read - * until the buffer is full.. - * - * \param psock (struct psock *) A pointer to the protosocket from which - * data should be read. - * - * \hideinitializer - */ -#define PSOCK_READBUF(psock) \ - PT_WAIT_THREAD(&((psock)->pt), psock_readbuf(psock)) - -PT_THREAD(psock_readbuf_len(struct psock *psock, uint16_t len)); - -/** - * Read n bytes of data where n is the smaller of the buffer size or len - * - * This macro will block waiting for data and read the data into the - * input buffer specified with the call to PSOCK_INIT(). Data is read - * until either len bytes are read or size of the buffer, note len should - * be smaller or equel to the buffer size - * - * \param psock (struct psock *) A pointer to the protosocket from which - * data should be read. - * - * \param len (int) The number of bytes to be read. - * \hideinitializer - */ -#define PSOCK_READBUF_LEN(psock, len) \ -PT_WAIT_THREAD(&((psock)->pt), psock_readbuf_len(psock, len)) - - -PT_THREAD(psock_readto(struct psock *psock, unsigned char c)); -/** - * Read data up to a specified character. - * - * This macro will block waiting for data and read the data into the - * input buffer specified with the call to PSOCK_INIT(). Data is only - * read until the specifieed character appears in the data stream. - * - * \param psock (struct psock *) A pointer to the protosocket from which - * data should be read. - * - * \param c (char) The character at which to stop reading. - * - * \hideinitializer - */ -#define PSOCK_READTO(psock, c) \ - PT_WAIT_THREAD(&((psock)->pt), psock_readto(psock, c)) - -/** - * The length of the data that was previously read. - * - * This macro returns the length of the data that was previously read - * using PSOCK_READTO() or PSOCK_READ(). - * - * \param psock (struct psock *) A pointer to the protosocket holding the data. - * - * \hideinitializer - */ -#define PSOCK_DATALEN(psock) psock_datalen(psock) - -u16_t psock_datalen(struct psock *psock); - -/** - * Exit the protosocket's protothread. - * - * This macro terminates the protothread of the protosocket and should - * almost always be used in conjunction with PSOCK_CLOSE(). - * - * \sa PSOCK_CLOSE_EXIT() - * - * \param psock (struct psock *) A pointer to the protosocket. - * - * \hideinitializer - */ -#define PSOCK_EXIT(psock) PT_EXIT(&((psock)->pt)) - -/** - * Close a protosocket and exit the protosocket's protothread. - * - * This macro closes a protosocket and exits the protosocket's protothread. - * - * \param psock (struct psock *) A pointer to the protosocket. - * - * \hideinitializer - */ -#define PSOCK_CLOSE_EXIT(psock) \ - do { \ - PSOCK_CLOSE(psock); \ - PSOCK_EXIT(psock); \ - } while(0) - -/** - * Declare the end of a protosocket's protothread. - * - * This macro is used for declaring that the protosocket's protothread - * ends. It must always be used together with a matching PSOCK_BEGIN() - * macro. - * - * \param psock (struct psock *) A pointer to the protosocket. - * - * \hideinitializer - */ -#define PSOCK_END(psock) PT_END(&((psock)->pt)) - -char psock_newdata(struct psock *s); - -/** - * Check if new data has arrived on a protosocket. - * - * This macro is used in conjunction with the PSOCK_WAIT_UNTIL() - * macro to check if data has arrived on a protosocket. - * - * \param psock (struct psock *) A pointer to the protosocket. - * - * \hideinitializer - */ -#define PSOCK_NEWDATA(psock) psock_newdata(psock) - -/** - * Wait until a condition is true. - * - * This macro blocks the protothread until the specified condition is - * true. The macro PSOCK_NEWDATA() can be used to check if new data - * arrives when the protosocket is waiting. - * - * Typically, this macro is used as follows: - * - \code - PT_THREAD(thread(struct psock *s, struct timer *t)) - { - PSOCK_BEGIN(s); - - PSOCK_WAIT_UNTIL(s, PSOCK_NEWADATA(s) || timer_expired(t)); - - if(PSOCK_NEWDATA(s)) { - PSOCK_READTO(s, '\n'); - } else { - handle_timed_out(s); - } - - PSOCK_END(s); - } - \endcode - * - * \param psock (struct psock *) A pointer to the protosocket. - * \param condition The condition to wait for. - * - * \hideinitializer - */ -#define PSOCK_WAIT_UNTIL(psock, condition) \ - PT_WAIT_UNTIL(&((psock)->pt), (condition)); - -#define PSOCK_WAIT_THREAD(psock, condition) \ - PT_WAIT_THREAD(&((psock)->pt), (condition)) - - -/** - * return a pointer and length of whatever is left in the uip_appdata buffer - * after previous use of PSOCK_READTO() and mark the internal buffer as fully read - */ -#define PSOCK_GET_LENGTH_OF_REST_OF_BUFFER(psock) (psock)->readlen -#define PSOCK_GET_START_OF_REST_OF_BUFFER(psock) (psock)->readptr -#define PSOCK_MARK_BUFFER_READ(psock) do { (psock)->readlen= 0; (psock)->state = 0; } while(0) - -#endif /* __PSOCK_H__ */ - -/** @} */
--- a/libs/Network/uip/uip/pt.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,323 +0,0 @@ -/* - * Copyright (c) 2004-2005, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: pt.h,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ - -/** - * \addtogroup pt - * @{ - */ - -/** - * \file - * Protothreads implementation. - * \author - * Adam Dunkels <adam@sics.se> - * - */ - -#ifndef __PT_H__ -#define __PT_H__ - -#include "lc.h" - -struct pt { - lc_t lc; -}; - -#define PT_WAITING 0 -#define PT_EXITED 1 -#define PT_ENDED 2 -#define PT_YIELDED 3 - -/** - * \name Initialization - * @{ - */ - -/** - * Initialize a protothread. - * - * Initializes a protothread. Initialization must be done prior to - * starting to execute the protothread. - * - * \param pt A pointer to the protothread control structure. - * - * \sa PT_SPAWN() - * - * \hideinitializer - */ -#define PT_INIT(pt) LC_INIT((pt)->lc) - -/** @} */ - -/** - * \name Declaration and definition - * @{ - */ - -/** - * Declaration of a protothread. - * - * This macro is used to declare a protothread. All protothreads must - * be declared with this macro. - * - * \param name_args The name and arguments of the C function - * implementing the protothread. - * - * \hideinitializer - */ -#define PT_THREAD(name_args) char name_args - -/** - * Declare the start of a protothread inside the C function - * implementing the protothread. - * - * This macro is used to declare the starting point of a - * protothread. It should be placed at the start of the function in - * which the protothread runs. All C statements above the PT_BEGIN() - * invokation will be executed each time the protothread is scheduled. - * - * \param pt A pointer to the protothread control structure. - * - * \hideinitializer - */ -#define PT_BEGIN(pt) { char PT_YIELD_FLAG = 1; LC_RESUME((pt)->lc) - -/** - * Declare the end of a protothread. - * - * This macro is used for declaring that a protothread ends. It must - * always be used together with a matching PT_BEGIN() macro. - * - * \param pt A pointer to the protothread control structure. - * - * \hideinitializer - */ -#define PT_END(pt) LC_END((pt)->lc); PT_YIELD_FLAG = 0; \ - PT_INIT(pt); return PT_ENDED; } - -/** @} */ - -/** - * \name Blocked wait - * @{ - */ - -/** - * Block and wait until condition is true. - * - * This macro blocks the protothread until the specified condition is - * true. - * - * \param pt A pointer to the protothread control structure. - * \param condition The condition. - * - * \hideinitializer - */ -#define PT_WAIT_UNTIL(pt, condition) \ - do { \ - LC_SET((pt)->lc); \ - if(!(condition)) { \ - return PT_WAITING; \ - } \ - } while(0) - -/** - * Block and wait while condition is true. - * - * This function blocks and waits while condition is true. See - * PT_WAIT_UNTIL(). - * - * \param pt A pointer to the protothread control structure. - * \param cond The condition. - * - * \hideinitializer - */ -#define PT_WAIT_WHILE(pt, cond) PT_WAIT_UNTIL((pt), !(cond)) - -/** @} */ - -/** - * \name Hierarchical protothreads - * @{ - */ - -/** - * Block and wait until a child protothread completes. - * - * This macro schedules a child protothread. The current protothread - * will block until the child protothread completes. - * - * \note The child protothread must be manually initialized with the - * PT_INIT() function before this function is used. - * - * \param pt A pointer to the protothread control structure. - * \param thread The child protothread with arguments - * - * \sa PT_SPAWN() - * - * \hideinitializer - */ -#define PT_WAIT_THREAD(pt, thread) PT_WAIT_WHILE((pt), PT_SCHEDULE(thread)) - -/** - * Spawn a child protothread and wait until it exits. - * - * This macro spawns a child protothread and waits until it exits. The - * macro can only be used within a protothread. - * - * \param pt A pointer to the protothread control structure. - * \param child A pointer to the child protothread's control structure. - * \param thread The child protothread with arguments - * - * \hideinitializer - */ -#define PT_SPAWN(pt, child, thread) \ - do { \ - PT_INIT((child)); \ - PT_WAIT_THREAD((pt), (thread)); \ - } while(0) - -/** @} */ - -/** - * \name Exiting and restarting - * @{ - */ - -/** - * Restart the protothread. - * - * This macro will block and cause the running protothread to restart - * its execution at the place of the PT_BEGIN() call. - * - * \param pt A pointer to the protothread control structure. - * - * \hideinitializer - */ -#define PT_RESTART(pt) \ - do { \ - PT_INIT(pt); \ - return PT_WAITING; \ - } while(0) - -/** - * Exit the protothread. - * - * This macro causes the protothread to exit. If the protothread was - * spawned by another protothread, the parent protothread will become - * unblocked and can continue to run. - * - * \param pt A pointer to the protothread control structure. - * - * \hideinitializer - */ -#define PT_EXIT(pt) \ - do { \ - PT_INIT(pt); \ - return PT_EXITED; \ - } while(0) - -/** @} */ - -/** - * \name Calling a protothread - * @{ - */ - -/** - * Schedule a protothread. - * - * This function shedules a protothread. The return value of the - * function is non-zero if the protothread is running or zero if the - * protothread has exited. - * - * \param f The call to the C function implementing the protothread to - * be scheduled - * - * \hideinitializer - */ -#define PT_SCHEDULE(f) ((f) == PT_WAITING) - -/** @} */ - -/** - * \name Yielding from a protothread - * @{ - */ - -/** - * Yield from the current protothread. - * - * This function will yield the protothread, thereby allowing other - * processing to take place in the system. - * - * \param pt A pointer to the protothread control structure. - * - * \hideinitializer - */ -#define PT_YIELD(pt) \ - do { \ - PT_YIELD_FLAG = 0; \ - LC_SET((pt)->lc); \ - if(PT_YIELD_FLAG == 0) { \ - return PT_YIELDED; \ - } \ - } while(0) - -/** - * \brief Yield from the protothread until a condition occurs. - * \param pt A pointer to the protothread control structure. - * \param cond The condition. - * - * This function will yield the protothread, until the - * specified condition evaluates to true. - * - * - * \hideinitializer - */ -#define PT_YIELD_UNTIL(pt, cond) \ - do { \ - PT_YIELD_FLAG = 0; \ - LC_SET((pt)->lc); \ - if((PT_YIELD_FLAG == 0) || !(cond)) { \ - return PT_YIELDED; \ - } \ - } while(0) - -/** @} */ - -#endif /* __PT_H__ */ - -/** @} */
--- a/libs/Network/uip/uip/timer.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,127 +0,0 @@ -/** - * \addtogroup timer - * @{ - */ - -/** - * \file - * Timer library implementation. - * \author - * Adam Dunkels <adam@sics.se> - */ - -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: timer.c,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ - -#include "clock.h" -#include "timer.h" - -/*---------------------------------------------------------------------------*/ -/** - * Set a timer. - * - * This function is used to set a timer for a time sometime in the - * future. The function timer_expired() will evaluate to true after - * the timer has expired. - * - * \param t A pointer to the timer - * \param interval The interval before the timer expires. - * - */ -void -timer_set(struct timer *t, clock_time_t interval) -{ - t->interval = interval; - t->start = clock_time(); -} -/*---------------------------------------------------------------------------*/ -/** - * Reset the timer with the same interval. - * - * This function resets the timer with the same interval that was - * given to the timer_set() function. The start point of the interval - * is the exact time that the timer last expired. Therefore, this - * function will cause the timer to be stable over time, unlike the - * timer_rester() function. - * - * \param t A pointer to the timer. - * - * \sa timer_restart() - */ -void -timer_reset(struct timer *t) -{ - t->start += t->interval; -} -/*---------------------------------------------------------------------------*/ -/** - * Restart the timer from the current point in time - * - * This function restarts a timer with the same interval that was - * given to the timer_set() function. The timer will start at the - * current time. - * - * \note A periodic timer will drift if this function is used to reset - * it. For preioric timers, use the timer_reset() function instead. - * - * \param t A pointer to the timer. - * - * \sa timer_reset() - */ -void -timer_restart(struct timer *t) -{ - t->start = clock_time(); -} -/*---------------------------------------------------------------------------*/ -/** - * Check if a timer has expired. - * - * This function tests if a timer has expired and returns true or - * false depending on its status. - * - * \param t A pointer to the timer - * - * \return Non-zero if the timer has expired, zero otherwise. - * - */ -int -timer_expired(struct timer *t) -{ - return (clock_time_t)(clock_time() - t->start) >= (clock_time_t)t->interval; -} -/*---------------------------------------------------------------------------*/ - -/** @} */
--- a/libs/Network/uip/uip/timer.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,94 +0,0 @@ -/** - * \defgroup timer Timer library - * - * The timer library provides functions for setting, resetting and - * restarting timers, and for checking if a timer has expired. An - * application must "manually" check if its timers have expired; this - * is not done automatically. - * - * A timer is declared as a \c struct \c timer and all access to the - * timer is made by a pointer to the declared timer. - * - * \note The timer library uses the \ref clock "Clock library" to - * measure time. Intervals should be specified in the format used by - * the clock library. - * - * @{ - */ - - -/** - * \file - * Timer library header file. - * \author - * Adam Dunkels <adam@sics.se> - */ - -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: timer.h,v 1.3 2006/06/11 21:46:39 adam Exp $ - */ -#ifndef __TIMER_H__ -#define __TIMER_H__ - -#include "clock.h" - -/** - * A timer. - * - * This structure is used for declaring a timer. The timer must be set - * with timer_set() before it can be used. - * - * \hideinitializer - */ -struct timer { - clock_time_t start; - clock_time_t interval; -}; - -#ifdef __cplusplus -extern "C" { -#endif - -void timer_set(struct timer *t, clock_time_t interval); -void timer_reset(struct timer *t); -void timer_restart(struct timer *t); -int timer_expired(struct timer *t); - -#ifdef __cplusplus -} -#endif - -#endif /* __TIMER_H__ */ - -/** @} */
--- a/libs/Network/uip/uip/uip-fw.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,537 +0,0 @@ -#pragma GCC diagnostic ignored "-Wredundant-decls" -#pragma GCC diagnostic ignored "-Wstrict-aliasing" -#pragma GCC diagnostic ignored "-Wcast-align" -#pragma GCC diagnostic ignored "-Wcast-qual" - -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: uip-fw.c,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ -/** - * \addtogroup uip - * @{ - */ - -/** - * \defgroup uipfw uIP packet forwarding - * @{ - * - */ - -/** - * \file - * uIP packet forwarding. - * \author Adam Dunkels <adam@sics.se> - * - * This file implements a number of simple functions which do packet - * forwarding over multiple network interfaces with uIP. - * - */ - -#include "uip.h" -#include "uip_arch.h" -#include "uip-fw.h" - -#include <string.h> /* for memcpy() */ - -/* - * The list of registered network interfaces. - */ -static struct uip_fw_netif *netifs = NULL; - -/* - * A pointer to the default network interface. - */ -static struct uip_fw_netif *defaultnetif = NULL; - -struct tcpip_hdr { - /* IP header. */ - u8_t vhl, - tos; - u16_t len, - ipid, - ipoffset; - u8_t ttl, - proto; - u16_t ipchksum; - u16_t srcipaddr[2], - destipaddr[2]; - - /* TCP header. */ - u16_t srcport, - destport; - u8_t seqno[4], - ackno[4], - tcpoffset, - flags, - wnd[2]; - u16_t tcpchksum; - u8_t urgp[2]; - u8_t optdata[4]; -}; - -struct icmpip_hdr { - /* IP header. */ - u8_t vhl, - tos, - len[2], - ipid[2], - ipoffset[2], - ttl, - proto; - u16_t ipchksum; - u16_t srcipaddr[2], - destipaddr[2]; - /* ICMP (echo) header. */ - u8_t type, icode; - u16_t icmpchksum; - u16_t id, seqno; - u8_t payload[1]; -}; - -/* ICMP ECHO. */ -#define ICMP_ECHO 8 - -/* ICMP TIME-EXCEEDED. */ -#define ICMP_TE 11 - -/* - * Pointer to the TCP/IP headers of the packet in the uip_buf buffer. - */ -#define BUF ((struct tcpip_hdr *)&uip_buf[UIP_LLH_LEN]) - -/* - * Pointer to the ICMP/IP headers of the packet in the uip_buf buffer. - */ -#define ICMPBUF ((struct icmpip_hdr *)&uip_buf[UIP_LLH_LEN]) - -/* - * Certain fields of an IP packet that are used for identifying - * duplicate packets. - */ -struct fwcache_entry { - u16_t timer; - - u16_t srcipaddr[2]; - u16_t destipaddr[2]; - u16_t ipid; - u8_t proto; - u8_t unused; - -#if notdef - u16_t payload[2]; -#endif - -#if UIP_REASSEMBLY > 0 - u16_t len, offset; -#endif -}; - -/* - * The number of packets to remember when looking for duplicates. - */ -#ifdef UIP_CONF_FWCACHE_SIZE -#define FWCACHE_SIZE UIP_CONF_FWCACHE_SIZE -#else -#define FWCACHE_SIZE 2 -#endif - - -/* - * A cache of packet header fields which are used for - * identifying duplicate packets. - */ -static struct fwcache_entry fwcache[FWCACHE_SIZE]; - -/** - * \internal - * The time that a packet cache is active. - */ -#define FW_TIME 20 - -/*------------------------------------------------------------------------------*/ -/** - * Initialize the uIP packet forwarding module. - */ -/*------------------------------------------------------------------------------*/ -void -uip_fw_init(void) -{ - struct uip_fw_netif *t; - defaultnetif = NULL; - while(netifs != NULL) { - t = netifs; - netifs = netifs->next; - t->next = NULL; - } -} -/*------------------------------------------------------------------------------*/ -/** - * \internal - * Check if an IP address is within the network defined by an IP - * address and a netmask. - * - * \param ipaddr The IP address to be checked. - * \param netipaddr The IP address of the network. - * \param netmask The netmask of the network. - * - * \return Non-zero if IP address is in network, zero otherwise. - */ -/*------------------------------------------------------------------------------*/ -static unsigned char -ipaddr_maskcmp(u16_t *ipaddr, u16_t *netipaddr, u16_t *netmask) -{ - return (ipaddr[0] & netmask [0]) == (netipaddr[0] & netmask[0]) && - (ipaddr[1] & netmask[1]) == (netipaddr[1] & netmask[1]); -} -/*------------------------------------------------------------------------------*/ -/** - * \internal - * Send out an ICMP TIME-EXCEEDED message. - * - * This function replaces the packet in the uip_buf buffer with the - * ICMP packet. - */ -/*------------------------------------------------------------------------------*/ -static void -time_exceeded(void) -{ - u16_t tmp16; - - /* We don't send out ICMP errors for ICMP messages. */ - if(ICMPBUF->proto == UIP_PROTO_ICMP) { - uip_len = 0; - return; - } - /* Copy fields from packet header into payload of this ICMP packet. */ - memcpy(&(ICMPBUF->payload[0]), ICMPBUF, 28); - - /* Set the ICMP type and code. */ - ICMPBUF->type = ICMP_TE; - ICMPBUF->icode = 0; - - /* Calculate the ICMP checksum. */ - ICMPBUF->icmpchksum = 0; - ICMPBUF->icmpchksum = ~uip_chksum((u16_t *)&(ICMPBUF->type), 36); - - /* Set the IP destination address to be the source address of the - original packet. */ - tmp16= BUF->destipaddr[0]; - BUF->destipaddr[0] = BUF->srcipaddr[0]; - BUF->srcipaddr[0] = tmp16; - tmp16 = BUF->destipaddr[1]; - BUF->destipaddr[1] = BUF->srcipaddr[1]; - BUF->srcipaddr[1] = tmp16; - - /* Set our IP address as the source address. */ - BUF->srcipaddr[0] = uip_hostaddr[0]; - BUF->srcipaddr[1] = uip_hostaddr[1]; - - /* The size of the ICMP time exceeded packet is 36 + the size of the - IP header (20) = 56. */ - uip_len = 56; - ICMPBUF->len[0] = 0; - ICMPBUF->len[1] = uip_len; - - /* Fill in the other fields in the IP header. */ - ICMPBUF->vhl = 0x45; - ICMPBUF->tos = 0; - ICMPBUF->ipoffset[0] = ICMPBUF->ipoffset[1] = 0; - ICMPBUF->ttl = UIP_TTL; - ICMPBUF->proto = UIP_PROTO_ICMP; - - /* Calculate IP checksum. */ - ICMPBUF->ipchksum = 0; - ICMPBUF->ipchksum = ~(uip_ipchksum()); - - -} -/*------------------------------------------------------------------------------*/ -/** - * \internal - * Register a packet in the forwarding cache so that it won't be - * forwarded again. - */ -/*------------------------------------------------------------------------------*/ -static void -fwcache_register(void) -{ - struct fwcache_entry *fw; - int i, oldest; - - oldest = FW_TIME; - fw = NULL; - - /* Find the oldest entry in the cache. */ - for(i = 0; i < FWCACHE_SIZE; ++i) { - if(fwcache[i].timer == 0) { - fw = &fwcache[i]; - break; - } else if(fwcache[i].timer <= oldest) { - fw = &fwcache[i]; - oldest = fwcache[i].timer; - } - } - - fw->timer = FW_TIME; - fw->ipid = BUF->ipid; - fw->srcipaddr[0] = BUF->srcipaddr[0]; - fw->srcipaddr[1] = BUF->srcipaddr[1]; - fw->destipaddr[0] = BUF->destipaddr[0]; - fw->destipaddr[1] = BUF->destipaddr[1]; - fw->proto = BUF->proto; -#if notdef - fw->payload[0] = BUF->srcport; - fw->payload[1] = BUF->destport; -#endif -#if UIP_REASSEMBLY > 0 - fw->len = BUF->len; - fw->offset = BUF->ipoffset; -#endif -} -/*------------------------------------------------------------------------------*/ -/** - * \internal - * Find a network interface for the IP packet in uip_buf. - */ -/*------------------------------------------------------------------------------*/ -static struct uip_fw_netif * -find_netif(void) -{ - struct uip_fw_netif *netif; - - /* Walk through every network interface to check for a match. */ - for(netif = netifs; netif != NULL; netif = netif->next) { - if(ipaddr_maskcmp(BUF->destipaddr, netif->ipaddr, - netif->netmask)) { - /* If there was a match, we break the loop. */ - return netif; - } - } - - /* If no matching netif was found, we use default netif. */ - return defaultnetif; -} -/*------------------------------------------------------------------------------*/ -/** - * Output an IP packet on the correct network interface. - * - * The IP packet should be present in the uip_buf buffer and its - * length in the global uip_len variable. - * - * \retval UIP_FW_ZEROLEN Indicates that a zero-length packet - * transmission was attempted and that no packet was sent. - * - * \retval UIP_FW_NOROUTE No suitable network interface could be found - * for the outbound packet, and the packet was not sent. - * - * \return The return value from the actual network interface output - * function is passed unmodified as a return value. - */ -/*------------------------------------------------------------------------------*/ -u8_t -uip_fw_output(void) -{ - struct uip_fw_netif *netif; - - if(uip_len == 0) { - return UIP_FW_ZEROLEN; - } - - fwcache_register(); - -#if UIP_BROADCAST - /* Link local broadcasts go out on all interfaces. */ - if(/*BUF->proto == UIP_PROTO_UDP &&*/ - BUF->destipaddr[0] == 0xffff && - BUF->destipaddr[1] == 0xffff) { - if(defaultnetif != NULL) { - defaultnetif->output(); - } - for(netif = netifs; netif != NULL; netif = netif->next) { - netif->output(); - } - return UIP_FW_OK; - } -#endif /* UIP_BROADCAST */ - - netif = find_netif(); - /* printf("uip_fw_output: netif %p ->output %p len %d\n", netif, - netif->output, - uip_len);*/ - - if(netif == NULL) { - return UIP_FW_NOROUTE; - } - /* If we now have found a suitable network interface, we call its - output function to send out the packet. */ - return netif->output(); -} -/*------------------------------------------------------------------------------*/ -/** - * Forward an IP packet in the uip_buf buffer. - * - * - * - * \return UIP_FW_FORWARDED if the packet was forwarded, UIP_FW_LOCAL if - * the packet should be processed locally. - */ -/*------------------------------------------------------------------------------*/ -u8_t -uip_fw_forward(void) -{ - struct fwcache_entry *fw; - - /* First check if the packet is destined for ourselves and return 0 - to indicate that the packet should be processed locally. */ - if(BUF->destipaddr[0] == uip_hostaddr[0] && - BUF->destipaddr[1] == uip_hostaddr[1]) { - return UIP_FW_LOCAL; - } - - /* If we use ping IP address configuration, and our IP address is - not yet configured, we should intercept all ICMP echo packets. */ -#if UIP_PINGADDRCONF - if((uip_hostaddr[0] | uip_hostaddr[1]) == 0 && - BUF->proto == UIP_PROTO_ICMP && - ICMPBUF->type == ICMP_ECHO) { - return UIP_FW_LOCAL; - } -#endif /* UIP_PINGADDRCONF */ - - /* Check if the packet is in the forwarding cache already, and if so - we drop it. */ - - for(fw = fwcache; fw < &fwcache[FWCACHE_SIZE]; ++fw) { - if(fw->timer != 0 && -#if UIP_REASSEMBLY > 0 - fw->len == BUF->len && - fw->offset == BUF->ipoffset && -#endif - fw->ipid == BUF->ipid && - fw->srcipaddr[0] == BUF->srcipaddr[0] && - fw->srcipaddr[1] == BUF->srcipaddr[1] && - fw->destipaddr[0] == BUF->destipaddr[0] && - fw->destipaddr[1] == BUF->destipaddr[1] && -#if notdef - fw->payload[0] == BUF->srcport && - fw->payload[1] == BUF->destport && -#endif - fw->proto == BUF->proto) { - /* Drop packet. */ - return UIP_FW_FORWARDED; - } - } - - /* If the TTL reaches zero we produce an ICMP time exceeded message - in the uip_buf buffer and forward that packet back to the sender - of the packet. */ - if(BUF->ttl <= 1) { - /* No time exceeded for broadcasts and multicasts! */ - if(BUF->destipaddr[0] == 0xffff && BUF->destipaddr[1] == 0xffff) { - return UIP_FW_LOCAL; - } - time_exceeded(); - } - - /* Decrement the TTL (time-to-live) value in the IP header */ - BUF->ttl = BUF->ttl - 1; - - /* Update the IP checksum. */ - if(BUF->ipchksum >= HTONS(0xffff - 0x0100)) { - BUF->ipchksum = BUF->ipchksum + HTONS(0x0100) + 1; - } else { - BUF->ipchksum = BUF->ipchksum + HTONS(0x0100); - } - - if(uip_len > 0) { - uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_TCPIP_HLEN]; - uip_fw_output(); - } - -#if UIP_BROADCAST - if(BUF->destipaddr[0] == 0xffff && BUF->destipaddr[1] == 0xffff) { - return UIP_FW_LOCAL; - } -#endif /* UIP_BROADCAST */ - - /* Return non-zero to indicate that the packet was forwarded and that no - other processing should be made. */ - return UIP_FW_FORWARDED; -} -/*------------------------------------------------------------------------------*/ -/** - * Register a network interface with the forwarding module. - * - * \param netif A pointer to the network interface that is to be - * registered. - */ -/*------------------------------------------------------------------------------*/ -void -uip_fw_register(struct uip_fw_netif *netif) -{ - netif->next = netifs; - netifs = netif; -} -/*------------------------------------------------------------------------------*/ -/** - * Register a default network interface. - * - * All packets that don't go out on any of the other interfaces will - * be routed to the default interface. - * - * \param netif A pointer to the network interface that is to be - * registered. - */ -/*------------------------------------------------------------------------------*/ -void -uip_fw_default(struct uip_fw_netif *netif) -{ - defaultnetif = netif; -} -/*------------------------------------------------------------------------------*/ -/** - * Perform periodic processing. - */ -/*------------------------------------------------------------------------------*/ -void -uip_fw_periodic(void) -{ - struct fwcache_entry *fw; - for(fw = fwcache; fw < &fwcache[FWCACHE_SIZE]; ++fw) { - if(fw->timer > 0) { - --fw->timer; - } - } -} -/*------------------------------------------------------------------------------*/
--- a/libs/Network/uip/uip/uip-fw.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,176 +0,0 @@ -/** - * \addtogroup uipfw - * @{ - */ - -/** - * \file - * uIP packet forwarding header file. - * \author Adam Dunkels <adam@sics.se> - */ - -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: uip-fw.h,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ -#ifndef __UIP_FW_H__ -#define __UIP_FW_H__ - -#include "uip.h" - -/** - * Representation of a uIP network interface. - */ -struct uip_fw_netif { - struct uip_fw_netif *next; /**< Pointer to the next interface when - linked in a list. */ - u16_t ipaddr[2]; /**< The IP address of this interface. */ - u16_t netmask[2]; /**< The netmask of the interface. */ - u8_t (* output)(void); - /**< A pointer to the function that - sends a packet. */ -}; - -/** - * Intantiating macro for a uIP network interface. - * - * Example: - \code - struct uip_fw_netif slipnetif = - {UIP_FW_NETIF(192,168,76,1, 255,255,255,0, slip_output)}; - \endcode - * \param ip1,ip2,ip3,ip4 The IP address of the network interface. - * - * \param nm1,nm2,nm3,nm4 The netmask of the network interface. - * - * \param outputfunc A pointer to the output function of the network interface. - * - * \hideinitializer - */ -#define UIP_FW_NETIF(ip1,ip2,ip3,ip4, nm1,nm2,nm3,nm4, outputfunc) \ - NULL, \ - {HTONS((ip1 << 8) | ip2), HTONS((ip3 << 8) | ip4)}, \ - {HTONS((nm1 << 8) | nm2), HTONS((nm3 << 8) | nm4)}, \ - outputfunc - -/** - * Set the IP address of a network interface. - * - * \param netif A pointer to the uip_fw_netif structure for the network interface. - * - * \param addr A pointer to an IP address. - * - * \hideinitializer - */ -#define uip_fw_setipaddr(netif, addr) \ - do { (netif)->ipaddr[0] = ((u16_t *)(addr))[0]; \ - (netif)->ipaddr[1] = ((u16_t *)(addr))[1]; } while(0) -/** - * Set the netmask of a network interface. - * - * \param netif A pointer to the uip_fw_netif structure for the network interface. - * - * \param addr A pointer to an IP address representing the netmask. - * - * \hideinitializer - */ -#define uip_fw_setnetmask(netif, addr) \ - do { (netif)->netmask[0] = ((u16_t *)(addr))[0]; \ - (netif)->netmask[1] = ((u16_t *)(addr))[1]; } while(0) - -void uip_fw_init(void); -u8_t uip_fw_forward(void); -u8_t uip_fw_output(void); -void uip_fw_register(struct uip_fw_netif *netif); -void uip_fw_default(struct uip_fw_netif *netif); -void uip_fw_periodic(void); - - -/** - * A non-error message that indicates that a packet should be - * processed locally. - * - * \hideinitializer - */ -#define UIP_FW_LOCAL 0 - -/** - * A non-error message that indicates that something went OK. - * - * \hideinitializer - */ -#define UIP_FW_OK 0 - -/** - * A non-error message that indicates that a packet was forwarded. - * - * \hideinitializer - */ -#define UIP_FW_FORWARDED 1 - -/** - * A non-error message that indicates that a zero-length packet - * transmission was attempted, and that no packet was sent. - * - * \hideinitializer - */ -#define UIP_FW_ZEROLEN 2 - -/** - * An error message that indicates that a packet that was too large - * for the outbound network interface was detected. - * - * \hideinitializer - */ -#define UIP_FW_TOOLARGE 3 - -/** - * An error message that indicates that no suitable interface could be - * found for an outbound packet. - * - * \hideinitializer - */ -#define UIP_FW_NOROUTE 4 - -/** - * An error message that indicates that a packet that should be - * forwarded or output was dropped. - * - * \hideinitializer - */ -#define UIP_FW_DROPPED 5 - - -#endif /* __UIP_FW_H__ */ - -/** @} */
--- a/libs/Network/uip/uip/uip-neighbor.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,164 +0,0 @@ -#pragma GCC diagnostic ignored "-Wredundant-decls" -#pragma GCC diagnostic ignored "-Wstrict-aliasing" -#pragma GCC diagnostic ignored "-Wcast-align" -#pragma GCC diagnostic ignored "-Wcast-qual" - -/* - * Copyright (c) 2006, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: uip-neighbor.c,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ - -/** - * \file - * Database of link-local neighbors, used by IPv6 code and - * to be used by a future ARP code rewrite. - * \author - * Adam Dunkels <adam@sics.se> - */ - -#include "uip-neighbor.h" - -#include "stdio.h" -#include <string.h> - -#define MAX_TIME 128 - -#ifdef UIP_NEIGHBOR_CONF_ENTRIES -#define ENTRIES UIP_NEIGHBOR_CONF_ENTRIES -#else /* UIP_NEIGHBOR_CONF_ENTRIES */ -#define ENTRIES 8 -#endif /* UIP_NEIGHBOR_CONF_ENTRIES */ - -struct neighbor_entry { - uip_ipaddr_t ipaddr; - struct uip_neighbor_addr addr; - u8_t time; -}; -static struct neighbor_entry entries[ENTRIES]; - -/*---------------------------------------------------------------------------*/ -void -uip_neighbor_init(void) -{ - int i; - - for(i = 0; i < ENTRIES; ++i) { - entries[i].time = MAX_TIME; - } -} -/*---------------------------------------------------------------------------*/ -void -uip_neighbor_periodic(void) -{ - int i; - - for(i = 0; i < ENTRIES; ++i) { - if(entries[i].time < MAX_TIME) { - entries[i].time++; - } - } -} -/*---------------------------------------------------------------------------*/ -void -uip_neighbor_add(uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr) -{ - int i, oldest; - u8_t oldest_time; - - printf("Adding neighbor with link address %02x:%02x:%02x:%02x:%02x:%02x\n", - addr->addr.addr[0], addr->addr.addr[1], addr->addr.addr[2], addr->addr.addr[3], - addr->addr.addr[4], addr->addr.addr[5]); - - /* Find the first unused entry or the oldest used entry. */ - oldest_time = 0; - oldest = 0; - for(i = 0; i < ENTRIES; ++i) { - if(entries[i].time == MAX_TIME) { - oldest = i; - break; - } - if(uip_ipaddr_cmp(entries[i].ipaddr, addr)) { - oldest = i; - break; - } - if(entries[i].time > oldest_time) { - oldest = i; - oldest_time = entries[i].time; - } - } - - /* Use the oldest or first free entry (either pointed to by the - "oldest" variable). */ - entries[oldest].time = 0; - uip_ipaddr_copy(entries[oldest].ipaddr, ipaddr); - memcpy(&entries[oldest].addr, addr, sizeof(struct uip_neighbor_addr)); -} -/*---------------------------------------------------------------------------*/ -static struct neighbor_entry * -find_entry(uip_ipaddr_t ipaddr) -{ - int i; - - for(i = 0; i < ENTRIES; ++i) { - if(uip_ipaddr_cmp(entries[i].ipaddr, ipaddr)) { - return &entries[i]; - } - } - return NULL; -} -/*---------------------------------------------------------------------------*/ -void -uip_neighbor_update(uip_ipaddr_t ipaddr) -{ - struct neighbor_entry *e; - - e = find_entry(ipaddr); - if(e != NULL) { - e->time = 0; - } -} -/*---------------------------------------------------------------------------*/ -struct uip_neighbor_addr * -uip_neighbor_lookup(uip_ipaddr_t ipaddr) -{ - struct neighbor_entry *e; - - e = find_entry(ipaddr); - if(e != NULL) { - /* printf("Lookup neighbor with link address %02x:%02x:%02x:%02x:%02x:%02x\n", - e->addr.addr.addr[0], e->addr.addr.addr[1], e->addr.addr.addr[2], e->addr.addr.addr[3], - e->addr.addr.addr[4], e->addr.addr.addr[5]);*/ - - return &e->addr; - } - return NULL; -} -/*---------------------------------------------------------------------------*/
--- a/libs/Network/uip/uip/uip-neighbor.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2006, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: uip-neighbor.h,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ - -/** - * \file - * Header file for database of link-local neighbors, used by - * IPv6 code and to be used by future ARP code. - * \author - * Adam Dunkels <adam@sics.se> - */ - -#ifndef __UIP_NEIGHBOR_H__ -#define __UIP_NEIGHBOR_H__ - -#include "uip.h" - -struct uip_neighbor_addr { -#if UIP_NEIGHBOR_CONF_ADDRTYPE - UIP_NEIGHBOR_CONF_ADDRTYPE addr; -#else - struct uip_eth_addr addr; -#endif -}; - -void uip_neighbor_init(void); -void uip_neighbor_add(uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr); -void uip_neighbor_update(uip_ipaddr_t ipaddr); -struct uip_neighbor_addr *uip_neighbor_lookup(uip_ipaddr_t ipaddr); -void uip_neighbor_periodic(void); - -#endif /* __UIP-NEIGHBOR_H__ */
--- a/libs/Network/uip/uip/uip-split.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,152 +0,0 @@ -//#pragma GCC diagnostic ignored "-Wredundant-decls" -#pragma GCC diagnostic ignored "-Wstrict-aliasing" -#pragma GCC diagnostic ignored "-Wcast-align" -#pragma GCC diagnostic ignored "-Wcast-qual" - -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: uip-split.c,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ - -#include "stdio.h" -#include <string.h> - -#include "uip-split.h" -#include "uip.h" -//#include "uip-fw.h" -//#include "uip_arch.h" - -void uip_add32(u8_t *op32, u16_t op16); -void tcpip_output(); - -#define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN]) - -#ifdef UIP_SPLIT_CONF_SIZE -#define UIP_SPLIT_SIZE UIP_SPLIT_CONF_SIZE -#else /* UIP_SPLIT_CONF_SIZE */ -#define UIP_SPLIT_SIZE UIP_TCP_MSS -#endif /* UIP_SPLIT_CONF_SIZE */ - -/*-----------------------------------------------------------------------------*/ -void uip_split_output(void) -{ - u16_t tcplen, len1, len2; - - - /* We only try to split maximum sized TCP segments. */ - if (BUF->proto == UIP_PROTO_TCP && - uip_len >= UIP_SPLIT_SIZE + UIP_TCPIP_HLEN) { - - tcplen = uip_len - UIP_TCPIP_HLEN - UIP_LLH_LEN; - /* Split the segment in two. If the original packet length was - odd, we make the second packet one byte larger. */ - len1 = len2 = tcplen / 2; - if (len1 + len2 < tcplen) { - ++len2; - } - - /* Create the first packet. This is done by altering the length - field of the IP header and updating the checksums. */ - uip_len = len1 + UIP_TCPIP_HLEN; -#if UIP_CONF_IPV6 - /* For IPv6, the IP length field does not include the IPv6 IP header - length. */ - BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8); - BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff); -#else /* UIP_CONF_IPV6 */ - BUF->len[0] = uip_len >> 8; - BUF->len[1] = uip_len & 0xff; -#endif /* UIP_CONF_IPV6 */ - - /* Recalculate the TCP checksum. */ - BUF->tcpchksum = 0; - BUF->tcpchksum = ~(uip_tcpchksum()); - -#if !UIP_CONF_IPV6 - /* Recalculate the IP checksum. */ - BUF->ipchksum = 0; - BUF->ipchksum = ~(uip_ipchksum()); -#endif /* UIP_CONF_IPV6 */ - - uip_len += UIP_LLH_LEN; - - /* Transmit the first packet. */ - /* uip_fw_output();*/ - tcpip_output(); - - /* Now, create the second packet. To do this, it is not enough to - just alter the length field, but we must also update the TCP - sequence number and point the uip_appdata to a new place in - memory. This place is detemined by the length of the first - packet (len1). */ - uip_len = len2 + UIP_TCPIP_HLEN; -#if UIP_CONF_IPV6 - /* For IPv6, the IP length field does not include the IPv6 IP header - length. */ - BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8); - BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff); -#else /* UIP_CONF_IPV6 */ - BUF->len[0] = uip_len >> 8; - BUF->len[1] = uip_len & 0xff; -#endif /* UIP_CONF_IPV6 */ - - /* uip_appdata += len1;*/ - memcpy(uip_appdata, (u8_t *)uip_appdata + len1, len2); - - uip_add32(BUF->seqno, len1); - BUF->seqno[0] = uip_acc32[0]; - BUF->seqno[1] = uip_acc32[1]; - BUF->seqno[2] = uip_acc32[2]; - BUF->seqno[3] = uip_acc32[3]; - - /* Recalculate the TCP checksum. */ - BUF->tcpchksum = 0; - BUF->tcpchksum = ~(uip_tcpchksum()); - -#if !UIP_CONF_IPV6 - /* Recalculate the IP checksum. */ - BUF->ipchksum = 0; - BUF->ipchksum = ~(uip_ipchksum()); -#endif /* UIP_CONF_IPV6 */ - - uip_len += UIP_LLH_LEN; - /* Transmit the second packet. */ - /* uip_fw_output();*/ - tcpip_output(); - } else { - /* uip_fw_output();*/ - tcpip_output(); - } - -} -/*-----------------------------------------------------------------------------*/
--- a/libs/Network/uip/uip/uip-split.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,96 +0,0 @@ -/* - * Copyright (c) 2004, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: uip-split.h,v 1.2 2006/06/12 08:00:30 adam Exp $ - */ -/** - * \addtogroup uip - * @{ - */ - -/** - * \defgroup uipsplit uIP TCP throughput booster hack - * @{ - * - * The basic uIP TCP implementation only allows each TCP connection to - * have a single TCP segment in flight at any given time. Because of - * the delayed ACK algorithm employed by most TCP receivers, uIP's - * limit on the amount of in-flight TCP segments seriously reduces the - * maximum achievable throughput for sending data from uIP. - * - * The uip-split module is a hack which tries to remedy this - * situation. By splitting maximum sized outgoing TCP segments into - * two, the delayed ACK algorithm is not invoked at TCP - * receivers. This improves the throughput when sending data from uIP - * by orders of magnitude. - * - * The uip-split module uses the uip-fw module (uIP IP packet - * forwarding) for sending packets. Therefore, the uip-fw module must - * be set up with the appropriate network interfaces for this module - * to work. - */ - - -/** - * \file - * Module for splitting outbound TCP segments in two to avoid the - * delayed ACK throughput degradation. - * \author - * Adam Dunkels <adam@sics.se> - * - */ - -#ifndef __UIP_SPLIT_H__ -#define __UIP_SPLIT_H__ - -/** - * Handle outgoing packets. - * - * This function inspects an outgoing packet in the uip_buf buffer and - * sends it out using the uip_fw_output() function. If the packet is a - * full-sized TCP segment it will be split into two segments and - * transmitted separately. This function should be called instead of - * the actual device driver output function, or the uip_fw_output() - * function. - * - * The headers of the outgoing packet is assumed to be in the uip_buf - * buffer and the payload is assumed to be wherever uip_appdata - * points. The length of the outgoing packet is assumed to be in the - * uip_len variable. - * - */ -void uip_split_output(void); - -#endif /* __UIP_SPLIT_H__ */ - -/** @} */ -/** @} */
--- a/libs/Network/uip/uip/uip.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1923 +0,0 @@ -#pragma GCC diagnostic ignored "-Wredundant-decls" -#pragma GCC diagnostic ignored "-Wstrict-aliasing" -#pragma GCC diagnostic ignored "-Wcast-align" -#pragma GCC diagnostic ignored "-Wcast-qual" - -#define DEBUG_PRINTF(...) -//printf(__VA_ARGS__) - -/** - * \defgroup uip The uIP TCP/IP stack - * @{ - * - * uIP is an implementation of the TCP/IP protocol stack intended for - * small 8-bit and 16-bit microcontrollers. - * - * uIP provides the necessary protocols for Internet communication, - * with a very small code footprint and RAM requirements - the uIP - * code size is on the order of a few kilobytes and RAM usage is on - * the order of a few hundred bytes. - */ - -/** - * \file - * The uIP TCP/IP stack code. - * \author Adam Dunkels <adam@dunkels.com> - */ - -/* - * Copyright (c) 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack. - * - * $Id: uip.c,v 1.65 2006/06/11 21:46:39 adam Exp $ - * - */ - -/* - * uIP is a small implementation of the IP, UDP and TCP protocols (as - * well as some basic ICMP stuff). The implementation couples the IP, - * UDP, TCP and the application layers very tightly. To keep the size - * of the compiled code down, this code frequently uses the goto - * statement. While it would be possible to break the uip_process() - * function into many smaller functions, this would increase the code - * size because of the overhead of parameter passing and the fact that - * the optimier would not be as efficient. - * - * The principle is that we have a small buffer, called the uip_buf, - * in which the device driver puts an incoming packet. The TCP/IP - * stack parses the headers in the packet, and calls the - * application. If the remote host has sent data to the application, - * this data is present in the uip_buf and the application read the - * data from there. It is up to the application to put this data into - * a byte stream if needed. The application will not be fed with data - * that is out of sequence. - * - * If the application whishes to send data to the peer, it should put - * its data into the uip_buf. The uip_appdata pointer points to the - * first available byte. The TCP/IP stack will calculate the - * checksums, and fill in the necessary header fields and finally send - * the packet back to the peer. -*/ - -#include "uip.h" -#include "uipopt.h" -#include "uip_arch.h" - -#if UIP_CONF_IPV6 -#include "uip-neighbor.h" -#endif /* UIP_CONF_IPV6 */ - -#include <string.h> - -/*---------------------------------------------------------------------------*/ -/* Variable definitions. */ - - -/* The IP address of this host. If it is defined to be fixed (by - setting UIP_FIXEDADDR to 1 in uipopt.h), the address is set - here. Otherwise, the address */ -#if UIP_FIXEDADDR > 0 -const uip_ipaddr_t uip_hostaddr = { - HTONS((UIP_IPADDR0 << 8) | UIP_IPADDR1), - HTONS((UIP_IPADDR2 << 8) | UIP_IPADDR3) -}; -const uip_ipaddr_t uip_draddr = { - HTONS((UIP_DRIPADDR0 << 8) | UIP_DRIPADDR1), - HTONS((UIP_DRIPADDR2 << 8) | UIP_DRIPADDR3) -}; -const uip_ipaddr_t uip_netmask = { - HTONS((UIP_NETMASK0 << 8) | UIP_NETMASK1), - HTONS((UIP_NETMASK2 << 8) | UIP_NETMASK3) -}; -#else -uip_ipaddr_t uip_hostaddr, uip_draddr, uip_netmask; -#endif /* UIP_FIXEDADDR */ - -static const uip_ipaddr_t all_ones_addr = -#if UIP_CONF_IPV6 -{0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff}; -#else /* UIP_CONF_IPV6 */ - { - 0xffff, 0xffff - }; -#endif /* UIP_CONF_IPV6 */ -static const uip_ipaddr_t all_zeroes_addr = -#if UIP_CONF_IPV6 -{0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000}; -#else /* UIP_CONF_IPV6 */ - { - 0x0000, 0x0000 - }; -#endif /* UIP_CONF_IPV6 */ - - -#if UIP_FIXEDETHADDR -const struct uip_eth_addr uip_ethaddr = {{ - UIP_ETHADDR0, - UIP_ETHADDR1, - UIP_ETHADDR2, - UIP_ETHADDR3, - UIP_ETHADDR4, - UIP_ETHADDR5 - } -}; -#else -struct uip_eth_addr uip_ethaddr = {{0, 0, 0, 0, 0, 0}}; -#endif - -#ifndef UIP_CONF_EXTERNAL_BUFFER -u8_t uip_buf[UIP_BUFSIZE + 2] __attribute__ ((section ("AHBSRAM1"))); /* The packet buffer that contains - incoming packets. */ -#endif /* UIP_CONF_EXTERNAL_BUFFER */ - -void *uip_appdata; /* The uip_appdata pointer points to - application data. */ -void *uip_sappdata; /* The uip_appdata pointer points to - the application data which is to - be sent. */ -#if UIP_URGDATA > 0 -void *uip_urgdata; /* The uip_urgdata pointer points to - urgent data (out-of-band data), if - present. */ -u16_t uip_urglen, uip_surglen; -#endif /* UIP_URGDATA > 0 */ - -u16_t uip_len, uip_slen; -/* The uip_len is either 8 or 16 bits, -depending on the maximum packet - size. */ - -u8_t uip_flags; /* The uip_flags variable is used for - communication between the TCP/IP stack - and the application program. */ -struct uip_conn *uip_conn; /* uip_conn always points to the current - connection. */ - -struct uip_conn uip_conns[UIP_CONNS] __attribute__ ((section ("AHBSRAM1"))); -/* The uip_conns array holds all TCP -connections. */ -u16_t uip_listenports[UIP_LISTENPORTS] __attribute__ ((section ("AHBSRAM1"))); -/* The uip_listenports list all currently -listning ports. */ -#if UIP_UDP -struct uip_udp_conn *uip_udp_conn; -struct uip_udp_conn uip_udp_conns[UIP_UDP_CONNS] __attribute__ ((section ("AHBSRAM1"))); -#endif /* UIP_UDP */ - -static u16_t ipid; /* Ths ipid variable is an increasing - number that is used for the IP ID - field. */ - -void uip_setipid(u16_t id) -{ - ipid = id; -} - -static u8_t iss[4]; /* The iss variable is used for the TCP - initial sequence number. */ - -#if UIP_ACTIVE_OPEN -static u16_t lastport; /* Keeps track of the last port used for - a new connection. */ -#endif /* UIP_ACTIVE_OPEN */ - -/* Temporary variables. */ -u8_t uip_acc32[4]; -static u8_t c, opt; -static u16_t tmp16; - -/* Structures and definitions. */ -#define TCP_FIN 0x01 -#define TCP_SYN 0x02 -#define TCP_RST 0x04 -#define TCP_PSH 0x08 -#define TCP_ACK 0x10 -#define TCP_URG 0x20 -#define TCP_CTL 0x3f - -#define TCP_OPT_END 0 /* End of TCP options list */ -#define TCP_OPT_NOOP 1 /* "No-operation" TCP option */ -#define TCP_OPT_MSS 2 /* Maximum segment size TCP option */ - -#define TCP_OPT_MSS_LEN 4 /* Length of TCP MSS option. */ - -#define ICMP_ECHO_REPLY 0 -#define ICMP_ECHO 8 - -#define ICMP6_ECHO_REPLY 129 -#define ICMP6_ECHO 128 -#define ICMP6_NEIGHBOR_SOLICITATION 135 -#define ICMP6_NEIGHBOR_ADVERTISEMENT 136 - -#define ICMP6_FLAG_S (1 << 6) - -#define ICMP6_OPTION_SOURCE_LINK_ADDRESS 1 -#define ICMP6_OPTION_TARGET_LINK_ADDRESS 2 - - -/* Macros. */ -#define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN]) -#define FBUF ((struct uip_tcpip_hdr *)&uip_reassbuf[0]) -#define ICMPBUF ((struct uip_icmpip_hdr *)&uip_buf[UIP_LLH_LEN]) -#define UDPBUF ((struct uip_udpip_hdr *)&uip_buf[UIP_LLH_LEN]) - - -#if UIP_STATISTICS == 1 -struct uip_stats uip_stat; -#define UIP_STAT(s) s -#else -#define UIP_STAT(s) -#endif /* UIP_STATISTICS == 1 */ - -#if UIP_LOGGING == 1 -void uip_log(char *msg); -#define UIP_LOG(m) uip_log(m) -#else -#define UIP_LOG(m) -#endif /* UIP_LOGGING == 1 */ - -#if ! UIP_ARCH_ADD32 -void -uip_add32(u8_t *op32, u16_t op16) -{ - uip_acc32[3] = op32[3] + (op16 & 0xff); - uip_acc32[2] = op32[2] + (op16 >> 8); - uip_acc32[1] = op32[1]; - uip_acc32[0] = op32[0]; - - if (uip_acc32[2] < (op16 >> 8)) { - ++uip_acc32[1]; - if (uip_acc32[1] == 0) { - ++uip_acc32[0]; - } - } - - - if (uip_acc32[3] < (op16 & 0xff)) { - ++uip_acc32[2]; - if (uip_acc32[2] == 0) { - ++uip_acc32[1]; - if (uip_acc32[1] == 0) { - ++uip_acc32[0]; - } - } - } -} - -#endif /* UIP_ARCH_ADD32 */ - -#if ! UIP_ARCH_CHKSUM -/*---------------------------------------------------------------------------*/ -static u16_t -chksum(u16_t sum, const u8_t *data, u16_t len) -{ - u16_t t; - const u8_t *dataptr; - const u8_t *last_byte; - - dataptr = data; - last_byte = data + len - 1; - - while (dataptr < last_byte) { /* At least two more bytes */ - t = (dataptr[0] << 8) + dataptr[1]; - sum += t; - if (sum < t) { - sum++; /* carry */ - } - dataptr += 2; - } - - if (dataptr == last_byte) { - t = (dataptr[0] << 8) + 0; - sum += t; - if (sum < t) { - sum++; /* carry */ - } - } - - /* Return sum in host byte order. */ - return sum; -} -/*---------------------------------------------------------------------------*/ -u16_t -uip_chksum(u16_t *data, u16_t len) -{ - return htons(chksum(0, (u8_t *)data, len)); -} -/*---------------------------------------------------------------------------*/ -#ifndef UIP_ARCH_IPCHKSUM -u16_t -uip_ipchksum(void) -{ - u16_t sum; - - sum = chksum(0, &uip_buf[UIP_LLH_LEN], UIP_IPH_LEN); - DEBUG_PRINTF("uip_ipchksum: sum 0x%04x\n", sum); - return (sum == 0) ? 0xffff : htons(sum); -} -#endif -/*---------------------------------------------------------------------------*/ -static u16_t -upper_layer_chksum(u8_t proto) -{ - u16_t upper_layer_len; - u16_t sum; - -#if UIP_CONF_IPV6 - upper_layer_len = (((u16_t)(BUF->len[0]) << 8) + BUF->len[1]); -#else /* UIP_CONF_IPV6 */ - upper_layer_len = (((u16_t)(BUF->len[0]) << 8) + BUF->len[1]) - UIP_IPH_LEN; -#endif /* UIP_CONF_IPV6 */ - - /* First sum pseudoheader. */ - - /* IP protocol and length fields. This addition cannot carry. */ - sum = upper_layer_len + proto; - /* Sum IP source and destination addresses. */ - sum = chksum(sum, (u8_t *)&BUF->srcipaddr[0], 2 * sizeof(uip_ipaddr_t)); - - /* Sum TCP header and data. */ - sum = chksum(sum, &uip_buf[UIP_IPH_LEN + UIP_LLH_LEN], - upper_layer_len); - - return (sum == 0) ? 0xffff : htons(sum); -} -/*---------------------------------------------------------------------------*/ -#if UIP_CONF_IPV6 -u16_t -uip_icmp6chksum(void) -{ - return upper_layer_chksum(UIP_PROTO_ICMP6); - -} -#endif /* UIP_CONF_IPV6 */ -/*---------------------------------------------------------------------------*/ -u16_t -uip_tcpchksum(void) -{ - return upper_layer_chksum(UIP_PROTO_TCP); -} -/*---------------------------------------------------------------------------*/ -#if UIP_UDP_CHECKSUMS -u16_t -uip_udpchksum(void) -{ - return upper_layer_chksum(UIP_PROTO_UDP); -} -#endif /* UIP_UDP_CHECKSUMS */ -#endif /* UIP_ARCH_CHKSUM */ -/*---------------------------------------------------------------------------*/ -void -uip_init(void) -{ - DEBUG_PRINTF("In uip_init\n"); - - for (c = 0; c < UIP_LISTENPORTS; ++c) { - uip_listenports[c] = 0; - } - for (c = 0; c < UIP_CONNS; ++c) { - uip_conns[c].tcpstateflags = UIP_CLOSED; - } -#if UIP_ACTIVE_OPEN - lastport = 1024; -#endif /* UIP_ACTIVE_OPEN */ - -#if UIP_UDP - for (c = 0; c < UIP_UDP_CONNS; ++c) { - uip_udp_conns[c].lport = 0; - } -#endif /* UIP_UDP */ - - - /* IPv4 initialization. */ -#if UIP_FIXEDADDR == 0 - /* uip_hostaddr[0] = uip_hostaddr[1] = 0;*/ -#endif /* UIP_FIXEDADDR */ - -} -/*---------------------------------------------------------------------------*/ -#if UIP_ACTIVE_OPEN -struct uip_conn * -uip_connect(uip_ipaddr_t *ripaddr, u16_t rport) -{ - register struct uip_conn *conn, *cconn; - - /* Find an unused local port. */ -again: - ++lastport; - - if (lastport >= 32000) { - lastport = 4096; - } - - /* Check if this port is already in use, and if so try to find - another one. */ - for (c = 0; c < UIP_CONNS; ++c) { - conn = &uip_conns[c]; - if (conn->tcpstateflags != UIP_CLOSED && - conn->lport == htons(lastport)) { - goto again; - } - } - - conn = 0; - for (c = 0; c < UIP_CONNS; ++c) { - cconn = &uip_conns[c]; - if (cconn->tcpstateflags == UIP_CLOSED) { - conn = cconn; - break; - } - if (cconn->tcpstateflags == UIP_TIME_WAIT) { - if (conn == 0 || - cconn->timer > conn->timer) { - conn = cconn; - } - } - } - - if (conn == 0) { - return 0; - } - - conn->tcpstateflags = UIP_SYN_SENT; - - conn->snd_nxt[0] = iss[0]; - conn->snd_nxt[1] = iss[1]; - conn->snd_nxt[2] = iss[2]; - conn->snd_nxt[3] = iss[3]; - - conn->initialmss = conn->mss = UIP_TCP_MSS; - - conn->len = 1; /* TCP length of the SYN is one. */ - conn->nrtx = 0; - conn->timer = 1; /* Send the SYN next time around. */ - conn->rto = UIP_RTO; - conn->sa = 0; - conn->sv = 16; /* Initial value of the RTT variance. */ - conn->lport = htons(lastport); - conn->rport = rport; - uip_ipaddr_copy(&conn->ripaddr, ripaddr); - - return conn; -} -#endif /* UIP_ACTIVE_OPEN */ -/*---------------------------------------------------------------------------*/ -#if UIP_UDP -struct uip_udp_conn * -uip_udp_new(uip_ipaddr_t *ripaddr, u16_t rport) -{ - register struct uip_udp_conn *conn; - - /* Find an unused local port. */ -again: - ++lastport; - - if (lastport >= 32000) { - lastport = 4096; - } - - for (c = 0; c < UIP_UDP_CONNS; ++c) { - if (uip_udp_conns[c].lport == htons(lastport)) { - goto again; - } - } - - - conn = 0; - for (c = 0; c < UIP_UDP_CONNS; ++c) { - if (uip_udp_conns[c].lport == 0) { - conn = &uip_udp_conns[c]; - break; - } - } - - if (conn == 0) { - return 0; - } - - conn->lport = HTONS(lastport); - conn->rport = rport; - if (ripaddr == NULL) { - memset(conn->ripaddr, 0, sizeof(uip_ipaddr_t)); - } else { - uip_ipaddr_copy(&conn->ripaddr, ripaddr); - } - conn->ttl = UIP_TTL; - - return conn; -} -#endif /* UIP_UDP */ -/*---------------------------------------------------------------------------*/ -void -uip_unlisten(u16_t port) -{ - for (c = 0; c < UIP_LISTENPORTS; ++c) { - if (uip_listenports[c] == port) { - uip_listenports[c] = 0; - return; - } - } -} -/*---------------------------------------------------------------------------*/ -void -uip_listen(u16_t port) -{ - for (c = 0; c < UIP_LISTENPORTS; ++c) { - if (uip_listenports[c] == 0) { - uip_listenports[c] = port; - return; - } - } -} -/*---------------------------------------------------------------------------*/ -/* XXX: IP fragment reassembly: not well-tested. */ - -#if UIP_REASSEMBLY && !UIP_CONF_IPV6 -#define UIP_REASS_BUFSIZE (UIP_BUFSIZE - UIP_LLH_LEN) -static u8_t uip_reassbuf[UIP_REASS_BUFSIZE]; -static u8_t uip_reassbitmap[UIP_REASS_BUFSIZE / (8 * 8)]; -static const u8_t bitmap_bits[8] = {0xff, 0x7f, 0x3f, 0x1f, - 0x0f, 0x07, 0x03, 0x01 - }; -static u16_t uip_reasslen; -static u8_t uip_reassflags; -#define UIP_REASS_FLAG_LASTFRAG 0x01 -static u8_t uip_reasstmr; - -#define IP_MF 0x20 - -static u8_t -uip_reass(void) -{ - u16_t offset, len; - u16_t i; - - /* If ip_reasstmr is zero, no packet is present in the buffer, so we - write the IP header of the fragment into the reassembly - buffer. The timer is updated with the maximum age. */ - if (uip_reasstmr == 0) { - memcpy(uip_reassbuf, &BUF->vhl, UIP_IPH_LEN); - uip_reasstmr = UIP_REASS_MAXAGE; - uip_reassflags = 0; - /* Clear the bitmap. */ - memset(uip_reassbitmap, 0, sizeof(uip_reassbitmap)); - } - - /* Check if the incoming fragment matches the one currently present - in the reasembly buffer. If so, we proceed with copying the - fragment into the buffer. */ - if (BUF->srcipaddr[0] == FBUF->srcipaddr[0] && - BUF->srcipaddr[1] == FBUF->srcipaddr[1] && - BUF->destipaddr[0] == FBUF->destipaddr[0] && - BUF->destipaddr[1] == FBUF->destipaddr[1] && - BUF->ipid[0] == FBUF->ipid[0] && - BUF->ipid[1] == FBUF->ipid[1]) { - - len = (BUF->len[0] << 8) + BUF->len[1] - (BUF->vhl & 0x0f) * 4; - offset = (((BUF->ipoffset[0] & 0x3f) << 8) + BUF->ipoffset[1]) * 8; - - /* If the offset or the offset + fragment length overflows the - reassembly buffer, we discard the entire packet. */ - if (offset > UIP_REASS_BUFSIZE || - offset + len > UIP_REASS_BUFSIZE) { - uip_reasstmr = 0; - goto nullreturn; - } - - /* Copy the fragment into the reassembly buffer, at the right - offset. */ - memcpy(&uip_reassbuf[UIP_IPH_LEN + offset], - (char *)BUF + (int)((BUF->vhl & 0x0f) * 4), - len); - - /* Update the bitmap. */ - if (offset / (8 * 8) == (offset + len) / (8 * 8)) { - /* If the two endpoints are in the same byte, we only update - that byte. */ - - uip_reassbitmap[offset / (8 * 8)] |= - bitmap_bits[(offset / 8 ) & 7] & - ~bitmap_bits[((offset + len) / 8 ) & 7]; - } else { - /* If the two endpoints are in different bytes, we update the - bytes in the endpoints and fill the stuff inbetween with - 0xff. */ - uip_reassbitmap[offset / (8 * 8)] |= - bitmap_bits[(offset / 8 ) & 7]; - for (i = 1 + offset / (8 * 8); i < (offset + len) / (8 * 8); ++i) { - uip_reassbitmap[i] = 0xff; - } - uip_reassbitmap[(offset + len) / (8 * 8)] |= - ~bitmap_bits[((offset + len) / 8 ) & 7]; - } - - /* If this fragment has the More Fragments flag set to zero, we - know that this is the last fragment, so we can calculate the - size of the entire packet. We also set the - IP_REASS_FLAG_LASTFRAG flag to indicate that we have received - the final fragment. */ - - if ((BUF->ipoffset[0] & IP_MF) == 0) { - uip_reassflags |= UIP_REASS_FLAG_LASTFRAG; - uip_reasslen = offset + len; - } - - /* Finally, we check if we have a full packet in the buffer. We do - this by checking if we have the last fragment and if all bits - in the bitmap are set. */ - if (uip_reassflags & UIP_REASS_FLAG_LASTFRAG) { - /* Check all bytes up to and including all but the last byte in - the bitmap. */ - for (i = 0; i < uip_reasslen / (8 * 8) - 1; ++i) { - if (uip_reassbitmap[i] != 0xff) { - goto nullreturn; - } - } - /* Check the last byte in the bitmap. It should contain just the - right amount of bits. */ - if (uip_reassbitmap[uip_reasslen / (8 * 8)] != - (u8_t)~bitmap_bits[uip_reasslen / 8 & 7]) { - goto nullreturn; - } - - /* If we have come this far, we have a full packet in the - buffer, so we allocate a pbuf and copy the packet into it. We - also reset the timer. */ - uip_reasstmr = 0; - memcpy(BUF, FBUF, uip_reasslen); - - /* Pretend to be a "normal" (i.e., not fragmented) IP packet - from now on. */ - BUF->ipoffset[0] = BUF->ipoffset[1] = 0; - BUF->len[0] = uip_reasslen >> 8; - BUF->len[1] = uip_reasslen & 0xff; - BUF->ipchksum = 0; - BUF->ipchksum = ~(uip_ipchksum()); - - return uip_reasslen; - } - } - -nullreturn: - return 0; -} -#endif /* UIP_REASSEMBLY */ -/*---------------------------------------------------------------------------*/ -static void -uip_add_rcv_nxt(u16_t n) -{ - uip_add32(uip_conn->rcv_nxt, n); - uip_conn->rcv_nxt[0] = uip_acc32[0]; - uip_conn->rcv_nxt[1] = uip_acc32[1]; - uip_conn->rcv_nxt[2] = uip_acc32[2]; - uip_conn->rcv_nxt[3] = uip_acc32[3]; -} -/*---------------------------------------------------------------------------*/ -void -uip_process(u8_t flag) -{ - register struct uip_conn *uip_connr = uip_conn; - -#if UIP_UDP - if (flag == UIP_UDP_SEND_CONN) { - goto udp_send; - } -#endif /* UIP_UDP */ - - uip_sappdata = uip_appdata = &uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN]; - - /* Check if we were invoked because of a poll request for a - particular connection. */ - if (flag == UIP_POLL_REQUEST) { - if ((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_ESTABLISHED && - !uip_outstanding(uip_connr)) { - uip_flags = UIP_POLL; - UIP_APPCALL(); - goto appsend; - } - goto drop; - - /* Check if we were invoked because of the perodic timer fireing. */ - } else if (flag == UIP_TIMER) { -#if UIP_REASSEMBLY - if (uip_reasstmr != 0) { - --uip_reasstmr; - } -#endif /* UIP_REASSEMBLY */ - /* Increase the initial sequence number. */ - if (++iss[3] == 0) { - if (++iss[2] == 0) { - if (++iss[1] == 0) { - ++iss[0]; - } - } - } - - /* Reset the length variables. */ - uip_len = 0; - uip_slen = 0; - - /* Check if the connection is in a state in which we simply wait - for the connection to time out. If so, we increase the - connection's timer and remove the connection if it times - out. */ - if (uip_connr->tcpstateflags == UIP_TIME_WAIT || - uip_connr->tcpstateflags == UIP_FIN_WAIT_2) { - ++(uip_connr->timer); - if (uip_connr->timer == UIP_TIME_WAIT_TIMEOUT) { - uip_connr->tcpstateflags = UIP_CLOSED; - } - } else if (uip_connr->tcpstateflags != UIP_CLOSED) { - /* If the connection has outstanding data, we increase the - connection's timer and see if it has reached the RTO value - in which case we retransmit. */ - if (uip_outstanding(uip_connr)) { - if (uip_connr->timer-- == 0) { - if (uip_connr->nrtx == UIP_MAXRTX || - ((uip_connr->tcpstateflags == UIP_SYN_SENT || - uip_connr->tcpstateflags == UIP_SYN_RCVD) && - uip_connr->nrtx == UIP_MAXSYNRTX)) { - uip_connr->tcpstateflags = UIP_CLOSED; - - /* We call UIP_APPCALL() with uip_flags set to - UIP_TIMEDOUT to inform the application that the - connection has timed out. */ - uip_flags = UIP_TIMEDOUT; - UIP_APPCALL(); - - /* We also send a reset packet to the remote host. */ - BUF->flags = TCP_RST | TCP_ACK; - goto tcp_send_nodata; - } - - /* Exponential backoff. */ - uip_connr->timer = UIP_RTO << (uip_connr->nrtx > 4 ? - 4 : - uip_connr->nrtx); - ++(uip_connr->nrtx); - - /* Ok, so we need to retransmit. We do this differently - depending on which state we are in. In ESTABLISHED, we - call upon the application so that it may prepare the - data for the retransmit. In SYN_RCVD, we resend the - SYNACK that we sent earlier and in LAST_ACK we have to - retransmit our FINACK. */ - UIP_STAT(++uip_stat.tcp.rexmit); - switch (uip_connr->tcpstateflags & UIP_TS_MASK) { - case UIP_SYN_RCVD: - /* In the SYN_RCVD state, we should retransmit our - SYNACK. */ - goto tcp_send_synack; - -#if UIP_ACTIVE_OPEN - case UIP_SYN_SENT: - /* In the SYN_SENT state, we retransmit out SYN. */ - BUF->flags = 0; - goto tcp_send_syn; -#endif /* UIP_ACTIVE_OPEN */ - - case UIP_ESTABLISHED: - /* In the ESTABLISHED state, we call upon the application - to do the actual retransmit after which we jump into - the code for sending out the packet (the apprexmit - label). */ - uip_flags = UIP_REXMIT; - UIP_APPCALL(); - goto apprexmit; - - case UIP_FIN_WAIT_1: - case UIP_CLOSING: - case UIP_LAST_ACK: - /* In all these states we should retransmit a FINACK. */ - goto tcp_send_finack; - - } - } - } else if ((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_ESTABLISHED) { - /* If there was no need for a retransmission, we poll the - application for new data. */ - uip_flags = UIP_POLL; - UIP_APPCALL(); - goto appsend; - } - } - goto drop; - } -#if UIP_UDP - if (flag == UIP_UDP_TIMER) { - if (uip_udp_conn->lport != 0) { - uip_conn = NULL; - uip_sappdata = uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN]; - uip_len = uip_slen = 0; - uip_flags = UIP_POLL; - UIP_UDP_APPCALL(); - goto udp_send; - } else { - goto drop; - } - } -#endif - - /* This is where the input processing starts. */ - UIP_STAT(++uip_stat.ip.recv); - - /* Start of IP input header processing code. */ - -#if UIP_CONF_IPV6 - /* Check validity of the IP header. */ - if ((BUF->vtc & 0xf0) != 0x60) { /* IP version and header length. */ - UIP_STAT(++uip_stat.ip.drop); - UIP_STAT(++uip_stat.ip.vhlerr); - UIP_LOG("ipv6: invalid version."); - goto drop; - } -#else /* UIP_CONF_IPV6 */ - /* Check validity of the IP header. */ - if (BUF->vhl != 0x45) { /* IP version and header length. */ - UIP_STAT(++uip_stat.ip.drop); - UIP_STAT(++uip_stat.ip.vhlerr); - UIP_LOG("ip: invalid version or header length."); - goto drop; - } -#endif /* UIP_CONF_IPV6 */ - - /* Check the size of the packet. If the size reported to us in - uip_len is smaller the size reported in the IP header, we assume - that the packet has been corrupted in transit. If the size of - uip_len is larger than the size reported in the IP packet header, - the packet has been padded and we set uip_len to the correct - value.. */ - - if ((BUF->len[0] << 8) + BUF->len[1] <= uip_len) { - uip_len = (BUF->len[0] << 8) + BUF->len[1]; -#if UIP_CONF_IPV6 - uip_len += 40; /* The length reported in the IPv6 header is the - length of the payload that follows the - header. However, uIP uses the uip_len variable - for holding the size of the entire packet, - including the IP header. For IPv4 this is not a - problem as the length field in the IPv4 header - contains the length of the entire packet. But - for IPv6 we need to add the size of the IPv6 - header (40 bytes). */ -#endif /* UIP_CONF_IPV6 */ - } else { - UIP_LOG("ip: packet shorter than reported in IP header."); - goto drop; - } - -#if !UIP_CONF_IPV6 - /* Check the fragment flag. */ - if ((BUF->ipoffset[0] & 0x3f) != 0 || - BUF->ipoffset[1] != 0) { -#if UIP_REASSEMBLY - uip_len = uip_reass(); - if (uip_len == 0) { - goto drop; - } -#else /* UIP_REASSEMBLY */ - UIP_STAT(++uip_stat.ip.drop); - UIP_STAT(++uip_stat.ip.fragerr); - UIP_LOG("ip: fragment dropped."); - goto drop; -#endif /* UIP_REASSEMBLY */ - } -#endif /* UIP_CONF_IPV6 */ - - if (uip_ipaddr_cmp(uip_hostaddr, all_zeroes_addr)) { - /* If we are configured to use ping IP address configuration and - hasn't been assigned an IP address yet, we accept all ICMP - packets. */ -#if UIP_PINGADDRCONF && !UIP_CONF_IPV6 - if (BUF->proto == UIP_PROTO_ICMP) { - UIP_LOG("ip: possible ping config packet received."); - goto icmp_input; - } else { - UIP_LOG("ip: packet dropped since no address assigned."); - goto drop; - } -#endif /* UIP_PINGADDRCONF */ - - } else { - /* If IP broadcast support is configured, we check for a broadcast - UDP packet, which may be destined to us. */ -#if UIP_BROADCAST - DEBUG_PRINTF("UDP IP checksum 0x%04x\n", uip_ipchksum()); - if (BUF->proto == UIP_PROTO_UDP && - uip_ipaddr_cmp(BUF->destipaddr, all_ones_addr) - /*&& - uip_ipchksum() == 0xffff*/) { - goto udp_input; - } -#endif /* UIP_BROADCAST */ - - /* Check if the packet is destined for our IP address. */ -#if !UIP_CONF_IPV6 - if (!uip_ipaddr_cmp(BUF->destipaddr, uip_hostaddr)) { - UIP_STAT(++uip_stat.ip.drop); - goto drop; - } -#else /* UIP_CONF_IPV6 */ - /* For IPv6, packet reception is a little trickier as we need to - make sure that we listen to certain multicast addresses (all - hosts multicast address, and the solicited-node multicast - address) as well. However, we will cheat here and accept all - multicast packets that are sent to the ff02::/16 addresses. */ - if (!uip_ipaddr_cmp(BUF->destipaddr, uip_hostaddr) && - BUF->destipaddr[0] != HTONS(0xff02)) { - UIP_STAT(++uip_stat.ip.drop); - goto drop; - } -#endif /* UIP_CONF_IPV6 */ - } - -#if !UIP_CONF_IPV6 - if (uip_ipchksum() != 0xffff) { - /* Compute and check the IP header - checksum. */ - UIP_STAT(++uip_stat.ip.drop); - UIP_STAT(++uip_stat.ip.chkerr); - UIP_LOG("ip: bad checksum."); - goto drop; - } -#endif /* UIP_CONF_IPV6 */ - - if (BUF->proto == UIP_PROTO_TCP) { - /* Check for TCP packet. If so, - proceed with TCP input - processing. */ - goto tcp_input; - } - -#if UIP_UDP - if (BUF->proto == UIP_PROTO_UDP) { - goto udp_input; - } -#endif /* UIP_UDP */ - -#if !UIP_CONF_IPV6 - /* ICMPv4 processing code follows. */ - if (BUF->proto != UIP_PROTO_ICMP) { - /* We only allow ICMP packets from - here. */ - UIP_STAT(++uip_stat.ip.drop); - UIP_STAT(++uip_stat.ip.protoerr); - UIP_LOG("ip: neither tcp nor icmp."); - goto drop; - } - -#if UIP_PINGADDRCONF -icmp_input: -#endif /* UIP_PINGADDRCONF */ - UIP_STAT(++uip_stat.icmp.recv); - - /* ICMP echo (i.e., ping) processing. This is simple, we only change - the ICMP type from ECHO to ECHO_REPLY and adjust the ICMP - checksum before we return the packet. */ - if (ICMPBUF->type != ICMP_ECHO) { - UIP_STAT(++uip_stat.icmp.drop); - UIP_STAT(++uip_stat.icmp.typeerr); - UIP_LOG("icmp: not icmp echo."); - goto drop; - } - - /* If we are configured to use ping IP address assignment, we use - the destination IP address of this ping packet and assign it to - ourself. */ -#if UIP_PINGADDRCONF - if ((uip_hostaddr[0] | uip_hostaddr[1]) == 0) { - uip_hostaddr[0] = BUF->destipaddr[0]; - uip_hostaddr[1] = BUF->destipaddr[1]; - } -#endif /* UIP_PINGADDRCONF */ - - ICMPBUF->type = ICMP_ECHO_REPLY; - - if (ICMPBUF->icmpchksum >= HTONS(0xffff - (ICMP_ECHO << 8))) { - ICMPBUF->icmpchksum += HTONS(ICMP_ECHO << 8) + 1; - } else { - ICMPBUF->icmpchksum += HTONS(ICMP_ECHO << 8); - } - - /* Swap IP addresses. */ - uip_ipaddr_copy(BUF->destipaddr, BUF->srcipaddr); - uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr); - - UIP_STAT(++uip_stat.icmp.sent); - goto send; - - /* End of IPv4 input header processing code. */ -#else /* !UIP_CONF_IPV6 */ - - /* This is IPv6 ICMPv6 processing code. */ - DEBUG_PRINTF("icmp6_input: length %d\n", uip_len); - - if (BUF->proto != UIP_PROTO_ICMP6) { - /* We only allow ICMPv6 packets from - here. */ - UIP_STAT(++uip_stat.ip.drop); - UIP_STAT(++uip_stat.ip.protoerr); - UIP_LOG("ip: neither tcp nor icmp6."); - goto drop; - } - - UIP_STAT(++uip_stat.icmp.recv); - - /* If we get a neighbor solicitation for our address we should send - a neighbor advertisement message back. */ - if (ICMPBUF->type == ICMP6_NEIGHBOR_SOLICITATION) { - if (uip_ipaddr_cmp(ICMPBUF->icmp6data, uip_hostaddr)) { - - if (ICMPBUF->options[0] == ICMP6_OPTION_SOURCE_LINK_ADDRESS) { - /* Save the sender's address in our neighbor list. */ - uip_neighbor_add(ICMPBUF->srcipaddr, &(ICMPBUF->options[2])); - } - - /* We should now send a neighbor advertisement back to where the - neighbor solicication came from. */ - ICMPBUF->type = ICMP6_NEIGHBOR_ADVERTISEMENT; - ICMPBUF->flags = ICMP6_FLAG_S; /* Solicited flag. */ - - ICMPBUF->reserved1 = ICMPBUF->reserved2 = ICMPBUF->reserved3 = 0; - - uip_ipaddr_copy(ICMPBUF->destipaddr, ICMPBUF->srcipaddr); - uip_ipaddr_copy(ICMPBUF->srcipaddr, uip_hostaddr); - ICMPBUF->options[0] = ICMP6_OPTION_TARGET_LINK_ADDRESS; - ICMPBUF->options[1] = 1; /* Options length, 1 = 8 bytes. */ - memcpy(&(ICMPBUF->options[2]), &uip_ethaddr, sizeof(uip_ethaddr)); - ICMPBUF->icmpchksum = 0; - ICMPBUF->icmpchksum = ~uip_icmp6chksum(); - goto send; - - } - goto drop; - } else if (ICMPBUF->type == ICMP6_ECHO) { - /* ICMP echo (i.e., ping) processing. This is simple, we only - change the ICMP type from ECHO to ECHO_REPLY and update the - ICMP checksum before we return the packet. */ - - ICMPBUF->type = ICMP6_ECHO_REPLY; - - uip_ipaddr_copy(BUF->destipaddr, BUF->srcipaddr); - uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr); - ICMPBUF->icmpchksum = 0; - ICMPBUF->icmpchksum = ~uip_icmp6chksum(); - - UIP_STAT(++uip_stat.icmp.sent); - goto send; - } else { - DEBUG_PRINTF("Unknown icmp6 message type %d\n", ICMPBUF->type); - UIP_STAT(++uip_stat.icmp.drop); - UIP_STAT(++uip_stat.icmp.typeerr); - UIP_LOG("icmp: unknown ICMP message."); - goto drop; - } - - /* End of IPv6 ICMP processing. */ - -#endif /* !UIP_CONF_IPV6 */ - -#if UIP_UDP - /* UDP input processing. */ -udp_input: - /* UDP processing is really just a hack. We don't do anything to the - UDP/IP headers, but let the UDP application do all the hard - work. If the application sets uip_slen, it has a packet to - send. */ -#if UIP_UDP_CHECKSUMS - uip_len = uip_len - UIP_IPUDPH_LEN; - uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN]; - if (UDPBUF->udpchksum != 0 && uip_udpchksum() != 0xffff) { - UIP_STAT(++uip_stat.udp.drop); - UIP_STAT(++uip_stat.udp.chkerr); - UIP_LOG("udp: bad checksum."); - goto drop; - } -#else /* UIP_UDP_CHECKSUMS */ - uip_len = uip_len - UIP_IPUDPH_LEN; -#endif /* UIP_UDP_CHECKSUMS */ - - /* Demultiplex this UDP packet between the UDP "connections". */ - for (uip_udp_conn = &uip_udp_conns[0]; - uip_udp_conn < &uip_udp_conns[UIP_UDP_CONNS]; - ++uip_udp_conn) { - /* If the local UDP port is non-zero, the connection is considered - to be used. If so, the local port number is checked against the - destination port number in the received packet. If the two port - numbers match, the remote port number is checked if the - connection is bound to a remote port. Finally, if the - connection is bound to a remote IP address, the source IP - address of the packet is checked. */ - if (uip_udp_conn->lport != 0 && - UDPBUF->destport == uip_udp_conn->lport && - (uip_udp_conn->rport == 0 || - UDPBUF->srcport == uip_udp_conn->rport) && - (uip_ipaddr_cmp(uip_udp_conn->ripaddr, all_zeroes_addr) || - uip_ipaddr_cmp(uip_udp_conn->ripaddr, all_ones_addr) || - uip_ipaddr_cmp(BUF->srcipaddr, uip_udp_conn->ripaddr))) { - goto udp_found; - } - } - UIP_LOG("udp: no matching connection found"); - goto drop; - -udp_found: - uip_conn = NULL; - uip_flags = UIP_NEWDATA; - uip_sappdata = uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN]; - uip_slen = 0; - UIP_UDP_APPCALL(); -udp_send: - if (uip_slen == 0) { - goto drop; - } - uip_len = uip_slen + UIP_IPUDPH_LEN; - -#if UIP_CONF_IPV6 - /* For IPv6, the IP length field does not include the IPv6 IP header - length. */ - BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8); - BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff); -#else /* UIP_CONF_IPV6 */ - BUF->len[0] = (uip_len >> 8); - BUF->len[1] = (uip_len & 0xff); -#endif /* UIP_CONF_IPV6 */ - - BUF->ttl = uip_udp_conn->ttl; - BUF->proto = UIP_PROTO_UDP; - - UDPBUF->udplen = HTONS(uip_slen + UIP_UDPH_LEN); - UDPBUF->udpchksum = 0; - - BUF->srcport = uip_udp_conn->lport; - BUF->destport = uip_udp_conn->rport; - - uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr); - uip_ipaddr_copy(BUF->destipaddr, uip_udp_conn->ripaddr); - - uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPTCPH_LEN]; - -#if UIP_UDP_CHECKSUMS - /* Calculate UDP checksum. */ - UDPBUF->udpchksum = ~(uip_udpchksum()); - if (UDPBUF->udpchksum == 0) { - UDPBUF->udpchksum = 0xffff; - } -#endif /* UIP_UDP_CHECKSUMS */ - - goto ip_send_nolen; -#endif /* UIP_UDP */ - - /* TCP input processing. */ -tcp_input: - UIP_STAT(++uip_stat.tcp.recv); - - /* Start of TCP input header processing code. */ - - if (uip_tcpchksum() != 0xffff) { - /* Compute and check the TCP - checksum. */ - UIP_STAT(++uip_stat.tcp.drop); - UIP_STAT(++uip_stat.tcp.chkerr); - UIP_LOG("tcp: bad checksum."); - goto drop; - } - - - /* Demultiplex this segment. */ - /* First check any active connections. */ - for (uip_connr = &uip_conns[0]; uip_connr <= &uip_conns[UIP_CONNS - 1]; - ++uip_connr) { - if (uip_connr->tcpstateflags != UIP_CLOSED && - BUF->destport == uip_connr->lport && - BUF->srcport == uip_connr->rport && - uip_ipaddr_cmp(BUF->srcipaddr, uip_connr->ripaddr)) { - goto found; - } - } - - /* If we didn't find and active connection that expected the packet, - either this packet is an old duplicate, or this is a SYN packet - destined for a connection in LISTEN. If the SYN flag isn't set, - it is an old packet and we send a RST. */ - if ((BUF->flags & TCP_CTL) != TCP_SYN) { - goto reset; - } - - tmp16 = BUF->destport; - /* Next, check listening connections. */ - for (c = 0; c < UIP_LISTENPORTS; ++c) { - if (tmp16 == uip_listenports[c]) - goto found_listen; - } - - /* No matching connection found, so we send a RST packet. */ - UIP_STAT(++uip_stat.tcp.synrst); -reset: - - /* We do not send resets in response to resets. */ - if (BUF->flags & TCP_RST) { - goto drop; - } - - UIP_STAT(++uip_stat.tcp.rst); - - BUF->flags = TCP_RST | TCP_ACK; - uip_len = UIP_IPTCPH_LEN; - BUF->tcpoffset = 5 << 4; - - /* Flip the seqno and ackno fields in the TCP header. */ - c = BUF->seqno[3]; - BUF->seqno[3] = BUF->ackno[3]; - BUF->ackno[3] = c; - - c = BUF->seqno[2]; - BUF->seqno[2] = BUF->ackno[2]; - BUF->ackno[2] = c; - - c = BUF->seqno[1]; - BUF->seqno[1] = BUF->ackno[1]; - BUF->ackno[1] = c; - - c = BUF->seqno[0]; - BUF->seqno[0] = BUF->ackno[0]; - BUF->ackno[0] = c; - - /* We also have to increase the sequence number we are - acknowledging. If the least significant byte overflowed, we need - to propagate the carry to the other bytes as well. */ - if (++BUF->ackno[3] == 0) { - if (++BUF->ackno[2] == 0) { - if (++BUF->ackno[1] == 0) { - ++BUF->ackno[0]; - } - } - } - - /* Swap port numbers. */ - tmp16 = BUF->srcport; - BUF->srcport = BUF->destport; - BUF->destport = tmp16; - - /* Swap IP addresses. */ - uip_ipaddr_copy(BUF->destipaddr, BUF->srcipaddr); - uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr); - - /* And send out the RST packet! */ - goto tcp_send_noconn; - - /* This label will be jumped to if we matched the incoming packet - with a connection in LISTEN. In that case, we should create a new - connection and send a SYNACK in return. */ -found_listen: - /* First we check if there are any connections avaliable. Unused - connections are kept in the same table as used connections, but - unused ones have the tcpstate set to CLOSED. Also, connections in - TIME_WAIT are kept track of and we'll use the oldest one if no - CLOSED connections are found. Thanks to Eddie C. Dost for a very - nice algorithm for the TIME_WAIT search. */ - uip_connr = 0; - for (c = 0; c < UIP_CONNS; ++c) { - if (uip_conns[c].tcpstateflags == UIP_CLOSED) { - uip_connr = &uip_conns[c]; - break; - } - if (uip_conns[c].tcpstateflags == UIP_TIME_WAIT) { - if (uip_connr == 0 || - uip_conns[c].timer > uip_connr->timer) { - uip_connr = &uip_conns[c]; - } - } - } - - if (uip_connr == 0) { - /* All connections are used already, we drop packet and hope that - the remote end will retransmit the packet at a time when we - have more spare connections. */ - UIP_STAT(++uip_stat.tcp.syndrop); - UIP_LOG("tcp: found no unused connections."); - goto drop; - } - uip_conn = uip_connr; - - /* Fill in the necessary fields for the new connection. */ - uip_connr->rto = uip_connr->timer = UIP_RTO; - uip_connr->sa = 0; - uip_connr->sv = 4; - uip_connr->nrtx = 0; - uip_connr->lport = BUF->destport; - uip_connr->rport = BUF->srcport; - uip_ipaddr_copy(uip_connr->ripaddr, BUF->srcipaddr); - uip_connr->tcpstateflags = UIP_SYN_RCVD; - - uip_connr->snd_nxt[0] = iss[0]; - uip_connr->snd_nxt[1] = iss[1]; - uip_connr->snd_nxt[2] = iss[2]; - uip_connr->snd_nxt[3] = iss[3]; - uip_connr->len = 1; - - /* rcv_nxt should be the seqno from the incoming packet + 1. */ - uip_connr->rcv_nxt[3] = BUF->seqno[3]; - uip_connr->rcv_nxt[2] = BUF->seqno[2]; - uip_connr->rcv_nxt[1] = BUF->seqno[1]; - uip_connr->rcv_nxt[0] = BUF->seqno[0]; - uip_add_rcv_nxt(1); - - /* Parse the TCP MSS option, if present. */ - if ((BUF->tcpoffset & 0xf0) > 0x50) { - for (c = 0; c < ((BUF->tcpoffset >> 4) - 5) << 2 ;) { - opt = uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + c]; - if (opt == TCP_OPT_END) { - /* End of options. */ - break; - } else if (opt == TCP_OPT_NOOP) { - ++c; - /* NOP option. */ - } else if (opt == TCP_OPT_MSS && - uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == TCP_OPT_MSS_LEN) { - /* An MSS option with the right option length. */ - tmp16 = ((u16_t)uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 2 + c] << 8) | - (u16_t)uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN + 3 + c]; - uip_connr->initialmss = uip_connr->mss = - tmp16 > UIP_TCP_MSS ? UIP_TCP_MSS : tmp16; - - /* And we are done processing options. */ - break; - } else { - /* All other options have a length field, so that we easily - can skip past them. */ - if (uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == 0) { - /* If the length field is zero, the options are malformed - and we don't process them further. */ - break; - } - c += uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c]; - } - } - } - - /* Our response will be a SYNACK. */ -#if UIP_ACTIVE_OPEN -tcp_send_synack: - BUF->flags = TCP_ACK; - -tcp_send_syn: - BUF->flags |= TCP_SYN; -#else /* UIP_ACTIVE_OPEN */ -tcp_send_synack: - BUF->flags = TCP_SYN | TCP_ACK; -#endif /* UIP_ACTIVE_OPEN */ - - /* We send out the TCP Maximum Segment Size option with our - SYNACK. */ - BUF->optdata[0] = TCP_OPT_MSS; - BUF->optdata[1] = TCP_OPT_MSS_LEN; - BUF->optdata[2] = (UIP_TCP_MSS) / 256; - BUF->optdata[3] = (UIP_TCP_MSS) & 255; - uip_len = UIP_IPTCPH_LEN + TCP_OPT_MSS_LEN; - BUF->tcpoffset = ((UIP_TCPH_LEN + TCP_OPT_MSS_LEN) / 4) << 4; - goto tcp_send; - - /* This label will be jumped to if we found an active connection. */ -found: - uip_conn = uip_connr; - uip_flags = 0; - /* We do a very naive form of TCP reset processing; we just accept - any RST and kill our connection. We should in fact check if the - sequence number of this reset is wihtin our advertised window - before we accept the reset. */ - if (BUF->flags & TCP_RST) { - uip_connr->tcpstateflags = UIP_CLOSED; - UIP_LOG("tcp: got reset, aborting connection."); - uip_flags = UIP_ABORT; - UIP_APPCALL(); - goto drop; - } - /* Calculated the length of the data, if the application has sent - any data to us. */ - c = (BUF->tcpoffset >> 4) << 2; - /* uip_len will contain the length of the actual TCP data. This is - calculated by subtracing the length of the TCP header (in - c) and the length of the IP header (20 bytes). */ - uip_len = uip_len - c - UIP_IPH_LEN; - - /* First, check if the sequence number of the incoming packet is - what we're expecting next. If not, we send out an ACK with the - correct numbers in. */ - if (!(((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_SYN_SENT) && - ((BUF->flags & TCP_CTL) == (TCP_SYN | TCP_ACK)))) { - if ((uip_len > 0 || ((BUF->flags & (TCP_SYN | TCP_FIN)) != 0)) && - (BUF->seqno[0] != uip_connr->rcv_nxt[0] || - BUF->seqno[1] != uip_connr->rcv_nxt[1] || - BUF->seqno[2] != uip_connr->rcv_nxt[2] || - BUF->seqno[3] != uip_connr->rcv_nxt[3])) { - goto tcp_send_ack; - } - } - - /* Next, check if the incoming segment acknowledges any outstanding - data. If so, we update the sequence number, reset the length of - the outstanding data, calculate RTT estimations, and reset the - retransmission timer. */ - if ((BUF->flags & TCP_ACK) && uip_outstanding(uip_connr)) { - uip_add32(uip_connr->snd_nxt, uip_connr->len); - - if (BUF->ackno[0] == uip_acc32[0] && - BUF->ackno[1] == uip_acc32[1] && - BUF->ackno[2] == uip_acc32[2] && - BUF->ackno[3] == uip_acc32[3]) { - /* Update sequence number. */ - uip_connr->snd_nxt[0] = uip_acc32[0]; - uip_connr->snd_nxt[1] = uip_acc32[1]; - uip_connr->snd_nxt[2] = uip_acc32[2]; - uip_connr->snd_nxt[3] = uip_acc32[3]; - - - /* Do RTT estimation, unless we have done retransmissions. */ - if (uip_connr->nrtx == 0) { - signed char m; - m = uip_connr->rto - uip_connr->timer; - /* This is taken directly from VJs original code in his paper */ - m = m - (uip_connr->sa >> 3); - uip_connr->sa += m; - if (m < 0) { - m = -m; - } - m = m - (uip_connr->sv >> 2); - uip_connr->sv += m; - uip_connr->rto = (uip_connr->sa >> 3) + uip_connr->sv; - - } - /* Set the acknowledged flag. */ - uip_flags = UIP_ACKDATA; - /* Reset the retransmission timer. */ - uip_connr->timer = uip_connr->rto; - - /* Reset length of outstanding data. */ - uip_connr->len = 0; - } - - } - - /* Do different things depending on in what state the connection is. */ - switch (uip_connr->tcpstateflags & UIP_TS_MASK) { - /* CLOSED and LISTEN are not handled here. CLOSE_WAIT is not - implemented, since we force the application to close when the - peer sends a FIN (hence the application goes directly from - ESTABLISHED to LAST_ACK). */ - case UIP_SYN_RCVD: - /* In SYN_RCVD we have sent out a SYNACK in response to a SYN, and - we are waiting for an ACK that acknowledges the data we sent - out the last time. Therefore, we want to have the UIP_ACKDATA - flag set. If so, we enter the ESTABLISHED state. */ - if (uip_flags & UIP_ACKDATA) { - uip_connr->tcpstateflags = UIP_ESTABLISHED; - uip_flags = UIP_CONNECTED; - uip_connr->len = 0; - if (uip_len > 0) { - uip_flags |= UIP_NEWDATA; - uip_add_rcv_nxt(uip_len); - } - uip_slen = 0; - UIP_APPCALL(); - goto appsend; - } - goto drop; -#if UIP_ACTIVE_OPEN - case UIP_SYN_SENT: - /* In SYN_SENT, we wait for a SYNACK that is sent in response to - our SYN. The rcv_nxt is set to sequence number in the SYNACK - plus one, and we send an ACK. We move into the ESTABLISHED - state. */ - if ((uip_flags & UIP_ACKDATA) && - (BUF->flags & TCP_CTL) == (TCP_SYN | TCP_ACK)) { - - /* Parse the TCP MSS option, if present. */ - if ((BUF->tcpoffset & 0xf0) > 0x50) { - for (c = 0; c < ((BUF->tcpoffset >> 4) - 5) << 2 ;) { - opt = uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN + c]; - if (opt == TCP_OPT_END) { - /* End of options. */ - break; - } else if (opt == TCP_OPT_NOOP) { - ++c; - /* NOP option. */ - } else if (opt == TCP_OPT_MSS && - uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == TCP_OPT_MSS_LEN) { - /* An MSS option with the right option length. */ - tmp16 = (uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 2 + c] << 8) | - uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 3 + c]; - uip_connr->initialmss = - uip_connr->mss = tmp16 > UIP_TCP_MSS ? UIP_TCP_MSS : tmp16; - - /* And we are done processing options. */ - break; - } else { - /* All other options have a length field, so that we easily - can skip past them. */ - if (uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == 0) { - /* If the length field is zero, the options are malformed - and we don't process them further. */ - break; - } - c += uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c]; - } - } - } - uip_connr->tcpstateflags = UIP_ESTABLISHED; - uip_connr->rcv_nxt[0] = BUF->seqno[0]; - uip_connr->rcv_nxt[1] = BUF->seqno[1]; - uip_connr->rcv_nxt[2] = BUF->seqno[2]; - uip_connr->rcv_nxt[3] = BUF->seqno[3]; - uip_add_rcv_nxt(1); - uip_flags = UIP_CONNECTED | UIP_NEWDATA; - uip_connr->len = 0; - uip_len = 0; - uip_slen = 0; - UIP_APPCALL(); - goto appsend; - } - /* Inform the application that the connection failed */ - uip_flags = UIP_ABORT; - UIP_APPCALL(); - /* The connection is closed after we send the RST */ - uip_conn->tcpstateflags = UIP_CLOSED; - goto reset; -#endif /* UIP_ACTIVE_OPEN */ - - case UIP_ESTABLISHED: - /* In the ESTABLISHED state, we call upon the application to feed - data into the uip_buf. If the UIP_ACKDATA flag is set, the - application should put new data into the buffer, otherwise we are - retransmitting an old segment, and the application should put that - data into the buffer. - - If the incoming packet is a FIN, we should close the connection on - this side as well, and we send out a FIN and enter the LAST_ACK - state. We require that there is no outstanding data; otherwise the - sequence numbers will be screwed up. */ - - if (BUF->flags & TCP_FIN && !(uip_connr->tcpstateflags & UIP_STOPPED)) { - if (uip_outstanding(uip_connr)) { - goto drop; - } - uip_add_rcv_nxt(1 + uip_len); - uip_flags |= UIP_CLOSE; - if (uip_len > 0) { - uip_flags |= UIP_NEWDATA; - } - UIP_APPCALL(); - uip_connr->len = 1; - uip_connr->tcpstateflags = UIP_LAST_ACK; - uip_connr->nrtx = 0; -tcp_send_finack: - BUF->flags = TCP_FIN | TCP_ACK; - goto tcp_send_nodata; - } - - /* Check the URG flag. If this is set, the segment carries urgent - data that we must pass to the application. */ - if ((BUF->flags & TCP_URG) != 0) { -#if UIP_URGDATA > 0 - uip_urglen = (BUF->urgp[0] << 8) | BUF->urgp[1]; - if (uip_urglen > uip_len) { - /* There is more urgent data in the next segment to come. */ - uip_urglen = uip_len; - } - uip_add_rcv_nxt(uip_urglen); - uip_len -= uip_urglen; - uip_urgdata = uip_appdata; - uip_appdata += uip_urglen; - } else { - uip_urglen = 0; -#else /* UIP_URGDATA > 0 */ - uip_appdata = ((char *)uip_appdata) + ((BUF->urgp[0] << 8) | BUF->urgp[1]); - uip_len -= (BUF->urgp[0] << 8) | BUF->urgp[1]; -#endif /* UIP_URGDATA > 0 */ - } - - /* If uip_len > 0 we have TCP data in the packet, and we flag this - by setting the UIP_NEWDATA flag and update the sequence number - we acknowledge. If the application has stopped the dataflow - using uip_stop(), we must not accept any data packets from the - remote host. */ - if (uip_len > 0 && !(uip_connr->tcpstateflags & UIP_STOPPED)) { - uip_flags |= UIP_NEWDATA; - uip_add_rcv_nxt(uip_len); - } - - /* Check if the available buffer space advertised by the other end - is smaller than the initial MSS for this connection. If so, we - set the current MSS to the window size to ensure that the - application does not send more data than the other end can - handle. - - If the remote host advertises a zero window, we set the MSS to - the initial MSS so that the application will send an entire MSS - of data. This data will not be acknowledged by the receiver, - and the application will retransmit it. This is called the - "persistent timer" and uses the retransmission mechanim. - */ - tmp16 = ((u16_t)BUF->wnd[0] << 8) + (u16_t)BUF->wnd[1]; - if (tmp16 > uip_connr->initialmss || - tmp16 == 0) { - tmp16 = uip_connr->initialmss; - } - uip_connr->mss = tmp16; - - /* If this packet constitutes an ACK for outstanding data (flagged - by the UIP_ACKDATA flag, we should call the application since it - might want to send more data. If the incoming packet had data - from the peer (as flagged by the UIP_NEWDATA flag), the - application must also be notified. - - When the application is called, the global variable uip_len - contains the length of the incoming data. The application can - access the incoming data through the global pointer - uip_appdata, which usually points UIP_IPTCPH_LEN + UIP_LLH_LEN - bytes into the uip_buf array. - - If the application wishes to send any data, this data should be - put into the uip_appdata and the length of the data should be - put into uip_len. If the application don't have any data to - send, uip_len must be set to 0. */ - if (uip_flags & (UIP_NEWDATA | UIP_ACKDATA)) { - uip_slen = 0; - UIP_APPCALL(); - -appsend: - - if (uip_flags & UIP_ABORT) { - uip_slen = 0; - uip_connr->tcpstateflags = UIP_CLOSED; - BUF->flags = TCP_RST | TCP_ACK; - goto tcp_send_nodata; - } - - if (uip_flags & UIP_CLOSE) { - uip_slen = 0; - uip_connr->len = 1; - uip_connr->tcpstateflags = UIP_FIN_WAIT_1; - uip_connr->nrtx = 0; - BUF->flags = TCP_FIN | TCP_ACK; - goto tcp_send_nodata; - } - - /* If uip_slen > 0, the application has data to be sent. */ - if (uip_slen > 0) { - - /* If the connection has acknowledged data, the contents of - the ->len variable should be discarded. */ - if ((uip_flags & UIP_ACKDATA) != 0) { - uip_connr->len = 0; - } - - /* If the ->len variable is non-zero the connection has - already data in transit and cannot send anymore right - now. */ - if (uip_connr->len == 0) { - - /* The application cannot send more than what is allowed by - the mss (the minumum of the MSS and the available - window). */ - if (uip_slen > uip_connr->mss) { - uip_slen = uip_connr->mss; - } - - /* Remember how much data we send out now so that we know - when everything has been acknowledged. */ - uip_connr->len = uip_slen; - } else { - - /* If the application already had unacknowledged data, we - make sure that the application does not send (i.e., - retransmit) out more than it previously sent out. */ - uip_slen = uip_connr->len; - } - } - uip_connr->nrtx = 0; -apprexmit: - uip_appdata = uip_sappdata; - - /* If the application has data to be sent, or if the incoming - packet had new data in it, we must send out a packet. */ - if (uip_slen > 0 && uip_connr->len > 0) { - /* Add the length of the IP and TCP headers. */ - uip_len = uip_connr->len + UIP_TCPIP_HLEN; - /* We always set the ACK flag in response packets. */ - BUF->flags = TCP_ACK | TCP_PSH; - /* Send the packet. */ - goto tcp_send_noopts; - } - /* If there is no data to send, just send out a pure ACK if - there is newdata. */ - if (uip_flags & UIP_NEWDATA) { - uip_len = UIP_TCPIP_HLEN; - BUF->flags = TCP_ACK; - goto tcp_send_noopts; - } - } - goto drop; - case UIP_LAST_ACK: - /* We can close this connection if the peer has acknowledged our - FIN. This is indicated by the UIP_ACKDATA flag. */ - if (uip_flags & UIP_ACKDATA) { - uip_connr->tcpstateflags = UIP_CLOSED; - uip_flags = UIP_CLOSE; - UIP_APPCALL(); - } - break; - - case UIP_FIN_WAIT_1: - /* The application has closed the connection, but the remote host - hasn't closed its end yet. Thus we do nothing but wait for a - FIN from the other side. */ - if (uip_len > 0) { - uip_add_rcv_nxt(uip_len); - } - if (BUF->flags & TCP_FIN) { - if (uip_flags & UIP_ACKDATA) { - uip_connr->tcpstateflags = UIP_TIME_WAIT; - uip_connr->timer = 0; - uip_connr->len = 0; - } else { - uip_connr->tcpstateflags = UIP_CLOSING; - } - uip_add_rcv_nxt(1); - uip_flags = UIP_CLOSE; - UIP_APPCALL(); - goto tcp_send_ack; - } else if (uip_flags & UIP_ACKDATA) { - uip_connr->tcpstateflags = UIP_FIN_WAIT_2; - uip_connr->len = 0; - goto drop; - } - if (uip_len > 0) { - goto tcp_send_ack; - } - goto drop; - - case UIP_FIN_WAIT_2: - if (uip_len > 0) { - uip_add_rcv_nxt(uip_len); - } - if (BUF->flags & TCP_FIN) { - uip_connr->tcpstateflags = UIP_TIME_WAIT; - uip_connr->timer = 0; - uip_add_rcv_nxt(1); - uip_flags = UIP_CLOSE; - UIP_APPCALL(); - goto tcp_send_ack; - } - if (uip_len > 0) { - goto tcp_send_ack; - } - goto drop; - - case UIP_TIME_WAIT: - goto tcp_send_ack; - - case UIP_CLOSING: - if (uip_flags & UIP_ACKDATA) { - uip_connr->tcpstateflags = UIP_TIME_WAIT; - uip_connr->timer = 0; - } - } - goto drop; - - - /* We jump here when we are ready to send the packet, and just want - to set the appropriate TCP sequence numbers in the TCP header. */ -tcp_send_ack: - BUF->flags = TCP_ACK; -tcp_send_nodata: - uip_len = UIP_IPTCPH_LEN; -tcp_send_noopts: - BUF->tcpoffset = (UIP_TCPH_LEN / 4) << 4; -tcp_send: - /* We're done with the input processing. We are now ready to send a - reply. Our job is to fill in all the fields of the TCP and IP - headers before calculating the checksum and finally send the - packet. */ - BUF->ackno[0] = uip_connr->rcv_nxt[0]; - BUF->ackno[1] = uip_connr->rcv_nxt[1]; - BUF->ackno[2] = uip_connr->rcv_nxt[2]; - BUF->ackno[3] = uip_connr->rcv_nxt[3]; - - BUF->seqno[0] = uip_connr->snd_nxt[0]; - BUF->seqno[1] = uip_connr->snd_nxt[1]; - BUF->seqno[2] = uip_connr->snd_nxt[2]; - BUF->seqno[3] = uip_connr->snd_nxt[3]; - - BUF->proto = UIP_PROTO_TCP; - - BUF->srcport = uip_connr->lport; - BUF->destport = uip_connr->rport; - - uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr); - uip_ipaddr_copy(BUF->destipaddr, uip_connr->ripaddr); - - if (uip_connr->tcpstateflags & UIP_STOPPED) { - /* If the connection has issued uip_stop(), we advertise a zero - window so that the remote host will stop sending data. */ - BUF->wnd[0] = BUF->wnd[1] = 0; - } else { - BUF->wnd[0] = ((UIP_RECEIVE_WINDOW) >> 8); - BUF->wnd[1] = ((UIP_RECEIVE_WINDOW) & 0xff); - } - -tcp_send_noconn: - BUF->ttl = UIP_TTL; -#if UIP_CONF_IPV6 - /* For IPv6, the IP length field does not include the IPv6 IP header - length. */ - BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8); - BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff); -#else /* UIP_CONF_IPV6 */ - BUF->len[0] = (uip_len >> 8); - BUF->len[1] = (uip_len & 0xff); -#endif /* UIP_CONF_IPV6 */ - - BUF->urgp[0] = BUF->urgp[1] = 0; - - /* Calculate TCP checksum. */ - BUF->tcpchksum = 0; - BUF->tcpchksum = ~(uip_tcpchksum()); - -ip_send_nolen: - -#if UIP_CONF_IPV6 - BUF->vtc = 0x60; - BUF->tcflow = 0x00; - BUF->flow = 0x00; -#else /* UIP_CONF_IPV6 */ - BUF->vhl = 0x45; - BUF->tos = 0; - BUF->ipoffset[0] = BUF->ipoffset[1] = 0; - ++ipid; - BUF->ipid[0] = ipid >> 8; - BUF->ipid[1] = ipid & 0xff; - /* Calculate IP checksum. */ - BUF->ipchksum = 0; - BUF->ipchksum = ~(uip_ipchksum()); - DEBUG_PRINTF("uip ip_send_nolen: chkecum 0x%04x\n", uip_ipchksum()); -#endif /* UIP_CONF_IPV6 */ - - UIP_STAT(++uip_stat.tcp.sent); -send: - DEBUG_PRINTF("Sending packet with length %d (%d)\n", uip_len, - (BUF->len[0] << 8) | BUF->len[1]); - - UIP_STAT(++uip_stat.ip.sent); - /* Return and let the caller do the actual transmission. */ - uip_flags = 0; - return; -drop: - uip_len = 0; - uip_flags = 0; - return; -} -/*---------------------------------------------------------------------------*/ -u16_t -htons(u16_t val) -{ - return HTONS(val); -} -/*---------------------------------------------------------------------------*/ -void -uip_send(const void *data, int len) -{ - if (len > 0) { - uip_slen = len; - if (data != uip_sappdata) { - memcpy(uip_sappdata, (data), uip_slen); - } - } -} -/** @} */
--- a/libs/Network/uip/uip/uip.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1638 +0,0 @@ -/** - * \addtogroup uip - * @{ - */ - -/** - * \file - * Header file for the uIP TCP/IP stack. - * \author Adam Dunkels <adam@dunkels.com> - * - * The uIP TCP/IP stack header file contains definitions for a number - * of C macros that are used by uIP programs as well as internal uIP - * structures, TCP/IP header structures and function declarations. - * - */ - - -/* - * Copyright (c) 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack. - * - * $Id: uip.h,v 1.40 2006/06/08 07:12:07 adam Exp $ - * - */ - -#ifndef __UIP_H__ -#define __UIP_H__ - -#include "uipopt.h" - -/** - * Repressentation of an IP address. - * - */ -typedef u16_t uip_ip4addr_t[2]; -typedef u16_t uip_ip6addr_t[8]; -#if UIP_CONF_IPV6 -typedef uip_ip6addr_t uip_ipaddr_t; -#else /* UIP_CONF_IPV6 */ -typedef uip_ip4addr_t uip_ipaddr_t; -#endif /* UIP_CONF_IPV6 */ - -/*---------------------------------------------------------------------------*/ -/* First, the functions that should be called from the - * system. Initialization, the periodic timer and incoming packets are - * handled by the following three functions. - */ - -/** - * \defgroup uipconffunc uIP configuration functions - * @{ - * - * The uIP configuration functions are used for setting run-time - * parameters in uIP such as IP addresses. - */ - -/** - * Set the IP address of this host. - * - * The IP address is represented as a 4-byte array where the first - * octet of the IP address is put in the first member of the 4-byte - * array. - * - * Example: - \code - - uip_ipaddr_t addr; - - uip_ipaddr(&addr, 192,168,1,2); - uip_sethostaddr(&addr); - - \endcode - * \param addr A pointer to an IP address of type uip_ipaddr_t; - * - * \sa uip_ipaddr() - * - * \hideinitializer - */ -#define uip_sethostaddr(addr) uip_ipaddr_copy(uip_hostaddr, (addr)) - -/** - * Get the IP address of this host. - * - * The IP address is represented as a 4-byte array where the first - * octet of the IP address is put in the first member of the 4-byte - * array. - * - * Example: - \code - uip_ipaddr_t hostaddr; - - uip_gethostaddr(&hostaddr); - \endcode - * \param addr A pointer to a uip_ipaddr_t variable that will be - * filled in with the currently configured IP address. - * - * \hideinitializer - */ -#define uip_gethostaddr(addr) uip_ipaddr_copy((addr), uip_hostaddr) - -/** - * Set the default router's IP address. - * - * \param addr A pointer to a uip_ipaddr_t variable containing the IP - * address of the default router. - * - * \sa uip_ipaddr() - * - * \hideinitializer - */ -#define uip_setdraddr(addr) uip_ipaddr_copy(uip_draddr, (addr)) - -/** - * Set the netmask. - * - * \param addr A pointer to a uip_ipaddr_t variable containing the IP - * address of the netmask. - * - * \sa uip_ipaddr() - * - * \hideinitializer - */ -#define uip_setnetmask(addr) uip_ipaddr_copy(uip_netmask, (addr)) - - -/** - * Get the default router's IP address. - * - * \param addr A pointer to a uip_ipaddr_t variable that will be - * filled in with the IP address of the default router. - * - * \hideinitializer - */ -#define uip_getdraddr(addr) uip_ipaddr_copy((addr), uip_draddr) - -/** - * Get the netmask. - * - * \param addr A pointer to a uip_ipaddr_t variable that will be - * filled in with the value of the netmask. - * - * \hideinitializer - */ -#define uip_getnetmask(addr) uip_ipaddr_copy((addr), uip_netmask) - -#ifdef __cplusplus -extern "C" { -#endif - -/** @} */ - -/** - * \defgroup uipinit uIP initialization functions - * @{ - * - * The uIP initialization functions are used for booting uIP. - */ - -/** - * uIP initialization function. - * - * This function should be called at boot up to initilize the uIP - * TCP/IP stack. - */ -void uip_init(void); - -/** - * uIP initialization function. - * - * This function may be used at boot time to set the initial ip_id. - */ -void uip_setipid(u16_t id); - -#ifdef __cplusplus -} -#endif - -/** @} */ - -/** - * \defgroup uipdevfunc uIP device driver functions - * @{ - * - * These functions are used by a network device driver for interacting - * with uIP. - */ - -/** - * Process an incoming packet. - * - * This function should be called when the device driver has received - * a packet from the network. The packet from the device driver must - * be present in the uip_buf buffer, and the length of the packet - * should be placed in the uip_len variable. - * - * When the function returns, there may be an outbound packet placed - * in the uip_buf packet buffer. If so, the uip_len variable is set to - * the length of the packet. If no packet is to be sent out, the - * uip_len variable is set to 0. - * - * The usual way of calling the function is presented by the source - * code below. - \code - uip_len = devicedriver_poll(); - if(uip_len > 0) { - uip_input(); - if(uip_len > 0) { - devicedriver_send(); - } - } - \endcode - * - * \note If you are writing a uIP device driver that needs ARP - * (Address Resolution Protocol), e.g., when running uIP over - * Ethernet, you will need to call the uIP ARP code before calling - * this function: - \code - #define BUF ((struct uip_eth_hdr *)&uip_buf[0]) - uip_len = ethernet_devicedrver_poll(); - if(uip_len > 0) { - if(BUF->type == HTONS(UIP_ETHTYPE_IP)) { - uip_arp_ipin(); - uip_input(); - if(uip_len > 0) { - uip_arp_out(); - ethernet_devicedriver_send(); - } - } else if(BUF->type == HTONS(UIP_ETHTYPE_ARP)) { - uip_arp_arpin(); - if(uip_len > 0) { - ethernet_devicedriver_send(); - } - } - \endcode - * - * \hideinitializer - */ -#define uip_input() uip_process(UIP_DATA) - -/** - * Periodic processing for a connection identified by its number. - * - * This function does the necessary periodic processing (timers, - * polling) for a uIP TCP conneciton, and should be called when the - * periodic uIP timer goes off. It should be called for every - * connection, regardless of whether they are open of closed. - * - * When the function returns, it may have an outbound packet waiting - * for service in the uIP packet buffer, and if so the uip_len - * variable is set to a value larger than zero. The device driver - * should be called to send out the packet. - * - * The ususal way of calling the function is through a for() loop like - * this: - \code - for(i = 0; i < UIP_CONNS; ++i) { - uip_periodic(i); - if(uip_len > 0) { - devicedriver_send(); - } - } - \endcode - * - * \note If you are writing a uIP device driver that needs ARP - * (Address Resolution Protocol), e.g., when running uIP over - * Ethernet, you will need to call the uip_arp_out() function before - * calling the device driver: - \code - for(i = 0; i < UIP_CONNS; ++i) { - uip_periodic(i); - if(uip_len > 0) { - uip_arp_out(); - ethernet_devicedriver_send(); - } - } - \endcode - * - * \param conn The number of the connection which is to be periodically polled. - * - * \hideinitializer - */ -#define uip_periodic(conn) do { uip_conn = &uip_conns[conn]; \ - uip_process(UIP_TIMER); } while (0) - -/** - * - * - */ -#define uip_conn_active(conn) (uip_conns[conn].tcpstateflags != UIP_CLOSED) - -/** - * Perform periodic processing for a connection identified by a pointer - * to its structure. - * - * Same as uip_periodic() but takes a pointer to the actual uip_conn - * struct instead of an integer as its argument. This function can be - * used to force periodic processing of a specific connection. - * - * \param conn A pointer to the uip_conn struct for the connection to - * be processed. - * - * \hideinitializer - */ -#define uip_periodic_conn(conn) do { uip_conn = conn; \ - uip_process(UIP_TIMER); } while (0) - -/** - * Reuqest that a particular connection should be polled. - * - * Similar to uip_periodic_conn() but does not perform any timer - * processing. The application is polled for new data. - * - * \param conn A pointer to the uip_conn struct for the connection to - * be processed. - * - * \hideinitializer - */ -#define uip_poll_conn(conn) do { uip_conn = conn; \ - uip_process(UIP_POLL_REQUEST); } while (0) - - -#if UIP_UDP -/** - * Periodic processing for a UDP connection identified by its number. - * - * This function is essentially the same as uip_periodic(), but for - * UDP connections. It is called in a similar fashion as the - * uip_periodic() function: - \code - for(i = 0; i < UIP_UDP_CONNS; i++) { - uip_udp_periodic(i); - if(uip_len > 0) { - devicedriver_send(); - } - } - \endcode - * - * \note As for the uip_periodic() function, special care has to be - * taken when using uIP together with ARP and Ethernet: - \code - for(i = 0; i < UIP_UDP_CONNS; i++) { - uip_udp_periodic(i); - if(uip_len > 0) { - uip_arp_out(); - ethernet_devicedriver_send(); - } - } - \endcode - * - * \param conn The number of the UDP connection to be processed. - * - * \hideinitializer - */ -#define uip_udp_periodic(conn) do { uip_udp_conn = &uip_udp_conns[conn]; \ - uip_process(UIP_UDP_TIMER); } while (0) - -/** - * Periodic processing for a UDP connection identified by a pointer to - * its structure. - * - * Same as uip_udp_periodic() but takes a pointer to the actual - * uip_conn struct instead of an integer as its argument. This - * function can be used to force periodic processing of a specific - * connection. - * - * \param conn A pointer to the uip_udp_conn struct for the connection - * to be processed. - * - * \hideinitializer - */ -#define uip_udp_periodic_conn(conn) do { uip_udp_conn = conn; \ - uip_process(UIP_UDP_TIMER); } while (0) - - -#endif /* UIP_UDP */ - -/** - * The uIP packet buffer. - * - * The uip_buf array is used to hold incoming and outgoing - * packets. The device driver should place incoming data into this - * buffer. When sending data, the device driver should read the link - * level headers and the TCP/IP headers from this buffer. The size of - * the link level headers is configured by the UIP_LLH_LEN define. - * - * \note The application data need not be placed in this buffer, so - * the device driver must read it from the place pointed to by the - * uip_appdata pointer as illustrated by the following example: - \code - void - devicedriver_send(void) - { - hwsend(&uip_buf[0], UIP_LLH_LEN); - if(uip_len <= UIP_LLH_LEN + UIP_TCPIP_HLEN) { - hwsend(&uip_buf[UIP_LLH_LEN], uip_len - UIP_LLH_LEN); - } else { - hwsend(&uip_buf[UIP_LLH_LEN], UIP_TCPIP_HLEN); - hwsend(uip_appdata, uip_len - UIP_TCPIP_HLEN - UIP_LLH_LEN); - } - } - \endcode - */ - -#ifdef __cplusplus -extern "C" u8_t uip_buf[UIP_BUFSIZE+2]; -#else -extern u8_t uip_buf[UIP_BUFSIZE+2]; -#endif - -#ifdef __cplusplus -extern "C" { -#endif -/** @} */ - -/*---------------------------------------------------------------------------*/ -/* Functions that are used by the uIP application program. Opening and - * closing connections, sending and receiving data, etc. is all - * handled by the functions below. -*/ -/** - * \defgroup uipappfunc uIP application functions - * @{ - * - * Functions used by an application running of top of uIP. - */ - -/** - * Start listening to the specified port. - * - * \note Since this function expects the port number in network byte - * order, a conversion using HTONS() or htons() is necessary. - * - \code - uip_listen(HTONS(80)); - \endcode - * - * \param port A 16-bit port number in network byte order. - */ -void uip_listen(u16_t port); - -/** - * Stop listening to the specified port. - * - * \note Since this function expects the port number in network byte - * order, a conversion using HTONS() or htons() is necessary. - * - \code - uip_unlisten(HTONS(80)); - \endcode - * - * \param port A 16-bit port number in network byte order. - */ -void uip_unlisten(u16_t port); - -#ifdef __cplusplus -} -#endif - -/** - * Connect to a remote host using TCP. - * - * This function is used to start a new connection to the specified - * port on the specied host. It allocates a new connection identifier, - * sets the connection to the SYN_SENT state and sets the - * retransmission timer to 0. This will cause a TCP SYN segment to be - * sent out the next time this connection is periodically processed, - * which usually is done within 0.5 seconds after the call to - * uip_connect(). - * - * \note This function is avaliable only if support for active open - * has been configured by defining UIP_ACTIVE_OPEN to 1 in uipopt.h. - * - * \note Since this function requires the port number to be in network - * byte order, a conversion using HTONS() or htons() is necessary. - * - \code - uip_ipaddr_t ipaddr; - - uip_ipaddr(&ipaddr, 192,168,1,2); - uip_connect(&ipaddr, HTONS(80)); - \endcode - * - * \param ripaddr The IP address of the remote hot. - * - * \param port A 16-bit port number in network byte order. - * - * \return A pointer to the uIP connection identifier for the new connection, - * or NULL if no connection could be allocated. - * - */ -struct uip_conn *uip_connect(uip_ipaddr_t *ripaddr, u16_t port); - - - -/** - * \internal - * - * Check if a connection has outstanding (i.e., unacknowledged) data. - * - * \param conn A pointer to the uip_conn structure for the connection. - * - * \hideinitializer - */ -#define uip_outstanding(conn) ((conn)->len) - -/** - * Send data on the current connection. - * - * This function is used to send out a single segment of TCP - * data. Only applications that have been invoked by uIP for event - * processing can send data. - * - * The amount of data that actually is sent out after a call to this - * funcion is determined by the maximum amount of data TCP allows. uIP - * will automatically crop the data so that only the appropriate - * amount of data is sent. The function uip_mss() can be used to query - * uIP for the amount of data that actually will be sent. - * - * \note This function does not guarantee that the sent data will - * arrive at the destination. If the data is lost in the network, the - * application will be invoked with the uip_rexmit() event being - * set. The application will then have to resend the data using this - * function. - * - * \param data A pointer to the data which is to be sent. - * - * \param len The maximum amount of data bytes to be sent. - * - * \hideinitializer - */ -#ifdef __cplusplus -extern "C" { -#endif -void uip_send(const void *data, int len); -#ifdef __cplusplus -} -#endif -/** - * The length of any incoming data that is currently avaliable (if avaliable) - * in the uip_appdata buffer. - * - * The test function uip_data() must first be used to check if there - * is any data available at all. - * - * \hideinitializer - */ -/*void uip_datalen(void);*/ -#define uip_datalen() uip_len - -/** - * The length of any out-of-band data (urgent data) that has arrived - * on the connection. - * - * \note The configuration parameter UIP_URGDATA must be set for this - * function to be enabled. - * - * \hideinitializer - */ -#define uip_urgdatalen() uip_urglen - -/** - * Close the current connection. - * - * This function will close the current connection in a nice way. - * - * \hideinitializer - */ -#define uip_close() (uip_flags = UIP_CLOSE) - -/** - * Abort the current connection. - * - * This function will abort (reset) the current connection, and is - * usually used when an error has occured that prevents using the - * uip_close() function. - * - * \hideinitializer - */ -#define uip_abort() (uip_flags = UIP_ABORT) - -/** - * Tell the sending host to stop sending data. - * - * This function will close our receiver's window so that we stop - * receiving data for the current connection. - * - * \hideinitializer - */ -#define uip_stop() (uip_conn->tcpstateflags |= UIP_STOPPED) - -/** - * Find out if the current connection has been previously stopped with - * uip_stop(). - * - * \hideinitializer - */ -#define uip_stopped(conn) ((conn)->tcpstateflags & UIP_STOPPED) - -/** - * Restart the current connection, if is has previously been stopped - * with uip_stop(). - * - * This function will open the receiver's window again so that we - * start receiving data for the current connection. - * - * \hideinitializer - */ -#define uip_restart() do { uip_flags |= UIP_NEWDATA; \ - uip_conn->tcpstateflags &= ~UIP_STOPPED; \ - } while(0) - - -/* uIP tests that can be made to determine in what state the current - connection is, and what the application function should do. */ - -/** - * Is the current connection a UDP connection? - * - * This function checks whether the current connection is a UDP connection. - * - * \hideinitializer - * - */ -#define uip_udpconnection() (uip_conn == NULL) - -/** - * Is new incoming data available? - * - * Will reduce to non-zero if there is new data for the application - * present at the uip_appdata pointer. The size of the data is - * avaliable through the uip_len variable. - * - * \hideinitializer - */ -#define uip_newdata() (uip_flags & UIP_NEWDATA) - -/** - * Has previously sent data been acknowledged? - * - * Will reduce to non-zero if the previously sent data has been - * acknowledged by the remote host. This means that the application - * can send new data. - * - * \hideinitializer - */ -#define uip_acked() (uip_flags & UIP_ACKDATA) - -/** - * Has the connection just been connected? - * - * Reduces to non-zero if the current connection has been connected to - * a remote host. This will happen both if the connection has been - * actively opened (with uip_connect()) or passively opened (with - * uip_listen()). - * - * \hideinitializer - */ -#define uip_connected() (uip_flags & UIP_CONNECTED) - -/** - * Has the connection been closed by the other end? - * - * Is non-zero if the connection has been closed by the remote - * host. The application may then do the necessary clean-ups. - * - * \hideinitializer - */ -#define uip_closed() (uip_flags & UIP_CLOSE) - -/** - * Has the connection been aborted by the other end? - * - * Non-zero if the current connection has been aborted (reset) by the - * remote host. - * - * \hideinitializer - */ -#define uip_aborted() (uip_flags & UIP_ABORT) - -/** - * Has the connection timed out? - * - * Non-zero if the current connection has been aborted due to too many - * retransmissions. - * - * \hideinitializer - */ -#define uip_timedout() (uip_flags & UIP_TIMEDOUT) - -/** - * Do we need to retransmit previously data? - * - * Reduces to non-zero if the previously sent data has been lost in - * the network, and the application should retransmit it. The - * application should send the exact same data as it did the last - * time, using the uip_send() function. - * - * \hideinitializer - */ -#define uip_rexmit() (uip_flags & UIP_REXMIT) - -/** - * Is the connection being polled by uIP? - * - * Is non-zero if the reason the application is invoked is that the - * current connection has been idle for a while and should be - * polled. - * - * The polling event can be used for sending data without having to - * wait for the remote host to send data. - * - * \hideinitializer - */ -#define uip_poll() (uip_flags & UIP_POLL) - -/** - * Get the initial maxium segment size (MSS) of the current - * connection. - * - * \hideinitializer - */ -#define uip_initialmss() (uip_conn->initialmss) - -/** - * Get the current maxium segment size that can be sent on the current - * connection. - * - * The current maxiumum segment size that can be sent on the - * connection is computed from the receiver's window and the MSS of - * the connection (which also is available by calling - * uip_initialmss()). - * - * \hideinitializer - */ -#define uip_mss() (uip_conn->mss) - -/** - * Set up a new UDP connection. - * - * This function sets up a new UDP connection. The function will - * automatically allocate an unused local port for the new - * connection. However, another port can be chosen by using the - * uip_udp_bind() call, after the uip_udp_new() function has been - * called. - * - * Example: - \code - uip_ipaddr_t addr; - struct uip_udp_conn *c; - - uip_ipaddr(&addr, 192,168,2,1); - c = uip_udp_new(&addr, HTONS(12345)); - if(c != NULL) { - uip_udp_bind(c, HTONS(12344)); - } - \endcode - * \param ripaddr The IP address of the remote host. - * - * \param rport The remote port number in network byte order. - * - * \return The uip_udp_conn structure for the new connection or NULL - * if no connection could be allocated. - */ -struct uip_udp_conn *uip_udp_new(uip_ipaddr_t *ripaddr, u16_t rport); - -/** - * Removed a UDP connection. - * - * \param conn A pointer to the uip_udp_conn structure for the connection. - * - * \hideinitializer - */ -#define uip_udp_remove(conn) (conn)->lport = 0 - -/** - * Bind a UDP connection to a local port. - * - * \param conn A pointer to the uip_udp_conn structure for the - * connection. - * - * \param port The local port number, in network byte order. - * - * \hideinitializer - */ -#define uip_udp_bind(conn, port) (conn)->lport = port - -/** - * Send a UDP datagram of length len on the current connection. - * - * This function can only be called in response to a UDP event (poll - * or newdata). The data must be present in the uip_buf buffer, at the - * place pointed to by the uip_appdata pointer. - * - * \param len The length of the data in the uip_buf buffer. - * - * \hideinitializer - */ -#define uip_udp_send(len) uip_send((char *)uip_appdata, len) - -/** @} */ - -/* uIP convenience and converting functions. */ - -/** - * \defgroup uipconvfunc uIP conversion functions - * @{ - * - * These functions can be used for converting between different data - * formats used by uIP. - */ - -/** - * Construct an IP address from four bytes. - * - * This function constructs an IP address of the type that uIP handles - * internally from four bytes. The function is handy for specifying IP - * addresses to use with e.g. the uip_connect() function. - * - * Example: - \code - uip_ipaddr_t ipaddr; - struct uip_conn *c; - - uip_ipaddr(&ipaddr, 192,168,1,2); - c = uip_connect(&ipaddr, HTONS(80)); - \endcode - * - * \param addr A pointer to a uip_ipaddr_t variable that will be - * filled in with the IP address. - * - * \param addr0 The first octet of the IP address. - * \param addr1 The second octet of the IP address. - * \param addr2 The third octet of the IP address. - * \param addr3 The forth octet of the IP address. - * - * \hideinitializer - */ -#define uip_ipaddr(addr, addr0,addr1,addr2,addr3) do { \ - ((u16_t *)(addr))[0] = HTONS(((addr0) << 8) | (addr1)); \ - ((u16_t *)(addr))[1] = HTONS(((addr2) << 8) | (addr3)); \ - } while(0) - -/** - * Construct an IPv6 address from eight 16-bit words. - * - * This function constructs an IPv6 address. - * - * \hideinitializer - */ -#define uip_ip6addr(addr, addr0,addr1,addr2,addr3,addr4,addr5,addr6,addr7) do { \ - ((u16_t *)(addr))[0] = HTONS((addr0)); \ - ((u16_t *)(addr))[1] = HTONS((addr1)); \ - ((u16_t *)(addr))[2] = HTONS((addr2)); \ - ((u16_t *)(addr))[3] = HTONS((addr3)); \ - ((u16_t *)(addr))[4] = HTONS((addr4)); \ - ((u16_t *)(addr))[5] = HTONS((addr5)); \ - ((u16_t *)(addr))[6] = HTONS((addr6)); \ - ((u16_t *)(addr))[7] = HTONS((addr7)); \ - } while(0) - -/** - * Copy an IP address to another IP address. - * - * Copies an IP address from one place to another. - * - * Example: - \code - uip_ipaddr_t ipaddr1, ipaddr2; - - uip_ipaddr(&ipaddr1, 192,16,1,2); - uip_ipaddr_copy(&ipaddr2, &ipaddr1); - \endcode - * - * \param dest The destination for the copy. - * \param src The source from where to copy. - * - * \hideinitializer - */ -#if !UIP_CONF_IPV6 -#define uip_ipaddr_copy(dest, src) do { \ - ((u16_t *)dest)[0] = ((u16_t *)src)[0]; \ - ((u16_t *)dest)[1] = ((u16_t *)src)[1]; \ - } while(0) -#else /* !UIP_CONF_IPV6 */ -#define uip_ipaddr_copy(dest, src) memcpy(dest, src, sizeof(uip_ip6addr_t)) -#endif /* !UIP_CONF_IPV6 */ - -/** - * Compare two IP addresses - * - * Compares two IP addresses. - * - * Example: - \code - uip_ipaddr_t ipaddr1, ipaddr2; - - uip_ipaddr(&ipaddr1, 192,16,1,2); - if(uip_ipaddr_cmp(&ipaddr2, &ipaddr1)) { - printf("They are the same"); - } - \endcode - * - * \param addr1 The first IP address. - * \param addr2 The second IP address. - * - * \hideinitializer - */ -#if !UIP_CONF_IPV6 -#define uip_ipaddr_cmp(addr1, addr2) (((u16_t *)addr1)[0] == ((u16_t *)addr2)[0] && \ - ((u16_t *)addr1)[1] == ((u16_t *)addr2)[1]) -#else /* !UIP_CONF_IPV6 */ -#define uip_ipaddr_cmp(addr1, addr2) (memcmp(addr1, addr2, sizeof(uip_ip6addr_t)) == 0) -#endif /* !UIP_CONF_IPV6 */ - -/** - * Compare two IP addresses with netmasks - * - * Compares two IP addresses with netmasks. The masks are used to mask - * out the bits that are to be compared. - * - * Example: - \code - uip_ipaddr_t ipaddr1, ipaddr2, mask; - - uip_ipaddr(&mask, 255,255,255,0); - uip_ipaddr(&ipaddr1, 192,16,1,2); - uip_ipaddr(&ipaddr2, 192,16,1,3); - if(uip_ipaddr_maskcmp(&ipaddr1, &ipaddr2, &mask)) { - printf("They are the same"); - } - \endcode - * - * \param addr1 The first IP address. - * \param addr2 The second IP address. - * \param mask The netmask. - * - * \hideinitializer - */ -#define uip_ipaddr_maskcmp(addr1, addr2, mask) \ - (((((u16_t *)addr1)[0] & ((u16_t *)mask)[0]) == \ - (((u16_t *)addr2)[0] & ((u16_t *)mask)[0])) && \ - ((((u16_t *)addr1)[1] & ((u16_t *)mask)[1]) == \ - (((u16_t *)addr2)[1] & ((u16_t *)mask)[1]))) - - -/** - * Mask out the network part of an IP address. - * - * Masks out the network part of an IP address, given the address and - * the netmask. - * - * Example: - \code - uip_ipaddr_t ipaddr1, ipaddr2, netmask; - - uip_ipaddr(&ipaddr1, 192,16,1,2); - uip_ipaddr(&netmask, 255,255,255,0); - uip_ipaddr_mask(&ipaddr2, &ipaddr1, &netmask); - \endcode - * - * In the example above, the variable "ipaddr2" will contain the IP - * address 192.168.1.0. - * - * \param dest Where the result is to be placed. - * \param src The IP address. - * \param mask The netmask. - * - * \hideinitializer - */ -#define uip_ipaddr_mask(dest, src, mask) do { \ - ((u16_t *)dest)[0] = ((u16_t *)src)[0] & ((u16_t *)mask)[0]; \ - ((u16_t *)dest)[1] = ((u16_t *)src)[1] & ((u16_t *)mask)[1]; \ - } while(0) - -/** - * Pick the first octet of an IP address. - * - * Picks out the first octet of an IP address. - * - * Example: - \code - uip_ipaddr_t ipaddr; - u8_t octet; - - uip_ipaddr(&ipaddr, 1,2,3,4); - octet = uip_ipaddr1(&ipaddr); - \endcode - * - * In the example above, the variable "octet" will contain the value 1. - * - * \hideinitializer - */ -#define uip_ipaddr1(addr) (htons(((u16_t *)(addr))[0]) >> 8) - -/** - * Pick the second octet of an IP address. - * - * Picks out the second octet of an IP address. - * - * Example: - \code - uip_ipaddr_t ipaddr; - u8_t octet; - - uip_ipaddr(&ipaddr, 1,2,3,4); - octet = uip_ipaddr2(&ipaddr); - \endcode - * - * In the example above, the variable "octet" will contain the value 2. - * - * \hideinitializer - */ -#define uip_ipaddr2(addr) (htons(((u16_t *)(addr))[0]) & 0xff) - -/** - * Pick the third octet of an IP address. - * - * Picks out the third octet of an IP address. - * - * Example: - \code - uip_ipaddr_t ipaddr; - u8_t octet; - - uip_ipaddr(&ipaddr, 1,2,3,4); - octet = uip_ipaddr3(&ipaddr); - \endcode - * - * In the example above, the variable "octet" will contain the value 3. - * - * \hideinitializer - */ -#define uip_ipaddr3(addr) (htons(((u16_t *)(addr))[1]) >> 8) - -/** - * Pick the fourth octet of an IP address. - * - * Picks out the fourth octet of an IP address. - * - * Example: - \code - uip_ipaddr_t ipaddr; - u8_t octet; - - uip_ipaddr(&ipaddr, 1,2,3,4); - octet = uip_ipaddr4(&ipaddr); - \endcode - * - * In the example above, the variable "octet" will contain the value 4. - * - * \hideinitializer - */ -#define uip_ipaddr4(addr) (htons(((u16_t *)(addr))[1]) & 0xff) - -/** - * Convert 16-bit quantity from host byte order to network byte order. - * - * This macro is primarily used for converting constants from host - * byte order to network byte order. For converting variables to - * network byte order, use the htons() function instead. - * - * \hideinitializer - */ -#ifndef HTONS -# if UIP_BYTE_ORDER == UIP_BIG_ENDIAN -# define HTONS(n) (n) -# else /* UIP_BYTE_ORDER == UIP_BIG_ENDIAN */ -# define HTONS(n) (u16_t)((((u16_t) (n)) << 8) | (((u16_t) (n)) >> 8)) -# endif /* UIP_BYTE_ORDER == UIP_BIG_ENDIAN */ -#else -#error "HTONS already defined!" -#endif /* HTONS */ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * Convert 16-bit quantity from host byte order to network byte order. - * - * This function is primarily used for converting variables from host - * byte order to network byte order. For converting constants to - * network byte order, use the HTONS() macro instead. - */ -#ifndef htons -u16_t htons(u16_t val); -#endif /* htons */ -#ifndef ntohs -#define ntohs htons -#endif - -#ifdef __cplusplus -} -#endif -/** @} */ - -/** - * Pointer to the application data in the packet buffer. - * - * This pointer points to the application data when the application is - * called. If the application wishes to send data, the application may - * use this space to write the data into before calling uip_send(). - */ -extern void *uip_appdata; - -#if UIP_URGDATA > 0 -/* u8_t *uip_urgdata: - * - * This pointer points to any urgent data that has been received. Only - * present if compiled with support for urgent data (UIP_URGDATA). - */ -extern void *uip_urgdata; -#endif /* UIP_URGDATA > 0 */ - - -/** - * \defgroup uipdrivervars Variables used in uIP device drivers - * @{ - * - * uIP has a few global variables that are used in device drivers for - * uIP. - */ - -/** - * The length of the packet in the uip_buf buffer. - * - * The global variable uip_len holds the length of the packet in the - * uip_buf buffer. - * - * When the network device driver calls the uIP input function, - * uip_len should be set to the length of the packet in the uip_buf - * buffer. - * - * When sending packets, the device driver should use the contents of - * the uip_len variable to determine the length of the outgoing - * packet. - * - */ -extern u16_t uip_len; - -/** @} */ - -#if UIP_URGDATA > 0 -extern u16_t uip_urglen, uip_surglen; -#endif /* UIP_URGDATA > 0 */ - - -/** - * Representation of a uIP TCP connection. - * - * The uip_conn structure is used for identifying a connection. All - * but one field in the structure are to be considered read-only by an - * application. The only exception is the appstate field whos purpose - * is to let the application store application-specific state (e.g., - * file pointers) for the connection. The type of this field is - * configured in the "uipopt.h" header file. - */ -struct uip_conn { - uip_ipaddr_t ripaddr; /**< The IP address of the remote host. */ - - u16_t lport; /**< The local TCP port, in network byte order. */ - u16_t rport; /**< The local remote TCP port, in network byte - order. */ - - u8_t rcv_nxt[4]; /**< The sequence number that we expect to - receive next. */ - u8_t snd_nxt[4]; /**< The sequence number that was last sent by - us. */ - u16_t len; /**< Length of the data that was previously sent. */ - u16_t mss; /**< Current maximum segment size for the - connection. */ - u16_t initialmss; /**< Initial maximum segment size for the - connection. */ - u8_t sa; /**< Retransmission time-out calculation state - variable. */ - u8_t sv; /**< Retransmission time-out calculation state - variable. */ - u8_t rto; /**< Retransmission time-out. */ - u8_t tcpstateflags; /**< TCP state and flags. */ - u8_t timer; /**< The retransmission timer. */ - u8_t nrtx; /**< The number of retransmissions for the last - segment sent. */ - - /** The application state. */ - uip_tcp_appstate_t appstate; -}; - - -/** - * Pointer to the current TCP connection. - * - * The uip_conn pointer can be used to access the current TCP - * connection. - */ -extern struct uip_conn *uip_conn; -/* The array containing all uIP connections. */ -extern struct uip_conn uip_conns[UIP_CONNS]; -/** - * \addtogroup uiparch - * @{ - */ - -/** - * 4-byte array used for the 32-bit sequence number calculations. - */ -extern u8_t uip_acc32[4]; - -/** @} */ - - -#if UIP_UDP -/** - * Representation of a uIP UDP connection. - */ -struct uip_udp_conn { - uip_ipaddr_t ripaddr; /**< The IP address of the remote peer. */ - u16_t lport; /**< The local port number in network byte order. */ - u16_t rport; /**< The remote port number in network byte order. */ - u8_t ttl; /**< Default time-to-live. */ - - /** The application state. */ - uip_udp_appstate_t appstate; -}; - -/** - * The current UDP connection. - */ -extern struct uip_udp_conn *uip_udp_conn; -extern struct uip_udp_conn uip_udp_conns[UIP_UDP_CONNS]; -#endif /* UIP_UDP */ - -/** - * The structure holding the TCP/IP statistics that are gathered if - * UIP_STATISTICS is set to 1. - * - */ -struct uip_stats { - struct { - uip_stats_t drop; /**< Number of dropped packets at the IP - layer. */ - uip_stats_t recv; /**< Number of received packets at the IP - layer. */ - uip_stats_t sent; /**< Number of sent packets at the IP - layer. */ - uip_stats_t vhlerr; /**< Number of packets dropped due to wrong - IP version or header length. */ - uip_stats_t hblenerr; /**< Number of packets dropped due to wrong - IP length, high byte. */ - uip_stats_t lblenerr; /**< Number of packets dropped due to wrong - IP length, low byte. */ - uip_stats_t fragerr; /**< Number of packets dropped since they - were IP fragments. */ - uip_stats_t chkerr; /**< Number of packets dropped due to IP - checksum errors. */ - uip_stats_t protoerr; /**< Number of packets dropped since they - were neither ICMP, UDP nor TCP. */ - } ip; /**< IP statistics. */ - struct { - uip_stats_t drop; /**< Number of dropped ICMP packets. */ - uip_stats_t recv; /**< Number of received ICMP packets. */ - uip_stats_t sent; /**< Number of sent ICMP packets. */ - uip_stats_t typeerr; /**< Number of ICMP packets with a wrong - type. */ - } icmp; /**< ICMP statistics. */ - struct { - uip_stats_t drop; /**< Number of dropped TCP segments. */ - uip_stats_t recv; /**< Number of recived TCP segments. */ - uip_stats_t sent; /**< Number of sent TCP segments. */ - uip_stats_t chkerr; /**< Number of TCP segments with a bad - checksum. */ - uip_stats_t ackerr; /**< Number of TCP segments with a bad ACK - number. */ - uip_stats_t rst; /**< Number of recevied TCP RST (reset) segments. */ - uip_stats_t rexmit; /**< Number of retransmitted TCP segments. */ - uip_stats_t syndrop; /**< Number of dropped SYNs due to too few - connections was avaliable. */ - uip_stats_t synrst; /**< Number of SYNs for closed ports, - triggering a RST. */ - } tcp; /**< TCP statistics. */ -#if UIP_UDP - struct { - uip_stats_t drop; /**< Number of dropped UDP segments. */ - uip_stats_t recv; /**< Number of recived UDP segments. */ - uip_stats_t sent; /**< Number of sent UDP segments. */ - uip_stats_t chkerr; /**< Number of UDP segments with a bad - checksum. */ - } udp; /**< UDP statistics. */ -#endif /* UIP_UDP */ -}; - -/** - * The uIP TCP/IP statistics. - * - * This is the variable in which the uIP TCP/IP statistics are gathered. - */ -extern struct uip_stats uip_stat; - - -/*---------------------------------------------------------------------------*/ -/* All the stuff below this point is internal to uIP and should not be - * used directly by an application or by a device driver. - */ -/*---------------------------------------------------------------------------*/ -/* u8_t uip_flags: - * - * When the application is called, uip_flags will contain the flags - * that are defined in this file. Please read below for more - * infomation. - */ -extern u8_t uip_flags; - -/* The following flags may be set in the global variable uip_flags - before calling the application callback. The UIP_ACKDATA, - UIP_NEWDATA, and UIP_CLOSE flags may both be set at the same time, - whereas the others are mutualy exclusive. Note that these flags - should *NOT* be accessed directly, but only through the uIP - functions/macros. */ - -#define UIP_ACKDATA 1 /* Signifies that the outstanding data was - acked and the application should send - out new data instead of retransmitting - the last data. */ -#define UIP_NEWDATA 2 /* Flags the fact that the peer has sent - us new data. */ -#define UIP_REXMIT 4 /* Tells the application to retransmit the - data that was last sent. */ -#define UIP_POLL 8 /* Used for polling the application, to - check if the application has data that - it wants to send. */ -#define UIP_CLOSE 16 /* The remote host has closed the - connection, thus the connection has - gone away. Or the application signals - that it wants to close the - connection. */ -#define UIP_ABORT 32 /* The remote host has aborted the - connection, thus the connection has - gone away. Or the application signals - that it wants to abort the - connection. */ -#define UIP_CONNECTED 64 /* We have got a connection from a remote - host and have set up a new connection - for it, or an active connection has - been successfully established. */ - -#define UIP_TIMEDOUT 128 /* The connection has been aborted due to - too many retransmissions. */ - -#ifdef __cplusplus -extern "C" { -#endif -/* uip_process(flag): - * - * The actual uIP function which does all the work. - */ -void uip_process(u8_t flag); -#ifdef __cplusplus -} -#endif - -/* The following flags are passed as an argument to the uip_process() - function. They are used to distinguish between the two cases where - uip_process() is called. It can be called either because we have - incoming data that should be processed, or because the periodic - timer has fired. These values are never used directly, but only in - the macrose defined in this file. */ - -#define UIP_DATA 1 /* Tells uIP that there is incoming - data in the uip_buf buffer. The - length of the data is stored in the - global variable uip_len. */ -#define UIP_TIMER 2 /* Tells uIP that the periodic timer - has fired. */ -#define UIP_POLL_REQUEST 3 /* Tells uIP that a connection should - be polled. */ -#define UIP_UDP_SEND_CONN 4 /* Tells uIP that a UDP datagram - should be constructed in the - uip_buf buffer. */ -#if UIP_UDP -#define UIP_UDP_TIMER 5 -#endif /* UIP_UDP */ - -/* The TCP states used in the uip_conn->tcpstateflags. */ -#define UIP_CLOSED 0 -#define UIP_SYN_RCVD 1 -#define UIP_SYN_SENT 2 -#define UIP_ESTABLISHED 3 -#define UIP_FIN_WAIT_1 4 -#define UIP_FIN_WAIT_2 5 -#define UIP_CLOSING 6 -#define UIP_TIME_WAIT 7 -#define UIP_LAST_ACK 8 -#define UIP_TS_MASK 15 - -#define UIP_STOPPED 16 - -/* The TCP and IP headers. */ -struct uip_tcpip_hdr { -#if UIP_CONF_IPV6 - /* IPv6 header. */ - u8_t vtc, - tcflow; - u16_t flow; - u8_t len[2]; - u8_t proto, ttl; - uip_ip6addr_t srcipaddr, destipaddr; -#else /* UIP_CONF_IPV6 */ - /* IPv4 header. */ - u8_t vhl, - tos, - len[2], - ipid[2], - ipoffset[2], - ttl, - proto; - u16_t ipchksum; - u16_t srcipaddr[2], - destipaddr[2]; -#endif /* UIP_CONF_IPV6 */ - - /* TCP header. */ - u16_t srcport, - destport; - u8_t seqno[4], - ackno[4], - tcpoffset, - flags, - wnd[2]; - u16_t tcpchksum; - u8_t urgp[2]; - u8_t optdata[4]; -}; - -/* The ICMP and IP headers. */ -struct uip_icmpip_hdr { -#if UIP_CONF_IPV6 - /* IPv6 header. */ - u8_t vtc, - tcf; - u16_t flow; - u8_t len[2]; - u8_t proto, ttl; - uip_ip6addr_t srcipaddr, destipaddr; -#else /* UIP_CONF_IPV6 */ - /* IPv4 header. */ - u8_t vhl, - tos, - len[2], - ipid[2], - ipoffset[2], - ttl, - proto; - u16_t ipchksum; - u16_t srcipaddr[2], - destipaddr[2]; -#endif /* UIP_CONF_IPV6 */ - - /* ICMP (echo) header. */ - u8_t type, icode; - u16_t icmpchksum; -#if !UIP_CONF_IPV6 - u16_t id, seqno; -#else /* !UIP_CONF_IPV6 */ - u8_t flags, reserved1, reserved2, reserved3; - u8_t icmp6data[16]; - u8_t options[1]; -#endif /* !UIP_CONF_IPV6 */ -}; - - -/* The UDP and IP headers. */ -struct uip_udpip_hdr { -#if UIP_CONF_IPV6 - /* IPv6 header. */ - u8_t vtc, - tcf; - u16_t flow; - u8_t len[2]; - u8_t proto, ttl; - uip_ip6addr_t srcipaddr, destipaddr; -#else /* UIP_CONF_IPV6 */ - /* IP header. */ - u8_t vhl, - tos, - len[2], - ipid[2], - ipoffset[2], - ttl, - proto; - u16_t ipchksum; - u16_t srcipaddr[2], - destipaddr[2]; -#endif /* UIP_CONF_IPV6 */ - - /* UDP header. */ - u16_t srcport, - destport; - u16_t udplen; - u16_t udpchksum; -}; - - - -/** - * The buffer size available for user data in the \ref uip_buf buffer. - * - * This macro holds the available size for user data in the \ref - * uip_buf buffer. The macro is intended to be used for checking - * bounds of available user data. - * - * Example: - \code - snprintf(uip_appdata, UIP_APPDATA_SIZE, "%u\n", i); - \endcode - * - * \hideinitializer - */ -#define UIP_APPDATA_SIZE (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN) - - -#define UIP_PROTO_ICMP 1 -#define UIP_PROTO_TCP 6 -#define UIP_PROTO_UDP 17 -#define UIP_PROTO_ICMP6 58 - -/* Header sizes. */ -#if UIP_CONF_IPV6 -#define UIP_IPH_LEN 40 -#else /* UIP_CONF_IPV6 */ -#define UIP_IPH_LEN 20 /* Size of IP header */ -#endif /* UIP_CONF_IPV6 */ -#define UIP_UDPH_LEN 8 /* Size of UDP header */ -#define UIP_TCPH_LEN 20 /* Size of TCP header */ -#define UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN) /* Size of IP + - UDP - header */ -#define UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN) /* Size of IP + - TCP - header */ -#define UIP_TCPIP_HLEN UIP_IPTCPH_LEN - - -#if UIP_FIXEDADDR -extern const uip_ipaddr_t uip_hostaddr, uip_netmask, uip_draddr; -#else /* UIP_FIXEDADDR */ -extern uip_ipaddr_t uip_hostaddr, uip_netmask, uip_draddr; -#endif /* UIP_FIXEDADDR */ - - - -/** - * Representation of a 48-bit Ethernet address. - */ -struct uip_eth_addr { - u8_t addr[6]; -}; - -/** - * Calculate the Internet checksum over a buffer. - * - * The Internet checksum is the one's complement of the one's - * complement sum of all 16-bit words in the buffer. - * - * See RFC1071. - * - * \param buf A pointer to the buffer over which the checksum is to be - * computed. - * - * \param len The length of the buffer over which the checksum is to - * be computed. - * - * \return The Internet checksum of the buffer. - */ -u16_t uip_chksum(u16_t *buf, u16_t len); - -/** - * Calculate the IP header checksum of the packet header in uip_buf. - * - * The IP header checksum is the Internet checksum of the 20 bytes of - * the IP header. - * - * \return The IP header checksum of the IP header in the uip_buf - * buffer. - */ -u16_t uip_ipchksum(void); - -/** - * Calculate the TCP checksum of the packet in uip_buf and uip_appdata. - * - * The TCP checksum is the Internet checksum of data contents of the - * TCP segment, and a pseudo-header as defined in RFC793. - * - * \return The TCP checksum of the TCP segment in uip_buf and pointed - * to by uip_appdata. - */ -u16_t uip_tcpchksum(void); - -/** - * Calculate the UDP checksum of the packet in uip_buf and uip_appdata. - * - * The UDP checksum is the Internet checksum of data contents of the - * UDP segment, and a pseudo-header as defined in RFC768. - * - * \return The UDP checksum of the UDP segment in uip_buf and pointed - * to by uip_appdata. - */ -u16_t uip_udpchksum(void); - - -#endif /* __UIP_H__ */ - - -/** @} */
--- a/libs/Network/uip/uip/uip_arch.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,138 +0,0 @@ -/** - * \addtogroup uip - * {@ - */ - -/** - * \defgroup uiparch Architecture specific uIP functions - * @{ - * - * The functions in the architecture specific module implement the IP - * check sum and 32-bit additions. - * - * The IP checksum calculation is the most computationally expensive - * operation in the TCP/IP stack and it therefore pays off to - * implement this in efficient assembler. The purpose of the uip-arch - * module is to let the checksum functions to be implemented in - * architecture specific assembler. - * - */ - -/** - * \file - * Declarations of architecture specific functions. - * \author Adam Dunkels <adam@dunkels.com> - */ - -/* - * Copyright (c) 2001, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack. - * - * $Id: uip_arch.h,v 1.2 2006/06/07 09:15:19 adam Exp $ - * - */ - -#ifndef __UIP_ARCH_H__ -#define __UIP_ARCH_H__ - -#include "uip.h" - -/** - * Carry out a 32-bit addition. - * - * Because not all architectures for which uIP is intended has native - * 32-bit arithmetic, uIP uses an external C function for doing the - * required 32-bit additions in the TCP protocol processing. This - * function should add the two arguments and place the result in the - * global variable uip_acc32. - * - * \note The 32-bit integer pointed to by the op32 parameter and the - * result in the uip_acc32 variable are in network byte order (big - * endian). - * - * \param op32 A pointer to a 4-byte array representing a 32-bit - * integer in network byte order (big endian). - * - * \param op16 A 16-bit integer in host byte order. - */ -void uip_add32(u8_t *op32, u16_t op16); - -/** - * Calculate the Internet checksum over a buffer. - * - * The Internet checksum is the one's complement of the one's - * complement sum of all 16-bit words in the buffer. - * - * See RFC1071. - * - * \note This function is not called in the current version of uIP, - * but future versions might make use of it. - * - * \param buf A pointer to the buffer over which the checksum is to be - * computed. - * - * \param len The length of the buffer over which the checksum is to - * be computed. - * - * \return The Internet checksum of the buffer. - */ -u16_t uip_chksum(u16_t *buf, u16_t len); - -/** - * Calculate the IP header checksum of the packet header in uip_buf. - * - * The IP header checksum is the Internet checksum of the 20 bytes of - * the IP header. - * - * \return The IP header checksum of the IP header in the uip_buf - * buffer. - */ -u16_t uip_ipchksum(void); - -/** - * Calculate the TCP checksum of the packet in uip_buf and uip_appdata. - * - * The TCP checksum is the Internet checksum of data contents of the - * TCP segment, and a pseudo-header as defined in RFC793. - * - * \note The uip_appdata pointer that points to the packet data may - * point anywhere in memory, so it is not possible to simply calculate - * the Internet checksum of the contents of the uip_buf buffer. - * - * \return The TCP checksum of the TCP segment in uip_buf and pointed - * to by uip_appdata. - */ -u16_t uip_tcpchksum(void); - -u16_t uip_udpchksum(void); - -/** @} */ -/** @} */ - -#endif /* __UIP_ARCH_H__ */
--- a/libs/Network/uip/uip/uip_arp.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,428 +0,0 @@ -#pragma GCC diagnostic ignored "-Wredundant-decls" -#pragma GCC diagnostic ignored "-Wstrict-aliasing" -#pragma GCC diagnostic ignored "-Wcast-align" -#pragma GCC diagnostic ignored "-Wcast-qual" - -/** - * \addtogroup uip - * @{ - */ - -/** - * \defgroup uiparp uIP Address Resolution Protocol - * @{ - * - * The Address Resolution Protocol ARP is used for mapping between IP - * addresses and link level addresses such as the Ethernet MAC - * addresses. ARP uses broadcast queries to ask for the link level - * address of a known IP address and the host which is configured with - * the IP address for which the query was meant, will respond with its - * link level address. - * - * \note This ARP implementation only supports Ethernet. - */ - -/** - * \file - * Implementation of the ARP Address Resolution Protocol. - * \author Adam Dunkels <adam@dunkels.com> - * - */ - -/* - * Copyright (c) 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack. - * - * $Id: uip_arp.c,v 1.8 2006/06/02 23:36:21 adam Exp $ - * - */ - - -#include "uip_arp.h" - -#include <string.h> - -struct arp_hdr { - struct uip_eth_hdr ethhdr; - u16_t hwtype; - u16_t protocol; - u8_t hwlen; - u8_t protolen; - u16_t opcode; - struct uip_eth_addr shwaddr; - u16_t sipaddr[2]; - struct uip_eth_addr dhwaddr; - u16_t dipaddr[2]; -}; - -struct ethip_hdr { - struct uip_eth_hdr ethhdr; - /* IP header. */ - u8_t vhl, - tos, - len[2], - ipid[2], - ipoffset[2], - ttl, - proto; - u16_t ipchksum; - u16_t srcipaddr[2], - destipaddr[2]; -}; - -#define ARP_REQUEST 1 -#define ARP_REPLY 2 - -#define ARP_HWTYPE_ETH 1 - -struct arp_entry { - u16_t ipaddr[2]; - struct uip_eth_addr ethaddr; - u8_t time; -}; - -static const struct uip_eth_addr broadcast_ethaddr = - {{0xff,0xff,0xff,0xff,0xff,0xff}}; -static const u16_t broadcast_ipaddr[2] = {0xffff,0xffff}; - -static struct arp_entry arp_table[UIP_ARPTAB_SIZE] __attribute__ ((section ("AHBSRAM1"))); -static u16_t ipaddr[2]; -static u8_t i, c; - -static u8_t arptime; -static u8_t tmpage; - -#define BUF ((struct arp_hdr *)&uip_buf[0]) -#define IPBUF ((struct ethip_hdr *)&uip_buf[0]) -/*-----------------------------------------------------------------------------------*/ -/** - * Initialize the ARP module. - * - */ -/*-----------------------------------------------------------------------------------*/ -void -uip_arp_init(void) -{ - for(i = 0; i < UIP_ARPTAB_SIZE; ++i) { - memset(arp_table[i].ipaddr, 0, 4); - } -} -/*-----------------------------------------------------------------------------------*/ -/** - * Periodic ARP processing function. - * - * This function performs periodic timer processing in the ARP module - * and should be called at regular intervals. The recommended interval - * is 10 seconds between the calls. - * - */ -/*-----------------------------------------------------------------------------------*/ -void -uip_arp_timer(void) -{ - struct arp_entry *tabptr; - - ++arptime; - for(i = 0; i < UIP_ARPTAB_SIZE; ++i) { - tabptr = &arp_table[i]; - if((tabptr->ipaddr[0] | tabptr->ipaddr[1]) != 0 && - arptime - tabptr->time >= UIP_ARP_MAXAGE) { - memset(tabptr->ipaddr, 0, 4); - } - } - -} -/*-----------------------------------------------------------------------------------*/ -static void -uip_arp_update(u16_t *ipaddr, struct uip_eth_addr *ethaddr) -{ - register struct arp_entry *tabptr; - /* Walk through the ARP mapping table and try to find an entry to - update. If none is found, the IP -> MAC address mapping is - inserted in the ARP table. */ - for(i = 0; i < UIP_ARPTAB_SIZE; ++i) { - - tabptr = &arp_table[i]; - /* Only check those entries that are actually in use. */ - if(tabptr->ipaddr[0] != 0 && - tabptr->ipaddr[1] != 0) { - - /* Check if the source IP address of the incoming packet matches - the IP address in this ARP table entry. */ - if(ipaddr[0] == tabptr->ipaddr[0] && - ipaddr[1] == tabptr->ipaddr[1]) { - - /* An old entry found, update this and return. */ - memcpy(tabptr->ethaddr.addr, ethaddr->addr, 6); - tabptr->time = arptime; - - return; - } - } - } - - /* If we get here, no existing ARP table entry was found, so we - create one. */ - - /* First, we try to find an unused entry in the ARP table. */ - for(i = 0; i < UIP_ARPTAB_SIZE; ++i) { - tabptr = &arp_table[i]; - if(tabptr->ipaddr[0] == 0 && - tabptr->ipaddr[1] == 0) { - break; - } - } - - /* If no unused entry is found, we try to find the oldest entry and - throw it away. */ - if(i == UIP_ARPTAB_SIZE) { - tmpage = 0; - c = 0; - for(i = 0; i < UIP_ARPTAB_SIZE; ++i) { - tabptr = &arp_table[i]; - if(arptime - tabptr->time > tmpage) { - tmpage = arptime - tabptr->time; - c = i; - } - } - i = c; - tabptr = &arp_table[i]; - } - - /* Now, i is the ARP table entry which we will fill with the new - information. */ - memcpy(tabptr->ipaddr, ipaddr, 4); - memcpy(tabptr->ethaddr.addr, ethaddr->addr, 6); - tabptr->time = arptime; -} -/*-----------------------------------------------------------------------------------*/ -/** - * ARP processing for incoming IP packets - * - * This function should be called by the device driver when an IP - * packet has been received. The function will check if the address is - * in the ARP cache, and if so the ARP cache entry will be - * refreshed. If no ARP cache entry was found, a new one is created. - * - * This function expects an IP packet with a prepended Ethernet header - * in the uip_buf[] buffer, and the length of the packet in the global - * variable uip_len. - */ -/*-----------------------------------------------------------------------------------*/ -#if 0 -void -uip_arp_ipin(void) -{ - uip_len -= sizeof(struct uip_eth_hdr); - - /* Only insert/update an entry if the source IP address of the - incoming IP packet comes from a host on the local network. */ - if((IPBUF->srcipaddr[0] & uip_netmask[0]) != - (uip_hostaddr[0] & uip_netmask[0])) { - return; - } - if((IPBUF->srcipaddr[1] & uip_netmask[1]) != - (uip_hostaddr[1] & uip_netmask[1])) { - return; - } - uip_arp_update(IPBUF->srcipaddr, &(IPBUF->ethhdr.src)); - - return; -} -#endif /* 0 */ -/*-----------------------------------------------------------------------------------*/ -/** - * ARP processing for incoming ARP packets. - * - * This function should be called by the device driver when an ARP - * packet has been received. The function will act differently - * depending on the ARP packet type: if it is a reply for a request - * that we previously sent out, the ARP cache will be filled in with - * the values from the ARP reply. If the incoming ARP packet is an ARP - * request for our IP address, an ARP reply packet is created and put - * into the uip_buf[] buffer. - * - * When the function returns, the value of the global variable uip_len - * indicates whether the device driver should send out a packet or - * not. If uip_len is zero, no packet should be sent. If uip_len is - * non-zero, it contains the length of the outbound packet that is - * present in the uip_buf[] buffer. - * - * This function expects an ARP packet with a prepended Ethernet - * header in the uip_buf[] buffer, and the length of the packet in the - * global variable uip_len. - */ -/*-----------------------------------------------------------------------------------*/ -void -uip_arp_arpin(void) -{ - - if(uip_len < sizeof(struct arp_hdr)) { - uip_len = 0; - return; - } - uip_len = 0; - - switch(BUF->opcode) { - case HTONS(ARP_REQUEST): - /* ARP request. If it asked for our address, we send out a - reply. */ - if(uip_ipaddr_cmp(BUF->dipaddr, uip_hostaddr)) { - /* First, we register the one who made the request in our ARP - table, since it is likely that we will do more communication - with this host in the future. */ - uip_arp_update(BUF->sipaddr, &BUF->shwaddr); - - /* The reply opcode is 2. */ - BUF->opcode = HTONS(2); - - memcpy(BUF->dhwaddr.addr, BUF->shwaddr.addr, 6); - memcpy(BUF->shwaddr.addr, uip_ethaddr.addr, 6); - memcpy(BUF->ethhdr.src.addr, uip_ethaddr.addr, 6); - memcpy(BUF->ethhdr.dest.addr, BUF->dhwaddr.addr, 6); - - BUF->dipaddr[0] = BUF->sipaddr[0]; - BUF->dipaddr[1] = BUF->sipaddr[1]; - BUF->sipaddr[0] = uip_hostaddr[0]; - BUF->sipaddr[1] = uip_hostaddr[1]; - - BUF->ethhdr.type = HTONS(UIP_ETHTYPE_ARP); - uip_len = sizeof(struct arp_hdr); - } - break; - case HTONS(ARP_REPLY): - /* ARP reply. We insert or update the ARP table if it was meant - for us. */ - if(uip_ipaddr_cmp(BUF->dipaddr, uip_hostaddr)) { - uip_arp_update(BUF->sipaddr, &BUF->shwaddr); - } - break; - } - - return; -} -/*-----------------------------------------------------------------------------------*/ -/** - * Prepend Ethernet header to an outbound IP packet and see if we need - * to send out an ARP request. - * - * This function should be called before sending out an IP packet. The - * function checks the destination IP address of the IP packet to see - * what Ethernet MAC address that should be used as a destination MAC - * address on the Ethernet. - * - * If the destination IP address is in the local network (determined - * by logical ANDing of netmask and our IP address), the function - * checks the ARP cache to see if an entry for the destination IP - * address is found. If so, an Ethernet header is prepended and the - * function returns. If no ARP cache entry is found for the - * destination IP address, the packet in the uip_buf[] is replaced by - * an ARP request packet for the IP address. The IP packet is dropped - * and it is assumed that they higher level protocols (e.g., TCP) - * eventually will retransmit the dropped packet. - * - * If the destination IP address is not on the local network, the IP - * address of the default router is used instead. - * - * When the function returns, a packet is present in the uip_buf[] - * buffer, and the length of the packet is in the global variable - * uip_len. - */ -/*-----------------------------------------------------------------------------------*/ -void -uip_arp_out(void) -{ - struct arp_entry *tabptr; - - /* Find the destination IP address in the ARP table and construct - the Ethernet header. If the destination IP addres isn't on the - local network, we use the default router's IP address instead. - - If not ARP table entry is found, we overwrite the original IP - packet with an ARP request for the IP address. */ - - /* First check if destination is a local broadcast. */ - if(uip_ipaddr_cmp(IPBUF->destipaddr, broadcast_ipaddr)) { - memcpy(IPBUF->ethhdr.dest.addr, broadcast_ethaddr.addr, 6); - } else { - /* Check if the destination address is on the local network. */ - if(!uip_ipaddr_maskcmp(IPBUF->destipaddr, uip_hostaddr, uip_netmask)) { - /* Destination address was not on the local network, so we need to - use the default router's IP address instead of the destination - address when determining the MAC address. */ - uip_ipaddr_copy(ipaddr, uip_draddr); - } else { - /* Else, we use the destination IP address. */ - uip_ipaddr_copy(ipaddr, IPBUF->destipaddr); - } - - for(i = 0; i < UIP_ARPTAB_SIZE; ++i) { - tabptr = &arp_table[i]; - if(uip_ipaddr_cmp(ipaddr, tabptr->ipaddr)) { - break; - } - } - - if(i == UIP_ARPTAB_SIZE) { - /* The destination address was not in our ARP table, so we - overwrite the IP packet with an ARP request. */ - - memset(BUF->ethhdr.dest.addr, 0xff, 6); - memset(BUF->dhwaddr.addr, 0x00, 6); - memcpy(BUF->ethhdr.src.addr, uip_ethaddr.addr, 6); - memcpy(BUF->shwaddr.addr, uip_ethaddr.addr, 6); - - uip_ipaddr_copy(BUF->dipaddr, ipaddr); - uip_ipaddr_copy(BUF->sipaddr, uip_hostaddr); - BUF->opcode = HTONS(ARP_REQUEST); /* ARP request. */ - BUF->hwtype = HTONS(ARP_HWTYPE_ETH); - BUF->protocol = HTONS(UIP_ETHTYPE_IP); - BUF->hwlen = 6; - BUF->protolen = 4; - BUF->ethhdr.type = HTONS(UIP_ETHTYPE_ARP); - - uip_appdata = &uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN]; - - uip_len = sizeof(struct arp_hdr); - return; - } - - /* Build an ethernet header. */ - memcpy(IPBUF->ethhdr.dest.addr, tabptr->ethaddr.addr, 6); - } - memcpy(IPBUF->ethhdr.src.addr, uip_ethaddr.addr, 6); - - IPBUF->ethhdr.type = HTONS(UIP_ETHTYPE_IP); - - uip_len += sizeof(struct uip_eth_hdr); -} -/*-----------------------------------------------------------------------------------*/ - -/** @} */ -/** @} */
--- a/libs/Network/uip/uip/uip_arp.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,150 +0,0 @@ -/** - * \addtogroup uip - * @{ - */ - -/** - * \addtogroup uiparp - * @{ - */ - -/** - * \file - * Macros and definitions for the ARP module. - * \author Adam Dunkels <adam@dunkels.com> - */ - - -/* - * Copyright (c) 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack. - * - * $Id: uip_arp.h,v 1.5 2006/06/11 21:46:39 adam Exp $ - * - */ - -#ifndef __UIP_ARP_H__ -#define __UIP_ARP_H__ - -#include "uip.h" - - -extern struct uip_eth_addr uip_ethaddr; - -/** - * The Ethernet header. - */ -struct uip_eth_hdr { - struct uip_eth_addr dest; - struct uip_eth_addr src; - u16_t type; -}; - -#define UIP_ETHTYPE_ARP 0x0806 -#define UIP_ETHTYPE_IP 0x0800 -#define UIP_ETHTYPE_IP6 0x86dd - -#ifdef __cplusplus -extern "C" { -#endif - -/* The uip_arp_init() function must be called before any of the other - ARP functions. */ -void uip_arp_init(void); - -/* The uip_arp_ipin() function should be called whenever an IP packet - arrives from the Ethernet. This function refreshes the ARP table or - inserts a new mapping if none exists. The function assumes that an - IP packet with an Ethernet header is present in the uip_buf buffer - and that the length of the packet is in the uip_len variable. */ -/*void uip_arp_ipin(void);*/ -#define uip_arp_ipin() - -/* The uip_arp_arpin() should be called when an ARP packet is received - by the Ethernet driver. This function also assumes that the - Ethernet frame is present in the uip_buf buffer. When the - uip_arp_arpin() function returns, the contents of the uip_buf - buffer should be sent out on the Ethernet if the uip_len variable - is > 0. */ -void uip_arp_arpin(void); - -/* The uip_arp_out() function should be called when an IP packet - should be sent out on the Ethernet. This function creates an - Ethernet header before the IP header in the uip_buf buffer. The - Ethernet header will have the correct Ethernet MAC destination - address filled in if an ARP table entry for the destination IP - address (or the IP address of the default router) is present. If no - such table entry is found, the IP packet is overwritten with an ARP - request and we rely on TCP to retransmit the packet that was - overwritten. In any case, the uip_len variable holds the length of - the Ethernet frame that should be transmitted. */ -void uip_arp_out(void); - -/* The uip_arp_timer() function should be called every ten seconds. It - is responsible for flushing old entries in the ARP table. */ -void uip_arp_timer(void); -#ifdef __cplusplus -} -#endif - -/** @} */ - -/** - * \addtogroup uipconffunc - * @{ - */ - - -/** - * Specifiy the Ethernet MAC address. - * - * The ARP code needs to know the MAC address of the Ethernet card in - * order to be able to respond to ARP queries and to generate working - * Ethernet headers. - * - * \note This macro only specifies the Ethernet MAC address to the ARP - * code. It cannot be used to change the MAC address of the Ethernet - * card. - * - * \param eaddr A pointer to a struct uip_eth_addr containing the - * Ethernet MAC address of the Ethernet card. - * - * \hideinitializer - */ -#define uip_setethaddr(eaddr) do {uip_ethaddr.addr[0] = eaddr[0]; \ - uip_ethaddr.addr[1] = eaddr[1];\ - uip_ethaddr.addr[2] = eaddr[2];\ - uip_ethaddr.addr[3] = eaddr[3];\ - uip_ethaddr.addr[4] = eaddr[4];\ - uip_ethaddr.addr[5] = eaddr[5];} while(0) - -/** @} */ -/** @} */ - -#endif /* __UIP_ARP_H__ */
--- a/libs/Network/uip/uip/uiplib.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,74 +0,0 @@ -/* - * Copyright (c) 2004, Adam Dunkels and the Swedish Institute of - * Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: uiplib.c,v 1.2 2006/06/12 08:00:31 adam Exp $ - * - */ - - -#include "uip.h" -#include "uiplib.h" - - -/*-----------------------------------------------------------------------------------*/ -unsigned char -uiplib_ipaddrconv(char *addrstr, unsigned char *ipaddr) -{ - unsigned char tmp; - char c; - unsigned char i, j; - - tmp = 0; - - for(i = 0; i < 4; ++i) { - j = 0; - do { - c = *addrstr; - ++j; - if(j > 4) { - return 0; - } - if(c == '.' || c == 0) { - *ipaddr = tmp; - ++ipaddr; - tmp = 0; - } else if(c >= '0' && c <= '9') { - tmp = (tmp * 10) + (c - '0'); - } else { - return 0; - } - ++addrstr; - } while(c != '.' && c != 0); - } - return 1; -} - -/*-----------------------------------------------------------------------------------*/
--- a/libs/Network/uip/uip/uiplib.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,71 +0,0 @@ -/** - * \file - * Various uIP library functions. - * \author - * Adam Dunkels <adam@sics.se> - * - */ - -/* - * Copyright (c) 2002, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: uiplib.h,v 1.1 2006/06/07 09:15:19 adam Exp $ - * - */ -#ifndef __UIPLIB_H__ -#define __UIPLIB_H__ - -/** - * \addtogroup uipconvfunc - * @{ - */ - -/** - * Convert a textual representation of an IP address to a numerical representation. - * - * This function takes a textual representation of an IP address in - * the form a.b.c.d and converts it into a 4-byte array that can be - * used by other uIP functions. - * - * \param addrstr A pointer to a string containing the IP address in - * textual form. - * - * \param addr A pointer to a 4-byte array that will be filled in with - * the numerical representation of the address. - * - * \retval 0 If the IP address could not be parsed. - * \retval Non-zero If the IP address was parsed. - */ -unsigned char uiplib_ipaddrconv(char *addrstr, unsigned char *addr); - -/** @} */ - -#endif /* __UIPLIB_H__ */
--- a/libs/Network/uip/uip/uipopt.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,546 +0,0 @@ -/** - * \defgroup uipopt Configuration options for uIP - * @{ - * - * uIP is configured using the per-project configuration file - * uipopt.h. This file contains all compile-time options for uIP and - * should be tweaked to match each specific project. The uIP - * distribution contains a documented example "uipopt.h" that can be - * copied and modified for each project. - * - * \note Most of the configuration options in the uipopt.h should not - * be changed, but rather the per-project uip-conf.h file. - */ - -/** - * \file - * Configuration options for uIP. - * \author Adam Dunkels <adam@dunkels.com> - * - * This file is used for tweaking various configuration options for - * uIP. You should make a copy of this file into one of your project's - * directories instead of editing this example "uipopt.h" file that - * comes with the uIP distribution. - */ - -/* - * Copyright (c) 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack. - * - * $Id: uipopt.h,v 1.4 2006/06/12 08:00:31 adam Exp $ - * - */ - -#ifndef __UIPOPT_H__ -#define __UIPOPT_H__ - -#ifndef UIP_LITTLE_ENDIAN -#define UIP_LITTLE_ENDIAN 3412 -#endif /* UIP_LITTLE_ENDIAN */ -#ifndef UIP_BIG_ENDIAN -#define UIP_BIG_ENDIAN 1234 -#endif /* UIP_BIG_ENDIAN */ - -#include "uip-conf.h" - -/*------------------------------------------------------------------------------*/ - -/** - * \name Static configuration options - * @{ - * - * These configuration options can be used for setting the IP address - * settings statically, but only if UIP_FIXEDADDR is set to 1. The - * configuration options for a specific node includes IP address, - * netmask and default router as well as the Ethernet address. The - * netmask, default router and Ethernet address are appliciable only - * if uIP should be run over Ethernet. - * - * All of these should be changed to suit your project. -*/ - -/** - * Determines if uIP should use a fixed IP address or not. - * - * If uIP should use a fixed IP address, the settings are set in the - * uipopt.h file. If not, the macros uip_sethostaddr(), - * uip_setdraddr() and uip_setnetmask() should be used instead. - * - * \hideinitializer - */ -#define UIP_FIXEDADDR 0 - -/** - * Ping IP address asignment. - * - * uIP uses a "ping" packets for setting its own IP address if this - * option is set. If so, uIP will start with an empty IP address and - * the destination IP address of the first incoming "ping" (ICMP echo) - * packet will be used for setting the hosts IP address. - * - * \note This works only if UIP_FIXEDADDR is 0. - * - * \hideinitializer - */ -#ifdef UIP_CONF_PINGADDRCONF -#define UIP_PINGADDRCONF UIP_CONF_PINGADDRCONF -#else /* UIP_CONF_PINGADDRCONF */ -#define UIP_PINGADDRCONF 0 -#endif /* UIP_CONF_PINGADDRCONF */ - - -/** - * Specifies if the uIP ARP module should be compiled with a fixed - * Ethernet MAC address or not. - * - * If this configuration option is 0, the macro uip_setethaddr() can - * be used to specify the Ethernet address at run-time. - * - * \hideinitializer - */ -#define UIP_FIXEDETHADDR 0 - -/** @} */ -/*------------------------------------------------------------------------------*/ -/** - * \name IP configuration options - * @{ - * - */ -/** - * The IP TTL (time to live) of IP packets sent by uIP. - * - * This should normally not be changed. - */ -#define UIP_TTL 64 - -/** - * Turn on support for IP packet reassembly. - * - * uIP supports reassembly of fragmented IP packets. This features - * requires an additonal amount of RAM to hold the reassembly buffer - * and the reassembly code size is approximately 700 bytes. The - * reassembly buffer is of the same size as the uip_buf buffer - * (configured by UIP_BUFSIZE). - * - * \note IP packet reassembly is not heavily tested. - * - * \hideinitializer - */ -#define UIP_REASSEMBLY 0 - -/** - * The maximum time an IP fragment should wait in the reassembly - * buffer before it is dropped. - * - */ -#define UIP_REASS_MAXAGE 40 - -/** @} */ - -/*------------------------------------------------------------------------------*/ -/** - * \name UDP configuration options - * @{ - */ - -/** - * Toggles wether UDP support should be compiled in or not. - * - * \hideinitializer - */ -#ifdef UIP_CONF_UDP -#define UIP_UDP UIP_CONF_UDP -#else /* UIP_CONF_UDP */ -#define UIP_UDP 0 -#endif /* UIP_CONF_UDP */ - -/** - * Toggles if UDP checksums should be used or not. - * - * \note Support for UDP checksums is currently not included in uIP, - * so this option has no function. - * - * \hideinitializer - */ -#ifdef UIP_CONF_UDP_CHECKSUMS -#define UIP_UDP_CHECKSUMS UIP_CONF_UDP_CHECKSUMS -#else -#define UIP_UDP_CHECKSUMS 0 -#endif - -/** - * The maximum amount of concurrent UDP connections. - * - * \hideinitializer - */ -#ifdef UIP_CONF_UDP_CONNS -#define UIP_UDP_CONNS UIP_CONF_UDP_CONNS -#else /* UIP_CONF_UDP_CONNS */ -#define UIP_UDP_CONNS 10 -#endif /* UIP_CONF_UDP_CONNS */ - -/** - * The name of the function that should be called when UDP datagrams arrive. - * - * \hideinitializer - */ - - -/** @} */ -/*------------------------------------------------------------------------------*/ -/** - * \name TCP configuration options - * @{ - */ - -/** - * Determines if support for opening connections from uIP should be - * compiled in. - * - * If the applications that are running on top of uIP for this project - * do not need to open outgoing TCP connections, this configration - * option can be turned off to reduce the code size of uIP. - * - * \hideinitializer - */ -#define UIP_ACTIVE_OPEN 1 - -/** - * The maximum number of simultaneously open TCP connections. - * - * Since the TCP connections are statically allocated, turning this - * configuration knob down results in less RAM used. Each TCP - * connection requires approximatly 30 bytes of memory. - * - * \hideinitializer - */ -#ifndef UIP_CONF_MAX_CONNECTIONS -#define UIP_CONNS 10 -#else /* UIP_CONF_MAX_CONNECTIONS */ -#define UIP_CONNS UIP_CONF_MAX_CONNECTIONS -#endif /* UIP_CONF_MAX_CONNECTIONS */ - - -/** - * The maximum number of simultaneously listening TCP ports. - * - * Each listening TCP port requires 2 bytes of memory. - * - * \hideinitializer - */ -#ifndef UIP_CONF_MAX_LISTENPORTS -#define UIP_LISTENPORTS 20 -#else /* UIP_CONF_MAX_LISTENPORTS */ -#define UIP_LISTENPORTS UIP_CONF_MAX_LISTENPORTS -#endif /* UIP_CONF_MAX_LISTENPORTS */ - -/** - * Determines if support for TCP urgent data notification should be - * compiled in. - * - * Urgent data (out-of-band data) is a rarely used TCP feature that - * very seldom would be required. - * - * \hideinitializer - */ -#define UIP_URGDATA 0 - -/** - * The initial retransmission timeout counted in timer pulses. - * - * This should not be changed. - */ -#define UIP_RTO 3 - -/** - * The maximum number of times a segment should be retransmitted - * before the connection should be aborted. - * - * This should not be changed. - */ -#define UIP_MAXRTX 8 - -/** - * The maximum number of times a SYN segment should be retransmitted - * before a connection request should be deemed to have been - * unsuccessful. - * - * This should not need to be changed. - */ -#define UIP_MAXSYNRTX 5 - -/** - * The TCP maximum segment size. - * - * This is should not be to set to more than - * UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN. - */ -#define UIP_TCP_MSS (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN) - -/** - * The size of the advertised receiver's window. - * - * Should be set low (i.e., to the size of the uip_buf buffer) is the - * application is slow to process incoming data, or high (32768 bytes) - * if the application processes data quickly. - * - * \hideinitializer - */ -#ifndef UIP_CONF_RECEIVE_WINDOW -#define UIP_RECEIVE_WINDOW UIP_TCP_MSS -#else -#define UIP_RECEIVE_WINDOW UIP_CONF_RECEIVE_WINDOW -#endif - -/** - * How long a connection should stay in the TIME_WAIT state. - * - * This configiration option has no real implication, and it should be - * left untouched. - */ -#define UIP_TIME_WAIT_TIMEOUT 120 - - -/** @} */ -/*------------------------------------------------------------------------------*/ -/** - * \name ARP configuration options - * @{ - */ - -/** - * The size of the ARP table. - * - * This option should be set to a larger value if this uIP node will - * have many connections from the local network. - * - * \hideinitializer - */ -#ifdef UIP_CONF_ARPTAB_SIZE -#define UIP_ARPTAB_SIZE UIP_CONF_ARPTAB_SIZE -#else -#define UIP_ARPTAB_SIZE 8 -#endif - -/** - * The maxium age of ARP table entries measured in 10ths of seconds. - * - * An UIP_ARP_MAXAGE of 120 corresponds to 20 minutes (BSD - * default). - */ -#define UIP_ARP_MAXAGE 120 - -/** @} */ - -/*------------------------------------------------------------------------------*/ - -/** - * \name General configuration options - * @{ - */ - -/** - * The size of the uIP packet buffer. - * - * The uIP packet buffer should not be smaller than 60 bytes, and does - * not need to be larger than 1500 bytes. Lower size results in lower - * TCP throughput, larger size results in higher TCP throughput. - * - * \hideinitializer - */ -#ifndef UIP_CONF_BUFFER_SIZE -#define UIP_BUFSIZE 400 -#else /* UIP_CONF_BUFFER_SIZE */ -#define UIP_BUFSIZE UIP_CONF_BUFFER_SIZE -#endif /* UIP_CONF_BUFFER_SIZE */ - - -/** - * Determines if statistics support should be compiled in. - * - * The statistics is useful for debugging and to show the user. - * - * \hideinitializer - */ -#ifndef UIP_CONF_STATISTICS -#define UIP_STATISTICS 0 -#else /* UIP_CONF_STATISTICS */ -#define UIP_STATISTICS UIP_CONF_STATISTICS -#endif /* UIP_CONF_STATISTICS */ - -/** - * Determines if logging of certain events should be compiled in. - * - * This is useful mostly for debugging. The function uip_log() - * must be implemented to suit the architecture of the project, if - * logging is turned on. - * - * \hideinitializer - */ -#ifndef UIP_CONF_LOGGING -#define UIP_LOGGING 0 -#else /* UIP_CONF_LOGGING */ -#define UIP_LOGGING UIP_CONF_LOGGING -#endif /* UIP_CONF_LOGGING */ - -/** - * Broadcast support. - * - * This flag configures IP broadcast support. This is useful only - * together with UDP. - * - * \hideinitializer - * - */ -#ifndef UIP_CONF_BROADCAST -#define UIP_BROADCAST 0 -#else /* UIP_CONF_BROADCAST */ -#define UIP_BROADCAST UIP_CONF_BROADCAST -#endif /* UIP_CONF_BROADCAST */ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * Print out a uIP log message. - * - * This function must be implemented by the module that uses uIP, and - * is called by uIP whenever a log message is generated. - */ -void uip_log(char *msg); - -#ifdef __cplusplus -} -#endif -/** - * The link level header length. - * - * This is the offset into the uip_buf where the IP header can be - * found. For Ethernet, this should be set to 14. For SLIP, this - * should be set to 0. - * - * \hideinitializer - */ -#ifdef UIP_CONF_LLH_LEN -#define UIP_LLH_LEN UIP_CONF_LLH_LEN -#else /* UIP_CONF_LLH_LEN */ -#define UIP_LLH_LEN 14 -#endif /* UIP_CONF_LLH_LEN */ - -/** @} */ -/*------------------------------------------------------------------------------*/ -/** - * \name CPU architecture configuration - * @{ - * - * The CPU architecture configuration is where the endianess of the - * CPU on which uIP is to be run is specified. Most CPUs today are - * little endian, and the most notable exception are the Motorolas - * which are big endian. The BYTE_ORDER macro should be changed to - * reflect the CPU architecture on which uIP is to be run. - */ - -/** - * The byte order of the CPU architecture on which uIP is to be run. - * - * This option can be either BIG_ENDIAN (Motorola byte order) or - * LITTLE_ENDIAN (Intel byte order). - * - * \hideinitializer - */ -#ifdef UIP_CONF_BYTE_ORDER -#define UIP_BYTE_ORDER UIP_CONF_BYTE_ORDER -#else /* UIP_CONF_BYTE_ORDER */ -#define UIP_BYTE_ORDER UIP_LITTLE_ENDIAN -#endif /* UIP_CONF_BYTE_ORDER */ - -/** @} */ -/*------------------------------------------------------------------------------*/ - -/** - * \name Appication specific configurations - * @{ - * - * An uIP application is implemented using a single application - * function that is called by uIP whenever a TCP/IP event occurs. The - * name of this function must be registered with uIP at compile time - * using the UIP_APPCALL definition. - * - * uIP applications can store the application state within the - * uip_conn structure by specifying the type of the application - * structure by typedef:ing the type uip_tcp_appstate_t and uip_udp_appstate_t. - * - * The file containing the definitions must be included in the - * uipopt.h file. - * - * The following example illustrates how this can look. - \code - -void httpd_appcall(void); -#define UIP_APPCALL httpd_appcall - -struct httpd_state { - u8_t state; - u16_t count; - char *dataptr; - char *script; -}; -typedef struct httpd_state uip_tcp_appstate_t - \endcode - */ - -/** - * \var #define UIP_APPCALL - * - * The name of the application function that uIP should call in - * response to TCP/IP events. - * - */ - -/** - * \var typedef uip_tcp_appstate_t - * - * The type of the application state that is to be stored in the - * uip_conn structure. This usually is typedef:ed to a struct holding - * application state information. - */ - -/** - * \var typedef uip_udp_appstate_t - * - * The type of the application state that is to be stored in the - * uip_conn structure. This usually is typedef:ed to a struct holding - * application state information. - */ -/** @} */ -/** @} */ - -#endif /* __UIPOPT_H__ */
--- a/libs/Network/uip/webserver/http-strings Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,41 +0,0 @@ -http_http "http://" -http_200 "200 " -http_301 "301 " -http_302 "302 " -http_get "GET " -http_post "POST " -http_10 "HTTP/1.0" -http_11 "HTTP/1.1" -http_content_type "content-type: " -http_content_length "Content-Length: " -http_cache_control "Cache-Control: " -http_no_cache "no-cache" -http_texthtml "text/html" -http_location "location: " -http_host "host: " -http_crnl "\r\n" -http_index_html "/index.html" -http_404_html "/404.html" -http_referer "Referer:" -http_header_200 "HTTP/1.0 200 OK\r\nServer: uIP/1.0\r\nConnection: close\r\n" -http_header_304 "HTTP/1.0 304 Not Modified\r\nServer: uIP/1.0\r\nConnection: close\r\nExpires: Thu, 31 Dec 2037 23:55:55 GMT\r\nCache-Control: max-age=315360000\r\nX-Cache: HIT\r\n" -http_header_404 "HTTP/1.0 404 Not found\r\nServer: uIP/1.0\r\nConnection: close\r\n" -http_header_503 "HTTP/1.0 503 Failed\r\nServer: uIP/1.0\r\nConnection: close\r\n" -http_content_type_plain "Content-type: text/plain\r\n\r\n" -http_content_type_html "Content-type: text/html\r\n\r\n" -http_content_type_css "Content-type: text/css\r\n\r\n" -http_content_type_text "Content-type: text/text\r\n\r\n" -http_content_type_png "Content-type: image/png\r\n\r\n" -http_content_type_gif "Content-type: image/gif\r\n\r\n" -http_content_type_jpg "Content-type: image/jpeg\r\n\r\n" -http_content_type_binary "Content-type: application/octet-stream\r\n\r\n" -http_html ".html" -http_shtml ".shtml" -http_htm ".htm" -http_css ".css" -http_png ".png" -http_gif ".gif" -http_jpg ".jpg" -http_text ".txt" -http_txt ".txt" -
--- a/libs/Network/uip/webserver/http-strings.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,120 +0,0 @@ -const char http_http[8] = -/* "http://" */ -{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, }; -const char http_200[5] = -/* "200 " */ -{0x32, 0x30, 0x30, 0x20, }; -const char http_301[5] = -/* "301 " */ -{0x33, 0x30, 0x31, 0x20, }; -const char http_302[5] = -/* "302 " */ -{0x33, 0x30, 0x32, 0x20, }; -const char http_get[5] = -/* "GET " */ -{0x47, 0x45, 0x54, 0x20, }; -const char http_post[6] = -/* "POST " */ -{0x50, 0x4f, 0x53, 0x54, 0x20, }; -const char http_10[9] = -/* "HTTP/1.0" */ -{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, }; -const char http_11[9] = -/* "HTTP/1.1" */ -{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, }; -const char http_content_type[15] = -/* "content-type: " */ -{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, }; -const char http_content_length[17] = -/* "Content-Length: " */ -{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x4c, 0x65, 0x6e, 0x67, 0x74, 0x68, 0x3a, 0x20, }; -const char http_cache_control[16] = -/* "Cache-Control: " */ -{0x43, 0x61, 0x63, 0x68, 0x65, 0x2d, 0x43, 0x6f, 0x6e, 0x74, 0x72, 0x6f, 0x6c, 0x3a, 0x20, }; -const char http_no_cache[9] = -/* "no-cache" */ -{0x6e, 0x6f, 0x2d, 0x63, 0x61, 0x63, 0x68, 0x65, }; -const char http_texthtml[10] = -/* "text/html" */ -{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, }; -const char http_location[11] = -/* "location: " */ -{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, }; -const char http_host[7] = -/* "host: " */ -{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, }; -const char http_crnl[3] = -/* "\r\n" */ -{0xd, 0xa, }; -const char http_index_html[12] = -/* "/index.html" */ -{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, }; -const char http_404_html[10] = -/* "/404.html" */ -{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, }; -const char http_referer[9] = -/* "Referer:" */ -{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, }; -const char http_header_200[54] = -/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0\r\nConnection: close\r\n" */ -{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, }; -const char http_header_304[152] = -/* "HTTP/1.0 304 Not Modified\r\nServer: uIP/1.0\r\nConnection: close\r\nExpires: Thu, 31 Dec 2037 23:55:55 GMT\r\nCache-Control: max-age=315360000\r\nX-Cache: HIT\r\n" */ -{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x33, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x4d, 0x6f, 0x64, 0x69, 0x66, 0x69, 0x65, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, 0x45, 0x78, 0x70, 0x69, 0x72, 0x65, 0x73, 0x3a, 0x20, 0x54, 0x68, 0x75, 0x2c, 0x20, 0x33, 0x31, 0x20, 0x44, 0x65, 0x63, 0x20, 0x32, 0x30, 0x33, 0x37, 0x20, 0x32, 0x33, 0x3a, 0x35, 0x35, 0x3a, 0x35, 0x35, 0x20, 0x47, 0x4d, 0x54, 0xd, 0xa, 0x43, 0x61, 0x63, 0x68, 0x65, 0x2d, 0x43, 0x6f, 0x6e, 0x74, 0x72, 0x6f, 0x6c, 0x3a, 0x20, 0x6d, 0x61, 0x78, 0x2d, 0x61, 0x67, 0x65, 0x3d, 0x33, 0x31, 0x35, 0x33, 0x36, 0x30, 0x30, 0x30, 0x30, 0xd, 0xa, 0x58, 0x2d, 0x43, 0x61, 0x63, 0x68, 0x65, 0x3a, 0x20, 0x48, 0x49, 0x54, 0xd, 0xa, }; -const char http_header_404[61] = -/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0\r\nConnection: close\r\n" */ -{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, }; -const char http_header_503[58] = -/* "HTTP/1.0 503 Failed\r\nServer: uIP/1.0\r\nConnection: close\r\n" */ -{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x35, 0x30, 0x33, 0x20, 0x46, 0x61, 0x69, 0x6c, 0x65, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, }; -const char http_content_type_plain[29] = -/* "Content-type: text/plain\r\n\r\n" */ -{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, }; -const char http_content_type_html[28] = -/* "Content-type: text/html\r\n\r\n" */ -{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, }; -const char http_content_type_css [27] = -/* "Content-type: text/css\r\n\r\n" */ -{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, }; -const char http_content_type_text[28] = -/* "Content-type: text/text\r\n\r\n" */ -{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, }; -const char http_content_type_png [28] = -/* "Content-type: image/png\r\n\r\n" */ -{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, }; -const char http_content_type_gif [28] = -/* "Content-type: image/gif\r\n\r\n" */ -{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, }; -const char http_content_type_jpg [29] = -/* "Content-type: image/jpeg\r\n\r\n" */ -{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, }; -const char http_content_type_binary[43] = -/* "Content-type: application/octet-stream\r\n\r\n" */ -{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, }; -const char http_html[6] = -/* ".html" */ -{0x2e, 0x68, 0x74, 0x6d, 0x6c, }; -const char http_shtml[7] = -/* ".shtml" */ -{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, }; -const char http_htm[5] = -/* ".htm" */ -{0x2e, 0x68, 0x74, 0x6d, }; -const char http_css[5] = -/* ".css" */ -{0x2e, 0x63, 0x73, 0x73, }; -const char http_png[5] = -/* ".png" */ -{0x2e, 0x70, 0x6e, 0x67, }; -const char http_gif[5] = -/* ".gif" */ -{0x2e, 0x67, 0x69, 0x66, }; -const char http_jpg[5] = -/* ".jpg" */ -{0x2e, 0x6a, 0x70, 0x67, }; -const char http_text[5] = -/* ".txt" */ -{0x2e, 0x74, 0x78, 0x74, }; -const char http_txt[5] = -/* ".txt" */ -{0x2e, 0x74, 0x78, 0x74, };
--- a/libs/Network/uip/webserver/http-strings.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,40 +0,0 @@ -extern const char http_http[8]; -extern const char http_200[5]; -extern const char http_301[5]; -extern const char http_302[5]; -extern const char http_get[5]; -extern const char http_post[6]; -extern const char http_10[9]; -extern const char http_11[9]; -extern const char http_content_type[15]; -extern const char http_content_length[17]; -extern const char http_cache_control[16]; -extern const char http_no_cache[9]; -extern const char http_texthtml[10]; -extern const char http_location[11]; -extern const char http_host[7]; -extern const char http_crnl[3]; -extern const char http_index_html[12]; -extern const char http_404_html[10]; -extern const char http_referer[9]; -extern const char http_header_200[54]; -extern const char http_header_304[152]; -extern const char http_header_404[61]; -extern const char http_header_503[58]; -extern const char http_content_type_plain[29]; -extern const char http_content_type_html[28]; -extern const char http_content_type_css [27]; -extern const char http_content_type_text[28]; -extern const char http_content_type_png [28]; -extern const char http_content_type_gif [28]; -extern const char http_content_type_jpg [29]; -extern const char http_content_type_binary[43]; -extern const char http_html[6]; -extern const char http_shtml[7]; -extern const char http_htm[5]; -extern const char http_css[5]; -extern const char http_png[5]; -extern const char http_gif[5]; -extern const char http_jpg[5]; -extern const char http_text[5]; -extern const char http_txt[5];
--- a/libs/Network/uip/webserver/httpd-fs.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,137 +0,0 @@ -#pragma GCC diagnostic ignored "-Wredundant-decls" -#pragma GCC diagnostic ignored "-Wstrict-aliasing" -#pragma GCC diagnostic ignored "-Wcast-align" -#pragma GCC diagnostic ignored "-Wcast-qual" - -/* - * Copyright (c) 2001, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $ - */ - -#include "httpd.h" -#include "httpd-fs.h" -#include "httpd-fsdata.h" - -#ifndef NULL -#define NULL 0 -#endif /* NULL */ - -#include "httpd-fsdata2.h" - -#if HTTPD_FS_STATISTICS -static u16_t count[HTTPD_FS_NUMFILES]; -#endif /* HTTPD_FS_STATISTICS */ - -/*-----------------------------------------------------------------------------------*/ -static u8_t -httpd_fs_strcmp(const char *str1, const char *str2) -{ - u8_t i; - i = 0; - loop: - - if(str2[i] == 0 || - str1[i] == '\r' || - str1[i] == '\n') { - return 0; - } - - if(str1[i] != str2[i]) { - return 1; - } - - - ++i; - goto loop; -} -/*-----------------------------------------------------------------------------------*/ -int -httpd_fs_open(const char *name, struct httpd_fs_file *file) -{ -#if HTTPD_FS_STATISTICS - u16_t i = 0; -#endif /* HTTPD_FS_STATISTICS */ - struct httpd_fsdata_file_noconst *f; - - for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT; - f != NULL; - f = (struct httpd_fsdata_file_noconst *)f->next) { - - if(httpd_fs_strcmp(name, f->name) == 0) { - file->data = f->data; - file->len = f->len; -#if HTTPD_FS_STATISTICS - ++count[i]; -#endif /* HTTPD_FS_STATISTICS */ - return 1; - } -#if HTTPD_FS_STATISTICS - ++i; -#endif /* HTTPD_FS_STATISTICS */ - - } - return 0; -} -/*-----------------------------------------------------------------------------------*/ -void -httpd_fs_init(void) -{ -#if HTTPD_FS_STATISTICS - u16_t i; - for(i = 0; i < HTTPD_FS_NUMFILES; i++) { - count[i] = 0; - } -#endif /* HTTPD_FS_STATISTICS */ -} -/*-----------------------------------------------------------------------------------*/ -#if HTTPD_FS_STATISTICS -u16_t httpd_fs_count -(char *name) -{ - struct httpd_fsdata_file_noconst *f; - u16_t i; - - i = 0; - for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT; - f != NULL; - f = (struct httpd_fsdata_file_noconst *)f->next) { - - if(httpd_fs_strcmp(name, f->name) == 0) { - return count[i]; - } - ++i; - } - return 0; -} -#endif /* HTTPD_FS_STATISTICS */ -/*-----------------------------------------------------------------------------------*/
--- a/libs/Network/uip/webserver/httpd-fs.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,57 +0,0 @@ -/* - * Copyright (c) 2001, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $ - */ -#ifndef __HTTPD_FS_H__ -#define __HTTPD_FS_H__ - -#define HTTPD_FS_STATISTICS 1 - -struct httpd_fs_file { - char *data; - int len; -}; - -/* file must be allocated by caller and will be filled in - by the function. */ -int httpd_fs_open(const char *name, struct httpd_fs_file *file); - -#ifdef HTTPD_FS_STATISTICS -#if HTTPD_FS_STATISTICS == 1 -u16_t httpd_fs_count(char *name); -#endif /* HTTPD_FS_STATISTICS */ -#endif /* HTTPD_FS_STATISTICS */ - -void httpd_fs_init(void); - -#endif /* __HTTPD_FS_H__ */
--- a/libs/Network/uip/webserver/httpd-fs/404.html Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,8 +0,0 @@ -<html> - <body bgcolor="white"> - <center> - <h1>404 - file not found</h1> - <h3>Go <a href="/">here</a> instead.</h3> - </center> - </body> -</html>
Binary file libs/Network/uip/webserver/httpd-fs/img/control_xy.png has changed
Binary file libs/Network/uip/webserver/httpd-fs/img/control_z.png has changed
--- a/libs/Network/uip/webserver/httpd-fs/index.html Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,283 +0,0 @@ -<!doctype html> -<head> - <meta charset="utf-8"> - <title>Single Command</title> - <script src="http://code.jquery.com/jquery-1.9.1.js"></script> - <script type=text/javascript language=JavaScript> - var concentric_circle_radii = [11, 45, 69, 94, 115]; - var center = [124, 121]; - var spacer = 7; - var zbutton_ydistances = [7, 30, 55, 83]; - var zcenter = [30, 118]; - -function runCommand(cmd) { - // Get some values from elements on the page: - var $form = $( "#commandForm" ); - cmd += "\n"; - url = "/command_silent"; // $form.attr( "action" ); - // Send the data using post - var posting = $.post( url, cmd ); - // Put the results in a div - // posting.done(function( data ) { - // $( "#result" ).empty(); - // $.each(data.split('\n'), function(index) { - // $( "#result" ).append( this + '<br/>' ); - // }); - // }); -} - -function lookupConcentric(radius){ - var length = concentric_circle_radii.length; - for (i=0;i<=length;i++) { - if (radius < concentric_circle_radii[i]) return(i); - } - return(length); -} - -function getQuadrantConcentricFromPosition(x,y) { - var rel_x = x - center[0] - var rel_y = y - center[1] - var radius = Math.sqrt(Math.pow(Math.abs(rel_x),2) + Math.pow(Math.abs(rel_y),2)) - if (rel_x > rel_y && rel_x > -rel_y) { - quadrant = 0; // Right - } else if (rel_x <= rel_y && rel_x > -rel_y) { - quadrant = 3; // Down - } else if (rel_x > rel_y && rel_x < -rel_y) { - quadrant = 1; // Up - } else { - quadrant = 2; // Left - } - var idx = lookupConcentric(radius); - return [quadrant, idx] -} - -function clickXY(event){ - var pos_x = event.offsetX?(event.offsetX):event.pageX-document.getElementById("control_xy").offsetLeft; - var pos_y = event.offsetY?(event.offsetY):event.pageY-document.getElementById("control_xy").offsetTop; - var codes = getQuadrantConcentricFromPosition(pos_x,pos_y); - var quadrant = codes[0], concentric = codes[1]; - if (concentric < 5) { // movement button pressed - var xdir = [1, 0, -1, 0, 0, 0][quadrant]; - var ydir = [0, 1, 0, -1, 0, 0][quadrant]; - var magnitude = Math.pow(10, concentric - 2); - if (xdir != 0) { - command = "G1 X" + (magnitude * xdir) + " F" + document.getElementById("xy_velocity").value; - } else { - command = "G1 Y" + (magnitude * ydir) + " F" + document.getElementById("xy_velocity").value; - } - runCommand("G91 " + command + " G90"); - } else { // home button pressed - if (pos_x < 49 && pos_y < 49) { // home x button - command = "G28 X0"; - } else if (pos_x > 200 && pos_y < 49) { //home y button - command = "G28 Y0"; - } else if (pos_x < 49 && pos_y > 200) { // home all button - command = "G28"; - } else { // home z button - command = "G28 Z0"; - } - runCommand(command); - } -} - -function lookupRange(ydist) { - var length = zbutton_ydistances.length; - for (i=0;i<length;i++) { - if (ydist < zbutton_ydistances[i]) return i; - } -} - -function clickZ(event){ - //var pos_x = event.offsetX?(event.offsetX):event.pageX-document.getElementById("control_z").offsetLeft; - var pos_y = event.offsetY?(event.offsetY):event.pageY-document.getElementById("control_z").offsetTop; - var ydelta = zcenter[1] - pos_y; - var range = lookupRange(Math.abs(ydelta)); - var direction = (ydelta > 0)?1:-1; - if (range < 4) { - runCommand("G91 G1 Z" + (Math.pow(10,range-2) * direction) + " F" + document.getElementById("z_velocity").value + " G90"); - } -} - -function extrude(event,a,b) { - var length = document.getElementById("extrude_length").value; - var velocity = document.getElementById("extrude_velocity").value; - var direction = (event.currentTarget.id=='extrude')?1:-1; - runCommand("G91 G1 E" + (length * direction) + " F" + velocity + " G90"); -} - -function motorsOff(event) { - runCommand("M18"); -} - -function heatSet(event) { - var type = (event.currentTarget.id=='heat_set')?104:140; - var temperature = (type==104)?document.getElementById("heat_value").value:document.getElementById("bed_value").value; - runCommand("M" + type + " S" + temperature); -} - -function heatOff(event) { - var type = (event.currentTarget.id=='heat_off')?104:140; - runCommand("M" + type + " S0"); -} - -</script> -</head> - -<body> - <h1>Welcome to Smoothie web interface</h1> - -<button id=motors_off onclick=motorsOff(event)>Motors Off</button> -XY:<input type=text id=xy_velocity size=4 value=3000 style=width:50px>mm/min -Z:<input type=text id=z_velocity size=3 value=200 style=width:40px> -<br> -<img id=control_xy src=img/control_xy.png onclick=clickXY(event)> -<img id=control_z src=img/control_z.png onclick=clickZ(event)> -<br> -<table><tr><td> -<table> -<tr> -<td style=text-align:right>Heat:</td> -<td><button id=heat_off onclick=heatOff(event)>Off</button></td> -<td><input type=text id=heat_value size=3 style=width:40px value=0></td> -<td><button id=heat_set onclick=heatSet(event)>Set</button></td> -</tr> -<tr> -<td style=text-align:right>Bed:</td> -<td><button id=bed_off onclick=heatOff(event)>Off</button></td> -<td><input type=text id=bed_value size=3 style=width:40px value=0></td> -<td><button id=bed_set onclick=heatSet(event)>Set</button></td> -</tr> -</table> -</td><td valign=top> -<button id=get_temperature onclick=runCommand("M105")>Get Temperature</button> -</td></tr></table> -<br> -<button id=extrude onclick=extrude(event)>Extrude</button> -<button id=reverse onclick=extrude(event)>Reverse</button><br> -<input type=text id=extrude_length value=5 size=3 style=width:35px> -mm @ -<input type=text id=extrude_velocity value=100 size=3 style=width:40px> -mm/min - - <h2>Commands</h2> - <form action="/command" id="commandForm"> - <input type="text" name="commandText" placeholder="Send Command..."> - <input type="submit" value="Send"> - </form> - <!-- the result of the command will be rendered inside this div --> - <div id="result"></div> - <script> - // Attach a submit handler to the form - $( "#commandForm" ).submit(function( event ) { - // Stop form from submitting normally - event.preventDefault(); - // Get some values from elements on the page: - var $form = $( this ); - command = $form.find( "input[name='commandText']" ).val(); - command += "\n"; - url = $form.attr( "action" ); - // Send the data using post - var posting = $.post( url, command ); - // Put the results in a div - posting.done(function( data ) { - $( "#result" ).empty(); - $.each(data.split('\n'), function(index) { - $( "#result" ).append( this + '<br/>' ); - }); - }); - }); - </script> - - <h2> Upload File </h2> - <input type="file" id="files" name="files[]" onchange="upload();" /> - - <h3>Uploading file(s)</h3> - <output id="list"></output> - <div id="progress"></div> - <div id="uploadresult"></div> - <script> - function handleFileSelect(evt) { - var files = evt.target.files; // handleFileSelectist object - - // files is a FileList of File objects. List some properties. - var output = []; - for (var i = 0, f; f = files[i]; i++) { - output.push('<li><strong>', escape(f.name), '</strong> (', f.type || 'n/a', ') - ', - f.size, ' bytes, last modified: ', - f.lastModifiedDate ? f.lastModifiedDate.toLocaleDateString() : 'n/a', - '</li>'); - } - document.getElementById('list').innerHTML = '<ul>' + output.join('') + '</ul>'; - } - - document.getElementById('files').addEventListener('change', handleFileSelect, false); - - - function upload() { - // take the file from the input - var file = document.getElementById('files').files[0]; - var reader = new FileReader(); - reader.readAsBinaryString(file); // alternatively you can use readAsDataURL - reader.onloadend = function(evt) - { - // create XHR instance - xhr = new XMLHttpRequest(); - - // send the file through POST - xhr.open("POST", 'upload', true); - xhr.setRequestHeader('X-Filename', file.name); - - // make sure we have the sendAsBinary method on all browsers - XMLHttpRequest.prototype.mySendAsBinary = function(text){ - var data = new ArrayBuffer(text.length); - var ui8a = new Uint8Array(data, 0); - for (var i = 0; i < text.length; i++) ui8a[i] = (text.charCodeAt(i) & 0xff); - - if(typeof window.Blob == "function") - { - var blob = new Blob([data]); - }else{ - var bb = new (window.MozBlobBuilder || window.WebKitBlobBuilder || window.BlobBuilder)(); - bb.append(data); - var blob = bb.getBlob(); - } - - this.send(blob); - } - - // let's track upload progress - var eventSource = xhr.upload || xhr; - eventSource.addEventListener("progress", function(e) { - // get percentage of how much of the current file has been sent - var position = e.position || e.loaded; - var total = e.totalSize || e.total; - var percentage = Math.round((position/total)*100); - - // here you should write your own code how you wish to proces this - $( "#progress" ).empty().append('uploaded ' + percentage + '%'); - }); - - // state change observer - we need to know when and if the file was successfully uploaded - xhr.onreadystatechange = function() - { - if(xhr.readyState == 4) - { - if(xhr.status == 200) - { - // process success - $( "#uploadresult" ).empty().append( 'Uploaded Ok'); - }else{ - // process error - $( "#uploadresult" ).empty().append( 'Uploaded Failed'); - } - } - }; - - // start sending - xhr.mySendAsBinary(evt.target.result); - }; - } - </script> - -</body> -</html>
--- a/libs/Network/uip/webserver/httpd-fsdata.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,69 +0,0 @@ -/* - * Copyright (c) 2001, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $ - */ -#ifndef __HTTPD_FSDATA_H__ -#define __HTTPD_FSDATA_H__ - -#undef HTTPD_FS_STATISTICS - -#include "uip.h" - - -struct httpd_fsdata_file { - const struct httpd_fsdata_file *next; -// const char *name; -// const char *data; - const unsigned char *name; - const unsigned char *data; - const int len; -#ifdef HTTPD_FS_STATISTICS -#if HTTPD_FS_STATISTICS == 1 - u16_t count; -#endif /* HTTPD_FS_STATISTICS */ -#endif /* HTTPD_FS_STATISTICS */ -}; - -struct httpd_fsdata_file_noconst { - struct httpd_fsdata_file *next; - char *name; - char *data; - int len; -#ifdef HTTPD_FS_STATISTICS -#if HTTPD_FS_STATISTICS == 1 - u16_t count; -#endif /* HTTPD_FS_STATISTICS */ -#endif /* HTTPD_FS_STATISTICS */ -}; - -#endif /* __HTTPD_FSDATA_H__ */
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0xfd, 0x5c, 0x35, 0x72, 0xd7, 0xe8, 0x66, 0x9c, 0xa1, 0xc8, - 0x58, 0x51, 0xd, 0x90, 0x69, 0xe8, 0x66, 0xf9, 0x46, 0xe0, - 0x4, 0xa9, 0x9f, 0xfd, 0x40, 0x43, 0x71, 0x55, 0xe2, 0x21, - 0x48, 0xa8, 0xa0, 0xa7, 0x91, 0x4, 0xb0, 0xe6, 0x9a, 0x6, - 0xa7, 0x9f, 0x9, 0xd2, 0xe8, 0x66, 0x32, 0xfa, 0x59, 0x4d, - 0x1a, 0xb0, 0xd1, 0x26, 0xb0, 0x90, 0xcf, 0xe1, 0x80, 0xb2, - 0x52, 0x43, 0x82, 0x55, 0x91, 0xbc, 0x80, 0x95, 0x93, 0xff, - 0x84, 0x34, 0x50, 0xba, 0x35, 0x60, 0xba, 0x47, 0x92, 0x8, - 0x8e, 0xa4, 0x6d, 0xd, 0x58, 0xf9, 0x45, 0x2, 0xa9, 0x52, - 0xc9, 0xbf, 0xa8, 0xc0, 0xea, 0xc8, 0xda, 0xf6, 0x71, 0x9b, - 0x8f, 0x4, 0x3a, 0x1a, 0xa4, 00, 0x47, 0x3, 0xd0, 0x58, - 0xb9, 0x61, 0x81, 0x35, 0x66, 0x70, 0x2d, 0xb9, 0x47, 0xe2, - 0x1d, 0x1b, 0xb3, 0xf8, 0xaf, 0x2b, 0xb0, 0xff, 0xf, 0x4f, - 0x13, 0xcb, 0x14, 0x29, 0x9f, 0x25, 0xc5, 00, 00, 00, - 00, 0x49, 0x45, 0x4e, 0x44, 0xae, 0x42, 0x60, 0x82, 0}; - -const struct httpd_fsdata_file file_index_html[] = {{NULL, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}}; - -const struct httpd_fsdata_file file_404_html[] = {{file_index_html, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}}; - -const struct httpd_fsdata_file file_img_control_xy_png[] = {{file_404_html, data_img_control_xy_png, data_img_control_xy_png + 20, sizeof(data_img_control_xy_png) - 20}}; - -const struct httpd_fsdata_file file_img_control_z_png[] = {{file_img_control_xy_png, data_img_control_z_png, data_img_control_z_png + 19, sizeof(data_img_control_z_png) - 19}}; - -#define HTTPD_FS_ROOT file_img_control_z_png - -#define HTTPD_FS_NUMFILES 4
--- a/libs/Network/uip/webserver/httpd.c Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,680 +0,0 @@ -#pragma GCC diagnostic ignored "-Wredundant-decls" -#pragma GCC diagnostic ignored "-Wstrict-aliasing" -#pragma GCC diagnostic ignored "-Wcast-align" -#pragma GCC diagnostic ignored "-Wcast-qual" -#pragma GCC diagnostic ignored "-Wunused-but-set-variable" - -/** - * \addtogroup apps - * @{ - */ - -/** - * \defgroup httpd Web server - * @{ - * The uIP web server is a very simplistic implementation of an HTTP - * server. It can serve web pages and files from a read-only ROM - * filesystem, and provides a very small scripting language. - - */ - -/** - * \file - * Web server - * \author - * Adam Dunkels <adam@sics.se> - */ - - -/* - * Copyright (c) 2004, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack. - * - * Author: Adam Dunkels <adam@sics.se> - * - * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $ - */ - -#include <stdio.h> - -#include "uip.h" -#include "httpd.h" -#include "httpd-fs.h" -#include "http-strings.h" - -#include <string.h> -#include "stdio.h" -#include "stdlib.h" - -#include "CommandQueue.h" -#include "CallbackStream.h" - -#include "c-fifo.h" - -#define STATE_WAITING 0 -#define STATE_HEADERS 1 -#define STATE_BODY 2 -#define STATE_OUTPUT 3 -#define STATE_UPLOAD 4 - -#define GET 1 -#define POST 2 - -#define ISO_nl 0x0a -#define ISO_space 0x20 -#define ISO_bang 0x21 -#define ISO_percent 0x25 -#define ISO_period 0x2e -#define ISO_slash 0x2f -#define ISO_colon 0x3a - -#define DEBUG_PRINTF printf -//#define DEBUG_PRINTF(...) - - -// this callback gets the results of a command, line by line. need to check if -// we need to stall the upstream sender return 0 if stalled 1 if ok to keep -// providing more -1 if the connection has closed or is not in output state. -// need to see which connection to send to based on state and add result to -// that fifo for each connection. NOTE this will not get called if the -// connection has been closed and the stream will get deleted when the last -// command has been executed -static int command_result(const char *str, void *state) -{ - struct httpd_state *s = (struct httpd_state *)state; - if (s == NULL) { - // connection was closed so discard, this should never happen - DEBUG_PRINTF("ERROR: command result for closed state %d\n", (int)state); - return -1; - } - - if (str == NULL) { - DEBUG_PRINTF("End of command (%p)\n", state); - fifo_push(s->fifo, NULL); - - } else { - if (fifo_size(s->fifo) < 10) { - DEBUG_PRINTF("Got command result (%p): %s", state, str); - fifo_push(s->fifo, strdup(str)); - return 1; - } else { - DEBUG_PRINTF("command result fifo is full (%p)\n", state); - return 0; - } - } - return 1; -} - -static void create_callback_stream(struct httpd_state *s) -{ - // need to create a callback stream here, but do one per connection pass - // the state to the callback, also create the fifo for the command results - s->fifo = new_fifo(); - s->pstream = new_callback_stream(command_result, s); -} - -// Used to save files to SDCARD during upload -static FILE *fd; -static char *output_filename = NULL; -static int file_cnt = 0; -static int open_file(const char *fn) -{ - if (output_filename != NULL) free(output_filename); - output_filename = malloc(strlen(fn) + 5); - strcpy(output_filename, "/sd/"); - strcat(output_filename, fn); - fd = fopen(output_filename, "w"); - if (fd == NULL) { - free(output_filename); - output_filename = NULL; - return 0; - } - return 1; -} - -static int close_file() -{ - free(output_filename); - output_filename = NULL; - fclose(fd); - return 1; -} - -static int save_file(uint8_t *buf, unsigned int len) -{ - if (fwrite(buf, 1, len, fd) == len) { - file_cnt += len; - // HACK alert work around bug causing file corruption when writing large amounts of data - if (file_cnt >= 400) { - file_cnt = 0; - fclose(fd); - fd = fopen(output_filename, "a"); - } - return 1; - - } else { - close_file(); - return 0; - } -} - -static int fs_open(struct httpd_state *s) -{ - if (strncmp(s->filename, "/sd/", 4) == 0) { - DEBUG_PRINTF("Opening file %s\n", s->filename); - s->fd = fopen(s->filename, "r"); - if (s->fd == NULL) { - DEBUG_PRINTF("Failed to open: %s\n", s->filename); - return 0; - } - return 1; - - } else { - s->fd = NULL; - return httpd_fs_open(s->filename, &s->file); - } -} - -/*---------------------------------------------------------------------------*/ -static PT_THREAD(send_command_response(struct httpd_state *s)) -{ - PSOCK_BEGIN(&s->sout); - - do { - PSOCK_WAIT_UNTIL( &s->sout, fifo_size(s->fifo) > 0 ); - s->strbuf = fifo_pop(s->fifo); - if (s->strbuf != NULL) { - // send it - DEBUG_PRINTF("Sending response: %s", s->strbuf); - // TODO send as much as we can in one packet - PSOCK_SEND_STR(&s->sout, s->strbuf); - // free the strdup - free(s->strbuf); - }else if(--s->command_count <= 0) { - // when all commands have completed exit - break; - } - } while (1); - - PSOCK_END(&s->sout); -} - -/*---------------------------------------------------------------------------*/ -static unsigned short generate_part_of_file(void *state) -{ - struct httpd_state *s = (struct httpd_state *)state; - - if (s->file.len > uip_mss()) { - s->len = uip_mss(); - } else { - s->len = s->file.len; - } - memcpy(uip_appdata, s->file.data, s->len); - - return s->len; -} -/*---------------------------------------------------------------------------*/ -static unsigned short generate_part_of_sd_file(void *state) -{ - struct httpd_state *s = (struct httpd_state *)state; - - int len = fread(uip_appdata, 1, uip_mss(), s->fd); - if (len <= 0) { - // we need to send something - strcpy(uip_appdata, "\r\n"); - len = 2; - s->len = 0; - } else { - s->len = len; - } - return len; -} -/*---------------------------------------------------------------------------*/ -static -PT_THREAD(send_file(struct httpd_state *s)) -{ - PSOCK_BEGIN(&s->sout); - - do { - PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s); - s->file.len -= s->len; - s->file.data += s->len; - } while (s->file.len > 0); - - PSOCK_END(&s->sout); -} - -/*---------------------------------------------------------------------------*/ -static PT_THREAD(send_sd_file(struct httpd_state *s)) -{ - PSOCK_BEGIN(&s->sout); - - do { - PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_sd_file, s); - } while (s->len > 0); - - fclose(s->fd); - s->fd = NULL; - - PSOCK_END(&s->sout); -} - -/*---------------------------------------------------------------------------*/ -static PT_THREAD(send_headers_3(struct httpd_state *s, const char *statushdr, char send_content_type)) -{ - char *ptr; - - PSOCK_BEGIN(&s->sout); - - PSOCK_SEND_STR(&s->sout, statushdr); - - if (send_content_type) { - ptr = strrchr(s->filename, ISO_period); - if (ptr == NULL) { - PSOCK_SEND_STR(&s->sout, http_content_type_plain); // http_content_type_binary); - } else if (strncmp(http_html, ptr, 5) == 0 || strncmp(http_shtml, ptr, 6) == 0) { - PSOCK_SEND_STR(&s->sout, http_content_type_html); - } else if (strncmp(http_css, ptr, 4) == 0) { - PSOCK_SEND_STR(&s->sout, http_content_type_css); - } else if (strncmp(http_png, ptr, 4) == 0) { - PSOCK_SEND_STR(&s->sout, http_content_type_png); - } else if (strncmp(http_gif, ptr, 4) == 0) { - PSOCK_SEND_STR(&s->sout, http_content_type_gif); - } else if (strncmp(http_jpg, ptr, 4) == 0) { - PSOCK_SEND_STR(&s->sout, http_content_type_jpg); - } else { - PSOCK_SEND_STR(&s->sout, http_content_type_plain); - } - } - PSOCK_END(&s->sout); -} -static PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr)) -{ - return send_headers_3(s, statushdr, 1); -} -/*---------------------------------------------------------------------------*/ -static -PT_THREAD(handle_output(struct httpd_state *s)) -{ - PT_BEGIN(&s->outputpt); - - if (s->method == POST) { - if (strcmp(s->filename, "/command") == 0) { - DEBUG_PRINTF("Executed command post\n"); - PT_WAIT_THREAD(&s->outputpt, send_headers(s, http_header_200)); - // send response as we get it - PT_WAIT_THREAD(&s->outputpt, send_command_response(s)); - - } else if (strcmp(s->filename, "/command_silent") == 0) { - DEBUG_PRINTF("Executed silent command post\n"); - PT_WAIT_THREAD(&s->outputpt, send_headers(s, http_header_200)); - - } else if (strcmp(s->filename, "/upload") == 0) { - DEBUG_PRINTF("upload output: %d\n", s->uploadok); - if (s->uploadok == 0) { - PT_WAIT_THREAD(&s->outputpt, send_headers(s, http_header_503)); - PSOCK_SEND_STR(&s->sout, "FAILED\r\n"); - } else { - PT_WAIT_THREAD(&s->outputpt, send_headers(s, http_header_200)); - PSOCK_SEND_STR(&s->sout, "OK\r\n"); - } - - } else { - DEBUG_PRINTF("Unknown POST: %s\n", s->filename); - httpd_fs_open(http_404_html, &s->file); - strcpy(s->filename, http_404_html); - PT_WAIT_THREAD(&s->outputpt, send_headers(s, http_header_404)); - PT_WAIT_THREAD(&s->outputpt, send_file(s)); - } - - } else { - // Presume method GET - if (!fs_open(s)) { // Note this has the side effect of opening the file - DEBUG_PRINTF("404 file not found\n"); - httpd_fs_open(http_404_html, &s->file); - strcpy(s->filename, http_404_html); - PT_WAIT_THREAD(&s->outputpt, send_headers(s, http_header_404)); - PT_WAIT_THREAD(&s->outputpt, send_file(s)); - - } else if (s->cache_page) { - if (s->fd != NULL) { - // if it was an sd file then we need to close it - fclose(s->fd); - s->fd = NULL; - } - // tell it it has not changed - DEBUG_PRINTF("304 Not Modified\n"); - PT_WAIT_THREAD(&s->outputpt, send_headers_3(s, http_header_304, 0)); - - } else { - DEBUG_PRINTF("sending file %s\n", s->filename); - PT_WAIT_THREAD(&s->outputpt, send_headers(s, http_header_200)); - if (s->fd != NULL) { - // send from sd card - PT_WAIT_THREAD(&s->outputpt, send_sd_file(s)); - - } else { - // send from FLASH - PT_WAIT_THREAD(&s->outputpt, send_file(s)); - } - } - } - - PSOCK_CLOSE(&s->sout); - PT_END(&s->outputpt); -} - -/*---------------------------------------------------------------------------*/ -// this forces us to yield every other call as we read all data everytime -static char has_newdata(struct httpd_state *s) -{ - if (s->upload_state == 1) { - /* All data in uip_appdata buffer already consumed. */ - s->upload_state = 0; - return 0; - } else if (uip_newdata()) { - /* There is new data that has not been consumed. */ - return 1; - } else { - /* There is no new data. */ - return 0; - } -} - -/* - * handle trhe uploaded data, as there may be part of that buffer still in the last packet buffer - * write that first from the buf/len parameters - */ -static PT_THREAD(handle_uploaded_data(struct httpd_state *s, uint8_t *buf, int len)) -{ - PT_BEGIN(&s->inputpt); - - DEBUG_PRINTF("Uploading file: %s, %d\n", s->upload_name, s->content_length); - - // The body is the raw data to be stored to the file - if (!open_file(s->upload_name)) { - DEBUG_PRINTF("failed to open file\n"); - s->uploadok = 0; - PT_EXIT(&s->inputpt); - } - - DEBUG_PRINTF("opened file: %s\n", s->upload_name); - - if (len > 0) { - // write the first part of the buffer - if (!save_file(buf, len)) { - DEBUG_PRINTF("initial write failed\n"); - s->uploadok = 0; - PT_EXIT(&s->inputpt); - } - s->content_length -= len; - } - - s->upload_state = 1; // first time through we need to yield to get new data - - // save the entire input buffer - while (s->content_length > 0) { - PT_WAIT_UNTIL(&s->inputpt, has_newdata(s)); - s->upload_state = 1; - - u8_t *readptr = (u8_t *)uip_appdata; - int readlen = uip_datalen(); - //DEBUG_PRINTF("read %d bytes of data\n", readlen); - - if (readlen > 0) { - if (!save_file(readptr, readlen)) { - DEBUG_PRINTF("write failed\n"); - s->uploadok = 0; - PT_EXIT(&s->inputpt); - } - s->content_length -= readlen; - } - } - - close_file(); - s->uploadok = 1; - DEBUG_PRINTF("finished upload\n"); - - PT_END(&s->inputpt); -} -/*---------------------------------------------------------------------------*/ -static -PT_THREAD(handle_input(struct httpd_state *s)) -{ - PSOCK_BEGIN(&s->sin); - - PSOCK_READTO(&s->sin, ISO_space); - - if (strncmp(s->inputbuf, http_get, 4) == 0) { - s->method = GET; - } else if (strncmp(s->inputbuf, http_post, 4) == 0) { - s->method = POST; - } else { - DEBUG_PRINTF("Unexpected method: %s\n", s->inputbuf); - PSOCK_CLOSE_EXIT(&s->sin); - } - - DEBUG_PRINTF("Method: %s\n", s->method == POST ? "POST" : "GET"); - - PSOCK_READTO(&s->sin, ISO_space); - - if (s->inputbuf[0] != ISO_slash) { - PSOCK_CLOSE_EXIT(&s->sin); - } - - if (s->inputbuf[1] == ISO_space) { - strncpy(s->filename, http_index_html, sizeof(s->filename)); - } else { - s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0; - strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename)); - } - - DEBUG_PRINTF("filename: %s\n", s->filename); - - /* httpd_log_file(uip_conn->ripaddr, s->filename);*/ - - s->state = STATE_HEADERS; - s->content_length = 0; - s->cache_page = 0; - while (1) { - if (s->state == STATE_HEADERS) { - // read the headers of the request - PSOCK_READTO(&s->sin, ISO_nl); - s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0; - if (s->inputbuf[0] == '\r') { - DEBUG_PRINTF("end of headers\n"); - if (s->method == GET) { - s->state = STATE_OUTPUT; - break; - } else if (s->method == POST) { - if (strcmp(s->filename, "/upload") == 0) { - s->state = STATE_UPLOAD; - } else { - s->state = STATE_BODY; - } - } - } else { - DEBUG_PRINTF("reading header: %s\n", s->inputbuf); - // handle headers here - if (strncmp(s->inputbuf, http_content_length, sizeof(http_content_length) - 1) == 0) { - s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0; - s->content_length = atoi(&s->inputbuf[sizeof(http_content_length) - 1]); - DEBUG_PRINTF("Content length= %s, %d\n", &s->inputbuf[sizeof(http_content_length) - 1], s->content_length); - - } else if (strncmp(s->inputbuf, "X-Filename: ", 11) == 0) { - s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0; - strncpy(s->upload_name, &s->inputbuf[12], sizeof(s->upload_name) - 1); - DEBUG_PRINTF("Upload name= %s\n", s->upload_name); - - } else if (strncmp(s->inputbuf, http_cache_control, sizeof(http_cache_control) - 1) == 0) { - s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0; - s->cache_page = strncmp(http_no_cache, &s->inputbuf[sizeof(http_cache_control) - 1], sizeof(http_no_cache) - 1) != 0; - DEBUG_PRINTF("cache page= %d\n", s->cache_page); - } - } - - } else if (s->state == STATE_BODY) { - if (s->method == POST && strcmp(s->filename, "/command") == 0) { - // create a callback stream and fifo for the results as it is a command - create_callback_stream(s); - - } else if (s->method == POST && strcmp(s->filename, "/command_silent") == 0) { - // stick the command on the command queue specifying null output stream - s->pstream = NULL; - - } else { // unknown POST - DEBUG_PRINTF("Unknown Post URL: %s\n", s->filename); - s->state = STATE_OUTPUT; - break; - } - s->command_count= 0; - // read the Body of the request, each line is a command - if (s->content_length > 0) { - DEBUG_PRINTF("start reading body %d...\n", s->content_length); - while (s->content_length > 2) { - PSOCK_READTO(&s->sin, ISO_nl); - s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0; - s->content_length -= PSOCK_DATALEN(&s->sin); - // stick the command on the command queue, with this connections stream output - DEBUG_PRINTF("Adding command: %s, left: %d\n", s->inputbuf, s->content_length); - network_add_command(s->inputbuf, s->pstream); - s->command_count++; // count number of command lines we submit - } - DEBUG_PRINTF("Read body done\n"); - s->state = STATE_OUTPUT; - - } else { - s->state = STATE_OUTPUT; - } - break; - - } else if (s->state == STATE_UPLOAD) { - PSOCK_WAIT_THREAD(&s->sin, handle_uploaded_data(s, PSOCK_GET_START_OF_REST_OF_BUFFER(&s->sin), PSOCK_GET_LENGTH_OF_REST_OF_BUFFER(&s->sin))); - PSOCK_MARK_BUFFER_READ(&s->sin); - s->state = STATE_OUTPUT; - break; - - } else { - DEBUG_PRINTF("WTF State: %d", s->state); - break; - } - } - - PSOCK_END(&s->sin); -} -/*---------------------------------------------------------------------------*/ -static void -handle_connection(struct httpd_state *s) -{ - if (s->state != STATE_OUTPUT) { - handle_input(s); - } - if (s->state == STATE_OUTPUT) { - handle_output(s); - } -} -/*---------------------------------------------------------------------------*/ -void -httpd_appcall(void) -{ - struct httpd_state *s = (struct httpd_state *)(uip_conn->appstate); - - if (uip_connected()) { - s = malloc(sizeof(struct httpd_state)); - if (s == NULL) { - DEBUG_PRINTF("Connection: Out of memory\n"); - uip_abort(); - return; - } - uip_conn->appstate = s; - DEBUG_PRINTF("Connection: %d.%d.%d.%d:%d\n", - uip_ipaddr1(uip_conn->ripaddr), uip_ipaddr2(uip_conn->ripaddr), - uip_ipaddr3(uip_conn->ripaddr), uip_ipaddr4(uip_conn->ripaddr), - HTONS(uip_conn->rport)); - - PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1); - PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1); - PT_INIT(&s->outputpt); - PT_INIT(&s->inputpt); - s->state = STATE_WAITING; - /* timer_set(&s->timer, CLOCK_SECOND * 100);*/ - s->timer = 0; - s->fd = NULL; - s->strbuf = NULL; - s->fifo = NULL; - s->pstream = NULL; - } - - if (s == NULL) { - DEBUG_PRINTF("ERROR no state context: %d\n", uip_flags); - uip_abort(); - return; - } - - // check for timeout on connection here so we can cleanup if we abort - if (uip_poll()) { - ++s->timer; - if (s->timer >= 20 * 2) { // we have a 0.5 second poll and we want 20 second timeout - DEBUG_PRINTF("Timer expired, aborting\n"); - uip_abort(); - } - } else { - s->timer = 0; - } - - if (uip_closed() || uip_aborted() || uip_timedout()) { - DEBUG_PRINTF("Closing connection: %d\n", HTONS(uip_conn->rport)); - if (s->fd != NULL) fclose(fd); // clean up - if (s->strbuf != NULL) free(s->strbuf); - if (s->pstream != NULL) { - // free these if they were allocated - delete_fifo(s->fifo); - delete_callback_stream(s->pstream); // this will mark it as closed and will get deleted when no longer needed - } - free(s) ; - uip_conn->appstate = NULL; - - } else { - handle_connection(s); - } -} - -/*---------------------------------------------------------------------------*/ -/** - * \brief Initialize the web server - * - * This function initializes the web server and should be - * called at system boot-up. - */ -void httpd_init(void) -{ - uip_listen(HTONS(80)); -} -/*---------------------------------------------------------------------------*/ -/** @} */
--- a/libs/Network/uip/webserver/httpd.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,79 +0,0 @@ -/* - * Copyright (c) 2001-2005, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack. - * - * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $ - * - */ - -#ifndef __HTTPD_H__ -#define __HTTPD_H__ - -#include "psock.h" -#include "httpd-fs.h" -#include "stdio.h" - -struct httpd_state { - unsigned char timer; - struct psock sin, sout; - struct pt outputpt, inputpt; - char inputbuf[100]; - char filename[60]; - char upload_name[32]; - char method; - char state; - struct httpd_fs_file file; - FILE *fd; - uint16_t len; - char *strbuf; - int content_length; - uint16_t count; - uint8_t uploadok; - uint8_t upload_state; - uint8_t cache_page; - void *pstream; - void *fifo; - uint16_t command_count; -}; - -#ifdef __cplusplus -extern "C" { -#endif - -void httpd_init(void); -void httpd_appcall(void); - -void httpd_log(char *msg); -void httpd_log_file(u16_t *requester, char *file); - -#ifdef __cplusplus -} -#endif - -#endif /* __HTTPD_H__ */
--- a/libs/Network/uip/webserver/makefsdata.pl Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,78 +0,0 @@ -#!/usr/bin/perl - -open(OUTPUT, "> httpd-fsdata2.h"); - -chdir("httpd-fs"); - -opendir(DIR, "."); -@files = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR); -closedir(DIR); - -foreach $file (@files) { - - if(-d $file && $file !~ /^\./) { - print "Processing directory $file\n"; - opendir(DIR, $file); - @newfiles = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR); - closedir(DIR); - printf "Adding files @newfiles\n"; - @files = (@files, map { $_ = "$file/$_" } @newfiles); - next; - } -} - -foreach $file (@files) { - if(-f $file) { - - print "Adding file $file\n"; - - open(FILE, $file) || die "Could not open file $file\n"; - - $file =~ s-^-/-; - $fvar = $file; - $fvar =~ s-/-_-g; - $fvar =~ s-\.-_-g; - # for AVR, add PROGMEM here - print(OUTPUT "static const unsigned char data".$fvar."[] = {\n"); - print(OUTPUT "\t/* $file */\n\t"); - for($j = 0; $j < length($file); $j++) { - printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1))); - } - printf(OUTPUT "0,\n"); - - - $i = 0; - while(read(FILE, $data, 1)) { - if($i == 0) { - print(OUTPUT "\t"); - } - printf(OUTPUT "%#02x, ", unpack("C", $data)); - $i++; - if($i == 10) { - print(OUTPUT "\n"); - $i = 0; - } - } - print(OUTPUT "0};\n\n"); - close(FILE); - push(@fvars, $fvar); - push(@pfiles, $file); - } -} - -for($i = 0; $i < @fvars; $i++) { - $file = $pfiles[$i]; - $fvar = $fvars[$i]; - - if($i == 0) { - $prevfile = "NULL"; - } else { - $prevfile = "file" . $fvars[$i - 1]; - } - print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, "); - print(OUTPUT "data$fvar + ". (length($file) + 1) .", "); - print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n"); -} - -print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n"); -print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");
--- a/libs/Network/uip/webserver/makestrings Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,40 +0,0 @@ -#!/usr/bin/perl - - -sub stringify { - my $name = shift(@_); - open(OUTPUTC, "> $name.c"); - open(OUTPUTH, "> $name.h"); - - open(FILE, "$name"); - - while(<FILE>) { - if(/(.+) "(.+)"/) { - $var = $1; - $data = $2; - - $datan = $data; - $datan =~ s/\\r/\r/g; - $datan =~ s/\\n/\n/g; - $datan =~ s/\\01/\01/g; - $datan =~ s/\\0/\0/g; - - printf(OUTPUTC "const char $var\[%d] = \n", length($datan) + 1); - printf(OUTPUTC "/* \"$data\" */\n"); - printf(OUTPUTC "{"); - for($j = 0; $j < length($datan); $j++) { - printf(OUTPUTC "%#02x, ", unpack("C", substr($datan, $j, 1))); - } - printf(OUTPUTC "};\n"); - - printf(OUTPUTH "extern const char $var\[%d];\n", length($datan) + 1); - - } - } - close(OUTPUTC); - close(OUTPUTH); -} -stringify("http-strings"); - -exit 0; -
--- a/libs/Network/uip/webserver/webserver.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,49 +0,0 @@ -/* - * Copyright (c) 2002, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * This file is part of the uIP TCP/IP stack - * - * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $ - * - */ -#ifndef __WEBSERVER_H__ -#define __WEBSERVER_H__ - -#include "httpd.h" - -//typedef struct httpd_state uip_tcp_appstate_t; -/* UIP_APPCALL: the name of the application function. This function - must return void and take no arguments (i.e., C type "void - appfunc(void)"). */ -#ifndef UIP_APPCALL -#define UIP_APPCALL httpd_appcall -#endif - - -#endif /* __WEBSERVER_H__ */
--- a/libs/Pin.cpp Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/Pin.cpp Sun Mar 02 06:33:08 2014 +0000 @@ -1,6 +1,7 @@ #include "Pin.h" #include "utils.h" +#include "Targets/Target.h" Pin::Pin(){ this->inverting= false; @@ -8,85 +9,53 @@ // Make a new pin object from a string Pin* Pin::from_string(std::string value){ - LPC_GPIO_TypeDef* gpios[5] ={LPC_GPIO0,LPC_GPIO1,LPC_GPIO2,LPC_GPIO3,LPC_GPIO4}; - - // cs is the current position in the string - const char* cs = value.c_str(); - // cn is the position of the next char after the number we just read - char* cn = NULL; - - // grab first integer as port. pointer to first non-digit goes in cn - this->port_number = strtol(cs, &cn, 10); - // if cn > cs then strtol read at least one digit - if ((cn > cs) && (port_number <= 4)){ - // translate port index into something useful - this->port = gpios[(unsigned int) this->port_number]; - // if the char after the first integer is a . then we should expect a pin index next - if (*cn == '.'){ - // move pointer to first digit (hopefully) of pin index - cs = ++cn; - - // grab pin index. - this->pin = strtol(cs, &cn, 10); - - // if strtol read some numbers, cn will point to the first non-digit - if ((cn > cs) && (pin < 32)){ - this->port->FIOMASK &= ~(1 << this->pin); + // Find the end of the pin name. + std::string::size_type e = value.find_first_of("!o^V-@\n\r\t "); + name = pin_name_from_string(value.substr(0, e)); + if (name == NC) + return this; + + gpio_init(&pin, name, PIN_INPUT); + + // The current position in the string + const char* cn = value.c_str() + e; - // now check for modifiers:- - // ! = invert pin - // o = set pin to open drain - // ^ = set pin to pull up - // v = set pin to pull down - // - = set pin to no pull up or down - // @ = set pin to repeater mode - for (;*cn;cn++) { - switch(*cn) { - case '!': - this->inverting = true; - break; - case 'o': - as_open_drain(); - break; - case '^': - pull_up(); - break; - case 'v': - pull_down(); - break; - case '-': - pull_none(); - break; - case '@': - as_repeater(); - break; - default: - // skip any whitespace following the pin index - if (!is_whitespace(*cn)) - return this; - } - } - return this; - } + for (;*cn;cn++) { + switch(*cn) { + case '!': + this->inverting = true; + break; + case 'o': + as_open_drain(); + break; + case '^': + pull_up(); + break; + case 'v': + pull_down(); + break; + case '-': + pull_none(); + break; + case '@': + as_repeater(); + break; + default: + // skip any whitespace following the pin index + if (!is_whitespace(*cn)) + return this; } } // from_string failed. TODO: some sort of error - port_number = 0; - port = gpios[0]; - pin = 255; inverting = false; return this; } // Configure this pin as OD Pin* Pin::as_open_drain(){ - if (this->pin >= 32) return this; - if( this->port_number == 0 ){ LPC_PINCON->PINMODE_OD0 |= (1<<this->pin); } - if( this->port_number == 1 ){ LPC_PINCON->PINMODE_OD1 |= (1<<this->pin); } - if( this->port_number == 2 ){ LPC_PINCON->PINMODE_OD2 |= (1<<this->pin); } - if( this->port_number == 3 ){ LPC_PINCON->PINMODE_OD3 |= (1<<this->pin); } - if( this->port_number == 4 ){ LPC_PINCON->PINMODE_OD4 |= (1<<this->pin); } + if (!connected()) return this; + gpio_mode(&pin, OpenDrain); pull_none(); // no pull up by default return this; } @@ -94,56 +63,28 @@ // Configure this pin as a repeater Pin* Pin::as_repeater(){ - if (this->pin >= 32) return this; - // Set the two bits for this pin as 01 - if( this->port_number == 0 && this->pin < 16 ){ LPC_PINCON->PINMODE0 |= (1<<( this->pin*2)); LPC_PINCON->PINMODE0 &= ~(2<<( this->pin *2)); } - if( this->port_number == 0 && this->pin >= 16 ){ LPC_PINCON->PINMODE1 |= (1<<( this->pin*2)); LPC_PINCON->PINMODE1 &= ~(2<<((this->pin-16)*2)); } - if( this->port_number == 1 && this->pin < 16 ){ LPC_PINCON->PINMODE2 |= (1<<( this->pin*2)); LPC_PINCON->PINMODE2 &= ~(2<<( this->pin *2)); } - if( this->port_number == 1 && this->pin >= 16 ){ LPC_PINCON->PINMODE3 |= (1<<( this->pin*2)); LPC_PINCON->PINMODE3 &= ~(2<<((this->pin-16)*2)); } - if( this->port_number == 2 && this->pin < 16 ){ LPC_PINCON->PINMODE4 |= (1<<( this->pin*2)); LPC_PINCON->PINMODE4 &= ~(2<<( this->pin *2)); } - if( this->port_number == 3 && this->pin >= 16 ){ LPC_PINCON->PINMODE7 |= (1<<( this->pin*2)); LPC_PINCON->PINMODE7 &= ~(2<<((this->pin-16)*2)); } - if( this->port_number == 4 && this->pin >= 16 ){ LPC_PINCON->PINMODE9 |= (1<<( this->pin*2)); LPC_PINCON->PINMODE9 &= ~(2<<((this->pin-16)*2)); } + if (!connected()) return this; + // ? return this; } // Configure this pin as no pullup or pulldown Pin* Pin::pull_none(){ - if (this->pin >= 32) return this; - // Set the two bits for this pin as 10 - if( this->port_number == 0 && this->pin < 16 ){ LPC_PINCON->PINMODE0 |= (2<<( this->pin*2)); LPC_PINCON->PINMODE0 &= ~(1<<( this->pin *2)); } - if( this->port_number == 0 && this->pin >= 16 ){ LPC_PINCON->PINMODE1 |= (2<<( this->pin*2)); LPC_PINCON->PINMODE1 &= ~(1<<((this->pin-16)*2)); } - if( this->port_number == 1 && this->pin < 16 ){ LPC_PINCON->PINMODE2 |= (2<<( this->pin*2)); LPC_PINCON->PINMODE2 &= ~(1<<( this->pin *2)); } - if( this->port_number == 1 && this->pin >= 16 ){ LPC_PINCON->PINMODE3 |= (2<<( this->pin*2)); LPC_PINCON->PINMODE3 &= ~(1<<((this->pin-16)*2)); } - if( this->port_number == 2 && this->pin < 16 ){ LPC_PINCON->PINMODE4 |= (2<<( this->pin*2)); LPC_PINCON->PINMODE4 &= ~(1<<( this->pin *2)); } - if( this->port_number == 3 && this->pin >= 16 ){ LPC_PINCON->PINMODE7 |= (2<<( this->pin*2)); LPC_PINCON->PINMODE7 &= ~(1<<((this->pin-16)*2)); } - if( this->port_number == 4 && this->pin >= 16 ){ LPC_PINCON->PINMODE9 |= (2<<( this->pin*2)); LPC_PINCON->PINMODE9 &= ~(1<<((this->pin-16)*2)); } + if (!connected()) return this; + gpio_mode(&pin, PullNone); return this; } // Configure this pin as a pullup Pin* Pin::pull_up(){ - if (this->pin >= 32) return this; - // Set the two bits for this pin as 00 - if( this->port_number == 0 && this->pin < 16 ){ LPC_PINCON->PINMODE0 &= ~(3<<( this->pin *2)); } - if( this->port_number == 0 && this->pin >= 16 ){ LPC_PINCON->PINMODE1 &= ~(3<<((this->pin-16)*2)); } - if( this->port_number == 1 && this->pin < 16 ){ LPC_PINCON->PINMODE2 &= ~(3<<( this->pin *2)); } - if( this->port_number == 1 && this->pin >= 16 ){ LPC_PINCON->PINMODE3 &= ~(3<<((this->pin-16)*2)); } - if( this->port_number == 2 && this->pin < 16 ){ LPC_PINCON->PINMODE4 &= ~(3<<( this->pin *2)); } - if( this->port_number == 3 && this->pin >= 16 ){ LPC_PINCON->PINMODE7 &= ~(3<<((this->pin-16)*2)); } - if( this->port_number == 4 && this->pin >= 16 ){ LPC_PINCON->PINMODE9 &= ~(3<<((this->pin-16)*2)); } + if (!connected()) return this; + gpio_mode(&pin, PullUp); return this; } // Configure this pin as a pulldown Pin* Pin::pull_down(){ - if (this->pin >= 32) return this; - // Set the two bits for this pin as 11 - if( this->port_number == 0 && this->pin < 16 ){ LPC_PINCON->PINMODE0 |= (3<<( this->pin *2)); } - if( this->port_number == 0 && this->pin >= 16 ){ LPC_PINCON->PINMODE1 |= (3<<((this->pin-16)*2)); } - if( this->port_number == 1 && this->pin < 16 ){ LPC_PINCON->PINMODE2 |= (3<<( this->pin *2)); } - if( this->port_number == 1 && this->pin >= 16 ){ LPC_PINCON->PINMODE3 |= (3<<((this->pin-16)*2)); } - if( this->port_number == 2 && this->pin < 16 ){ LPC_PINCON->PINMODE4 |= (3<<( this->pin *2)); } - if( this->port_number == 3 && this->pin >= 16 ){ LPC_PINCON->PINMODE7 |= (3<<((this->pin-16)*2)); } - if( this->port_number == 4 && this->pin >= 16 ){ LPC_PINCON->PINMODE9 |= (3<<((this->pin-16)*2)); } + if (!connected()) return this; + gpio_mode(&pin, PullDown); return this; }
--- a/libs/Pin.h Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/Pin.h Sun Mar 02 06:33:08 2014 +0000 @@ -1,12 +1,12 @@ #ifndef PIN_H #define PIN_H +#include "mbed.h" + #include <stdlib.h> #include <stdio.h> #include <string> -#include "libs/LPC17xx/sLPC17xx.h" // smoothed mbed.h lib - class Pin { public: Pin(); @@ -14,18 +14,16 @@ Pin* from_string(std::string value); inline bool connected(){ - return this->pin < 32; + return name != NC; } inline Pin* as_output(){ - if (this->pin < 32) - this->port->FIODIR |= 1<<this->pin; + gpio_dir(&pin, PIN_OUTPUT); return this; } inline Pin* as_input(){ - if (this->pin < 32) - this->port->FIODIR &= ~(1<<this->pin); + gpio_dir(&pin, PIN_INPUT); return this; } @@ -40,24 +38,17 @@ Pin* pull_none(void); inline bool get(){ - - if (this->pin >= 32) return false; - return this->inverting ^ (( this->port->FIOPIN >> this->pin ) & 1); + return this->inverting ^ gpio_read(&pin); } inline void set(bool value) { - if (this->pin >= 32) return; - if ( this->inverting ^ value ) - this->port->FIOSET = 1 << this->pin; - else - this->port->FIOCLR = 1 << this->pin; + gpio_write(&pin, value ^ this->inverting); } - LPC_GPIO_TypeDef* port; + PinName name; bool inverting; - char port_number; - unsigned char pin; + gpio_t pin; };
--- a/libs/RingBuffer.h Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/RingBuffer.h Sun Mar 02 06:33:08 2014 +0000 @@ -31,8 +31,6 @@ volatile int head; }; -#include "sLPC17xx.h" - template<class kind, int length> RingBuffer<kind, length>::RingBuffer(){ this->tail = this->head = 0; }
--- a/libs/SlowTicker.cpp Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/SlowTicker.cpp Sun Mar 02 06:33:08 2014 +0000 @@ -14,8 +14,6 @@ #include "libs/Hook.h" #include "modules/robot/Conveyor.h" -#include <mri.h> - // This module uses a Timer to periodically call hooks // Modules register with a function ( callback ) and a frequency, and we then call that function at the given frequency. @@ -25,16 +23,6 @@ max_frequency = 0; global_slow_ticker = this; - // Configure the actual timer - LPC_SC->PCONP |= (1 << 22); // Power Ticker ON - LPC_TIM2->MR0 = 10000; // Initial dummy value for Match Register - LPC_TIM2->MCR = 3; // Match on MR0, reset on MR0 - LPC_TIM2->TCR = 1; // Enable interrupt - NVIC_EnableIRQ(TIMER2_IRQn); // Enable interrupt handler - - // ISP button - ispbtn.from_string("2.10")->as_input()->pull_up(); - // TODO: What is this ?? flag_1s_flag = 0; flag_1s_count = SystemCoreClock>>2; @@ -52,9 +40,6 @@ // Set the base frequency we use for all sub-frequencies void SlowTicker::set_frequency( int frequency ){ this->interval = (SystemCoreClock >> 2) / frequency; // SystemCoreClock/4 = Timer increments in a second - LPC_TIM2->MR0 = this->interval; - LPC_TIM2->TCR = 3; // Reset - LPC_TIM2->TCR = 1; // Reset flag_1s_count= SystemCoreClock>>2; } @@ -92,12 +77,6 @@ else g4_ticks = 0; } - - // Enter MRI mode if the ISP button is pressed - // TODO: This should have it's own module - if (ispbtn.get() == 0) - __debugbreak(); - } bool SlowTicker::flag_1s(){ @@ -182,9 +161,5 @@ } extern "C" void TIMER2_IRQHandler (void){ - if((LPC_TIM2->IR >> 0) & 1){ // If interrupt register set for MR0 - LPC_TIM2->IR |= 1 << 0; // Reset it - } global_slow_ticker->tick(); } -
--- a/libs/SlowTicker.h Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/SlowTicker.h Sun Mar 02 06:33:08 2014 +0000 @@ -19,7 +19,6 @@ #include "libs/Pin.h" -#include "system_LPC17xx.h" // for SystemCoreClock #include <math.h> class SlowTicker : public Module{ @@ -60,6 +59,7 @@ protected: int flag_1s_count; volatile int flag_1s_flag; + Ticker ticker; };
--- a/libs/StepTicker.h Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/StepTicker.h Sun Mar 02 06:33:08 2014 +0000 @@ -12,6 +12,7 @@ using namespace std; #include <vector> +#include <stdint.h> #include "libs/Module.h"
--- a/libs/StreamOutput.h Fri Feb 28 18:52:52 2014 -0800 +++ b/libs/StreamOutput.h Sun Mar 02 06:33:08 2014 +0000 @@ -8,8 +8,8 @@ #ifndef STREAMOUTPUT_H #define STREAMOUTPUT_H -#include <cstdarg> -#include <cstring> +#include <stdarg.h> +#include <string.h> #include <stdio.h> // This is a base class for all StreamOutput objects.
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/libs/Targets/TARGET_NUCLEO_F103RB/Target.cpp Sun Mar 02 06:33:08 2014 +0000 @@ -0,0 +1,29 @@ +#include "../Target.h" + +#include "PinNames.h" + +#include <stdlib.h> + +static PinName pin_map[4][16] = { + {PA_0, PA_1, PA_2, PA_3, PA_4, PA_5, PA_6, PA_7, PA_8, PA_9, PA_10, PA_11, PA_12, PA_13, PA_14, PA_15}, + {PB_0, PB_1, PB_2, PB_3, PB_4, PB_5, PB_6, PB_7, PB_8, PB_9, PB_10, PB_11, PB_12, PB_13, PB_14, PB_15}, + {PC_0, PC_1, PC_2, PC_3, PC_4, PC_5, PC_6, PC_7, PC_8, PC_9, PC_10, PC_11, PC_12, PC_13, PC_14, PC_15}, + {PD_0, PD_1, PD_2, NC, NC, NC, NC, NC, NC, NC, NC, NC, NC, NC, NC, NC} + }; + +// STM Nucleo pins are in the form of <PORT>.<PIN> where PORT = [A-D] +// and PIN = [1-15]. Port D only has 3 pins. +PinName pin_name_from_string(std::string str) { + if (str.size() < 3) + return NC; + unsigned port = str[0]; + port -= 'A'; + if (port > 3) + return NC; + if (str[1] != '.') + return NC; + unsigned long pin = strtoul(str.data() + 2, NULL, 10); + if (pin > 15) + return NC; + return pin_map[port][pin]; +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/libs/Targets/Target.h Sun Mar 02 06:33:08 2014 +0000 @@ -0,0 +1,6 @@ +#include "PinNames.h" + +#include <string> + +// Get the PinName for a specific target from a string. +PinName pin_name_from_string(std::string);
--- a/libs/spi.cpp Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,244 +0,0 @@ -#include "spi.h" - -#include "lpc17xx_clkpwr.h" -#include "lpc17xx_pinsel.h" -#include "lpc17xx_ssp.h" -#include "lpc17xx_gpio.h" - -#include <stdio.h> - -SPI* SPI::isr_dispatch[N_SPI_INTERRUPT_ROUTINES]; - -class DMA; - -SPI::SPI(PinName mosi, PinName miso, PinName sclk) -{ - this->mosi.port = (mosi >> 5) & 7; - this->mosi.pin = mosi & 0x1F; - - this->miso.port = (miso >> 5) & 7; - this->miso.pin = miso & 0x1F; - - this->sclk.port = (sclk >> 5) & 7; - this->sclk.pin = sclk & 0x1F; - - FIO_SetDir(this->mosi.port, 1UL << this->mosi.pin, 1); - FIO_SetDir(this->miso.port, 1UL << this->miso.pin, 0); - FIO_SetDir(this->sclk.port, 1UL << this->sclk.pin, 1); - - if (mosi == P0_9 && miso == P0_8 && sclk == P0_7) - { -// iprintf("SPI: using 0.7,0.8,0.9 with SSP1\n"); - // SSP1 on 0.7,0.8,0.9 - sspr = LPC_SSP1; - isr_dispatch[1] = this; - - LPC_PINCON->PINSEL0 &= ~((3 << (7*2)) | (3 << (8*2)) | (3 << (9*2))); - LPC_PINCON->PINSEL0 |= ((2 << (7*2)) | (2 << (8*2)) | (2 << (9*2))); - - LPC_SC->PCLKSEL0 &= 0xFFCFFFFF; - LPC_SC->PCLKSEL0 |= 0x00100000; - - LPC_SC->PCONP |= CLKPWR_PCONP_PCSSP1; - } - else if (mosi == P0_18 && miso == P0_17 && sclk == P0_15) - { -// iprintf("SPI: using 0.15,0.17,0.18 with SSP0\n"); - // SSP0 on 0.15,0.16,0.17,0.18 - sspr = LPC_SSP0; - isr_dispatch[0] = this; - - LPC_PINCON->PINSEL0 &= ~(3 << (15*2)); - LPC_PINCON->PINSEL0 |= (2 << (15*2)); - LPC_PINCON->PINSEL1 &= ~( (3 << ((17*2)&30)) | (3 << ((18*2)&30)) ); - LPC_PINCON->PINSEL1 |= ( (2 << ((17*2)&30)) | (2 << ((18*2)&30)) ); - - LPC_SC->PCLKSEL1 &= 0xFFFFF3FF; - LPC_SC->PCLKSEL1 |= 0x00000400; - - LPC_SC->PCONP |= CLKPWR_PCONP_PCSSP0; - } - else if (mosi == P1_24 && miso == P1_23 && sclk == P1_20) - { -// iprintf("SPI: using 1.20,1.23,1.24 with SSP0\n"); - // SSP0 on 1.20,1.23,1.24 - sspr = LPC_SSP0; - isr_dispatch[0] = this; - -// // LPC_PINCON->PINSEL3 &= 0xFFFC3CFF; -// LPC_PINCON->PINSEL3 |= 0x0003C300; - -// LPC_PINCON->PINSEL3 &= ~( (3 << ((20*2)&30)) | (3 << ((23*2)&30)) | (3 << ((24*2)&30)) ); - LPC_PINCON->PINSEL3 |= ( (3 << ((20*2)&30)) | (3 << ((23*2)&30)) | (3 << ((24*2)&30)) ); - - LPC_SC->PCLKSEL1 &= 0xFFFFF3FF; - LPC_SC->PCLKSEL1 |= 0x00000400; - - LPC_SC->PCONP |= CLKPWR_PCONP_PCSSP0; - } - else - { -// iprintf("SPI: using soft-SPI\n"); - sspr = (LPC_SSP_TypeDef *) 0; - } - - if (sspr) { - sspr->CR0 = SSP_DATABIT_8 | - SSP_FRAME_SPI; - sspr->CR1 = SSP_MASTER_MODE; - frequency(10000); - sspr->CR1 |= SSP_CR1_SSP_EN; - } -} - -SPI::~SPI() -{ - if (sspr == LPC_SSP0) - LPC_SC->PCONP &= CLKPWR_PCONP_PCSSP0; - else if (sspr == LPC_SSP1) - LPC_SC->PCONP &= CLKPWR_PCONP_PCSSP1; -} - -void SPI::frequency(uint32_t f) -{ - // CCLK = 25MHz - // CPSR = 2 to 254, even only - // CR0[8:15] (SCR, 0..255) is a further prescale - -// iprintf("SPI: frequency %lu:", f); - delay = 25000000 / f; - // f = 25MHz / (CPSR . [SCR + 1]) - // CPSR . (SCR + 1) = 25MHz / f - // min freq is 25MHz / (254 * 256) - if (sspr) { - if (f < 385) { - sspr->CPSR = 254; - sspr->CR0 &= 0x00FF; - sspr->CR0 |= 255 << 8; - } - // max freq is 25MHz / (2 * 1) - else if (f > 12500000) { - sspr->CPSR = 2; - sspr->CR0 &= 0x00FF; - } - else { - sspr->CPSR = delay & 0xFE; - // CPSR . (SCR + 1) = f; - // (SCR + 1) = f / CPSR; - // SCR = (f / CPSR) - 1 - sspr->CR0 &= 0x00FF; - sspr->CR0 |= (((delay / sspr->CPSR) - 1) & 0xFF) << 8; - } -// iprintf(" CPSR=%lu, CR0=%lu", sspr->CPSR, sspr->CR0); - } -// iprintf("\n"); -} - -void _delay(uint32_t ticks) { - for (;ticks;ticks--) - asm volatile("nop\n\t"); -} - -uint8_t SPI::write(uint8_t data) -{ -// _cs = 1; - uint8_t r = 0; -// iprintf("SPI: >0x%02X", data); - if (sspr) { - while ((sspr->SR & SSP_SR_TNF) == 0); - sspr->DR = data; - while ((sspr->SR & SSP_SR_RNE) == 0); - r = sspr->DR & 255; - } - else { - for (int i = 0; i < 8; i++) { - FIO_ClearValue(sclk.port, 1UL << sclk.pin); // clock LOW - - if (data & 0x80) // WRITE - FIO_SetValue(mosi.port, 1UL << mosi.pin); - else - FIO_ClearValue(mosi.port, 1UL << mosi.pin); - data <<= 1; - - _delay(delay >> 1); // DELAY - - FIO_SetValue(sclk.port, 1UL << sclk.pin); // clock HIGH - - _delay(delay >> 1); // DELAY - - r <<= 1; - if (FIO_ReadValue(miso.port) & (1UL << miso.pin)) // READ - r |= 1; - } - FIO_ClearValue(sclk.port, 1UL << sclk.pin); - } -// iprintf(" <0x%02X\n", r); - return r; -} - -// TODO: timer feeds DMA feeds 0xFFs to card then we listen for responses using our interrupt -// allow me to do something like: -// disk.start_multi_write(int blocks, int blocksize, void *buffer); -// enable_usb_isr(); -// [...] -// usb_isr() { -// if (disk.buffer_in_use(void *buffer)) -// return; -// usb_ep_read(buffer); -// if (buffer_full) -// disk.validate_buffer(buffer); -// if (disk.finished_transfer()) -// disk.end_multi_write(); -// }; - -bool SPI::can_DMA() -{ - return (sspr != NULL); -} - -// int SPI::setup_DMA_rx(DMA_REG *dma) -// { -// if (!sspr) -// return -1; -// -// dma->DMACCControl = 0; -// dma->DMACCConfiguration = 0; -// if (sspr == LPC_SSP0) -// dma->DMACCConfiguration |= (GPDMA_CONN_SSP0_Rx << 6); -// if (sspr == LPC_SSP1) -// dma->DMACCConfiguration |= (GPDMA_CONN_SSP1_Rx << 6); -// -// dma->DMACCConfiguration |= GPDMA_TRANSFERTYPE_M2P << 11; -// return 0; -// } -// -// int SPI::start_DMA_rx(DMA_REG *dma) -// { -// dma->DMACCConfiguration |= -// } - -// int SPI::writeblock(uint8_t *block, int blocklen) -// { -// static DMA *d = new DMA(); -// d.sourceaddr(block); -// d.transferlength(blocklen); -// d.destinationperipheral(sspr); -// d.start(); -// while (d.active()); -// return blocklen; -// return 0; -// } - -void SPI::irq() -{ -} - -void SSP0_IRQHandler(void) { - if (SPI::isr_dispatch[0]) - SPI::isr_dispatch[0]->irq(); -} - -void SSP1_IRQHandler(void) { - if (SPI::isr_dispatch[1]) - (SPI::isr_dispatch[1])->irq(); -}
--- a/libs/spi.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,34 +0,0 @@ -#ifndef _SPI_H -#define _SPI_H - -#include <stdint.h> - -#include "spi_hal.h" - -class SPI { -public: - SPI(PinName mosi, PinName miso, PinName sclk); - ~SPI(); - - void frequency(uint32_t); - uint8_t write(uint8_t); - -// int writeblock(uint8_t *, int); - - bool can_DMA(); - int setup_DMA_rx(DMA_REG *); - int setup_DMA_tx(DMA_REG *); - - void irq(void); - - static SPI* isr_dispatch[N_SPI_INTERRUPT_ROUTINES]; - -protected: - uint32_t delay; - Pin_t miso; - Pin_t mosi; - Pin_t sclk; - SPI_REG *sspr; -}; - -#endif /* _SPI_H */
--- a/libs/spi_hal.h Fri Feb 28 18:52:52 2014 -0800 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,19 +0,0 @@ -#ifndef _SPI_HAL_H -#define _SPI_HAL_H - -#include "lpc17xx_ssp.h" - -#ifdef __LPC17XX__ -#include <PinNames.h> - typedef struct { - uint8_t port; - uint8_t pin; - } Pin_t; - - typedef LPC_SSP_TypeDef SPI_REG; - typedef LPC_GPDMACH_TypeDef DMA_REG; - - #define N_SPI_INTERRUPT_ROUTINES 2 -#endif - -#endif /* _SPI_HAL_H */