Alessandro Angelino
/
target-mcu-k64f
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target-mcu-k64f
by 
Morpheus
Revision 5:41cb6fa198f3, committed 2016-04-04
- Comitter:
- Alessandro Angelino
- Date:
- Mon Apr 04 14:09:12 2016 +0100
- Parent:
- 4:dd22f1f83b5c
- Commit message:
- Mirror huge PR from mbed OS
The following PRs have been mirrored:
https://github.com/ARMmbed/mbed-hal-k64f/pull/6 "All Freescale macros for memory access replaced"
https://github.com/ARMmbed/mbed-hal-k64f/pull/7 "Fix bug in union access macros"
https://github.com/ARMmbed/mbed-hal-k64f/pull/8 "Simpler and more universal macros for memory access"
https://github.com/ARMmbed/mbed-hal-k64f/pull/9 "Fixed bug in fallback macros for memory access"
https://github.com/ARMmbed/mbed-hal-k64f/pull/10 "Added volatile keyword to address for union read"
https://github.com/ARMmbed/mbed-hal-k64f/pull/14 "Removing copyright and revision from unmodified file"
Changed in this revision
--- a/hal/device/MK64F12/fsl_bitaccess.h Mon Apr 04 13:51:48 2016 +0100
+++ b/hal/device/MK64F12/fsl_bitaccess.h Mon Apr 04 14:09:12 2016 +0100
@@ -9,6 +9,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
+** (C) COPYRIGHT 2015-2015 ARM Limited
+** ALL RIGHTS RESERVED
+**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@@ -62,6 +65,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
+** - rev. 2.6 (2015-07-30) (ARM)
+** Macros for bitband address calculation have been decoupled from the
+** actual address de-referencing in BITBAND_ACCESSxx macros;
+** Added fallback macros for default read/write operations
**
** ###################################################################
*/
@@ -72,6 +79,51 @@
#include <stdint.h>
#include <stdlib.h>
+#include "uvisor-lib/uvisor-lib.h"
+
+/*
+ * Fallback macros for write/read operations
+ */
+#ifndef ADDRESS_READ
+/* the conditional statement will be optimised away since the compiler already
+ * knows the sizeof(type) */
+#define ADDRESS_READ(type, addr) \
+ (sizeof(type) == 4 ? *((volatile uint32_t *) (addr)) : \
+ sizeof(type) == 2 ? *((volatile uint16_t *) (addr)) : \
+ sizeof(type) == 1 ? *((volatile uint8_t *) (addr)) : 0)
+#endif
+
+#ifndef ADDRESS_WRITE
+/* the switch statement will be optimised away since the compiler already knows
+ * the sizeof(type) */
+#define ADDRESS_WRITE(type, addr, val) \
+ { \
+ switch(sizeof(type)) \
+ { \
+ case 4: \
+ *((volatile uint32_t *) (addr)) = (uint32_t) (val); \
+ break; \
+ case 2: \
+ *((volatile uint16_t *) (addr)) = (uint16_t) (val); \
+ break; \
+ case 1: \
+ *((volatile uint8_t *) (addr)) = (uint8_t ) (val); \
+ break; \
+ } \
+ }
+#endif
+
+#ifndef UNION_READ
+#define UNION_READ(type, addr, fieldU, fieldB) ((*((volatile type *) (addr))).fieldB)
+#endif
+
+/*
+ * Macros to translate a pair of regular address and bit to their bit band alias
+ */
+#define BITBAND_ADDRESS(Reg,Bit) (0x42000000u + (32u*((uint32_t)(Reg) - (uint32_t)0x40000000u)) + (4u*((uint32_t)(Bit))))
+#define BITBAND_ADDRESS32(Reg,Bit) ((uint32_t volatile*)BITBAND_ADDRESS(Reg,Bit))
+#define BITBAND_ADDRESS16(Reg,Bit) ((uint16_t volatile*)BITBAND_ADDRESS(Reg,Bit))
+#define BITBAND_ADDRESS8(Reg,Bit) ((uint8_t volatile*)BITBAND_ADDRESS(Reg,Bit))
/**
* @brief Macro to access a single bit of a 32-bit peripheral register (bit band region
@@ -80,7 +132,7 @@
* @param Bit Bit number to access.
* @return Value of the targeted bit in the bit band region.
*/
-#define BITBAND_ACCESS32(Reg,Bit) (*((uint32_t volatile*)(0x42000000u + (32u*((uint32_t)(Reg) - (uint32_t)0x40000000u)) + (4u*((uint32_t)(Bit))))))
+#define BITBAND_ACCESS32(Reg,Bit) (*BITBAND_ADDRESS32(Reg,Bit))
/**
* @brief Macro to access a single bit of a 16-bit peripheral register (bit band region
@@ -89,7 +141,7 @@
* @param Bit Bit number to access.
* @return Value of the targeted bit in the bit band region.
*/
-#define BITBAND_ACCESS16(Reg,Bit) (*((uint16_t volatile*)(0x42000000u + (32u*((uint32_t)(Reg) - (uint32_t)0x40000000u)) + (4u*((uint32_t)(Bit))))))
+#define BITBAND_ACCESS16(Reg,Bit) (*BITBAND_ADDRESS16(Reg,Bit))
/**
* @brief Macro to access a single bit of an 8-bit peripheral register (bit band region
@@ -98,7 +150,7 @@
* @param Bit Bit number to access.
* @return Value of the targeted bit in the bit band region.
*/
-#define BITBAND_ACCESS8(Reg,Bit) (*((uint8_t volatile*)(0x42000000u + (32u*((uint32_t)(Reg) - (uint32_t)0x40000000u)) + (4u*((uint32_t)(Bit))))))
+#define BITBAND_ACCESS8(Reg,Bit) (*BITBAND_ADDRESS8(Reg,Bit))
/*
* Macros for single instance registers
--- a/hal/device/device/MK64F12/MK64F12_adc.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_adc.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -171,8 +178,8 @@ #define HW_ADC_SC1n_ADDR(x, n) ((x) + 0x0U + (0x4U * (n))) #define HW_ADC_SC1n(x, n) (*(__IO hw_adc_sc1n_t *) HW_ADC_SC1n_ADDR(x, n)) -#define HW_ADC_SC1n_RD(x, n) (HW_ADC_SC1n(x, n).U) -#define HW_ADC_SC1n_WR(x, n, v) (HW_ADC_SC1n(x, n).U = (v)) +#define HW_ADC_SC1n_RD(x, n) (ADDRESS_READ(hw_adc_sc1n_t, HW_ADC_SC1n_ADDR(x, n))) +#define HW_ADC_SC1n_WR(x, n, v) (ADDRESS_WRITE(hw_adc_sc1n_t, HW_ADC_SC1n_ADDR(x, n), v)) #define HW_ADC_SC1n_SET(x, n, v) (HW_ADC_SC1n_WR(x, n, HW_ADC_SC1n_RD(x, n) | (v))) #define HW_ADC_SC1n_CLR(x, n, v) (HW_ADC_SC1n_WR(x, n, HW_ADC_SC1n_RD(x, n) & ~(v))) #define HW_ADC_SC1n_TOG(x, n, v) (HW_ADC_SC1n_WR(x, n, HW_ADC_SC1n_RD(x, n) ^ (v))) @@ -247,7 +254,7 @@ #define BS_ADC_SC1n_ADCH (5U) /*!< Bit field size in bits for ADC_SC1n_ADCH. */ /*! @brief Read current value of the ADC_SC1n_ADCH field. */ -#define BR_ADC_SC1n_ADCH(x, n) (HW_ADC_SC1n(x, n).B.ADCH) +#define BR_ADC_SC1n_ADCH(x, n) (UNION_READ(hw_adc_sc1n_t, HW_ADC_SC1n_ADDR(x, n), U, B.ADCH)) /*! @brief Format value for bitfield ADC_SC1n_ADCH. */ #define BF_ADC_SC1n_ADCH(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC1n_ADCH) & BM_ADC_SC1n_ADCH) @@ -273,13 +280,13 @@ #define BS_ADC_SC1n_DIFF (1U) /*!< Bit field size in bits for ADC_SC1n_DIFF. */ /*! @brief Read current value of the ADC_SC1n_DIFF field. */ -#define BR_ADC_SC1n_DIFF(x, n) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_DIFF)) +#define BR_ADC_SC1n_DIFF(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_DIFF))) /*! @brief Format value for bitfield ADC_SC1n_DIFF. */ #define BF_ADC_SC1n_DIFF(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC1n_DIFF) & BM_ADC_SC1n_DIFF) /*! @brief Set the DIFF field to a new value. */ -#define BW_ADC_SC1n_DIFF(x, n, v) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_DIFF) = (v)) +#define BW_ADC_SC1n_DIFF(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_DIFF), v)) /*@}*/ /*! @@ -298,13 +305,13 @@ #define BS_ADC_SC1n_AIEN (1U) /*!< Bit field size in bits for ADC_SC1n_AIEN. */ /*! @brief Read current value of the ADC_SC1n_AIEN field. */ -#define BR_ADC_SC1n_AIEN(x, n) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_AIEN)) +#define BR_ADC_SC1n_AIEN(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_AIEN))) /*! @brief Format value for bitfield ADC_SC1n_AIEN. */ #define BF_ADC_SC1n_AIEN(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC1n_AIEN) & BM_ADC_SC1n_AIEN) /*! @brief Set the AIEN field to a new value. */ -#define BW_ADC_SC1n_AIEN(x, n, v) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_AIEN) = (v)) +#define BW_ADC_SC1n_AIEN(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_AIEN), v)) /*@}*/ /*! @@ -330,7 +337,7 @@ #define BS_ADC_SC1n_COCO (1U) /*!< Bit field size in bits for ADC_SC1n_COCO. */ /*! @brief Read current value of the ADC_SC1n_COCO field. */ -#define BR_ADC_SC1n_COCO(x, n) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_COCO)) +#define BR_ADC_SC1n_COCO(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_COCO))) /*@}*/ /******************************************************************************* @@ -366,8 +373,8 @@ #define HW_ADC_CFG1_ADDR(x) ((x) + 0x8U) #define HW_ADC_CFG1(x) (*(__IO hw_adc_cfg1_t *) HW_ADC_CFG1_ADDR(x)) -#define HW_ADC_CFG1_RD(x) (HW_ADC_CFG1(x).U) -#define HW_ADC_CFG1_WR(x, v) (HW_ADC_CFG1(x).U = (v)) +#define HW_ADC_CFG1_RD(x) (ADDRESS_READ(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x))) +#define HW_ADC_CFG1_WR(x, v) (ADDRESS_WRITE(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x), v)) #define HW_ADC_CFG1_SET(x, v) (HW_ADC_CFG1_WR(x, HW_ADC_CFG1_RD(x) | (v))) #define HW_ADC_CFG1_CLR(x, v) (HW_ADC_CFG1_WR(x, HW_ADC_CFG1_RD(x) & ~(v))) #define HW_ADC_CFG1_TOG(x, v) (HW_ADC_CFG1_WR(x, HW_ADC_CFG1_RD(x) ^ (v))) @@ -400,7 +407,7 @@ #define BS_ADC_CFG1_ADICLK (2U) /*!< Bit field size in bits for ADC_CFG1_ADICLK. */ /*! @brief Read current value of the ADC_CFG1_ADICLK field. */ -#define BR_ADC_CFG1_ADICLK(x) (HW_ADC_CFG1(x).B.ADICLK) +#define BR_ADC_CFG1_ADICLK(x) (UNION_READ(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x), U, B.ADICLK)) /*! @brief Format value for bitfield ADC_CFG1_ADICLK. */ #define BF_ADC_CFG1_ADICLK(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_ADICLK) & BM_ADC_CFG1_ADICLK) @@ -430,7 +437,7 @@ #define BS_ADC_CFG1_MODE (2U) /*!< Bit field size in bits for ADC_CFG1_MODE. */ /*! @brief Read current value of the ADC_CFG1_MODE field. */ -#define BR_ADC_CFG1_MODE(x) (HW_ADC_CFG1(x).B.MODE) +#define BR_ADC_CFG1_MODE(x) (UNION_READ(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x), U, B.MODE)) /*! @brief Format value for bitfield ADC_CFG1_MODE. */ #define BF_ADC_CFG1_MODE(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_MODE) & BM_ADC_CFG1_MODE) @@ -460,13 +467,13 @@ #define BS_ADC_CFG1_ADLSMP (1U) /*!< Bit field size in bits for ADC_CFG1_ADLSMP. */ /*! @brief Read current value of the ADC_CFG1_ADLSMP field. */ -#define BR_ADC_CFG1_ADLSMP(x) (BITBAND_ACCESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLSMP)) +#define BR_ADC_CFG1_ADLSMP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLSMP))) /*! @brief Format value for bitfield ADC_CFG1_ADLSMP. */ #define BF_ADC_CFG1_ADLSMP(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_ADLSMP) & BM_ADC_CFG1_ADLSMP) /*! @brief Set the ADLSMP field to a new value. */ -#define BW_ADC_CFG1_ADLSMP(x, v) (BITBAND_ACCESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLSMP) = (v)) +#define BW_ADC_CFG1_ADLSMP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLSMP), v)) /*@}*/ /*! @@ -486,7 +493,7 @@ #define BS_ADC_CFG1_ADIV (2U) /*!< Bit field size in bits for ADC_CFG1_ADIV. */ /*! @brief Read current value of the ADC_CFG1_ADIV field. */ -#define BR_ADC_CFG1_ADIV(x) (HW_ADC_CFG1(x).B.ADIV) +#define BR_ADC_CFG1_ADIV(x) (UNION_READ(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x), U, B.ADIV)) /*! @brief Format value for bitfield ADC_CFG1_ADIV. */ #define BF_ADC_CFG1_ADIV(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_ADIV) & BM_ADC_CFG1_ADIV) @@ -512,13 +519,13 @@ #define BS_ADC_CFG1_ADLPC (1U) /*!< Bit field size in bits for ADC_CFG1_ADLPC. */ /*! @brief Read current value of the ADC_CFG1_ADLPC field. */ -#define BR_ADC_CFG1_ADLPC(x) (BITBAND_ACCESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLPC)) +#define BR_ADC_CFG1_ADLPC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLPC))) /*! @brief Format value for bitfield ADC_CFG1_ADLPC. */ #define BF_ADC_CFG1_ADLPC(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_ADLPC) & BM_ADC_CFG1_ADLPC) /*! @brief Set the ADLPC field to a new value. */ -#define BW_ADC_CFG1_ADLPC(x, v) (BITBAND_ACCESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLPC) = (v)) +#define BW_ADC_CFG1_ADLPC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLPC), v)) /*@}*/ /******************************************************************************* @@ -554,8 +561,8 @@ #define HW_ADC_CFG2_ADDR(x) ((x) + 0xCU) #define HW_ADC_CFG2(x) (*(__IO hw_adc_cfg2_t *) HW_ADC_CFG2_ADDR(x)) -#define HW_ADC_CFG2_RD(x) (HW_ADC_CFG2(x).U) -#define HW_ADC_CFG2_WR(x, v) (HW_ADC_CFG2(x).U = (v)) +#define HW_ADC_CFG2_RD(x) (ADDRESS_READ(hw_adc_cfg2_t, HW_ADC_CFG2_ADDR(x))) +#define HW_ADC_CFG2_WR(x, v) (ADDRESS_WRITE(hw_adc_cfg2_t, HW_ADC_CFG2_ADDR(x), v)) #define HW_ADC_CFG2_SET(x, v) (HW_ADC_CFG2_WR(x, HW_ADC_CFG2_RD(x) | (v))) #define HW_ADC_CFG2_CLR(x, v) (HW_ADC_CFG2_WR(x, HW_ADC_CFG2_RD(x) & ~(v))) #define HW_ADC_CFG2_TOG(x, v) (HW_ADC_CFG2_WR(x, HW_ADC_CFG2_RD(x) ^ (v))) @@ -587,7 +594,7 @@ #define BS_ADC_CFG2_ADLSTS (2U) /*!< Bit field size in bits for ADC_CFG2_ADLSTS. */ /*! @brief Read current value of the ADC_CFG2_ADLSTS field. */ -#define BR_ADC_CFG2_ADLSTS(x) (HW_ADC_CFG2(x).B.ADLSTS) +#define BR_ADC_CFG2_ADLSTS(x) (UNION_READ(hw_adc_cfg2_t, HW_ADC_CFG2_ADDR(x), U, B.ADLSTS)) /*! @brief Format value for bitfield ADC_CFG2_ADLSTS. */ #define BF_ADC_CFG2_ADLSTS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG2_ADLSTS) & BM_ADC_CFG2_ADLSTS) @@ -614,13 +621,13 @@ #define BS_ADC_CFG2_ADHSC (1U) /*!< Bit field size in bits for ADC_CFG2_ADHSC. */ /*! @brief Read current value of the ADC_CFG2_ADHSC field. */ -#define BR_ADC_CFG2_ADHSC(x) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADHSC)) +#define BR_ADC_CFG2_ADHSC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADHSC))) /*! @brief Format value for bitfield ADC_CFG2_ADHSC. */ #define BF_ADC_CFG2_ADHSC(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG2_ADHSC) & BM_ADC_CFG2_ADHSC) /*! @brief Set the ADHSC field to a new value. */ -#define BW_ADC_CFG2_ADHSC(x, v) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADHSC) = (v)) +#define BW_ADC_CFG2_ADHSC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADHSC), v)) /*@}*/ /*! @@ -646,13 +653,13 @@ #define BS_ADC_CFG2_ADACKEN (1U) /*!< Bit field size in bits for ADC_CFG2_ADACKEN. */ /*! @brief Read current value of the ADC_CFG2_ADACKEN field. */ -#define BR_ADC_CFG2_ADACKEN(x) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADACKEN)) +#define BR_ADC_CFG2_ADACKEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADACKEN))) /*! @brief Format value for bitfield ADC_CFG2_ADACKEN. */ #define BF_ADC_CFG2_ADACKEN(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG2_ADACKEN) & BM_ADC_CFG2_ADACKEN) /*! @brief Set the ADACKEN field to a new value. */ -#define BW_ADC_CFG2_ADACKEN(x, v) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADACKEN) = (v)) +#define BW_ADC_CFG2_ADACKEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADACKEN), v)) /*@}*/ /*! @@ -670,13 +677,13 @@ #define BS_ADC_CFG2_MUXSEL (1U) /*!< Bit field size in bits for ADC_CFG2_MUXSEL. */ /*! @brief Read current value of the ADC_CFG2_MUXSEL field. */ -#define BR_ADC_CFG2_MUXSEL(x) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_MUXSEL)) +#define BR_ADC_CFG2_MUXSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_MUXSEL))) /*! @brief Format value for bitfield ADC_CFG2_MUXSEL. */ #define BF_ADC_CFG2_MUXSEL(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG2_MUXSEL) & BM_ADC_CFG2_MUXSEL) /*! @brief Set the MUXSEL field to a new value. */ -#define BW_ADC_CFG2_MUXSEL(x, v) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_MUXSEL) = (v)) +#define BW_ADC_CFG2_MUXSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_MUXSEL), v)) /*@}*/ /******************************************************************************* @@ -728,7 +735,7 @@ #define HW_ADC_Rn_ADDR(x, n) ((x) + 0x10U + (0x4U * (n))) #define HW_ADC_Rn(x, n) (*(__I hw_adc_rn_t *) HW_ADC_Rn_ADDR(x, n)) -#define HW_ADC_Rn_RD(x, n) (HW_ADC_Rn(x, n).U) +#define HW_ADC_Rn_RD(x, n) (ADDRESS_READ(hw_adc_rn_t, HW_ADC_Rn_ADDR(x, n))) /*@}*/ /* @@ -744,7 +751,7 @@ #define BS_ADC_Rn_D (16U) /*!< Bit field size in bits for ADC_Rn_D. */ /*! @brief Read current value of the ADC_Rn_D field. */ -#define BR_ADC_Rn_D(x, n) (HW_ADC_Rn(x, n).B.D) +#define BR_ADC_Rn_D(x, n) (UNION_READ(hw_adc_rn_t, HW_ADC_Rn_ADDR(x, n), U, B.D)) /*@}*/ /******************************************************************************* @@ -782,8 +789,8 @@ #define HW_ADC_CV1_ADDR(x) ((x) + 0x18U) #define HW_ADC_CV1(x) (*(__IO hw_adc_cv1_t *) HW_ADC_CV1_ADDR(x)) -#define HW_ADC_CV1_RD(x) (HW_ADC_CV1(x).U) -#define HW_ADC_CV1_WR(x, v) (HW_ADC_CV1(x).U = (v)) +#define HW_ADC_CV1_RD(x) (ADDRESS_READ(hw_adc_cv1_t, HW_ADC_CV1_ADDR(x))) +#define HW_ADC_CV1_WR(x, v) (ADDRESS_WRITE(hw_adc_cv1_t, HW_ADC_CV1_ADDR(x), v)) #define HW_ADC_CV1_SET(x, v) (HW_ADC_CV1_WR(x, HW_ADC_CV1_RD(x) | (v))) #define HW_ADC_CV1_CLR(x, v) (HW_ADC_CV1_WR(x, HW_ADC_CV1_RD(x) & ~(v))) #define HW_ADC_CV1_TOG(x, v) (HW_ADC_CV1_WR(x, HW_ADC_CV1_RD(x) ^ (v))) @@ -802,7 +809,7 @@ #define BS_ADC_CV1_CV (16U) /*!< Bit field size in bits for ADC_CV1_CV. */ /*! @brief Read current value of the ADC_CV1_CV field. */ -#define BR_ADC_CV1_CV(x) (HW_ADC_CV1(x).B.CV) +#define BR_ADC_CV1_CV(x) (UNION_READ(hw_adc_cv1_t, HW_ADC_CV1_ADDR(x), U, B.CV)) /*! @brief Format value for bitfield ADC_CV1_CV. */ #define BF_ADC_CV1_CV(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CV1_CV) & BM_ADC_CV1_CV) @@ -846,8 +853,8 @@ #define HW_ADC_CV2_ADDR(x) ((x) + 0x1CU) #define HW_ADC_CV2(x) (*(__IO hw_adc_cv2_t *) HW_ADC_CV2_ADDR(x)) -#define HW_ADC_CV2_RD(x) (HW_ADC_CV2(x).U) -#define HW_ADC_CV2_WR(x, v) (HW_ADC_CV2(x).U = (v)) +#define HW_ADC_CV2_RD(x) (ADDRESS_READ(hw_adc_cv2_t, HW_ADC_CV2_ADDR(x))) +#define HW_ADC_CV2_WR(x, v) (ADDRESS_WRITE(hw_adc_cv2_t, HW_ADC_CV2_ADDR(x), v)) #define HW_ADC_CV2_SET(x, v) (HW_ADC_CV2_WR(x, HW_ADC_CV2_RD(x) | (v))) #define HW_ADC_CV2_CLR(x, v) (HW_ADC_CV2_WR(x, HW_ADC_CV2_RD(x) & ~(v))) #define HW_ADC_CV2_TOG(x, v) (HW_ADC_CV2_WR(x, HW_ADC_CV2_RD(x) ^ (v))) @@ -866,7 +873,7 @@ #define BS_ADC_CV2_CV (16U) /*!< Bit field size in bits for ADC_CV2_CV. */ /*! @brief Read current value of the ADC_CV2_CV field. */ -#define BR_ADC_CV2_CV(x) (HW_ADC_CV2(x).B.CV) +#define BR_ADC_CV2_CV(x) (UNION_READ(hw_adc_cv2_t, HW_ADC_CV2_ADDR(x), U, B.CV)) /*! @brief Format value for bitfield ADC_CV2_CV. */ #define BF_ADC_CV2_CV(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CV2_CV) & BM_ADC_CV2_CV) @@ -911,8 +918,8 @@ #define HW_ADC_SC2_ADDR(x) ((x) + 0x20U) #define HW_ADC_SC2(x) (*(__IO hw_adc_sc2_t *) HW_ADC_SC2_ADDR(x)) -#define HW_ADC_SC2_RD(x) (HW_ADC_SC2(x).U) -#define HW_ADC_SC2_WR(x, v) (HW_ADC_SC2(x).U = (v)) +#define HW_ADC_SC2_RD(x) (ADDRESS_READ(hw_adc_sc2_t, HW_ADC_SC2_ADDR(x))) +#define HW_ADC_SC2_WR(x, v) (ADDRESS_WRITE(hw_adc_sc2_t, HW_ADC_SC2_ADDR(x), v)) #define HW_ADC_SC2_SET(x, v) (HW_ADC_SC2_WR(x, HW_ADC_SC2_RD(x) | (v))) #define HW_ADC_SC2_CLR(x, v) (HW_ADC_SC2_WR(x, HW_ADC_SC2_RD(x) & ~(v))) #define HW_ADC_SC2_TOG(x, v) (HW_ADC_SC2_WR(x, HW_ADC_SC2_RD(x) ^ (v))) @@ -943,7 +950,7 @@ #define BS_ADC_SC2_REFSEL (2U) /*!< Bit field size in bits for ADC_SC2_REFSEL. */ /*! @brief Read current value of the ADC_SC2_REFSEL field. */ -#define BR_ADC_SC2_REFSEL(x) (HW_ADC_SC2(x).B.REFSEL) +#define BR_ADC_SC2_REFSEL(x) (UNION_READ(hw_adc_sc2_t, HW_ADC_SC2_ADDR(x), U, B.REFSEL)) /*! @brief Format value for bitfield ADC_SC2_REFSEL. */ #define BF_ADC_SC2_REFSEL(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_REFSEL) & BM_ADC_SC2_REFSEL) @@ -966,13 +973,13 @@ #define BS_ADC_SC2_DMAEN (1U) /*!< Bit field size in bits for ADC_SC2_DMAEN. */ /*! @brief Read current value of the ADC_SC2_DMAEN field. */ -#define BR_ADC_SC2_DMAEN(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_DMAEN)) +#define BR_ADC_SC2_DMAEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_DMAEN))) /*! @brief Format value for bitfield ADC_SC2_DMAEN. */ #define BF_ADC_SC2_DMAEN(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_DMAEN) & BM_ADC_SC2_DMAEN) /*! @brief Set the DMAEN field to a new value. */ -#define BW_ADC_SC2_DMAEN(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_DMAEN) = (v)) +#define BW_ADC_SC2_DMAEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_DMAEN), v)) /*@}*/ /*! @@ -993,13 +1000,13 @@ #define BS_ADC_SC2_ACREN (1U) /*!< Bit field size in bits for ADC_SC2_ACREN. */ /*! @brief Read current value of the ADC_SC2_ACREN field. */ -#define BR_ADC_SC2_ACREN(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACREN)) +#define BR_ADC_SC2_ACREN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACREN))) /*! @brief Format value for bitfield ADC_SC2_ACREN. */ #define BF_ADC_SC2_ACREN(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_ACREN) & BM_ADC_SC2_ACREN) /*! @brief Set the ACREN field to a new value. */ -#define BW_ADC_SC2_ACREN(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACREN) = (v)) +#define BW_ADC_SC2_ACREN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACREN), v)) /*@}*/ /*! @@ -1022,13 +1029,13 @@ #define BS_ADC_SC2_ACFGT (1U) /*!< Bit field size in bits for ADC_SC2_ACFGT. */ /*! @brief Read current value of the ADC_SC2_ACFGT field. */ -#define BR_ADC_SC2_ACFGT(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFGT)) +#define BR_ADC_SC2_ACFGT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFGT))) /*! @brief Format value for bitfield ADC_SC2_ACFGT. */ #define BF_ADC_SC2_ACFGT(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_ACFGT) & BM_ADC_SC2_ACFGT) /*! @brief Set the ACFGT field to a new value. */ -#define BW_ADC_SC2_ACFGT(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFGT) = (v)) +#define BW_ADC_SC2_ACFGT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFGT), v)) /*@}*/ /*! @@ -1046,13 +1053,13 @@ #define BS_ADC_SC2_ACFE (1U) /*!< Bit field size in bits for ADC_SC2_ACFE. */ /*! @brief Read current value of the ADC_SC2_ACFE field. */ -#define BR_ADC_SC2_ACFE(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFE)) +#define BR_ADC_SC2_ACFE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFE))) /*! @brief Format value for bitfield ADC_SC2_ACFE. */ #define BF_ADC_SC2_ACFE(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_ACFE) & BM_ADC_SC2_ACFE) /*! @brief Set the ACFE field to a new value. */ -#define BW_ADC_SC2_ACFE(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFE) = (v)) +#define BW_ADC_SC2_ACFE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFE), v)) /*@}*/ /*! @@ -1074,13 +1081,13 @@ #define BS_ADC_SC2_ADTRG (1U) /*!< Bit field size in bits for ADC_SC2_ADTRG. */ /*! @brief Read current value of the ADC_SC2_ADTRG field. */ -#define BR_ADC_SC2_ADTRG(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADTRG)) +#define BR_ADC_SC2_ADTRG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADTRG))) /*! @brief Format value for bitfield ADC_SC2_ADTRG. */ #define BF_ADC_SC2_ADTRG(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_ADTRG) & BM_ADC_SC2_ADTRG) /*! @brief Set the ADTRG field to a new value. */ -#define BW_ADC_SC2_ADTRG(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADTRG) = (v)) +#define BW_ADC_SC2_ADTRG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADTRG), v)) /*@}*/ /*! @@ -1100,7 +1107,7 @@ #define BS_ADC_SC2_ADACT (1U) /*!< Bit field size in bits for ADC_SC2_ADACT. */ /*! @brief Read current value of the ADC_SC2_ADACT field. */ -#define BR_ADC_SC2_ADACT(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADACT)) +#define BR_ADC_SC2_ADACT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADACT))) /*@}*/ /******************************************************************************* @@ -1137,8 +1144,8 @@ #define HW_ADC_SC3_ADDR(x) ((x) + 0x24U) #define HW_ADC_SC3(x) (*(__IO hw_adc_sc3_t *) HW_ADC_SC3_ADDR(x)) -#define HW_ADC_SC3_RD(x) (HW_ADC_SC3(x).U) -#define HW_ADC_SC3_WR(x, v) (HW_ADC_SC3(x).U = (v)) +#define HW_ADC_SC3_RD(x) (ADDRESS_READ(hw_adc_sc3_t, HW_ADC_SC3_ADDR(x))) +#define HW_ADC_SC3_WR(x, v) (ADDRESS_WRITE(hw_adc_sc3_t, HW_ADC_SC3_ADDR(x), v)) #define HW_ADC_SC3_SET(x, v) (HW_ADC_SC3_WR(x, HW_ADC_SC3_RD(x) | (v))) #define HW_ADC_SC3_CLR(x, v) (HW_ADC_SC3_WR(x, HW_ADC_SC3_RD(x) & ~(v))) #define HW_ADC_SC3_TOG(x, v) (HW_ADC_SC3_WR(x, HW_ADC_SC3_RD(x) ^ (v))) @@ -1166,7 +1173,7 @@ #define BS_ADC_SC3_AVGS (2U) /*!< Bit field size in bits for ADC_SC3_AVGS. */ /*! @brief Read current value of the ADC_SC3_AVGS field. */ -#define BR_ADC_SC3_AVGS(x) (HW_ADC_SC3(x).B.AVGS) +#define BR_ADC_SC3_AVGS(x) (UNION_READ(hw_adc_sc3_t, HW_ADC_SC3_ADDR(x), U, B.AVGS)) /*! @brief Format value for bitfield ADC_SC3_AVGS. */ #define BF_ADC_SC3_AVGS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC3_AVGS) & BM_ADC_SC3_AVGS) @@ -1190,13 +1197,13 @@ #define BS_ADC_SC3_AVGE (1U) /*!< Bit field size in bits for ADC_SC3_AVGE. */ /*! @brief Read current value of the ADC_SC3_AVGE field. */ -#define BR_ADC_SC3_AVGE(x) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_AVGE)) +#define BR_ADC_SC3_AVGE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_AVGE))) /*! @brief Format value for bitfield ADC_SC3_AVGE. */ #define BF_ADC_SC3_AVGE(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC3_AVGE) & BM_ADC_SC3_AVGE) /*! @brief Set the AVGE field to a new value. */ -#define BW_ADC_SC3_AVGE(x, v) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_AVGE) = (v)) +#define BW_ADC_SC3_AVGE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_AVGE), v)) /*@}*/ /*! @@ -1216,13 +1223,13 @@ #define BS_ADC_SC3_ADCO (1U) /*!< Bit field size in bits for ADC_SC3_ADCO. */ /*! @brief Read current value of the ADC_SC3_ADCO field. */ -#define BR_ADC_SC3_ADCO(x) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_ADCO)) +#define BR_ADC_SC3_ADCO(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_ADCO))) /*! @brief Format value for bitfield ADC_SC3_ADCO. */ #define BF_ADC_SC3_ADCO(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC3_ADCO) & BM_ADC_SC3_ADCO) /*! @brief Set the ADCO field to a new value. */ -#define BW_ADC_SC3_ADCO(x, v) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_ADCO) = (v)) +#define BW_ADC_SC3_ADCO(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_ADCO), v)) /*@}*/ /*! @@ -1242,7 +1249,7 @@ #define BS_ADC_SC3_CALF (1U) /*!< Bit field size in bits for ADC_SC3_CALF. */ /*! @brief Read current value of the ADC_SC3_CALF field. */ -#define BR_ADC_SC3_CALF(x) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CALF)) +#define BR_ADC_SC3_CALF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CALF))) /*@}*/ /*! @@ -1261,13 +1268,13 @@ #define BS_ADC_SC3_CAL (1U) /*!< Bit field size in bits for ADC_SC3_CAL. */ /*! @brief Read current value of the ADC_SC3_CAL field. */ -#define BR_ADC_SC3_CAL(x) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CAL)) +#define BR_ADC_SC3_CAL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CAL))) /*! @brief Format value for bitfield ADC_SC3_CAL. */ #define BF_ADC_SC3_CAL(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC3_CAL) & BM_ADC_SC3_CAL) /*! @brief Set the CAL field to a new value. */ -#define BW_ADC_SC3_CAL(x, v) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CAL) = (v)) +#define BW_ADC_SC3_CAL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CAL), v)) /*@}*/ /******************************************************************************* @@ -1303,8 +1310,8 @@ #define HW_ADC_OFS_ADDR(x) ((x) + 0x28U) #define HW_ADC_OFS(x) (*(__IO hw_adc_ofs_t *) HW_ADC_OFS_ADDR(x)) -#define HW_ADC_OFS_RD(x) (HW_ADC_OFS(x).U) -#define HW_ADC_OFS_WR(x, v) (HW_ADC_OFS(x).U = (v)) +#define HW_ADC_OFS_RD(x) (ADDRESS_READ(hw_adc_ofs_t, HW_ADC_OFS_ADDR(x))) +#define HW_ADC_OFS_WR(x, v) (ADDRESS_WRITE(hw_adc_ofs_t, HW_ADC_OFS_ADDR(x), v)) #define HW_ADC_OFS_SET(x, v) (HW_ADC_OFS_WR(x, HW_ADC_OFS_RD(x) | (v))) #define HW_ADC_OFS_CLR(x, v) (HW_ADC_OFS_WR(x, HW_ADC_OFS_RD(x) & ~(v))) #define HW_ADC_OFS_TOG(x, v) (HW_ADC_OFS_WR(x, HW_ADC_OFS_RD(x) ^ (v))) @@ -1323,7 +1330,7 @@ #define BS_ADC_OFS_OFS (16U) /*!< Bit field size in bits for ADC_OFS_OFS. */ /*! @brief Read current value of the ADC_OFS_OFS field. */ -#define BR_ADC_OFS_OFS(x) (HW_ADC_OFS(x).B.OFS) +#define BR_ADC_OFS_OFS(x) (UNION_READ(hw_adc_ofs_t, HW_ADC_OFS_ADDR(x), U, B.OFS)) /*! @brief Format value for bitfield ADC_OFS_OFS. */ #define BF_ADC_OFS_OFS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_OFS_OFS) & BM_ADC_OFS_OFS) @@ -1365,8 +1372,8 @@ #define HW_ADC_PG_ADDR(x) ((x) + 0x2CU) #define HW_ADC_PG(x) (*(__IO hw_adc_pg_t *) HW_ADC_PG_ADDR(x)) -#define HW_ADC_PG_RD(x) (HW_ADC_PG(x).U) -#define HW_ADC_PG_WR(x, v) (HW_ADC_PG(x).U = (v)) +#define HW_ADC_PG_RD(x) (ADDRESS_READ(hw_adc_pg_t, HW_ADC_PG_ADDR(x))) +#define HW_ADC_PG_WR(x, v) (ADDRESS_WRITE(hw_adc_pg_t, HW_ADC_PG_ADDR(x), v)) #define HW_ADC_PG_SET(x, v) (HW_ADC_PG_WR(x, HW_ADC_PG_RD(x) | (v))) #define HW_ADC_PG_CLR(x, v) (HW_ADC_PG_WR(x, HW_ADC_PG_RD(x) & ~(v))) #define HW_ADC_PG_TOG(x, v) (HW_ADC_PG_WR(x, HW_ADC_PG_RD(x) ^ (v))) @@ -1385,7 +1392,7 @@ #define BS_ADC_PG_PG (16U) /*!< Bit field size in bits for ADC_PG_PG. */ /*! @brief Read current value of the ADC_PG_PG field. */ -#define BR_ADC_PG_PG(x) (HW_ADC_PG(x).B.PG) +#define BR_ADC_PG_PG(x) (UNION_READ(hw_adc_pg_t, HW_ADC_PG_ADDR(x), U, B.PG)) /*! @brief Format value for bitfield ADC_PG_PG. */ #define BF_ADC_PG_PG(v) ((uint32_t)((uint32_t)(v) << BP_ADC_PG_PG) & BM_ADC_PG_PG) @@ -1427,8 +1434,8 @@ #define HW_ADC_MG_ADDR(x) ((x) + 0x30U) #define HW_ADC_MG(x) (*(__IO hw_adc_mg_t *) HW_ADC_MG_ADDR(x)) -#define HW_ADC_MG_RD(x) (HW_ADC_MG(x).U) -#define HW_ADC_MG_WR(x, v) (HW_ADC_MG(x).U = (v)) +#define HW_ADC_MG_RD(x) (ADDRESS_READ(hw_adc_mg_t, HW_ADC_MG_ADDR(x))) +#define HW_ADC_MG_WR(x, v) (ADDRESS_WRITE(hw_adc_mg_t, HW_ADC_MG_ADDR(x), v)) #define HW_ADC_MG_SET(x, v) (HW_ADC_MG_WR(x, HW_ADC_MG_RD(x) | (v))) #define HW_ADC_MG_CLR(x, v) (HW_ADC_MG_WR(x, HW_ADC_MG_RD(x) & ~(v))) #define HW_ADC_MG_TOG(x, v) (HW_ADC_MG_WR(x, HW_ADC_MG_RD(x) ^ (v))) @@ -1447,7 +1454,7 @@ #define BS_ADC_MG_MG (16U) /*!< Bit field size in bits for ADC_MG_MG. */ /*! @brief Read current value of the ADC_MG_MG field. */ -#define BR_ADC_MG_MG(x) (HW_ADC_MG(x).B.MG) +#define BR_ADC_MG_MG(x) (UNION_READ(hw_adc_mg_t, HW_ADC_MG_ADDR(x), U, B.MG)) /*! @brief Format value for bitfield ADC_MG_MG. */ #define BF_ADC_MG_MG(v) ((uint32_t)((uint32_t)(v) << BP_ADC_MG_MG) & BM_ADC_MG_MG) @@ -1490,8 +1497,8 @@ #define HW_ADC_CLPD_ADDR(x) ((x) + 0x34U) #define HW_ADC_CLPD(x) (*(__IO hw_adc_clpd_t *) HW_ADC_CLPD_ADDR(x)) -#define HW_ADC_CLPD_RD(x) (HW_ADC_CLPD(x).U) -#define HW_ADC_CLPD_WR(x, v) (HW_ADC_CLPD(x).U = (v)) +#define HW_ADC_CLPD_RD(x) (ADDRESS_READ(hw_adc_clpd_t, HW_ADC_CLPD_ADDR(x))) +#define HW_ADC_CLPD_WR(x, v) (ADDRESS_WRITE(hw_adc_clpd_t, HW_ADC_CLPD_ADDR(x), v)) #define HW_ADC_CLPD_SET(x, v) (HW_ADC_CLPD_WR(x, HW_ADC_CLPD_RD(x) | (v))) #define HW_ADC_CLPD_CLR(x, v) (HW_ADC_CLPD_WR(x, HW_ADC_CLPD_RD(x) & ~(v))) #define HW_ADC_CLPD_TOG(x, v) (HW_ADC_CLPD_WR(x, HW_ADC_CLPD_RD(x) ^ (v))) @@ -1512,7 +1519,7 @@ #define BS_ADC_CLPD_CLPD (6U) /*!< Bit field size in bits for ADC_CLPD_CLPD. */ /*! @brief Read current value of the ADC_CLPD_CLPD field. */ -#define BR_ADC_CLPD_CLPD(x) (HW_ADC_CLPD(x).B.CLPD) +#define BR_ADC_CLPD_CLPD(x) (UNION_READ(hw_adc_clpd_t, HW_ADC_CLPD_ADDR(x), U, B.CLPD)) /*! @brief Format value for bitfield ADC_CLPD_CLPD. */ #define BF_ADC_CLPD_CLPD(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLPD_CLPD) & BM_ADC_CLPD_CLPD) @@ -1549,8 +1556,8 @@ #define HW_ADC_CLPS_ADDR(x) ((x) + 0x38U) #define HW_ADC_CLPS(x) (*(__IO hw_adc_clps_t *) HW_ADC_CLPS_ADDR(x)) -#define HW_ADC_CLPS_RD(x) (HW_ADC_CLPS(x).U) -#define HW_ADC_CLPS_WR(x, v) (HW_ADC_CLPS(x).U = (v)) +#define HW_ADC_CLPS_RD(x) (ADDRESS_READ(hw_adc_clps_t, HW_ADC_CLPS_ADDR(x))) +#define HW_ADC_CLPS_WR(x, v) (ADDRESS_WRITE(hw_adc_clps_t, HW_ADC_CLPS_ADDR(x), v)) #define HW_ADC_CLPS_SET(x, v) (HW_ADC_CLPS_WR(x, HW_ADC_CLPS_RD(x) | (v))) #define HW_ADC_CLPS_CLR(x, v) (HW_ADC_CLPS_WR(x, HW_ADC_CLPS_RD(x) & ~(v))) #define HW_ADC_CLPS_TOG(x, v) (HW_ADC_CLPS_WR(x, HW_ADC_CLPS_RD(x) ^ (v))) @@ -1571,7 +1578,7 @@ #define BS_ADC_CLPS_CLPS (6U) /*!< Bit field size in bits for ADC_CLPS_CLPS. */ /*! @brief Read current value of the ADC_CLPS_CLPS field. */ -#define BR_ADC_CLPS_CLPS(x) (HW_ADC_CLPS(x).B.CLPS) +#define BR_ADC_CLPS_CLPS(x) (UNION_READ(hw_adc_clps_t, HW_ADC_CLPS_ADDR(x), U, B.CLPS)) /*! @brief Format value for bitfield ADC_CLPS_CLPS. */ #define BF_ADC_CLPS_CLPS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLPS_CLPS) & BM_ADC_CLPS_CLPS) @@ -1608,8 +1615,8 @@ #define HW_ADC_CLP4_ADDR(x) ((x) + 0x3CU) #define HW_ADC_CLP4(x) (*(__IO hw_adc_clp4_t *) HW_ADC_CLP4_ADDR(x)) -#define HW_ADC_CLP4_RD(x) (HW_ADC_CLP4(x).U) -#define HW_ADC_CLP4_WR(x, v) (HW_ADC_CLP4(x).U = (v)) +#define HW_ADC_CLP4_RD(x) (ADDRESS_READ(hw_adc_clp4_t, HW_ADC_CLP4_ADDR(x))) +#define HW_ADC_CLP4_WR(x, v) (ADDRESS_WRITE(hw_adc_clp4_t, HW_ADC_CLP4_ADDR(x), v)) #define HW_ADC_CLP4_SET(x, v) (HW_ADC_CLP4_WR(x, HW_ADC_CLP4_RD(x) | (v))) #define HW_ADC_CLP4_CLR(x, v) (HW_ADC_CLP4_WR(x, HW_ADC_CLP4_RD(x) & ~(v))) #define HW_ADC_CLP4_TOG(x, v) (HW_ADC_CLP4_WR(x, HW_ADC_CLP4_RD(x) ^ (v))) @@ -1630,7 +1637,7 @@ #define BS_ADC_CLP4_CLP4 (10U) /*!< Bit field size in bits for ADC_CLP4_CLP4. */ /*! @brief Read current value of the ADC_CLP4_CLP4 field. */ -#define BR_ADC_CLP4_CLP4(x) (HW_ADC_CLP4(x).B.CLP4) +#define BR_ADC_CLP4_CLP4(x) (UNION_READ(hw_adc_clp4_t, HW_ADC_CLP4_ADDR(x), U, B.CLP4)) /*! @brief Format value for bitfield ADC_CLP4_CLP4. */ #define BF_ADC_CLP4_CLP4(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP4_CLP4) & BM_ADC_CLP4_CLP4) @@ -1667,8 +1674,8 @@ #define HW_ADC_CLP3_ADDR(x) ((x) + 0x40U) #define HW_ADC_CLP3(x) (*(__IO hw_adc_clp3_t *) HW_ADC_CLP3_ADDR(x)) -#define HW_ADC_CLP3_RD(x) (HW_ADC_CLP3(x).U) -#define HW_ADC_CLP3_WR(x, v) (HW_ADC_CLP3(x).U = (v)) +#define HW_ADC_CLP3_RD(x) (ADDRESS_READ(hw_adc_clp3_t, HW_ADC_CLP3_ADDR(x))) +#define HW_ADC_CLP3_WR(x, v) (ADDRESS_WRITE(hw_adc_clp3_t, HW_ADC_CLP3_ADDR(x), v)) #define HW_ADC_CLP3_SET(x, v) (HW_ADC_CLP3_WR(x, HW_ADC_CLP3_RD(x) | (v))) #define HW_ADC_CLP3_CLR(x, v) (HW_ADC_CLP3_WR(x, HW_ADC_CLP3_RD(x) & ~(v))) #define HW_ADC_CLP3_TOG(x, v) (HW_ADC_CLP3_WR(x, HW_ADC_CLP3_RD(x) ^ (v))) @@ -1689,7 +1696,7 @@ #define BS_ADC_CLP3_CLP3 (9U) /*!< Bit field size in bits for ADC_CLP3_CLP3. */ /*! @brief Read current value of the ADC_CLP3_CLP3 field. */ -#define BR_ADC_CLP3_CLP3(x) (HW_ADC_CLP3(x).B.CLP3) +#define BR_ADC_CLP3_CLP3(x) (UNION_READ(hw_adc_clp3_t, HW_ADC_CLP3_ADDR(x), U, B.CLP3)) /*! @brief Format value for bitfield ADC_CLP3_CLP3. */ #define BF_ADC_CLP3_CLP3(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP3_CLP3) & BM_ADC_CLP3_CLP3) @@ -1726,8 +1733,8 @@ #define HW_ADC_CLP2_ADDR(x) ((x) + 0x44U) #define HW_ADC_CLP2(x) (*(__IO hw_adc_clp2_t *) HW_ADC_CLP2_ADDR(x)) -#define HW_ADC_CLP2_RD(x) (HW_ADC_CLP2(x).U) -#define HW_ADC_CLP2_WR(x, v) (HW_ADC_CLP2(x).U = (v)) +#define HW_ADC_CLP2_RD(x) (ADDRESS_READ(hw_adc_clp2_t, HW_ADC_CLP2_ADDR(x))) +#define HW_ADC_CLP2_WR(x, v) (ADDRESS_WRITE(hw_adc_clp2_t, HW_ADC_CLP2_ADDR(x), v)) #define HW_ADC_CLP2_SET(x, v) (HW_ADC_CLP2_WR(x, HW_ADC_CLP2_RD(x) | (v))) #define HW_ADC_CLP2_CLR(x, v) (HW_ADC_CLP2_WR(x, HW_ADC_CLP2_RD(x) & ~(v))) #define HW_ADC_CLP2_TOG(x, v) (HW_ADC_CLP2_WR(x, HW_ADC_CLP2_RD(x) ^ (v))) @@ -1748,7 +1755,7 @@ #define BS_ADC_CLP2_CLP2 (8U) /*!< Bit field size in bits for ADC_CLP2_CLP2. */ /*! @brief Read current value of the ADC_CLP2_CLP2 field. */ -#define BR_ADC_CLP2_CLP2(x) (HW_ADC_CLP2(x).B.CLP2) +#define BR_ADC_CLP2_CLP2(x) (UNION_READ(hw_adc_clp2_t, HW_ADC_CLP2_ADDR(x), U, B.CLP2)) /*! @brief Format value for bitfield ADC_CLP2_CLP2. */ #define BF_ADC_CLP2_CLP2(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP2_CLP2) & BM_ADC_CLP2_CLP2) @@ -1785,8 +1792,8 @@ #define HW_ADC_CLP1_ADDR(x) ((x) + 0x48U) #define HW_ADC_CLP1(x) (*(__IO hw_adc_clp1_t *) HW_ADC_CLP1_ADDR(x)) -#define HW_ADC_CLP1_RD(x) (HW_ADC_CLP1(x).U) -#define HW_ADC_CLP1_WR(x, v) (HW_ADC_CLP1(x).U = (v)) +#define HW_ADC_CLP1_RD(x) (ADDRESS_READ(hw_adc_clp1_t, HW_ADC_CLP1_ADDR(x))) +#define HW_ADC_CLP1_WR(x, v) (ADDRESS_WRITE(hw_adc_clp1_t, HW_ADC_CLP1_ADDR(x), v)) #define HW_ADC_CLP1_SET(x, v) (HW_ADC_CLP1_WR(x, HW_ADC_CLP1_RD(x) | (v))) #define HW_ADC_CLP1_CLR(x, v) (HW_ADC_CLP1_WR(x, HW_ADC_CLP1_RD(x) & ~(v))) #define HW_ADC_CLP1_TOG(x, v) (HW_ADC_CLP1_WR(x, HW_ADC_CLP1_RD(x) ^ (v))) @@ -1807,7 +1814,7 @@ #define BS_ADC_CLP1_CLP1 (7U) /*!< Bit field size in bits for ADC_CLP1_CLP1. */ /*! @brief Read current value of the ADC_CLP1_CLP1 field. */ -#define BR_ADC_CLP1_CLP1(x) (HW_ADC_CLP1(x).B.CLP1) +#define BR_ADC_CLP1_CLP1(x) (UNION_READ(hw_adc_clp1_t, HW_ADC_CLP1_ADDR(x), U, B.CLP1)) /*! @brief Format value for bitfield ADC_CLP1_CLP1. */ #define BF_ADC_CLP1_CLP1(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP1_CLP1) & BM_ADC_CLP1_CLP1) @@ -1844,8 +1851,8 @@ #define HW_ADC_CLP0_ADDR(x) ((x) + 0x4CU) #define HW_ADC_CLP0(x) (*(__IO hw_adc_clp0_t *) HW_ADC_CLP0_ADDR(x)) -#define HW_ADC_CLP0_RD(x) (HW_ADC_CLP0(x).U) -#define HW_ADC_CLP0_WR(x, v) (HW_ADC_CLP0(x).U = (v)) +#define HW_ADC_CLP0_RD(x) (ADDRESS_READ(hw_adc_clp0_t, HW_ADC_CLP0_ADDR(x))) +#define HW_ADC_CLP0_WR(x, v) (ADDRESS_WRITE(hw_adc_clp0_t, HW_ADC_CLP0_ADDR(x), v)) #define HW_ADC_CLP0_SET(x, v) (HW_ADC_CLP0_WR(x, HW_ADC_CLP0_RD(x) | (v))) #define HW_ADC_CLP0_CLR(x, v) (HW_ADC_CLP0_WR(x, HW_ADC_CLP0_RD(x) & ~(v))) #define HW_ADC_CLP0_TOG(x, v) (HW_ADC_CLP0_WR(x, HW_ADC_CLP0_RD(x) ^ (v))) @@ -1866,7 +1873,7 @@ #define BS_ADC_CLP0_CLP0 (6U) /*!< Bit field size in bits for ADC_CLP0_CLP0. */ /*! @brief Read current value of the ADC_CLP0_CLP0 field. */ -#define BR_ADC_CLP0_CLP0(x) (HW_ADC_CLP0(x).B.CLP0) +#define BR_ADC_CLP0_CLP0(x) (UNION_READ(hw_adc_clp0_t, HW_ADC_CLP0_ADDR(x), U, B.CLP0)) /*! @brief Format value for bitfield ADC_CLP0_CLP0. */ #define BF_ADC_CLP0_CLP0(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP0_CLP0) & BM_ADC_CLP0_CLP0) @@ -1909,8 +1916,8 @@ #define HW_ADC_CLMD_ADDR(x) ((x) + 0x54U) #define HW_ADC_CLMD(x) (*(__IO hw_adc_clmd_t *) HW_ADC_CLMD_ADDR(x)) -#define HW_ADC_CLMD_RD(x) (HW_ADC_CLMD(x).U) -#define HW_ADC_CLMD_WR(x, v) (HW_ADC_CLMD(x).U = (v)) +#define HW_ADC_CLMD_RD(x) (ADDRESS_READ(hw_adc_clmd_t, HW_ADC_CLMD_ADDR(x))) +#define HW_ADC_CLMD_WR(x, v) (ADDRESS_WRITE(hw_adc_clmd_t, HW_ADC_CLMD_ADDR(x), v)) #define HW_ADC_CLMD_SET(x, v) (HW_ADC_CLMD_WR(x, HW_ADC_CLMD_RD(x) | (v))) #define HW_ADC_CLMD_CLR(x, v) (HW_ADC_CLMD_WR(x, HW_ADC_CLMD_RD(x) & ~(v))) #define HW_ADC_CLMD_TOG(x, v) (HW_ADC_CLMD_WR(x, HW_ADC_CLMD_RD(x) ^ (v))) @@ -1931,7 +1938,7 @@ #define BS_ADC_CLMD_CLMD (6U) /*!< Bit field size in bits for ADC_CLMD_CLMD. */ /*! @brief Read current value of the ADC_CLMD_CLMD field. */ -#define BR_ADC_CLMD_CLMD(x) (HW_ADC_CLMD(x).B.CLMD) +#define BR_ADC_CLMD_CLMD(x) (UNION_READ(hw_adc_clmd_t, HW_ADC_CLMD_ADDR(x), U, B.CLMD)) /*! @brief Format value for bitfield ADC_CLMD_CLMD. */ #define BF_ADC_CLMD_CLMD(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLMD_CLMD) & BM_ADC_CLMD_CLMD) @@ -1968,8 +1975,8 @@ #define HW_ADC_CLMS_ADDR(x) ((x) + 0x58U) #define HW_ADC_CLMS(x) (*(__IO hw_adc_clms_t *) HW_ADC_CLMS_ADDR(x)) -#define HW_ADC_CLMS_RD(x) (HW_ADC_CLMS(x).U) -#define HW_ADC_CLMS_WR(x, v) (HW_ADC_CLMS(x).U = (v)) +#define HW_ADC_CLMS_RD(x) (ADDRESS_READ(hw_adc_clms_t, HW_ADC_CLMS_ADDR(x))) +#define HW_ADC_CLMS_WR(x, v) (ADDRESS_WRITE(hw_adc_clms_t, HW_ADC_CLMS_ADDR(x), v)) #define HW_ADC_CLMS_SET(x, v) (HW_ADC_CLMS_WR(x, HW_ADC_CLMS_RD(x) | (v))) #define HW_ADC_CLMS_CLR(x, v) (HW_ADC_CLMS_WR(x, HW_ADC_CLMS_RD(x) & ~(v))) #define HW_ADC_CLMS_TOG(x, v) (HW_ADC_CLMS_WR(x, HW_ADC_CLMS_RD(x) ^ (v))) @@ -1990,7 +1997,7 @@ #define BS_ADC_CLMS_CLMS (6U) /*!< Bit field size in bits for ADC_CLMS_CLMS. */ /*! @brief Read current value of the ADC_CLMS_CLMS field. */ -#define BR_ADC_CLMS_CLMS(x) (HW_ADC_CLMS(x).B.CLMS) +#define BR_ADC_CLMS_CLMS(x) (UNION_READ(hw_adc_clms_t, HW_ADC_CLMS_ADDR(x), U, B.CLMS)) /*! @brief Format value for bitfield ADC_CLMS_CLMS. */ #define BF_ADC_CLMS_CLMS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLMS_CLMS) & BM_ADC_CLMS_CLMS) @@ -2027,8 +2034,8 @@ #define HW_ADC_CLM4_ADDR(x) ((x) + 0x5CU) #define HW_ADC_CLM4(x) (*(__IO hw_adc_clm4_t *) HW_ADC_CLM4_ADDR(x)) -#define HW_ADC_CLM4_RD(x) (HW_ADC_CLM4(x).U) -#define HW_ADC_CLM4_WR(x, v) (HW_ADC_CLM4(x).U = (v)) +#define HW_ADC_CLM4_RD(x) (ADDRESS_READ(hw_adc_clm4_t, HW_ADC_CLM4_ADDR(x))) +#define HW_ADC_CLM4_WR(x, v) (ADDRESS_WRITE(hw_adc_clm4_t, HW_ADC_CLM4_ADDR(x), v)) #define HW_ADC_CLM4_SET(x, v) (HW_ADC_CLM4_WR(x, HW_ADC_CLM4_RD(x) | (v))) #define HW_ADC_CLM4_CLR(x, v) (HW_ADC_CLM4_WR(x, HW_ADC_CLM4_RD(x) & ~(v))) #define HW_ADC_CLM4_TOG(x, v) (HW_ADC_CLM4_WR(x, HW_ADC_CLM4_RD(x) ^ (v))) @@ -2049,7 +2056,7 @@ #define BS_ADC_CLM4_CLM4 (10U) /*!< Bit field size in bits for ADC_CLM4_CLM4. */ /*! @brief Read current value of the ADC_CLM4_CLM4 field. */ -#define BR_ADC_CLM4_CLM4(x) (HW_ADC_CLM4(x).B.CLM4) +#define BR_ADC_CLM4_CLM4(x) (UNION_READ(hw_adc_clm4_t, HW_ADC_CLM4_ADDR(x), U, B.CLM4)) /*! @brief Format value for bitfield ADC_CLM4_CLM4. */ #define BF_ADC_CLM4_CLM4(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM4_CLM4) & BM_ADC_CLM4_CLM4) @@ -2086,8 +2093,8 @@ #define HW_ADC_CLM3_ADDR(x) ((x) + 0x60U) #define HW_ADC_CLM3(x) (*(__IO hw_adc_clm3_t *) HW_ADC_CLM3_ADDR(x)) -#define HW_ADC_CLM3_RD(x) (HW_ADC_CLM3(x).U) -#define HW_ADC_CLM3_WR(x, v) (HW_ADC_CLM3(x).U = (v)) +#define HW_ADC_CLM3_RD(x) (ADDRESS_READ(hw_adc_clm3_t, HW_ADC_CLM3_ADDR(x))) +#define HW_ADC_CLM3_WR(x, v) (ADDRESS_WRITE(hw_adc_clm3_t, HW_ADC_CLM3_ADDR(x), v)) #define HW_ADC_CLM3_SET(x, v) (HW_ADC_CLM3_WR(x, HW_ADC_CLM3_RD(x) | (v))) #define HW_ADC_CLM3_CLR(x, v) (HW_ADC_CLM3_WR(x, HW_ADC_CLM3_RD(x) & ~(v))) #define HW_ADC_CLM3_TOG(x, v) (HW_ADC_CLM3_WR(x, HW_ADC_CLM3_RD(x) ^ (v))) @@ -2108,7 +2115,7 @@ #define BS_ADC_CLM3_CLM3 (9U) /*!< Bit field size in bits for ADC_CLM3_CLM3. */ /*! @brief Read current value of the ADC_CLM3_CLM3 field. */ -#define BR_ADC_CLM3_CLM3(x) (HW_ADC_CLM3(x).B.CLM3) +#define BR_ADC_CLM3_CLM3(x) (UNION_READ(hw_adc_clm3_t, HW_ADC_CLM3_ADDR(x), U, B.CLM3)) /*! @brief Format value for bitfield ADC_CLM3_CLM3. */ #define BF_ADC_CLM3_CLM3(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM3_CLM3) & BM_ADC_CLM3_CLM3) @@ -2145,8 +2152,8 @@ #define HW_ADC_CLM2_ADDR(x) ((x) + 0x64U) #define HW_ADC_CLM2(x) (*(__IO hw_adc_clm2_t *) HW_ADC_CLM2_ADDR(x)) -#define HW_ADC_CLM2_RD(x) (HW_ADC_CLM2(x).U) -#define HW_ADC_CLM2_WR(x, v) (HW_ADC_CLM2(x).U = (v)) +#define HW_ADC_CLM2_RD(x) (ADDRESS_READ(hw_adc_clm2_t, HW_ADC_CLM2_ADDR(x))) +#define HW_ADC_CLM2_WR(x, v) (ADDRESS_WRITE(hw_adc_clm2_t, HW_ADC_CLM2_ADDR(x), v)) #define HW_ADC_CLM2_SET(x, v) (HW_ADC_CLM2_WR(x, HW_ADC_CLM2_RD(x) | (v))) #define HW_ADC_CLM2_CLR(x, v) (HW_ADC_CLM2_WR(x, HW_ADC_CLM2_RD(x) & ~(v))) #define HW_ADC_CLM2_TOG(x, v) (HW_ADC_CLM2_WR(x, HW_ADC_CLM2_RD(x) ^ (v))) @@ -2167,7 +2174,7 @@ #define BS_ADC_CLM2_CLM2 (8U) /*!< Bit field size in bits for ADC_CLM2_CLM2. */ /*! @brief Read current value of the ADC_CLM2_CLM2 field. */ -#define BR_ADC_CLM2_CLM2(x) (HW_ADC_CLM2(x).B.CLM2) +#define BR_ADC_CLM2_CLM2(x) (UNION_READ(hw_adc_clm2_t, HW_ADC_CLM2_ADDR(x), U, B.CLM2)) /*! @brief Format value for bitfield ADC_CLM2_CLM2. */ #define BF_ADC_CLM2_CLM2(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM2_CLM2) & BM_ADC_CLM2_CLM2) @@ -2204,8 +2211,8 @@ #define HW_ADC_CLM1_ADDR(x) ((x) + 0x68U) #define HW_ADC_CLM1(x) (*(__IO hw_adc_clm1_t *) HW_ADC_CLM1_ADDR(x)) -#define HW_ADC_CLM1_RD(x) (HW_ADC_CLM1(x).U) -#define HW_ADC_CLM1_WR(x, v) (HW_ADC_CLM1(x).U = (v)) +#define HW_ADC_CLM1_RD(x) (ADDRESS_READ(hw_adc_clm1_t, HW_ADC_CLM1_ADDR(x))) +#define HW_ADC_CLM1_WR(x, v) (ADDRESS_WRITE(hw_adc_clm1_t, HW_ADC_CLM1_ADDR(x), v)) #define HW_ADC_CLM1_SET(x, v) (HW_ADC_CLM1_WR(x, HW_ADC_CLM1_RD(x) | (v))) #define HW_ADC_CLM1_CLR(x, v) (HW_ADC_CLM1_WR(x, HW_ADC_CLM1_RD(x) & ~(v))) #define HW_ADC_CLM1_TOG(x, v) (HW_ADC_CLM1_WR(x, HW_ADC_CLM1_RD(x) ^ (v))) @@ -2226,7 +2233,7 @@ #define BS_ADC_CLM1_CLM1 (7U) /*!< Bit field size in bits for ADC_CLM1_CLM1. */ /*! @brief Read current value of the ADC_CLM1_CLM1 field. */ -#define BR_ADC_CLM1_CLM1(x) (HW_ADC_CLM1(x).B.CLM1) +#define BR_ADC_CLM1_CLM1(x) (UNION_READ(hw_adc_clm1_t, HW_ADC_CLM1_ADDR(x), U, B.CLM1)) /*! @brief Format value for bitfield ADC_CLM1_CLM1. */ #define BF_ADC_CLM1_CLM1(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM1_CLM1) & BM_ADC_CLM1_CLM1) @@ -2263,8 +2270,8 @@ #define HW_ADC_CLM0_ADDR(x) ((x) + 0x6CU) #define HW_ADC_CLM0(x) (*(__IO hw_adc_clm0_t *) HW_ADC_CLM0_ADDR(x)) -#define HW_ADC_CLM0_RD(x) (HW_ADC_CLM0(x).U) -#define HW_ADC_CLM0_WR(x, v) (HW_ADC_CLM0(x).U = (v)) +#define HW_ADC_CLM0_RD(x) (ADDRESS_READ(hw_adc_clm0_t, HW_ADC_CLM0_ADDR(x))) +#define HW_ADC_CLM0_WR(x, v) (ADDRESS_WRITE(hw_adc_clm0_t, HW_ADC_CLM0_ADDR(x), v)) #define HW_ADC_CLM0_SET(x, v) (HW_ADC_CLM0_WR(x, HW_ADC_CLM0_RD(x) | (v))) #define HW_ADC_CLM0_CLR(x, v) (HW_ADC_CLM0_WR(x, HW_ADC_CLM0_RD(x) & ~(v))) #define HW_ADC_CLM0_TOG(x, v) (HW_ADC_CLM0_WR(x, HW_ADC_CLM0_RD(x) ^ (v))) @@ -2285,7 +2292,7 @@ #define BS_ADC_CLM0_CLM0 (6U) /*!< Bit field size in bits for ADC_CLM0_CLM0. */ /*! @brief Read current value of the ADC_CLM0_CLM0 field. */ -#define BR_ADC_CLM0_CLM0(x) (HW_ADC_CLM0(x).B.CLM0) +#define BR_ADC_CLM0_CLM0(x) (UNION_READ(hw_adc_clm0_t, HW_ADC_CLM0_ADDR(x), U, B.CLM0)) /*! @brief Format value for bitfield ADC_CLM0_CLM0. */ #define BF_ADC_CLM0_CLM0(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM0_CLM0) & BM_ADC_CLM0_CLM0)
--- a/hal/device/device/MK64F12/MK64F12_aips.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_aips.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -173,8 +180,8 @@ #define HW_AIPS_MPRA_ADDR(x) ((x) + 0x0U) #define HW_AIPS_MPRA(x) (*(__IO hw_aips_mpra_t *) HW_AIPS_MPRA_ADDR(x)) -#define HW_AIPS_MPRA_RD(x) (HW_AIPS_MPRA(x).U) -#define HW_AIPS_MPRA_WR(x, v) (HW_AIPS_MPRA(x).U = (v)) +#define HW_AIPS_MPRA_RD(x) (ADDRESS_READ(hw_aips_mpra_t, HW_AIPS_MPRA_ADDR(x))) +#define HW_AIPS_MPRA_WR(x, v) (ADDRESS_WRITE(hw_aips_mpra_t, HW_AIPS_MPRA_ADDR(x), v)) #define HW_AIPS_MPRA_SET(x, v) (HW_AIPS_MPRA_WR(x, HW_AIPS_MPRA_RD(x) | (v))) #define HW_AIPS_MPRA_CLR(x, v) (HW_AIPS_MPRA_WR(x, HW_AIPS_MPRA_RD(x) & ~(v))) #define HW_AIPS_MPRA_TOG(x, v) (HW_AIPS_MPRA_WR(x, HW_AIPS_MPRA_RD(x) ^ (v))) @@ -199,13 +206,13 @@ #define BS_AIPS_MPRA_MPL5 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL5. */ /*! @brief Read current value of the AIPS_MPRA_MPL5 field. */ -#define BR_AIPS_MPRA_MPL5(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL5)) +#define BR_AIPS_MPRA_MPL5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL5))) /*! @brief Format value for bitfield AIPS_MPRA_MPL5. */ #define BF_AIPS_MPRA_MPL5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL5) & BM_AIPS_MPRA_MPL5) /*! @brief Set the MPL5 field to a new value. */ -#define BW_AIPS_MPRA_MPL5(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL5) = (v)) +#define BW_AIPS_MPRA_MPL5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL5), v)) /*@}*/ /*! @@ -223,13 +230,13 @@ #define BS_AIPS_MPRA_MTW5 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW5. */ /*! @brief Read current value of the AIPS_MPRA_MTW5 field. */ -#define BR_AIPS_MPRA_MTW5(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW5)) +#define BR_AIPS_MPRA_MTW5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW5))) /*! @brief Format value for bitfield AIPS_MPRA_MTW5. */ #define BF_AIPS_MPRA_MTW5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW5) & BM_AIPS_MPRA_MTW5) /*! @brief Set the MTW5 field to a new value. */ -#define BW_AIPS_MPRA_MTW5(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW5) = (v)) +#define BW_AIPS_MPRA_MTW5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW5), v)) /*@}*/ /*! @@ -247,13 +254,13 @@ #define BS_AIPS_MPRA_MTR5 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR5. */ /*! @brief Read current value of the AIPS_MPRA_MTR5 field. */ -#define BR_AIPS_MPRA_MTR5(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR5)) +#define BR_AIPS_MPRA_MTR5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR5))) /*! @brief Format value for bitfield AIPS_MPRA_MTR5. */ #define BF_AIPS_MPRA_MTR5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR5) & BM_AIPS_MPRA_MTR5) /*! @brief Set the MTR5 field to a new value. */ -#define BW_AIPS_MPRA_MTR5(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR5) = (v)) +#define BW_AIPS_MPRA_MTR5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR5), v)) /*@}*/ /*! @@ -271,13 +278,13 @@ #define BS_AIPS_MPRA_MPL4 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL4. */ /*! @brief Read current value of the AIPS_MPRA_MPL4 field. */ -#define BR_AIPS_MPRA_MPL4(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL4)) +#define BR_AIPS_MPRA_MPL4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL4))) /*! @brief Format value for bitfield AIPS_MPRA_MPL4. */ #define BF_AIPS_MPRA_MPL4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL4) & BM_AIPS_MPRA_MPL4) /*! @brief Set the MPL4 field to a new value. */ -#define BW_AIPS_MPRA_MPL4(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL4) = (v)) +#define BW_AIPS_MPRA_MPL4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL4), v)) /*@}*/ /*! @@ -295,13 +302,13 @@ #define BS_AIPS_MPRA_MTW4 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW4. */ /*! @brief Read current value of the AIPS_MPRA_MTW4 field. */ -#define BR_AIPS_MPRA_MTW4(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW4)) +#define BR_AIPS_MPRA_MTW4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW4))) /*! @brief Format value for bitfield AIPS_MPRA_MTW4. */ #define BF_AIPS_MPRA_MTW4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW4) & BM_AIPS_MPRA_MTW4) /*! @brief Set the MTW4 field to a new value. */ -#define BW_AIPS_MPRA_MTW4(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW4) = (v)) +#define BW_AIPS_MPRA_MTW4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW4), v)) /*@}*/ /*! @@ -319,13 +326,13 @@ #define BS_AIPS_MPRA_MTR4 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR4. */ /*! @brief Read current value of the AIPS_MPRA_MTR4 field. */ -#define BR_AIPS_MPRA_MTR4(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR4)) +#define BR_AIPS_MPRA_MTR4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR4))) /*! @brief Format value for bitfield AIPS_MPRA_MTR4. */ #define BF_AIPS_MPRA_MTR4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR4) & BM_AIPS_MPRA_MTR4) /*! @brief Set the MTR4 field to a new value. */ -#define BW_AIPS_MPRA_MTR4(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR4) = (v)) +#define BW_AIPS_MPRA_MTR4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR4), v)) /*@}*/ /*! @@ -343,13 +350,13 @@ #define BS_AIPS_MPRA_MPL3 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL3. */ /*! @brief Read current value of the AIPS_MPRA_MPL3 field. */ -#define BR_AIPS_MPRA_MPL3(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL3)) +#define BR_AIPS_MPRA_MPL3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL3))) /*! @brief Format value for bitfield AIPS_MPRA_MPL3. */ #define BF_AIPS_MPRA_MPL3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL3) & BM_AIPS_MPRA_MPL3) /*! @brief Set the MPL3 field to a new value. */ -#define BW_AIPS_MPRA_MPL3(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL3) = (v)) +#define BW_AIPS_MPRA_MPL3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL3), v)) /*@}*/ /*! @@ -367,13 +374,13 @@ #define BS_AIPS_MPRA_MTW3 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW3. */ /*! @brief Read current value of the AIPS_MPRA_MTW3 field. */ -#define BR_AIPS_MPRA_MTW3(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW3)) +#define BR_AIPS_MPRA_MTW3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW3))) /*! @brief Format value for bitfield AIPS_MPRA_MTW3. */ #define BF_AIPS_MPRA_MTW3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW3) & BM_AIPS_MPRA_MTW3) /*! @brief Set the MTW3 field to a new value. */ -#define BW_AIPS_MPRA_MTW3(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW3) = (v)) +#define BW_AIPS_MPRA_MTW3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW3), v)) /*@}*/ /*! @@ -391,13 +398,13 @@ #define BS_AIPS_MPRA_MTR3 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR3. */ /*! @brief Read current value of the AIPS_MPRA_MTR3 field. */ -#define BR_AIPS_MPRA_MTR3(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR3)) +#define BR_AIPS_MPRA_MTR3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR3))) /*! @brief Format value for bitfield AIPS_MPRA_MTR3. */ #define BF_AIPS_MPRA_MTR3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR3) & BM_AIPS_MPRA_MTR3) /*! @brief Set the MTR3 field to a new value. */ -#define BW_AIPS_MPRA_MTR3(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR3) = (v)) +#define BW_AIPS_MPRA_MTR3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR3), v)) /*@}*/ /*! @@ -415,13 +422,13 @@ #define BS_AIPS_MPRA_MPL2 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL2. */ /*! @brief Read current value of the AIPS_MPRA_MPL2 field. */ -#define BR_AIPS_MPRA_MPL2(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL2)) +#define BR_AIPS_MPRA_MPL2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL2))) /*! @brief Format value for bitfield AIPS_MPRA_MPL2. */ #define BF_AIPS_MPRA_MPL2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL2) & BM_AIPS_MPRA_MPL2) /*! @brief Set the MPL2 field to a new value. */ -#define BW_AIPS_MPRA_MPL2(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL2) = (v)) +#define BW_AIPS_MPRA_MPL2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL2), v)) /*@}*/ /*! @@ -439,13 +446,13 @@ #define BS_AIPS_MPRA_MTW2 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW2. */ /*! @brief Read current value of the AIPS_MPRA_MTW2 field. */ -#define BR_AIPS_MPRA_MTW2(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW2)) +#define BR_AIPS_MPRA_MTW2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW2))) /*! @brief Format value for bitfield AIPS_MPRA_MTW2. */ #define BF_AIPS_MPRA_MTW2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW2) & BM_AIPS_MPRA_MTW2) /*! @brief Set the MTW2 field to a new value. */ -#define BW_AIPS_MPRA_MTW2(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW2) = (v)) +#define BW_AIPS_MPRA_MTW2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW2), v)) /*@}*/ /*! @@ -463,13 +470,13 @@ #define BS_AIPS_MPRA_MTR2 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR2. */ /*! @brief Read current value of the AIPS_MPRA_MTR2 field. */ -#define BR_AIPS_MPRA_MTR2(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR2)) +#define BR_AIPS_MPRA_MTR2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR2))) /*! @brief Format value for bitfield AIPS_MPRA_MTR2. */ #define BF_AIPS_MPRA_MTR2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR2) & BM_AIPS_MPRA_MTR2) /*! @brief Set the MTR2 field to a new value. */ -#define BW_AIPS_MPRA_MTR2(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR2) = (v)) +#define BW_AIPS_MPRA_MTR2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR2), v)) /*@}*/ /*! @@ -487,13 +494,13 @@ #define BS_AIPS_MPRA_MPL1 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL1. */ /*! @brief Read current value of the AIPS_MPRA_MPL1 field. */ -#define BR_AIPS_MPRA_MPL1(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL1)) +#define BR_AIPS_MPRA_MPL1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL1))) /*! @brief Format value for bitfield AIPS_MPRA_MPL1. */ #define BF_AIPS_MPRA_MPL1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL1) & BM_AIPS_MPRA_MPL1) /*! @brief Set the MPL1 field to a new value. */ -#define BW_AIPS_MPRA_MPL1(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL1) = (v)) +#define BW_AIPS_MPRA_MPL1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL1), v)) /*@}*/ /*! @@ -511,13 +518,13 @@ #define BS_AIPS_MPRA_MTW1 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW1. */ /*! @brief Read current value of the AIPS_MPRA_MTW1 field. */ -#define BR_AIPS_MPRA_MTW1(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW1)) +#define BR_AIPS_MPRA_MTW1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW1))) /*! @brief Format value for bitfield AIPS_MPRA_MTW1. */ #define BF_AIPS_MPRA_MTW1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW1) & BM_AIPS_MPRA_MTW1) /*! @brief Set the MTW1 field to a new value. */ -#define BW_AIPS_MPRA_MTW1(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW1) = (v)) +#define BW_AIPS_MPRA_MTW1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW1), v)) /*@}*/ /*! @@ -535,13 +542,13 @@ #define BS_AIPS_MPRA_MTR1 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR1. */ /*! @brief Read current value of the AIPS_MPRA_MTR1 field. */ -#define BR_AIPS_MPRA_MTR1(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR1)) +#define BR_AIPS_MPRA_MTR1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR1))) /*! @brief Format value for bitfield AIPS_MPRA_MTR1. */ #define BF_AIPS_MPRA_MTR1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR1) & BM_AIPS_MPRA_MTR1) /*! @brief Set the MTR1 field to a new value. */ -#define BW_AIPS_MPRA_MTR1(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR1) = (v)) +#define BW_AIPS_MPRA_MTR1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR1), v)) /*@}*/ /*! @@ -559,13 +566,13 @@ #define BS_AIPS_MPRA_MPL0 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL0. */ /*! @brief Read current value of the AIPS_MPRA_MPL0 field. */ -#define BR_AIPS_MPRA_MPL0(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL0)) +#define BR_AIPS_MPRA_MPL0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL0))) /*! @brief Format value for bitfield AIPS_MPRA_MPL0. */ #define BF_AIPS_MPRA_MPL0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL0) & BM_AIPS_MPRA_MPL0) /*! @brief Set the MPL0 field to a new value. */ -#define BW_AIPS_MPRA_MPL0(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL0) = (v)) +#define BW_AIPS_MPRA_MPL0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL0), v)) /*@}*/ /*! @@ -583,13 +590,13 @@ #define BS_AIPS_MPRA_MTW0 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW0. */ /*! @brief Read current value of the AIPS_MPRA_MTW0 field. */ -#define BR_AIPS_MPRA_MTW0(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW0)) +#define BR_AIPS_MPRA_MTW0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW0))) /*! @brief Format value for bitfield AIPS_MPRA_MTW0. */ #define BF_AIPS_MPRA_MTW0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW0) & BM_AIPS_MPRA_MTW0) /*! @brief Set the MTW0 field to a new value. */ -#define BW_AIPS_MPRA_MTW0(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW0) = (v)) +#define BW_AIPS_MPRA_MTW0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW0), v)) /*@}*/ /*! @@ -607,13 +614,13 @@ #define BS_AIPS_MPRA_MTR0 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR0. */ /*! @brief Read current value of the AIPS_MPRA_MTR0 field. */ -#define BR_AIPS_MPRA_MTR0(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR0)) +#define BR_AIPS_MPRA_MTR0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR0))) /*! @brief Format value for bitfield AIPS_MPRA_MTR0. */ #define BF_AIPS_MPRA_MTR0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR0) & BM_AIPS_MPRA_MTR0) /*! @brief Set the MTR0 field to a new value. */ -#define BW_AIPS_MPRA_MTR0(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR0) = (v)) +#define BW_AIPS_MPRA_MTR0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR0), v)) /*@}*/ /******************************************************************************* @@ -700,8 +707,8 @@ #define HW_AIPS_PACRA_ADDR(x) ((x) + 0x20U) #define HW_AIPS_PACRA(x) (*(__IO hw_aips_pacra_t *) HW_AIPS_PACRA_ADDR(x)) -#define HW_AIPS_PACRA_RD(x) (HW_AIPS_PACRA(x).U) -#define HW_AIPS_PACRA_WR(x, v) (HW_AIPS_PACRA(x).U = (v)) +#define HW_AIPS_PACRA_RD(x) (ADDRESS_READ(hw_aips_pacra_t, HW_AIPS_PACRA_ADDR(x))) +#define HW_AIPS_PACRA_WR(x, v) (ADDRESS_WRITE(hw_aips_pacra_t, HW_AIPS_PACRA_ADDR(x), v)) #define HW_AIPS_PACRA_SET(x, v) (HW_AIPS_PACRA_WR(x, HW_AIPS_PACRA_RD(x) | (v))) #define HW_AIPS_PACRA_CLR(x, v) (HW_AIPS_PACRA_WR(x, HW_AIPS_PACRA_RD(x) & ~(v))) #define HW_AIPS_PACRA_TOG(x, v) (HW_AIPS_PACRA_WR(x, HW_AIPS_PACRA_RD(x) ^ (v))) @@ -728,13 +735,13 @@ #define BS_AIPS_PACRA_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP7. */ /*! @brief Read current value of the AIPS_PACRA_TP7 field. */ -#define BR_AIPS_PACRA_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP7)) +#define BR_AIPS_PACRA_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP7))) /*! @brief Format value for bitfield AIPS_PACRA_TP7. */ #define BF_AIPS_PACRA_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP7) & BM_AIPS_PACRA_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRA_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP7) = (v)) +#define BW_AIPS_PACRA_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP7), v)) /*@}*/ /*! @@ -754,13 +761,13 @@ #define BS_AIPS_PACRA_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP7. */ /*! @brief Read current value of the AIPS_PACRA_WP7 field. */ -#define BR_AIPS_PACRA_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP7)) +#define BR_AIPS_PACRA_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP7))) /*! @brief Format value for bitfield AIPS_PACRA_WP7. */ #define BF_AIPS_PACRA_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP7) & BM_AIPS_PACRA_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRA_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP7) = (v)) +#define BW_AIPS_PACRA_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP7), v)) /*@}*/ /*! @@ -783,13 +790,13 @@ #define BS_AIPS_PACRA_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP7. */ /*! @brief Read current value of the AIPS_PACRA_SP7 field. */ -#define BR_AIPS_PACRA_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP7)) +#define BR_AIPS_PACRA_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP7))) /*! @brief Format value for bitfield AIPS_PACRA_SP7. */ #define BF_AIPS_PACRA_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP7) & BM_AIPS_PACRA_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRA_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP7) = (v)) +#define BW_AIPS_PACRA_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP7), v)) /*@}*/ /*! @@ -809,13 +816,13 @@ #define BS_AIPS_PACRA_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP6. */ /*! @brief Read current value of the AIPS_PACRA_TP6 field. */ -#define BR_AIPS_PACRA_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP6)) +#define BR_AIPS_PACRA_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP6))) /*! @brief Format value for bitfield AIPS_PACRA_TP6. */ #define BF_AIPS_PACRA_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP6) & BM_AIPS_PACRA_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRA_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP6) = (v)) +#define BW_AIPS_PACRA_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP6), v)) /*@}*/ /*! @@ -835,13 +842,13 @@ #define BS_AIPS_PACRA_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP6. */ /*! @brief Read current value of the AIPS_PACRA_WP6 field. */ -#define BR_AIPS_PACRA_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP6)) +#define BR_AIPS_PACRA_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP6))) /*! @brief Format value for bitfield AIPS_PACRA_WP6. */ #define BF_AIPS_PACRA_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP6) & BM_AIPS_PACRA_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRA_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP6) = (v)) +#define BW_AIPS_PACRA_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP6), v)) /*@}*/ /*! @@ -864,13 +871,13 @@ #define BS_AIPS_PACRA_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP6. */ /*! @brief Read current value of the AIPS_PACRA_SP6 field. */ -#define BR_AIPS_PACRA_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP6)) +#define BR_AIPS_PACRA_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP6))) /*! @brief Format value for bitfield AIPS_PACRA_SP6. */ #define BF_AIPS_PACRA_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP6) & BM_AIPS_PACRA_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRA_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP6) = (v)) +#define BW_AIPS_PACRA_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP6), v)) /*@}*/ /*! @@ -890,13 +897,13 @@ #define BS_AIPS_PACRA_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP5. */ /*! @brief Read current value of the AIPS_PACRA_TP5 field. */ -#define BR_AIPS_PACRA_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP5)) +#define BR_AIPS_PACRA_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP5))) /*! @brief Format value for bitfield AIPS_PACRA_TP5. */ #define BF_AIPS_PACRA_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP5) & BM_AIPS_PACRA_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRA_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP5) = (v)) +#define BW_AIPS_PACRA_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP5), v)) /*@}*/ /*! @@ -916,13 +923,13 @@ #define BS_AIPS_PACRA_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP5. */ /*! @brief Read current value of the AIPS_PACRA_WP5 field. */ -#define BR_AIPS_PACRA_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP5)) +#define BR_AIPS_PACRA_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP5))) /*! @brief Format value for bitfield AIPS_PACRA_WP5. */ #define BF_AIPS_PACRA_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP5) & BM_AIPS_PACRA_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRA_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP5) = (v)) +#define BW_AIPS_PACRA_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP5), v)) /*@}*/ /*! @@ -945,13 +952,13 @@ #define BS_AIPS_PACRA_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP5. */ /*! @brief Read current value of the AIPS_PACRA_SP5 field. */ -#define BR_AIPS_PACRA_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP5)) +#define BR_AIPS_PACRA_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP5))) /*! @brief Format value for bitfield AIPS_PACRA_SP5. */ #define BF_AIPS_PACRA_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP5) & BM_AIPS_PACRA_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRA_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP5) = (v)) +#define BW_AIPS_PACRA_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP5), v)) /*@}*/ /*! @@ -971,13 +978,13 @@ #define BS_AIPS_PACRA_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP4. */ /*! @brief Read current value of the AIPS_PACRA_TP4 field. */ -#define BR_AIPS_PACRA_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP4)) +#define BR_AIPS_PACRA_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP4))) /*! @brief Format value for bitfield AIPS_PACRA_TP4. */ #define BF_AIPS_PACRA_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP4) & BM_AIPS_PACRA_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRA_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP4) = (v)) +#define BW_AIPS_PACRA_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP4), v)) /*@}*/ /*! @@ -997,13 +1004,13 @@ #define BS_AIPS_PACRA_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP4. */ /*! @brief Read current value of the AIPS_PACRA_WP4 field. */ -#define BR_AIPS_PACRA_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP4)) +#define BR_AIPS_PACRA_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP4))) /*! @brief Format value for bitfield AIPS_PACRA_WP4. */ #define BF_AIPS_PACRA_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP4) & BM_AIPS_PACRA_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRA_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP4) = (v)) +#define BW_AIPS_PACRA_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP4), v)) /*@}*/ /*! @@ -1026,13 +1033,13 @@ #define BS_AIPS_PACRA_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP4. */ /*! @brief Read current value of the AIPS_PACRA_SP4 field. */ -#define BR_AIPS_PACRA_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP4)) +#define BR_AIPS_PACRA_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP4))) /*! @brief Format value for bitfield AIPS_PACRA_SP4. */ #define BF_AIPS_PACRA_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP4) & BM_AIPS_PACRA_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRA_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP4) = (v)) +#define BW_AIPS_PACRA_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP4), v)) /*@}*/ /*! @@ -1052,13 +1059,13 @@ #define BS_AIPS_PACRA_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP3. */ /*! @brief Read current value of the AIPS_PACRA_TP3 field. */ -#define BR_AIPS_PACRA_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP3)) +#define BR_AIPS_PACRA_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP3))) /*! @brief Format value for bitfield AIPS_PACRA_TP3. */ #define BF_AIPS_PACRA_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP3) & BM_AIPS_PACRA_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRA_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP3) = (v)) +#define BW_AIPS_PACRA_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP3), v)) /*@}*/ /*! @@ -1078,13 +1085,13 @@ #define BS_AIPS_PACRA_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP3. */ /*! @brief Read current value of the AIPS_PACRA_WP3 field. */ -#define BR_AIPS_PACRA_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP3)) +#define BR_AIPS_PACRA_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP3))) /*! @brief Format value for bitfield AIPS_PACRA_WP3. */ #define BF_AIPS_PACRA_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP3) & BM_AIPS_PACRA_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRA_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP3) = (v)) +#define BW_AIPS_PACRA_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP3), v)) /*@}*/ /*! @@ -1107,13 +1114,13 @@ #define BS_AIPS_PACRA_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP3. */ /*! @brief Read current value of the AIPS_PACRA_SP3 field. */ -#define BR_AIPS_PACRA_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP3)) +#define BR_AIPS_PACRA_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP3))) /*! @brief Format value for bitfield AIPS_PACRA_SP3. */ #define BF_AIPS_PACRA_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP3) & BM_AIPS_PACRA_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRA_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP3) = (v)) +#define BW_AIPS_PACRA_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP3), v)) /*@}*/ /*! @@ -1133,13 +1140,13 @@ #define BS_AIPS_PACRA_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP2. */ /*! @brief Read current value of the AIPS_PACRA_TP2 field. */ -#define BR_AIPS_PACRA_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP2)) +#define BR_AIPS_PACRA_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP2))) /*! @brief Format value for bitfield AIPS_PACRA_TP2. */ #define BF_AIPS_PACRA_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP2) & BM_AIPS_PACRA_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRA_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP2) = (v)) +#define BW_AIPS_PACRA_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP2), v)) /*@}*/ /*! @@ -1159,13 +1166,13 @@ #define BS_AIPS_PACRA_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP2. */ /*! @brief Read current value of the AIPS_PACRA_WP2 field. */ -#define BR_AIPS_PACRA_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP2)) +#define BR_AIPS_PACRA_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP2))) /*! @brief Format value for bitfield AIPS_PACRA_WP2. */ #define BF_AIPS_PACRA_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP2) & BM_AIPS_PACRA_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRA_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP2) = (v)) +#define BW_AIPS_PACRA_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP2), v)) /*@}*/ /*! @@ -1188,13 +1195,13 @@ #define BS_AIPS_PACRA_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP2. */ /*! @brief Read current value of the AIPS_PACRA_SP2 field. */ -#define BR_AIPS_PACRA_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP2)) +#define BR_AIPS_PACRA_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP2))) /*! @brief Format value for bitfield AIPS_PACRA_SP2. */ #define BF_AIPS_PACRA_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP2) & BM_AIPS_PACRA_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRA_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP2) = (v)) +#define BW_AIPS_PACRA_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP2), v)) /*@}*/ /*! @@ -1214,13 +1221,13 @@ #define BS_AIPS_PACRA_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP1. */ /*! @brief Read current value of the AIPS_PACRA_TP1 field. */ -#define BR_AIPS_PACRA_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP1)) +#define BR_AIPS_PACRA_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP1))) /*! @brief Format value for bitfield AIPS_PACRA_TP1. */ #define BF_AIPS_PACRA_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP1) & BM_AIPS_PACRA_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRA_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP1) = (v)) +#define BW_AIPS_PACRA_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP1), v)) /*@}*/ /*! @@ -1240,13 +1247,13 @@ #define BS_AIPS_PACRA_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP1. */ /*! @brief Read current value of the AIPS_PACRA_WP1 field. */ -#define BR_AIPS_PACRA_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP1)) +#define BR_AIPS_PACRA_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP1))) /*! @brief Format value for bitfield AIPS_PACRA_WP1. */ #define BF_AIPS_PACRA_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP1) & BM_AIPS_PACRA_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRA_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP1) = (v)) +#define BW_AIPS_PACRA_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP1), v)) /*@}*/ /*! @@ -1269,13 +1276,13 @@ #define BS_AIPS_PACRA_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP1. */ /*! @brief Read current value of the AIPS_PACRA_SP1 field. */ -#define BR_AIPS_PACRA_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP1)) +#define BR_AIPS_PACRA_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP1))) /*! @brief Format value for bitfield AIPS_PACRA_SP1. */ #define BF_AIPS_PACRA_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP1) & BM_AIPS_PACRA_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRA_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP1) = (v)) +#define BW_AIPS_PACRA_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP1), v)) /*@}*/ /*! @@ -1295,13 +1302,13 @@ #define BS_AIPS_PACRA_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP0. */ /*! @brief Read current value of the AIPS_PACRA_TP0 field. */ -#define BR_AIPS_PACRA_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP0)) +#define BR_AIPS_PACRA_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP0))) /*! @brief Format value for bitfield AIPS_PACRA_TP0. */ #define BF_AIPS_PACRA_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP0) & BM_AIPS_PACRA_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRA_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP0) = (v)) +#define BW_AIPS_PACRA_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP0), v)) /*@}*/ /*! @@ -1321,13 +1328,13 @@ #define BS_AIPS_PACRA_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP0. */ /*! @brief Read current value of the AIPS_PACRA_WP0 field. */ -#define BR_AIPS_PACRA_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP0)) +#define BR_AIPS_PACRA_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP0))) /*! @brief Format value for bitfield AIPS_PACRA_WP0. */ #define BF_AIPS_PACRA_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP0) & BM_AIPS_PACRA_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRA_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP0) = (v)) +#define BW_AIPS_PACRA_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP0), v)) /*@}*/ /*! @@ -1350,13 +1357,13 @@ #define BS_AIPS_PACRA_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP0. */ /*! @brief Read current value of the AIPS_PACRA_SP0 field. */ -#define BR_AIPS_PACRA_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP0)) +#define BR_AIPS_PACRA_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP0))) /*! @brief Format value for bitfield AIPS_PACRA_SP0. */ #define BF_AIPS_PACRA_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP0) & BM_AIPS_PACRA_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRA_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP0) = (v)) +#define BW_AIPS_PACRA_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP0), v)) /*@}*/ /******************************************************************************* @@ -1443,8 +1450,8 @@ #define HW_AIPS_PACRB_ADDR(x) ((x) + 0x24U) #define HW_AIPS_PACRB(x) (*(__IO hw_aips_pacrb_t *) HW_AIPS_PACRB_ADDR(x)) -#define HW_AIPS_PACRB_RD(x) (HW_AIPS_PACRB(x).U) -#define HW_AIPS_PACRB_WR(x, v) (HW_AIPS_PACRB(x).U = (v)) +#define HW_AIPS_PACRB_RD(x) (ADDRESS_READ(hw_aips_pacrb_t, HW_AIPS_PACRB_ADDR(x))) +#define HW_AIPS_PACRB_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrb_t, HW_AIPS_PACRB_ADDR(x), v)) #define HW_AIPS_PACRB_SET(x, v) (HW_AIPS_PACRB_WR(x, HW_AIPS_PACRB_RD(x) | (v))) #define HW_AIPS_PACRB_CLR(x, v) (HW_AIPS_PACRB_WR(x, HW_AIPS_PACRB_RD(x) & ~(v))) #define HW_AIPS_PACRB_TOG(x, v) (HW_AIPS_PACRB_WR(x, HW_AIPS_PACRB_RD(x) ^ (v))) @@ -1471,13 +1478,13 @@ #define BS_AIPS_PACRB_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP7. */ /*! @brief Read current value of the AIPS_PACRB_TP7 field. */ -#define BR_AIPS_PACRB_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP7)) +#define BR_AIPS_PACRB_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP7))) /*! @brief Format value for bitfield AIPS_PACRB_TP7. */ #define BF_AIPS_PACRB_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP7) & BM_AIPS_PACRB_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRB_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP7) = (v)) +#define BW_AIPS_PACRB_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP7), v)) /*@}*/ /*! @@ -1497,13 +1504,13 @@ #define BS_AIPS_PACRB_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP7. */ /*! @brief Read current value of the AIPS_PACRB_WP7 field. */ -#define BR_AIPS_PACRB_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP7)) +#define BR_AIPS_PACRB_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP7))) /*! @brief Format value for bitfield AIPS_PACRB_WP7. */ #define BF_AIPS_PACRB_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP7) & BM_AIPS_PACRB_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRB_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP7) = (v)) +#define BW_AIPS_PACRB_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP7), v)) /*@}*/ /*! @@ -1526,13 +1533,13 @@ #define BS_AIPS_PACRB_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP7. */ /*! @brief Read current value of the AIPS_PACRB_SP7 field. */ -#define BR_AIPS_PACRB_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP7)) +#define BR_AIPS_PACRB_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP7))) /*! @brief Format value for bitfield AIPS_PACRB_SP7. */ #define BF_AIPS_PACRB_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP7) & BM_AIPS_PACRB_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRB_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP7) = (v)) +#define BW_AIPS_PACRB_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP7), v)) /*@}*/ /*! @@ -1552,13 +1559,13 @@ #define BS_AIPS_PACRB_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP6. */ /*! @brief Read current value of the AIPS_PACRB_TP6 field. */ -#define BR_AIPS_PACRB_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP6)) +#define BR_AIPS_PACRB_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP6))) /*! @brief Format value for bitfield AIPS_PACRB_TP6. */ #define BF_AIPS_PACRB_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP6) & BM_AIPS_PACRB_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRB_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP6) = (v)) +#define BW_AIPS_PACRB_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP6), v)) /*@}*/ /*! @@ -1578,13 +1585,13 @@ #define BS_AIPS_PACRB_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP6. */ /*! @brief Read current value of the AIPS_PACRB_WP6 field. */ -#define BR_AIPS_PACRB_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP6)) +#define BR_AIPS_PACRB_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP6))) /*! @brief Format value for bitfield AIPS_PACRB_WP6. */ #define BF_AIPS_PACRB_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP6) & BM_AIPS_PACRB_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRB_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP6) = (v)) +#define BW_AIPS_PACRB_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP6), v)) /*@}*/ /*! @@ -1607,13 +1614,13 @@ #define BS_AIPS_PACRB_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP6. */ /*! @brief Read current value of the AIPS_PACRB_SP6 field. */ -#define BR_AIPS_PACRB_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP6)) +#define BR_AIPS_PACRB_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP6))) /*! @brief Format value for bitfield AIPS_PACRB_SP6. */ #define BF_AIPS_PACRB_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP6) & BM_AIPS_PACRB_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRB_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP6) = (v)) +#define BW_AIPS_PACRB_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP6), v)) /*@}*/ /*! @@ -1633,13 +1640,13 @@ #define BS_AIPS_PACRB_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP5. */ /*! @brief Read current value of the AIPS_PACRB_TP5 field. */ -#define BR_AIPS_PACRB_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP5)) +#define BR_AIPS_PACRB_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP5))) /*! @brief Format value for bitfield AIPS_PACRB_TP5. */ #define BF_AIPS_PACRB_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP5) & BM_AIPS_PACRB_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRB_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP5) = (v)) +#define BW_AIPS_PACRB_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP5), v)) /*@}*/ /*! @@ -1659,13 +1666,13 @@ #define BS_AIPS_PACRB_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP5. */ /*! @brief Read current value of the AIPS_PACRB_WP5 field. */ -#define BR_AIPS_PACRB_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP5)) +#define BR_AIPS_PACRB_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP5))) /*! @brief Format value for bitfield AIPS_PACRB_WP5. */ #define BF_AIPS_PACRB_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP5) & BM_AIPS_PACRB_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRB_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP5) = (v)) +#define BW_AIPS_PACRB_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP5), v)) /*@}*/ /*! @@ -1688,13 +1695,13 @@ #define BS_AIPS_PACRB_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP5. */ /*! @brief Read current value of the AIPS_PACRB_SP5 field. */ -#define BR_AIPS_PACRB_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP5)) +#define BR_AIPS_PACRB_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP5))) /*! @brief Format value for bitfield AIPS_PACRB_SP5. */ #define BF_AIPS_PACRB_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP5) & BM_AIPS_PACRB_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRB_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP5) = (v)) +#define BW_AIPS_PACRB_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP5), v)) /*@}*/ /*! @@ -1714,13 +1721,13 @@ #define BS_AIPS_PACRB_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP4. */ /*! @brief Read current value of the AIPS_PACRB_TP4 field. */ -#define BR_AIPS_PACRB_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP4)) +#define BR_AIPS_PACRB_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP4))) /*! @brief Format value for bitfield AIPS_PACRB_TP4. */ #define BF_AIPS_PACRB_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP4) & BM_AIPS_PACRB_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRB_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP4) = (v)) +#define BW_AIPS_PACRB_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP4), v)) /*@}*/ /*! @@ -1740,13 +1747,13 @@ #define BS_AIPS_PACRB_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP4. */ /*! @brief Read current value of the AIPS_PACRB_WP4 field. */ -#define BR_AIPS_PACRB_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP4)) +#define BR_AIPS_PACRB_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP4))) /*! @brief Format value for bitfield AIPS_PACRB_WP4. */ #define BF_AIPS_PACRB_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP4) & BM_AIPS_PACRB_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRB_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP4) = (v)) +#define BW_AIPS_PACRB_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP4), v)) /*@}*/ /*! @@ -1769,13 +1776,13 @@ #define BS_AIPS_PACRB_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP4. */ /*! @brief Read current value of the AIPS_PACRB_SP4 field. */ -#define BR_AIPS_PACRB_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP4)) +#define BR_AIPS_PACRB_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP4))) /*! @brief Format value for bitfield AIPS_PACRB_SP4. */ #define BF_AIPS_PACRB_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP4) & BM_AIPS_PACRB_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRB_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP4) = (v)) +#define BW_AIPS_PACRB_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP4), v)) /*@}*/ /*! @@ -1795,13 +1802,13 @@ #define BS_AIPS_PACRB_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP3. */ /*! @brief Read current value of the AIPS_PACRB_TP3 field. */ -#define BR_AIPS_PACRB_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP3)) +#define BR_AIPS_PACRB_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP3))) /*! @brief Format value for bitfield AIPS_PACRB_TP3. */ #define BF_AIPS_PACRB_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP3) & BM_AIPS_PACRB_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRB_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP3) = (v)) +#define BW_AIPS_PACRB_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP3), v)) /*@}*/ /*! @@ -1821,13 +1828,13 @@ #define BS_AIPS_PACRB_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP3. */ /*! @brief Read current value of the AIPS_PACRB_WP3 field. */ -#define BR_AIPS_PACRB_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP3)) +#define BR_AIPS_PACRB_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP3))) /*! @brief Format value for bitfield AIPS_PACRB_WP3. */ #define BF_AIPS_PACRB_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP3) & BM_AIPS_PACRB_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRB_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP3) = (v)) +#define BW_AIPS_PACRB_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP3), v)) /*@}*/ /*! @@ -1850,13 +1857,13 @@ #define BS_AIPS_PACRB_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP3. */ /*! @brief Read current value of the AIPS_PACRB_SP3 field. */ -#define BR_AIPS_PACRB_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP3)) +#define BR_AIPS_PACRB_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP3))) /*! @brief Format value for bitfield AIPS_PACRB_SP3. */ #define BF_AIPS_PACRB_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP3) & BM_AIPS_PACRB_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRB_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP3) = (v)) +#define BW_AIPS_PACRB_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP3), v)) /*@}*/ /*! @@ -1876,13 +1883,13 @@ #define BS_AIPS_PACRB_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP2. */ /*! @brief Read current value of the AIPS_PACRB_TP2 field. */ -#define BR_AIPS_PACRB_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP2)) +#define BR_AIPS_PACRB_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP2))) /*! @brief Format value for bitfield AIPS_PACRB_TP2. */ #define BF_AIPS_PACRB_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP2) & BM_AIPS_PACRB_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRB_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP2) = (v)) +#define BW_AIPS_PACRB_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP2), v)) /*@}*/ /*! @@ -1902,13 +1909,13 @@ #define BS_AIPS_PACRB_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP2. */ /*! @brief Read current value of the AIPS_PACRB_WP2 field. */ -#define BR_AIPS_PACRB_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP2)) +#define BR_AIPS_PACRB_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP2))) /*! @brief Format value for bitfield AIPS_PACRB_WP2. */ #define BF_AIPS_PACRB_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP2) & BM_AIPS_PACRB_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRB_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP2) = (v)) +#define BW_AIPS_PACRB_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP2), v)) /*@}*/ /*! @@ -1931,13 +1938,13 @@ #define BS_AIPS_PACRB_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP2. */ /*! @brief Read current value of the AIPS_PACRB_SP2 field. */ -#define BR_AIPS_PACRB_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP2)) +#define BR_AIPS_PACRB_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP2))) /*! @brief Format value for bitfield AIPS_PACRB_SP2. */ #define BF_AIPS_PACRB_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP2) & BM_AIPS_PACRB_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRB_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP2) = (v)) +#define BW_AIPS_PACRB_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP2), v)) /*@}*/ /*! @@ -1957,13 +1964,13 @@ #define BS_AIPS_PACRB_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP1. */ /*! @brief Read current value of the AIPS_PACRB_TP1 field. */ -#define BR_AIPS_PACRB_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP1)) +#define BR_AIPS_PACRB_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP1))) /*! @brief Format value for bitfield AIPS_PACRB_TP1. */ #define BF_AIPS_PACRB_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP1) & BM_AIPS_PACRB_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRB_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP1) = (v)) +#define BW_AIPS_PACRB_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP1), v)) /*@}*/ /*! @@ -1983,13 +1990,13 @@ #define BS_AIPS_PACRB_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP1. */ /*! @brief Read current value of the AIPS_PACRB_WP1 field. */ -#define BR_AIPS_PACRB_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP1)) +#define BR_AIPS_PACRB_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP1))) /*! @brief Format value for bitfield AIPS_PACRB_WP1. */ #define BF_AIPS_PACRB_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP1) & BM_AIPS_PACRB_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRB_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP1) = (v)) +#define BW_AIPS_PACRB_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP1), v)) /*@}*/ /*! @@ -2012,13 +2019,13 @@ #define BS_AIPS_PACRB_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP1. */ /*! @brief Read current value of the AIPS_PACRB_SP1 field. */ -#define BR_AIPS_PACRB_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP1)) +#define BR_AIPS_PACRB_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP1))) /*! @brief Format value for bitfield AIPS_PACRB_SP1. */ #define BF_AIPS_PACRB_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP1) & BM_AIPS_PACRB_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRB_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP1) = (v)) +#define BW_AIPS_PACRB_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP1), v)) /*@}*/ /*! @@ -2038,13 +2045,13 @@ #define BS_AIPS_PACRB_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP0. */ /*! @brief Read current value of the AIPS_PACRB_TP0 field. */ -#define BR_AIPS_PACRB_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP0)) +#define BR_AIPS_PACRB_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP0))) /*! @brief Format value for bitfield AIPS_PACRB_TP0. */ #define BF_AIPS_PACRB_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP0) & BM_AIPS_PACRB_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRB_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP0) = (v)) +#define BW_AIPS_PACRB_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP0), v)) /*@}*/ /*! @@ -2064,13 +2071,13 @@ #define BS_AIPS_PACRB_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP0. */ /*! @brief Read current value of the AIPS_PACRB_WP0 field. */ -#define BR_AIPS_PACRB_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP0)) +#define BR_AIPS_PACRB_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP0))) /*! @brief Format value for bitfield AIPS_PACRB_WP0. */ #define BF_AIPS_PACRB_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP0) & BM_AIPS_PACRB_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRB_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP0) = (v)) +#define BW_AIPS_PACRB_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP0), v)) /*@}*/ /*! @@ -2093,13 +2100,13 @@ #define BS_AIPS_PACRB_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP0. */ /*! @brief Read current value of the AIPS_PACRB_SP0 field. */ -#define BR_AIPS_PACRB_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP0)) +#define BR_AIPS_PACRB_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP0))) /*! @brief Format value for bitfield AIPS_PACRB_SP0. */ #define BF_AIPS_PACRB_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP0) & BM_AIPS_PACRB_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRB_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP0) = (v)) +#define BW_AIPS_PACRB_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP0), v)) /*@}*/ /******************************************************************************* @@ -2186,8 +2193,8 @@ #define HW_AIPS_PACRC_ADDR(x) ((x) + 0x28U) #define HW_AIPS_PACRC(x) (*(__IO hw_aips_pacrc_t *) HW_AIPS_PACRC_ADDR(x)) -#define HW_AIPS_PACRC_RD(x) (HW_AIPS_PACRC(x).U) -#define HW_AIPS_PACRC_WR(x, v) (HW_AIPS_PACRC(x).U = (v)) +#define HW_AIPS_PACRC_RD(x) (ADDRESS_READ(hw_aips_pacrc_t, HW_AIPS_PACRC_ADDR(x))) +#define HW_AIPS_PACRC_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrc_t, HW_AIPS_PACRC_ADDR(x), v)) #define HW_AIPS_PACRC_SET(x, v) (HW_AIPS_PACRC_WR(x, HW_AIPS_PACRC_RD(x) | (v))) #define HW_AIPS_PACRC_CLR(x, v) (HW_AIPS_PACRC_WR(x, HW_AIPS_PACRC_RD(x) & ~(v))) #define HW_AIPS_PACRC_TOG(x, v) (HW_AIPS_PACRC_WR(x, HW_AIPS_PACRC_RD(x) ^ (v))) @@ -2214,13 +2221,13 @@ #define BS_AIPS_PACRC_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP7. */ /*! @brief Read current value of the AIPS_PACRC_TP7 field. */ -#define BR_AIPS_PACRC_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP7)) +#define BR_AIPS_PACRC_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP7))) /*! @brief Format value for bitfield AIPS_PACRC_TP7. */ #define BF_AIPS_PACRC_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP7) & BM_AIPS_PACRC_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRC_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP7) = (v)) +#define BW_AIPS_PACRC_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP7), v)) /*@}*/ /*! @@ -2240,13 +2247,13 @@ #define BS_AIPS_PACRC_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP7. */ /*! @brief Read current value of the AIPS_PACRC_WP7 field. */ -#define BR_AIPS_PACRC_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP7)) +#define BR_AIPS_PACRC_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP7))) /*! @brief Format value for bitfield AIPS_PACRC_WP7. */ #define BF_AIPS_PACRC_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP7) & BM_AIPS_PACRC_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRC_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP7) = (v)) +#define BW_AIPS_PACRC_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP7), v)) /*@}*/ /*! @@ -2269,13 +2276,13 @@ #define BS_AIPS_PACRC_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP7. */ /*! @brief Read current value of the AIPS_PACRC_SP7 field. */ -#define BR_AIPS_PACRC_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP7)) +#define BR_AIPS_PACRC_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP7))) /*! @brief Format value for bitfield AIPS_PACRC_SP7. */ #define BF_AIPS_PACRC_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP7) & BM_AIPS_PACRC_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRC_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP7) = (v)) +#define BW_AIPS_PACRC_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP7), v)) /*@}*/ /*! @@ -2295,13 +2302,13 @@ #define BS_AIPS_PACRC_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP6. */ /*! @brief Read current value of the AIPS_PACRC_TP6 field. */ -#define BR_AIPS_PACRC_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP6)) +#define BR_AIPS_PACRC_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP6))) /*! @brief Format value for bitfield AIPS_PACRC_TP6. */ #define BF_AIPS_PACRC_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP6) & BM_AIPS_PACRC_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRC_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP6) = (v)) +#define BW_AIPS_PACRC_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP6), v)) /*@}*/ /*! @@ -2321,13 +2328,13 @@ #define BS_AIPS_PACRC_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP6. */ /*! @brief Read current value of the AIPS_PACRC_WP6 field. */ -#define BR_AIPS_PACRC_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP6)) +#define BR_AIPS_PACRC_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP6))) /*! @brief Format value for bitfield AIPS_PACRC_WP6. */ #define BF_AIPS_PACRC_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP6) & BM_AIPS_PACRC_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRC_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP6) = (v)) +#define BW_AIPS_PACRC_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP6), v)) /*@}*/ /*! @@ -2350,13 +2357,13 @@ #define BS_AIPS_PACRC_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP6. */ /*! @brief Read current value of the AIPS_PACRC_SP6 field. */ -#define BR_AIPS_PACRC_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP6)) +#define BR_AIPS_PACRC_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP6))) /*! @brief Format value for bitfield AIPS_PACRC_SP6. */ #define BF_AIPS_PACRC_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP6) & BM_AIPS_PACRC_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRC_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP6) = (v)) +#define BW_AIPS_PACRC_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP6), v)) /*@}*/ /*! @@ -2376,13 +2383,13 @@ #define BS_AIPS_PACRC_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP5. */ /*! @brief Read current value of the AIPS_PACRC_TP5 field. */ -#define BR_AIPS_PACRC_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP5)) +#define BR_AIPS_PACRC_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP5))) /*! @brief Format value for bitfield AIPS_PACRC_TP5. */ #define BF_AIPS_PACRC_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP5) & BM_AIPS_PACRC_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRC_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP5) = (v)) +#define BW_AIPS_PACRC_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP5), v)) /*@}*/ /*! @@ -2402,13 +2409,13 @@ #define BS_AIPS_PACRC_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP5. */ /*! @brief Read current value of the AIPS_PACRC_WP5 field. */ -#define BR_AIPS_PACRC_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP5)) +#define BR_AIPS_PACRC_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP5))) /*! @brief Format value for bitfield AIPS_PACRC_WP5. */ #define BF_AIPS_PACRC_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP5) & BM_AIPS_PACRC_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRC_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP5) = (v)) +#define BW_AIPS_PACRC_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP5), v)) /*@}*/ /*! @@ -2431,13 +2438,13 @@ #define BS_AIPS_PACRC_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP5. */ /*! @brief Read current value of the AIPS_PACRC_SP5 field. */ -#define BR_AIPS_PACRC_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP5)) +#define BR_AIPS_PACRC_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP5))) /*! @brief Format value for bitfield AIPS_PACRC_SP5. */ #define BF_AIPS_PACRC_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP5) & BM_AIPS_PACRC_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRC_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP5) = (v)) +#define BW_AIPS_PACRC_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP5), v)) /*@}*/ /*! @@ -2457,13 +2464,13 @@ #define BS_AIPS_PACRC_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP4. */ /*! @brief Read current value of the AIPS_PACRC_TP4 field. */ -#define BR_AIPS_PACRC_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP4)) +#define BR_AIPS_PACRC_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP4))) /*! @brief Format value for bitfield AIPS_PACRC_TP4. */ #define BF_AIPS_PACRC_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP4) & BM_AIPS_PACRC_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRC_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP4) = (v)) +#define BW_AIPS_PACRC_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP4), v)) /*@}*/ /*! @@ -2483,13 +2490,13 @@ #define BS_AIPS_PACRC_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP4. */ /*! @brief Read current value of the AIPS_PACRC_WP4 field. */ -#define BR_AIPS_PACRC_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP4)) +#define BR_AIPS_PACRC_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP4))) /*! @brief Format value for bitfield AIPS_PACRC_WP4. */ #define BF_AIPS_PACRC_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP4) & BM_AIPS_PACRC_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRC_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP4) = (v)) +#define BW_AIPS_PACRC_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP4), v)) /*@}*/ /*! @@ -2512,13 +2519,13 @@ #define BS_AIPS_PACRC_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP4. */ /*! @brief Read current value of the AIPS_PACRC_SP4 field. */ -#define BR_AIPS_PACRC_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP4)) +#define BR_AIPS_PACRC_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP4))) /*! @brief Format value for bitfield AIPS_PACRC_SP4. */ #define BF_AIPS_PACRC_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP4) & BM_AIPS_PACRC_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRC_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP4) = (v)) +#define BW_AIPS_PACRC_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP4), v)) /*@}*/ /*! @@ -2538,13 +2545,13 @@ #define BS_AIPS_PACRC_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP3. */ /*! @brief Read current value of the AIPS_PACRC_TP3 field. */ -#define BR_AIPS_PACRC_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP3)) +#define BR_AIPS_PACRC_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP3))) /*! @brief Format value for bitfield AIPS_PACRC_TP3. */ #define BF_AIPS_PACRC_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP3) & BM_AIPS_PACRC_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRC_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP3) = (v)) +#define BW_AIPS_PACRC_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP3), v)) /*@}*/ /*! @@ -2564,13 +2571,13 @@ #define BS_AIPS_PACRC_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP3. */ /*! @brief Read current value of the AIPS_PACRC_WP3 field. */ -#define BR_AIPS_PACRC_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP3)) +#define BR_AIPS_PACRC_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP3))) /*! @brief Format value for bitfield AIPS_PACRC_WP3. */ #define BF_AIPS_PACRC_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP3) & BM_AIPS_PACRC_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRC_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP3) = (v)) +#define BW_AIPS_PACRC_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP3), v)) /*@}*/ /*! @@ -2593,13 +2600,13 @@ #define BS_AIPS_PACRC_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP3. */ /*! @brief Read current value of the AIPS_PACRC_SP3 field. */ -#define BR_AIPS_PACRC_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP3)) +#define BR_AIPS_PACRC_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP3))) /*! @brief Format value for bitfield AIPS_PACRC_SP3. */ #define BF_AIPS_PACRC_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP3) & BM_AIPS_PACRC_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRC_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP3) = (v)) +#define BW_AIPS_PACRC_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP3), v)) /*@}*/ /*! @@ -2619,13 +2626,13 @@ #define BS_AIPS_PACRC_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP2. */ /*! @brief Read current value of the AIPS_PACRC_TP2 field. */ -#define BR_AIPS_PACRC_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP2)) +#define BR_AIPS_PACRC_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP2))) /*! @brief Format value for bitfield AIPS_PACRC_TP2. */ #define BF_AIPS_PACRC_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP2) & BM_AIPS_PACRC_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRC_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP2) = (v)) +#define BW_AIPS_PACRC_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP2), v)) /*@}*/ /*! @@ -2645,13 +2652,13 @@ #define BS_AIPS_PACRC_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP2. */ /*! @brief Read current value of the AIPS_PACRC_WP2 field. */ -#define BR_AIPS_PACRC_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP2)) +#define BR_AIPS_PACRC_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP2))) /*! @brief Format value for bitfield AIPS_PACRC_WP2. */ #define BF_AIPS_PACRC_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP2) & BM_AIPS_PACRC_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRC_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP2) = (v)) +#define BW_AIPS_PACRC_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP2), v)) /*@}*/ /*! @@ -2674,13 +2681,13 @@ #define BS_AIPS_PACRC_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP2. */ /*! @brief Read current value of the AIPS_PACRC_SP2 field. */ -#define BR_AIPS_PACRC_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP2)) +#define BR_AIPS_PACRC_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP2))) /*! @brief Format value for bitfield AIPS_PACRC_SP2. */ #define BF_AIPS_PACRC_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP2) & BM_AIPS_PACRC_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRC_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP2) = (v)) +#define BW_AIPS_PACRC_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP2), v)) /*@}*/ /*! @@ -2700,13 +2707,13 @@ #define BS_AIPS_PACRC_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP1. */ /*! @brief Read current value of the AIPS_PACRC_TP1 field. */ -#define BR_AIPS_PACRC_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP1)) +#define BR_AIPS_PACRC_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP1))) /*! @brief Format value for bitfield AIPS_PACRC_TP1. */ #define BF_AIPS_PACRC_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP1) & BM_AIPS_PACRC_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRC_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP1) = (v)) +#define BW_AIPS_PACRC_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP1), v)) /*@}*/ /*! @@ -2726,13 +2733,13 @@ #define BS_AIPS_PACRC_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP1. */ /*! @brief Read current value of the AIPS_PACRC_WP1 field. */ -#define BR_AIPS_PACRC_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP1)) +#define BR_AIPS_PACRC_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP1))) /*! @brief Format value for bitfield AIPS_PACRC_WP1. */ #define BF_AIPS_PACRC_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP1) & BM_AIPS_PACRC_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRC_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP1) = (v)) +#define BW_AIPS_PACRC_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP1), v)) /*@}*/ /*! @@ -2755,13 +2762,13 @@ #define BS_AIPS_PACRC_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP1. */ /*! @brief Read current value of the AIPS_PACRC_SP1 field. */ -#define BR_AIPS_PACRC_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP1)) +#define BR_AIPS_PACRC_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP1))) /*! @brief Format value for bitfield AIPS_PACRC_SP1. */ #define BF_AIPS_PACRC_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP1) & BM_AIPS_PACRC_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRC_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP1) = (v)) +#define BW_AIPS_PACRC_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP1), v)) /*@}*/ /*! @@ -2781,13 +2788,13 @@ #define BS_AIPS_PACRC_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP0. */ /*! @brief Read current value of the AIPS_PACRC_TP0 field. */ -#define BR_AIPS_PACRC_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP0)) +#define BR_AIPS_PACRC_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP0))) /*! @brief Format value for bitfield AIPS_PACRC_TP0. */ #define BF_AIPS_PACRC_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP0) & BM_AIPS_PACRC_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRC_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP0) = (v)) +#define BW_AIPS_PACRC_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP0), v)) /*@}*/ /*! @@ -2807,13 +2814,13 @@ #define BS_AIPS_PACRC_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP0. */ /*! @brief Read current value of the AIPS_PACRC_WP0 field. */ -#define BR_AIPS_PACRC_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP0)) +#define BR_AIPS_PACRC_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP0))) /*! @brief Format value for bitfield AIPS_PACRC_WP0. */ #define BF_AIPS_PACRC_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP0) & BM_AIPS_PACRC_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRC_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP0) = (v)) +#define BW_AIPS_PACRC_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP0), v)) /*@}*/ /*! @@ -2836,13 +2843,13 @@ #define BS_AIPS_PACRC_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP0. */ /*! @brief Read current value of the AIPS_PACRC_SP0 field. */ -#define BR_AIPS_PACRC_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP0)) +#define BR_AIPS_PACRC_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP0))) /*! @brief Format value for bitfield AIPS_PACRC_SP0. */ #define BF_AIPS_PACRC_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP0) & BM_AIPS_PACRC_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRC_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP0) = (v)) +#define BW_AIPS_PACRC_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP0), v)) /*@}*/ /******************************************************************************* @@ -2929,8 +2936,8 @@ #define HW_AIPS_PACRD_ADDR(x) ((x) + 0x2CU) #define HW_AIPS_PACRD(x) (*(__IO hw_aips_pacrd_t *) HW_AIPS_PACRD_ADDR(x)) -#define HW_AIPS_PACRD_RD(x) (HW_AIPS_PACRD(x).U) -#define HW_AIPS_PACRD_WR(x, v) (HW_AIPS_PACRD(x).U = (v)) +#define HW_AIPS_PACRD_RD(x) (ADDRESS_READ(hw_aips_pacrd_t, HW_AIPS_PACRD_ADDR(x))) +#define HW_AIPS_PACRD_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrd_t, HW_AIPS_PACRD_ADDR(x), v)) #define HW_AIPS_PACRD_SET(x, v) (HW_AIPS_PACRD_WR(x, HW_AIPS_PACRD_RD(x) | (v))) #define HW_AIPS_PACRD_CLR(x, v) (HW_AIPS_PACRD_WR(x, HW_AIPS_PACRD_RD(x) & ~(v))) #define HW_AIPS_PACRD_TOG(x, v) (HW_AIPS_PACRD_WR(x, HW_AIPS_PACRD_RD(x) ^ (v))) @@ -2957,13 +2964,13 @@ #define BS_AIPS_PACRD_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP7. */ /*! @brief Read current value of the AIPS_PACRD_TP7 field. */ -#define BR_AIPS_PACRD_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP7)) +#define BR_AIPS_PACRD_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP7))) /*! @brief Format value for bitfield AIPS_PACRD_TP7. */ #define BF_AIPS_PACRD_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP7) & BM_AIPS_PACRD_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRD_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP7) = (v)) +#define BW_AIPS_PACRD_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP7), v)) /*@}*/ /*! @@ -2983,13 +2990,13 @@ #define BS_AIPS_PACRD_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP7. */ /*! @brief Read current value of the AIPS_PACRD_WP7 field. */ -#define BR_AIPS_PACRD_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP7)) +#define BR_AIPS_PACRD_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP7))) /*! @brief Format value for bitfield AIPS_PACRD_WP7. */ #define BF_AIPS_PACRD_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP7) & BM_AIPS_PACRD_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRD_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP7) = (v)) +#define BW_AIPS_PACRD_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP7), v)) /*@}*/ /*! @@ -3012,13 +3019,13 @@ #define BS_AIPS_PACRD_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP7. */ /*! @brief Read current value of the AIPS_PACRD_SP7 field. */ -#define BR_AIPS_PACRD_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP7)) +#define BR_AIPS_PACRD_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP7))) /*! @brief Format value for bitfield AIPS_PACRD_SP7. */ #define BF_AIPS_PACRD_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP7) & BM_AIPS_PACRD_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRD_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP7) = (v)) +#define BW_AIPS_PACRD_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP7), v)) /*@}*/ /*! @@ -3038,13 +3045,13 @@ #define BS_AIPS_PACRD_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP6. */ /*! @brief Read current value of the AIPS_PACRD_TP6 field. */ -#define BR_AIPS_PACRD_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP6)) +#define BR_AIPS_PACRD_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP6))) /*! @brief Format value for bitfield AIPS_PACRD_TP6. */ #define BF_AIPS_PACRD_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP6) & BM_AIPS_PACRD_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRD_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP6) = (v)) +#define BW_AIPS_PACRD_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP6), v)) /*@}*/ /*! @@ -3064,13 +3071,13 @@ #define BS_AIPS_PACRD_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP6. */ /*! @brief Read current value of the AIPS_PACRD_WP6 field. */ -#define BR_AIPS_PACRD_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP6)) +#define BR_AIPS_PACRD_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP6))) /*! @brief Format value for bitfield AIPS_PACRD_WP6. */ #define BF_AIPS_PACRD_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP6) & BM_AIPS_PACRD_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRD_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP6) = (v)) +#define BW_AIPS_PACRD_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP6), v)) /*@}*/ /*! @@ -3093,13 +3100,13 @@ #define BS_AIPS_PACRD_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP6. */ /*! @brief Read current value of the AIPS_PACRD_SP6 field. */ -#define BR_AIPS_PACRD_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP6)) +#define BR_AIPS_PACRD_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP6))) /*! @brief Format value for bitfield AIPS_PACRD_SP6. */ #define BF_AIPS_PACRD_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP6) & BM_AIPS_PACRD_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRD_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP6) = (v)) +#define BW_AIPS_PACRD_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP6), v)) /*@}*/ /*! @@ -3119,13 +3126,13 @@ #define BS_AIPS_PACRD_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP5. */ /*! @brief Read current value of the AIPS_PACRD_TP5 field. */ -#define BR_AIPS_PACRD_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP5)) +#define BR_AIPS_PACRD_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP5))) /*! @brief Format value for bitfield AIPS_PACRD_TP5. */ #define BF_AIPS_PACRD_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP5) & BM_AIPS_PACRD_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRD_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP5) = (v)) +#define BW_AIPS_PACRD_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP5), v)) /*@}*/ /*! @@ -3145,13 +3152,13 @@ #define BS_AIPS_PACRD_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP5. */ /*! @brief Read current value of the AIPS_PACRD_WP5 field. */ -#define BR_AIPS_PACRD_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP5)) +#define BR_AIPS_PACRD_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP5))) /*! @brief Format value for bitfield AIPS_PACRD_WP5. */ #define BF_AIPS_PACRD_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP5) & BM_AIPS_PACRD_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRD_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP5) = (v)) +#define BW_AIPS_PACRD_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP5), v)) /*@}*/ /*! @@ -3174,13 +3181,13 @@ #define BS_AIPS_PACRD_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP5. */ /*! @brief Read current value of the AIPS_PACRD_SP5 field. */ -#define BR_AIPS_PACRD_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP5)) +#define BR_AIPS_PACRD_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP5))) /*! @brief Format value for bitfield AIPS_PACRD_SP5. */ #define BF_AIPS_PACRD_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP5) & BM_AIPS_PACRD_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRD_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP5) = (v)) +#define BW_AIPS_PACRD_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP5), v)) /*@}*/ /*! @@ -3200,13 +3207,13 @@ #define BS_AIPS_PACRD_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP4. */ /*! @brief Read current value of the AIPS_PACRD_TP4 field. */ -#define BR_AIPS_PACRD_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP4)) +#define BR_AIPS_PACRD_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP4))) /*! @brief Format value for bitfield AIPS_PACRD_TP4. */ #define BF_AIPS_PACRD_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP4) & BM_AIPS_PACRD_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRD_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP4) = (v)) +#define BW_AIPS_PACRD_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP4), v)) /*@}*/ /*! @@ -3226,13 +3233,13 @@ #define BS_AIPS_PACRD_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP4. */ /*! @brief Read current value of the AIPS_PACRD_WP4 field. */ -#define BR_AIPS_PACRD_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP4)) +#define BR_AIPS_PACRD_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP4))) /*! @brief Format value for bitfield AIPS_PACRD_WP4. */ #define BF_AIPS_PACRD_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP4) & BM_AIPS_PACRD_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRD_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP4) = (v)) +#define BW_AIPS_PACRD_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP4), v)) /*@}*/ /*! @@ -3255,13 +3262,13 @@ #define BS_AIPS_PACRD_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP4. */ /*! @brief Read current value of the AIPS_PACRD_SP4 field. */ -#define BR_AIPS_PACRD_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP4)) +#define BR_AIPS_PACRD_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP4))) /*! @brief Format value for bitfield AIPS_PACRD_SP4. */ #define BF_AIPS_PACRD_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP4) & BM_AIPS_PACRD_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRD_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP4) = (v)) +#define BW_AIPS_PACRD_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP4), v)) /*@}*/ /*! @@ -3281,13 +3288,13 @@ #define BS_AIPS_PACRD_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP3. */ /*! @brief Read current value of the AIPS_PACRD_TP3 field. */ -#define BR_AIPS_PACRD_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP3)) +#define BR_AIPS_PACRD_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP3))) /*! @brief Format value for bitfield AIPS_PACRD_TP3. */ #define BF_AIPS_PACRD_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP3) & BM_AIPS_PACRD_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRD_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP3) = (v)) +#define BW_AIPS_PACRD_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP3), v)) /*@}*/ /*! @@ -3307,13 +3314,13 @@ #define BS_AIPS_PACRD_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP3. */ /*! @brief Read current value of the AIPS_PACRD_WP3 field. */ -#define BR_AIPS_PACRD_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP3)) +#define BR_AIPS_PACRD_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP3))) /*! @brief Format value for bitfield AIPS_PACRD_WP3. */ #define BF_AIPS_PACRD_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP3) & BM_AIPS_PACRD_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRD_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP3) = (v)) +#define BW_AIPS_PACRD_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP3), v)) /*@}*/ /*! @@ -3336,13 +3343,13 @@ #define BS_AIPS_PACRD_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP3. */ /*! @brief Read current value of the AIPS_PACRD_SP3 field. */ -#define BR_AIPS_PACRD_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP3)) +#define BR_AIPS_PACRD_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP3))) /*! @brief Format value for bitfield AIPS_PACRD_SP3. */ #define BF_AIPS_PACRD_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP3) & BM_AIPS_PACRD_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRD_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP3) = (v)) +#define BW_AIPS_PACRD_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP3), v)) /*@}*/ /*! @@ -3362,13 +3369,13 @@ #define BS_AIPS_PACRD_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP2. */ /*! @brief Read current value of the AIPS_PACRD_TP2 field. */ -#define BR_AIPS_PACRD_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP2)) +#define BR_AIPS_PACRD_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP2))) /*! @brief Format value for bitfield AIPS_PACRD_TP2. */ #define BF_AIPS_PACRD_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP2) & BM_AIPS_PACRD_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRD_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP2) = (v)) +#define BW_AIPS_PACRD_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP2), v)) /*@}*/ /*! @@ -3388,13 +3395,13 @@ #define BS_AIPS_PACRD_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP2. */ /*! @brief Read current value of the AIPS_PACRD_WP2 field. */ -#define BR_AIPS_PACRD_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP2)) +#define BR_AIPS_PACRD_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP2))) /*! @brief Format value for bitfield AIPS_PACRD_WP2. */ #define BF_AIPS_PACRD_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP2) & BM_AIPS_PACRD_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRD_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP2) = (v)) +#define BW_AIPS_PACRD_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP2), v)) /*@}*/ /*! @@ -3417,13 +3424,13 @@ #define BS_AIPS_PACRD_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP2. */ /*! @brief Read current value of the AIPS_PACRD_SP2 field. */ -#define BR_AIPS_PACRD_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP2)) +#define BR_AIPS_PACRD_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP2))) /*! @brief Format value for bitfield AIPS_PACRD_SP2. */ #define BF_AIPS_PACRD_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP2) & BM_AIPS_PACRD_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRD_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP2) = (v)) +#define BW_AIPS_PACRD_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP2), v)) /*@}*/ /*! @@ -3443,13 +3450,13 @@ #define BS_AIPS_PACRD_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP1. */ /*! @brief Read current value of the AIPS_PACRD_TP1 field. */ -#define BR_AIPS_PACRD_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP1)) +#define BR_AIPS_PACRD_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP1))) /*! @brief Format value for bitfield AIPS_PACRD_TP1. */ #define BF_AIPS_PACRD_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP1) & BM_AIPS_PACRD_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRD_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP1) = (v)) +#define BW_AIPS_PACRD_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP1), v)) /*@}*/ /*! @@ -3469,13 +3476,13 @@ #define BS_AIPS_PACRD_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP1. */ /*! @brief Read current value of the AIPS_PACRD_WP1 field. */ -#define BR_AIPS_PACRD_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP1)) +#define BR_AIPS_PACRD_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP1))) /*! @brief Format value for bitfield AIPS_PACRD_WP1. */ #define BF_AIPS_PACRD_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP1) & BM_AIPS_PACRD_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRD_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP1) = (v)) +#define BW_AIPS_PACRD_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP1), v)) /*@}*/ /*! @@ -3498,13 +3505,13 @@ #define BS_AIPS_PACRD_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP1. */ /*! @brief Read current value of the AIPS_PACRD_SP1 field. */ -#define BR_AIPS_PACRD_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP1)) +#define BR_AIPS_PACRD_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP1))) /*! @brief Format value for bitfield AIPS_PACRD_SP1. */ #define BF_AIPS_PACRD_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP1) & BM_AIPS_PACRD_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRD_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP1) = (v)) +#define BW_AIPS_PACRD_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP1), v)) /*@}*/ /*! @@ -3524,13 +3531,13 @@ #define BS_AIPS_PACRD_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP0. */ /*! @brief Read current value of the AIPS_PACRD_TP0 field. */ -#define BR_AIPS_PACRD_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP0)) +#define BR_AIPS_PACRD_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP0))) /*! @brief Format value for bitfield AIPS_PACRD_TP0. */ #define BF_AIPS_PACRD_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP0) & BM_AIPS_PACRD_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRD_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP0) = (v)) +#define BW_AIPS_PACRD_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP0), v)) /*@}*/ /*! @@ -3550,13 +3557,13 @@ #define BS_AIPS_PACRD_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP0. */ /*! @brief Read current value of the AIPS_PACRD_WP0 field. */ -#define BR_AIPS_PACRD_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP0)) +#define BR_AIPS_PACRD_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP0))) /*! @brief Format value for bitfield AIPS_PACRD_WP0. */ #define BF_AIPS_PACRD_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP0) & BM_AIPS_PACRD_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRD_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP0) = (v)) +#define BW_AIPS_PACRD_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP0), v)) /*@}*/ /*! @@ -3579,13 +3586,13 @@ #define BS_AIPS_PACRD_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP0. */ /*! @brief Read current value of the AIPS_PACRD_SP0 field. */ -#define BR_AIPS_PACRD_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP0)) +#define BR_AIPS_PACRD_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP0))) /*! @brief Format value for bitfield AIPS_PACRD_SP0. */ #define BF_AIPS_PACRD_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP0) & BM_AIPS_PACRD_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRD_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP0) = (v)) +#define BW_AIPS_PACRD_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP0), v)) /*@}*/ /******************************************************************************* @@ -3648,8 +3655,8 @@ #define HW_AIPS_PACRE_ADDR(x) ((x) + 0x40U) #define HW_AIPS_PACRE(x) (*(__IO hw_aips_pacre_t *) HW_AIPS_PACRE_ADDR(x)) -#define HW_AIPS_PACRE_RD(x) (HW_AIPS_PACRE(x).U) -#define HW_AIPS_PACRE_WR(x, v) (HW_AIPS_PACRE(x).U = (v)) +#define HW_AIPS_PACRE_RD(x) (ADDRESS_READ(hw_aips_pacre_t, HW_AIPS_PACRE_ADDR(x))) +#define HW_AIPS_PACRE_WR(x, v) (ADDRESS_WRITE(hw_aips_pacre_t, HW_AIPS_PACRE_ADDR(x), v)) #define HW_AIPS_PACRE_SET(x, v) (HW_AIPS_PACRE_WR(x, HW_AIPS_PACRE_RD(x) | (v))) #define HW_AIPS_PACRE_CLR(x, v) (HW_AIPS_PACRE_WR(x, HW_AIPS_PACRE_RD(x) & ~(v))) #define HW_AIPS_PACRE_TOG(x, v) (HW_AIPS_PACRE_WR(x, HW_AIPS_PACRE_RD(x) ^ (v))) @@ -3676,13 +3683,13 @@ #define BS_AIPS_PACRE_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP7. */ /*! @brief Read current value of the AIPS_PACRE_TP7 field. */ -#define BR_AIPS_PACRE_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP7)) +#define BR_AIPS_PACRE_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP7))) /*! @brief Format value for bitfield AIPS_PACRE_TP7. */ #define BF_AIPS_PACRE_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP7) & BM_AIPS_PACRE_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRE_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP7) = (v)) +#define BW_AIPS_PACRE_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP7), v)) /*@}*/ /*! @@ -3702,13 +3709,13 @@ #define BS_AIPS_PACRE_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP7. */ /*! @brief Read current value of the AIPS_PACRE_WP7 field. */ -#define BR_AIPS_PACRE_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP7)) +#define BR_AIPS_PACRE_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP7))) /*! @brief Format value for bitfield AIPS_PACRE_WP7. */ #define BF_AIPS_PACRE_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP7) & BM_AIPS_PACRE_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRE_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP7) = (v)) +#define BW_AIPS_PACRE_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP7), v)) /*@}*/ /*! @@ -3731,13 +3738,13 @@ #define BS_AIPS_PACRE_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP7. */ /*! @brief Read current value of the AIPS_PACRE_SP7 field. */ -#define BR_AIPS_PACRE_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP7)) +#define BR_AIPS_PACRE_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP7))) /*! @brief Format value for bitfield AIPS_PACRE_SP7. */ #define BF_AIPS_PACRE_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP7) & BM_AIPS_PACRE_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRE_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP7) = (v)) +#define BW_AIPS_PACRE_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP7), v)) /*@}*/ /*! @@ -3757,13 +3764,13 @@ #define BS_AIPS_PACRE_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP6. */ /*! @brief Read current value of the AIPS_PACRE_TP6 field. */ -#define BR_AIPS_PACRE_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP6)) +#define BR_AIPS_PACRE_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP6))) /*! @brief Format value for bitfield AIPS_PACRE_TP6. */ #define BF_AIPS_PACRE_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP6) & BM_AIPS_PACRE_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRE_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP6) = (v)) +#define BW_AIPS_PACRE_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP6), v)) /*@}*/ /*! @@ -3783,13 +3790,13 @@ #define BS_AIPS_PACRE_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP6. */ /*! @brief Read current value of the AIPS_PACRE_WP6 field. */ -#define BR_AIPS_PACRE_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP6)) +#define BR_AIPS_PACRE_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP6))) /*! @brief Format value for bitfield AIPS_PACRE_WP6. */ #define BF_AIPS_PACRE_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP6) & BM_AIPS_PACRE_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRE_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP6) = (v)) +#define BW_AIPS_PACRE_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP6), v)) /*@}*/ /*! @@ -3812,13 +3819,13 @@ #define BS_AIPS_PACRE_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP6. */ /*! @brief Read current value of the AIPS_PACRE_SP6 field. */ -#define BR_AIPS_PACRE_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP6)) +#define BR_AIPS_PACRE_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP6))) /*! @brief Format value for bitfield AIPS_PACRE_SP6. */ #define BF_AIPS_PACRE_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP6) & BM_AIPS_PACRE_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRE_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP6) = (v)) +#define BW_AIPS_PACRE_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP6), v)) /*@}*/ /*! @@ -3838,13 +3845,13 @@ #define BS_AIPS_PACRE_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP5. */ /*! @brief Read current value of the AIPS_PACRE_TP5 field. */ -#define BR_AIPS_PACRE_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP5)) +#define BR_AIPS_PACRE_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP5))) /*! @brief Format value for bitfield AIPS_PACRE_TP5. */ #define BF_AIPS_PACRE_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP5) & BM_AIPS_PACRE_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRE_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP5) = (v)) +#define BW_AIPS_PACRE_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP5), v)) /*@}*/ /*! @@ -3864,13 +3871,13 @@ #define BS_AIPS_PACRE_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP5. */ /*! @brief Read current value of the AIPS_PACRE_WP5 field. */ -#define BR_AIPS_PACRE_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP5)) +#define BR_AIPS_PACRE_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP5))) /*! @brief Format value for bitfield AIPS_PACRE_WP5. */ #define BF_AIPS_PACRE_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP5) & BM_AIPS_PACRE_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRE_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP5) = (v)) +#define BW_AIPS_PACRE_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP5), v)) /*@}*/ /*! @@ -3893,13 +3900,13 @@ #define BS_AIPS_PACRE_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP5. */ /*! @brief Read current value of the AIPS_PACRE_SP5 field. */ -#define BR_AIPS_PACRE_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP5)) +#define BR_AIPS_PACRE_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP5))) /*! @brief Format value for bitfield AIPS_PACRE_SP5. */ #define BF_AIPS_PACRE_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP5) & BM_AIPS_PACRE_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRE_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP5) = (v)) +#define BW_AIPS_PACRE_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP5), v)) /*@}*/ /*! @@ -3919,13 +3926,13 @@ #define BS_AIPS_PACRE_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP4. */ /*! @brief Read current value of the AIPS_PACRE_TP4 field. */ -#define BR_AIPS_PACRE_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP4)) +#define BR_AIPS_PACRE_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP4))) /*! @brief Format value for bitfield AIPS_PACRE_TP4. */ #define BF_AIPS_PACRE_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP4) & BM_AIPS_PACRE_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRE_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP4) = (v)) +#define BW_AIPS_PACRE_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP4), v)) /*@}*/ /*! @@ -3945,13 +3952,13 @@ #define BS_AIPS_PACRE_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP4. */ /*! @brief Read current value of the AIPS_PACRE_WP4 field. */ -#define BR_AIPS_PACRE_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP4)) +#define BR_AIPS_PACRE_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP4))) /*! @brief Format value for bitfield AIPS_PACRE_WP4. */ #define BF_AIPS_PACRE_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP4) & BM_AIPS_PACRE_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRE_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP4) = (v)) +#define BW_AIPS_PACRE_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP4), v)) /*@}*/ /*! @@ -3974,13 +3981,13 @@ #define BS_AIPS_PACRE_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP4. */ /*! @brief Read current value of the AIPS_PACRE_SP4 field. */ -#define BR_AIPS_PACRE_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP4)) +#define BR_AIPS_PACRE_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP4))) /*! @brief Format value for bitfield AIPS_PACRE_SP4. */ #define BF_AIPS_PACRE_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP4) & BM_AIPS_PACRE_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRE_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP4) = (v)) +#define BW_AIPS_PACRE_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP4), v)) /*@}*/ /*! @@ -4000,13 +4007,13 @@ #define BS_AIPS_PACRE_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP3. */ /*! @brief Read current value of the AIPS_PACRE_TP3 field. */ -#define BR_AIPS_PACRE_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP3)) +#define BR_AIPS_PACRE_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP3))) /*! @brief Format value for bitfield AIPS_PACRE_TP3. */ #define BF_AIPS_PACRE_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP3) & BM_AIPS_PACRE_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRE_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP3) = (v)) +#define BW_AIPS_PACRE_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP3), v)) /*@}*/ /*! @@ -4026,13 +4033,13 @@ #define BS_AIPS_PACRE_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP3. */ /*! @brief Read current value of the AIPS_PACRE_WP3 field. */ -#define BR_AIPS_PACRE_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP3)) +#define BR_AIPS_PACRE_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP3))) /*! @brief Format value for bitfield AIPS_PACRE_WP3. */ #define BF_AIPS_PACRE_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP3) & BM_AIPS_PACRE_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRE_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP3) = (v)) +#define BW_AIPS_PACRE_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP3), v)) /*@}*/ /*! @@ -4055,13 +4062,13 @@ #define BS_AIPS_PACRE_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP3. */ /*! @brief Read current value of the AIPS_PACRE_SP3 field. */ -#define BR_AIPS_PACRE_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP3)) +#define BR_AIPS_PACRE_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP3))) /*! @brief Format value for bitfield AIPS_PACRE_SP3. */ #define BF_AIPS_PACRE_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP3) & BM_AIPS_PACRE_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRE_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP3) = (v)) +#define BW_AIPS_PACRE_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP3), v)) /*@}*/ /*! @@ -4081,13 +4088,13 @@ #define BS_AIPS_PACRE_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP2. */ /*! @brief Read current value of the AIPS_PACRE_TP2 field. */ -#define BR_AIPS_PACRE_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP2)) +#define BR_AIPS_PACRE_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP2))) /*! @brief Format value for bitfield AIPS_PACRE_TP2. */ #define BF_AIPS_PACRE_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP2) & BM_AIPS_PACRE_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRE_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP2) = (v)) +#define BW_AIPS_PACRE_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP2), v)) /*@}*/ /*! @@ -4107,13 +4114,13 @@ #define BS_AIPS_PACRE_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP2. */ /*! @brief Read current value of the AIPS_PACRE_WP2 field. */ -#define BR_AIPS_PACRE_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP2)) +#define BR_AIPS_PACRE_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP2))) /*! @brief Format value for bitfield AIPS_PACRE_WP2. */ #define BF_AIPS_PACRE_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP2) & BM_AIPS_PACRE_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRE_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP2) = (v)) +#define BW_AIPS_PACRE_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP2), v)) /*@}*/ /*! @@ -4136,13 +4143,13 @@ #define BS_AIPS_PACRE_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP2. */ /*! @brief Read current value of the AIPS_PACRE_SP2 field. */ -#define BR_AIPS_PACRE_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP2)) +#define BR_AIPS_PACRE_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP2))) /*! @brief Format value for bitfield AIPS_PACRE_SP2. */ #define BF_AIPS_PACRE_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP2) & BM_AIPS_PACRE_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRE_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP2) = (v)) +#define BW_AIPS_PACRE_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP2), v)) /*@}*/ /*! @@ -4162,13 +4169,13 @@ #define BS_AIPS_PACRE_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP1. */ /*! @brief Read current value of the AIPS_PACRE_TP1 field. */ -#define BR_AIPS_PACRE_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP1)) +#define BR_AIPS_PACRE_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP1))) /*! @brief Format value for bitfield AIPS_PACRE_TP1. */ #define BF_AIPS_PACRE_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP1) & BM_AIPS_PACRE_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRE_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP1) = (v)) +#define BW_AIPS_PACRE_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP1), v)) /*@}*/ /*! @@ -4188,13 +4195,13 @@ #define BS_AIPS_PACRE_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP1. */ /*! @brief Read current value of the AIPS_PACRE_WP1 field. */ -#define BR_AIPS_PACRE_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP1)) +#define BR_AIPS_PACRE_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP1))) /*! @brief Format value for bitfield AIPS_PACRE_WP1. */ #define BF_AIPS_PACRE_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP1) & BM_AIPS_PACRE_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRE_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP1) = (v)) +#define BW_AIPS_PACRE_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP1), v)) /*@}*/ /*! @@ -4217,13 +4224,13 @@ #define BS_AIPS_PACRE_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP1. */ /*! @brief Read current value of the AIPS_PACRE_SP1 field. */ -#define BR_AIPS_PACRE_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP1)) +#define BR_AIPS_PACRE_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP1))) /*! @brief Format value for bitfield AIPS_PACRE_SP1. */ #define BF_AIPS_PACRE_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP1) & BM_AIPS_PACRE_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRE_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP1) = (v)) +#define BW_AIPS_PACRE_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP1), v)) /*@}*/ /*! @@ -4243,13 +4250,13 @@ #define BS_AIPS_PACRE_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP0. */ /*! @brief Read current value of the AIPS_PACRE_TP0 field. */ -#define BR_AIPS_PACRE_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP0)) +#define BR_AIPS_PACRE_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP0))) /*! @brief Format value for bitfield AIPS_PACRE_TP0. */ #define BF_AIPS_PACRE_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP0) & BM_AIPS_PACRE_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRE_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP0) = (v)) +#define BW_AIPS_PACRE_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP0), v)) /*@}*/ /*! @@ -4269,13 +4276,13 @@ #define BS_AIPS_PACRE_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP0. */ /*! @brief Read current value of the AIPS_PACRE_WP0 field. */ -#define BR_AIPS_PACRE_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP0)) +#define BR_AIPS_PACRE_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP0))) /*! @brief Format value for bitfield AIPS_PACRE_WP0. */ #define BF_AIPS_PACRE_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP0) & BM_AIPS_PACRE_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRE_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP0) = (v)) +#define BW_AIPS_PACRE_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP0), v)) /*@}*/ /*! @@ -4298,13 +4305,13 @@ #define BS_AIPS_PACRE_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP0. */ /*! @brief Read current value of the AIPS_PACRE_SP0 field. */ -#define BR_AIPS_PACRE_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP0)) +#define BR_AIPS_PACRE_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP0))) /*! @brief Format value for bitfield AIPS_PACRE_SP0. */ #define BF_AIPS_PACRE_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP0) & BM_AIPS_PACRE_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRE_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP0) = (v)) +#define BW_AIPS_PACRE_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP0), v)) /*@}*/ /******************************************************************************* @@ -4367,8 +4374,8 @@ #define HW_AIPS_PACRF_ADDR(x) ((x) + 0x44U) #define HW_AIPS_PACRF(x) (*(__IO hw_aips_pacrf_t *) HW_AIPS_PACRF_ADDR(x)) -#define HW_AIPS_PACRF_RD(x) (HW_AIPS_PACRF(x).U) -#define HW_AIPS_PACRF_WR(x, v) (HW_AIPS_PACRF(x).U = (v)) +#define HW_AIPS_PACRF_RD(x) (ADDRESS_READ(hw_aips_pacrf_t, HW_AIPS_PACRF_ADDR(x))) +#define HW_AIPS_PACRF_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrf_t, HW_AIPS_PACRF_ADDR(x), v)) #define HW_AIPS_PACRF_SET(x, v) (HW_AIPS_PACRF_WR(x, HW_AIPS_PACRF_RD(x) | (v))) #define HW_AIPS_PACRF_CLR(x, v) (HW_AIPS_PACRF_WR(x, HW_AIPS_PACRF_RD(x) & ~(v))) #define HW_AIPS_PACRF_TOG(x, v) (HW_AIPS_PACRF_WR(x, HW_AIPS_PACRF_RD(x) ^ (v))) @@ -4395,13 +4402,13 @@ #define BS_AIPS_PACRF_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP7. */ /*! @brief Read current value of the AIPS_PACRF_TP7 field. */ -#define BR_AIPS_PACRF_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP7)) +#define BR_AIPS_PACRF_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP7))) /*! @brief Format value for bitfield AIPS_PACRF_TP7. */ #define BF_AIPS_PACRF_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP7) & BM_AIPS_PACRF_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRF_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP7) = (v)) +#define BW_AIPS_PACRF_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP7), v)) /*@}*/ /*! @@ -4421,13 +4428,13 @@ #define BS_AIPS_PACRF_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP7. */ /*! @brief Read current value of the AIPS_PACRF_WP7 field. */ -#define BR_AIPS_PACRF_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP7)) +#define BR_AIPS_PACRF_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP7))) /*! @brief Format value for bitfield AIPS_PACRF_WP7. */ #define BF_AIPS_PACRF_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP7) & BM_AIPS_PACRF_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRF_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP7) = (v)) +#define BW_AIPS_PACRF_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP7), v)) /*@}*/ /*! @@ -4450,13 +4457,13 @@ #define BS_AIPS_PACRF_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP7. */ /*! @brief Read current value of the AIPS_PACRF_SP7 field. */ -#define BR_AIPS_PACRF_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP7)) +#define BR_AIPS_PACRF_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP7))) /*! @brief Format value for bitfield AIPS_PACRF_SP7. */ #define BF_AIPS_PACRF_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP7) & BM_AIPS_PACRF_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRF_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP7) = (v)) +#define BW_AIPS_PACRF_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP7), v)) /*@}*/ /*! @@ -4476,13 +4483,13 @@ #define BS_AIPS_PACRF_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP6. */ /*! @brief Read current value of the AIPS_PACRF_TP6 field. */ -#define BR_AIPS_PACRF_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP6)) +#define BR_AIPS_PACRF_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP6))) /*! @brief Format value for bitfield AIPS_PACRF_TP6. */ #define BF_AIPS_PACRF_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP6) & BM_AIPS_PACRF_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRF_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP6) = (v)) +#define BW_AIPS_PACRF_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP6), v)) /*@}*/ /*! @@ -4502,13 +4509,13 @@ #define BS_AIPS_PACRF_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP6. */ /*! @brief Read current value of the AIPS_PACRF_WP6 field. */ -#define BR_AIPS_PACRF_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP6)) +#define BR_AIPS_PACRF_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP6))) /*! @brief Format value for bitfield AIPS_PACRF_WP6. */ #define BF_AIPS_PACRF_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP6) & BM_AIPS_PACRF_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRF_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP6) = (v)) +#define BW_AIPS_PACRF_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP6), v)) /*@}*/ /*! @@ -4531,13 +4538,13 @@ #define BS_AIPS_PACRF_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP6. */ /*! @brief Read current value of the AIPS_PACRF_SP6 field. */ -#define BR_AIPS_PACRF_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP6)) +#define BR_AIPS_PACRF_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP6))) /*! @brief Format value for bitfield AIPS_PACRF_SP6. */ #define BF_AIPS_PACRF_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP6) & BM_AIPS_PACRF_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRF_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP6) = (v)) +#define BW_AIPS_PACRF_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP6), v)) /*@}*/ /*! @@ -4557,13 +4564,13 @@ #define BS_AIPS_PACRF_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP5. */ /*! @brief Read current value of the AIPS_PACRF_TP5 field. */ -#define BR_AIPS_PACRF_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP5)) +#define BR_AIPS_PACRF_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP5))) /*! @brief Format value for bitfield AIPS_PACRF_TP5. */ #define BF_AIPS_PACRF_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP5) & BM_AIPS_PACRF_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRF_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP5) = (v)) +#define BW_AIPS_PACRF_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP5), v)) /*@}*/ /*! @@ -4583,13 +4590,13 @@ #define BS_AIPS_PACRF_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP5. */ /*! @brief Read current value of the AIPS_PACRF_WP5 field. */ -#define BR_AIPS_PACRF_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP5)) +#define BR_AIPS_PACRF_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP5))) /*! @brief Format value for bitfield AIPS_PACRF_WP5. */ #define BF_AIPS_PACRF_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP5) & BM_AIPS_PACRF_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRF_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP5) = (v)) +#define BW_AIPS_PACRF_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP5), v)) /*@}*/ /*! @@ -4612,13 +4619,13 @@ #define BS_AIPS_PACRF_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP5. */ /*! @brief Read current value of the AIPS_PACRF_SP5 field. */ -#define BR_AIPS_PACRF_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP5)) +#define BR_AIPS_PACRF_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP5))) /*! @brief Format value for bitfield AIPS_PACRF_SP5. */ #define BF_AIPS_PACRF_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP5) & BM_AIPS_PACRF_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRF_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP5) = (v)) +#define BW_AIPS_PACRF_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP5), v)) /*@}*/ /*! @@ -4638,13 +4645,13 @@ #define BS_AIPS_PACRF_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP4. */ /*! @brief Read current value of the AIPS_PACRF_TP4 field. */ -#define BR_AIPS_PACRF_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP4)) +#define BR_AIPS_PACRF_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP4))) /*! @brief Format value for bitfield AIPS_PACRF_TP4. */ #define BF_AIPS_PACRF_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP4) & BM_AIPS_PACRF_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRF_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP4) = (v)) +#define BW_AIPS_PACRF_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP4), v)) /*@}*/ /*! @@ -4664,13 +4671,13 @@ #define BS_AIPS_PACRF_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP4. */ /*! @brief Read current value of the AIPS_PACRF_WP4 field. */ -#define BR_AIPS_PACRF_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP4)) +#define BR_AIPS_PACRF_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP4))) /*! @brief Format value for bitfield AIPS_PACRF_WP4. */ #define BF_AIPS_PACRF_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP4) & BM_AIPS_PACRF_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRF_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP4) = (v)) +#define BW_AIPS_PACRF_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP4), v)) /*@}*/ /*! @@ -4693,13 +4700,13 @@ #define BS_AIPS_PACRF_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP4. */ /*! @brief Read current value of the AIPS_PACRF_SP4 field. */ -#define BR_AIPS_PACRF_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP4)) +#define BR_AIPS_PACRF_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP4))) /*! @brief Format value for bitfield AIPS_PACRF_SP4. */ #define BF_AIPS_PACRF_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP4) & BM_AIPS_PACRF_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRF_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP4) = (v)) +#define BW_AIPS_PACRF_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP4), v)) /*@}*/ /*! @@ -4719,13 +4726,13 @@ #define BS_AIPS_PACRF_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP3. */ /*! @brief Read current value of the AIPS_PACRF_TP3 field. */ -#define BR_AIPS_PACRF_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP3)) +#define BR_AIPS_PACRF_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP3))) /*! @brief Format value for bitfield AIPS_PACRF_TP3. */ #define BF_AIPS_PACRF_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP3) & BM_AIPS_PACRF_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRF_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP3) = (v)) +#define BW_AIPS_PACRF_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP3), v)) /*@}*/ /*! @@ -4745,13 +4752,13 @@ #define BS_AIPS_PACRF_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP3. */ /*! @brief Read current value of the AIPS_PACRF_WP3 field. */ -#define BR_AIPS_PACRF_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP3)) +#define BR_AIPS_PACRF_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP3))) /*! @brief Format value for bitfield AIPS_PACRF_WP3. */ #define BF_AIPS_PACRF_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP3) & BM_AIPS_PACRF_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRF_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP3) = (v)) +#define BW_AIPS_PACRF_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP3), v)) /*@}*/ /*! @@ -4774,13 +4781,13 @@ #define BS_AIPS_PACRF_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP3. */ /*! @brief Read current value of the AIPS_PACRF_SP3 field. */ -#define BR_AIPS_PACRF_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP3)) +#define BR_AIPS_PACRF_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP3))) /*! @brief Format value for bitfield AIPS_PACRF_SP3. */ #define BF_AIPS_PACRF_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP3) & BM_AIPS_PACRF_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRF_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP3) = (v)) +#define BW_AIPS_PACRF_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP3), v)) /*@}*/ /*! @@ -4800,13 +4807,13 @@ #define BS_AIPS_PACRF_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP2. */ /*! @brief Read current value of the AIPS_PACRF_TP2 field. */ -#define BR_AIPS_PACRF_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP2)) +#define BR_AIPS_PACRF_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP2))) /*! @brief Format value for bitfield AIPS_PACRF_TP2. */ #define BF_AIPS_PACRF_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP2) & BM_AIPS_PACRF_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRF_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP2) = (v)) +#define BW_AIPS_PACRF_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP2), v)) /*@}*/ /*! @@ -4826,13 +4833,13 @@ #define BS_AIPS_PACRF_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP2. */ /*! @brief Read current value of the AIPS_PACRF_WP2 field. */ -#define BR_AIPS_PACRF_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP2)) +#define BR_AIPS_PACRF_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP2))) /*! @brief Format value for bitfield AIPS_PACRF_WP2. */ #define BF_AIPS_PACRF_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP2) & BM_AIPS_PACRF_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRF_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP2) = (v)) +#define BW_AIPS_PACRF_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP2), v)) /*@}*/ /*! @@ -4855,13 +4862,13 @@ #define BS_AIPS_PACRF_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP2. */ /*! @brief Read current value of the AIPS_PACRF_SP2 field. */ -#define BR_AIPS_PACRF_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP2)) +#define BR_AIPS_PACRF_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP2))) /*! @brief Format value for bitfield AIPS_PACRF_SP2. */ #define BF_AIPS_PACRF_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP2) & BM_AIPS_PACRF_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRF_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP2) = (v)) +#define BW_AIPS_PACRF_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP2), v)) /*@}*/ /*! @@ -4881,13 +4888,13 @@ #define BS_AIPS_PACRF_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP1. */ /*! @brief Read current value of the AIPS_PACRF_TP1 field. */ -#define BR_AIPS_PACRF_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP1)) +#define BR_AIPS_PACRF_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP1))) /*! @brief Format value for bitfield AIPS_PACRF_TP1. */ #define BF_AIPS_PACRF_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP1) & BM_AIPS_PACRF_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRF_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP1) = (v)) +#define BW_AIPS_PACRF_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP1), v)) /*@}*/ /*! @@ -4907,13 +4914,13 @@ #define BS_AIPS_PACRF_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP1. */ /*! @brief Read current value of the AIPS_PACRF_WP1 field. */ -#define BR_AIPS_PACRF_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP1)) +#define BR_AIPS_PACRF_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP1))) /*! @brief Format value for bitfield AIPS_PACRF_WP1. */ #define BF_AIPS_PACRF_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP1) & BM_AIPS_PACRF_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRF_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP1) = (v)) +#define BW_AIPS_PACRF_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP1), v)) /*@}*/ /*! @@ -4936,13 +4943,13 @@ #define BS_AIPS_PACRF_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP1. */ /*! @brief Read current value of the AIPS_PACRF_SP1 field. */ -#define BR_AIPS_PACRF_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP1)) +#define BR_AIPS_PACRF_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP1))) /*! @brief Format value for bitfield AIPS_PACRF_SP1. */ #define BF_AIPS_PACRF_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP1) & BM_AIPS_PACRF_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRF_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP1) = (v)) +#define BW_AIPS_PACRF_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP1), v)) /*@}*/ /*! @@ -4962,13 +4969,13 @@ #define BS_AIPS_PACRF_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP0. */ /*! @brief Read current value of the AIPS_PACRF_TP0 field. */ -#define BR_AIPS_PACRF_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP0)) +#define BR_AIPS_PACRF_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP0))) /*! @brief Format value for bitfield AIPS_PACRF_TP0. */ #define BF_AIPS_PACRF_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP0) & BM_AIPS_PACRF_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRF_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP0) = (v)) +#define BW_AIPS_PACRF_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP0), v)) /*@}*/ /*! @@ -4988,13 +4995,13 @@ #define BS_AIPS_PACRF_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP0. */ /*! @brief Read current value of the AIPS_PACRF_WP0 field. */ -#define BR_AIPS_PACRF_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP0)) +#define BR_AIPS_PACRF_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP0))) /*! @brief Format value for bitfield AIPS_PACRF_WP0. */ #define BF_AIPS_PACRF_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP0) & BM_AIPS_PACRF_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRF_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP0) = (v)) +#define BW_AIPS_PACRF_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP0), v)) /*@}*/ /*! @@ -5017,13 +5024,13 @@ #define BS_AIPS_PACRF_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP0. */ /*! @brief Read current value of the AIPS_PACRF_SP0 field. */ -#define BR_AIPS_PACRF_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP0)) +#define BR_AIPS_PACRF_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP0))) /*! @brief Format value for bitfield AIPS_PACRF_SP0. */ #define BF_AIPS_PACRF_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP0) & BM_AIPS_PACRF_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRF_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP0) = (v)) +#define BW_AIPS_PACRF_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP0), v)) /*@}*/ /******************************************************************************* @@ -5086,8 +5093,8 @@ #define HW_AIPS_PACRG_ADDR(x) ((x) + 0x48U) #define HW_AIPS_PACRG(x) (*(__IO hw_aips_pacrg_t *) HW_AIPS_PACRG_ADDR(x)) -#define HW_AIPS_PACRG_RD(x) (HW_AIPS_PACRG(x).U) -#define HW_AIPS_PACRG_WR(x, v) (HW_AIPS_PACRG(x).U = (v)) +#define HW_AIPS_PACRG_RD(x) (ADDRESS_READ(hw_aips_pacrg_t, HW_AIPS_PACRG_ADDR(x))) +#define HW_AIPS_PACRG_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrg_t, HW_AIPS_PACRG_ADDR(x), v)) #define HW_AIPS_PACRG_SET(x, v) (HW_AIPS_PACRG_WR(x, HW_AIPS_PACRG_RD(x) | (v))) #define HW_AIPS_PACRG_CLR(x, v) (HW_AIPS_PACRG_WR(x, HW_AIPS_PACRG_RD(x) & ~(v))) #define HW_AIPS_PACRG_TOG(x, v) (HW_AIPS_PACRG_WR(x, HW_AIPS_PACRG_RD(x) ^ (v))) @@ -5114,13 +5121,13 @@ #define BS_AIPS_PACRG_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP7. */ /*! @brief Read current value of the AIPS_PACRG_TP7 field. */ -#define BR_AIPS_PACRG_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP7)) +#define BR_AIPS_PACRG_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP7))) /*! @brief Format value for bitfield AIPS_PACRG_TP7. */ #define BF_AIPS_PACRG_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP7) & BM_AIPS_PACRG_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRG_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP7) = (v)) +#define BW_AIPS_PACRG_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP7), v)) /*@}*/ /*! @@ -5140,13 +5147,13 @@ #define BS_AIPS_PACRG_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP7. */ /*! @brief Read current value of the AIPS_PACRG_WP7 field. */ -#define BR_AIPS_PACRG_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP7)) +#define BR_AIPS_PACRG_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP7))) /*! @brief Format value for bitfield AIPS_PACRG_WP7. */ #define BF_AIPS_PACRG_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP7) & BM_AIPS_PACRG_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRG_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP7) = (v)) +#define BW_AIPS_PACRG_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP7), v)) /*@}*/ /*! @@ -5169,13 +5176,13 @@ #define BS_AIPS_PACRG_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP7. */ /*! @brief Read current value of the AIPS_PACRG_SP7 field. */ -#define BR_AIPS_PACRG_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP7)) +#define BR_AIPS_PACRG_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP7))) /*! @brief Format value for bitfield AIPS_PACRG_SP7. */ #define BF_AIPS_PACRG_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP7) & BM_AIPS_PACRG_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRG_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP7) = (v)) +#define BW_AIPS_PACRG_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP7), v)) /*@}*/ /*! @@ -5195,13 +5202,13 @@ #define BS_AIPS_PACRG_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP6. */ /*! @brief Read current value of the AIPS_PACRG_TP6 field. */ -#define BR_AIPS_PACRG_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP6)) +#define BR_AIPS_PACRG_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP6))) /*! @brief Format value for bitfield AIPS_PACRG_TP6. */ #define BF_AIPS_PACRG_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP6) & BM_AIPS_PACRG_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRG_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP6) = (v)) +#define BW_AIPS_PACRG_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP6), v)) /*@}*/ /*! @@ -5221,13 +5228,13 @@ #define BS_AIPS_PACRG_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP6. */ /*! @brief Read current value of the AIPS_PACRG_WP6 field. */ -#define BR_AIPS_PACRG_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP6)) +#define BR_AIPS_PACRG_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP6))) /*! @brief Format value for bitfield AIPS_PACRG_WP6. */ #define BF_AIPS_PACRG_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP6) & BM_AIPS_PACRG_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRG_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP6) = (v)) +#define BW_AIPS_PACRG_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP6), v)) /*@}*/ /*! @@ -5250,13 +5257,13 @@ #define BS_AIPS_PACRG_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP6. */ /*! @brief Read current value of the AIPS_PACRG_SP6 field. */ -#define BR_AIPS_PACRG_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP6)) +#define BR_AIPS_PACRG_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP6))) /*! @brief Format value for bitfield AIPS_PACRG_SP6. */ #define BF_AIPS_PACRG_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP6) & BM_AIPS_PACRG_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRG_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP6) = (v)) +#define BW_AIPS_PACRG_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP6), v)) /*@}*/ /*! @@ -5276,13 +5283,13 @@ #define BS_AIPS_PACRG_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP5. */ /*! @brief Read current value of the AIPS_PACRG_TP5 field. */ -#define BR_AIPS_PACRG_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP5)) +#define BR_AIPS_PACRG_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP5))) /*! @brief Format value for bitfield AIPS_PACRG_TP5. */ #define BF_AIPS_PACRG_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP5) & BM_AIPS_PACRG_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRG_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP5) = (v)) +#define BW_AIPS_PACRG_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP5), v)) /*@}*/ /*! @@ -5302,13 +5309,13 @@ #define BS_AIPS_PACRG_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP5. */ /*! @brief Read current value of the AIPS_PACRG_WP5 field. */ -#define BR_AIPS_PACRG_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP5)) +#define BR_AIPS_PACRG_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP5))) /*! @brief Format value for bitfield AIPS_PACRG_WP5. */ #define BF_AIPS_PACRG_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP5) & BM_AIPS_PACRG_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRG_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP5) = (v)) +#define BW_AIPS_PACRG_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP5), v)) /*@}*/ /*! @@ -5331,13 +5338,13 @@ #define BS_AIPS_PACRG_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP5. */ /*! @brief Read current value of the AIPS_PACRG_SP5 field. */ -#define BR_AIPS_PACRG_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP5)) +#define BR_AIPS_PACRG_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP5))) /*! @brief Format value for bitfield AIPS_PACRG_SP5. */ #define BF_AIPS_PACRG_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP5) & BM_AIPS_PACRG_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRG_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP5) = (v)) +#define BW_AIPS_PACRG_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP5), v)) /*@}*/ /*! @@ -5357,13 +5364,13 @@ #define BS_AIPS_PACRG_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP4. */ /*! @brief Read current value of the AIPS_PACRG_TP4 field. */ -#define BR_AIPS_PACRG_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP4)) +#define BR_AIPS_PACRG_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP4))) /*! @brief Format value for bitfield AIPS_PACRG_TP4. */ #define BF_AIPS_PACRG_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP4) & BM_AIPS_PACRG_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRG_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP4) = (v)) +#define BW_AIPS_PACRG_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP4), v)) /*@}*/ /*! @@ -5383,13 +5390,13 @@ #define BS_AIPS_PACRG_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP4. */ /*! @brief Read current value of the AIPS_PACRG_WP4 field. */ -#define BR_AIPS_PACRG_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP4)) +#define BR_AIPS_PACRG_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP4))) /*! @brief Format value for bitfield AIPS_PACRG_WP4. */ #define BF_AIPS_PACRG_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP4) & BM_AIPS_PACRG_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRG_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP4) = (v)) +#define BW_AIPS_PACRG_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP4), v)) /*@}*/ /*! @@ -5412,13 +5419,13 @@ #define BS_AIPS_PACRG_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP4. */ /*! @brief Read current value of the AIPS_PACRG_SP4 field. */ -#define BR_AIPS_PACRG_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP4)) +#define BR_AIPS_PACRG_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP4))) /*! @brief Format value for bitfield AIPS_PACRG_SP4. */ #define BF_AIPS_PACRG_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP4) & BM_AIPS_PACRG_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRG_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP4) = (v)) +#define BW_AIPS_PACRG_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP4), v)) /*@}*/ /*! @@ -5438,13 +5445,13 @@ #define BS_AIPS_PACRG_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP3. */ /*! @brief Read current value of the AIPS_PACRG_TP3 field. */ -#define BR_AIPS_PACRG_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP3)) +#define BR_AIPS_PACRG_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP3))) /*! @brief Format value for bitfield AIPS_PACRG_TP3. */ #define BF_AIPS_PACRG_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP3) & BM_AIPS_PACRG_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRG_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP3) = (v)) +#define BW_AIPS_PACRG_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP3), v)) /*@}*/ /*! @@ -5464,13 +5471,13 @@ #define BS_AIPS_PACRG_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP3. */ /*! @brief Read current value of the AIPS_PACRG_WP3 field. */ -#define BR_AIPS_PACRG_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP3)) +#define BR_AIPS_PACRG_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP3))) /*! @brief Format value for bitfield AIPS_PACRG_WP3. */ #define BF_AIPS_PACRG_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP3) & BM_AIPS_PACRG_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRG_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP3) = (v)) +#define BW_AIPS_PACRG_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP3), v)) /*@}*/ /*! @@ -5493,13 +5500,13 @@ #define BS_AIPS_PACRG_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP3. */ /*! @brief Read current value of the AIPS_PACRG_SP3 field. */ -#define BR_AIPS_PACRG_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP3)) +#define BR_AIPS_PACRG_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP3))) /*! @brief Format value for bitfield AIPS_PACRG_SP3. */ #define BF_AIPS_PACRG_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP3) & BM_AIPS_PACRG_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRG_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP3) = (v)) +#define BW_AIPS_PACRG_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP3), v)) /*@}*/ /*! @@ -5519,13 +5526,13 @@ #define BS_AIPS_PACRG_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP2. */ /*! @brief Read current value of the AIPS_PACRG_TP2 field. */ -#define BR_AIPS_PACRG_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP2)) +#define BR_AIPS_PACRG_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP2))) /*! @brief Format value for bitfield AIPS_PACRG_TP2. */ #define BF_AIPS_PACRG_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP2) & BM_AIPS_PACRG_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRG_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP2) = (v)) +#define BW_AIPS_PACRG_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP2), v)) /*@}*/ /*! @@ -5545,13 +5552,13 @@ #define BS_AIPS_PACRG_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP2. */ /*! @brief Read current value of the AIPS_PACRG_WP2 field. */ -#define BR_AIPS_PACRG_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP2)) +#define BR_AIPS_PACRG_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP2))) /*! @brief Format value for bitfield AIPS_PACRG_WP2. */ #define BF_AIPS_PACRG_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP2) & BM_AIPS_PACRG_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRG_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP2) = (v)) +#define BW_AIPS_PACRG_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP2), v)) /*@}*/ /*! @@ -5574,13 +5581,13 @@ #define BS_AIPS_PACRG_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP2. */ /*! @brief Read current value of the AIPS_PACRG_SP2 field. */ -#define BR_AIPS_PACRG_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP2)) +#define BR_AIPS_PACRG_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP2))) /*! @brief Format value for bitfield AIPS_PACRG_SP2. */ #define BF_AIPS_PACRG_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP2) & BM_AIPS_PACRG_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRG_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP2) = (v)) +#define BW_AIPS_PACRG_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP2), v)) /*@}*/ /*! @@ -5600,13 +5607,13 @@ #define BS_AIPS_PACRG_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP1. */ /*! @brief Read current value of the AIPS_PACRG_TP1 field. */ -#define BR_AIPS_PACRG_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP1)) +#define BR_AIPS_PACRG_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP1))) /*! @brief Format value for bitfield AIPS_PACRG_TP1. */ #define BF_AIPS_PACRG_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP1) & BM_AIPS_PACRG_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRG_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP1) = (v)) +#define BW_AIPS_PACRG_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP1), v)) /*@}*/ /*! @@ -5626,13 +5633,13 @@ #define BS_AIPS_PACRG_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP1. */ /*! @brief Read current value of the AIPS_PACRG_WP1 field. */ -#define BR_AIPS_PACRG_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP1)) +#define BR_AIPS_PACRG_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP1))) /*! @brief Format value for bitfield AIPS_PACRG_WP1. */ #define BF_AIPS_PACRG_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP1) & BM_AIPS_PACRG_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRG_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP1) = (v)) +#define BW_AIPS_PACRG_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP1), v)) /*@}*/ /*! @@ -5655,13 +5662,13 @@ #define BS_AIPS_PACRG_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP1. */ /*! @brief Read current value of the AIPS_PACRG_SP1 field. */ -#define BR_AIPS_PACRG_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP1)) +#define BR_AIPS_PACRG_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP1))) /*! @brief Format value for bitfield AIPS_PACRG_SP1. */ #define BF_AIPS_PACRG_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP1) & BM_AIPS_PACRG_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRG_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP1) = (v)) +#define BW_AIPS_PACRG_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP1), v)) /*@}*/ /*! @@ -5681,13 +5688,13 @@ #define BS_AIPS_PACRG_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP0. */ /*! @brief Read current value of the AIPS_PACRG_TP0 field. */ -#define BR_AIPS_PACRG_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP0)) +#define BR_AIPS_PACRG_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP0))) /*! @brief Format value for bitfield AIPS_PACRG_TP0. */ #define BF_AIPS_PACRG_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP0) & BM_AIPS_PACRG_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRG_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP0) = (v)) +#define BW_AIPS_PACRG_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP0), v)) /*@}*/ /*! @@ -5707,13 +5714,13 @@ #define BS_AIPS_PACRG_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP0. */ /*! @brief Read current value of the AIPS_PACRG_WP0 field. */ -#define BR_AIPS_PACRG_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP0)) +#define BR_AIPS_PACRG_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP0))) /*! @brief Format value for bitfield AIPS_PACRG_WP0. */ #define BF_AIPS_PACRG_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP0) & BM_AIPS_PACRG_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRG_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP0) = (v)) +#define BW_AIPS_PACRG_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP0), v)) /*@}*/ /*! @@ -5736,13 +5743,13 @@ #define BS_AIPS_PACRG_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP0. */ /*! @brief Read current value of the AIPS_PACRG_SP0 field. */ -#define BR_AIPS_PACRG_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP0)) +#define BR_AIPS_PACRG_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP0))) /*! @brief Format value for bitfield AIPS_PACRG_SP0. */ #define BF_AIPS_PACRG_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP0) & BM_AIPS_PACRG_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRG_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP0) = (v)) +#define BW_AIPS_PACRG_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP0), v)) /*@}*/ /******************************************************************************* @@ -5805,8 +5812,8 @@ #define HW_AIPS_PACRH_ADDR(x) ((x) + 0x4CU) #define HW_AIPS_PACRH(x) (*(__IO hw_aips_pacrh_t *) HW_AIPS_PACRH_ADDR(x)) -#define HW_AIPS_PACRH_RD(x) (HW_AIPS_PACRH(x).U) -#define HW_AIPS_PACRH_WR(x, v) (HW_AIPS_PACRH(x).U = (v)) +#define HW_AIPS_PACRH_RD(x) (ADDRESS_READ(hw_aips_pacrh_t, HW_AIPS_PACRH_ADDR(x))) +#define HW_AIPS_PACRH_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrh_t, HW_AIPS_PACRH_ADDR(x), v)) #define HW_AIPS_PACRH_SET(x, v) (HW_AIPS_PACRH_WR(x, HW_AIPS_PACRH_RD(x) | (v))) #define HW_AIPS_PACRH_CLR(x, v) (HW_AIPS_PACRH_WR(x, HW_AIPS_PACRH_RD(x) & ~(v))) #define HW_AIPS_PACRH_TOG(x, v) (HW_AIPS_PACRH_WR(x, HW_AIPS_PACRH_RD(x) ^ (v))) @@ -5833,13 +5840,13 @@ #define BS_AIPS_PACRH_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP7. */ /*! @brief Read current value of the AIPS_PACRH_TP7 field. */ -#define BR_AIPS_PACRH_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP7)) +#define BR_AIPS_PACRH_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP7))) /*! @brief Format value for bitfield AIPS_PACRH_TP7. */ #define BF_AIPS_PACRH_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP7) & BM_AIPS_PACRH_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRH_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP7) = (v)) +#define BW_AIPS_PACRH_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP7), v)) /*@}*/ /*! @@ -5859,13 +5866,13 @@ #define BS_AIPS_PACRH_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP7. */ /*! @brief Read current value of the AIPS_PACRH_WP7 field. */ -#define BR_AIPS_PACRH_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP7)) +#define BR_AIPS_PACRH_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP7))) /*! @brief Format value for bitfield AIPS_PACRH_WP7. */ #define BF_AIPS_PACRH_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP7) & BM_AIPS_PACRH_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRH_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP7) = (v)) +#define BW_AIPS_PACRH_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP7), v)) /*@}*/ /*! @@ -5888,13 +5895,13 @@ #define BS_AIPS_PACRH_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP7. */ /*! @brief Read current value of the AIPS_PACRH_SP7 field. */ -#define BR_AIPS_PACRH_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP7)) +#define BR_AIPS_PACRH_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP7))) /*! @brief Format value for bitfield AIPS_PACRH_SP7. */ #define BF_AIPS_PACRH_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP7) & BM_AIPS_PACRH_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRH_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP7) = (v)) +#define BW_AIPS_PACRH_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP7), v)) /*@}*/ /*! @@ -5914,13 +5921,13 @@ #define BS_AIPS_PACRH_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP6. */ /*! @brief Read current value of the AIPS_PACRH_TP6 field. */ -#define BR_AIPS_PACRH_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP6)) +#define BR_AIPS_PACRH_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP6))) /*! @brief Format value for bitfield AIPS_PACRH_TP6. */ #define BF_AIPS_PACRH_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP6) & BM_AIPS_PACRH_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRH_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP6) = (v)) +#define BW_AIPS_PACRH_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP6), v)) /*@}*/ /*! @@ -5940,13 +5947,13 @@ #define BS_AIPS_PACRH_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP6. */ /*! @brief Read current value of the AIPS_PACRH_WP6 field. */ -#define BR_AIPS_PACRH_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP6)) +#define BR_AIPS_PACRH_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP6))) /*! @brief Format value for bitfield AIPS_PACRH_WP6. */ #define BF_AIPS_PACRH_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP6) & BM_AIPS_PACRH_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRH_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP6) = (v)) +#define BW_AIPS_PACRH_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP6), v)) /*@}*/ /*! @@ -5969,13 +5976,13 @@ #define BS_AIPS_PACRH_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP6. */ /*! @brief Read current value of the AIPS_PACRH_SP6 field. */ -#define BR_AIPS_PACRH_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP6)) +#define BR_AIPS_PACRH_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP6))) /*! @brief Format value for bitfield AIPS_PACRH_SP6. */ #define BF_AIPS_PACRH_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP6) & BM_AIPS_PACRH_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRH_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP6) = (v)) +#define BW_AIPS_PACRH_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP6), v)) /*@}*/ /*! @@ -5995,13 +6002,13 @@ #define BS_AIPS_PACRH_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP5. */ /*! @brief Read current value of the AIPS_PACRH_TP5 field. */ -#define BR_AIPS_PACRH_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP5)) +#define BR_AIPS_PACRH_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP5))) /*! @brief Format value for bitfield AIPS_PACRH_TP5. */ #define BF_AIPS_PACRH_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP5) & BM_AIPS_PACRH_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRH_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP5) = (v)) +#define BW_AIPS_PACRH_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP5), v)) /*@}*/ /*! @@ -6021,13 +6028,13 @@ #define BS_AIPS_PACRH_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP5. */ /*! @brief Read current value of the AIPS_PACRH_WP5 field. */ -#define BR_AIPS_PACRH_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP5)) +#define BR_AIPS_PACRH_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP5))) /*! @brief Format value for bitfield AIPS_PACRH_WP5. */ #define BF_AIPS_PACRH_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP5) & BM_AIPS_PACRH_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRH_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP5) = (v)) +#define BW_AIPS_PACRH_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP5), v)) /*@}*/ /*! @@ -6050,13 +6057,13 @@ #define BS_AIPS_PACRH_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP5. */ /*! @brief Read current value of the AIPS_PACRH_SP5 field. */ -#define BR_AIPS_PACRH_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP5)) +#define BR_AIPS_PACRH_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP5))) /*! @brief Format value for bitfield AIPS_PACRH_SP5. */ #define BF_AIPS_PACRH_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP5) & BM_AIPS_PACRH_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRH_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP5) = (v)) +#define BW_AIPS_PACRH_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP5), v)) /*@}*/ /*! @@ -6076,13 +6083,13 @@ #define BS_AIPS_PACRH_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP4. */ /*! @brief Read current value of the AIPS_PACRH_TP4 field. */ -#define BR_AIPS_PACRH_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP4)) +#define BR_AIPS_PACRH_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP4))) /*! @brief Format value for bitfield AIPS_PACRH_TP4. */ #define BF_AIPS_PACRH_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP4) & BM_AIPS_PACRH_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRH_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP4) = (v)) +#define BW_AIPS_PACRH_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP4), v)) /*@}*/ /*! @@ -6102,13 +6109,13 @@ #define BS_AIPS_PACRH_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP4. */ /*! @brief Read current value of the AIPS_PACRH_WP4 field. */ -#define BR_AIPS_PACRH_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP4)) +#define BR_AIPS_PACRH_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP4))) /*! @brief Format value for bitfield AIPS_PACRH_WP4. */ #define BF_AIPS_PACRH_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP4) & BM_AIPS_PACRH_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRH_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP4) = (v)) +#define BW_AIPS_PACRH_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP4), v)) /*@}*/ /*! @@ -6131,13 +6138,13 @@ #define BS_AIPS_PACRH_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP4. */ /*! @brief Read current value of the AIPS_PACRH_SP4 field. */ -#define BR_AIPS_PACRH_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP4)) +#define BR_AIPS_PACRH_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP4))) /*! @brief Format value for bitfield AIPS_PACRH_SP4. */ #define BF_AIPS_PACRH_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP4) & BM_AIPS_PACRH_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRH_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP4) = (v)) +#define BW_AIPS_PACRH_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP4), v)) /*@}*/ /*! @@ -6157,13 +6164,13 @@ #define BS_AIPS_PACRH_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP3. */ /*! @brief Read current value of the AIPS_PACRH_TP3 field. */ -#define BR_AIPS_PACRH_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP3)) +#define BR_AIPS_PACRH_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP3))) /*! @brief Format value for bitfield AIPS_PACRH_TP3. */ #define BF_AIPS_PACRH_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP3) & BM_AIPS_PACRH_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRH_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP3) = (v)) +#define BW_AIPS_PACRH_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP3), v)) /*@}*/ /*! @@ -6183,13 +6190,13 @@ #define BS_AIPS_PACRH_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP3. */ /*! @brief Read current value of the AIPS_PACRH_WP3 field. */ -#define BR_AIPS_PACRH_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP3)) +#define BR_AIPS_PACRH_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP3))) /*! @brief Format value for bitfield AIPS_PACRH_WP3. */ #define BF_AIPS_PACRH_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP3) & BM_AIPS_PACRH_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRH_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP3) = (v)) +#define BW_AIPS_PACRH_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP3), v)) /*@}*/ /*! @@ -6212,13 +6219,13 @@ #define BS_AIPS_PACRH_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP3. */ /*! @brief Read current value of the AIPS_PACRH_SP3 field. */ -#define BR_AIPS_PACRH_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP3)) +#define BR_AIPS_PACRH_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP3))) /*! @brief Format value for bitfield AIPS_PACRH_SP3. */ #define BF_AIPS_PACRH_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP3) & BM_AIPS_PACRH_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRH_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP3) = (v)) +#define BW_AIPS_PACRH_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP3), v)) /*@}*/ /*! @@ -6238,13 +6245,13 @@ #define BS_AIPS_PACRH_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP2. */ /*! @brief Read current value of the AIPS_PACRH_TP2 field. */ -#define BR_AIPS_PACRH_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP2)) +#define BR_AIPS_PACRH_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP2))) /*! @brief Format value for bitfield AIPS_PACRH_TP2. */ #define BF_AIPS_PACRH_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP2) & BM_AIPS_PACRH_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRH_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP2) = (v)) +#define BW_AIPS_PACRH_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP2), v)) /*@}*/ /*! @@ -6264,13 +6271,13 @@ #define BS_AIPS_PACRH_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP2. */ /*! @brief Read current value of the AIPS_PACRH_WP2 field. */ -#define BR_AIPS_PACRH_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP2)) +#define BR_AIPS_PACRH_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP2))) /*! @brief Format value for bitfield AIPS_PACRH_WP2. */ #define BF_AIPS_PACRH_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP2) & BM_AIPS_PACRH_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRH_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP2) = (v)) +#define BW_AIPS_PACRH_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP2), v)) /*@}*/ /*! @@ -6293,13 +6300,13 @@ #define BS_AIPS_PACRH_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP2. */ /*! @brief Read current value of the AIPS_PACRH_SP2 field. */ -#define BR_AIPS_PACRH_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP2)) +#define BR_AIPS_PACRH_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP2))) /*! @brief Format value for bitfield AIPS_PACRH_SP2. */ #define BF_AIPS_PACRH_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP2) & BM_AIPS_PACRH_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRH_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP2) = (v)) +#define BW_AIPS_PACRH_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP2), v)) /*@}*/ /*! @@ -6319,13 +6326,13 @@ #define BS_AIPS_PACRH_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP1. */ /*! @brief Read current value of the AIPS_PACRH_TP1 field. */ -#define BR_AIPS_PACRH_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP1)) +#define BR_AIPS_PACRH_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP1))) /*! @brief Format value for bitfield AIPS_PACRH_TP1. */ #define BF_AIPS_PACRH_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP1) & BM_AIPS_PACRH_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRH_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP1) = (v)) +#define BW_AIPS_PACRH_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP1), v)) /*@}*/ /*! @@ -6345,13 +6352,13 @@ #define BS_AIPS_PACRH_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP1. */ /*! @brief Read current value of the AIPS_PACRH_WP1 field. */ -#define BR_AIPS_PACRH_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP1)) +#define BR_AIPS_PACRH_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP1))) /*! @brief Format value for bitfield AIPS_PACRH_WP1. */ #define BF_AIPS_PACRH_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP1) & BM_AIPS_PACRH_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRH_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP1) = (v)) +#define BW_AIPS_PACRH_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP1), v)) /*@}*/ /*! @@ -6374,13 +6381,13 @@ #define BS_AIPS_PACRH_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP1. */ /*! @brief Read current value of the AIPS_PACRH_SP1 field. */ -#define BR_AIPS_PACRH_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP1)) +#define BR_AIPS_PACRH_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP1))) /*! @brief Format value for bitfield AIPS_PACRH_SP1. */ #define BF_AIPS_PACRH_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP1) & BM_AIPS_PACRH_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRH_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP1) = (v)) +#define BW_AIPS_PACRH_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP1), v)) /*@}*/ /*! @@ -6400,13 +6407,13 @@ #define BS_AIPS_PACRH_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP0. */ /*! @brief Read current value of the AIPS_PACRH_TP0 field. */ -#define BR_AIPS_PACRH_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP0)) +#define BR_AIPS_PACRH_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP0))) /*! @brief Format value for bitfield AIPS_PACRH_TP0. */ #define BF_AIPS_PACRH_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP0) & BM_AIPS_PACRH_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRH_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP0) = (v)) +#define BW_AIPS_PACRH_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP0), v)) /*@}*/ /*! @@ -6426,13 +6433,13 @@ #define BS_AIPS_PACRH_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP0. */ /*! @brief Read current value of the AIPS_PACRH_WP0 field. */ -#define BR_AIPS_PACRH_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP0)) +#define BR_AIPS_PACRH_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP0))) /*! @brief Format value for bitfield AIPS_PACRH_WP0. */ #define BF_AIPS_PACRH_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP0) & BM_AIPS_PACRH_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRH_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP0) = (v)) +#define BW_AIPS_PACRH_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP0), v)) /*@}*/ /*! @@ -6455,13 +6462,13 @@ #define BS_AIPS_PACRH_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP0. */ /*! @brief Read current value of the AIPS_PACRH_SP0 field. */ -#define BR_AIPS_PACRH_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP0)) +#define BR_AIPS_PACRH_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP0))) /*! @brief Format value for bitfield AIPS_PACRH_SP0. */ #define BF_AIPS_PACRH_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP0) & BM_AIPS_PACRH_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRH_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP0) = (v)) +#define BW_AIPS_PACRH_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP0), v)) /*@}*/ /******************************************************************************* @@ -6524,8 +6531,8 @@ #define HW_AIPS_PACRI_ADDR(x) ((x) + 0x50U) #define HW_AIPS_PACRI(x) (*(__IO hw_aips_pacri_t *) HW_AIPS_PACRI_ADDR(x)) -#define HW_AIPS_PACRI_RD(x) (HW_AIPS_PACRI(x).U) -#define HW_AIPS_PACRI_WR(x, v) (HW_AIPS_PACRI(x).U = (v)) +#define HW_AIPS_PACRI_RD(x) (ADDRESS_READ(hw_aips_pacri_t, HW_AIPS_PACRI_ADDR(x))) +#define HW_AIPS_PACRI_WR(x, v) (ADDRESS_WRITE(hw_aips_pacri_t, HW_AIPS_PACRI_ADDR(x), v)) #define HW_AIPS_PACRI_SET(x, v) (HW_AIPS_PACRI_WR(x, HW_AIPS_PACRI_RD(x) | (v))) #define HW_AIPS_PACRI_CLR(x, v) (HW_AIPS_PACRI_WR(x, HW_AIPS_PACRI_RD(x) & ~(v))) #define HW_AIPS_PACRI_TOG(x, v) (HW_AIPS_PACRI_WR(x, HW_AIPS_PACRI_RD(x) ^ (v))) @@ -6552,13 +6559,13 @@ #define BS_AIPS_PACRI_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP7. */ /*! @brief Read current value of the AIPS_PACRI_TP7 field. */ -#define BR_AIPS_PACRI_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP7)) +#define BR_AIPS_PACRI_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP7))) /*! @brief Format value for bitfield AIPS_PACRI_TP7. */ #define BF_AIPS_PACRI_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP7) & BM_AIPS_PACRI_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRI_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP7) = (v)) +#define BW_AIPS_PACRI_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP7), v)) /*@}*/ /*! @@ -6578,13 +6585,13 @@ #define BS_AIPS_PACRI_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP7. */ /*! @brief Read current value of the AIPS_PACRI_WP7 field. */ -#define BR_AIPS_PACRI_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP7)) +#define BR_AIPS_PACRI_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP7))) /*! @brief Format value for bitfield AIPS_PACRI_WP7. */ #define BF_AIPS_PACRI_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP7) & BM_AIPS_PACRI_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRI_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP7) = (v)) +#define BW_AIPS_PACRI_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP7), v)) /*@}*/ /*! @@ -6607,13 +6614,13 @@ #define BS_AIPS_PACRI_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP7. */ /*! @brief Read current value of the AIPS_PACRI_SP7 field. */ -#define BR_AIPS_PACRI_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP7)) +#define BR_AIPS_PACRI_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP7))) /*! @brief Format value for bitfield AIPS_PACRI_SP7. */ #define BF_AIPS_PACRI_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP7) & BM_AIPS_PACRI_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRI_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP7) = (v)) +#define BW_AIPS_PACRI_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP7), v)) /*@}*/ /*! @@ -6633,13 +6640,13 @@ #define BS_AIPS_PACRI_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP6. */ /*! @brief Read current value of the AIPS_PACRI_TP6 field. */ -#define BR_AIPS_PACRI_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP6)) +#define BR_AIPS_PACRI_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP6))) /*! @brief Format value for bitfield AIPS_PACRI_TP6. */ #define BF_AIPS_PACRI_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP6) & BM_AIPS_PACRI_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRI_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP6) = (v)) +#define BW_AIPS_PACRI_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP6), v)) /*@}*/ /*! @@ -6659,13 +6666,13 @@ #define BS_AIPS_PACRI_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP6. */ /*! @brief Read current value of the AIPS_PACRI_WP6 field. */ -#define BR_AIPS_PACRI_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP6)) +#define BR_AIPS_PACRI_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP6))) /*! @brief Format value for bitfield AIPS_PACRI_WP6. */ #define BF_AIPS_PACRI_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP6) & BM_AIPS_PACRI_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRI_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP6) = (v)) +#define BW_AIPS_PACRI_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP6), v)) /*@}*/ /*! @@ -6688,13 +6695,13 @@ #define BS_AIPS_PACRI_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP6. */ /*! @brief Read current value of the AIPS_PACRI_SP6 field. */ -#define BR_AIPS_PACRI_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP6)) +#define BR_AIPS_PACRI_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP6))) /*! @brief Format value for bitfield AIPS_PACRI_SP6. */ #define BF_AIPS_PACRI_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP6) & BM_AIPS_PACRI_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRI_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP6) = (v)) +#define BW_AIPS_PACRI_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP6), v)) /*@}*/ /*! @@ -6714,13 +6721,13 @@ #define BS_AIPS_PACRI_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP5. */ /*! @brief Read current value of the AIPS_PACRI_TP5 field. */ -#define BR_AIPS_PACRI_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP5)) +#define BR_AIPS_PACRI_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP5))) /*! @brief Format value for bitfield AIPS_PACRI_TP5. */ #define BF_AIPS_PACRI_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP5) & BM_AIPS_PACRI_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRI_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP5) = (v)) +#define BW_AIPS_PACRI_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP5), v)) /*@}*/ /*! @@ -6740,13 +6747,13 @@ #define BS_AIPS_PACRI_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP5. */ /*! @brief Read current value of the AIPS_PACRI_WP5 field. */ -#define BR_AIPS_PACRI_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP5)) +#define BR_AIPS_PACRI_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP5))) /*! @brief Format value for bitfield AIPS_PACRI_WP5. */ #define BF_AIPS_PACRI_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP5) & BM_AIPS_PACRI_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRI_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP5) = (v)) +#define BW_AIPS_PACRI_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP5), v)) /*@}*/ /*! @@ -6769,13 +6776,13 @@ #define BS_AIPS_PACRI_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP5. */ /*! @brief Read current value of the AIPS_PACRI_SP5 field. */ -#define BR_AIPS_PACRI_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP5)) +#define BR_AIPS_PACRI_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP5))) /*! @brief Format value for bitfield AIPS_PACRI_SP5. */ #define BF_AIPS_PACRI_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP5) & BM_AIPS_PACRI_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRI_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP5) = (v)) +#define BW_AIPS_PACRI_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP5), v)) /*@}*/ /*! @@ -6795,13 +6802,13 @@ #define BS_AIPS_PACRI_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP4. */ /*! @brief Read current value of the AIPS_PACRI_TP4 field. */ -#define BR_AIPS_PACRI_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP4)) +#define BR_AIPS_PACRI_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP4))) /*! @brief Format value for bitfield AIPS_PACRI_TP4. */ #define BF_AIPS_PACRI_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP4) & BM_AIPS_PACRI_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRI_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP4) = (v)) +#define BW_AIPS_PACRI_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP4), v)) /*@}*/ /*! @@ -6821,13 +6828,13 @@ #define BS_AIPS_PACRI_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP4. */ /*! @brief Read current value of the AIPS_PACRI_WP4 field. */ -#define BR_AIPS_PACRI_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP4)) +#define BR_AIPS_PACRI_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP4))) /*! @brief Format value for bitfield AIPS_PACRI_WP4. */ #define BF_AIPS_PACRI_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP4) & BM_AIPS_PACRI_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRI_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP4) = (v)) +#define BW_AIPS_PACRI_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP4), v)) /*@}*/ /*! @@ -6850,13 +6857,13 @@ #define BS_AIPS_PACRI_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP4. */ /*! @brief Read current value of the AIPS_PACRI_SP4 field. */ -#define BR_AIPS_PACRI_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP4)) +#define BR_AIPS_PACRI_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP4))) /*! @brief Format value for bitfield AIPS_PACRI_SP4. */ #define BF_AIPS_PACRI_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP4) & BM_AIPS_PACRI_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRI_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP4) = (v)) +#define BW_AIPS_PACRI_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP4), v)) /*@}*/ /*! @@ -6876,13 +6883,13 @@ #define BS_AIPS_PACRI_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP3. */ /*! @brief Read current value of the AIPS_PACRI_TP3 field. */ -#define BR_AIPS_PACRI_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP3)) +#define BR_AIPS_PACRI_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP3))) /*! @brief Format value for bitfield AIPS_PACRI_TP3. */ #define BF_AIPS_PACRI_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP3) & BM_AIPS_PACRI_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRI_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP3) = (v)) +#define BW_AIPS_PACRI_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP3), v)) /*@}*/ /*! @@ -6902,13 +6909,13 @@ #define BS_AIPS_PACRI_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP3. */ /*! @brief Read current value of the AIPS_PACRI_WP3 field. */ -#define BR_AIPS_PACRI_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP3)) +#define BR_AIPS_PACRI_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP3))) /*! @brief Format value for bitfield AIPS_PACRI_WP3. */ #define BF_AIPS_PACRI_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP3) & BM_AIPS_PACRI_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRI_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP3) = (v)) +#define BW_AIPS_PACRI_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP3), v)) /*@}*/ /*! @@ -6931,13 +6938,13 @@ #define BS_AIPS_PACRI_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP3. */ /*! @brief Read current value of the AIPS_PACRI_SP3 field. */ -#define BR_AIPS_PACRI_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP3)) +#define BR_AIPS_PACRI_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP3))) /*! @brief Format value for bitfield AIPS_PACRI_SP3. */ #define BF_AIPS_PACRI_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP3) & BM_AIPS_PACRI_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRI_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP3) = (v)) +#define BW_AIPS_PACRI_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP3), v)) /*@}*/ /*! @@ -6957,13 +6964,13 @@ #define BS_AIPS_PACRI_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP2. */ /*! @brief Read current value of the AIPS_PACRI_TP2 field. */ -#define BR_AIPS_PACRI_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP2)) +#define BR_AIPS_PACRI_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP2))) /*! @brief Format value for bitfield AIPS_PACRI_TP2. */ #define BF_AIPS_PACRI_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP2) & BM_AIPS_PACRI_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRI_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP2) = (v)) +#define BW_AIPS_PACRI_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP2), v)) /*@}*/ /*! @@ -6983,13 +6990,13 @@ #define BS_AIPS_PACRI_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP2. */ /*! @brief Read current value of the AIPS_PACRI_WP2 field. */ -#define BR_AIPS_PACRI_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP2)) +#define BR_AIPS_PACRI_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP2))) /*! @brief Format value for bitfield AIPS_PACRI_WP2. */ #define BF_AIPS_PACRI_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP2) & BM_AIPS_PACRI_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRI_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP2) = (v)) +#define BW_AIPS_PACRI_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP2), v)) /*@}*/ /*! @@ -7012,13 +7019,13 @@ #define BS_AIPS_PACRI_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP2. */ /*! @brief Read current value of the AIPS_PACRI_SP2 field. */ -#define BR_AIPS_PACRI_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP2)) +#define BR_AIPS_PACRI_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP2))) /*! @brief Format value for bitfield AIPS_PACRI_SP2. */ #define BF_AIPS_PACRI_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP2) & BM_AIPS_PACRI_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRI_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP2) = (v)) +#define BW_AIPS_PACRI_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP2), v)) /*@}*/ /*! @@ -7038,13 +7045,13 @@ #define BS_AIPS_PACRI_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP1. */ /*! @brief Read current value of the AIPS_PACRI_TP1 field. */ -#define BR_AIPS_PACRI_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP1)) +#define BR_AIPS_PACRI_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP1))) /*! @brief Format value for bitfield AIPS_PACRI_TP1. */ #define BF_AIPS_PACRI_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP1) & BM_AIPS_PACRI_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRI_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP1) = (v)) +#define BW_AIPS_PACRI_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP1), v)) /*@}*/ /*! @@ -7064,13 +7071,13 @@ #define BS_AIPS_PACRI_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP1. */ /*! @brief Read current value of the AIPS_PACRI_WP1 field. */ -#define BR_AIPS_PACRI_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP1)) +#define BR_AIPS_PACRI_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP1))) /*! @brief Format value for bitfield AIPS_PACRI_WP1. */ #define BF_AIPS_PACRI_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP1) & BM_AIPS_PACRI_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRI_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP1) = (v)) +#define BW_AIPS_PACRI_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP1), v)) /*@}*/ /*! @@ -7093,13 +7100,13 @@ #define BS_AIPS_PACRI_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP1. */ /*! @brief Read current value of the AIPS_PACRI_SP1 field. */ -#define BR_AIPS_PACRI_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP1)) +#define BR_AIPS_PACRI_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP1))) /*! @brief Format value for bitfield AIPS_PACRI_SP1. */ #define BF_AIPS_PACRI_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP1) & BM_AIPS_PACRI_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRI_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP1) = (v)) +#define BW_AIPS_PACRI_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP1), v)) /*@}*/ /*! @@ -7119,13 +7126,13 @@ #define BS_AIPS_PACRI_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP0. */ /*! @brief Read current value of the AIPS_PACRI_TP0 field. */ -#define BR_AIPS_PACRI_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP0)) +#define BR_AIPS_PACRI_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP0))) /*! @brief Format value for bitfield AIPS_PACRI_TP0. */ #define BF_AIPS_PACRI_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP0) & BM_AIPS_PACRI_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRI_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP0) = (v)) +#define BW_AIPS_PACRI_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP0), v)) /*@}*/ /*! @@ -7145,13 +7152,13 @@ #define BS_AIPS_PACRI_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP0. */ /*! @brief Read current value of the AIPS_PACRI_WP0 field. */ -#define BR_AIPS_PACRI_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP0)) +#define BR_AIPS_PACRI_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP0))) /*! @brief Format value for bitfield AIPS_PACRI_WP0. */ #define BF_AIPS_PACRI_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP0) & BM_AIPS_PACRI_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRI_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP0) = (v)) +#define BW_AIPS_PACRI_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP0), v)) /*@}*/ /*! @@ -7174,13 +7181,13 @@ #define BS_AIPS_PACRI_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP0. */ /*! @brief Read current value of the AIPS_PACRI_SP0 field. */ -#define BR_AIPS_PACRI_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP0)) +#define BR_AIPS_PACRI_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP0))) /*! @brief Format value for bitfield AIPS_PACRI_SP0. */ #define BF_AIPS_PACRI_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP0) & BM_AIPS_PACRI_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRI_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP0) = (v)) +#define BW_AIPS_PACRI_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP0), v)) /*@}*/ /******************************************************************************* @@ -7243,8 +7250,8 @@ #define HW_AIPS_PACRJ_ADDR(x) ((x) + 0x54U) #define HW_AIPS_PACRJ(x) (*(__IO hw_aips_pacrj_t *) HW_AIPS_PACRJ_ADDR(x)) -#define HW_AIPS_PACRJ_RD(x) (HW_AIPS_PACRJ(x).U) -#define HW_AIPS_PACRJ_WR(x, v) (HW_AIPS_PACRJ(x).U = (v)) +#define HW_AIPS_PACRJ_RD(x) (ADDRESS_READ(hw_aips_pacrj_t, HW_AIPS_PACRJ_ADDR(x))) +#define HW_AIPS_PACRJ_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrj_t, HW_AIPS_PACRJ_ADDR(x), v)) #define HW_AIPS_PACRJ_SET(x, v) (HW_AIPS_PACRJ_WR(x, HW_AIPS_PACRJ_RD(x) | (v))) #define HW_AIPS_PACRJ_CLR(x, v) (HW_AIPS_PACRJ_WR(x, HW_AIPS_PACRJ_RD(x) & ~(v))) #define HW_AIPS_PACRJ_TOG(x, v) (HW_AIPS_PACRJ_WR(x, HW_AIPS_PACRJ_RD(x) ^ (v))) @@ -7271,13 +7278,13 @@ #define BS_AIPS_PACRJ_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP7. */ /*! @brief Read current value of the AIPS_PACRJ_TP7 field. */ -#define BR_AIPS_PACRJ_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP7)) +#define BR_AIPS_PACRJ_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP7))) /*! @brief Format value for bitfield AIPS_PACRJ_TP7. */ #define BF_AIPS_PACRJ_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP7) & BM_AIPS_PACRJ_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRJ_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP7) = (v)) +#define BW_AIPS_PACRJ_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP7), v)) /*@}*/ /*! @@ -7297,13 +7304,13 @@ #define BS_AIPS_PACRJ_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP7. */ /*! @brief Read current value of the AIPS_PACRJ_WP7 field. */ -#define BR_AIPS_PACRJ_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP7)) +#define BR_AIPS_PACRJ_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP7))) /*! @brief Format value for bitfield AIPS_PACRJ_WP7. */ #define BF_AIPS_PACRJ_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP7) & BM_AIPS_PACRJ_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRJ_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP7) = (v)) +#define BW_AIPS_PACRJ_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP7), v)) /*@}*/ /*! @@ -7326,13 +7333,13 @@ #define BS_AIPS_PACRJ_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP7. */ /*! @brief Read current value of the AIPS_PACRJ_SP7 field. */ -#define BR_AIPS_PACRJ_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP7)) +#define BR_AIPS_PACRJ_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP7))) /*! @brief Format value for bitfield AIPS_PACRJ_SP7. */ #define BF_AIPS_PACRJ_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP7) & BM_AIPS_PACRJ_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRJ_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP7) = (v)) +#define BW_AIPS_PACRJ_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP7), v)) /*@}*/ /*! @@ -7352,13 +7359,13 @@ #define BS_AIPS_PACRJ_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP6. */ /*! @brief Read current value of the AIPS_PACRJ_TP6 field. */ -#define BR_AIPS_PACRJ_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP6)) +#define BR_AIPS_PACRJ_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP6))) /*! @brief Format value for bitfield AIPS_PACRJ_TP6. */ #define BF_AIPS_PACRJ_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP6) & BM_AIPS_PACRJ_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRJ_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP6) = (v)) +#define BW_AIPS_PACRJ_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP6), v)) /*@}*/ /*! @@ -7378,13 +7385,13 @@ #define BS_AIPS_PACRJ_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP6. */ /*! @brief Read current value of the AIPS_PACRJ_WP6 field. */ -#define BR_AIPS_PACRJ_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP6)) +#define BR_AIPS_PACRJ_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP6))) /*! @brief Format value for bitfield AIPS_PACRJ_WP6. */ #define BF_AIPS_PACRJ_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP6) & BM_AIPS_PACRJ_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRJ_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP6) = (v)) +#define BW_AIPS_PACRJ_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP6), v)) /*@}*/ /*! @@ -7407,13 +7414,13 @@ #define BS_AIPS_PACRJ_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP6. */ /*! @brief Read current value of the AIPS_PACRJ_SP6 field. */ -#define BR_AIPS_PACRJ_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP6)) +#define BR_AIPS_PACRJ_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP6))) /*! @brief Format value for bitfield AIPS_PACRJ_SP6. */ #define BF_AIPS_PACRJ_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP6) & BM_AIPS_PACRJ_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRJ_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP6) = (v)) +#define BW_AIPS_PACRJ_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP6), v)) /*@}*/ /*! @@ -7433,13 +7440,13 @@ #define BS_AIPS_PACRJ_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP5. */ /*! @brief Read current value of the AIPS_PACRJ_TP5 field. */ -#define BR_AIPS_PACRJ_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP5)) +#define BR_AIPS_PACRJ_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP5))) /*! @brief Format value for bitfield AIPS_PACRJ_TP5. */ #define BF_AIPS_PACRJ_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP5) & BM_AIPS_PACRJ_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRJ_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP5) = (v)) +#define BW_AIPS_PACRJ_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP5), v)) /*@}*/ /*! @@ -7459,13 +7466,13 @@ #define BS_AIPS_PACRJ_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP5. */ /*! @brief Read current value of the AIPS_PACRJ_WP5 field. */ -#define BR_AIPS_PACRJ_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP5)) +#define BR_AIPS_PACRJ_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP5))) /*! @brief Format value for bitfield AIPS_PACRJ_WP5. */ #define BF_AIPS_PACRJ_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP5) & BM_AIPS_PACRJ_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRJ_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP5) = (v)) +#define BW_AIPS_PACRJ_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP5), v)) /*@}*/ /*! @@ -7488,13 +7495,13 @@ #define BS_AIPS_PACRJ_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP5. */ /*! @brief Read current value of the AIPS_PACRJ_SP5 field. */ -#define BR_AIPS_PACRJ_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP5)) +#define BR_AIPS_PACRJ_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP5))) /*! @brief Format value for bitfield AIPS_PACRJ_SP5. */ #define BF_AIPS_PACRJ_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP5) & BM_AIPS_PACRJ_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRJ_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP5) = (v)) +#define BW_AIPS_PACRJ_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP5), v)) /*@}*/ /*! @@ -7514,13 +7521,13 @@ #define BS_AIPS_PACRJ_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP4. */ /*! @brief Read current value of the AIPS_PACRJ_TP4 field. */ -#define BR_AIPS_PACRJ_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP4)) +#define BR_AIPS_PACRJ_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP4))) /*! @brief Format value for bitfield AIPS_PACRJ_TP4. */ #define BF_AIPS_PACRJ_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP4) & BM_AIPS_PACRJ_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRJ_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP4) = (v)) +#define BW_AIPS_PACRJ_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP4), v)) /*@}*/ /*! @@ -7540,13 +7547,13 @@ #define BS_AIPS_PACRJ_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP4. */ /*! @brief Read current value of the AIPS_PACRJ_WP4 field. */ -#define BR_AIPS_PACRJ_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP4)) +#define BR_AIPS_PACRJ_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP4))) /*! @brief Format value for bitfield AIPS_PACRJ_WP4. */ #define BF_AIPS_PACRJ_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP4) & BM_AIPS_PACRJ_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRJ_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP4) = (v)) +#define BW_AIPS_PACRJ_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP4), v)) /*@}*/ /*! @@ -7569,13 +7576,13 @@ #define BS_AIPS_PACRJ_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP4. */ /*! @brief Read current value of the AIPS_PACRJ_SP4 field. */ -#define BR_AIPS_PACRJ_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP4)) +#define BR_AIPS_PACRJ_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP4))) /*! @brief Format value for bitfield AIPS_PACRJ_SP4. */ #define BF_AIPS_PACRJ_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP4) & BM_AIPS_PACRJ_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRJ_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP4) = (v)) +#define BW_AIPS_PACRJ_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP4), v)) /*@}*/ /*! @@ -7595,13 +7602,13 @@ #define BS_AIPS_PACRJ_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP3. */ /*! @brief Read current value of the AIPS_PACRJ_TP3 field. */ -#define BR_AIPS_PACRJ_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP3)) +#define BR_AIPS_PACRJ_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP3))) /*! @brief Format value for bitfield AIPS_PACRJ_TP3. */ #define BF_AIPS_PACRJ_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP3) & BM_AIPS_PACRJ_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRJ_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP3) = (v)) +#define BW_AIPS_PACRJ_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP3), v)) /*@}*/ /*! @@ -7621,13 +7628,13 @@ #define BS_AIPS_PACRJ_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP3. */ /*! @brief Read current value of the AIPS_PACRJ_WP3 field. */ -#define BR_AIPS_PACRJ_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP3)) +#define BR_AIPS_PACRJ_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP3))) /*! @brief Format value for bitfield AIPS_PACRJ_WP3. */ #define BF_AIPS_PACRJ_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP3) & BM_AIPS_PACRJ_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRJ_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP3) = (v)) +#define BW_AIPS_PACRJ_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP3), v)) /*@}*/ /*! @@ -7650,13 +7657,13 @@ #define BS_AIPS_PACRJ_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP3. */ /*! @brief Read current value of the AIPS_PACRJ_SP3 field. */ -#define BR_AIPS_PACRJ_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP3)) +#define BR_AIPS_PACRJ_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP3))) /*! @brief Format value for bitfield AIPS_PACRJ_SP3. */ #define BF_AIPS_PACRJ_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP3) & BM_AIPS_PACRJ_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRJ_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP3) = (v)) +#define BW_AIPS_PACRJ_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP3), v)) /*@}*/ /*! @@ -7676,13 +7683,13 @@ #define BS_AIPS_PACRJ_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP2. */ /*! @brief Read current value of the AIPS_PACRJ_TP2 field. */ -#define BR_AIPS_PACRJ_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP2)) +#define BR_AIPS_PACRJ_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP2))) /*! @brief Format value for bitfield AIPS_PACRJ_TP2. */ #define BF_AIPS_PACRJ_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP2) & BM_AIPS_PACRJ_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRJ_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP2) = (v)) +#define BW_AIPS_PACRJ_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP2), v)) /*@}*/ /*! @@ -7702,13 +7709,13 @@ #define BS_AIPS_PACRJ_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP2. */ /*! @brief Read current value of the AIPS_PACRJ_WP2 field. */ -#define BR_AIPS_PACRJ_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP2)) +#define BR_AIPS_PACRJ_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP2))) /*! @brief Format value for bitfield AIPS_PACRJ_WP2. */ #define BF_AIPS_PACRJ_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP2) & BM_AIPS_PACRJ_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRJ_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP2) = (v)) +#define BW_AIPS_PACRJ_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP2), v)) /*@}*/ /*! @@ -7731,13 +7738,13 @@ #define BS_AIPS_PACRJ_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP2. */ /*! @brief Read current value of the AIPS_PACRJ_SP2 field. */ -#define BR_AIPS_PACRJ_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP2)) +#define BR_AIPS_PACRJ_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP2))) /*! @brief Format value for bitfield AIPS_PACRJ_SP2. */ #define BF_AIPS_PACRJ_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP2) & BM_AIPS_PACRJ_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRJ_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP2) = (v)) +#define BW_AIPS_PACRJ_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP2), v)) /*@}*/ /*! @@ -7757,13 +7764,13 @@ #define BS_AIPS_PACRJ_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP1. */ /*! @brief Read current value of the AIPS_PACRJ_TP1 field. */ -#define BR_AIPS_PACRJ_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP1)) +#define BR_AIPS_PACRJ_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP1))) /*! @brief Format value for bitfield AIPS_PACRJ_TP1. */ #define BF_AIPS_PACRJ_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP1) & BM_AIPS_PACRJ_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRJ_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP1) = (v)) +#define BW_AIPS_PACRJ_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP1), v)) /*@}*/ /*! @@ -7783,13 +7790,13 @@ #define BS_AIPS_PACRJ_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP1. */ /*! @brief Read current value of the AIPS_PACRJ_WP1 field. */ -#define BR_AIPS_PACRJ_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP1)) +#define BR_AIPS_PACRJ_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP1))) /*! @brief Format value for bitfield AIPS_PACRJ_WP1. */ #define BF_AIPS_PACRJ_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP1) & BM_AIPS_PACRJ_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRJ_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP1) = (v)) +#define BW_AIPS_PACRJ_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP1), v)) /*@}*/ /*! @@ -7812,13 +7819,13 @@ #define BS_AIPS_PACRJ_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP1. */ /*! @brief Read current value of the AIPS_PACRJ_SP1 field. */ -#define BR_AIPS_PACRJ_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP1)) +#define BR_AIPS_PACRJ_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP1))) /*! @brief Format value for bitfield AIPS_PACRJ_SP1. */ #define BF_AIPS_PACRJ_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP1) & BM_AIPS_PACRJ_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRJ_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP1) = (v)) +#define BW_AIPS_PACRJ_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP1), v)) /*@}*/ /*! @@ -7838,13 +7845,13 @@ #define BS_AIPS_PACRJ_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP0. */ /*! @brief Read current value of the AIPS_PACRJ_TP0 field. */ -#define BR_AIPS_PACRJ_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP0)) +#define BR_AIPS_PACRJ_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP0))) /*! @brief Format value for bitfield AIPS_PACRJ_TP0. */ #define BF_AIPS_PACRJ_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP0) & BM_AIPS_PACRJ_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRJ_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP0) = (v)) +#define BW_AIPS_PACRJ_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP0), v)) /*@}*/ /*! @@ -7864,13 +7871,13 @@ #define BS_AIPS_PACRJ_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP0. */ /*! @brief Read current value of the AIPS_PACRJ_WP0 field. */ -#define BR_AIPS_PACRJ_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP0)) +#define BR_AIPS_PACRJ_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP0))) /*! @brief Format value for bitfield AIPS_PACRJ_WP0. */ #define BF_AIPS_PACRJ_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP0) & BM_AIPS_PACRJ_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRJ_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP0) = (v)) +#define BW_AIPS_PACRJ_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP0), v)) /*@}*/ /*! @@ -7893,13 +7900,13 @@ #define BS_AIPS_PACRJ_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP0. */ /*! @brief Read current value of the AIPS_PACRJ_SP0 field. */ -#define BR_AIPS_PACRJ_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP0)) +#define BR_AIPS_PACRJ_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP0))) /*! @brief Format value for bitfield AIPS_PACRJ_SP0. */ #define BF_AIPS_PACRJ_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP0) & BM_AIPS_PACRJ_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRJ_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP0) = (v)) +#define BW_AIPS_PACRJ_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP0), v)) /*@}*/ /******************************************************************************* @@ -7962,8 +7969,8 @@ #define HW_AIPS_PACRK_ADDR(x) ((x) + 0x58U) #define HW_AIPS_PACRK(x) (*(__IO hw_aips_pacrk_t *) HW_AIPS_PACRK_ADDR(x)) -#define HW_AIPS_PACRK_RD(x) (HW_AIPS_PACRK(x).U) -#define HW_AIPS_PACRK_WR(x, v) (HW_AIPS_PACRK(x).U = (v)) +#define HW_AIPS_PACRK_RD(x) (ADDRESS_READ(hw_aips_pacrk_t, HW_AIPS_PACRK_ADDR(x))) +#define HW_AIPS_PACRK_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrk_t, HW_AIPS_PACRK_ADDR(x), v)) #define HW_AIPS_PACRK_SET(x, v) (HW_AIPS_PACRK_WR(x, HW_AIPS_PACRK_RD(x) | (v))) #define HW_AIPS_PACRK_CLR(x, v) (HW_AIPS_PACRK_WR(x, HW_AIPS_PACRK_RD(x) & ~(v))) #define HW_AIPS_PACRK_TOG(x, v) (HW_AIPS_PACRK_WR(x, HW_AIPS_PACRK_RD(x) ^ (v))) @@ -7990,13 +7997,13 @@ #define BS_AIPS_PACRK_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP7. */ /*! @brief Read current value of the AIPS_PACRK_TP7 field. */ -#define BR_AIPS_PACRK_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP7)) +#define BR_AIPS_PACRK_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP7))) /*! @brief Format value for bitfield AIPS_PACRK_TP7. */ #define BF_AIPS_PACRK_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP7) & BM_AIPS_PACRK_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRK_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP7) = (v)) +#define BW_AIPS_PACRK_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP7), v)) /*@}*/ /*! @@ -8016,13 +8023,13 @@ #define BS_AIPS_PACRK_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP7. */ /*! @brief Read current value of the AIPS_PACRK_WP7 field. */ -#define BR_AIPS_PACRK_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP7)) +#define BR_AIPS_PACRK_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP7))) /*! @brief Format value for bitfield AIPS_PACRK_WP7. */ #define BF_AIPS_PACRK_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP7) & BM_AIPS_PACRK_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRK_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP7) = (v)) +#define BW_AIPS_PACRK_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP7), v)) /*@}*/ /*! @@ -8045,13 +8052,13 @@ #define BS_AIPS_PACRK_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP7. */ /*! @brief Read current value of the AIPS_PACRK_SP7 field. */ -#define BR_AIPS_PACRK_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP7)) +#define BR_AIPS_PACRK_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP7))) /*! @brief Format value for bitfield AIPS_PACRK_SP7. */ #define BF_AIPS_PACRK_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP7) & BM_AIPS_PACRK_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRK_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP7) = (v)) +#define BW_AIPS_PACRK_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP7), v)) /*@}*/ /*! @@ -8071,13 +8078,13 @@ #define BS_AIPS_PACRK_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP6. */ /*! @brief Read current value of the AIPS_PACRK_TP6 field. */ -#define BR_AIPS_PACRK_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP6)) +#define BR_AIPS_PACRK_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP6))) /*! @brief Format value for bitfield AIPS_PACRK_TP6. */ #define BF_AIPS_PACRK_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP6) & BM_AIPS_PACRK_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRK_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP6) = (v)) +#define BW_AIPS_PACRK_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP6), v)) /*@}*/ /*! @@ -8097,13 +8104,13 @@ #define BS_AIPS_PACRK_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP6. */ /*! @brief Read current value of the AIPS_PACRK_WP6 field. */ -#define BR_AIPS_PACRK_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP6)) +#define BR_AIPS_PACRK_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP6))) /*! @brief Format value for bitfield AIPS_PACRK_WP6. */ #define BF_AIPS_PACRK_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP6) & BM_AIPS_PACRK_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRK_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP6) = (v)) +#define BW_AIPS_PACRK_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP6), v)) /*@}*/ /*! @@ -8126,13 +8133,13 @@ #define BS_AIPS_PACRK_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP6. */ /*! @brief Read current value of the AIPS_PACRK_SP6 field. */ -#define BR_AIPS_PACRK_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP6)) +#define BR_AIPS_PACRK_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP6))) /*! @brief Format value for bitfield AIPS_PACRK_SP6. */ #define BF_AIPS_PACRK_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP6) & BM_AIPS_PACRK_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRK_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP6) = (v)) +#define BW_AIPS_PACRK_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP6), v)) /*@}*/ /*! @@ -8152,13 +8159,13 @@ #define BS_AIPS_PACRK_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP5. */ /*! @brief Read current value of the AIPS_PACRK_TP5 field. */ -#define BR_AIPS_PACRK_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP5)) +#define BR_AIPS_PACRK_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP5))) /*! @brief Format value for bitfield AIPS_PACRK_TP5. */ #define BF_AIPS_PACRK_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP5) & BM_AIPS_PACRK_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRK_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP5) = (v)) +#define BW_AIPS_PACRK_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP5), v)) /*@}*/ /*! @@ -8178,13 +8185,13 @@ #define BS_AIPS_PACRK_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP5. */ /*! @brief Read current value of the AIPS_PACRK_WP5 field. */ -#define BR_AIPS_PACRK_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP5)) +#define BR_AIPS_PACRK_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP5))) /*! @brief Format value for bitfield AIPS_PACRK_WP5. */ #define BF_AIPS_PACRK_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP5) & BM_AIPS_PACRK_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRK_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP5) = (v)) +#define BW_AIPS_PACRK_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP5), v)) /*@}*/ /*! @@ -8207,13 +8214,13 @@ #define BS_AIPS_PACRK_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP5. */ /*! @brief Read current value of the AIPS_PACRK_SP5 field. */ -#define BR_AIPS_PACRK_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP5)) +#define BR_AIPS_PACRK_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP5))) /*! @brief Format value for bitfield AIPS_PACRK_SP5. */ #define BF_AIPS_PACRK_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP5) & BM_AIPS_PACRK_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRK_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP5) = (v)) +#define BW_AIPS_PACRK_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP5), v)) /*@}*/ /*! @@ -8233,13 +8240,13 @@ #define BS_AIPS_PACRK_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP4. */ /*! @brief Read current value of the AIPS_PACRK_TP4 field. */ -#define BR_AIPS_PACRK_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP4)) +#define BR_AIPS_PACRK_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP4))) /*! @brief Format value for bitfield AIPS_PACRK_TP4. */ #define BF_AIPS_PACRK_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP4) & BM_AIPS_PACRK_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRK_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP4) = (v)) +#define BW_AIPS_PACRK_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP4), v)) /*@}*/ /*! @@ -8259,13 +8266,13 @@ #define BS_AIPS_PACRK_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP4. */ /*! @brief Read current value of the AIPS_PACRK_WP4 field. */ -#define BR_AIPS_PACRK_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP4)) +#define BR_AIPS_PACRK_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP4))) /*! @brief Format value for bitfield AIPS_PACRK_WP4. */ #define BF_AIPS_PACRK_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP4) & BM_AIPS_PACRK_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRK_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP4) = (v)) +#define BW_AIPS_PACRK_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP4), v)) /*@}*/ /*! @@ -8288,13 +8295,13 @@ #define BS_AIPS_PACRK_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP4. */ /*! @brief Read current value of the AIPS_PACRK_SP4 field. */ -#define BR_AIPS_PACRK_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP4)) +#define BR_AIPS_PACRK_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP4))) /*! @brief Format value for bitfield AIPS_PACRK_SP4. */ #define BF_AIPS_PACRK_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP4) & BM_AIPS_PACRK_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRK_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP4) = (v)) +#define BW_AIPS_PACRK_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP4), v)) /*@}*/ /*! @@ -8314,13 +8321,13 @@ #define BS_AIPS_PACRK_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP3. */ /*! @brief Read current value of the AIPS_PACRK_TP3 field. */ -#define BR_AIPS_PACRK_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP3)) +#define BR_AIPS_PACRK_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP3))) /*! @brief Format value for bitfield AIPS_PACRK_TP3. */ #define BF_AIPS_PACRK_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP3) & BM_AIPS_PACRK_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRK_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP3) = (v)) +#define BW_AIPS_PACRK_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP3), v)) /*@}*/ /*! @@ -8340,13 +8347,13 @@ #define BS_AIPS_PACRK_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP3. */ /*! @brief Read current value of the AIPS_PACRK_WP3 field. */ -#define BR_AIPS_PACRK_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP3)) +#define BR_AIPS_PACRK_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP3))) /*! @brief Format value for bitfield AIPS_PACRK_WP3. */ #define BF_AIPS_PACRK_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP3) & BM_AIPS_PACRK_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRK_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP3) = (v)) +#define BW_AIPS_PACRK_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP3), v)) /*@}*/ /*! @@ -8369,13 +8376,13 @@ #define BS_AIPS_PACRK_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP3. */ /*! @brief Read current value of the AIPS_PACRK_SP3 field. */ -#define BR_AIPS_PACRK_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP3)) +#define BR_AIPS_PACRK_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP3))) /*! @brief Format value for bitfield AIPS_PACRK_SP3. */ #define BF_AIPS_PACRK_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP3) & BM_AIPS_PACRK_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRK_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP3) = (v)) +#define BW_AIPS_PACRK_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP3), v)) /*@}*/ /*! @@ -8395,13 +8402,13 @@ #define BS_AIPS_PACRK_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP2. */ /*! @brief Read current value of the AIPS_PACRK_TP2 field. */ -#define BR_AIPS_PACRK_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP2)) +#define BR_AIPS_PACRK_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP2))) /*! @brief Format value for bitfield AIPS_PACRK_TP2. */ #define BF_AIPS_PACRK_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP2) & BM_AIPS_PACRK_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRK_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP2) = (v)) +#define BW_AIPS_PACRK_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP2), v)) /*@}*/ /*! @@ -8421,13 +8428,13 @@ #define BS_AIPS_PACRK_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP2. */ /*! @brief Read current value of the AIPS_PACRK_WP2 field. */ -#define BR_AIPS_PACRK_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP2)) +#define BR_AIPS_PACRK_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP2))) /*! @brief Format value for bitfield AIPS_PACRK_WP2. */ #define BF_AIPS_PACRK_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP2) & BM_AIPS_PACRK_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRK_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP2) = (v)) +#define BW_AIPS_PACRK_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP2), v)) /*@}*/ /*! @@ -8450,13 +8457,13 @@ #define BS_AIPS_PACRK_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP2. */ /*! @brief Read current value of the AIPS_PACRK_SP2 field. */ -#define BR_AIPS_PACRK_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP2)) +#define BR_AIPS_PACRK_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP2))) /*! @brief Format value for bitfield AIPS_PACRK_SP2. */ #define BF_AIPS_PACRK_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP2) & BM_AIPS_PACRK_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRK_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP2) = (v)) +#define BW_AIPS_PACRK_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP2), v)) /*@}*/ /*! @@ -8476,13 +8483,13 @@ #define BS_AIPS_PACRK_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP1. */ /*! @brief Read current value of the AIPS_PACRK_TP1 field. */ -#define BR_AIPS_PACRK_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP1)) +#define BR_AIPS_PACRK_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP1))) /*! @brief Format value for bitfield AIPS_PACRK_TP1. */ #define BF_AIPS_PACRK_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP1) & BM_AIPS_PACRK_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRK_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP1) = (v)) +#define BW_AIPS_PACRK_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP1), v)) /*@}*/ /*! @@ -8502,13 +8509,13 @@ #define BS_AIPS_PACRK_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP1. */ /*! @brief Read current value of the AIPS_PACRK_WP1 field. */ -#define BR_AIPS_PACRK_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP1)) +#define BR_AIPS_PACRK_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP1))) /*! @brief Format value for bitfield AIPS_PACRK_WP1. */ #define BF_AIPS_PACRK_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP1) & BM_AIPS_PACRK_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRK_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP1) = (v)) +#define BW_AIPS_PACRK_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP1), v)) /*@}*/ /*! @@ -8531,13 +8538,13 @@ #define BS_AIPS_PACRK_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP1. */ /*! @brief Read current value of the AIPS_PACRK_SP1 field. */ -#define BR_AIPS_PACRK_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP1)) +#define BR_AIPS_PACRK_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP1))) /*! @brief Format value for bitfield AIPS_PACRK_SP1. */ #define BF_AIPS_PACRK_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP1) & BM_AIPS_PACRK_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRK_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP1) = (v)) +#define BW_AIPS_PACRK_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP1), v)) /*@}*/ /*! @@ -8557,13 +8564,13 @@ #define BS_AIPS_PACRK_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP0. */ /*! @brief Read current value of the AIPS_PACRK_TP0 field. */ -#define BR_AIPS_PACRK_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP0)) +#define BR_AIPS_PACRK_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP0))) /*! @brief Format value for bitfield AIPS_PACRK_TP0. */ #define BF_AIPS_PACRK_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP0) & BM_AIPS_PACRK_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRK_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP0) = (v)) +#define BW_AIPS_PACRK_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP0), v)) /*@}*/ /*! @@ -8583,13 +8590,13 @@ #define BS_AIPS_PACRK_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP0. */ /*! @brief Read current value of the AIPS_PACRK_WP0 field. */ -#define BR_AIPS_PACRK_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP0)) +#define BR_AIPS_PACRK_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP0))) /*! @brief Format value for bitfield AIPS_PACRK_WP0. */ #define BF_AIPS_PACRK_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP0) & BM_AIPS_PACRK_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRK_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP0) = (v)) +#define BW_AIPS_PACRK_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP0), v)) /*@}*/ /*! @@ -8612,13 +8619,13 @@ #define BS_AIPS_PACRK_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP0. */ /*! @brief Read current value of the AIPS_PACRK_SP0 field. */ -#define BR_AIPS_PACRK_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP0)) +#define BR_AIPS_PACRK_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP0))) /*! @brief Format value for bitfield AIPS_PACRK_SP0. */ #define BF_AIPS_PACRK_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP0) & BM_AIPS_PACRK_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRK_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP0) = (v)) +#define BW_AIPS_PACRK_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP0), v)) /*@}*/ /******************************************************************************* @@ -8681,8 +8688,8 @@ #define HW_AIPS_PACRL_ADDR(x) ((x) + 0x5CU) #define HW_AIPS_PACRL(x) (*(__IO hw_aips_pacrl_t *) HW_AIPS_PACRL_ADDR(x)) -#define HW_AIPS_PACRL_RD(x) (HW_AIPS_PACRL(x).U) -#define HW_AIPS_PACRL_WR(x, v) (HW_AIPS_PACRL(x).U = (v)) +#define HW_AIPS_PACRL_RD(x) (ADDRESS_READ(hw_aips_pacrl_t, HW_AIPS_PACRL_ADDR(x))) +#define HW_AIPS_PACRL_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrl_t, HW_AIPS_PACRL_ADDR(x), v)) #define HW_AIPS_PACRL_SET(x, v) (HW_AIPS_PACRL_WR(x, HW_AIPS_PACRL_RD(x) | (v))) #define HW_AIPS_PACRL_CLR(x, v) (HW_AIPS_PACRL_WR(x, HW_AIPS_PACRL_RD(x) & ~(v))) #define HW_AIPS_PACRL_TOG(x, v) (HW_AIPS_PACRL_WR(x, HW_AIPS_PACRL_RD(x) ^ (v))) @@ -8709,13 +8716,13 @@ #define BS_AIPS_PACRL_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP7. */ /*! @brief Read current value of the AIPS_PACRL_TP7 field. */ -#define BR_AIPS_PACRL_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP7)) +#define BR_AIPS_PACRL_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP7))) /*! @brief Format value for bitfield AIPS_PACRL_TP7. */ #define BF_AIPS_PACRL_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP7) & BM_AIPS_PACRL_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRL_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP7) = (v)) +#define BW_AIPS_PACRL_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP7), v)) /*@}*/ /*! @@ -8735,13 +8742,13 @@ #define BS_AIPS_PACRL_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP7. */ /*! @brief Read current value of the AIPS_PACRL_WP7 field. */ -#define BR_AIPS_PACRL_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP7)) +#define BR_AIPS_PACRL_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP7))) /*! @brief Format value for bitfield AIPS_PACRL_WP7. */ #define BF_AIPS_PACRL_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP7) & BM_AIPS_PACRL_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRL_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP7) = (v)) +#define BW_AIPS_PACRL_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP7), v)) /*@}*/ /*! @@ -8764,13 +8771,13 @@ #define BS_AIPS_PACRL_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP7. */ /*! @brief Read current value of the AIPS_PACRL_SP7 field. */ -#define BR_AIPS_PACRL_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP7)) +#define BR_AIPS_PACRL_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP7))) /*! @brief Format value for bitfield AIPS_PACRL_SP7. */ #define BF_AIPS_PACRL_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP7) & BM_AIPS_PACRL_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRL_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP7) = (v)) +#define BW_AIPS_PACRL_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP7), v)) /*@}*/ /*! @@ -8790,13 +8797,13 @@ #define BS_AIPS_PACRL_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP6. */ /*! @brief Read current value of the AIPS_PACRL_TP6 field. */ -#define BR_AIPS_PACRL_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP6)) +#define BR_AIPS_PACRL_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP6))) /*! @brief Format value for bitfield AIPS_PACRL_TP6. */ #define BF_AIPS_PACRL_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP6) & BM_AIPS_PACRL_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRL_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP6) = (v)) +#define BW_AIPS_PACRL_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP6), v)) /*@}*/ /*! @@ -8816,13 +8823,13 @@ #define BS_AIPS_PACRL_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP6. */ /*! @brief Read current value of the AIPS_PACRL_WP6 field. */ -#define BR_AIPS_PACRL_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP6)) +#define BR_AIPS_PACRL_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP6))) /*! @brief Format value for bitfield AIPS_PACRL_WP6. */ #define BF_AIPS_PACRL_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP6) & BM_AIPS_PACRL_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRL_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP6) = (v)) +#define BW_AIPS_PACRL_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP6), v)) /*@}*/ /*! @@ -8845,13 +8852,13 @@ #define BS_AIPS_PACRL_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP6. */ /*! @brief Read current value of the AIPS_PACRL_SP6 field. */ -#define BR_AIPS_PACRL_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP6)) +#define BR_AIPS_PACRL_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP6))) /*! @brief Format value for bitfield AIPS_PACRL_SP6. */ #define BF_AIPS_PACRL_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP6) & BM_AIPS_PACRL_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRL_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP6) = (v)) +#define BW_AIPS_PACRL_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP6), v)) /*@}*/ /*! @@ -8871,13 +8878,13 @@ #define BS_AIPS_PACRL_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP5. */ /*! @brief Read current value of the AIPS_PACRL_TP5 field. */ -#define BR_AIPS_PACRL_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP5)) +#define BR_AIPS_PACRL_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP5))) /*! @brief Format value for bitfield AIPS_PACRL_TP5. */ #define BF_AIPS_PACRL_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP5) & BM_AIPS_PACRL_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRL_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP5) = (v)) +#define BW_AIPS_PACRL_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP5), v)) /*@}*/ /*! @@ -8897,13 +8904,13 @@ #define BS_AIPS_PACRL_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP5. */ /*! @brief Read current value of the AIPS_PACRL_WP5 field. */ -#define BR_AIPS_PACRL_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP5)) +#define BR_AIPS_PACRL_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP5))) /*! @brief Format value for bitfield AIPS_PACRL_WP5. */ #define BF_AIPS_PACRL_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP5) & BM_AIPS_PACRL_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRL_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP5) = (v)) +#define BW_AIPS_PACRL_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP5), v)) /*@}*/ /*! @@ -8926,13 +8933,13 @@ #define BS_AIPS_PACRL_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP5. */ /*! @brief Read current value of the AIPS_PACRL_SP5 field. */ -#define BR_AIPS_PACRL_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP5)) +#define BR_AIPS_PACRL_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP5))) /*! @brief Format value for bitfield AIPS_PACRL_SP5. */ #define BF_AIPS_PACRL_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP5) & BM_AIPS_PACRL_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRL_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP5) = (v)) +#define BW_AIPS_PACRL_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP5), v)) /*@}*/ /*! @@ -8952,13 +8959,13 @@ #define BS_AIPS_PACRL_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP4. */ /*! @brief Read current value of the AIPS_PACRL_TP4 field. */ -#define BR_AIPS_PACRL_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP4)) +#define BR_AIPS_PACRL_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP4))) /*! @brief Format value for bitfield AIPS_PACRL_TP4. */ #define BF_AIPS_PACRL_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP4) & BM_AIPS_PACRL_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRL_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP4) = (v)) +#define BW_AIPS_PACRL_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP4), v)) /*@}*/ /*! @@ -8978,13 +8985,13 @@ #define BS_AIPS_PACRL_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP4. */ /*! @brief Read current value of the AIPS_PACRL_WP4 field. */ -#define BR_AIPS_PACRL_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP4)) +#define BR_AIPS_PACRL_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP4))) /*! @brief Format value for bitfield AIPS_PACRL_WP4. */ #define BF_AIPS_PACRL_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP4) & BM_AIPS_PACRL_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRL_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP4) = (v)) +#define BW_AIPS_PACRL_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP4), v)) /*@}*/ /*! @@ -9007,13 +9014,13 @@ #define BS_AIPS_PACRL_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP4. */ /*! @brief Read current value of the AIPS_PACRL_SP4 field. */ -#define BR_AIPS_PACRL_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP4)) +#define BR_AIPS_PACRL_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP4))) /*! @brief Format value for bitfield AIPS_PACRL_SP4. */ #define BF_AIPS_PACRL_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP4) & BM_AIPS_PACRL_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRL_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP4) = (v)) +#define BW_AIPS_PACRL_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP4), v)) /*@}*/ /*! @@ -9033,13 +9040,13 @@ #define BS_AIPS_PACRL_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP3. */ /*! @brief Read current value of the AIPS_PACRL_TP3 field. */ -#define BR_AIPS_PACRL_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP3)) +#define BR_AIPS_PACRL_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP3))) /*! @brief Format value for bitfield AIPS_PACRL_TP3. */ #define BF_AIPS_PACRL_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP3) & BM_AIPS_PACRL_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRL_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP3) = (v)) +#define BW_AIPS_PACRL_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP3), v)) /*@}*/ /*! @@ -9059,13 +9066,13 @@ #define BS_AIPS_PACRL_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP3. */ /*! @brief Read current value of the AIPS_PACRL_WP3 field. */ -#define BR_AIPS_PACRL_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP3)) +#define BR_AIPS_PACRL_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP3))) /*! @brief Format value for bitfield AIPS_PACRL_WP3. */ #define BF_AIPS_PACRL_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP3) & BM_AIPS_PACRL_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRL_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP3) = (v)) +#define BW_AIPS_PACRL_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP3), v)) /*@}*/ /*! @@ -9088,13 +9095,13 @@ #define BS_AIPS_PACRL_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP3. */ /*! @brief Read current value of the AIPS_PACRL_SP3 field. */ -#define BR_AIPS_PACRL_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP3)) +#define BR_AIPS_PACRL_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP3))) /*! @brief Format value for bitfield AIPS_PACRL_SP3. */ #define BF_AIPS_PACRL_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP3) & BM_AIPS_PACRL_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRL_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP3) = (v)) +#define BW_AIPS_PACRL_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP3), v)) /*@}*/ /*! @@ -9114,13 +9121,13 @@ #define BS_AIPS_PACRL_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP2. */ /*! @brief Read current value of the AIPS_PACRL_TP2 field. */ -#define BR_AIPS_PACRL_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP2)) +#define BR_AIPS_PACRL_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP2))) /*! @brief Format value for bitfield AIPS_PACRL_TP2. */ #define BF_AIPS_PACRL_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP2) & BM_AIPS_PACRL_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRL_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP2) = (v)) +#define BW_AIPS_PACRL_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP2), v)) /*@}*/ /*! @@ -9140,13 +9147,13 @@ #define BS_AIPS_PACRL_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP2. */ /*! @brief Read current value of the AIPS_PACRL_WP2 field. */ -#define BR_AIPS_PACRL_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP2)) +#define BR_AIPS_PACRL_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP2))) /*! @brief Format value for bitfield AIPS_PACRL_WP2. */ #define BF_AIPS_PACRL_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP2) & BM_AIPS_PACRL_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRL_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP2) = (v)) +#define BW_AIPS_PACRL_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP2), v)) /*@}*/ /*! @@ -9169,13 +9176,13 @@ #define BS_AIPS_PACRL_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP2. */ /*! @brief Read current value of the AIPS_PACRL_SP2 field. */ -#define BR_AIPS_PACRL_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP2)) +#define BR_AIPS_PACRL_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP2))) /*! @brief Format value for bitfield AIPS_PACRL_SP2. */ #define BF_AIPS_PACRL_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP2) & BM_AIPS_PACRL_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRL_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP2) = (v)) +#define BW_AIPS_PACRL_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP2), v)) /*@}*/ /*! @@ -9195,13 +9202,13 @@ #define BS_AIPS_PACRL_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP1. */ /*! @brief Read current value of the AIPS_PACRL_TP1 field. */ -#define BR_AIPS_PACRL_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP1)) +#define BR_AIPS_PACRL_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP1))) /*! @brief Format value for bitfield AIPS_PACRL_TP1. */ #define BF_AIPS_PACRL_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP1) & BM_AIPS_PACRL_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRL_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP1) = (v)) +#define BW_AIPS_PACRL_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP1), v)) /*@}*/ /*! @@ -9221,13 +9228,13 @@ #define BS_AIPS_PACRL_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP1. */ /*! @brief Read current value of the AIPS_PACRL_WP1 field. */ -#define BR_AIPS_PACRL_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP1)) +#define BR_AIPS_PACRL_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP1))) /*! @brief Format value for bitfield AIPS_PACRL_WP1. */ #define BF_AIPS_PACRL_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP1) & BM_AIPS_PACRL_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRL_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP1) = (v)) +#define BW_AIPS_PACRL_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP1), v)) /*@}*/ /*! @@ -9250,13 +9257,13 @@ #define BS_AIPS_PACRL_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP1. */ /*! @brief Read current value of the AIPS_PACRL_SP1 field. */ -#define BR_AIPS_PACRL_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP1)) +#define BR_AIPS_PACRL_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP1))) /*! @brief Format value for bitfield AIPS_PACRL_SP1. */ #define BF_AIPS_PACRL_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP1) & BM_AIPS_PACRL_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRL_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP1) = (v)) +#define BW_AIPS_PACRL_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP1), v)) /*@}*/ /*! @@ -9276,13 +9283,13 @@ #define BS_AIPS_PACRL_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP0. */ /*! @brief Read current value of the AIPS_PACRL_TP0 field. */ -#define BR_AIPS_PACRL_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP0)) +#define BR_AIPS_PACRL_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP0))) /*! @brief Format value for bitfield AIPS_PACRL_TP0. */ #define BF_AIPS_PACRL_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP0) & BM_AIPS_PACRL_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRL_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP0) = (v)) +#define BW_AIPS_PACRL_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP0), v)) /*@}*/ /*! @@ -9302,13 +9309,13 @@ #define BS_AIPS_PACRL_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP0. */ /*! @brief Read current value of the AIPS_PACRL_WP0 field. */ -#define BR_AIPS_PACRL_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP0)) +#define BR_AIPS_PACRL_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP0))) /*! @brief Format value for bitfield AIPS_PACRL_WP0. */ #define BF_AIPS_PACRL_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP0) & BM_AIPS_PACRL_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRL_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP0) = (v)) +#define BW_AIPS_PACRL_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP0), v)) /*@}*/ /*! @@ -9331,13 +9338,13 @@ #define BS_AIPS_PACRL_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP0. */ /*! @brief Read current value of the AIPS_PACRL_SP0 field. */ -#define BR_AIPS_PACRL_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP0)) +#define BR_AIPS_PACRL_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP0))) /*! @brief Format value for bitfield AIPS_PACRL_SP0. */ #define BF_AIPS_PACRL_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP0) & BM_AIPS_PACRL_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRL_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP0) = (v)) +#define BW_AIPS_PACRL_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP0), v)) /*@}*/ /******************************************************************************* @@ -9400,8 +9407,8 @@ #define HW_AIPS_PACRM_ADDR(x) ((x) + 0x60U) #define HW_AIPS_PACRM(x) (*(__IO hw_aips_pacrm_t *) HW_AIPS_PACRM_ADDR(x)) -#define HW_AIPS_PACRM_RD(x) (HW_AIPS_PACRM(x).U) -#define HW_AIPS_PACRM_WR(x, v) (HW_AIPS_PACRM(x).U = (v)) +#define HW_AIPS_PACRM_RD(x) (ADDRESS_READ(hw_aips_pacrm_t, HW_AIPS_PACRM_ADDR(x))) +#define HW_AIPS_PACRM_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrm_t, HW_AIPS_PACRM_ADDR(x), v)) #define HW_AIPS_PACRM_SET(x, v) (HW_AIPS_PACRM_WR(x, HW_AIPS_PACRM_RD(x) | (v))) #define HW_AIPS_PACRM_CLR(x, v) (HW_AIPS_PACRM_WR(x, HW_AIPS_PACRM_RD(x) & ~(v))) #define HW_AIPS_PACRM_TOG(x, v) (HW_AIPS_PACRM_WR(x, HW_AIPS_PACRM_RD(x) ^ (v))) @@ -9428,13 +9435,13 @@ #define BS_AIPS_PACRM_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP7. */ /*! @brief Read current value of the AIPS_PACRM_TP7 field. */ -#define BR_AIPS_PACRM_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP7)) +#define BR_AIPS_PACRM_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP7))) /*! @brief Format value for bitfield AIPS_PACRM_TP7. */ #define BF_AIPS_PACRM_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP7) & BM_AIPS_PACRM_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRM_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP7) = (v)) +#define BW_AIPS_PACRM_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP7), v)) /*@}*/ /*! @@ -9454,13 +9461,13 @@ #define BS_AIPS_PACRM_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP7. */ /*! @brief Read current value of the AIPS_PACRM_WP7 field. */ -#define BR_AIPS_PACRM_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP7)) +#define BR_AIPS_PACRM_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP7))) /*! @brief Format value for bitfield AIPS_PACRM_WP7. */ #define BF_AIPS_PACRM_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP7) & BM_AIPS_PACRM_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRM_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP7) = (v)) +#define BW_AIPS_PACRM_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP7), v)) /*@}*/ /*! @@ -9483,13 +9490,13 @@ #define BS_AIPS_PACRM_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP7. */ /*! @brief Read current value of the AIPS_PACRM_SP7 field. */ -#define BR_AIPS_PACRM_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP7)) +#define BR_AIPS_PACRM_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP7))) /*! @brief Format value for bitfield AIPS_PACRM_SP7. */ #define BF_AIPS_PACRM_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP7) & BM_AIPS_PACRM_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRM_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP7) = (v)) +#define BW_AIPS_PACRM_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP7), v)) /*@}*/ /*! @@ -9509,13 +9516,13 @@ #define BS_AIPS_PACRM_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP6. */ /*! @brief Read current value of the AIPS_PACRM_TP6 field. */ -#define BR_AIPS_PACRM_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP6)) +#define BR_AIPS_PACRM_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP6))) /*! @brief Format value for bitfield AIPS_PACRM_TP6. */ #define BF_AIPS_PACRM_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP6) & BM_AIPS_PACRM_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRM_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP6) = (v)) +#define BW_AIPS_PACRM_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP6), v)) /*@}*/ /*! @@ -9535,13 +9542,13 @@ #define BS_AIPS_PACRM_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP6. */ /*! @brief Read current value of the AIPS_PACRM_WP6 field. */ -#define BR_AIPS_PACRM_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP6)) +#define BR_AIPS_PACRM_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP6))) /*! @brief Format value for bitfield AIPS_PACRM_WP6. */ #define BF_AIPS_PACRM_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP6) & BM_AIPS_PACRM_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRM_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP6) = (v)) +#define BW_AIPS_PACRM_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP6), v)) /*@}*/ /*! @@ -9564,13 +9571,13 @@ #define BS_AIPS_PACRM_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP6. */ /*! @brief Read current value of the AIPS_PACRM_SP6 field. */ -#define BR_AIPS_PACRM_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP6)) +#define BR_AIPS_PACRM_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP6))) /*! @brief Format value for bitfield AIPS_PACRM_SP6. */ #define BF_AIPS_PACRM_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP6) & BM_AIPS_PACRM_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRM_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP6) = (v)) +#define BW_AIPS_PACRM_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP6), v)) /*@}*/ /*! @@ -9590,13 +9597,13 @@ #define BS_AIPS_PACRM_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP5. */ /*! @brief Read current value of the AIPS_PACRM_TP5 field. */ -#define BR_AIPS_PACRM_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP5)) +#define BR_AIPS_PACRM_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP5))) /*! @brief Format value for bitfield AIPS_PACRM_TP5. */ #define BF_AIPS_PACRM_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP5) & BM_AIPS_PACRM_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRM_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP5) = (v)) +#define BW_AIPS_PACRM_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP5), v)) /*@}*/ /*! @@ -9616,13 +9623,13 @@ #define BS_AIPS_PACRM_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP5. */ /*! @brief Read current value of the AIPS_PACRM_WP5 field. */ -#define BR_AIPS_PACRM_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP5)) +#define BR_AIPS_PACRM_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP5))) /*! @brief Format value for bitfield AIPS_PACRM_WP5. */ #define BF_AIPS_PACRM_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP5) & BM_AIPS_PACRM_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRM_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP5) = (v)) +#define BW_AIPS_PACRM_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP5), v)) /*@}*/ /*! @@ -9645,13 +9652,13 @@ #define BS_AIPS_PACRM_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP5. */ /*! @brief Read current value of the AIPS_PACRM_SP5 field. */ -#define BR_AIPS_PACRM_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP5)) +#define BR_AIPS_PACRM_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP5))) /*! @brief Format value for bitfield AIPS_PACRM_SP5. */ #define BF_AIPS_PACRM_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP5) & BM_AIPS_PACRM_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRM_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP5) = (v)) +#define BW_AIPS_PACRM_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP5), v)) /*@}*/ /*! @@ -9671,13 +9678,13 @@ #define BS_AIPS_PACRM_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP4. */ /*! @brief Read current value of the AIPS_PACRM_TP4 field. */ -#define BR_AIPS_PACRM_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP4)) +#define BR_AIPS_PACRM_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP4))) /*! @brief Format value for bitfield AIPS_PACRM_TP4. */ #define BF_AIPS_PACRM_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP4) & BM_AIPS_PACRM_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRM_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP4) = (v)) +#define BW_AIPS_PACRM_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP4), v)) /*@}*/ /*! @@ -9697,13 +9704,13 @@ #define BS_AIPS_PACRM_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP4. */ /*! @brief Read current value of the AIPS_PACRM_WP4 field. */ -#define BR_AIPS_PACRM_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP4)) +#define BR_AIPS_PACRM_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP4))) /*! @brief Format value for bitfield AIPS_PACRM_WP4. */ #define BF_AIPS_PACRM_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP4) & BM_AIPS_PACRM_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRM_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP4) = (v)) +#define BW_AIPS_PACRM_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP4), v)) /*@}*/ /*! @@ -9726,13 +9733,13 @@ #define BS_AIPS_PACRM_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP4. */ /*! @brief Read current value of the AIPS_PACRM_SP4 field. */ -#define BR_AIPS_PACRM_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP4)) +#define BR_AIPS_PACRM_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP4))) /*! @brief Format value for bitfield AIPS_PACRM_SP4. */ #define BF_AIPS_PACRM_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP4) & BM_AIPS_PACRM_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRM_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP4) = (v)) +#define BW_AIPS_PACRM_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP4), v)) /*@}*/ /*! @@ -9752,13 +9759,13 @@ #define BS_AIPS_PACRM_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP3. */ /*! @brief Read current value of the AIPS_PACRM_TP3 field. */ -#define BR_AIPS_PACRM_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP3)) +#define BR_AIPS_PACRM_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP3))) /*! @brief Format value for bitfield AIPS_PACRM_TP3. */ #define BF_AIPS_PACRM_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP3) & BM_AIPS_PACRM_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRM_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP3) = (v)) +#define BW_AIPS_PACRM_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP3), v)) /*@}*/ /*! @@ -9778,13 +9785,13 @@ #define BS_AIPS_PACRM_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP3. */ /*! @brief Read current value of the AIPS_PACRM_WP3 field. */ -#define BR_AIPS_PACRM_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP3)) +#define BR_AIPS_PACRM_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP3))) /*! @brief Format value for bitfield AIPS_PACRM_WP3. */ #define BF_AIPS_PACRM_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP3) & BM_AIPS_PACRM_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRM_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP3) = (v)) +#define BW_AIPS_PACRM_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP3), v)) /*@}*/ /*! @@ -9807,13 +9814,13 @@ #define BS_AIPS_PACRM_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP3. */ /*! @brief Read current value of the AIPS_PACRM_SP3 field. */ -#define BR_AIPS_PACRM_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP3)) +#define BR_AIPS_PACRM_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP3))) /*! @brief Format value for bitfield AIPS_PACRM_SP3. */ #define BF_AIPS_PACRM_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP3) & BM_AIPS_PACRM_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRM_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP3) = (v)) +#define BW_AIPS_PACRM_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP3), v)) /*@}*/ /*! @@ -9833,13 +9840,13 @@ #define BS_AIPS_PACRM_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP2. */ /*! @brief Read current value of the AIPS_PACRM_TP2 field. */ -#define BR_AIPS_PACRM_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP2)) +#define BR_AIPS_PACRM_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP2))) /*! @brief Format value for bitfield AIPS_PACRM_TP2. */ #define BF_AIPS_PACRM_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP2) & BM_AIPS_PACRM_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRM_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP2) = (v)) +#define BW_AIPS_PACRM_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP2), v)) /*@}*/ /*! @@ -9859,13 +9866,13 @@ #define BS_AIPS_PACRM_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP2. */ /*! @brief Read current value of the AIPS_PACRM_WP2 field. */ -#define BR_AIPS_PACRM_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP2)) +#define BR_AIPS_PACRM_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP2))) /*! @brief Format value for bitfield AIPS_PACRM_WP2. */ #define BF_AIPS_PACRM_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP2) & BM_AIPS_PACRM_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRM_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP2) = (v)) +#define BW_AIPS_PACRM_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP2), v)) /*@}*/ /*! @@ -9888,13 +9895,13 @@ #define BS_AIPS_PACRM_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP2. */ /*! @brief Read current value of the AIPS_PACRM_SP2 field. */ -#define BR_AIPS_PACRM_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP2)) +#define BR_AIPS_PACRM_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP2))) /*! @brief Format value for bitfield AIPS_PACRM_SP2. */ #define BF_AIPS_PACRM_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP2) & BM_AIPS_PACRM_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRM_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP2) = (v)) +#define BW_AIPS_PACRM_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP2), v)) /*@}*/ /*! @@ -9914,13 +9921,13 @@ #define BS_AIPS_PACRM_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP1. */ /*! @brief Read current value of the AIPS_PACRM_TP1 field. */ -#define BR_AIPS_PACRM_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP1)) +#define BR_AIPS_PACRM_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP1))) /*! @brief Format value for bitfield AIPS_PACRM_TP1. */ #define BF_AIPS_PACRM_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP1) & BM_AIPS_PACRM_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRM_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP1) = (v)) +#define BW_AIPS_PACRM_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP1), v)) /*@}*/ /*! @@ -9940,13 +9947,13 @@ #define BS_AIPS_PACRM_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP1. */ /*! @brief Read current value of the AIPS_PACRM_WP1 field. */ -#define BR_AIPS_PACRM_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP1)) +#define BR_AIPS_PACRM_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP1))) /*! @brief Format value for bitfield AIPS_PACRM_WP1. */ #define BF_AIPS_PACRM_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP1) & BM_AIPS_PACRM_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRM_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP1) = (v)) +#define BW_AIPS_PACRM_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP1), v)) /*@}*/ /*! @@ -9969,13 +9976,13 @@ #define BS_AIPS_PACRM_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP1. */ /*! @brief Read current value of the AIPS_PACRM_SP1 field. */ -#define BR_AIPS_PACRM_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP1)) +#define BR_AIPS_PACRM_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP1))) /*! @brief Format value for bitfield AIPS_PACRM_SP1. */ #define BF_AIPS_PACRM_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP1) & BM_AIPS_PACRM_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRM_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP1) = (v)) +#define BW_AIPS_PACRM_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP1), v)) /*@}*/ /*! @@ -9995,13 +10002,13 @@ #define BS_AIPS_PACRM_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP0. */ /*! @brief Read current value of the AIPS_PACRM_TP0 field. */ -#define BR_AIPS_PACRM_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP0)) +#define BR_AIPS_PACRM_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP0))) /*! @brief Format value for bitfield AIPS_PACRM_TP0. */ #define BF_AIPS_PACRM_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP0) & BM_AIPS_PACRM_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRM_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP0) = (v)) +#define BW_AIPS_PACRM_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP0), v)) /*@}*/ /*! @@ -10021,13 +10028,13 @@ #define BS_AIPS_PACRM_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP0. */ /*! @brief Read current value of the AIPS_PACRM_WP0 field. */ -#define BR_AIPS_PACRM_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP0)) +#define BR_AIPS_PACRM_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP0))) /*! @brief Format value for bitfield AIPS_PACRM_WP0. */ #define BF_AIPS_PACRM_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP0) & BM_AIPS_PACRM_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRM_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP0) = (v)) +#define BW_AIPS_PACRM_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP0), v)) /*@}*/ /*! @@ -10050,13 +10057,13 @@ #define BS_AIPS_PACRM_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP0. */ /*! @brief Read current value of the AIPS_PACRM_SP0 field. */ -#define BR_AIPS_PACRM_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP0)) +#define BR_AIPS_PACRM_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP0))) /*! @brief Format value for bitfield AIPS_PACRM_SP0. */ #define BF_AIPS_PACRM_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP0) & BM_AIPS_PACRM_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRM_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP0) = (v)) +#define BW_AIPS_PACRM_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP0), v)) /*@}*/ /******************************************************************************* @@ -10119,8 +10126,8 @@ #define HW_AIPS_PACRN_ADDR(x) ((x) + 0x64U) #define HW_AIPS_PACRN(x) (*(__IO hw_aips_pacrn_t *) HW_AIPS_PACRN_ADDR(x)) -#define HW_AIPS_PACRN_RD(x) (HW_AIPS_PACRN(x).U) -#define HW_AIPS_PACRN_WR(x, v) (HW_AIPS_PACRN(x).U = (v)) +#define HW_AIPS_PACRN_RD(x) (ADDRESS_READ(hw_aips_pacrn_t, HW_AIPS_PACRN_ADDR(x))) +#define HW_AIPS_PACRN_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrn_t, HW_AIPS_PACRN_ADDR(x), v)) #define HW_AIPS_PACRN_SET(x, v) (HW_AIPS_PACRN_WR(x, HW_AIPS_PACRN_RD(x) | (v))) #define HW_AIPS_PACRN_CLR(x, v) (HW_AIPS_PACRN_WR(x, HW_AIPS_PACRN_RD(x) & ~(v))) #define HW_AIPS_PACRN_TOG(x, v) (HW_AIPS_PACRN_WR(x, HW_AIPS_PACRN_RD(x) ^ (v))) @@ -10147,13 +10154,13 @@ #define BS_AIPS_PACRN_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP7. */ /*! @brief Read current value of the AIPS_PACRN_TP7 field. */ -#define BR_AIPS_PACRN_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP7)) +#define BR_AIPS_PACRN_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP7))) /*! @brief Format value for bitfield AIPS_PACRN_TP7. */ #define BF_AIPS_PACRN_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP7) & BM_AIPS_PACRN_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRN_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP7) = (v)) +#define BW_AIPS_PACRN_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP7), v)) /*@}*/ /*! @@ -10173,13 +10180,13 @@ #define BS_AIPS_PACRN_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP7. */ /*! @brief Read current value of the AIPS_PACRN_WP7 field. */ -#define BR_AIPS_PACRN_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP7)) +#define BR_AIPS_PACRN_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP7))) /*! @brief Format value for bitfield AIPS_PACRN_WP7. */ #define BF_AIPS_PACRN_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP7) & BM_AIPS_PACRN_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRN_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP7) = (v)) +#define BW_AIPS_PACRN_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP7), v)) /*@}*/ /*! @@ -10202,13 +10209,13 @@ #define BS_AIPS_PACRN_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP7. */ /*! @brief Read current value of the AIPS_PACRN_SP7 field. */ -#define BR_AIPS_PACRN_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP7)) +#define BR_AIPS_PACRN_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP7))) /*! @brief Format value for bitfield AIPS_PACRN_SP7. */ #define BF_AIPS_PACRN_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP7) & BM_AIPS_PACRN_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRN_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP7) = (v)) +#define BW_AIPS_PACRN_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP7), v)) /*@}*/ /*! @@ -10228,13 +10235,13 @@ #define BS_AIPS_PACRN_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP6. */ /*! @brief Read current value of the AIPS_PACRN_TP6 field. */ -#define BR_AIPS_PACRN_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP6)) +#define BR_AIPS_PACRN_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP6))) /*! @brief Format value for bitfield AIPS_PACRN_TP6. */ #define BF_AIPS_PACRN_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP6) & BM_AIPS_PACRN_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRN_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP6) = (v)) +#define BW_AIPS_PACRN_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP6), v)) /*@}*/ /*! @@ -10254,13 +10261,13 @@ #define BS_AIPS_PACRN_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP6. */ /*! @brief Read current value of the AIPS_PACRN_WP6 field. */ -#define BR_AIPS_PACRN_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP6)) +#define BR_AIPS_PACRN_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP6))) /*! @brief Format value for bitfield AIPS_PACRN_WP6. */ #define BF_AIPS_PACRN_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP6) & BM_AIPS_PACRN_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRN_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP6) = (v)) +#define BW_AIPS_PACRN_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP6), v)) /*@}*/ /*! @@ -10283,13 +10290,13 @@ #define BS_AIPS_PACRN_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP6. */ /*! @brief Read current value of the AIPS_PACRN_SP6 field. */ -#define BR_AIPS_PACRN_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP6)) +#define BR_AIPS_PACRN_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP6))) /*! @brief Format value for bitfield AIPS_PACRN_SP6. */ #define BF_AIPS_PACRN_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP6) & BM_AIPS_PACRN_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRN_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP6) = (v)) +#define BW_AIPS_PACRN_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP6), v)) /*@}*/ /*! @@ -10309,13 +10316,13 @@ #define BS_AIPS_PACRN_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP5. */ /*! @brief Read current value of the AIPS_PACRN_TP5 field. */ -#define BR_AIPS_PACRN_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP5)) +#define BR_AIPS_PACRN_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP5))) /*! @brief Format value for bitfield AIPS_PACRN_TP5. */ #define BF_AIPS_PACRN_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP5) & BM_AIPS_PACRN_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRN_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP5) = (v)) +#define BW_AIPS_PACRN_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP5), v)) /*@}*/ /*! @@ -10335,13 +10342,13 @@ #define BS_AIPS_PACRN_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP5. */ /*! @brief Read current value of the AIPS_PACRN_WP5 field. */ -#define BR_AIPS_PACRN_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP5)) +#define BR_AIPS_PACRN_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP5))) /*! @brief Format value for bitfield AIPS_PACRN_WP5. */ #define BF_AIPS_PACRN_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP5) & BM_AIPS_PACRN_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRN_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP5) = (v)) +#define BW_AIPS_PACRN_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP5), v)) /*@}*/ /*! @@ -10364,13 +10371,13 @@ #define BS_AIPS_PACRN_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP5. */ /*! @brief Read current value of the AIPS_PACRN_SP5 field. */ -#define BR_AIPS_PACRN_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP5)) +#define BR_AIPS_PACRN_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP5))) /*! @brief Format value for bitfield AIPS_PACRN_SP5. */ #define BF_AIPS_PACRN_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP5) & BM_AIPS_PACRN_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRN_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP5) = (v)) +#define BW_AIPS_PACRN_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP5), v)) /*@}*/ /*! @@ -10390,13 +10397,13 @@ #define BS_AIPS_PACRN_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP4. */ /*! @brief Read current value of the AIPS_PACRN_TP4 field. */ -#define BR_AIPS_PACRN_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP4)) +#define BR_AIPS_PACRN_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP4))) /*! @brief Format value for bitfield AIPS_PACRN_TP4. */ #define BF_AIPS_PACRN_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP4) & BM_AIPS_PACRN_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRN_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP4) = (v)) +#define BW_AIPS_PACRN_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP4), v)) /*@}*/ /*! @@ -10416,13 +10423,13 @@ #define BS_AIPS_PACRN_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP4. */ /*! @brief Read current value of the AIPS_PACRN_WP4 field. */ -#define BR_AIPS_PACRN_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP4)) +#define BR_AIPS_PACRN_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP4))) /*! @brief Format value for bitfield AIPS_PACRN_WP4. */ #define BF_AIPS_PACRN_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP4) & BM_AIPS_PACRN_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRN_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP4) = (v)) +#define BW_AIPS_PACRN_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP4), v)) /*@}*/ /*! @@ -10445,13 +10452,13 @@ #define BS_AIPS_PACRN_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP4. */ /*! @brief Read current value of the AIPS_PACRN_SP4 field. */ -#define BR_AIPS_PACRN_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP4)) +#define BR_AIPS_PACRN_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP4))) /*! @brief Format value for bitfield AIPS_PACRN_SP4. */ #define BF_AIPS_PACRN_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP4) & BM_AIPS_PACRN_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRN_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP4) = (v)) +#define BW_AIPS_PACRN_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP4), v)) /*@}*/ /*! @@ -10471,13 +10478,13 @@ #define BS_AIPS_PACRN_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP3. */ /*! @brief Read current value of the AIPS_PACRN_TP3 field. */ -#define BR_AIPS_PACRN_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP3)) +#define BR_AIPS_PACRN_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP3))) /*! @brief Format value for bitfield AIPS_PACRN_TP3. */ #define BF_AIPS_PACRN_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP3) & BM_AIPS_PACRN_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRN_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP3) = (v)) +#define BW_AIPS_PACRN_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP3), v)) /*@}*/ /*! @@ -10497,13 +10504,13 @@ #define BS_AIPS_PACRN_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP3. */ /*! @brief Read current value of the AIPS_PACRN_WP3 field. */ -#define BR_AIPS_PACRN_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP3)) +#define BR_AIPS_PACRN_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP3))) /*! @brief Format value for bitfield AIPS_PACRN_WP3. */ #define BF_AIPS_PACRN_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP3) & BM_AIPS_PACRN_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRN_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP3) = (v)) +#define BW_AIPS_PACRN_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP3), v)) /*@}*/ /*! @@ -10526,13 +10533,13 @@ #define BS_AIPS_PACRN_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP3. */ /*! @brief Read current value of the AIPS_PACRN_SP3 field. */ -#define BR_AIPS_PACRN_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP3)) +#define BR_AIPS_PACRN_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP3))) /*! @brief Format value for bitfield AIPS_PACRN_SP3. */ #define BF_AIPS_PACRN_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP3) & BM_AIPS_PACRN_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRN_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP3) = (v)) +#define BW_AIPS_PACRN_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP3), v)) /*@}*/ /*! @@ -10552,13 +10559,13 @@ #define BS_AIPS_PACRN_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP2. */ /*! @brief Read current value of the AIPS_PACRN_TP2 field. */ -#define BR_AIPS_PACRN_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP2)) +#define BR_AIPS_PACRN_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP2))) /*! @brief Format value for bitfield AIPS_PACRN_TP2. */ #define BF_AIPS_PACRN_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP2) & BM_AIPS_PACRN_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRN_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP2) = (v)) +#define BW_AIPS_PACRN_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP2), v)) /*@}*/ /*! @@ -10578,13 +10585,13 @@ #define BS_AIPS_PACRN_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP2. */ /*! @brief Read current value of the AIPS_PACRN_WP2 field. */ -#define BR_AIPS_PACRN_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP2)) +#define BR_AIPS_PACRN_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP2))) /*! @brief Format value for bitfield AIPS_PACRN_WP2. */ #define BF_AIPS_PACRN_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP2) & BM_AIPS_PACRN_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRN_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP2) = (v)) +#define BW_AIPS_PACRN_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP2), v)) /*@}*/ /*! @@ -10607,13 +10614,13 @@ #define BS_AIPS_PACRN_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP2. */ /*! @brief Read current value of the AIPS_PACRN_SP2 field. */ -#define BR_AIPS_PACRN_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP2)) +#define BR_AIPS_PACRN_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP2))) /*! @brief Format value for bitfield AIPS_PACRN_SP2. */ #define BF_AIPS_PACRN_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP2) & BM_AIPS_PACRN_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRN_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP2) = (v)) +#define BW_AIPS_PACRN_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP2), v)) /*@}*/ /*! @@ -10633,13 +10640,13 @@ #define BS_AIPS_PACRN_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP1. */ /*! @brief Read current value of the AIPS_PACRN_TP1 field. */ -#define BR_AIPS_PACRN_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP1)) +#define BR_AIPS_PACRN_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP1))) /*! @brief Format value for bitfield AIPS_PACRN_TP1. */ #define BF_AIPS_PACRN_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP1) & BM_AIPS_PACRN_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRN_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP1) = (v)) +#define BW_AIPS_PACRN_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP1), v)) /*@}*/ /*! @@ -10659,13 +10666,13 @@ #define BS_AIPS_PACRN_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP1. */ /*! @brief Read current value of the AIPS_PACRN_WP1 field. */ -#define BR_AIPS_PACRN_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP1)) +#define BR_AIPS_PACRN_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP1))) /*! @brief Format value for bitfield AIPS_PACRN_WP1. */ #define BF_AIPS_PACRN_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP1) & BM_AIPS_PACRN_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRN_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP1) = (v)) +#define BW_AIPS_PACRN_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP1), v)) /*@}*/ /*! @@ -10688,13 +10695,13 @@ #define BS_AIPS_PACRN_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP1. */ /*! @brief Read current value of the AIPS_PACRN_SP1 field. */ -#define BR_AIPS_PACRN_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP1)) +#define BR_AIPS_PACRN_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP1))) /*! @brief Format value for bitfield AIPS_PACRN_SP1. */ #define BF_AIPS_PACRN_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP1) & BM_AIPS_PACRN_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRN_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP1) = (v)) +#define BW_AIPS_PACRN_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP1), v)) /*@}*/ /*! @@ -10714,13 +10721,13 @@ #define BS_AIPS_PACRN_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP0. */ /*! @brief Read current value of the AIPS_PACRN_TP0 field. */ -#define BR_AIPS_PACRN_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP0)) +#define BR_AIPS_PACRN_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP0))) /*! @brief Format value for bitfield AIPS_PACRN_TP0. */ #define BF_AIPS_PACRN_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP0) & BM_AIPS_PACRN_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRN_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP0) = (v)) +#define BW_AIPS_PACRN_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP0), v)) /*@}*/ /*! @@ -10740,13 +10747,13 @@ #define BS_AIPS_PACRN_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP0. */ /*! @brief Read current value of the AIPS_PACRN_WP0 field. */ -#define BR_AIPS_PACRN_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP0)) +#define BR_AIPS_PACRN_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP0))) /*! @brief Format value for bitfield AIPS_PACRN_WP0. */ #define BF_AIPS_PACRN_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP0) & BM_AIPS_PACRN_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRN_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP0) = (v)) +#define BW_AIPS_PACRN_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP0), v)) /*@}*/ /*! @@ -10769,13 +10776,13 @@ #define BS_AIPS_PACRN_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP0. */ /*! @brief Read current value of the AIPS_PACRN_SP0 field. */ -#define BR_AIPS_PACRN_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP0)) +#define BR_AIPS_PACRN_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP0))) /*! @brief Format value for bitfield AIPS_PACRN_SP0. */ #define BF_AIPS_PACRN_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP0) & BM_AIPS_PACRN_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRN_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP0) = (v)) +#define BW_AIPS_PACRN_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP0), v)) /*@}*/ /******************************************************************************* @@ -10838,8 +10845,8 @@ #define HW_AIPS_PACRO_ADDR(x) ((x) + 0x68U) #define HW_AIPS_PACRO(x) (*(__IO hw_aips_pacro_t *) HW_AIPS_PACRO_ADDR(x)) -#define HW_AIPS_PACRO_RD(x) (HW_AIPS_PACRO(x).U) -#define HW_AIPS_PACRO_WR(x, v) (HW_AIPS_PACRO(x).U = (v)) +#define HW_AIPS_PACRO_RD(x) (ADDRESS_READ(hw_aips_pacro_t, HW_AIPS_PACRO_ADDR(x))) +#define HW_AIPS_PACRO_WR(x, v) (ADDRESS_WRITE(hw_aips_pacro_t, HW_AIPS_PACRO_ADDR(x), v)) #define HW_AIPS_PACRO_SET(x, v) (HW_AIPS_PACRO_WR(x, HW_AIPS_PACRO_RD(x) | (v))) #define HW_AIPS_PACRO_CLR(x, v) (HW_AIPS_PACRO_WR(x, HW_AIPS_PACRO_RD(x) & ~(v))) #define HW_AIPS_PACRO_TOG(x, v) (HW_AIPS_PACRO_WR(x, HW_AIPS_PACRO_RD(x) ^ (v))) @@ -10866,13 +10873,13 @@ #define BS_AIPS_PACRO_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP7. */ /*! @brief Read current value of the AIPS_PACRO_TP7 field. */ -#define BR_AIPS_PACRO_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP7)) +#define BR_AIPS_PACRO_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP7))) /*! @brief Format value for bitfield AIPS_PACRO_TP7. */ #define BF_AIPS_PACRO_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP7) & BM_AIPS_PACRO_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRO_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP7) = (v)) +#define BW_AIPS_PACRO_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP7), v)) /*@}*/ /*! @@ -10892,13 +10899,13 @@ #define BS_AIPS_PACRO_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP7. */ /*! @brief Read current value of the AIPS_PACRO_WP7 field. */ -#define BR_AIPS_PACRO_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP7)) +#define BR_AIPS_PACRO_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP7))) /*! @brief Format value for bitfield AIPS_PACRO_WP7. */ #define BF_AIPS_PACRO_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP7) & BM_AIPS_PACRO_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRO_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP7) = (v)) +#define BW_AIPS_PACRO_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP7), v)) /*@}*/ /*! @@ -10921,13 +10928,13 @@ #define BS_AIPS_PACRO_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP7. */ /*! @brief Read current value of the AIPS_PACRO_SP7 field. */ -#define BR_AIPS_PACRO_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP7)) +#define BR_AIPS_PACRO_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP7))) /*! @brief Format value for bitfield AIPS_PACRO_SP7. */ #define BF_AIPS_PACRO_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP7) & BM_AIPS_PACRO_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRO_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP7) = (v)) +#define BW_AIPS_PACRO_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP7), v)) /*@}*/ /*! @@ -10947,13 +10954,13 @@ #define BS_AIPS_PACRO_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP6. */ /*! @brief Read current value of the AIPS_PACRO_TP6 field. */ -#define BR_AIPS_PACRO_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP6)) +#define BR_AIPS_PACRO_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP6))) /*! @brief Format value for bitfield AIPS_PACRO_TP6. */ #define BF_AIPS_PACRO_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP6) & BM_AIPS_PACRO_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRO_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP6) = (v)) +#define BW_AIPS_PACRO_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP6), v)) /*@}*/ /*! @@ -10973,13 +10980,13 @@ #define BS_AIPS_PACRO_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP6. */ /*! @brief Read current value of the AIPS_PACRO_WP6 field. */ -#define BR_AIPS_PACRO_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP6)) +#define BR_AIPS_PACRO_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP6))) /*! @brief Format value for bitfield AIPS_PACRO_WP6. */ #define BF_AIPS_PACRO_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP6) & BM_AIPS_PACRO_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRO_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP6) = (v)) +#define BW_AIPS_PACRO_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP6), v)) /*@}*/ /*! @@ -11002,13 +11009,13 @@ #define BS_AIPS_PACRO_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP6. */ /*! @brief Read current value of the AIPS_PACRO_SP6 field. */ -#define BR_AIPS_PACRO_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP6)) +#define BR_AIPS_PACRO_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP6))) /*! @brief Format value for bitfield AIPS_PACRO_SP6. */ #define BF_AIPS_PACRO_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP6) & BM_AIPS_PACRO_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRO_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP6) = (v)) +#define BW_AIPS_PACRO_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP6), v)) /*@}*/ /*! @@ -11028,13 +11035,13 @@ #define BS_AIPS_PACRO_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP5. */ /*! @brief Read current value of the AIPS_PACRO_TP5 field. */ -#define BR_AIPS_PACRO_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP5)) +#define BR_AIPS_PACRO_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP5))) /*! @brief Format value for bitfield AIPS_PACRO_TP5. */ #define BF_AIPS_PACRO_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP5) & BM_AIPS_PACRO_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRO_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP5) = (v)) +#define BW_AIPS_PACRO_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP5), v)) /*@}*/ /*! @@ -11054,13 +11061,13 @@ #define BS_AIPS_PACRO_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP5. */ /*! @brief Read current value of the AIPS_PACRO_WP5 field. */ -#define BR_AIPS_PACRO_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP5)) +#define BR_AIPS_PACRO_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP5))) /*! @brief Format value for bitfield AIPS_PACRO_WP5. */ #define BF_AIPS_PACRO_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP5) & BM_AIPS_PACRO_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRO_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP5) = (v)) +#define BW_AIPS_PACRO_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP5), v)) /*@}*/ /*! @@ -11083,13 +11090,13 @@ #define BS_AIPS_PACRO_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP5. */ /*! @brief Read current value of the AIPS_PACRO_SP5 field. */ -#define BR_AIPS_PACRO_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP5)) +#define BR_AIPS_PACRO_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP5))) /*! @brief Format value for bitfield AIPS_PACRO_SP5. */ #define BF_AIPS_PACRO_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP5) & BM_AIPS_PACRO_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRO_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP5) = (v)) +#define BW_AIPS_PACRO_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP5), v)) /*@}*/ /*! @@ -11109,13 +11116,13 @@ #define BS_AIPS_PACRO_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP4. */ /*! @brief Read current value of the AIPS_PACRO_TP4 field. */ -#define BR_AIPS_PACRO_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP4)) +#define BR_AIPS_PACRO_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP4))) /*! @brief Format value for bitfield AIPS_PACRO_TP4. */ #define BF_AIPS_PACRO_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP4) & BM_AIPS_PACRO_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRO_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP4) = (v)) +#define BW_AIPS_PACRO_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP4), v)) /*@}*/ /*! @@ -11135,13 +11142,13 @@ #define BS_AIPS_PACRO_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP4. */ /*! @brief Read current value of the AIPS_PACRO_WP4 field. */ -#define BR_AIPS_PACRO_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP4)) +#define BR_AIPS_PACRO_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP4))) /*! @brief Format value for bitfield AIPS_PACRO_WP4. */ #define BF_AIPS_PACRO_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP4) & BM_AIPS_PACRO_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRO_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP4) = (v)) +#define BW_AIPS_PACRO_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP4), v)) /*@}*/ /*! @@ -11164,13 +11171,13 @@ #define BS_AIPS_PACRO_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP4. */ /*! @brief Read current value of the AIPS_PACRO_SP4 field. */ -#define BR_AIPS_PACRO_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP4)) +#define BR_AIPS_PACRO_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP4))) /*! @brief Format value for bitfield AIPS_PACRO_SP4. */ #define BF_AIPS_PACRO_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP4) & BM_AIPS_PACRO_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRO_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP4) = (v)) +#define BW_AIPS_PACRO_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP4), v)) /*@}*/ /*! @@ -11190,13 +11197,13 @@ #define BS_AIPS_PACRO_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP3. */ /*! @brief Read current value of the AIPS_PACRO_TP3 field. */ -#define BR_AIPS_PACRO_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP3)) +#define BR_AIPS_PACRO_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP3))) /*! @brief Format value for bitfield AIPS_PACRO_TP3. */ #define BF_AIPS_PACRO_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP3) & BM_AIPS_PACRO_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRO_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP3) = (v)) +#define BW_AIPS_PACRO_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP3), v)) /*@}*/ /*! @@ -11216,13 +11223,13 @@ #define BS_AIPS_PACRO_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP3. */ /*! @brief Read current value of the AIPS_PACRO_WP3 field. */ -#define BR_AIPS_PACRO_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP3)) +#define BR_AIPS_PACRO_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP3))) /*! @brief Format value for bitfield AIPS_PACRO_WP3. */ #define BF_AIPS_PACRO_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP3) & BM_AIPS_PACRO_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRO_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP3) = (v)) +#define BW_AIPS_PACRO_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP3), v)) /*@}*/ /*! @@ -11245,13 +11252,13 @@ #define BS_AIPS_PACRO_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP3. */ /*! @brief Read current value of the AIPS_PACRO_SP3 field. */ -#define BR_AIPS_PACRO_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP3)) +#define BR_AIPS_PACRO_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP3))) /*! @brief Format value for bitfield AIPS_PACRO_SP3. */ #define BF_AIPS_PACRO_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP3) & BM_AIPS_PACRO_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRO_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP3) = (v)) +#define BW_AIPS_PACRO_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP3), v)) /*@}*/ /*! @@ -11271,13 +11278,13 @@ #define BS_AIPS_PACRO_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP2. */ /*! @brief Read current value of the AIPS_PACRO_TP2 field. */ -#define BR_AIPS_PACRO_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP2)) +#define BR_AIPS_PACRO_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP2))) /*! @brief Format value for bitfield AIPS_PACRO_TP2. */ #define BF_AIPS_PACRO_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP2) & BM_AIPS_PACRO_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRO_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP2) = (v)) +#define BW_AIPS_PACRO_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP2), v)) /*@}*/ /*! @@ -11297,13 +11304,13 @@ #define BS_AIPS_PACRO_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP2. */ /*! @brief Read current value of the AIPS_PACRO_WP2 field. */ -#define BR_AIPS_PACRO_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP2)) +#define BR_AIPS_PACRO_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP2))) /*! @brief Format value for bitfield AIPS_PACRO_WP2. */ #define BF_AIPS_PACRO_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP2) & BM_AIPS_PACRO_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRO_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP2) = (v)) +#define BW_AIPS_PACRO_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP2), v)) /*@}*/ /*! @@ -11326,13 +11333,13 @@ #define BS_AIPS_PACRO_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP2. */ /*! @brief Read current value of the AIPS_PACRO_SP2 field. */ -#define BR_AIPS_PACRO_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP2)) +#define BR_AIPS_PACRO_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP2))) /*! @brief Format value for bitfield AIPS_PACRO_SP2. */ #define BF_AIPS_PACRO_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP2) & BM_AIPS_PACRO_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRO_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP2) = (v)) +#define BW_AIPS_PACRO_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP2), v)) /*@}*/ /*! @@ -11352,13 +11359,13 @@ #define BS_AIPS_PACRO_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP1. */ /*! @brief Read current value of the AIPS_PACRO_TP1 field. */ -#define BR_AIPS_PACRO_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP1)) +#define BR_AIPS_PACRO_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP1))) /*! @brief Format value for bitfield AIPS_PACRO_TP1. */ #define BF_AIPS_PACRO_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP1) & BM_AIPS_PACRO_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRO_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP1) = (v)) +#define BW_AIPS_PACRO_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP1), v)) /*@}*/ /*! @@ -11378,13 +11385,13 @@ #define BS_AIPS_PACRO_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP1. */ /*! @brief Read current value of the AIPS_PACRO_WP1 field. */ -#define BR_AIPS_PACRO_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP1)) +#define BR_AIPS_PACRO_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP1))) /*! @brief Format value for bitfield AIPS_PACRO_WP1. */ #define BF_AIPS_PACRO_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP1) & BM_AIPS_PACRO_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRO_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP1) = (v)) +#define BW_AIPS_PACRO_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP1), v)) /*@}*/ /*! @@ -11407,13 +11414,13 @@ #define BS_AIPS_PACRO_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP1. */ /*! @brief Read current value of the AIPS_PACRO_SP1 field. */ -#define BR_AIPS_PACRO_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP1)) +#define BR_AIPS_PACRO_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP1))) /*! @brief Format value for bitfield AIPS_PACRO_SP1. */ #define BF_AIPS_PACRO_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP1) & BM_AIPS_PACRO_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRO_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP1) = (v)) +#define BW_AIPS_PACRO_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP1), v)) /*@}*/ /*! @@ -11433,13 +11440,13 @@ #define BS_AIPS_PACRO_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP0. */ /*! @brief Read current value of the AIPS_PACRO_TP0 field. */ -#define BR_AIPS_PACRO_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP0)) +#define BR_AIPS_PACRO_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP0))) /*! @brief Format value for bitfield AIPS_PACRO_TP0. */ #define BF_AIPS_PACRO_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP0) & BM_AIPS_PACRO_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRO_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP0) = (v)) +#define BW_AIPS_PACRO_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP0), v)) /*@}*/ /*! @@ -11459,13 +11466,13 @@ #define BS_AIPS_PACRO_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP0. */ /*! @brief Read current value of the AIPS_PACRO_WP0 field. */ -#define BR_AIPS_PACRO_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP0)) +#define BR_AIPS_PACRO_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP0))) /*! @brief Format value for bitfield AIPS_PACRO_WP0. */ #define BF_AIPS_PACRO_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP0) & BM_AIPS_PACRO_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRO_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP0) = (v)) +#define BW_AIPS_PACRO_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP0), v)) /*@}*/ /*! @@ -11488,13 +11495,13 @@ #define BS_AIPS_PACRO_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP0. */ /*! @brief Read current value of the AIPS_PACRO_SP0 field. */ -#define BR_AIPS_PACRO_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP0)) +#define BR_AIPS_PACRO_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP0))) /*! @brief Format value for bitfield AIPS_PACRO_SP0. */ #define BF_AIPS_PACRO_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP0) & BM_AIPS_PACRO_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRO_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP0) = (v)) +#define BW_AIPS_PACRO_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP0), v)) /*@}*/ /******************************************************************************* @@ -11557,8 +11564,8 @@ #define HW_AIPS_PACRP_ADDR(x) ((x) + 0x6CU) #define HW_AIPS_PACRP(x) (*(__IO hw_aips_pacrp_t *) HW_AIPS_PACRP_ADDR(x)) -#define HW_AIPS_PACRP_RD(x) (HW_AIPS_PACRP(x).U) -#define HW_AIPS_PACRP_WR(x, v) (HW_AIPS_PACRP(x).U = (v)) +#define HW_AIPS_PACRP_RD(x) (ADDRESS_READ(hw_aips_pacrp_t, HW_AIPS_PACRP_ADDR(x))) +#define HW_AIPS_PACRP_WR(x, v) (ADDRESS_WRITE(hw_aips_pacrp_t, HW_AIPS_PACRP_ADDR(x), v)) #define HW_AIPS_PACRP_SET(x, v) (HW_AIPS_PACRP_WR(x, HW_AIPS_PACRP_RD(x) | (v))) #define HW_AIPS_PACRP_CLR(x, v) (HW_AIPS_PACRP_WR(x, HW_AIPS_PACRP_RD(x) & ~(v))) #define HW_AIPS_PACRP_TOG(x, v) (HW_AIPS_PACRP_WR(x, HW_AIPS_PACRP_RD(x) ^ (v))) @@ -11585,13 +11592,13 @@ #define BS_AIPS_PACRP_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP7. */ /*! @brief Read current value of the AIPS_PACRP_TP7 field. */ -#define BR_AIPS_PACRP_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP7)) +#define BR_AIPS_PACRP_TP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP7))) /*! @brief Format value for bitfield AIPS_PACRP_TP7. */ #define BF_AIPS_PACRP_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP7) & BM_AIPS_PACRP_TP7) /*! @brief Set the TP7 field to a new value. */ -#define BW_AIPS_PACRP_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP7) = (v)) +#define BW_AIPS_PACRP_TP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP7), v)) /*@}*/ /*! @@ -11611,13 +11618,13 @@ #define BS_AIPS_PACRP_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP7. */ /*! @brief Read current value of the AIPS_PACRP_WP7 field. */ -#define BR_AIPS_PACRP_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP7)) +#define BR_AIPS_PACRP_WP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP7))) /*! @brief Format value for bitfield AIPS_PACRP_WP7. */ #define BF_AIPS_PACRP_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP7) & BM_AIPS_PACRP_WP7) /*! @brief Set the WP7 field to a new value. */ -#define BW_AIPS_PACRP_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP7) = (v)) +#define BW_AIPS_PACRP_WP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP7), v)) /*@}*/ /*! @@ -11640,13 +11647,13 @@ #define BS_AIPS_PACRP_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP7. */ /*! @brief Read current value of the AIPS_PACRP_SP7 field. */ -#define BR_AIPS_PACRP_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP7)) +#define BR_AIPS_PACRP_SP7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP7))) /*! @brief Format value for bitfield AIPS_PACRP_SP7. */ #define BF_AIPS_PACRP_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP7) & BM_AIPS_PACRP_SP7) /*! @brief Set the SP7 field to a new value. */ -#define BW_AIPS_PACRP_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP7) = (v)) +#define BW_AIPS_PACRP_SP7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP7), v)) /*@}*/ /*! @@ -11666,13 +11673,13 @@ #define BS_AIPS_PACRP_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP6. */ /*! @brief Read current value of the AIPS_PACRP_TP6 field. */ -#define BR_AIPS_PACRP_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP6)) +#define BR_AIPS_PACRP_TP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP6))) /*! @brief Format value for bitfield AIPS_PACRP_TP6. */ #define BF_AIPS_PACRP_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP6) & BM_AIPS_PACRP_TP6) /*! @brief Set the TP6 field to a new value. */ -#define BW_AIPS_PACRP_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP6) = (v)) +#define BW_AIPS_PACRP_TP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP6), v)) /*@}*/ /*! @@ -11692,13 +11699,13 @@ #define BS_AIPS_PACRP_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP6. */ /*! @brief Read current value of the AIPS_PACRP_WP6 field. */ -#define BR_AIPS_PACRP_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP6)) +#define BR_AIPS_PACRP_WP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP6))) /*! @brief Format value for bitfield AIPS_PACRP_WP6. */ #define BF_AIPS_PACRP_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP6) & BM_AIPS_PACRP_WP6) /*! @brief Set the WP6 field to a new value. */ -#define BW_AIPS_PACRP_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP6) = (v)) +#define BW_AIPS_PACRP_WP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP6), v)) /*@}*/ /*! @@ -11721,13 +11728,13 @@ #define BS_AIPS_PACRP_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP6. */ /*! @brief Read current value of the AIPS_PACRP_SP6 field. */ -#define BR_AIPS_PACRP_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP6)) +#define BR_AIPS_PACRP_SP6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP6))) /*! @brief Format value for bitfield AIPS_PACRP_SP6. */ #define BF_AIPS_PACRP_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP6) & BM_AIPS_PACRP_SP6) /*! @brief Set the SP6 field to a new value. */ -#define BW_AIPS_PACRP_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP6) = (v)) +#define BW_AIPS_PACRP_SP6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP6), v)) /*@}*/ /*! @@ -11747,13 +11754,13 @@ #define BS_AIPS_PACRP_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP5. */ /*! @brief Read current value of the AIPS_PACRP_TP5 field. */ -#define BR_AIPS_PACRP_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP5)) +#define BR_AIPS_PACRP_TP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP5))) /*! @brief Format value for bitfield AIPS_PACRP_TP5. */ #define BF_AIPS_PACRP_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP5) & BM_AIPS_PACRP_TP5) /*! @brief Set the TP5 field to a new value. */ -#define BW_AIPS_PACRP_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP5) = (v)) +#define BW_AIPS_PACRP_TP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP5), v)) /*@}*/ /*! @@ -11773,13 +11780,13 @@ #define BS_AIPS_PACRP_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP5. */ /*! @brief Read current value of the AIPS_PACRP_WP5 field. */ -#define BR_AIPS_PACRP_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP5)) +#define BR_AIPS_PACRP_WP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP5))) /*! @brief Format value for bitfield AIPS_PACRP_WP5. */ #define BF_AIPS_PACRP_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP5) & BM_AIPS_PACRP_WP5) /*! @brief Set the WP5 field to a new value. */ -#define BW_AIPS_PACRP_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP5) = (v)) +#define BW_AIPS_PACRP_WP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP5), v)) /*@}*/ /*! @@ -11802,13 +11809,13 @@ #define BS_AIPS_PACRP_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP5. */ /*! @brief Read current value of the AIPS_PACRP_SP5 field. */ -#define BR_AIPS_PACRP_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP5)) +#define BR_AIPS_PACRP_SP5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP5))) /*! @brief Format value for bitfield AIPS_PACRP_SP5. */ #define BF_AIPS_PACRP_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP5) & BM_AIPS_PACRP_SP5) /*! @brief Set the SP5 field to a new value. */ -#define BW_AIPS_PACRP_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP5) = (v)) +#define BW_AIPS_PACRP_SP5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP5), v)) /*@}*/ /*! @@ -11828,13 +11835,13 @@ #define BS_AIPS_PACRP_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP4. */ /*! @brief Read current value of the AIPS_PACRP_TP4 field. */ -#define BR_AIPS_PACRP_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP4)) +#define BR_AIPS_PACRP_TP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP4))) /*! @brief Format value for bitfield AIPS_PACRP_TP4. */ #define BF_AIPS_PACRP_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP4) & BM_AIPS_PACRP_TP4) /*! @brief Set the TP4 field to a new value. */ -#define BW_AIPS_PACRP_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP4) = (v)) +#define BW_AIPS_PACRP_TP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP4), v)) /*@}*/ /*! @@ -11854,13 +11861,13 @@ #define BS_AIPS_PACRP_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP4. */ /*! @brief Read current value of the AIPS_PACRP_WP4 field. */ -#define BR_AIPS_PACRP_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP4)) +#define BR_AIPS_PACRP_WP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP4))) /*! @brief Format value for bitfield AIPS_PACRP_WP4. */ #define BF_AIPS_PACRP_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP4) & BM_AIPS_PACRP_WP4) /*! @brief Set the WP4 field to a new value. */ -#define BW_AIPS_PACRP_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP4) = (v)) +#define BW_AIPS_PACRP_WP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP4), v)) /*@}*/ /*! @@ -11883,13 +11890,13 @@ #define BS_AIPS_PACRP_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP4. */ /*! @brief Read current value of the AIPS_PACRP_SP4 field. */ -#define BR_AIPS_PACRP_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP4)) +#define BR_AIPS_PACRP_SP4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP4))) /*! @brief Format value for bitfield AIPS_PACRP_SP4. */ #define BF_AIPS_PACRP_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP4) & BM_AIPS_PACRP_SP4) /*! @brief Set the SP4 field to a new value. */ -#define BW_AIPS_PACRP_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP4) = (v)) +#define BW_AIPS_PACRP_SP4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP4), v)) /*@}*/ /*! @@ -11909,13 +11916,13 @@ #define BS_AIPS_PACRP_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP3. */ /*! @brief Read current value of the AIPS_PACRP_TP3 field. */ -#define BR_AIPS_PACRP_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP3)) +#define BR_AIPS_PACRP_TP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP3))) /*! @brief Format value for bitfield AIPS_PACRP_TP3. */ #define BF_AIPS_PACRP_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP3) & BM_AIPS_PACRP_TP3) /*! @brief Set the TP3 field to a new value. */ -#define BW_AIPS_PACRP_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP3) = (v)) +#define BW_AIPS_PACRP_TP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP3), v)) /*@}*/ /*! @@ -11935,13 +11942,13 @@ #define BS_AIPS_PACRP_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP3. */ /*! @brief Read current value of the AIPS_PACRP_WP3 field. */ -#define BR_AIPS_PACRP_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP3)) +#define BR_AIPS_PACRP_WP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP3))) /*! @brief Format value for bitfield AIPS_PACRP_WP3. */ #define BF_AIPS_PACRP_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP3) & BM_AIPS_PACRP_WP3) /*! @brief Set the WP3 field to a new value. */ -#define BW_AIPS_PACRP_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP3) = (v)) +#define BW_AIPS_PACRP_WP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP3), v)) /*@}*/ /*! @@ -11964,13 +11971,13 @@ #define BS_AIPS_PACRP_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP3. */ /*! @brief Read current value of the AIPS_PACRP_SP3 field. */ -#define BR_AIPS_PACRP_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP3)) +#define BR_AIPS_PACRP_SP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP3))) /*! @brief Format value for bitfield AIPS_PACRP_SP3. */ #define BF_AIPS_PACRP_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP3) & BM_AIPS_PACRP_SP3) /*! @brief Set the SP3 field to a new value. */ -#define BW_AIPS_PACRP_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP3) = (v)) +#define BW_AIPS_PACRP_SP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP3), v)) /*@}*/ /*! @@ -11990,13 +11997,13 @@ #define BS_AIPS_PACRP_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP2. */ /*! @brief Read current value of the AIPS_PACRP_TP2 field. */ -#define BR_AIPS_PACRP_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP2)) +#define BR_AIPS_PACRP_TP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP2))) /*! @brief Format value for bitfield AIPS_PACRP_TP2. */ #define BF_AIPS_PACRP_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP2) & BM_AIPS_PACRP_TP2) /*! @brief Set the TP2 field to a new value. */ -#define BW_AIPS_PACRP_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP2) = (v)) +#define BW_AIPS_PACRP_TP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP2), v)) /*@}*/ /*! @@ -12016,13 +12023,13 @@ #define BS_AIPS_PACRP_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP2. */ /*! @brief Read current value of the AIPS_PACRP_WP2 field. */ -#define BR_AIPS_PACRP_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP2)) +#define BR_AIPS_PACRP_WP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP2))) /*! @brief Format value for bitfield AIPS_PACRP_WP2. */ #define BF_AIPS_PACRP_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP2) & BM_AIPS_PACRP_WP2) /*! @brief Set the WP2 field to a new value. */ -#define BW_AIPS_PACRP_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP2) = (v)) +#define BW_AIPS_PACRP_WP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP2), v)) /*@}*/ /*! @@ -12045,13 +12052,13 @@ #define BS_AIPS_PACRP_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP2. */ /*! @brief Read current value of the AIPS_PACRP_SP2 field. */ -#define BR_AIPS_PACRP_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP2)) +#define BR_AIPS_PACRP_SP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP2))) /*! @brief Format value for bitfield AIPS_PACRP_SP2. */ #define BF_AIPS_PACRP_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP2) & BM_AIPS_PACRP_SP2) /*! @brief Set the SP2 field to a new value. */ -#define BW_AIPS_PACRP_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP2) = (v)) +#define BW_AIPS_PACRP_SP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP2), v)) /*@}*/ /*! @@ -12071,13 +12078,13 @@ #define BS_AIPS_PACRP_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP1. */ /*! @brief Read current value of the AIPS_PACRP_TP1 field. */ -#define BR_AIPS_PACRP_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP1)) +#define BR_AIPS_PACRP_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP1))) /*! @brief Format value for bitfield AIPS_PACRP_TP1. */ #define BF_AIPS_PACRP_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP1) & BM_AIPS_PACRP_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRP_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP1) = (v)) +#define BW_AIPS_PACRP_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP1), v)) /*@}*/ /*! @@ -12097,13 +12104,13 @@ #define BS_AIPS_PACRP_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP1. */ /*! @brief Read current value of the AIPS_PACRP_WP1 field. */ -#define BR_AIPS_PACRP_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP1)) +#define BR_AIPS_PACRP_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP1))) /*! @brief Format value for bitfield AIPS_PACRP_WP1. */ #define BF_AIPS_PACRP_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP1) & BM_AIPS_PACRP_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRP_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP1) = (v)) +#define BW_AIPS_PACRP_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP1), v)) /*@}*/ /*! @@ -12126,13 +12133,13 @@ #define BS_AIPS_PACRP_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP1. */ /*! @brief Read current value of the AIPS_PACRP_SP1 field. */ -#define BR_AIPS_PACRP_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP1)) +#define BR_AIPS_PACRP_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP1))) /*! @brief Format value for bitfield AIPS_PACRP_SP1. */ #define BF_AIPS_PACRP_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP1) & BM_AIPS_PACRP_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRP_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP1) = (v)) +#define BW_AIPS_PACRP_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP1), v)) /*@}*/ /*! @@ -12152,13 +12159,13 @@ #define BS_AIPS_PACRP_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP0. */ /*! @brief Read current value of the AIPS_PACRP_TP0 field. */ -#define BR_AIPS_PACRP_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP0)) +#define BR_AIPS_PACRP_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP0))) /*! @brief Format value for bitfield AIPS_PACRP_TP0. */ #define BF_AIPS_PACRP_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP0) & BM_AIPS_PACRP_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRP_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP0) = (v)) +#define BW_AIPS_PACRP_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP0), v)) /*@}*/ /*! @@ -12178,13 +12185,13 @@ #define BS_AIPS_PACRP_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP0. */ /*! @brief Read current value of the AIPS_PACRP_WP0 field. */ -#define BR_AIPS_PACRP_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP0)) +#define BR_AIPS_PACRP_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP0))) /*! @brief Format value for bitfield AIPS_PACRP_WP0. */ #define BF_AIPS_PACRP_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP0) & BM_AIPS_PACRP_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRP_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP0) = (v)) +#define BW_AIPS_PACRP_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP0), v)) /*@}*/ /*! @@ -12207,13 +12214,13 @@ #define BS_AIPS_PACRP_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP0. */ /*! @brief Read current value of the AIPS_PACRP_SP0 field. */ -#define BR_AIPS_PACRP_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP0)) +#define BR_AIPS_PACRP_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP0))) /*! @brief Format value for bitfield AIPS_PACRP_SP0. */ #define BF_AIPS_PACRP_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP0) & BM_AIPS_PACRP_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRP_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP0) = (v)) +#define BW_AIPS_PACRP_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP0), v)) /*@}*/ /******************************************************************************* @@ -12251,8 +12258,8 @@ #define HW_AIPS_PACRU_ADDR(x) ((x) + 0x80U) #define HW_AIPS_PACRU(x) (*(__IO hw_aips_pacru_t *) HW_AIPS_PACRU_ADDR(x)) -#define HW_AIPS_PACRU_RD(x) (HW_AIPS_PACRU(x).U) -#define HW_AIPS_PACRU_WR(x, v) (HW_AIPS_PACRU(x).U = (v)) +#define HW_AIPS_PACRU_RD(x) (ADDRESS_READ(hw_aips_pacru_t, HW_AIPS_PACRU_ADDR(x))) +#define HW_AIPS_PACRU_WR(x, v) (ADDRESS_WRITE(hw_aips_pacru_t, HW_AIPS_PACRU_ADDR(x), v)) #define HW_AIPS_PACRU_SET(x, v) (HW_AIPS_PACRU_WR(x, HW_AIPS_PACRU_RD(x) | (v))) #define HW_AIPS_PACRU_CLR(x, v) (HW_AIPS_PACRU_WR(x, HW_AIPS_PACRU_RD(x) & ~(v))) #define HW_AIPS_PACRU_TOG(x, v) (HW_AIPS_PACRU_WR(x, HW_AIPS_PACRU_RD(x) ^ (v))) @@ -12279,13 +12286,13 @@ #define BS_AIPS_PACRU_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRU_TP1. */ /*! @brief Read current value of the AIPS_PACRU_TP1 field. */ -#define BR_AIPS_PACRU_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP1)) +#define BR_AIPS_PACRU_TP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP1))) /*! @brief Format value for bitfield AIPS_PACRU_TP1. */ #define BF_AIPS_PACRU_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_TP1) & BM_AIPS_PACRU_TP1) /*! @brief Set the TP1 field to a new value. */ -#define BW_AIPS_PACRU_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP1) = (v)) +#define BW_AIPS_PACRU_TP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP1), v)) /*@}*/ /*! @@ -12305,13 +12312,13 @@ #define BS_AIPS_PACRU_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRU_WP1. */ /*! @brief Read current value of the AIPS_PACRU_WP1 field. */ -#define BR_AIPS_PACRU_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP1)) +#define BR_AIPS_PACRU_WP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP1))) /*! @brief Format value for bitfield AIPS_PACRU_WP1. */ #define BF_AIPS_PACRU_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_WP1) & BM_AIPS_PACRU_WP1) /*! @brief Set the WP1 field to a new value. */ -#define BW_AIPS_PACRU_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP1) = (v)) +#define BW_AIPS_PACRU_WP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP1), v)) /*@}*/ /*! @@ -12334,13 +12341,13 @@ #define BS_AIPS_PACRU_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRU_SP1. */ /*! @brief Read current value of the AIPS_PACRU_SP1 field. */ -#define BR_AIPS_PACRU_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP1)) +#define BR_AIPS_PACRU_SP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP1))) /*! @brief Format value for bitfield AIPS_PACRU_SP1. */ #define BF_AIPS_PACRU_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_SP1) & BM_AIPS_PACRU_SP1) /*! @brief Set the SP1 field to a new value. */ -#define BW_AIPS_PACRU_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP1) = (v)) +#define BW_AIPS_PACRU_SP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP1), v)) /*@}*/ /*! @@ -12360,13 +12367,13 @@ #define BS_AIPS_PACRU_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRU_TP0. */ /*! @brief Read current value of the AIPS_PACRU_TP0 field. */ -#define BR_AIPS_PACRU_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP0)) +#define BR_AIPS_PACRU_TP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP0))) /*! @brief Format value for bitfield AIPS_PACRU_TP0. */ #define BF_AIPS_PACRU_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_TP0) & BM_AIPS_PACRU_TP0) /*! @brief Set the TP0 field to a new value. */ -#define BW_AIPS_PACRU_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP0) = (v)) +#define BW_AIPS_PACRU_TP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP0), v)) /*@}*/ /*! @@ -12386,13 +12393,13 @@ #define BS_AIPS_PACRU_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRU_WP0. */ /*! @brief Read current value of the AIPS_PACRU_WP0 field. */ -#define BR_AIPS_PACRU_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP0)) +#define BR_AIPS_PACRU_WP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP0))) /*! @brief Format value for bitfield AIPS_PACRU_WP0. */ #define BF_AIPS_PACRU_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_WP0) & BM_AIPS_PACRU_WP0) /*! @brief Set the WP0 field to a new value. */ -#define BW_AIPS_PACRU_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP0) = (v)) +#define BW_AIPS_PACRU_WP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP0), v)) /*@}*/ /*! @@ -12415,13 +12422,13 @@ #define BS_AIPS_PACRU_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRU_SP0. */ /*! @brief Read current value of the AIPS_PACRU_SP0 field. */ -#define BR_AIPS_PACRU_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP0)) +#define BR_AIPS_PACRU_SP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP0))) /*! @brief Format value for bitfield AIPS_PACRU_SP0. */ #define BF_AIPS_PACRU_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_SP0) & BM_AIPS_PACRU_SP0) /*! @brief Set the SP0 field to a new value. */ -#define BW_AIPS_PACRU_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP0) = (v)) +#define BW_AIPS_PACRU_SP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP0), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_axbs.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_axbs.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -162,8 +169,8 @@ #define HW_AXBS_PRSn_ADDR(x, n) ((x) + 0x0U + (0x100U * (n))) #define HW_AXBS_PRSn(x, n) (*(__IO hw_axbs_prsn_t *) HW_AXBS_PRSn_ADDR(x, n)) -#define HW_AXBS_PRSn_RD(x, n) (HW_AXBS_PRSn(x, n).U) -#define HW_AXBS_PRSn_WR(x, n, v) (HW_AXBS_PRSn(x, n).U = (v)) +#define HW_AXBS_PRSn_RD(x, n) (ADDRESS_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n))) +#define HW_AXBS_PRSn_WR(x, n, v) (ADDRESS_WRITE(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), v)) #define HW_AXBS_PRSn_SET(x, n, v) (HW_AXBS_PRSn_WR(x, n, HW_AXBS_PRSn_RD(x, n) | (v))) #define HW_AXBS_PRSn_CLR(x, n, v) (HW_AXBS_PRSn_WR(x, n, HW_AXBS_PRSn_RD(x, n) & ~(v))) #define HW_AXBS_PRSn_TOG(x, n, v) (HW_AXBS_PRSn_WR(x, n, HW_AXBS_PRSn_RD(x, n) ^ (v))) @@ -194,7 +201,7 @@ #define BS_AXBS_PRSn_M0 (3U) /*!< Bit field size in bits for AXBS_PRSn_M0. */ /*! @brief Read current value of the AXBS_PRSn_M0 field. */ -#define BR_AXBS_PRSn_M0(x, n) (HW_AXBS_PRSn(x, n).B.M0) +#define BR_AXBS_PRSn_M0(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M0)) /*! @brief Format value for bitfield AXBS_PRSn_M0. */ #define BF_AXBS_PRSn_M0(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M0) & BM_AXBS_PRSn_M0) @@ -224,7 +231,7 @@ #define BS_AXBS_PRSn_M1 (3U) /*!< Bit field size in bits for AXBS_PRSn_M1. */ /*! @brief Read current value of the AXBS_PRSn_M1 field. */ -#define BR_AXBS_PRSn_M1(x, n) (HW_AXBS_PRSn(x, n).B.M1) +#define BR_AXBS_PRSn_M1(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M1)) /*! @brief Format value for bitfield AXBS_PRSn_M1. */ #define BF_AXBS_PRSn_M1(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M1) & BM_AXBS_PRSn_M1) @@ -254,7 +261,7 @@ #define BS_AXBS_PRSn_M2 (3U) /*!< Bit field size in bits for AXBS_PRSn_M2. */ /*! @brief Read current value of the AXBS_PRSn_M2 field. */ -#define BR_AXBS_PRSn_M2(x, n) (HW_AXBS_PRSn(x, n).B.M2) +#define BR_AXBS_PRSn_M2(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M2)) /*! @brief Format value for bitfield AXBS_PRSn_M2. */ #define BF_AXBS_PRSn_M2(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M2) & BM_AXBS_PRSn_M2) @@ -284,7 +291,7 @@ #define BS_AXBS_PRSn_M3 (3U) /*!< Bit field size in bits for AXBS_PRSn_M3. */ /*! @brief Read current value of the AXBS_PRSn_M3 field. */ -#define BR_AXBS_PRSn_M3(x, n) (HW_AXBS_PRSn(x, n).B.M3) +#define BR_AXBS_PRSn_M3(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M3)) /*! @brief Format value for bitfield AXBS_PRSn_M3. */ #define BF_AXBS_PRSn_M3(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M3) & BM_AXBS_PRSn_M3) @@ -314,7 +321,7 @@ #define BS_AXBS_PRSn_M4 (3U) /*!< Bit field size in bits for AXBS_PRSn_M4. */ /*! @brief Read current value of the AXBS_PRSn_M4 field. */ -#define BR_AXBS_PRSn_M4(x, n) (HW_AXBS_PRSn(x, n).B.M4) +#define BR_AXBS_PRSn_M4(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M4)) /*! @brief Format value for bitfield AXBS_PRSn_M4. */ #define BF_AXBS_PRSn_M4(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M4) & BM_AXBS_PRSn_M4) @@ -344,7 +351,7 @@ #define BS_AXBS_PRSn_M5 (3U) /*!< Bit field size in bits for AXBS_PRSn_M5. */ /*! @brief Read current value of the AXBS_PRSn_M5 field. */ -#define BR_AXBS_PRSn_M5(x, n) (HW_AXBS_PRSn(x, n).B.M5) +#define BR_AXBS_PRSn_M5(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M5)) /*! @brief Format value for bitfield AXBS_PRSn_M5. */ #define BF_AXBS_PRSn_M5(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M5) & BM_AXBS_PRSn_M5) @@ -390,8 +397,8 @@ #define HW_AXBS_CRSn_ADDR(x, n) ((x) + 0x10U + (0x100U * (n))) #define HW_AXBS_CRSn(x, n) (*(__IO hw_axbs_crsn_t *) HW_AXBS_CRSn_ADDR(x, n)) -#define HW_AXBS_CRSn_RD(x, n) (HW_AXBS_CRSn(x, n).U) -#define HW_AXBS_CRSn_WR(x, n, v) (HW_AXBS_CRSn(x, n).U = (v)) +#define HW_AXBS_CRSn_RD(x, n) (ADDRESS_READ(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n))) +#define HW_AXBS_CRSn_WR(x, n, v) (ADDRESS_WRITE(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n), v)) #define HW_AXBS_CRSn_SET(x, n, v) (HW_AXBS_CRSn_WR(x, n, HW_AXBS_CRSn_RD(x, n) | (v))) #define HW_AXBS_CRSn_CLR(x, n, v) (HW_AXBS_CRSn_WR(x, n, HW_AXBS_CRSn_RD(x, n) & ~(v))) #define HW_AXBS_CRSn_TOG(x, n, v) (HW_AXBS_CRSn_WR(x, n, HW_AXBS_CRSn_RD(x, n) ^ (v))) @@ -424,7 +431,7 @@ #define BS_AXBS_CRSn_PARK (3U) /*!< Bit field size in bits for AXBS_CRSn_PARK. */ /*! @brief Read current value of the AXBS_CRSn_PARK field. */ -#define BR_AXBS_CRSn_PARK(x, n) (HW_AXBS_CRSn(x, n).B.PARK) +#define BR_AXBS_CRSn_PARK(x, n) (UNION_READ(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n), U, B.PARK)) /*! @brief Format value for bitfield AXBS_CRSn_PARK. */ #define BF_AXBS_CRSn_PARK(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_PARK) & BM_AXBS_CRSn_PARK) @@ -456,7 +463,7 @@ #define BS_AXBS_CRSn_PCTL (2U) /*!< Bit field size in bits for AXBS_CRSn_PCTL. */ /*! @brief Read current value of the AXBS_CRSn_PCTL field. */ -#define BR_AXBS_CRSn_PCTL(x, n) (HW_AXBS_CRSn(x, n).B.PCTL) +#define BR_AXBS_CRSn_PCTL(x, n) (UNION_READ(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n), U, B.PCTL)) /*! @brief Format value for bitfield AXBS_CRSn_PCTL. */ #define BF_AXBS_CRSn_PCTL(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_PCTL) & BM_AXBS_CRSn_PCTL) @@ -482,7 +489,7 @@ #define BS_AXBS_CRSn_ARB (2U) /*!< Bit field size in bits for AXBS_CRSn_ARB. */ /*! @brief Read current value of the AXBS_CRSn_ARB field. */ -#define BR_AXBS_CRSn_ARB(x, n) (HW_AXBS_CRSn(x, n).B.ARB) +#define BR_AXBS_CRSn_ARB(x, n) (UNION_READ(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n), U, B.ARB)) /*! @brief Format value for bitfield AXBS_CRSn_ARB. */ #define BF_AXBS_CRSn_ARB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_ARB) & BM_AXBS_CRSn_ARB) @@ -510,13 +517,13 @@ #define BS_AXBS_CRSn_HLP (1U) /*!< Bit field size in bits for AXBS_CRSn_HLP. */ /*! @brief Read current value of the AXBS_CRSn_HLP field. */ -#define BR_AXBS_CRSn_HLP(x, n) (BITBAND_ACCESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_HLP)) +#define BR_AXBS_CRSn_HLP(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_HLP))) /*! @brief Format value for bitfield AXBS_CRSn_HLP. */ #define BF_AXBS_CRSn_HLP(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_HLP) & BM_AXBS_CRSn_HLP) /*! @brief Set the HLP field to a new value. */ -#define BW_AXBS_CRSn_HLP(x, n, v) (BITBAND_ACCESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_HLP) = (v)) +#define BW_AXBS_CRSn_HLP(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_HLP), v)) /*@}*/ /*! @@ -537,13 +544,13 @@ #define BS_AXBS_CRSn_RO (1U) /*!< Bit field size in bits for AXBS_CRSn_RO. */ /*! @brief Read current value of the AXBS_CRSn_RO field. */ -#define BR_AXBS_CRSn_RO(x, n) (BITBAND_ACCESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_RO)) +#define BR_AXBS_CRSn_RO(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_RO))) /*! @brief Format value for bitfield AXBS_CRSn_RO. */ #define BF_AXBS_CRSn_RO(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_RO) & BM_AXBS_CRSn_RO) /*! @brief Set the RO field to a new value. */ -#define BW_AXBS_CRSn_RO(x, n, v) (BITBAND_ACCESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_RO) = (v)) +#define BW_AXBS_CRSn_RO(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_RO), v)) /*@}*/ /******************************************************************************* @@ -577,8 +584,8 @@ #define HW_AXBS_MGPCR0_ADDR(x) ((x) + 0x800U) #define HW_AXBS_MGPCR0(x) (*(__IO hw_axbs_mgpcr0_t *) HW_AXBS_MGPCR0_ADDR(x)) -#define HW_AXBS_MGPCR0_RD(x) (HW_AXBS_MGPCR0(x).U) -#define HW_AXBS_MGPCR0_WR(x, v) (HW_AXBS_MGPCR0(x).U = (v)) +#define HW_AXBS_MGPCR0_RD(x) (ADDRESS_READ(hw_axbs_mgpcr0_t, HW_AXBS_MGPCR0_ADDR(x))) +#define HW_AXBS_MGPCR0_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr0_t, HW_AXBS_MGPCR0_ADDR(x), v)) #define HW_AXBS_MGPCR0_SET(x, v) (HW_AXBS_MGPCR0_WR(x, HW_AXBS_MGPCR0_RD(x) | (v))) #define HW_AXBS_MGPCR0_CLR(x, v) (HW_AXBS_MGPCR0_WR(x, HW_AXBS_MGPCR0_RD(x) & ~(v))) #define HW_AXBS_MGPCR0_TOG(x, v) (HW_AXBS_MGPCR0_WR(x, HW_AXBS_MGPCR0_RD(x) ^ (v))) @@ -611,7 +618,7 @@ #define BS_AXBS_MGPCR0_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR0_AULB. */ /*! @brief Read current value of the AXBS_MGPCR0_AULB field. */ -#define BR_AXBS_MGPCR0_AULB(x) (HW_AXBS_MGPCR0(x).B.AULB) +#define BR_AXBS_MGPCR0_AULB(x) (UNION_READ(hw_axbs_mgpcr0_t, HW_AXBS_MGPCR0_ADDR(x), U, B.AULB)) /*! @brief Format value for bitfield AXBS_MGPCR0_AULB. */ #define BF_AXBS_MGPCR0_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR0_AULB) & BM_AXBS_MGPCR0_AULB) @@ -651,8 +658,8 @@ #define HW_AXBS_MGPCR1_ADDR(x) ((x) + 0x900U) #define HW_AXBS_MGPCR1(x) (*(__IO hw_axbs_mgpcr1_t *) HW_AXBS_MGPCR1_ADDR(x)) -#define HW_AXBS_MGPCR1_RD(x) (HW_AXBS_MGPCR1(x).U) -#define HW_AXBS_MGPCR1_WR(x, v) (HW_AXBS_MGPCR1(x).U = (v)) +#define HW_AXBS_MGPCR1_RD(x) (ADDRESS_READ(hw_axbs_mgpcr1_t, HW_AXBS_MGPCR1_ADDR(x))) +#define HW_AXBS_MGPCR1_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr1_t, HW_AXBS_MGPCR1_ADDR(x), v)) #define HW_AXBS_MGPCR1_SET(x, v) (HW_AXBS_MGPCR1_WR(x, HW_AXBS_MGPCR1_RD(x) | (v))) #define HW_AXBS_MGPCR1_CLR(x, v) (HW_AXBS_MGPCR1_WR(x, HW_AXBS_MGPCR1_RD(x) & ~(v))) #define HW_AXBS_MGPCR1_TOG(x, v) (HW_AXBS_MGPCR1_WR(x, HW_AXBS_MGPCR1_RD(x) ^ (v))) @@ -685,7 +692,7 @@ #define BS_AXBS_MGPCR1_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR1_AULB. */ /*! @brief Read current value of the AXBS_MGPCR1_AULB field. */ -#define BR_AXBS_MGPCR1_AULB(x) (HW_AXBS_MGPCR1(x).B.AULB) +#define BR_AXBS_MGPCR1_AULB(x) (UNION_READ(hw_axbs_mgpcr1_t, HW_AXBS_MGPCR1_ADDR(x), U, B.AULB)) /*! @brief Format value for bitfield AXBS_MGPCR1_AULB. */ #define BF_AXBS_MGPCR1_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR1_AULB) & BM_AXBS_MGPCR1_AULB) @@ -725,8 +732,8 @@ #define HW_AXBS_MGPCR2_ADDR(x) ((x) + 0xA00U) #define HW_AXBS_MGPCR2(x) (*(__IO hw_axbs_mgpcr2_t *) HW_AXBS_MGPCR2_ADDR(x)) -#define HW_AXBS_MGPCR2_RD(x) (HW_AXBS_MGPCR2(x).U) -#define HW_AXBS_MGPCR2_WR(x, v) (HW_AXBS_MGPCR2(x).U = (v)) +#define HW_AXBS_MGPCR2_RD(x) (ADDRESS_READ(hw_axbs_mgpcr2_t, HW_AXBS_MGPCR2_ADDR(x))) +#define HW_AXBS_MGPCR2_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr2_t, HW_AXBS_MGPCR2_ADDR(x), v)) #define HW_AXBS_MGPCR2_SET(x, v) (HW_AXBS_MGPCR2_WR(x, HW_AXBS_MGPCR2_RD(x) | (v))) #define HW_AXBS_MGPCR2_CLR(x, v) (HW_AXBS_MGPCR2_WR(x, HW_AXBS_MGPCR2_RD(x) & ~(v))) #define HW_AXBS_MGPCR2_TOG(x, v) (HW_AXBS_MGPCR2_WR(x, HW_AXBS_MGPCR2_RD(x) ^ (v))) @@ -759,7 +766,7 @@ #define BS_AXBS_MGPCR2_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR2_AULB. */ /*! @brief Read current value of the AXBS_MGPCR2_AULB field. */ -#define BR_AXBS_MGPCR2_AULB(x) (HW_AXBS_MGPCR2(x).B.AULB) +#define BR_AXBS_MGPCR2_AULB(x) (UNION_READ(hw_axbs_mgpcr2_t, HW_AXBS_MGPCR2_ADDR(x), U, B.AULB)) /*! @brief Format value for bitfield AXBS_MGPCR2_AULB. */ #define BF_AXBS_MGPCR2_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR2_AULB) & BM_AXBS_MGPCR2_AULB) @@ -799,8 +806,8 @@ #define HW_AXBS_MGPCR3_ADDR(x) ((x) + 0xB00U) #define HW_AXBS_MGPCR3(x) (*(__IO hw_axbs_mgpcr3_t *) HW_AXBS_MGPCR3_ADDR(x)) -#define HW_AXBS_MGPCR3_RD(x) (HW_AXBS_MGPCR3(x).U) -#define HW_AXBS_MGPCR3_WR(x, v) (HW_AXBS_MGPCR3(x).U = (v)) +#define HW_AXBS_MGPCR3_RD(x) (ADDRESS_READ(hw_axbs_mgpcr3_t, HW_AXBS_MGPCR3_ADDR(x))) +#define HW_AXBS_MGPCR3_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr3_t, HW_AXBS_MGPCR3_ADDR(x), v)) #define HW_AXBS_MGPCR3_SET(x, v) (HW_AXBS_MGPCR3_WR(x, HW_AXBS_MGPCR3_RD(x) | (v))) #define HW_AXBS_MGPCR3_CLR(x, v) (HW_AXBS_MGPCR3_WR(x, HW_AXBS_MGPCR3_RD(x) & ~(v))) #define HW_AXBS_MGPCR3_TOG(x, v) (HW_AXBS_MGPCR3_WR(x, HW_AXBS_MGPCR3_RD(x) ^ (v))) @@ -833,7 +840,7 @@ #define BS_AXBS_MGPCR3_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR3_AULB. */ /*! @brief Read current value of the AXBS_MGPCR3_AULB field. */ -#define BR_AXBS_MGPCR3_AULB(x) (HW_AXBS_MGPCR3(x).B.AULB) +#define BR_AXBS_MGPCR3_AULB(x) (UNION_READ(hw_axbs_mgpcr3_t, HW_AXBS_MGPCR3_ADDR(x), U, B.AULB)) /*! @brief Format value for bitfield AXBS_MGPCR3_AULB. */ #define BF_AXBS_MGPCR3_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR3_AULB) & BM_AXBS_MGPCR3_AULB) @@ -873,8 +880,8 @@ #define HW_AXBS_MGPCR4_ADDR(x) ((x) + 0xC00U) #define HW_AXBS_MGPCR4(x) (*(__IO hw_axbs_mgpcr4_t *) HW_AXBS_MGPCR4_ADDR(x)) -#define HW_AXBS_MGPCR4_RD(x) (HW_AXBS_MGPCR4(x).U) -#define HW_AXBS_MGPCR4_WR(x, v) (HW_AXBS_MGPCR4(x).U = (v)) +#define HW_AXBS_MGPCR4_RD(x) (ADDRESS_READ(hw_axbs_mgpcr4_t, HW_AXBS_MGPCR4_ADDR(x))) +#define HW_AXBS_MGPCR4_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr4_t, HW_AXBS_MGPCR4_ADDR(x), v)) #define HW_AXBS_MGPCR4_SET(x, v) (HW_AXBS_MGPCR4_WR(x, HW_AXBS_MGPCR4_RD(x) | (v))) #define HW_AXBS_MGPCR4_CLR(x, v) (HW_AXBS_MGPCR4_WR(x, HW_AXBS_MGPCR4_RD(x) & ~(v))) #define HW_AXBS_MGPCR4_TOG(x, v) (HW_AXBS_MGPCR4_WR(x, HW_AXBS_MGPCR4_RD(x) ^ (v))) @@ -907,7 +914,7 @@ #define BS_AXBS_MGPCR4_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR4_AULB. */ /*! @brief Read current value of the AXBS_MGPCR4_AULB field. */ -#define BR_AXBS_MGPCR4_AULB(x) (HW_AXBS_MGPCR4(x).B.AULB) +#define BR_AXBS_MGPCR4_AULB(x) (UNION_READ(hw_axbs_mgpcr4_t, HW_AXBS_MGPCR4_ADDR(x), U, B.AULB)) /*! @brief Format value for bitfield AXBS_MGPCR4_AULB. */ #define BF_AXBS_MGPCR4_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR4_AULB) & BM_AXBS_MGPCR4_AULB) @@ -947,8 +954,8 @@ #define HW_AXBS_MGPCR5_ADDR(x) ((x) + 0xD00U) #define HW_AXBS_MGPCR5(x) (*(__IO hw_axbs_mgpcr5_t *) HW_AXBS_MGPCR5_ADDR(x)) -#define HW_AXBS_MGPCR5_RD(x) (HW_AXBS_MGPCR5(x).U) -#define HW_AXBS_MGPCR5_WR(x, v) (HW_AXBS_MGPCR5(x).U = (v)) +#define HW_AXBS_MGPCR5_RD(x) (ADDRESS_READ(hw_axbs_mgpcr5_t, HW_AXBS_MGPCR5_ADDR(x))) +#define HW_AXBS_MGPCR5_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr5_t, HW_AXBS_MGPCR5_ADDR(x), v)) #define HW_AXBS_MGPCR5_SET(x, v) (HW_AXBS_MGPCR5_WR(x, HW_AXBS_MGPCR5_RD(x) | (v))) #define HW_AXBS_MGPCR5_CLR(x, v) (HW_AXBS_MGPCR5_WR(x, HW_AXBS_MGPCR5_RD(x) & ~(v))) #define HW_AXBS_MGPCR5_TOG(x, v) (HW_AXBS_MGPCR5_WR(x, HW_AXBS_MGPCR5_RD(x) ^ (v))) @@ -981,7 +988,7 @@ #define BS_AXBS_MGPCR5_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR5_AULB. */ /*! @brief Read current value of the AXBS_MGPCR5_AULB field. */ -#define BR_AXBS_MGPCR5_AULB(x) (HW_AXBS_MGPCR5(x).B.AULB) +#define BR_AXBS_MGPCR5_AULB(x) (UNION_READ(hw_axbs_mgpcr5_t, HW_AXBS_MGPCR5_ADDR(x), U, B.AULB)) /*! @brief Format value for bitfield AXBS_MGPCR5_AULB. */ #define BF_AXBS_MGPCR5_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR5_AULB) & BM_AXBS_MGPCR5_AULB)
--- a/hal/device/device/MK64F12/MK64F12_can.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_can.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -165,8 +172,8 @@ #define HW_CAN_MCR_ADDR(x) ((x) + 0x0U) #define HW_CAN_MCR(x) (*(__IO hw_can_mcr_t *) HW_CAN_MCR_ADDR(x)) -#define HW_CAN_MCR_RD(x) (HW_CAN_MCR(x).U) -#define HW_CAN_MCR_WR(x, v) (HW_CAN_MCR(x).U = (v)) +#define HW_CAN_MCR_RD(x) (ADDRESS_READ(hw_can_mcr_t, HW_CAN_MCR_ADDR(x))) +#define HW_CAN_MCR_WR(x, v) (ADDRESS_WRITE(hw_can_mcr_t, HW_CAN_MCR_ADDR(x), v)) #define HW_CAN_MCR_SET(x, v) (HW_CAN_MCR_WR(x, HW_CAN_MCR_RD(x) | (v))) #define HW_CAN_MCR_CLR(x, v) (HW_CAN_MCR_WR(x, HW_CAN_MCR_RD(x) & ~(v))) #define HW_CAN_MCR_TOG(x, v) (HW_CAN_MCR_WR(x, HW_CAN_MCR_RD(x) ^ (v))) @@ -197,7 +204,7 @@ #define BS_CAN_MCR_MAXMB (7U) /*!< Bit field size in bits for CAN_MCR_MAXMB. */ /*! @brief Read current value of the CAN_MCR_MAXMB field. */ -#define BR_CAN_MCR_MAXMB(x) (HW_CAN_MCR(x).B.MAXMB) +#define BR_CAN_MCR_MAXMB(x) (UNION_READ(hw_can_mcr_t, HW_CAN_MCR_ADDR(x), U, B.MAXMB)) /*! @brief Format value for bitfield CAN_MCR_MAXMB. */ #define BF_CAN_MCR_MAXMB(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_MAXMB) & BM_CAN_MCR_MAXMB) @@ -229,7 +236,7 @@ #define BS_CAN_MCR_IDAM (2U) /*!< Bit field size in bits for CAN_MCR_IDAM. */ /*! @brief Read current value of the CAN_MCR_IDAM field. */ -#define BR_CAN_MCR_IDAM(x) (HW_CAN_MCR(x).B.IDAM) +#define BR_CAN_MCR_IDAM(x) (UNION_READ(hw_can_mcr_t, HW_CAN_MCR_ADDR(x), U, B.IDAM)) /*! @brief Format value for bitfield CAN_MCR_IDAM. */ #define BF_CAN_MCR_IDAM(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_IDAM) & BM_CAN_MCR_IDAM) @@ -261,13 +268,13 @@ #define BS_CAN_MCR_AEN (1U) /*!< Bit field size in bits for CAN_MCR_AEN. */ /*! @brief Read current value of the CAN_MCR_AEN field. */ -#define BR_CAN_MCR_AEN(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_AEN)) +#define BR_CAN_MCR_AEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_AEN))) /*! @brief Format value for bitfield CAN_MCR_AEN. */ #define BF_CAN_MCR_AEN(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_AEN) & BM_CAN_MCR_AEN) /*! @brief Set the AEN field to a new value. */ -#define BW_CAN_MCR_AEN(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_AEN) = (v)) +#define BW_CAN_MCR_AEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_AEN), v)) /*@}*/ /*! @@ -291,13 +298,13 @@ #define BS_CAN_MCR_LPRIOEN (1U) /*!< Bit field size in bits for CAN_MCR_LPRIOEN. */ /*! @brief Read current value of the CAN_MCR_LPRIOEN field. */ -#define BR_CAN_MCR_LPRIOEN(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_LPRIOEN)) +#define BR_CAN_MCR_LPRIOEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_LPRIOEN))) /*! @brief Format value for bitfield CAN_MCR_LPRIOEN. */ #define BF_CAN_MCR_LPRIOEN(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_LPRIOEN) & BM_CAN_MCR_LPRIOEN) /*! @brief Set the LPRIOEN field to a new value. */ -#define BW_CAN_MCR_LPRIOEN(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_LPRIOEN) = (v)) +#define BW_CAN_MCR_LPRIOEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_LPRIOEN), v)) /*@}*/ /*! @@ -320,13 +327,13 @@ #define BS_CAN_MCR_IRMQ (1U) /*!< Bit field size in bits for CAN_MCR_IRMQ. */ /*! @brief Read current value of the CAN_MCR_IRMQ field. */ -#define BR_CAN_MCR_IRMQ(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_IRMQ)) +#define BR_CAN_MCR_IRMQ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_IRMQ))) /*! @brief Format value for bitfield CAN_MCR_IRMQ. */ #define BF_CAN_MCR_IRMQ(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_IRMQ) & BM_CAN_MCR_IRMQ) /*! @brief Set the IRMQ field to a new value. */ -#define BW_CAN_MCR_IRMQ(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_IRMQ) = (v)) +#define BW_CAN_MCR_IRMQ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_IRMQ), v)) /*@}*/ /*! @@ -349,13 +356,13 @@ #define BS_CAN_MCR_SRXDIS (1U) /*!< Bit field size in bits for CAN_MCR_SRXDIS. */ /*! @brief Read current value of the CAN_MCR_SRXDIS field. */ -#define BR_CAN_MCR_SRXDIS(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SRXDIS)) +#define BR_CAN_MCR_SRXDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SRXDIS))) /*! @brief Format value for bitfield CAN_MCR_SRXDIS. */ #define BF_CAN_MCR_SRXDIS(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_SRXDIS) & BM_CAN_MCR_SRXDIS) /*! @brief Set the SRXDIS field to a new value. */ -#define BW_CAN_MCR_SRXDIS(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SRXDIS) = (v)) +#define BW_CAN_MCR_SRXDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SRXDIS), v)) /*@}*/ /*! @@ -377,13 +384,13 @@ #define BS_CAN_MCR_WAKSRC (1U) /*!< Bit field size in bits for CAN_MCR_WAKSRC. */ /*! @brief Read current value of the CAN_MCR_WAKSRC field. */ -#define BR_CAN_MCR_WAKSRC(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WAKSRC)) +#define BR_CAN_MCR_WAKSRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WAKSRC))) /*! @brief Format value for bitfield CAN_MCR_WAKSRC. */ #define BF_CAN_MCR_WAKSRC(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_WAKSRC) & BM_CAN_MCR_WAKSRC) /*! @brief Set the WAKSRC field to a new value. */ -#define BW_CAN_MCR_WAKSRC(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WAKSRC) = (v)) +#define BW_CAN_MCR_WAKSRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WAKSRC), v)) /*@}*/ /*! @@ -407,7 +414,7 @@ #define BS_CAN_MCR_LPMACK (1U) /*!< Bit field size in bits for CAN_MCR_LPMACK. */ /*! @brief Read current value of the CAN_MCR_LPMACK field. */ -#define BR_CAN_MCR_LPMACK(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_LPMACK)) +#define BR_CAN_MCR_LPMACK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_LPMACK))) /*@}*/ /*! @@ -431,13 +438,13 @@ #define BS_CAN_MCR_WRNEN (1U) /*!< Bit field size in bits for CAN_MCR_WRNEN. */ /*! @brief Read current value of the CAN_MCR_WRNEN field. */ -#define BR_CAN_MCR_WRNEN(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WRNEN)) +#define BR_CAN_MCR_WRNEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WRNEN))) /*! @brief Format value for bitfield CAN_MCR_WRNEN. */ #define BF_CAN_MCR_WRNEN(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_WRNEN) & BM_CAN_MCR_WRNEN) /*! @brief Set the WRNEN field to a new value. */ -#define BW_CAN_MCR_WRNEN(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WRNEN) = (v)) +#define BW_CAN_MCR_WRNEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WRNEN), v)) /*@}*/ /*! @@ -462,13 +469,13 @@ #define BS_CAN_MCR_SLFWAK (1U) /*!< Bit field size in bits for CAN_MCR_SLFWAK. */ /*! @brief Read current value of the CAN_MCR_SLFWAK field. */ -#define BR_CAN_MCR_SLFWAK(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SLFWAK)) +#define BR_CAN_MCR_SLFWAK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SLFWAK))) /*! @brief Format value for bitfield CAN_MCR_SLFWAK. */ #define BF_CAN_MCR_SLFWAK(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_SLFWAK) & BM_CAN_MCR_SLFWAK) /*! @brief Set the SLFWAK field to a new value. */ -#define BW_CAN_MCR_SLFWAK(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SLFWAK) = (v)) +#define BW_CAN_MCR_SLFWAK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SLFWAK), v)) /*@}*/ /*! @@ -493,13 +500,13 @@ #define BS_CAN_MCR_SUPV (1U) /*!< Bit field size in bits for CAN_MCR_SUPV. */ /*! @brief Read current value of the CAN_MCR_SUPV field. */ -#define BR_CAN_MCR_SUPV(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SUPV)) +#define BR_CAN_MCR_SUPV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SUPV))) /*! @brief Format value for bitfield CAN_MCR_SUPV. */ #define BF_CAN_MCR_SUPV(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_SUPV) & BM_CAN_MCR_SUPV) /*! @brief Set the SUPV field to a new value. */ -#define BW_CAN_MCR_SUPV(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SUPV) = (v)) +#define BW_CAN_MCR_SUPV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SUPV), v)) /*@}*/ /*! @@ -526,7 +533,7 @@ #define BS_CAN_MCR_FRZACK (1U) /*!< Bit field size in bits for CAN_MCR_FRZACK. */ /*! @brief Read current value of the CAN_MCR_FRZACK field. */ -#define BR_CAN_MCR_FRZACK(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_FRZACK)) +#define BR_CAN_MCR_FRZACK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_FRZACK))) /*@}*/ /*! @@ -558,13 +565,13 @@ #define BS_CAN_MCR_SOFTRST (1U) /*!< Bit field size in bits for CAN_MCR_SOFTRST. */ /*! @brief Read current value of the CAN_MCR_SOFTRST field. */ -#define BR_CAN_MCR_SOFTRST(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SOFTRST)) +#define BR_CAN_MCR_SOFTRST(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SOFTRST))) /*! @brief Format value for bitfield CAN_MCR_SOFTRST. */ #define BF_CAN_MCR_SOFTRST(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_SOFTRST) & BM_CAN_MCR_SOFTRST) /*! @brief Set the SOFTRST field to a new value. */ -#define BW_CAN_MCR_SOFTRST(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SOFTRST) = (v)) +#define BW_CAN_MCR_SOFTRST(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_SOFTRST), v)) /*@}*/ /*! @@ -583,13 +590,13 @@ #define BS_CAN_MCR_WAKMSK (1U) /*!< Bit field size in bits for CAN_MCR_WAKMSK. */ /*! @brief Read current value of the CAN_MCR_WAKMSK field. */ -#define BR_CAN_MCR_WAKMSK(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WAKMSK)) +#define BR_CAN_MCR_WAKMSK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WAKMSK))) /*! @brief Format value for bitfield CAN_MCR_WAKMSK. */ #define BF_CAN_MCR_WAKMSK(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_WAKMSK) & BM_CAN_MCR_WAKMSK) /*! @brief Set the WAKMSK field to a new value. */ -#define BW_CAN_MCR_WAKMSK(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WAKMSK) = (v)) +#define BW_CAN_MCR_WAKMSK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_WAKMSK), v)) /*@}*/ /*! @@ -609,7 +616,7 @@ #define BS_CAN_MCR_NOTRDY (1U) /*!< Bit field size in bits for CAN_MCR_NOTRDY. */ /*! @brief Read current value of the CAN_MCR_NOTRDY field. */ -#define BR_CAN_MCR_NOTRDY(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_NOTRDY)) +#define BR_CAN_MCR_NOTRDY(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_NOTRDY))) /*@}*/ /*! @@ -630,13 +637,13 @@ #define BS_CAN_MCR_HALT (1U) /*!< Bit field size in bits for CAN_MCR_HALT. */ /*! @brief Read current value of the CAN_MCR_HALT field. */ -#define BR_CAN_MCR_HALT(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_HALT)) +#define BR_CAN_MCR_HALT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_HALT))) /*! @brief Format value for bitfield CAN_MCR_HALT. */ #define BF_CAN_MCR_HALT(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_HALT) & BM_CAN_MCR_HALT) /*! @brief Set the HALT field to a new value. */ -#define BW_CAN_MCR_HALT(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_HALT) = (v)) +#define BW_CAN_MCR_HALT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_HALT), v)) /*@}*/ /*! @@ -662,13 +669,13 @@ #define BS_CAN_MCR_RFEN (1U) /*!< Bit field size in bits for CAN_MCR_RFEN. */ /*! @brief Read current value of the CAN_MCR_RFEN field. */ -#define BR_CAN_MCR_RFEN(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_RFEN)) +#define BR_CAN_MCR_RFEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_RFEN))) /*! @brief Format value for bitfield CAN_MCR_RFEN. */ #define BF_CAN_MCR_RFEN(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_RFEN) & BM_CAN_MCR_RFEN) /*! @brief Set the RFEN field to a new value. */ -#define BW_CAN_MCR_RFEN(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_RFEN) = (v)) +#define BW_CAN_MCR_RFEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_RFEN), v)) /*@}*/ /*! @@ -689,13 +696,13 @@ #define BS_CAN_MCR_FRZ (1U) /*!< Bit field size in bits for CAN_MCR_FRZ. */ /*! @brief Read current value of the CAN_MCR_FRZ field. */ -#define BR_CAN_MCR_FRZ(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_FRZ)) +#define BR_CAN_MCR_FRZ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_FRZ))) /*! @brief Format value for bitfield CAN_MCR_FRZ. */ #define BF_CAN_MCR_FRZ(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_FRZ) & BM_CAN_MCR_FRZ) /*! @brief Set the FRZ field to a new value. */ -#define BW_CAN_MCR_FRZ(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_FRZ) = (v)) +#define BW_CAN_MCR_FRZ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_FRZ), v)) /*@}*/ /*! @@ -716,13 +723,13 @@ #define BS_CAN_MCR_MDIS (1U) /*!< Bit field size in bits for CAN_MCR_MDIS. */ /*! @brief Read current value of the CAN_MCR_MDIS field. */ -#define BR_CAN_MCR_MDIS(x) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_MDIS)) +#define BR_CAN_MCR_MDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_MDIS))) /*! @brief Format value for bitfield CAN_MCR_MDIS. */ #define BF_CAN_MCR_MDIS(v) ((uint32_t)((uint32_t)(v) << BP_CAN_MCR_MDIS) & BM_CAN_MCR_MDIS) /*! @brief Set the MDIS field to a new value. */ -#define BW_CAN_MCR_MDIS(x, v) (BITBAND_ACCESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_MDIS) = (v)) +#define BW_CAN_MCR_MDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_MCR_ADDR(x), BP_CAN_MCR_MDIS), v)) /*@}*/ /******************************************************************************* @@ -772,8 +779,8 @@ #define HW_CAN_CTRL1_ADDR(x) ((x) + 0x4U) #define HW_CAN_CTRL1(x) (*(__IO hw_can_ctrl1_t *) HW_CAN_CTRL1_ADDR(x)) -#define HW_CAN_CTRL1_RD(x) (HW_CAN_CTRL1(x).U) -#define HW_CAN_CTRL1_WR(x, v) (HW_CAN_CTRL1(x).U = (v)) +#define HW_CAN_CTRL1_RD(x) (ADDRESS_READ(hw_can_ctrl1_t, HW_CAN_CTRL1_ADDR(x))) +#define HW_CAN_CTRL1_WR(x, v) (ADDRESS_WRITE(hw_can_ctrl1_t, HW_CAN_CTRL1_ADDR(x), v)) #define HW_CAN_CTRL1_SET(x, v) (HW_CAN_CTRL1_WR(x, HW_CAN_CTRL1_RD(x) | (v))) #define HW_CAN_CTRL1_CLR(x, v) (HW_CAN_CTRL1_WR(x, HW_CAN_CTRL1_RD(x) & ~(v))) #define HW_CAN_CTRL1_TOG(x, v) (HW_CAN_CTRL1_WR(x, HW_CAN_CTRL1_RD(x) ^ (v))) @@ -797,7 +804,7 @@ #define BS_CAN_CTRL1_PROPSEG (3U) /*!< Bit field size in bits for CAN_CTRL1_PROPSEG. */ /*! @brief Read current value of the CAN_CTRL1_PROPSEG field. */ -#define BR_CAN_CTRL1_PROPSEG(x) (HW_CAN_CTRL1(x).B.PROPSEG) +#define BR_CAN_CTRL1_PROPSEG(x) (UNION_READ(hw_can_ctrl1_t, HW_CAN_CTRL1_ADDR(x), U, B.PROPSEG)) /*! @brief Format value for bitfield CAN_CTRL1_PROPSEG. */ #define BF_CAN_CTRL1_PROPSEG(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_PROPSEG) & BM_CAN_CTRL1_PROPSEG) @@ -830,13 +837,13 @@ #define BS_CAN_CTRL1_LOM (1U) /*!< Bit field size in bits for CAN_CTRL1_LOM. */ /*! @brief Read current value of the CAN_CTRL1_LOM field. */ -#define BR_CAN_CTRL1_LOM(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LOM)) +#define BR_CAN_CTRL1_LOM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LOM))) /*! @brief Format value for bitfield CAN_CTRL1_LOM. */ #define BF_CAN_CTRL1_LOM(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_LOM) & BM_CAN_CTRL1_LOM) /*! @brief Set the LOM field to a new value. */ -#define BW_CAN_CTRL1_LOM(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LOM) = (v)) +#define BW_CAN_CTRL1_LOM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LOM), v)) /*@}*/ /*! @@ -857,13 +864,13 @@ #define BS_CAN_CTRL1_LBUF (1U) /*!< Bit field size in bits for CAN_CTRL1_LBUF. */ /*! @brief Read current value of the CAN_CTRL1_LBUF field. */ -#define BR_CAN_CTRL1_LBUF(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LBUF)) +#define BR_CAN_CTRL1_LBUF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LBUF))) /*! @brief Format value for bitfield CAN_CTRL1_LBUF. */ #define BF_CAN_CTRL1_LBUF(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_LBUF) & BM_CAN_CTRL1_LBUF) /*! @brief Set the LBUF field to a new value. */ -#define BW_CAN_CTRL1_LBUF(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LBUF) = (v)) +#define BW_CAN_CTRL1_LBUF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LBUF), v)) /*@}*/ /*! @@ -887,13 +894,13 @@ #define BS_CAN_CTRL1_TSYN (1U) /*!< Bit field size in bits for CAN_CTRL1_TSYN. */ /*! @brief Read current value of the CAN_CTRL1_TSYN field. */ -#define BR_CAN_CTRL1_TSYN(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_TSYN)) +#define BR_CAN_CTRL1_TSYN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_TSYN))) /*! @brief Format value for bitfield CAN_CTRL1_TSYN. */ #define BF_CAN_CTRL1_TSYN(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_TSYN) & BM_CAN_CTRL1_TSYN) /*! @brief Set the TSYN field to a new value. */ -#define BW_CAN_CTRL1_TSYN(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_TSYN) = (v)) +#define BW_CAN_CTRL1_TSYN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_TSYN), v)) /*@}*/ /*! @@ -924,13 +931,13 @@ #define BS_CAN_CTRL1_BOFFREC (1U) /*!< Bit field size in bits for CAN_CTRL1_BOFFREC. */ /*! @brief Read current value of the CAN_CTRL1_BOFFREC field. */ -#define BR_CAN_CTRL1_BOFFREC(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_BOFFREC)) +#define BR_CAN_CTRL1_BOFFREC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_BOFFREC))) /*! @brief Format value for bitfield CAN_CTRL1_BOFFREC. */ #define BF_CAN_CTRL1_BOFFREC(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_BOFFREC) & BM_CAN_CTRL1_BOFFREC) /*! @brief Set the BOFFREC field to a new value. */ -#define BW_CAN_CTRL1_BOFFREC(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_BOFFREC) = (v)) +#define BW_CAN_CTRL1_BOFFREC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_BOFFREC), v)) /*@}*/ /*! @@ -952,13 +959,13 @@ #define BS_CAN_CTRL1_SMP (1U) /*!< Bit field size in bits for CAN_CTRL1_SMP. */ /*! @brief Read current value of the CAN_CTRL1_SMP field. */ -#define BR_CAN_CTRL1_SMP(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_SMP)) +#define BR_CAN_CTRL1_SMP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_SMP))) /*! @brief Format value for bitfield CAN_CTRL1_SMP. */ #define BF_CAN_CTRL1_SMP(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_SMP) & BM_CAN_CTRL1_SMP) /*! @brief Set the SMP field to a new value. */ -#define BW_CAN_CTRL1_SMP(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_SMP) = (v)) +#define BW_CAN_CTRL1_SMP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_SMP), v)) /*@}*/ /*! @@ -979,13 +986,13 @@ #define BS_CAN_CTRL1_RWRNMSK (1U) /*!< Bit field size in bits for CAN_CTRL1_RWRNMSK. */ /*! @brief Read current value of the CAN_CTRL1_RWRNMSK field. */ -#define BR_CAN_CTRL1_RWRNMSK(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_RWRNMSK)) +#define BR_CAN_CTRL1_RWRNMSK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_RWRNMSK))) /*! @brief Format value for bitfield CAN_CTRL1_RWRNMSK. */ #define BF_CAN_CTRL1_RWRNMSK(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_RWRNMSK) & BM_CAN_CTRL1_RWRNMSK) /*! @brief Set the RWRNMSK field to a new value. */ -#define BW_CAN_CTRL1_RWRNMSK(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_RWRNMSK) = (v)) +#define BW_CAN_CTRL1_RWRNMSK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_RWRNMSK), v)) /*@}*/ /*! @@ -1006,13 +1013,13 @@ #define BS_CAN_CTRL1_TWRNMSK (1U) /*!< Bit field size in bits for CAN_CTRL1_TWRNMSK. */ /*! @brief Read current value of the CAN_CTRL1_TWRNMSK field. */ -#define BR_CAN_CTRL1_TWRNMSK(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_TWRNMSK)) +#define BR_CAN_CTRL1_TWRNMSK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_TWRNMSK))) /*! @brief Format value for bitfield CAN_CTRL1_TWRNMSK. */ #define BF_CAN_CTRL1_TWRNMSK(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_TWRNMSK) & BM_CAN_CTRL1_TWRNMSK) /*! @brief Set the TWRNMSK field to a new value. */ -#define BW_CAN_CTRL1_TWRNMSK(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_TWRNMSK) = (v)) +#define BW_CAN_CTRL1_TWRNMSK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_TWRNMSK), v)) /*@}*/ /*! @@ -1041,13 +1048,13 @@ #define BS_CAN_CTRL1_LPB (1U) /*!< Bit field size in bits for CAN_CTRL1_LPB. */ /*! @brief Read current value of the CAN_CTRL1_LPB field. */ -#define BR_CAN_CTRL1_LPB(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LPB)) +#define BR_CAN_CTRL1_LPB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LPB))) /*! @brief Format value for bitfield CAN_CTRL1_LPB. */ #define BF_CAN_CTRL1_LPB(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_LPB) & BM_CAN_CTRL1_LPB) /*! @brief Set the LPB field to a new value. */ -#define BW_CAN_CTRL1_LPB(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LPB) = (v)) +#define BW_CAN_CTRL1_LPB(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_LPB), v)) /*@}*/ /*! @@ -1071,13 +1078,13 @@ #define BS_CAN_CTRL1_CLKSRC (1U) /*!< Bit field size in bits for CAN_CTRL1_CLKSRC. */ /*! @brief Read current value of the CAN_CTRL1_CLKSRC field. */ -#define BR_CAN_CTRL1_CLKSRC(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_CLKSRC)) +#define BR_CAN_CTRL1_CLKSRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_CLKSRC))) /*! @brief Format value for bitfield CAN_CTRL1_CLKSRC. */ #define BF_CAN_CTRL1_CLKSRC(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_CLKSRC) & BM_CAN_CTRL1_CLKSRC) /*! @brief Set the CLKSRC field to a new value. */ -#define BW_CAN_CTRL1_CLKSRC(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_CLKSRC) = (v)) +#define BW_CAN_CTRL1_CLKSRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_CLKSRC), v)) /*@}*/ /*! @@ -1095,13 +1102,13 @@ #define BS_CAN_CTRL1_ERRMSK (1U) /*!< Bit field size in bits for CAN_CTRL1_ERRMSK. */ /*! @brief Read current value of the CAN_CTRL1_ERRMSK field. */ -#define BR_CAN_CTRL1_ERRMSK(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_ERRMSK)) +#define BR_CAN_CTRL1_ERRMSK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_ERRMSK))) /*! @brief Format value for bitfield CAN_CTRL1_ERRMSK. */ #define BF_CAN_CTRL1_ERRMSK(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_ERRMSK) & BM_CAN_CTRL1_ERRMSK) /*! @brief Set the ERRMSK field to a new value. */ -#define BW_CAN_CTRL1_ERRMSK(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_ERRMSK) = (v)) +#define BW_CAN_CTRL1_ERRMSK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_ERRMSK), v)) /*@}*/ /*! @@ -1119,13 +1126,13 @@ #define BS_CAN_CTRL1_BOFFMSK (1U) /*!< Bit field size in bits for CAN_CTRL1_BOFFMSK. */ /*! @brief Read current value of the CAN_CTRL1_BOFFMSK field. */ -#define BR_CAN_CTRL1_BOFFMSK(x) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_BOFFMSK)) +#define BR_CAN_CTRL1_BOFFMSK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_BOFFMSK))) /*! @brief Format value for bitfield CAN_CTRL1_BOFFMSK. */ #define BF_CAN_CTRL1_BOFFMSK(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_BOFFMSK) & BM_CAN_CTRL1_BOFFMSK) /*! @brief Set the BOFFMSK field to a new value. */ -#define BW_CAN_CTRL1_BOFFMSK(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_BOFFMSK) = (v)) +#define BW_CAN_CTRL1_BOFFMSK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL1_ADDR(x), BP_CAN_CTRL1_BOFFMSK), v)) /*@}*/ /*! @@ -1142,7 +1149,7 @@ #define BS_CAN_CTRL1_PSEG2 (3U) /*!< Bit field size in bits for CAN_CTRL1_PSEG2. */ /*! @brief Read current value of the CAN_CTRL1_PSEG2 field. */ -#define BR_CAN_CTRL1_PSEG2(x) (HW_CAN_CTRL1(x).B.PSEG2) +#define BR_CAN_CTRL1_PSEG2(x) (UNION_READ(hw_can_ctrl1_t, HW_CAN_CTRL1_ADDR(x), U, B.PSEG2)) /*! @brief Format value for bitfield CAN_CTRL1_PSEG2. */ #define BF_CAN_CTRL1_PSEG2(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_PSEG2) & BM_CAN_CTRL1_PSEG2) @@ -1165,7 +1172,7 @@ #define BS_CAN_CTRL1_PSEG1 (3U) /*!< Bit field size in bits for CAN_CTRL1_PSEG1. */ /*! @brief Read current value of the CAN_CTRL1_PSEG1 field. */ -#define BR_CAN_CTRL1_PSEG1(x) (HW_CAN_CTRL1(x).B.PSEG1) +#define BR_CAN_CTRL1_PSEG1(x) (UNION_READ(hw_can_ctrl1_t, HW_CAN_CTRL1_ADDR(x), U, B.PSEG1)) /*! @brief Format value for bitfield CAN_CTRL1_PSEG1. */ #define BF_CAN_CTRL1_PSEG1(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_PSEG1) & BM_CAN_CTRL1_PSEG1) @@ -1189,7 +1196,7 @@ #define BS_CAN_CTRL1_RJW (2U) /*!< Bit field size in bits for CAN_CTRL1_RJW. */ /*! @brief Read current value of the CAN_CTRL1_RJW field. */ -#define BR_CAN_CTRL1_RJW(x) (HW_CAN_CTRL1(x).B.RJW) +#define BR_CAN_CTRL1_RJW(x) (UNION_READ(hw_can_ctrl1_t, HW_CAN_CTRL1_ADDR(x), U, B.RJW)) /*! @brief Format value for bitfield CAN_CTRL1_RJW. */ #define BF_CAN_CTRL1_RJW(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_RJW) & BM_CAN_CTRL1_RJW) @@ -1216,7 +1223,7 @@ #define BS_CAN_CTRL1_PRESDIV (8U) /*!< Bit field size in bits for CAN_CTRL1_PRESDIV. */ /*! @brief Read current value of the CAN_CTRL1_PRESDIV field. */ -#define BR_CAN_CTRL1_PRESDIV(x) (HW_CAN_CTRL1(x).B.PRESDIV) +#define BR_CAN_CTRL1_PRESDIV(x) (UNION_READ(hw_can_ctrl1_t, HW_CAN_CTRL1_ADDR(x), U, B.PRESDIV)) /*! @brief Format value for bitfield CAN_CTRL1_PRESDIV. */ #define BF_CAN_CTRL1_PRESDIV(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL1_PRESDIV) & BM_CAN_CTRL1_PRESDIV) @@ -1268,8 +1275,8 @@ #define HW_CAN_TIMER_ADDR(x) ((x) + 0x8U) #define HW_CAN_TIMER(x) (*(__IO hw_can_timer_t *) HW_CAN_TIMER_ADDR(x)) -#define HW_CAN_TIMER_RD(x) (HW_CAN_TIMER(x).U) -#define HW_CAN_TIMER_WR(x, v) (HW_CAN_TIMER(x).U = (v)) +#define HW_CAN_TIMER_RD(x) (ADDRESS_READ(hw_can_timer_t, HW_CAN_TIMER_ADDR(x))) +#define HW_CAN_TIMER_WR(x, v) (ADDRESS_WRITE(hw_can_timer_t, HW_CAN_TIMER_ADDR(x), v)) #define HW_CAN_TIMER_SET(x, v) (HW_CAN_TIMER_WR(x, HW_CAN_TIMER_RD(x) | (v))) #define HW_CAN_TIMER_CLR(x, v) (HW_CAN_TIMER_WR(x, HW_CAN_TIMER_RD(x) & ~(v))) #define HW_CAN_TIMER_TOG(x, v) (HW_CAN_TIMER_WR(x, HW_CAN_TIMER_RD(x) ^ (v))) @@ -1290,7 +1297,7 @@ #define BS_CAN_TIMER_TIMER (16U) /*!< Bit field size in bits for CAN_TIMER_TIMER. */ /*! @brief Read current value of the CAN_TIMER_TIMER field. */ -#define BR_CAN_TIMER_TIMER(x) (HW_CAN_TIMER(x).B.TIMER) +#define BR_CAN_TIMER_TIMER(x) (UNION_READ(hw_can_timer_t, HW_CAN_TIMER_ADDR(x), U, B.TIMER)) /*! @brief Format value for bitfield CAN_TIMER_TIMER. */ #define BF_CAN_TIMER_TIMER(v) ((uint32_t)((uint32_t)(v) << BP_CAN_TIMER_TIMER) & BM_CAN_TIMER_TIMER) @@ -1331,8 +1338,8 @@ #define HW_CAN_RXMGMASK_ADDR(x) ((x) + 0x10U) #define HW_CAN_RXMGMASK(x) (*(__IO hw_can_rxmgmask_t *) HW_CAN_RXMGMASK_ADDR(x)) -#define HW_CAN_RXMGMASK_RD(x) (HW_CAN_RXMGMASK(x).U) -#define HW_CAN_RXMGMASK_WR(x, v) (HW_CAN_RXMGMASK(x).U = (v)) +#define HW_CAN_RXMGMASK_RD(x) (ADDRESS_READ(hw_can_rxmgmask_t, HW_CAN_RXMGMASK_ADDR(x))) +#define HW_CAN_RXMGMASK_WR(x, v) (ADDRESS_WRITE(hw_can_rxmgmask_t, HW_CAN_RXMGMASK_ADDR(x), v)) #define HW_CAN_RXMGMASK_SET(x, v) (HW_CAN_RXMGMASK_WR(x, HW_CAN_RXMGMASK_RD(x) | (v))) #define HW_CAN_RXMGMASK_CLR(x, v) (HW_CAN_RXMGMASK_WR(x, HW_CAN_RXMGMASK_RD(x) & ~(v))) #define HW_CAN_RXMGMASK_TOG(x, v) (HW_CAN_RXMGMASK_WR(x, HW_CAN_RXMGMASK_RD(x) ^ (v))) @@ -1408,8 +1415,8 @@ #define HW_CAN_RX14MASK_ADDR(x) ((x) + 0x14U) #define HW_CAN_RX14MASK(x) (*(__IO hw_can_rx14mask_t *) HW_CAN_RX14MASK_ADDR(x)) -#define HW_CAN_RX14MASK_RD(x) (HW_CAN_RX14MASK(x).U) -#define HW_CAN_RX14MASK_WR(x, v) (HW_CAN_RX14MASK(x).U = (v)) +#define HW_CAN_RX14MASK_RD(x) (ADDRESS_READ(hw_can_rx14mask_t, HW_CAN_RX14MASK_ADDR(x))) +#define HW_CAN_RX14MASK_WR(x, v) (ADDRESS_WRITE(hw_can_rx14mask_t, HW_CAN_RX14MASK_ADDR(x), v)) #define HW_CAN_RX14MASK_SET(x, v) (HW_CAN_RX14MASK_WR(x, HW_CAN_RX14MASK_RD(x) | (v))) #define HW_CAN_RX14MASK_CLR(x, v) (HW_CAN_RX14MASK_WR(x, HW_CAN_RX14MASK_RD(x) & ~(v))) #define HW_CAN_RX14MASK_TOG(x, v) (HW_CAN_RX14MASK_WR(x, HW_CAN_RX14MASK_RD(x) ^ (v))) @@ -1476,8 +1483,8 @@ #define HW_CAN_RX15MASK_ADDR(x) ((x) + 0x18U) #define HW_CAN_RX15MASK(x) (*(__IO hw_can_rx15mask_t *) HW_CAN_RX15MASK_ADDR(x)) -#define HW_CAN_RX15MASK_RD(x) (HW_CAN_RX15MASK(x).U) -#define HW_CAN_RX15MASK_WR(x, v) (HW_CAN_RX15MASK(x).U = (v)) +#define HW_CAN_RX15MASK_RD(x) (ADDRESS_READ(hw_can_rx15mask_t, HW_CAN_RX15MASK_ADDR(x))) +#define HW_CAN_RX15MASK_WR(x, v) (ADDRESS_WRITE(hw_can_rx15mask_t, HW_CAN_RX15MASK_ADDR(x), v)) #define HW_CAN_RX15MASK_SET(x, v) (HW_CAN_RX15MASK_WR(x, HW_CAN_RX15MASK_RD(x) | (v))) #define HW_CAN_RX15MASK_CLR(x, v) (HW_CAN_RX15MASK_WR(x, HW_CAN_RX15MASK_RD(x) & ~(v))) #define HW_CAN_RX15MASK_TOG(x, v) (HW_CAN_RX15MASK_WR(x, HW_CAN_RX15MASK_RD(x) ^ (v))) @@ -1576,8 +1583,8 @@ #define HW_CAN_ECR_ADDR(x) ((x) + 0x1CU) #define HW_CAN_ECR(x) (*(__IO hw_can_ecr_t *) HW_CAN_ECR_ADDR(x)) -#define HW_CAN_ECR_RD(x) (HW_CAN_ECR(x).U) -#define HW_CAN_ECR_WR(x, v) (HW_CAN_ECR(x).U = (v)) +#define HW_CAN_ECR_RD(x) (ADDRESS_READ(hw_can_ecr_t, HW_CAN_ECR_ADDR(x))) +#define HW_CAN_ECR_WR(x, v) (ADDRESS_WRITE(hw_can_ecr_t, HW_CAN_ECR_ADDR(x), v)) #define HW_CAN_ECR_SET(x, v) (HW_CAN_ECR_WR(x, HW_CAN_ECR_RD(x) | (v))) #define HW_CAN_ECR_CLR(x, v) (HW_CAN_ECR_WR(x, HW_CAN_ECR_RD(x) & ~(v))) #define HW_CAN_ECR_TOG(x, v) (HW_CAN_ECR_WR(x, HW_CAN_ECR_RD(x) ^ (v))) @@ -1596,7 +1603,7 @@ #define BS_CAN_ECR_TXERRCNT (8U) /*!< Bit field size in bits for CAN_ECR_TXERRCNT. */ /*! @brief Read current value of the CAN_ECR_TXERRCNT field. */ -#define BR_CAN_ECR_TXERRCNT(x) (HW_CAN_ECR(x).B.TXERRCNT) +#define BR_CAN_ECR_TXERRCNT(x) (UNION_READ(hw_can_ecr_t, HW_CAN_ECR_ADDR(x), U, B.TXERRCNT)) /*! @brief Format value for bitfield CAN_ECR_TXERRCNT. */ #define BF_CAN_ECR_TXERRCNT(v) ((uint32_t)((uint32_t)(v) << BP_CAN_ECR_TXERRCNT) & BM_CAN_ECR_TXERRCNT) @@ -1614,7 +1621,7 @@ #define BS_CAN_ECR_RXERRCNT (8U) /*!< Bit field size in bits for CAN_ECR_RXERRCNT. */ /*! @brief Read current value of the CAN_ECR_RXERRCNT field. */ -#define BR_CAN_ECR_RXERRCNT(x) (HW_CAN_ECR(x).B.RXERRCNT) +#define BR_CAN_ECR_RXERRCNT(x) (UNION_READ(hw_can_ecr_t, HW_CAN_ECR_ADDR(x), U, B.RXERRCNT)) /*! @brief Format value for bitfield CAN_ECR_RXERRCNT. */ #define BF_CAN_ECR_RXERRCNT(v) ((uint32_t)((uint32_t)(v) << BP_CAN_ECR_RXERRCNT) & BM_CAN_ECR_RXERRCNT) @@ -1675,8 +1682,8 @@ #define HW_CAN_ESR1_ADDR(x) ((x) + 0x20U) #define HW_CAN_ESR1(x) (*(__IO hw_can_esr1_t *) HW_CAN_ESR1_ADDR(x)) -#define HW_CAN_ESR1_RD(x) (HW_CAN_ESR1(x).U) -#define HW_CAN_ESR1_WR(x, v) (HW_CAN_ESR1(x).U = (v)) +#define HW_CAN_ESR1_RD(x) (ADDRESS_READ(hw_can_esr1_t, HW_CAN_ESR1_ADDR(x))) +#define HW_CAN_ESR1_WR(x, v) (ADDRESS_WRITE(hw_can_esr1_t, HW_CAN_ESR1_ADDR(x), v)) #define HW_CAN_ESR1_SET(x, v) (HW_CAN_ESR1_WR(x, HW_CAN_ESR1_RD(x) | (v))) #define HW_CAN_ESR1_CLR(x, v) (HW_CAN_ESR1_WR(x, HW_CAN_ESR1_RD(x) & ~(v))) #define HW_CAN_ESR1_TOG(x, v) (HW_CAN_ESR1_WR(x, HW_CAN_ESR1_RD(x) ^ (v))) @@ -1707,13 +1714,13 @@ #define BS_CAN_ESR1_WAKINT (1U) /*!< Bit field size in bits for CAN_ESR1_WAKINT. */ /*! @brief Read current value of the CAN_ESR1_WAKINT field. */ -#define BR_CAN_ESR1_WAKINT(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_WAKINT)) +#define BR_CAN_ESR1_WAKINT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_WAKINT))) /*! @brief Format value for bitfield CAN_ESR1_WAKINT. */ #define BF_CAN_ESR1_WAKINT(v) ((uint32_t)((uint32_t)(v) << BP_CAN_ESR1_WAKINT) & BM_CAN_ESR1_WAKINT) /*! @brief Set the WAKINT field to a new value. */ -#define BW_CAN_ESR1_WAKINT(x, v) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_WAKINT) = (v)) +#define BW_CAN_ESR1_WAKINT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_WAKINT), v)) /*@}*/ /*! @@ -1733,13 +1740,13 @@ #define BS_CAN_ESR1_ERRINT (1U) /*!< Bit field size in bits for CAN_ESR1_ERRINT. */ /*! @brief Read current value of the CAN_ESR1_ERRINT field. */ -#define BR_CAN_ESR1_ERRINT(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_ERRINT)) +#define BR_CAN_ESR1_ERRINT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_ERRINT))) /*! @brief Format value for bitfield CAN_ESR1_ERRINT. */ #define BF_CAN_ESR1_ERRINT(v) ((uint32_t)((uint32_t)(v) << BP_CAN_ESR1_ERRINT) & BM_CAN_ESR1_ERRINT) /*! @brief Set the ERRINT field to a new value. */ -#define BW_CAN_ESR1_ERRINT(x, v) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_ERRINT) = (v)) +#define BW_CAN_ESR1_ERRINT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_ERRINT), v)) /*@}*/ /*! @@ -1759,13 +1766,13 @@ #define BS_CAN_ESR1_BOFFINT (1U) /*!< Bit field size in bits for CAN_ESR1_BOFFINT. */ /*! @brief Read current value of the CAN_ESR1_BOFFINT field. */ -#define BR_CAN_ESR1_BOFFINT(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_BOFFINT)) +#define BR_CAN_ESR1_BOFFINT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_BOFFINT))) /*! @brief Format value for bitfield CAN_ESR1_BOFFINT. */ #define BF_CAN_ESR1_BOFFINT(v) ((uint32_t)((uint32_t)(v) << BP_CAN_ESR1_BOFFINT) & BM_CAN_ESR1_BOFFINT) /*! @brief Set the BOFFINT field to a new value. */ -#define BW_CAN_ESR1_BOFFINT(x, v) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_BOFFINT) = (v)) +#define BW_CAN_ESR1_BOFFINT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_BOFFINT), v)) /*@}*/ /*! @@ -1784,7 +1791,7 @@ #define BS_CAN_ESR1_RX (1U) /*!< Bit field size in bits for CAN_ESR1_RX. */ /*! @brief Read current value of the CAN_ESR1_RX field. */ -#define BR_CAN_ESR1_RX(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_RX)) +#define BR_CAN_ESR1_RX(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_RX))) /*@}*/ /*! @@ -1809,7 +1816,7 @@ #define BS_CAN_ESR1_FLTCONF (2U) /*!< Bit field size in bits for CAN_ESR1_FLTCONF. */ /*! @brief Read current value of the CAN_ESR1_FLTCONF field. */ -#define BR_CAN_ESR1_FLTCONF(x) (HW_CAN_ESR1(x).B.FLTCONF) +#define BR_CAN_ESR1_FLTCONF(x) (UNION_READ(hw_can_esr1_t, HW_CAN_ESR1_ADDR(x), U, B.FLTCONF)) /*@}*/ /*! @@ -1828,7 +1835,7 @@ #define BS_CAN_ESR1_TX (1U) /*!< Bit field size in bits for CAN_ESR1_TX. */ /*! @brief Read current value of the CAN_ESR1_TX field. */ -#define BR_CAN_ESR1_TX(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_TX)) +#define BR_CAN_ESR1_TX(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_TX))) /*@}*/ /*! @@ -1847,7 +1854,7 @@ #define BS_CAN_ESR1_IDLE (1U) /*!< Bit field size in bits for CAN_ESR1_IDLE. */ /*! @brief Read current value of the CAN_ESR1_IDLE field. */ -#define BR_CAN_ESR1_IDLE(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_IDLE)) +#define BR_CAN_ESR1_IDLE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_IDLE))) /*@}*/ /*! @@ -1866,7 +1873,7 @@ #define BS_CAN_ESR1_RXWRN (1U) /*!< Bit field size in bits for CAN_ESR1_RXWRN. */ /*! @brief Read current value of the CAN_ESR1_RXWRN field. */ -#define BR_CAN_ESR1_RXWRN(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_RXWRN)) +#define BR_CAN_ESR1_RXWRN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_RXWRN))) /*@}*/ /*! @@ -1885,7 +1892,7 @@ #define BS_CAN_ESR1_TXWRN (1U) /*!< Bit field size in bits for CAN_ESR1_TXWRN. */ /*! @brief Read current value of the CAN_ESR1_TXWRN field. */ -#define BR_CAN_ESR1_TXWRN(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_TXWRN)) +#define BR_CAN_ESR1_TXWRN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_TXWRN))) /*@}*/ /*! @@ -1903,7 +1910,7 @@ #define BS_CAN_ESR1_STFERR (1U) /*!< Bit field size in bits for CAN_ESR1_STFERR. */ /*! @brief Read current value of the CAN_ESR1_STFERR field. */ -#define BR_CAN_ESR1_STFERR(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_STFERR)) +#define BR_CAN_ESR1_STFERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_STFERR))) /*@}*/ /*! @@ -1922,7 +1929,7 @@ #define BS_CAN_ESR1_FRMERR (1U) /*!< Bit field size in bits for CAN_ESR1_FRMERR. */ /*! @brief Read current value of the CAN_ESR1_FRMERR field. */ -#define BR_CAN_ESR1_FRMERR(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_FRMERR)) +#define BR_CAN_ESR1_FRMERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_FRMERR))) /*@}*/ /*! @@ -1941,7 +1948,7 @@ #define BS_CAN_ESR1_CRCERR (1U) /*!< Bit field size in bits for CAN_ESR1_CRCERR. */ /*! @brief Read current value of the CAN_ESR1_CRCERR field. */ -#define BR_CAN_ESR1_CRCERR(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_CRCERR)) +#define BR_CAN_ESR1_CRCERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_CRCERR))) /*@}*/ /*! @@ -1960,7 +1967,7 @@ #define BS_CAN_ESR1_ACKERR (1U) /*!< Bit field size in bits for CAN_ESR1_ACKERR. */ /*! @brief Read current value of the CAN_ESR1_ACKERR field. */ -#define BR_CAN_ESR1_ACKERR(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_ACKERR)) +#define BR_CAN_ESR1_ACKERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_ACKERR))) /*@}*/ /*! @@ -1979,7 +1986,7 @@ #define BS_CAN_ESR1_BIT0ERR (1U) /*!< Bit field size in bits for CAN_ESR1_BIT0ERR. */ /*! @brief Read current value of the CAN_ESR1_BIT0ERR field. */ -#define BR_CAN_ESR1_BIT0ERR(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_BIT0ERR)) +#define BR_CAN_ESR1_BIT0ERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_BIT0ERR))) /*@}*/ /*! @@ -2000,7 +2007,7 @@ #define BS_CAN_ESR1_BIT1ERR (1U) /*!< Bit field size in bits for CAN_ESR1_BIT1ERR. */ /*! @brief Read current value of the CAN_ESR1_BIT1ERR field. */ -#define BR_CAN_ESR1_BIT1ERR(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_BIT1ERR)) +#define BR_CAN_ESR1_BIT1ERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_BIT1ERR))) /*@}*/ /*! @@ -2025,13 +2032,13 @@ #define BS_CAN_ESR1_RWRNINT (1U) /*!< Bit field size in bits for CAN_ESR1_RWRNINT. */ /*! @brief Read current value of the CAN_ESR1_RWRNINT field. */ -#define BR_CAN_ESR1_RWRNINT(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_RWRNINT)) +#define BR_CAN_ESR1_RWRNINT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_RWRNINT))) /*! @brief Format value for bitfield CAN_ESR1_RWRNINT. */ #define BF_CAN_ESR1_RWRNINT(v) ((uint32_t)((uint32_t)(v) << BP_CAN_ESR1_RWRNINT) & BM_CAN_ESR1_RWRNINT) /*! @brief Set the RWRNINT field to a new value. */ -#define BW_CAN_ESR1_RWRNINT(x, v) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_RWRNINT) = (v)) +#define BW_CAN_ESR1_RWRNINT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_RWRNINT), v)) /*@}*/ /*! @@ -2057,13 +2064,13 @@ #define BS_CAN_ESR1_TWRNINT (1U) /*!< Bit field size in bits for CAN_ESR1_TWRNINT. */ /*! @brief Read current value of the CAN_ESR1_TWRNINT field. */ -#define BR_CAN_ESR1_TWRNINT(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_TWRNINT)) +#define BR_CAN_ESR1_TWRNINT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_TWRNINT))) /*! @brief Format value for bitfield CAN_ESR1_TWRNINT. */ #define BF_CAN_ESR1_TWRNINT(v) ((uint32_t)((uint32_t)(v) << BP_CAN_ESR1_TWRNINT) & BM_CAN_ESR1_TWRNINT) /*! @brief Set the TWRNINT field to a new value. */ -#define BW_CAN_ESR1_TWRNINT(x, v) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_TWRNINT) = (v)) +#define BW_CAN_ESR1_TWRNINT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_TWRNINT), v)) /*@}*/ /*! @@ -2083,7 +2090,7 @@ #define BS_CAN_ESR1_SYNCH (1U) /*!< Bit field size in bits for CAN_ESR1_SYNCH. */ /*! @brief Read current value of the CAN_ESR1_SYNCH field. */ -#define BR_CAN_ESR1_SYNCH(x) (BITBAND_ACCESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_SYNCH)) +#define BR_CAN_ESR1_SYNCH(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR1_ADDR(x), BP_CAN_ESR1_SYNCH))) /*@}*/ /******************************************************************************* @@ -2117,8 +2124,8 @@ #define HW_CAN_IMASK1_ADDR(x) ((x) + 0x28U) #define HW_CAN_IMASK1(x) (*(__IO hw_can_imask1_t *) HW_CAN_IMASK1_ADDR(x)) -#define HW_CAN_IMASK1_RD(x) (HW_CAN_IMASK1(x).U) -#define HW_CAN_IMASK1_WR(x, v) (HW_CAN_IMASK1(x).U = (v)) +#define HW_CAN_IMASK1_RD(x) (ADDRESS_READ(hw_can_imask1_t, HW_CAN_IMASK1_ADDR(x))) +#define HW_CAN_IMASK1_WR(x, v) (ADDRESS_WRITE(hw_can_imask1_t, HW_CAN_IMASK1_ADDR(x), v)) #define HW_CAN_IMASK1_SET(x, v) (HW_CAN_IMASK1_WR(x, HW_CAN_IMASK1_RD(x) | (v))) #define HW_CAN_IMASK1_CLR(x, v) (HW_CAN_IMASK1_WR(x, HW_CAN_IMASK1_RD(x) & ~(v))) #define HW_CAN_IMASK1_TOG(x, v) (HW_CAN_IMASK1_WR(x, HW_CAN_IMASK1_RD(x) ^ (v))) @@ -2207,8 +2214,8 @@ #define HW_CAN_IFLAG1_ADDR(x) ((x) + 0x30U) #define HW_CAN_IFLAG1(x) (*(__IO hw_can_iflag1_t *) HW_CAN_IFLAG1_ADDR(x)) -#define HW_CAN_IFLAG1_RD(x) (HW_CAN_IFLAG1(x).U) -#define HW_CAN_IFLAG1_WR(x, v) (HW_CAN_IFLAG1(x).U = (v)) +#define HW_CAN_IFLAG1_RD(x) (ADDRESS_READ(hw_can_iflag1_t, HW_CAN_IFLAG1_ADDR(x))) +#define HW_CAN_IFLAG1_WR(x, v) (ADDRESS_WRITE(hw_can_iflag1_t, HW_CAN_IFLAG1_ADDR(x), v)) #define HW_CAN_IFLAG1_SET(x, v) (HW_CAN_IFLAG1_WR(x, HW_CAN_IFLAG1_RD(x) | (v))) #define HW_CAN_IFLAG1_CLR(x, v) (HW_CAN_IFLAG1_WR(x, HW_CAN_IFLAG1_RD(x) & ~(v))) #define HW_CAN_IFLAG1_TOG(x, v) (HW_CAN_IFLAG1_WR(x, HW_CAN_IFLAG1_RD(x) ^ (v))) @@ -2238,13 +2245,13 @@ #define BS_CAN_IFLAG1_BUF0I (1U) /*!< Bit field size in bits for CAN_IFLAG1_BUF0I. */ /*! @brief Read current value of the CAN_IFLAG1_BUF0I field. */ -#define BR_CAN_IFLAG1_BUF0I(x) (BITBAND_ACCESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF0I)) +#define BR_CAN_IFLAG1_BUF0I(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF0I))) /*! @brief Format value for bitfield CAN_IFLAG1_BUF0I. */ #define BF_CAN_IFLAG1_BUF0I(v) ((uint32_t)((uint32_t)(v) << BP_CAN_IFLAG1_BUF0I) & BM_CAN_IFLAG1_BUF0I) /*! @brief Set the BUF0I field to a new value. */ -#define BW_CAN_IFLAG1_BUF0I(x, v) (BITBAND_ACCESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF0I) = (v)) +#define BW_CAN_IFLAG1_BUF0I(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF0I), v)) /*@}*/ /*! @@ -2267,7 +2274,7 @@ #define BS_CAN_IFLAG1_BUF4TO1I (4U) /*!< Bit field size in bits for CAN_IFLAG1_BUF4TO1I. */ /*! @brief Read current value of the CAN_IFLAG1_BUF4TO1I field. */ -#define BR_CAN_IFLAG1_BUF4TO1I(x) (HW_CAN_IFLAG1(x).B.BUF4TO1I) +#define BR_CAN_IFLAG1_BUF4TO1I(x) (UNION_READ(hw_can_iflag1_t, HW_CAN_IFLAG1_ADDR(x), U, B.BUF4TO1I)) /*! @brief Format value for bitfield CAN_IFLAG1_BUF4TO1I. */ #define BF_CAN_IFLAG1_BUF4TO1I(v) ((uint32_t)((uint32_t)(v) << BP_CAN_IFLAG1_BUF4TO1I) & BM_CAN_IFLAG1_BUF4TO1I) @@ -2297,13 +2304,13 @@ #define BS_CAN_IFLAG1_BUF5I (1U) /*!< Bit field size in bits for CAN_IFLAG1_BUF5I. */ /*! @brief Read current value of the CAN_IFLAG1_BUF5I field. */ -#define BR_CAN_IFLAG1_BUF5I(x) (BITBAND_ACCESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF5I)) +#define BR_CAN_IFLAG1_BUF5I(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF5I))) /*! @brief Format value for bitfield CAN_IFLAG1_BUF5I. */ #define BF_CAN_IFLAG1_BUF5I(v) ((uint32_t)((uint32_t)(v) << BP_CAN_IFLAG1_BUF5I) & BM_CAN_IFLAG1_BUF5I) /*! @brief Set the BUF5I field to a new value. */ -#define BW_CAN_IFLAG1_BUF5I(x, v) (BITBAND_ACCESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF5I) = (v)) +#define BW_CAN_IFLAG1_BUF5I(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF5I), v)) /*@}*/ /*! @@ -2331,13 +2338,13 @@ #define BS_CAN_IFLAG1_BUF6I (1U) /*!< Bit field size in bits for CAN_IFLAG1_BUF6I. */ /*! @brief Read current value of the CAN_IFLAG1_BUF6I field. */ -#define BR_CAN_IFLAG1_BUF6I(x) (BITBAND_ACCESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF6I)) +#define BR_CAN_IFLAG1_BUF6I(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF6I))) /*! @brief Format value for bitfield CAN_IFLAG1_BUF6I. */ #define BF_CAN_IFLAG1_BUF6I(v) ((uint32_t)((uint32_t)(v) << BP_CAN_IFLAG1_BUF6I) & BM_CAN_IFLAG1_BUF6I) /*! @brief Set the BUF6I field to a new value. */ -#define BW_CAN_IFLAG1_BUF6I(x, v) (BITBAND_ACCESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF6I) = (v)) +#define BW_CAN_IFLAG1_BUF6I(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF6I), v)) /*@}*/ /*! @@ -2362,13 +2369,13 @@ #define BS_CAN_IFLAG1_BUF7I (1U) /*!< Bit field size in bits for CAN_IFLAG1_BUF7I. */ /*! @brief Read current value of the CAN_IFLAG1_BUF7I field. */ -#define BR_CAN_IFLAG1_BUF7I(x) (BITBAND_ACCESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF7I)) +#define BR_CAN_IFLAG1_BUF7I(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF7I))) /*! @brief Format value for bitfield CAN_IFLAG1_BUF7I. */ #define BF_CAN_IFLAG1_BUF7I(v) ((uint32_t)((uint32_t)(v) << BP_CAN_IFLAG1_BUF7I) & BM_CAN_IFLAG1_BUF7I) /*! @brief Set the BUF7I field to a new value. */ -#define BW_CAN_IFLAG1_BUF7I(x, v) (BITBAND_ACCESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF7I) = (v)) +#define BW_CAN_IFLAG1_BUF7I(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_IFLAG1_ADDR(x), BP_CAN_IFLAG1_BUF7I), v)) /*@}*/ /*! @@ -2389,7 +2396,7 @@ #define BS_CAN_IFLAG1_BUF31TO8I (24U) /*!< Bit field size in bits for CAN_IFLAG1_BUF31TO8I. */ /*! @brief Read current value of the CAN_IFLAG1_BUF31TO8I field. */ -#define BR_CAN_IFLAG1_BUF31TO8I(x) (HW_CAN_IFLAG1(x).B.BUF31TO8I) +#define BR_CAN_IFLAG1_BUF31TO8I(x) (UNION_READ(hw_can_iflag1_t, HW_CAN_IFLAG1_ADDR(x), U, B.BUF31TO8I)) /*! @brief Format value for bitfield CAN_IFLAG1_BUF31TO8I. */ #define BF_CAN_IFLAG1_BUF31TO8I(v) ((uint32_t)((uint32_t)(v) << BP_CAN_IFLAG1_BUF31TO8I) & BM_CAN_IFLAG1_BUF31TO8I) @@ -2435,8 +2442,8 @@ #define HW_CAN_CTRL2_ADDR(x) ((x) + 0x34U) #define HW_CAN_CTRL2(x) (*(__IO hw_can_ctrl2_t *) HW_CAN_CTRL2_ADDR(x)) -#define HW_CAN_CTRL2_RD(x) (HW_CAN_CTRL2(x).U) -#define HW_CAN_CTRL2_WR(x, v) (HW_CAN_CTRL2(x).U = (v)) +#define HW_CAN_CTRL2_RD(x) (ADDRESS_READ(hw_can_ctrl2_t, HW_CAN_CTRL2_ADDR(x))) +#define HW_CAN_CTRL2_WR(x, v) (ADDRESS_WRITE(hw_can_ctrl2_t, HW_CAN_CTRL2_ADDR(x), v)) #define HW_CAN_CTRL2_SET(x, v) (HW_CAN_CTRL2_WR(x, HW_CAN_CTRL2_RD(x) | (v))) #define HW_CAN_CTRL2_CLR(x, v) (HW_CAN_CTRL2_WR(x, HW_CAN_CTRL2_RD(x) & ~(v))) #define HW_CAN_CTRL2_TOG(x, v) (HW_CAN_CTRL2_WR(x, HW_CAN_CTRL2_RD(x) ^ (v))) @@ -2466,13 +2473,13 @@ #define BS_CAN_CTRL2_EACEN (1U) /*!< Bit field size in bits for CAN_CTRL2_EACEN. */ /*! @brief Read current value of the CAN_CTRL2_EACEN field. */ -#define BR_CAN_CTRL2_EACEN(x) (BITBAND_ACCESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_EACEN)) +#define BR_CAN_CTRL2_EACEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_EACEN))) /*! @brief Format value for bitfield CAN_CTRL2_EACEN. */ #define BF_CAN_CTRL2_EACEN(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL2_EACEN) & BM_CAN_CTRL2_EACEN) /*! @brief Set the EACEN field to a new value. */ -#define BW_CAN_CTRL2_EACEN(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_EACEN) = (v)) +#define BW_CAN_CTRL2_EACEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_EACEN), v)) /*@}*/ /*! @@ -2496,13 +2503,13 @@ #define BS_CAN_CTRL2_RRS (1U) /*!< Bit field size in bits for CAN_CTRL2_RRS. */ /*! @brief Read current value of the CAN_CTRL2_RRS field. */ -#define BR_CAN_CTRL2_RRS(x) (BITBAND_ACCESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_RRS)) +#define BR_CAN_CTRL2_RRS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_RRS))) /*! @brief Format value for bitfield CAN_CTRL2_RRS. */ #define BF_CAN_CTRL2_RRS(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL2_RRS) & BM_CAN_CTRL2_RRS) /*! @brief Set the RRS field to a new value. */ -#define BW_CAN_CTRL2_RRS(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_RRS) = (v)) +#define BW_CAN_CTRL2_RRS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_RRS), v)) /*@}*/ /*! @@ -2522,13 +2529,13 @@ #define BS_CAN_CTRL2_MRP (1U) /*!< Bit field size in bits for CAN_CTRL2_MRP. */ /*! @brief Read current value of the CAN_CTRL2_MRP field. */ -#define BR_CAN_CTRL2_MRP(x) (BITBAND_ACCESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_MRP)) +#define BR_CAN_CTRL2_MRP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_MRP))) /*! @brief Format value for bitfield CAN_CTRL2_MRP. */ #define BF_CAN_CTRL2_MRP(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL2_MRP) & BM_CAN_CTRL2_MRP) /*! @brief Set the MRP field to a new value. */ -#define BW_CAN_CTRL2_MRP(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_MRP) = (v)) +#define BW_CAN_CTRL2_MRP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_MRP), v)) /*@}*/ /*! @@ -2570,7 +2577,7 @@ #define BS_CAN_CTRL2_TASD (5U) /*!< Bit field size in bits for CAN_CTRL2_TASD. */ /*! @brief Read current value of the CAN_CTRL2_TASD field. */ -#define BR_CAN_CTRL2_TASD(x) (HW_CAN_CTRL2(x).B.TASD) +#define BR_CAN_CTRL2_TASD(x) (UNION_READ(hw_can_ctrl2_t, HW_CAN_CTRL2_ADDR(x), U, B.TASD)) /*! @brief Format value for bitfield CAN_CTRL2_TASD. */ #define BF_CAN_CTRL2_TASD(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL2_TASD) & BM_CAN_CTRL2_TASD) @@ -2622,7 +2629,7 @@ #define BS_CAN_CTRL2_RFFN (4U) /*!< Bit field size in bits for CAN_CTRL2_RFFN. */ /*! @brief Read current value of the CAN_CTRL2_RFFN field. */ -#define BR_CAN_CTRL2_RFFN(x) (HW_CAN_CTRL2(x).B.RFFN) +#define BR_CAN_CTRL2_RFFN(x) (UNION_READ(hw_can_ctrl2_t, HW_CAN_CTRL2_ADDR(x), U, B.RFFN)) /*! @brief Format value for bitfield CAN_CTRL2_RFFN. */ #define BF_CAN_CTRL2_RFFN(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL2_RFFN) & BM_CAN_CTRL2_RFFN) @@ -2647,13 +2654,13 @@ #define BS_CAN_CTRL2_WRMFRZ (1U) /*!< Bit field size in bits for CAN_CTRL2_WRMFRZ. */ /*! @brief Read current value of the CAN_CTRL2_WRMFRZ field. */ -#define BR_CAN_CTRL2_WRMFRZ(x) (BITBAND_ACCESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_WRMFRZ)) +#define BR_CAN_CTRL2_WRMFRZ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_WRMFRZ))) /*! @brief Format value for bitfield CAN_CTRL2_WRMFRZ. */ #define BF_CAN_CTRL2_WRMFRZ(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CTRL2_WRMFRZ) & BM_CAN_CTRL2_WRMFRZ) /*! @brief Set the WRMFRZ field to a new value. */ -#define BW_CAN_CTRL2_WRMFRZ(x, v) (BITBAND_ACCESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_WRMFRZ) = (v)) +#define BW_CAN_CTRL2_WRMFRZ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CTRL2_ADDR(x), BP_CAN_CTRL2_WRMFRZ), v)) /*@}*/ /******************************************************************************* @@ -2688,7 +2695,7 @@ #define HW_CAN_ESR2_ADDR(x) ((x) + 0x38U) #define HW_CAN_ESR2(x) (*(__I hw_can_esr2_t *) HW_CAN_ESR2_ADDR(x)) -#define HW_CAN_ESR2_RD(x) (HW_CAN_ESR2(x).U) +#define HW_CAN_ESR2_RD(x) (ADDRESS_READ(hw_can_esr2_t, HW_CAN_ESR2_ADDR(x))) /*@}*/ /* @@ -2718,7 +2725,7 @@ #define BS_CAN_ESR2_IMB (1U) /*!< Bit field size in bits for CAN_ESR2_IMB. */ /*! @brief Read current value of the CAN_ESR2_IMB field. */ -#define BR_CAN_ESR2_IMB(x) (BITBAND_ACCESS32(HW_CAN_ESR2_ADDR(x), BP_CAN_ESR2_IMB)) +#define BR_CAN_ESR2_IMB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR2_ADDR(x), BP_CAN_ESR2_IMB))) /*@}*/ /*! @@ -2746,7 +2753,7 @@ #define BS_CAN_ESR2_VPS (1U) /*!< Bit field size in bits for CAN_ESR2_VPS. */ /*! @brief Read current value of the CAN_ESR2_VPS field. */ -#define BR_CAN_ESR2_VPS(x) (BITBAND_ACCESS32(HW_CAN_ESR2_ADDR(x), BP_CAN_ESR2_VPS)) +#define BR_CAN_ESR2_VPS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_ESR2_ADDR(x), BP_CAN_ESR2_VPS))) /*@}*/ /*! @@ -2768,7 +2775,7 @@ #define BS_CAN_ESR2_LPTM (7U) /*!< Bit field size in bits for CAN_ESR2_LPTM. */ /*! @brief Read current value of the CAN_ESR2_LPTM field. */ -#define BR_CAN_ESR2_LPTM(x) (HW_CAN_ESR2(x).B.LPTM) +#define BR_CAN_ESR2_LPTM(x) (UNION_READ(hw_can_esr2_t, HW_CAN_ESR2_ADDR(x), U, B.LPTM)) /*@}*/ /******************************************************************************* @@ -2801,7 +2808,7 @@ #define HW_CAN_CRCR_ADDR(x) ((x) + 0x44U) #define HW_CAN_CRCR(x) (*(__I hw_can_crcr_t *) HW_CAN_CRCR_ADDR(x)) -#define HW_CAN_CRCR_RD(x) (HW_CAN_CRCR(x).U) +#define HW_CAN_CRCR_RD(x) (ADDRESS_READ(hw_can_crcr_t, HW_CAN_CRCR_ADDR(x))) /*@}*/ /* @@ -2820,7 +2827,7 @@ #define BS_CAN_CRCR_TXCRC (15U) /*!< Bit field size in bits for CAN_CRCR_TXCRC. */ /*! @brief Read current value of the CAN_CRCR_TXCRC field. */ -#define BR_CAN_CRCR_TXCRC(x) (HW_CAN_CRCR(x).B.TXCRC) +#define BR_CAN_CRCR_TXCRC(x) (UNION_READ(hw_can_crcr_t, HW_CAN_CRCR_ADDR(x), U, B.TXCRC)) /*@}*/ /*! @@ -2835,7 +2842,7 @@ #define BS_CAN_CRCR_MBCRC (7U) /*!< Bit field size in bits for CAN_CRCR_MBCRC. */ /*! @brief Read current value of the CAN_CRCR_MBCRC field. */ -#define BR_CAN_CRCR_MBCRC(x) (HW_CAN_CRCR(x).B.MBCRC) +#define BR_CAN_CRCR_MBCRC(x) (UNION_READ(hw_can_crcr_t, HW_CAN_CRCR_ADDR(x), U, B.MBCRC)) /*@}*/ /******************************************************************************* @@ -2868,8 +2875,8 @@ #define HW_CAN_RXFGMASK_ADDR(x) ((x) + 0x48U) #define HW_CAN_RXFGMASK(x) (*(__IO hw_can_rxfgmask_t *) HW_CAN_RXFGMASK_ADDR(x)) -#define HW_CAN_RXFGMASK_RD(x) (HW_CAN_RXFGMASK(x).U) -#define HW_CAN_RXFGMASK_WR(x, v) (HW_CAN_RXFGMASK(x).U = (v)) +#define HW_CAN_RXFGMASK_RD(x) (ADDRESS_READ(hw_can_rxfgmask_t, HW_CAN_RXFGMASK_ADDR(x))) +#define HW_CAN_RXFGMASK_WR(x, v) (ADDRESS_WRITE(hw_can_rxfgmask_t, HW_CAN_RXFGMASK_ADDR(x), v)) #define HW_CAN_RXFGMASK_SET(x, v) (HW_CAN_RXFGMASK_WR(x, HW_CAN_RXFGMASK_RD(x) | (v))) #define HW_CAN_RXFGMASK_CLR(x, v) (HW_CAN_RXFGMASK_WR(x, HW_CAN_RXFGMASK_RD(x) & ~(v))) #define HW_CAN_RXFGMASK_TOG(x, v) (HW_CAN_RXFGMASK_WR(x, HW_CAN_RXFGMASK_RD(x) ^ (v))) @@ -2946,7 +2953,7 @@ #define HW_CAN_RXFIR_ADDR(x) ((x) + 0x4CU) #define HW_CAN_RXFIR(x) (*(__I hw_can_rxfir_t *) HW_CAN_RXFIR_ADDR(x)) -#define HW_CAN_RXFIR_RD(x) (HW_CAN_RXFIR(x).U) +#define HW_CAN_RXFIR_RD(x) (ADDRESS_READ(hw_can_rxfir_t, HW_CAN_RXFIR_ADDR(x))) /*@}*/ /* @@ -2968,7 +2975,7 @@ #define BS_CAN_RXFIR_IDHIT (9U) /*!< Bit field size in bits for CAN_RXFIR_IDHIT. */ /*! @brief Read current value of the CAN_RXFIR_IDHIT field. */ -#define BR_CAN_RXFIR_IDHIT(x) (HW_CAN_RXFIR(x).B.IDHIT) +#define BR_CAN_RXFIR_IDHIT(x) (UNION_READ(hw_can_rxfir_t, HW_CAN_RXFIR_ADDR(x), U, B.IDHIT)) /*@}*/ /******************************************************************************* @@ -3012,8 +3019,8 @@ #define HW_CAN_CSn_ADDR(x, n) ((x) + 0x80U + (0x10U * (n))) #define HW_CAN_CSn(x, n) (*(__IO hw_can_csn_t *) HW_CAN_CSn_ADDR(x, n)) -#define HW_CAN_CSn_RD(x, n) (HW_CAN_CSn(x, n).U) -#define HW_CAN_CSn_WR(x, n, v) (HW_CAN_CSn(x, n).U = (v)) +#define HW_CAN_CSn_RD(x, n) (ADDRESS_READ(hw_can_csn_t, HW_CAN_CSn_ADDR(x, n))) +#define HW_CAN_CSn_WR(x, n, v) (ADDRESS_WRITE(hw_can_csn_t, HW_CAN_CSn_ADDR(x, n), v)) #define HW_CAN_CSn_SET(x, n, v) (HW_CAN_CSn_WR(x, n, HW_CAN_CSn_RD(x, n) | (v))) #define HW_CAN_CSn_CLR(x, n, v) (HW_CAN_CSn_WR(x, n, HW_CAN_CSn_RD(x, n) & ~(v))) #define HW_CAN_CSn_TOG(x, n, v) (HW_CAN_CSn_WR(x, n, HW_CAN_CSn_RD(x, n) ^ (v))) @@ -3032,7 +3039,7 @@ #define BS_CAN_CSn_TIME_STAMP (16U) /*!< Bit field size in bits for CAN_CSn_TIME_STAMP. */ /*! @brief Read current value of the CAN_CSn_TIME_STAMP field. */ -#define BR_CAN_CSn_TIME_STAMP(x, n) (HW_CAN_CSn(x, n).B.TIME_STAMP) +#define BR_CAN_CSn_TIME_STAMP(x, n) (UNION_READ(hw_can_csn_t, HW_CAN_CSn_ADDR(x, n), U, B.TIME_STAMP)) /*! @brief Format value for bitfield CAN_CSn_TIME_STAMP. */ #define BF_CAN_CSn_TIME_STAMP(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CSn_TIME_STAMP) & BM_CAN_CSn_TIME_STAMP) @@ -3050,7 +3057,7 @@ #define BS_CAN_CSn_DLC (4U) /*!< Bit field size in bits for CAN_CSn_DLC. */ /*! @brief Read current value of the CAN_CSn_DLC field. */ -#define BR_CAN_CSn_DLC(x, n) (HW_CAN_CSn(x, n).B.DLC) +#define BR_CAN_CSn_DLC(x, n) (UNION_READ(hw_can_csn_t, HW_CAN_CSn_ADDR(x, n), U, B.DLC)) /*! @brief Format value for bitfield CAN_CSn_DLC. */ #define BF_CAN_CSn_DLC(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CSn_DLC) & BM_CAN_CSn_DLC) @@ -3068,13 +3075,13 @@ #define BS_CAN_CSn_RTR (1U) /*!< Bit field size in bits for CAN_CSn_RTR. */ /*! @brief Read current value of the CAN_CSn_RTR field. */ -#define BR_CAN_CSn_RTR(x, n) (BITBAND_ACCESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_RTR)) +#define BR_CAN_CSn_RTR(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_RTR))) /*! @brief Format value for bitfield CAN_CSn_RTR. */ #define BF_CAN_CSn_RTR(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CSn_RTR) & BM_CAN_CSn_RTR) /*! @brief Set the RTR field to a new value. */ -#define BW_CAN_CSn_RTR(x, n, v) (BITBAND_ACCESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_RTR) = (v)) +#define BW_CAN_CSn_RTR(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_RTR), v)) /*@}*/ /*! @@ -3086,13 +3093,13 @@ #define BS_CAN_CSn_IDE (1U) /*!< Bit field size in bits for CAN_CSn_IDE. */ /*! @brief Read current value of the CAN_CSn_IDE field. */ -#define BR_CAN_CSn_IDE(x, n) (BITBAND_ACCESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_IDE)) +#define BR_CAN_CSn_IDE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_IDE))) /*! @brief Format value for bitfield CAN_CSn_IDE. */ #define BF_CAN_CSn_IDE(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CSn_IDE) & BM_CAN_CSn_IDE) /*! @brief Set the IDE field to a new value. */ -#define BW_CAN_CSn_IDE(x, n, v) (BITBAND_ACCESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_IDE) = (v)) +#define BW_CAN_CSn_IDE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_IDE), v)) /*@}*/ /*! @@ -3104,13 +3111,13 @@ #define BS_CAN_CSn_SRR (1U) /*!< Bit field size in bits for CAN_CSn_SRR. */ /*! @brief Read current value of the CAN_CSn_SRR field. */ -#define BR_CAN_CSn_SRR(x, n) (BITBAND_ACCESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_SRR)) +#define BR_CAN_CSn_SRR(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_SRR))) /*! @brief Format value for bitfield CAN_CSn_SRR. */ #define BF_CAN_CSn_SRR(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CSn_SRR) & BM_CAN_CSn_SRR) /*! @brief Set the SRR field to a new value. */ -#define BW_CAN_CSn_SRR(x, n, v) (BITBAND_ACCESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_SRR) = (v)) +#define BW_CAN_CSn_SRR(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CAN_CSn_ADDR(x, n), BP_CAN_CSn_SRR), v)) /*@}*/ /*! @@ -3122,7 +3129,7 @@ #define BS_CAN_CSn_CODE (4U) /*!< Bit field size in bits for CAN_CSn_CODE. */ /*! @brief Read current value of the CAN_CSn_CODE field. */ -#define BR_CAN_CSn_CODE(x, n) (HW_CAN_CSn(x, n).B.CODE) +#define BR_CAN_CSn_CODE(x, n) (UNION_READ(hw_can_csn_t, HW_CAN_CSn_ADDR(x, n), U, B.CODE)) /*! @brief Format value for bitfield CAN_CSn_CODE. */ #define BF_CAN_CSn_CODE(v) ((uint32_t)((uint32_t)(v) << BP_CAN_CSn_CODE) & BM_CAN_CSn_CODE) @@ -3164,8 +3171,8 @@ #define HW_CAN_IDn_ADDR(x, n) ((x) + 0x84U + (0x10U * (n))) #define HW_CAN_IDn(x, n) (*(__IO hw_can_idn_t *) HW_CAN_IDn_ADDR(x, n)) -#define HW_CAN_IDn_RD(x, n) (HW_CAN_IDn(x, n).U) -#define HW_CAN_IDn_WR(x, n, v) (HW_CAN_IDn(x, n).U = (v)) +#define HW_CAN_IDn_RD(x, n) (ADDRESS_READ(hw_can_idn_t, HW_CAN_IDn_ADDR(x, n))) +#define HW_CAN_IDn_WR(x, n, v) (ADDRESS_WRITE(hw_can_idn_t, HW_CAN_IDn_ADDR(x, n), v)) #define HW_CAN_IDn_SET(x, n, v) (HW_CAN_IDn_WR(x, n, HW_CAN_IDn_RD(x, n) | (v))) #define HW_CAN_IDn_CLR(x, n, v) (HW_CAN_IDn_WR(x, n, HW_CAN_IDn_RD(x, n) & ~(v))) #define HW_CAN_IDn_TOG(x, n, v) (HW_CAN_IDn_WR(x, n, HW_CAN_IDn_RD(x, n) ^ (v))) @@ -3184,7 +3191,7 @@ #define BS_CAN_IDn_EXT (18U) /*!< Bit field size in bits for CAN_IDn_EXT. */ /*! @brief Read current value of the CAN_IDn_EXT field. */ -#define BR_CAN_IDn_EXT(x, n) (HW_CAN_IDn(x, n).B.EXT) +#define BR_CAN_IDn_EXT(x, n) (UNION_READ(hw_can_idn_t, HW_CAN_IDn_ADDR(x, n), U, B.EXT)) /*! @brief Format value for bitfield CAN_IDn_EXT. */ #define BF_CAN_IDn_EXT(v) ((uint32_t)((uint32_t)(v) << BP_CAN_IDn_EXT) & BM_CAN_IDn_EXT) @@ -3202,7 +3209,7 @@ #define BS_CAN_IDn_STD (11U) /*!< Bit field size in bits for CAN_IDn_STD. */ /*! @brief Read current value of the CAN_IDn_STD field. */ -#define BR_CAN_IDn_STD(x, n) (HW_CAN_IDn(x, n).B.STD) +#define BR_CAN_IDn_STD(x, n) (UNION_READ(hw_can_idn_t, HW_CAN_IDn_ADDR(x, n), U, B.STD)) /*! @brief Format value for bitfield CAN_IDn_STD. */ #define BF_CAN_IDn_STD(v) ((uint32_t)((uint32_t)(v) << BP_CAN_IDn_STD) & BM_CAN_IDn_STD) @@ -3220,7 +3227,7 @@ #define BS_CAN_IDn_PRIO (3U) /*!< Bit field size in bits for CAN_IDn_PRIO. */ /*! @brief Read current value of the CAN_IDn_PRIO field. */ -#define BR_CAN_IDn_PRIO(x, n) (HW_CAN_IDn(x, n).B.PRIO) +#define BR_CAN_IDn_PRIO(x, n) (UNION_READ(hw_can_idn_t, HW_CAN_IDn_ADDR(x, n), U, B.PRIO)) /*! @brief Format value for bitfield CAN_IDn_PRIO. */ #define BF_CAN_IDn_PRIO(v) ((uint32_t)((uint32_t)(v) << BP_CAN_IDn_PRIO) & BM_CAN_IDn_PRIO) @@ -3258,8 +3265,8 @@ #define HW_CAN_WORD0n_ADDR(x, n) ((x) + 0x88U + (0x10U * (n))) #define HW_CAN_WORD0n(x, n) (*(__IO hw_can_word0n_t *) HW_CAN_WORD0n_ADDR(x, n)) -#define HW_CAN_WORD0n_RD(x, n) (HW_CAN_WORD0n(x, n).U) -#define HW_CAN_WORD0n_WR(x, n, v) (HW_CAN_WORD0n(x, n).U = (v)) +#define HW_CAN_WORD0n_RD(x, n) (ADDRESS_READ(hw_can_word0n_t, HW_CAN_WORD0n_ADDR(x, n))) +#define HW_CAN_WORD0n_WR(x, n, v) (ADDRESS_WRITE(hw_can_word0n_t, HW_CAN_WORD0n_ADDR(x, n), v)) #define HW_CAN_WORD0n_SET(x, n, v) (HW_CAN_WORD0n_WR(x, n, HW_CAN_WORD0n_RD(x, n) | (v))) #define HW_CAN_WORD0n_CLR(x, n, v) (HW_CAN_WORD0n_WR(x, n, HW_CAN_WORD0n_RD(x, n) & ~(v))) #define HW_CAN_WORD0n_TOG(x, n, v) (HW_CAN_WORD0n_WR(x, n, HW_CAN_WORD0n_RD(x, n) ^ (v))) @@ -3278,7 +3285,7 @@ #define BS_CAN_WORD0n_DATA_BYTE_3 (8U) /*!< Bit field size in bits for CAN_WORD0n_DATA_BYTE_3. */ /*! @brief Read current value of the CAN_WORD0n_DATA_BYTE_3 field. */ -#define BR_CAN_WORD0n_DATA_BYTE_3(x, n) (HW_CAN_WORD0n(x, n).B.DATA_BYTE_3) +#define BR_CAN_WORD0n_DATA_BYTE_3(x, n) (UNION_READ(hw_can_word0n_t, HW_CAN_WORD0n_ADDR(x, n), U, B.DATA_BYTE_3)) /*! @brief Format value for bitfield CAN_WORD0n_DATA_BYTE_3. */ #define BF_CAN_WORD0n_DATA_BYTE_3(v) ((uint32_t)((uint32_t)(v) << BP_CAN_WORD0n_DATA_BYTE_3) & BM_CAN_WORD0n_DATA_BYTE_3) @@ -3296,7 +3303,7 @@ #define BS_CAN_WORD0n_DATA_BYTE_2 (8U) /*!< Bit field size in bits for CAN_WORD0n_DATA_BYTE_2. */ /*! @brief Read current value of the CAN_WORD0n_DATA_BYTE_2 field. */ -#define BR_CAN_WORD0n_DATA_BYTE_2(x, n) (HW_CAN_WORD0n(x, n).B.DATA_BYTE_2) +#define BR_CAN_WORD0n_DATA_BYTE_2(x, n) (UNION_READ(hw_can_word0n_t, HW_CAN_WORD0n_ADDR(x, n), U, B.DATA_BYTE_2)) /*! @brief Format value for bitfield CAN_WORD0n_DATA_BYTE_2. */ #define BF_CAN_WORD0n_DATA_BYTE_2(v) ((uint32_t)((uint32_t)(v) << BP_CAN_WORD0n_DATA_BYTE_2) & BM_CAN_WORD0n_DATA_BYTE_2) @@ -3314,7 +3321,7 @@ #define BS_CAN_WORD0n_DATA_BYTE_1 (8U) /*!< Bit field size in bits for CAN_WORD0n_DATA_BYTE_1. */ /*! @brief Read current value of the CAN_WORD0n_DATA_BYTE_1 field. */ -#define BR_CAN_WORD0n_DATA_BYTE_1(x, n) (HW_CAN_WORD0n(x, n).B.DATA_BYTE_1) +#define BR_CAN_WORD0n_DATA_BYTE_1(x, n) (UNION_READ(hw_can_word0n_t, HW_CAN_WORD0n_ADDR(x, n), U, B.DATA_BYTE_1)) /*! @brief Format value for bitfield CAN_WORD0n_DATA_BYTE_1. */ #define BF_CAN_WORD0n_DATA_BYTE_1(v) ((uint32_t)((uint32_t)(v) << BP_CAN_WORD0n_DATA_BYTE_1) & BM_CAN_WORD0n_DATA_BYTE_1) @@ -3332,7 +3339,7 @@ #define BS_CAN_WORD0n_DATA_BYTE_0 (8U) /*!< Bit field size in bits for CAN_WORD0n_DATA_BYTE_0. */ /*! @brief Read current value of the CAN_WORD0n_DATA_BYTE_0 field. */ -#define BR_CAN_WORD0n_DATA_BYTE_0(x, n) (HW_CAN_WORD0n(x, n).B.DATA_BYTE_0) +#define BR_CAN_WORD0n_DATA_BYTE_0(x, n) (UNION_READ(hw_can_word0n_t, HW_CAN_WORD0n_ADDR(x, n), U, B.DATA_BYTE_0)) /*! @brief Format value for bitfield CAN_WORD0n_DATA_BYTE_0. */ #define BF_CAN_WORD0n_DATA_BYTE_0(v) ((uint32_t)((uint32_t)(v) << BP_CAN_WORD0n_DATA_BYTE_0) & BM_CAN_WORD0n_DATA_BYTE_0) @@ -3370,8 +3377,8 @@ #define HW_CAN_WORD1n_ADDR(x, n) ((x) + 0x8CU + (0x10U * (n))) #define HW_CAN_WORD1n(x, n) (*(__IO hw_can_word1n_t *) HW_CAN_WORD1n_ADDR(x, n)) -#define HW_CAN_WORD1n_RD(x, n) (HW_CAN_WORD1n(x, n).U) -#define HW_CAN_WORD1n_WR(x, n, v) (HW_CAN_WORD1n(x, n).U = (v)) +#define HW_CAN_WORD1n_RD(x, n) (ADDRESS_READ(hw_can_word1n_t, HW_CAN_WORD1n_ADDR(x, n))) +#define HW_CAN_WORD1n_WR(x, n, v) (ADDRESS_WRITE(hw_can_word1n_t, HW_CAN_WORD1n_ADDR(x, n), v)) #define HW_CAN_WORD1n_SET(x, n, v) (HW_CAN_WORD1n_WR(x, n, HW_CAN_WORD1n_RD(x, n) | (v))) #define HW_CAN_WORD1n_CLR(x, n, v) (HW_CAN_WORD1n_WR(x, n, HW_CAN_WORD1n_RD(x, n) & ~(v))) #define HW_CAN_WORD1n_TOG(x, n, v) (HW_CAN_WORD1n_WR(x, n, HW_CAN_WORD1n_RD(x, n) ^ (v))) @@ -3390,7 +3397,7 @@ #define BS_CAN_WORD1n_DATA_BYTE_7 (8U) /*!< Bit field size in bits for CAN_WORD1n_DATA_BYTE_7. */ /*! @brief Read current value of the CAN_WORD1n_DATA_BYTE_7 field. */ -#define BR_CAN_WORD1n_DATA_BYTE_7(x, n) (HW_CAN_WORD1n(x, n).B.DATA_BYTE_7) +#define BR_CAN_WORD1n_DATA_BYTE_7(x, n) (UNION_READ(hw_can_word1n_t, HW_CAN_WORD1n_ADDR(x, n), U, B.DATA_BYTE_7)) /*! @brief Format value for bitfield CAN_WORD1n_DATA_BYTE_7. */ #define BF_CAN_WORD1n_DATA_BYTE_7(v) ((uint32_t)((uint32_t)(v) << BP_CAN_WORD1n_DATA_BYTE_7) & BM_CAN_WORD1n_DATA_BYTE_7) @@ -3408,7 +3415,7 @@ #define BS_CAN_WORD1n_DATA_BYTE_6 (8U) /*!< Bit field size in bits for CAN_WORD1n_DATA_BYTE_6. */ /*! @brief Read current value of the CAN_WORD1n_DATA_BYTE_6 field. */ -#define BR_CAN_WORD1n_DATA_BYTE_6(x, n) (HW_CAN_WORD1n(x, n).B.DATA_BYTE_6) +#define BR_CAN_WORD1n_DATA_BYTE_6(x, n) (UNION_READ(hw_can_word1n_t, HW_CAN_WORD1n_ADDR(x, n), U, B.DATA_BYTE_6)) /*! @brief Format value for bitfield CAN_WORD1n_DATA_BYTE_6. */ #define BF_CAN_WORD1n_DATA_BYTE_6(v) ((uint32_t)((uint32_t)(v) << BP_CAN_WORD1n_DATA_BYTE_6) & BM_CAN_WORD1n_DATA_BYTE_6) @@ -3426,7 +3433,7 @@ #define BS_CAN_WORD1n_DATA_BYTE_5 (8U) /*!< Bit field size in bits for CAN_WORD1n_DATA_BYTE_5. */ /*! @brief Read current value of the CAN_WORD1n_DATA_BYTE_5 field. */ -#define BR_CAN_WORD1n_DATA_BYTE_5(x, n) (HW_CAN_WORD1n(x, n).B.DATA_BYTE_5) +#define BR_CAN_WORD1n_DATA_BYTE_5(x, n) (UNION_READ(hw_can_word1n_t, HW_CAN_WORD1n_ADDR(x, n), U, B.DATA_BYTE_5)) /*! @brief Format value for bitfield CAN_WORD1n_DATA_BYTE_5. */ #define BF_CAN_WORD1n_DATA_BYTE_5(v) ((uint32_t)((uint32_t)(v) << BP_CAN_WORD1n_DATA_BYTE_5) & BM_CAN_WORD1n_DATA_BYTE_5) @@ -3444,7 +3451,7 @@ #define BS_CAN_WORD1n_DATA_BYTE_4 (8U) /*!< Bit field size in bits for CAN_WORD1n_DATA_BYTE_4. */ /*! @brief Read current value of the CAN_WORD1n_DATA_BYTE_4 field. */ -#define BR_CAN_WORD1n_DATA_BYTE_4(x, n) (HW_CAN_WORD1n(x, n).B.DATA_BYTE_4) +#define BR_CAN_WORD1n_DATA_BYTE_4(x, n) (UNION_READ(hw_can_word1n_t, HW_CAN_WORD1n_ADDR(x, n), U, B.DATA_BYTE_4)) /*! @brief Format value for bitfield CAN_WORD1n_DATA_BYTE_4. */ #define BF_CAN_WORD1n_DATA_BYTE_4(v) ((uint32_t)((uint32_t)(v) << BP_CAN_WORD1n_DATA_BYTE_4) & BM_CAN_WORD1n_DATA_BYTE_4) @@ -3491,8 +3498,8 @@ #define HW_CAN_RXIMRn_ADDR(x, n) ((x) + 0x880U + (0x4U * (n))) #define HW_CAN_RXIMRn(x, n) (*(__IO hw_can_rximrn_t *) HW_CAN_RXIMRn_ADDR(x, n)) -#define HW_CAN_RXIMRn_RD(x, n) (HW_CAN_RXIMRn(x, n).U) -#define HW_CAN_RXIMRn_WR(x, n, v) (HW_CAN_RXIMRn(x, n).U = (v)) +#define HW_CAN_RXIMRn_RD(x, n) (ADDRESS_READ(hw_can_rximrn_t, HW_CAN_RXIMRn_ADDR(x, n))) +#define HW_CAN_RXIMRn_WR(x, n, v) (ADDRESS_WRITE(hw_can_rximrn_t, HW_CAN_RXIMRn_ADDR(x, n), v)) #define HW_CAN_RXIMRn_SET(x, n, v) (HW_CAN_RXIMRn_WR(x, n, HW_CAN_RXIMRn_RD(x, n) | (v))) #define HW_CAN_RXIMRn_CLR(x, n, v) (HW_CAN_RXIMRn_WR(x, n, HW_CAN_RXIMRn_RD(x, n) & ~(v))) #define HW_CAN_RXIMRn_TOG(x, n, v) (HW_CAN_RXIMRn_WR(x, n, HW_CAN_RXIMRn_RD(x, n) ^ (v)))
--- a/hal/device/device/MK64F12/MK64F12_cau.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_cau.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -224,7 +231,7 @@ #define HW_CAU_DIRECT0_ADDR(x) ((x) + 0x0U) #define HW_CAU_DIRECT0(x) (*(__O hw_cau_direct0_t *) HW_CAU_DIRECT0_ADDR(x)) -#define HW_CAU_DIRECT0_WR(x, v) (HW_CAU_DIRECT0(x).U = (v)) +#define HW_CAU_DIRECT0_WR(x, v) (ADDRESS_WRITE(hw_cau_direct0_t, HW_CAU_DIRECT0_ADDR(x), v)) /*@}*/ /* @@ -268,7 +275,7 @@ #define HW_CAU_DIRECT1_ADDR(x) ((x) + 0x4U) #define HW_CAU_DIRECT1(x) (*(__O hw_cau_direct1_t *) HW_CAU_DIRECT1_ADDR(x)) -#define HW_CAU_DIRECT1_WR(x, v) (HW_CAU_DIRECT1(x).U = (v)) +#define HW_CAU_DIRECT1_WR(x, v) (ADDRESS_WRITE(hw_cau_direct1_t, HW_CAU_DIRECT1_ADDR(x), v)) /*@}*/ /* @@ -312,7 +319,7 @@ #define HW_CAU_DIRECT2_ADDR(x) ((x) + 0x8U) #define HW_CAU_DIRECT2(x) (*(__O hw_cau_direct2_t *) HW_CAU_DIRECT2_ADDR(x)) -#define HW_CAU_DIRECT2_WR(x, v) (HW_CAU_DIRECT2(x).U = (v)) +#define HW_CAU_DIRECT2_WR(x, v) (ADDRESS_WRITE(hw_cau_direct2_t, HW_CAU_DIRECT2_ADDR(x), v)) /*@}*/ /* @@ -356,7 +363,7 @@ #define HW_CAU_DIRECT3_ADDR(x) ((x) + 0xCU) #define HW_CAU_DIRECT3(x) (*(__O hw_cau_direct3_t *) HW_CAU_DIRECT3_ADDR(x)) -#define HW_CAU_DIRECT3_WR(x, v) (HW_CAU_DIRECT3(x).U = (v)) +#define HW_CAU_DIRECT3_WR(x, v) (ADDRESS_WRITE(hw_cau_direct3_t, HW_CAU_DIRECT3_ADDR(x), v)) /*@}*/ /* @@ -400,7 +407,7 @@ #define HW_CAU_DIRECT4_ADDR(x) ((x) + 0x10U) #define HW_CAU_DIRECT4(x) (*(__O hw_cau_direct4_t *) HW_CAU_DIRECT4_ADDR(x)) -#define HW_CAU_DIRECT4_WR(x, v) (HW_CAU_DIRECT4(x).U = (v)) +#define HW_CAU_DIRECT4_WR(x, v) (ADDRESS_WRITE(hw_cau_direct4_t, HW_CAU_DIRECT4_ADDR(x), v)) /*@}*/ /* @@ -444,7 +451,7 @@ #define HW_CAU_DIRECT5_ADDR(x) ((x) + 0x14U) #define HW_CAU_DIRECT5(x) (*(__O hw_cau_direct5_t *) HW_CAU_DIRECT5_ADDR(x)) -#define HW_CAU_DIRECT5_WR(x, v) (HW_CAU_DIRECT5(x).U = (v)) +#define HW_CAU_DIRECT5_WR(x, v) (ADDRESS_WRITE(hw_cau_direct5_t, HW_CAU_DIRECT5_ADDR(x), v)) /*@}*/ /* @@ -488,7 +495,7 @@ #define HW_CAU_DIRECT6_ADDR(x) ((x) + 0x18U) #define HW_CAU_DIRECT6(x) (*(__O hw_cau_direct6_t *) HW_CAU_DIRECT6_ADDR(x)) -#define HW_CAU_DIRECT6_WR(x, v) (HW_CAU_DIRECT6(x).U = (v)) +#define HW_CAU_DIRECT6_WR(x, v) (ADDRESS_WRITE(hw_cau_direct6_t, HW_CAU_DIRECT6_ADDR(x), v)) /*@}*/ /* @@ -532,7 +539,7 @@ #define HW_CAU_DIRECT7_ADDR(x) ((x) + 0x1CU) #define HW_CAU_DIRECT7(x) (*(__O hw_cau_direct7_t *) HW_CAU_DIRECT7_ADDR(x)) -#define HW_CAU_DIRECT7_WR(x, v) (HW_CAU_DIRECT7(x).U = (v)) +#define HW_CAU_DIRECT7_WR(x, v) (ADDRESS_WRITE(hw_cau_direct7_t, HW_CAU_DIRECT7_ADDR(x), v)) /*@}*/ /* @@ -576,7 +583,7 @@ #define HW_CAU_DIRECT8_ADDR(x) ((x) + 0x20U) #define HW_CAU_DIRECT8(x) (*(__O hw_cau_direct8_t *) HW_CAU_DIRECT8_ADDR(x)) -#define HW_CAU_DIRECT8_WR(x, v) (HW_CAU_DIRECT8(x).U = (v)) +#define HW_CAU_DIRECT8_WR(x, v) (ADDRESS_WRITE(hw_cau_direct8_t, HW_CAU_DIRECT8_ADDR(x), v)) /*@}*/ /* @@ -620,7 +627,7 @@ #define HW_CAU_DIRECT9_ADDR(x) ((x) + 0x24U) #define HW_CAU_DIRECT9(x) (*(__O hw_cau_direct9_t *) HW_CAU_DIRECT9_ADDR(x)) -#define HW_CAU_DIRECT9_WR(x, v) (HW_CAU_DIRECT9(x).U = (v)) +#define HW_CAU_DIRECT9_WR(x, v) (ADDRESS_WRITE(hw_cau_direct9_t, HW_CAU_DIRECT9_ADDR(x), v)) /*@}*/ /* @@ -664,7 +671,7 @@ #define HW_CAU_DIRECT10_ADDR(x) ((x) + 0x28U) #define HW_CAU_DIRECT10(x) (*(__O hw_cau_direct10_t *) HW_CAU_DIRECT10_ADDR(x)) -#define HW_CAU_DIRECT10_WR(x, v) (HW_CAU_DIRECT10(x).U = (v)) +#define HW_CAU_DIRECT10_WR(x, v) (ADDRESS_WRITE(hw_cau_direct10_t, HW_CAU_DIRECT10_ADDR(x), v)) /*@}*/ /* @@ -708,7 +715,7 @@ #define HW_CAU_DIRECT11_ADDR(x) ((x) + 0x2CU) #define HW_CAU_DIRECT11(x) (*(__O hw_cau_direct11_t *) HW_CAU_DIRECT11_ADDR(x)) -#define HW_CAU_DIRECT11_WR(x, v) (HW_CAU_DIRECT11(x).U = (v)) +#define HW_CAU_DIRECT11_WR(x, v) (ADDRESS_WRITE(hw_cau_direct11_t, HW_CAU_DIRECT11_ADDR(x), v)) /*@}*/ /* @@ -752,7 +759,7 @@ #define HW_CAU_DIRECT12_ADDR(x) ((x) + 0x30U) #define HW_CAU_DIRECT12(x) (*(__O hw_cau_direct12_t *) HW_CAU_DIRECT12_ADDR(x)) -#define HW_CAU_DIRECT12_WR(x, v) (HW_CAU_DIRECT12(x).U = (v)) +#define HW_CAU_DIRECT12_WR(x, v) (ADDRESS_WRITE(hw_cau_direct12_t, HW_CAU_DIRECT12_ADDR(x), v)) /*@}*/ /* @@ -796,7 +803,7 @@ #define HW_CAU_DIRECT13_ADDR(x) ((x) + 0x34U) #define HW_CAU_DIRECT13(x) (*(__O hw_cau_direct13_t *) HW_CAU_DIRECT13_ADDR(x)) -#define HW_CAU_DIRECT13_WR(x, v) (HW_CAU_DIRECT13(x).U = (v)) +#define HW_CAU_DIRECT13_WR(x, v) (ADDRESS_WRITE(hw_cau_direct13_t, HW_CAU_DIRECT13_ADDR(x), v)) /*@}*/ /* @@ -840,7 +847,7 @@ #define HW_CAU_DIRECT14_ADDR(x) ((x) + 0x38U) #define HW_CAU_DIRECT14(x) (*(__O hw_cau_direct14_t *) HW_CAU_DIRECT14_ADDR(x)) -#define HW_CAU_DIRECT14_WR(x, v) (HW_CAU_DIRECT14(x).U = (v)) +#define HW_CAU_DIRECT14_WR(x, v) (ADDRESS_WRITE(hw_cau_direct14_t, HW_CAU_DIRECT14_ADDR(x), v)) /*@}*/ /* @@ -884,7 +891,7 @@ #define HW_CAU_DIRECT15_ADDR(x) ((x) + 0x3CU) #define HW_CAU_DIRECT15(x) (*(__O hw_cau_direct15_t *) HW_CAU_DIRECT15_ADDR(x)) -#define HW_CAU_DIRECT15_WR(x, v) (HW_CAU_DIRECT15(x).U = (v)) +#define HW_CAU_DIRECT15_WR(x, v) (ADDRESS_WRITE(hw_cau_direct15_t, HW_CAU_DIRECT15_ADDR(x), v)) /*@}*/ /* @@ -931,7 +938,7 @@ #define HW_CAU_LDR_CASR_ADDR(x) ((x) + 0x840U) #define HW_CAU_LDR_CASR(x) (*(__O hw_cau_ldr_casr_t *) HW_CAU_LDR_CASR_ADDR(x)) -#define HW_CAU_LDR_CASR_WR(x, v) (HW_CAU_LDR_CASR(x).U = (v)) +#define HW_CAU_LDR_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_casr_t, HW_CAU_LDR_CASR_ADDR(x), v)) /*@}*/ /* @@ -1012,7 +1019,7 @@ #define HW_CAU_LDR_CAA_ADDR(x) ((x) + 0x844U) #define HW_CAU_LDR_CAA(x) (*(__O hw_cau_ldr_caa_t *) HW_CAU_LDR_CAA_ADDR(x)) -#define HW_CAU_LDR_CAA_WR(x, v) (HW_CAU_LDR_CAA(x).U = (v)) +#define HW_CAU_LDR_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_caa_t, HW_CAU_LDR_CAA_ADDR(x), v)) /*@}*/ /* @@ -1056,7 +1063,7 @@ #define HW_CAU_LDR_CA0_ADDR(x) ((x) + 0x848U) #define HW_CAU_LDR_CA0(x) (*(__O hw_cau_ldr_ca0_t *) HW_CAU_LDR_CA0_ADDR(x)) -#define HW_CAU_LDR_CA0_WR(x, v) (HW_CAU_LDR_CA0(x).U = (v)) +#define HW_CAU_LDR_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca0_t, HW_CAU_LDR_CA0_ADDR(x), v)) /*@}*/ /* @@ -1100,7 +1107,7 @@ #define HW_CAU_LDR_CA1_ADDR(x) ((x) + 0x84CU) #define HW_CAU_LDR_CA1(x) (*(__O hw_cau_ldr_ca1_t *) HW_CAU_LDR_CA1_ADDR(x)) -#define HW_CAU_LDR_CA1_WR(x, v) (HW_CAU_LDR_CA1(x).U = (v)) +#define HW_CAU_LDR_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca1_t, HW_CAU_LDR_CA1_ADDR(x), v)) /*@}*/ /* @@ -1144,7 +1151,7 @@ #define HW_CAU_LDR_CA2_ADDR(x) ((x) + 0x850U) #define HW_CAU_LDR_CA2(x) (*(__O hw_cau_ldr_ca2_t *) HW_CAU_LDR_CA2_ADDR(x)) -#define HW_CAU_LDR_CA2_WR(x, v) (HW_CAU_LDR_CA2(x).U = (v)) +#define HW_CAU_LDR_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca2_t, HW_CAU_LDR_CA2_ADDR(x), v)) /*@}*/ /* @@ -1188,7 +1195,7 @@ #define HW_CAU_LDR_CA3_ADDR(x) ((x) + 0x854U) #define HW_CAU_LDR_CA3(x) (*(__O hw_cau_ldr_ca3_t *) HW_CAU_LDR_CA3_ADDR(x)) -#define HW_CAU_LDR_CA3_WR(x, v) (HW_CAU_LDR_CA3(x).U = (v)) +#define HW_CAU_LDR_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca3_t, HW_CAU_LDR_CA3_ADDR(x), v)) /*@}*/ /* @@ -1232,7 +1239,7 @@ #define HW_CAU_LDR_CA4_ADDR(x) ((x) + 0x858U) #define HW_CAU_LDR_CA4(x) (*(__O hw_cau_ldr_ca4_t *) HW_CAU_LDR_CA4_ADDR(x)) -#define HW_CAU_LDR_CA4_WR(x, v) (HW_CAU_LDR_CA4(x).U = (v)) +#define HW_CAU_LDR_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca4_t, HW_CAU_LDR_CA4_ADDR(x), v)) /*@}*/ /* @@ -1276,7 +1283,7 @@ #define HW_CAU_LDR_CA5_ADDR(x) ((x) + 0x85CU) #define HW_CAU_LDR_CA5(x) (*(__O hw_cau_ldr_ca5_t *) HW_CAU_LDR_CA5_ADDR(x)) -#define HW_CAU_LDR_CA5_WR(x, v) (HW_CAU_LDR_CA5(x).U = (v)) +#define HW_CAU_LDR_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca5_t, HW_CAU_LDR_CA5_ADDR(x), v)) /*@}*/ /* @@ -1320,7 +1327,7 @@ #define HW_CAU_LDR_CA6_ADDR(x) ((x) + 0x860U) #define HW_CAU_LDR_CA6(x) (*(__O hw_cau_ldr_ca6_t *) HW_CAU_LDR_CA6_ADDR(x)) -#define HW_CAU_LDR_CA6_WR(x, v) (HW_CAU_LDR_CA6(x).U = (v)) +#define HW_CAU_LDR_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca6_t, HW_CAU_LDR_CA6_ADDR(x), v)) /*@}*/ /* @@ -1364,7 +1371,7 @@ #define HW_CAU_LDR_CA7_ADDR(x) ((x) + 0x864U) #define HW_CAU_LDR_CA7(x) (*(__O hw_cau_ldr_ca7_t *) HW_CAU_LDR_CA7_ADDR(x)) -#define HW_CAU_LDR_CA7_WR(x, v) (HW_CAU_LDR_CA7(x).U = (v)) +#define HW_CAU_LDR_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca7_t, HW_CAU_LDR_CA7_ADDR(x), v)) /*@}*/ /* @@ -1408,7 +1415,7 @@ #define HW_CAU_LDR_CA8_ADDR(x) ((x) + 0x868U) #define HW_CAU_LDR_CA8(x) (*(__O hw_cau_ldr_ca8_t *) HW_CAU_LDR_CA8_ADDR(x)) -#define HW_CAU_LDR_CA8_WR(x, v) (HW_CAU_LDR_CA8(x).U = (v)) +#define HW_CAU_LDR_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca8_t, HW_CAU_LDR_CA8_ADDR(x), v)) /*@}*/ /* @@ -1455,7 +1462,7 @@ #define HW_CAU_STR_CASR_ADDR(x) ((x) + 0x880U) #define HW_CAU_STR_CASR(x) (*(__I hw_cau_str_casr_t *) HW_CAU_STR_CASR_ADDR(x)) -#define HW_CAU_STR_CASR_RD(x) (HW_CAU_STR_CASR(x).U) +#define HW_CAU_STR_CASR_RD(x) (ADDRESS_READ(hw_cau_str_casr_t, HW_CAU_STR_CASR_ADDR(x))) /*@}*/ /* @@ -1475,7 +1482,7 @@ #define BS_CAU_STR_CASR_IC (1U) /*!< Bit field size in bits for CAU_STR_CASR_IC. */ /*! @brief Read current value of the CAU_STR_CASR_IC field. */ -#define BR_CAU_STR_CASR_IC(x) (HW_CAU_STR_CASR(x).B.IC) +#define BR_CAU_STR_CASR_IC(x) (UNION_READ(hw_cau_str_casr_t, HW_CAU_STR_CASR_ADDR(x), U, B.IC)) /*@}*/ /*! @@ -1491,7 +1498,7 @@ #define BS_CAU_STR_CASR_DPE (1U) /*!< Bit field size in bits for CAU_STR_CASR_DPE. */ /*! @brief Read current value of the CAU_STR_CASR_DPE field. */ -#define BR_CAU_STR_CASR_DPE(x) (HW_CAU_STR_CASR(x).B.DPE) +#define BR_CAU_STR_CASR_DPE(x) (UNION_READ(hw_cau_str_casr_t, HW_CAU_STR_CASR_ADDR(x), U, B.DPE)) /*@}*/ /*! @@ -1508,7 +1515,7 @@ #define BS_CAU_STR_CASR_VER (4U) /*!< Bit field size in bits for CAU_STR_CASR_VER. */ /*! @brief Read current value of the CAU_STR_CASR_VER field. */ -#define BR_CAU_STR_CASR_VER(x) (HW_CAU_STR_CASR(x).B.VER) +#define BR_CAU_STR_CASR_VER(x) (UNION_READ(hw_cau_str_casr_t, HW_CAU_STR_CASR_ADDR(x), U, B.VER)) /*@}*/ /******************************************************************************* @@ -1536,7 +1543,7 @@ #define HW_CAU_STR_CAA_ADDR(x) ((x) + 0x884U) #define HW_CAU_STR_CAA(x) (*(__I hw_cau_str_caa_t *) HW_CAU_STR_CAA_ADDR(x)) -#define HW_CAU_STR_CAA_RD(x) (HW_CAU_STR_CAA(x).U) +#define HW_CAU_STR_CAA_RD(x) (ADDRESS_READ(hw_cau_str_caa_t, HW_CAU_STR_CAA_ADDR(x))) /*@}*/ /* @@ -1580,7 +1587,7 @@ #define HW_CAU_STR_CA0_ADDR(x) ((x) + 0x888U) #define HW_CAU_STR_CA0(x) (*(__I hw_cau_str_ca0_t *) HW_CAU_STR_CA0_ADDR(x)) -#define HW_CAU_STR_CA0_RD(x) (HW_CAU_STR_CA0(x).U) +#define HW_CAU_STR_CA0_RD(x) (ADDRESS_READ(hw_cau_str_ca0_t, HW_CAU_STR_CA0_ADDR(x))) /*@}*/ /* @@ -1624,7 +1631,7 @@ #define HW_CAU_STR_CA1_ADDR(x) ((x) + 0x88CU) #define HW_CAU_STR_CA1(x) (*(__I hw_cau_str_ca1_t *) HW_CAU_STR_CA1_ADDR(x)) -#define HW_CAU_STR_CA1_RD(x) (HW_CAU_STR_CA1(x).U) +#define HW_CAU_STR_CA1_RD(x) (ADDRESS_READ(hw_cau_str_ca1_t, HW_CAU_STR_CA1_ADDR(x))) /*@}*/ /* @@ -1668,7 +1675,7 @@ #define HW_CAU_STR_CA2_ADDR(x) ((x) + 0x890U) #define HW_CAU_STR_CA2(x) (*(__I hw_cau_str_ca2_t *) HW_CAU_STR_CA2_ADDR(x)) -#define HW_CAU_STR_CA2_RD(x) (HW_CAU_STR_CA2(x).U) +#define HW_CAU_STR_CA2_RD(x) (ADDRESS_READ(hw_cau_str_ca2_t, HW_CAU_STR_CA2_ADDR(x))) /*@}*/ /* @@ -1712,7 +1719,7 @@ #define HW_CAU_STR_CA3_ADDR(x) ((x) + 0x894U) #define HW_CAU_STR_CA3(x) (*(__I hw_cau_str_ca3_t *) HW_CAU_STR_CA3_ADDR(x)) -#define HW_CAU_STR_CA3_RD(x) (HW_CAU_STR_CA3(x).U) +#define HW_CAU_STR_CA3_RD(x) (ADDRESS_READ(hw_cau_str_ca3_t, HW_CAU_STR_CA3_ADDR(x))) /*@}*/ /* @@ -1756,7 +1763,7 @@ #define HW_CAU_STR_CA4_ADDR(x) ((x) + 0x898U) #define HW_CAU_STR_CA4(x) (*(__I hw_cau_str_ca4_t *) HW_CAU_STR_CA4_ADDR(x)) -#define HW_CAU_STR_CA4_RD(x) (HW_CAU_STR_CA4(x).U) +#define HW_CAU_STR_CA4_RD(x) (ADDRESS_READ(hw_cau_str_ca4_t, HW_CAU_STR_CA4_ADDR(x))) /*@}*/ /* @@ -1800,7 +1807,7 @@ #define HW_CAU_STR_CA5_ADDR(x) ((x) + 0x89CU) #define HW_CAU_STR_CA5(x) (*(__I hw_cau_str_ca5_t *) HW_CAU_STR_CA5_ADDR(x)) -#define HW_CAU_STR_CA5_RD(x) (HW_CAU_STR_CA5(x).U) +#define HW_CAU_STR_CA5_RD(x) (ADDRESS_READ(hw_cau_str_ca5_t, HW_CAU_STR_CA5_ADDR(x))) /*@}*/ /* @@ -1844,7 +1851,7 @@ #define HW_CAU_STR_CA6_ADDR(x) ((x) + 0x8A0U) #define HW_CAU_STR_CA6(x) (*(__I hw_cau_str_ca6_t *) HW_CAU_STR_CA6_ADDR(x)) -#define HW_CAU_STR_CA6_RD(x) (HW_CAU_STR_CA6(x).U) +#define HW_CAU_STR_CA6_RD(x) (ADDRESS_READ(hw_cau_str_ca6_t, HW_CAU_STR_CA6_ADDR(x))) /*@}*/ /* @@ -1888,7 +1895,7 @@ #define HW_CAU_STR_CA7_ADDR(x) ((x) + 0x8A4U) #define HW_CAU_STR_CA7(x) (*(__I hw_cau_str_ca7_t *) HW_CAU_STR_CA7_ADDR(x)) -#define HW_CAU_STR_CA7_RD(x) (HW_CAU_STR_CA7(x).U) +#define HW_CAU_STR_CA7_RD(x) (ADDRESS_READ(hw_cau_str_ca7_t, HW_CAU_STR_CA7_ADDR(x))) /*@}*/ /* @@ -1932,7 +1939,7 @@ #define HW_CAU_STR_CA8_ADDR(x) ((x) + 0x8A8U) #define HW_CAU_STR_CA8(x) (*(__I hw_cau_str_ca8_t *) HW_CAU_STR_CA8_ADDR(x)) -#define HW_CAU_STR_CA8_RD(x) (HW_CAU_STR_CA8(x).U) +#define HW_CAU_STR_CA8_RD(x) (ADDRESS_READ(hw_cau_str_ca8_t, HW_CAU_STR_CA8_ADDR(x))) /*@}*/ /* @@ -1979,7 +1986,7 @@ #define HW_CAU_ADR_CASR_ADDR(x) ((x) + 0x8C0U) #define HW_CAU_ADR_CASR(x) (*(__O hw_cau_adr_casr_t *) HW_CAU_ADR_CASR_ADDR(x)) -#define HW_CAU_ADR_CASR_WR(x, v) (HW_CAU_ADR_CASR(x).U = (v)) +#define HW_CAU_ADR_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_casr_t, HW_CAU_ADR_CASR_ADDR(x), v)) /*@}*/ /* @@ -2060,7 +2067,7 @@ #define HW_CAU_ADR_CAA_ADDR(x) ((x) + 0x8C4U) #define HW_CAU_ADR_CAA(x) (*(__O hw_cau_adr_caa_t *) HW_CAU_ADR_CAA_ADDR(x)) -#define HW_CAU_ADR_CAA_WR(x, v) (HW_CAU_ADR_CAA(x).U = (v)) +#define HW_CAU_ADR_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_caa_t, HW_CAU_ADR_CAA_ADDR(x), v)) /*@}*/ /* @@ -2104,7 +2111,7 @@ #define HW_CAU_ADR_CA0_ADDR(x) ((x) + 0x8C8U) #define HW_CAU_ADR_CA0(x) (*(__O hw_cau_adr_ca0_t *) HW_CAU_ADR_CA0_ADDR(x)) -#define HW_CAU_ADR_CA0_WR(x, v) (HW_CAU_ADR_CA0(x).U = (v)) +#define HW_CAU_ADR_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca0_t, HW_CAU_ADR_CA0_ADDR(x), v)) /*@}*/ /* @@ -2148,7 +2155,7 @@ #define HW_CAU_ADR_CA1_ADDR(x) ((x) + 0x8CCU) #define HW_CAU_ADR_CA1(x) (*(__O hw_cau_adr_ca1_t *) HW_CAU_ADR_CA1_ADDR(x)) -#define HW_CAU_ADR_CA1_WR(x, v) (HW_CAU_ADR_CA1(x).U = (v)) +#define HW_CAU_ADR_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca1_t, HW_CAU_ADR_CA1_ADDR(x), v)) /*@}*/ /* @@ -2192,7 +2199,7 @@ #define HW_CAU_ADR_CA2_ADDR(x) ((x) + 0x8D0U) #define HW_CAU_ADR_CA2(x) (*(__O hw_cau_adr_ca2_t *) HW_CAU_ADR_CA2_ADDR(x)) -#define HW_CAU_ADR_CA2_WR(x, v) (HW_CAU_ADR_CA2(x).U = (v)) +#define HW_CAU_ADR_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca2_t, HW_CAU_ADR_CA2_ADDR(x), v)) /*@}*/ /* @@ -2236,7 +2243,7 @@ #define HW_CAU_ADR_CA3_ADDR(x) ((x) + 0x8D4U) #define HW_CAU_ADR_CA3(x) (*(__O hw_cau_adr_ca3_t *) HW_CAU_ADR_CA3_ADDR(x)) -#define HW_CAU_ADR_CA3_WR(x, v) (HW_CAU_ADR_CA3(x).U = (v)) +#define HW_CAU_ADR_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca3_t, HW_CAU_ADR_CA3_ADDR(x), v)) /*@}*/ /* @@ -2280,7 +2287,7 @@ #define HW_CAU_ADR_CA4_ADDR(x) ((x) + 0x8D8U) #define HW_CAU_ADR_CA4(x) (*(__O hw_cau_adr_ca4_t *) HW_CAU_ADR_CA4_ADDR(x)) -#define HW_CAU_ADR_CA4_WR(x, v) (HW_CAU_ADR_CA4(x).U = (v)) +#define HW_CAU_ADR_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca4_t, HW_CAU_ADR_CA4_ADDR(x), v)) /*@}*/ /* @@ -2324,7 +2331,7 @@ #define HW_CAU_ADR_CA5_ADDR(x) ((x) + 0x8DCU) #define HW_CAU_ADR_CA5(x) (*(__O hw_cau_adr_ca5_t *) HW_CAU_ADR_CA5_ADDR(x)) -#define HW_CAU_ADR_CA5_WR(x, v) (HW_CAU_ADR_CA5(x).U = (v)) +#define HW_CAU_ADR_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca5_t, HW_CAU_ADR_CA5_ADDR(x), v)) /*@}*/ /* @@ -2368,7 +2375,7 @@ #define HW_CAU_ADR_CA6_ADDR(x) ((x) + 0x8E0U) #define HW_CAU_ADR_CA6(x) (*(__O hw_cau_adr_ca6_t *) HW_CAU_ADR_CA6_ADDR(x)) -#define HW_CAU_ADR_CA6_WR(x, v) (HW_CAU_ADR_CA6(x).U = (v)) +#define HW_CAU_ADR_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca6_t, HW_CAU_ADR_CA6_ADDR(x), v)) /*@}*/ /* @@ -2412,7 +2419,7 @@ #define HW_CAU_ADR_CA7_ADDR(x) ((x) + 0x8E4U) #define HW_CAU_ADR_CA7(x) (*(__O hw_cau_adr_ca7_t *) HW_CAU_ADR_CA7_ADDR(x)) -#define HW_CAU_ADR_CA7_WR(x, v) (HW_CAU_ADR_CA7(x).U = (v)) +#define HW_CAU_ADR_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca7_t, HW_CAU_ADR_CA7_ADDR(x), v)) /*@}*/ /* @@ -2456,7 +2463,7 @@ #define HW_CAU_ADR_CA8_ADDR(x) ((x) + 0x8E8U) #define HW_CAU_ADR_CA8(x) (*(__O hw_cau_adr_ca8_t *) HW_CAU_ADR_CA8_ADDR(x)) -#define HW_CAU_ADR_CA8_WR(x, v) (HW_CAU_ADR_CA8(x).U = (v)) +#define HW_CAU_ADR_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca8_t, HW_CAU_ADR_CA8_ADDR(x), v)) /*@}*/ /* @@ -2503,7 +2510,7 @@ #define HW_CAU_RADR_CASR_ADDR(x) ((x) + 0x900U) #define HW_CAU_RADR_CASR(x) (*(__O hw_cau_radr_casr_t *) HW_CAU_RADR_CASR_ADDR(x)) -#define HW_CAU_RADR_CASR_WR(x, v) (HW_CAU_RADR_CASR(x).U = (v)) +#define HW_CAU_RADR_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_casr_t, HW_CAU_RADR_CASR_ADDR(x), v)) /*@}*/ /* @@ -2584,7 +2591,7 @@ #define HW_CAU_RADR_CAA_ADDR(x) ((x) + 0x904U) #define HW_CAU_RADR_CAA(x) (*(__O hw_cau_radr_caa_t *) HW_CAU_RADR_CAA_ADDR(x)) -#define HW_CAU_RADR_CAA_WR(x, v) (HW_CAU_RADR_CAA(x).U = (v)) +#define HW_CAU_RADR_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_caa_t, HW_CAU_RADR_CAA_ADDR(x), v)) /*@}*/ /* @@ -2628,7 +2635,7 @@ #define HW_CAU_RADR_CA0_ADDR(x) ((x) + 0x908U) #define HW_CAU_RADR_CA0(x) (*(__O hw_cau_radr_ca0_t *) HW_CAU_RADR_CA0_ADDR(x)) -#define HW_CAU_RADR_CA0_WR(x, v) (HW_CAU_RADR_CA0(x).U = (v)) +#define HW_CAU_RADR_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca0_t, HW_CAU_RADR_CA0_ADDR(x), v)) /*@}*/ /* @@ -2672,7 +2679,7 @@ #define HW_CAU_RADR_CA1_ADDR(x) ((x) + 0x90CU) #define HW_CAU_RADR_CA1(x) (*(__O hw_cau_radr_ca1_t *) HW_CAU_RADR_CA1_ADDR(x)) -#define HW_CAU_RADR_CA1_WR(x, v) (HW_CAU_RADR_CA1(x).U = (v)) +#define HW_CAU_RADR_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca1_t, HW_CAU_RADR_CA1_ADDR(x), v)) /*@}*/ /* @@ -2716,7 +2723,7 @@ #define HW_CAU_RADR_CA2_ADDR(x) ((x) + 0x910U) #define HW_CAU_RADR_CA2(x) (*(__O hw_cau_radr_ca2_t *) HW_CAU_RADR_CA2_ADDR(x)) -#define HW_CAU_RADR_CA2_WR(x, v) (HW_CAU_RADR_CA2(x).U = (v)) +#define HW_CAU_RADR_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca2_t, HW_CAU_RADR_CA2_ADDR(x), v)) /*@}*/ /* @@ -2760,7 +2767,7 @@ #define HW_CAU_RADR_CA3_ADDR(x) ((x) + 0x914U) #define HW_CAU_RADR_CA3(x) (*(__O hw_cau_radr_ca3_t *) HW_CAU_RADR_CA3_ADDR(x)) -#define HW_CAU_RADR_CA3_WR(x, v) (HW_CAU_RADR_CA3(x).U = (v)) +#define HW_CAU_RADR_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca3_t, HW_CAU_RADR_CA3_ADDR(x), v)) /*@}*/ /* @@ -2804,7 +2811,7 @@ #define HW_CAU_RADR_CA4_ADDR(x) ((x) + 0x918U) #define HW_CAU_RADR_CA4(x) (*(__O hw_cau_radr_ca4_t *) HW_CAU_RADR_CA4_ADDR(x)) -#define HW_CAU_RADR_CA4_WR(x, v) (HW_CAU_RADR_CA4(x).U = (v)) +#define HW_CAU_RADR_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca4_t, HW_CAU_RADR_CA4_ADDR(x), v)) /*@}*/ /* @@ -2848,7 +2855,7 @@ #define HW_CAU_RADR_CA5_ADDR(x) ((x) + 0x91CU) #define HW_CAU_RADR_CA5(x) (*(__O hw_cau_radr_ca5_t *) HW_CAU_RADR_CA5_ADDR(x)) -#define HW_CAU_RADR_CA5_WR(x, v) (HW_CAU_RADR_CA5(x).U = (v)) +#define HW_CAU_RADR_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca5_t, HW_CAU_RADR_CA5_ADDR(x), v)) /*@}*/ /* @@ -2892,7 +2899,7 @@ #define HW_CAU_RADR_CA6_ADDR(x) ((x) + 0x920U) #define HW_CAU_RADR_CA6(x) (*(__O hw_cau_radr_ca6_t *) HW_CAU_RADR_CA6_ADDR(x)) -#define HW_CAU_RADR_CA6_WR(x, v) (HW_CAU_RADR_CA6(x).U = (v)) +#define HW_CAU_RADR_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca6_t, HW_CAU_RADR_CA6_ADDR(x), v)) /*@}*/ /* @@ -2936,7 +2943,7 @@ #define HW_CAU_RADR_CA7_ADDR(x) ((x) + 0x924U) #define HW_CAU_RADR_CA7(x) (*(__O hw_cau_radr_ca7_t *) HW_CAU_RADR_CA7_ADDR(x)) -#define HW_CAU_RADR_CA7_WR(x, v) (HW_CAU_RADR_CA7(x).U = (v)) +#define HW_CAU_RADR_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca7_t, HW_CAU_RADR_CA7_ADDR(x), v)) /*@}*/ /* @@ -2980,7 +2987,7 @@ #define HW_CAU_RADR_CA8_ADDR(x) ((x) + 0x928U) #define HW_CAU_RADR_CA8(x) (*(__O hw_cau_radr_ca8_t *) HW_CAU_RADR_CA8_ADDR(x)) -#define HW_CAU_RADR_CA8_WR(x, v) (HW_CAU_RADR_CA8(x).U = (v)) +#define HW_CAU_RADR_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca8_t, HW_CAU_RADR_CA8_ADDR(x), v)) /*@}*/ /* @@ -3027,7 +3034,7 @@ #define HW_CAU_XOR_CASR_ADDR(x) ((x) + 0x980U) #define HW_CAU_XOR_CASR(x) (*(__O hw_cau_xor_casr_t *) HW_CAU_XOR_CASR_ADDR(x)) -#define HW_CAU_XOR_CASR_WR(x, v) (HW_CAU_XOR_CASR(x).U = (v)) +#define HW_CAU_XOR_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_casr_t, HW_CAU_XOR_CASR_ADDR(x), v)) /*@}*/ /* @@ -3108,7 +3115,7 @@ #define HW_CAU_XOR_CAA_ADDR(x) ((x) + 0x984U) #define HW_CAU_XOR_CAA(x) (*(__O hw_cau_xor_caa_t *) HW_CAU_XOR_CAA_ADDR(x)) -#define HW_CAU_XOR_CAA_WR(x, v) (HW_CAU_XOR_CAA(x).U = (v)) +#define HW_CAU_XOR_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_caa_t, HW_CAU_XOR_CAA_ADDR(x), v)) /*@}*/ /* @@ -3152,7 +3159,7 @@ #define HW_CAU_XOR_CA0_ADDR(x) ((x) + 0x988U) #define HW_CAU_XOR_CA0(x) (*(__O hw_cau_xor_ca0_t *) HW_CAU_XOR_CA0_ADDR(x)) -#define HW_CAU_XOR_CA0_WR(x, v) (HW_CAU_XOR_CA0(x).U = (v)) +#define HW_CAU_XOR_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca0_t, HW_CAU_XOR_CA0_ADDR(x), v)) /*@}*/ /* @@ -3196,7 +3203,7 @@ #define HW_CAU_XOR_CA1_ADDR(x) ((x) + 0x98CU) #define HW_CAU_XOR_CA1(x) (*(__O hw_cau_xor_ca1_t *) HW_CAU_XOR_CA1_ADDR(x)) -#define HW_CAU_XOR_CA1_WR(x, v) (HW_CAU_XOR_CA1(x).U = (v)) +#define HW_CAU_XOR_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca1_t, HW_CAU_XOR_CA1_ADDR(x), v)) /*@}*/ /* @@ -3240,7 +3247,7 @@ #define HW_CAU_XOR_CA2_ADDR(x) ((x) + 0x990U) #define HW_CAU_XOR_CA2(x) (*(__O hw_cau_xor_ca2_t *) HW_CAU_XOR_CA2_ADDR(x)) -#define HW_CAU_XOR_CA2_WR(x, v) (HW_CAU_XOR_CA2(x).U = (v)) +#define HW_CAU_XOR_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca2_t, HW_CAU_XOR_CA2_ADDR(x), v)) /*@}*/ /* @@ -3284,7 +3291,7 @@ #define HW_CAU_XOR_CA3_ADDR(x) ((x) + 0x994U) #define HW_CAU_XOR_CA3(x) (*(__O hw_cau_xor_ca3_t *) HW_CAU_XOR_CA3_ADDR(x)) -#define HW_CAU_XOR_CA3_WR(x, v) (HW_CAU_XOR_CA3(x).U = (v)) +#define HW_CAU_XOR_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca3_t, HW_CAU_XOR_CA3_ADDR(x), v)) /*@}*/ /* @@ -3328,7 +3335,7 @@ #define HW_CAU_XOR_CA4_ADDR(x) ((x) + 0x998U) #define HW_CAU_XOR_CA4(x) (*(__O hw_cau_xor_ca4_t *) HW_CAU_XOR_CA4_ADDR(x)) -#define HW_CAU_XOR_CA4_WR(x, v) (HW_CAU_XOR_CA4(x).U = (v)) +#define HW_CAU_XOR_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca4_t, HW_CAU_XOR_CA4_ADDR(x), v)) /*@}*/ /* @@ -3372,7 +3379,7 @@ #define HW_CAU_XOR_CA5_ADDR(x) ((x) + 0x99CU) #define HW_CAU_XOR_CA5(x) (*(__O hw_cau_xor_ca5_t *) HW_CAU_XOR_CA5_ADDR(x)) -#define HW_CAU_XOR_CA5_WR(x, v) (HW_CAU_XOR_CA5(x).U = (v)) +#define HW_CAU_XOR_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca5_t, HW_CAU_XOR_CA5_ADDR(x), v)) /*@}*/ /* @@ -3416,7 +3423,7 @@ #define HW_CAU_XOR_CA6_ADDR(x) ((x) + 0x9A0U) #define HW_CAU_XOR_CA6(x) (*(__O hw_cau_xor_ca6_t *) HW_CAU_XOR_CA6_ADDR(x)) -#define HW_CAU_XOR_CA6_WR(x, v) (HW_CAU_XOR_CA6(x).U = (v)) +#define HW_CAU_XOR_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca6_t, HW_CAU_XOR_CA6_ADDR(x), v)) /*@}*/ /* @@ -3460,7 +3467,7 @@ #define HW_CAU_XOR_CA7_ADDR(x) ((x) + 0x9A4U) #define HW_CAU_XOR_CA7(x) (*(__O hw_cau_xor_ca7_t *) HW_CAU_XOR_CA7_ADDR(x)) -#define HW_CAU_XOR_CA7_WR(x, v) (HW_CAU_XOR_CA7(x).U = (v)) +#define HW_CAU_XOR_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca7_t, HW_CAU_XOR_CA7_ADDR(x), v)) /*@}*/ /* @@ -3504,7 +3511,7 @@ #define HW_CAU_XOR_CA8_ADDR(x) ((x) + 0x9A8U) #define HW_CAU_XOR_CA8(x) (*(__O hw_cau_xor_ca8_t *) HW_CAU_XOR_CA8_ADDR(x)) -#define HW_CAU_XOR_CA8_WR(x, v) (HW_CAU_XOR_CA8(x).U = (v)) +#define HW_CAU_XOR_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca8_t, HW_CAU_XOR_CA8_ADDR(x), v)) /*@}*/ /* @@ -3551,7 +3558,7 @@ #define HW_CAU_ROTL_CASR_ADDR(x) ((x) + 0x9C0U) #define HW_CAU_ROTL_CASR(x) (*(__O hw_cau_rotl_casr_t *) HW_CAU_ROTL_CASR_ADDR(x)) -#define HW_CAU_ROTL_CASR_WR(x, v) (HW_CAU_ROTL_CASR(x).U = (v)) +#define HW_CAU_ROTL_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_casr_t, HW_CAU_ROTL_CASR_ADDR(x), v)) /*@}*/ /* @@ -3632,7 +3639,7 @@ #define HW_CAU_ROTL_CAA_ADDR(x) ((x) + 0x9C4U) #define HW_CAU_ROTL_CAA(x) (*(__O hw_cau_rotl_caa_t *) HW_CAU_ROTL_CAA_ADDR(x)) -#define HW_CAU_ROTL_CAA_WR(x, v) (HW_CAU_ROTL_CAA(x).U = (v)) +#define HW_CAU_ROTL_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_caa_t, HW_CAU_ROTL_CAA_ADDR(x), v)) /*@}*/ /* @@ -3676,7 +3683,7 @@ #define HW_CAU_ROTL_CA0_ADDR(x) ((x) + 0x9C8U) #define HW_CAU_ROTL_CA0(x) (*(__O hw_cau_rotl_ca0_t *) HW_CAU_ROTL_CA0_ADDR(x)) -#define HW_CAU_ROTL_CA0_WR(x, v) (HW_CAU_ROTL_CA0(x).U = (v)) +#define HW_CAU_ROTL_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca0_t, HW_CAU_ROTL_CA0_ADDR(x), v)) /*@}*/ /* @@ -3720,7 +3727,7 @@ #define HW_CAU_ROTL_CA1_ADDR(x) ((x) + 0x9CCU) #define HW_CAU_ROTL_CA1(x) (*(__O hw_cau_rotl_ca1_t *) HW_CAU_ROTL_CA1_ADDR(x)) -#define HW_CAU_ROTL_CA1_WR(x, v) (HW_CAU_ROTL_CA1(x).U = (v)) +#define HW_CAU_ROTL_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca1_t, HW_CAU_ROTL_CA1_ADDR(x), v)) /*@}*/ /* @@ -3764,7 +3771,7 @@ #define HW_CAU_ROTL_CA2_ADDR(x) ((x) + 0x9D0U) #define HW_CAU_ROTL_CA2(x) (*(__O hw_cau_rotl_ca2_t *) HW_CAU_ROTL_CA2_ADDR(x)) -#define HW_CAU_ROTL_CA2_WR(x, v) (HW_CAU_ROTL_CA2(x).U = (v)) +#define HW_CAU_ROTL_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca2_t, HW_CAU_ROTL_CA2_ADDR(x), v)) /*@}*/ /* @@ -3808,7 +3815,7 @@ #define HW_CAU_ROTL_CA3_ADDR(x) ((x) + 0x9D4U) #define HW_CAU_ROTL_CA3(x) (*(__O hw_cau_rotl_ca3_t *) HW_CAU_ROTL_CA3_ADDR(x)) -#define HW_CAU_ROTL_CA3_WR(x, v) (HW_CAU_ROTL_CA3(x).U = (v)) +#define HW_CAU_ROTL_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca3_t, HW_CAU_ROTL_CA3_ADDR(x), v)) /*@}*/ /* @@ -3852,7 +3859,7 @@ #define HW_CAU_ROTL_CA4_ADDR(x) ((x) + 0x9D8U) #define HW_CAU_ROTL_CA4(x) (*(__O hw_cau_rotl_ca4_t *) HW_CAU_ROTL_CA4_ADDR(x)) -#define HW_CAU_ROTL_CA4_WR(x, v) (HW_CAU_ROTL_CA4(x).U = (v)) +#define HW_CAU_ROTL_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca4_t, HW_CAU_ROTL_CA4_ADDR(x), v)) /*@}*/ /* @@ -3896,7 +3903,7 @@ #define HW_CAU_ROTL_CA5_ADDR(x) ((x) + 0x9DCU) #define HW_CAU_ROTL_CA5(x) (*(__O hw_cau_rotl_ca5_t *) HW_CAU_ROTL_CA5_ADDR(x)) -#define HW_CAU_ROTL_CA5_WR(x, v) (HW_CAU_ROTL_CA5(x).U = (v)) +#define HW_CAU_ROTL_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca5_t, HW_CAU_ROTL_CA5_ADDR(x), v)) /*@}*/ /* @@ -3940,7 +3947,7 @@ #define HW_CAU_ROTL_CA6_ADDR(x) ((x) + 0x9E0U) #define HW_CAU_ROTL_CA6(x) (*(__O hw_cau_rotl_ca6_t *) HW_CAU_ROTL_CA6_ADDR(x)) -#define HW_CAU_ROTL_CA6_WR(x, v) (HW_CAU_ROTL_CA6(x).U = (v)) +#define HW_CAU_ROTL_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca6_t, HW_CAU_ROTL_CA6_ADDR(x), v)) /*@}*/ /* @@ -3984,7 +3991,7 @@ #define HW_CAU_ROTL_CA7_ADDR(x) ((x) + 0x9E4U) #define HW_CAU_ROTL_CA7(x) (*(__O hw_cau_rotl_ca7_t *) HW_CAU_ROTL_CA7_ADDR(x)) -#define HW_CAU_ROTL_CA7_WR(x, v) (HW_CAU_ROTL_CA7(x).U = (v)) +#define HW_CAU_ROTL_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca7_t, HW_CAU_ROTL_CA7_ADDR(x), v)) /*@}*/ /* @@ -4028,7 +4035,7 @@ #define HW_CAU_ROTL_CA8_ADDR(x) ((x) + 0x9E8U) #define HW_CAU_ROTL_CA8(x) (*(__O hw_cau_rotl_ca8_t *) HW_CAU_ROTL_CA8_ADDR(x)) -#define HW_CAU_ROTL_CA8_WR(x, v) (HW_CAU_ROTL_CA8(x).U = (v)) +#define HW_CAU_ROTL_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca8_t, HW_CAU_ROTL_CA8_ADDR(x), v)) /*@}*/ /* @@ -4075,7 +4082,7 @@ #define HW_CAU_AESC_CASR_ADDR(x) ((x) + 0xB00U) #define HW_CAU_AESC_CASR(x) (*(__O hw_cau_aesc_casr_t *) HW_CAU_AESC_CASR_ADDR(x)) -#define HW_CAU_AESC_CASR_WR(x, v) (HW_CAU_AESC_CASR(x).U = (v)) +#define HW_CAU_AESC_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_casr_t, HW_CAU_AESC_CASR_ADDR(x), v)) /*@}*/ /* @@ -4156,7 +4163,7 @@ #define HW_CAU_AESC_CAA_ADDR(x) ((x) + 0xB04U) #define HW_CAU_AESC_CAA(x) (*(__O hw_cau_aesc_caa_t *) HW_CAU_AESC_CAA_ADDR(x)) -#define HW_CAU_AESC_CAA_WR(x, v) (HW_CAU_AESC_CAA(x).U = (v)) +#define HW_CAU_AESC_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_caa_t, HW_CAU_AESC_CAA_ADDR(x), v)) /*@}*/ /* @@ -4200,7 +4207,7 @@ #define HW_CAU_AESC_CA0_ADDR(x) ((x) + 0xB08U) #define HW_CAU_AESC_CA0(x) (*(__O hw_cau_aesc_ca0_t *) HW_CAU_AESC_CA0_ADDR(x)) -#define HW_CAU_AESC_CA0_WR(x, v) (HW_CAU_AESC_CA0(x).U = (v)) +#define HW_CAU_AESC_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca0_t, HW_CAU_AESC_CA0_ADDR(x), v)) /*@}*/ /* @@ -4244,7 +4251,7 @@ #define HW_CAU_AESC_CA1_ADDR(x) ((x) + 0xB0CU) #define HW_CAU_AESC_CA1(x) (*(__O hw_cau_aesc_ca1_t *) HW_CAU_AESC_CA1_ADDR(x)) -#define HW_CAU_AESC_CA1_WR(x, v) (HW_CAU_AESC_CA1(x).U = (v)) +#define HW_CAU_AESC_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca1_t, HW_CAU_AESC_CA1_ADDR(x), v)) /*@}*/ /* @@ -4288,7 +4295,7 @@ #define HW_CAU_AESC_CA2_ADDR(x) ((x) + 0xB10U) #define HW_CAU_AESC_CA2(x) (*(__O hw_cau_aesc_ca2_t *) HW_CAU_AESC_CA2_ADDR(x)) -#define HW_CAU_AESC_CA2_WR(x, v) (HW_CAU_AESC_CA2(x).U = (v)) +#define HW_CAU_AESC_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca2_t, HW_CAU_AESC_CA2_ADDR(x), v)) /*@}*/ /* @@ -4332,7 +4339,7 @@ #define HW_CAU_AESC_CA3_ADDR(x) ((x) + 0xB14U) #define HW_CAU_AESC_CA3(x) (*(__O hw_cau_aesc_ca3_t *) HW_CAU_AESC_CA3_ADDR(x)) -#define HW_CAU_AESC_CA3_WR(x, v) (HW_CAU_AESC_CA3(x).U = (v)) +#define HW_CAU_AESC_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca3_t, HW_CAU_AESC_CA3_ADDR(x), v)) /*@}*/ /* @@ -4376,7 +4383,7 @@ #define HW_CAU_AESC_CA4_ADDR(x) ((x) + 0xB18U) #define HW_CAU_AESC_CA4(x) (*(__O hw_cau_aesc_ca4_t *) HW_CAU_AESC_CA4_ADDR(x)) -#define HW_CAU_AESC_CA4_WR(x, v) (HW_CAU_AESC_CA4(x).U = (v)) +#define HW_CAU_AESC_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca4_t, HW_CAU_AESC_CA4_ADDR(x), v)) /*@}*/ /* @@ -4420,7 +4427,7 @@ #define HW_CAU_AESC_CA5_ADDR(x) ((x) + 0xB1CU) #define HW_CAU_AESC_CA5(x) (*(__O hw_cau_aesc_ca5_t *) HW_CAU_AESC_CA5_ADDR(x)) -#define HW_CAU_AESC_CA5_WR(x, v) (HW_CAU_AESC_CA5(x).U = (v)) +#define HW_CAU_AESC_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca5_t, HW_CAU_AESC_CA5_ADDR(x), v)) /*@}*/ /* @@ -4464,7 +4471,7 @@ #define HW_CAU_AESC_CA6_ADDR(x) ((x) + 0xB20U) #define HW_CAU_AESC_CA6(x) (*(__O hw_cau_aesc_ca6_t *) HW_CAU_AESC_CA6_ADDR(x)) -#define HW_CAU_AESC_CA6_WR(x, v) (HW_CAU_AESC_CA6(x).U = (v)) +#define HW_CAU_AESC_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca6_t, HW_CAU_AESC_CA6_ADDR(x), v)) /*@}*/ /* @@ -4508,7 +4515,7 @@ #define HW_CAU_AESC_CA7_ADDR(x) ((x) + 0xB24U) #define HW_CAU_AESC_CA7(x) (*(__O hw_cau_aesc_ca7_t *) HW_CAU_AESC_CA7_ADDR(x)) -#define HW_CAU_AESC_CA7_WR(x, v) (HW_CAU_AESC_CA7(x).U = (v)) +#define HW_CAU_AESC_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca7_t, HW_CAU_AESC_CA7_ADDR(x), v)) /*@}*/ /* @@ -4552,7 +4559,7 @@ #define HW_CAU_AESC_CA8_ADDR(x) ((x) + 0xB28U) #define HW_CAU_AESC_CA8(x) (*(__O hw_cau_aesc_ca8_t *) HW_CAU_AESC_CA8_ADDR(x)) -#define HW_CAU_AESC_CA8_WR(x, v) (HW_CAU_AESC_CA8(x).U = (v)) +#define HW_CAU_AESC_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca8_t, HW_CAU_AESC_CA8_ADDR(x), v)) /*@}*/ /* @@ -4599,7 +4606,7 @@ #define HW_CAU_AESIC_CASR_ADDR(x) ((x) + 0xB40U) #define HW_CAU_AESIC_CASR(x) (*(__O hw_cau_aesic_casr_t *) HW_CAU_AESIC_CASR_ADDR(x)) -#define HW_CAU_AESIC_CASR_WR(x, v) (HW_CAU_AESIC_CASR(x).U = (v)) +#define HW_CAU_AESIC_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_casr_t, HW_CAU_AESIC_CASR_ADDR(x), v)) /*@}*/ /* @@ -4680,7 +4687,7 @@ #define HW_CAU_AESIC_CAA_ADDR(x) ((x) + 0xB44U) #define HW_CAU_AESIC_CAA(x) (*(__O hw_cau_aesic_caa_t *) HW_CAU_AESIC_CAA_ADDR(x)) -#define HW_CAU_AESIC_CAA_WR(x, v) (HW_CAU_AESIC_CAA(x).U = (v)) +#define HW_CAU_AESIC_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_caa_t, HW_CAU_AESIC_CAA_ADDR(x), v)) /*@}*/ /* @@ -4724,7 +4731,7 @@ #define HW_CAU_AESIC_CA0_ADDR(x) ((x) + 0xB48U) #define HW_CAU_AESIC_CA0(x) (*(__O hw_cau_aesic_ca0_t *) HW_CAU_AESIC_CA0_ADDR(x)) -#define HW_CAU_AESIC_CA0_WR(x, v) (HW_CAU_AESIC_CA0(x).U = (v)) +#define HW_CAU_AESIC_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca0_t, HW_CAU_AESIC_CA0_ADDR(x), v)) /*@}*/ /* @@ -4768,7 +4775,7 @@ #define HW_CAU_AESIC_CA1_ADDR(x) ((x) + 0xB4CU) #define HW_CAU_AESIC_CA1(x) (*(__O hw_cau_aesic_ca1_t *) HW_CAU_AESIC_CA1_ADDR(x)) -#define HW_CAU_AESIC_CA1_WR(x, v) (HW_CAU_AESIC_CA1(x).U = (v)) +#define HW_CAU_AESIC_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca1_t, HW_CAU_AESIC_CA1_ADDR(x), v)) /*@}*/ /* @@ -4812,7 +4819,7 @@ #define HW_CAU_AESIC_CA2_ADDR(x) ((x) + 0xB50U) #define HW_CAU_AESIC_CA2(x) (*(__O hw_cau_aesic_ca2_t *) HW_CAU_AESIC_CA2_ADDR(x)) -#define HW_CAU_AESIC_CA2_WR(x, v) (HW_CAU_AESIC_CA2(x).U = (v)) +#define HW_CAU_AESIC_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca2_t, HW_CAU_AESIC_CA2_ADDR(x), v)) /*@}*/ /* @@ -4856,7 +4863,7 @@ #define HW_CAU_AESIC_CA3_ADDR(x) ((x) + 0xB54U) #define HW_CAU_AESIC_CA3(x) (*(__O hw_cau_aesic_ca3_t *) HW_CAU_AESIC_CA3_ADDR(x)) -#define HW_CAU_AESIC_CA3_WR(x, v) (HW_CAU_AESIC_CA3(x).U = (v)) +#define HW_CAU_AESIC_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca3_t, HW_CAU_AESIC_CA3_ADDR(x), v)) /*@}*/ /* @@ -4900,7 +4907,7 @@ #define HW_CAU_AESIC_CA4_ADDR(x) ((x) + 0xB58U) #define HW_CAU_AESIC_CA4(x) (*(__O hw_cau_aesic_ca4_t *) HW_CAU_AESIC_CA4_ADDR(x)) -#define HW_CAU_AESIC_CA4_WR(x, v) (HW_CAU_AESIC_CA4(x).U = (v)) +#define HW_CAU_AESIC_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca4_t, HW_CAU_AESIC_CA4_ADDR(x), v)) /*@}*/ /* @@ -4944,7 +4951,7 @@ #define HW_CAU_AESIC_CA5_ADDR(x) ((x) + 0xB5CU) #define HW_CAU_AESIC_CA5(x) (*(__O hw_cau_aesic_ca5_t *) HW_CAU_AESIC_CA5_ADDR(x)) -#define HW_CAU_AESIC_CA5_WR(x, v) (HW_CAU_AESIC_CA5(x).U = (v)) +#define HW_CAU_AESIC_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca5_t, HW_CAU_AESIC_CA5_ADDR(x), v)) /*@}*/ /* @@ -4988,7 +4995,7 @@ #define HW_CAU_AESIC_CA6_ADDR(x) ((x) + 0xB60U) #define HW_CAU_AESIC_CA6(x) (*(__O hw_cau_aesic_ca6_t *) HW_CAU_AESIC_CA6_ADDR(x)) -#define HW_CAU_AESIC_CA6_WR(x, v) (HW_CAU_AESIC_CA6(x).U = (v)) +#define HW_CAU_AESIC_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca6_t, HW_CAU_AESIC_CA6_ADDR(x), v)) /*@}*/ /* @@ -5032,7 +5039,7 @@ #define HW_CAU_AESIC_CA7_ADDR(x) ((x) + 0xB64U) #define HW_CAU_AESIC_CA7(x) (*(__O hw_cau_aesic_ca7_t *) HW_CAU_AESIC_CA7_ADDR(x)) -#define HW_CAU_AESIC_CA7_WR(x, v) (HW_CAU_AESIC_CA7(x).U = (v)) +#define HW_CAU_AESIC_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca7_t, HW_CAU_AESIC_CA7_ADDR(x), v)) /*@}*/ /* @@ -5076,7 +5083,7 @@ #define HW_CAU_AESIC_CA8_ADDR(x) ((x) + 0xB68U) #define HW_CAU_AESIC_CA8(x) (*(__O hw_cau_aesic_ca8_t *) HW_CAU_AESIC_CA8_ADDR(x)) -#define HW_CAU_AESIC_CA8_WR(x, v) (HW_CAU_AESIC_CA8(x).U = (v)) +#define HW_CAU_AESIC_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca8_t, HW_CAU_AESIC_CA8_ADDR(x), v)) /*@}*/ /*
--- a/hal/device/device/MK64F12/MK64F12_cmp.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_cmp.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -133,8 +140,8 @@ #define HW_CMP_CR0_ADDR(x) ((x) + 0x0U) #define HW_CMP_CR0(x) (*(__IO hw_cmp_cr0_t *) HW_CMP_CR0_ADDR(x)) -#define HW_CMP_CR0_RD(x) (HW_CMP_CR0(x).U) -#define HW_CMP_CR0_WR(x, v) (HW_CMP_CR0(x).U = (v)) +#define HW_CMP_CR0_RD(x) (ADDRESS_READ(hw_cmp_cr0_t, HW_CMP_CR0_ADDR(x))) +#define HW_CMP_CR0_WR(x, v) (ADDRESS_WRITE(hw_cmp_cr0_t, HW_CMP_CR0_ADDR(x), v)) #define HW_CMP_CR0_SET(x, v) (HW_CMP_CR0_WR(x, HW_CMP_CR0_RD(x) | (v))) #define HW_CMP_CR0_CLR(x, v) (HW_CMP_CR0_WR(x, HW_CMP_CR0_RD(x) & ~(v))) #define HW_CMP_CR0_TOG(x, v) (HW_CMP_CR0_WR(x, HW_CMP_CR0_RD(x) ^ (v))) @@ -163,7 +170,7 @@ #define BS_CMP_CR0_HYSTCTR (2U) /*!< Bit field size in bits for CMP_CR0_HYSTCTR. */ /*! @brief Read current value of the CMP_CR0_HYSTCTR field. */ -#define BR_CMP_CR0_HYSTCTR(x) (HW_CMP_CR0(x).B.HYSTCTR) +#define BR_CMP_CR0_HYSTCTR(x) (UNION_READ(hw_cmp_cr0_t, HW_CMP_CR0_ADDR(x), U, B.HYSTCTR)) /*! @brief Format value for bitfield CMP_CR0_HYSTCTR. */ #define BF_CMP_CR0_HYSTCTR(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR0_HYSTCTR) & BM_CMP_CR0_HYSTCTR) @@ -197,7 +204,7 @@ #define BS_CMP_CR0_FILTER_CNT (3U) /*!< Bit field size in bits for CMP_CR0_FILTER_CNT. */ /*! @brief Read current value of the CMP_CR0_FILTER_CNT field. */ -#define BR_CMP_CR0_FILTER_CNT(x) (HW_CMP_CR0(x).B.FILTER_CNT) +#define BR_CMP_CR0_FILTER_CNT(x) (UNION_READ(hw_cmp_cr0_t, HW_CMP_CR0_ADDR(x), U, B.FILTER_CNT)) /*! @brief Format value for bitfield CMP_CR0_FILTER_CNT. */ #define BF_CMP_CR0_FILTER_CNT(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR0_FILTER_CNT) & BM_CMP_CR0_FILTER_CNT) @@ -238,8 +245,8 @@ #define HW_CMP_CR1_ADDR(x) ((x) + 0x1U) #define HW_CMP_CR1(x) (*(__IO hw_cmp_cr1_t *) HW_CMP_CR1_ADDR(x)) -#define HW_CMP_CR1_RD(x) (HW_CMP_CR1(x).U) -#define HW_CMP_CR1_WR(x, v) (HW_CMP_CR1(x).U = (v)) +#define HW_CMP_CR1_RD(x) (ADDRESS_READ(hw_cmp_cr1_t, HW_CMP_CR1_ADDR(x))) +#define HW_CMP_CR1_WR(x, v) (ADDRESS_WRITE(hw_cmp_cr1_t, HW_CMP_CR1_ADDR(x), v)) #define HW_CMP_CR1_SET(x, v) (HW_CMP_CR1_WR(x, HW_CMP_CR1_RD(x) | (v))) #define HW_CMP_CR1_CLR(x, v) (HW_CMP_CR1_WR(x, HW_CMP_CR1_RD(x) & ~(v))) #define HW_CMP_CR1_TOG(x, v) (HW_CMP_CR1_WR(x, HW_CMP_CR1_RD(x) ^ (v))) @@ -267,13 +274,13 @@ #define BS_CMP_CR1_EN (1U) /*!< Bit field size in bits for CMP_CR1_EN. */ /*! @brief Read current value of the CMP_CR1_EN field. */ -#define BR_CMP_CR1_EN(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_EN)) +#define BR_CMP_CR1_EN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_EN))) /*! @brief Format value for bitfield CMP_CR1_EN. */ #define BF_CMP_CR1_EN(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_EN) & BM_CMP_CR1_EN) /*! @brief Set the EN field to a new value. */ -#define BW_CMP_CR1_EN(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_EN) = (v)) +#define BW_CMP_CR1_EN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_EN), v)) /*@}*/ /*! @@ -293,13 +300,13 @@ #define BS_CMP_CR1_OPE (1U) /*!< Bit field size in bits for CMP_CR1_OPE. */ /*! @brief Read current value of the CMP_CR1_OPE field. */ -#define BR_CMP_CR1_OPE(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_OPE)) +#define BR_CMP_CR1_OPE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_OPE))) /*! @brief Format value for bitfield CMP_CR1_OPE. */ #define BF_CMP_CR1_OPE(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_OPE) & BM_CMP_CR1_OPE) /*! @brief Set the OPE field to a new value. */ -#define BW_CMP_CR1_OPE(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_OPE) = (v)) +#define BW_CMP_CR1_OPE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_OPE), v)) /*@}*/ /*! @@ -315,13 +322,13 @@ #define BS_CMP_CR1_COS (1U) /*!< Bit field size in bits for CMP_CR1_COS. */ /*! @brief Read current value of the CMP_CR1_COS field. */ -#define BR_CMP_CR1_COS(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_COS)) +#define BR_CMP_CR1_COS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_COS))) /*! @brief Format value for bitfield CMP_CR1_COS. */ #define BF_CMP_CR1_COS(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_COS) & BM_CMP_CR1_COS) /*! @brief Set the COS field to a new value. */ -#define BW_CMP_CR1_COS(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_COS) = (v)) +#define BW_CMP_CR1_COS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_COS), v)) /*@}*/ /*! @@ -341,13 +348,13 @@ #define BS_CMP_CR1_INV (1U) /*!< Bit field size in bits for CMP_CR1_INV. */ /*! @brief Read current value of the CMP_CR1_INV field. */ -#define BR_CMP_CR1_INV(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_INV)) +#define BR_CMP_CR1_INV(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_INV))) /*! @brief Format value for bitfield CMP_CR1_INV. */ #define BF_CMP_CR1_INV(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_INV) & BM_CMP_CR1_INV) /*! @brief Set the INV field to a new value. */ -#define BW_CMP_CR1_INV(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_INV) = (v)) +#define BW_CMP_CR1_INV(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_INV), v)) /*@}*/ /*! @@ -367,13 +374,13 @@ #define BS_CMP_CR1_PMODE (1U) /*!< Bit field size in bits for CMP_CR1_PMODE. */ /*! @brief Read current value of the CMP_CR1_PMODE field. */ -#define BR_CMP_CR1_PMODE(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_PMODE)) +#define BR_CMP_CR1_PMODE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_PMODE))) /*! @brief Format value for bitfield CMP_CR1_PMODE. */ #define BF_CMP_CR1_PMODE(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_PMODE) & BM_CMP_CR1_PMODE) /*! @brief Set the PMODE field to a new value. */ -#define BW_CMP_CR1_PMODE(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_PMODE) = (v)) +#define BW_CMP_CR1_PMODE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_PMODE), v)) /*@}*/ /*! @@ -394,13 +401,13 @@ #define BS_CMP_CR1_WE (1U) /*!< Bit field size in bits for CMP_CR1_WE. */ /*! @brief Read current value of the CMP_CR1_WE field. */ -#define BR_CMP_CR1_WE(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_WE)) +#define BR_CMP_CR1_WE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_WE))) /*! @brief Format value for bitfield CMP_CR1_WE. */ #define BF_CMP_CR1_WE(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_WE) & BM_CMP_CR1_WE) /*! @brief Set the WE field to a new value. */ -#define BW_CMP_CR1_WE(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_WE) = (v)) +#define BW_CMP_CR1_WE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_WE), v)) /*@}*/ /*! @@ -421,13 +428,13 @@ #define BS_CMP_CR1_SE (1U) /*!< Bit field size in bits for CMP_CR1_SE. */ /*! @brief Read current value of the CMP_CR1_SE field. */ -#define BR_CMP_CR1_SE(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_SE)) +#define BR_CMP_CR1_SE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_SE))) /*! @brief Format value for bitfield CMP_CR1_SE. */ #define BF_CMP_CR1_SE(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_SE) & BM_CMP_CR1_SE) /*! @brief Set the SE field to a new value. */ -#define BW_CMP_CR1_SE(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_SE) = (v)) +#define BW_CMP_CR1_SE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_SE), v)) /*@}*/ /******************************************************************************* @@ -455,8 +462,8 @@ #define HW_CMP_FPR_ADDR(x) ((x) + 0x2U) #define HW_CMP_FPR(x) (*(__IO hw_cmp_fpr_t *) HW_CMP_FPR_ADDR(x)) -#define HW_CMP_FPR_RD(x) (HW_CMP_FPR(x).U) -#define HW_CMP_FPR_WR(x, v) (HW_CMP_FPR(x).U = (v)) +#define HW_CMP_FPR_RD(x) (ADDRESS_READ(hw_cmp_fpr_t, HW_CMP_FPR_ADDR(x))) +#define HW_CMP_FPR_WR(x, v) (ADDRESS_WRITE(hw_cmp_fpr_t, HW_CMP_FPR_ADDR(x), v)) #define HW_CMP_FPR_SET(x, v) (HW_CMP_FPR_WR(x, HW_CMP_FPR_RD(x) | (v))) #define HW_CMP_FPR_CLR(x, v) (HW_CMP_FPR_WR(x, HW_CMP_FPR_RD(x) & ~(v))) #define HW_CMP_FPR_TOG(x, v) (HW_CMP_FPR_WR(x, HW_CMP_FPR_RD(x) ^ (v))) @@ -523,8 +530,8 @@ #define HW_CMP_SCR_ADDR(x) ((x) + 0x3U) #define HW_CMP_SCR(x) (*(__IO hw_cmp_scr_t *) HW_CMP_SCR_ADDR(x)) -#define HW_CMP_SCR_RD(x) (HW_CMP_SCR(x).U) -#define HW_CMP_SCR_WR(x, v) (HW_CMP_SCR(x).U = (v)) +#define HW_CMP_SCR_RD(x) (ADDRESS_READ(hw_cmp_scr_t, HW_CMP_SCR_ADDR(x))) +#define HW_CMP_SCR_WR(x, v) (ADDRESS_WRITE(hw_cmp_scr_t, HW_CMP_SCR_ADDR(x), v)) #define HW_CMP_SCR_SET(x, v) (HW_CMP_SCR_WR(x, HW_CMP_SCR_RD(x) | (v))) #define HW_CMP_SCR_CLR(x, v) (HW_CMP_SCR_WR(x, HW_CMP_SCR_RD(x) & ~(v))) #define HW_CMP_SCR_TOG(x, v) (HW_CMP_SCR_WR(x, HW_CMP_SCR_RD(x) ^ (v))) @@ -547,7 +554,7 @@ #define BS_CMP_SCR_COUT (1U) /*!< Bit field size in bits for CMP_SCR_COUT. */ /*! @brief Read current value of the CMP_SCR_COUT field. */ -#define BR_CMP_SCR_COUT(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_COUT)) +#define BR_CMP_SCR_COUT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_COUT))) /*@}*/ /*! @@ -567,13 +574,13 @@ #define BS_CMP_SCR_CFF (1U) /*!< Bit field size in bits for CMP_SCR_CFF. */ /*! @brief Read current value of the CMP_SCR_CFF field. */ -#define BR_CMP_SCR_CFF(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFF)) +#define BR_CMP_SCR_CFF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFF))) /*! @brief Format value for bitfield CMP_SCR_CFF. */ #define BF_CMP_SCR_CFF(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_CFF) & BM_CMP_SCR_CFF) /*! @brief Set the CFF field to a new value. */ -#define BW_CMP_SCR_CFF(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFF) = (v)) +#define BW_CMP_SCR_CFF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFF), v)) /*@}*/ /*! @@ -593,13 +600,13 @@ #define BS_CMP_SCR_CFR (1U) /*!< Bit field size in bits for CMP_SCR_CFR. */ /*! @brief Read current value of the CMP_SCR_CFR field. */ -#define BR_CMP_SCR_CFR(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFR)) +#define BR_CMP_SCR_CFR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFR))) /*! @brief Format value for bitfield CMP_SCR_CFR. */ #define BF_CMP_SCR_CFR(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_CFR) & BM_CMP_SCR_CFR) /*! @brief Set the CFR field to a new value. */ -#define BW_CMP_SCR_CFR(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFR) = (v)) +#define BW_CMP_SCR_CFR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFR), v)) /*@}*/ /*! @@ -618,13 +625,13 @@ #define BS_CMP_SCR_IEF (1U) /*!< Bit field size in bits for CMP_SCR_IEF. */ /*! @brief Read current value of the CMP_SCR_IEF field. */ -#define BR_CMP_SCR_IEF(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IEF)) +#define BR_CMP_SCR_IEF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IEF))) /*! @brief Format value for bitfield CMP_SCR_IEF. */ #define BF_CMP_SCR_IEF(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_IEF) & BM_CMP_SCR_IEF) /*! @brief Set the IEF field to a new value. */ -#define BW_CMP_SCR_IEF(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IEF) = (v)) +#define BW_CMP_SCR_IEF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IEF), v)) /*@}*/ /*! @@ -643,13 +650,13 @@ #define BS_CMP_SCR_IER (1U) /*!< Bit field size in bits for CMP_SCR_IER. */ /*! @brief Read current value of the CMP_SCR_IER field. */ -#define BR_CMP_SCR_IER(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IER)) +#define BR_CMP_SCR_IER(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IER))) /*! @brief Format value for bitfield CMP_SCR_IER. */ #define BF_CMP_SCR_IER(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_IER) & BM_CMP_SCR_IER) /*! @brief Set the IER field to a new value. */ -#define BW_CMP_SCR_IER(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IER) = (v)) +#define BW_CMP_SCR_IER(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IER), v)) /*@}*/ /*! @@ -668,13 +675,13 @@ #define BS_CMP_SCR_DMAEN (1U) /*!< Bit field size in bits for CMP_SCR_DMAEN. */ /*! @brief Read current value of the CMP_SCR_DMAEN field. */ -#define BR_CMP_SCR_DMAEN(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_DMAEN)) +#define BR_CMP_SCR_DMAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_DMAEN))) /*! @brief Format value for bitfield CMP_SCR_DMAEN. */ #define BF_CMP_SCR_DMAEN(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_DMAEN) & BM_CMP_SCR_DMAEN) /*! @brief Set the DMAEN field to a new value. */ -#define BW_CMP_SCR_DMAEN(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_DMAEN) = (v)) +#define BW_CMP_SCR_DMAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_DMAEN), v)) /*@}*/ /******************************************************************************* @@ -704,8 +711,8 @@ #define HW_CMP_DACCR_ADDR(x) ((x) + 0x4U) #define HW_CMP_DACCR(x) (*(__IO hw_cmp_daccr_t *) HW_CMP_DACCR_ADDR(x)) -#define HW_CMP_DACCR_RD(x) (HW_CMP_DACCR(x).U) -#define HW_CMP_DACCR_WR(x, v) (HW_CMP_DACCR(x).U = (v)) +#define HW_CMP_DACCR_RD(x) (ADDRESS_READ(hw_cmp_daccr_t, HW_CMP_DACCR_ADDR(x))) +#define HW_CMP_DACCR_WR(x, v) (ADDRESS_WRITE(hw_cmp_daccr_t, HW_CMP_DACCR_ADDR(x), v)) #define HW_CMP_DACCR_SET(x, v) (HW_CMP_DACCR_WR(x, HW_CMP_DACCR_RD(x) | (v))) #define HW_CMP_DACCR_CLR(x, v) (HW_CMP_DACCR_WR(x, HW_CMP_DACCR_RD(x) & ~(v))) #define HW_CMP_DACCR_TOG(x, v) (HW_CMP_DACCR_WR(x, HW_CMP_DACCR_RD(x) ^ (v))) @@ -727,7 +734,7 @@ #define BS_CMP_DACCR_VOSEL (6U) /*!< Bit field size in bits for CMP_DACCR_VOSEL. */ /*! @brief Read current value of the CMP_DACCR_VOSEL field. */ -#define BR_CMP_DACCR_VOSEL(x) (HW_CMP_DACCR(x).B.VOSEL) +#define BR_CMP_DACCR_VOSEL(x) (UNION_READ(hw_cmp_daccr_t, HW_CMP_DACCR_ADDR(x), U, B.VOSEL)) /*! @brief Format value for bitfield CMP_DACCR_VOSEL. */ #define BF_CMP_DACCR_VOSEL(v) ((uint8_t)((uint8_t)(v) << BP_CMP_DACCR_VOSEL) & BM_CMP_DACCR_VOSEL) @@ -749,13 +756,13 @@ #define BS_CMP_DACCR_VRSEL (1U) /*!< Bit field size in bits for CMP_DACCR_VRSEL. */ /*! @brief Read current value of the CMP_DACCR_VRSEL field. */ -#define BR_CMP_DACCR_VRSEL(x) (BITBAND_ACCESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_VRSEL)) +#define BR_CMP_DACCR_VRSEL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_VRSEL))) /*! @brief Format value for bitfield CMP_DACCR_VRSEL. */ #define BF_CMP_DACCR_VRSEL(v) ((uint8_t)((uint8_t)(v) << BP_CMP_DACCR_VRSEL) & BM_CMP_DACCR_VRSEL) /*! @brief Set the VRSEL field to a new value. */ -#define BW_CMP_DACCR_VRSEL(x, v) (BITBAND_ACCESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_VRSEL) = (v)) +#define BW_CMP_DACCR_VRSEL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_VRSEL), v)) /*@}*/ /*! @@ -774,13 +781,13 @@ #define BS_CMP_DACCR_DACEN (1U) /*!< Bit field size in bits for CMP_DACCR_DACEN. */ /*! @brief Read current value of the CMP_DACCR_DACEN field. */ -#define BR_CMP_DACCR_DACEN(x) (BITBAND_ACCESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_DACEN)) +#define BR_CMP_DACCR_DACEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_DACEN))) /*! @brief Format value for bitfield CMP_DACCR_DACEN. */ #define BF_CMP_DACCR_DACEN(v) ((uint8_t)((uint8_t)(v) << BP_CMP_DACCR_DACEN) & BM_CMP_DACCR_DACEN) /*! @brief Set the DACEN field to a new value. */ -#define BW_CMP_DACCR_DACEN(x, v) (BITBAND_ACCESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_DACEN) = (v)) +#define BW_CMP_DACCR_DACEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_DACEN), v)) /*@}*/ /******************************************************************************* @@ -811,8 +818,8 @@ #define HW_CMP_MUXCR_ADDR(x) ((x) + 0x5U) #define HW_CMP_MUXCR(x) (*(__IO hw_cmp_muxcr_t *) HW_CMP_MUXCR_ADDR(x)) -#define HW_CMP_MUXCR_RD(x) (HW_CMP_MUXCR(x).U) -#define HW_CMP_MUXCR_WR(x, v) (HW_CMP_MUXCR(x).U = (v)) +#define HW_CMP_MUXCR_RD(x) (ADDRESS_READ(hw_cmp_muxcr_t, HW_CMP_MUXCR_ADDR(x))) +#define HW_CMP_MUXCR_WR(x, v) (ADDRESS_WRITE(hw_cmp_muxcr_t, HW_CMP_MUXCR_ADDR(x), v)) #define HW_CMP_MUXCR_SET(x, v) (HW_CMP_MUXCR_WR(x, HW_CMP_MUXCR_RD(x) | (v))) #define HW_CMP_MUXCR_CLR(x, v) (HW_CMP_MUXCR_WR(x, HW_CMP_MUXCR_RD(x) & ~(v))) #define HW_CMP_MUXCR_TOG(x, v) (HW_CMP_MUXCR_WR(x, HW_CMP_MUXCR_RD(x) ^ (v))) @@ -846,7 +853,7 @@ #define BS_CMP_MUXCR_MSEL (3U) /*!< Bit field size in bits for CMP_MUXCR_MSEL. */ /*! @brief Read current value of the CMP_MUXCR_MSEL field. */ -#define BR_CMP_MUXCR_MSEL(x) (HW_CMP_MUXCR(x).B.MSEL) +#define BR_CMP_MUXCR_MSEL(x) (UNION_READ(hw_cmp_muxcr_t, HW_CMP_MUXCR_ADDR(x), U, B.MSEL)) /*! @brief Format value for bitfield CMP_MUXCR_MSEL. */ #define BF_CMP_MUXCR_MSEL(v) ((uint8_t)((uint8_t)(v) << BP_CMP_MUXCR_MSEL) & BM_CMP_MUXCR_MSEL) @@ -879,7 +886,7 @@ #define BS_CMP_MUXCR_PSEL (3U) /*!< Bit field size in bits for CMP_MUXCR_PSEL. */ /*! @brief Read current value of the CMP_MUXCR_PSEL field. */ -#define BR_CMP_MUXCR_PSEL(x) (HW_CMP_MUXCR(x).B.PSEL) +#define BR_CMP_MUXCR_PSEL(x) (UNION_READ(hw_cmp_muxcr_t, HW_CMP_MUXCR_ADDR(x), U, B.PSEL)) /*! @brief Format value for bitfield CMP_MUXCR_PSEL. */ #define BF_CMP_MUXCR_PSEL(v) ((uint8_t)((uint8_t)(v) << BP_CMP_MUXCR_PSEL) & BM_CMP_MUXCR_PSEL) @@ -905,13 +912,13 @@ #define BS_CMP_MUXCR_PSTM (1U) /*!< Bit field size in bits for CMP_MUXCR_PSTM. */ /*! @brief Read current value of the CMP_MUXCR_PSTM field. */ -#define BR_CMP_MUXCR_PSTM(x) (BITBAND_ACCESS8(HW_CMP_MUXCR_ADDR(x), BP_CMP_MUXCR_PSTM)) +#define BR_CMP_MUXCR_PSTM(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_MUXCR_ADDR(x), BP_CMP_MUXCR_PSTM))) /*! @brief Format value for bitfield CMP_MUXCR_PSTM. */ #define BF_CMP_MUXCR_PSTM(v) ((uint8_t)((uint8_t)(v) << BP_CMP_MUXCR_PSTM) & BM_CMP_MUXCR_PSTM) /*! @brief Set the PSTM field to a new value. */ -#define BW_CMP_MUXCR_PSTM(x, v) (BITBAND_ACCESS8(HW_CMP_MUXCR_ADDR(x), BP_CMP_MUXCR_PSTM) = (v)) +#define BW_CMP_MUXCR_PSTM(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_MUXCR_ADDR(x), BP_CMP_MUXCR_PSTM), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_cmt.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_cmt.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -135,8 +142,8 @@ #define HW_CMT_CGH1_ADDR(x) ((x) + 0x0U) #define HW_CMT_CGH1(x) (*(__IO hw_cmt_cgh1_t *) HW_CMT_CGH1_ADDR(x)) -#define HW_CMT_CGH1_RD(x) (HW_CMT_CGH1(x).U) -#define HW_CMT_CGH1_WR(x, v) (HW_CMT_CGH1(x).U = (v)) +#define HW_CMT_CGH1_RD(x) (ADDRESS_READ(hw_cmt_cgh1_t, HW_CMT_CGH1_ADDR(x))) +#define HW_CMT_CGH1_WR(x, v) (ADDRESS_WRITE(hw_cmt_cgh1_t, HW_CMT_CGH1_ADDR(x), v)) #define HW_CMT_CGH1_SET(x, v) (HW_CMT_CGH1_WR(x, HW_CMT_CGH1_RD(x) | (v))) #define HW_CMT_CGH1_CLR(x, v) (HW_CMT_CGH1_WR(x, HW_CMT_CGH1_RD(x) & ~(v))) #define HW_CMT_CGH1_TOG(x, v) (HW_CMT_CGH1_WR(x, HW_CMT_CGH1_RD(x) ^ (v))) @@ -199,8 +206,8 @@ #define HW_CMT_CGL1_ADDR(x) ((x) + 0x1U) #define HW_CMT_CGL1(x) (*(__IO hw_cmt_cgl1_t *) HW_CMT_CGL1_ADDR(x)) -#define HW_CMT_CGL1_RD(x) (HW_CMT_CGL1(x).U) -#define HW_CMT_CGL1_WR(x, v) (HW_CMT_CGL1(x).U = (v)) +#define HW_CMT_CGL1_RD(x) (ADDRESS_READ(hw_cmt_cgl1_t, HW_CMT_CGL1_ADDR(x))) +#define HW_CMT_CGL1_WR(x, v) (ADDRESS_WRITE(hw_cmt_cgl1_t, HW_CMT_CGL1_ADDR(x), v)) #define HW_CMT_CGL1_SET(x, v) (HW_CMT_CGL1_WR(x, HW_CMT_CGL1_RD(x) | (v))) #define HW_CMT_CGL1_CLR(x, v) (HW_CMT_CGL1_WR(x, HW_CMT_CGL1_RD(x) & ~(v))) #define HW_CMT_CGL1_TOG(x, v) (HW_CMT_CGL1_WR(x, HW_CMT_CGL1_RD(x) ^ (v))) @@ -263,8 +270,8 @@ #define HW_CMT_CGH2_ADDR(x) ((x) + 0x2U) #define HW_CMT_CGH2(x) (*(__IO hw_cmt_cgh2_t *) HW_CMT_CGH2_ADDR(x)) -#define HW_CMT_CGH2_RD(x) (HW_CMT_CGH2(x).U) -#define HW_CMT_CGH2_WR(x, v) (HW_CMT_CGH2(x).U = (v)) +#define HW_CMT_CGH2_RD(x) (ADDRESS_READ(hw_cmt_cgh2_t, HW_CMT_CGH2_ADDR(x))) +#define HW_CMT_CGH2_WR(x, v) (ADDRESS_WRITE(hw_cmt_cgh2_t, HW_CMT_CGH2_ADDR(x), v)) #define HW_CMT_CGH2_SET(x, v) (HW_CMT_CGH2_WR(x, HW_CMT_CGH2_RD(x) | (v))) #define HW_CMT_CGH2_CLR(x, v) (HW_CMT_CGH2_WR(x, HW_CMT_CGH2_RD(x) & ~(v))) #define HW_CMT_CGH2_TOG(x, v) (HW_CMT_CGH2_WR(x, HW_CMT_CGH2_RD(x) ^ (v))) @@ -327,8 +334,8 @@ #define HW_CMT_CGL2_ADDR(x) ((x) + 0x3U) #define HW_CMT_CGL2(x) (*(__IO hw_cmt_cgl2_t *) HW_CMT_CGL2_ADDR(x)) -#define HW_CMT_CGL2_RD(x) (HW_CMT_CGL2(x).U) -#define HW_CMT_CGL2_WR(x, v) (HW_CMT_CGL2(x).U = (v)) +#define HW_CMT_CGL2_RD(x) (ADDRESS_READ(hw_cmt_cgl2_t, HW_CMT_CGL2_ADDR(x))) +#define HW_CMT_CGL2_WR(x, v) (ADDRESS_WRITE(hw_cmt_cgl2_t, HW_CMT_CGL2_ADDR(x), v)) #define HW_CMT_CGL2_SET(x, v) (HW_CMT_CGL2_WR(x, HW_CMT_CGL2_RD(x) | (v))) #define HW_CMT_CGL2_CLR(x, v) (HW_CMT_CGL2_WR(x, HW_CMT_CGL2_RD(x) & ~(v))) #define HW_CMT_CGL2_TOG(x, v) (HW_CMT_CGL2_WR(x, HW_CMT_CGL2_RD(x) ^ (v))) @@ -393,8 +400,8 @@ #define HW_CMT_OC_ADDR(x) ((x) + 0x4U) #define HW_CMT_OC(x) (*(__IO hw_cmt_oc_t *) HW_CMT_OC_ADDR(x)) -#define HW_CMT_OC_RD(x) (HW_CMT_OC(x).U) -#define HW_CMT_OC_WR(x, v) (HW_CMT_OC(x).U = (v)) +#define HW_CMT_OC_RD(x) (ADDRESS_READ(hw_cmt_oc_t, HW_CMT_OC_ADDR(x))) +#define HW_CMT_OC_WR(x, v) (ADDRESS_WRITE(hw_cmt_oc_t, HW_CMT_OC_ADDR(x), v)) #define HW_CMT_OC_SET(x, v) (HW_CMT_OC_WR(x, HW_CMT_OC_RD(x) | (v))) #define HW_CMT_OC_CLR(x, v) (HW_CMT_OC_WR(x, HW_CMT_OC_RD(x) & ~(v))) #define HW_CMT_OC_TOG(x, v) (HW_CMT_OC_WR(x, HW_CMT_OC_RD(x) ^ (v))) @@ -424,13 +431,13 @@ #define BS_CMT_OC_IROPEN (1U) /*!< Bit field size in bits for CMT_OC_IROPEN. */ /*! @brief Read current value of the CMT_OC_IROPEN field. */ -#define BR_CMT_OC_IROPEN(x) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROPEN)) +#define BR_CMT_OC_IROPEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROPEN))) /*! @brief Format value for bitfield CMT_OC_IROPEN. */ #define BF_CMT_OC_IROPEN(v) ((uint8_t)((uint8_t)(v) << BP_CMT_OC_IROPEN) & BM_CMT_OC_IROPEN) /*! @brief Set the IROPEN field to a new value. */ -#define BW_CMT_OC_IROPEN(x, v) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROPEN) = (v)) +#define BW_CMT_OC_IROPEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROPEN), v)) /*@}*/ /*! @@ -448,13 +455,13 @@ #define BS_CMT_OC_CMTPOL (1U) /*!< Bit field size in bits for CMT_OC_CMTPOL. */ /*! @brief Read current value of the CMT_OC_CMTPOL field. */ -#define BR_CMT_OC_CMTPOL(x) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_CMTPOL)) +#define BR_CMT_OC_CMTPOL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_CMTPOL))) /*! @brief Format value for bitfield CMT_OC_CMTPOL. */ #define BF_CMT_OC_CMTPOL(v) ((uint8_t)((uint8_t)(v) << BP_CMT_OC_CMTPOL) & BM_CMT_OC_CMTPOL) /*! @brief Set the CMTPOL field to a new value. */ -#define BW_CMT_OC_CMTPOL(x, v) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_CMTPOL) = (v)) +#define BW_CMT_OC_CMTPOL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_CMTPOL), v)) /*@}*/ /*! @@ -469,13 +476,13 @@ #define BS_CMT_OC_IROL (1U) /*!< Bit field size in bits for CMT_OC_IROL. */ /*! @brief Read current value of the CMT_OC_IROL field. */ -#define BR_CMT_OC_IROL(x) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROL)) +#define BR_CMT_OC_IROL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROL))) /*! @brief Format value for bitfield CMT_OC_IROL. */ #define BF_CMT_OC_IROL(v) ((uint8_t)((uint8_t)(v) << BP_CMT_OC_IROL) & BM_CMT_OC_IROL) /*! @brief Set the IROL field to a new value. */ -#define BW_CMT_OC_IROL(x, v) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROL) = (v)) +#define BW_CMT_OC_IROL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROL), v)) /*@}*/ /******************************************************************************* @@ -514,8 +521,8 @@ #define HW_CMT_MSC_ADDR(x) ((x) + 0x5U) #define HW_CMT_MSC(x) (*(__IO hw_cmt_msc_t *) HW_CMT_MSC_ADDR(x)) -#define HW_CMT_MSC_RD(x) (HW_CMT_MSC(x).U) -#define HW_CMT_MSC_WR(x, v) (HW_CMT_MSC(x).U = (v)) +#define HW_CMT_MSC_RD(x) (ADDRESS_READ(hw_cmt_msc_t, HW_CMT_MSC_ADDR(x))) +#define HW_CMT_MSC_WR(x, v) (ADDRESS_WRITE(hw_cmt_msc_t, HW_CMT_MSC_ADDR(x), v)) #define HW_CMT_MSC_SET(x, v) (HW_CMT_MSC_WR(x, HW_CMT_MSC_RD(x) | (v))) #define HW_CMT_MSC_CLR(x, v) (HW_CMT_MSC_WR(x, HW_CMT_MSC_RD(x) & ~(v))) #define HW_CMT_MSC_TOG(x, v) (HW_CMT_MSC_WR(x, HW_CMT_MSC_RD(x) ^ (v))) @@ -546,13 +553,13 @@ #define BS_CMT_MSC_MCGEN (1U) /*!< Bit field size in bits for CMT_MSC_MCGEN. */ /*! @brief Read current value of the CMT_MSC_MCGEN field. */ -#define BR_CMT_MSC_MCGEN(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_MCGEN)) +#define BR_CMT_MSC_MCGEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_MCGEN))) /*! @brief Format value for bitfield CMT_MSC_MCGEN. */ #define BF_CMT_MSC_MCGEN(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_MCGEN) & BM_CMT_MSC_MCGEN) /*! @brief Set the MCGEN field to a new value. */ -#define BW_CMT_MSC_MCGEN(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_MCGEN) = (v)) +#define BW_CMT_MSC_MCGEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_MCGEN), v)) /*@}*/ /*! @@ -570,13 +577,13 @@ #define BS_CMT_MSC_EOCIE (1U) /*!< Bit field size in bits for CMT_MSC_EOCIE. */ /*! @brief Read current value of the CMT_MSC_EOCIE field. */ -#define BR_CMT_MSC_EOCIE(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCIE)) +#define BR_CMT_MSC_EOCIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCIE))) /*! @brief Format value for bitfield CMT_MSC_EOCIE. */ #define BF_CMT_MSC_EOCIE(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_EOCIE) & BM_CMT_MSC_EOCIE) /*! @brief Set the EOCIE field to a new value. */ -#define BW_CMT_MSC_EOCIE(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCIE) = (v)) +#define BW_CMT_MSC_EOCIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCIE), v)) /*@}*/ /*! @@ -594,13 +601,13 @@ #define BS_CMT_MSC_FSK (1U) /*!< Bit field size in bits for CMT_MSC_FSK. */ /*! @brief Read current value of the CMT_MSC_FSK field. */ -#define BR_CMT_MSC_FSK(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_FSK)) +#define BR_CMT_MSC_FSK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_FSK))) /*! @brief Format value for bitfield CMT_MSC_FSK. */ #define BF_CMT_MSC_FSK(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_FSK) & BM_CMT_MSC_FSK) /*! @brief Set the FSK field to a new value. */ -#define BW_CMT_MSC_FSK(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_FSK) = (v)) +#define BW_CMT_MSC_FSK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_FSK), v)) /*@}*/ /*! @@ -623,13 +630,13 @@ #define BS_CMT_MSC_BASE (1U) /*!< Bit field size in bits for CMT_MSC_BASE. */ /*! @brief Read current value of the CMT_MSC_BASE field. */ -#define BR_CMT_MSC_BASE(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_BASE)) +#define BR_CMT_MSC_BASE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_BASE))) /*! @brief Format value for bitfield CMT_MSC_BASE. */ #define BF_CMT_MSC_BASE(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_BASE) & BM_CMT_MSC_BASE) /*! @brief Set the BASE field to a new value. */ -#define BW_CMT_MSC_BASE(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_BASE) = (v)) +#define BW_CMT_MSC_BASE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_BASE), v)) /*@}*/ /*! @@ -647,13 +654,13 @@ #define BS_CMT_MSC_EXSPC (1U) /*!< Bit field size in bits for CMT_MSC_EXSPC. */ /*! @brief Read current value of the CMT_MSC_EXSPC field. */ -#define BR_CMT_MSC_EXSPC(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EXSPC)) +#define BR_CMT_MSC_EXSPC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EXSPC))) /*! @brief Format value for bitfield CMT_MSC_EXSPC. */ #define BF_CMT_MSC_EXSPC(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_EXSPC) & BM_CMT_MSC_EXSPC) /*! @brief Set the EXSPC field to a new value. */ -#define BW_CMT_MSC_EXSPC(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EXSPC) = (v)) +#define BW_CMT_MSC_EXSPC(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EXSPC), v)) /*@}*/ /*! @@ -675,7 +682,7 @@ #define BS_CMT_MSC_CMTDIV (2U) /*!< Bit field size in bits for CMT_MSC_CMTDIV. */ /*! @brief Read current value of the CMT_MSC_CMTDIV field. */ -#define BR_CMT_MSC_CMTDIV(x) (HW_CMT_MSC(x).B.CMTDIV) +#define BR_CMT_MSC_CMTDIV(x) (UNION_READ(hw_cmt_msc_t, HW_CMT_MSC_ADDR(x), U, B.CMTDIV)) /*! @brief Format value for bitfield CMT_MSC_CMTDIV. */ #define BF_CMT_MSC_CMTDIV(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_CMTDIV) & BM_CMT_MSC_CMTDIV) @@ -706,7 +713,7 @@ #define BS_CMT_MSC_EOCF (1U) /*!< Bit field size in bits for CMT_MSC_EOCF. */ /*! @brief Read current value of the CMT_MSC_EOCF field. */ -#define BR_CMT_MSC_EOCF(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCF)) +#define BR_CMT_MSC_EOCF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCF))) /*@}*/ /******************************************************************************* @@ -737,8 +744,8 @@ #define HW_CMT_CMD1_ADDR(x) ((x) + 0x6U) #define HW_CMT_CMD1(x) (*(__IO hw_cmt_cmd1_t *) HW_CMT_CMD1_ADDR(x)) -#define HW_CMT_CMD1_RD(x) (HW_CMT_CMD1(x).U) -#define HW_CMT_CMD1_WR(x, v) (HW_CMT_CMD1(x).U = (v)) +#define HW_CMT_CMD1_RD(x) (ADDRESS_READ(hw_cmt_cmd1_t, HW_CMT_CMD1_ADDR(x))) +#define HW_CMT_CMD1_WR(x, v) (ADDRESS_WRITE(hw_cmt_cmd1_t, HW_CMT_CMD1_ADDR(x), v)) #define HW_CMT_CMD1_SET(x, v) (HW_CMT_CMD1_WR(x, HW_CMT_CMD1_RD(x) | (v))) #define HW_CMT_CMD1_CLR(x, v) (HW_CMT_CMD1_WR(x, HW_CMT_CMD1_RD(x) & ~(v))) #define HW_CMT_CMD1_TOG(x, v) (HW_CMT_CMD1_WR(x, HW_CMT_CMD1_RD(x) ^ (v))) @@ -796,8 +803,8 @@ #define HW_CMT_CMD2_ADDR(x) ((x) + 0x7U) #define HW_CMT_CMD2(x) (*(__IO hw_cmt_cmd2_t *) HW_CMT_CMD2_ADDR(x)) -#define HW_CMT_CMD2_RD(x) (HW_CMT_CMD2(x).U) -#define HW_CMT_CMD2_WR(x, v) (HW_CMT_CMD2(x).U = (v)) +#define HW_CMT_CMD2_RD(x) (ADDRESS_READ(hw_cmt_cmd2_t, HW_CMT_CMD2_ADDR(x))) +#define HW_CMT_CMD2_WR(x, v) (ADDRESS_WRITE(hw_cmt_cmd2_t, HW_CMT_CMD2_ADDR(x), v)) #define HW_CMT_CMD2_SET(x, v) (HW_CMT_CMD2_WR(x, HW_CMT_CMD2_RD(x) | (v))) #define HW_CMT_CMD2_CLR(x, v) (HW_CMT_CMD2_WR(x, HW_CMT_CMD2_RD(x) & ~(v))) #define HW_CMT_CMD2_TOG(x, v) (HW_CMT_CMD2_WR(x, HW_CMT_CMD2_RD(x) ^ (v))) @@ -855,8 +862,8 @@ #define HW_CMT_CMD3_ADDR(x) ((x) + 0x8U) #define HW_CMT_CMD3(x) (*(__IO hw_cmt_cmd3_t *) HW_CMT_CMD3_ADDR(x)) -#define HW_CMT_CMD3_RD(x) (HW_CMT_CMD3(x).U) -#define HW_CMT_CMD3_WR(x, v) (HW_CMT_CMD3(x).U = (v)) +#define HW_CMT_CMD3_RD(x) (ADDRESS_READ(hw_cmt_cmd3_t, HW_CMT_CMD3_ADDR(x))) +#define HW_CMT_CMD3_WR(x, v) (ADDRESS_WRITE(hw_cmt_cmd3_t, HW_CMT_CMD3_ADDR(x), v)) #define HW_CMT_CMD3_SET(x, v) (HW_CMT_CMD3_WR(x, HW_CMT_CMD3_RD(x) | (v))) #define HW_CMT_CMD3_CLR(x, v) (HW_CMT_CMD3_WR(x, HW_CMT_CMD3_RD(x) & ~(v))) #define HW_CMT_CMD3_TOG(x, v) (HW_CMT_CMD3_WR(x, HW_CMT_CMD3_RD(x) ^ (v))) @@ -914,8 +921,8 @@ #define HW_CMT_CMD4_ADDR(x) ((x) + 0x9U) #define HW_CMT_CMD4(x) (*(__IO hw_cmt_cmd4_t *) HW_CMT_CMD4_ADDR(x)) -#define HW_CMT_CMD4_RD(x) (HW_CMT_CMD4(x).U) -#define HW_CMT_CMD4_WR(x, v) (HW_CMT_CMD4(x).U = (v)) +#define HW_CMT_CMD4_RD(x) (ADDRESS_READ(hw_cmt_cmd4_t, HW_CMT_CMD4_ADDR(x))) +#define HW_CMT_CMD4_WR(x, v) (ADDRESS_WRITE(hw_cmt_cmd4_t, HW_CMT_CMD4_ADDR(x), v)) #define HW_CMT_CMD4_SET(x, v) (HW_CMT_CMD4_WR(x, HW_CMT_CMD4_RD(x) | (v))) #define HW_CMT_CMD4_CLR(x, v) (HW_CMT_CMD4_WR(x, HW_CMT_CMD4_RD(x) & ~(v))) #define HW_CMT_CMD4_TOG(x, v) (HW_CMT_CMD4_WR(x, HW_CMT_CMD4_RD(x) ^ (v))) @@ -973,8 +980,8 @@ #define HW_CMT_PPS_ADDR(x) ((x) + 0xAU) #define HW_CMT_PPS(x) (*(__IO hw_cmt_pps_t *) HW_CMT_PPS_ADDR(x)) -#define HW_CMT_PPS_RD(x) (HW_CMT_PPS(x).U) -#define HW_CMT_PPS_WR(x, v) (HW_CMT_PPS(x).U = (v)) +#define HW_CMT_PPS_RD(x) (ADDRESS_READ(hw_cmt_pps_t, HW_CMT_PPS_ADDR(x))) +#define HW_CMT_PPS_WR(x, v) (ADDRESS_WRITE(hw_cmt_pps_t, HW_CMT_PPS_ADDR(x), v)) #define HW_CMT_PPS_SET(x, v) (HW_CMT_PPS_WR(x, HW_CMT_PPS_RD(x) | (v))) #define HW_CMT_PPS_CLR(x, v) (HW_CMT_PPS_WR(x, HW_CMT_PPS_RD(x) & ~(v))) #define HW_CMT_PPS_TOG(x, v) (HW_CMT_PPS_WR(x, HW_CMT_PPS_RD(x) ^ (v))) @@ -1014,7 +1021,7 @@ #define BS_CMT_PPS_PPSDIV (4U) /*!< Bit field size in bits for CMT_PPS_PPSDIV. */ /*! @brief Read current value of the CMT_PPS_PPSDIV field. */ -#define BR_CMT_PPS_PPSDIV(x) (HW_CMT_PPS(x).B.PPSDIV) +#define BR_CMT_PPS_PPSDIV(x) (UNION_READ(hw_cmt_pps_t, HW_CMT_PPS_ADDR(x), U, B.PPSDIV)) /*! @brief Format value for bitfield CMT_PPS_PPSDIV. */ #define BF_CMT_PPS_PPSDIV(v) ((uint8_t)((uint8_t)(v) << BP_CMT_PPS_PPSDIV) & BM_CMT_PPS_PPSDIV) @@ -1051,8 +1058,8 @@ #define HW_CMT_DMA_ADDR(x) ((x) + 0xBU) #define HW_CMT_DMA(x) (*(__IO hw_cmt_dma_t *) HW_CMT_DMA_ADDR(x)) -#define HW_CMT_DMA_RD(x) (HW_CMT_DMA(x).U) -#define HW_CMT_DMA_WR(x, v) (HW_CMT_DMA(x).U = (v)) +#define HW_CMT_DMA_RD(x) (ADDRESS_READ(hw_cmt_dma_t, HW_CMT_DMA_ADDR(x))) +#define HW_CMT_DMA_WR(x, v) (ADDRESS_WRITE(hw_cmt_dma_t, HW_CMT_DMA_ADDR(x), v)) #define HW_CMT_DMA_SET(x, v) (HW_CMT_DMA_WR(x, HW_CMT_DMA_RD(x) | (v))) #define HW_CMT_DMA_CLR(x, v) (HW_CMT_DMA_WR(x, HW_CMT_DMA_RD(x) & ~(v))) #define HW_CMT_DMA_TOG(x, v) (HW_CMT_DMA_WR(x, HW_CMT_DMA_RD(x) ^ (v))) @@ -1077,13 +1084,13 @@ #define BS_CMT_DMA_DMA (1U) /*!< Bit field size in bits for CMT_DMA_DMA. */ /*! @brief Read current value of the CMT_DMA_DMA field. */ -#define BR_CMT_DMA_DMA(x) (BITBAND_ACCESS8(HW_CMT_DMA_ADDR(x), BP_CMT_DMA_DMA)) +#define BR_CMT_DMA_DMA(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_DMA_ADDR(x), BP_CMT_DMA_DMA))) /*! @brief Format value for bitfield CMT_DMA_DMA. */ #define BF_CMT_DMA_DMA(v) ((uint8_t)((uint8_t)(v) << BP_CMT_DMA_DMA) & BM_CMT_DMA_DMA) /*! @brief Set the DMA field to a new value. */ -#define BW_CMT_DMA_DMA(x, v) (BITBAND_ACCESS8(HW_CMT_DMA_ADDR(x), BP_CMT_DMA_DMA) = (v)) +#define BW_CMT_DMA_DMA(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_DMA_ADDR(x), BP_CMT_DMA_DMA), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_crc.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_crc.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -137,8 +144,8 @@ #define HW_CRC_DATAL_ADDR(x) ((x) + 0x0U) #define HW_CRC_DATAL(x) (*(__IO hw_crc_datal_t *) HW_CRC_DATAL_ADDR(x)) -#define HW_CRC_DATAL_RD(x) (HW_CRC_DATAL(x).U) -#define HW_CRC_DATAL_WR(x, v) (HW_CRC_DATAL(x).U = (v)) +#define HW_CRC_DATAL_RD(x) (ADDRESS_READ(hw_crc_datal_t, HW_CRC_DATAL_ADDR(x))) +#define HW_CRC_DATAL_WR(x, v) (ADDRESS_WRITE(hw_crc_datal_t, HW_CRC_DATAL_ADDR(x), v)) #define HW_CRC_DATAL_SET(x, v) (HW_CRC_DATAL_WR(x, HW_CRC_DATAL_RD(x) | (v))) #define HW_CRC_DATAL_CLR(x, v) (HW_CRC_DATAL_WR(x, HW_CRC_DATAL_RD(x) & ~(v))) #define HW_CRC_DATAL_TOG(x, v) (HW_CRC_DATAL_WR(x, HW_CRC_DATAL_RD(x) ^ (v))) @@ -191,8 +198,8 @@ #define HW_CRC_DATAH_ADDR(x) ((x) + 0x2U) #define HW_CRC_DATAH(x) (*(__IO hw_crc_datah_t *) HW_CRC_DATAH_ADDR(x)) -#define HW_CRC_DATAH_RD(x) (HW_CRC_DATAH(x).U) -#define HW_CRC_DATAH_WR(x, v) (HW_CRC_DATAH(x).U = (v)) +#define HW_CRC_DATAH_RD(x) (ADDRESS_READ(hw_crc_datah_t, HW_CRC_DATAH_ADDR(x))) +#define HW_CRC_DATAH_WR(x, v) (ADDRESS_WRITE(hw_crc_datah_t, HW_CRC_DATAH_ADDR(x), v)) #define HW_CRC_DATAH_SET(x, v) (HW_CRC_DATAH_WR(x, HW_CRC_DATAH_RD(x) | (v))) #define HW_CRC_DATAH_CLR(x, v) (HW_CRC_DATAH_WR(x, HW_CRC_DATAH_RD(x) & ~(v))) #define HW_CRC_DATAH_TOG(x, v) (HW_CRC_DATAH_WR(x, HW_CRC_DATAH_RD(x) ^ (v))) @@ -245,8 +252,8 @@ #define HW_CRC_DATALL_ADDR(x) ((x) + 0x0U) #define HW_CRC_DATALL(x) (*(__IO hw_crc_datall_t *) HW_CRC_DATALL_ADDR(x)) -#define HW_CRC_DATALL_RD(x) (HW_CRC_DATALL(x).U) -#define HW_CRC_DATALL_WR(x, v) (HW_CRC_DATALL(x).U = (v)) +#define HW_CRC_DATALL_RD(x) (ADDRESS_READ(hw_crc_datall_t, HW_CRC_DATALL_ADDR(x))) +#define HW_CRC_DATALL_WR(x, v) (ADDRESS_WRITE(hw_crc_datall_t, HW_CRC_DATALL_ADDR(x), v)) #define HW_CRC_DATALL_SET(x, v) (HW_CRC_DATALL_WR(x, HW_CRC_DATALL_RD(x) | (v))) #define HW_CRC_DATALL_CLR(x, v) (HW_CRC_DATALL_WR(x, HW_CRC_DATALL_RD(x) & ~(v))) #define HW_CRC_DATALL_TOG(x, v) (HW_CRC_DATALL_WR(x, HW_CRC_DATALL_RD(x) ^ (v))) @@ -299,8 +306,8 @@ #define HW_CRC_DATALU_ADDR(x) ((x) + 0x1U) #define HW_CRC_DATALU(x) (*(__IO hw_crc_datalu_t *) HW_CRC_DATALU_ADDR(x)) -#define HW_CRC_DATALU_RD(x) (HW_CRC_DATALU(x).U) -#define HW_CRC_DATALU_WR(x, v) (HW_CRC_DATALU(x).U = (v)) +#define HW_CRC_DATALU_RD(x) (ADDRESS_READ(hw_crc_datalu_t, HW_CRC_DATALU_ADDR(x))) +#define HW_CRC_DATALU_WR(x, v) (ADDRESS_WRITE(hw_crc_datalu_t, HW_CRC_DATALU_ADDR(x), v)) #define HW_CRC_DATALU_SET(x, v) (HW_CRC_DATALU_WR(x, HW_CRC_DATALU_RD(x) | (v))) #define HW_CRC_DATALU_CLR(x, v) (HW_CRC_DATALU_WR(x, HW_CRC_DATALU_RD(x) & ~(v))) #define HW_CRC_DATALU_TOG(x, v) (HW_CRC_DATALU_WR(x, HW_CRC_DATALU_RD(x) ^ (v))) @@ -353,8 +360,8 @@ #define HW_CRC_DATAHL_ADDR(x) ((x) + 0x2U) #define HW_CRC_DATAHL(x) (*(__IO hw_crc_datahl_t *) HW_CRC_DATAHL_ADDR(x)) -#define HW_CRC_DATAHL_RD(x) (HW_CRC_DATAHL(x).U) -#define HW_CRC_DATAHL_WR(x, v) (HW_CRC_DATAHL(x).U = (v)) +#define HW_CRC_DATAHL_RD(x) (ADDRESS_READ(hw_crc_datahl_t, HW_CRC_DATAHL_ADDR(x))) +#define HW_CRC_DATAHL_WR(x, v) (ADDRESS_WRITE(hw_crc_datahl_t, HW_CRC_DATAHL_ADDR(x), v)) #define HW_CRC_DATAHL_SET(x, v) (HW_CRC_DATAHL_WR(x, HW_CRC_DATAHL_RD(x) | (v))) #define HW_CRC_DATAHL_CLR(x, v) (HW_CRC_DATAHL_WR(x, HW_CRC_DATAHL_RD(x) & ~(v))) #define HW_CRC_DATAHL_TOG(x, v) (HW_CRC_DATAHL_WR(x, HW_CRC_DATAHL_RD(x) ^ (v))) @@ -407,8 +414,8 @@ #define HW_CRC_DATAHU_ADDR(x) ((x) + 0x3U) #define HW_CRC_DATAHU(x) (*(__IO hw_crc_datahu_t *) HW_CRC_DATAHU_ADDR(x)) -#define HW_CRC_DATAHU_RD(x) (HW_CRC_DATAHU(x).U) -#define HW_CRC_DATAHU_WR(x, v) (HW_CRC_DATAHU(x).U = (v)) +#define HW_CRC_DATAHU_RD(x) (ADDRESS_READ(hw_crc_datahu_t, HW_CRC_DATAHU_ADDR(x))) +#define HW_CRC_DATAHU_WR(x, v) (ADDRESS_WRITE(hw_crc_datahu_t, HW_CRC_DATAHU_ADDR(x), v)) #define HW_CRC_DATAHU_SET(x, v) (HW_CRC_DATAHU_WR(x, HW_CRC_DATAHU_RD(x) | (v))) #define HW_CRC_DATAHU_CLR(x, v) (HW_CRC_DATAHU_WR(x, HW_CRC_DATAHU_RD(x) & ~(v))) #define HW_CRC_DATAHU_TOG(x, v) (HW_CRC_DATAHU_WR(x, HW_CRC_DATAHU_RD(x) ^ (v))) @@ -477,8 +484,8 @@ #define HW_CRC_DATA_ADDR(x) ((x) + 0x0U) #define HW_CRC_DATA(x) (*(__IO hw_crc_data_t *) HW_CRC_DATA_ADDR(x)) -#define HW_CRC_DATA_RD(x) (HW_CRC_DATA(x).U) -#define HW_CRC_DATA_WR(x, v) (HW_CRC_DATA(x).U = (v)) +#define HW_CRC_DATA_RD(x) (ADDRESS_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x))) +#define HW_CRC_DATA_WR(x, v) (ADDRESS_WRITE(hw_crc_data_t, HW_CRC_DATA_ADDR(x), v)) #define HW_CRC_DATA_SET(x, v) (HW_CRC_DATA_WR(x, HW_CRC_DATA_RD(x) | (v))) #define HW_CRC_DATA_CLR(x, v) (HW_CRC_DATA_WR(x, HW_CRC_DATA_RD(x) & ~(v))) #define HW_CRC_DATA_TOG(x, v) (HW_CRC_DATA_WR(x, HW_CRC_DATA_RD(x) ^ (v))) @@ -501,7 +508,7 @@ #define BS_CRC_DATA_LL (8U) /*!< Bit field size in bits for CRC_DATA_LL. */ /*! @brief Read current value of the CRC_DATA_LL field. */ -#define BR_CRC_DATA_LL(x) (HW_CRC_DATA(x).B.LL) +#define BR_CRC_DATA_LL(x) (UNION_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x), U, B.LL)) /*! @brief Format value for bitfield CRC_DATA_LL. */ #define BF_CRC_DATA_LL(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_LL) & BM_CRC_DATA_LL) @@ -523,7 +530,7 @@ #define BS_CRC_DATA_LU (8U) /*!< Bit field size in bits for CRC_DATA_LU. */ /*! @brief Read current value of the CRC_DATA_LU field. */ -#define BR_CRC_DATA_LU(x) (HW_CRC_DATA(x).B.LU) +#define BR_CRC_DATA_LU(x) (UNION_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x), U, B.LU)) /*! @brief Format value for bitfield CRC_DATA_LU. */ #define BF_CRC_DATA_LU(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_LU) & BM_CRC_DATA_LU) @@ -547,7 +554,7 @@ #define BS_CRC_DATA_HL (8U) /*!< Bit field size in bits for CRC_DATA_HL. */ /*! @brief Read current value of the CRC_DATA_HL field. */ -#define BR_CRC_DATA_HL(x) (HW_CRC_DATA(x).B.HL) +#define BR_CRC_DATA_HL(x) (UNION_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x), U, B.HL)) /*! @brief Format value for bitfield CRC_DATA_HL. */ #define BF_CRC_DATA_HL(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_HL) & BM_CRC_DATA_HL) @@ -571,7 +578,7 @@ #define BS_CRC_DATA_HU (8U) /*!< Bit field size in bits for CRC_DATA_HU. */ /*! @brief Read current value of the CRC_DATA_HU field. */ -#define BR_CRC_DATA_HU(x) (HW_CRC_DATA(x).B.HU) +#define BR_CRC_DATA_HU(x) (UNION_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x), U, B.HU)) /*! @brief Format value for bitfield CRC_DATA_HU. */ #define BF_CRC_DATA_HU(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_HU) & BM_CRC_DATA_HU) @@ -612,8 +619,8 @@ #define HW_CRC_GPOLY_ADDR(x) ((x) + 0x4U) #define HW_CRC_GPOLY(x) (*(__IO hw_crc_gpoly_t *) HW_CRC_GPOLY_ADDR(x)) -#define HW_CRC_GPOLY_RD(x) (HW_CRC_GPOLY(x).U) -#define HW_CRC_GPOLY_WR(x, v) (HW_CRC_GPOLY(x).U = (v)) +#define HW_CRC_GPOLY_RD(x) (ADDRESS_READ(hw_crc_gpoly_t, HW_CRC_GPOLY_ADDR(x))) +#define HW_CRC_GPOLY_WR(x, v) (ADDRESS_WRITE(hw_crc_gpoly_t, HW_CRC_GPOLY_ADDR(x), v)) #define HW_CRC_GPOLY_SET(x, v) (HW_CRC_GPOLY_WR(x, HW_CRC_GPOLY_RD(x) | (v))) #define HW_CRC_GPOLY_CLR(x, v) (HW_CRC_GPOLY_WR(x, HW_CRC_GPOLY_RD(x) & ~(v))) #define HW_CRC_GPOLY_TOG(x, v) (HW_CRC_GPOLY_WR(x, HW_CRC_GPOLY_RD(x) ^ (v))) @@ -634,7 +641,7 @@ #define BS_CRC_GPOLY_LOW (16U) /*!< Bit field size in bits for CRC_GPOLY_LOW. */ /*! @brief Read current value of the CRC_GPOLY_LOW field. */ -#define BR_CRC_GPOLY_LOW(x) (HW_CRC_GPOLY(x).B.LOW) +#define BR_CRC_GPOLY_LOW(x) (UNION_READ(hw_crc_gpoly_t, HW_CRC_GPOLY_ADDR(x), U, B.LOW)) /*! @brief Format value for bitfield CRC_GPOLY_LOW. */ #define BF_CRC_GPOLY_LOW(v) ((uint32_t)((uint32_t)(v) << BP_CRC_GPOLY_LOW) & BM_CRC_GPOLY_LOW) @@ -655,7 +662,7 @@ #define BS_CRC_GPOLY_HIGH (16U) /*!< Bit field size in bits for CRC_GPOLY_HIGH. */ /*! @brief Read current value of the CRC_GPOLY_HIGH field. */ -#define BR_CRC_GPOLY_HIGH(x) (HW_CRC_GPOLY(x).B.HIGH) +#define BR_CRC_GPOLY_HIGH(x) (UNION_READ(hw_crc_gpoly_t, HW_CRC_GPOLY_ADDR(x), U, B.HIGH)) /*! @brief Format value for bitfield CRC_GPOLY_HIGH. */ #define BF_CRC_GPOLY_HIGH(v) ((uint32_t)((uint32_t)(v) << BP_CRC_GPOLY_HIGH) & BM_CRC_GPOLY_HIGH) @@ -689,8 +696,8 @@ #define HW_CRC_GPOLYL_ADDR(x) ((x) + 0x4U) #define HW_CRC_GPOLYL(x) (*(__IO hw_crc_gpolyl_t *) HW_CRC_GPOLYL_ADDR(x)) -#define HW_CRC_GPOLYL_RD(x) (HW_CRC_GPOLYL(x).U) -#define HW_CRC_GPOLYL_WR(x, v) (HW_CRC_GPOLYL(x).U = (v)) +#define HW_CRC_GPOLYL_RD(x) (ADDRESS_READ(hw_crc_gpolyl_t, HW_CRC_GPOLYL_ADDR(x))) +#define HW_CRC_GPOLYL_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyl_t, HW_CRC_GPOLYL_ADDR(x), v)) #define HW_CRC_GPOLYL_SET(x, v) (HW_CRC_GPOLYL_WR(x, HW_CRC_GPOLYL_RD(x) | (v))) #define HW_CRC_GPOLYL_CLR(x, v) (HW_CRC_GPOLYL_WR(x, HW_CRC_GPOLYL_RD(x) & ~(v))) #define HW_CRC_GPOLYL_TOG(x, v) (HW_CRC_GPOLYL_WR(x, HW_CRC_GPOLYL_RD(x) ^ (v))) @@ -743,8 +750,8 @@ #define HW_CRC_GPOLYH_ADDR(x) ((x) + 0x6U) #define HW_CRC_GPOLYH(x) (*(__IO hw_crc_gpolyh_t *) HW_CRC_GPOLYH_ADDR(x)) -#define HW_CRC_GPOLYH_RD(x) (HW_CRC_GPOLYH(x).U) -#define HW_CRC_GPOLYH_WR(x, v) (HW_CRC_GPOLYH(x).U = (v)) +#define HW_CRC_GPOLYH_RD(x) (ADDRESS_READ(hw_crc_gpolyh_t, HW_CRC_GPOLYH_ADDR(x))) +#define HW_CRC_GPOLYH_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyh_t, HW_CRC_GPOLYH_ADDR(x), v)) #define HW_CRC_GPOLYH_SET(x, v) (HW_CRC_GPOLYH_WR(x, HW_CRC_GPOLYH_RD(x) | (v))) #define HW_CRC_GPOLYH_CLR(x, v) (HW_CRC_GPOLYH_WR(x, HW_CRC_GPOLYH_RD(x) & ~(v))) #define HW_CRC_GPOLYH_TOG(x, v) (HW_CRC_GPOLYH_WR(x, HW_CRC_GPOLYH_RD(x) ^ (v))) @@ -797,8 +804,8 @@ #define HW_CRC_GPOLYLL_ADDR(x) ((x) + 0x4U) #define HW_CRC_GPOLYLL(x) (*(__IO hw_crc_gpolyll_t *) HW_CRC_GPOLYLL_ADDR(x)) -#define HW_CRC_GPOLYLL_RD(x) (HW_CRC_GPOLYLL(x).U) -#define HW_CRC_GPOLYLL_WR(x, v) (HW_CRC_GPOLYLL(x).U = (v)) +#define HW_CRC_GPOLYLL_RD(x) (ADDRESS_READ(hw_crc_gpolyll_t, HW_CRC_GPOLYLL_ADDR(x))) +#define HW_CRC_GPOLYLL_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyll_t, HW_CRC_GPOLYLL_ADDR(x), v)) #define HW_CRC_GPOLYLL_SET(x, v) (HW_CRC_GPOLYLL_WR(x, HW_CRC_GPOLYLL_RD(x) | (v))) #define HW_CRC_GPOLYLL_CLR(x, v) (HW_CRC_GPOLYLL_WR(x, HW_CRC_GPOLYLL_RD(x) & ~(v))) #define HW_CRC_GPOLYLL_TOG(x, v) (HW_CRC_GPOLYLL_WR(x, HW_CRC_GPOLYLL_RD(x) ^ (v))) @@ -851,8 +858,8 @@ #define HW_CRC_GPOLYLU_ADDR(x) ((x) + 0x5U) #define HW_CRC_GPOLYLU(x) (*(__IO hw_crc_gpolylu_t *) HW_CRC_GPOLYLU_ADDR(x)) -#define HW_CRC_GPOLYLU_RD(x) (HW_CRC_GPOLYLU(x).U) -#define HW_CRC_GPOLYLU_WR(x, v) (HW_CRC_GPOLYLU(x).U = (v)) +#define HW_CRC_GPOLYLU_RD(x) (ADDRESS_READ(hw_crc_gpolylu_t, HW_CRC_GPOLYLU_ADDR(x))) +#define HW_CRC_GPOLYLU_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolylu_t, HW_CRC_GPOLYLU_ADDR(x), v)) #define HW_CRC_GPOLYLU_SET(x, v) (HW_CRC_GPOLYLU_WR(x, HW_CRC_GPOLYLU_RD(x) | (v))) #define HW_CRC_GPOLYLU_CLR(x, v) (HW_CRC_GPOLYLU_WR(x, HW_CRC_GPOLYLU_RD(x) & ~(v))) #define HW_CRC_GPOLYLU_TOG(x, v) (HW_CRC_GPOLYLU_WR(x, HW_CRC_GPOLYLU_RD(x) ^ (v))) @@ -905,8 +912,8 @@ #define HW_CRC_GPOLYHL_ADDR(x) ((x) + 0x6U) #define HW_CRC_GPOLYHL(x) (*(__IO hw_crc_gpolyhl_t *) HW_CRC_GPOLYHL_ADDR(x)) -#define HW_CRC_GPOLYHL_RD(x) (HW_CRC_GPOLYHL(x).U) -#define HW_CRC_GPOLYHL_WR(x, v) (HW_CRC_GPOLYHL(x).U = (v)) +#define HW_CRC_GPOLYHL_RD(x) (ADDRESS_READ(hw_crc_gpolyhl_t, HW_CRC_GPOLYHL_ADDR(x))) +#define HW_CRC_GPOLYHL_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyhl_t, HW_CRC_GPOLYHL_ADDR(x), v)) #define HW_CRC_GPOLYHL_SET(x, v) (HW_CRC_GPOLYHL_WR(x, HW_CRC_GPOLYHL_RD(x) | (v))) #define HW_CRC_GPOLYHL_CLR(x, v) (HW_CRC_GPOLYHL_WR(x, HW_CRC_GPOLYHL_RD(x) & ~(v))) #define HW_CRC_GPOLYHL_TOG(x, v) (HW_CRC_GPOLYHL_WR(x, HW_CRC_GPOLYHL_RD(x) ^ (v))) @@ -959,8 +966,8 @@ #define HW_CRC_GPOLYHU_ADDR(x) ((x) + 0x7U) #define HW_CRC_GPOLYHU(x) (*(__IO hw_crc_gpolyhu_t *) HW_CRC_GPOLYHU_ADDR(x)) -#define HW_CRC_GPOLYHU_RD(x) (HW_CRC_GPOLYHU(x).U) -#define HW_CRC_GPOLYHU_WR(x, v) (HW_CRC_GPOLYHU(x).U = (v)) +#define HW_CRC_GPOLYHU_RD(x) (ADDRESS_READ(hw_crc_gpolyhu_t, HW_CRC_GPOLYHU_ADDR(x))) +#define HW_CRC_GPOLYHU_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyhu_t, HW_CRC_GPOLYHU_ADDR(x), v)) #define HW_CRC_GPOLYHU_SET(x, v) (HW_CRC_GPOLYHU_WR(x, HW_CRC_GPOLYHU_RD(x) | (v))) #define HW_CRC_GPOLYHU_CLR(x, v) (HW_CRC_GPOLYHU_WR(x, HW_CRC_GPOLYHU_RD(x) & ~(v))) #define HW_CRC_GPOLYHU_TOG(x, v) (HW_CRC_GPOLYHU_WR(x, HW_CRC_GPOLYHU_RD(x) ^ (v))) @@ -1024,8 +1031,8 @@ #define HW_CRC_CTRL_ADDR(x) ((x) + 0x8U) #define HW_CRC_CTRL(x) (*(__IO hw_crc_ctrl_t *) HW_CRC_CTRL_ADDR(x)) -#define HW_CRC_CTRL_RD(x) (HW_CRC_CTRL(x).U) -#define HW_CRC_CTRL_WR(x, v) (HW_CRC_CTRL(x).U = (v)) +#define HW_CRC_CTRL_RD(x) (ADDRESS_READ(hw_crc_ctrl_t, HW_CRC_CTRL_ADDR(x))) +#define HW_CRC_CTRL_WR(x, v) (ADDRESS_WRITE(hw_crc_ctrl_t, HW_CRC_CTRL_ADDR(x), v)) #define HW_CRC_CTRL_SET(x, v) (HW_CRC_CTRL_WR(x, HW_CRC_CTRL_RD(x) | (v))) #define HW_CRC_CTRL_CLR(x, v) (HW_CRC_CTRL_WR(x, HW_CRC_CTRL_RD(x) & ~(v))) #define HW_CRC_CTRL_TOG(x, v) (HW_CRC_CTRL_WR(x, HW_CRC_CTRL_RD(x) ^ (v))) @@ -1050,13 +1057,13 @@ #define BS_CRC_CTRL_TCRC (1U) /*!< Bit field size in bits for CRC_CTRL_TCRC. */ /*! @brief Read current value of the CRC_CTRL_TCRC field. */ -#define BR_CRC_CTRL_TCRC(x) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC)) +#define BR_CRC_CTRL_TCRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC))) /*! @brief Format value for bitfield CRC_CTRL_TCRC. */ #define BF_CRC_CTRL_TCRC(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_TCRC) & BM_CRC_CTRL_TCRC) /*! @brief Set the TCRC field to a new value. */ -#define BW_CRC_CTRL_TCRC(x, v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC) = (v)) +#define BW_CRC_CTRL_TCRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC), v)) /*@}*/ /*! @@ -1076,13 +1083,13 @@ #define BS_CRC_CTRL_WAS (1U) /*!< Bit field size in bits for CRC_CTRL_WAS. */ /*! @brief Read current value of the CRC_CTRL_WAS field. */ -#define BR_CRC_CTRL_WAS(x) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS)) +#define BR_CRC_CTRL_WAS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS))) /*! @brief Format value for bitfield CRC_CTRL_WAS. */ #define BF_CRC_CTRL_WAS(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_WAS) & BM_CRC_CTRL_WAS) /*! @brief Set the WAS field to a new value. */ -#define BW_CRC_CTRL_WAS(x, v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS) = (v)) +#define BW_CRC_CTRL_WAS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS), v)) /*@}*/ /*! @@ -1101,13 +1108,13 @@ #define BS_CRC_CTRL_FXOR (1U) /*!< Bit field size in bits for CRC_CTRL_FXOR. */ /*! @brief Read current value of the CRC_CTRL_FXOR field. */ -#define BR_CRC_CTRL_FXOR(x) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR)) +#define BR_CRC_CTRL_FXOR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR))) /*! @brief Format value for bitfield CRC_CTRL_FXOR. */ #define BF_CRC_CTRL_FXOR(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_FXOR) & BM_CRC_CTRL_FXOR) /*! @brief Set the FXOR field to a new value. */ -#define BW_CRC_CTRL_FXOR(x, v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR) = (v)) +#define BW_CRC_CTRL_FXOR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR), v)) /*@}*/ /*! @@ -1129,7 +1136,7 @@ #define BS_CRC_CTRL_TOTR (2U) /*!< Bit field size in bits for CRC_CTRL_TOTR. */ /*! @brief Read current value of the CRC_CTRL_TOTR field. */ -#define BR_CRC_CTRL_TOTR(x) (HW_CRC_CTRL(x).B.TOTR) +#define BR_CRC_CTRL_TOTR(x) (UNION_READ(hw_crc_ctrl_t, HW_CRC_CTRL_ADDR(x), U, B.TOTR)) /*! @brief Format value for bitfield CRC_CTRL_TOTR. */ #define BF_CRC_CTRL_TOTR(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_TOTR) & BM_CRC_CTRL_TOTR) @@ -1157,7 +1164,7 @@ #define BS_CRC_CTRL_TOT (2U) /*!< Bit field size in bits for CRC_CTRL_TOT. */ /*! @brief Read current value of the CRC_CTRL_TOT field. */ -#define BR_CRC_CTRL_TOT(x) (HW_CRC_CTRL(x).B.TOT) +#define BR_CRC_CTRL_TOT(x) (UNION_READ(hw_crc_ctrl_t, HW_CRC_CTRL_ADDR(x), U, B.TOT)) /*! @brief Format value for bitfield CRC_CTRL_TOT. */ #define BF_CRC_CTRL_TOT(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_TOT) & BM_CRC_CTRL_TOT) @@ -1195,8 +1202,8 @@ #define HW_CRC_CTRLHU_ADDR(x) ((x) + 0xBU) #define HW_CRC_CTRLHU(x) (*(__IO hw_crc_ctrlhu_t *) HW_CRC_CTRLHU_ADDR(x)) -#define HW_CRC_CTRLHU_RD(x) (HW_CRC_CTRLHU(x).U) -#define HW_CRC_CTRLHU_WR(x, v) (HW_CRC_CTRLHU(x).U = (v)) +#define HW_CRC_CTRLHU_RD(x) (ADDRESS_READ(hw_crc_ctrlhu_t, HW_CRC_CTRLHU_ADDR(x))) +#define HW_CRC_CTRLHU_WR(x, v) (ADDRESS_WRITE(hw_crc_ctrlhu_t, HW_CRC_CTRLHU_ADDR(x), v)) #define HW_CRC_CTRLHU_SET(x, v) (HW_CRC_CTRLHU_WR(x, HW_CRC_CTRLHU_RD(x) | (v))) #define HW_CRC_CTRLHU_CLR(x, v) (HW_CRC_CTRLHU_WR(x, HW_CRC_CTRLHU_RD(x) & ~(v))) #define HW_CRC_CTRLHU_TOG(x, v) (HW_CRC_CTRLHU_WR(x, HW_CRC_CTRLHU_RD(x) ^ (v))) @@ -1219,13 +1226,13 @@ #define BS_CRC_CTRLHU_TCRC (1U) /*!< Bit field size in bits for CRC_CTRLHU_TCRC. */ /*! @brief Read current value of the CRC_CTRLHU_TCRC field. */ -#define BR_CRC_CTRLHU_TCRC(x) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC)) +#define BR_CRC_CTRLHU_TCRC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC))) /*! @brief Format value for bitfield CRC_CTRLHU_TCRC. */ #define BF_CRC_CTRLHU_TCRC(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_TCRC) & BM_CRC_CTRLHU_TCRC) /*! @brief Set the TCRC field to a new value. */ -#define BW_CRC_CTRLHU_TCRC(x, v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC) = (v)) +#define BW_CRC_CTRLHU_TCRC(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC), v)) /*@}*/ /*! @@ -1241,13 +1248,13 @@ #define BS_CRC_CTRLHU_WAS (1U) /*!< Bit field size in bits for CRC_CTRLHU_WAS. */ /*! @brief Read current value of the CRC_CTRLHU_WAS field. */ -#define BR_CRC_CTRLHU_WAS(x) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS)) +#define BR_CRC_CTRLHU_WAS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS))) /*! @brief Format value for bitfield CRC_CTRLHU_WAS. */ #define BF_CRC_CTRLHU_WAS(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_WAS) & BM_CRC_CTRLHU_WAS) /*! @brief Set the WAS field to a new value. */ -#define BW_CRC_CTRLHU_WAS(x, v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS) = (v)) +#define BW_CRC_CTRLHU_WAS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS), v)) /*@}*/ /*! @@ -1263,13 +1270,13 @@ #define BS_CRC_CTRLHU_FXOR (1U) /*!< Bit field size in bits for CRC_CTRLHU_FXOR. */ /*! @brief Read current value of the CRC_CTRLHU_FXOR field. */ -#define BR_CRC_CTRLHU_FXOR(x) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR)) +#define BR_CRC_CTRLHU_FXOR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR))) /*! @brief Format value for bitfield CRC_CTRLHU_FXOR. */ #define BF_CRC_CTRLHU_FXOR(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_FXOR) & BM_CRC_CTRLHU_FXOR) /*! @brief Set the FXOR field to a new value. */ -#define BW_CRC_CTRLHU_FXOR(x, v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR) = (v)) +#define BW_CRC_CTRLHU_FXOR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR), v)) /*@}*/ /*! @@ -1287,7 +1294,7 @@ #define BS_CRC_CTRLHU_TOTR (2U) /*!< Bit field size in bits for CRC_CTRLHU_TOTR. */ /*! @brief Read current value of the CRC_CTRLHU_TOTR field. */ -#define BR_CRC_CTRLHU_TOTR(x) (HW_CRC_CTRLHU(x).B.TOTR) +#define BR_CRC_CTRLHU_TOTR(x) (UNION_READ(hw_crc_ctrlhu_t, HW_CRC_CTRLHU_ADDR(x), U, B.TOTR)) /*! @brief Format value for bitfield CRC_CTRLHU_TOTR. */ #define BF_CRC_CTRLHU_TOTR(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_TOTR) & BM_CRC_CTRLHU_TOTR) @@ -1311,7 +1318,7 @@ #define BS_CRC_CTRLHU_TOT (2U) /*!< Bit field size in bits for CRC_CTRLHU_TOT. */ /*! @brief Read current value of the CRC_CTRLHU_TOT field. */ -#define BR_CRC_CTRLHU_TOT(x) (HW_CRC_CTRLHU(x).B.TOT) +#define BR_CRC_CTRLHU_TOT(x) (UNION_READ(hw_crc_ctrlhu_t, HW_CRC_CTRLHU_ADDR(x), U, B.TOT)) /*! @brief Format value for bitfield CRC_CTRLHU_TOT. */ #define BF_CRC_CTRLHU_TOT(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_TOT) & BM_CRC_CTRLHU_TOT)
--- a/hal/device/device/MK64F12/MK64F12_dac.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_dac.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -130,8 +137,8 @@ #define HW_DAC_DATnL_ADDR(x, n) ((x) + 0x0U + (0x2U * (n))) #define HW_DAC_DATnL(x, n) (*(__IO hw_dac_datnl_t *) HW_DAC_DATnL_ADDR(x, n)) -#define HW_DAC_DATnL_RD(x, n) (HW_DAC_DATnL(x, n).U) -#define HW_DAC_DATnL_WR(x, n, v) (HW_DAC_DATnL(x, n).U = (v)) +#define HW_DAC_DATnL_RD(x, n) (ADDRESS_READ(hw_dac_datnl_t, HW_DAC_DATnL_ADDR(x, n))) +#define HW_DAC_DATnL_WR(x, n, v) (ADDRESS_WRITE(hw_dac_datnl_t, HW_DAC_DATnL_ADDR(x, n), v)) #define HW_DAC_DATnL_SET(x, n, v) (HW_DAC_DATnL_WR(x, n, HW_DAC_DATnL_RD(x, n) | (v))) #define HW_DAC_DATnL_CLR(x, n, v) (HW_DAC_DATnL_WR(x, n, HW_DAC_DATnL_RD(x, n) & ~(v))) #define HW_DAC_DATnL_TOG(x, n, v) (HW_DAC_DATnL_WR(x, n, HW_DAC_DATnL_RD(x, n) ^ (v))) @@ -190,8 +197,8 @@ #define HW_DAC_DATnH_ADDR(x, n) ((x) + 0x1U + (0x2U * (n))) #define HW_DAC_DATnH(x, n) (*(__IO hw_dac_datnh_t *) HW_DAC_DATnH_ADDR(x, n)) -#define HW_DAC_DATnH_RD(x, n) (HW_DAC_DATnH(x, n).U) -#define HW_DAC_DATnH_WR(x, n, v) (HW_DAC_DATnH(x, n).U = (v)) +#define HW_DAC_DATnH_RD(x, n) (ADDRESS_READ(hw_dac_datnh_t, HW_DAC_DATnH_ADDR(x, n))) +#define HW_DAC_DATnH_WR(x, n, v) (ADDRESS_WRITE(hw_dac_datnh_t, HW_DAC_DATnH_ADDR(x, n), v)) #define HW_DAC_DATnH_SET(x, n, v) (HW_DAC_DATnH_WR(x, n, HW_DAC_DATnH_RD(x, n) | (v))) #define HW_DAC_DATnH_CLR(x, n, v) (HW_DAC_DATnH_WR(x, n, HW_DAC_DATnH_RD(x, n) & ~(v))) #define HW_DAC_DATnH_TOG(x, n, v) (HW_DAC_DATnH_WR(x, n, HW_DAC_DATnH_RD(x, n) ^ (v))) @@ -214,7 +221,7 @@ #define BS_DAC_DATnH_DATA1 (4U) /*!< Bit field size in bits for DAC_DATnH_DATA1. */ /*! @brief Read current value of the DAC_DATnH_DATA1 field. */ -#define BR_DAC_DATnH_DATA1(x, n) (HW_DAC_DATnH(x, n).B.DATA1) +#define BR_DAC_DATnH_DATA1(x, n) (UNION_READ(hw_dac_datnh_t, HW_DAC_DATnH_ADDR(x, n), U, B.DATA1)) /*! @brief Format value for bitfield DAC_DATnH_DATA1. */ #define BF_DAC_DATnH_DATA1(v) ((uint8_t)((uint8_t)(v) << BP_DAC_DATnH_DATA1) & BM_DAC_DATnH_DATA1) @@ -259,8 +266,8 @@ #define HW_DAC_SR_ADDR(x) ((x) + 0x20U) #define HW_DAC_SR(x) (*(__IO hw_dac_sr_t *) HW_DAC_SR_ADDR(x)) -#define HW_DAC_SR_RD(x) (HW_DAC_SR(x).U) -#define HW_DAC_SR_WR(x, v) (HW_DAC_SR(x).U = (v)) +#define HW_DAC_SR_RD(x) (ADDRESS_READ(hw_dac_sr_t, HW_DAC_SR_ADDR(x))) +#define HW_DAC_SR_WR(x, v) (ADDRESS_WRITE(hw_dac_sr_t, HW_DAC_SR_ADDR(x), v)) #define HW_DAC_SR_SET(x, v) (HW_DAC_SR_WR(x, HW_DAC_SR_RD(x) | (v))) #define HW_DAC_SR_CLR(x, v) (HW_DAC_SR_WR(x, HW_DAC_SR_RD(x) & ~(v))) #define HW_DAC_SR_TOG(x, v) (HW_DAC_SR_WR(x, HW_DAC_SR_RD(x) ^ (v))) @@ -283,13 +290,13 @@ #define BS_DAC_SR_DACBFRPBF (1U) /*!< Bit field size in bits for DAC_SR_DACBFRPBF. */ /*! @brief Read current value of the DAC_SR_DACBFRPBF field. */ -#define BR_DAC_SR_DACBFRPBF(x) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF)) +#define BR_DAC_SR_DACBFRPBF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF))) /*! @brief Format value for bitfield DAC_SR_DACBFRPBF. */ #define BF_DAC_SR_DACBFRPBF(v) ((uint8_t)((uint8_t)(v) << BP_DAC_SR_DACBFRPBF) & BM_DAC_SR_DACBFRPBF) /*! @brief Set the DACBFRPBF field to a new value. */ -#define BW_DAC_SR_DACBFRPBF(x, v) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF) = (v)) +#define BW_DAC_SR_DACBFRPBF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF), v)) /*@}*/ /*! @@ -305,13 +312,13 @@ #define BS_DAC_SR_DACBFRPTF (1U) /*!< Bit field size in bits for DAC_SR_DACBFRPTF. */ /*! @brief Read current value of the DAC_SR_DACBFRPTF field. */ -#define BR_DAC_SR_DACBFRPTF(x) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF)) +#define BR_DAC_SR_DACBFRPTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF))) /*! @brief Format value for bitfield DAC_SR_DACBFRPTF. */ #define BF_DAC_SR_DACBFRPTF(v) ((uint8_t)((uint8_t)(v) << BP_DAC_SR_DACBFRPTF) & BM_DAC_SR_DACBFRPTF) /*! @brief Set the DACBFRPTF field to a new value. */ -#define BW_DAC_SR_DACBFRPTF(x, v) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF) = (v)) +#define BW_DAC_SR_DACBFRPTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF), v)) /*@}*/ /*! @@ -327,13 +334,13 @@ #define BS_DAC_SR_DACBFWMF (1U) /*!< Bit field size in bits for DAC_SR_DACBFWMF. */ /*! @brief Read current value of the DAC_SR_DACBFWMF field. */ -#define BR_DAC_SR_DACBFWMF(x) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF)) +#define BR_DAC_SR_DACBFWMF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF))) /*! @brief Format value for bitfield DAC_SR_DACBFWMF. */ #define BF_DAC_SR_DACBFWMF(v) ((uint8_t)((uint8_t)(v) << BP_DAC_SR_DACBFWMF) & BM_DAC_SR_DACBFWMF) /*! @brief Set the DACBFWMF field to a new value. */ -#define BW_DAC_SR_DACBFWMF(x, v) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF) = (v)) +#define BW_DAC_SR_DACBFWMF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF), v)) /*@}*/ /******************************************************************************* @@ -373,8 +380,8 @@ #define HW_DAC_C0_ADDR(x) ((x) + 0x21U) #define HW_DAC_C0(x) (*(__IO hw_dac_c0_t *) HW_DAC_C0_ADDR(x)) -#define HW_DAC_C0_RD(x) (HW_DAC_C0(x).U) -#define HW_DAC_C0_WR(x, v) (HW_DAC_C0(x).U = (v)) +#define HW_DAC_C0_RD(x) (ADDRESS_READ(hw_dac_c0_t, HW_DAC_C0_ADDR(x))) +#define HW_DAC_C0_WR(x, v) (ADDRESS_WRITE(hw_dac_c0_t, HW_DAC_C0_ADDR(x), v)) #define HW_DAC_C0_SET(x, v) (HW_DAC_C0_WR(x, HW_DAC_C0_RD(x) | (v))) #define HW_DAC_C0_CLR(x, v) (HW_DAC_C0_WR(x, HW_DAC_C0_RD(x) & ~(v))) #define HW_DAC_C0_TOG(x, v) (HW_DAC_C0_WR(x, HW_DAC_C0_RD(x) ^ (v))) @@ -397,13 +404,13 @@ #define BS_DAC_C0_DACBBIEN (1U) /*!< Bit field size in bits for DAC_C0_DACBBIEN. */ /*! @brief Read current value of the DAC_C0_DACBBIEN field. */ -#define BR_DAC_C0_DACBBIEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN)) +#define BR_DAC_C0_DACBBIEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN))) /*! @brief Format value for bitfield DAC_C0_DACBBIEN. */ #define BF_DAC_C0_DACBBIEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACBBIEN) & BM_DAC_C0_DACBBIEN) /*! @brief Set the DACBBIEN field to a new value. */ -#define BW_DAC_C0_DACBBIEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN) = (v)) +#define BW_DAC_C0_DACBBIEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN), v)) /*@}*/ /*! @@ -419,13 +426,13 @@ #define BS_DAC_C0_DACBTIEN (1U) /*!< Bit field size in bits for DAC_C0_DACBTIEN. */ /*! @brief Read current value of the DAC_C0_DACBTIEN field. */ -#define BR_DAC_C0_DACBTIEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN)) +#define BR_DAC_C0_DACBTIEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN))) /*! @brief Format value for bitfield DAC_C0_DACBTIEN. */ #define BF_DAC_C0_DACBTIEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACBTIEN) & BM_DAC_C0_DACBTIEN) /*! @brief Set the DACBTIEN field to a new value. */ -#define BW_DAC_C0_DACBTIEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN) = (v)) +#define BW_DAC_C0_DACBTIEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN), v)) /*@}*/ /*! @@ -441,13 +448,13 @@ #define BS_DAC_C0_DACBWIEN (1U) /*!< Bit field size in bits for DAC_C0_DACBWIEN. */ /*! @brief Read current value of the DAC_C0_DACBWIEN field. */ -#define BR_DAC_C0_DACBWIEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN)) +#define BR_DAC_C0_DACBWIEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN))) /*! @brief Format value for bitfield DAC_C0_DACBWIEN. */ #define BF_DAC_C0_DACBWIEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACBWIEN) & BM_DAC_C0_DACBWIEN) /*! @brief Set the DACBWIEN field to a new value. */ -#define BW_DAC_C0_DACBWIEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN) = (v)) +#define BW_DAC_C0_DACBWIEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN), v)) /*@}*/ /*! @@ -466,13 +473,13 @@ #define BS_DAC_C0_LPEN (1U) /*!< Bit field size in bits for DAC_C0_LPEN. */ /*! @brief Read current value of the DAC_C0_LPEN field. */ -#define BR_DAC_C0_LPEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN)) +#define BR_DAC_C0_LPEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN))) /*! @brief Format value for bitfield DAC_C0_LPEN. */ #define BF_DAC_C0_LPEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_LPEN) & BM_DAC_C0_LPEN) /*! @brief Set the LPEN field to a new value. */ -#define BW_DAC_C0_LPEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN) = (v)) +#define BW_DAC_C0_LPEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN), v)) /*@}*/ /*! @@ -495,7 +502,7 @@ #define BF_DAC_C0_DACSWTRG(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACSWTRG) & BM_DAC_C0_DACSWTRG) /*! @brief Set the DACSWTRG field to a new value. */ -#define BW_DAC_C0_DACSWTRG(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACSWTRG) = (v)) +#define BW_DAC_C0_DACSWTRG(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACSWTRG), v)) /*@}*/ /*! @@ -511,13 +518,13 @@ #define BS_DAC_C0_DACTRGSEL (1U) /*!< Bit field size in bits for DAC_C0_DACTRGSEL. */ /*! @brief Read current value of the DAC_C0_DACTRGSEL field. */ -#define BR_DAC_C0_DACTRGSEL(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL)) +#define BR_DAC_C0_DACTRGSEL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL))) /*! @brief Format value for bitfield DAC_C0_DACTRGSEL. */ #define BF_DAC_C0_DACTRGSEL(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACTRGSEL) & BM_DAC_C0_DACTRGSEL) /*! @brief Set the DACTRGSEL field to a new value. */ -#define BW_DAC_C0_DACTRGSEL(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL) = (v)) +#define BW_DAC_C0_DACTRGSEL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL), v)) /*@}*/ /*! @@ -533,13 +540,13 @@ #define BS_DAC_C0_DACRFS (1U) /*!< Bit field size in bits for DAC_C0_DACRFS. */ /*! @brief Read current value of the DAC_C0_DACRFS field. */ -#define BR_DAC_C0_DACRFS(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS)) +#define BR_DAC_C0_DACRFS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS))) /*! @brief Format value for bitfield DAC_C0_DACRFS. */ #define BF_DAC_C0_DACRFS(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACRFS) & BM_DAC_C0_DACRFS) /*! @brief Set the DACRFS field to a new value. */ -#define BW_DAC_C0_DACRFS(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS) = (v)) +#define BW_DAC_C0_DACRFS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS), v)) /*@}*/ /*! @@ -557,13 +564,13 @@ #define BS_DAC_C0_DACEN (1U) /*!< Bit field size in bits for DAC_C0_DACEN. */ /*! @brief Read current value of the DAC_C0_DACEN field. */ -#define BR_DAC_C0_DACEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN)) +#define BR_DAC_C0_DACEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN))) /*! @brief Format value for bitfield DAC_C0_DACEN. */ #define BF_DAC_C0_DACEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACEN) & BM_DAC_C0_DACEN) /*! @brief Set the DACEN field to a new value. */ -#define BW_DAC_C0_DACEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN) = (v)) +#define BW_DAC_C0_DACEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN), v)) /*@}*/ /******************************************************************************* @@ -597,8 +604,8 @@ #define HW_DAC_C1_ADDR(x) ((x) + 0x22U) #define HW_DAC_C1(x) (*(__IO hw_dac_c1_t *) HW_DAC_C1_ADDR(x)) -#define HW_DAC_C1_RD(x) (HW_DAC_C1(x).U) -#define HW_DAC_C1_WR(x, v) (HW_DAC_C1(x).U = (v)) +#define HW_DAC_C1_RD(x) (ADDRESS_READ(hw_dac_c1_t, HW_DAC_C1_ADDR(x))) +#define HW_DAC_C1_WR(x, v) (ADDRESS_WRITE(hw_dac_c1_t, HW_DAC_C1_ADDR(x), v)) #define HW_DAC_C1_SET(x, v) (HW_DAC_C1_WR(x, HW_DAC_C1_RD(x) | (v))) #define HW_DAC_C1_CLR(x, v) (HW_DAC_C1_WR(x, HW_DAC_C1_RD(x) & ~(v))) #define HW_DAC_C1_TOG(x, v) (HW_DAC_C1_WR(x, HW_DAC_C1_RD(x) ^ (v))) @@ -624,13 +631,13 @@ #define BS_DAC_C1_DACBFEN (1U) /*!< Bit field size in bits for DAC_C1_DACBFEN. */ /*! @brief Read current value of the DAC_C1_DACBFEN field. */ -#define BR_DAC_C1_DACBFEN(x) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN)) +#define BR_DAC_C1_DACBFEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN))) /*! @brief Format value for bitfield DAC_C1_DACBFEN. */ #define BF_DAC_C1_DACBFEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DACBFEN) & BM_DAC_C1_DACBFEN) /*! @brief Set the DACBFEN field to a new value. */ -#define BW_DAC_C1_DACBFEN(x, v) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN) = (v)) +#define BW_DAC_C1_DACBFEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN), v)) /*@}*/ /*! @@ -648,7 +655,7 @@ #define BS_DAC_C1_DACBFMD (2U) /*!< Bit field size in bits for DAC_C1_DACBFMD. */ /*! @brief Read current value of the DAC_C1_DACBFMD field. */ -#define BR_DAC_C1_DACBFMD(x) (HW_DAC_C1(x).B.DACBFMD) +#define BR_DAC_C1_DACBFMD(x) (UNION_READ(hw_dac_c1_t, HW_DAC_C1_ADDR(x), U, B.DACBFMD)) /*! @brief Format value for bitfield DAC_C1_DACBFMD. */ #define BF_DAC_C1_DACBFMD(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DACBFMD) & BM_DAC_C1_DACBFMD) @@ -677,7 +684,7 @@ #define BS_DAC_C1_DACBFWM (2U) /*!< Bit field size in bits for DAC_C1_DACBFWM. */ /*! @brief Read current value of the DAC_C1_DACBFWM field. */ -#define BR_DAC_C1_DACBFWM(x) (HW_DAC_C1(x).B.DACBFWM) +#define BR_DAC_C1_DACBFWM(x) (UNION_READ(hw_dac_c1_t, HW_DAC_C1_ADDR(x), U, B.DACBFWM)) /*! @brief Format value for bitfield DAC_C1_DACBFWM. */ #define BF_DAC_C1_DACBFWM(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DACBFWM) & BM_DAC_C1_DACBFWM) @@ -701,13 +708,13 @@ #define BS_DAC_C1_DMAEN (1U) /*!< Bit field size in bits for DAC_C1_DMAEN. */ /*! @brief Read current value of the DAC_C1_DMAEN field. */ -#define BR_DAC_C1_DMAEN(x) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN)) +#define BR_DAC_C1_DMAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN))) /*! @brief Format value for bitfield DAC_C1_DMAEN. */ #define BF_DAC_C1_DMAEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DMAEN) & BM_DAC_C1_DMAEN) /*! @brief Set the DMAEN field to a new value. */ -#define BW_DAC_C1_DMAEN(x, v) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN) = (v)) +#define BW_DAC_C1_DMAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN), v)) /*@}*/ /******************************************************************************* @@ -736,8 +743,8 @@ #define HW_DAC_C2_ADDR(x) ((x) + 0x23U) #define HW_DAC_C2(x) (*(__IO hw_dac_c2_t *) HW_DAC_C2_ADDR(x)) -#define HW_DAC_C2_RD(x) (HW_DAC_C2(x).U) -#define HW_DAC_C2_WR(x, v) (HW_DAC_C2(x).U = (v)) +#define HW_DAC_C2_RD(x) (ADDRESS_READ(hw_dac_c2_t, HW_DAC_C2_ADDR(x))) +#define HW_DAC_C2_WR(x, v) (ADDRESS_WRITE(hw_dac_c2_t, HW_DAC_C2_ADDR(x), v)) #define HW_DAC_C2_SET(x, v) (HW_DAC_C2_WR(x, HW_DAC_C2_RD(x) | (v))) #define HW_DAC_C2_CLR(x, v) (HW_DAC_C2_WR(x, HW_DAC_C2_RD(x) & ~(v))) #define HW_DAC_C2_TOG(x, v) (HW_DAC_C2_WR(x, HW_DAC_C2_RD(x) ^ (v))) @@ -759,7 +766,7 @@ #define BS_DAC_C2_DACBFUP (4U) /*!< Bit field size in bits for DAC_C2_DACBFUP. */ /*! @brief Read current value of the DAC_C2_DACBFUP field. */ -#define BR_DAC_C2_DACBFUP(x) (HW_DAC_C2(x).B.DACBFUP) +#define BR_DAC_C2_DACBFUP(x) (UNION_READ(hw_dac_c2_t, HW_DAC_C2_ADDR(x), U, B.DACBFUP)) /*! @brief Format value for bitfield DAC_C2_DACBFUP. */ #define BF_DAC_C2_DACBFUP(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C2_DACBFUP) & BM_DAC_C2_DACBFUP) @@ -779,7 +786,7 @@ #define BS_DAC_C2_DACBFRP (4U) /*!< Bit field size in bits for DAC_C2_DACBFRP. */ /*! @brief Read current value of the DAC_C2_DACBFRP field. */ -#define BR_DAC_C2_DACBFRP(x) (HW_DAC_C2(x).B.DACBFRP) +#define BR_DAC_C2_DACBFRP(x) (UNION_READ(hw_dac_c2_t, HW_DAC_C2_ADDR(x), U, B.DACBFRP)) /*! @brief Format value for bitfield DAC_C2_DACBFRP. */ #define BF_DAC_C2_DACBFRP(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C2_DACBFRP) & BM_DAC_C2_DACBFRP)
--- a/hal/device/device/MK64F12/MK64F12_dma.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_dma.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -191,8 +198,8 @@ #define HW_DMA_CR_ADDR(x) ((x) + 0x0U) #define HW_DMA_CR(x) (*(__IO hw_dma_cr_t *) HW_DMA_CR_ADDR(x)) -#define HW_DMA_CR_RD(x) (HW_DMA_CR(x).U) -#define HW_DMA_CR_WR(x, v) (HW_DMA_CR(x).U = (v)) +#define HW_DMA_CR_RD(x) (ADDRESS_READ(hw_dma_cr_t, HW_DMA_CR_ADDR(x))) +#define HW_DMA_CR_WR(x, v) (ADDRESS_WRITE(hw_dma_cr_t, HW_DMA_CR_ADDR(x), v)) #define HW_DMA_CR_SET(x, v) (HW_DMA_CR_WR(x, HW_DMA_CR_RD(x) | (v))) #define HW_DMA_CR_CLR(x, v) (HW_DMA_CR_WR(x, HW_DMA_CR_RD(x) & ~(v))) #define HW_DMA_CR_TOG(x, v) (HW_DMA_CR_WR(x, HW_DMA_CR_RD(x) ^ (v))) @@ -217,13 +224,13 @@ #define BS_DMA_CR_EDBG (1U) /*!< Bit field size in bits for DMA_CR_EDBG. */ /*! @brief Read current value of the DMA_CR_EDBG field. */ -#define BR_DMA_CR_EDBG(x) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_EDBG)) +#define BR_DMA_CR_EDBG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_EDBG))) /*! @brief Format value for bitfield DMA_CR_EDBG. */ #define BF_DMA_CR_EDBG(v) ((uint32_t)((uint32_t)(v) << BP_DMA_CR_EDBG) & BM_DMA_CR_EDBG) /*! @brief Set the EDBG field to a new value. */ -#define BW_DMA_CR_EDBG(x, v) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_EDBG) = (v)) +#define BW_DMA_CR_EDBG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_EDBG), v)) /*@}*/ /*! @@ -239,13 +246,13 @@ #define BS_DMA_CR_ERCA (1U) /*!< Bit field size in bits for DMA_CR_ERCA. */ /*! @brief Read current value of the DMA_CR_ERCA field. */ -#define BR_DMA_CR_ERCA(x) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_ERCA)) +#define BR_DMA_CR_ERCA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_ERCA))) /*! @brief Format value for bitfield DMA_CR_ERCA. */ #define BF_DMA_CR_ERCA(v) ((uint32_t)((uint32_t)(v) << BP_DMA_CR_ERCA) & BM_DMA_CR_ERCA) /*! @brief Set the ERCA field to a new value. */ -#define BW_DMA_CR_ERCA(x, v) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_ERCA) = (v)) +#define BW_DMA_CR_ERCA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_ERCA), v)) /*@}*/ /*! @@ -262,13 +269,13 @@ #define BS_DMA_CR_HOE (1U) /*!< Bit field size in bits for DMA_CR_HOE. */ /*! @brief Read current value of the DMA_CR_HOE field. */ -#define BR_DMA_CR_HOE(x) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_HOE)) +#define BR_DMA_CR_HOE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_HOE))) /*! @brief Format value for bitfield DMA_CR_HOE. */ #define BF_DMA_CR_HOE(v) ((uint32_t)((uint32_t)(v) << BP_DMA_CR_HOE) & BM_DMA_CR_HOE) /*! @brief Set the HOE field to a new value. */ -#define BW_DMA_CR_HOE(x, v) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_HOE) = (v)) +#define BW_DMA_CR_HOE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_HOE), v)) /*@}*/ /*! @@ -285,13 +292,13 @@ #define BS_DMA_CR_HALT (1U) /*!< Bit field size in bits for DMA_CR_HALT. */ /*! @brief Read current value of the DMA_CR_HALT field. */ -#define BR_DMA_CR_HALT(x) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_HALT)) +#define BR_DMA_CR_HALT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_HALT))) /*! @brief Format value for bitfield DMA_CR_HALT. */ #define BF_DMA_CR_HALT(v) ((uint32_t)((uint32_t)(v) << BP_DMA_CR_HALT) & BM_DMA_CR_HALT) /*! @brief Set the HALT field to a new value. */ -#define BW_DMA_CR_HALT(x, v) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_HALT) = (v)) +#define BW_DMA_CR_HALT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_HALT), v)) /*@}*/ /*! @@ -312,13 +319,13 @@ #define BS_DMA_CR_CLM (1U) /*!< Bit field size in bits for DMA_CR_CLM. */ /*! @brief Read current value of the DMA_CR_CLM field. */ -#define BR_DMA_CR_CLM(x) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_CLM)) +#define BR_DMA_CR_CLM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_CLM))) /*! @brief Format value for bitfield DMA_CR_CLM. */ #define BF_DMA_CR_CLM(v) ((uint32_t)((uint32_t)(v) << BP_DMA_CR_CLM) & BM_DMA_CR_CLM) /*! @brief Set the CLM field to a new value. */ -#define BW_DMA_CR_CLM(x, v) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_CLM) = (v)) +#define BW_DMA_CR_CLM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_CLM), v)) /*@}*/ /*! @@ -338,13 +345,13 @@ #define BS_DMA_CR_EMLM (1U) /*!< Bit field size in bits for DMA_CR_EMLM. */ /*! @brief Read current value of the DMA_CR_EMLM field. */ -#define BR_DMA_CR_EMLM(x) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_EMLM)) +#define BR_DMA_CR_EMLM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_EMLM))) /*! @brief Format value for bitfield DMA_CR_EMLM. */ #define BF_DMA_CR_EMLM(v) ((uint32_t)((uint32_t)(v) << BP_DMA_CR_EMLM) & BM_DMA_CR_EMLM) /*! @brief Set the EMLM field to a new value. */ -#define BW_DMA_CR_EMLM(x, v) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_EMLM) = (v)) +#define BW_DMA_CR_EMLM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_EMLM), v)) /*@}*/ /*! @@ -366,13 +373,13 @@ #define BS_DMA_CR_ECX (1U) /*!< Bit field size in bits for DMA_CR_ECX. */ /*! @brief Read current value of the DMA_CR_ECX field. */ -#define BR_DMA_CR_ECX(x) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_ECX)) +#define BR_DMA_CR_ECX(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_ECX))) /*! @brief Format value for bitfield DMA_CR_ECX. */ #define BF_DMA_CR_ECX(v) ((uint32_t)((uint32_t)(v) << BP_DMA_CR_ECX) & BM_DMA_CR_ECX) /*! @brief Set the ECX field to a new value. */ -#define BW_DMA_CR_ECX(x, v) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_ECX) = (v)) +#define BW_DMA_CR_ECX(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_ECX), v)) /*@}*/ /*! @@ -392,13 +399,13 @@ #define BS_DMA_CR_CX (1U) /*!< Bit field size in bits for DMA_CR_CX. */ /*! @brief Read current value of the DMA_CR_CX field. */ -#define BR_DMA_CR_CX(x) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_CX)) +#define BR_DMA_CR_CX(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_CX))) /*! @brief Format value for bitfield DMA_CR_CX. */ #define BF_DMA_CR_CX(v) ((uint32_t)((uint32_t)(v) << BP_DMA_CR_CX) & BM_DMA_CR_CX) /*! @brief Set the CX field to a new value. */ -#define BW_DMA_CR_CX(x, v) (BITBAND_ACCESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_CX) = (v)) +#define BW_DMA_CR_CX(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_CR_ADDR(x), BP_DMA_CR_CX), v)) /*@}*/ /******************************************************************************* @@ -447,7 +454,7 @@ #define HW_DMA_ES_ADDR(x) ((x) + 0x4U) #define HW_DMA_ES(x) (*(__I hw_dma_es_t *) HW_DMA_ES_ADDR(x)) -#define HW_DMA_ES_RD(x) (HW_DMA_ES(x).U) +#define HW_DMA_ES_RD(x) (ADDRESS_READ(hw_dma_es_t, HW_DMA_ES_ADDR(x))) /*@}*/ /* @@ -467,7 +474,7 @@ #define BS_DMA_ES_DBE (1U) /*!< Bit field size in bits for DMA_ES_DBE. */ /*! @brief Read current value of the DMA_ES_DBE field. */ -#define BR_DMA_ES_DBE(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_DBE)) +#define BR_DMA_ES_DBE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_DBE))) /*@}*/ /*! @@ -483,7 +490,7 @@ #define BS_DMA_ES_SBE (1U) /*!< Bit field size in bits for DMA_ES_SBE. */ /*! @brief Read current value of the DMA_ES_SBE field. */ -#define BR_DMA_ES_SBE(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_SBE)) +#define BR_DMA_ES_SBE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_SBE))) /*@}*/ /*! @@ -502,7 +509,7 @@ #define BS_DMA_ES_SGE (1U) /*!< Bit field size in bits for DMA_ES_SGE. */ /*! @brief Read current value of the DMA_ES_SGE field. */ -#define BR_DMA_ES_SGE(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_SGE)) +#define BR_DMA_ES_SGE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_SGE))) /*@}*/ /*! @@ -521,7 +528,7 @@ #define BS_DMA_ES_NCE (1U) /*!< Bit field size in bits for DMA_ES_NCE. */ /*! @brief Read current value of the DMA_ES_NCE field. */ -#define BR_DMA_ES_NCE(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_NCE)) +#define BR_DMA_ES_NCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_NCE))) /*@}*/ /*! @@ -538,7 +545,7 @@ #define BS_DMA_ES_DOE (1U) /*!< Bit field size in bits for DMA_ES_DOE. */ /*! @brief Read current value of the DMA_ES_DOE field. */ -#define BR_DMA_ES_DOE(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_DOE)) +#define BR_DMA_ES_DOE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_DOE))) /*@}*/ /*! @@ -555,7 +562,7 @@ #define BS_DMA_ES_DAE (1U) /*!< Bit field size in bits for DMA_ES_DAE. */ /*! @brief Read current value of the DMA_ES_DAE field. */ -#define BR_DMA_ES_DAE(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_DAE)) +#define BR_DMA_ES_DAE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_DAE))) /*@}*/ /*! @@ -572,7 +579,7 @@ #define BS_DMA_ES_SOE (1U) /*!< Bit field size in bits for DMA_ES_SOE. */ /*! @brief Read current value of the DMA_ES_SOE field. */ -#define BR_DMA_ES_SOE(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_SOE)) +#define BR_DMA_ES_SOE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_SOE))) /*@}*/ /*! @@ -589,7 +596,7 @@ #define BS_DMA_ES_SAE (1U) /*!< Bit field size in bits for DMA_ES_SAE. */ /*! @brief Read current value of the DMA_ES_SAE field. */ -#define BR_DMA_ES_SAE(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_SAE)) +#define BR_DMA_ES_SAE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_SAE))) /*@}*/ /*! @@ -604,7 +611,7 @@ #define BS_DMA_ES_ERRCHN (4U) /*!< Bit field size in bits for DMA_ES_ERRCHN. */ /*! @brief Read current value of the DMA_ES_ERRCHN field. */ -#define BR_DMA_ES_ERRCHN(x) (HW_DMA_ES(x).B.ERRCHN) +#define BR_DMA_ES_ERRCHN(x) (UNION_READ(hw_dma_es_t, HW_DMA_ES_ADDR(x), U, B.ERRCHN)) /*@}*/ /*! @@ -621,7 +628,7 @@ #define BS_DMA_ES_CPE (1U) /*!< Bit field size in bits for DMA_ES_CPE. */ /*! @brief Read current value of the DMA_ES_CPE field. */ -#define BR_DMA_ES_CPE(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_CPE)) +#define BR_DMA_ES_CPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_CPE))) /*@}*/ /*! @@ -638,7 +645,7 @@ #define BS_DMA_ES_ECX (1U) /*!< Bit field size in bits for DMA_ES_ECX. */ /*! @brief Read current value of the DMA_ES_ECX field. */ -#define BR_DMA_ES_ECX(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_ECX)) +#define BR_DMA_ES_ECX(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_ECX))) /*@}*/ /*! @@ -657,7 +664,7 @@ #define BS_DMA_ES_VLD (1U) /*!< Bit field size in bits for DMA_ES_VLD. */ /*! @brief Read current value of the DMA_ES_VLD field. */ -#define BR_DMA_ES_VLD(x) (BITBAND_ACCESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_VLD)) +#define BR_DMA_ES_VLD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ES_ADDR(x), BP_DMA_ES_VLD))) /*@}*/ /******************************************************************************* @@ -711,8 +718,8 @@ #define HW_DMA_ERQ_ADDR(x) ((x) + 0xCU) #define HW_DMA_ERQ(x) (*(__IO hw_dma_erq_t *) HW_DMA_ERQ_ADDR(x)) -#define HW_DMA_ERQ_RD(x) (HW_DMA_ERQ(x).U) -#define HW_DMA_ERQ_WR(x, v) (HW_DMA_ERQ(x).U = (v)) +#define HW_DMA_ERQ_RD(x) (ADDRESS_READ(hw_dma_erq_t, HW_DMA_ERQ_ADDR(x))) +#define HW_DMA_ERQ_WR(x, v) (ADDRESS_WRITE(hw_dma_erq_t, HW_DMA_ERQ_ADDR(x), v)) #define HW_DMA_ERQ_SET(x, v) (HW_DMA_ERQ_WR(x, HW_DMA_ERQ_RD(x) | (v))) #define HW_DMA_ERQ_CLR(x, v) (HW_DMA_ERQ_WR(x, HW_DMA_ERQ_RD(x) & ~(v))) #define HW_DMA_ERQ_TOG(x, v) (HW_DMA_ERQ_WR(x, HW_DMA_ERQ_RD(x) ^ (v))) @@ -735,13 +742,13 @@ #define BS_DMA_ERQ_ERQ0 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ0. */ /*! @brief Read current value of the DMA_ERQ_ERQ0 field. */ -#define BR_DMA_ERQ_ERQ0(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ0)) +#define BR_DMA_ERQ_ERQ0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ0))) /*! @brief Format value for bitfield DMA_ERQ_ERQ0. */ #define BF_DMA_ERQ_ERQ0(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ0) & BM_DMA_ERQ_ERQ0) /*! @brief Set the ERQ0 field to a new value. */ -#define BW_DMA_ERQ_ERQ0(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ0) = (v)) +#define BW_DMA_ERQ_ERQ0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ0), v)) /*@}*/ /*! @@ -757,13 +764,13 @@ #define BS_DMA_ERQ_ERQ1 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ1. */ /*! @brief Read current value of the DMA_ERQ_ERQ1 field. */ -#define BR_DMA_ERQ_ERQ1(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ1)) +#define BR_DMA_ERQ_ERQ1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ1))) /*! @brief Format value for bitfield DMA_ERQ_ERQ1. */ #define BF_DMA_ERQ_ERQ1(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ1) & BM_DMA_ERQ_ERQ1) /*! @brief Set the ERQ1 field to a new value. */ -#define BW_DMA_ERQ_ERQ1(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ1) = (v)) +#define BW_DMA_ERQ_ERQ1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ1), v)) /*@}*/ /*! @@ -779,13 +786,13 @@ #define BS_DMA_ERQ_ERQ2 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ2. */ /*! @brief Read current value of the DMA_ERQ_ERQ2 field. */ -#define BR_DMA_ERQ_ERQ2(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ2)) +#define BR_DMA_ERQ_ERQ2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ2))) /*! @brief Format value for bitfield DMA_ERQ_ERQ2. */ #define BF_DMA_ERQ_ERQ2(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ2) & BM_DMA_ERQ_ERQ2) /*! @brief Set the ERQ2 field to a new value. */ -#define BW_DMA_ERQ_ERQ2(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ2) = (v)) +#define BW_DMA_ERQ_ERQ2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ2), v)) /*@}*/ /*! @@ -801,13 +808,13 @@ #define BS_DMA_ERQ_ERQ3 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ3. */ /*! @brief Read current value of the DMA_ERQ_ERQ3 field. */ -#define BR_DMA_ERQ_ERQ3(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ3)) +#define BR_DMA_ERQ_ERQ3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ3))) /*! @brief Format value for bitfield DMA_ERQ_ERQ3. */ #define BF_DMA_ERQ_ERQ3(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ3) & BM_DMA_ERQ_ERQ3) /*! @brief Set the ERQ3 field to a new value. */ -#define BW_DMA_ERQ_ERQ3(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ3) = (v)) +#define BW_DMA_ERQ_ERQ3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ3), v)) /*@}*/ /*! @@ -823,13 +830,13 @@ #define BS_DMA_ERQ_ERQ4 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ4. */ /*! @brief Read current value of the DMA_ERQ_ERQ4 field. */ -#define BR_DMA_ERQ_ERQ4(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ4)) +#define BR_DMA_ERQ_ERQ4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ4))) /*! @brief Format value for bitfield DMA_ERQ_ERQ4. */ #define BF_DMA_ERQ_ERQ4(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ4) & BM_DMA_ERQ_ERQ4) /*! @brief Set the ERQ4 field to a new value. */ -#define BW_DMA_ERQ_ERQ4(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ4) = (v)) +#define BW_DMA_ERQ_ERQ4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ4), v)) /*@}*/ /*! @@ -845,13 +852,13 @@ #define BS_DMA_ERQ_ERQ5 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ5. */ /*! @brief Read current value of the DMA_ERQ_ERQ5 field. */ -#define BR_DMA_ERQ_ERQ5(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ5)) +#define BR_DMA_ERQ_ERQ5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ5))) /*! @brief Format value for bitfield DMA_ERQ_ERQ5. */ #define BF_DMA_ERQ_ERQ5(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ5) & BM_DMA_ERQ_ERQ5) /*! @brief Set the ERQ5 field to a new value. */ -#define BW_DMA_ERQ_ERQ5(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ5) = (v)) +#define BW_DMA_ERQ_ERQ5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ5), v)) /*@}*/ /*! @@ -867,13 +874,13 @@ #define BS_DMA_ERQ_ERQ6 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ6. */ /*! @brief Read current value of the DMA_ERQ_ERQ6 field. */ -#define BR_DMA_ERQ_ERQ6(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ6)) +#define BR_DMA_ERQ_ERQ6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ6))) /*! @brief Format value for bitfield DMA_ERQ_ERQ6. */ #define BF_DMA_ERQ_ERQ6(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ6) & BM_DMA_ERQ_ERQ6) /*! @brief Set the ERQ6 field to a new value. */ -#define BW_DMA_ERQ_ERQ6(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ6) = (v)) +#define BW_DMA_ERQ_ERQ6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ6), v)) /*@}*/ /*! @@ -889,13 +896,13 @@ #define BS_DMA_ERQ_ERQ7 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ7. */ /*! @brief Read current value of the DMA_ERQ_ERQ7 field. */ -#define BR_DMA_ERQ_ERQ7(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ7)) +#define BR_DMA_ERQ_ERQ7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ7))) /*! @brief Format value for bitfield DMA_ERQ_ERQ7. */ #define BF_DMA_ERQ_ERQ7(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ7) & BM_DMA_ERQ_ERQ7) /*! @brief Set the ERQ7 field to a new value. */ -#define BW_DMA_ERQ_ERQ7(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ7) = (v)) +#define BW_DMA_ERQ_ERQ7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ7), v)) /*@}*/ /*! @@ -911,13 +918,13 @@ #define BS_DMA_ERQ_ERQ8 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ8. */ /*! @brief Read current value of the DMA_ERQ_ERQ8 field. */ -#define BR_DMA_ERQ_ERQ8(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ8)) +#define BR_DMA_ERQ_ERQ8(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ8))) /*! @brief Format value for bitfield DMA_ERQ_ERQ8. */ #define BF_DMA_ERQ_ERQ8(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ8) & BM_DMA_ERQ_ERQ8) /*! @brief Set the ERQ8 field to a new value. */ -#define BW_DMA_ERQ_ERQ8(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ8) = (v)) +#define BW_DMA_ERQ_ERQ8(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ8), v)) /*@}*/ /*! @@ -933,13 +940,13 @@ #define BS_DMA_ERQ_ERQ9 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ9. */ /*! @brief Read current value of the DMA_ERQ_ERQ9 field. */ -#define BR_DMA_ERQ_ERQ9(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ9)) +#define BR_DMA_ERQ_ERQ9(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ9))) /*! @brief Format value for bitfield DMA_ERQ_ERQ9. */ #define BF_DMA_ERQ_ERQ9(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ9) & BM_DMA_ERQ_ERQ9) /*! @brief Set the ERQ9 field to a new value. */ -#define BW_DMA_ERQ_ERQ9(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ9) = (v)) +#define BW_DMA_ERQ_ERQ9(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ9), v)) /*@}*/ /*! @@ -955,13 +962,13 @@ #define BS_DMA_ERQ_ERQ10 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ10. */ /*! @brief Read current value of the DMA_ERQ_ERQ10 field. */ -#define BR_DMA_ERQ_ERQ10(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ10)) +#define BR_DMA_ERQ_ERQ10(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ10))) /*! @brief Format value for bitfield DMA_ERQ_ERQ10. */ #define BF_DMA_ERQ_ERQ10(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ10) & BM_DMA_ERQ_ERQ10) /*! @brief Set the ERQ10 field to a new value. */ -#define BW_DMA_ERQ_ERQ10(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ10) = (v)) +#define BW_DMA_ERQ_ERQ10(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ10), v)) /*@}*/ /*! @@ -977,13 +984,13 @@ #define BS_DMA_ERQ_ERQ11 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ11. */ /*! @brief Read current value of the DMA_ERQ_ERQ11 field. */ -#define BR_DMA_ERQ_ERQ11(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ11)) +#define BR_DMA_ERQ_ERQ11(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ11))) /*! @brief Format value for bitfield DMA_ERQ_ERQ11. */ #define BF_DMA_ERQ_ERQ11(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ11) & BM_DMA_ERQ_ERQ11) /*! @brief Set the ERQ11 field to a new value. */ -#define BW_DMA_ERQ_ERQ11(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ11) = (v)) +#define BW_DMA_ERQ_ERQ11(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ11), v)) /*@}*/ /*! @@ -999,13 +1006,13 @@ #define BS_DMA_ERQ_ERQ12 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ12. */ /*! @brief Read current value of the DMA_ERQ_ERQ12 field. */ -#define BR_DMA_ERQ_ERQ12(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ12)) +#define BR_DMA_ERQ_ERQ12(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ12))) /*! @brief Format value for bitfield DMA_ERQ_ERQ12. */ #define BF_DMA_ERQ_ERQ12(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ12) & BM_DMA_ERQ_ERQ12) /*! @brief Set the ERQ12 field to a new value. */ -#define BW_DMA_ERQ_ERQ12(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ12) = (v)) +#define BW_DMA_ERQ_ERQ12(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ12), v)) /*@}*/ /*! @@ -1021,13 +1028,13 @@ #define BS_DMA_ERQ_ERQ13 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ13. */ /*! @brief Read current value of the DMA_ERQ_ERQ13 field. */ -#define BR_DMA_ERQ_ERQ13(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ13)) +#define BR_DMA_ERQ_ERQ13(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ13))) /*! @brief Format value for bitfield DMA_ERQ_ERQ13. */ #define BF_DMA_ERQ_ERQ13(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ13) & BM_DMA_ERQ_ERQ13) /*! @brief Set the ERQ13 field to a new value. */ -#define BW_DMA_ERQ_ERQ13(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ13) = (v)) +#define BW_DMA_ERQ_ERQ13(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ13), v)) /*@}*/ /*! @@ -1043,13 +1050,13 @@ #define BS_DMA_ERQ_ERQ14 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ14. */ /*! @brief Read current value of the DMA_ERQ_ERQ14 field. */ -#define BR_DMA_ERQ_ERQ14(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ14)) +#define BR_DMA_ERQ_ERQ14(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ14))) /*! @brief Format value for bitfield DMA_ERQ_ERQ14. */ #define BF_DMA_ERQ_ERQ14(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ14) & BM_DMA_ERQ_ERQ14) /*! @brief Set the ERQ14 field to a new value. */ -#define BW_DMA_ERQ_ERQ14(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ14) = (v)) +#define BW_DMA_ERQ_ERQ14(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ14), v)) /*@}*/ /*! @@ -1065,13 +1072,13 @@ #define BS_DMA_ERQ_ERQ15 (1U) /*!< Bit field size in bits for DMA_ERQ_ERQ15. */ /*! @brief Read current value of the DMA_ERQ_ERQ15 field. */ -#define BR_DMA_ERQ_ERQ15(x) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ15)) +#define BR_DMA_ERQ_ERQ15(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ15))) /*! @brief Format value for bitfield DMA_ERQ_ERQ15. */ #define BF_DMA_ERQ_ERQ15(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERQ_ERQ15) & BM_DMA_ERQ_ERQ15) /*! @brief Set the ERQ15 field to a new value. */ -#define BW_DMA_ERQ_ERQ15(x, v) (BITBAND_ACCESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ15) = (v)) +#define BW_DMA_ERQ_ERQ15(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERQ_ADDR(x), BP_DMA_ERQ_ERQ15), v)) /*@}*/ /******************************************************************************* @@ -1124,8 +1131,8 @@ #define HW_DMA_EEI_ADDR(x) ((x) + 0x14U) #define HW_DMA_EEI(x) (*(__IO hw_dma_eei_t *) HW_DMA_EEI_ADDR(x)) -#define HW_DMA_EEI_RD(x) (HW_DMA_EEI(x).U) -#define HW_DMA_EEI_WR(x, v) (HW_DMA_EEI(x).U = (v)) +#define HW_DMA_EEI_RD(x) (ADDRESS_READ(hw_dma_eei_t, HW_DMA_EEI_ADDR(x))) +#define HW_DMA_EEI_WR(x, v) (ADDRESS_WRITE(hw_dma_eei_t, HW_DMA_EEI_ADDR(x), v)) #define HW_DMA_EEI_SET(x, v) (HW_DMA_EEI_WR(x, HW_DMA_EEI_RD(x) | (v))) #define HW_DMA_EEI_CLR(x, v) (HW_DMA_EEI_WR(x, HW_DMA_EEI_RD(x) & ~(v))) #define HW_DMA_EEI_TOG(x, v) (HW_DMA_EEI_WR(x, HW_DMA_EEI_RD(x) ^ (v))) @@ -1150,13 +1157,13 @@ #define BS_DMA_EEI_EEI0 (1U) /*!< Bit field size in bits for DMA_EEI_EEI0. */ /*! @brief Read current value of the DMA_EEI_EEI0 field. */ -#define BR_DMA_EEI_EEI0(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI0)) +#define BR_DMA_EEI_EEI0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI0))) /*! @brief Format value for bitfield DMA_EEI_EEI0. */ #define BF_DMA_EEI_EEI0(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI0) & BM_DMA_EEI_EEI0) /*! @brief Set the EEI0 field to a new value. */ -#define BW_DMA_EEI_EEI0(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI0) = (v)) +#define BW_DMA_EEI_EEI0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI0), v)) /*@}*/ /*! @@ -1174,13 +1181,13 @@ #define BS_DMA_EEI_EEI1 (1U) /*!< Bit field size in bits for DMA_EEI_EEI1. */ /*! @brief Read current value of the DMA_EEI_EEI1 field. */ -#define BR_DMA_EEI_EEI1(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI1)) +#define BR_DMA_EEI_EEI1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI1))) /*! @brief Format value for bitfield DMA_EEI_EEI1. */ #define BF_DMA_EEI_EEI1(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI1) & BM_DMA_EEI_EEI1) /*! @brief Set the EEI1 field to a new value. */ -#define BW_DMA_EEI_EEI1(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI1) = (v)) +#define BW_DMA_EEI_EEI1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI1), v)) /*@}*/ /*! @@ -1198,13 +1205,13 @@ #define BS_DMA_EEI_EEI2 (1U) /*!< Bit field size in bits for DMA_EEI_EEI2. */ /*! @brief Read current value of the DMA_EEI_EEI2 field. */ -#define BR_DMA_EEI_EEI2(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI2)) +#define BR_DMA_EEI_EEI2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI2))) /*! @brief Format value for bitfield DMA_EEI_EEI2. */ #define BF_DMA_EEI_EEI2(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI2) & BM_DMA_EEI_EEI2) /*! @brief Set the EEI2 field to a new value. */ -#define BW_DMA_EEI_EEI2(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI2) = (v)) +#define BW_DMA_EEI_EEI2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI2), v)) /*@}*/ /*! @@ -1222,13 +1229,13 @@ #define BS_DMA_EEI_EEI3 (1U) /*!< Bit field size in bits for DMA_EEI_EEI3. */ /*! @brief Read current value of the DMA_EEI_EEI3 field. */ -#define BR_DMA_EEI_EEI3(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI3)) +#define BR_DMA_EEI_EEI3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI3))) /*! @brief Format value for bitfield DMA_EEI_EEI3. */ #define BF_DMA_EEI_EEI3(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI3) & BM_DMA_EEI_EEI3) /*! @brief Set the EEI3 field to a new value. */ -#define BW_DMA_EEI_EEI3(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI3) = (v)) +#define BW_DMA_EEI_EEI3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI3), v)) /*@}*/ /*! @@ -1246,13 +1253,13 @@ #define BS_DMA_EEI_EEI4 (1U) /*!< Bit field size in bits for DMA_EEI_EEI4. */ /*! @brief Read current value of the DMA_EEI_EEI4 field. */ -#define BR_DMA_EEI_EEI4(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI4)) +#define BR_DMA_EEI_EEI4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI4))) /*! @brief Format value for bitfield DMA_EEI_EEI4. */ #define BF_DMA_EEI_EEI4(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI4) & BM_DMA_EEI_EEI4) /*! @brief Set the EEI4 field to a new value. */ -#define BW_DMA_EEI_EEI4(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI4) = (v)) +#define BW_DMA_EEI_EEI4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI4), v)) /*@}*/ /*! @@ -1270,13 +1277,13 @@ #define BS_DMA_EEI_EEI5 (1U) /*!< Bit field size in bits for DMA_EEI_EEI5. */ /*! @brief Read current value of the DMA_EEI_EEI5 field. */ -#define BR_DMA_EEI_EEI5(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI5)) +#define BR_DMA_EEI_EEI5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI5))) /*! @brief Format value for bitfield DMA_EEI_EEI5. */ #define BF_DMA_EEI_EEI5(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI5) & BM_DMA_EEI_EEI5) /*! @brief Set the EEI5 field to a new value. */ -#define BW_DMA_EEI_EEI5(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI5) = (v)) +#define BW_DMA_EEI_EEI5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI5), v)) /*@}*/ /*! @@ -1294,13 +1301,13 @@ #define BS_DMA_EEI_EEI6 (1U) /*!< Bit field size in bits for DMA_EEI_EEI6. */ /*! @brief Read current value of the DMA_EEI_EEI6 field. */ -#define BR_DMA_EEI_EEI6(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI6)) +#define BR_DMA_EEI_EEI6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI6))) /*! @brief Format value for bitfield DMA_EEI_EEI6. */ #define BF_DMA_EEI_EEI6(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI6) & BM_DMA_EEI_EEI6) /*! @brief Set the EEI6 field to a new value. */ -#define BW_DMA_EEI_EEI6(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI6) = (v)) +#define BW_DMA_EEI_EEI6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI6), v)) /*@}*/ /*! @@ -1318,13 +1325,13 @@ #define BS_DMA_EEI_EEI7 (1U) /*!< Bit field size in bits for DMA_EEI_EEI7. */ /*! @brief Read current value of the DMA_EEI_EEI7 field. */ -#define BR_DMA_EEI_EEI7(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI7)) +#define BR_DMA_EEI_EEI7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI7))) /*! @brief Format value for bitfield DMA_EEI_EEI7. */ #define BF_DMA_EEI_EEI7(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI7) & BM_DMA_EEI_EEI7) /*! @brief Set the EEI7 field to a new value. */ -#define BW_DMA_EEI_EEI7(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI7) = (v)) +#define BW_DMA_EEI_EEI7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI7), v)) /*@}*/ /*! @@ -1342,13 +1349,13 @@ #define BS_DMA_EEI_EEI8 (1U) /*!< Bit field size in bits for DMA_EEI_EEI8. */ /*! @brief Read current value of the DMA_EEI_EEI8 field. */ -#define BR_DMA_EEI_EEI8(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI8)) +#define BR_DMA_EEI_EEI8(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI8))) /*! @brief Format value for bitfield DMA_EEI_EEI8. */ #define BF_DMA_EEI_EEI8(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI8) & BM_DMA_EEI_EEI8) /*! @brief Set the EEI8 field to a new value. */ -#define BW_DMA_EEI_EEI8(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI8) = (v)) +#define BW_DMA_EEI_EEI8(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI8), v)) /*@}*/ /*! @@ -1366,13 +1373,13 @@ #define BS_DMA_EEI_EEI9 (1U) /*!< Bit field size in bits for DMA_EEI_EEI9. */ /*! @brief Read current value of the DMA_EEI_EEI9 field. */ -#define BR_DMA_EEI_EEI9(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI9)) +#define BR_DMA_EEI_EEI9(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI9))) /*! @brief Format value for bitfield DMA_EEI_EEI9. */ #define BF_DMA_EEI_EEI9(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI9) & BM_DMA_EEI_EEI9) /*! @brief Set the EEI9 field to a new value. */ -#define BW_DMA_EEI_EEI9(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI9) = (v)) +#define BW_DMA_EEI_EEI9(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI9), v)) /*@}*/ /*! @@ -1390,13 +1397,13 @@ #define BS_DMA_EEI_EEI10 (1U) /*!< Bit field size in bits for DMA_EEI_EEI10. */ /*! @brief Read current value of the DMA_EEI_EEI10 field. */ -#define BR_DMA_EEI_EEI10(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI10)) +#define BR_DMA_EEI_EEI10(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI10))) /*! @brief Format value for bitfield DMA_EEI_EEI10. */ #define BF_DMA_EEI_EEI10(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI10) & BM_DMA_EEI_EEI10) /*! @brief Set the EEI10 field to a new value. */ -#define BW_DMA_EEI_EEI10(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI10) = (v)) +#define BW_DMA_EEI_EEI10(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI10), v)) /*@}*/ /*! @@ -1414,13 +1421,13 @@ #define BS_DMA_EEI_EEI11 (1U) /*!< Bit field size in bits for DMA_EEI_EEI11. */ /*! @brief Read current value of the DMA_EEI_EEI11 field. */ -#define BR_DMA_EEI_EEI11(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI11)) +#define BR_DMA_EEI_EEI11(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI11))) /*! @brief Format value for bitfield DMA_EEI_EEI11. */ #define BF_DMA_EEI_EEI11(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI11) & BM_DMA_EEI_EEI11) /*! @brief Set the EEI11 field to a new value. */ -#define BW_DMA_EEI_EEI11(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI11) = (v)) +#define BW_DMA_EEI_EEI11(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI11), v)) /*@}*/ /*! @@ -1438,13 +1445,13 @@ #define BS_DMA_EEI_EEI12 (1U) /*!< Bit field size in bits for DMA_EEI_EEI12. */ /*! @brief Read current value of the DMA_EEI_EEI12 field. */ -#define BR_DMA_EEI_EEI12(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI12)) +#define BR_DMA_EEI_EEI12(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI12))) /*! @brief Format value for bitfield DMA_EEI_EEI12. */ #define BF_DMA_EEI_EEI12(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI12) & BM_DMA_EEI_EEI12) /*! @brief Set the EEI12 field to a new value. */ -#define BW_DMA_EEI_EEI12(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI12) = (v)) +#define BW_DMA_EEI_EEI12(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI12), v)) /*@}*/ /*! @@ -1462,13 +1469,13 @@ #define BS_DMA_EEI_EEI13 (1U) /*!< Bit field size in bits for DMA_EEI_EEI13. */ /*! @brief Read current value of the DMA_EEI_EEI13 field. */ -#define BR_DMA_EEI_EEI13(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI13)) +#define BR_DMA_EEI_EEI13(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI13))) /*! @brief Format value for bitfield DMA_EEI_EEI13. */ #define BF_DMA_EEI_EEI13(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI13) & BM_DMA_EEI_EEI13) /*! @brief Set the EEI13 field to a new value. */ -#define BW_DMA_EEI_EEI13(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI13) = (v)) +#define BW_DMA_EEI_EEI13(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI13), v)) /*@}*/ /*! @@ -1486,13 +1493,13 @@ #define BS_DMA_EEI_EEI14 (1U) /*!< Bit field size in bits for DMA_EEI_EEI14. */ /*! @brief Read current value of the DMA_EEI_EEI14 field. */ -#define BR_DMA_EEI_EEI14(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI14)) +#define BR_DMA_EEI_EEI14(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI14))) /*! @brief Format value for bitfield DMA_EEI_EEI14. */ #define BF_DMA_EEI_EEI14(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI14) & BM_DMA_EEI_EEI14) /*! @brief Set the EEI14 field to a new value. */ -#define BW_DMA_EEI_EEI14(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI14) = (v)) +#define BW_DMA_EEI_EEI14(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI14), v)) /*@}*/ /*! @@ -1510,13 +1517,13 @@ #define BS_DMA_EEI_EEI15 (1U) /*!< Bit field size in bits for DMA_EEI_EEI15. */ /*! @brief Read current value of the DMA_EEI_EEI15 field. */ -#define BR_DMA_EEI_EEI15(x) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI15)) +#define BR_DMA_EEI_EEI15(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI15))) /*! @brief Format value for bitfield DMA_EEI_EEI15. */ #define BF_DMA_EEI_EEI15(v) ((uint32_t)((uint32_t)(v) << BP_DMA_EEI_EEI15) & BM_DMA_EEI_EEI15) /*! @brief Set the EEI15 field to a new value. */ -#define BW_DMA_EEI_EEI15(x, v) (BITBAND_ACCESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI15) = (v)) +#define BW_DMA_EEI_EEI15(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_EEI_ADDR(x), BP_DMA_EEI_EEI15), v)) /*@}*/ /******************************************************************************* @@ -1555,8 +1562,8 @@ #define HW_DMA_CEEI_ADDR(x) ((x) + 0x18U) #define HW_DMA_CEEI(x) (*(__O hw_dma_ceei_t *) HW_DMA_CEEI_ADDR(x)) -#define HW_DMA_CEEI_RD(x) (HW_DMA_CEEI(x).U) -#define HW_DMA_CEEI_WR(x, v) (HW_DMA_CEEI(x).U = (v)) +#define HW_DMA_CEEI_RD(x) (ADDRESS_READ(hw_dma_ceei_t, HW_DMA_CEEI_ADDR(x))) +#define HW_DMA_CEEI_WR(x, v) (ADDRESS_WRITE(hw_dma_ceei_t, HW_DMA_CEEI_ADDR(x), v)) /*@}*/ /* @@ -1596,7 +1603,7 @@ #define BF_DMA_CEEI_CAEE(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CEEI_CAEE) & BM_DMA_CEEI_CAEE) /*! @brief Set the CAEE field to a new value. */ -#define BW_DMA_CEEI_CAEE(x, v) (BITBAND_ACCESS8(HW_DMA_CEEI_ADDR(x), BP_DMA_CEEI_CAEE) = (v)) +#define BW_DMA_CEEI_CAEE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CEEI_ADDR(x), BP_DMA_CEEI_CAEE), v)) /*@}*/ /*! @@ -1615,7 +1622,7 @@ #define BF_DMA_CEEI_NOP(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CEEI_NOP) & BM_DMA_CEEI_NOP) /*! @brief Set the NOP field to a new value. */ -#define BW_DMA_CEEI_NOP(x, v) (BITBAND_ACCESS8(HW_DMA_CEEI_ADDR(x), BP_DMA_CEEI_NOP) = (v)) +#define BW_DMA_CEEI_NOP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CEEI_ADDR(x), BP_DMA_CEEI_NOP), v)) /*@}*/ /******************************************************************************* @@ -1654,8 +1661,8 @@ #define HW_DMA_SEEI_ADDR(x) ((x) + 0x19U) #define HW_DMA_SEEI(x) (*(__O hw_dma_seei_t *) HW_DMA_SEEI_ADDR(x)) -#define HW_DMA_SEEI_RD(x) (HW_DMA_SEEI(x).U) -#define HW_DMA_SEEI_WR(x, v) (HW_DMA_SEEI(x).U = (v)) +#define HW_DMA_SEEI_RD(x) (ADDRESS_READ(hw_dma_seei_t, HW_DMA_SEEI_ADDR(x))) +#define HW_DMA_SEEI_WR(x, v) (ADDRESS_WRITE(hw_dma_seei_t, HW_DMA_SEEI_ADDR(x), v)) /*@}*/ /* @@ -1695,7 +1702,7 @@ #define BF_DMA_SEEI_SAEE(v) ((uint8_t)((uint8_t)(v) << BP_DMA_SEEI_SAEE) & BM_DMA_SEEI_SAEE) /*! @brief Set the SAEE field to a new value. */ -#define BW_DMA_SEEI_SAEE(x, v) (BITBAND_ACCESS8(HW_DMA_SEEI_ADDR(x), BP_DMA_SEEI_SAEE) = (v)) +#define BW_DMA_SEEI_SAEE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_SEEI_ADDR(x), BP_DMA_SEEI_SAEE), v)) /*@}*/ /*! @@ -1714,7 +1721,7 @@ #define BF_DMA_SEEI_NOP(v) ((uint8_t)((uint8_t)(v) << BP_DMA_SEEI_NOP) & BM_DMA_SEEI_NOP) /*! @brief Set the NOP field to a new value. */ -#define BW_DMA_SEEI_NOP(x, v) (BITBAND_ACCESS8(HW_DMA_SEEI_ADDR(x), BP_DMA_SEEI_NOP) = (v)) +#define BW_DMA_SEEI_NOP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_SEEI_ADDR(x), BP_DMA_SEEI_NOP), v)) /*@}*/ /******************************************************************************* @@ -1753,8 +1760,8 @@ #define HW_DMA_CERQ_ADDR(x) ((x) + 0x1AU) #define HW_DMA_CERQ(x) (*(__O hw_dma_cerq_t *) HW_DMA_CERQ_ADDR(x)) -#define HW_DMA_CERQ_RD(x) (HW_DMA_CERQ(x).U) -#define HW_DMA_CERQ_WR(x, v) (HW_DMA_CERQ(x).U = (v)) +#define HW_DMA_CERQ_RD(x) (ADDRESS_READ(hw_dma_cerq_t, HW_DMA_CERQ_ADDR(x))) +#define HW_DMA_CERQ_WR(x, v) (ADDRESS_WRITE(hw_dma_cerq_t, HW_DMA_CERQ_ADDR(x), v)) /*@}*/ /* @@ -1794,7 +1801,7 @@ #define BF_DMA_CERQ_CAER(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CERQ_CAER) & BM_DMA_CERQ_CAER) /*! @brief Set the CAER field to a new value. */ -#define BW_DMA_CERQ_CAER(x, v) (BITBAND_ACCESS8(HW_DMA_CERQ_ADDR(x), BP_DMA_CERQ_CAER) = (v)) +#define BW_DMA_CERQ_CAER(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CERQ_ADDR(x), BP_DMA_CERQ_CAER), v)) /*@}*/ /*! @@ -1813,7 +1820,7 @@ #define BF_DMA_CERQ_NOP(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CERQ_NOP) & BM_DMA_CERQ_NOP) /*! @brief Set the NOP field to a new value. */ -#define BW_DMA_CERQ_NOP(x, v) (BITBAND_ACCESS8(HW_DMA_CERQ_ADDR(x), BP_DMA_CERQ_NOP) = (v)) +#define BW_DMA_CERQ_NOP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CERQ_ADDR(x), BP_DMA_CERQ_NOP), v)) /*@}*/ /******************************************************************************* @@ -1851,8 +1858,8 @@ #define HW_DMA_SERQ_ADDR(x) ((x) + 0x1BU) #define HW_DMA_SERQ(x) (*(__O hw_dma_serq_t *) HW_DMA_SERQ_ADDR(x)) -#define HW_DMA_SERQ_RD(x) (HW_DMA_SERQ(x).U) -#define HW_DMA_SERQ_WR(x, v) (HW_DMA_SERQ(x).U = (v)) +#define HW_DMA_SERQ_RD(x) (ADDRESS_READ(hw_dma_serq_t, HW_DMA_SERQ_ADDR(x))) +#define HW_DMA_SERQ_WR(x, v) (ADDRESS_WRITE(hw_dma_serq_t, HW_DMA_SERQ_ADDR(x), v)) /*@}*/ /* @@ -1892,7 +1899,7 @@ #define BF_DMA_SERQ_SAER(v) ((uint8_t)((uint8_t)(v) << BP_DMA_SERQ_SAER) & BM_DMA_SERQ_SAER) /*! @brief Set the SAER field to a new value. */ -#define BW_DMA_SERQ_SAER(x, v) (BITBAND_ACCESS8(HW_DMA_SERQ_ADDR(x), BP_DMA_SERQ_SAER) = (v)) +#define BW_DMA_SERQ_SAER(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_SERQ_ADDR(x), BP_DMA_SERQ_SAER), v)) /*@}*/ /*! @@ -1911,7 +1918,7 @@ #define BF_DMA_SERQ_NOP(v) ((uint8_t)((uint8_t)(v) << BP_DMA_SERQ_NOP) & BM_DMA_SERQ_NOP) /*! @brief Set the NOP field to a new value. */ -#define BW_DMA_SERQ_NOP(x, v) (BITBAND_ACCESS8(HW_DMA_SERQ_ADDR(x), BP_DMA_SERQ_NOP) = (v)) +#define BW_DMA_SERQ_NOP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_SERQ_ADDR(x), BP_DMA_SERQ_NOP), v)) /*@}*/ /******************************************************************************* @@ -1950,8 +1957,8 @@ #define HW_DMA_CDNE_ADDR(x) ((x) + 0x1CU) #define HW_DMA_CDNE(x) (*(__O hw_dma_cdne_t *) HW_DMA_CDNE_ADDR(x)) -#define HW_DMA_CDNE_RD(x) (HW_DMA_CDNE(x).U) -#define HW_DMA_CDNE_WR(x, v) (HW_DMA_CDNE(x).U = (v)) +#define HW_DMA_CDNE_RD(x) (ADDRESS_READ(hw_dma_cdne_t, HW_DMA_CDNE_ADDR(x))) +#define HW_DMA_CDNE_WR(x, v) (ADDRESS_WRITE(hw_dma_cdne_t, HW_DMA_CDNE_ADDR(x), v)) /*@}*/ /* @@ -1991,7 +1998,7 @@ #define BF_DMA_CDNE_CADN(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CDNE_CADN) & BM_DMA_CDNE_CADN) /*! @brief Set the CADN field to a new value. */ -#define BW_DMA_CDNE_CADN(x, v) (BITBAND_ACCESS8(HW_DMA_CDNE_ADDR(x), BP_DMA_CDNE_CADN) = (v)) +#define BW_DMA_CDNE_CADN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CDNE_ADDR(x), BP_DMA_CDNE_CADN), v)) /*@}*/ /*! @@ -2010,7 +2017,7 @@ #define BF_DMA_CDNE_NOP(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CDNE_NOP) & BM_DMA_CDNE_NOP) /*! @brief Set the NOP field to a new value. */ -#define BW_DMA_CDNE_NOP(x, v) (BITBAND_ACCESS8(HW_DMA_CDNE_ADDR(x), BP_DMA_CDNE_NOP) = (v)) +#define BW_DMA_CDNE_NOP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CDNE_ADDR(x), BP_DMA_CDNE_NOP), v)) /*@}*/ /******************************************************************************* @@ -2049,8 +2056,8 @@ #define HW_DMA_SSRT_ADDR(x) ((x) + 0x1DU) #define HW_DMA_SSRT(x) (*(__O hw_dma_ssrt_t *) HW_DMA_SSRT_ADDR(x)) -#define HW_DMA_SSRT_RD(x) (HW_DMA_SSRT(x).U) -#define HW_DMA_SSRT_WR(x, v) (HW_DMA_SSRT(x).U = (v)) +#define HW_DMA_SSRT_RD(x) (ADDRESS_READ(hw_dma_ssrt_t, HW_DMA_SSRT_ADDR(x))) +#define HW_DMA_SSRT_WR(x, v) (ADDRESS_WRITE(hw_dma_ssrt_t, HW_DMA_SSRT_ADDR(x), v)) /*@}*/ /* @@ -2090,7 +2097,7 @@ #define BF_DMA_SSRT_SAST(v) ((uint8_t)((uint8_t)(v) << BP_DMA_SSRT_SAST) & BM_DMA_SSRT_SAST) /*! @brief Set the SAST field to a new value. */ -#define BW_DMA_SSRT_SAST(x, v) (BITBAND_ACCESS8(HW_DMA_SSRT_ADDR(x), BP_DMA_SSRT_SAST) = (v)) +#define BW_DMA_SSRT_SAST(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_SSRT_ADDR(x), BP_DMA_SSRT_SAST), v)) /*@}*/ /*! @@ -2109,7 +2116,7 @@ #define BF_DMA_SSRT_NOP(v) ((uint8_t)((uint8_t)(v) << BP_DMA_SSRT_NOP) & BM_DMA_SSRT_NOP) /*! @brief Set the NOP field to a new value. */ -#define BW_DMA_SSRT_NOP(x, v) (BITBAND_ACCESS8(HW_DMA_SSRT_ADDR(x), BP_DMA_SSRT_NOP) = (v)) +#define BW_DMA_SSRT_NOP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_SSRT_ADDR(x), BP_DMA_SSRT_NOP), v)) /*@}*/ /******************************************************************************* @@ -2148,8 +2155,8 @@ #define HW_DMA_CERR_ADDR(x) ((x) + 0x1EU) #define HW_DMA_CERR(x) (*(__O hw_dma_cerr_t *) HW_DMA_CERR_ADDR(x)) -#define HW_DMA_CERR_RD(x) (HW_DMA_CERR(x).U) -#define HW_DMA_CERR_WR(x, v) (HW_DMA_CERR(x).U = (v)) +#define HW_DMA_CERR_RD(x) (ADDRESS_READ(hw_dma_cerr_t, HW_DMA_CERR_ADDR(x))) +#define HW_DMA_CERR_WR(x, v) (ADDRESS_WRITE(hw_dma_cerr_t, HW_DMA_CERR_ADDR(x), v)) /*@}*/ /* @@ -2189,7 +2196,7 @@ #define BF_DMA_CERR_CAEI(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CERR_CAEI) & BM_DMA_CERR_CAEI) /*! @brief Set the CAEI field to a new value. */ -#define BW_DMA_CERR_CAEI(x, v) (BITBAND_ACCESS8(HW_DMA_CERR_ADDR(x), BP_DMA_CERR_CAEI) = (v)) +#define BW_DMA_CERR_CAEI(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CERR_ADDR(x), BP_DMA_CERR_CAEI), v)) /*@}*/ /*! @@ -2208,7 +2215,7 @@ #define BF_DMA_CERR_NOP(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CERR_NOP) & BM_DMA_CERR_NOP) /*! @brief Set the NOP field to a new value. */ -#define BW_DMA_CERR_NOP(x, v) (BITBAND_ACCESS8(HW_DMA_CERR_ADDR(x), BP_DMA_CERR_NOP) = (v)) +#define BW_DMA_CERR_NOP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CERR_ADDR(x), BP_DMA_CERR_NOP), v)) /*@}*/ /******************************************************************************* @@ -2247,8 +2254,8 @@ #define HW_DMA_CINT_ADDR(x) ((x) + 0x1FU) #define HW_DMA_CINT(x) (*(__O hw_dma_cint_t *) HW_DMA_CINT_ADDR(x)) -#define HW_DMA_CINT_RD(x) (HW_DMA_CINT(x).U) -#define HW_DMA_CINT_WR(x, v) (HW_DMA_CINT(x).U = (v)) +#define HW_DMA_CINT_RD(x) (ADDRESS_READ(hw_dma_cint_t, HW_DMA_CINT_ADDR(x))) +#define HW_DMA_CINT_WR(x, v) (ADDRESS_WRITE(hw_dma_cint_t, HW_DMA_CINT_ADDR(x), v)) /*@}*/ /* @@ -2288,7 +2295,7 @@ #define BF_DMA_CINT_CAIR(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CINT_CAIR) & BM_DMA_CINT_CAIR) /*! @brief Set the CAIR field to a new value. */ -#define BW_DMA_CINT_CAIR(x, v) (BITBAND_ACCESS8(HW_DMA_CINT_ADDR(x), BP_DMA_CINT_CAIR) = (v)) +#define BW_DMA_CINT_CAIR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CINT_ADDR(x), BP_DMA_CINT_CAIR), v)) /*@}*/ /*! @@ -2307,7 +2314,7 @@ #define BF_DMA_CINT_NOP(v) ((uint8_t)((uint8_t)(v) << BP_DMA_CINT_NOP) & BM_DMA_CINT_NOP) /*! @brief Set the NOP field to a new value. */ -#define BW_DMA_CINT_NOP(x, v) (BITBAND_ACCESS8(HW_DMA_CINT_ADDR(x), BP_DMA_CINT_NOP) = (v)) +#define BW_DMA_CINT_NOP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_CINT_ADDR(x), BP_DMA_CINT_NOP), v)) /*@}*/ /******************************************************************************* @@ -2367,8 +2374,8 @@ #define HW_DMA_INT_ADDR(x) ((x) + 0x24U) #define HW_DMA_INT(x) (*(__IO hw_dma_int_t *) HW_DMA_INT_ADDR(x)) -#define HW_DMA_INT_RD(x) (HW_DMA_INT(x).U) -#define HW_DMA_INT_WR(x, v) (HW_DMA_INT(x).U = (v)) +#define HW_DMA_INT_RD(x) (ADDRESS_READ(hw_dma_int_t, HW_DMA_INT_ADDR(x))) +#define HW_DMA_INT_WR(x, v) (ADDRESS_WRITE(hw_dma_int_t, HW_DMA_INT_ADDR(x), v)) #define HW_DMA_INT_SET(x, v) (HW_DMA_INT_WR(x, HW_DMA_INT_RD(x) | (v))) #define HW_DMA_INT_CLR(x, v) (HW_DMA_INT_WR(x, HW_DMA_INT_RD(x) & ~(v))) #define HW_DMA_INT_TOG(x, v) (HW_DMA_INT_WR(x, HW_DMA_INT_RD(x) ^ (v))) @@ -2391,13 +2398,13 @@ #define BS_DMA_INT_INT0 (1U) /*!< Bit field size in bits for DMA_INT_INT0. */ /*! @brief Read current value of the DMA_INT_INT0 field. */ -#define BR_DMA_INT_INT0(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT0)) +#define BR_DMA_INT_INT0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT0))) /*! @brief Format value for bitfield DMA_INT_INT0. */ #define BF_DMA_INT_INT0(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT0) & BM_DMA_INT_INT0) /*! @brief Set the INT0 field to a new value. */ -#define BW_DMA_INT_INT0(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT0) = (v)) +#define BW_DMA_INT_INT0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT0), v)) /*@}*/ /*! @@ -2413,13 +2420,13 @@ #define BS_DMA_INT_INT1 (1U) /*!< Bit field size in bits for DMA_INT_INT1. */ /*! @brief Read current value of the DMA_INT_INT1 field. */ -#define BR_DMA_INT_INT1(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT1)) +#define BR_DMA_INT_INT1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT1))) /*! @brief Format value for bitfield DMA_INT_INT1. */ #define BF_DMA_INT_INT1(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT1) & BM_DMA_INT_INT1) /*! @brief Set the INT1 field to a new value. */ -#define BW_DMA_INT_INT1(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT1) = (v)) +#define BW_DMA_INT_INT1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT1), v)) /*@}*/ /*! @@ -2435,13 +2442,13 @@ #define BS_DMA_INT_INT2 (1U) /*!< Bit field size in bits for DMA_INT_INT2. */ /*! @brief Read current value of the DMA_INT_INT2 field. */ -#define BR_DMA_INT_INT2(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT2)) +#define BR_DMA_INT_INT2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT2))) /*! @brief Format value for bitfield DMA_INT_INT2. */ #define BF_DMA_INT_INT2(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT2) & BM_DMA_INT_INT2) /*! @brief Set the INT2 field to a new value. */ -#define BW_DMA_INT_INT2(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT2) = (v)) +#define BW_DMA_INT_INT2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT2), v)) /*@}*/ /*! @@ -2457,13 +2464,13 @@ #define BS_DMA_INT_INT3 (1U) /*!< Bit field size in bits for DMA_INT_INT3. */ /*! @brief Read current value of the DMA_INT_INT3 field. */ -#define BR_DMA_INT_INT3(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT3)) +#define BR_DMA_INT_INT3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT3))) /*! @brief Format value for bitfield DMA_INT_INT3. */ #define BF_DMA_INT_INT3(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT3) & BM_DMA_INT_INT3) /*! @brief Set the INT3 field to a new value. */ -#define BW_DMA_INT_INT3(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT3) = (v)) +#define BW_DMA_INT_INT3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT3), v)) /*@}*/ /*! @@ -2479,13 +2486,13 @@ #define BS_DMA_INT_INT4 (1U) /*!< Bit field size in bits for DMA_INT_INT4. */ /*! @brief Read current value of the DMA_INT_INT4 field. */ -#define BR_DMA_INT_INT4(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT4)) +#define BR_DMA_INT_INT4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT4))) /*! @brief Format value for bitfield DMA_INT_INT4. */ #define BF_DMA_INT_INT4(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT4) & BM_DMA_INT_INT4) /*! @brief Set the INT4 field to a new value. */ -#define BW_DMA_INT_INT4(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT4) = (v)) +#define BW_DMA_INT_INT4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT4), v)) /*@}*/ /*! @@ -2501,13 +2508,13 @@ #define BS_DMA_INT_INT5 (1U) /*!< Bit field size in bits for DMA_INT_INT5. */ /*! @brief Read current value of the DMA_INT_INT5 field. */ -#define BR_DMA_INT_INT5(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT5)) +#define BR_DMA_INT_INT5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT5))) /*! @brief Format value for bitfield DMA_INT_INT5. */ #define BF_DMA_INT_INT5(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT5) & BM_DMA_INT_INT5) /*! @brief Set the INT5 field to a new value. */ -#define BW_DMA_INT_INT5(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT5) = (v)) +#define BW_DMA_INT_INT5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT5), v)) /*@}*/ /*! @@ -2523,13 +2530,13 @@ #define BS_DMA_INT_INT6 (1U) /*!< Bit field size in bits for DMA_INT_INT6. */ /*! @brief Read current value of the DMA_INT_INT6 field. */ -#define BR_DMA_INT_INT6(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT6)) +#define BR_DMA_INT_INT6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT6))) /*! @brief Format value for bitfield DMA_INT_INT6. */ #define BF_DMA_INT_INT6(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT6) & BM_DMA_INT_INT6) /*! @brief Set the INT6 field to a new value. */ -#define BW_DMA_INT_INT6(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT6) = (v)) +#define BW_DMA_INT_INT6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT6), v)) /*@}*/ /*! @@ -2545,13 +2552,13 @@ #define BS_DMA_INT_INT7 (1U) /*!< Bit field size in bits for DMA_INT_INT7. */ /*! @brief Read current value of the DMA_INT_INT7 field. */ -#define BR_DMA_INT_INT7(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT7)) +#define BR_DMA_INT_INT7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT7))) /*! @brief Format value for bitfield DMA_INT_INT7. */ #define BF_DMA_INT_INT7(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT7) & BM_DMA_INT_INT7) /*! @brief Set the INT7 field to a new value. */ -#define BW_DMA_INT_INT7(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT7) = (v)) +#define BW_DMA_INT_INT7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT7), v)) /*@}*/ /*! @@ -2567,13 +2574,13 @@ #define BS_DMA_INT_INT8 (1U) /*!< Bit field size in bits for DMA_INT_INT8. */ /*! @brief Read current value of the DMA_INT_INT8 field. */ -#define BR_DMA_INT_INT8(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT8)) +#define BR_DMA_INT_INT8(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT8))) /*! @brief Format value for bitfield DMA_INT_INT8. */ #define BF_DMA_INT_INT8(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT8) & BM_DMA_INT_INT8) /*! @brief Set the INT8 field to a new value. */ -#define BW_DMA_INT_INT8(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT8) = (v)) +#define BW_DMA_INT_INT8(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT8), v)) /*@}*/ /*! @@ -2589,13 +2596,13 @@ #define BS_DMA_INT_INT9 (1U) /*!< Bit field size in bits for DMA_INT_INT9. */ /*! @brief Read current value of the DMA_INT_INT9 field. */ -#define BR_DMA_INT_INT9(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT9)) +#define BR_DMA_INT_INT9(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT9))) /*! @brief Format value for bitfield DMA_INT_INT9. */ #define BF_DMA_INT_INT9(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT9) & BM_DMA_INT_INT9) /*! @brief Set the INT9 field to a new value. */ -#define BW_DMA_INT_INT9(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT9) = (v)) +#define BW_DMA_INT_INT9(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT9), v)) /*@}*/ /*! @@ -2611,13 +2618,13 @@ #define BS_DMA_INT_INT10 (1U) /*!< Bit field size in bits for DMA_INT_INT10. */ /*! @brief Read current value of the DMA_INT_INT10 field. */ -#define BR_DMA_INT_INT10(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT10)) +#define BR_DMA_INT_INT10(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT10))) /*! @brief Format value for bitfield DMA_INT_INT10. */ #define BF_DMA_INT_INT10(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT10) & BM_DMA_INT_INT10) /*! @brief Set the INT10 field to a new value. */ -#define BW_DMA_INT_INT10(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT10) = (v)) +#define BW_DMA_INT_INT10(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT10), v)) /*@}*/ /*! @@ -2633,13 +2640,13 @@ #define BS_DMA_INT_INT11 (1U) /*!< Bit field size in bits for DMA_INT_INT11. */ /*! @brief Read current value of the DMA_INT_INT11 field. */ -#define BR_DMA_INT_INT11(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT11)) +#define BR_DMA_INT_INT11(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT11))) /*! @brief Format value for bitfield DMA_INT_INT11. */ #define BF_DMA_INT_INT11(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT11) & BM_DMA_INT_INT11) /*! @brief Set the INT11 field to a new value. */ -#define BW_DMA_INT_INT11(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT11) = (v)) +#define BW_DMA_INT_INT11(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT11), v)) /*@}*/ /*! @@ -2655,13 +2662,13 @@ #define BS_DMA_INT_INT12 (1U) /*!< Bit field size in bits for DMA_INT_INT12. */ /*! @brief Read current value of the DMA_INT_INT12 field. */ -#define BR_DMA_INT_INT12(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT12)) +#define BR_DMA_INT_INT12(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT12))) /*! @brief Format value for bitfield DMA_INT_INT12. */ #define BF_DMA_INT_INT12(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT12) & BM_DMA_INT_INT12) /*! @brief Set the INT12 field to a new value. */ -#define BW_DMA_INT_INT12(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT12) = (v)) +#define BW_DMA_INT_INT12(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT12), v)) /*@}*/ /*! @@ -2677,13 +2684,13 @@ #define BS_DMA_INT_INT13 (1U) /*!< Bit field size in bits for DMA_INT_INT13. */ /*! @brief Read current value of the DMA_INT_INT13 field. */ -#define BR_DMA_INT_INT13(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT13)) +#define BR_DMA_INT_INT13(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT13))) /*! @brief Format value for bitfield DMA_INT_INT13. */ #define BF_DMA_INT_INT13(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT13) & BM_DMA_INT_INT13) /*! @brief Set the INT13 field to a new value. */ -#define BW_DMA_INT_INT13(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT13) = (v)) +#define BW_DMA_INT_INT13(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT13), v)) /*@}*/ /*! @@ -2699,13 +2706,13 @@ #define BS_DMA_INT_INT14 (1U) /*!< Bit field size in bits for DMA_INT_INT14. */ /*! @brief Read current value of the DMA_INT_INT14 field. */ -#define BR_DMA_INT_INT14(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT14)) +#define BR_DMA_INT_INT14(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT14))) /*! @brief Format value for bitfield DMA_INT_INT14. */ #define BF_DMA_INT_INT14(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT14) & BM_DMA_INT_INT14) /*! @brief Set the INT14 field to a new value. */ -#define BW_DMA_INT_INT14(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT14) = (v)) +#define BW_DMA_INT_INT14(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT14), v)) /*@}*/ /*! @@ -2721,13 +2728,13 @@ #define BS_DMA_INT_INT15 (1U) /*!< Bit field size in bits for DMA_INT_INT15. */ /*! @brief Read current value of the DMA_INT_INT15 field. */ -#define BR_DMA_INT_INT15(x) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT15)) +#define BR_DMA_INT_INT15(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT15))) /*! @brief Format value for bitfield DMA_INT_INT15. */ #define BF_DMA_INT_INT15(v) ((uint32_t)((uint32_t)(v) << BP_DMA_INT_INT15) & BM_DMA_INT_INT15) /*! @brief Set the INT15 field to a new value. */ -#define BW_DMA_INT_INT15(x, v) (BITBAND_ACCESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT15) = (v)) +#define BW_DMA_INT_INT15(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_INT_ADDR(x), BP_DMA_INT_INT15), v)) /*@}*/ /******************************************************************************* @@ -2790,8 +2797,8 @@ #define HW_DMA_ERR_ADDR(x) ((x) + 0x2CU) #define HW_DMA_ERR(x) (*(__IO hw_dma_err_t *) HW_DMA_ERR_ADDR(x)) -#define HW_DMA_ERR_RD(x) (HW_DMA_ERR(x).U) -#define HW_DMA_ERR_WR(x, v) (HW_DMA_ERR(x).U = (v)) +#define HW_DMA_ERR_RD(x) (ADDRESS_READ(hw_dma_err_t, HW_DMA_ERR_ADDR(x))) +#define HW_DMA_ERR_WR(x, v) (ADDRESS_WRITE(hw_dma_err_t, HW_DMA_ERR_ADDR(x), v)) #define HW_DMA_ERR_SET(x, v) (HW_DMA_ERR_WR(x, HW_DMA_ERR_RD(x) | (v))) #define HW_DMA_ERR_CLR(x, v) (HW_DMA_ERR_WR(x, HW_DMA_ERR_RD(x) & ~(v))) #define HW_DMA_ERR_TOG(x, v) (HW_DMA_ERR_WR(x, HW_DMA_ERR_RD(x) ^ (v))) @@ -2814,13 +2821,13 @@ #define BS_DMA_ERR_ERR0 (1U) /*!< Bit field size in bits for DMA_ERR_ERR0. */ /*! @brief Read current value of the DMA_ERR_ERR0 field. */ -#define BR_DMA_ERR_ERR0(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR0)) +#define BR_DMA_ERR_ERR0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR0))) /*! @brief Format value for bitfield DMA_ERR_ERR0. */ #define BF_DMA_ERR_ERR0(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR0) & BM_DMA_ERR_ERR0) /*! @brief Set the ERR0 field to a new value. */ -#define BW_DMA_ERR_ERR0(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR0) = (v)) +#define BW_DMA_ERR_ERR0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR0), v)) /*@}*/ /*! @@ -2836,13 +2843,13 @@ #define BS_DMA_ERR_ERR1 (1U) /*!< Bit field size in bits for DMA_ERR_ERR1. */ /*! @brief Read current value of the DMA_ERR_ERR1 field. */ -#define BR_DMA_ERR_ERR1(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR1)) +#define BR_DMA_ERR_ERR1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR1))) /*! @brief Format value for bitfield DMA_ERR_ERR1. */ #define BF_DMA_ERR_ERR1(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR1) & BM_DMA_ERR_ERR1) /*! @brief Set the ERR1 field to a new value. */ -#define BW_DMA_ERR_ERR1(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR1) = (v)) +#define BW_DMA_ERR_ERR1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR1), v)) /*@}*/ /*! @@ -2858,13 +2865,13 @@ #define BS_DMA_ERR_ERR2 (1U) /*!< Bit field size in bits for DMA_ERR_ERR2. */ /*! @brief Read current value of the DMA_ERR_ERR2 field. */ -#define BR_DMA_ERR_ERR2(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR2)) +#define BR_DMA_ERR_ERR2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR2))) /*! @brief Format value for bitfield DMA_ERR_ERR2. */ #define BF_DMA_ERR_ERR2(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR2) & BM_DMA_ERR_ERR2) /*! @brief Set the ERR2 field to a new value. */ -#define BW_DMA_ERR_ERR2(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR2) = (v)) +#define BW_DMA_ERR_ERR2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR2), v)) /*@}*/ /*! @@ -2880,13 +2887,13 @@ #define BS_DMA_ERR_ERR3 (1U) /*!< Bit field size in bits for DMA_ERR_ERR3. */ /*! @brief Read current value of the DMA_ERR_ERR3 field. */ -#define BR_DMA_ERR_ERR3(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR3)) +#define BR_DMA_ERR_ERR3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR3))) /*! @brief Format value for bitfield DMA_ERR_ERR3. */ #define BF_DMA_ERR_ERR3(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR3) & BM_DMA_ERR_ERR3) /*! @brief Set the ERR3 field to a new value. */ -#define BW_DMA_ERR_ERR3(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR3) = (v)) +#define BW_DMA_ERR_ERR3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR3), v)) /*@}*/ /*! @@ -2902,13 +2909,13 @@ #define BS_DMA_ERR_ERR4 (1U) /*!< Bit field size in bits for DMA_ERR_ERR4. */ /*! @brief Read current value of the DMA_ERR_ERR4 field. */ -#define BR_DMA_ERR_ERR4(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR4)) +#define BR_DMA_ERR_ERR4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR4))) /*! @brief Format value for bitfield DMA_ERR_ERR4. */ #define BF_DMA_ERR_ERR4(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR4) & BM_DMA_ERR_ERR4) /*! @brief Set the ERR4 field to a new value. */ -#define BW_DMA_ERR_ERR4(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR4) = (v)) +#define BW_DMA_ERR_ERR4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR4), v)) /*@}*/ /*! @@ -2924,13 +2931,13 @@ #define BS_DMA_ERR_ERR5 (1U) /*!< Bit field size in bits for DMA_ERR_ERR5. */ /*! @brief Read current value of the DMA_ERR_ERR5 field. */ -#define BR_DMA_ERR_ERR5(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR5)) +#define BR_DMA_ERR_ERR5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR5))) /*! @brief Format value for bitfield DMA_ERR_ERR5. */ #define BF_DMA_ERR_ERR5(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR5) & BM_DMA_ERR_ERR5) /*! @brief Set the ERR5 field to a new value. */ -#define BW_DMA_ERR_ERR5(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR5) = (v)) +#define BW_DMA_ERR_ERR5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR5), v)) /*@}*/ /*! @@ -2946,13 +2953,13 @@ #define BS_DMA_ERR_ERR6 (1U) /*!< Bit field size in bits for DMA_ERR_ERR6. */ /*! @brief Read current value of the DMA_ERR_ERR6 field. */ -#define BR_DMA_ERR_ERR6(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR6)) +#define BR_DMA_ERR_ERR6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR6))) /*! @brief Format value for bitfield DMA_ERR_ERR6. */ #define BF_DMA_ERR_ERR6(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR6) & BM_DMA_ERR_ERR6) /*! @brief Set the ERR6 field to a new value. */ -#define BW_DMA_ERR_ERR6(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR6) = (v)) +#define BW_DMA_ERR_ERR6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR6), v)) /*@}*/ /*! @@ -2968,13 +2975,13 @@ #define BS_DMA_ERR_ERR7 (1U) /*!< Bit field size in bits for DMA_ERR_ERR7. */ /*! @brief Read current value of the DMA_ERR_ERR7 field. */ -#define BR_DMA_ERR_ERR7(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR7)) +#define BR_DMA_ERR_ERR7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR7))) /*! @brief Format value for bitfield DMA_ERR_ERR7. */ #define BF_DMA_ERR_ERR7(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR7) & BM_DMA_ERR_ERR7) /*! @brief Set the ERR7 field to a new value. */ -#define BW_DMA_ERR_ERR7(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR7) = (v)) +#define BW_DMA_ERR_ERR7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR7), v)) /*@}*/ /*! @@ -2990,13 +2997,13 @@ #define BS_DMA_ERR_ERR8 (1U) /*!< Bit field size in bits for DMA_ERR_ERR8. */ /*! @brief Read current value of the DMA_ERR_ERR8 field. */ -#define BR_DMA_ERR_ERR8(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR8)) +#define BR_DMA_ERR_ERR8(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR8))) /*! @brief Format value for bitfield DMA_ERR_ERR8. */ #define BF_DMA_ERR_ERR8(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR8) & BM_DMA_ERR_ERR8) /*! @brief Set the ERR8 field to a new value. */ -#define BW_DMA_ERR_ERR8(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR8) = (v)) +#define BW_DMA_ERR_ERR8(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR8), v)) /*@}*/ /*! @@ -3012,13 +3019,13 @@ #define BS_DMA_ERR_ERR9 (1U) /*!< Bit field size in bits for DMA_ERR_ERR9. */ /*! @brief Read current value of the DMA_ERR_ERR9 field. */ -#define BR_DMA_ERR_ERR9(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR9)) +#define BR_DMA_ERR_ERR9(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR9))) /*! @brief Format value for bitfield DMA_ERR_ERR9. */ #define BF_DMA_ERR_ERR9(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR9) & BM_DMA_ERR_ERR9) /*! @brief Set the ERR9 field to a new value. */ -#define BW_DMA_ERR_ERR9(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR9) = (v)) +#define BW_DMA_ERR_ERR9(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR9), v)) /*@}*/ /*! @@ -3034,13 +3041,13 @@ #define BS_DMA_ERR_ERR10 (1U) /*!< Bit field size in bits for DMA_ERR_ERR10. */ /*! @brief Read current value of the DMA_ERR_ERR10 field. */ -#define BR_DMA_ERR_ERR10(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR10)) +#define BR_DMA_ERR_ERR10(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR10))) /*! @brief Format value for bitfield DMA_ERR_ERR10. */ #define BF_DMA_ERR_ERR10(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR10) & BM_DMA_ERR_ERR10) /*! @brief Set the ERR10 field to a new value. */ -#define BW_DMA_ERR_ERR10(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR10) = (v)) +#define BW_DMA_ERR_ERR10(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR10), v)) /*@}*/ /*! @@ -3056,13 +3063,13 @@ #define BS_DMA_ERR_ERR11 (1U) /*!< Bit field size in bits for DMA_ERR_ERR11. */ /*! @brief Read current value of the DMA_ERR_ERR11 field. */ -#define BR_DMA_ERR_ERR11(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR11)) +#define BR_DMA_ERR_ERR11(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR11))) /*! @brief Format value for bitfield DMA_ERR_ERR11. */ #define BF_DMA_ERR_ERR11(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR11) & BM_DMA_ERR_ERR11) /*! @brief Set the ERR11 field to a new value. */ -#define BW_DMA_ERR_ERR11(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR11) = (v)) +#define BW_DMA_ERR_ERR11(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR11), v)) /*@}*/ /*! @@ -3078,13 +3085,13 @@ #define BS_DMA_ERR_ERR12 (1U) /*!< Bit field size in bits for DMA_ERR_ERR12. */ /*! @brief Read current value of the DMA_ERR_ERR12 field. */ -#define BR_DMA_ERR_ERR12(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR12)) +#define BR_DMA_ERR_ERR12(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR12))) /*! @brief Format value for bitfield DMA_ERR_ERR12. */ #define BF_DMA_ERR_ERR12(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR12) & BM_DMA_ERR_ERR12) /*! @brief Set the ERR12 field to a new value. */ -#define BW_DMA_ERR_ERR12(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR12) = (v)) +#define BW_DMA_ERR_ERR12(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR12), v)) /*@}*/ /*! @@ -3100,13 +3107,13 @@ #define BS_DMA_ERR_ERR13 (1U) /*!< Bit field size in bits for DMA_ERR_ERR13. */ /*! @brief Read current value of the DMA_ERR_ERR13 field. */ -#define BR_DMA_ERR_ERR13(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR13)) +#define BR_DMA_ERR_ERR13(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR13))) /*! @brief Format value for bitfield DMA_ERR_ERR13. */ #define BF_DMA_ERR_ERR13(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR13) & BM_DMA_ERR_ERR13) /*! @brief Set the ERR13 field to a new value. */ -#define BW_DMA_ERR_ERR13(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR13) = (v)) +#define BW_DMA_ERR_ERR13(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR13), v)) /*@}*/ /*! @@ -3122,13 +3129,13 @@ #define BS_DMA_ERR_ERR14 (1U) /*!< Bit field size in bits for DMA_ERR_ERR14. */ /*! @brief Read current value of the DMA_ERR_ERR14 field. */ -#define BR_DMA_ERR_ERR14(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR14)) +#define BR_DMA_ERR_ERR14(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR14))) /*! @brief Format value for bitfield DMA_ERR_ERR14. */ #define BF_DMA_ERR_ERR14(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR14) & BM_DMA_ERR_ERR14) /*! @brief Set the ERR14 field to a new value. */ -#define BW_DMA_ERR_ERR14(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR14) = (v)) +#define BW_DMA_ERR_ERR14(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR14), v)) /*@}*/ /*! @@ -3144,13 +3151,13 @@ #define BS_DMA_ERR_ERR15 (1U) /*!< Bit field size in bits for DMA_ERR_ERR15. */ /*! @brief Read current value of the DMA_ERR_ERR15 field. */ -#define BR_DMA_ERR_ERR15(x) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR15)) +#define BR_DMA_ERR_ERR15(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR15))) /*! @brief Format value for bitfield DMA_ERR_ERR15. */ #define BF_DMA_ERR_ERR15(v) ((uint32_t)((uint32_t)(v) << BP_DMA_ERR_ERR15) & BM_DMA_ERR_ERR15) /*! @brief Set the ERR15 field to a new value. */ -#define BW_DMA_ERR_ERR15(x, v) (BITBAND_ACCESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR15) = (v)) +#define BW_DMA_ERR_ERR15(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_ERR_ADDR(x), BP_DMA_ERR_ERR15), v)) /*@}*/ /******************************************************************************* @@ -3202,7 +3209,7 @@ #define HW_DMA_HRS_ADDR(x) ((x) + 0x34U) #define HW_DMA_HRS(x) (*(__I hw_dma_hrs_t *) HW_DMA_HRS_ADDR(x)) -#define HW_DMA_HRS_RD(x) (HW_DMA_HRS(x).U) +#define HW_DMA_HRS_RD(x) (ADDRESS_READ(hw_dma_hrs_t, HW_DMA_HRS_ADDR(x))) /*@}*/ /* @@ -3226,7 +3233,7 @@ #define BS_DMA_HRS_HRS0 (1U) /*!< Bit field size in bits for DMA_HRS_HRS0. */ /*! @brief Read current value of the DMA_HRS_HRS0 field. */ -#define BR_DMA_HRS_HRS0(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS0)) +#define BR_DMA_HRS_HRS0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS0))) /*@}*/ /*! @@ -3246,7 +3253,7 @@ #define BS_DMA_HRS_HRS1 (1U) /*!< Bit field size in bits for DMA_HRS_HRS1. */ /*! @brief Read current value of the DMA_HRS_HRS1 field. */ -#define BR_DMA_HRS_HRS1(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS1)) +#define BR_DMA_HRS_HRS1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS1))) /*@}*/ /*! @@ -3266,7 +3273,7 @@ #define BS_DMA_HRS_HRS2 (1U) /*!< Bit field size in bits for DMA_HRS_HRS2. */ /*! @brief Read current value of the DMA_HRS_HRS2 field. */ -#define BR_DMA_HRS_HRS2(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS2)) +#define BR_DMA_HRS_HRS2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS2))) /*@}*/ /*! @@ -3286,7 +3293,7 @@ #define BS_DMA_HRS_HRS3 (1U) /*!< Bit field size in bits for DMA_HRS_HRS3. */ /*! @brief Read current value of the DMA_HRS_HRS3 field. */ -#define BR_DMA_HRS_HRS3(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS3)) +#define BR_DMA_HRS_HRS3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS3))) /*@}*/ /*! @@ -3306,7 +3313,7 @@ #define BS_DMA_HRS_HRS4 (1U) /*!< Bit field size in bits for DMA_HRS_HRS4. */ /*! @brief Read current value of the DMA_HRS_HRS4 field. */ -#define BR_DMA_HRS_HRS4(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS4)) +#define BR_DMA_HRS_HRS4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS4))) /*@}*/ /*! @@ -3326,7 +3333,7 @@ #define BS_DMA_HRS_HRS5 (1U) /*!< Bit field size in bits for DMA_HRS_HRS5. */ /*! @brief Read current value of the DMA_HRS_HRS5 field. */ -#define BR_DMA_HRS_HRS5(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS5)) +#define BR_DMA_HRS_HRS5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS5))) /*@}*/ /*! @@ -3346,7 +3353,7 @@ #define BS_DMA_HRS_HRS6 (1U) /*!< Bit field size in bits for DMA_HRS_HRS6. */ /*! @brief Read current value of the DMA_HRS_HRS6 field. */ -#define BR_DMA_HRS_HRS6(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS6)) +#define BR_DMA_HRS_HRS6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS6))) /*@}*/ /*! @@ -3366,7 +3373,7 @@ #define BS_DMA_HRS_HRS7 (1U) /*!< Bit field size in bits for DMA_HRS_HRS7. */ /*! @brief Read current value of the DMA_HRS_HRS7 field. */ -#define BR_DMA_HRS_HRS7(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS7)) +#define BR_DMA_HRS_HRS7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS7))) /*@}*/ /*! @@ -3386,7 +3393,7 @@ #define BS_DMA_HRS_HRS8 (1U) /*!< Bit field size in bits for DMA_HRS_HRS8. */ /*! @brief Read current value of the DMA_HRS_HRS8 field. */ -#define BR_DMA_HRS_HRS8(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS8)) +#define BR_DMA_HRS_HRS8(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS8))) /*@}*/ /*! @@ -3406,7 +3413,7 @@ #define BS_DMA_HRS_HRS9 (1U) /*!< Bit field size in bits for DMA_HRS_HRS9. */ /*! @brief Read current value of the DMA_HRS_HRS9 field. */ -#define BR_DMA_HRS_HRS9(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS9)) +#define BR_DMA_HRS_HRS9(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS9))) /*@}*/ /*! @@ -3426,7 +3433,7 @@ #define BS_DMA_HRS_HRS10 (1U) /*!< Bit field size in bits for DMA_HRS_HRS10. */ /*! @brief Read current value of the DMA_HRS_HRS10 field. */ -#define BR_DMA_HRS_HRS10(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS10)) +#define BR_DMA_HRS_HRS10(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS10))) /*@}*/ /*! @@ -3446,7 +3453,7 @@ #define BS_DMA_HRS_HRS11 (1U) /*!< Bit field size in bits for DMA_HRS_HRS11. */ /*! @brief Read current value of the DMA_HRS_HRS11 field. */ -#define BR_DMA_HRS_HRS11(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS11)) +#define BR_DMA_HRS_HRS11(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS11))) /*@}*/ /*! @@ -3466,7 +3473,7 @@ #define BS_DMA_HRS_HRS12 (1U) /*!< Bit field size in bits for DMA_HRS_HRS12. */ /*! @brief Read current value of the DMA_HRS_HRS12 field. */ -#define BR_DMA_HRS_HRS12(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS12)) +#define BR_DMA_HRS_HRS12(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS12))) /*@}*/ /*! @@ -3486,7 +3493,7 @@ #define BS_DMA_HRS_HRS13 (1U) /*!< Bit field size in bits for DMA_HRS_HRS13. */ /*! @brief Read current value of the DMA_HRS_HRS13 field. */ -#define BR_DMA_HRS_HRS13(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS13)) +#define BR_DMA_HRS_HRS13(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS13))) /*@}*/ /*! @@ -3506,7 +3513,7 @@ #define BS_DMA_HRS_HRS14 (1U) /*!< Bit field size in bits for DMA_HRS_HRS14. */ /*! @brief Read current value of the DMA_HRS_HRS14 field. */ -#define BR_DMA_HRS_HRS14(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS14)) +#define BR_DMA_HRS_HRS14(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS14))) /*@}*/ /*! @@ -3526,7 +3533,7 @@ #define BS_DMA_HRS_HRS15 (1U) /*!< Bit field size in bits for DMA_HRS_HRS15. */ /*! @brief Read current value of the DMA_HRS_HRS15 field. */ -#define BR_DMA_HRS_HRS15(x) (BITBAND_ACCESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS15)) +#define BR_DMA_HRS_HRS15(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_HRS_ADDR(x), BP_DMA_HRS_HRS15))) /*@}*/ /******************************************************************************* @@ -3570,8 +3577,8 @@ #define HW_DMA_DCHPRIn_CHANNEL(n) (((n) & ~0x03U) | (3 - ((n) & 0x03U))) #define HW_DMA_DCHPRIn(x, n) (*(__IO hw_dma_dchprin_t *) HW_DMA_DCHPRIn_ADDR(x, n)) -#define HW_DMA_DCHPRIn_RD(x, n) (HW_DMA_DCHPRIn(x, n).U) -#define HW_DMA_DCHPRIn_WR(x, n, v) (HW_DMA_DCHPRIn(x, n).U = (v)) +#define HW_DMA_DCHPRIn_RD(x, n) (ADDRESS_READ(hw_dma_dchprin_t, HW_DMA_DCHPRIn_ADDR(x, n))) +#define HW_DMA_DCHPRIn_WR(x, n, v) (ADDRESS_WRITE(hw_dma_dchprin_t, HW_DMA_DCHPRIn_ADDR(x, n), v)) #define HW_DMA_DCHPRIn_SET(x, n, v) (HW_DMA_DCHPRIn_WR(x, n, HW_DMA_DCHPRIn_RD(x, n) | (v))) #define HW_DMA_DCHPRIn_CLR(x, n, v) (HW_DMA_DCHPRIn_WR(x, n, HW_DMA_DCHPRIn_RD(x, n) & ~(v))) #define HW_DMA_DCHPRIn_TOG(x, n, v) (HW_DMA_DCHPRIn_WR(x, n, HW_DMA_DCHPRIn_RD(x, n) ^ (v))) @@ -3594,7 +3601,7 @@ #define BS_DMA_DCHPRIn_CHPRI (4U) /*!< Bit field size in bits for DMA_DCHPRIn_CHPRI. */ /*! @brief Read current value of the DMA_DCHPRIn_CHPRI field. */ -#define BR_DMA_DCHPRIn_CHPRI(x, n) (HW_DMA_DCHPRIn(x, n).B.CHPRI) +#define BR_DMA_DCHPRIn_CHPRI(x, n) (UNION_READ(hw_dma_dchprin_t, HW_DMA_DCHPRIn_ADDR(x, n), U, B.CHPRI)) /*! @brief Format value for bitfield DMA_DCHPRIn_CHPRI. */ #define BF_DMA_DCHPRIn_CHPRI(v) ((uint8_t)((uint8_t)(v) << BP_DMA_DCHPRIn_CHPRI) & BM_DMA_DCHPRIn_CHPRI) @@ -3616,13 +3623,13 @@ #define BS_DMA_DCHPRIn_DPA (1U) /*!< Bit field size in bits for DMA_DCHPRIn_DPA. */ /*! @brief Read current value of the DMA_DCHPRIn_DPA field. */ -#define BR_DMA_DCHPRIn_DPA(x, n) (BITBAND_ACCESS8(HW_DMA_DCHPRIn_ADDR(x, n), BP_DMA_DCHPRIn_DPA)) +#define BR_DMA_DCHPRIn_DPA(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DMA_DCHPRIn_ADDR(x, n), BP_DMA_DCHPRIn_DPA))) /*! @brief Format value for bitfield DMA_DCHPRIn_DPA. */ #define BF_DMA_DCHPRIn_DPA(v) ((uint8_t)((uint8_t)(v) << BP_DMA_DCHPRIn_DPA) & BM_DMA_DCHPRIn_DPA) /*! @brief Set the DPA field to a new value. */ -#define BW_DMA_DCHPRIn_DPA(x, n, v) (BITBAND_ACCESS8(HW_DMA_DCHPRIn_ADDR(x, n), BP_DMA_DCHPRIn_DPA) = (v)) +#define BW_DMA_DCHPRIn_DPA(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_DCHPRIn_ADDR(x, n), BP_DMA_DCHPRIn_DPA), v)) /*@}*/ /*! @@ -3640,13 +3647,13 @@ #define BS_DMA_DCHPRIn_ECP (1U) /*!< Bit field size in bits for DMA_DCHPRIn_ECP. */ /*! @brief Read current value of the DMA_DCHPRIn_ECP field. */ -#define BR_DMA_DCHPRIn_ECP(x, n) (BITBAND_ACCESS8(HW_DMA_DCHPRIn_ADDR(x, n), BP_DMA_DCHPRIn_ECP)) +#define BR_DMA_DCHPRIn_ECP(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DMA_DCHPRIn_ADDR(x, n), BP_DMA_DCHPRIn_ECP))) /*! @brief Format value for bitfield DMA_DCHPRIn_ECP. */ #define BF_DMA_DCHPRIn_ECP(v) ((uint8_t)((uint8_t)(v) << BP_DMA_DCHPRIn_ECP) & BM_DMA_DCHPRIn_ECP) /*! @brief Set the ECP field to a new value. */ -#define BW_DMA_DCHPRIn_ECP(x, n, v) (BITBAND_ACCESS8(HW_DMA_DCHPRIn_ADDR(x, n), BP_DMA_DCHPRIn_ECP) = (v)) +#define BW_DMA_DCHPRIn_ECP(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMA_DCHPRIn_ADDR(x, n), BP_DMA_DCHPRIn_ECP), v)) /*@}*/ /******************************************************************************* @@ -3676,8 +3683,8 @@ #define HW_DMA_TCDn_SADDR_ADDR(x, n) ((x) + 0x1000U + (0x20U * (n))) #define HW_DMA_TCDn_SADDR(x, n) (*(__IO hw_dma_tcdn_saddr_t *) HW_DMA_TCDn_SADDR_ADDR(x, n)) -#define HW_DMA_TCDn_SADDR_RD(x, n) (HW_DMA_TCDn_SADDR(x, n).U) -#define HW_DMA_TCDn_SADDR_WR(x, n, v) (HW_DMA_TCDn_SADDR(x, n).U = (v)) +#define HW_DMA_TCDn_SADDR_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_saddr_t, HW_DMA_TCDn_SADDR_ADDR(x, n))) +#define HW_DMA_TCDn_SADDR_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_saddr_t, HW_DMA_TCDn_SADDR_ADDR(x, n), v)) #define HW_DMA_TCDn_SADDR_SET(x, n, v) (HW_DMA_TCDn_SADDR_WR(x, n, HW_DMA_TCDn_SADDR_RD(x, n) | (v))) #define HW_DMA_TCDn_SADDR_CLR(x, n, v) (HW_DMA_TCDn_SADDR_WR(x, n, HW_DMA_TCDn_SADDR_RD(x, n) & ~(v))) #define HW_DMA_TCDn_SADDR_TOG(x, n, v) (HW_DMA_TCDn_SADDR_WR(x, n, HW_DMA_TCDn_SADDR_RD(x, n) ^ (v))) @@ -3733,8 +3740,8 @@ #define HW_DMA_TCDn_SOFF_ADDR(x, n) ((x) + 0x1004U + (0x20U * (n))) #define HW_DMA_TCDn_SOFF(x, n) (*(__IO hw_dma_tcdn_soff_t *) HW_DMA_TCDn_SOFF_ADDR(x, n)) -#define HW_DMA_TCDn_SOFF_RD(x, n) (HW_DMA_TCDn_SOFF(x, n).U) -#define HW_DMA_TCDn_SOFF_WR(x, n, v) (HW_DMA_TCDn_SOFF(x, n).U = (v)) +#define HW_DMA_TCDn_SOFF_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_soff_t, HW_DMA_TCDn_SOFF_ADDR(x, n))) +#define HW_DMA_TCDn_SOFF_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_soff_t, HW_DMA_TCDn_SOFF_ADDR(x, n), v)) #define HW_DMA_TCDn_SOFF_SET(x, n, v) (HW_DMA_TCDn_SOFF_WR(x, n, HW_DMA_TCDn_SOFF_RD(x, n) | (v))) #define HW_DMA_TCDn_SOFF_CLR(x, n, v) (HW_DMA_TCDn_SOFF_WR(x, n, HW_DMA_TCDn_SOFF_RD(x, n) & ~(v))) #define HW_DMA_TCDn_SOFF_TOG(x, n, v) (HW_DMA_TCDn_SOFF_WR(x, n, HW_DMA_TCDn_SOFF_RD(x, n) ^ (v))) @@ -3794,8 +3801,8 @@ #define HW_DMA_TCDn_ATTR_ADDR(x, n) ((x) + 0x1006U + (0x20U * (n))) #define HW_DMA_TCDn_ATTR(x, n) (*(__IO hw_dma_tcdn_attr_t *) HW_DMA_TCDn_ATTR_ADDR(x, n)) -#define HW_DMA_TCDn_ATTR_RD(x, n) (HW_DMA_TCDn_ATTR(x, n).U) -#define HW_DMA_TCDn_ATTR_WR(x, n, v) (HW_DMA_TCDn_ATTR(x, n).U = (v)) +#define HW_DMA_TCDn_ATTR_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_attr_t, HW_DMA_TCDn_ATTR_ADDR(x, n))) +#define HW_DMA_TCDn_ATTR_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_attr_t, HW_DMA_TCDn_ATTR_ADDR(x, n), v)) #define HW_DMA_TCDn_ATTR_SET(x, n, v) (HW_DMA_TCDn_ATTR_WR(x, n, HW_DMA_TCDn_ATTR_RD(x, n) | (v))) #define HW_DMA_TCDn_ATTR_CLR(x, n, v) (HW_DMA_TCDn_ATTR_WR(x, n, HW_DMA_TCDn_ATTR_RD(x, n) & ~(v))) #define HW_DMA_TCDn_ATTR_TOG(x, n, v) (HW_DMA_TCDn_ATTR_WR(x, n, HW_DMA_TCDn_ATTR_RD(x, n) ^ (v))) @@ -3816,7 +3823,7 @@ #define BS_DMA_TCDn_ATTR_DSIZE (3U) /*!< Bit field size in bits for DMA_TCDn_ATTR_DSIZE. */ /*! @brief Read current value of the DMA_TCDn_ATTR_DSIZE field. */ -#define BR_DMA_TCDn_ATTR_DSIZE(x, n) (HW_DMA_TCDn_ATTR(x, n).B.DSIZE) +#define BR_DMA_TCDn_ATTR_DSIZE(x, n) (UNION_READ(hw_dma_tcdn_attr_t, HW_DMA_TCDn_ATTR_ADDR(x, n), U, B.DSIZE)) /*! @brief Format value for bitfield DMA_TCDn_ATTR_DSIZE. */ #define BF_DMA_TCDn_ATTR_DSIZE(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_ATTR_DSIZE) & BM_DMA_TCDn_ATTR_DSIZE) @@ -3836,7 +3843,7 @@ #define BS_DMA_TCDn_ATTR_DMOD (5U) /*!< Bit field size in bits for DMA_TCDn_ATTR_DMOD. */ /*! @brief Read current value of the DMA_TCDn_ATTR_DMOD field. */ -#define BR_DMA_TCDn_ATTR_DMOD(x, n) (HW_DMA_TCDn_ATTR(x, n).B.DMOD) +#define BR_DMA_TCDn_ATTR_DMOD(x, n) (UNION_READ(hw_dma_tcdn_attr_t, HW_DMA_TCDn_ATTR_ADDR(x, n), U, B.DMOD)) /*! @brief Format value for bitfield DMA_TCDn_ATTR_DMOD. */ #define BF_DMA_TCDn_ATTR_DMOD(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_ATTR_DMOD) & BM_DMA_TCDn_ATTR_DMOD) @@ -3866,7 +3873,7 @@ #define BS_DMA_TCDn_ATTR_SSIZE (3U) /*!< Bit field size in bits for DMA_TCDn_ATTR_SSIZE. */ /*! @brief Read current value of the DMA_TCDn_ATTR_SSIZE field. */ -#define BR_DMA_TCDn_ATTR_SSIZE(x, n) (HW_DMA_TCDn_ATTR(x, n).B.SSIZE) +#define BR_DMA_TCDn_ATTR_SSIZE(x, n) (UNION_READ(hw_dma_tcdn_attr_t, HW_DMA_TCDn_ATTR_ADDR(x, n), U, B.SSIZE)) /*! @brief Format value for bitfield DMA_TCDn_ATTR_SSIZE. */ #define BF_DMA_TCDn_ATTR_SSIZE(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_ATTR_SSIZE) & BM_DMA_TCDn_ATTR_SSIZE) @@ -3887,7 +3894,7 @@ #define BS_DMA_TCDn_ATTR_SMOD (5U) /*!< Bit field size in bits for DMA_TCDn_ATTR_SMOD. */ /*! @brief Read current value of the DMA_TCDn_ATTR_SMOD field. */ -#define BR_DMA_TCDn_ATTR_SMOD(x, n) (HW_DMA_TCDn_ATTR(x, n).B.SMOD) +#define BR_DMA_TCDn_ATTR_SMOD(x, n) (UNION_READ(hw_dma_tcdn_attr_t, HW_DMA_TCDn_ATTR_ADDR(x, n), U, B.SMOD)) /*! @brief Format value for bitfield DMA_TCDn_ATTR_SMOD. */ #define BF_DMA_TCDn_ATTR_SMOD(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_ATTR_SMOD) & BM_DMA_TCDn_ATTR_SMOD) @@ -3930,8 +3937,8 @@ #define HW_DMA_TCDn_NBYTES_MLNO_ADDR(x, n) ((x) + 0x1008U + (0x20U * (n))) #define HW_DMA_TCDn_NBYTES_MLNO(x, n) (*(__IO hw_dma_tcdn_nbytes_mlno_t *) HW_DMA_TCDn_NBYTES_MLNO_ADDR(x, n)) -#define HW_DMA_TCDn_NBYTES_MLNO_RD(x, n) (HW_DMA_TCDn_NBYTES_MLNO(x, n).U) -#define HW_DMA_TCDn_NBYTES_MLNO_WR(x, n, v) (HW_DMA_TCDn_NBYTES_MLNO(x, n).U = (v)) +#define HW_DMA_TCDn_NBYTES_MLNO_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_nbytes_mlno_t, HW_DMA_TCDn_NBYTES_MLNO_ADDR(x, n))) +#define HW_DMA_TCDn_NBYTES_MLNO_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_nbytes_mlno_t, HW_DMA_TCDn_NBYTES_MLNO_ADDR(x, n), v)) #define HW_DMA_TCDn_NBYTES_MLNO_SET(x, n, v) (HW_DMA_TCDn_NBYTES_MLNO_WR(x, n, HW_DMA_TCDn_NBYTES_MLNO_RD(x, n) | (v))) #define HW_DMA_TCDn_NBYTES_MLNO_CLR(x, n, v) (HW_DMA_TCDn_NBYTES_MLNO_WR(x, n, HW_DMA_TCDn_NBYTES_MLNO_RD(x, n) & ~(v))) #define HW_DMA_TCDn_NBYTES_MLNO_TOG(x, n, v) (HW_DMA_TCDn_NBYTES_MLNO_WR(x, n, HW_DMA_TCDn_NBYTES_MLNO_RD(x, n) ^ (v))) @@ -4007,8 +4014,8 @@ #define HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n) ((x) + 0x1008U + (0x20U * (n))) #define HW_DMA_TCDn_NBYTES_MLOFFNO(x, n) (*(__IO hw_dma_tcdn_nbytes_mloffno_t *) HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n)) -#define HW_DMA_TCDn_NBYTES_MLOFFNO_RD(x, n) (HW_DMA_TCDn_NBYTES_MLOFFNO(x, n).U) -#define HW_DMA_TCDn_NBYTES_MLOFFNO_WR(x, n, v) (HW_DMA_TCDn_NBYTES_MLOFFNO(x, n).U = (v)) +#define HW_DMA_TCDn_NBYTES_MLOFFNO_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_nbytes_mloffno_t, HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n))) +#define HW_DMA_TCDn_NBYTES_MLOFFNO_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_nbytes_mloffno_t, HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), v)) #define HW_DMA_TCDn_NBYTES_MLOFFNO_SET(x, n, v) (HW_DMA_TCDn_NBYTES_MLOFFNO_WR(x, n, HW_DMA_TCDn_NBYTES_MLOFFNO_RD(x, n) | (v))) #define HW_DMA_TCDn_NBYTES_MLOFFNO_CLR(x, n, v) (HW_DMA_TCDn_NBYTES_MLOFFNO_WR(x, n, HW_DMA_TCDn_NBYTES_MLOFFNO_RD(x, n) & ~(v))) #define HW_DMA_TCDn_NBYTES_MLOFFNO_TOG(x, n, v) (HW_DMA_TCDn_NBYTES_MLOFFNO_WR(x, n, HW_DMA_TCDn_NBYTES_MLOFFNO_RD(x, n) ^ (v))) @@ -4037,7 +4044,7 @@ #define BS_DMA_TCDn_NBYTES_MLOFFNO_NBYTES (30U) /*!< Bit field size in bits for DMA_TCDn_NBYTES_MLOFFNO_NBYTES. */ /*! @brief Read current value of the DMA_TCDn_NBYTES_MLOFFNO_NBYTES field. */ -#define BR_DMA_TCDn_NBYTES_MLOFFNO_NBYTES(x, n) (HW_DMA_TCDn_NBYTES_MLOFFNO(x, n).B.NBYTES) +#define BR_DMA_TCDn_NBYTES_MLOFFNO_NBYTES(x, n) (UNION_READ(hw_dma_tcdn_nbytes_mloffno_t, HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), U, B.NBYTES)) /*! @brief Format value for bitfield DMA_TCDn_NBYTES_MLOFFNO_NBYTES. */ #define BF_DMA_TCDn_NBYTES_MLOFFNO_NBYTES(v) ((uint32_t)((uint32_t)(v) << BP_DMA_TCDn_NBYTES_MLOFFNO_NBYTES) & BM_DMA_TCDn_NBYTES_MLOFFNO_NBYTES) @@ -4062,13 +4069,13 @@ #define BS_DMA_TCDn_NBYTES_MLOFFNO_DMLOE (1U) /*!< Bit field size in bits for DMA_TCDn_NBYTES_MLOFFNO_DMLOE. */ /*! @brief Read current value of the DMA_TCDn_NBYTES_MLOFFNO_DMLOE field. */ -#define BR_DMA_TCDn_NBYTES_MLOFFNO_DMLOE(x, n) (BITBAND_ACCESS32(HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFNO_DMLOE)) +#define BR_DMA_TCDn_NBYTES_MLOFFNO_DMLOE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFNO_DMLOE))) /*! @brief Format value for bitfield DMA_TCDn_NBYTES_MLOFFNO_DMLOE. */ #define BF_DMA_TCDn_NBYTES_MLOFFNO_DMLOE(v) ((uint32_t)((uint32_t)(v) << BP_DMA_TCDn_NBYTES_MLOFFNO_DMLOE) & BM_DMA_TCDn_NBYTES_MLOFFNO_DMLOE) /*! @brief Set the DMLOE field to a new value. */ -#define BW_DMA_TCDn_NBYTES_MLOFFNO_DMLOE(x, n, v) (BITBAND_ACCESS32(HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFNO_DMLOE) = (v)) +#define BW_DMA_TCDn_NBYTES_MLOFFNO_DMLOE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFNO_DMLOE), v)) /*@}*/ /*! @@ -4087,13 +4094,13 @@ #define BS_DMA_TCDn_NBYTES_MLOFFNO_SMLOE (1U) /*!< Bit field size in bits for DMA_TCDn_NBYTES_MLOFFNO_SMLOE. */ /*! @brief Read current value of the DMA_TCDn_NBYTES_MLOFFNO_SMLOE field. */ -#define BR_DMA_TCDn_NBYTES_MLOFFNO_SMLOE(x, n) (BITBAND_ACCESS32(HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFNO_SMLOE)) +#define BR_DMA_TCDn_NBYTES_MLOFFNO_SMLOE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFNO_SMLOE))) /*! @brief Format value for bitfield DMA_TCDn_NBYTES_MLOFFNO_SMLOE. */ #define BF_DMA_TCDn_NBYTES_MLOFFNO_SMLOE(v) ((uint32_t)((uint32_t)(v) << BP_DMA_TCDn_NBYTES_MLOFFNO_SMLOE) & BM_DMA_TCDn_NBYTES_MLOFFNO_SMLOE) /*! @brief Set the SMLOE field to a new value. */ -#define BW_DMA_TCDn_NBYTES_MLOFFNO_SMLOE(x, n, v) (BITBAND_ACCESS32(HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFNO_SMLOE) = (v)) +#define BW_DMA_TCDn_NBYTES_MLOFFNO_SMLOE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_TCDn_NBYTES_MLOFFNO_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFNO_SMLOE), v)) /*@}*/ /******************************************************************************* * HW_DMA_TCDn_NBYTES_MLOFFYES - TCD Signed Minor Loop Offset (Minor Loop and Offset Enabled) @@ -4136,8 +4143,8 @@ #define HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n) ((x) + 0x1008U + (0x20U * (n))) #define HW_DMA_TCDn_NBYTES_MLOFFYES(x, n) (*(__IO hw_dma_tcdn_nbytes_mloffyes_t *) HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n)) -#define HW_DMA_TCDn_NBYTES_MLOFFYES_RD(x, n) (HW_DMA_TCDn_NBYTES_MLOFFYES(x, n).U) -#define HW_DMA_TCDn_NBYTES_MLOFFYES_WR(x, n, v) (HW_DMA_TCDn_NBYTES_MLOFFYES(x, n).U = (v)) +#define HW_DMA_TCDn_NBYTES_MLOFFYES_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_nbytes_mloffyes_t, HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n))) +#define HW_DMA_TCDn_NBYTES_MLOFFYES_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_nbytes_mloffyes_t, HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), v)) #define HW_DMA_TCDn_NBYTES_MLOFFYES_SET(x, n, v) (HW_DMA_TCDn_NBYTES_MLOFFYES_WR(x, n, HW_DMA_TCDn_NBYTES_MLOFFYES_RD(x, n) | (v))) #define HW_DMA_TCDn_NBYTES_MLOFFYES_CLR(x, n, v) (HW_DMA_TCDn_NBYTES_MLOFFYES_WR(x, n, HW_DMA_TCDn_NBYTES_MLOFFYES_RD(x, n) & ~(v))) #define HW_DMA_TCDn_NBYTES_MLOFFYES_TOG(x, n, v) (HW_DMA_TCDn_NBYTES_MLOFFYES_WR(x, n, HW_DMA_TCDn_NBYTES_MLOFFYES_RD(x, n) ^ (v))) @@ -4166,7 +4173,7 @@ #define BS_DMA_TCDn_NBYTES_MLOFFYES_NBYTES (10U) /*!< Bit field size in bits for DMA_TCDn_NBYTES_MLOFFYES_NBYTES. */ /*! @brief Read current value of the DMA_TCDn_NBYTES_MLOFFYES_NBYTES field. */ -#define BR_DMA_TCDn_NBYTES_MLOFFYES_NBYTES(x, n) (HW_DMA_TCDn_NBYTES_MLOFFYES(x, n).B.NBYTES) +#define BR_DMA_TCDn_NBYTES_MLOFFYES_NBYTES(x, n) (UNION_READ(hw_dma_tcdn_nbytes_mloffyes_t, HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), U, B.NBYTES)) /*! @brief Format value for bitfield DMA_TCDn_NBYTES_MLOFFYES_NBYTES. */ #define BF_DMA_TCDn_NBYTES_MLOFFYES_NBYTES(v) ((uint32_t)((uint32_t)(v) << BP_DMA_TCDn_NBYTES_MLOFFYES_NBYTES) & BM_DMA_TCDn_NBYTES_MLOFFYES_NBYTES) @@ -4184,7 +4191,7 @@ #define BS_DMA_TCDn_NBYTES_MLOFFYES_MLOFF (20U) /*!< Bit field size in bits for DMA_TCDn_NBYTES_MLOFFYES_MLOFF. */ /*! @brief Read current value of the DMA_TCDn_NBYTES_MLOFFYES_MLOFF field. */ -#define BR_DMA_TCDn_NBYTES_MLOFFYES_MLOFF(x, n) (HW_DMA_TCDn_NBYTES_MLOFFYES(x, n).B.MLOFF) +#define BR_DMA_TCDn_NBYTES_MLOFFYES_MLOFF(x, n) (UNION_READ(hw_dma_tcdn_nbytes_mloffyes_t, HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), U, B.MLOFF)) /*! @brief Format value for bitfield DMA_TCDn_NBYTES_MLOFFYES_MLOFF. */ #define BF_DMA_TCDn_NBYTES_MLOFFYES_MLOFF(v) ((uint32_t)((uint32_t)(v) << BP_DMA_TCDn_NBYTES_MLOFFYES_MLOFF) & BM_DMA_TCDn_NBYTES_MLOFFYES_MLOFF) @@ -4209,13 +4216,13 @@ #define BS_DMA_TCDn_NBYTES_MLOFFYES_DMLOE (1U) /*!< Bit field size in bits for DMA_TCDn_NBYTES_MLOFFYES_DMLOE. */ /*! @brief Read current value of the DMA_TCDn_NBYTES_MLOFFYES_DMLOE field. */ -#define BR_DMA_TCDn_NBYTES_MLOFFYES_DMLOE(x, n) (BITBAND_ACCESS32(HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFYES_DMLOE)) +#define BR_DMA_TCDn_NBYTES_MLOFFYES_DMLOE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFYES_DMLOE))) /*! @brief Format value for bitfield DMA_TCDn_NBYTES_MLOFFYES_DMLOE. */ #define BF_DMA_TCDn_NBYTES_MLOFFYES_DMLOE(v) ((uint32_t)((uint32_t)(v) << BP_DMA_TCDn_NBYTES_MLOFFYES_DMLOE) & BM_DMA_TCDn_NBYTES_MLOFFYES_DMLOE) /*! @brief Set the DMLOE field to a new value. */ -#define BW_DMA_TCDn_NBYTES_MLOFFYES_DMLOE(x, n, v) (BITBAND_ACCESS32(HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFYES_DMLOE) = (v)) +#define BW_DMA_TCDn_NBYTES_MLOFFYES_DMLOE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFYES_DMLOE), v)) /*@}*/ /*! @@ -4234,13 +4241,13 @@ #define BS_DMA_TCDn_NBYTES_MLOFFYES_SMLOE (1U) /*!< Bit field size in bits for DMA_TCDn_NBYTES_MLOFFYES_SMLOE. */ /*! @brief Read current value of the DMA_TCDn_NBYTES_MLOFFYES_SMLOE field. */ -#define BR_DMA_TCDn_NBYTES_MLOFFYES_SMLOE(x, n) (BITBAND_ACCESS32(HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFYES_SMLOE)) +#define BR_DMA_TCDn_NBYTES_MLOFFYES_SMLOE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFYES_SMLOE))) /*! @brief Format value for bitfield DMA_TCDn_NBYTES_MLOFFYES_SMLOE. */ #define BF_DMA_TCDn_NBYTES_MLOFFYES_SMLOE(v) ((uint32_t)((uint32_t)(v) << BP_DMA_TCDn_NBYTES_MLOFFYES_SMLOE) & BM_DMA_TCDn_NBYTES_MLOFFYES_SMLOE) /*! @brief Set the SMLOE field to a new value. */ -#define BW_DMA_TCDn_NBYTES_MLOFFYES_SMLOE(x, n, v) (BITBAND_ACCESS32(HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFYES_SMLOE) = (v)) +#define BW_DMA_TCDn_NBYTES_MLOFFYES_SMLOE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_DMA_TCDn_NBYTES_MLOFFYES_ADDR(x, n), BP_DMA_TCDn_NBYTES_MLOFFYES_SMLOE), v)) /*@}*/ /******************************************************************************* * HW_DMA_TCDn_SLAST - TCD Last Source Address Adjustment @@ -4269,8 +4276,8 @@ #define HW_DMA_TCDn_SLAST_ADDR(x, n) ((x) + 0x100CU + (0x20U * (n))) #define HW_DMA_TCDn_SLAST(x, n) (*(__IO hw_dma_tcdn_slast_t *) HW_DMA_TCDn_SLAST_ADDR(x, n)) -#define HW_DMA_TCDn_SLAST_RD(x, n) (HW_DMA_TCDn_SLAST(x, n).U) -#define HW_DMA_TCDn_SLAST_WR(x, n, v) (HW_DMA_TCDn_SLAST(x, n).U = (v)) +#define HW_DMA_TCDn_SLAST_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_slast_t, HW_DMA_TCDn_SLAST_ADDR(x, n))) +#define HW_DMA_TCDn_SLAST_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_slast_t, HW_DMA_TCDn_SLAST_ADDR(x, n), v)) #define HW_DMA_TCDn_SLAST_SET(x, n, v) (HW_DMA_TCDn_SLAST_WR(x, n, HW_DMA_TCDn_SLAST_RD(x, n) | (v))) #define HW_DMA_TCDn_SLAST_CLR(x, n, v) (HW_DMA_TCDn_SLAST_WR(x, n, HW_DMA_TCDn_SLAST_RD(x, n) & ~(v))) #define HW_DMA_TCDn_SLAST_TOG(x, n, v) (HW_DMA_TCDn_SLAST_WR(x, n, HW_DMA_TCDn_SLAST_RD(x, n) ^ (v))) @@ -4329,8 +4336,8 @@ #define HW_DMA_TCDn_DADDR_ADDR(x, n) ((x) + 0x1010U + (0x20U * (n))) #define HW_DMA_TCDn_DADDR(x, n) (*(__IO hw_dma_tcdn_daddr_t *) HW_DMA_TCDn_DADDR_ADDR(x, n)) -#define HW_DMA_TCDn_DADDR_RD(x, n) (HW_DMA_TCDn_DADDR(x, n).U) -#define HW_DMA_TCDn_DADDR_WR(x, n, v) (HW_DMA_TCDn_DADDR(x, n).U = (v)) +#define HW_DMA_TCDn_DADDR_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_daddr_t, HW_DMA_TCDn_DADDR_ADDR(x, n))) +#define HW_DMA_TCDn_DADDR_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_daddr_t, HW_DMA_TCDn_DADDR_ADDR(x, n), v)) #define HW_DMA_TCDn_DADDR_SET(x, n, v) (HW_DMA_TCDn_DADDR_WR(x, n, HW_DMA_TCDn_DADDR_RD(x, n) | (v))) #define HW_DMA_TCDn_DADDR_CLR(x, n, v) (HW_DMA_TCDn_DADDR_WR(x, n, HW_DMA_TCDn_DADDR_RD(x, n) & ~(v))) #define HW_DMA_TCDn_DADDR_TOG(x, n, v) (HW_DMA_TCDn_DADDR_WR(x, n, HW_DMA_TCDn_DADDR_RD(x, n) ^ (v))) @@ -4386,8 +4393,8 @@ #define HW_DMA_TCDn_DOFF_ADDR(x, n) ((x) + 0x1014U + (0x20U * (n))) #define HW_DMA_TCDn_DOFF(x, n) (*(__IO hw_dma_tcdn_doff_t *) HW_DMA_TCDn_DOFF_ADDR(x, n)) -#define HW_DMA_TCDn_DOFF_RD(x, n) (HW_DMA_TCDn_DOFF(x, n).U) -#define HW_DMA_TCDn_DOFF_WR(x, n, v) (HW_DMA_TCDn_DOFF(x, n).U = (v)) +#define HW_DMA_TCDn_DOFF_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_doff_t, HW_DMA_TCDn_DOFF_ADDR(x, n))) +#define HW_DMA_TCDn_DOFF_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_doff_t, HW_DMA_TCDn_DOFF_ADDR(x, n), v)) #define HW_DMA_TCDn_DOFF_SET(x, n, v) (HW_DMA_TCDn_DOFF_WR(x, n, HW_DMA_TCDn_DOFF_RD(x, n) | (v))) #define HW_DMA_TCDn_DOFF_CLR(x, n, v) (HW_DMA_TCDn_DOFF_WR(x, n, HW_DMA_TCDn_DOFF_RD(x, n) & ~(v))) #define HW_DMA_TCDn_DOFF_TOG(x, n, v) (HW_DMA_TCDn_DOFF_WR(x, n, HW_DMA_TCDn_DOFF_RD(x, n) ^ (v))) @@ -4449,8 +4456,8 @@ #define HW_DMA_TCDn_CITER_ELINKNO_ADDR(x, n) ((x) + 0x1016U + (0x20U * (n))) #define HW_DMA_TCDn_CITER_ELINKNO(x, n) (*(__IO hw_dma_tcdn_citer_elinkno_t *) HW_DMA_TCDn_CITER_ELINKNO_ADDR(x, n)) -#define HW_DMA_TCDn_CITER_ELINKNO_RD(x, n) (HW_DMA_TCDn_CITER_ELINKNO(x, n).U) -#define HW_DMA_TCDn_CITER_ELINKNO_WR(x, n, v) (HW_DMA_TCDn_CITER_ELINKNO(x, n).U = (v)) +#define HW_DMA_TCDn_CITER_ELINKNO_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_citer_elinkno_t, HW_DMA_TCDn_CITER_ELINKNO_ADDR(x, n))) +#define HW_DMA_TCDn_CITER_ELINKNO_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_citer_elinkno_t, HW_DMA_TCDn_CITER_ELINKNO_ADDR(x, n), v)) #define HW_DMA_TCDn_CITER_ELINKNO_SET(x, n, v) (HW_DMA_TCDn_CITER_ELINKNO_WR(x, n, HW_DMA_TCDn_CITER_ELINKNO_RD(x, n) | (v))) #define HW_DMA_TCDn_CITER_ELINKNO_CLR(x, n, v) (HW_DMA_TCDn_CITER_ELINKNO_WR(x, n, HW_DMA_TCDn_CITER_ELINKNO_RD(x, n) & ~(v))) #define HW_DMA_TCDn_CITER_ELINKNO_TOG(x, n, v) (HW_DMA_TCDn_CITER_ELINKNO_WR(x, n, HW_DMA_TCDn_CITER_ELINKNO_RD(x, n) ^ (v))) @@ -4480,7 +4487,7 @@ #define BS_DMA_TCDn_CITER_ELINKNO_CITER (15U) /*!< Bit field size in bits for DMA_TCDn_CITER_ELINKNO_CITER. */ /*! @brief Read current value of the DMA_TCDn_CITER_ELINKNO_CITER field. */ -#define BR_DMA_TCDn_CITER_ELINKNO_CITER(x, n) (HW_DMA_TCDn_CITER_ELINKNO(x, n).B.CITER) +#define BR_DMA_TCDn_CITER_ELINKNO_CITER(x, n) (UNION_READ(hw_dma_tcdn_citer_elinkno_t, HW_DMA_TCDn_CITER_ELINKNO_ADDR(x, n), U, B.CITER)) /*! @brief Format value for bitfield DMA_TCDn_CITER_ELINKNO_CITER. */ #define BF_DMA_TCDn_CITER_ELINKNO_CITER(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CITER_ELINKNO_CITER) & BM_DMA_TCDn_CITER_ELINKNO_CITER) @@ -4511,13 +4518,13 @@ #define BS_DMA_TCDn_CITER_ELINKNO_ELINK (1U) /*!< Bit field size in bits for DMA_TCDn_CITER_ELINKNO_ELINK. */ /*! @brief Read current value of the DMA_TCDn_CITER_ELINKNO_ELINK field. */ -#define BR_DMA_TCDn_CITER_ELINKNO_ELINK(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CITER_ELINKNO_ADDR(x, n), BP_DMA_TCDn_CITER_ELINKNO_ELINK)) +#define BR_DMA_TCDn_CITER_ELINKNO_ELINK(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CITER_ELINKNO_ADDR(x, n), BP_DMA_TCDn_CITER_ELINKNO_ELINK))) /*! @brief Format value for bitfield DMA_TCDn_CITER_ELINKNO_ELINK. */ #define BF_DMA_TCDn_CITER_ELINKNO_ELINK(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CITER_ELINKNO_ELINK) & BM_DMA_TCDn_CITER_ELINKNO_ELINK) /*! @brief Set the ELINK field to a new value. */ -#define BW_DMA_TCDn_CITER_ELINKNO_ELINK(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CITER_ELINKNO_ADDR(x, n), BP_DMA_TCDn_CITER_ELINKNO_ELINK) = (v)) +#define BW_DMA_TCDn_CITER_ELINKNO_ELINK(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CITER_ELINKNO_ADDR(x, n), BP_DMA_TCDn_CITER_ELINKNO_ELINK), v)) /*@}*/ /******************************************************************************* * HW_DMA_TCDn_CITER_ELINKYES - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled) @@ -4552,8 +4559,8 @@ #define HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n) ((x) + 0x1016U + (0x20U * (n))) #define HW_DMA_TCDn_CITER_ELINKYES(x, n) (*(__IO hw_dma_tcdn_citer_elinkyes_t *) HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n)) -#define HW_DMA_TCDn_CITER_ELINKYES_RD(x, n) (HW_DMA_TCDn_CITER_ELINKYES(x, n).U) -#define HW_DMA_TCDn_CITER_ELINKYES_WR(x, n, v) (HW_DMA_TCDn_CITER_ELINKYES(x, n).U = (v)) +#define HW_DMA_TCDn_CITER_ELINKYES_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_citer_elinkyes_t, HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n))) +#define HW_DMA_TCDn_CITER_ELINKYES_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_citer_elinkyes_t, HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n), v)) #define HW_DMA_TCDn_CITER_ELINKYES_SET(x, n, v) (HW_DMA_TCDn_CITER_ELINKYES_WR(x, n, HW_DMA_TCDn_CITER_ELINKYES_RD(x, n) | (v))) #define HW_DMA_TCDn_CITER_ELINKYES_CLR(x, n, v) (HW_DMA_TCDn_CITER_ELINKYES_WR(x, n, HW_DMA_TCDn_CITER_ELINKYES_RD(x, n) & ~(v))) #define HW_DMA_TCDn_CITER_ELINKYES_TOG(x, n, v) (HW_DMA_TCDn_CITER_ELINKYES_WR(x, n, HW_DMA_TCDn_CITER_ELINKYES_RD(x, n) ^ (v))) @@ -4583,7 +4590,7 @@ #define BS_DMA_TCDn_CITER_ELINKYES_CITER (9U) /*!< Bit field size in bits for DMA_TCDn_CITER_ELINKYES_CITER. */ /*! @brief Read current value of the DMA_TCDn_CITER_ELINKYES_CITER field. */ -#define BR_DMA_TCDn_CITER_ELINKYES_CITER(x, n) (HW_DMA_TCDn_CITER_ELINKYES(x, n).B.CITER) +#define BR_DMA_TCDn_CITER_ELINKYES_CITER(x, n) (UNION_READ(hw_dma_tcdn_citer_elinkyes_t, HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n), U, B.CITER)) /*! @brief Format value for bitfield DMA_TCDn_CITER_ELINKYES_CITER. */ #define BF_DMA_TCDn_CITER_ELINKYES_CITER(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CITER_ELINKYES_CITER) & BM_DMA_TCDn_CITER_ELINKYES_CITER) @@ -4605,7 +4612,7 @@ #define BS_DMA_TCDn_CITER_ELINKYES_LINKCH (4U) /*!< Bit field size in bits for DMA_TCDn_CITER_ELINKYES_LINKCH. */ /*! @brief Read current value of the DMA_TCDn_CITER_ELINKYES_LINKCH field. */ -#define BR_DMA_TCDn_CITER_ELINKYES_LINKCH(x, n) (HW_DMA_TCDn_CITER_ELINKYES(x, n).B.LINKCH) +#define BR_DMA_TCDn_CITER_ELINKYES_LINKCH(x, n) (UNION_READ(hw_dma_tcdn_citer_elinkyes_t, HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n), U, B.LINKCH)) /*! @brief Format value for bitfield DMA_TCDn_CITER_ELINKYES_LINKCH. */ #define BF_DMA_TCDn_CITER_ELINKYES_LINKCH(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CITER_ELINKYES_LINKCH) & BM_DMA_TCDn_CITER_ELINKYES_LINKCH) @@ -4636,13 +4643,13 @@ #define BS_DMA_TCDn_CITER_ELINKYES_ELINK (1U) /*!< Bit field size in bits for DMA_TCDn_CITER_ELINKYES_ELINK. */ /*! @brief Read current value of the DMA_TCDn_CITER_ELINKYES_ELINK field. */ -#define BR_DMA_TCDn_CITER_ELINKYES_ELINK(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n), BP_DMA_TCDn_CITER_ELINKYES_ELINK)) +#define BR_DMA_TCDn_CITER_ELINKYES_ELINK(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n), BP_DMA_TCDn_CITER_ELINKYES_ELINK))) /*! @brief Format value for bitfield DMA_TCDn_CITER_ELINKYES_ELINK. */ #define BF_DMA_TCDn_CITER_ELINKYES_ELINK(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CITER_ELINKYES_ELINK) & BM_DMA_TCDn_CITER_ELINKYES_ELINK) /*! @brief Set the ELINK field to a new value. */ -#define BW_DMA_TCDn_CITER_ELINKYES_ELINK(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n), BP_DMA_TCDn_CITER_ELINKYES_ELINK) = (v)) +#define BW_DMA_TCDn_CITER_ELINKYES_ELINK(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CITER_ELINKYES_ADDR(x, n), BP_DMA_TCDn_CITER_ELINKYES_ELINK), v)) /*@}*/ /******************************************************************************* * HW_DMA_TCDn_DLASTSGA - TCD Last Destination Address Adjustment/Scatter Gather Address @@ -4671,8 +4678,8 @@ #define HW_DMA_TCDn_DLASTSGA_ADDR(x, n) ((x) + 0x1018U + (0x20U * (n))) #define HW_DMA_TCDn_DLASTSGA(x, n) (*(__IO hw_dma_tcdn_dlastsga_t *) HW_DMA_TCDn_DLASTSGA_ADDR(x, n)) -#define HW_DMA_TCDn_DLASTSGA_RD(x, n) (HW_DMA_TCDn_DLASTSGA(x, n).U) -#define HW_DMA_TCDn_DLASTSGA_WR(x, n, v) (HW_DMA_TCDn_DLASTSGA(x, n).U = (v)) +#define HW_DMA_TCDn_DLASTSGA_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_dlastsga_t, HW_DMA_TCDn_DLASTSGA_ADDR(x, n))) +#define HW_DMA_TCDn_DLASTSGA_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_dlastsga_t, HW_DMA_TCDn_DLASTSGA_ADDR(x, n), v)) #define HW_DMA_TCDn_DLASTSGA_SET(x, n, v) (HW_DMA_TCDn_DLASTSGA_WR(x, n, HW_DMA_TCDn_DLASTSGA_RD(x, n) | (v))) #define HW_DMA_TCDn_DLASTSGA_CLR(x, n, v) (HW_DMA_TCDn_DLASTSGA_WR(x, n, HW_DMA_TCDn_DLASTSGA_RD(x, n) & ~(v))) #define HW_DMA_TCDn_DLASTSGA_TOG(x, n, v) (HW_DMA_TCDn_DLASTSGA_WR(x, n, HW_DMA_TCDn_DLASTSGA_RD(x, n) ^ (v))) @@ -4751,8 +4758,8 @@ #define HW_DMA_TCDn_CSR_ADDR(x, n) ((x) + 0x101CU + (0x20U * (n))) #define HW_DMA_TCDn_CSR(x, n) (*(__IO hw_dma_tcdn_csr_t *) HW_DMA_TCDn_CSR_ADDR(x, n)) -#define HW_DMA_TCDn_CSR_RD(x, n) (HW_DMA_TCDn_CSR(x, n).U) -#define HW_DMA_TCDn_CSR_WR(x, n, v) (HW_DMA_TCDn_CSR(x, n).U = (v)) +#define HW_DMA_TCDn_CSR_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_csr_t, HW_DMA_TCDn_CSR_ADDR(x, n))) +#define HW_DMA_TCDn_CSR_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_csr_t, HW_DMA_TCDn_CSR_ADDR(x, n), v)) #define HW_DMA_TCDn_CSR_SET(x, n, v) (HW_DMA_TCDn_CSR_WR(x, n, HW_DMA_TCDn_CSR_RD(x, n) | (v))) #define HW_DMA_TCDn_CSR_CLR(x, n, v) (HW_DMA_TCDn_CSR_WR(x, n, HW_DMA_TCDn_CSR_RD(x, n) & ~(v))) #define HW_DMA_TCDn_CSR_TOG(x, n, v) (HW_DMA_TCDn_CSR_WR(x, n, HW_DMA_TCDn_CSR_RD(x, n) ^ (v))) @@ -4779,13 +4786,13 @@ #define BS_DMA_TCDn_CSR_START (1U) /*!< Bit field size in bits for DMA_TCDn_CSR_START. */ /*! @brief Read current value of the DMA_TCDn_CSR_START field. */ -#define BR_DMA_TCDn_CSR_START(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_START)) +#define BR_DMA_TCDn_CSR_START(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_START))) /*! @brief Format value for bitfield DMA_TCDn_CSR_START. */ #define BF_DMA_TCDn_CSR_START(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_START) & BM_DMA_TCDn_CSR_START) /*! @brief Set the START field to a new value. */ -#define BW_DMA_TCDn_CSR_START(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_START) = (v)) +#define BW_DMA_TCDn_CSR_START(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_START), v)) /*@}*/ /*! @@ -4805,13 +4812,13 @@ #define BS_DMA_TCDn_CSR_INTMAJOR (1U) /*!< Bit field size in bits for DMA_TCDn_CSR_INTMAJOR. */ /*! @brief Read current value of the DMA_TCDn_CSR_INTMAJOR field. */ -#define BR_DMA_TCDn_CSR_INTMAJOR(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_INTMAJOR)) +#define BR_DMA_TCDn_CSR_INTMAJOR(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_INTMAJOR))) /*! @brief Format value for bitfield DMA_TCDn_CSR_INTMAJOR. */ #define BF_DMA_TCDn_CSR_INTMAJOR(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_INTMAJOR) & BM_DMA_TCDn_CSR_INTMAJOR) /*! @brief Set the INTMAJOR field to a new value. */ -#define BW_DMA_TCDn_CSR_INTMAJOR(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_INTMAJOR) = (v)) +#define BW_DMA_TCDn_CSR_INTMAJOR(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_INTMAJOR), v)) /*@}*/ /*! @@ -4835,13 +4842,13 @@ #define BS_DMA_TCDn_CSR_INTHALF (1U) /*!< Bit field size in bits for DMA_TCDn_CSR_INTHALF. */ /*! @brief Read current value of the DMA_TCDn_CSR_INTHALF field. */ -#define BR_DMA_TCDn_CSR_INTHALF(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_INTHALF)) +#define BR_DMA_TCDn_CSR_INTHALF(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_INTHALF))) /*! @brief Format value for bitfield DMA_TCDn_CSR_INTHALF. */ #define BF_DMA_TCDn_CSR_INTHALF(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_INTHALF) & BM_DMA_TCDn_CSR_INTHALF) /*! @brief Set the INTHALF field to a new value. */ -#define BW_DMA_TCDn_CSR_INTHALF(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_INTHALF) = (v)) +#define BW_DMA_TCDn_CSR_INTHALF(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_INTHALF), v)) /*@}*/ /*! @@ -4860,13 +4867,13 @@ #define BS_DMA_TCDn_CSR_DREQ (1U) /*!< Bit field size in bits for DMA_TCDn_CSR_DREQ. */ /*! @brief Read current value of the DMA_TCDn_CSR_DREQ field. */ -#define BR_DMA_TCDn_CSR_DREQ(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_DREQ)) +#define BR_DMA_TCDn_CSR_DREQ(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_DREQ))) /*! @brief Format value for bitfield DMA_TCDn_CSR_DREQ. */ #define BF_DMA_TCDn_CSR_DREQ(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_DREQ) & BM_DMA_TCDn_CSR_DREQ) /*! @brief Set the DREQ field to a new value. */ -#define BW_DMA_TCDn_CSR_DREQ(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_DREQ) = (v)) +#define BW_DMA_TCDn_CSR_DREQ(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_DREQ), v)) /*@}*/ /*! @@ -4891,13 +4898,13 @@ #define BS_DMA_TCDn_CSR_ESG (1U) /*!< Bit field size in bits for DMA_TCDn_CSR_ESG. */ /*! @brief Read current value of the DMA_TCDn_CSR_ESG field. */ -#define BR_DMA_TCDn_CSR_ESG(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_ESG)) +#define BR_DMA_TCDn_CSR_ESG(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_ESG))) /*! @brief Format value for bitfield DMA_TCDn_CSR_ESG. */ #define BF_DMA_TCDn_CSR_ESG(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_ESG) & BM_DMA_TCDn_CSR_ESG) /*! @brief Set the ESG field to a new value. */ -#define BW_DMA_TCDn_CSR_ESG(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_ESG) = (v)) +#define BW_DMA_TCDn_CSR_ESG(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_ESG), v)) /*@}*/ /*! @@ -4919,13 +4926,13 @@ #define BS_DMA_TCDn_CSR_MAJORELINK (1U) /*!< Bit field size in bits for DMA_TCDn_CSR_MAJORELINK. */ /*! @brief Read current value of the DMA_TCDn_CSR_MAJORELINK field. */ -#define BR_DMA_TCDn_CSR_MAJORELINK(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_MAJORELINK)) +#define BR_DMA_TCDn_CSR_MAJORELINK(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_MAJORELINK))) /*! @brief Format value for bitfield DMA_TCDn_CSR_MAJORELINK. */ #define BF_DMA_TCDn_CSR_MAJORELINK(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_MAJORELINK) & BM_DMA_TCDn_CSR_MAJORELINK) /*! @brief Set the MAJORELINK field to a new value. */ -#define BW_DMA_TCDn_CSR_MAJORELINK(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_MAJORELINK) = (v)) +#define BW_DMA_TCDn_CSR_MAJORELINK(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_MAJORELINK), v)) /*@}*/ /*! @@ -4941,13 +4948,13 @@ #define BS_DMA_TCDn_CSR_ACTIVE (1U) /*!< Bit field size in bits for DMA_TCDn_CSR_ACTIVE. */ /*! @brief Read current value of the DMA_TCDn_CSR_ACTIVE field. */ -#define BR_DMA_TCDn_CSR_ACTIVE(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_ACTIVE)) +#define BR_DMA_TCDn_CSR_ACTIVE(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_ACTIVE))) /*! @brief Format value for bitfield DMA_TCDn_CSR_ACTIVE. */ #define BF_DMA_TCDn_CSR_ACTIVE(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_ACTIVE) & BM_DMA_TCDn_CSR_ACTIVE) /*! @brief Set the ACTIVE field to a new value. */ -#define BW_DMA_TCDn_CSR_ACTIVE(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_ACTIVE) = (v)) +#define BW_DMA_TCDn_CSR_ACTIVE(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_ACTIVE), v)) /*@}*/ /*! @@ -4964,13 +4971,13 @@ #define BS_DMA_TCDn_CSR_DONE (1U) /*!< Bit field size in bits for DMA_TCDn_CSR_DONE. */ /*! @brief Read current value of the DMA_TCDn_CSR_DONE field. */ -#define BR_DMA_TCDn_CSR_DONE(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_DONE)) +#define BR_DMA_TCDn_CSR_DONE(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_DONE))) /*! @brief Format value for bitfield DMA_TCDn_CSR_DONE. */ #define BF_DMA_TCDn_CSR_DONE(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_DONE) & BM_DMA_TCDn_CSR_DONE) /*! @brief Set the DONE field to a new value. */ -#define BW_DMA_TCDn_CSR_DONE(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_DONE) = (v)) +#define BW_DMA_TCDn_CSR_DONE(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_CSR_ADDR(x, n), BP_DMA_TCDn_CSR_DONE), v)) /*@}*/ /*! @@ -4987,7 +4994,7 @@ #define BS_DMA_TCDn_CSR_MAJORLINKCH (4U) /*!< Bit field size in bits for DMA_TCDn_CSR_MAJORLINKCH. */ /*! @brief Read current value of the DMA_TCDn_CSR_MAJORLINKCH field. */ -#define BR_DMA_TCDn_CSR_MAJORLINKCH(x, n) (HW_DMA_TCDn_CSR(x, n).B.MAJORLINKCH) +#define BR_DMA_TCDn_CSR_MAJORLINKCH(x, n) (UNION_READ(hw_dma_tcdn_csr_t, HW_DMA_TCDn_CSR_ADDR(x, n), U, B.MAJORLINKCH)) /*! @brief Format value for bitfield DMA_TCDn_CSR_MAJORLINKCH. */ #define BF_DMA_TCDn_CSR_MAJORLINKCH(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_MAJORLINKCH) & BM_DMA_TCDn_CSR_MAJORLINKCH) @@ -5020,7 +5027,7 @@ #define BS_DMA_TCDn_CSR_BWC (2U) /*!< Bit field size in bits for DMA_TCDn_CSR_BWC. */ /*! @brief Read current value of the DMA_TCDn_CSR_BWC field. */ -#define BR_DMA_TCDn_CSR_BWC(x, n) (HW_DMA_TCDn_CSR(x, n).B.BWC) +#define BR_DMA_TCDn_CSR_BWC(x, n) (UNION_READ(hw_dma_tcdn_csr_t, HW_DMA_TCDn_CSR_ADDR(x, n), U, B.BWC)) /*! @brief Format value for bitfield DMA_TCDn_CSR_BWC. */ #define BF_DMA_TCDn_CSR_BWC(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_CSR_BWC) & BM_DMA_TCDn_CSR_BWC) @@ -5060,8 +5067,8 @@ #define HW_DMA_TCDn_BITER_ELINKNO_ADDR(x, n) ((x) + 0x101EU + (0x20U * (n))) #define HW_DMA_TCDn_BITER_ELINKNO(x, n) (*(__IO hw_dma_tcdn_biter_elinkno_t *) HW_DMA_TCDn_BITER_ELINKNO_ADDR(x, n)) -#define HW_DMA_TCDn_BITER_ELINKNO_RD(x, n) (HW_DMA_TCDn_BITER_ELINKNO(x, n).U) -#define HW_DMA_TCDn_BITER_ELINKNO_WR(x, n, v) (HW_DMA_TCDn_BITER_ELINKNO(x, n).U = (v)) +#define HW_DMA_TCDn_BITER_ELINKNO_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_biter_elinkno_t, HW_DMA_TCDn_BITER_ELINKNO_ADDR(x, n))) +#define HW_DMA_TCDn_BITER_ELINKNO_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_biter_elinkno_t, HW_DMA_TCDn_BITER_ELINKNO_ADDR(x, n), v)) #define HW_DMA_TCDn_BITER_ELINKNO_SET(x, n, v) (HW_DMA_TCDn_BITER_ELINKNO_WR(x, n, HW_DMA_TCDn_BITER_ELINKNO_RD(x, n) | (v))) #define HW_DMA_TCDn_BITER_ELINKNO_CLR(x, n, v) (HW_DMA_TCDn_BITER_ELINKNO_WR(x, n, HW_DMA_TCDn_BITER_ELINKNO_RD(x, n) & ~(v))) #define HW_DMA_TCDn_BITER_ELINKNO_TOG(x, n, v) (HW_DMA_TCDn_BITER_ELINKNO_WR(x, n, HW_DMA_TCDn_BITER_ELINKNO_RD(x, n) ^ (v))) @@ -5090,7 +5097,7 @@ #define BS_DMA_TCDn_BITER_ELINKNO_BITER (15U) /*!< Bit field size in bits for DMA_TCDn_BITER_ELINKNO_BITER. */ /*! @brief Read current value of the DMA_TCDn_BITER_ELINKNO_BITER field. */ -#define BR_DMA_TCDn_BITER_ELINKNO_BITER(x, n) (HW_DMA_TCDn_BITER_ELINKNO(x, n).B.BITER) +#define BR_DMA_TCDn_BITER_ELINKNO_BITER(x, n) (UNION_READ(hw_dma_tcdn_biter_elinkno_t, HW_DMA_TCDn_BITER_ELINKNO_ADDR(x, n), U, B.BITER)) /*! @brief Format value for bitfield DMA_TCDn_BITER_ELINKNO_BITER. */ #define BF_DMA_TCDn_BITER_ELINKNO_BITER(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_BITER_ELINKNO_BITER) & BM_DMA_TCDn_BITER_ELINKNO_BITER) @@ -5123,13 +5130,13 @@ #define BS_DMA_TCDn_BITER_ELINKNO_ELINK (1U) /*!< Bit field size in bits for DMA_TCDn_BITER_ELINKNO_ELINK. */ /*! @brief Read current value of the DMA_TCDn_BITER_ELINKNO_ELINK field. */ -#define BR_DMA_TCDn_BITER_ELINKNO_ELINK(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_BITER_ELINKNO_ADDR(x, n), BP_DMA_TCDn_BITER_ELINKNO_ELINK)) +#define BR_DMA_TCDn_BITER_ELINKNO_ELINK(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_BITER_ELINKNO_ADDR(x, n), BP_DMA_TCDn_BITER_ELINKNO_ELINK))) /*! @brief Format value for bitfield DMA_TCDn_BITER_ELINKNO_ELINK. */ #define BF_DMA_TCDn_BITER_ELINKNO_ELINK(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_BITER_ELINKNO_ELINK) & BM_DMA_TCDn_BITER_ELINKNO_ELINK) /*! @brief Set the ELINK field to a new value. */ -#define BW_DMA_TCDn_BITER_ELINKNO_ELINK(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_BITER_ELINKNO_ADDR(x, n), BP_DMA_TCDn_BITER_ELINKNO_ELINK) = (v)) +#define BW_DMA_TCDn_BITER_ELINKNO_ELINK(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_BITER_ELINKNO_ADDR(x, n), BP_DMA_TCDn_BITER_ELINKNO_ELINK), v)) /*@}*/ /******************************************************************************* * HW_DMA_TCDn_BITER_ELINKYES - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled) @@ -5165,8 +5172,8 @@ #define HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n) ((x) + 0x101EU + (0x20U * (n))) #define HW_DMA_TCDn_BITER_ELINKYES(x, n) (*(__IO hw_dma_tcdn_biter_elinkyes_t *) HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n)) -#define HW_DMA_TCDn_BITER_ELINKYES_RD(x, n) (HW_DMA_TCDn_BITER_ELINKYES(x, n).U) -#define HW_DMA_TCDn_BITER_ELINKYES_WR(x, n, v) (HW_DMA_TCDn_BITER_ELINKYES(x, n).U = (v)) +#define HW_DMA_TCDn_BITER_ELINKYES_RD(x, n) (ADDRESS_READ(hw_dma_tcdn_biter_elinkyes_t, HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n))) +#define HW_DMA_TCDn_BITER_ELINKYES_WR(x, n, v) (ADDRESS_WRITE(hw_dma_tcdn_biter_elinkyes_t, HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n), v)) #define HW_DMA_TCDn_BITER_ELINKYES_SET(x, n, v) (HW_DMA_TCDn_BITER_ELINKYES_WR(x, n, HW_DMA_TCDn_BITER_ELINKYES_RD(x, n) | (v))) #define HW_DMA_TCDn_BITER_ELINKYES_CLR(x, n, v) (HW_DMA_TCDn_BITER_ELINKYES_WR(x, n, HW_DMA_TCDn_BITER_ELINKYES_RD(x, n) & ~(v))) #define HW_DMA_TCDn_BITER_ELINKYES_TOG(x, n, v) (HW_DMA_TCDn_BITER_ELINKYES_WR(x, n, HW_DMA_TCDn_BITER_ELINKYES_RD(x, n) ^ (v))) @@ -5195,7 +5202,7 @@ #define BS_DMA_TCDn_BITER_ELINKYES_BITER (9U) /*!< Bit field size in bits for DMA_TCDn_BITER_ELINKYES_BITER. */ /*! @brief Read current value of the DMA_TCDn_BITER_ELINKYES_BITER field. */ -#define BR_DMA_TCDn_BITER_ELINKYES_BITER(x, n) (HW_DMA_TCDn_BITER_ELINKYES(x, n).B.BITER) +#define BR_DMA_TCDn_BITER_ELINKYES_BITER(x, n) (UNION_READ(hw_dma_tcdn_biter_elinkyes_t, HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n), U, B.BITER)) /*! @brief Format value for bitfield DMA_TCDn_BITER_ELINKYES_BITER. */ #define BF_DMA_TCDn_BITER_ELINKYES_BITER(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_BITER_ELINKYES_BITER) & BM_DMA_TCDn_BITER_ELINKYES_BITER) @@ -5221,7 +5228,7 @@ #define BS_DMA_TCDn_BITER_ELINKYES_LINKCH (4U) /*!< Bit field size in bits for DMA_TCDn_BITER_ELINKYES_LINKCH. */ /*! @brief Read current value of the DMA_TCDn_BITER_ELINKYES_LINKCH field. */ -#define BR_DMA_TCDn_BITER_ELINKYES_LINKCH(x, n) (HW_DMA_TCDn_BITER_ELINKYES(x, n).B.LINKCH) +#define BR_DMA_TCDn_BITER_ELINKYES_LINKCH(x, n) (UNION_READ(hw_dma_tcdn_biter_elinkyes_t, HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n), U, B.LINKCH)) /*! @brief Format value for bitfield DMA_TCDn_BITER_ELINKYES_LINKCH. */ #define BF_DMA_TCDn_BITER_ELINKYES_LINKCH(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_BITER_ELINKYES_LINKCH) & BM_DMA_TCDn_BITER_ELINKYES_LINKCH) @@ -5254,13 +5261,13 @@ #define BS_DMA_TCDn_BITER_ELINKYES_ELINK (1U) /*!< Bit field size in bits for DMA_TCDn_BITER_ELINKYES_ELINK. */ /*! @brief Read current value of the DMA_TCDn_BITER_ELINKYES_ELINK field. */ -#define BR_DMA_TCDn_BITER_ELINKYES_ELINK(x, n) (BITBAND_ACCESS16(HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n), BP_DMA_TCDn_BITER_ELINKYES_ELINK)) +#define BR_DMA_TCDn_BITER_ELINKYES_ELINK(x, n) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n), BP_DMA_TCDn_BITER_ELINKYES_ELINK))) /*! @brief Format value for bitfield DMA_TCDn_BITER_ELINKYES_ELINK. */ #define BF_DMA_TCDn_BITER_ELINKYES_ELINK(v) ((uint16_t)((uint16_t)(v) << BP_DMA_TCDn_BITER_ELINKYES_ELINK) & BM_DMA_TCDn_BITER_ELINKYES_ELINK) /*! @brief Set the ELINK field to a new value. */ -#define BW_DMA_TCDn_BITER_ELINKYES_ELINK(x, n, v) (BITBAND_ACCESS16(HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n), BP_DMA_TCDn_BITER_ELINKYES_ELINK) = (v)) +#define BW_DMA_TCDn_BITER_ELINKYES_ELINK(x, n, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_DMA_TCDn_BITER_ELINKYES_ADDR(x, n), BP_DMA_TCDn_BITER_ELINKYES_ELINK), v)) /*@}*/ /*
--- a/hal/device/device/MK64F12/MK64F12_dmamux.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_dmamux.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -132,8 +139,8 @@ #define HW_DMAMUX_CHCFGn_ADDR(x, n) ((x) + 0x0U + (0x1U * (n))) #define HW_DMAMUX_CHCFGn(x, n) (*(__IO hw_dmamux_chcfgn_t *) HW_DMAMUX_CHCFGn_ADDR(x, n)) -#define HW_DMAMUX_CHCFGn_RD(x, n) (HW_DMAMUX_CHCFGn(x, n).U) -#define HW_DMAMUX_CHCFGn_WR(x, n, v) (HW_DMAMUX_CHCFGn(x, n).U = (v)) +#define HW_DMAMUX_CHCFGn_RD(x, n) (ADDRESS_READ(hw_dmamux_chcfgn_t, HW_DMAMUX_CHCFGn_ADDR(x, n))) +#define HW_DMAMUX_CHCFGn_WR(x, n, v) (ADDRESS_WRITE(hw_dmamux_chcfgn_t, HW_DMAMUX_CHCFGn_ADDR(x, n), v)) #define HW_DMAMUX_CHCFGn_SET(x, n, v) (HW_DMAMUX_CHCFGn_WR(x, n, HW_DMAMUX_CHCFGn_RD(x, n) | (v))) #define HW_DMAMUX_CHCFGn_CLR(x, n, v) (HW_DMAMUX_CHCFGn_WR(x, n, HW_DMAMUX_CHCFGn_RD(x, n) & ~(v))) #define HW_DMAMUX_CHCFGn_TOG(x, n, v) (HW_DMAMUX_CHCFGn_WR(x, n, HW_DMAMUX_CHCFGn_RD(x, n) ^ (v))) @@ -156,7 +163,7 @@ #define BS_DMAMUX_CHCFGn_SOURCE (6U) /*!< Bit field size in bits for DMAMUX_CHCFGn_SOURCE. */ /*! @brief Read current value of the DMAMUX_CHCFGn_SOURCE field. */ -#define BR_DMAMUX_CHCFGn_SOURCE(x, n) (HW_DMAMUX_CHCFGn(x, n).B.SOURCE) +#define BR_DMAMUX_CHCFGn_SOURCE(x, n) (UNION_READ(hw_dmamux_chcfgn_t, HW_DMAMUX_CHCFGn_ADDR(x, n), U, B.SOURCE)) /*! @brief Format value for bitfield DMAMUX_CHCFGn_SOURCE. */ #define BF_DMAMUX_CHCFGn_SOURCE(v) ((uint8_t)((uint8_t)(v) << BP_DMAMUX_CHCFGn_SOURCE) & BM_DMAMUX_CHCFGn_SOURCE) @@ -183,13 +190,13 @@ #define BS_DMAMUX_CHCFGn_TRIG (1U) /*!< Bit field size in bits for DMAMUX_CHCFGn_TRIG. */ /*! @brief Read current value of the DMAMUX_CHCFGn_TRIG field. */ -#define BR_DMAMUX_CHCFGn_TRIG(x, n) (BITBAND_ACCESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_TRIG)) +#define BR_DMAMUX_CHCFGn_TRIG(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_TRIG))) /*! @brief Format value for bitfield DMAMUX_CHCFGn_TRIG. */ #define BF_DMAMUX_CHCFGn_TRIG(v) ((uint8_t)((uint8_t)(v) << BP_DMAMUX_CHCFGn_TRIG) & BM_DMAMUX_CHCFGn_TRIG) /*! @brief Set the TRIG field to a new value. */ -#define BW_DMAMUX_CHCFGn_TRIG(x, n, v) (BITBAND_ACCESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_TRIG) = (v)) +#define BW_DMAMUX_CHCFGn_TRIG(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_TRIG), v)) /*@}*/ /*! @@ -209,13 +216,13 @@ #define BS_DMAMUX_CHCFGn_ENBL (1U) /*!< Bit field size in bits for DMAMUX_CHCFGn_ENBL. */ /*! @brief Read current value of the DMAMUX_CHCFGn_ENBL field. */ -#define BR_DMAMUX_CHCFGn_ENBL(x, n) (BITBAND_ACCESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_ENBL)) +#define BR_DMAMUX_CHCFGn_ENBL(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_ENBL))) /*! @brief Format value for bitfield DMAMUX_CHCFGn_ENBL. */ #define BF_DMAMUX_CHCFGn_ENBL(v) ((uint8_t)((uint8_t)(v) << BP_DMAMUX_CHCFGn_ENBL) & BM_DMAMUX_CHCFGn_ENBL) /*! @brief Set the ENBL field to a new value. */ -#define BW_DMAMUX_CHCFGn_ENBL(x, n, v) (BITBAND_ACCESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_ENBL) = (v)) +#define BW_DMAMUX_CHCFGn_ENBL(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_ENBL), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_enet.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_enet.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -236,8 +243,8 @@ #define HW_ENET_EIR_ADDR(x) ((x) + 0x4U) #define HW_ENET_EIR(x) (*(__IO hw_enet_eir_t *) HW_ENET_EIR_ADDR(x)) -#define HW_ENET_EIR_RD(x) (HW_ENET_EIR(x).U) -#define HW_ENET_EIR_WR(x, v) (HW_ENET_EIR(x).U = (v)) +#define HW_ENET_EIR_RD(x) (ADDRESS_READ(hw_enet_eir_t, HW_ENET_EIR_ADDR(x))) +#define HW_ENET_EIR_WR(x, v) (ADDRESS_WRITE(hw_enet_eir_t, HW_ENET_EIR_ADDR(x), v)) #define HW_ENET_EIR_SET(x, v) (HW_ENET_EIR_WR(x, HW_ENET_EIR_RD(x) | (v))) #define HW_ENET_EIR_CLR(x, v) (HW_ENET_EIR_WR(x, HW_ENET_EIR_RD(x) & ~(v))) #define HW_ENET_EIR_TOG(x, v) (HW_ENET_EIR_WR(x, HW_ENET_EIR_RD(x) ^ (v))) @@ -261,13 +268,13 @@ #define BS_ENET_EIR_TS_TIMER (1U) /*!< Bit field size in bits for ENET_EIR_TS_TIMER. */ /*! @brief Read current value of the ENET_EIR_TS_TIMER field. */ -#define BR_ENET_EIR_TS_TIMER(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TS_TIMER)) +#define BR_ENET_EIR_TS_TIMER(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TS_TIMER))) /*! @brief Format value for bitfield ENET_EIR_TS_TIMER. */ #define BF_ENET_EIR_TS_TIMER(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_TS_TIMER) & BM_ENET_EIR_TS_TIMER) /*! @brief Set the TS_TIMER field to a new value. */ -#define BW_ENET_EIR_TS_TIMER(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TS_TIMER) = (v)) +#define BW_ENET_EIR_TS_TIMER(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TS_TIMER), v)) /*@}*/ /*! @@ -282,13 +289,13 @@ #define BS_ENET_EIR_TS_AVAIL (1U) /*!< Bit field size in bits for ENET_EIR_TS_AVAIL. */ /*! @brief Read current value of the ENET_EIR_TS_AVAIL field. */ -#define BR_ENET_EIR_TS_AVAIL(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TS_AVAIL)) +#define BR_ENET_EIR_TS_AVAIL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TS_AVAIL))) /*! @brief Format value for bitfield ENET_EIR_TS_AVAIL. */ #define BF_ENET_EIR_TS_AVAIL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_TS_AVAIL) & BM_ENET_EIR_TS_AVAIL) /*! @brief Set the TS_AVAIL field to a new value. */ -#define BW_ENET_EIR_TS_AVAIL(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TS_AVAIL) = (v)) +#define BW_ENET_EIR_TS_AVAIL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TS_AVAIL), v)) /*@}*/ /*! @@ -303,13 +310,13 @@ #define BS_ENET_EIR_WAKEUP (1U) /*!< Bit field size in bits for ENET_EIR_WAKEUP. */ /*! @brief Read current value of the ENET_EIR_WAKEUP field. */ -#define BR_ENET_EIR_WAKEUP(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_WAKEUP)) +#define BR_ENET_EIR_WAKEUP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_WAKEUP))) /*! @brief Format value for bitfield ENET_EIR_WAKEUP. */ #define BF_ENET_EIR_WAKEUP(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_WAKEUP) & BM_ENET_EIR_WAKEUP) /*! @brief Set the WAKEUP field to a new value. */ -#define BW_ENET_EIR_WAKEUP(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_WAKEUP) = (v)) +#define BW_ENET_EIR_WAKEUP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_WAKEUP), v)) /*@}*/ /*! @@ -324,13 +331,13 @@ #define BS_ENET_EIR_PLR (1U) /*!< Bit field size in bits for ENET_EIR_PLR. */ /*! @brief Read current value of the ENET_EIR_PLR field. */ -#define BR_ENET_EIR_PLR(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_PLR)) +#define BR_ENET_EIR_PLR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_PLR))) /*! @brief Format value for bitfield ENET_EIR_PLR. */ #define BF_ENET_EIR_PLR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_PLR) & BM_ENET_EIR_PLR) /*! @brief Set the PLR field to a new value. */ -#define BW_ENET_EIR_PLR(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_PLR) = (v)) +#define BW_ENET_EIR_PLR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_PLR), v)) /*@}*/ /*! @@ -346,13 +353,13 @@ #define BS_ENET_EIR_UN (1U) /*!< Bit field size in bits for ENET_EIR_UN. */ /*! @brief Read current value of the ENET_EIR_UN field. */ -#define BR_ENET_EIR_UN(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_UN)) +#define BR_ENET_EIR_UN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_UN))) /*! @brief Format value for bitfield ENET_EIR_UN. */ #define BF_ENET_EIR_UN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_UN) & BM_ENET_EIR_UN) /*! @brief Set the UN field to a new value. */ -#define BW_ENET_EIR_UN(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_UN) = (v)) +#define BW_ENET_EIR_UN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_UN), v)) /*@}*/ /*! @@ -368,13 +375,13 @@ #define BS_ENET_EIR_RL (1U) /*!< Bit field size in bits for ENET_EIR_RL. */ /*! @brief Read current value of the ENET_EIR_RL field. */ -#define BR_ENET_EIR_RL(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RL)) +#define BR_ENET_EIR_RL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RL))) /*! @brief Format value for bitfield ENET_EIR_RL. */ #define BF_ENET_EIR_RL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_RL) & BM_ENET_EIR_RL) /*! @brief Set the RL field to a new value. */ -#define BW_ENET_EIR_RL(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RL) = (v)) +#define BW_ENET_EIR_RL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RL), v)) /*@}*/ /*! @@ -390,13 +397,13 @@ #define BS_ENET_EIR_LC (1U) /*!< Bit field size in bits for ENET_EIR_LC. */ /*! @brief Read current value of the ENET_EIR_LC field. */ -#define BR_ENET_EIR_LC(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_LC)) +#define BR_ENET_EIR_LC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_LC))) /*! @brief Format value for bitfield ENET_EIR_LC. */ #define BF_ENET_EIR_LC(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_LC) & BM_ENET_EIR_LC) /*! @brief Set the LC field to a new value. */ -#define BW_ENET_EIR_LC(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_LC) = (v)) +#define BW_ENET_EIR_LC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_LC), v)) /*@}*/ /*! @@ -413,13 +420,13 @@ #define BS_ENET_EIR_EBERR (1U) /*!< Bit field size in bits for ENET_EIR_EBERR. */ /*! @brief Read current value of the ENET_EIR_EBERR field. */ -#define BR_ENET_EIR_EBERR(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_EBERR)) +#define BR_ENET_EIR_EBERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_EBERR))) /*! @brief Format value for bitfield ENET_EIR_EBERR. */ #define BF_ENET_EIR_EBERR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_EBERR) & BM_ENET_EIR_EBERR) /*! @brief Set the EBERR field to a new value. */ -#define BW_ENET_EIR_EBERR(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_EBERR) = (v)) +#define BW_ENET_EIR_EBERR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_EBERR), v)) /*@}*/ /*! @@ -433,13 +440,13 @@ #define BS_ENET_EIR_MII (1U) /*!< Bit field size in bits for ENET_EIR_MII. */ /*! @brief Read current value of the ENET_EIR_MII field. */ -#define BR_ENET_EIR_MII(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_MII)) +#define BR_ENET_EIR_MII(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_MII))) /*! @brief Format value for bitfield ENET_EIR_MII. */ #define BF_ENET_EIR_MII(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_MII) & BM_ENET_EIR_MII) /*! @brief Set the MII field to a new value. */ -#define BW_ENET_EIR_MII(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_MII) = (v)) +#define BW_ENET_EIR_MII(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_MII), v)) /*@}*/ /*! @@ -454,13 +461,13 @@ #define BS_ENET_EIR_RXB (1U) /*!< Bit field size in bits for ENET_EIR_RXB. */ /*! @brief Read current value of the ENET_EIR_RXB field. */ -#define BR_ENET_EIR_RXB(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RXB)) +#define BR_ENET_EIR_RXB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RXB))) /*! @brief Format value for bitfield ENET_EIR_RXB. */ #define BF_ENET_EIR_RXB(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_RXB) & BM_ENET_EIR_RXB) /*! @brief Set the RXB field to a new value. */ -#define BW_ENET_EIR_RXB(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RXB) = (v)) +#define BW_ENET_EIR_RXB(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RXB), v)) /*@}*/ /*! @@ -475,13 +482,13 @@ #define BS_ENET_EIR_RXF (1U) /*!< Bit field size in bits for ENET_EIR_RXF. */ /*! @brief Read current value of the ENET_EIR_RXF field. */ -#define BR_ENET_EIR_RXF(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RXF)) +#define BR_ENET_EIR_RXF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RXF))) /*! @brief Format value for bitfield ENET_EIR_RXF. */ #define BF_ENET_EIR_RXF(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_RXF) & BM_ENET_EIR_RXF) /*! @brief Set the RXF field to a new value. */ -#define BW_ENET_EIR_RXF(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RXF) = (v)) +#define BW_ENET_EIR_RXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_RXF), v)) /*@}*/ /*! @@ -495,13 +502,13 @@ #define BS_ENET_EIR_TXB (1U) /*!< Bit field size in bits for ENET_EIR_TXB. */ /*! @brief Read current value of the ENET_EIR_TXB field. */ -#define BR_ENET_EIR_TXB(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TXB)) +#define BR_ENET_EIR_TXB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TXB))) /*! @brief Format value for bitfield ENET_EIR_TXB. */ #define BF_ENET_EIR_TXB(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_TXB) & BM_ENET_EIR_TXB) /*! @brief Set the TXB field to a new value. */ -#define BW_ENET_EIR_TXB(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TXB) = (v)) +#define BW_ENET_EIR_TXB(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TXB), v)) /*@}*/ /*! @@ -516,13 +523,13 @@ #define BS_ENET_EIR_TXF (1U) /*!< Bit field size in bits for ENET_EIR_TXF. */ /*! @brief Read current value of the ENET_EIR_TXF field. */ -#define BR_ENET_EIR_TXF(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TXF)) +#define BR_ENET_EIR_TXF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TXF))) /*! @brief Format value for bitfield ENET_EIR_TXF. */ #define BF_ENET_EIR_TXF(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_TXF) & BM_ENET_EIR_TXF) /*! @brief Set the TXF field to a new value. */ -#define BW_ENET_EIR_TXF(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TXF) = (v)) +#define BW_ENET_EIR_TXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_TXF), v)) /*@}*/ /*! @@ -540,13 +547,13 @@ #define BS_ENET_EIR_GRA (1U) /*!< Bit field size in bits for ENET_EIR_GRA. */ /*! @brief Read current value of the ENET_EIR_GRA field. */ -#define BR_ENET_EIR_GRA(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_GRA)) +#define BR_ENET_EIR_GRA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_GRA))) /*! @brief Format value for bitfield ENET_EIR_GRA. */ #define BF_ENET_EIR_GRA(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_GRA) & BM_ENET_EIR_GRA) /*! @brief Set the GRA field to a new value. */ -#define BW_ENET_EIR_GRA(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_GRA) = (v)) +#define BW_ENET_EIR_GRA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_GRA), v)) /*@}*/ /*! @@ -562,13 +569,13 @@ #define BS_ENET_EIR_BABT (1U) /*!< Bit field size in bits for ENET_EIR_BABT. */ /*! @brief Read current value of the ENET_EIR_BABT field. */ -#define BR_ENET_EIR_BABT(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_BABT)) +#define BR_ENET_EIR_BABT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_BABT))) /*! @brief Format value for bitfield ENET_EIR_BABT. */ #define BF_ENET_EIR_BABT(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_BABT) & BM_ENET_EIR_BABT) /*! @brief Set the BABT field to a new value. */ -#define BW_ENET_EIR_BABT(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_BABT) = (v)) +#define BW_ENET_EIR_BABT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_BABT), v)) /*@}*/ /*! @@ -582,13 +589,13 @@ #define BS_ENET_EIR_BABR (1U) /*!< Bit field size in bits for ENET_EIR_BABR. */ /*! @brief Read current value of the ENET_EIR_BABR field. */ -#define BR_ENET_EIR_BABR(x) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_BABR)) +#define BR_ENET_EIR_BABR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_BABR))) /*! @brief Format value for bitfield ENET_EIR_BABR. */ #define BF_ENET_EIR_BABR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIR_BABR) & BM_ENET_EIR_BABR) /*! @brief Set the BABR field to a new value. */ -#define BW_ENET_EIR_BABR(x, v) (BITBAND_ACCESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_BABR) = (v)) +#define BW_ENET_EIR_BABR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIR_ADDR(x), BP_ENET_EIR_BABR), v)) /*@}*/ /******************************************************************************* @@ -639,8 +646,8 @@ #define HW_ENET_EIMR_ADDR(x) ((x) + 0x8U) #define HW_ENET_EIMR(x) (*(__IO hw_enet_eimr_t *) HW_ENET_EIMR_ADDR(x)) -#define HW_ENET_EIMR_RD(x) (HW_ENET_EIMR(x).U) -#define HW_ENET_EIMR_WR(x, v) (HW_ENET_EIMR(x).U = (v)) +#define HW_ENET_EIMR_RD(x) (ADDRESS_READ(hw_enet_eimr_t, HW_ENET_EIMR_ADDR(x))) +#define HW_ENET_EIMR_WR(x, v) (ADDRESS_WRITE(hw_enet_eimr_t, HW_ENET_EIMR_ADDR(x), v)) #define HW_ENET_EIMR_SET(x, v) (HW_ENET_EIMR_WR(x, HW_ENET_EIMR_RD(x) | (v))) #define HW_ENET_EIMR_CLR(x, v) (HW_ENET_EIMR_WR(x, HW_ENET_EIMR_RD(x) & ~(v))) #define HW_ENET_EIMR_TOG(x, v) (HW_ENET_EIMR_WR(x, HW_ENET_EIMR_RD(x) ^ (v))) @@ -665,13 +672,13 @@ #define BS_ENET_EIMR_TS_TIMER (1U) /*!< Bit field size in bits for ENET_EIMR_TS_TIMER. */ /*! @brief Read current value of the ENET_EIMR_TS_TIMER field. */ -#define BR_ENET_EIMR_TS_TIMER(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TS_TIMER)) +#define BR_ENET_EIMR_TS_TIMER(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TS_TIMER))) /*! @brief Format value for bitfield ENET_EIMR_TS_TIMER. */ #define BF_ENET_EIMR_TS_TIMER(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_TS_TIMER) & BM_ENET_EIMR_TS_TIMER) /*! @brief Set the TS_TIMER field to a new value. */ -#define BW_ENET_EIMR_TS_TIMER(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TS_TIMER) = (v)) +#define BW_ENET_EIMR_TS_TIMER(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TS_TIMER), v)) /*@}*/ /*! @@ -689,13 +696,13 @@ #define BS_ENET_EIMR_TS_AVAIL (1U) /*!< Bit field size in bits for ENET_EIMR_TS_AVAIL. */ /*! @brief Read current value of the ENET_EIMR_TS_AVAIL field. */ -#define BR_ENET_EIMR_TS_AVAIL(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TS_AVAIL)) +#define BR_ENET_EIMR_TS_AVAIL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TS_AVAIL))) /*! @brief Format value for bitfield ENET_EIMR_TS_AVAIL. */ #define BF_ENET_EIMR_TS_AVAIL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_TS_AVAIL) & BM_ENET_EIMR_TS_AVAIL) /*! @brief Set the TS_AVAIL field to a new value. */ -#define BW_ENET_EIMR_TS_AVAIL(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TS_AVAIL) = (v)) +#define BW_ENET_EIMR_TS_AVAIL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TS_AVAIL), v)) /*@}*/ /*! @@ -713,13 +720,13 @@ #define BS_ENET_EIMR_WAKEUP (1U) /*!< Bit field size in bits for ENET_EIMR_WAKEUP. */ /*! @brief Read current value of the ENET_EIMR_WAKEUP field. */ -#define BR_ENET_EIMR_WAKEUP(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_WAKEUP)) +#define BR_ENET_EIMR_WAKEUP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_WAKEUP))) /*! @brief Format value for bitfield ENET_EIMR_WAKEUP. */ #define BF_ENET_EIMR_WAKEUP(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_WAKEUP) & BM_ENET_EIMR_WAKEUP) /*! @brief Set the WAKEUP field to a new value. */ -#define BW_ENET_EIMR_WAKEUP(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_WAKEUP) = (v)) +#define BW_ENET_EIMR_WAKEUP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_WAKEUP), v)) /*@}*/ /*! @@ -737,13 +744,13 @@ #define BS_ENET_EIMR_PLR (1U) /*!< Bit field size in bits for ENET_EIMR_PLR. */ /*! @brief Read current value of the ENET_EIMR_PLR field. */ -#define BR_ENET_EIMR_PLR(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_PLR)) +#define BR_ENET_EIMR_PLR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_PLR))) /*! @brief Format value for bitfield ENET_EIMR_PLR. */ #define BF_ENET_EIMR_PLR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_PLR) & BM_ENET_EIMR_PLR) /*! @brief Set the PLR field to a new value. */ -#define BW_ENET_EIMR_PLR(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_PLR) = (v)) +#define BW_ENET_EIMR_PLR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_PLR), v)) /*@}*/ /*! @@ -761,13 +768,13 @@ #define BS_ENET_EIMR_UN (1U) /*!< Bit field size in bits for ENET_EIMR_UN. */ /*! @brief Read current value of the ENET_EIMR_UN field. */ -#define BR_ENET_EIMR_UN(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_UN)) +#define BR_ENET_EIMR_UN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_UN))) /*! @brief Format value for bitfield ENET_EIMR_UN. */ #define BF_ENET_EIMR_UN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_UN) & BM_ENET_EIMR_UN) /*! @brief Set the UN field to a new value. */ -#define BW_ENET_EIMR_UN(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_UN) = (v)) +#define BW_ENET_EIMR_UN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_UN), v)) /*@}*/ /*! @@ -785,13 +792,13 @@ #define BS_ENET_EIMR_RL (1U) /*!< Bit field size in bits for ENET_EIMR_RL. */ /*! @brief Read current value of the ENET_EIMR_RL field. */ -#define BR_ENET_EIMR_RL(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RL)) +#define BR_ENET_EIMR_RL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RL))) /*! @brief Format value for bitfield ENET_EIMR_RL. */ #define BF_ENET_EIMR_RL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_RL) & BM_ENET_EIMR_RL) /*! @brief Set the RL field to a new value. */ -#define BW_ENET_EIMR_RL(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RL) = (v)) +#define BW_ENET_EIMR_RL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RL), v)) /*@}*/ /*! @@ -809,13 +816,13 @@ #define BS_ENET_EIMR_LC (1U) /*!< Bit field size in bits for ENET_EIMR_LC. */ /*! @brief Read current value of the ENET_EIMR_LC field. */ -#define BR_ENET_EIMR_LC(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_LC)) +#define BR_ENET_EIMR_LC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_LC))) /*! @brief Format value for bitfield ENET_EIMR_LC. */ #define BF_ENET_EIMR_LC(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_LC) & BM_ENET_EIMR_LC) /*! @brief Set the LC field to a new value. */ -#define BW_ENET_EIMR_LC(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_LC) = (v)) +#define BW_ENET_EIMR_LC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_LC), v)) /*@}*/ /*! @@ -833,13 +840,13 @@ #define BS_ENET_EIMR_EBERR (1U) /*!< Bit field size in bits for ENET_EIMR_EBERR. */ /*! @brief Read current value of the ENET_EIMR_EBERR field. */ -#define BR_ENET_EIMR_EBERR(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_EBERR)) +#define BR_ENET_EIMR_EBERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_EBERR))) /*! @brief Format value for bitfield ENET_EIMR_EBERR. */ #define BF_ENET_EIMR_EBERR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_EBERR) & BM_ENET_EIMR_EBERR) /*! @brief Set the EBERR field to a new value. */ -#define BW_ENET_EIMR_EBERR(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_EBERR) = (v)) +#define BW_ENET_EIMR_EBERR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_EBERR), v)) /*@}*/ /*! @@ -857,13 +864,13 @@ #define BS_ENET_EIMR_MII (1U) /*!< Bit field size in bits for ENET_EIMR_MII. */ /*! @brief Read current value of the ENET_EIMR_MII field. */ -#define BR_ENET_EIMR_MII(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_MII)) +#define BR_ENET_EIMR_MII(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_MII))) /*! @brief Format value for bitfield ENET_EIMR_MII. */ #define BF_ENET_EIMR_MII(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_MII) & BM_ENET_EIMR_MII) /*! @brief Set the MII field to a new value. */ -#define BW_ENET_EIMR_MII(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_MII) = (v)) +#define BW_ENET_EIMR_MII(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_MII), v)) /*@}*/ /*! @@ -881,13 +888,13 @@ #define BS_ENET_EIMR_RXB (1U) /*!< Bit field size in bits for ENET_EIMR_RXB. */ /*! @brief Read current value of the ENET_EIMR_RXB field. */ -#define BR_ENET_EIMR_RXB(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RXB)) +#define BR_ENET_EIMR_RXB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RXB))) /*! @brief Format value for bitfield ENET_EIMR_RXB. */ #define BF_ENET_EIMR_RXB(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_RXB) & BM_ENET_EIMR_RXB) /*! @brief Set the RXB field to a new value. */ -#define BW_ENET_EIMR_RXB(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RXB) = (v)) +#define BW_ENET_EIMR_RXB(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RXB), v)) /*@}*/ /*! @@ -905,13 +912,13 @@ #define BS_ENET_EIMR_RXF (1U) /*!< Bit field size in bits for ENET_EIMR_RXF. */ /*! @brief Read current value of the ENET_EIMR_RXF field. */ -#define BR_ENET_EIMR_RXF(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RXF)) +#define BR_ENET_EIMR_RXF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RXF))) /*! @brief Format value for bitfield ENET_EIMR_RXF. */ #define BF_ENET_EIMR_RXF(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_RXF) & BM_ENET_EIMR_RXF) /*! @brief Set the RXF field to a new value. */ -#define BW_ENET_EIMR_RXF(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RXF) = (v)) +#define BW_ENET_EIMR_RXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_RXF), v)) /*@}*/ /*! @@ -933,13 +940,13 @@ #define BS_ENET_EIMR_TXB (1U) /*!< Bit field size in bits for ENET_EIMR_TXB. */ /*! @brief Read current value of the ENET_EIMR_TXB field. */ -#define BR_ENET_EIMR_TXB(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TXB)) +#define BR_ENET_EIMR_TXB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TXB))) /*! @brief Format value for bitfield ENET_EIMR_TXB. */ #define BF_ENET_EIMR_TXB(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_TXB) & BM_ENET_EIMR_TXB) /*! @brief Set the TXB field to a new value. */ -#define BW_ENET_EIMR_TXB(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TXB) = (v)) +#define BW_ENET_EIMR_TXB(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TXB), v)) /*@}*/ /*! @@ -961,13 +968,13 @@ #define BS_ENET_EIMR_TXF (1U) /*!< Bit field size in bits for ENET_EIMR_TXF. */ /*! @brief Read current value of the ENET_EIMR_TXF field. */ -#define BR_ENET_EIMR_TXF(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TXF)) +#define BR_ENET_EIMR_TXF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TXF))) /*! @brief Format value for bitfield ENET_EIMR_TXF. */ #define BF_ENET_EIMR_TXF(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_TXF) & BM_ENET_EIMR_TXF) /*! @brief Set the TXF field to a new value. */ -#define BW_ENET_EIMR_TXF(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TXF) = (v)) +#define BW_ENET_EIMR_TXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_TXF), v)) /*@}*/ /*! @@ -989,13 +996,13 @@ #define BS_ENET_EIMR_GRA (1U) /*!< Bit field size in bits for ENET_EIMR_GRA. */ /*! @brief Read current value of the ENET_EIMR_GRA field. */ -#define BR_ENET_EIMR_GRA(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_GRA)) +#define BR_ENET_EIMR_GRA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_GRA))) /*! @brief Format value for bitfield ENET_EIMR_GRA. */ #define BF_ENET_EIMR_GRA(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_GRA) & BM_ENET_EIMR_GRA) /*! @brief Set the GRA field to a new value. */ -#define BW_ENET_EIMR_GRA(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_GRA) = (v)) +#define BW_ENET_EIMR_GRA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_GRA), v)) /*@}*/ /*! @@ -1017,13 +1024,13 @@ #define BS_ENET_EIMR_BABT (1U) /*!< Bit field size in bits for ENET_EIMR_BABT. */ /*! @brief Read current value of the ENET_EIMR_BABT field. */ -#define BR_ENET_EIMR_BABT(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_BABT)) +#define BR_ENET_EIMR_BABT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_BABT))) /*! @brief Format value for bitfield ENET_EIMR_BABT. */ #define BF_ENET_EIMR_BABT(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_BABT) & BM_ENET_EIMR_BABT) /*! @brief Set the BABT field to a new value. */ -#define BW_ENET_EIMR_BABT(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_BABT) = (v)) +#define BW_ENET_EIMR_BABT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_BABT), v)) /*@}*/ /*! @@ -1045,13 +1052,13 @@ #define BS_ENET_EIMR_BABR (1U) /*!< Bit field size in bits for ENET_EIMR_BABR. */ /*! @brief Read current value of the ENET_EIMR_BABR field. */ -#define BR_ENET_EIMR_BABR(x) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_BABR)) +#define BR_ENET_EIMR_BABR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_BABR))) /*! @brief Format value for bitfield ENET_EIMR_BABR. */ #define BF_ENET_EIMR_BABR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_EIMR_BABR) & BM_ENET_EIMR_BABR) /*! @brief Set the BABR field to a new value. */ -#define BW_ENET_EIMR_BABR(x, v) (BITBAND_ACCESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_BABR) = (v)) +#define BW_ENET_EIMR_BABR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_EIMR_ADDR(x), BP_ENET_EIMR_BABR), v)) /*@}*/ /******************************************************************************* @@ -1085,8 +1092,8 @@ #define HW_ENET_RDAR_ADDR(x) ((x) + 0x10U) #define HW_ENET_RDAR(x) (*(__IO hw_enet_rdar_t *) HW_ENET_RDAR_ADDR(x)) -#define HW_ENET_RDAR_RD(x) (HW_ENET_RDAR(x).U) -#define HW_ENET_RDAR_WR(x, v) (HW_ENET_RDAR(x).U = (v)) +#define HW_ENET_RDAR_RD(x) (ADDRESS_READ(hw_enet_rdar_t, HW_ENET_RDAR_ADDR(x))) +#define HW_ENET_RDAR_WR(x, v) (ADDRESS_WRITE(hw_enet_rdar_t, HW_ENET_RDAR_ADDR(x), v)) #define HW_ENET_RDAR_SET(x, v) (HW_ENET_RDAR_WR(x, HW_ENET_RDAR_RD(x) | (v))) #define HW_ENET_RDAR_CLR(x, v) (HW_ENET_RDAR_WR(x, HW_ENET_RDAR_RD(x) & ~(v))) #define HW_ENET_RDAR_TOG(x, v) (HW_ENET_RDAR_WR(x, HW_ENET_RDAR_RD(x) ^ (v))) @@ -1110,13 +1117,13 @@ #define BS_ENET_RDAR_RDAR (1U) /*!< Bit field size in bits for ENET_RDAR_RDAR. */ /*! @brief Read current value of the ENET_RDAR_RDAR field. */ -#define BR_ENET_RDAR_RDAR(x) (BITBAND_ACCESS32(HW_ENET_RDAR_ADDR(x), BP_ENET_RDAR_RDAR)) +#define BR_ENET_RDAR_RDAR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RDAR_ADDR(x), BP_ENET_RDAR_RDAR))) /*! @brief Format value for bitfield ENET_RDAR_RDAR. */ #define BF_ENET_RDAR_RDAR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RDAR_RDAR) & BM_ENET_RDAR_RDAR) /*! @brief Set the RDAR field to a new value. */ -#define BW_ENET_RDAR_RDAR(x, v) (BITBAND_ACCESS32(HW_ENET_RDAR_ADDR(x), BP_ENET_RDAR_RDAR) = (v)) +#define BW_ENET_RDAR_RDAR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RDAR_ADDR(x), BP_ENET_RDAR_RDAR), v)) /*@}*/ /******************************************************************************* @@ -1152,8 +1159,8 @@ #define HW_ENET_TDAR_ADDR(x) ((x) + 0x14U) #define HW_ENET_TDAR(x) (*(__IO hw_enet_tdar_t *) HW_ENET_TDAR_ADDR(x)) -#define HW_ENET_TDAR_RD(x) (HW_ENET_TDAR(x).U) -#define HW_ENET_TDAR_WR(x, v) (HW_ENET_TDAR(x).U = (v)) +#define HW_ENET_TDAR_RD(x) (ADDRESS_READ(hw_enet_tdar_t, HW_ENET_TDAR_ADDR(x))) +#define HW_ENET_TDAR_WR(x, v) (ADDRESS_WRITE(hw_enet_tdar_t, HW_ENET_TDAR_ADDR(x), v)) #define HW_ENET_TDAR_SET(x, v) (HW_ENET_TDAR_WR(x, HW_ENET_TDAR_RD(x) | (v))) #define HW_ENET_TDAR_CLR(x, v) (HW_ENET_TDAR_WR(x, HW_ENET_TDAR_RD(x) & ~(v))) #define HW_ENET_TDAR_TOG(x, v) (HW_ENET_TDAR_WR(x, HW_ENET_TDAR_RD(x) ^ (v))) @@ -1177,13 +1184,13 @@ #define BS_ENET_TDAR_TDAR (1U) /*!< Bit field size in bits for ENET_TDAR_TDAR. */ /*! @brief Read current value of the ENET_TDAR_TDAR field. */ -#define BR_ENET_TDAR_TDAR(x) (BITBAND_ACCESS32(HW_ENET_TDAR_ADDR(x), BP_ENET_TDAR_TDAR)) +#define BR_ENET_TDAR_TDAR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TDAR_ADDR(x), BP_ENET_TDAR_TDAR))) /*! @brief Format value for bitfield ENET_TDAR_TDAR. */ #define BF_ENET_TDAR_TDAR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TDAR_TDAR) & BM_ENET_TDAR_TDAR) /*! @brief Set the TDAR field to a new value. */ -#define BW_ENET_TDAR_TDAR(x, v) (BITBAND_ACCESS32(HW_ENET_TDAR_ADDR(x), BP_ENET_TDAR_TDAR) = (v)) +#define BW_ENET_TDAR_TDAR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TDAR_ADDR(x), BP_ENET_TDAR_TDAR), v)) /*@}*/ /******************************************************************************* @@ -1224,8 +1231,8 @@ #define HW_ENET_ECR_ADDR(x) ((x) + 0x24U) #define HW_ENET_ECR(x) (*(__IO hw_enet_ecr_t *) HW_ENET_ECR_ADDR(x)) -#define HW_ENET_ECR_RD(x) (HW_ENET_ECR(x).U) -#define HW_ENET_ECR_WR(x, v) (HW_ENET_ECR(x).U = (v)) +#define HW_ENET_ECR_RD(x) (ADDRESS_READ(hw_enet_ecr_t, HW_ENET_ECR_ADDR(x))) +#define HW_ENET_ECR_WR(x, v) (ADDRESS_WRITE(hw_enet_ecr_t, HW_ENET_ECR_ADDR(x), v)) #define HW_ENET_ECR_SET(x, v) (HW_ENET_ECR_WR(x, HW_ENET_ECR_RD(x) | (v))) #define HW_ENET_ECR_CLR(x, v) (HW_ENET_ECR_WR(x, HW_ENET_ECR_RD(x) & ~(v))) #define HW_ENET_ECR_TOG(x, v) (HW_ENET_ECR_WR(x, HW_ENET_ECR_RD(x) ^ (v))) @@ -1246,13 +1253,13 @@ #define BS_ENET_ECR_RESET (1U) /*!< Bit field size in bits for ENET_ECR_RESET. */ /*! @brief Read current value of the ENET_ECR_RESET field. */ -#define BR_ENET_ECR_RESET(x) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_RESET)) +#define BR_ENET_ECR_RESET(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_RESET))) /*! @brief Format value for bitfield ENET_ECR_RESET. */ #define BF_ENET_ECR_RESET(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ECR_RESET) & BM_ENET_ECR_RESET) /*! @brief Set the RESET field to a new value. */ -#define BW_ENET_ECR_RESET(x, v) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_RESET) = (v)) +#define BW_ENET_ECR_RESET(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_RESET), v)) /*@}*/ /*! @@ -1279,13 +1286,13 @@ #define BS_ENET_ECR_ETHEREN (1U) /*!< Bit field size in bits for ENET_ECR_ETHEREN. */ /*! @brief Read current value of the ENET_ECR_ETHEREN field. */ -#define BR_ENET_ECR_ETHEREN(x) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_ETHEREN)) +#define BR_ENET_ECR_ETHEREN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_ETHEREN))) /*! @brief Format value for bitfield ENET_ECR_ETHEREN. */ #define BF_ENET_ECR_ETHEREN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ECR_ETHEREN) & BM_ENET_ECR_ETHEREN) /*! @brief Set the ETHEREN field to a new value. */ -#define BW_ENET_ECR_ETHEREN(x, v) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_ETHEREN) = (v)) +#define BW_ENET_ECR_ETHEREN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_ETHEREN), v)) /*@}*/ /*! @@ -1306,13 +1313,13 @@ #define BS_ENET_ECR_MAGICEN (1U) /*!< Bit field size in bits for ENET_ECR_MAGICEN. */ /*! @brief Read current value of the ENET_ECR_MAGICEN field. */ -#define BR_ENET_ECR_MAGICEN(x) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_MAGICEN)) +#define BR_ENET_ECR_MAGICEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_MAGICEN))) /*! @brief Format value for bitfield ENET_ECR_MAGICEN. */ #define BF_ENET_ECR_MAGICEN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ECR_MAGICEN) & BM_ENET_ECR_MAGICEN) /*! @brief Set the MAGICEN field to a new value. */ -#define BW_ENET_ECR_MAGICEN(x, v) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_MAGICEN) = (v)) +#define BW_ENET_ECR_MAGICEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_MAGICEN), v)) /*@}*/ /*! @@ -1328,13 +1335,13 @@ #define BS_ENET_ECR_SLEEP (1U) /*!< Bit field size in bits for ENET_ECR_SLEEP. */ /*! @brief Read current value of the ENET_ECR_SLEEP field. */ -#define BR_ENET_ECR_SLEEP(x) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_SLEEP)) +#define BR_ENET_ECR_SLEEP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_SLEEP))) /*! @brief Format value for bitfield ENET_ECR_SLEEP. */ #define BF_ENET_ECR_SLEEP(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ECR_SLEEP) & BM_ENET_ECR_SLEEP) /*! @brief Set the SLEEP field to a new value. */ -#define BW_ENET_ECR_SLEEP(x, v) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_SLEEP) = (v)) +#define BW_ENET_ECR_SLEEP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_SLEEP), v)) /*@}*/ /*! @@ -1352,13 +1359,13 @@ #define BS_ENET_ECR_EN1588 (1U) /*!< Bit field size in bits for ENET_ECR_EN1588. */ /*! @brief Read current value of the ENET_ECR_EN1588 field. */ -#define BR_ENET_ECR_EN1588(x) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_EN1588)) +#define BR_ENET_ECR_EN1588(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_EN1588))) /*! @brief Format value for bitfield ENET_ECR_EN1588. */ #define BF_ENET_ECR_EN1588(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ECR_EN1588) & BM_ENET_ECR_EN1588) /*! @brief Set the EN1588 field to a new value. */ -#define BW_ENET_ECR_EN1588(x, v) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_EN1588) = (v)) +#define BW_ENET_ECR_EN1588(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_EN1588), v)) /*@}*/ /*! @@ -1377,13 +1384,13 @@ #define BS_ENET_ECR_DBGEN (1U) /*!< Bit field size in bits for ENET_ECR_DBGEN. */ /*! @brief Read current value of the ENET_ECR_DBGEN field. */ -#define BR_ENET_ECR_DBGEN(x) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_DBGEN)) +#define BR_ENET_ECR_DBGEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_DBGEN))) /*! @brief Format value for bitfield ENET_ECR_DBGEN. */ #define BF_ENET_ECR_DBGEN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ECR_DBGEN) & BM_ENET_ECR_DBGEN) /*! @brief Set the DBGEN field to a new value. */ -#define BW_ENET_ECR_DBGEN(x, v) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_DBGEN) = (v)) +#define BW_ENET_ECR_DBGEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_DBGEN), v)) /*@}*/ /*! @@ -1402,13 +1409,13 @@ #define BS_ENET_ECR_STOPEN (1U) /*!< Bit field size in bits for ENET_ECR_STOPEN. */ /*! @brief Read current value of the ENET_ECR_STOPEN field. */ -#define BR_ENET_ECR_STOPEN(x) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_STOPEN)) +#define BR_ENET_ECR_STOPEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_STOPEN))) /*! @brief Format value for bitfield ENET_ECR_STOPEN. */ #define BF_ENET_ECR_STOPEN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ECR_STOPEN) & BM_ENET_ECR_STOPEN) /*! @brief Set the STOPEN field to a new value. */ -#define BW_ENET_ECR_STOPEN(x, v) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_STOPEN) = (v)) +#define BW_ENET_ECR_STOPEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_STOPEN), v)) /*@}*/ /*! @@ -1429,13 +1436,13 @@ #define BS_ENET_ECR_DBSWP (1U) /*!< Bit field size in bits for ENET_ECR_DBSWP. */ /*! @brief Read current value of the ENET_ECR_DBSWP field. */ -#define BR_ENET_ECR_DBSWP(x) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_DBSWP)) +#define BR_ENET_ECR_DBSWP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_DBSWP))) /*! @brief Format value for bitfield ENET_ECR_DBSWP. */ #define BF_ENET_ECR_DBSWP(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ECR_DBSWP) & BM_ENET_ECR_DBSWP) /*! @brief Set the DBSWP field to a new value. */ -#define BW_ENET_ECR_DBSWP(x, v) (BITBAND_ACCESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_DBSWP) = (v)) +#define BW_ENET_ECR_DBSWP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ECR_ADDR(x), BP_ENET_ECR_DBSWP), v)) /*@}*/ /******************************************************************************* @@ -1477,8 +1484,8 @@ #define HW_ENET_MMFR_ADDR(x) ((x) + 0x40U) #define HW_ENET_MMFR(x) (*(__IO hw_enet_mmfr_t *) HW_ENET_MMFR_ADDR(x)) -#define HW_ENET_MMFR_RD(x) (HW_ENET_MMFR(x).U) -#define HW_ENET_MMFR_WR(x, v) (HW_ENET_MMFR(x).U = (v)) +#define HW_ENET_MMFR_RD(x) (ADDRESS_READ(hw_enet_mmfr_t, HW_ENET_MMFR_ADDR(x))) +#define HW_ENET_MMFR_WR(x, v) (ADDRESS_WRITE(hw_enet_mmfr_t, HW_ENET_MMFR_ADDR(x), v)) #define HW_ENET_MMFR_SET(x, v) (HW_ENET_MMFR_WR(x, HW_ENET_MMFR_RD(x) | (v))) #define HW_ENET_MMFR_CLR(x, v) (HW_ENET_MMFR_WR(x, HW_ENET_MMFR_RD(x) & ~(v))) #define HW_ENET_MMFR_TOG(x, v) (HW_ENET_MMFR_WR(x, HW_ENET_MMFR_RD(x) ^ (v))) @@ -1499,7 +1506,7 @@ #define BS_ENET_MMFR_DATA (16U) /*!< Bit field size in bits for ENET_MMFR_DATA. */ /*! @brief Read current value of the ENET_MMFR_DATA field. */ -#define BR_ENET_MMFR_DATA(x) (HW_ENET_MMFR(x).B.DATA) +#define BR_ENET_MMFR_DATA(x) (UNION_READ(hw_enet_mmfr_t, HW_ENET_MMFR_ADDR(x), U, B.DATA)) /*! @brief Format value for bitfield ENET_MMFR_DATA. */ #define BF_ENET_MMFR_DATA(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MMFR_DATA) & BM_ENET_MMFR_DATA) @@ -1519,7 +1526,7 @@ #define BS_ENET_MMFR_TA (2U) /*!< Bit field size in bits for ENET_MMFR_TA. */ /*! @brief Read current value of the ENET_MMFR_TA field. */ -#define BR_ENET_MMFR_TA(x) (HW_ENET_MMFR(x).B.TA) +#define BR_ENET_MMFR_TA(x) (UNION_READ(hw_enet_mmfr_t, HW_ENET_MMFR_ADDR(x), U, B.TA)) /*! @brief Format value for bitfield ENET_MMFR_TA. */ #define BF_ENET_MMFR_TA(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MMFR_TA) & BM_ENET_MMFR_TA) @@ -1539,7 +1546,7 @@ #define BS_ENET_MMFR_RA (5U) /*!< Bit field size in bits for ENET_MMFR_RA. */ /*! @brief Read current value of the ENET_MMFR_RA field. */ -#define BR_ENET_MMFR_RA(x) (HW_ENET_MMFR(x).B.RA) +#define BR_ENET_MMFR_RA(x) (UNION_READ(hw_enet_mmfr_t, HW_ENET_MMFR_ADDR(x), U, B.RA)) /*! @brief Format value for bitfield ENET_MMFR_RA. */ #define BF_ENET_MMFR_RA(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MMFR_RA) & BM_ENET_MMFR_RA) @@ -1559,7 +1566,7 @@ #define BS_ENET_MMFR_PA (5U) /*!< Bit field size in bits for ENET_MMFR_PA. */ /*! @brief Read current value of the ENET_MMFR_PA field. */ -#define BR_ENET_MMFR_PA(x) (HW_ENET_MMFR(x).B.PA) +#define BR_ENET_MMFR_PA(x) (UNION_READ(hw_enet_mmfr_t, HW_ENET_MMFR_ADDR(x), U, B.PA)) /*! @brief Format value for bitfield ENET_MMFR_PA. */ #define BF_ENET_MMFR_PA(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MMFR_PA) & BM_ENET_MMFR_PA) @@ -1585,7 +1592,7 @@ #define BS_ENET_MMFR_OP (2U) /*!< Bit field size in bits for ENET_MMFR_OP. */ /*! @brief Read current value of the ENET_MMFR_OP field. */ -#define BR_ENET_MMFR_OP(x) (HW_ENET_MMFR(x).B.OP) +#define BR_ENET_MMFR_OP(x) (UNION_READ(hw_enet_mmfr_t, HW_ENET_MMFR_ADDR(x), U, B.OP)) /*! @brief Format value for bitfield ENET_MMFR_OP. */ #define BF_ENET_MMFR_OP(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MMFR_OP) & BM_ENET_MMFR_OP) @@ -1605,7 +1612,7 @@ #define BS_ENET_MMFR_ST (2U) /*!< Bit field size in bits for ENET_MMFR_ST. */ /*! @brief Read current value of the ENET_MMFR_ST field. */ -#define BR_ENET_MMFR_ST(x) (HW_ENET_MMFR(x).B.ST) +#define BR_ENET_MMFR_ST(x) (UNION_READ(hw_enet_mmfr_t, HW_ENET_MMFR_ADDR(x), U, B.ST)) /*! @brief Format value for bitfield ENET_MMFR_ST. */ #define BF_ENET_MMFR_ST(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MMFR_ST) & BM_ENET_MMFR_ST) @@ -1659,8 +1666,8 @@ #define HW_ENET_MSCR_ADDR(x) ((x) + 0x44U) #define HW_ENET_MSCR(x) (*(__IO hw_enet_mscr_t *) HW_ENET_MSCR_ADDR(x)) -#define HW_ENET_MSCR_RD(x) (HW_ENET_MSCR(x).U) -#define HW_ENET_MSCR_WR(x, v) (HW_ENET_MSCR(x).U = (v)) +#define HW_ENET_MSCR_RD(x) (ADDRESS_READ(hw_enet_mscr_t, HW_ENET_MSCR_ADDR(x))) +#define HW_ENET_MSCR_WR(x, v) (ADDRESS_WRITE(hw_enet_mscr_t, HW_ENET_MSCR_ADDR(x), v)) #define HW_ENET_MSCR_SET(x, v) (HW_ENET_MSCR_WR(x, HW_ENET_MSCR_RD(x) | (v))) #define HW_ENET_MSCR_CLR(x, v) (HW_ENET_MSCR_WR(x, HW_ENET_MSCR_RD(x) & ~(v))) #define HW_ENET_MSCR_TOG(x, v) (HW_ENET_MSCR_WR(x, HW_ENET_MSCR_RD(x) ^ (v))) @@ -1684,7 +1691,7 @@ #define BS_ENET_MSCR_MII_SPEED (6U) /*!< Bit field size in bits for ENET_MSCR_MII_SPEED. */ /*! @brief Read current value of the ENET_MSCR_MII_SPEED field. */ -#define BR_ENET_MSCR_MII_SPEED(x) (HW_ENET_MSCR(x).B.MII_SPEED) +#define BR_ENET_MSCR_MII_SPEED(x) (UNION_READ(hw_enet_mscr_t, HW_ENET_MSCR_ADDR(x), U, B.MII_SPEED)) /*! @brief Format value for bitfield ENET_MSCR_MII_SPEED. */ #define BF_ENET_MSCR_MII_SPEED(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MSCR_MII_SPEED) & BM_ENET_MSCR_MII_SPEED) @@ -1710,13 +1717,13 @@ #define BS_ENET_MSCR_DIS_PRE (1U) /*!< Bit field size in bits for ENET_MSCR_DIS_PRE. */ /*! @brief Read current value of the ENET_MSCR_DIS_PRE field. */ -#define BR_ENET_MSCR_DIS_PRE(x) (BITBAND_ACCESS32(HW_ENET_MSCR_ADDR(x), BP_ENET_MSCR_DIS_PRE)) +#define BR_ENET_MSCR_DIS_PRE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_MSCR_ADDR(x), BP_ENET_MSCR_DIS_PRE))) /*! @brief Format value for bitfield ENET_MSCR_DIS_PRE. */ #define BF_ENET_MSCR_DIS_PRE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MSCR_DIS_PRE) & BM_ENET_MSCR_DIS_PRE) /*! @brief Set the DIS_PRE field to a new value. */ -#define BW_ENET_MSCR_DIS_PRE(x, v) (BITBAND_ACCESS32(HW_ENET_MSCR_ADDR(x), BP_ENET_MSCR_DIS_PRE) = (v)) +#define BW_ENET_MSCR_DIS_PRE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_MSCR_ADDR(x), BP_ENET_MSCR_DIS_PRE), v)) /*@}*/ /*! @@ -1738,7 +1745,7 @@ #define BS_ENET_MSCR_HOLDTIME (3U) /*!< Bit field size in bits for ENET_MSCR_HOLDTIME. */ /*! @brief Read current value of the ENET_MSCR_HOLDTIME field. */ -#define BR_ENET_MSCR_HOLDTIME(x) (HW_ENET_MSCR(x).B.HOLDTIME) +#define BR_ENET_MSCR_HOLDTIME(x) (UNION_READ(hw_enet_mscr_t, HW_ENET_MSCR_ADDR(x), U, B.HOLDTIME)) /*! @brief Format value for bitfield ENET_MSCR_HOLDTIME. */ #define BF_ENET_MSCR_HOLDTIME(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MSCR_HOLDTIME) & BM_ENET_MSCR_HOLDTIME) @@ -1779,8 +1786,8 @@ #define HW_ENET_MIBC_ADDR(x) ((x) + 0x64U) #define HW_ENET_MIBC(x) (*(__IO hw_enet_mibc_t *) HW_ENET_MIBC_ADDR(x)) -#define HW_ENET_MIBC_RD(x) (HW_ENET_MIBC(x).U) -#define HW_ENET_MIBC_WR(x, v) (HW_ENET_MIBC(x).U = (v)) +#define HW_ENET_MIBC_RD(x) (ADDRESS_READ(hw_enet_mibc_t, HW_ENET_MIBC_ADDR(x))) +#define HW_ENET_MIBC_WR(x, v) (ADDRESS_WRITE(hw_enet_mibc_t, HW_ENET_MIBC_ADDR(x), v)) #define HW_ENET_MIBC_SET(x, v) (HW_ENET_MIBC_WR(x, HW_ENET_MIBC_RD(x) | (v))) #define HW_ENET_MIBC_CLR(x, v) (HW_ENET_MIBC_WR(x, HW_ENET_MIBC_RD(x) & ~(v))) #define HW_ENET_MIBC_TOG(x, v) (HW_ENET_MIBC_WR(x, HW_ENET_MIBC_RD(x) ^ (v))) @@ -1802,13 +1809,13 @@ #define BS_ENET_MIBC_MIB_CLEAR (1U) /*!< Bit field size in bits for ENET_MIBC_MIB_CLEAR. */ /*! @brief Read current value of the ENET_MIBC_MIB_CLEAR field. */ -#define BR_ENET_MIBC_MIB_CLEAR(x) (BITBAND_ACCESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_CLEAR)) +#define BR_ENET_MIBC_MIB_CLEAR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_CLEAR))) /*! @brief Format value for bitfield ENET_MIBC_MIB_CLEAR. */ #define BF_ENET_MIBC_MIB_CLEAR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MIBC_MIB_CLEAR) & BM_ENET_MIBC_MIB_CLEAR) /*! @brief Set the MIB_CLEAR field to a new value. */ -#define BW_ENET_MIBC_MIB_CLEAR(x, v) (BITBAND_ACCESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_CLEAR) = (v)) +#define BW_ENET_MIBC_MIB_CLEAR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_CLEAR), v)) /*@}*/ /*! @@ -1823,7 +1830,7 @@ #define BS_ENET_MIBC_MIB_IDLE (1U) /*!< Bit field size in bits for ENET_MIBC_MIB_IDLE. */ /*! @brief Read current value of the ENET_MIBC_MIB_IDLE field. */ -#define BR_ENET_MIBC_MIB_IDLE(x) (BITBAND_ACCESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_IDLE)) +#define BR_ENET_MIBC_MIB_IDLE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_IDLE))) /*@}*/ /*! @@ -1838,13 +1845,13 @@ #define BS_ENET_MIBC_MIB_DIS (1U) /*!< Bit field size in bits for ENET_MIBC_MIB_DIS. */ /*! @brief Read current value of the ENET_MIBC_MIB_DIS field. */ -#define BR_ENET_MIBC_MIB_DIS(x) (BITBAND_ACCESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_DIS)) +#define BR_ENET_MIBC_MIB_DIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_DIS))) /*! @brief Format value for bitfield ENET_MIBC_MIB_DIS. */ #define BF_ENET_MIBC_MIB_DIS(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MIBC_MIB_DIS) & BM_ENET_MIBC_MIB_DIS) /*! @brief Set the MIB_DIS field to a new value. */ -#define BW_ENET_MIBC_MIB_DIS(x, v) (BITBAND_ACCESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_DIS) = (v)) +#define BW_ENET_MIBC_MIB_DIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_MIBC_ADDR(x), BP_ENET_MIBC_MIB_DIS), v)) /*@}*/ /******************************************************************************* @@ -1889,8 +1896,8 @@ #define HW_ENET_RCR_ADDR(x) ((x) + 0x84U) #define HW_ENET_RCR(x) (*(__IO hw_enet_rcr_t *) HW_ENET_RCR_ADDR(x)) -#define HW_ENET_RCR_RD(x) (HW_ENET_RCR(x).U) -#define HW_ENET_RCR_WR(x, v) (HW_ENET_RCR(x).U = (v)) +#define HW_ENET_RCR_RD(x) (ADDRESS_READ(hw_enet_rcr_t, HW_ENET_RCR_ADDR(x))) +#define HW_ENET_RCR_WR(x, v) (ADDRESS_WRITE(hw_enet_rcr_t, HW_ENET_RCR_ADDR(x), v)) #define HW_ENET_RCR_SET(x, v) (HW_ENET_RCR_WR(x, HW_ENET_RCR_RD(x) | (v))) #define HW_ENET_RCR_CLR(x, v) (HW_ENET_RCR_WR(x, HW_ENET_RCR_RD(x) & ~(v))) #define HW_ENET_RCR_TOG(x, v) (HW_ENET_RCR_WR(x, HW_ENET_RCR_RD(x) ^ (v))) @@ -1917,13 +1924,13 @@ #define BS_ENET_RCR_LOOP (1U) /*!< Bit field size in bits for ENET_RCR_LOOP. */ /*! @brief Read current value of the ENET_RCR_LOOP field. */ -#define BR_ENET_RCR_LOOP(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_LOOP)) +#define BR_ENET_RCR_LOOP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_LOOP))) /*! @brief Format value for bitfield ENET_RCR_LOOP. */ #define BF_ENET_RCR_LOOP(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_LOOP) & BM_ENET_RCR_LOOP) /*! @brief Set the LOOP field to a new value. */ -#define BW_ENET_RCR_LOOP(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_LOOP) = (v)) +#define BW_ENET_RCR_LOOP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_LOOP), v)) /*@}*/ /*! @@ -1941,13 +1948,13 @@ #define BS_ENET_RCR_DRT (1U) /*!< Bit field size in bits for ENET_RCR_DRT. */ /*! @brief Read current value of the ENET_RCR_DRT field. */ -#define BR_ENET_RCR_DRT(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_DRT)) +#define BR_ENET_RCR_DRT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_DRT))) /*! @brief Format value for bitfield ENET_RCR_DRT. */ #define BF_ENET_RCR_DRT(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_DRT) & BM_ENET_RCR_DRT) /*! @brief Set the DRT field to a new value. */ -#define BW_ENET_RCR_DRT(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_DRT) = (v)) +#define BW_ENET_RCR_DRT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_DRT), v)) /*@}*/ /*! @@ -1965,13 +1972,13 @@ #define BS_ENET_RCR_MII_MODE (1U) /*!< Bit field size in bits for ENET_RCR_MII_MODE. */ /*! @brief Read current value of the ENET_RCR_MII_MODE field. */ -#define BR_ENET_RCR_MII_MODE(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_MII_MODE)) +#define BR_ENET_RCR_MII_MODE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_MII_MODE))) /*! @brief Format value for bitfield ENET_RCR_MII_MODE. */ #define BF_ENET_RCR_MII_MODE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_MII_MODE) & BM_ENET_RCR_MII_MODE) /*! @brief Set the MII_MODE field to a new value. */ -#define BW_ENET_RCR_MII_MODE(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_MII_MODE) = (v)) +#define BW_ENET_RCR_MII_MODE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_MII_MODE), v)) /*@}*/ /*! @@ -1989,13 +1996,13 @@ #define BS_ENET_RCR_PROM (1U) /*!< Bit field size in bits for ENET_RCR_PROM. */ /*! @brief Read current value of the ENET_RCR_PROM field. */ -#define BR_ENET_RCR_PROM(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PROM)) +#define BR_ENET_RCR_PROM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PROM))) /*! @brief Format value for bitfield ENET_RCR_PROM. */ #define BF_ENET_RCR_PROM(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_PROM) & BM_ENET_RCR_PROM) /*! @brief Set the PROM field to a new value. */ -#define BW_ENET_RCR_PROM(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PROM) = (v)) +#define BW_ENET_RCR_PROM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PROM), v)) /*@}*/ /*! @@ -2012,13 +2019,13 @@ #define BS_ENET_RCR_BC_REJ (1U) /*!< Bit field size in bits for ENET_RCR_BC_REJ. */ /*! @brief Read current value of the ENET_RCR_BC_REJ field. */ -#define BR_ENET_RCR_BC_REJ(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_BC_REJ)) +#define BR_ENET_RCR_BC_REJ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_BC_REJ))) /*! @brief Format value for bitfield ENET_RCR_BC_REJ. */ #define BF_ENET_RCR_BC_REJ(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_BC_REJ) & BM_ENET_RCR_BC_REJ) /*! @brief Set the BC_REJ field to a new value. */ -#define BW_ENET_RCR_BC_REJ(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_BC_REJ) = (v)) +#define BW_ENET_RCR_BC_REJ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_BC_REJ), v)) /*@}*/ /*! @@ -2033,13 +2040,13 @@ #define BS_ENET_RCR_FCE (1U) /*!< Bit field size in bits for ENET_RCR_FCE. */ /*! @brief Read current value of the ENET_RCR_FCE field. */ -#define BR_ENET_RCR_FCE(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_FCE)) +#define BR_ENET_RCR_FCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_FCE))) /*! @brief Format value for bitfield ENET_RCR_FCE. */ #define BF_ENET_RCR_FCE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_FCE) & BM_ENET_RCR_FCE) /*! @brief Set the FCE field to a new value. */ -#define BW_ENET_RCR_FCE(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_FCE) = (v)) +#define BW_ENET_RCR_FCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_FCE), v)) /*@}*/ /*! @@ -2057,13 +2064,13 @@ #define BS_ENET_RCR_RMII_MODE (1U) /*!< Bit field size in bits for ENET_RCR_RMII_MODE. */ /*! @brief Read current value of the ENET_RCR_RMII_MODE field. */ -#define BR_ENET_RCR_RMII_MODE(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_RMII_MODE)) +#define BR_ENET_RCR_RMII_MODE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_RMII_MODE))) /*! @brief Format value for bitfield ENET_RCR_RMII_MODE. */ #define BF_ENET_RCR_RMII_MODE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_RMII_MODE) & BM_ENET_RCR_RMII_MODE) /*! @brief Set the RMII_MODE field to a new value. */ -#define BW_ENET_RCR_RMII_MODE(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_RMII_MODE) = (v)) +#define BW_ENET_RCR_RMII_MODE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_RMII_MODE), v)) /*@}*/ /*! @@ -2081,13 +2088,13 @@ #define BS_ENET_RCR_RMII_10T (1U) /*!< Bit field size in bits for ENET_RCR_RMII_10T. */ /*! @brief Read current value of the ENET_RCR_RMII_10T field. */ -#define BR_ENET_RCR_RMII_10T(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_RMII_10T)) +#define BR_ENET_RCR_RMII_10T(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_RMII_10T))) /*! @brief Format value for bitfield ENET_RCR_RMII_10T. */ #define BF_ENET_RCR_RMII_10T(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_RMII_10T) & BM_ENET_RCR_RMII_10T) /*! @brief Set the RMII_10T field to a new value. */ -#define BW_ENET_RCR_RMII_10T(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_RMII_10T) = (v)) +#define BW_ENET_RCR_RMII_10T(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_RMII_10T), v)) /*@}*/ /*! @@ -2105,13 +2112,13 @@ #define BS_ENET_RCR_PADEN (1U) /*!< Bit field size in bits for ENET_RCR_PADEN. */ /*! @brief Read current value of the ENET_RCR_PADEN field. */ -#define BR_ENET_RCR_PADEN(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PADEN)) +#define BR_ENET_RCR_PADEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PADEN))) /*! @brief Format value for bitfield ENET_RCR_PADEN. */ #define BF_ENET_RCR_PADEN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_PADEN) & BM_ENET_RCR_PADEN) /*! @brief Set the PADEN field to a new value. */ -#define BW_ENET_RCR_PADEN(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PADEN) = (v)) +#define BW_ENET_RCR_PADEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PADEN), v)) /*@}*/ /*! @@ -2129,13 +2136,13 @@ #define BS_ENET_RCR_PAUFWD (1U) /*!< Bit field size in bits for ENET_RCR_PAUFWD. */ /*! @brief Read current value of the ENET_RCR_PAUFWD field. */ -#define BR_ENET_RCR_PAUFWD(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PAUFWD)) +#define BR_ENET_RCR_PAUFWD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PAUFWD))) /*! @brief Format value for bitfield ENET_RCR_PAUFWD. */ #define BF_ENET_RCR_PAUFWD(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_PAUFWD) & BM_ENET_RCR_PAUFWD) /*! @brief Set the PAUFWD field to a new value. */ -#define BW_ENET_RCR_PAUFWD(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PAUFWD) = (v)) +#define BW_ENET_RCR_PAUFWD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_PAUFWD), v)) /*@}*/ /*! @@ -2155,13 +2162,13 @@ #define BS_ENET_RCR_CRCFWD (1U) /*!< Bit field size in bits for ENET_RCR_CRCFWD. */ /*! @brief Read current value of the ENET_RCR_CRCFWD field. */ -#define BR_ENET_RCR_CRCFWD(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_CRCFWD)) +#define BR_ENET_RCR_CRCFWD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_CRCFWD))) /*! @brief Format value for bitfield ENET_RCR_CRCFWD. */ #define BF_ENET_RCR_CRCFWD(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_CRCFWD) & BM_ENET_RCR_CRCFWD) /*! @brief Set the CRCFWD field to a new value. */ -#define BW_ENET_RCR_CRCFWD(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_CRCFWD) = (v)) +#define BW_ENET_RCR_CRCFWD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_CRCFWD), v)) /*@}*/ /*! @@ -2181,13 +2188,13 @@ #define BS_ENET_RCR_CFEN (1U) /*!< Bit field size in bits for ENET_RCR_CFEN. */ /*! @brief Read current value of the ENET_RCR_CFEN field. */ -#define BR_ENET_RCR_CFEN(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_CFEN)) +#define BR_ENET_RCR_CFEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_CFEN))) /*! @brief Format value for bitfield ENET_RCR_CFEN. */ #define BF_ENET_RCR_CFEN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_CFEN) & BM_ENET_RCR_CFEN) /*! @brief Set the CFEN field to a new value. */ -#define BW_ENET_RCR_CFEN(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_CFEN) = (v)) +#define BW_ENET_RCR_CFEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_CFEN), v)) /*@}*/ /*! @@ -2206,7 +2213,7 @@ #define BS_ENET_RCR_MAX_FL (14U) /*!< Bit field size in bits for ENET_RCR_MAX_FL. */ /*! @brief Read current value of the ENET_RCR_MAX_FL field. */ -#define BR_ENET_RCR_MAX_FL(x) (HW_ENET_RCR(x).B.MAX_FL) +#define BR_ENET_RCR_MAX_FL(x) (UNION_READ(hw_enet_rcr_t, HW_ENET_RCR_ADDR(x), U, B.MAX_FL)) /*! @brief Format value for bitfield ENET_RCR_MAX_FL. */ #define BF_ENET_RCR_MAX_FL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_MAX_FL) & BM_ENET_RCR_MAX_FL) @@ -2231,13 +2238,13 @@ #define BS_ENET_RCR_NLC (1U) /*!< Bit field size in bits for ENET_RCR_NLC. */ /*! @brief Read current value of the ENET_RCR_NLC field. */ -#define BR_ENET_RCR_NLC(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_NLC)) +#define BR_ENET_RCR_NLC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_NLC))) /*! @brief Format value for bitfield ENET_RCR_NLC. */ #define BF_ENET_RCR_NLC(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RCR_NLC) & BM_ENET_RCR_NLC) /*! @brief Set the NLC field to a new value. */ -#define BW_ENET_RCR_NLC(x, v) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_NLC) = (v)) +#define BW_ENET_RCR_NLC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_NLC), v)) /*@}*/ /*! @@ -2251,7 +2258,7 @@ #define BS_ENET_RCR_GRS (1U) /*!< Bit field size in bits for ENET_RCR_GRS. */ /*! @brief Read current value of the ENET_RCR_GRS field. */ -#define BR_ENET_RCR_GRS(x) (BITBAND_ACCESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_GRS)) +#define BR_ENET_RCR_GRS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RCR_ADDR(x), BP_ENET_RCR_GRS))) /*@}*/ /******************************************************************************* @@ -2292,8 +2299,8 @@ #define HW_ENET_TCR_ADDR(x) ((x) + 0xC4U) #define HW_ENET_TCR(x) (*(__IO hw_enet_tcr_t *) HW_ENET_TCR_ADDR(x)) -#define HW_ENET_TCR_RD(x) (HW_ENET_TCR(x).U) -#define HW_ENET_TCR_WR(x, v) (HW_ENET_TCR(x).U = (v)) +#define HW_ENET_TCR_RD(x) (ADDRESS_READ(hw_enet_tcr_t, HW_ENET_TCR_ADDR(x))) +#define HW_ENET_TCR_WR(x, v) (ADDRESS_WRITE(hw_enet_tcr_t, HW_ENET_TCR_ADDR(x), v)) #define HW_ENET_TCR_SET(x, v) (HW_ENET_TCR_WR(x, HW_ENET_TCR_RD(x) | (v))) #define HW_ENET_TCR_CLR(x, v) (HW_ENET_TCR_WR(x, HW_ENET_TCR_RD(x) & ~(v))) #define HW_ENET_TCR_TOG(x, v) (HW_ENET_TCR_WR(x, HW_ENET_TCR_RD(x) ^ (v))) @@ -2321,13 +2328,13 @@ #define BS_ENET_TCR_GTS (1U) /*!< Bit field size in bits for ENET_TCR_GTS. */ /*! @brief Read current value of the ENET_TCR_GTS field. */ -#define BR_ENET_TCR_GTS(x) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_GTS)) +#define BR_ENET_TCR_GTS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_GTS))) /*! @brief Format value for bitfield ENET_TCR_GTS. */ #define BF_ENET_TCR_GTS(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCR_GTS) & BM_ENET_TCR_GTS) /*! @brief Set the GTS field to a new value. */ -#define BW_ENET_TCR_GTS(x, v) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_GTS) = (v)) +#define BW_ENET_TCR_GTS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_GTS), v)) /*@}*/ /*! @@ -2342,13 +2349,13 @@ #define BS_ENET_TCR_FDEN (1U) /*!< Bit field size in bits for ENET_TCR_FDEN. */ /*! @brief Read current value of the ENET_TCR_FDEN field. */ -#define BR_ENET_TCR_FDEN(x) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_FDEN)) +#define BR_ENET_TCR_FDEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_FDEN))) /*! @brief Format value for bitfield ENET_TCR_FDEN. */ #define BF_ENET_TCR_FDEN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCR_FDEN) & BM_ENET_TCR_FDEN) /*! @brief Set the FDEN field to a new value. */ -#define BW_ENET_TCR_FDEN(x, v) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_FDEN) = (v)) +#define BW_ENET_TCR_FDEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_FDEN), v)) /*@}*/ /*! @@ -2371,13 +2378,13 @@ #define BS_ENET_TCR_TFC_PAUSE (1U) /*!< Bit field size in bits for ENET_TCR_TFC_PAUSE. */ /*! @brief Read current value of the ENET_TCR_TFC_PAUSE field. */ -#define BR_ENET_TCR_TFC_PAUSE(x) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_TFC_PAUSE)) +#define BR_ENET_TCR_TFC_PAUSE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_TFC_PAUSE))) /*! @brief Format value for bitfield ENET_TCR_TFC_PAUSE. */ #define BF_ENET_TCR_TFC_PAUSE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCR_TFC_PAUSE) & BM_ENET_TCR_TFC_PAUSE) /*! @brief Set the TFC_PAUSE field to a new value. */ -#define BW_ENET_TCR_TFC_PAUSE(x, v) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_TFC_PAUSE) = (v)) +#define BW_ENET_TCR_TFC_PAUSE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_TFC_PAUSE), v)) /*@}*/ /*! @@ -2393,7 +2400,7 @@ #define BS_ENET_TCR_RFC_PAUSE (1U) /*!< Bit field size in bits for ENET_TCR_RFC_PAUSE. */ /*! @brief Read current value of the ENET_TCR_RFC_PAUSE field. */ -#define BR_ENET_TCR_RFC_PAUSE(x) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_RFC_PAUSE)) +#define BR_ENET_TCR_RFC_PAUSE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_RFC_PAUSE))) /*@}*/ /*! @@ -2414,7 +2421,7 @@ #define BS_ENET_TCR_ADDSEL (3U) /*!< Bit field size in bits for ENET_TCR_ADDSEL. */ /*! @brief Read current value of the ENET_TCR_ADDSEL field. */ -#define BR_ENET_TCR_ADDSEL(x) (HW_ENET_TCR(x).B.ADDSEL) +#define BR_ENET_TCR_ADDSEL(x) (UNION_READ(hw_enet_tcr_t, HW_ENET_TCR_ADDR(x), U, B.ADDSEL)) /*! @brief Format value for bitfield ENET_TCR_ADDSEL. */ #define BF_ENET_TCR_ADDSEL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCR_ADDSEL) & BM_ENET_TCR_ADDSEL) @@ -2437,13 +2444,13 @@ #define BS_ENET_TCR_ADDINS (1U) /*!< Bit field size in bits for ENET_TCR_ADDINS. */ /*! @brief Read current value of the ENET_TCR_ADDINS field. */ -#define BR_ENET_TCR_ADDINS(x) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_ADDINS)) +#define BR_ENET_TCR_ADDINS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_ADDINS))) /*! @brief Format value for bitfield ENET_TCR_ADDINS. */ #define BF_ENET_TCR_ADDINS(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCR_ADDINS) & BM_ENET_TCR_ADDINS) /*! @brief Set the ADDINS field to a new value. */ -#define BW_ENET_TCR_ADDINS(x, v) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_ADDINS) = (v)) +#define BW_ENET_TCR_ADDINS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_ADDINS), v)) /*@}*/ /*! @@ -2460,13 +2467,13 @@ #define BS_ENET_TCR_CRCFWD (1U) /*!< Bit field size in bits for ENET_TCR_CRCFWD. */ /*! @brief Read current value of the ENET_TCR_CRCFWD field. */ -#define BR_ENET_TCR_CRCFWD(x) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_CRCFWD)) +#define BR_ENET_TCR_CRCFWD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_CRCFWD))) /*! @brief Format value for bitfield ENET_TCR_CRCFWD. */ #define BF_ENET_TCR_CRCFWD(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCR_CRCFWD) & BM_ENET_TCR_CRCFWD) /*! @brief Set the CRCFWD field to a new value. */ -#define BW_ENET_TCR_CRCFWD(x, v) (BITBAND_ACCESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_CRCFWD) = (v)) +#define BW_ENET_TCR_CRCFWD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCR_ADDR(x), BP_ENET_TCR_CRCFWD), v)) /*@}*/ /******************************************************************************* @@ -2500,8 +2507,8 @@ #define HW_ENET_PALR_ADDR(x) ((x) + 0xE4U) #define HW_ENET_PALR(x) (*(__IO hw_enet_palr_t *) HW_ENET_PALR_ADDR(x)) -#define HW_ENET_PALR_RD(x) (HW_ENET_PALR(x).U) -#define HW_ENET_PALR_WR(x, v) (HW_ENET_PALR(x).U = (v)) +#define HW_ENET_PALR_RD(x) (ADDRESS_READ(hw_enet_palr_t, HW_ENET_PALR_ADDR(x))) +#define HW_ENET_PALR_WR(x, v) (ADDRESS_WRITE(hw_enet_palr_t, HW_ENET_PALR_ADDR(x), v)) #define HW_ENET_PALR_SET(x, v) (HW_ENET_PALR_WR(x, HW_ENET_PALR_RD(x) | (v))) #define HW_ENET_PALR_CLR(x, v) (HW_ENET_PALR_WR(x, HW_ENET_PALR_RD(x) & ~(v))) #define HW_ENET_PALR_TOG(x, v) (HW_ENET_PALR_WR(x, HW_ENET_PALR_RD(x) ^ (v))) @@ -2567,8 +2574,8 @@ #define HW_ENET_PAUR_ADDR(x) ((x) + 0xE8U) #define HW_ENET_PAUR(x) (*(__IO hw_enet_paur_t *) HW_ENET_PAUR_ADDR(x)) -#define HW_ENET_PAUR_RD(x) (HW_ENET_PAUR(x).U) -#define HW_ENET_PAUR_WR(x, v) (HW_ENET_PAUR(x).U = (v)) +#define HW_ENET_PAUR_RD(x) (ADDRESS_READ(hw_enet_paur_t, HW_ENET_PAUR_ADDR(x))) +#define HW_ENET_PAUR_WR(x, v) (ADDRESS_WRITE(hw_enet_paur_t, HW_ENET_PAUR_ADDR(x), v)) #define HW_ENET_PAUR_SET(x, v) (HW_ENET_PAUR_WR(x, HW_ENET_PAUR_RD(x) | (v))) #define HW_ENET_PAUR_CLR(x, v) (HW_ENET_PAUR_WR(x, HW_ENET_PAUR_RD(x) & ~(v))) #define HW_ENET_PAUR_TOG(x, v) (HW_ENET_PAUR_WR(x, HW_ENET_PAUR_RD(x) ^ (v))) @@ -2589,7 +2596,7 @@ #define BS_ENET_PAUR_TYPE (16U) /*!< Bit field size in bits for ENET_PAUR_TYPE. */ /*! @brief Read current value of the ENET_PAUR_TYPE field. */ -#define BR_ENET_PAUR_TYPE(x) (HW_ENET_PAUR(x).B.TYPE) +#define BR_ENET_PAUR_TYPE(x) (UNION_READ(hw_enet_paur_t, HW_ENET_PAUR_ADDR(x), U, B.TYPE)) /*@}*/ /*! @@ -2604,7 +2611,7 @@ #define BS_ENET_PAUR_PADDR2 (16U) /*!< Bit field size in bits for ENET_PAUR_PADDR2. */ /*! @brief Read current value of the ENET_PAUR_PADDR2 field. */ -#define BR_ENET_PAUR_PADDR2(x) (HW_ENET_PAUR(x).B.PADDR2) +#define BR_ENET_PAUR_PADDR2(x) (UNION_READ(hw_enet_paur_t, HW_ENET_PAUR_ADDR(x), U, B.PADDR2)) /*! @brief Format value for bitfield ENET_PAUR_PADDR2. */ #define BF_ENET_PAUR_PADDR2(v) ((uint32_t)((uint32_t)(v) << BP_ENET_PAUR_PADDR2) & BM_ENET_PAUR_PADDR2) @@ -2646,8 +2653,8 @@ #define HW_ENET_OPD_ADDR(x) ((x) + 0xECU) #define HW_ENET_OPD(x) (*(__IO hw_enet_opd_t *) HW_ENET_OPD_ADDR(x)) -#define HW_ENET_OPD_RD(x) (HW_ENET_OPD(x).U) -#define HW_ENET_OPD_WR(x, v) (HW_ENET_OPD(x).U = (v)) +#define HW_ENET_OPD_RD(x) (ADDRESS_READ(hw_enet_opd_t, HW_ENET_OPD_ADDR(x))) +#define HW_ENET_OPD_WR(x, v) (ADDRESS_WRITE(hw_enet_opd_t, HW_ENET_OPD_ADDR(x), v)) #define HW_ENET_OPD_SET(x, v) (HW_ENET_OPD_WR(x, HW_ENET_OPD_RD(x) | (v))) #define HW_ENET_OPD_CLR(x, v) (HW_ENET_OPD_WR(x, HW_ENET_OPD_RD(x) & ~(v))) #define HW_ENET_OPD_TOG(x, v) (HW_ENET_OPD_WR(x, HW_ENET_OPD_RD(x) ^ (v))) @@ -2668,7 +2675,7 @@ #define BS_ENET_OPD_PAUSE_DUR (16U) /*!< Bit field size in bits for ENET_OPD_PAUSE_DUR. */ /*! @brief Read current value of the ENET_OPD_PAUSE_DUR field. */ -#define BR_ENET_OPD_PAUSE_DUR(x) (HW_ENET_OPD(x).B.PAUSE_DUR) +#define BR_ENET_OPD_PAUSE_DUR(x) (UNION_READ(hw_enet_opd_t, HW_ENET_OPD_ADDR(x), U, B.PAUSE_DUR)) /*! @brief Format value for bitfield ENET_OPD_PAUSE_DUR. */ #define BF_ENET_OPD_PAUSE_DUR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_OPD_PAUSE_DUR) & BM_ENET_OPD_PAUSE_DUR) @@ -2688,7 +2695,7 @@ #define BS_ENET_OPD_OPCODE (16U) /*!< Bit field size in bits for ENET_OPD_OPCODE. */ /*! @brief Read current value of the ENET_OPD_OPCODE field. */ -#define BR_ENET_OPD_OPCODE(x) (HW_ENET_OPD(x).B.OPCODE) +#define BR_ENET_OPD_OPCODE(x) (UNION_READ(hw_enet_opd_t, HW_ENET_OPD_ADDR(x), U, B.OPCODE)) /*@}*/ /******************************************************************************* @@ -2721,8 +2728,8 @@ #define HW_ENET_IAUR_ADDR(x) ((x) + 0x118U) #define HW_ENET_IAUR(x) (*(__IO hw_enet_iaur_t *) HW_ENET_IAUR_ADDR(x)) -#define HW_ENET_IAUR_RD(x) (HW_ENET_IAUR(x).U) -#define HW_ENET_IAUR_WR(x, v) (HW_ENET_IAUR(x).U = (v)) +#define HW_ENET_IAUR_RD(x) (ADDRESS_READ(hw_enet_iaur_t, HW_ENET_IAUR_ADDR(x))) +#define HW_ENET_IAUR_WR(x, v) (ADDRESS_WRITE(hw_enet_iaur_t, HW_ENET_IAUR_ADDR(x), v)) #define HW_ENET_IAUR_SET(x, v) (HW_ENET_IAUR_WR(x, HW_ENET_IAUR_RD(x) | (v))) #define HW_ENET_IAUR_CLR(x, v) (HW_ENET_IAUR_WR(x, HW_ENET_IAUR_RD(x) & ~(v))) #define HW_ENET_IAUR_TOG(x, v) (HW_ENET_IAUR_WR(x, HW_ENET_IAUR_RD(x) ^ (v))) @@ -2784,8 +2791,8 @@ #define HW_ENET_IALR_ADDR(x) ((x) + 0x11CU) #define HW_ENET_IALR(x) (*(__IO hw_enet_ialr_t *) HW_ENET_IALR_ADDR(x)) -#define HW_ENET_IALR_RD(x) (HW_ENET_IALR(x).U) -#define HW_ENET_IALR_WR(x, v) (HW_ENET_IALR(x).U = (v)) +#define HW_ENET_IALR_RD(x) (ADDRESS_READ(hw_enet_ialr_t, HW_ENET_IALR_ADDR(x))) +#define HW_ENET_IALR_WR(x, v) (ADDRESS_WRITE(hw_enet_ialr_t, HW_ENET_IALR_ADDR(x), v)) #define HW_ENET_IALR_SET(x, v) (HW_ENET_IALR_WR(x, HW_ENET_IALR_RD(x) | (v))) #define HW_ENET_IALR_CLR(x, v) (HW_ENET_IALR_WR(x, HW_ENET_IALR_RD(x) & ~(v))) #define HW_ENET_IALR_TOG(x, v) (HW_ENET_IALR_WR(x, HW_ENET_IALR_RD(x) ^ (v))) @@ -2846,8 +2853,8 @@ #define HW_ENET_GAUR_ADDR(x) ((x) + 0x120U) #define HW_ENET_GAUR(x) (*(__IO hw_enet_gaur_t *) HW_ENET_GAUR_ADDR(x)) -#define HW_ENET_GAUR_RD(x) (HW_ENET_GAUR(x).U) -#define HW_ENET_GAUR_WR(x, v) (HW_ENET_GAUR(x).U = (v)) +#define HW_ENET_GAUR_RD(x) (ADDRESS_READ(hw_enet_gaur_t, HW_ENET_GAUR_ADDR(x))) +#define HW_ENET_GAUR_WR(x, v) (ADDRESS_WRITE(hw_enet_gaur_t, HW_ENET_GAUR_ADDR(x), v)) #define HW_ENET_GAUR_SET(x, v) (HW_ENET_GAUR_WR(x, HW_ENET_GAUR_RD(x) | (v))) #define HW_ENET_GAUR_CLR(x, v) (HW_ENET_GAUR_WR(x, HW_ENET_GAUR_RD(x) & ~(v))) #define HW_ENET_GAUR_TOG(x, v) (HW_ENET_GAUR_WR(x, HW_ENET_GAUR_RD(x) ^ (v))) @@ -2908,8 +2915,8 @@ #define HW_ENET_GALR_ADDR(x) ((x) + 0x124U) #define HW_ENET_GALR(x) (*(__IO hw_enet_galr_t *) HW_ENET_GALR_ADDR(x)) -#define HW_ENET_GALR_RD(x) (HW_ENET_GALR(x).U) -#define HW_ENET_GALR_WR(x, v) (HW_ENET_GALR(x).U = (v)) +#define HW_ENET_GALR_RD(x) (ADDRESS_READ(hw_enet_galr_t, HW_ENET_GALR_ADDR(x))) +#define HW_ENET_GALR_WR(x, v) (ADDRESS_WRITE(hw_enet_galr_t, HW_ENET_GALR_ADDR(x), v)) #define HW_ENET_GALR_SET(x, v) (HW_ENET_GALR_WR(x, HW_ENET_GALR_RD(x) | (v))) #define HW_ENET_GALR_CLR(x, v) (HW_ENET_GALR_WR(x, HW_ENET_GALR_RD(x) & ~(v))) #define HW_ENET_GALR_TOG(x, v) (HW_ENET_GALR_WR(x, HW_ENET_GALR_RD(x) ^ (v))) @@ -2985,8 +2992,8 @@ #define HW_ENET_TFWR_ADDR(x) ((x) + 0x144U) #define HW_ENET_TFWR(x) (*(__IO hw_enet_tfwr_t *) HW_ENET_TFWR_ADDR(x)) -#define HW_ENET_TFWR_RD(x) (HW_ENET_TFWR(x).U) -#define HW_ENET_TFWR_WR(x, v) (HW_ENET_TFWR(x).U = (v)) +#define HW_ENET_TFWR_RD(x) (ADDRESS_READ(hw_enet_tfwr_t, HW_ENET_TFWR_ADDR(x))) +#define HW_ENET_TFWR_WR(x, v) (ADDRESS_WRITE(hw_enet_tfwr_t, HW_ENET_TFWR_ADDR(x), v)) #define HW_ENET_TFWR_SET(x, v) (HW_ENET_TFWR_WR(x, HW_ENET_TFWR_RD(x) | (v))) #define HW_ENET_TFWR_CLR(x, v) (HW_ENET_TFWR_WR(x, HW_ENET_TFWR_RD(x) & ~(v))) #define HW_ENET_TFWR_TOG(x, v) (HW_ENET_TFWR_WR(x, HW_ENET_TFWR_RD(x) ^ (v))) @@ -3021,7 +3028,7 @@ #define BS_ENET_TFWR_TFWR (6U) /*!< Bit field size in bits for ENET_TFWR_TFWR. */ /*! @brief Read current value of the ENET_TFWR_TFWR field. */ -#define BR_ENET_TFWR_TFWR(x) (HW_ENET_TFWR(x).B.TFWR) +#define BR_ENET_TFWR_TFWR(x) (UNION_READ(hw_enet_tfwr_t, HW_ENET_TFWR_ADDR(x), U, B.TFWR)) /*! @brief Format value for bitfield ENET_TFWR_TFWR. */ #define BF_ENET_TFWR_TFWR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TFWR_TFWR) & BM_ENET_TFWR_TFWR) @@ -3043,13 +3050,13 @@ #define BS_ENET_TFWR_STRFWD (1U) /*!< Bit field size in bits for ENET_TFWR_STRFWD. */ /*! @brief Read current value of the ENET_TFWR_STRFWD field. */ -#define BR_ENET_TFWR_STRFWD(x) (BITBAND_ACCESS32(HW_ENET_TFWR_ADDR(x), BP_ENET_TFWR_STRFWD)) +#define BR_ENET_TFWR_STRFWD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TFWR_ADDR(x), BP_ENET_TFWR_STRFWD))) /*! @brief Format value for bitfield ENET_TFWR_STRFWD. */ #define BF_ENET_TFWR_STRFWD(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TFWR_STRFWD) & BM_ENET_TFWR_STRFWD) /*! @brief Set the STRFWD field to a new value. */ -#define BW_ENET_TFWR_STRFWD(x, v) (BITBAND_ACCESS32(HW_ENET_TFWR_ADDR(x), BP_ENET_TFWR_STRFWD) = (v)) +#define BW_ENET_TFWR_STRFWD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TFWR_ADDR(x), BP_ENET_TFWR_STRFWD), v)) /*@}*/ /******************************************************************************* @@ -3083,8 +3090,8 @@ #define HW_ENET_RDSR_ADDR(x) ((x) + 0x180U) #define HW_ENET_RDSR(x) (*(__IO hw_enet_rdsr_t *) HW_ENET_RDSR_ADDR(x)) -#define HW_ENET_RDSR_RD(x) (HW_ENET_RDSR(x).U) -#define HW_ENET_RDSR_WR(x, v) (HW_ENET_RDSR(x).U = (v)) +#define HW_ENET_RDSR_RD(x) (ADDRESS_READ(hw_enet_rdsr_t, HW_ENET_RDSR_ADDR(x))) +#define HW_ENET_RDSR_WR(x, v) (ADDRESS_WRITE(hw_enet_rdsr_t, HW_ENET_RDSR_ADDR(x), v)) #define HW_ENET_RDSR_SET(x, v) (HW_ENET_RDSR_WR(x, HW_ENET_RDSR_RD(x) | (v))) #define HW_ENET_RDSR_CLR(x, v) (HW_ENET_RDSR_WR(x, HW_ENET_RDSR_RD(x) & ~(v))) #define HW_ENET_RDSR_TOG(x, v) (HW_ENET_RDSR_WR(x, HW_ENET_RDSR_RD(x) ^ (v))) @@ -3105,7 +3112,7 @@ #define BS_ENET_RDSR_R_DES_START (29U) /*!< Bit field size in bits for ENET_RDSR_R_DES_START. */ /*! @brief Read current value of the ENET_RDSR_R_DES_START field. */ -#define BR_ENET_RDSR_R_DES_START(x) (HW_ENET_RDSR(x).B.R_DES_START) +#define BR_ENET_RDSR_R_DES_START(x) (UNION_READ(hw_enet_rdsr_t, HW_ENET_RDSR_ADDR(x), U, B.R_DES_START)) /*! @brief Format value for bitfield ENET_RDSR_R_DES_START. */ #define BF_ENET_RDSR_R_DES_START(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RDSR_R_DES_START) & BM_ENET_RDSR_R_DES_START) @@ -3145,8 +3152,8 @@ #define HW_ENET_TDSR_ADDR(x) ((x) + 0x184U) #define HW_ENET_TDSR(x) (*(__IO hw_enet_tdsr_t *) HW_ENET_TDSR_ADDR(x)) -#define HW_ENET_TDSR_RD(x) (HW_ENET_TDSR(x).U) -#define HW_ENET_TDSR_WR(x, v) (HW_ENET_TDSR(x).U = (v)) +#define HW_ENET_TDSR_RD(x) (ADDRESS_READ(hw_enet_tdsr_t, HW_ENET_TDSR_ADDR(x))) +#define HW_ENET_TDSR_WR(x, v) (ADDRESS_WRITE(hw_enet_tdsr_t, HW_ENET_TDSR_ADDR(x), v)) #define HW_ENET_TDSR_SET(x, v) (HW_ENET_TDSR_WR(x, HW_ENET_TDSR_RD(x) | (v))) #define HW_ENET_TDSR_CLR(x, v) (HW_ENET_TDSR_WR(x, HW_ENET_TDSR_RD(x) & ~(v))) #define HW_ENET_TDSR_TOG(x, v) (HW_ENET_TDSR_WR(x, HW_ENET_TDSR_RD(x) ^ (v))) @@ -3167,7 +3174,7 @@ #define BS_ENET_TDSR_X_DES_START (29U) /*!< Bit field size in bits for ENET_TDSR_X_DES_START. */ /*! @brief Read current value of the ENET_TDSR_X_DES_START field. */ -#define BR_ENET_TDSR_X_DES_START(x) (HW_ENET_TDSR(x).B.X_DES_START) +#define BR_ENET_TDSR_X_DES_START(x) (UNION_READ(hw_enet_tdsr_t, HW_ENET_TDSR_ADDR(x), U, B.X_DES_START)) /*! @brief Format value for bitfield ENET_TDSR_X_DES_START. */ #define BF_ENET_TDSR_X_DES_START(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TDSR_X_DES_START) & BM_ENET_TDSR_X_DES_START) @@ -3212,8 +3219,8 @@ #define HW_ENET_MRBR_ADDR(x) ((x) + 0x188U) #define HW_ENET_MRBR(x) (*(__IO hw_enet_mrbr_t *) HW_ENET_MRBR_ADDR(x)) -#define HW_ENET_MRBR_RD(x) (HW_ENET_MRBR(x).U) -#define HW_ENET_MRBR_WR(x, v) (HW_ENET_MRBR(x).U = (v)) +#define HW_ENET_MRBR_RD(x) (ADDRESS_READ(hw_enet_mrbr_t, HW_ENET_MRBR_ADDR(x))) +#define HW_ENET_MRBR_WR(x, v) (ADDRESS_WRITE(hw_enet_mrbr_t, HW_ENET_MRBR_ADDR(x), v)) #define HW_ENET_MRBR_SET(x, v) (HW_ENET_MRBR_WR(x, HW_ENET_MRBR_RD(x) | (v))) #define HW_ENET_MRBR_CLR(x, v) (HW_ENET_MRBR_WR(x, HW_ENET_MRBR_RD(x) & ~(v))) #define HW_ENET_MRBR_TOG(x, v) (HW_ENET_MRBR_WR(x, HW_ENET_MRBR_RD(x) ^ (v))) @@ -3234,7 +3241,7 @@ #define BS_ENET_MRBR_R_BUF_SIZE (10U) /*!< Bit field size in bits for ENET_MRBR_R_BUF_SIZE. */ /*! @brief Read current value of the ENET_MRBR_R_BUF_SIZE field. */ -#define BR_ENET_MRBR_R_BUF_SIZE(x) (HW_ENET_MRBR(x).B.R_BUF_SIZE) +#define BR_ENET_MRBR_R_BUF_SIZE(x) (UNION_READ(hw_enet_mrbr_t, HW_ENET_MRBR_ADDR(x), U, B.R_BUF_SIZE)) /*! @brief Format value for bitfield ENET_MRBR_R_BUF_SIZE. */ #define BF_ENET_MRBR_R_BUF_SIZE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_MRBR_R_BUF_SIZE) & BM_ENET_MRBR_R_BUF_SIZE) @@ -3270,8 +3277,8 @@ #define HW_ENET_RSFL_ADDR(x) ((x) + 0x190U) #define HW_ENET_RSFL(x) (*(__IO hw_enet_rsfl_t *) HW_ENET_RSFL_ADDR(x)) -#define HW_ENET_RSFL_RD(x) (HW_ENET_RSFL(x).U) -#define HW_ENET_RSFL_WR(x, v) (HW_ENET_RSFL(x).U = (v)) +#define HW_ENET_RSFL_RD(x) (ADDRESS_READ(hw_enet_rsfl_t, HW_ENET_RSFL_ADDR(x))) +#define HW_ENET_RSFL_WR(x, v) (ADDRESS_WRITE(hw_enet_rsfl_t, HW_ENET_RSFL_ADDR(x), v)) #define HW_ENET_RSFL_SET(x, v) (HW_ENET_RSFL_WR(x, HW_ENET_RSFL_RD(x) | (v))) #define HW_ENET_RSFL_CLR(x, v) (HW_ENET_RSFL_WR(x, HW_ENET_RSFL_RD(x) & ~(v))) #define HW_ENET_RSFL_TOG(x, v) (HW_ENET_RSFL_WR(x, HW_ENET_RSFL_RD(x) ^ (v))) @@ -3296,7 +3303,7 @@ #define BS_ENET_RSFL_RX_SECTION_FULL (8U) /*!< Bit field size in bits for ENET_RSFL_RX_SECTION_FULL. */ /*! @brief Read current value of the ENET_RSFL_RX_SECTION_FULL field. */ -#define BR_ENET_RSFL_RX_SECTION_FULL(x) (HW_ENET_RSFL(x).B.RX_SECTION_FULL) +#define BR_ENET_RSFL_RX_SECTION_FULL(x) (UNION_READ(hw_enet_rsfl_t, HW_ENET_RSFL_ADDR(x), U, B.RX_SECTION_FULL)) /*! @brief Format value for bitfield ENET_RSFL_RX_SECTION_FULL. */ #define BF_ENET_RSFL_RX_SECTION_FULL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RSFL_RX_SECTION_FULL) & BM_ENET_RSFL_RX_SECTION_FULL) @@ -3335,8 +3342,8 @@ #define HW_ENET_RSEM_ADDR(x) ((x) + 0x194U) #define HW_ENET_RSEM(x) (*(__IO hw_enet_rsem_t *) HW_ENET_RSEM_ADDR(x)) -#define HW_ENET_RSEM_RD(x) (HW_ENET_RSEM(x).U) -#define HW_ENET_RSEM_WR(x, v) (HW_ENET_RSEM(x).U = (v)) +#define HW_ENET_RSEM_RD(x) (ADDRESS_READ(hw_enet_rsem_t, HW_ENET_RSEM_ADDR(x))) +#define HW_ENET_RSEM_WR(x, v) (ADDRESS_WRITE(hw_enet_rsem_t, HW_ENET_RSEM_ADDR(x), v)) #define HW_ENET_RSEM_SET(x, v) (HW_ENET_RSEM_WR(x, HW_ENET_RSEM_RD(x) | (v))) #define HW_ENET_RSEM_CLR(x, v) (HW_ENET_RSEM_WR(x, HW_ENET_RSEM_RD(x) & ~(v))) #define HW_ENET_RSEM_TOG(x, v) (HW_ENET_RSEM_WR(x, HW_ENET_RSEM_RD(x) ^ (v))) @@ -3362,7 +3369,7 @@ #define BS_ENET_RSEM_RX_SECTION_EMPTY (8U) /*!< Bit field size in bits for ENET_RSEM_RX_SECTION_EMPTY. */ /*! @brief Read current value of the ENET_RSEM_RX_SECTION_EMPTY field. */ -#define BR_ENET_RSEM_RX_SECTION_EMPTY(x) (HW_ENET_RSEM(x).B.RX_SECTION_EMPTY) +#define BR_ENET_RSEM_RX_SECTION_EMPTY(x) (UNION_READ(hw_enet_rsem_t, HW_ENET_RSEM_ADDR(x), U, B.RX_SECTION_EMPTY)) /*! @brief Format value for bitfield ENET_RSEM_RX_SECTION_EMPTY. */ #define BF_ENET_RSEM_RX_SECTION_EMPTY(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RSEM_RX_SECTION_EMPTY) & BM_ENET_RSEM_RX_SECTION_EMPTY) @@ -3386,7 +3393,7 @@ #define BS_ENET_RSEM_STAT_SECTION_EMPTY (5U) /*!< Bit field size in bits for ENET_RSEM_STAT_SECTION_EMPTY. */ /*! @brief Read current value of the ENET_RSEM_STAT_SECTION_EMPTY field. */ -#define BR_ENET_RSEM_STAT_SECTION_EMPTY(x) (HW_ENET_RSEM(x).B.STAT_SECTION_EMPTY) +#define BR_ENET_RSEM_STAT_SECTION_EMPTY(x) (UNION_READ(hw_enet_rsem_t, HW_ENET_RSEM_ADDR(x), U, B.STAT_SECTION_EMPTY)) /*! @brief Format value for bitfield ENET_RSEM_STAT_SECTION_EMPTY. */ #define BF_ENET_RSEM_STAT_SECTION_EMPTY(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RSEM_STAT_SECTION_EMPTY) & BM_ENET_RSEM_STAT_SECTION_EMPTY) @@ -3422,8 +3429,8 @@ #define HW_ENET_RAEM_ADDR(x) ((x) + 0x198U) #define HW_ENET_RAEM(x) (*(__IO hw_enet_raem_t *) HW_ENET_RAEM_ADDR(x)) -#define HW_ENET_RAEM_RD(x) (HW_ENET_RAEM(x).U) -#define HW_ENET_RAEM_WR(x, v) (HW_ENET_RAEM(x).U = (v)) +#define HW_ENET_RAEM_RD(x) (ADDRESS_READ(hw_enet_raem_t, HW_ENET_RAEM_ADDR(x))) +#define HW_ENET_RAEM_WR(x, v) (ADDRESS_WRITE(hw_enet_raem_t, HW_ENET_RAEM_ADDR(x), v)) #define HW_ENET_RAEM_SET(x, v) (HW_ENET_RAEM_WR(x, HW_ENET_RAEM_RD(x) | (v))) #define HW_ENET_RAEM_CLR(x, v) (HW_ENET_RAEM_WR(x, HW_ENET_RAEM_RD(x) & ~(v))) #define HW_ENET_RAEM_TOG(x, v) (HW_ENET_RAEM_WR(x, HW_ENET_RAEM_RD(x) ^ (v))) @@ -3449,7 +3456,7 @@ #define BS_ENET_RAEM_RX_ALMOST_EMPTY (8U) /*!< Bit field size in bits for ENET_RAEM_RX_ALMOST_EMPTY. */ /*! @brief Read current value of the ENET_RAEM_RX_ALMOST_EMPTY field. */ -#define BR_ENET_RAEM_RX_ALMOST_EMPTY(x) (HW_ENET_RAEM(x).B.RX_ALMOST_EMPTY) +#define BR_ENET_RAEM_RX_ALMOST_EMPTY(x) (UNION_READ(hw_enet_raem_t, HW_ENET_RAEM_ADDR(x), U, B.RX_ALMOST_EMPTY)) /*! @brief Format value for bitfield ENET_RAEM_RX_ALMOST_EMPTY. */ #define BF_ENET_RAEM_RX_ALMOST_EMPTY(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RAEM_RX_ALMOST_EMPTY) & BM_ENET_RAEM_RX_ALMOST_EMPTY) @@ -3485,8 +3492,8 @@ #define HW_ENET_RAFL_ADDR(x) ((x) + 0x19CU) #define HW_ENET_RAFL(x) (*(__IO hw_enet_rafl_t *) HW_ENET_RAFL_ADDR(x)) -#define HW_ENET_RAFL_RD(x) (HW_ENET_RAFL(x).U) -#define HW_ENET_RAFL_WR(x, v) (HW_ENET_RAFL(x).U = (v)) +#define HW_ENET_RAFL_RD(x) (ADDRESS_READ(hw_enet_rafl_t, HW_ENET_RAFL_ADDR(x))) +#define HW_ENET_RAFL_WR(x, v) (ADDRESS_WRITE(hw_enet_rafl_t, HW_ENET_RAFL_ADDR(x), v)) #define HW_ENET_RAFL_SET(x, v) (HW_ENET_RAFL_WR(x, HW_ENET_RAFL_RD(x) | (v))) #define HW_ENET_RAFL_CLR(x, v) (HW_ENET_RAFL_WR(x, HW_ENET_RAFL_RD(x) & ~(v))) #define HW_ENET_RAFL_TOG(x, v) (HW_ENET_RAFL_WR(x, HW_ENET_RAFL_RD(x) ^ (v))) @@ -3512,7 +3519,7 @@ #define BS_ENET_RAFL_RX_ALMOST_FULL (8U) /*!< Bit field size in bits for ENET_RAFL_RX_ALMOST_FULL. */ /*! @brief Read current value of the ENET_RAFL_RX_ALMOST_FULL field. */ -#define BR_ENET_RAFL_RX_ALMOST_FULL(x) (HW_ENET_RAFL(x).B.RX_ALMOST_FULL) +#define BR_ENET_RAFL_RX_ALMOST_FULL(x) (UNION_READ(hw_enet_rafl_t, HW_ENET_RAFL_ADDR(x), U, B.RX_ALMOST_FULL)) /*! @brief Format value for bitfield ENET_RAFL_RX_ALMOST_FULL. */ #define BF_ENET_RAFL_RX_ALMOST_FULL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RAFL_RX_ALMOST_FULL) & BM_ENET_RAFL_RX_ALMOST_FULL) @@ -3548,8 +3555,8 @@ #define HW_ENET_TSEM_ADDR(x) ((x) + 0x1A0U) #define HW_ENET_TSEM(x) (*(__IO hw_enet_tsem_t *) HW_ENET_TSEM_ADDR(x)) -#define HW_ENET_TSEM_RD(x) (HW_ENET_TSEM(x).U) -#define HW_ENET_TSEM_WR(x, v) (HW_ENET_TSEM(x).U = (v)) +#define HW_ENET_TSEM_RD(x) (ADDRESS_READ(hw_enet_tsem_t, HW_ENET_TSEM_ADDR(x))) +#define HW_ENET_TSEM_WR(x, v) (ADDRESS_WRITE(hw_enet_tsem_t, HW_ENET_TSEM_ADDR(x), v)) #define HW_ENET_TSEM_SET(x, v) (HW_ENET_TSEM_WR(x, HW_ENET_TSEM_RD(x) | (v))) #define HW_ENET_TSEM_CLR(x, v) (HW_ENET_TSEM_WR(x, HW_ENET_TSEM_RD(x) & ~(v))) #define HW_ENET_TSEM_TOG(x, v) (HW_ENET_TSEM_WR(x, HW_ENET_TSEM_RD(x) ^ (v))) @@ -3572,7 +3579,7 @@ #define BS_ENET_TSEM_TX_SECTION_EMPTY (8U) /*!< Bit field size in bits for ENET_TSEM_TX_SECTION_EMPTY. */ /*! @brief Read current value of the ENET_TSEM_TX_SECTION_EMPTY field. */ -#define BR_ENET_TSEM_TX_SECTION_EMPTY(x) (HW_ENET_TSEM(x).B.TX_SECTION_EMPTY) +#define BR_ENET_TSEM_TX_SECTION_EMPTY(x) (UNION_READ(hw_enet_tsem_t, HW_ENET_TSEM_ADDR(x), U, B.TX_SECTION_EMPTY)) /*! @brief Format value for bitfield ENET_TSEM_TX_SECTION_EMPTY. */ #define BF_ENET_TSEM_TX_SECTION_EMPTY(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TSEM_TX_SECTION_EMPTY) & BM_ENET_TSEM_TX_SECTION_EMPTY) @@ -3608,8 +3615,8 @@ #define HW_ENET_TAEM_ADDR(x) ((x) + 0x1A4U) #define HW_ENET_TAEM(x) (*(__IO hw_enet_taem_t *) HW_ENET_TAEM_ADDR(x)) -#define HW_ENET_TAEM_RD(x) (HW_ENET_TAEM(x).U) -#define HW_ENET_TAEM_WR(x, v) (HW_ENET_TAEM(x).U = (v)) +#define HW_ENET_TAEM_RD(x) (ADDRESS_READ(hw_enet_taem_t, HW_ENET_TAEM_ADDR(x))) +#define HW_ENET_TAEM_WR(x, v) (ADDRESS_WRITE(hw_enet_taem_t, HW_ENET_TAEM_ADDR(x), v)) #define HW_ENET_TAEM_SET(x, v) (HW_ENET_TAEM_WR(x, HW_ENET_TAEM_RD(x) | (v))) #define HW_ENET_TAEM_CLR(x, v) (HW_ENET_TAEM_WR(x, HW_ENET_TAEM_RD(x) & ~(v))) #define HW_ENET_TAEM_TOG(x, v) (HW_ENET_TAEM_WR(x, HW_ENET_TAEM_RD(x) ^ (v))) @@ -3635,7 +3642,7 @@ #define BS_ENET_TAEM_TX_ALMOST_EMPTY (8U) /*!< Bit field size in bits for ENET_TAEM_TX_ALMOST_EMPTY. */ /*! @brief Read current value of the ENET_TAEM_TX_ALMOST_EMPTY field. */ -#define BR_ENET_TAEM_TX_ALMOST_EMPTY(x) (HW_ENET_TAEM(x).B.TX_ALMOST_EMPTY) +#define BR_ENET_TAEM_TX_ALMOST_EMPTY(x) (UNION_READ(hw_enet_taem_t, HW_ENET_TAEM_ADDR(x), U, B.TX_ALMOST_EMPTY)) /*! @brief Format value for bitfield ENET_TAEM_TX_ALMOST_EMPTY. */ #define BF_ENET_TAEM_TX_ALMOST_EMPTY(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TAEM_TX_ALMOST_EMPTY) & BM_ENET_TAEM_TX_ALMOST_EMPTY) @@ -3671,8 +3678,8 @@ #define HW_ENET_TAFL_ADDR(x) ((x) + 0x1A8U) #define HW_ENET_TAFL(x) (*(__IO hw_enet_tafl_t *) HW_ENET_TAFL_ADDR(x)) -#define HW_ENET_TAFL_RD(x) (HW_ENET_TAFL(x).U) -#define HW_ENET_TAFL_WR(x, v) (HW_ENET_TAFL(x).U = (v)) +#define HW_ENET_TAFL_RD(x) (ADDRESS_READ(hw_enet_tafl_t, HW_ENET_TAFL_ADDR(x))) +#define HW_ENET_TAFL_WR(x, v) (ADDRESS_WRITE(hw_enet_tafl_t, HW_ENET_TAFL_ADDR(x), v)) #define HW_ENET_TAFL_SET(x, v) (HW_ENET_TAFL_WR(x, HW_ENET_TAFL_RD(x) | (v))) #define HW_ENET_TAFL_CLR(x, v) (HW_ENET_TAFL_WR(x, HW_ENET_TAFL_RD(x) & ~(v))) #define HW_ENET_TAFL_TOG(x, v) (HW_ENET_TAFL_WR(x, HW_ENET_TAFL_RD(x) ^ (v))) @@ -3704,7 +3711,7 @@ #define BS_ENET_TAFL_TX_ALMOST_FULL (8U) /*!< Bit field size in bits for ENET_TAFL_TX_ALMOST_FULL. */ /*! @brief Read current value of the ENET_TAFL_TX_ALMOST_FULL field. */ -#define BR_ENET_TAFL_TX_ALMOST_FULL(x) (HW_ENET_TAFL(x).B.TX_ALMOST_FULL) +#define BR_ENET_TAFL_TX_ALMOST_FULL(x) (UNION_READ(hw_enet_tafl_t, HW_ENET_TAFL_ADDR(x), U, B.TX_ALMOST_FULL)) /*! @brief Format value for bitfield ENET_TAFL_TX_ALMOST_FULL. */ #define BF_ENET_TAFL_TX_ALMOST_FULL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TAFL_TX_ALMOST_FULL) & BM_ENET_TAFL_TX_ALMOST_FULL) @@ -3739,8 +3746,8 @@ #define HW_ENET_TIPG_ADDR(x) ((x) + 0x1ACU) #define HW_ENET_TIPG(x) (*(__IO hw_enet_tipg_t *) HW_ENET_TIPG_ADDR(x)) -#define HW_ENET_TIPG_RD(x) (HW_ENET_TIPG(x).U) -#define HW_ENET_TIPG_WR(x, v) (HW_ENET_TIPG(x).U = (v)) +#define HW_ENET_TIPG_RD(x) (ADDRESS_READ(hw_enet_tipg_t, HW_ENET_TIPG_ADDR(x))) +#define HW_ENET_TIPG_WR(x, v) (ADDRESS_WRITE(hw_enet_tipg_t, HW_ENET_TIPG_ADDR(x), v)) #define HW_ENET_TIPG_SET(x, v) (HW_ENET_TIPG_WR(x, HW_ENET_TIPG_RD(x) | (v))) #define HW_ENET_TIPG_CLR(x, v) (HW_ENET_TIPG_WR(x, HW_ENET_TIPG_RD(x) & ~(v))) #define HW_ENET_TIPG_TOG(x, v) (HW_ENET_TIPG_WR(x, HW_ENET_TIPG_RD(x) ^ (v))) @@ -3763,7 +3770,7 @@ #define BS_ENET_TIPG_IPG (5U) /*!< Bit field size in bits for ENET_TIPG_IPG. */ /*! @brief Read current value of the ENET_TIPG_IPG field. */ -#define BR_ENET_TIPG_IPG(x) (HW_ENET_TIPG(x).B.IPG) +#define BR_ENET_TIPG_IPG(x) (UNION_READ(hw_enet_tipg_t, HW_ENET_TIPG_ADDR(x), U, B.IPG)) /*! @brief Format value for bitfield ENET_TIPG_IPG. */ #define BF_ENET_TIPG_IPG(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TIPG_IPG) & BM_ENET_TIPG_IPG) @@ -3798,8 +3805,8 @@ #define HW_ENET_FTRL_ADDR(x) ((x) + 0x1B0U) #define HW_ENET_FTRL(x) (*(__IO hw_enet_ftrl_t *) HW_ENET_FTRL_ADDR(x)) -#define HW_ENET_FTRL_RD(x) (HW_ENET_FTRL(x).U) -#define HW_ENET_FTRL_WR(x, v) (HW_ENET_FTRL(x).U = (v)) +#define HW_ENET_FTRL_RD(x) (ADDRESS_READ(hw_enet_ftrl_t, HW_ENET_FTRL_ADDR(x))) +#define HW_ENET_FTRL_WR(x, v) (ADDRESS_WRITE(hw_enet_ftrl_t, HW_ENET_FTRL_ADDR(x), v)) #define HW_ENET_FTRL_SET(x, v) (HW_ENET_FTRL_WR(x, HW_ENET_FTRL_RD(x) | (v))) #define HW_ENET_FTRL_CLR(x, v) (HW_ENET_FTRL_WR(x, HW_ENET_FTRL_RD(x) & ~(v))) #define HW_ENET_FTRL_TOG(x, v) (HW_ENET_FTRL_WR(x, HW_ENET_FTRL_RD(x) ^ (v))) @@ -3823,7 +3830,7 @@ #define BS_ENET_FTRL_TRUNC_FL (14U) /*!< Bit field size in bits for ENET_FTRL_TRUNC_FL. */ /*! @brief Read current value of the ENET_FTRL_TRUNC_FL field. */ -#define BR_ENET_FTRL_TRUNC_FL(x) (HW_ENET_FTRL(x).B.TRUNC_FL) +#define BR_ENET_FTRL_TRUNC_FL(x) (UNION_READ(hw_enet_ftrl_t, HW_ENET_FTRL_ADDR(x), U, B.TRUNC_FL)) /*! @brief Format value for bitfield ENET_FTRL_TRUNC_FL. */ #define BF_ENET_FTRL_TRUNC_FL(v) ((uint32_t)((uint32_t)(v) << BP_ENET_FTRL_TRUNC_FL) & BM_ENET_FTRL_TRUNC_FL) @@ -3866,8 +3873,8 @@ #define HW_ENET_TACC_ADDR(x) ((x) + 0x1C0U) #define HW_ENET_TACC(x) (*(__IO hw_enet_tacc_t *) HW_ENET_TACC_ADDR(x)) -#define HW_ENET_TACC_RD(x) (HW_ENET_TACC(x).U) -#define HW_ENET_TACC_WR(x, v) (HW_ENET_TACC(x).U = (v)) +#define HW_ENET_TACC_RD(x) (ADDRESS_READ(hw_enet_tacc_t, HW_ENET_TACC_ADDR(x))) +#define HW_ENET_TACC_WR(x, v) (ADDRESS_WRITE(hw_enet_tacc_t, HW_ENET_TACC_ADDR(x), v)) #define HW_ENET_TACC_SET(x, v) (HW_ENET_TACC_WR(x, HW_ENET_TACC_RD(x) | (v))) #define HW_ENET_TACC_CLR(x, v) (HW_ENET_TACC_WR(x, HW_ENET_TACC_RD(x) & ~(v))) #define HW_ENET_TACC_TOG(x, v) (HW_ENET_TACC_WR(x, HW_ENET_TACC_RD(x) ^ (v))) @@ -3894,13 +3901,13 @@ #define BS_ENET_TACC_SHIFT16 (1U) /*!< Bit field size in bits for ENET_TACC_SHIFT16. */ /*! @brief Read current value of the ENET_TACC_SHIFT16 field. */ -#define BR_ENET_TACC_SHIFT16(x) (BITBAND_ACCESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_SHIFT16)) +#define BR_ENET_TACC_SHIFT16(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_SHIFT16))) /*! @brief Format value for bitfield ENET_TACC_SHIFT16. */ #define BF_ENET_TACC_SHIFT16(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TACC_SHIFT16) & BM_ENET_TACC_SHIFT16) /*! @brief Set the SHIFT16 field to a new value. */ -#define BW_ENET_TACC_SHIFT16(x, v) (BITBAND_ACCESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_SHIFT16) = (v)) +#define BW_ENET_TACC_SHIFT16(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_SHIFT16), v)) /*@}*/ /*! @@ -3920,13 +3927,13 @@ #define BS_ENET_TACC_IPCHK (1U) /*!< Bit field size in bits for ENET_TACC_IPCHK. */ /*! @brief Read current value of the ENET_TACC_IPCHK field. */ -#define BR_ENET_TACC_IPCHK(x) (BITBAND_ACCESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_IPCHK)) +#define BR_ENET_TACC_IPCHK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_IPCHK))) /*! @brief Format value for bitfield ENET_TACC_IPCHK. */ #define BF_ENET_TACC_IPCHK(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TACC_IPCHK) & BM_ENET_TACC_IPCHK) /*! @brief Set the IPCHK field to a new value. */ -#define BW_ENET_TACC_IPCHK(x, v) (BITBAND_ACCESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_IPCHK) = (v)) +#define BW_ENET_TACC_IPCHK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_IPCHK), v)) /*@}*/ /*! @@ -3946,13 +3953,13 @@ #define BS_ENET_TACC_PROCHK (1U) /*!< Bit field size in bits for ENET_TACC_PROCHK. */ /*! @brief Read current value of the ENET_TACC_PROCHK field. */ -#define BR_ENET_TACC_PROCHK(x) (BITBAND_ACCESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_PROCHK)) +#define BR_ENET_TACC_PROCHK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_PROCHK))) /*! @brief Format value for bitfield ENET_TACC_PROCHK. */ #define BF_ENET_TACC_PROCHK(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TACC_PROCHK) & BM_ENET_TACC_PROCHK) /*! @brief Set the PROCHK field to a new value. */ -#define BW_ENET_TACC_PROCHK(x, v) (BITBAND_ACCESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_PROCHK) = (v)) +#define BW_ENET_TACC_PROCHK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TACC_ADDR(x), BP_ENET_TACC_PROCHK), v)) /*@}*/ /******************************************************************************* @@ -3990,8 +3997,8 @@ #define HW_ENET_RACC_ADDR(x) ((x) + 0x1C4U) #define HW_ENET_RACC(x) (*(__IO hw_enet_racc_t *) HW_ENET_RACC_ADDR(x)) -#define HW_ENET_RACC_RD(x) (HW_ENET_RACC(x).U) -#define HW_ENET_RACC_WR(x, v) (HW_ENET_RACC(x).U = (v)) +#define HW_ENET_RACC_RD(x) (ADDRESS_READ(hw_enet_racc_t, HW_ENET_RACC_ADDR(x))) +#define HW_ENET_RACC_WR(x, v) (ADDRESS_WRITE(hw_enet_racc_t, HW_ENET_RACC_ADDR(x), v)) #define HW_ENET_RACC_SET(x, v) (HW_ENET_RACC_WR(x, HW_ENET_RACC_RD(x) | (v))) #define HW_ENET_RACC_CLR(x, v) (HW_ENET_RACC_WR(x, HW_ENET_RACC_RD(x) & ~(v))) #define HW_ENET_RACC_TOG(x, v) (HW_ENET_RACC_WR(x, HW_ENET_RACC_RD(x) ^ (v))) @@ -4015,13 +4022,13 @@ #define BS_ENET_RACC_PADREM (1U) /*!< Bit field size in bits for ENET_RACC_PADREM. */ /*! @brief Read current value of the ENET_RACC_PADREM field. */ -#define BR_ENET_RACC_PADREM(x) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_PADREM)) +#define BR_ENET_RACC_PADREM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_PADREM))) /*! @brief Format value for bitfield ENET_RACC_PADREM. */ #define BF_ENET_RACC_PADREM(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RACC_PADREM) & BM_ENET_RACC_PADREM) /*! @brief Set the PADREM field to a new value. */ -#define BW_ENET_RACC_PADREM(x, v) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_PADREM) = (v)) +#define BW_ENET_RACC_PADREM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_PADREM), v)) /*@}*/ /*! @@ -4040,13 +4047,13 @@ #define BS_ENET_RACC_IPDIS (1U) /*!< Bit field size in bits for ENET_RACC_IPDIS. */ /*! @brief Read current value of the ENET_RACC_IPDIS field. */ -#define BR_ENET_RACC_IPDIS(x) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_IPDIS)) +#define BR_ENET_RACC_IPDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_IPDIS))) /*! @brief Format value for bitfield ENET_RACC_IPDIS. */ #define BF_ENET_RACC_IPDIS(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RACC_IPDIS) & BM_ENET_RACC_IPDIS) /*! @brief Set the IPDIS field to a new value. */ -#define BW_ENET_RACC_IPDIS(x, v) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_IPDIS) = (v)) +#define BW_ENET_RACC_IPDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_IPDIS), v)) /*@}*/ /*! @@ -4064,13 +4071,13 @@ #define BS_ENET_RACC_PRODIS (1U) /*!< Bit field size in bits for ENET_RACC_PRODIS. */ /*! @brief Read current value of the ENET_RACC_PRODIS field. */ -#define BR_ENET_RACC_PRODIS(x) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_PRODIS)) +#define BR_ENET_RACC_PRODIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_PRODIS))) /*! @brief Format value for bitfield ENET_RACC_PRODIS. */ #define BF_ENET_RACC_PRODIS(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RACC_PRODIS) & BM_ENET_RACC_PRODIS) /*! @brief Set the PRODIS field to a new value. */ -#define BW_ENET_RACC_PRODIS(x, v) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_PRODIS) = (v)) +#define BW_ENET_RACC_PRODIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_PRODIS), v)) /*@}*/ /*! @@ -4087,13 +4094,13 @@ #define BS_ENET_RACC_LINEDIS (1U) /*!< Bit field size in bits for ENET_RACC_LINEDIS. */ /*! @brief Read current value of the ENET_RACC_LINEDIS field. */ -#define BR_ENET_RACC_LINEDIS(x) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_LINEDIS)) +#define BR_ENET_RACC_LINEDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_LINEDIS))) /*! @brief Format value for bitfield ENET_RACC_LINEDIS. */ #define BF_ENET_RACC_LINEDIS(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RACC_LINEDIS) & BM_ENET_RACC_LINEDIS) /*! @brief Set the LINEDIS field to a new value. */ -#define BW_ENET_RACC_LINEDIS(x, v) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_LINEDIS) = (v)) +#define BW_ENET_RACC_LINEDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_LINEDIS), v)) /*@}*/ /*! @@ -4115,13 +4122,13 @@ #define BS_ENET_RACC_SHIFT16 (1U) /*!< Bit field size in bits for ENET_RACC_SHIFT16. */ /*! @brief Read current value of the ENET_RACC_SHIFT16 field. */ -#define BR_ENET_RACC_SHIFT16(x) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_SHIFT16)) +#define BR_ENET_RACC_SHIFT16(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_SHIFT16))) /*! @brief Format value for bitfield ENET_RACC_SHIFT16. */ #define BF_ENET_RACC_SHIFT16(v) ((uint32_t)((uint32_t)(v) << BP_ENET_RACC_SHIFT16) & BM_ENET_RACC_SHIFT16) /*! @brief Set the SHIFT16 field to a new value. */ -#define BW_ENET_RACC_SHIFT16(x, v) (BITBAND_ACCESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_SHIFT16) = (v)) +#define BW_ENET_RACC_SHIFT16(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_RACC_ADDR(x), BP_ENET_RACC_SHIFT16), v)) /*@}*/ /******************************************************************************* @@ -4150,7 +4157,7 @@ #define HW_ENET_RMON_T_PACKETS_ADDR(x) ((x) + 0x204U) #define HW_ENET_RMON_T_PACKETS(x) (*(__I hw_enet_rmon_t_packets_t *) HW_ENET_RMON_T_PACKETS_ADDR(x)) -#define HW_ENET_RMON_T_PACKETS_RD(x) (HW_ENET_RMON_T_PACKETS(x).U) +#define HW_ENET_RMON_T_PACKETS_RD(x) (ADDRESS_READ(hw_enet_rmon_t_packets_t, HW_ENET_RMON_T_PACKETS_ADDR(x))) /*@}*/ /* @@ -4166,7 +4173,7 @@ #define BS_ENET_RMON_T_PACKETS_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_PACKETS_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_PACKETS_TXPKTS field. */ -#define BR_ENET_RMON_T_PACKETS_TXPKTS(x) (HW_ENET_RMON_T_PACKETS(x).B.TXPKTS) +#define BR_ENET_RMON_T_PACKETS_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_packets_t, HW_ENET_RMON_T_PACKETS_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4197,7 +4204,7 @@ #define HW_ENET_RMON_T_BC_PKT_ADDR(x) ((x) + 0x208U) #define HW_ENET_RMON_T_BC_PKT(x) (*(__I hw_enet_rmon_t_bc_pkt_t *) HW_ENET_RMON_T_BC_PKT_ADDR(x)) -#define HW_ENET_RMON_T_BC_PKT_RD(x) (HW_ENET_RMON_T_BC_PKT(x).U) +#define HW_ENET_RMON_T_BC_PKT_RD(x) (ADDRESS_READ(hw_enet_rmon_t_bc_pkt_t, HW_ENET_RMON_T_BC_PKT_ADDR(x))) /*@}*/ /* @@ -4213,7 +4220,7 @@ #define BS_ENET_RMON_T_BC_PKT_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_BC_PKT_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_BC_PKT_TXPKTS field. */ -#define BR_ENET_RMON_T_BC_PKT_TXPKTS(x) (HW_ENET_RMON_T_BC_PKT(x).B.TXPKTS) +#define BR_ENET_RMON_T_BC_PKT_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_bc_pkt_t, HW_ENET_RMON_T_BC_PKT_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4242,7 +4249,7 @@ #define HW_ENET_RMON_T_MC_PKT_ADDR(x) ((x) + 0x20CU) #define HW_ENET_RMON_T_MC_PKT(x) (*(__I hw_enet_rmon_t_mc_pkt_t *) HW_ENET_RMON_T_MC_PKT_ADDR(x)) -#define HW_ENET_RMON_T_MC_PKT_RD(x) (HW_ENET_RMON_T_MC_PKT(x).U) +#define HW_ENET_RMON_T_MC_PKT_RD(x) (ADDRESS_READ(hw_enet_rmon_t_mc_pkt_t, HW_ENET_RMON_T_MC_PKT_ADDR(x))) /*@}*/ /* @@ -4258,7 +4265,7 @@ #define BS_ENET_RMON_T_MC_PKT_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_MC_PKT_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_MC_PKT_TXPKTS field. */ -#define BR_ENET_RMON_T_MC_PKT_TXPKTS(x) (HW_ENET_RMON_T_MC_PKT(x).B.TXPKTS) +#define BR_ENET_RMON_T_MC_PKT_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_mc_pkt_t, HW_ENET_RMON_T_MC_PKT_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4287,7 +4294,7 @@ #define HW_ENET_RMON_T_CRC_ALIGN_ADDR(x) ((x) + 0x210U) #define HW_ENET_RMON_T_CRC_ALIGN(x) (*(__I hw_enet_rmon_t_crc_align_t *) HW_ENET_RMON_T_CRC_ALIGN_ADDR(x)) -#define HW_ENET_RMON_T_CRC_ALIGN_RD(x) (HW_ENET_RMON_T_CRC_ALIGN(x).U) +#define HW_ENET_RMON_T_CRC_ALIGN_RD(x) (ADDRESS_READ(hw_enet_rmon_t_crc_align_t, HW_ENET_RMON_T_CRC_ALIGN_ADDR(x))) /*@}*/ /* @@ -4303,7 +4310,7 @@ #define BS_ENET_RMON_T_CRC_ALIGN_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_CRC_ALIGN_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_CRC_ALIGN_TXPKTS field. */ -#define BR_ENET_RMON_T_CRC_ALIGN_TXPKTS(x) (HW_ENET_RMON_T_CRC_ALIGN(x).B.TXPKTS) +#define BR_ENET_RMON_T_CRC_ALIGN_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_crc_align_t, HW_ENET_RMON_T_CRC_ALIGN_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4332,7 +4339,7 @@ #define HW_ENET_RMON_T_UNDERSIZE_ADDR(x) ((x) + 0x214U) #define HW_ENET_RMON_T_UNDERSIZE(x) (*(__I hw_enet_rmon_t_undersize_t *) HW_ENET_RMON_T_UNDERSIZE_ADDR(x)) -#define HW_ENET_RMON_T_UNDERSIZE_RD(x) (HW_ENET_RMON_T_UNDERSIZE(x).U) +#define HW_ENET_RMON_T_UNDERSIZE_RD(x) (ADDRESS_READ(hw_enet_rmon_t_undersize_t, HW_ENET_RMON_T_UNDERSIZE_ADDR(x))) /*@}*/ /* @@ -4348,7 +4355,7 @@ #define BS_ENET_RMON_T_UNDERSIZE_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_UNDERSIZE_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_UNDERSIZE_TXPKTS field. */ -#define BR_ENET_RMON_T_UNDERSIZE_TXPKTS(x) (HW_ENET_RMON_T_UNDERSIZE(x).B.TXPKTS) +#define BR_ENET_RMON_T_UNDERSIZE_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_undersize_t, HW_ENET_RMON_T_UNDERSIZE_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4377,7 +4384,7 @@ #define HW_ENET_RMON_T_OVERSIZE_ADDR(x) ((x) + 0x218U) #define HW_ENET_RMON_T_OVERSIZE(x) (*(__I hw_enet_rmon_t_oversize_t *) HW_ENET_RMON_T_OVERSIZE_ADDR(x)) -#define HW_ENET_RMON_T_OVERSIZE_RD(x) (HW_ENET_RMON_T_OVERSIZE(x).U) +#define HW_ENET_RMON_T_OVERSIZE_RD(x) (ADDRESS_READ(hw_enet_rmon_t_oversize_t, HW_ENET_RMON_T_OVERSIZE_ADDR(x))) /*@}*/ /* @@ -4393,7 +4400,7 @@ #define BS_ENET_RMON_T_OVERSIZE_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_OVERSIZE_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_OVERSIZE_TXPKTS field. */ -#define BR_ENET_RMON_T_OVERSIZE_TXPKTS(x) (HW_ENET_RMON_T_OVERSIZE(x).B.TXPKTS) +#define BR_ENET_RMON_T_OVERSIZE_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_oversize_t, HW_ENET_RMON_T_OVERSIZE_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4424,7 +4431,7 @@ #define HW_ENET_RMON_T_FRAG_ADDR(x) ((x) + 0x21CU) #define HW_ENET_RMON_T_FRAG(x) (*(__I hw_enet_rmon_t_frag_t *) HW_ENET_RMON_T_FRAG_ADDR(x)) -#define HW_ENET_RMON_T_FRAG_RD(x) (HW_ENET_RMON_T_FRAG(x).U) +#define HW_ENET_RMON_T_FRAG_RD(x) (ADDRESS_READ(hw_enet_rmon_t_frag_t, HW_ENET_RMON_T_FRAG_ADDR(x))) /*@}*/ /* @@ -4440,7 +4447,7 @@ #define BS_ENET_RMON_T_FRAG_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_FRAG_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_FRAG_TXPKTS field. */ -#define BR_ENET_RMON_T_FRAG_TXPKTS(x) (HW_ENET_RMON_T_FRAG(x).B.TXPKTS) +#define BR_ENET_RMON_T_FRAG_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_frag_t, HW_ENET_RMON_T_FRAG_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4469,7 +4476,7 @@ #define HW_ENET_RMON_T_JAB_ADDR(x) ((x) + 0x220U) #define HW_ENET_RMON_T_JAB(x) (*(__I hw_enet_rmon_t_jab_t *) HW_ENET_RMON_T_JAB_ADDR(x)) -#define HW_ENET_RMON_T_JAB_RD(x) (HW_ENET_RMON_T_JAB(x).U) +#define HW_ENET_RMON_T_JAB_RD(x) (ADDRESS_READ(hw_enet_rmon_t_jab_t, HW_ENET_RMON_T_JAB_ADDR(x))) /*@}*/ /* @@ -4485,7 +4492,7 @@ #define BS_ENET_RMON_T_JAB_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_JAB_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_JAB_TXPKTS field. */ -#define BR_ENET_RMON_T_JAB_TXPKTS(x) (HW_ENET_RMON_T_JAB(x).B.TXPKTS) +#define BR_ENET_RMON_T_JAB_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_jab_t, HW_ENET_RMON_T_JAB_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4514,7 +4521,7 @@ #define HW_ENET_RMON_T_COL_ADDR(x) ((x) + 0x224U) #define HW_ENET_RMON_T_COL(x) (*(__I hw_enet_rmon_t_col_t *) HW_ENET_RMON_T_COL_ADDR(x)) -#define HW_ENET_RMON_T_COL_RD(x) (HW_ENET_RMON_T_COL(x).U) +#define HW_ENET_RMON_T_COL_RD(x) (ADDRESS_READ(hw_enet_rmon_t_col_t, HW_ENET_RMON_T_COL_ADDR(x))) /*@}*/ /* @@ -4530,7 +4537,7 @@ #define BS_ENET_RMON_T_COL_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_COL_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_COL_TXPKTS field. */ -#define BR_ENET_RMON_T_COL_TXPKTS(x) (HW_ENET_RMON_T_COL(x).B.TXPKTS) +#define BR_ENET_RMON_T_COL_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_col_t, HW_ENET_RMON_T_COL_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4561,7 +4568,7 @@ #define HW_ENET_RMON_T_P64_ADDR(x) ((x) + 0x228U) #define HW_ENET_RMON_T_P64(x) (*(__I hw_enet_rmon_t_p64_t *) HW_ENET_RMON_T_P64_ADDR(x)) -#define HW_ENET_RMON_T_P64_RD(x) (HW_ENET_RMON_T_P64(x).U) +#define HW_ENET_RMON_T_P64_RD(x) (ADDRESS_READ(hw_enet_rmon_t_p64_t, HW_ENET_RMON_T_P64_ADDR(x))) /*@}*/ /* @@ -4577,7 +4584,7 @@ #define BS_ENET_RMON_T_P64_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_P64_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_P64_TXPKTS field. */ -#define BR_ENET_RMON_T_P64_TXPKTS(x) (HW_ENET_RMON_T_P64(x).B.TXPKTS) +#define BR_ENET_RMON_T_P64_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_p64_t, HW_ENET_RMON_T_P64_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4606,7 +4613,7 @@ #define HW_ENET_RMON_T_P65TO127_ADDR(x) ((x) + 0x22CU) #define HW_ENET_RMON_T_P65TO127(x) (*(__I hw_enet_rmon_t_p65to127_t *) HW_ENET_RMON_T_P65TO127_ADDR(x)) -#define HW_ENET_RMON_T_P65TO127_RD(x) (HW_ENET_RMON_T_P65TO127(x).U) +#define HW_ENET_RMON_T_P65TO127_RD(x) (ADDRESS_READ(hw_enet_rmon_t_p65to127_t, HW_ENET_RMON_T_P65TO127_ADDR(x))) /*@}*/ /* @@ -4622,7 +4629,7 @@ #define BS_ENET_RMON_T_P65TO127_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_P65TO127_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_P65TO127_TXPKTS field. */ -#define BR_ENET_RMON_T_P65TO127_TXPKTS(x) (HW_ENET_RMON_T_P65TO127(x).B.TXPKTS) +#define BR_ENET_RMON_T_P65TO127_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_p65to127_t, HW_ENET_RMON_T_P65TO127_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4651,7 +4658,7 @@ #define HW_ENET_RMON_T_P128TO255_ADDR(x) ((x) + 0x230U) #define HW_ENET_RMON_T_P128TO255(x) (*(__I hw_enet_rmon_t_p128to255_t *) HW_ENET_RMON_T_P128TO255_ADDR(x)) -#define HW_ENET_RMON_T_P128TO255_RD(x) (HW_ENET_RMON_T_P128TO255(x).U) +#define HW_ENET_RMON_T_P128TO255_RD(x) (ADDRESS_READ(hw_enet_rmon_t_p128to255_t, HW_ENET_RMON_T_P128TO255_ADDR(x))) /*@}*/ /* @@ -4667,7 +4674,7 @@ #define BS_ENET_RMON_T_P128TO255_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_P128TO255_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_P128TO255_TXPKTS field. */ -#define BR_ENET_RMON_T_P128TO255_TXPKTS(x) (HW_ENET_RMON_T_P128TO255(x).B.TXPKTS) +#define BR_ENET_RMON_T_P128TO255_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_p128to255_t, HW_ENET_RMON_T_P128TO255_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4696,7 +4703,7 @@ #define HW_ENET_RMON_T_P256TO511_ADDR(x) ((x) + 0x234U) #define HW_ENET_RMON_T_P256TO511(x) (*(__I hw_enet_rmon_t_p256to511_t *) HW_ENET_RMON_T_P256TO511_ADDR(x)) -#define HW_ENET_RMON_T_P256TO511_RD(x) (HW_ENET_RMON_T_P256TO511(x).U) +#define HW_ENET_RMON_T_P256TO511_RD(x) (ADDRESS_READ(hw_enet_rmon_t_p256to511_t, HW_ENET_RMON_T_P256TO511_ADDR(x))) /*@}*/ /* @@ -4712,7 +4719,7 @@ #define BS_ENET_RMON_T_P256TO511_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_P256TO511_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_P256TO511_TXPKTS field. */ -#define BR_ENET_RMON_T_P256TO511_TXPKTS(x) (HW_ENET_RMON_T_P256TO511(x).B.TXPKTS) +#define BR_ENET_RMON_T_P256TO511_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_p256to511_t, HW_ENET_RMON_T_P256TO511_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4743,7 +4750,7 @@ #define HW_ENET_RMON_T_P512TO1023_ADDR(x) ((x) + 0x238U) #define HW_ENET_RMON_T_P512TO1023(x) (*(__I hw_enet_rmon_t_p512to1023_t *) HW_ENET_RMON_T_P512TO1023_ADDR(x)) -#define HW_ENET_RMON_T_P512TO1023_RD(x) (HW_ENET_RMON_T_P512TO1023(x).U) +#define HW_ENET_RMON_T_P512TO1023_RD(x) (ADDRESS_READ(hw_enet_rmon_t_p512to1023_t, HW_ENET_RMON_T_P512TO1023_ADDR(x))) /*@}*/ /* @@ -4759,7 +4766,7 @@ #define BS_ENET_RMON_T_P512TO1023_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_P512TO1023_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_P512TO1023_TXPKTS field. */ -#define BR_ENET_RMON_T_P512TO1023_TXPKTS(x) (HW_ENET_RMON_T_P512TO1023(x).B.TXPKTS) +#define BR_ENET_RMON_T_P512TO1023_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_p512to1023_t, HW_ENET_RMON_T_P512TO1023_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4788,7 +4795,7 @@ #define HW_ENET_RMON_T_P1024TO2047_ADDR(x) ((x) + 0x23CU) #define HW_ENET_RMON_T_P1024TO2047(x) (*(__I hw_enet_rmon_t_p1024to2047_t *) HW_ENET_RMON_T_P1024TO2047_ADDR(x)) -#define HW_ENET_RMON_T_P1024TO2047_RD(x) (HW_ENET_RMON_T_P1024TO2047(x).U) +#define HW_ENET_RMON_T_P1024TO2047_RD(x) (ADDRESS_READ(hw_enet_rmon_t_p1024to2047_t, HW_ENET_RMON_T_P1024TO2047_ADDR(x))) /*@}*/ /* @@ -4804,7 +4811,7 @@ #define BS_ENET_RMON_T_P1024TO2047_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_P1024TO2047_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_P1024TO2047_TXPKTS field. */ -#define BR_ENET_RMON_T_P1024TO2047_TXPKTS(x) (HW_ENET_RMON_T_P1024TO2047(x).B.TXPKTS) +#define BR_ENET_RMON_T_P1024TO2047_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_p1024to2047_t, HW_ENET_RMON_T_P1024TO2047_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4833,7 +4840,7 @@ #define HW_ENET_RMON_T_P_GTE2048_ADDR(x) ((x) + 0x240U) #define HW_ENET_RMON_T_P_GTE2048(x) (*(__I hw_enet_rmon_t_p_gte2048_t *) HW_ENET_RMON_T_P_GTE2048_ADDR(x)) -#define HW_ENET_RMON_T_P_GTE2048_RD(x) (HW_ENET_RMON_T_P_GTE2048(x).U) +#define HW_ENET_RMON_T_P_GTE2048_RD(x) (ADDRESS_READ(hw_enet_rmon_t_p_gte2048_t, HW_ENET_RMON_T_P_GTE2048_ADDR(x))) /*@}*/ /* @@ -4849,7 +4856,7 @@ #define BS_ENET_RMON_T_P_GTE2048_TXPKTS (16U) /*!< Bit field size in bits for ENET_RMON_T_P_GTE2048_TXPKTS. */ /*! @brief Read current value of the ENET_RMON_T_P_GTE2048_TXPKTS field. */ -#define BR_ENET_RMON_T_P_GTE2048_TXPKTS(x) (HW_ENET_RMON_T_P_GTE2048(x).B.TXPKTS) +#define BR_ENET_RMON_T_P_GTE2048_TXPKTS(x) (UNION_READ(hw_enet_rmon_t_p_gte2048_t, HW_ENET_RMON_T_P_GTE2048_ADDR(x), U, B.TXPKTS)) /*@}*/ /******************************************************************************* @@ -4877,7 +4884,7 @@ #define HW_ENET_RMON_T_OCTETS_ADDR(x) ((x) + 0x244U) #define HW_ENET_RMON_T_OCTETS(x) (*(__I hw_enet_rmon_t_octets_t *) HW_ENET_RMON_T_OCTETS_ADDR(x)) -#define HW_ENET_RMON_T_OCTETS_RD(x) (HW_ENET_RMON_T_OCTETS(x).U) +#define HW_ENET_RMON_T_OCTETS_RD(x) (ADDRESS_READ(hw_enet_rmon_t_octets_t, HW_ENET_RMON_T_OCTETS_ADDR(x))) /*@}*/ /* @@ -4922,7 +4929,7 @@ #define HW_ENET_IEEE_T_FRAME_OK_ADDR(x) ((x) + 0x24CU) #define HW_ENET_IEEE_T_FRAME_OK(x) (*(__I hw_enet_ieee_t_frame_ok_t *) HW_ENET_IEEE_T_FRAME_OK_ADDR(x)) -#define HW_ENET_IEEE_T_FRAME_OK_RD(x) (HW_ENET_IEEE_T_FRAME_OK(x).U) +#define HW_ENET_IEEE_T_FRAME_OK_RD(x) (ADDRESS_READ(hw_enet_ieee_t_frame_ok_t, HW_ENET_IEEE_T_FRAME_OK_ADDR(x))) /*@}*/ /* @@ -4938,7 +4945,7 @@ #define BS_ENET_IEEE_T_FRAME_OK_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_T_FRAME_OK_COUNT. */ /*! @brief Read current value of the ENET_IEEE_T_FRAME_OK_COUNT field. */ -#define BR_ENET_IEEE_T_FRAME_OK_COUNT(x) (HW_ENET_IEEE_T_FRAME_OK(x).B.COUNT) +#define BR_ENET_IEEE_T_FRAME_OK_COUNT(x) (UNION_READ(hw_enet_ieee_t_frame_ok_t, HW_ENET_IEEE_T_FRAME_OK_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -4967,7 +4974,7 @@ #define HW_ENET_IEEE_T_1COL_ADDR(x) ((x) + 0x250U) #define HW_ENET_IEEE_T_1COL(x) (*(__I hw_enet_ieee_t_1col_t *) HW_ENET_IEEE_T_1COL_ADDR(x)) -#define HW_ENET_IEEE_T_1COL_RD(x) (HW_ENET_IEEE_T_1COL(x).U) +#define HW_ENET_IEEE_T_1COL_RD(x) (ADDRESS_READ(hw_enet_ieee_t_1col_t, HW_ENET_IEEE_T_1COL_ADDR(x))) /*@}*/ /* @@ -4983,7 +4990,7 @@ #define BS_ENET_IEEE_T_1COL_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_T_1COL_COUNT. */ /*! @brief Read current value of the ENET_IEEE_T_1COL_COUNT field. */ -#define BR_ENET_IEEE_T_1COL_COUNT(x) (HW_ENET_IEEE_T_1COL(x).B.COUNT) +#define BR_ENET_IEEE_T_1COL_COUNT(x) (UNION_READ(hw_enet_ieee_t_1col_t, HW_ENET_IEEE_T_1COL_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5012,7 +5019,7 @@ #define HW_ENET_IEEE_T_MCOL_ADDR(x) ((x) + 0x254U) #define HW_ENET_IEEE_T_MCOL(x) (*(__I hw_enet_ieee_t_mcol_t *) HW_ENET_IEEE_T_MCOL_ADDR(x)) -#define HW_ENET_IEEE_T_MCOL_RD(x) (HW_ENET_IEEE_T_MCOL(x).U) +#define HW_ENET_IEEE_T_MCOL_RD(x) (ADDRESS_READ(hw_enet_ieee_t_mcol_t, HW_ENET_IEEE_T_MCOL_ADDR(x))) /*@}*/ /* @@ -5028,7 +5035,7 @@ #define BS_ENET_IEEE_T_MCOL_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_T_MCOL_COUNT. */ /*! @brief Read current value of the ENET_IEEE_T_MCOL_COUNT field. */ -#define BR_ENET_IEEE_T_MCOL_COUNT(x) (HW_ENET_IEEE_T_MCOL(x).B.COUNT) +#define BR_ENET_IEEE_T_MCOL_COUNT(x) (UNION_READ(hw_enet_ieee_t_mcol_t, HW_ENET_IEEE_T_MCOL_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5057,7 +5064,7 @@ #define HW_ENET_IEEE_T_DEF_ADDR(x) ((x) + 0x258U) #define HW_ENET_IEEE_T_DEF(x) (*(__I hw_enet_ieee_t_def_t *) HW_ENET_IEEE_T_DEF_ADDR(x)) -#define HW_ENET_IEEE_T_DEF_RD(x) (HW_ENET_IEEE_T_DEF(x).U) +#define HW_ENET_IEEE_T_DEF_RD(x) (ADDRESS_READ(hw_enet_ieee_t_def_t, HW_ENET_IEEE_T_DEF_ADDR(x))) /*@}*/ /* @@ -5073,7 +5080,7 @@ #define BS_ENET_IEEE_T_DEF_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_T_DEF_COUNT. */ /*! @brief Read current value of the ENET_IEEE_T_DEF_COUNT field. */ -#define BR_ENET_IEEE_T_DEF_COUNT(x) (HW_ENET_IEEE_T_DEF(x).B.COUNT) +#define BR_ENET_IEEE_T_DEF_COUNT(x) (UNION_READ(hw_enet_ieee_t_def_t, HW_ENET_IEEE_T_DEF_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5102,7 +5109,7 @@ #define HW_ENET_IEEE_T_LCOL_ADDR(x) ((x) + 0x25CU) #define HW_ENET_IEEE_T_LCOL(x) (*(__I hw_enet_ieee_t_lcol_t *) HW_ENET_IEEE_T_LCOL_ADDR(x)) -#define HW_ENET_IEEE_T_LCOL_RD(x) (HW_ENET_IEEE_T_LCOL(x).U) +#define HW_ENET_IEEE_T_LCOL_RD(x) (ADDRESS_READ(hw_enet_ieee_t_lcol_t, HW_ENET_IEEE_T_LCOL_ADDR(x))) /*@}*/ /* @@ -5118,7 +5125,7 @@ #define BS_ENET_IEEE_T_LCOL_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_T_LCOL_COUNT. */ /*! @brief Read current value of the ENET_IEEE_T_LCOL_COUNT field. */ -#define BR_ENET_IEEE_T_LCOL_COUNT(x) (HW_ENET_IEEE_T_LCOL(x).B.COUNT) +#define BR_ENET_IEEE_T_LCOL_COUNT(x) (UNION_READ(hw_enet_ieee_t_lcol_t, HW_ENET_IEEE_T_LCOL_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5147,7 +5154,7 @@ #define HW_ENET_IEEE_T_EXCOL_ADDR(x) ((x) + 0x260U) #define HW_ENET_IEEE_T_EXCOL(x) (*(__I hw_enet_ieee_t_excol_t *) HW_ENET_IEEE_T_EXCOL_ADDR(x)) -#define HW_ENET_IEEE_T_EXCOL_RD(x) (HW_ENET_IEEE_T_EXCOL(x).U) +#define HW_ENET_IEEE_T_EXCOL_RD(x) (ADDRESS_READ(hw_enet_ieee_t_excol_t, HW_ENET_IEEE_T_EXCOL_ADDR(x))) /*@}*/ /* @@ -5163,7 +5170,7 @@ #define BS_ENET_IEEE_T_EXCOL_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_T_EXCOL_COUNT. */ /*! @brief Read current value of the ENET_IEEE_T_EXCOL_COUNT field. */ -#define BR_ENET_IEEE_T_EXCOL_COUNT(x) (HW_ENET_IEEE_T_EXCOL(x).B.COUNT) +#define BR_ENET_IEEE_T_EXCOL_COUNT(x) (UNION_READ(hw_enet_ieee_t_excol_t, HW_ENET_IEEE_T_EXCOL_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5192,7 +5199,7 @@ #define HW_ENET_IEEE_T_MACERR_ADDR(x) ((x) + 0x264U) #define HW_ENET_IEEE_T_MACERR(x) (*(__I hw_enet_ieee_t_macerr_t *) HW_ENET_IEEE_T_MACERR_ADDR(x)) -#define HW_ENET_IEEE_T_MACERR_RD(x) (HW_ENET_IEEE_T_MACERR(x).U) +#define HW_ENET_IEEE_T_MACERR_RD(x) (ADDRESS_READ(hw_enet_ieee_t_macerr_t, HW_ENET_IEEE_T_MACERR_ADDR(x))) /*@}*/ /* @@ -5208,7 +5215,7 @@ #define BS_ENET_IEEE_T_MACERR_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_T_MACERR_COUNT. */ /*! @brief Read current value of the ENET_IEEE_T_MACERR_COUNT field. */ -#define BR_ENET_IEEE_T_MACERR_COUNT(x) (HW_ENET_IEEE_T_MACERR(x).B.COUNT) +#define BR_ENET_IEEE_T_MACERR_COUNT(x) (UNION_READ(hw_enet_ieee_t_macerr_t, HW_ENET_IEEE_T_MACERR_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5237,7 +5244,7 @@ #define HW_ENET_IEEE_T_CSERR_ADDR(x) ((x) + 0x268U) #define HW_ENET_IEEE_T_CSERR(x) (*(__I hw_enet_ieee_t_cserr_t *) HW_ENET_IEEE_T_CSERR_ADDR(x)) -#define HW_ENET_IEEE_T_CSERR_RD(x) (HW_ENET_IEEE_T_CSERR(x).U) +#define HW_ENET_IEEE_T_CSERR_RD(x) (ADDRESS_READ(hw_enet_ieee_t_cserr_t, HW_ENET_IEEE_T_CSERR_ADDR(x))) /*@}*/ /* @@ -5253,7 +5260,7 @@ #define BS_ENET_IEEE_T_CSERR_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_T_CSERR_COUNT. */ /*! @brief Read current value of the ENET_IEEE_T_CSERR_COUNT field. */ -#define BR_ENET_IEEE_T_CSERR_COUNT(x) (HW_ENET_IEEE_T_CSERR(x).B.COUNT) +#define BR_ENET_IEEE_T_CSERR_COUNT(x) (UNION_READ(hw_enet_ieee_t_cserr_t, HW_ENET_IEEE_T_CSERR_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5282,7 +5289,7 @@ #define HW_ENET_IEEE_T_FDXFC_ADDR(x) ((x) + 0x270U) #define HW_ENET_IEEE_T_FDXFC(x) (*(__I hw_enet_ieee_t_fdxfc_t *) HW_ENET_IEEE_T_FDXFC_ADDR(x)) -#define HW_ENET_IEEE_T_FDXFC_RD(x) (HW_ENET_IEEE_T_FDXFC(x).U) +#define HW_ENET_IEEE_T_FDXFC_RD(x) (ADDRESS_READ(hw_enet_ieee_t_fdxfc_t, HW_ENET_IEEE_T_FDXFC_ADDR(x))) /*@}*/ /* @@ -5298,7 +5305,7 @@ #define BS_ENET_IEEE_T_FDXFC_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_T_FDXFC_COUNT. */ /*! @brief Read current value of the ENET_IEEE_T_FDXFC_COUNT field. */ -#define BR_ENET_IEEE_T_FDXFC_COUNT(x) (HW_ENET_IEEE_T_FDXFC(x).B.COUNT) +#define BR_ENET_IEEE_T_FDXFC_COUNT(x) (UNION_READ(hw_enet_ieee_t_fdxfc_t, HW_ENET_IEEE_T_FDXFC_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5328,7 +5335,7 @@ #define HW_ENET_IEEE_T_OCTETS_OK_ADDR(x) ((x) + 0x274U) #define HW_ENET_IEEE_T_OCTETS_OK(x) (*(__I hw_enet_ieee_t_octets_ok_t *) HW_ENET_IEEE_T_OCTETS_OK_ADDR(x)) -#define HW_ENET_IEEE_T_OCTETS_OK_RD(x) (HW_ENET_IEEE_T_OCTETS_OK(x).U) +#define HW_ENET_IEEE_T_OCTETS_OK_RD(x) (ADDRESS_READ(hw_enet_ieee_t_octets_ok_t, HW_ENET_IEEE_T_OCTETS_OK_ADDR(x))) /*@}*/ /* @@ -5373,7 +5380,7 @@ #define HW_ENET_RMON_R_PACKETS_ADDR(x) ((x) + 0x284U) #define HW_ENET_RMON_R_PACKETS(x) (*(__I hw_enet_rmon_r_packets_t *) HW_ENET_RMON_R_PACKETS_ADDR(x)) -#define HW_ENET_RMON_R_PACKETS_RD(x) (HW_ENET_RMON_R_PACKETS(x).U) +#define HW_ENET_RMON_R_PACKETS_RD(x) (ADDRESS_READ(hw_enet_rmon_r_packets_t, HW_ENET_RMON_R_PACKETS_ADDR(x))) /*@}*/ /* @@ -5389,7 +5396,7 @@ #define BS_ENET_RMON_R_PACKETS_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_PACKETS_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_PACKETS_COUNT field. */ -#define BR_ENET_RMON_R_PACKETS_COUNT(x) (HW_ENET_RMON_R_PACKETS(x).B.COUNT) +#define BR_ENET_RMON_R_PACKETS_COUNT(x) (UNION_READ(hw_enet_rmon_r_packets_t, HW_ENET_RMON_R_PACKETS_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5418,7 +5425,7 @@ #define HW_ENET_RMON_R_BC_PKT_ADDR(x) ((x) + 0x288U) #define HW_ENET_RMON_R_BC_PKT(x) (*(__I hw_enet_rmon_r_bc_pkt_t *) HW_ENET_RMON_R_BC_PKT_ADDR(x)) -#define HW_ENET_RMON_R_BC_PKT_RD(x) (HW_ENET_RMON_R_BC_PKT(x).U) +#define HW_ENET_RMON_R_BC_PKT_RD(x) (ADDRESS_READ(hw_enet_rmon_r_bc_pkt_t, HW_ENET_RMON_R_BC_PKT_ADDR(x))) /*@}*/ /* @@ -5434,7 +5441,7 @@ #define BS_ENET_RMON_R_BC_PKT_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_BC_PKT_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_BC_PKT_COUNT field. */ -#define BR_ENET_RMON_R_BC_PKT_COUNT(x) (HW_ENET_RMON_R_BC_PKT(x).B.COUNT) +#define BR_ENET_RMON_R_BC_PKT_COUNT(x) (UNION_READ(hw_enet_rmon_r_bc_pkt_t, HW_ENET_RMON_R_BC_PKT_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5463,7 +5470,7 @@ #define HW_ENET_RMON_R_MC_PKT_ADDR(x) ((x) + 0x28CU) #define HW_ENET_RMON_R_MC_PKT(x) (*(__I hw_enet_rmon_r_mc_pkt_t *) HW_ENET_RMON_R_MC_PKT_ADDR(x)) -#define HW_ENET_RMON_R_MC_PKT_RD(x) (HW_ENET_RMON_R_MC_PKT(x).U) +#define HW_ENET_RMON_R_MC_PKT_RD(x) (ADDRESS_READ(hw_enet_rmon_r_mc_pkt_t, HW_ENET_RMON_R_MC_PKT_ADDR(x))) /*@}*/ /* @@ -5479,7 +5486,7 @@ #define BS_ENET_RMON_R_MC_PKT_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_MC_PKT_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_MC_PKT_COUNT field. */ -#define BR_ENET_RMON_R_MC_PKT_COUNT(x) (HW_ENET_RMON_R_MC_PKT(x).B.COUNT) +#define BR_ENET_RMON_R_MC_PKT_COUNT(x) (UNION_READ(hw_enet_rmon_r_mc_pkt_t, HW_ENET_RMON_R_MC_PKT_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5508,7 +5515,7 @@ #define HW_ENET_RMON_R_CRC_ALIGN_ADDR(x) ((x) + 0x290U) #define HW_ENET_RMON_R_CRC_ALIGN(x) (*(__I hw_enet_rmon_r_crc_align_t *) HW_ENET_RMON_R_CRC_ALIGN_ADDR(x)) -#define HW_ENET_RMON_R_CRC_ALIGN_RD(x) (HW_ENET_RMON_R_CRC_ALIGN(x).U) +#define HW_ENET_RMON_R_CRC_ALIGN_RD(x) (ADDRESS_READ(hw_enet_rmon_r_crc_align_t, HW_ENET_RMON_R_CRC_ALIGN_ADDR(x))) /*@}*/ /* @@ -5524,7 +5531,7 @@ #define BS_ENET_RMON_R_CRC_ALIGN_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_CRC_ALIGN_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_CRC_ALIGN_COUNT field. */ -#define BR_ENET_RMON_R_CRC_ALIGN_COUNT(x) (HW_ENET_RMON_R_CRC_ALIGN(x).B.COUNT) +#define BR_ENET_RMON_R_CRC_ALIGN_COUNT(x) (UNION_READ(hw_enet_rmon_r_crc_align_t, HW_ENET_RMON_R_CRC_ALIGN_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5553,7 +5560,7 @@ #define HW_ENET_RMON_R_UNDERSIZE_ADDR(x) ((x) + 0x294U) #define HW_ENET_RMON_R_UNDERSIZE(x) (*(__I hw_enet_rmon_r_undersize_t *) HW_ENET_RMON_R_UNDERSIZE_ADDR(x)) -#define HW_ENET_RMON_R_UNDERSIZE_RD(x) (HW_ENET_RMON_R_UNDERSIZE(x).U) +#define HW_ENET_RMON_R_UNDERSIZE_RD(x) (ADDRESS_READ(hw_enet_rmon_r_undersize_t, HW_ENET_RMON_R_UNDERSIZE_ADDR(x))) /*@}*/ /* @@ -5569,7 +5576,7 @@ #define BS_ENET_RMON_R_UNDERSIZE_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_UNDERSIZE_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_UNDERSIZE_COUNT field. */ -#define BR_ENET_RMON_R_UNDERSIZE_COUNT(x) (HW_ENET_RMON_R_UNDERSIZE(x).B.COUNT) +#define BR_ENET_RMON_R_UNDERSIZE_COUNT(x) (UNION_READ(hw_enet_rmon_r_undersize_t, HW_ENET_RMON_R_UNDERSIZE_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5598,7 +5605,7 @@ #define HW_ENET_RMON_R_OVERSIZE_ADDR(x) ((x) + 0x298U) #define HW_ENET_RMON_R_OVERSIZE(x) (*(__I hw_enet_rmon_r_oversize_t *) HW_ENET_RMON_R_OVERSIZE_ADDR(x)) -#define HW_ENET_RMON_R_OVERSIZE_RD(x) (HW_ENET_RMON_R_OVERSIZE(x).U) +#define HW_ENET_RMON_R_OVERSIZE_RD(x) (ADDRESS_READ(hw_enet_rmon_r_oversize_t, HW_ENET_RMON_R_OVERSIZE_ADDR(x))) /*@}*/ /* @@ -5614,7 +5621,7 @@ #define BS_ENET_RMON_R_OVERSIZE_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_OVERSIZE_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_OVERSIZE_COUNT field. */ -#define BR_ENET_RMON_R_OVERSIZE_COUNT(x) (HW_ENET_RMON_R_OVERSIZE(x).B.COUNT) +#define BR_ENET_RMON_R_OVERSIZE_COUNT(x) (UNION_READ(hw_enet_rmon_r_oversize_t, HW_ENET_RMON_R_OVERSIZE_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5643,7 +5650,7 @@ #define HW_ENET_RMON_R_FRAG_ADDR(x) ((x) + 0x29CU) #define HW_ENET_RMON_R_FRAG(x) (*(__I hw_enet_rmon_r_frag_t *) HW_ENET_RMON_R_FRAG_ADDR(x)) -#define HW_ENET_RMON_R_FRAG_RD(x) (HW_ENET_RMON_R_FRAG(x).U) +#define HW_ENET_RMON_R_FRAG_RD(x) (ADDRESS_READ(hw_enet_rmon_r_frag_t, HW_ENET_RMON_R_FRAG_ADDR(x))) /*@}*/ /* @@ -5659,7 +5666,7 @@ #define BS_ENET_RMON_R_FRAG_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_FRAG_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_FRAG_COUNT field. */ -#define BR_ENET_RMON_R_FRAG_COUNT(x) (HW_ENET_RMON_R_FRAG(x).B.COUNT) +#define BR_ENET_RMON_R_FRAG_COUNT(x) (UNION_READ(hw_enet_rmon_r_frag_t, HW_ENET_RMON_R_FRAG_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5688,7 +5695,7 @@ #define HW_ENET_RMON_R_JAB_ADDR(x) ((x) + 0x2A0U) #define HW_ENET_RMON_R_JAB(x) (*(__I hw_enet_rmon_r_jab_t *) HW_ENET_RMON_R_JAB_ADDR(x)) -#define HW_ENET_RMON_R_JAB_RD(x) (HW_ENET_RMON_R_JAB(x).U) +#define HW_ENET_RMON_R_JAB_RD(x) (ADDRESS_READ(hw_enet_rmon_r_jab_t, HW_ENET_RMON_R_JAB_ADDR(x))) /*@}*/ /* @@ -5704,7 +5711,7 @@ #define BS_ENET_RMON_R_JAB_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_JAB_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_JAB_COUNT field. */ -#define BR_ENET_RMON_R_JAB_COUNT(x) (HW_ENET_RMON_R_JAB(x).B.COUNT) +#define BR_ENET_RMON_R_JAB_COUNT(x) (UNION_READ(hw_enet_rmon_r_jab_t, HW_ENET_RMON_R_JAB_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5733,7 +5740,7 @@ #define HW_ENET_RMON_R_P64_ADDR(x) ((x) + 0x2A8U) #define HW_ENET_RMON_R_P64(x) (*(__I hw_enet_rmon_r_p64_t *) HW_ENET_RMON_R_P64_ADDR(x)) -#define HW_ENET_RMON_R_P64_RD(x) (HW_ENET_RMON_R_P64(x).U) +#define HW_ENET_RMON_R_P64_RD(x) (ADDRESS_READ(hw_enet_rmon_r_p64_t, HW_ENET_RMON_R_P64_ADDR(x))) /*@}*/ /* @@ -5749,7 +5756,7 @@ #define BS_ENET_RMON_R_P64_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_P64_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_P64_COUNT field. */ -#define BR_ENET_RMON_R_P64_COUNT(x) (HW_ENET_RMON_R_P64(x).B.COUNT) +#define BR_ENET_RMON_R_P64_COUNT(x) (UNION_READ(hw_enet_rmon_r_p64_t, HW_ENET_RMON_R_P64_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5778,7 +5785,7 @@ #define HW_ENET_RMON_R_P65TO127_ADDR(x) ((x) + 0x2ACU) #define HW_ENET_RMON_R_P65TO127(x) (*(__I hw_enet_rmon_r_p65to127_t *) HW_ENET_RMON_R_P65TO127_ADDR(x)) -#define HW_ENET_RMON_R_P65TO127_RD(x) (HW_ENET_RMON_R_P65TO127(x).U) +#define HW_ENET_RMON_R_P65TO127_RD(x) (ADDRESS_READ(hw_enet_rmon_r_p65to127_t, HW_ENET_RMON_R_P65TO127_ADDR(x))) /*@}*/ /* @@ -5794,7 +5801,7 @@ #define BS_ENET_RMON_R_P65TO127_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_P65TO127_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_P65TO127_COUNT field. */ -#define BR_ENET_RMON_R_P65TO127_COUNT(x) (HW_ENET_RMON_R_P65TO127(x).B.COUNT) +#define BR_ENET_RMON_R_P65TO127_COUNT(x) (UNION_READ(hw_enet_rmon_r_p65to127_t, HW_ENET_RMON_R_P65TO127_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5823,7 +5830,7 @@ #define HW_ENET_RMON_R_P128TO255_ADDR(x) ((x) + 0x2B0U) #define HW_ENET_RMON_R_P128TO255(x) (*(__I hw_enet_rmon_r_p128to255_t *) HW_ENET_RMON_R_P128TO255_ADDR(x)) -#define HW_ENET_RMON_R_P128TO255_RD(x) (HW_ENET_RMON_R_P128TO255(x).U) +#define HW_ENET_RMON_R_P128TO255_RD(x) (ADDRESS_READ(hw_enet_rmon_r_p128to255_t, HW_ENET_RMON_R_P128TO255_ADDR(x))) /*@}*/ /* @@ -5839,7 +5846,7 @@ #define BS_ENET_RMON_R_P128TO255_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_P128TO255_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_P128TO255_COUNT field. */ -#define BR_ENET_RMON_R_P128TO255_COUNT(x) (HW_ENET_RMON_R_P128TO255(x).B.COUNT) +#define BR_ENET_RMON_R_P128TO255_COUNT(x) (UNION_READ(hw_enet_rmon_r_p128to255_t, HW_ENET_RMON_R_P128TO255_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5868,7 +5875,7 @@ #define HW_ENET_RMON_R_P256TO511_ADDR(x) ((x) + 0x2B4U) #define HW_ENET_RMON_R_P256TO511(x) (*(__I hw_enet_rmon_r_p256to511_t *) HW_ENET_RMON_R_P256TO511_ADDR(x)) -#define HW_ENET_RMON_R_P256TO511_RD(x) (HW_ENET_RMON_R_P256TO511(x).U) +#define HW_ENET_RMON_R_P256TO511_RD(x) (ADDRESS_READ(hw_enet_rmon_r_p256to511_t, HW_ENET_RMON_R_P256TO511_ADDR(x))) /*@}*/ /* @@ -5884,7 +5891,7 @@ #define BS_ENET_RMON_R_P256TO511_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_P256TO511_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_P256TO511_COUNT field. */ -#define BR_ENET_RMON_R_P256TO511_COUNT(x) (HW_ENET_RMON_R_P256TO511(x).B.COUNT) +#define BR_ENET_RMON_R_P256TO511_COUNT(x) (UNION_READ(hw_enet_rmon_r_p256to511_t, HW_ENET_RMON_R_P256TO511_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5913,7 +5920,7 @@ #define HW_ENET_RMON_R_P512TO1023_ADDR(x) ((x) + 0x2B8U) #define HW_ENET_RMON_R_P512TO1023(x) (*(__I hw_enet_rmon_r_p512to1023_t *) HW_ENET_RMON_R_P512TO1023_ADDR(x)) -#define HW_ENET_RMON_R_P512TO1023_RD(x) (HW_ENET_RMON_R_P512TO1023(x).U) +#define HW_ENET_RMON_R_P512TO1023_RD(x) (ADDRESS_READ(hw_enet_rmon_r_p512to1023_t, HW_ENET_RMON_R_P512TO1023_ADDR(x))) /*@}*/ /* @@ -5929,7 +5936,7 @@ #define BS_ENET_RMON_R_P512TO1023_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_P512TO1023_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_P512TO1023_COUNT field. */ -#define BR_ENET_RMON_R_P512TO1023_COUNT(x) (HW_ENET_RMON_R_P512TO1023(x).B.COUNT) +#define BR_ENET_RMON_R_P512TO1023_COUNT(x) (UNION_READ(hw_enet_rmon_r_p512to1023_t, HW_ENET_RMON_R_P512TO1023_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -5958,7 +5965,7 @@ #define HW_ENET_RMON_R_P1024TO2047_ADDR(x) ((x) + 0x2BCU) #define HW_ENET_RMON_R_P1024TO2047(x) (*(__I hw_enet_rmon_r_p1024to2047_t *) HW_ENET_RMON_R_P1024TO2047_ADDR(x)) -#define HW_ENET_RMON_R_P1024TO2047_RD(x) (HW_ENET_RMON_R_P1024TO2047(x).U) +#define HW_ENET_RMON_R_P1024TO2047_RD(x) (ADDRESS_READ(hw_enet_rmon_r_p1024to2047_t, HW_ENET_RMON_R_P1024TO2047_ADDR(x))) /*@}*/ /* @@ -5974,7 +5981,7 @@ #define BS_ENET_RMON_R_P1024TO2047_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_P1024TO2047_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_P1024TO2047_COUNT field. */ -#define BR_ENET_RMON_R_P1024TO2047_COUNT(x) (HW_ENET_RMON_R_P1024TO2047(x).B.COUNT) +#define BR_ENET_RMON_R_P1024TO2047_COUNT(x) (UNION_READ(hw_enet_rmon_r_p1024to2047_t, HW_ENET_RMON_R_P1024TO2047_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -6003,7 +6010,7 @@ #define HW_ENET_RMON_R_P_GTE2048_ADDR(x) ((x) + 0x2C0U) #define HW_ENET_RMON_R_P_GTE2048(x) (*(__I hw_enet_rmon_r_p_gte2048_t *) HW_ENET_RMON_R_P_GTE2048_ADDR(x)) -#define HW_ENET_RMON_R_P_GTE2048_RD(x) (HW_ENET_RMON_R_P_GTE2048(x).U) +#define HW_ENET_RMON_R_P_GTE2048_RD(x) (ADDRESS_READ(hw_enet_rmon_r_p_gte2048_t, HW_ENET_RMON_R_P_GTE2048_ADDR(x))) /*@}*/ /* @@ -6019,7 +6026,7 @@ #define BS_ENET_RMON_R_P_GTE2048_COUNT (16U) /*!< Bit field size in bits for ENET_RMON_R_P_GTE2048_COUNT. */ /*! @brief Read current value of the ENET_RMON_R_P_GTE2048_COUNT field. */ -#define BR_ENET_RMON_R_P_GTE2048_COUNT(x) (HW_ENET_RMON_R_P_GTE2048(x).B.COUNT) +#define BR_ENET_RMON_R_P_GTE2048_COUNT(x) (UNION_READ(hw_enet_rmon_r_p_gte2048_t, HW_ENET_RMON_R_P_GTE2048_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -6047,7 +6054,7 @@ #define HW_ENET_RMON_R_OCTETS_ADDR(x) ((x) + 0x2C4U) #define HW_ENET_RMON_R_OCTETS(x) (*(__I hw_enet_rmon_r_octets_t *) HW_ENET_RMON_R_OCTETS_ADDR(x)) -#define HW_ENET_RMON_R_OCTETS_RD(x) (HW_ENET_RMON_R_OCTETS(x).U) +#define HW_ENET_RMON_R_OCTETS_RD(x) (ADDRESS_READ(hw_enet_rmon_r_octets_t, HW_ENET_RMON_R_OCTETS_ADDR(x))) /*@}*/ /* @@ -6096,7 +6103,7 @@ #define HW_ENET_IEEE_R_DROP_ADDR(x) ((x) + 0x2C8U) #define HW_ENET_IEEE_R_DROP(x) (*(__I hw_enet_ieee_r_drop_t *) HW_ENET_IEEE_R_DROP_ADDR(x)) -#define HW_ENET_IEEE_R_DROP_RD(x) (HW_ENET_IEEE_R_DROP(x).U) +#define HW_ENET_IEEE_R_DROP_RD(x) (ADDRESS_READ(hw_enet_ieee_r_drop_t, HW_ENET_IEEE_R_DROP_ADDR(x))) /*@}*/ /* @@ -6112,7 +6119,7 @@ #define BS_ENET_IEEE_R_DROP_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_R_DROP_COUNT. */ /*! @brief Read current value of the ENET_IEEE_R_DROP_COUNT field. */ -#define BR_ENET_IEEE_R_DROP_COUNT(x) (HW_ENET_IEEE_R_DROP(x).B.COUNT) +#define BR_ENET_IEEE_R_DROP_COUNT(x) (UNION_READ(hw_enet_ieee_r_drop_t, HW_ENET_IEEE_R_DROP_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -6141,7 +6148,7 @@ #define HW_ENET_IEEE_R_FRAME_OK_ADDR(x) ((x) + 0x2CCU) #define HW_ENET_IEEE_R_FRAME_OK(x) (*(__I hw_enet_ieee_r_frame_ok_t *) HW_ENET_IEEE_R_FRAME_OK_ADDR(x)) -#define HW_ENET_IEEE_R_FRAME_OK_RD(x) (HW_ENET_IEEE_R_FRAME_OK(x).U) +#define HW_ENET_IEEE_R_FRAME_OK_RD(x) (ADDRESS_READ(hw_enet_ieee_r_frame_ok_t, HW_ENET_IEEE_R_FRAME_OK_ADDR(x))) /*@}*/ /* @@ -6157,7 +6164,7 @@ #define BS_ENET_IEEE_R_FRAME_OK_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_R_FRAME_OK_COUNT. */ /*! @brief Read current value of the ENET_IEEE_R_FRAME_OK_COUNT field. */ -#define BR_ENET_IEEE_R_FRAME_OK_COUNT(x) (HW_ENET_IEEE_R_FRAME_OK(x).B.COUNT) +#define BR_ENET_IEEE_R_FRAME_OK_COUNT(x) (UNION_READ(hw_enet_ieee_r_frame_ok_t, HW_ENET_IEEE_R_FRAME_OK_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -6186,7 +6193,7 @@ #define HW_ENET_IEEE_R_CRC_ADDR(x) ((x) + 0x2D0U) #define HW_ENET_IEEE_R_CRC(x) (*(__I hw_enet_ieee_r_crc_t *) HW_ENET_IEEE_R_CRC_ADDR(x)) -#define HW_ENET_IEEE_R_CRC_RD(x) (HW_ENET_IEEE_R_CRC(x).U) +#define HW_ENET_IEEE_R_CRC_RD(x) (ADDRESS_READ(hw_enet_ieee_r_crc_t, HW_ENET_IEEE_R_CRC_ADDR(x))) /*@}*/ /* @@ -6202,7 +6209,7 @@ #define BS_ENET_IEEE_R_CRC_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_R_CRC_COUNT. */ /*! @brief Read current value of the ENET_IEEE_R_CRC_COUNT field. */ -#define BR_ENET_IEEE_R_CRC_COUNT(x) (HW_ENET_IEEE_R_CRC(x).B.COUNT) +#define BR_ENET_IEEE_R_CRC_COUNT(x) (UNION_READ(hw_enet_ieee_r_crc_t, HW_ENET_IEEE_R_CRC_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -6231,7 +6238,7 @@ #define HW_ENET_IEEE_R_ALIGN_ADDR(x) ((x) + 0x2D4U) #define HW_ENET_IEEE_R_ALIGN(x) (*(__I hw_enet_ieee_r_align_t *) HW_ENET_IEEE_R_ALIGN_ADDR(x)) -#define HW_ENET_IEEE_R_ALIGN_RD(x) (HW_ENET_IEEE_R_ALIGN(x).U) +#define HW_ENET_IEEE_R_ALIGN_RD(x) (ADDRESS_READ(hw_enet_ieee_r_align_t, HW_ENET_IEEE_R_ALIGN_ADDR(x))) /*@}*/ /* @@ -6247,7 +6254,7 @@ #define BS_ENET_IEEE_R_ALIGN_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_R_ALIGN_COUNT. */ /*! @brief Read current value of the ENET_IEEE_R_ALIGN_COUNT field. */ -#define BR_ENET_IEEE_R_ALIGN_COUNT(x) (HW_ENET_IEEE_R_ALIGN(x).B.COUNT) +#define BR_ENET_IEEE_R_ALIGN_COUNT(x) (UNION_READ(hw_enet_ieee_r_align_t, HW_ENET_IEEE_R_ALIGN_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -6276,7 +6283,7 @@ #define HW_ENET_IEEE_R_MACERR_ADDR(x) ((x) + 0x2D8U) #define HW_ENET_IEEE_R_MACERR(x) (*(__I hw_enet_ieee_r_macerr_t *) HW_ENET_IEEE_R_MACERR_ADDR(x)) -#define HW_ENET_IEEE_R_MACERR_RD(x) (HW_ENET_IEEE_R_MACERR(x).U) +#define HW_ENET_IEEE_R_MACERR_RD(x) (ADDRESS_READ(hw_enet_ieee_r_macerr_t, HW_ENET_IEEE_R_MACERR_ADDR(x))) /*@}*/ /* @@ -6292,7 +6299,7 @@ #define BS_ENET_IEEE_R_MACERR_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_R_MACERR_COUNT. */ /*! @brief Read current value of the ENET_IEEE_R_MACERR_COUNT field. */ -#define BR_ENET_IEEE_R_MACERR_COUNT(x) (HW_ENET_IEEE_R_MACERR(x).B.COUNT) +#define BR_ENET_IEEE_R_MACERR_COUNT(x) (UNION_READ(hw_enet_ieee_r_macerr_t, HW_ENET_IEEE_R_MACERR_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -6321,7 +6328,7 @@ #define HW_ENET_IEEE_R_FDXFC_ADDR(x) ((x) + 0x2DCU) #define HW_ENET_IEEE_R_FDXFC(x) (*(__I hw_enet_ieee_r_fdxfc_t *) HW_ENET_IEEE_R_FDXFC_ADDR(x)) -#define HW_ENET_IEEE_R_FDXFC_RD(x) (HW_ENET_IEEE_R_FDXFC(x).U) +#define HW_ENET_IEEE_R_FDXFC_RD(x) (ADDRESS_READ(hw_enet_ieee_r_fdxfc_t, HW_ENET_IEEE_R_FDXFC_ADDR(x))) /*@}*/ /* @@ -6337,7 +6344,7 @@ #define BS_ENET_IEEE_R_FDXFC_COUNT (16U) /*!< Bit field size in bits for ENET_IEEE_R_FDXFC_COUNT. */ /*! @brief Read current value of the ENET_IEEE_R_FDXFC_COUNT field. */ -#define BR_ENET_IEEE_R_FDXFC_COUNT(x) (HW_ENET_IEEE_R_FDXFC(x).B.COUNT) +#define BR_ENET_IEEE_R_FDXFC_COUNT(x) (UNION_READ(hw_enet_ieee_r_fdxfc_t, HW_ENET_IEEE_R_FDXFC_ADDR(x), U, B.COUNT)) /*@}*/ /******************************************************************************* @@ -6365,7 +6372,7 @@ #define HW_ENET_IEEE_R_OCTETS_OK_ADDR(x) ((x) + 0x2E0U) #define HW_ENET_IEEE_R_OCTETS_OK(x) (*(__I hw_enet_ieee_r_octets_ok_t *) HW_ENET_IEEE_R_OCTETS_OK_ADDR(x)) -#define HW_ENET_IEEE_R_OCTETS_OK_RD(x) (HW_ENET_IEEE_R_OCTETS_OK(x).U) +#define HW_ENET_IEEE_R_OCTETS_OK_RD(x) (ADDRESS_READ(hw_enet_ieee_r_octets_ok_t, HW_ENET_IEEE_R_OCTETS_OK_ADDR(x))) /*@}*/ /* @@ -6427,8 +6434,8 @@ #define HW_ENET_ATCR_ADDR(x) ((x) + 0x400U) #define HW_ENET_ATCR(x) (*(__IO hw_enet_atcr_t *) HW_ENET_ATCR_ADDR(x)) -#define HW_ENET_ATCR_RD(x) (HW_ENET_ATCR(x).U) -#define HW_ENET_ATCR_WR(x, v) (HW_ENET_ATCR(x).U = (v)) +#define HW_ENET_ATCR_RD(x) (ADDRESS_READ(hw_enet_atcr_t, HW_ENET_ATCR_ADDR(x))) +#define HW_ENET_ATCR_WR(x, v) (ADDRESS_WRITE(hw_enet_atcr_t, HW_ENET_ATCR_ADDR(x), v)) #define HW_ENET_ATCR_SET(x, v) (HW_ENET_ATCR_WR(x, HW_ENET_ATCR_RD(x) | (v))) #define HW_ENET_ATCR_CLR(x, v) (HW_ENET_ATCR_WR(x, HW_ENET_ATCR_RD(x) & ~(v))) #define HW_ENET_ATCR_TOG(x, v) (HW_ENET_ATCR_WR(x, HW_ENET_ATCR_RD(x) ^ (v))) @@ -6451,13 +6458,13 @@ #define BS_ENET_ATCR_EN (1U) /*!< Bit field size in bits for ENET_ATCR_EN. */ /*! @brief Read current value of the ENET_ATCR_EN field. */ -#define BR_ENET_ATCR_EN(x) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_EN)) +#define BR_ENET_ATCR_EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_EN))) /*! @brief Format value for bitfield ENET_ATCR_EN. */ #define BF_ENET_ATCR_EN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATCR_EN) & BM_ENET_ATCR_EN) /*! @brief Set the EN field to a new value. */ -#define BW_ENET_ATCR_EN(x, v) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_EN) = (v)) +#define BW_ENET_ATCR_EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_EN), v)) /*@}*/ /*! @@ -6476,13 +6483,13 @@ #define BS_ENET_ATCR_OFFEN (1U) /*!< Bit field size in bits for ENET_ATCR_OFFEN. */ /*! @brief Read current value of the ENET_ATCR_OFFEN field. */ -#define BR_ENET_ATCR_OFFEN(x) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_OFFEN)) +#define BR_ENET_ATCR_OFFEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_OFFEN))) /*! @brief Format value for bitfield ENET_ATCR_OFFEN. */ #define BF_ENET_ATCR_OFFEN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATCR_OFFEN) & BM_ENET_ATCR_OFFEN) /*! @brief Set the OFFEN field to a new value. */ -#define BW_ENET_ATCR_OFFEN(x, v) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_OFFEN) = (v)) +#define BW_ENET_ATCR_OFFEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_OFFEN), v)) /*@}*/ /*! @@ -6500,13 +6507,13 @@ #define BS_ENET_ATCR_OFFRST (1U) /*!< Bit field size in bits for ENET_ATCR_OFFRST. */ /*! @brief Read current value of the ENET_ATCR_OFFRST field. */ -#define BR_ENET_ATCR_OFFRST(x) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_OFFRST)) +#define BR_ENET_ATCR_OFFRST(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_OFFRST))) /*! @brief Format value for bitfield ENET_ATCR_OFFRST. */ #define BF_ENET_ATCR_OFFRST(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATCR_OFFRST) & BM_ENET_ATCR_OFFRST) /*! @brief Set the OFFRST field to a new value. */ -#define BW_ENET_ATCR_OFFRST(x, v) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_OFFRST) = (v)) +#define BW_ENET_ATCR_OFFRST(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_OFFRST), v)) /*@}*/ /*! @@ -6526,13 +6533,13 @@ #define BS_ENET_ATCR_PEREN (1U) /*!< Bit field size in bits for ENET_ATCR_PEREN. */ /*! @brief Read current value of the ENET_ATCR_PEREN field. */ -#define BR_ENET_ATCR_PEREN(x) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_PEREN)) +#define BR_ENET_ATCR_PEREN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_PEREN))) /*! @brief Format value for bitfield ENET_ATCR_PEREN. */ #define BF_ENET_ATCR_PEREN(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATCR_PEREN) & BM_ENET_ATCR_PEREN) /*! @brief Set the PEREN field to a new value. */ -#define BW_ENET_ATCR_PEREN(x, v) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_PEREN) = (v)) +#define BW_ENET_ATCR_PEREN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_PEREN), v)) /*@}*/ /*! @@ -6551,13 +6558,13 @@ #define BS_ENET_ATCR_PINPER (1U) /*!< Bit field size in bits for ENET_ATCR_PINPER. */ /*! @brief Read current value of the ENET_ATCR_PINPER field. */ -#define BR_ENET_ATCR_PINPER(x) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_PINPER)) +#define BR_ENET_ATCR_PINPER(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_PINPER))) /*! @brief Format value for bitfield ENET_ATCR_PINPER. */ #define BF_ENET_ATCR_PINPER(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATCR_PINPER) & BM_ENET_ATCR_PINPER) /*! @brief Set the PINPER field to a new value. */ -#define BW_ENET_ATCR_PINPER(x, v) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_PINPER) = (v)) +#define BW_ENET_ATCR_PINPER(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_PINPER), v)) /*@}*/ /*! @@ -6573,13 +6580,13 @@ #define BS_ENET_ATCR_RESTART (1U) /*!< Bit field size in bits for ENET_ATCR_RESTART. */ /*! @brief Read current value of the ENET_ATCR_RESTART field. */ -#define BR_ENET_ATCR_RESTART(x) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_RESTART)) +#define BR_ENET_ATCR_RESTART(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_RESTART))) /*! @brief Format value for bitfield ENET_ATCR_RESTART. */ #define BF_ENET_ATCR_RESTART(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATCR_RESTART) & BM_ENET_ATCR_RESTART) /*! @brief Set the RESTART field to a new value. */ -#define BW_ENET_ATCR_RESTART(x, v) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_RESTART) = (v)) +#define BW_ENET_ATCR_RESTART(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_RESTART), v)) /*@}*/ /*! @@ -6595,13 +6602,13 @@ #define BS_ENET_ATCR_CAPTURE (1U) /*!< Bit field size in bits for ENET_ATCR_CAPTURE. */ /*! @brief Read current value of the ENET_ATCR_CAPTURE field. */ -#define BR_ENET_ATCR_CAPTURE(x) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_CAPTURE)) +#define BR_ENET_ATCR_CAPTURE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_CAPTURE))) /*! @brief Format value for bitfield ENET_ATCR_CAPTURE. */ #define BF_ENET_ATCR_CAPTURE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATCR_CAPTURE) & BM_ENET_ATCR_CAPTURE) /*! @brief Set the CAPTURE field to a new value. */ -#define BW_ENET_ATCR_CAPTURE(x, v) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_CAPTURE) = (v)) +#define BW_ENET_ATCR_CAPTURE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_CAPTURE), v)) /*@}*/ /*! @@ -6620,13 +6627,13 @@ #define BS_ENET_ATCR_SLAVE (1U) /*!< Bit field size in bits for ENET_ATCR_SLAVE. */ /*! @brief Read current value of the ENET_ATCR_SLAVE field. */ -#define BR_ENET_ATCR_SLAVE(x) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_SLAVE)) +#define BR_ENET_ATCR_SLAVE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_SLAVE))) /*! @brief Format value for bitfield ENET_ATCR_SLAVE. */ #define BF_ENET_ATCR_SLAVE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATCR_SLAVE) & BM_ENET_ATCR_SLAVE) /*! @brief Set the SLAVE field to a new value. */ -#define BW_ENET_ATCR_SLAVE(x, v) (BITBAND_ACCESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_SLAVE) = (v)) +#define BW_ENET_ATCR_SLAVE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_ATCR_ADDR(x), BP_ENET_ATCR_SLAVE), v)) /*@}*/ /******************************************************************************* @@ -6654,8 +6661,8 @@ #define HW_ENET_ATVR_ADDR(x) ((x) + 0x404U) #define HW_ENET_ATVR(x) (*(__IO hw_enet_atvr_t *) HW_ENET_ATVR_ADDR(x)) -#define HW_ENET_ATVR_RD(x) (HW_ENET_ATVR(x).U) -#define HW_ENET_ATVR_WR(x, v) (HW_ENET_ATVR(x).U = (v)) +#define HW_ENET_ATVR_RD(x) (ADDRESS_READ(hw_enet_atvr_t, HW_ENET_ATVR_ADDR(x))) +#define HW_ENET_ATVR_WR(x, v) (ADDRESS_WRITE(hw_enet_atvr_t, HW_ENET_ATVR_ADDR(x), v)) #define HW_ENET_ATVR_SET(x, v) (HW_ENET_ATVR_WR(x, HW_ENET_ATVR_RD(x) | (v))) #define HW_ENET_ATVR_CLR(x, v) (HW_ENET_ATVR_WR(x, HW_ENET_ATVR_RD(x) & ~(v))) #define HW_ENET_ATVR_TOG(x, v) (HW_ENET_ATVR_WR(x, HW_ENET_ATVR_RD(x) ^ (v))) @@ -6712,8 +6719,8 @@ #define HW_ENET_ATOFF_ADDR(x) ((x) + 0x408U) #define HW_ENET_ATOFF(x) (*(__IO hw_enet_atoff_t *) HW_ENET_ATOFF_ADDR(x)) -#define HW_ENET_ATOFF_RD(x) (HW_ENET_ATOFF(x).U) -#define HW_ENET_ATOFF_WR(x, v) (HW_ENET_ATOFF(x).U = (v)) +#define HW_ENET_ATOFF_RD(x) (ADDRESS_READ(hw_enet_atoff_t, HW_ENET_ATOFF_ADDR(x))) +#define HW_ENET_ATOFF_WR(x, v) (ADDRESS_WRITE(hw_enet_atoff_t, HW_ENET_ATOFF_ADDR(x), v)) #define HW_ENET_ATOFF_SET(x, v) (HW_ENET_ATOFF_WR(x, HW_ENET_ATOFF_RD(x) | (v))) #define HW_ENET_ATOFF_CLR(x, v) (HW_ENET_ATOFF_WR(x, HW_ENET_ATOFF_RD(x) & ~(v))) #define HW_ENET_ATOFF_TOG(x, v) (HW_ENET_ATOFF_WR(x, HW_ENET_ATOFF_RD(x) ^ (v))) @@ -6770,8 +6777,8 @@ #define HW_ENET_ATPER_ADDR(x) ((x) + 0x40CU) #define HW_ENET_ATPER(x) (*(__IO hw_enet_atper_t *) HW_ENET_ATPER_ADDR(x)) -#define HW_ENET_ATPER_RD(x) (HW_ENET_ATPER(x).U) -#define HW_ENET_ATPER_WR(x, v) (HW_ENET_ATPER(x).U = (v)) +#define HW_ENET_ATPER_RD(x) (ADDRESS_READ(hw_enet_atper_t, HW_ENET_ATPER_ADDR(x))) +#define HW_ENET_ATPER_WR(x, v) (ADDRESS_WRITE(hw_enet_atper_t, HW_ENET_ATPER_ADDR(x), v)) #define HW_ENET_ATPER_SET(x, v) (HW_ENET_ATPER_WR(x, HW_ENET_ATPER_RD(x) | (v))) #define HW_ENET_ATPER_CLR(x, v) (HW_ENET_ATPER_WR(x, HW_ENET_ATPER_RD(x) & ~(v))) #define HW_ENET_ATPER_TOG(x, v) (HW_ENET_ATPER_WR(x, HW_ENET_ATPER_RD(x) ^ (v))) @@ -6833,8 +6840,8 @@ #define HW_ENET_ATCOR_ADDR(x) ((x) + 0x410U) #define HW_ENET_ATCOR(x) (*(__IO hw_enet_atcor_t *) HW_ENET_ATCOR_ADDR(x)) -#define HW_ENET_ATCOR_RD(x) (HW_ENET_ATCOR(x).U) -#define HW_ENET_ATCOR_WR(x, v) (HW_ENET_ATCOR(x).U = (v)) +#define HW_ENET_ATCOR_RD(x) (ADDRESS_READ(hw_enet_atcor_t, HW_ENET_ATCOR_ADDR(x))) +#define HW_ENET_ATCOR_WR(x, v) (ADDRESS_WRITE(hw_enet_atcor_t, HW_ENET_ATCOR_ADDR(x), v)) #define HW_ENET_ATCOR_SET(x, v) (HW_ENET_ATCOR_WR(x, HW_ENET_ATCOR_RD(x) | (v))) #define HW_ENET_ATCOR_CLR(x, v) (HW_ENET_ATCOR_WR(x, HW_ENET_ATCOR_RD(x) & ~(v))) #define HW_ENET_ATCOR_TOG(x, v) (HW_ENET_ATCOR_WR(x, HW_ENET_ATCOR_RD(x) ^ (v))) @@ -6859,7 +6866,7 @@ #define BS_ENET_ATCOR_COR (31U) /*!< Bit field size in bits for ENET_ATCOR_COR. */ /*! @brief Read current value of the ENET_ATCOR_COR field. */ -#define BR_ENET_ATCOR_COR(x) (HW_ENET_ATCOR(x).B.COR) +#define BR_ENET_ATCOR_COR(x) (UNION_READ(hw_enet_atcor_t, HW_ENET_ATCOR_ADDR(x), U, B.COR)) /*! @brief Format value for bitfield ENET_ATCOR_COR. */ #define BF_ENET_ATCOR_COR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATCOR_COR) & BM_ENET_ATCOR_COR) @@ -6897,8 +6904,8 @@ #define HW_ENET_ATINC_ADDR(x) ((x) + 0x414U) #define HW_ENET_ATINC(x) (*(__IO hw_enet_atinc_t *) HW_ENET_ATINC_ADDR(x)) -#define HW_ENET_ATINC_RD(x) (HW_ENET_ATINC(x).U) -#define HW_ENET_ATINC_WR(x, v) (HW_ENET_ATINC(x).U = (v)) +#define HW_ENET_ATINC_RD(x) (ADDRESS_READ(hw_enet_atinc_t, HW_ENET_ATINC_ADDR(x))) +#define HW_ENET_ATINC_WR(x, v) (ADDRESS_WRITE(hw_enet_atinc_t, HW_ENET_ATINC_ADDR(x), v)) #define HW_ENET_ATINC_SET(x, v) (HW_ENET_ATINC_WR(x, HW_ENET_ATINC_RD(x) | (v))) #define HW_ENET_ATINC_CLR(x, v) (HW_ENET_ATINC_WR(x, HW_ENET_ATINC_RD(x) & ~(v))) #define HW_ENET_ATINC_TOG(x, v) (HW_ENET_ATINC_WR(x, HW_ENET_ATINC_RD(x) ^ (v))) @@ -6921,7 +6928,7 @@ #define BS_ENET_ATINC_INC (7U) /*!< Bit field size in bits for ENET_ATINC_INC. */ /*! @brief Read current value of the ENET_ATINC_INC field. */ -#define BR_ENET_ATINC_INC(x) (HW_ENET_ATINC(x).B.INC) +#define BR_ENET_ATINC_INC(x) (UNION_READ(hw_enet_atinc_t, HW_ENET_ATINC_ADDR(x), U, B.INC)) /*! @brief Format value for bitfield ENET_ATINC_INC. */ #define BF_ENET_ATINC_INC(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATINC_INC) & BM_ENET_ATINC_INC) @@ -6943,7 +6950,7 @@ #define BS_ENET_ATINC_INC_CORR (7U) /*!< Bit field size in bits for ENET_ATINC_INC_CORR. */ /*! @brief Read current value of the ENET_ATINC_INC_CORR field. */ -#define BR_ENET_ATINC_INC_CORR(x) (HW_ENET_ATINC(x).B.INC_CORR) +#define BR_ENET_ATINC_INC_CORR(x) (UNION_READ(hw_enet_atinc_t, HW_ENET_ATINC_ADDR(x), U, B.INC_CORR)) /*! @brief Format value for bitfield ENET_ATINC_INC_CORR. */ #define BF_ENET_ATINC_INC_CORR(v) ((uint32_t)((uint32_t)(v) << BP_ENET_ATINC_INC_CORR) & BM_ENET_ATINC_INC_CORR) @@ -6977,7 +6984,7 @@ #define HW_ENET_ATSTMP_ADDR(x) ((x) + 0x418U) #define HW_ENET_ATSTMP(x) (*(__I hw_enet_atstmp_t *) HW_ENET_ATSTMP_ADDR(x)) -#define HW_ENET_ATSTMP_RD(x) (HW_ENET_ATSTMP(x).U) +#define HW_ENET_ATSTMP_RD(x) (ADDRESS_READ(hw_enet_atstmp_t, HW_ENET_ATSTMP_ADDR(x))) /*@}*/ /* @@ -7028,8 +7035,8 @@ #define HW_ENET_TGSR_ADDR(x) ((x) + 0x604U) #define HW_ENET_TGSR(x) (*(__IO hw_enet_tgsr_t *) HW_ENET_TGSR_ADDR(x)) -#define HW_ENET_TGSR_RD(x) (HW_ENET_TGSR(x).U) -#define HW_ENET_TGSR_WR(x, v) (HW_ENET_TGSR(x).U = (v)) +#define HW_ENET_TGSR_RD(x) (ADDRESS_READ(hw_enet_tgsr_t, HW_ENET_TGSR_ADDR(x))) +#define HW_ENET_TGSR_WR(x, v) (ADDRESS_WRITE(hw_enet_tgsr_t, HW_ENET_TGSR_ADDR(x), v)) #define HW_ENET_TGSR_SET(x, v) (HW_ENET_TGSR_WR(x, HW_ENET_TGSR_RD(x) | (v))) #define HW_ENET_TGSR_CLR(x, v) (HW_ENET_TGSR_WR(x, HW_ENET_TGSR_RD(x) & ~(v))) #define HW_ENET_TGSR_TOG(x, v) (HW_ENET_TGSR_WR(x, HW_ENET_TGSR_RD(x) ^ (v))) @@ -7052,13 +7059,13 @@ #define BS_ENET_TGSR_TF0 (1U) /*!< Bit field size in bits for ENET_TGSR_TF0. */ /*! @brief Read current value of the ENET_TGSR_TF0 field. */ -#define BR_ENET_TGSR_TF0(x) (BITBAND_ACCESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF0)) +#define BR_ENET_TGSR_TF0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF0))) /*! @brief Format value for bitfield ENET_TGSR_TF0. */ #define BF_ENET_TGSR_TF0(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TGSR_TF0) & BM_ENET_TGSR_TF0) /*! @brief Set the TF0 field to a new value. */ -#define BW_ENET_TGSR_TF0(x, v) (BITBAND_ACCESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF0) = (v)) +#define BW_ENET_TGSR_TF0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF0), v)) /*@}*/ /*! @@ -7074,13 +7081,13 @@ #define BS_ENET_TGSR_TF1 (1U) /*!< Bit field size in bits for ENET_TGSR_TF1. */ /*! @brief Read current value of the ENET_TGSR_TF1 field. */ -#define BR_ENET_TGSR_TF1(x) (BITBAND_ACCESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF1)) +#define BR_ENET_TGSR_TF1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF1))) /*! @brief Format value for bitfield ENET_TGSR_TF1. */ #define BF_ENET_TGSR_TF1(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TGSR_TF1) & BM_ENET_TGSR_TF1) /*! @brief Set the TF1 field to a new value. */ -#define BW_ENET_TGSR_TF1(x, v) (BITBAND_ACCESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF1) = (v)) +#define BW_ENET_TGSR_TF1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF1), v)) /*@}*/ /*! @@ -7096,13 +7103,13 @@ #define BS_ENET_TGSR_TF2 (1U) /*!< Bit field size in bits for ENET_TGSR_TF2. */ /*! @brief Read current value of the ENET_TGSR_TF2 field. */ -#define BR_ENET_TGSR_TF2(x) (BITBAND_ACCESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF2)) +#define BR_ENET_TGSR_TF2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF2))) /*! @brief Format value for bitfield ENET_TGSR_TF2. */ #define BF_ENET_TGSR_TF2(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TGSR_TF2) & BM_ENET_TGSR_TF2) /*! @brief Set the TF2 field to a new value. */ -#define BW_ENET_TGSR_TF2(x, v) (BITBAND_ACCESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF2) = (v)) +#define BW_ENET_TGSR_TF2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF2), v)) /*@}*/ /*! @@ -7118,13 +7125,13 @@ #define BS_ENET_TGSR_TF3 (1U) /*!< Bit field size in bits for ENET_TGSR_TF3. */ /*! @brief Read current value of the ENET_TGSR_TF3 field. */ -#define BR_ENET_TGSR_TF3(x) (BITBAND_ACCESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF3)) +#define BR_ENET_TGSR_TF3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF3))) /*! @brief Format value for bitfield ENET_TGSR_TF3. */ #define BF_ENET_TGSR_TF3(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TGSR_TF3) & BM_ENET_TGSR_TF3) /*! @brief Set the TF3 field to a new value. */ -#define BW_ENET_TGSR_TF3(x, v) (BITBAND_ACCESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF3) = (v)) +#define BW_ENET_TGSR_TF3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TGSR_ADDR(x), BP_ENET_TGSR_TF3), v)) /*@}*/ /******************************************************************************* @@ -7159,8 +7166,8 @@ #define HW_ENET_TCSRn_ADDR(x, n) ((x) + 0x608U + (0x8U * (n))) #define HW_ENET_TCSRn(x, n) (*(__IO hw_enet_tcsrn_t *) HW_ENET_TCSRn_ADDR(x, n)) -#define HW_ENET_TCSRn_RD(x, n) (HW_ENET_TCSRn(x, n).U) -#define HW_ENET_TCSRn_WR(x, n, v) (HW_ENET_TCSRn(x, n).U = (v)) +#define HW_ENET_TCSRn_RD(x, n) (ADDRESS_READ(hw_enet_tcsrn_t, HW_ENET_TCSRn_ADDR(x, n))) +#define HW_ENET_TCSRn_WR(x, n, v) (ADDRESS_WRITE(hw_enet_tcsrn_t, HW_ENET_TCSRn_ADDR(x, n), v)) #define HW_ENET_TCSRn_SET(x, n, v) (HW_ENET_TCSRn_WR(x, n, HW_ENET_TCSRn_RD(x, n) | (v))) #define HW_ENET_TCSRn_CLR(x, n, v) (HW_ENET_TCSRn_WR(x, n, HW_ENET_TCSRn_RD(x, n) & ~(v))) #define HW_ENET_TCSRn_TOG(x, n, v) (HW_ENET_TCSRn_WR(x, n, HW_ENET_TCSRn_RD(x, n) ^ (v))) @@ -7183,13 +7190,13 @@ #define BS_ENET_TCSRn_TDRE (1U) /*!< Bit field size in bits for ENET_TCSRn_TDRE. */ /*! @brief Read current value of the ENET_TCSRn_TDRE field. */ -#define BR_ENET_TCSRn_TDRE(x, n) (BITBAND_ACCESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TDRE)) +#define BR_ENET_TCSRn_TDRE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TDRE))) /*! @brief Format value for bitfield ENET_TCSRn_TDRE. */ #define BF_ENET_TCSRn_TDRE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCSRn_TDRE) & BM_ENET_TCSRn_TDRE) /*! @brief Set the TDRE field to a new value. */ -#define BW_ENET_TCSRn_TDRE(x, n, v) (BITBAND_ACCESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TDRE) = (v)) +#define BW_ENET_TCSRn_TDRE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TDRE), v)) /*@}*/ /*! @@ -7229,7 +7236,7 @@ #define BS_ENET_TCSRn_TMODE (4U) /*!< Bit field size in bits for ENET_TCSRn_TMODE. */ /*! @brief Read current value of the ENET_TCSRn_TMODE field. */ -#define BR_ENET_TCSRn_TMODE(x, n) (HW_ENET_TCSRn(x, n).B.TMODE) +#define BR_ENET_TCSRn_TMODE(x, n) (UNION_READ(hw_enet_tcsrn_t, HW_ENET_TCSRn_ADDR(x, n), U, B.TMODE)) /*! @brief Format value for bitfield ENET_TCSRn_TMODE. */ #define BF_ENET_TCSRn_TMODE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCSRn_TMODE) & BM_ENET_TCSRn_TMODE) @@ -7251,13 +7258,13 @@ #define BS_ENET_TCSRn_TIE (1U) /*!< Bit field size in bits for ENET_TCSRn_TIE. */ /*! @brief Read current value of the ENET_TCSRn_TIE field. */ -#define BR_ENET_TCSRn_TIE(x, n) (BITBAND_ACCESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TIE)) +#define BR_ENET_TCSRn_TIE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TIE))) /*! @brief Format value for bitfield ENET_TCSRn_TIE. */ #define BF_ENET_TCSRn_TIE(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCSRn_TIE) & BM_ENET_TCSRn_TIE) /*! @brief Set the TIE field to a new value. */ -#define BW_ENET_TCSRn_TIE(x, n, v) (BITBAND_ACCESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TIE) = (v)) +#define BW_ENET_TCSRn_TIE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TIE), v)) /*@}*/ /*! @@ -7277,13 +7284,13 @@ #define BS_ENET_TCSRn_TF (1U) /*!< Bit field size in bits for ENET_TCSRn_TF. */ /*! @brief Read current value of the ENET_TCSRn_TF field. */ -#define BR_ENET_TCSRn_TF(x, n) (BITBAND_ACCESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TF)) +#define BR_ENET_TCSRn_TF(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TF))) /*! @brief Format value for bitfield ENET_TCSRn_TF. */ #define BF_ENET_TCSRn_TF(v) ((uint32_t)((uint32_t)(v) << BP_ENET_TCSRn_TF) & BM_ENET_TCSRn_TF) /*! @brief Set the TF field to a new value. */ -#define BW_ENET_TCSRn_TF(x, n, v) (BITBAND_ACCESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TF) = (v)) +#define BW_ENET_TCSRn_TF(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ENET_TCSRn_ADDR(x, n), BP_ENET_TCSRn_TF), v)) /*@}*/ /******************************************************************************* * HW_ENET_TCCRn - Timer Compare Capture Register @@ -7312,8 +7319,8 @@ #define HW_ENET_TCCRn_ADDR(x, n) ((x) + 0x60CU + (0x8U * (n))) #define HW_ENET_TCCRn(x, n) (*(__IO hw_enet_tccrn_t *) HW_ENET_TCCRn_ADDR(x, n)) -#define HW_ENET_TCCRn_RD(x, n) (HW_ENET_TCCRn(x, n).U) -#define HW_ENET_TCCRn_WR(x, n, v) (HW_ENET_TCCRn(x, n).U = (v)) +#define HW_ENET_TCCRn_RD(x, n) (ADDRESS_READ(hw_enet_tccrn_t, HW_ENET_TCCRn_ADDR(x, n))) +#define HW_ENET_TCCRn_WR(x, n, v) (ADDRESS_WRITE(hw_enet_tccrn_t, HW_ENET_TCCRn_ADDR(x, n), v)) #define HW_ENET_TCCRn_SET(x, n, v) (HW_ENET_TCCRn_WR(x, n, HW_ENET_TCCRn_RD(x, n) | (v))) #define HW_ENET_TCCRn_CLR(x, n, v) (HW_ENET_TCCRn_WR(x, n, HW_ENET_TCCRn_RD(x, n) & ~(v))) #define HW_ENET_TCCRn_TOG(x, n, v) (HW_ENET_TCCRn_WR(x, n, HW_ENET_TCCRn_RD(x, n) ^ (v)))
--- a/hal/device/device/MK64F12/MK64F12_ewm.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_ewm.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -132,8 +139,8 @@ #define HW_EWM_CTRL_ADDR(x) ((x) + 0x0U) #define HW_EWM_CTRL(x) (*(__IO hw_ewm_ctrl_t *) HW_EWM_CTRL_ADDR(x)) -#define HW_EWM_CTRL_RD(x) (HW_EWM_CTRL(x).U) -#define HW_EWM_CTRL_WR(x, v) (HW_EWM_CTRL(x).U = (v)) +#define HW_EWM_CTRL_RD(x) (ADDRESS_READ(hw_ewm_ctrl_t, HW_EWM_CTRL_ADDR(x))) +#define HW_EWM_CTRL_WR(x, v) (ADDRESS_WRITE(hw_ewm_ctrl_t, HW_EWM_CTRL_ADDR(x), v)) #define HW_EWM_CTRL_SET(x, v) (HW_EWM_CTRL_WR(x, HW_EWM_CTRL_RD(x) | (v))) #define HW_EWM_CTRL_CLR(x, v) (HW_EWM_CTRL_WR(x, HW_EWM_CTRL_RD(x) & ~(v))) #define HW_EWM_CTRL_TOG(x, v) (HW_EWM_CTRL_WR(x, HW_EWM_CTRL_RD(x) ^ (v))) @@ -157,13 +164,13 @@ #define BS_EWM_CTRL_EWMEN (1U) /*!< Bit field size in bits for EWM_CTRL_EWMEN. */ /*! @brief Read current value of the EWM_CTRL_EWMEN field. */ -#define BR_EWM_CTRL_EWMEN(x) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_EWMEN)) +#define BR_EWM_CTRL_EWMEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_EWMEN))) /*! @brief Format value for bitfield EWM_CTRL_EWMEN. */ #define BF_EWM_CTRL_EWMEN(v) ((uint8_t)((uint8_t)(v) << BP_EWM_CTRL_EWMEN) & BM_EWM_CTRL_EWMEN) /*! @brief Set the EWMEN field to a new value. */ -#define BW_EWM_CTRL_EWMEN(x, v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_EWMEN) = (v)) +#define BW_EWM_CTRL_EWMEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_EWMEN), v)) /*@}*/ /*! @@ -178,13 +185,13 @@ #define BS_EWM_CTRL_ASSIN (1U) /*!< Bit field size in bits for EWM_CTRL_ASSIN. */ /*! @brief Read current value of the EWM_CTRL_ASSIN field. */ -#define BR_EWM_CTRL_ASSIN(x) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_ASSIN)) +#define BR_EWM_CTRL_ASSIN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_ASSIN))) /*! @brief Format value for bitfield EWM_CTRL_ASSIN. */ #define BF_EWM_CTRL_ASSIN(v) ((uint8_t)((uint8_t)(v) << BP_EWM_CTRL_ASSIN) & BM_EWM_CTRL_ASSIN) /*! @brief Set the ASSIN field to a new value. */ -#define BW_EWM_CTRL_ASSIN(x, v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_ASSIN) = (v)) +#define BW_EWM_CTRL_ASSIN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_ASSIN), v)) /*@}*/ /*! @@ -198,13 +205,13 @@ #define BS_EWM_CTRL_INEN (1U) /*!< Bit field size in bits for EWM_CTRL_INEN. */ /*! @brief Read current value of the EWM_CTRL_INEN field. */ -#define BR_EWM_CTRL_INEN(x) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INEN)) +#define BR_EWM_CTRL_INEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INEN))) /*! @brief Format value for bitfield EWM_CTRL_INEN. */ #define BF_EWM_CTRL_INEN(v) ((uint8_t)((uint8_t)(v) << BP_EWM_CTRL_INEN) & BM_EWM_CTRL_INEN) /*! @brief Set the INEN field to a new value. */ -#define BW_EWM_CTRL_INEN(x, v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INEN) = (v)) +#define BW_EWM_CTRL_INEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INEN), v)) /*@}*/ /*! @@ -219,13 +226,13 @@ #define BS_EWM_CTRL_INTEN (1U) /*!< Bit field size in bits for EWM_CTRL_INTEN. */ /*! @brief Read current value of the EWM_CTRL_INTEN field. */ -#define BR_EWM_CTRL_INTEN(x) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INTEN)) +#define BR_EWM_CTRL_INTEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INTEN))) /*! @brief Format value for bitfield EWM_CTRL_INTEN. */ #define BF_EWM_CTRL_INTEN(v) ((uint8_t)((uint8_t)(v) << BP_EWM_CTRL_INTEN) & BM_EWM_CTRL_INTEN) /*! @brief Set the INTEN field to a new value. */ -#define BW_EWM_CTRL_INTEN(x, v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INTEN) = (v)) +#define BW_EWM_CTRL_INTEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INTEN), v)) /*@}*/ /******************************************************************************* @@ -256,8 +263,8 @@ #define HW_EWM_SERV_ADDR(x) ((x) + 0x1U) #define HW_EWM_SERV(x) (*(__O hw_ewm_serv_t *) HW_EWM_SERV_ADDR(x)) -#define HW_EWM_SERV_RD(x) (HW_EWM_SERV(x).U) -#define HW_EWM_SERV_WR(x, v) (HW_EWM_SERV(x).U = (v)) +#define HW_EWM_SERV_RD(x) (ADDRESS_READ(hw_ewm_serv_t, HW_EWM_SERV_ADDR(x))) +#define HW_EWM_SERV_WR(x, v) (ADDRESS_WRITE(hw_ewm_serv_t, HW_EWM_SERV_ADDR(x), v)) /*@}*/ /* @@ -316,8 +323,8 @@ #define HW_EWM_CMPL_ADDR(x) ((x) + 0x2U) #define HW_EWM_CMPL(x) (*(__IO hw_ewm_cmpl_t *) HW_EWM_CMPL_ADDR(x)) -#define HW_EWM_CMPL_RD(x) (HW_EWM_CMPL(x).U) -#define HW_EWM_CMPL_WR(x, v) (HW_EWM_CMPL(x).U = (v)) +#define HW_EWM_CMPL_RD(x) (ADDRESS_READ(hw_ewm_cmpl_t, HW_EWM_CMPL_ADDR(x))) +#define HW_EWM_CMPL_WR(x, v) (ADDRESS_WRITE(hw_ewm_cmpl_t, HW_EWM_CMPL_ADDR(x), v)) #define HW_EWM_CMPL_SET(x, v) (HW_EWM_CMPL_WR(x, HW_EWM_CMPL_RD(x) | (v))) #define HW_EWM_CMPL_CLR(x, v) (HW_EWM_CMPL_WR(x, HW_EWM_CMPL_RD(x) & ~(v))) #define HW_EWM_CMPL_TOG(x, v) (HW_EWM_CMPL_WR(x, HW_EWM_CMPL_RD(x) ^ (v))) @@ -381,8 +388,8 @@ #define HW_EWM_CMPH_ADDR(x) ((x) + 0x3U) #define HW_EWM_CMPH(x) (*(__IO hw_ewm_cmph_t *) HW_EWM_CMPH_ADDR(x)) -#define HW_EWM_CMPH_RD(x) (HW_EWM_CMPH(x).U) -#define HW_EWM_CMPH_WR(x, v) (HW_EWM_CMPH(x).U = (v)) +#define HW_EWM_CMPH_RD(x) (ADDRESS_READ(hw_ewm_cmph_t, HW_EWM_CMPH_ADDR(x))) +#define HW_EWM_CMPH_WR(x, v) (ADDRESS_WRITE(hw_ewm_cmph_t, HW_EWM_CMPH_ADDR(x), v)) #define HW_EWM_CMPH_SET(x, v) (HW_EWM_CMPH_WR(x, HW_EWM_CMPH_RD(x) | (v))) #define HW_EWM_CMPH_CLR(x, v) (HW_EWM_CMPH_WR(x, HW_EWM_CMPH_RD(x) & ~(v))) #define HW_EWM_CMPH_TOG(x, v) (HW_EWM_CMPH_WR(x, HW_EWM_CMPH_RD(x) ^ (v)))
--- a/hal/device/device/MK64F12/MK64F12_fb.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_fb.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -129,8 +136,8 @@ #define HW_FB_CSARn_ADDR(x, n) ((x) + 0x0U + (0xCU * (n))) #define HW_FB_CSARn(x, n) (*(__IO hw_fb_csarn_t *) HW_FB_CSARn_ADDR(x, n)) -#define HW_FB_CSARn_RD(x, n) (HW_FB_CSARn(x, n).U) -#define HW_FB_CSARn_WR(x, n, v) (HW_FB_CSARn(x, n).U = (v)) +#define HW_FB_CSARn_RD(x, n) (ADDRESS_READ(hw_fb_csarn_t, HW_FB_CSARn_ADDR(x, n))) +#define HW_FB_CSARn_WR(x, n, v) (ADDRESS_WRITE(hw_fb_csarn_t, HW_FB_CSARn_ADDR(x, n), v)) #define HW_FB_CSARn_SET(x, n, v) (HW_FB_CSARn_WR(x, n, HW_FB_CSARn_RD(x, n) | (v))) #define HW_FB_CSARn_CLR(x, n, v) (HW_FB_CSARn_WR(x, n, HW_FB_CSARn_RD(x, n) & ~(v))) #define HW_FB_CSARn_TOG(x, n, v) (HW_FB_CSARn_WR(x, n, HW_FB_CSARn_RD(x, n) ^ (v))) @@ -157,7 +164,7 @@ #define BS_FB_CSARn_BA (16U) /*!< Bit field size in bits for FB_CSARn_BA. */ /*! @brief Read current value of the FB_CSARn_BA field. */ -#define BR_FB_CSARn_BA(x, n) (HW_FB_CSARn(x, n).B.BA) +#define BR_FB_CSARn_BA(x, n) (UNION_READ(hw_fb_csarn_t, HW_FB_CSARn_ADDR(x, n), U, B.BA)) /*! @brief Format value for bitfield FB_CSARn_BA. */ #define BF_FB_CSARn_BA(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSARn_BA) & BM_FB_CSARn_BA) @@ -199,8 +206,8 @@ #define HW_FB_CSMRn_ADDR(x, n) ((x) + 0x4U + (0xCU * (n))) #define HW_FB_CSMRn(x, n) (*(__IO hw_fb_csmrn_t *) HW_FB_CSMRn_ADDR(x, n)) -#define HW_FB_CSMRn_RD(x, n) (HW_FB_CSMRn(x, n).U) -#define HW_FB_CSMRn_WR(x, n, v) (HW_FB_CSMRn(x, n).U = (v)) +#define HW_FB_CSMRn_RD(x, n) (ADDRESS_READ(hw_fb_csmrn_t, HW_FB_CSMRn_ADDR(x, n))) +#define HW_FB_CSMRn_WR(x, n, v) (ADDRESS_WRITE(hw_fb_csmrn_t, HW_FB_CSMRn_ADDR(x, n), v)) #define HW_FB_CSMRn_SET(x, n, v) (HW_FB_CSMRn_WR(x, n, HW_FB_CSMRn_RD(x, n) | (v))) #define HW_FB_CSMRn_CLR(x, n, v) (HW_FB_CSMRn_WR(x, n, HW_FB_CSMRn_RD(x, n) & ~(v))) #define HW_FB_CSMRn_TOG(x, n, v) (HW_FB_CSMRn_WR(x, n, HW_FB_CSMRn_RD(x, n) ^ (v))) @@ -230,13 +237,13 @@ #define BS_FB_CSMRn_V (1U) /*!< Bit field size in bits for FB_CSMRn_V. */ /*! @brief Read current value of the FB_CSMRn_V field. */ -#define BR_FB_CSMRn_V(x, n) (BITBAND_ACCESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_V)) +#define BR_FB_CSMRn_V(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_V))) /*! @brief Format value for bitfield FB_CSMRn_V. */ #define BF_FB_CSMRn_V(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSMRn_V) & BM_FB_CSMRn_V) /*! @brief Set the V field to a new value. */ -#define BW_FB_CSMRn_V(x, n, v) (BITBAND_ACCESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_V) = (v)) +#define BW_FB_CSMRn_V(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_V), v)) /*@}*/ /*! @@ -256,13 +263,13 @@ #define BS_FB_CSMRn_WP (1U) /*!< Bit field size in bits for FB_CSMRn_WP. */ /*! @brief Read current value of the FB_CSMRn_WP field. */ -#define BR_FB_CSMRn_WP(x, n) (BITBAND_ACCESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_WP)) +#define BR_FB_CSMRn_WP(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_WP))) /*! @brief Format value for bitfield FB_CSMRn_WP. */ #define BF_FB_CSMRn_WP(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSMRn_WP) & BM_FB_CSMRn_WP) /*! @brief Set the WP field to a new value. */ -#define BW_FB_CSMRn_WP(x, n, v) (BITBAND_ACCESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_WP) = (v)) +#define BW_FB_CSMRn_WP(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_WP), v)) /*@}*/ /*! @@ -281,7 +288,7 @@ #define BS_FB_CSMRn_BAM (16U) /*!< Bit field size in bits for FB_CSMRn_BAM. */ /*! @brief Read current value of the FB_CSMRn_BAM field. */ -#define BR_FB_CSMRn_BAM(x, n) (HW_FB_CSMRn(x, n).B.BAM) +#define BR_FB_CSMRn_BAM(x, n) (UNION_READ(hw_fb_csmrn_t, HW_FB_CSMRn_ADDR(x, n), U, B.BAM)) /*! @brief Format value for bitfield FB_CSMRn_BAM. */ #define BF_FB_CSMRn_BAM(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSMRn_BAM) & BM_FB_CSMRn_BAM) @@ -337,8 +344,8 @@ #define HW_FB_CSCRn_ADDR(x, n) ((x) + 0x8U + (0xCU * (n))) #define HW_FB_CSCRn(x, n) (*(__IO hw_fb_cscrn_t *) HW_FB_CSCRn_ADDR(x, n)) -#define HW_FB_CSCRn_RD(x, n) (HW_FB_CSCRn(x, n).U) -#define HW_FB_CSCRn_WR(x, n, v) (HW_FB_CSCRn(x, n).U = (v)) +#define HW_FB_CSCRn_RD(x, n) (ADDRESS_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n))) +#define HW_FB_CSCRn_WR(x, n, v) (ADDRESS_WRITE(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), v)) #define HW_FB_CSCRn_SET(x, n, v) (HW_FB_CSCRn_WR(x, n, HW_FB_CSCRn_RD(x, n) | (v))) #define HW_FB_CSCRn_CLR(x, n, v) (HW_FB_CSCRn_WR(x, n, HW_FB_CSCRn_RD(x, n) & ~(v))) #define HW_FB_CSCRn_TOG(x, n, v) (HW_FB_CSCRn_WR(x, n, HW_FB_CSCRn_RD(x, n) ^ (v))) @@ -368,13 +375,13 @@ #define BS_FB_CSCRn_BSTW (1U) /*!< Bit field size in bits for FB_CSCRn_BSTW. */ /*! @brief Read current value of the FB_CSCRn_BSTW field. */ -#define BR_FB_CSCRn_BSTW(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTW)) +#define BR_FB_CSCRn_BSTW(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTW))) /*! @brief Format value for bitfield FB_CSCRn_BSTW. */ #define BF_FB_CSCRn_BSTW(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_BSTW) & BM_FB_CSCRn_BSTW) /*! @brief Set the BSTW field to a new value. */ -#define BW_FB_CSCRn_BSTW(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTW) = (v)) +#define BW_FB_CSCRn_BSTW(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTW), v)) /*@}*/ /*! @@ -397,13 +404,13 @@ #define BS_FB_CSCRn_BSTR (1U) /*!< Bit field size in bits for FB_CSCRn_BSTR. */ /*! @brief Read current value of the FB_CSCRn_BSTR field. */ -#define BR_FB_CSCRn_BSTR(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTR)) +#define BR_FB_CSCRn_BSTR(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTR))) /*! @brief Format value for bitfield FB_CSCRn_BSTR. */ #define BF_FB_CSCRn_BSTR(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_BSTR) & BM_FB_CSCRn_BSTR) /*! @brief Set the BSTR field to a new value. */ -#define BW_FB_CSCRn_BSTR(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTR) = (v)) +#define BW_FB_CSCRn_BSTR(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTR), v)) /*@}*/ /*! @@ -424,13 +431,13 @@ #define BS_FB_CSCRn_BEM (1U) /*!< Bit field size in bits for FB_CSCRn_BEM. */ /*! @brief Read current value of the FB_CSCRn_BEM field. */ -#define BR_FB_CSCRn_BEM(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BEM)) +#define BR_FB_CSCRn_BEM(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BEM))) /*! @brief Format value for bitfield FB_CSCRn_BEM. */ #define BF_FB_CSCRn_BEM(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_BEM) & BM_FB_CSCRn_BEM) /*! @brief Set the BEM field to a new value. */ -#define BW_FB_CSCRn_BEM(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BEM) = (v)) +#define BW_FB_CSCRn_BEM(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BEM), v)) /*@}*/ /*! @@ -451,7 +458,7 @@ #define BS_FB_CSCRn_PS (2U) /*!< Bit field size in bits for FB_CSCRn_PS. */ /*! @brief Read current value of the FB_CSCRn_PS field. */ -#define BR_FB_CSCRn_PS(x, n) (HW_FB_CSCRn(x, n).B.PS) +#define BR_FB_CSCRn_PS(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.PS)) /*! @brief Format value for bitfield FB_CSCRn_PS. */ #define BF_FB_CSCRn_PS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_PS) & BM_FB_CSCRn_PS) @@ -480,13 +487,13 @@ #define BS_FB_CSCRn_AA (1U) /*!< Bit field size in bits for FB_CSCRn_AA. */ /*! @brief Read current value of the FB_CSCRn_AA field. */ -#define BR_FB_CSCRn_AA(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_AA)) +#define BR_FB_CSCRn_AA(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_AA))) /*! @brief Format value for bitfield FB_CSCRn_AA. */ #define BF_FB_CSCRn_AA(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_AA) & BM_FB_CSCRn_AA) /*! @brief Set the AA field to a new value. */ -#define BW_FB_CSCRn_AA(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_AA) = (v)) +#define BW_FB_CSCRn_AA(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_AA), v)) /*@}*/ /*! @@ -505,13 +512,13 @@ #define BS_FB_CSCRn_BLS (1U) /*!< Bit field size in bits for FB_CSCRn_BLS. */ /*! @brief Read current value of the FB_CSCRn_BLS field. */ -#define BR_FB_CSCRn_BLS(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BLS)) +#define BR_FB_CSCRn_BLS(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BLS))) /*! @brief Format value for bitfield FB_CSCRn_BLS. */ #define BF_FB_CSCRn_BLS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_BLS) & BM_FB_CSCRn_BLS) /*! @brief Set the BLS field to a new value. */ -#define BW_FB_CSCRn_BLS(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BLS) = (v)) +#define BW_FB_CSCRn_BLS(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BLS), v)) /*@}*/ /*! @@ -527,7 +534,7 @@ #define BS_FB_CSCRn_WS (6U) /*!< Bit field size in bits for FB_CSCRn_WS. */ /*! @brief Read current value of the FB_CSCRn_WS field. */ -#define BR_FB_CSCRn_WS(x, n) (HW_FB_CSCRn(x, n).B.WS) +#define BR_FB_CSCRn_WS(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.WS)) /*! @brief Format value for bitfield FB_CSCRn_WS. */ #define BF_FB_CSCRn_WS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_WS) & BM_FB_CSCRn_WS) @@ -557,7 +564,7 @@ #define BS_FB_CSCRn_WRAH (2U) /*!< Bit field size in bits for FB_CSCRn_WRAH. */ /*! @brief Read current value of the FB_CSCRn_WRAH field. */ -#define BR_FB_CSCRn_WRAH(x, n) (HW_FB_CSCRn(x, n).B.WRAH) +#define BR_FB_CSCRn_WRAH(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.WRAH)) /*! @brief Format value for bitfield FB_CSCRn_WRAH. */ #define BF_FB_CSCRn_WRAH(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_WRAH) & BM_FB_CSCRn_WRAH) @@ -588,7 +595,7 @@ #define BS_FB_CSCRn_RDAH (2U) /*!< Bit field size in bits for FB_CSCRn_RDAH. */ /*! @brief Read current value of the FB_CSCRn_RDAH field. */ -#define BR_FB_CSCRn_RDAH(x, n) (HW_FB_CSCRn(x, n).B.RDAH) +#define BR_FB_CSCRn_RDAH(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.RDAH)) /*! @brief Format value for bitfield FB_CSCRn_RDAH. */ #define BF_FB_CSCRn_RDAH(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_RDAH) & BM_FB_CSCRn_RDAH) @@ -619,7 +626,7 @@ #define BS_FB_CSCRn_ASET (2U) /*!< Bit field size in bits for FB_CSCRn_ASET. */ /*! @brief Read current value of the FB_CSCRn_ASET field. */ -#define BR_FB_CSCRn_ASET(x, n) (HW_FB_CSCRn(x, n).B.ASET) +#define BR_FB_CSCRn_ASET(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.ASET)) /*! @brief Format value for bitfield FB_CSCRn_ASET. */ #define BF_FB_CSCRn_ASET(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_ASET) & BM_FB_CSCRn_ASET) @@ -645,13 +652,13 @@ #define BS_FB_CSCRn_EXTS (1U) /*!< Bit field size in bits for FB_CSCRn_EXTS. */ /*! @brief Read current value of the FB_CSCRn_EXTS field. */ -#define BR_FB_CSCRn_EXTS(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_EXTS)) +#define BR_FB_CSCRn_EXTS(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_EXTS))) /*! @brief Format value for bitfield FB_CSCRn_EXTS. */ #define BF_FB_CSCRn_EXTS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_EXTS) & BM_FB_CSCRn_EXTS) /*! @brief Set the EXTS field to a new value. */ -#define BW_FB_CSCRn_EXTS(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_EXTS) = (v)) +#define BW_FB_CSCRn_EXTS(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_EXTS), v)) /*@}*/ /*! @@ -670,13 +677,13 @@ #define BS_FB_CSCRn_SWSEN (1U) /*!< Bit field size in bits for FB_CSCRn_SWSEN. */ /*! @brief Read current value of the FB_CSCRn_SWSEN field. */ -#define BR_FB_CSCRn_SWSEN(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_SWSEN)) +#define BR_FB_CSCRn_SWSEN(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_SWSEN))) /*! @brief Format value for bitfield FB_CSCRn_SWSEN. */ #define BF_FB_CSCRn_SWSEN(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_SWSEN) & BM_FB_CSCRn_SWSEN) /*! @brief Set the SWSEN field to a new value. */ -#define BW_FB_CSCRn_SWSEN(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_SWSEN) = (v)) +#define BW_FB_CSCRn_SWSEN(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_SWSEN), v)) /*@}*/ /*! @@ -692,7 +699,7 @@ #define BS_FB_CSCRn_SWS (6U) /*!< Bit field size in bits for FB_CSCRn_SWS. */ /*! @brief Read current value of the FB_CSCRn_SWS field. */ -#define BR_FB_CSCRn_SWS(x, n) (HW_FB_CSCRn(x, n).B.SWS) +#define BR_FB_CSCRn_SWS(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.SWS)) /*! @brief Format value for bitfield FB_CSCRn_SWS. */ #define BF_FB_CSCRn_SWS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_SWS) & BM_FB_CSCRn_SWS) @@ -740,8 +747,8 @@ #define HW_FB_CSPMCR_ADDR(x) ((x) + 0x60U) #define HW_FB_CSPMCR(x) (*(__IO hw_fb_cspmcr_t *) HW_FB_CSPMCR_ADDR(x)) -#define HW_FB_CSPMCR_RD(x) (HW_FB_CSPMCR(x).U) -#define HW_FB_CSPMCR_WR(x, v) (HW_FB_CSPMCR(x).U = (v)) +#define HW_FB_CSPMCR_RD(x) (ADDRESS_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x))) +#define HW_FB_CSPMCR_WR(x, v) (ADDRESS_WRITE(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), v)) #define HW_FB_CSPMCR_SET(x, v) (HW_FB_CSPMCR_WR(x, HW_FB_CSPMCR_RD(x) | (v))) #define HW_FB_CSPMCR_CLR(x, v) (HW_FB_CSPMCR_WR(x, HW_FB_CSPMCR_RD(x) & ~(v))) #define HW_FB_CSPMCR_TOG(x, v) (HW_FB_CSPMCR_WR(x, HW_FB_CSPMCR_RD(x) ^ (v))) @@ -769,7 +776,7 @@ #define BS_FB_CSPMCR_GROUP5 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP5. */ /*! @brief Read current value of the FB_CSPMCR_GROUP5 field. */ -#define BR_FB_CSPMCR_GROUP5(x) (HW_FB_CSPMCR(x).B.GROUP5) +#define BR_FB_CSPMCR_GROUP5(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP5)) /*! @brief Format value for bitfield FB_CSPMCR_GROUP5. */ #define BF_FB_CSPMCR_GROUP5(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP5) & BM_FB_CSPMCR_GROUP5) @@ -794,7 +801,7 @@ #define BS_FB_CSPMCR_GROUP4 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP4. */ /*! @brief Read current value of the FB_CSPMCR_GROUP4 field. */ -#define BR_FB_CSPMCR_GROUP4(x) (HW_FB_CSPMCR(x).B.GROUP4) +#define BR_FB_CSPMCR_GROUP4(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP4)) /*! @brief Format value for bitfield FB_CSPMCR_GROUP4. */ #define BF_FB_CSPMCR_GROUP4(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP4) & BM_FB_CSPMCR_GROUP4) @@ -819,7 +826,7 @@ #define BS_FB_CSPMCR_GROUP3 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP3. */ /*! @brief Read current value of the FB_CSPMCR_GROUP3 field. */ -#define BR_FB_CSPMCR_GROUP3(x) (HW_FB_CSPMCR(x).B.GROUP3) +#define BR_FB_CSPMCR_GROUP3(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP3)) /*! @brief Format value for bitfield FB_CSPMCR_GROUP3. */ #define BF_FB_CSPMCR_GROUP3(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP3) & BM_FB_CSPMCR_GROUP3) @@ -844,7 +851,7 @@ #define BS_FB_CSPMCR_GROUP2 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP2. */ /*! @brief Read current value of the FB_CSPMCR_GROUP2 field. */ -#define BR_FB_CSPMCR_GROUP2(x) (HW_FB_CSPMCR(x).B.GROUP2) +#define BR_FB_CSPMCR_GROUP2(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP2)) /*! @brief Format value for bitfield FB_CSPMCR_GROUP2. */ #define BF_FB_CSPMCR_GROUP2(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP2) & BM_FB_CSPMCR_GROUP2) @@ -869,7 +876,7 @@ #define BS_FB_CSPMCR_GROUP1 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP1. */ /*! @brief Read current value of the FB_CSPMCR_GROUP1 field. */ -#define BR_FB_CSPMCR_GROUP1(x) (HW_FB_CSPMCR(x).B.GROUP1) +#define BR_FB_CSPMCR_GROUP1(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP1)) /*! @brief Format value for bitfield FB_CSPMCR_GROUP1. */ #define BF_FB_CSPMCR_GROUP1(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP1) & BM_FB_CSPMCR_GROUP1)
--- a/hal/device/device/MK64F12/MK64F12_fmc.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_fmc.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -151,8 +158,8 @@ #define HW_FMC_PFAPR_ADDR(x) ((x) + 0x0U) #define HW_FMC_PFAPR(x) (*(__IO hw_fmc_pfapr_t *) HW_FMC_PFAPR_ADDR(x)) -#define HW_FMC_PFAPR_RD(x) (HW_FMC_PFAPR(x).U) -#define HW_FMC_PFAPR_WR(x, v) (HW_FMC_PFAPR(x).U = (v)) +#define HW_FMC_PFAPR_RD(x) (ADDRESS_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x))) +#define HW_FMC_PFAPR_WR(x, v) (ADDRESS_WRITE(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), v)) #define HW_FMC_PFAPR_SET(x, v) (HW_FMC_PFAPR_WR(x, HW_FMC_PFAPR_RD(x) | (v))) #define HW_FMC_PFAPR_CLR(x, v) (HW_FMC_PFAPR_WR(x, HW_FMC_PFAPR_RD(x) & ~(v))) #define HW_FMC_PFAPR_TOG(x, v) (HW_FMC_PFAPR_WR(x, HW_FMC_PFAPR_RD(x) ^ (v))) @@ -180,7 +187,7 @@ #define BS_FMC_PFAPR_M0AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M0AP. */ /*! @brief Read current value of the FMC_PFAPR_M0AP field. */ -#define BR_FMC_PFAPR_M0AP(x) (HW_FMC_PFAPR(x).B.M0AP) +#define BR_FMC_PFAPR_M0AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M0AP)) /*! @brief Format value for bitfield FMC_PFAPR_M0AP. */ #define BF_FMC_PFAPR_M0AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M0AP) & BM_FMC_PFAPR_M0AP) @@ -207,7 +214,7 @@ #define BS_FMC_PFAPR_M1AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M1AP. */ /*! @brief Read current value of the FMC_PFAPR_M1AP field. */ -#define BR_FMC_PFAPR_M1AP(x) (HW_FMC_PFAPR(x).B.M1AP) +#define BR_FMC_PFAPR_M1AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M1AP)) /*! @brief Format value for bitfield FMC_PFAPR_M1AP. */ #define BF_FMC_PFAPR_M1AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M1AP) & BM_FMC_PFAPR_M1AP) @@ -234,7 +241,7 @@ #define BS_FMC_PFAPR_M2AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M2AP. */ /*! @brief Read current value of the FMC_PFAPR_M2AP field. */ -#define BR_FMC_PFAPR_M2AP(x) (HW_FMC_PFAPR(x).B.M2AP) +#define BR_FMC_PFAPR_M2AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M2AP)) /*! @brief Format value for bitfield FMC_PFAPR_M2AP. */ #define BF_FMC_PFAPR_M2AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M2AP) & BM_FMC_PFAPR_M2AP) @@ -261,7 +268,7 @@ #define BS_FMC_PFAPR_M3AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M3AP. */ /*! @brief Read current value of the FMC_PFAPR_M3AP field. */ -#define BR_FMC_PFAPR_M3AP(x) (HW_FMC_PFAPR(x).B.M3AP) +#define BR_FMC_PFAPR_M3AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M3AP)) /*! @brief Format value for bitfield FMC_PFAPR_M3AP. */ #define BF_FMC_PFAPR_M3AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M3AP) & BM_FMC_PFAPR_M3AP) @@ -288,7 +295,7 @@ #define BS_FMC_PFAPR_M4AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M4AP. */ /*! @brief Read current value of the FMC_PFAPR_M4AP field. */ -#define BR_FMC_PFAPR_M4AP(x) (HW_FMC_PFAPR(x).B.M4AP) +#define BR_FMC_PFAPR_M4AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M4AP)) /*! @brief Format value for bitfield FMC_PFAPR_M4AP. */ #define BF_FMC_PFAPR_M4AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M4AP) & BM_FMC_PFAPR_M4AP) @@ -315,7 +322,7 @@ #define BS_FMC_PFAPR_M5AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M5AP. */ /*! @brief Read current value of the FMC_PFAPR_M5AP field. */ -#define BR_FMC_PFAPR_M5AP(x) (HW_FMC_PFAPR(x).B.M5AP) +#define BR_FMC_PFAPR_M5AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M5AP)) /*! @brief Format value for bitfield FMC_PFAPR_M5AP. */ #define BF_FMC_PFAPR_M5AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M5AP) & BM_FMC_PFAPR_M5AP) @@ -342,7 +349,7 @@ #define BS_FMC_PFAPR_M6AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M6AP. */ /*! @brief Read current value of the FMC_PFAPR_M6AP field. */ -#define BR_FMC_PFAPR_M6AP(x) (HW_FMC_PFAPR(x).B.M6AP) +#define BR_FMC_PFAPR_M6AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M6AP)) /*! @brief Format value for bitfield FMC_PFAPR_M6AP. */ #define BF_FMC_PFAPR_M6AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M6AP) & BM_FMC_PFAPR_M6AP) @@ -369,7 +376,7 @@ #define BS_FMC_PFAPR_M7AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M7AP. */ /*! @brief Read current value of the FMC_PFAPR_M7AP field. */ -#define BR_FMC_PFAPR_M7AP(x) (HW_FMC_PFAPR(x).B.M7AP) +#define BR_FMC_PFAPR_M7AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M7AP)) /*! @brief Format value for bitfield FMC_PFAPR_M7AP. */ #define BF_FMC_PFAPR_M7AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M7AP) & BM_FMC_PFAPR_M7AP) @@ -395,13 +402,13 @@ #define BS_FMC_PFAPR_M0PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M0PFD. */ /*! @brief Read current value of the FMC_PFAPR_M0PFD field. */ -#define BR_FMC_PFAPR_M0PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M0PFD)) +#define BR_FMC_PFAPR_M0PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M0PFD))) /*! @brief Format value for bitfield FMC_PFAPR_M0PFD. */ #define BF_FMC_PFAPR_M0PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M0PFD) & BM_FMC_PFAPR_M0PFD) /*! @brief Set the M0PFD field to a new value. */ -#define BW_FMC_PFAPR_M0PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M0PFD) = (v)) +#define BW_FMC_PFAPR_M0PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M0PFD), v)) /*@}*/ /*! @@ -421,13 +428,13 @@ #define BS_FMC_PFAPR_M1PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M1PFD. */ /*! @brief Read current value of the FMC_PFAPR_M1PFD field. */ -#define BR_FMC_PFAPR_M1PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M1PFD)) +#define BR_FMC_PFAPR_M1PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M1PFD))) /*! @brief Format value for bitfield FMC_PFAPR_M1PFD. */ #define BF_FMC_PFAPR_M1PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M1PFD) & BM_FMC_PFAPR_M1PFD) /*! @brief Set the M1PFD field to a new value. */ -#define BW_FMC_PFAPR_M1PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M1PFD) = (v)) +#define BW_FMC_PFAPR_M1PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M1PFD), v)) /*@}*/ /*! @@ -447,13 +454,13 @@ #define BS_FMC_PFAPR_M2PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M2PFD. */ /*! @brief Read current value of the FMC_PFAPR_M2PFD field. */ -#define BR_FMC_PFAPR_M2PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M2PFD)) +#define BR_FMC_PFAPR_M2PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M2PFD))) /*! @brief Format value for bitfield FMC_PFAPR_M2PFD. */ #define BF_FMC_PFAPR_M2PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M2PFD) & BM_FMC_PFAPR_M2PFD) /*! @brief Set the M2PFD field to a new value. */ -#define BW_FMC_PFAPR_M2PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M2PFD) = (v)) +#define BW_FMC_PFAPR_M2PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M2PFD), v)) /*@}*/ /*! @@ -473,13 +480,13 @@ #define BS_FMC_PFAPR_M3PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M3PFD. */ /*! @brief Read current value of the FMC_PFAPR_M3PFD field. */ -#define BR_FMC_PFAPR_M3PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M3PFD)) +#define BR_FMC_PFAPR_M3PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M3PFD))) /*! @brief Format value for bitfield FMC_PFAPR_M3PFD. */ #define BF_FMC_PFAPR_M3PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M3PFD) & BM_FMC_PFAPR_M3PFD) /*! @brief Set the M3PFD field to a new value. */ -#define BW_FMC_PFAPR_M3PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M3PFD) = (v)) +#define BW_FMC_PFAPR_M3PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M3PFD), v)) /*@}*/ /*! @@ -499,13 +506,13 @@ #define BS_FMC_PFAPR_M4PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M4PFD. */ /*! @brief Read current value of the FMC_PFAPR_M4PFD field. */ -#define BR_FMC_PFAPR_M4PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M4PFD)) +#define BR_FMC_PFAPR_M4PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M4PFD))) /*! @brief Format value for bitfield FMC_PFAPR_M4PFD. */ #define BF_FMC_PFAPR_M4PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M4PFD) & BM_FMC_PFAPR_M4PFD) /*! @brief Set the M4PFD field to a new value. */ -#define BW_FMC_PFAPR_M4PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M4PFD) = (v)) +#define BW_FMC_PFAPR_M4PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M4PFD), v)) /*@}*/ /*! @@ -525,13 +532,13 @@ #define BS_FMC_PFAPR_M5PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M5PFD. */ /*! @brief Read current value of the FMC_PFAPR_M5PFD field. */ -#define BR_FMC_PFAPR_M5PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M5PFD)) +#define BR_FMC_PFAPR_M5PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M5PFD))) /*! @brief Format value for bitfield FMC_PFAPR_M5PFD. */ #define BF_FMC_PFAPR_M5PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M5PFD) & BM_FMC_PFAPR_M5PFD) /*! @brief Set the M5PFD field to a new value. */ -#define BW_FMC_PFAPR_M5PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M5PFD) = (v)) +#define BW_FMC_PFAPR_M5PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M5PFD), v)) /*@}*/ /*! @@ -551,13 +558,13 @@ #define BS_FMC_PFAPR_M6PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M6PFD. */ /*! @brief Read current value of the FMC_PFAPR_M6PFD field. */ -#define BR_FMC_PFAPR_M6PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M6PFD)) +#define BR_FMC_PFAPR_M6PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M6PFD))) /*! @brief Format value for bitfield FMC_PFAPR_M6PFD. */ #define BF_FMC_PFAPR_M6PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M6PFD) & BM_FMC_PFAPR_M6PFD) /*! @brief Set the M6PFD field to a new value. */ -#define BW_FMC_PFAPR_M6PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M6PFD) = (v)) +#define BW_FMC_PFAPR_M6PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M6PFD), v)) /*@}*/ /*! @@ -577,13 +584,13 @@ #define BS_FMC_PFAPR_M7PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M7PFD. */ /*! @brief Read current value of the FMC_PFAPR_M7PFD field. */ -#define BR_FMC_PFAPR_M7PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M7PFD)) +#define BR_FMC_PFAPR_M7PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M7PFD))) /*! @brief Format value for bitfield FMC_PFAPR_M7PFD. */ #define BF_FMC_PFAPR_M7PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M7PFD) & BM_FMC_PFAPR_M7PFD) /*! @brief Set the M7PFD field to a new value. */ -#define BW_FMC_PFAPR_M7PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M7PFD) = (v)) +#define BW_FMC_PFAPR_M7PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M7PFD), v)) /*@}*/ /******************************************************************************* @@ -623,8 +630,8 @@ #define HW_FMC_PFB0CR_ADDR(x) ((x) + 0x4U) #define HW_FMC_PFB0CR(x) (*(__IO hw_fmc_pfb0cr_t *) HW_FMC_PFB0CR_ADDR(x)) -#define HW_FMC_PFB0CR_RD(x) (HW_FMC_PFB0CR(x).U) -#define HW_FMC_PFB0CR_WR(x, v) (HW_FMC_PFB0CR(x).U = (v)) +#define HW_FMC_PFB0CR_RD(x) (ADDRESS_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x))) +#define HW_FMC_PFB0CR_WR(x, v) (ADDRESS_WRITE(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), v)) #define HW_FMC_PFB0CR_SET(x, v) (HW_FMC_PFB0CR_WR(x, HW_FMC_PFB0CR_RD(x) | (v))) #define HW_FMC_PFB0CR_CLR(x, v) (HW_FMC_PFB0CR_WR(x, HW_FMC_PFB0CR_RD(x) & ~(v))) #define HW_FMC_PFB0CR_TOG(x, v) (HW_FMC_PFB0CR_WR(x, HW_FMC_PFB0CR_RD(x) ^ (v))) @@ -651,13 +658,13 @@ #define BS_FMC_PFB0CR_B0SEBE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0SEBE. */ /*! @brief Read current value of the FMC_PFB0CR_B0SEBE field. */ -#define BR_FMC_PFB0CR_B0SEBE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0SEBE)) +#define BR_FMC_PFB0CR_B0SEBE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0SEBE))) /*! @brief Format value for bitfield FMC_PFB0CR_B0SEBE. */ #define BF_FMC_PFB0CR_B0SEBE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0SEBE) & BM_FMC_PFB0CR_B0SEBE) /*! @brief Set the B0SEBE field to a new value. */ -#define BW_FMC_PFB0CR_B0SEBE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0SEBE) = (v)) +#define BW_FMC_PFB0CR_B0SEBE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0SEBE), v)) /*@}*/ /*! @@ -676,13 +683,13 @@ #define BS_FMC_PFB0CR_B0IPE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0IPE. */ /*! @brief Read current value of the FMC_PFB0CR_B0IPE field. */ -#define BR_FMC_PFB0CR_B0IPE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0IPE)) +#define BR_FMC_PFB0CR_B0IPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0IPE))) /*! @brief Format value for bitfield FMC_PFB0CR_B0IPE. */ #define BF_FMC_PFB0CR_B0IPE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0IPE) & BM_FMC_PFB0CR_B0IPE) /*! @brief Set the B0IPE field to a new value. */ -#define BW_FMC_PFB0CR_B0IPE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0IPE) = (v)) +#define BW_FMC_PFB0CR_B0IPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0IPE), v)) /*@}*/ /*! @@ -701,13 +708,13 @@ #define BS_FMC_PFB0CR_B0DPE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0DPE. */ /*! @brief Read current value of the FMC_PFB0CR_B0DPE field. */ -#define BR_FMC_PFB0CR_B0DPE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DPE)) +#define BR_FMC_PFB0CR_B0DPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DPE))) /*! @brief Format value for bitfield FMC_PFB0CR_B0DPE. */ #define BF_FMC_PFB0CR_B0DPE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0DPE) & BM_FMC_PFB0CR_B0DPE) /*! @brief Set the B0DPE field to a new value. */ -#define BW_FMC_PFB0CR_B0DPE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DPE) = (v)) +#define BW_FMC_PFB0CR_B0DPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DPE), v)) /*@}*/ /*! @@ -725,13 +732,13 @@ #define BS_FMC_PFB0CR_B0ICE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0ICE. */ /*! @brief Read current value of the FMC_PFB0CR_B0ICE field. */ -#define BR_FMC_PFB0CR_B0ICE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0ICE)) +#define BR_FMC_PFB0CR_B0ICE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0ICE))) /*! @brief Format value for bitfield FMC_PFB0CR_B0ICE. */ #define BF_FMC_PFB0CR_B0ICE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0ICE) & BM_FMC_PFB0CR_B0ICE) /*! @brief Set the B0ICE field to a new value. */ -#define BW_FMC_PFB0CR_B0ICE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0ICE) = (v)) +#define BW_FMC_PFB0CR_B0ICE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0ICE), v)) /*@}*/ /*! @@ -749,13 +756,13 @@ #define BS_FMC_PFB0CR_B0DCE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0DCE. */ /*! @brief Read current value of the FMC_PFB0CR_B0DCE field. */ -#define BR_FMC_PFB0CR_B0DCE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DCE)) +#define BR_FMC_PFB0CR_B0DCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DCE))) /*! @brief Format value for bitfield FMC_PFB0CR_B0DCE. */ #define BF_FMC_PFB0CR_B0DCE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0DCE) & BM_FMC_PFB0CR_B0DCE) /*! @brief Set the B0DCE field to a new value. */ -#define BW_FMC_PFB0CR_B0DCE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DCE) = (v)) +#define BW_FMC_PFB0CR_B0DCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DCE), v)) /*@}*/ /*! @@ -777,7 +784,7 @@ #define BS_FMC_PFB0CR_CRC (3U) /*!< Bit field size in bits for FMC_PFB0CR_CRC. */ /*! @brief Read current value of the FMC_PFB0CR_CRC field. */ -#define BR_FMC_PFB0CR_CRC(x) (HW_FMC_PFB0CR(x).B.CRC) +#define BR_FMC_PFB0CR_CRC(x) (UNION_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), U, B.CRC)) /*! @brief Format value for bitfield FMC_PFB0CR_CRC. */ #define BF_FMC_PFB0CR_CRC(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_CRC) & BM_FMC_PFB0CR_CRC) @@ -803,7 +810,7 @@ #define BS_FMC_PFB0CR_B0MW (2U) /*!< Bit field size in bits for FMC_PFB0CR_B0MW. */ /*! @brief Read current value of the FMC_PFB0CR_B0MW field. */ -#define BR_FMC_PFB0CR_B0MW(x) (HW_FMC_PFB0CR(x).B.B0MW) +#define BR_FMC_PFB0CR_B0MW(x) (UNION_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), U, B.B0MW)) /*@}*/ /*! @@ -827,7 +834,7 @@ #define BF_FMC_PFB0CR_S_B_INV(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_S_B_INV) & BM_FMC_PFB0CR_S_B_INV) /*! @brief Set the S_B_INV field to a new value. */ -#define BW_FMC_PFB0CR_S_B_INV(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_S_B_INV) = (v)) +#define BW_FMC_PFB0CR_S_B_INV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_S_B_INV), v)) /*@}*/ /*! @@ -877,7 +884,7 @@ #define BS_FMC_PFB0CR_CLCK_WAY (4U) /*!< Bit field size in bits for FMC_PFB0CR_CLCK_WAY. */ /*! @brief Read current value of the FMC_PFB0CR_CLCK_WAY field. */ -#define BR_FMC_PFB0CR_CLCK_WAY(x) (HW_FMC_PFB0CR(x).B.CLCK_WAY) +#define BR_FMC_PFB0CR_CLCK_WAY(x) (UNION_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), U, B.CLCK_WAY)) /*! @brief Format value for bitfield FMC_PFB0CR_CLCK_WAY. */ #define BF_FMC_PFB0CR_CLCK_WAY(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_CLCK_WAY) & BM_FMC_PFB0CR_CLCK_WAY) @@ -902,7 +909,7 @@ #define BS_FMC_PFB0CR_B0RWSC (4U) /*!< Bit field size in bits for FMC_PFB0CR_B0RWSC. */ /*! @brief Read current value of the FMC_PFB0CR_B0RWSC field. */ -#define BR_FMC_PFB0CR_B0RWSC(x) (HW_FMC_PFB0CR(x).B.B0RWSC) +#define BR_FMC_PFB0CR_B0RWSC(x) (UNION_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), U, B.B0RWSC)) /*@}*/ /******************************************************************************* @@ -941,8 +948,8 @@ #define HW_FMC_PFB1CR_ADDR(x) ((x) + 0x8U) #define HW_FMC_PFB1CR(x) (*(__IO hw_fmc_pfb1cr_t *) HW_FMC_PFB1CR_ADDR(x)) -#define HW_FMC_PFB1CR_RD(x) (HW_FMC_PFB1CR(x).U) -#define HW_FMC_PFB1CR_WR(x, v) (HW_FMC_PFB1CR(x).U = (v)) +#define HW_FMC_PFB1CR_RD(x) (ADDRESS_READ(hw_fmc_pfb1cr_t, HW_FMC_PFB1CR_ADDR(x))) +#define HW_FMC_PFB1CR_WR(x, v) (ADDRESS_WRITE(hw_fmc_pfb1cr_t, HW_FMC_PFB1CR_ADDR(x), v)) #define HW_FMC_PFB1CR_SET(x, v) (HW_FMC_PFB1CR_WR(x, HW_FMC_PFB1CR_RD(x) | (v))) #define HW_FMC_PFB1CR_CLR(x, v) (HW_FMC_PFB1CR_WR(x, HW_FMC_PFB1CR_RD(x) & ~(v))) #define HW_FMC_PFB1CR_TOG(x, v) (HW_FMC_PFB1CR_WR(x, HW_FMC_PFB1CR_RD(x) ^ (v))) @@ -969,13 +976,13 @@ #define BS_FMC_PFB1CR_B1SEBE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1SEBE. */ /*! @brief Read current value of the FMC_PFB1CR_B1SEBE field. */ -#define BR_FMC_PFB1CR_B1SEBE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1SEBE)) +#define BR_FMC_PFB1CR_B1SEBE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1SEBE))) /*! @brief Format value for bitfield FMC_PFB1CR_B1SEBE. */ #define BF_FMC_PFB1CR_B1SEBE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1SEBE) & BM_FMC_PFB1CR_B1SEBE) /*! @brief Set the B1SEBE field to a new value. */ -#define BW_FMC_PFB1CR_B1SEBE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1SEBE) = (v)) +#define BW_FMC_PFB1CR_B1SEBE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1SEBE), v)) /*@}*/ /*! @@ -994,13 +1001,13 @@ #define BS_FMC_PFB1CR_B1IPE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1IPE. */ /*! @brief Read current value of the FMC_PFB1CR_B1IPE field. */ -#define BR_FMC_PFB1CR_B1IPE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1IPE)) +#define BR_FMC_PFB1CR_B1IPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1IPE))) /*! @brief Format value for bitfield FMC_PFB1CR_B1IPE. */ #define BF_FMC_PFB1CR_B1IPE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1IPE) & BM_FMC_PFB1CR_B1IPE) /*! @brief Set the B1IPE field to a new value. */ -#define BW_FMC_PFB1CR_B1IPE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1IPE) = (v)) +#define BW_FMC_PFB1CR_B1IPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1IPE), v)) /*@}*/ /*! @@ -1019,13 +1026,13 @@ #define BS_FMC_PFB1CR_B1DPE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1DPE. */ /*! @brief Read current value of the FMC_PFB1CR_B1DPE field. */ -#define BR_FMC_PFB1CR_B1DPE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DPE)) +#define BR_FMC_PFB1CR_B1DPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DPE))) /*! @brief Format value for bitfield FMC_PFB1CR_B1DPE. */ #define BF_FMC_PFB1CR_B1DPE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1DPE) & BM_FMC_PFB1CR_B1DPE) /*! @brief Set the B1DPE field to a new value. */ -#define BW_FMC_PFB1CR_B1DPE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DPE) = (v)) +#define BW_FMC_PFB1CR_B1DPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DPE), v)) /*@}*/ /*! @@ -1043,13 +1050,13 @@ #define BS_FMC_PFB1CR_B1ICE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1ICE. */ /*! @brief Read current value of the FMC_PFB1CR_B1ICE field. */ -#define BR_FMC_PFB1CR_B1ICE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1ICE)) +#define BR_FMC_PFB1CR_B1ICE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1ICE))) /*! @brief Format value for bitfield FMC_PFB1CR_B1ICE. */ #define BF_FMC_PFB1CR_B1ICE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1ICE) & BM_FMC_PFB1CR_B1ICE) /*! @brief Set the B1ICE field to a new value. */ -#define BW_FMC_PFB1CR_B1ICE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1ICE) = (v)) +#define BW_FMC_PFB1CR_B1ICE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1ICE), v)) /*@}*/ /*! @@ -1067,13 +1074,13 @@ #define BS_FMC_PFB1CR_B1DCE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1DCE. */ /*! @brief Read current value of the FMC_PFB1CR_B1DCE field. */ -#define BR_FMC_PFB1CR_B1DCE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DCE)) +#define BR_FMC_PFB1CR_B1DCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DCE))) /*! @brief Format value for bitfield FMC_PFB1CR_B1DCE. */ #define BF_FMC_PFB1CR_B1DCE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1DCE) & BM_FMC_PFB1CR_B1DCE) /*! @brief Set the B1DCE field to a new value. */ -#define BW_FMC_PFB1CR_B1DCE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DCE) = (v)) +#define BW_FMC_PFB1CR_B1DCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DCE), v)) /*@}*/ /*! @@ -1093,7 +1100,7 @@ #define BS_FMC_PFB1CR_B1MW (2U) /*!< Bit field size in bits for FMC_PFB1CR_B1MW. */ /*! @brief Read current value of the FMC_PFB1CR_B1MW field. */ -#define BR_FMC_PFB1CR_B1MW(x) (HW_FMC_PFB1CR(x).B.B1MW) +#define BR_FMC_PFB1CR_B1MW(x) (UNION_READ(hw_fmc_pfb1cr_t, HW_FMC_PFB1CR_ADDR(x), U, B.B1MW)) /*@}*/ /*! @@ -1112,7 +1119,7 @@ #define BS_FMC_PFB1CR_B1RWSC (4U) /*!< Bit field size in bits for FMC_PFB1CR_B1RWSC. */ /*! @brief Read current value of the FMC_PFB1CR_B1RWSC field. */ -#define BR_FMC_PFB1CR_B1RWSC(x) (HW_FMC_PFB1CR(x).B.B1RWSC) +#define BR_FMC_PFB1CR_B1RWSC(x) (UNION_READ(hw_fmc_pfb1cr_t, HW_FMC_PFB1CR_ADDR(x), U, B.B1RWSC)) /*@}*/ /******************************************************************************* @@ -1150,8 +1157,8 @@ #define HW_FMC_TAGVDW0Sn_ADDR(x, n) ((x) + 0x100U + (0x4U * (n))) #define HW_FMC_TAGVDW0Sn(x, n) (*(__IO hw_fmc_tagvdw0sn_t *) HW_FMC_TAGVDW0Sn_ADDR(x, n)) -#define HW_FMC_TAGVDW0Sn_RD(x, n) (HW_FMC_TAGVDW0Sn(x, n).U) -#define HW_FMC_TAGVDW0Sn_WR(x, n, v) (HW_FMC_TAGVDW0Sn(x, n).U = (v)) +#define HW_FMC_TAGVDW0Sn_RD(x, n) (ADDRESS_READ(hw_fmc_tagvdw0sn_t, HW_FMC_TAGVDW0Sn_ADDR(x, n))) +#define HW_FMC_TAGVDW0Sn_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_tagvdw0sn_t, HW_FMC_TAGVDW0Sn_ADDR(x, n), v)) #define HW_FMC_TAGVDW0Sn_SET(x, n, v) (HW_FMC_TAGVDW0Sn_WR(x, n, HW_FMC_TAGVDW0Sn_RD(x, n) | (v))) #define HW_FMC_TAGVDW0Sn_CLR(x, n, v) (HW_FMC_TAGVDW0Sn_WR(x, n, HW_FMC_TAGVDW0Sn_RD(x, n) & ~(v))) #define HW_FMC_TAGVDW0Sn_TOG(x, n, v) (HW_FMC_TAGVDW0Sn_WR(x, n, HW_FMC_TAGVDW0Sn_RD(x, n) ^ (v))) @@ -1170,13 +1177,13 @@ #define BS_FMC_TAGVDW0Sn_valid (1U) /*!< Bit field size in bits for FMC_TAGVDW0Sn_valid. */ /*! @brief Read current value of the FMC_TAGVDW0Sn_valid field. */ -#define BR_FMC_TAGVDW0Sn_valid(x, n) (BITBAND_ACCESS32(HW_FMC_TAGVDW0Sn_ADDR(x, n), BP_FMC_TAGVDW0Sn_valid)) +#define BR_FMC_TAGVDW0Sn_valid(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW0Sn_ADDR(x, n), BP_FMC_TAGVDW0Sn_valid))) /*! @brief Format value for bitfield FMC_TAGVDW0Sn_valid. */ #define BF_FMC_TAGVDW0Sn_valid(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW0Sn_valid) & BM_FMC_TAGVDW0Sn_valid) /*! @brief Set the valid field to a new value. */ -#define BW_FMC_TAGVDW0Sn_valid(x, n, v) (BITBAND_ACCESS32(HW_FMC_TAGVDW0Sn_ADDR(x, n), BP_FMC_TAGVDW0Sn_valid) = (v)) +#define BW_FMC_TAGVDW0Sn_valid(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW0Sn_ADDR(x, n), BP_FMC_TAGVDW0Sn_valid), v)) /*@}*/ /*! @@ -1188,7 +1195,7 @@ #define BS_FMC_TAGVDW0Sn_tag (14U) /*!< Bit field size in bits for FMC_TAGVDW0Sn_tag. */ /*! @brief Read current value of the FMC_TAGVDW0Sn_tag field. */ -#define BR_FMC_TAGVDW0Sn_tag(x, n) (HW_FMC_TAGVDW0Sn(x, n).B.tag) +#define BR_FMC_TAGVDW0Sn_tag(x, n) (UNION_READ(hw_fmc_tagvdw0sn_t, HW_FMC_TAGVDW0Sn_ADDR(x, n), U, B.tag)) /*! @brief Format value for bitfield FMC_TAGVDW0Sn_tag. */ #define BF_FMC_TAGVDW0Sn_tag(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW0Sn_tag) & BM_FMC_TAGVDW0Sn_tag) @@ -1232,8 +1239,8 @@ #define HW_FMC_TAGVDW1Sn_ADDR(x, n) ((x) + 0x110U + (0x4U * (n))) #define HW_FMC_TAGVDW1Sn(x, n) (*(__IO hw_fmc_tagvdw1sn_t *) HW_FMC_TAGVDW1Sn_ADDR(x, n)) -#define HW_FMC_TAGVDW1Sn_RD(x, n) (HW_FMC_TAGVDW1Sn(x, n).U) -#define HW_FMC_TAGVDW1Sn_WR(x, n, v) (HW_FMC_TAGVDW1Sn(x, n).U = (v)) +#define HW_FMC_TAGVDW1Sn_RD(x, n) (ADDRESS_READ(hw_fmc_tagvdw1sn_t, HW_FMC_TAGVDW1Sn_ADDR(x, n))) +#define HW_FMC_TAGVDW1Sn_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_tagvdw1sn_t, HW_FMC_TAGVDW1Sn_ADDR(x, n), v)) #define HW_FMC_TAGVDW1Sn_SET(x, n, v) (HW_FMC_TAGVDW1Sn_WR(x, n, HW_FMC_TAGVDW1Sn_RD(x, n) | (v))) #define HW_FMC_TAGVDW1Sn_CLR(x, n, v) (HW_FMC_TAGVDW1Sn_WR(x, n, HW_FMC_TAGVDW1Sn_RD(x, n) & ~(v))) #define HW_FMC_TAGVDW1Sn_TOG(x, n, v) (HW_FMC_TAGVDW1Sn_WR(x, n, HW_FMC_TAGVDW1Sn_RD(x, n) ^ (v))) @@ -1252,13 +1259,13 @@ #define BS_FMC_TAGVDW1Sn_valid (1U) /*!< Bit field size in bits for FMC_TAGVDW1Sn_valid. */ /*! @brief Read current value of the FMC_TAGVDW1Sn_valid field. */ -#define BR_FMC_TAGVDW1Sn_valid(x, n) (BITBAND_ACCESS32(HW_FMC_TAGVDW1Sn_ADDR(x, n), BP_FMC_TAGVDW1Sn_valid)) +#define BR_FMC_TAGVDW1Sn_valid(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW1Sn_ADDR(x, n), BP_FMC_TAGVDW1Sn_valid))) /*! @brief Format value for bitfield FMC_TAGVDW1Sn_valid. */ #define BF_FMC_TAGVDW1Sn_valid(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW1Sn_valid) & BM_FMC_TAGVDW1Sn_valid) /*! @brief Set the valid field to a new value. */ -#define BW_FMC_TAGVDW1Sn_valid(x, n, v) (BITBAND_ACCESS32(HW_FMC_TAGVDW1Sn_ADDR(x, n), BP_FMC_TAGVDW1Sn_valid) = (v)) +#define BW_FMC_TAGVDW1Sn_valid(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW1Sn_ADDR(x, n), BP_FMC_TAGVDW1Sn_valid), v)) /*@}*/ /*! @@ -1270,7 +1277,7 @@ #define BS_FMC_TAGVDW1Sn_tag (14U) /*!< Bit field size in bits for FMC_TAGVDW1Sn_tag. */ /*! @brief Read current value of the FMC_TAGVDW1Sn_tag field. */ -#define BR_FMC_TAGVDW1Sn_tag(x, n) (HW_FMC_TAGVDW1Sn(x, n).B.tag) +#define BR_FMC_TAGVDW1Sn_tag(x, n) (UNION_READ(hw_fmc_tagvdw1sn_t, HW_FMC_TAGVDW1Sn_ADDR(x, n), U, B.tag)) /*! @brief Format value for bitfield FMC_TAGVDW1Sn_tag. */ #define BF_FMC_TAGVDW1Sn_tag(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW1Sn_tag) & BM_FMC_TAGVDW1Sn_tag) @@ -1314,8 +1321,8 @@ #define HW_FMC_TAGVDW2Sn_ADDR(x, n) ((x) + 0x120U + (0x4U * (n))) #define HW_FMC_TAGVDW2Sn(x, n) (*(__IO hw_fmc_tagvdw2sn_t *) HW_FMC_TAGVDW2Sn_ADDR(x, n)) -#define HW_FMC_TAGVDW2Sn_RD(x, n) (HW_FMC_TAGVDW2Sn(x, n).U) -#define HW_FMC_TAGVDW2Sn_WR(x, n, v) (HW_FMC_TAGVDW2Sn(x, n).U = (v)) +#define HW_FMC_TAGVDW2Sn_RD(x, n) (ADDRESS_READ(hw_fmc_tagvdw2sn_t, HW_FMC_TAGVDW2Sn_ADDR(x, n))) +#define HW_FMC_TAGVDW2Sn_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_tagvdw2sn_t, HW_FMC_TAGVDW2Sn_ADDR(x, n), v)) #define HW_FMC_TAGVDW2Sn_SET(x, n, v) (HW_FMC_TAGVDW2Sn_WR(x, n, HW_FMC_TAGVDW2Sn_RD(x, n) | (v))) #define HW_FMC_TAGVDW2Sn_CLR(x, n, v) (HW_FMC_TAGVDW2Sn_WR(x, n, HW_FMC_TAGVDW2Sn_RD(x, n) & ~(v))) #define HW_FMC_TAGVDW2Sn_TOG(x, n, v) (HW_FMC_TAGVDW2Sn_WR(x, n, HW_FMC_TAGVDW2Sn_RD(x, n) ^ (v))) @@ -1334,13 +1341,13 @@ #define BS_FMC_TAGVDW2Sn_valid (1U) /*!< Bit field size in bits for FMC_TAGVDW2Sn_valid. */ /*! @brief Read current value of the FMC_TAGVDW2Sn_valid field. */ -#define BR_FMC_TAGVDW2Sn_valid(x, n) (BITBAND_ACCESS32(HW_FMC_TAGVDW2Sn_ADDR(x, n), BP_FMC_TAGVDW2Sn_valid)) +#define BR_FMC_TAGVDW2Sn_valid(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW2Sn_ADDR(x, n), BP_FMC_TAGVDW2Sn_valid))) /*! @brief Format value for bitfield FMC_TAGVDW2Sn_valid. */ #define BF_FMC_TAGVDW2Sn_valid(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW2Sn_valid) & BM_FMC_TAGVDW2Sn_valid) /*! @brief Set the valid field to a new value. */ -#define BW_FMC_TAGVDW2Sn_valid(x, n, v) (BITBAND_ACCESS32(HW_FMC_TAGVDW2Sn_ADDR(x, n), BP_FMC_TAGVDW2Sn_valid) = (v)) +#define BW_FMC_TAGVDW2Sn_valid(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW2Sn_ADDR(x, n), BP_FMC_TAGVDW2Sn_valid), v)) /*@}*/ /*! @@ -1352,7 +1359,7 @@ #define BS_FMC_TAGVDW2Sn_tag (14U) /*!< Bit field size in bits for FMC_TAGVDW2Sn_tag. */ /*! @brief Read current value of the FMC_TAGVDW2Sn_tag field. */ -#define BR_FMC_TAGVDW2Sn_tag(x, n) (HW_FMC_TAGVDW2Sn(x, n).B.tag) +#define BR_FMC_TAGVDW2Sn_tag(x, n) (UNION_READ(hw_fmc_tagvdw2sn_t, HW_FMC_TAGVDW2Sn_ADDR(x, n), U, B.tag)) /*! @brief Format value for bitfield FMC_TAGVDW2Sn_tag. */ #define BF_FMC_TAGVDW2Sn_tag(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW2Sn_tag) & BM_FMC_TAGVDW2Sn_tag) @@ -1396,8 +1403,8 @@ #define HW_FMC_TAGVDW3Sn_ADDR(x, n) ((x) + 0x130U + (0x4U * (n))) #define HW_FMC_TAGVDW3Sn(x, n) (*(__IO hw_fmc_tagvdw3sn_t *) HW_FMC_TAGVDW3Sn_ADDR(x, n)) -#define HW_FMC_TAGVDW3Sn_RD(x, n) (HW_FMC_TAGVDW3Sn(x, n).U) -#define HW_FMC_TAGVDW3Sn_WR(x, n, v) (HW_FMC_TAGVDW3Sn(x, n).U = (v)) +#define HW_FMC_TAGVDW3Sn_RD(x, n) (ADDRESS_READ(hw_fmc_tagvdw3sn_t, HW_FMC_TAGVDW3Sn_ADDR(x, n))) +#define HW_FMC_TAGVDW3Sn_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_tagvdw3sn_t, HW_FMC_TAGVDW3Sn_ADDR(x, n), v)) #define HW_FMC_TAGVDW3Sn_SET(x, n, v) (HW_FMC_TAGVDW3Sn_WR(x, n, HW_FMC_TAGVDW3Sn_RD(x, n) | (v))) #define HW_FMC_TAGVDW3Sn_CLR(x, n, v) (HW_FMC_TAGVDW3Sn_WR(x, n, HW_FMC_TAGVDW3Sn_RD(x, n) & ~(v))) #define HW_FMC_TAGVDW3Sn_TOG(x, n, v) (HW_FMC_TAGVDW3Sn_WR(x, n, HW_FMC_TAGVDW3Sn_RD(x, n) ^ (v))) @@ -1416,13 +1423,13 @@ #define BS_FMC_TAGVDW3Sn_valid (1U) /*!< Bit field size in bits for FMC_TAGVDW3Sn_valid. */ /*! @brief Read current value of the FMC_TAGVDW3Sn_valid field. */ -#define BR_FMC_TAGVDW3Sn_valid(x, n) (BITBAND_ACCESS32(HW_FMC_TAGVDW3Sn_ADDR(x, n), BP_FMC_TAGVDW3Sn_valid)) +#define BR_FMC_TAGVDW3Sn_valid(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW3Sn_ADDR(x, n), BP_FMC_TAGVDW3Sn_valid))) /*! @brief Format value for bitfield FMC_TAGVDW3Sn_valid. */ #define BF_FMC_TAGVDW3Sn_valid(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW3Sn_valid) & BM_FMC_TAGVDW3Sn_valid) /*! @brief Set the valid field to a new value. */ -#define BW_FMC_TAGVDW3Sn_valid(x, n, v) (BITBAND_ACCESS32(HW_FMC_TAGVDW3Sn_ADDR(x, n), BP_FMC_TAGVDW3Sn_valid) = (v)) +#define BW_FMC_TAGVDW3Sn_valid(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW3Sn_ADDR(x, n), BP_FMC_TAGVDW3Sn_valid), v)) /*@}*/ /*! @@ -1434,7 +1441,7 @@ #define BS_FMC_TAGVDW3Sn_tag (14U) /*!< Bit field size in bits for FMC_TAGVDW3Sn_tag. */ /*! @brief Read current value of the FMC_TAGVDW3Sn_tag field. */ -#define BR_FMC_TAGVDW3Sn_tag(x, n) (HW_FMC_TAGVDW3Sn(x, n).B.tag) +#define BR_FMC_TAGVDW3Sn_tag(x, n) (UNION_READ(hw_fmc_tagvdw3sn_t, HW_FMC_TAGVDW3Sn_ADDR(x, n), U, B.tag)) /*! @brief Format value for bitfield FMC_TAGVDW3Sn_tag. */ #define BF_FMC_TAGVDW3Sn_tag(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW3Sn_tag) & BM_FMC_TAGVDW3Sn_tag) @@ -1476,8 +1483,8 @@ #define HW_FMC_DATAW0SnU_ADDR(x, n) ((x) + 0x200U + (0x8U * (n))) #define HW_FMC_DATAW0SnU(x, n) (*(__IO hw_fmc_dataw0snu_t *) HW_FMC_DATAW0SnU_ADDR(x, n)) -#define HW_FMC_DATAW0SnU_RD(x, n) (HW_FMC_DATAW0SnU(x, n).U) -#define HW_FMC_DATAW0SnU_WR(x, n, v) (HW_FMC_DATAW0SnU(x, n).U = (v)) +#define HW_FMC_DATAW0SnU_RD(x, n) (ADDRESS_READ(hw_fmc_dataw0snu_t, HW_FMC_DATAW0SnU_ADDR(x, n))) +#define HW_FMC_DATAW0SnU_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw0snu_t, HW_FMC_DATAW0SnU_ADDR(x, n), v)) #define HW_FMC_DATAW0SnU_SET(x, n, v) (HW_FMC_DATAW0SnU_WR(x, n, HW_FMC_DATAW0SnU_RD(x, n) | (v))) #define HW_FMC_DATAW0SnU_CLR(x, n, v) (HW_FMC_DATAW0SnU_WR(x, n, HW_FMC_DATAW0SnU_RD(x, n) & ~(v))) #define HW_FMC_DATAW0SnU_TOG(x, n, v) (HW_FMC_DATAW0SnU_WR(x, n, HW_FMC_DATAW0SnU_RD(x, n) ^ (v))) @@ -1537,8 +1544,8 @@ #define HW_FMC_DATAW0SnL_ADDR(x, n) ((x) + 0x204U + (0x8U * (n))) #define HW_FMC_DATAW0SnL(x, n) (*(__IO hw_fmc_dataw0snl_t *) HW_FMC_DATAW0SnL_ADDR(x, n)) -#define HW_FMC_DATAW0SnL_RD(x, n) (HW_FMC_DATAW0SnL(x, n).U) -#define HW_FMC_DATAW0SnL_WR(x, n, v) (HW_FMC_DATAW0SnL(x, n).U = (v)) +#define HW_FMC_DATAW0SnL_RD(x, n) (ADDRESS_READ(hw_fmc_dataw0snl_t, HW_FMC_DATAW0SnL_ADDR(x, n))) +#define HW_FMC_DATAW0SnL_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw0snl_t, HW_FMC_DATAW0SnL_ADDR(x, n), v)) #define HW_FMC_DATAW0SnL_SET(x, n, v) (HW_FMC_DATAW0SnL_WR(x, n, HW_FMC_DATAW0SnL_RD(x, n) | (v))) #define HW_FMC_DATAW0SnL_CLR(x, n, v) (HW_FMC_DATAW0SnL_WR(x, n, HW_FMC_DATAW0SnL_RD(x, n) & ~(v))) #define HW_FMC_DATAW0SnL_TOG(x, n, v) (HW_FMC_DATAW0SnL_WR(x, n, HW_FMC_DATAW0SnL_RD(x, n) ^ (v))) @@ -1599,8 +1606,8 @@ #define HW_FMC_DATAW1SnU_ADDR(x, n) ((x) + 0x220U + (0x8U * (n))) #define HW_FMC_DATAW1SnU(x, n) (*(__IO hw_fmc_dataw1snu_t *) HW_FMC_DATAW1SnU_ADDR(x, n)) -#define HW_FMC_DATAW1SnU_RD(x, n) (HW_FMC_DATAW1SnU(x, n).U) -#define HW_FMC_DATAW1SnU_WR(x, n, v) (HW_FMC_DATAW1SnU(x, n).U = (v)) +#define HW_FMC_DATAW1SnU_RD(x, n) (ADDRESS_READ(hw_fmc_dataw1snu_t, HW_FMC_DATAW1SnU_ADDR(x, n))) +#define HW_FMC_DATAW1SnU_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw1snu_t, HW_FMC_DATAW1SnU_ADDR(x, n), v)) #define HW_FMC_DATAW1SnU_SET(x, n, v) (HW_FMC_DATAW1SnU_WR(x, n, HW_FMC_DATAW1SnU_RD(x, n) | (v))) #define HW_FMC_DATAW1SnU_CLR(x, n, v) (HW_FMC_DATAW1SnU_WR(x, n, HW_FMC_DATAW1SnU_RD(x, n) & ~(v))) #define HW_FMC_DATAW1SnU_TOG(x, n, v) (HW_FMC_DATAW1SnU_WR(x, n, HW_FMC_DATAW1SnU_RD(x, n) ^ (v))) @@ -1660,8 +1667,8 @@ #define HW_FMC_DATAW1SnL_ADDR(x, n) ((x) + 0x224U + (0x8U * (n))) #define HW_FMC_DATAW1SnL(x, n) (*(__IO hw_fmc_dataw1snl_t *) HW_FMC_DATAW1SnL_ADDR(x, n)) -#define HW_FMC_DATAW1SnL_RD(x, n) (HW_FMC_DATAW1SnL(x, n).U) -#define HW_FMC_DATAW1SnL_WR(x, n, v) (HW_FMC_DATAW1SnL(x, n).U = (v)) +#define HW_FMC_DATAW1SnL_RD(x, n) (ADDRESS_READ(hw_fmc_dataw1snl_t, HW_FMC_DATAW1SnL_ADDR(x, n))) +#define HW_FMC_DATAW1SnL_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw1snl_t, HW_FMC_DATAW1SnL_ADDR(x, n), v)) #define HW_FMC_DATAW1SnL_SET(x, n, v) (HW_FMC_DATAW1SnL_WR(x, n, HW_FMC_DATAW1SnL_RD(x, n) | (v))) #define HW_FMC_DATAW1SnL_CLR(x, n, v) (HW_FMC_DATAW1SnL_WR(x, n, HW_FMC_DATAW1SnL_RD(x, n) & ~(v))) #define HW_FMC_DATAW1SnL_TOG(x, n, v) (HW_FMC_DATAW1SnL_WR(x, n, HW_FMC_DATAW1SnL_RD(x, n) ^ (v))) @@ -1722,8 +1729,8 @@ #define HW_FMC_DATAW2SnU_ADDR(x, n) ((x) + 0x240U + (0x8U * (n))) #define HW_FMC_DATAW2SnU(x, n) (*(__IO hw_fmc_dataw2snu_t *) HW_FMC_DATAW2SnU_ADDR(x, n)) -#define HW_FMC_DATAW2SnU_RD(x, n) (HW_FMC_DATAW2SnU(x, n).U) -#define HW_FMC_DATAW2SnU_WR(x, n, v) (HW_FMC_DATAW2SnU(x, n).U = (v)) +#define HW_FMC_DATAW2SnU_RD(x, n) (ADDRESS_READ(hw_fmc_dataw2snu_t, HW_FMC_DATAW2SnU_ADDR(x, n))) +#define HW_FMC_DATAW2SnU_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw2snu_t, HW_FMC_DATAW2SnU_ADDR(x, n), v)) #define HW_FMC_DATAW2SnU_SET(x, n, v) (HW_FMC_DATAW2SnU_WR(x, n, HW_FMC_DATAW2SnU_RD(x, n) | (v))) #define HW_FMC_DATAW2SnU_CLR(x, n, v) (HW_FMC_DATAW2SnU_WR(x, n, HW_FMC_DATAW2SnU_RD(x, n) & ~(v))) #define HW_FMC_DATAW2SnU_TOG(x, n, v) (HW_FMC_DATAW2SnU_WR(x, n, HW_FMC_DATAW2SnU_RD(x, n) ^ (v))) @@ -1783,8 +1790,8 @@ #define HW_FMC_DATAW2SnL_ADDR(x, n) ((x) + 0x244U + (0x8U * (n))) #define HW_FMC_DATAW2SnL(x, n) (*(__IO hw_fmc_dataw2snl_t *) HW_FMC_DATAW2SnL_ADDR(x, n)) -#define HW_FMC_DATAW2SnL_RD(x, n) (HW_FMC_DATAW2SnL(x, n).U) -#define HW_FMC_DATAW2SnL_WR(x, n, v) (HW_FMC_DATAW2SnL(x, n).U = (v)) +#define HW_FMC_DATAW2SnL_RD(x, n) (ADDRESS_READ(hw_fmc_dataw2snl_t, HW_FMC_DATAW2SnL_ADDR(x, n))) +#define HW_FMC_DATAW2SnL_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw2snl_t, HW_FMC_DATAW2SnL_ADDR(x, n), v)) #define HW_FMC_DATAW2SnL_SET(x, n, v) (HW_FMC_DATAW2SnL_WR(x, n, HW_FMC_DATAW2SnL_RD(x, n) | (v))) #define HW_FMC_DATAW2SnL_CLR(x, n, v) (HW_FMC_DATAW2SnL_WR(x, n, HW_FMC_DATAW2SnL_RD(x, n) & ~(v))) #define HW_FMC_DATAW2SnL_TOG(x, n, v) (HW_FMC_DATAW2SnL_WR(x, n, HW_FMC_DATAW2SnL_RD(x, n) ^ (v))) @@ -1845,8 +1852,8 @@ #define HW_FMC_DATAW3SnU_ADDR(x, n) ((x) + 0x260U + (0x8U * (n))) #define HW_FMC_DATAW3SnU(x, n) (*(__IO hw_fmc_dataw3snu_t *) HW_FMC_DATAW3SnU_ADDR(x, n)) -#define HW_FMC_DATAW3SnU_RD(x, n) (HW_FMC_DATAW3SnU(x, n).U) -#define HW_FMC_DATAW3SnU_WR(x, n, v) (HW_FMC_DATAW3SnU(x, n).U = (v)) +#define HW_FMC_DATAW3SnU_RD(x, n) (ADDRESS_READ(hw_fmc_dataw3snu_t, HW_FMC_DATAW3SnU_ADDR(x, n))) +#define HW_FMC_DATAW3SnU_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw3snu_t, HW_FMC_DATAW3SnU_ADDR(x, n), v)) #define HW_FMC_DATAW3SnU_SET(x, n, v) (HW_FMC_DATAW3SnU_WR(x, n, HW_FMC_DATAW3SnU_RD(x, n) | (v))) #define HW_FMC_DATAW3SnU_CLR(x, n, v) (HW_FMC_DATAW3SnU_WR(x, n, HW_FMC_DATAW3SnU_RD(x, n) & ~(v))) #define HW_FMC_DATAW3SnU_TOG(x, n, v) (HW_FMC_DATAW3SnU_WR(x, n, HW_FMC_DATAW3SnU_RD(x, n) ^ (v))) @@ -1906,8 +1913,8 @@ #define HW_FMC_DATAW3SnL_ADDR(x, n) ((x) + 0x264U + (0x8U * (n))) #define HW_FMC_DATAW3SnL(x, n) (*(__IO hw_fmc_dataw3snl_t *) HW_FMC_DATAW3SnL_ADDR(x, n)) -#define HW_FMC_DATAW3SnL_RD(x, n) (HW_FMC_DATAW3SnL(x, n).U) -#define HW_FMC_DATAW3SnL_WR(x, n, v) (HW_FMC_DATAW3SnL(x, n).U = (v)) +#define HW_FMC_DATAW3SnL_RD(x, n) (ADDRESS_READ(hw_fmc_dataw3snl_t, HW_FMC_DATAW3SnL_ADDR(x, n))) +#define HW_FMC_DATAW3SnL_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw3snl_t, HW_FMC_DATAW3SnL_ADDR(x, n), v)) #define HW_FMC_DATAW3SnL_SET(x, n, v) (HW_FMC_DATAW3SnL_WR(x, n, HW_FMC_DATAW3SnL_RD(x, n) | (v))) #define HW_FMC_DATAW3SnL_CLR(x, n, v) (HW_FMC_DATAW3SnL_WR(x, n, HW_FMC_DATAW3SnL_RD(x, n) & ~(v))) #define HW_FMC_DATAW3SnL_TOG(x, n, v) (HW_FMC_DATAW3SnL_WR(x, n, HW_FMC_DATAW3SnL_RD(x, n) ^ (v)))
--- a/hal/device/device/MK64F12/MK64F12_ftfe.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_ftfe.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -155,8 +162,8 @@ #define HW_FTFE_FSTAT_ADDR(x) ((x) + 0x0U) #define HW_FTFE_FSTAT(x) (*(__IO hw_ftfe_fstat_t *) HW_FTFE_FSTAT_ADDR(x)) -#define HW_FTFE_FSTAT_RD(x) (HW_FTFE_FSTAT(x).U) -#define HW_FTFE_FSTAT_WR(x, v) (HW_FTFE_FSTAT(x).U = (v)) +#define HW_FTFE_FSTAT_RD(x) (ADDRESS_READ(hw_ftfe_fstat_t, HW_FTFE_FSTAT_ADDR(x))) +#define HW_FTFE_FSTAT_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fstat_t, HW_FTFE_FSTAT_ADDR(x), v)) #define HW_FTFE_FSTAT_SET(x, v) (HW_FTFE_FSTAT_WR(x, HW_FTFE_FSTAT_RD(x) | (v))) #define HW_FTFE_FSTAT_CLR(x, v) (HW_FTFE_FSTAT_WR(x, HW_FTFE_FSTAT_RD(x) & ~(v))) #define HW_FTFE_FSTAT_TOG(x, v) (HW_FTFE_FSTAT_WR(x, HW_FTFE_FSTAT_RD(x) ^ (v))) @@ -183,7 +190,7 @@ #define BS_FTFE_FSTAT_MGSTAT0 (1U) /*!< Bit field size in bits for FTFE_FSTAT_MGSTAT0. */ /*! @brief Read current value of the FTFE_FSTAT_MGSTAT0 field. */ -#define BR_FTFE_FSTAT_MGSTAT0(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_MGSTAT0)) +#define BR_FTFE_FSTAT_MGSTAT0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_MGSTAT0))) /*@}*/ /*! @@ -206,13 +213,13 @@ #define BS_FTFE_FSTAT_FPVIOL (1U) /*!< Bit field size in bits for FTFE_FSTAT_FPVIOL. */ /*! @brief Read current value of the FTFE_FSTAT_FPVIOL field. */ -#define BR_FTFE_FSTAT_FPVIOL(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL)) +#define BR_FTFE_FSTAT_FPVIOL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL))) /*! @brief Format value for bitfield FTFE_FSTAT_FPVIOL. */ #define BF_FTFE_FSTAT_FPVIOL(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_FPVIOL) & BM_FTFE_FSTAT_FPVIOL) /*! @brief Set the FPVIOL field to a new value. */ -#define BW_FTFE_FSTAT_FPVIOL(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL) = (v)) +#define BW_FTFE_FSTAT_FPVIOL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL), v)) /*@}*/ /*! @@ -234,13 +241,13 @@ #define BS_FTFE_FSTAT_ACCERR (1U) /*!< Bit field size in bits for FTFE_FSTAT_ACCERR. */ /*! @brief Read current value of the FTFE_FSTAT_ACCERR field. */ -#define BR_FTFE_FSTAT_ACCERR(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR)) +#define BR_FTFE_FSTAT_ACCERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR))) /*! @brief Format value for bitfield FTFE_FSTAT_ACCERR. */ #define BF_FTFE_FSTAT_ACCERR(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_ACCERR) & BM_FTFE_FSTAT_ACCERR) /*! @brief Set the ACCERR field to a new value. */ -#define BW_FTFE_FSTAT_ACCERR(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR) = (v)) +#define BW_FTFE_FSTAT_ACCERR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR), v)) /*@}*/ /*! @@ -262,13 +269,13 @@ #define BS_FTFE_FSTAT_RDCOLERR (1U) /*!< Bit field size in bits for FTFE_FSTAT_RDCOLERR. */ /*! @brief Read current value of the FTFE_FSTAT_RDCOLERR field. */ -#define BR_FTFE_FSTAT_RDCOLERR(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR)) +#define BR_FTFE_FSTAT_RDCOLERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR))) /*! @brief Format value for bitfield FTFE_FSTAT_RDCOLERR. */ #define BF_FTFE_FSTAT_RDCOLERR(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_RDCOLERR) & BM_FTFE_FSTAT_RDCOLERR) /*! @brief Set the RDCOLERR field to a new value. */ -#define BW_FTFE_FSTAT_RDCOLERR(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR) = (v)) +#define BW_FTFE_FSTAT_RDCOLERR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR), v)) /*@}*/ /*! @@ -294,13 +301,13 @@ #define BS_FTFE_FSTAT_CCIF (1U) /*!< Bit field size in bits for FTFE_FSTAT_CCIF. */ /*! @brief Read current value of the FTFE_FSTAT_CCIF field. */ -#define BR_FTFE_FSTAT_CCIF(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF)) +#define BR_FTFE_FSTAT_CCIF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF))) /*! @brief Format value for bitfield FTFE_FSTAT_CCIF. */ #define BF_FTFE_FSTAT_CCIF(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_CCIF) & BM_FTFE_FSTAT_CCIF) /*! @brief Set the CCIF field to a new value. */ -#define BW_FTFE_FSTAT_CCIF(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF) = (v)) +#define BW_FTFE_FSTAT_CCIF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF), v)) /*@}*/ /******************************************************************************* @@ -342,8 +349,8 @@ #define HW_FTFE_FCNFG_ADDR(x) ((x) + 0x1U) #define HW_FTFE_FCNFG(x) (*(__IO hw_ftfe_fcnfg_t *) HW_FTFE_FCNFG_ADDR(x)) -#define HW_FTFE_FCNFG_RD(x) (HW_FTFE_FCNFG(x).U) -#define HW_FTFE_FCNFG_WR(x, v) (HW_FTFE_FCNFG(x).U = (v)) +#define HW_FTFE_FCNFG_RD(x) (ADDRESS_READ(hw_ftfe_fcnfg_t, HW_FTFE_FCNFG_ADDR(x))) +#define HW_FTFE_FCNFG_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fcnfg_t, HW_FTFE_FCNFG_ADDR(x), v)) #define HW_FTFE_FCNFG_SET(x, v) (HW_FTFE_FCNFG_WR(x, HW_FTFE_FCNFG_RD(x) | (v))) #define HW_FTFE_FCNFG_CLR(x, v) (HW_FTFE_FCNFG_WR(x, HW_FTFE_FCNFG_RD(x) & ~(v))) #define HW_FTFE_FCNFG_TOG(x, v) (HW_FTFE_FCNFG_WR(x, HW_FTFE_FCNFG_RD(x) ^ (v))) @@ -375,7 +382,7 @@ #define BS_FTFE_FCNFG_EEERDY (1U) /*!< Bit field size in bits for FTFE_FCNFG_EEERDY. */ /*! @brief Read current value of the FTFE_FCNFG_EEERDY field. */ -#define BR_FTFE_FCNFG_EEERDY(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_EEERDY)) +#define BR_FTFE_FCNFG_EEERDY(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_EEERDY))) /*@}*/ /*! @@ -405,7 +412,7 @@ #define BS_FTFE_FCNFG_RAMRDY (1U) /*!< Bit field size in bits for FTFE_FCNFG_RAMRDY. */ /*! @brief Read current value of the FTFE_FCNFG_RAMRDY field. */ -#define BR_FTFE_FCNFG_RAMRDY(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RAMRDY)) +#define BR_FTFE_FCNFG_RAMRDY(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RAMRDY))) /*@}*/ /*! @@ -424,7 +431,7 @@ #define BS_FTFE_FCNFG_PFLSH (1U) /*!< Bit field size in bits for FTFE_FCNFG_PFLSH. */ /*! @brief Read current value of the FTFE_FCNFG_PFLSH field. */ -#define BR_FTFE_FCNFG_PFLSH(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_PFLSH)) +#define BR_FTFE_FCNFG_PFLSH(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_PFLSH))) /*@}*/ /*! @@ -447,7 +454,7 @@ #define BS_FTFE_FCNFG_SWAP (1U) /*!< Bit field size in bits for FTFE_FCNFG_SWAP. */ /*! @brief Read current value of the FTFE_FCNFG_SWAP field. */ -#define BR_FTFE_FCNFG_SWAP(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_SWAP)) +#define BR_FTFE_FCNFG_SWAP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_SWAP))) /*@}*/ /*! @@ -466,13 +473,13 @@ #define BS_FTFE_FCNFG_ERSSUSP (1U) /*!< Bit field size in bits for FTFE_FCNFG_ERSSUSP. */ /*! @brief Read current value of the FTFE_FCNFG_ERSSUSP field. */ -#define BR_FTFE_FCNFG_ERSSUSP(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP)) +#define BR_FTFE_FCNFG_ERSSUSP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP))) /*! @brief Format value for bitfield FTFE_FCNFG_ERSSUSP. */ #define BF_FTFE_FCNFG_ERSSUSP(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCNFG_ERSSUSP) & BM_FTFE_FCNFG_ERSSUSP) /*! @brief Set the ERSSUSP field to a new value. */ -#define BW_FTFE_FCNFG_ERSSUSP(x, v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP) = (v)) +#define BW_FTFE_FCNFG_ERSSUSP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP), v)) /*@}*/ /*! @@ -498,7 +505,7 @@ #define BS_FTFE_FCNFG_ERSAREQ (1U) /*!< Bit field size in bits for FTFE_FCNFG_ERSAREQ. */ /*! @brief Read current value of the FTFE_FCNFG_ERSAREQ field. */ -#define BR_FTFE_FCNFG_ERSAREQ(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSAREQ)) +#define BR_FTFE_FCNFG_ERSAREQ(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSAREQ))) /*@}*/ /*! @@ -519,13 +526,13 @@ #define BS_FTFE_FCNFG_RDCOLLIE (1U) /*!< Bit field size in bits for FTFE_FCNFG_RDCOLLIE. */ /*! @brief Read current value of the FTFE_FCNFG_RDCOLLIE field. */ -#define BR_FTFE_FCNFG_RDCOLLIE(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE)) +#define BR_FTFE_FCNFG_RDCOLLIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE))) /*! @brief Format value for bitfield FTFE_FCNFG_RDCOLLIE. */ #define BF_FTFE_FCNFG_RDCOLLIE(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCNFG_RDCOLLIE) & BM_FTFE_FCNFG_RDCOLLIE) /*! @brief Set the RDCOLLIE field to a new value. */ -#define BW_FTFE_FCNFG_RDCOLLIE(x, v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE) = (v)) +#define BW_FTFE_FCNFG_RDCOLLIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE), v)) /*@}*/ /*! @@ -544,13 +551,13 @@ #define BS_FTFE_FCNFG_CCIE (1U) /*!< Bit field size in bits for FTFE_FCNFG_CCIE. */ /*! @brief Read current value of the FTFE_FCNFG_CCIE field. */ -#define BR_FTFE_FCNFG_CCIE(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE)) +#define BR_FTFE_FCNFG_CCIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE))) /*! @brief Format value for bitfield FTFE_FCNFG_CCIE. */ #define BF_FTFE_FCNFG_CCIE(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCNFG_CCIE) & BM_FTFE_FCNFG_CCIE) /*! @brief Set the CCIE field to a new value. */ -#define BW_FTFE_FCNFG_CCIE(x, v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE) = (v)) +#define BW_FTFE_FCNFG_CCIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE), v)) /*@}*/ /******************************************************************************* @@ -588,7 +595,7 @@ #define HW_FTFE_FSEC_ADDR(x) ((x) + 0x2U) #define HW_FTFE_FSEC(x) (*(__I hw_ftfe_fsec_t *) HW_FTFE_FSEC_ADDR(x)) -#define HW_FTFE_FSEC_RD(x) (HW_FTFE_FSEC(x).U) +#define HW_FTFE_FSEC_RD(x) (ADDRESS_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x))) /*@}*/ /* @@ -616,7 +623,7 @@ #define BS_FTFE_FSEC_SEC (2U) /*!< Bit field size in bits for FTFE_FSEC_SEC. */ /*! @brief Read current value of the FTFE_FSEC_SEC field. */ -#define BR_FTFE_FSEC_SEC(x) (HW_FTFE_FSEC(x).B.SEC) +#define BR_FTFE_FSEC_SEC(x) (UNION_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x), U, B.SEC)) /*@}*/ /*! @@ -644,7 +651,7 @@ #define BS_FTFE_FSEC_FSLACC (2U) /*!< Bit field size in bits for FTFE_FSEC_FSLACC. */ /*! @brief Read current value of the FTFE_FSEC_FSLACC field. */ -#define BR_FTFE_FSEC_FSLACC(x) (HW_FTFE_FSEC(x).B.FSLACC) +#define BR_FTFE_FSEC_FSLACC(x) (UNION_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x), U, B.FSLACC)) /*@}*/ /*! @@ -667,7 +674,7 @@ #define BS_FTFE_FSEC_MEEN (2U) /*!< Bit field size in bits for FTFE_FSEC_MEEN. */ /*! @brief Read current value of the FTFE_FSEC_MEEN field. */ -#define BR_FTFE_FSEC_MEEN(x) (HW_FTFE_FSEC(x).B.MEEN) +#define BR_FTFE_FSEC_MEEN(x) (UNION_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x), U, B.MEEN)) /*@}*/ /*! @@ -688,7 +695,7 @@ #define BS_FTFE_FSEC_KEYEN (2U) /*!< Bit field size in bits for FTFE_FSEC_KEYEN. */ /*! @brief Read current value of the FTFE_FSEC_KEYEN field. */ -#define BR_FTFE_FSEC_KEYEN(x) (HW_FTFE_FSEC(x).B.KEYEN) +#define BR_FTFE_FSEC_KEYEN(x) (UNION_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x), U, B.KEYEN)) /*@}*/ /******************************************************************************* @@ -724,7 +731,7 @@ #define HW_FTFE_FOPT_ADDR(x) ((x) + 0x3U) #define HW_FTFE_FOPT(x) (*(__I hw_ftfe_fopt_t *) HW_FTFE_FOPT_ADDR(x)) -#define HW_FTFE_FOPT_RD(x) (HW_FTFE_FOPT(x).U) +#define HW_FTFE_FOPT_RD(x) (ADDRESS_READ(hw_ftfe_fopt_t, HW_FTFE_FOPT_ADDR(x))) /*@}*/ /* @@ -775,8 +782,8 @@ #define HW_FTFE_FCCOB3_ADDR(x) ((x) + 0x4U) #define HW_FTFE_FCCOB3(x) (*(__IO hw_ftfe_fccob3_t *) HW_FTFE_FCCOB3_ADDR(x)) -#define HW_FTFE_FCCOB3_RD(x) (HW_FTFE_FCCOB3(x).U) -#define HW_FTFE_FCCOB3_WR(x, v) (HW_FTFE_FCCOB3(x).U = (v)) +#define HW_FTFE_FCCOB3_RD(x) (ADDRESS_READ(hw_ftfe_fccob3_t, HW_FTFE_FCCOB3_ADDR(x))) +#define HW_FTFE_FCCOB3_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob3_t, HW_FTFE_FCCOB3_ADDR(x), v)) #define HW_FTFE_FCCOB3_SET(x, v) (HW_FTFE_FCCOB3_WR(x, HW_FTFE_FCCOB3_RD(x) | (v))) #define HW_FTFE_FCCOB3_CLR(x, v) (HW_FTFE_FCCOB3_WR(x, HW_FTFE_FCCOB3_RD(x) & ~(v))) #define HW_FTFE_FCCOB3_TOG(x, v) (HW_FTFE_FCCOB3_WR(x, HW_FTFE_FCCOB3_RD(x) ^ (v))) @@ -860,8 +867,8 @@ #define HW_FTFE_FCCOB2_ADDR(x) ((x) + 0x5U) #define HW_FTFE_FCCOB2(x) (*(__IO hw_ftfe_fccob2_t *) HW_FTFE_FCCOB2_ADDR(x)) -#define HW_FTFE_FCCOB2_RD(x) (HW_FTFE_FCCOB2(x).U) -#define HW_FTFE_FCCOB2_WR(x, v) (HW_FTFE_FCCOB2(x).U = (v)) +#define HW_FTFE_FCCOB2_RD(x) (ADDRESS_READ(hw_ftfe_fccob2_t, HW_FTFE_FCCOB2_ADDR(x))) +#define HW_FTFE_FCCOB2_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob2_t, HW_FTFE_FCCOB2_ADDR(x), v)) #define HW_FTFE_FCCOB2_SET(x, v) (HW_FTFE_FCCOB2_WR(x, HW_FTFE_FCCOB2_RD(x) | (v))) #define HW_FTFE_FCCOB2_CLR(x, v) (HW_FTFE_FCCOB2_WR(x, HW_FTFE_FCCOB2_RD(x) & ~(v))) #define HW_FTFE_FCCOB2_TOG(x, v) (HW_FTFE_FCCOB2_WR(x, HW_FTFE_FCCOB2_RD(x) ^ (v))) @@ -945,8 +952,8 @@ #define HW_FTFE_FCCOB1_ADDR(x) ((x) + 0x6U) #define HW_FTFE_FCCOB1(x) (*(__IO hw_ftfe_fccob1_t *) HW_FTFE_FCCOB1_ADDR(x)) -#define HW_FTFE_FCCOB1_RD(x) (HW_FTFE_FCCOB1(x).U) -#define HW_FTFE_FCCOB1_WR(x, v) (HW_FTFE_FCCOB1(x).U = (v)) +#define HW_FTFE_FCCOB1_RD(x) (ADDRESS_READ(hw_ftfe_fccob1_t, HW_FTFE_FCCOB1_ADDR(x))) +#define HW_FTFE_FCCOB1_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob1_t, HW_FTFE_FCCOB1_ADDR(x), v)) #define HW_FTFE_FCCOB1_SET(x, v) (HW_FTFE_FCCOB1_WR(x, HW_FTFE_FCCOB1_RD(x) | (v))) #define HW_FTFE_FCCOB1_CLR(x, v) (HW_FTFE_FCCOB1_WR(x, HW_FTFE_FCCOB1_RD(x) & ~(v))) #define HW_FTFE_FCCOB1_TOG(x, v) (HW_FTFE_FCCOB1_WR(x, HW_FTFE_FCCOB1_RD(x) ^ (v))) @@ -1030,8 +1037,8 @@ #define HW_FTFE_FCCOB0_ADDR(x) ((x) + 0x7U) #define HW_FTFE_FCCOB0(x) (*(__IO hw_ftfe_fccob0_t *) HW_FTFE_FCCOB0_ADDR(x)) -#define HW_FTFE_FCCOB0_RD(x) (HW_FTFE_FCCOB0(x).U) -#define HW_FTFE_FCCOB0_WR(x, v) (HW_FTFE_FCCOB0(x).U = (v)) +#define HW_FTFE_FCCOB0_RD(x) (ADDRESS_READ(hw_ftfe_fccob0_t, HW_FTFE_FCCOB0_ADDR(x))) +#define HW_FTFE_FCCOB0_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob0_t, HW_FTFE_FCCOB0_ADDR(x), v)) #define HW_FTFE_FCCOB0_SET(x, v) (HW_FTFE_FCCOB0_WR(x, HW_FTFE_FCCOB0_RD(x) | (v))) #define HW_FTFE_FCCOB0_CLR(x, v) (HW_FTFE_FCCOB0_WR(x, HW_FTFE_FCCOB0_RD(x) & ~(v))) #define HW_FTFE_FCCOB0_TOG(x, v) (HW_FTFE_FCCOB0_WR(x, HW_FTFE_FCCOB0_RD(x) ^ (v))) @@ -1115,8 +1122,8 @@ #define HW_FTFE_FCCOB7_ADDR(x) ((x) + 0x8U) #define HW_FTFE_FCCOB7(x) (*(__IO hw_ftfe_fccob7_t *) HW_FTFE_FCCOB7_ADDR(x)) -#define HW_FTFE_FCCOB7_RD(x) (HW_FTFE_FCCOB7(x).U) -#define HW_FTFE_FCCOB7_WR(x, v) (HW_FTFE_FCCOB7(x).U = (v)) +#define HW_FTFE_FCCOB7_RD(x) (ADDRESS_READ(hw_ftfe_fccob7_t, HW_FTFE_FCCOB7_ADDR(x))) +#define HW_FTFE_FCCOB7_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob7_t, HW_FTFE_FCCOB7_ADDR(x), v)) #define HW_FTFE_FCCOB7_SET(x, v) (HW_FTFE_FCCOB7_WR(x, HW_FTFE_FCCOB7_RD(x) | (v))) #define HW_FTFE_FCCOB7_CLR(x, v) (HW_FTFE_FCCOB7_WR(x, HW_FTFE_FCCOB7_RD(x) & ~(v))) #define HW_FTFE_FCCOB7_TOG(x, v) (HW_FTFE_FCCOB7_WR(x, HW_FTFE_FCCOB7_RD(x) ^ (v))) @@ -1200,8 +1207,8 @@ #define HW_FTFE_FCCOB6_ADDR(x) ((x) + 0x9U) #define HW_FTFE_FCCOB6(x) (*(__IO hw_ftfe_fccob6_t *) HW_FTFE_FCCOB6_ADDR(x)) -#define HW_FTFE_FCCOB6_RD(x) (HW_FTFE_FCCOB6(x).U) -#define HW_FTFE_FCCOB6_WR(x, v) (HW_FTFE_FCCOB6(x).U = (v)) +#define HW_FTFE_FCCOB6_RD(x) (ADDRESS_READ(hw_ftfe_fccob6_t, HW_FTFE_FCCOB6_ADDR(x))) +#define HW_FTFE_FCCOB6_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob6_t, HW_FTFE_FCCOB6_ADDR(x), v)) #define HW_FTFE_FCCOB6_SET(x, v) (HW_FTFE_FCCOB6_WR(x, HW_FTFE_FCCOB6_RD(x) | (v))) #define HW_FTFE_FCCOB6_CLR(x, v) (HW_FTFE_FCCOB6_WR(x, HW_FTFE_FCCOB6_RD(x) & ~(v))) #define HW_FTFE_FCCOB6_TOG(x, v) (HW_FTFE_FCCOB6_WR(x, HW_FTFE_FCCOB6_RD(x) ^ (v))) @@ -1285,8 +1292,8 @@ #define HW_FTFE_FCCOB5_ADDR(x) ((x) + 0xAU) #define HW_FTFE_FCCOB5(x) (*(__IO hw_ftfe_fccob5_t *) HW_FTFE_FCCOB5_ADDR(x)) -#define HW_FTFE_FCCOB5_RD(x) (HW_FTFE_FCCOB5(x).U) -#define HW_FTFE_FCCOB5_WR(x, v) (HW_FTFE_FCCOB5(x).U = (v)) +#define HW_FTFE_FCCOB5_RD(x) (ADDRESS_READ(hw_ftfe_fccob5_t, HW_FTFE_FCCOB5_ADDR(x))) +#define HW_FTFE_FCCOB5_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob5_t, HW_FTFE_FCCOB5_ADDR(x), v)) #define HW_FTFE_FCCOB5_SET(x, v) (HW_FTFE_FCCOB5_WR(x, HW_FTFE_FCCOB5_RD(x) | (v))) #define HW_FTFE_FCCOB5_CLR(x, v) (HW_FTFE_FCCOB5_WR(x, HW_FTFE_FCCOB5_RD(x) & ~(v))) #define HW_FTFE_FCCOB5_TOG(x, v) (HW_FTFE_FCCOB5_WR(x, HW_FTFE_FCCOB5_RD(x) ^ (v))) @@ -1370,8 +1377,8 @@ #define HW_FTFE_FCCOB4_ADDR(x) ((x) + 0xBU) #define HW_FTFE_FCCOB4(x) (*(__IO hw_ftfe_fccob4_t *) HW_FTFE_FCCOB4_ADDR(x)) -#define HW_FTFE_FCCOB4_RD(x) (HW_FTFE_FCCOB4(x).U) -#define HW_FTFE_FCCOB4_WR(x, v) (HW_FTFE_FCCOB4(x).U = (v)) +#define HW_FTFE_FCCOB4_RD(x) (ADDRESS_READ(hw_ftfe_fccob4_t, HW_FTFE_FCCOB4_ADDR(x))) +#define HW_FTFE_FCCOB4_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob4_t, HW_FTFE_FCCOB4_ADDR(x), v)) #define HW_FTFE_FCCOB4_SET(x, v) (HW_FTFE_FCCOB4_WR(x, HW_FTFE_FCCOB4_RD(x) | (v))) #define HW_FTFE_FCCOB4_CLR(x, v) (HW_FTFE_FCCOB4_WR(x, HW_FTFE_FCCOB4_RD(x) & ~(v))) #define HW_FTFE_FCCOB4_TOG(x, v) (HW_FTFE_FCCOB4_WR(x, HW_FTFE_FCCOB4_RD(x) ^ (v))) @@ -1455,8 +1462,8 @@ #define HW_FTFE_FCCOBB_ADDR(x) ((x) + 0xCU) #define HW_FTFE_FCCOBB(x) (*(__IO hw_ftfe_fccobb_t *) HW_FTFE_FCCOBB_ADDR(x)) -#define HW_FTFE_FCCOBB_RD(x) (HW_FTFE_FCCOBB(x).U) -#define HW_FTFE_FCCOBB_WR(x, v) (HW_FTFE_FCCOBB(x).U = (v)) +#define HW_FTFE_FCCOBB_RD(x) (ADDRESS_READ(hw_ftfe_fccobb_t, HW_FTFE_FCCOBB_ADDR(x))) +#define HW_FTFE_FCCOBB_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccobb_t, HW_FTFE_FCCOBB_ADDR(x), v)) #define HW_FTFE_FCCOBB_SET(x, v) (HW_FTFE_FCCOBB_WR(x, HW_FTFE_FCCOBB_RD(x) | (v))) #define HW_FTFE_FCCOBB_CLR(x, v) (HW_FTFE_FCCOBB_WR(x, HW_FTFE_FCCOBB_RD(x) & ~(v))) #define HW_FTFE_FCCOBB_TOG(x, v) (HW_FTFE_FCCOBB_WR(x, HW_FTFE_FCCOBB_RD(x) ^ (v))) @@ -1540,8 +1547,8 @@ #define HW_FTFE_FCCOBA_ADDR(x) ((x) + 0xDU) #define HW_FTFE_FCCOBA(x) (*(__IO hw_ftfe_fccoba_t *) HW_FTFE_FCCOBA_ADDR(x)) -#define HW_FTFE_FCCOBA_RD(x) (HW_FTFE_FCCOBA(x).U) -#define HW_FTFE_FCCOBA_WR(x, v) (HW_FTFE_FCCOBA(x).U = (v)) +#define HW_FTFE_FCCOBA_RD(x) (ADDRESS_READ(hw_ftfe_fccoba_t, HW_FTFE_FCCOBA_ADDR(x))) +#define HW_FTFE_FCCOBA_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccoba_t, HW_FTFE_FCCOBA_ADDR(x), v)) #define HW_FTFE_FCCOBA_SET(x, v) (HW_FTFE_FCCOBA_WR(x, HW_FTFE_FCCOBA_RD(x) | (v))) #define HW_FTFE_FCCOBA_CLR(x, v) (HW_FTFE_FCCOBA_WR(x, HW_FTFE_FCCOBA_RD(x) & ~(v))) #define HW_FTFE_FCCOBA_TOG(x, v) (HW_FTFE_FCCOBA_WR(x, HW_FTFE_FCCOBA_RD(x) ^ (v))) @@ -1625,8 +1632,8 @@ #define HW_FTFE_FCCOB9_ADDR(x) ((x) + 0xEU) #define HW_FTFE_FCCOB9(x) (*(__IO hw_ftfe_fccob9_t *) HW_FTFE_FCCOB9_ADDR(x)) -#define HW_FTFE_FCCOB9_RD(x) (HW_FTFE_FCCOB9(x).U) -#define HW_FTFE_FCCOB9_WR(x, v) (HW_FTFE_FCCOB9(x).U = (v)) +#define HW_FTFE_FCCOB9_RD(x) (ADDRESS_READ(hw_ftfe_fccob9_t, HW_FTFE_FCCOB9_ADDR(x))) +#define HW_FTFE_FCCOB9_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob9_t, HW_FTFE_FCCOB9_ADDR(x), v)) #define HW_FTFE_FCCOB9_SET(x, v) (HW_FTFE_FCCOB9_WR(x, HW_FTFE_FCCOB9_RD(x) | (v))) #define HW_FTFE_FCCOB9_CLR(x, v) (HW_FTFE_FCCOB9_WR(x, HW_FTFE_FCCOB9_RD(x) & ~(v))) #define HW_FTFE_FCCOB9_TOG(x, v) (HW_FTFE_FCCOB9_WR(x, HW_FTFE_FCCOB9_RD(x) ^ (v))) @@ -1710,8 +1717,8 @@ #define HW_FTFE_FCCOB8_ADDR(x) ((x) + 0xFU) #define HW_FTFE_FCCOB8(x) (*(__IO hw_ftfe_fccob8_t *) HW_FTFE_FCCOB8_ADDR(x)) -#define HW_FTFE_FCCOB8_RD(x) (HW_FTFE_FCCOB8(x).U) -#define HW_FTFE_FCCOB8_WR(x, v) (HW_FTFE_FCCOB8(x).U = (v)) +#define HW_FTFE_FCCOB8_RD(x) (ADDRESS_READ(hw_ftfe_fccob8_t, HW_FTFE_FCCOB8_ADDR(x))) +#define HW_FTFE_FCCOB8_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob8_t, HW_FTFE_FCCOB8_ADDR(x), v)) #define HW_FTFE_FCCOB8_SET(x, v) (HW_FTFE_FCCOB8_WR(x, HW_FTFE_FCCOB8_RD(x) | (v))) #define HW_FTFE_FCCOB8_CLR(x, v) (HW_FTFE_FCCOB8_WR(x, HW_FTFE_FCCOB8_RD(x) & ~(v))) #define HW_FTFE_FCCOB8_TOG(x, v) (HW_FTFE_FCCOB8_WR(x, HW_FTFE_FCCOB8_RD(x) ^ (v))) @@ -1806,8 +1813,8 @@ #define HW_FTFE_FPROT3_ADDR(x) ((x) + 0x10U) #define HW_FTFE_FPROT3(x) (*(__IO hw_ftfe_fprot3_t *) HW_FTFE_FPROT3_ADDR(x)) -#define HW_FTFE_FPROT3_RD(x) (HW_FTFE_FPROT3(x).U) -#define HW_FTFE_FPROT3_WR(x, v) (HW_FTFE_FPROT3(x).U = (v)) +#define HW_FTFE_FPROT3_RD(x) (ADDRESS_READ(hw_ftfe_fprot3_t, HW_FTFE_FPROT3_ADDR(x))) +#define HW_FTFE_FPROT3_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fprot3_t, HW_FTFE_FPROT3_ADDR(x), v)) #define HW_FTFE_FPROT3_SET(x, v) (HW_FTFE_FPROT3_WR(x, HW_FTFE_FPROT3_RD(x) | (v))) #define HW_FTFE_FPROT3_CLR(x, v) (HW_FTFE_FPROT3_WR(x, HW_FTFE_FPROT3_RD(x) & ~(v))) #define HW_FTFE_FPROT3_TOG(x, v) (HW_FTFE_FPROT3_WR(x, HW_FTFE_FPROT3_RD(x) ^ (v))) @@ -1894,8 +1901,8 @@ #define HW_FTFE_FPROT2_ADDR(x) ((x) + 0x11U) #define HW_FTFE_FPROT2(x) (*(__IO hw_ftfe_fprot2_t *) HW_FTFE_FPROT2_ADDR(x)) -#define HW_FTFE_FPROT2_RD(x) (HW_FTFE_FPROT2(x).U) -#define HW_FTFE_FPROT2_WR(x, v) (HW_FTFE_FPROT2(x).U = (v)) +#define HW_FTFE_FPROT2_RD(x) (ADDRESS_READ(hw_ftfe_fprot2_t, HW_FTFE_FPROT2_ADDR(x))) +#define HW_FTFE_FPROT2_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fprot2_t, HW_FTFE_FPROT2_ADDR(x), v)) #define HW_FTFE_FPROT2_SET(x, v) (HW_FTFE_FPROT2_WR(x, HW_FTFE_FPROT2_RD(x) | (v))) #define HW_FTFE_FPROT2_CLR(x, v) (HW_FTFE_FPROT2_WR(x, HW_FTFE_FPROT2_RD(x) & ~(v))) #define HW_FTFE_FPROT2_TOG(x, v) (HW_FTFE_FPROT2_WR(x, HW_FTFE_FPROT2_RD(x) ^ (v))) @@ -1982,8 +1989,8 @@ #define HW_FTFE_FPROT1_ADDR(x) ((x) + 0x12U) #define HW_FTFE_FPROT1(x) (*(__IO hw_ftfe_fprot1_t *) HW_FTFE_FPROT1_ADDR(x)) -#define HW_FTFE_FPROT1_RD(x) (HW_FTFE_FPROT1(x).U) -#define HW_FTFE_FPROT1_WR(x, v) (HW_FTFE_FPROT1(x).U = (v)) +#define HW_FTFE_FPROT1_RD(x) (ADDRESS_READ(hw_ftfe_fprot1_t, HW_FTFE_FPROT1_ADDR(x))) +#define HW_FTFE_FPROT1_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fprot1_t, HW_FTFE_FPROT1_ADDR(x), v)) #define HW_FTFE_FPROT1_SET(x, v) (HW_FTFE_FPROT1_WR(x, HW_FTFE_FPROT1_RD(x) | (v))) #define HW_FTFE_FPROT1_CLR(x, v) (HW_FTFE_FPROT1_WR(x, HW_FTFE_FPROT1_RD(x) & ~(v))) #define HW_FTFE_FPROT1_TOG(x, v) (HW_FTFE_FPROT1_WR(x, HW_FTFE_FPROT1_RD(x) ^ (v))) @@ -2070,8 +2077,8 @@ #define HW_FTFE_FPROT0_ADDR(x) ((x) + 0x13U) #define HW_FTFE_FPROT0(x) (*(__IO hw_ftfe_fprot0_t *) HW_FTFE_FPROT0_ADDR(x)) -#define HW_FTFE_FPROT0_RD(x) (HW_FTFE_FPROT0(x).U) -#define HW_FTFE_FPROT0_WR(x, v) (HW_FTFE_FPROT0(x).U = (v)) +#define HW_FTFE_FPROT0_RD(x) (ADDRESS_READ(hw_ftfe_fprot0_t, HW_FTFE_FPROT0_ADDR(x))) +#define HW_FTFE_FPROT0_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fprot0_t, HW_FTFE_FPROT0_ADDR(x), v)) #define HW_FTFE_FPROT0_SET(x, v) (HW_FTFE_FPROT0_WR(x, HW_FTFE_FPROT0_RD(x) | (v))) #define HW_FTFE_FPROT0_CLR(x, v) (HW_FTFE_FPROT0_WR(x, HW_FTFE_FPROT0_RD(x) & ~(v))) #define HW_FTFE_FPROT0_TOG(x, v) (HW_FTFE_FPROT0_WR(x, HW_FTFE_FPROT0_RD(x) ^ (v))) @@ -2149,8 +2156,8 @@ #define HW_FTFE_FEPROT_ADDR(x) ((x) + 0x16U) #define HW_FTFE_FEPROT(x) (*(__IO hw_ftfe_feprot_t *) HW_FTFE_FEPROT_ADDR(x)) -#define HW_FTFE_FEPROT_RD(x) (HW_FTFE_FEPROT(x).U) -#define HW_FTFE_FEPROT_WR(x, v) (HW_FTFE_FEPROT(x).U = (v)) +#define HW_FTFE_FEPROT_RD(x) (ADDRESS_READ(hw_ftfe_feprot_t, HW_FTFE_FEPROT_ADDR(x))) +#define HW_FTFE_FEPROT_WR(x, v) (ADDRESS_WRITE(hw_ftfe_feprot_t, HW_FTFE_FEPROT_ADDR(x), v)) #define HW_FTFE_FEPROT_SET(x, v) (HW_FTFE_FEPROT_WR(x, HW_FTFE_FEPROT_RD(x) | (v))) #define HW_FTFE_FEPROT_CLR(x, v) (HW_FTFE_FEPROT_WR(x, HW_FTFE_FEPROT_RD(x) & ~(v))) #define HW_FTFE_FEPROT_TOG(x, v) (HW_FTFE_FEPROT_WR(x, HW_FTFE_FEPROT_RD(x) ^ (v))) @@ -2239,8 +2246,8 @@ #define HW_FTFE_FDPROT_ADDR(x) ((x) + 0x17U) #define HW_FTFE_FDPROT(x) (*(__IO hw_ftfe_fdprot_t *) HW_FTFE_FDPROT_ADDR(x)) -#define HW_FTFE_FDPROT_RD(x) (HW_FTFE_FDPROT(x).U) -#define HW_FTFE_FDPROT_WR(x, v) (HW_FTFE_FDPROT(x).U = (v)) +#define HW_FTFE_FDPROT_RD(x) (ADDRESS_READ(hw_ftfe_fdprot_t, HW_FTFE_FDPROT_ADDR(x))) +#define HW_FTFE_FDPROT_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fdprot_t, HW_FTFE_FDPROT_ADDR(x), v)) #define HW_FTFE_FDPROT_SET(x, v) (HW_FTFE_FDPROT_WR(x, HW_FTFE_FDPROT_RD(x) | (v))) #define HW_FTFE_FDPROT_CLR(x, v) (HW_FTFE_FDPROT_WR(x, HW_FTFE_FDPROT_RD(x) & ~(v))) #define HW_FTFE_FDPROT_TOG(x, v) (HW_FTFE_FDPROT_WR(x, HW_FTFE_FDPROT_RD(x) ^ (v)))
--- a/hal/device/device/MK64F12/MK64F12_ftm.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_ftm.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -158,8 +165,8 @@ #define HW_FTM_SC_ADDR(x) ((x) + 0x0U) #define HW_FTM_SC(x) (*(__IO hw_ftm_sc_t *) HW_FTM_SC_ADDR(x)) -#define HW_FTM_SC_RD(x) (HW_FTM_SC(x).U) -#define HW_FTM_SC_WR(x, v) (HW_FTM_SC(x).U = (v)) +#define HW_FTM_SC_RD(x) (ADDRESS_READ(hw_ftm_sc_t, HW_FTM_SC_ADDR(x))) +#define HW_FTM_SC_WR(x, v) (ADDRESS_WRITE(hw_ftm_sc_t, HW_FTM_SC_ADDR(x), v)) #define HW_FTM_SC_SET(x, v) (HW_FTM_SC_WR(x, HW_FTM_SC_RD(x) | (v))) #define HW_FTM_SC_CLR(x, v) (HW_FTM_SC_WR(x, HW_FTM_SC_RD(x) & ~(v))) #define HW_FTM_SC_TOG(x, v) (HW_FTM_SC_WR(x, HW_FTM_SC_RD(x) ^ (v))) @@ -193,7 +200,7 @@ #define BS_FTM_SC_PS (3U) /*!< Bit field size in bits for FTM_SC_PS. */ /*! @brief Read current value of the FTM_SC_PS field. */ -#define BR_FTM_SC_PS(x) (HW_FTM_SC(x).B.PS) +#define BR_FTM_SC_PS(x) (UNION_READ(hw_ftm_sc_t, HW_FTM_SC_ADDR(x), U, B.PS)) /*! @brief Format value for bitfield FTM_SC_PS. */ #define BF_FTM_SC_PS(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SC_PS) & BM_FTM_SC_PS) @@ -220,7 +227,7 @@ #define BS_FTM_SC_CLKS (2U) /*!< Bit field size in bits for FTM_SC_CLKS. */ /*! @brief Read current value of the FTM_SC_CLKS field. */ -#define BR_FTM_SC_CLKS(x) (HW_FTM_SC(x).B.CLKS) +#define BR_FTM_SC_CLKS(x) (UNION_READ(hw_ftm_sc_t, HW_FTM_SC_ADDR(x), U, B.CLKS)) /*! @brief Format value for bitfield FTM_SC_CLKS. */ #define BF_FTM_SC_CLKS(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SC_CLKS) & BM_FTM_SC_CLKS) @@ -246,13 +253,13 @@ #define BS_FTM_SC_CPWMS (1U) /*!< Bit field size in bits for FTM_SC_CPWMS. */ /*! @brief Read current value of the FTM_SC_CPWMS field. */ -#define BR_FTM_SC_CPWMS(x) (BITBAND_ACCESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_CPWMS)) +#define BR_FTM_SC_CPWMS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_CPWMS))) /*! @brief Format value for bitfield FTM_SC_CPWMS. */ #define BF_FTM_SC_CPWMS(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SC_CPWMS) & BM_FTM_SC_CPWMS) /*! @brief Set the CPWMS field to a new value. */ -#define BW_FTM_SC_CPWMS(x, v) (BITBAND_ACCESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_CPWMS) = (v)) +#define BW_FTM_SC_CPWMS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_CPWMS), v)) /*@}*/ /*! @@ -270,13 +277,13 @@ #define BS_FTM_SC_TOIE (1U) /*!< Bit field size in bits for FTM_SC_TOIE. */ /*! @brief Read current value of the FTM_SC_TOIE field. */ -#define BR_FTM_SC_TOIE(x) (BITBAND_ACCESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_TOIE)) +#define BR_FTM_SC_TOIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_TOIE))) /*! @brief Format value for bitfield FTM_SC_TOIE. */ #define BF_FTM_SC_TOIE(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SC_TOIE) & BM_FTM_SC_TOIE) /*! @brief Set the TOIE field to a new value. */ -#define BW_FTM_SC_TOIE(x, v) (BITBAND_ACCESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_TOIE) = (v)) +#define BW_FTM_SC_TOIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_TOIE), v)) /*@}*/ /*! @@ -300,13 +307,13 @@ #define BS_FTM_SC_TOF (1U) /*!< Bit field size in bits for FTM_SC_TOF. */ /*! @brief Read current value of the FTM_SC_TOF field. */ -#define BR_FTM_SC_TOF(x) (BITBAND_ACCESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_TOF)) +#define BR_FTM_SC_TOF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_TOF))) /*! @brief Format value for bitfield FTM_SC_TOF. */ #define BF_FTM_SC_TOF(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SC_TOF) & BM_FTM_SC_TOF) /*! @brief Set the TOF field to a new value. */ -#define BW_FTM_SC_TOF(x, v) (BITBAND_ACCESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_TOF) = (v)) +#define BW_FTM_SC_TOF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SC_ADDR(x), BP_FTM_SC_TOF), v)) /*@}*/ /******************************************************************************* @@ -340,8 +347,8 @@ #define HW_FTM_CNT_ADDR(x) ((x) + 0x4U) #define HW_FTM_CNT(x) (*(__IO hw_ftm_cnt_t *) HW_FTM_CNT_ADDR(x)) -#define HW_FTM_CNT_RD(x) (HW_FTM_CNT(x).U) -#define HW_FTM_CNT_WR(x, v) (HW_FTM_CNT(x).U = (v)) +#define HW_FTM_CNT_RD(x) (ADDRESS_READ(hw_ftm_cnt_t, HW_FTM_CNT_ADDR(x))) +#define HW_FTM_CNT_WR(x, v) (ADDRESS_WRITE(hw_ftm_cnt_t, HW_FTM_CNT_ADDR(x), v)) #define HW_FTM_CNT_SET(x, v) (HW_FTM_CNT_WR(x, HW_FTM_CNT_RD(x) | (v))) #define HW_FTM_CNT_CLR(x, v) (HW_FTM_CNT_WR(x, HW_FTM_CNT_RD(x) & ~(v))) #define HW_FTM_CNT_TOG(x, v) (HW_FTM_CNT_WR(x, HW_FTM_CNT_RD(x) ^ (v))) @@ -360,7 +367,7 @@ #define BS_FTM_CNT_COUNT (16U) /*!< Bit field size in bits for FTM_CNT_COUNT. */ /*! @brief Read current value of the FTM_CNT_COUNT field. */ -#define BR_FTM_CNT_COUNT(x) (HW_FTM_CNT(x).B.COUNT) +#define BR_FTM_CNT_COUNT(x) (UNION_READ(hw_ftm_cnt_t, HW_FTM_CNT_ADDR(x), U, B.COUNT)) /*! @brief Format value for bitfield FTM_CNT_COUNT. */ #define BF_FTM_CNT_COUNT(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CNT_COUNT) & BM_FTM_CNT_COUNT) @@ -406,8 +413,8 @@ #define HW_FTM_MOD_ADDR(x) ((x) + 0x8U) #define HW_FTM_MOD(x) (*(__IO hw_ftm_mod_t *) HW_FTM_MOD_ADDR(x)) -#define HW_FTM_MOD_RD(x) (HW_FTM_MOD(x).U) -#define HW_FTM_MOD_WR(x, v) (HW_FTM_MOD(x).U = (v)) +#define HW_FTM_MOD_RD(x) (ADDRESS_READ(hw_ftm_mod_t, HW_FTM_MOD_ADDR(x))) +#define HW_FTM_MOD_WR(x, v) (ADDRESS_WRITE(hw_ftm_mod_t, HW_FTM_MOD_ADDR(x), v)) #define HW_FTM_MOD_SET(x, v) (HW_FTM_MOD_WR(x, HW_FTM_MOD_RD(x) | (v))) #define HW_FTM_MOD_CLR(x, v) (HW_FTM_MOD_WR(x, HW_FTM_MOD_RD(x) & ~(v))) #define HW_FTM_MOD_TOG(x, v) (HW_FTM_MOD_WR(x, HW_FTM_MOD_RD(x) ^ (v))) @@ -428,7 +435,7 @@ #define BS_FTM_MOD_MOD (16U) /*!< Bit field size in bits for FTM_MOD_MOD. */ /*! @brief Read current value of the FTM_MOD_MOD field. */ -#define BR_FTM_MOD_MOD(x) (HW_FTM_MOD(x).B.MOD) +#define BR_FTM_MOD_MOD(x) (UNION_READ(hw_ftm_mod_t, HW_FTM_MOD_ADDR(x), U, B.MOD)) /*! @brief Format value for bitfield FTM_MOD_MOD. */ #define BF_FTM_MOD_MOD(v) ((uint32_t)((uint32_t)(v) << BP_FTM_MOD_MOD) & BM_FTM_MOD_MOD) @@ -490,8 +497,8 @@ #define HW_FTM_CnSC_ADDR(x, n) ((x) + 0xCU + (0x8U * (n))) #define HW_FTM_CnSC(x, n) (*(__IO hw_ftm_cnsc_t *) HW_FTM_CnSC_ADDR(x, n)) -#define HW_FTM_CnSC_RD(x, n) (HW_FTM_CnSC(x, n).U) -#define HW_FTM_CnSC_WR(x, n, v) (HW_FTM_CnSC(x, n).U = (v)) +#define HW_FTM_CnSC_RD(x, n) (ADDRESS_READ(hw_ftm_cnsc_t, HW_FTM_CnSC_ADDR(x, n))) +#define HW_FTM_CnSC_WR(x, n, v) (ADDRESS_WRITE(hw_ftm_cnsc_t, HW_FTM_CnSC_ADDR(x, n), v)) #define HW_FTM_CnSC_SET(x, n, v) (HW_FTM_CnSC_WR(x, n, HW_FTM_CnSC_RD(x, n) | (v))) #define HW_FTM_CnSC_CLR(x, n, v) (HW_FTM_CnSC_WR(x, n, HW_FTM_CnSC_RD(x, n) & ~(v))) #define HW_FTM_CnSC_TOG(x, n, v) (HW_FTM_CnSC_WR(x, n, HW_FTM_CnSC_RD(x, n) ^ (v))) @@ -516,13 +523,13 @@ #define BS_FTM_CnSC_DMA (1U) /*!< Bit field size in bits for FTM_CnSC_DMA. */ /*! @brief Read current value of the FTM_CnSC_DMA field. */ -#define BR_FTM_CnSC_DMA(x, n) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_DMA)) +#define BR_FTM_CnSC_DMA(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_DMA))) /*! @brief Format value for bitfield FTM_CnSC_DMA. */ #define BF_FTM_CnSC_DMA(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CnSC_DMA) & BM_FTM_CnSC_DMA) /*! @brief Set the DMA field to a new value. */ -#define BW_FTM_CnSC_DMA(x, n, v) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_DMA) = (v)) +#define BW_FTM_CnSC_DMA(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_DMA), v)) /*@}*/ /*! @@ -538,13 +545,13 @@ #define BS_FTM_CnSC_ELSA (1U) /*!< Bit field size in bits for FTM_CnSC_ELSA. */ /*! @brief Read current value of the FTM_CnSC_ELSA field. */ -#define BR_FTM_CnSC_ELSA(x, n) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_ELSA)) +#define BR_FTM_CnSC_ELSA(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_ELSA))) /*! @brief Format value for bitfield FTM_CnSC_ELSA. */ #define BF_FTM_CnSC_ELSA(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CnSC_ELSA) & BM_FTM_CnSC_ELSA) /*! @brief Set the ELSA field to a new value. */ -#define BW_FTM_CnSC_ELSA(x, n, v) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_ELSA) = (v)) +#define BW_FTM_CnSC_ELSA(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_ELSA), v)) /*@}*/ /*! @@ -560,13 +567,13 @@ #define BS_FTM_CnSC_ELSB (1U) /*!< Bit field size in bits for FTM_CnSC_ELSB. */ /*! @brief Read current value of the FTM_CnSC_ELSB field. */ -#define BR_FTM_CnSC_ELSB(x, n) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_ELSB)) +#define BR_FTM_CnSC_ELSB(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_ELSB))) /*! @brief Format value for bitfield FTM_CnSC_ELSB. */ #define BF_FTM_CnSC_ELSB(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CnSC_ELSB) & BM_FTM_CnSC_ELSB) /*! @brief Set the ELSB field to a new value. */ -#define BW_FTM_CnSC_ELSB(x, n, v) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_ELSB) = (v)) +#define BW_FTM_CnSC_ELSB(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_ELSB), v)) /*@}*/ /*! @@ -582,13 +589,13 @@ #define BS_FTM_CnSC_MSA (1U) /*!< Bit field size in bits for FTM_CnSC_MSA. */ /*! @brief Read current value of the FTM_CnSC_MSA field. */ -#define BR_FTM_CnSC_MSA(x, n) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_MSA)) +#define BR_FTM_CnSC_MSA(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_MSA))) /*! @brief Format value for bitfield FTM_CnSC_MSA. */ #define BF_FTM_CnSC_MSA(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CnSC_MSA) & BM_FTM_CnSC_MSA) /*! @brief Set the MSA field to a new value. */ -#define BW_FTM_CnSC_MSA(x, n, v) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_MSA) = (v)) +#define BW_FTM_CnSC_MSA(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_MSA), v)) /*@}*/ /*! @@ -604,13 +611,13 @@ #define BS_FTM_CnSC_MSB (1U) /*!< Bit field size in bits for FTM_CnSC_MSB. */ /*! @brief Read current value of the FTM_CnSC_MSB field. */ -#define BR_FTM_CnSC_MSB(x, n) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_MSB)) +#define BR_FTM_CnSC_MSB(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_MSB))) /*! @brief Format value for bitfield FTM_CnSC_MSB. */ #define BF_FTM_CnSC_MSB(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CnSC_MSB) & BM_FTM_CnSC_MSB) /*! @brief Set the MSB field to a new value. */ -#define BW_FTM_CnSC_MSB(x, n, v) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_MSB) = (v)) +#define BW_FTM_CnSC_MSB(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_MSB), v)) /*@}*/ /*! @@ -628,13 +635,13 @@ #define BS_FTM_CnSC_CHIE (1U) /*!< Bit field size in bits for FTM_CnSC_CHIE. */ /*! @brief Read current value of the FTM_CnSC_CHIE field. */ -#define BR_FTM_CnSC_CHIE(x, n) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_CHIE)) +#define BR_FTM_CnSC_CHIE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_CHIE))) /*! @brief Format value for bitfield FTM_CnSC_CHIE. */ #define BF_FTM_CnSC_CHIE(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CnSC_CHIE) & BM_FTM_CnSC_CHIE) /*! @brief Set the CHIE field to a new value. */ -#define BW_FTM_CnSC_CHIE(x, n, v) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_CHIE) = (v)) +#define BW_FTM_CnSC_CHIE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_CHIE), v)) /*@}*/ /*! @@ -657,13 +664,13 @@ #define BS_FTM_CnSC_CHF (1U) /*!< Bit field size in bits for FTM_CnSC_CHF. */ /*! @brief Read current value of the FTM_CnSC_CHF field. */ -#define BR_FTM_CnSC_CHF(x, n) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_CHF)) +#define BR_FTM_CnSC_CHF(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_CHF))) /*! @brief Format value for bitfield FTM_CnSC_CHF. */ #define BF_FTM_CnSC_CHF(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CnSC_CHF) & BM_FTM_CnSC_CHF) /*! @brief Set the CHF field to a new value. */ -#define BW_FTM_CnSC_CHF(x, n, v) (BITBAND_ACCESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_CHF) = (v)) +#define BW_FTM_CnSC_CHF(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_CnSC_ADDR(x, n), BP_FTM_CnSC_CHF), v)) /*@}*/ /******************************************************************************* * HW_FTM_CnV - Channel (n) Value @@ -701,8 +708,8 @@ #define HW_FTM_CnV_ADDR(x, n) ((x) + 0x10U + (0x8U * (n))) #define HW_FTM_CnV(x, n) (*(__IO hw_ftm_cnv_t *) HW_FTM_CnV_ADDR(x, n)) -#define HW_FTM_CnV_RD(x, n) (HW_FTM_CnV(x, n).U) -#define HW_FTM_CnV_WR(x, n, v) (HW_FTM_CnV(x, n).U = (v)) +#define HW_FTM_CnV_RD(x, n) (ADDRESS_READ(hw_ftm_cnv_t, HW_FTM_CnV_ADDR(x, n))) +#define HW_FTM_CnV_WR(x, n, v) (ADDRESS_WRITE(hw_ftm_cnv_t, HW_FTM_CnV_ADDR(x, n), v)) #define HW_FTM_CnV_SET(x, n, v) (HW_FTM_CnV_WR(x, n, HW_FTM_CnV_RD(x, n) | (v))) #define HW_FTM_CnV_CLR(x, n, v) (HW_FTM_CnV_WR(x, n, HW_FTM_CnV_RD(x, n) & ~(v))) #define HW_FTM_CnV_TOG(x, n, v) (HW_FTM_CnV_WR(x, n, HW_FTM_CnV_RD(x, n) ^ (v))) @@ -724,7 +731,7 @@ #define BS_FTM_CnV_VAL (16U) /*!< Bit field size in bits for FTM_CnV_VAL. */ /*! @brief Read current value of the FTM_CnV_VAL field. */ -#define BR_FTM_CnV_VAL(x, n) (HW_FTM_CnV(x, n).B.VAL) +#define BR_FTM_CnV_VAL(x, n) (UNION_READ(hw_ftm_cnv_t, HW_FTM_CnV_ADDR(x, n), U, B.VAL)) /*! @brief Format value for bitfield FTM_CnV_VAL. */ #define BF_FTM_CnV_VAL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CnV_VAL) & BM_FTM_CnV_VAL) @@ -768,8 +775,8 @@ #define HW_FTM_CNTIN_ADDR(x) ((x) + 0x4CU) #define HW_FTM_CNTIN(x) (*(__IO hw_ftm_cntin_t *) HW_FTM_CNTIN_ADDR(x)) -#define HW_FTM_CNTIN_RD(x) (HW_FTM_CNTIN(x).U) -#define HW_FTM_CNTIN_WR(x, v) (HW_FTM_CNTIN(x).U = (v)) +#define HW_FTM_CNTIN_RD(x) (ADDRESS_READ(hw_ftm_cntin_t, HW_FTM_CNTIN_ADDR(x))) +#define HW_FTM_CNTIN_WR(x, v) (ADDRESS_WRITE(hw_ftm_cntin_t, HW_FTM_CNTIN_ADDR(x), v)) #define HW_FTM_CNTIN_SET(x, v) (HW_FTM_CNTIN_WR(x, HW_FTM_CNTIN_RD(x) | (v))) #define HW_FTM_CNTIN_CLR(x, v) (HW_FTM_CNTIN_WR(x, HW_FTM_CNTIN_RD(x) & ~(v))) #define HW_FTM_CNTIN_TOG(x, v) (HW_FTM_CNTIN_WR(x, HW_FTM_CNTIN_RD(x) ^ (v))) @@ -790,7 +797,7 @@ #define BS_FTM_CNTIN_INIT (16U) /*!< Bit field size in bits for FTM_CNTIN_INIT. */ /*! @brief Read current value of the FTM_CNTIN_INIT field. */ -#define BR_FTM_CNTIN_INIT(x) (HW_FTM_CNTIN(x).B.INIT) +#define BR_FTM_CNTIN_INIT(x) (UNION_READ(hw_ftm_cntin_t, HW_FTM_CNTIN_ADDR(x), U, B.INIT)) /*! @brief Format value for bitfield FTM_CNTIN_INIT. */ #define BF_FTM_CNTIN_INIT(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CNTIN_INIT) & BM_FTM_CNTIN_INIT) @@ -844,8 +851,8 @@ #define HW_FTM_STATUS_ADDR(x) ((x) + 0x50U) #define HW_FTM_STATUS(x) (*(__IO hw_ftm_status_t *) HW_FTM_STATUS_ADDR(x)) -#define HW_FTM_STATUS_RD(x) (HW_FTM_STATUS(x).U) -#define HW_FTM_STATUS_WR(x, v) (HW_FTM_STATUS(x).U = (v)) +#define HW_FTM_STATUS_RD(x) (ADDRESS_READ(hw_ftm_status_t, HW_FTM_STATUS_ADDR(x))) +#define HW_FTM_STATUS_WR(x, v) (ADDRESS_WRITE(hw_ftm_status_t, HW_FTM_STATUS_ADDR(x), v)) #define HW_FTM_STATUS_SET(x, v) (HW_FTM_STATUS_WR(x, HW_FTM_STATUS_RD(x) | (v))) #define HW_FTM_STATUS_CLR(x, v) (HW_FTM_STATUS_WR(x, HW_FTM_STATUS_RD(x) & ~(v))) #define HW_FTM_STATUS_TOG(x, v) (HW_FTM_STATUS_WR(x, HW_FTM_STATUS_RD(x) ^ (v))) @@ -870,13 +877,13 @@ #define BS_FTM_STATUS_CH0F (1U) /*!< Bit field size in bits for FTM_STATUS_CH0F. */ /*! @brief Read current value of the FTM_STATUS_CH0F field. */ -#define BR_FTM_STATUS_CH0F(x) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH0F)) +#define BR_FTM_STATUS_CH0F(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH0F))) /*! @brief Format value for bitfield FTM_STATUS_CH0F. */ #define BF_FTM_STATUS_CH0F(v) ((uint32_t)((uint32_t)(v) << BP_FTM_STATUS_CH0F) & BM_FTM_STATUS_CH0F) /*! @brief Set the CH0F field to a new value. */ -#define BW_FTM_STATUS_CH0F(x, v) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH0F) = (v)) +#define BW_FTM_STATUS_CH0F(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH0F), v)) /*@}*/ /*! @@ -894,13 +901,13 @@ #define BS_FTM_STATUS_CH1F (1U) /*!< Bit field size in bits for FTM_STATUS_CH1F. */ /*! @brief Read current value of the FTM_STATUS_CH1F field. */ -#define BR_FTM_STATUS_CH1F(x) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH1F)) +#define BR_FTM_STATUS_CH1F(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH1F))) /*! @brief Format value for bitfield FTM_STATUS_CH1F. */ #define BF_FTM_STATUS_CH1F(v) ((uint32_t)((uint32_t)(v) << BP_FTM_STATUS_CH1F) & BM_FTM_STATUS_CH1F) /*! @brief Set the CH1F field to a new value. */ -#define BW_FTM_STATUS_CH1F(x, v) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH1F) = (v)) +#define BW_FTM_STATUS_CH1F(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH1F), v)) /*@}*/ /*! @@ -918,13 +925,13 @@ #define BS_FTM_STATUS_CH2F (1U) /*!< Bit field size in bits for FTM_STATUS_CH2F. */ /*! @brief Read current value of the FTM_STATUS_CH2F field. */ -#define BR_FTM_STATUS_CH2F(x) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH2F)) +#define BR_FTM_STATUS_CH2F(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH2F))) /*! @brief Format value for bitfield FTM_STATUS_CH2F. */ #define BF_FTM_STATUS_CH2F(v) ((uint32_t)((uint32_t)(v) << BP_FTM_STATUS_CH2F) & BM_FTM_STATUS_CH2F) /*! @brief Set the CH2F field to a new value. */ -#define BW_FTM_STATUS_CH2F(x, v) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH2F) = (v)) +#define BW_FTM_STATUS_CH2F(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH2F), v)) /*@}*/ /*! @@ -942,13 +949,13 @@ #define BS_FTM_STATUS_CH3F (1U) /*!< Bit field size in bits for FTM_STATUS_CH3F. */ /*! @brief Read current value of the FTM_STATUS_CH3F field. */ -#define BR_FTM_STATUS_CH3F(x) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH3F)) +#define BR_FTM_STATUS_CH3F(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH3F))) /*! @brief Format value for bitfield FTM_STATUS_CH3F. */ #define BF_FTM_STATUS_CH3F(v) ((uint32_t)((uint32_t)(v) << BP_FTM_STATUS_CH3F) & BM_FTM_STATUS_CH3F) /*! @brief Set the CH3F field to a new value. */ -#define BW_FTM_STATUS_CH3F(x, v) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH3F) = (v)) +#define BW_FTM_STATUS_CH3F(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH3F), v)) /*@}*/ /*! @@ -966,13 +973,13 @@ #define BS_FTM_STATUS_CH4F (1U) /*!< Bit field size in bits for FTM_STATUS_CH4F. */ /*! @brief Read current value of the FTM_STATUS_CH4F field. */ -#define BR_FTM_STATUS_CH4F(x) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH4F)) +#define BR_FTM_STATUS_CH4F(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH4F))) /*! @brief Format value for bitfield FTM_STATUS_CH4F. */ #define BF_FTM_STATUS_CH4F(v) ((uint32_t)((uint32_t)(v) << BP_FTM_STATUS_CH4F) & BM_FTM_STATUS_CH4F) /*! @brief Set the CH4F field to a new value. */ -#define BW_FTM_STATUS_CH4F(x, v) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH4F) = (v)) +#define BW_FTM_STATUS_CH4F(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH4F), v)) /*@}*/ /*! @@ -990,13 +997,13 @@ #define BS_FTM_STATUS_CH5F (1U) /*!< Bit field size in bits for FTM_STATUS_CH5F. */ /*! @brief Read current value of the FTM_STATUS_CH5F field. */ -#define BR_FTM_STATUS_CH5F(x) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH5F)) +#define BR_FTM_STATUS_CH5F(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH5F))) /*! @brief Format value for bitfield FTM_STATUS_CH5F. */ #define BF_FTM_STATUS_CH5F(v) ((uint32_t)((uint32_t)(v) << BP_FTM_STATUS_CH5F) & BM_FTM_STATUS_CH5F) /*! @brief Set the CH5F field to a new value. */ -#define BW_FTM_STATUS_CH5F(x, v) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH5F) = (v)) +#define BW_FTM_STATUS_CH5F(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH5F), v)) /*@}*/ /*! @@ -1014,13 +1021,13 @@ #define BS_FTM_STATUS_CH6F (1U) /*!< Bit field size in bits for FTM_STATUS_CH6F. */ /*! @brief Read current value of the FTM_STATUS_CH6F field. */ -#define BR_FTM_STATUS_CH6F(x) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH6F)) +#define BR_FTM_STATUS_CH6F(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH6F))) /*! @brief Format value for bitfield FTM_STATUS_CH6F. */ #define BF_FTM_STATUS_CH6F(v) ((uint32_t)((uint32_t)(v) << BP_FTM_STATUS_CH6F) & BM_FTM_STATUS_CH6F) /*! @brief Set the CH6F field to a new value. */ -#define BW_FTM_STATUS_CH6F(x, v) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH6F) = (v)) +#define BW_FTM_STATUS_CH6F(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH6F), v)) /*@}*/ /*! @@ -1038,13 +1045,13 @@ #define BS_FTM_STATUS_CH7F (1U) /*!< Bit field size in bits for FTM_STATUS_CH7F. */ /*! @brief Read current value of the FTM_STATUS_CH7F field. */ -#define BR_FTM_STATUS_CH7F(x) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH7F)) +#define BR_FTM_STATUS_CH7F(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH7F))) /*! @brief Format value for bitfield FTM_STATUS_CH7F. */ #define BF_FTM_STATUS_CH7F(v) ((uint32_t)((uint32_t)(v) << BP_FTM_STATUS_CH7F) & BM_FTM_STATUS_CH7F) /*! @brief Set the CH7F field to a new value. */ -#define BW_FTM_STATUS_CH7F(x, v) (BITBAND_ACCESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH7F) = (v)) +#define BW_FTM_STATUS_CH7F(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_STATUS_ADDR(x), BP_FTM_STATUS_CH7F), v)) /*@}*/ /******************************************************************************* @@ -1084,8 +1091,8 @@ #define HW_FTM_MODE_ADDR(x) ((x) + 0x54U) #define HW_FTM_MODE(x) (*(__IO hw_ftm_mode_t *) HW_FTM_MODE_ADDR(x)) -#define HW_FTM_MODE_RD(x) (HW_FTM_MODE(x).U) -#define HW_FTM_MODE_WR(x, v) (HW_FTM_MODE(x).U = (v)) +#define HW_FTM_MODE_RD(x) (ADDRESS_READ(hw_ftm_mode_t, HW_FTM_MODE_ADDR(x))) +#define HW_FTM_MODE_WR(x, v) (ADDRESS_WRITE(hw_ftm_mode_t, HW_FTM_MODE_ADDR(x), v)) #define HW_FTM_MODE_SET(x, v) (HW_FTM_MODE_WR(x, HW_FTM_MODE_RD(x) | (v))) #define HW_FTM_MODE_CLR(x, v) (HW_FTM_MODE_WR(x, HW_FTM_MODE_RD(x) & ~(v))) #define HW_FTM_MODE_TOG(x, v) (HW_FTM_MODE_WR(x, HW_FTM_MODE_RD(x) ^ (v))) @@ -1112,13 +1119,13 @@ #define BS_FTM_MODE_FTMEN (1U) /*!< Bit field size in bits for FTM_MODE_FTMEN. */ /*! @brief Read current value of the FTM_MODE_FTMEN field. */ -#define BR_FTM_MODE_FTMEN(x) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_FTMEN)) +#define BR_FTM_MODE_FTMEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_FTMEN))) /*! @brief Format value for bitfield FTM_MODE_FTMEN. */ #define BF_FTM_MODE_FTMEN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_MODE_FTMEN) & BM_FTM_MODE_FTMEN) /*! @brief Set the FTMEN field to a new value. */ -#define BW_FTM_MODE_FTMEN(x, v) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_FTMEN) = (v)) +#define BW_FTM_MODE_FTMEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_FTMEN), v)) /*@}*/ /*! @@ -1134,13 +1141,13 @@ #define BS_FTM_MODE_INIT (1U) /*!< Bit field size in bits for FTM_MODE_INIT. */ /*! @brief Read current value of the FTM_MODE_INIT field. */ -#define BR_FTM_MODE_INIT(x) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_INIT)) +#define BR_FTM_MODE_INIT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_INIT))) /*! @brief Format value for bitfield FTM_MODE_INIT. */ #define BF_FTM_MODE_INIT(v) ((uint32_t)((uint32_t)(v) << BP_FTM_MODE_INIT) & BM_FTM_MODE_INIT) /*! @brief Set the INIT field to a new value. */ -#define BW_FTM_MODE_INIT(x, v) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_INIT) = (v)) +#define BW_FTM_MODE_INIT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_INIT), v)) /*@}*/ /*! @@ -1162,13 +1169,13 @@ #define BS_FTM_MODE_WPDIS (1U) /*!< Bit field size in bits for FTM_MODE_WPDIS. */ /*! @brief Read current value of the FTM_MODE_WPDIS field. */ -#define BR_FTM_MODE_WPDIS(x) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_WPDIS)) +#define BR_FTM_MODE_WPDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_WPDIS))) /*! @brief Format value for bitfield FTM_MODE_WPDIS. */ #define BF_FTM_MODE_WPDIS(v) ((uint32_t)((uint32_t)(v) << BP_FTM_MODE_WPDIS) & BM_FTM_MODE_WPDIS) /*! @brief Set the WPDIS field to a new value. */ -#define BW_FTM_MODE_WPDIS(x, v) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_WPDIS) = (v)) +#define BW_FTM_MODE_WPDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_WPDIS), v)) /*@}*/ /*! @@ -1191,13 +1198,13 @@ #define BS_FTM_MODE_PWMSYNC (1U) /*!< Bit field size in bits for FTM_MODE_PWMSYNC. */ /*! @brief Read current value of the FTM_MODE_PWMSYNC field. */ -#define BR_FTM_MODE_PWMSYNC(x) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_PWMSYNC)) +#define BR_FTM_MODE_PWMSYNC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_PWMSYNC))) /*! @brief Format value for bitfield FTM_MODE_PWMSYNC. */ #define BF_FTM_MODE_PWMSYNC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_MODE_PWMSYNC) & BM_FTM_MODE_PWMSYNC) /*! @brief Set the PWMSYNC field to a new value. */ -#define BW_FTM_MODE_PWMSYNC(x, v) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_PWMSYNC) = (v)) +#define BW_FTM_MODE_PWMSYNC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_PWMSYNC), v)) /*@}*/ /*! @@ -1216,13 +1223,13 @@ #define BS_FTM_MODE_CAPTEST (1U) /*!< Bit field size in bits for FTM_MODE_CAPTEST. */ /*! @brief Read current value of the FTM_MODE_CAPTEST field. */ -#define BR_FTM_MODE_CAPTEST(x) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_CAPTEST)) +#define BR_FTM_MODE_CAPTEST(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_CAPTEST))) /*! @brief Format value for bitfield FTM_MODE_CAPTEST. */ #define BF_FTM_MODE_CAPTEST(v) ((uint32_t)((uint32_t)(v) << BP_FTM_MODE_CAPTEST) & BM_FTM_MODE_CAPTEST) /*! @brief Set the CAPTEST field to a new value. */ -#define BW_FTM_MODE_CAPTEST(x, v) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_CAPTEST) = (v)) +#define BW_FTM_MODE_CAPTEST(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_CAPTEST), v)) /*@}*/ /*! @@ -1246,7 +1253,7 @@ #define BS_FTM_MODE_FAULTM (2U) /*!< Bit field size in bits for FTM_MODE_FAULTM. */ /*! @brief Read current value of the FTM_MODE_FAULTM field. */ -#define BR_FTM_MODE_FAULTM(x) (HW_FTM_MODE(x).B.FAULTM) +#define BR_FTM_MODE_FAULTM(x) (UNION_READ(hw_ftm_mode_t, HW_FTM_MODE_ADDR(x), U, B.FAULTM)) /*! @brief Format value for bitfield FTM_MODE_FAULTM. */ #define BF_FTM_MODE_FAULTM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_MODE_FAULTM) & BM_FTM_MODE_FAULTM) @@ -1271,13 +1278,13 @@ #define BS_FTM_MODE_FAULTIE (1U) /*!< Bit field size in bits for FTM_MODE_FAULTIE. */ /*! @brief Read current value of the FTM_MODE_FAULTIE field. */ -#define BR_FTM_MODE_FAULTIE(x) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_FAULTIE)) +#define BR_FTM_MODE_FAULTIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_FAULTIE))) /*! @brief Format value for bitfield FTM_MODE_FAULTIE. */ #define BF_FTM_MODE_FAULTIE(v) ((uint32_t)((uint32_t)(v) << BP_FTM_MODE_FAULTIE) & BM_FTM_MODE_FAULTIE) /*! @brief Set the FAULTIE field to a new value. */ -#define BW_FTM_MODE_FAULTIE(x, v) (BITBAND_ACCESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_FAULTIE) = (v)) +#define BW_FTM_MODE_FAULTIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_MODE_ADDR(x), BP_FTM_MODE_FAULTIE), v)) /*@}*/ /******************************************************************************* @@ -1328,8 +1335,8 @@ #define HW_FTM_SYNC_ADDR(x) ((x) + 0x58U) #define HW_FTM_SYNC(x) (*(__IO hw_ftm_sync_t *) HW_FTM_SYNC_ADDR(x)) -#define HW_FTM_SYNC_RD(x) (HW_FTM_SYNC(x).U) -#define HW_FTM_SYNC_WR(x, v) (HW_FTM_SYNC(x).U = (v)) +#define HW_FTM_SYNC_RD(x) (ADDRESS_READ(hw_ftm_sync_t, HW_FTM_SYNC_ADDR(x))) +#define HW_FTM_SYNC_WR(x, v) (ADDRESS_WRITE(hw_ftm_sync_t, HW_FTM_SYNC_ADDR(x), v)) #define HW_FTM_SYNC_SET(x, v) (HW_FTM_SYNC_WR(x, HW_FTM_SYNC_RD(x) | (v))) #define HW_FTM_SYNC_CLR(x, v) (HW_FTM_SYNC_WR(x, HW_FTM_SYNC_RD(x) & ~(v))) #define HW_FTM_SYNC_TOG(x, v) (HW_FTM_SYNC_WR(x, HW_FTM_SYNC_RD(x) ^ (v))) @@ -1356,13 +1363,13 @@ #define BS_FTM_SYNC_CNTMIN (1U) /*!< Bit field size in bits for FTM_SYNC_CNTMIN. */ /*! @brief Read current value of the FTM_SYNC_CNTMIN field. */ -#define BR_FTM_SYNC_CNTMIN(x) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_CNTMIN)) +#define BR_FTM_SYNC_CNTMIN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_CNTMIN))) /*! @brief Format value for bitfield FTM_SYNC_CNTMIN. */ #define BF_FTM_SYNC_CNTMIN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNC_CNTMIN) & BM_FTM_SYNC_CNTMIN) /*! @brief Set the CNTMIN field to a new value. */ -#define BW_FTM_SYNC_CNTMIN(x, v) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_CNTMIN) = (v)) +#define BW_FTM_SYNC_CNTMIN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_CNTMIN), v)) /*@}*/ /*! @@ -1382,13 +1389,13 @@ #define BS_FTM_SYNC_CNTMAX (1U) /*!< Bit field size in bits for FTM_SYNC_CNTMAX. */ /*! @brief Read current value of the FTM_SYNC_CNTMAX field. */ -#define BR_FTM_SYNC_CNTMAX(x) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_CNTMAX)) +#define BR_FTM_SYNC_CNTMAX(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_CNTMAX))) /*! @brief Format value for bitfield FTM_SYNC_CNTMAX. */ #define BF_FTM_SYNC_CNTMAX(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNC_CNTMAX) & BM_FTM_SYNC_CNTMAX) /*! @brief Set the CNTMAX field to a new value. */ -#define BW_FTM_SYNC_CNTMAX(x, v) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_CNTMAX) = (v)) +#define BW_FTM_SYNC_CNTMAX(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_CNTMAX), v)) /*@}*/ /*! @@ -1409,13 +1416,13 @@ #define BS_FTM_SYNC_REINIT (1U) /*!< Bit field size in bits for FTM_SYNC_REINIT. */ /*! @brief Read current value of the FTM_SYNC_REINIT field. */ -#define BR_FTM_SYNC_REINIT(x) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_REINIT)) +#define BR_FTM_SYNC_REINIT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_REINIT))) /*! @brief Format value for bitfield FTM_SYNC_REINIT. */ #define BF_FTM_SYNC_REINIT(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNC_REINIT) & BM_FTM_SYNC_REINIT) /*! @brief Set the REINIT field to a new value. */ -#define BW_FTM_SYNC_REINIT(x, v) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_REINIT) = (v)) +#define BW_FTM_SYNC_REINIT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_REINIT), v)) /*@}*/ /*! @@ -1435,13 +1442,13 @@ #define BS_FTM_SYNC_SYNCHOM (1U) /*!< Bit field size in bits for FTM_SYNC_SYNCHOM. */ /*! @brief Read current value of the FTM_SYNC_SYNCHOM field. */ -#define BR_FTM_SYNC_SYNCHOM(x) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_SYNCHOM)) +#define BR_FTM_SYNC_SYNCHOM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_SYNCHOM))) /*! @brief Format value for bitfield FTM_SYNC_SYNCHOM. */ #define BF_FTM_SYNC_SYNCHOM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNC_SYNCHOM) & BM_FTM_SYNC_SYNCHOM) /*! @brief Set the SYNCHOM field to a new value. */ -#define BW_FTM_SYNC_SYNCHOM(x, v) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_SYNCHOM) = (v)) +#define BW_FTM_SYNC_SYNCHOM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_SYNCHOM), v)) /*@}*/ /*! @@ -1460,13 +1467,13 @@ #define BS_FTM_SYNC_TRIG0 (1U) /*!< Bit field size in bits for FTM_SYNC_TRIG0. */ /*! @brief Read current value of the FTM_SYNC_TRIG0 field. */ -#define BR_FTM_SYNC_TRIG0(x) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG0)) +#define BR_FTM_SYNC_TRIG0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG0))) /*! @brief Format value for bitfield FTM_SYNC_TRIG0. */ #define BF_FTM_SYNC_TRIG0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNC_TRIG0) & BM_FTM_SYNC_TRIG0) /*! @brief Set the TRIG0 field to a new value. */ -#define BW_FTM_SYNC_TRIG0(x, v) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG0) = (v)) +#define BW_FTM_SYNC_TRIG0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG0), v)) /*@}*/ /*! @@ -1485,13 +1492,13 @@ #define BS_FTM_SYNC_TRIG1 (1U) /*!< Bit field size in bits for FTM_SYNC_TRIG1. */ /*! @brief Read current value of the FTM_SYNC_TRIG1 field. */ -#define BR_FTM_SYNC_TRIG1(x) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG1)) +#define BR_FTM_SYNC_TRIG1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG1))) /*! @brief Format value for bitfield FTM_SYNC_TRIG1. */ #define BF_FTM_SYNC_TRIG1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNC_TRIG1) & BM_FTM_SYNC_TRIG1) /*! @brief Set the TRIG1 field to a new value. */ -#define BW_FTM_SYNC_TRIG1(x, v) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG1) = (v)) +#define BW_FTM_SYNC_TRIG1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG1), v)) /*@}*/ /*! @@ -1510,13 +1517,13 @@ #define BS_FTM_SYNC_TRIG2 (1U) /*!< Bit field size in bits for FTM_SYNC_TRIG2. */ /*! @brief Read current value of the FTM_SYNC_TRIG2 field. */ -#define BR_FTM_SYNC_TRIG2(x) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG2)) +#define BR_FTM_SYNC_TRIG2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG2))) /*! @brief Format value for bitfield FTM_SYNC_TRIG2. */ #define BF_FTM_SYNC_TRIG2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNC_TRIG2) & BM_FTM_SYNC_TRIG2) /*! @brief Set the TRIG2 field to a new value. */ -#define BW_FTM_SYNC_TRIG2(x, v) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG2) = (v)) +#define BW_FTM_SYNC_TRIG2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_TRIG2), v)) /*@}*/ /*! @@ -1535,13 +1542,13 @@ #define BS_FTM_SYNC_SWSYNC (1U) /*!< Bit field size in bits for FTM_SYNC_SWSYNC. */ /*! @brief Read current value of the FTM_SYNC_SWSYNC field. */ -#define BR_FTM_SYNC_SWSYNC(x) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_SWSYNC)) +#define BR_FTM_SYNC_SWSYNC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_SWSYNC))) /*! @brief Format value for bitfield FTM_SYNC_SWSYNC. */ #define BF_FTM_SYNC_SWSYNC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNC_SWSYNC) & BM_FTM_SYNC_SWSYNC) /*! @brief Set the SWSYNC field to a new value. */ -#define BW_FTM_SYNC_SWSYNC(x, v) (BITBAND_ACCESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_SWSYNC) = (v)) +#define BW_FTM_SYNC_SWSYNC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNC_ADDR(x), BP_FTM_SYNC_SWSYNC), v)) /*@}*/ /******************************************************************************* @@ -1577,8 +1584,8 @@ #define HW_FTM_OUTINIT_ADDR(x) ((x) + 0x5CU) #define HW_FTM_OUTINIT(x) (*(__IO hw_ftm_outinit_t *) HW_FTM_OUTINIT_ADDR(x)) -#define HW_FTM_OUTINIT_RD(x) (HW_FTM_OUTINIT(x).U) -#define HW_FTM_OUTINIT_WR(x, v) (HW_FTM_OUTINIT(x).U = (v)) +#define HW_FTM_OUTINIT_RD(x) (ADDRESS_READ(hw_ftm_outinit_t, HW_FTM_OUTINIT_ADDR(x))) +#define HW_FTM_OUTINIT_WR(x, v) (ADDRESS_WRITE(hw_ftm_outinit_t, HW_FTM_OUTINIT_ADDR(x), v)) #define HW_FTM_OUTINIT_SET(x, v) (HW_FTM_OUTINIT_WR(x, HW_FTM_OUTINIT_RD(x) | (v))) #define HW_FTM_OUTINIT_CLR(x, v) (HW_FTM_OUTINIT_WR(x, HW_FTM_OUTINIT_RD(x) & ~(v))) #define HW_FTM_OUTINIT_TOG(x, v) (HW_FTM_OUTINIT_WR(x, HW_FTM_OUTINIT_RD(x) ^ (v))) @@ -1604,13 +1611,13 @@ #define BS_FTM_OUTINIT_CH0OI (1U) /*!< Bit field size in bits for FTM_OUTINIT_CH0OI. */ /*! @brief Read current value of the FTM_OUTINIT_CH0OI field. */ -#define BR_FTM_OUTINIT_CH0OI(x) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH0OI)) +#define BR_FTM_OUTINIT_CH0OI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH0OI))) /*! @brief Format value for bitfield FTM_OUTINIT_CH0OI. */ #define BF_FTM_OUTINIT_CH0OI(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTINIT_CH0OI) & BM_FTM_OUTINIT_CH0OI) /*! @brief Set the CH0OI field to a new value. */ -#define BW_FTM_OUTINIT_CH0OI(x, v) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH0OI) = (v)) +#define BW_FTM_OUTINIT_CH0OI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH0OI), v)) /*@}*/ /*! @@ -1629,13 +1636,13 @@ #define BS_FTM_OUTINIT_CH1OI (1U) /*!< Bit field size in bits for FTM_OUTINIT_CH1OI. */ /*! @brief Read current value of the FTM_OUTINIT_CH1OI field. */ -#define BR_FTM_OUTINIT_CH1OI(x) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH1OI)) +#define BR_FTM_OUTINIT_CH1OI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH1OI))) /*! @brief Format value for bitfield FTM_OUTINIT_CH1OI. */ #define BF_FTM_OUTINIT_CH1OI(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTINIT_CH1OI) & BM_FTM_OUTINIT_CH1OI) /*! @brief Set the CH1OI field to a new value. */ -#define BW_FTM_OUTINIT_CH1OI(x, v) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH1OI) = (v)) +#define BW_FTM_OUTINIT_CH1OI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH1OI), v)) /*@}*/ /*! @@ -1654,13 +1661,13 @@ #define BS_FTM_OUTINIT_CH2OI (1U) /*!< Bit field size in bits for FTM_OUTINIT_CH2OI. */ /*! @brief Read current value of the FTM_OUTINIT_CH2OI field. */ -#define BR_FTM_OUTINIT_CH2OI(x) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH2OI)) +#define BR_FTM_OUTINIT_CH2OI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH2OI))) /*! @brief Format value for bitfield FTM_OUTINIT_CH2OI. */ #define BF_FTM_OUTINIT_CH2OI(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTINIT_CH2OI) & BM_FTM_OUTINIT_CH2OI) /*! @brief Set the CH2OI field to a new value. */ -#define BW_FTM_OUTINIT_CH2OI(x, v) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH2OI) = (v)) +#define BW_FTM_OUTINIT_CH2OI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH2OI), v)) /*@}*/ /*! @@ -1679,13 +1686,13 @@ #define BS_FTM_OUTINIT_CH3OI (1U) /*!< Bit field size in bits for FTM_OUTINIT_CH3OI. */ /*! @brief Read current value of the FTM_OUTINIT_CH3OI field. */ -#define BR_FTM_OUTINIT_CH3OI(x) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH3OI)) +#define BR_FTM_OUTINIT_CH3OI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH3OI))) /*! @brief Format value for bitfield FTM_OUTINIT_CH3OI. */ #define BF_FTM_OUTINIT_CH3OI(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTINIT_CH3OI) & BM_FTM_OUTINIT_CH3OI) /*! @brief Set the CH3OI field to a new value. */ -#define BW_FTM_OUTINIT_CH3OI(x, v) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH3OI) = (v)) +#define BW_FTM_OUTINIT_CH3OI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH3OI), v)) /*@}*/ /*! @@ -1704,13 +1711,13 @@ #define BS_FTM_OUTINIT_CH4OI (1U) /*!< Bit field size in bits for FTM_OUTINIT_CH4OI. */ /*! @brief Read current value of the FTM_OUTINIT_CH4OI field. */ -#define BR_FTM_OUTINIT_CH4OI(x) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH4OI)) +#define BR_FTM_OUTINIT_CH4OI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH4OI))) /*! @brief Format value for bitfield FTM_OUTINIT_CH4OI. */ #define BF_FTM_OUTINIT_CH4OI(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTINIT_CH4OI) & BM_FTM_OUTINIT_CH4OI) /*! @brief Set the CH4OI field to a new value. */ -#define BW_FTM_OUTINIT_CH4OI(x, v) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH4OI) = (v)) +#define BW_FTM_OUTINIT_CH4OI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH4OI), v)) /*@}*/ /*! @@ -1729,13 +1736,13 @@ #define BS_FTM_OUTINIT_CH5OI (1U) /*!< Bit field size in bits for FTM_OUTINIT_CH5OI. */ /*! @brief Read current value of the FTM_OUTINIT_CH5OI field. */ -#define BR_FTM_OUTINIT_CH5OI(x) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH5OI)) +#define BR_FTM_OUTINIT_CH5OI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH5OI))) /*! @brief Format value for bitfield FTM_OUTINIT_CH5OI. */ #define BF_FTM_OUTINIT_CH5OI(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTINIT_CH5OI) & BM_FTM_OUTINIT_CH5OI) /*! @brief Set the CH5OI field to a new value. */ -#define BW_FTM_OUTINIT_CH5OI(x, v) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH5OI) = (v)) +#define BW_FTM_OUTINIT_CH5OI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH5OI), v)) /*@}*/ /*! @@ -1754,13 +1761,13 @@ #define BS_FTM_OUTINIT_CH6OI (1U) /*!< Bit field size in bits for FTM_OUTINIT_CH6OI. */ /*! @brief Read current value of the FTM_OUTINIT_CH6OI field. */ -#define BR_FTM_OUTINIT_CH6OI(x) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH6OI)) +#define BR_FTM_OUTINIT_CH6OI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH6OI))) /*! @brief Format value for bitfield FTM_OUTINIT_CH6OI. */ #define BF_FTM_OUTINIT_CH6OI(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTINIT_CH6OI) & BM_FTM_OUTINIT_CH6OI) /*! @brief Set the CH6OI field to a new value. */ -#define BW_FTM_OUTINIT_CH6OI(x, v) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH6OI) = (v)) +#define BW_FTM_OUTINIT_CH6OI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH6OI), v)) /*@}*/ /*! @@ -1779,13 +1786,13 @@ #define BS_FTM_OUTINIT_CH7OI (1U) /*!< Bit field size in bits for FTM_OUTINIT_CH7OI. */ /*! @brief Read current value of the FTM_OUTINIT_CH7OI field. */ -#define BR_FTM_OUTINIT_CH7OI(x) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH7OI)) +#define BR_FTM_OUTINIT_CH7OI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH7OI))) /*! @brief Format value for bitfield FTM_OUTINIT_CH7OI. */ #define BF_FTM_OUTINIT_CH7OI(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTINIT_CH7OI) & BM_FTM_OUTINIT_CH7OI) /*! @brief Set the CH7OI field to a new value. */ -#define BW_FTM_OUTINIT_CH7OI(x, v) (BITBAND_ACCESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH7OI) = (v)) +#define BW_FTM_OUTINIT_CH7OI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTINIT_ADDR(x), BP_FTM_OUTINIT_CH7OI), v)) /*@}*/ /******************************************************************************* @@ -1829,8 +1836,8 @@ #define HW_FTM_OUTMASK_ADDR(x) ((x) + 0x60U) #define HW_FTM_OUTMASK(x) (*(__IO hw_ftm_outmask_t *) HW_FTM_OUTMASK_ADDR(x)) -#define HW_FTM_OUTMASK_RD(x) (HW_FTM_OUTMASK(x).U) -#define HW_FTM_OUTMASK_WR(x, v) (HW_FTM_OUTMASK(x).U = (v)) +#define HW_FTM_OUTMASK_RD(x) (ADDRESS_READ(hw_ftm_outmask_t, HW_FTM_OUTMASK_ADDR(x))) +#define HW_FTM_OUTMASK_WR(x, v) (ADDRESS_WRITE(hw_ftm_outmask_t, HW_FTM_OUTMASK_ADDR(x), v)) #define HW_FTM_OUTMASK_SET(x, v) (HW_FTM_OUTMASK_WR(x, HW_FTM_OUTMASK_RD(x) | (v))) #define HW_FTM_OUTMASK_CLR(x, v) (HW_FTM_OUTMASK_WR(x, HW_FTM_OUTMASK_RD(x) & ~(v))) #define HW_FTM_OUTMASK_TOG(x, v) (HW_FTM_OUTMASK_WR(x, HW_FTM_OUTMASK_RD(x) ^ (v))) @@ -1855,13 +1862,13 @@ #define BS_FTM_OUTMASK_CH0OM (1U) /*!< Bit field size in bits for FTM_OUTMASK_CH0OM. */ /*! @brief Read current value of the FTM_OUTMASK_CH0OM field. */ -#define BR_FTM_OUTMASK_CH0OM(x) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH0OM)) +#define BR_FTM_OUTMASK_CH0OM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH0OM))) /*! @brief Format value for bitfield FTM_OUTMASK_CH0OM. */ #define BF_FTM_OUTMASK_CH0OM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTMASK_CH0OM) & BM_FTM_OUTMASK_CH0OM) /*! @brief Set the CH0OM field to a new value. */ -#define BW_FTM_OUTMASK_CH0OM(x, v) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH0OM) = (v)) +#define BW_FTM_OUTMASK_CH0OM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH0OM), v)) /*@}*/ /*! @@ -1879,13 +1886,13 @@ #define BS_FTM_OUTMASK_CH1OM (1U) /*!< Bit field size in bits for FTM_OUTMASK_CH1OM. */ /*! @brief Read current value of the FTM_OUTMASK_CH1OM field. */ -#define BR_FTM_OUTMASK_CH1OM(x) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH1OM)) +#define BR_FTM_OUTMASK_CH1OM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH1OM))) /*! @brief Format value for bitfield FTM_OUTMASK_CH1OM. */ #define BF_FTM_OUTMASK_CH1OM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTMASK_CH1OM) & BM_FTM_OUTMASK_CH1OM) /*! @brief Set the CH1OM field to a new value. */ -#define BW_FTM_OUTMASK_CH1OM(x, v) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH1OM) = (v)) +#define BW_FTM_OUTMASK_CH1OM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH1OM), v)) /*@}*/ /*! @@ -1903,13 +1910,13 @@ #define BS_FTM_OUTMASK_CH2OM (1U) /*!< Bit field size in bits for FTM_OUTMASK_CH2OM. */ /*! @brief Read current value of the FTM_OUTMASK_CH2OM field. */ -#define BR_FTM_OUTMASK_CH2OM(x) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH2OM)) +#define BR_FTM_OUTMASK_CH2OM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH2OM))) /*! @brief Format value for bitfield FTM_OUTMASK_CH2OM. */ #define BF_FTM_OUTMASK_CH2OM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTMASK_CH2OM) & BM_FTM_OUTMASK_CH2OM) /*! @brief Set the CH2OM field to a new value. */ -#define BW_FTM_OUTMASK_CH2OM(x, v) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH2OM) = (v)) +#define BW_FTM_OUTMASK_CH2OM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH2OM), v)) /*@}*/ /*! @@ -1927,13 +1934,13 @@ #define BS_FTM_OUTMASK_CH3OM (1U) /*!< Bit field size in bits for FTM_OUTMASK_CH3OM. */ /*! @brief Read current value of the FTM_OUTMASK_CH3OM field. */ -#define BR_FTM_OUTMASK_CH3OM(x) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH3OM)) +#define BR_FTM_OUTMASK_CH3OM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH3OM))) /*! @brief Format value for bitfield FTM_OUTMASK_CH3OM. */ #define BF_FTM_OUTMASK_CH3OM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTMASK_CH3OM) & BM_FTM_OUTMASK_CH3OM) /*! @brief Set the CH3OM field to a new value. */ -#define BW_FTM_OUTMASK_CH3OM(x, v) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH3OM) = (v)) +#define BW_FTM_OUTMASK_CH3OM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH3OM), v)) /*@}*/ /*! @@ -1951,13 +1958,13 @@ #define BS_FTM_OUTMASK_CH4OM (1U) /*!< Bit field size in bits for FTM_OUTMASK_CH4OM. */ /*! @brief Read current value of the FTM_OUTMASK_CH4OM field. */ -#define BR_FTM_OUTMASK_CH4OM(x) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH4OM)) +#define BR_FTM_OUTMASK_CH4OM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH4OM))) /*! @brief Format value for bitfield FTM_OUTMASK_CH4OM. */ #define BF_FTM_OUTMASK_CH4OM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTMASK_CH4OM) & BM_FTM_OUTMASK_CH4OM) /*! @brief Set the CH4OM field to a new value. */ -#define BW_FTM_OUTMASK_CH4OM(x, v) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH4OM) = (v)) +#define BW_FTM_OUTMASK_CH4OM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH4OM), v)) /*@}*/ /*! @@ -1975,13 +1982,13 @@ #define BS_FTM_OUTMASK_CH5OM (1U) /*!< Bit field size in bits for FTM_OUTMASK_CH5OM. */ /*! @brief Read current value of the FTM_OUTMASK_CH5OM field. */ -#define BR_FTM_OUTMASK_CH5OM(x) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH5OM)) +#define BR_FTM_OUTMASK_CH5OM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH5OM))) /*! @brief Format value for bitfield FTM_OUTMASK_CH5OM. */ #define BF_FTM_OUTMASK_CH5OM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTMASK_CH5OM) & BM_FTM_OUTMASK_CH5OM) /*! @brief Set the CH5OM field to a new value. */ -#define BW_FTM_OUTMASK_CH5OM(x, v) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH5OM) = (v)) +#define BW_FTM_OUTMASK_CH5OM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH5OM), v)) /*@}*/ /*! @@ -1999,13 +2006,13 @@ #define BS_FTM_OUTMASK_CH6OM (1U) /*!< Bit field size in bits for FTM_OUTMASK_CH6OM. */ /*! @brief Read current value of the FTM_OUTMASK_CH6OM field. */ -#define BR_FTM_OUTMASK_CH6OM(x) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH6OM)) +#define BR_FTM_OUTMASK_CH6OM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH6OM))) /*! @brief Format value for bitfield FTM_OUTMASK_CH6OM. */ #define BF_FTM_OUTMASK_CH6OM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTMASK_CH6OM) & BM_FTM_OUTMASK_CH6OM) /*! @brief Set the CH6OM field to a new value. */ -#define BW_FTM_OUTMASK_CH6OM(x, v) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH6OM) = (v)) +#define BW_FTM_OUTMASK_CH6OM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH6OM), v)) /*@}*/ /*! @@ -2023,13 +2030,13 @@ #define BS_FTM_OUTMASK_CH7OM (1U) /*!< Bit field size in bits for FTM_OUTMASK_CH7OM. */ /*! @brief Read current value of the FTM_OUTMASK_CH7OM field. */ -#define BR_FTM_OUTMASK_CH7OM(x) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH7OM)) +#define BR_FTM_OUTMASK_CH7OM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH7OM))) /*! @brief Format value for bitfield FTM_OUTMASK_CH7OM. */ #define BF_FTM_OUTMASK_CH7OM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_OUTMASK_CH7OM) & BM_FTM_OUTMASK_CH7OM) /*! @brief Set the CH7OM field to a new value. */ -#define BW_FTM_OUTMASK_CH7OM(x, v) (BITBAND_ACCESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH7OM) = (v)) +#define BW_FTM_OUTMASK_CH7OM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_OUTMASK_ADDR(x), BP_FTM_OUTMASK_CH7OM), v)) /*@}*/ /******************************************************************************* @@ -2101,8 +2108,8 @@ #define HW_FTM_COMBINE_ADDR(x) ((x) + 0x64U) #define HW_FTM_COMBINE(x) (*(__IO hw_ftm_combine_t *) HW_FTM_COMBINE_ADDR(x)) -#define HW_FTM_COMBINE_RD(x) (HW_FTM_COMBINE(x).U) -#define HW_FTM_COMBINE_WR(x, v) (HW_FTM_COMBINE(x).U = (v)) +#define HW_FTM_COMBINE_RD(x) (ADDRESS_READ(hw_ftm_combine_t, HW_FTM_COMBINE_ADDR(x))) +#define HW_FTM_COMBINE_WR(x, v) (ADDRESS_WRITE(hw_ftm_combine_t, HW_FTM_COMBINE_ADDR(x), v)) #define HW_FTM_COMBINE_SET(x, v) (HW_FTM_COMBINE_WR(x, HW_FTM_COMBINE_RD(x) | (v))) #define HW_FTM_COMBINE_CLR(x, v) (HW_FTM_COMBINE_WR(x, HW_FTM_COMBINE_RD(x) & ~(v))) #define HW_FTM_COMBINE_TOG(x, v) (HW_FTM_COMBINE_WR(x, HW_FTM_COMBINE_RD(x) ^ (v))) @@ -2128,13 +2135,13 @@ #define BS_FTM_COMBINE_COMBINE0 (1U) /*!< Bit field size in bits for FTM_COMBINE_COMBINE0. */ /*! @brief Read current value of the FTM_COMBINE_COMBINE0 field. */ -#define BR_FTM_COMBINE_COMBINE0(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE0)) +#define BR_FTM_COMBINE_COMBINE0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE0))) /*! @brief Format value for bitfield FTM_COMBINE_COMBINE0. */ #define BF_FTM_COMBINE_COMBINE0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_COMBINE0) & BM_FTM_COMBINE_COMBINE0) /*! @brief Set the COMBINE0 field to a new value. */ -#define BW_FTM_COMBINE_COMBINE0(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE0) = (v)) +#define BW_FTM_COMBINE_COMBINE0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE0), v)) /*@}*/ /*! @@ -2154,13 +2161,13 @@ #define BS_FTM_COMBINE_COMP0 (1U) /*!< Bit field size in bits for FTM_COMBINE_COMP0. */ /*! @brief Read current value of the FTM_COMBINE_COMP0 field. */ -#define BR_FTM_COMBINE_COMP0(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP0)) +#define BR_FTM_COMBINE_COMP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP0))) /*! @brief Format value for bitfield FTM_COMBINE_COMP0. */ #define BF_FTM_COMBINE_COMP0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_COMP0) & BM_FTM_COMBINE_COMP0) /*! @brief Set the COMP0 field to a new value. */ -#define BW_FTM_COMBINE_COMP0(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP0) = (v)) +#define BW_FTM_COMBINE_COMP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP0), v)) /*@}*/ /*! @@ -2182,13 +2189,13 @@ #define BS_FTM_COMBINE_DECAPEN0 (1U) /*!< Bit field size in bits for FTM_COMBINE_DECAPEN0. */ /*! @brief Read current value of the FTM_COMBINE_DECAPEN0 field. */ -#define BR_FTM_COMBINE_DECAPEN0(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN0)) +#define BR_FTM_COMBINE_DECAPEN0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN0))) /*! @brief Format value for bitfield FTM_COMBINE_DECAPEN0. */ #define BF_FTM_COMBINE_DECAPEN0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DECAPEN0) & BM_FTM_COMBINE_DECAPEN0) /*! @brief Set the DECAPEN0 field to a new value. */ -#define BW_FTM_COMBINE_DECAPEN0(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN0) = (v)) +#define BW_FTM_COMBINE_DECAPEN0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN0), v)) /*@}*/ /*! @@ -2210,13 +2217,13 @@ #define BS_FTM_COMBINE_DECAP0 (1U) /*!< Bit field size in bits for FTM_COMBINE_DECAP0. */ /*! @brief Read current value of the FTM_COMBINE_DECAP0 field. */ -#define BR_FTM_COMBINE_DECAP0(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP0)) +#define BR_FTM_COMBINE_DECAP0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP0))) /*! @brief Format value for bitfield FTM_COMBINE_DECAP0. */ #define BF_FTM_COMBINE_DECAP0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DECAP0) & BM_FTM_COMBINE_DECAP0) /*! @brief Set the DECAP0 field to a new value. */ -#define BW_FTM_COMBINE_DECAP0(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP0) = (v)) +#define BW_FTM_COMBINE_DECAP0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP0), v)) /*@}*/ /*! @@ -2235,13 +2242,13 @@ #define BS_FTM_COMBINE_DTEN0 (1U) /*!< Bit field size in bits for FTM_COMBINE_DTEN0. */ /*! @brief Read current value of the FTM_COMBINE_DTEN0 field. */ -#define BR_FTM_COMBINE_DTEN0(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN0)) +#define BR_FTM_COMBINE_DTEN0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN0))) /*! @brief Format value for bitfield FTM_COMBINE_DTEN0. */ #define BF_FTM_COMBINE_DTEN0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DTEN0) & BM_FTM_COMBINE_DTEN0) /*! @brief Set the DTEN0 field to a new value. */ -#define BW_FTM_COMBINE_DTEN0(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN0) = (v)) +#define BW_FTM_COMBINE_DTEN0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN0), v)) /*@}*/ /*! @@ -2259,13 +2266,13 @@ #define BS_FTM_COMBINE_SYNCEN0 (1U) /*!< Bit field size in bits for FTM_COMBINE_SYNCEN0. */ /*! @brief Read current value of the FTM_COMBINE_SYNCEN0 field. */ -#define BR_FTM_COMBINE_SYNCEN0(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN0)) +#define BR_FTM_COMBINE_SYNCEN0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN0))) /*! @brief Format value for bitfield FTM_COMBINE_SYNCEN0. */ #define BF_FTM_COMBINE_SYNCEN0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_SYNCEN0) & BM_FTM_COMBINE_SYNCEN0) /*! @brief Set the SYNCEN0 field to a new value. */ -#define BW_FTM_COMBINE_SYNCEN0(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN0) = (v)) +#define BW_FTM_COMBINE_SYNCEN0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN0), v)) /*@}*/ /*! @@ -2284,13 +2291,13 @@ #define BS_FTM_COMBINE_FAULTEN0 (1U) /*!< Bit field size in bits for FTM_COMBINE_FAULTEN0. */ /*! @brief Read current value of the FTM_COMBINE_FAULTEN0 field. */ -#define BR_FTM_COMBINE_FAULTEN0(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN0)) +#define BR_FTM_COMBINE_FAULTEN0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN0))) /*! @brief Format value for bitfield FTM_COMBINE_FAULTEN0. */ #define BF_FTM_COMBINE_FAULTEN0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_FAULTEN0) & BM_FTM_COMBINE_FAULTEN0) /*! @brief Set the FAULTEN0 field to a new value. */ -#define BW_FTM_COMBINE_FAULTEN0(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN0) = (v)) +#define BW_FTM_COMBINE_FAULTEN0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN0), v)) /*@}*/ /*! @@ -2309,13 +2316,13 @@ #define BS_FTM_COMBINE_COMBINE1 (1U) /*!< Bit field size in bits for FTM_COMBINE_COMBINE1. */ /*! @brief Read current value of the FTM_COMBINE_COMBINE1 field. */ -#define BR_FTM_COMBINE_COMBINE1(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE1)) +#define BR_FTM_COMBINE_COMBINE1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE1))) /*! @brief Format value for bitfield FTM_COMBINE_COMBINE1. */ #define BF_FTM_COMBINE_COMBINE1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_COMBINE1) & BM_FTM_COMBINE_COMBINE1) /*! @brief Set the COMBINE1 field to a new value. */ -#define BW_FTM_COMBINE_COMBINE1(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE1) = (v)) +#define BW_FTM_COMBINE_COMBINE1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE1), v)) /*@}*/ /*! @@ -2335,13 +2342,13 @@ #define BS_FTM_COMBINE_COMP1 (1U) /*!< Bit field size in bits for FTM_COMBINE_COMP1. */ /*! @brief Read current value of the FTM_COMBINE_COMP1 field. */ -#define BR_FTM_COMBINE_COMP1(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP1)) +#define BR_FTM_COMBINE_COMP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP1))) /*! @brief Format value for bitfield FTM_COMBINE_COMP1. */ #define BF_FTM_COMBINE_COMP1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_COMP1) & BM_FTM_COMBINE_COMP1) /*! @brief Set the COMP1 field to a new value. */ -#define BW_FTM_COMBINE_COMP1(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP1) = (v)) +#define BW_FTM_COMBINE_COMP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP1), v)) /*@}*/ /*! @@ -2363,13 +2370,13 @@ #define BS_FTM_COMBINE_DECAPEN1 (1U) /*!< Bit field size in bits for FTM_COMBINE_DECAPEN1. */ /*! @brief Read current value of the FTM_COMBINE_DECAPEN1 field. */ -#define BR_FTM_COMBINE_DECAPEN1(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN1)) +#define BR_FTM_COMBINE_DECAPEN1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN1))) /*! @brief Format value for bitfield FTM_COMBINE_DECAPEN1. */ #define BF_FTM_COMBINE_DECAPEN1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DECAPEN1) & BM_FTM_COMBINE_DECAPEN1) /*! @brief Set the DECAPEN1 field to a new value. */ -#define BW_FTM_COMBINE_DECAPEN1(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN1) = (v)) +#define BW_FTM_COMBINE_DECAPEN1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN1), v)) /*@}*/ /*! @@ -2391,13 +2398,13 @@ #define BS_FTM_COMBINE_DECAP1 (1U) /*!< Bit field size in bits for FTM_COMBINE_DECAP1. */ /*! @brief Read current value of the FTM_COMBINE_DECAP1 field. */ -#define BR_FTM_COMBINE_DECAP1(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP1)) +#define BR_FTM_COMBINE_DECAP1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP1))) /*! @brief Format value for bitfield FTM_COMBINE_DECAP1. */ #define BF_FTM_COMBINE_DECAP1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DECAP1) & BM_FTM_COMBINE_DECAP1) /*! @brief Set the DECAP1 field to a new value. */ -#define BW_FTM_COMBINE_DECAP1(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP1) = (v)) +#define BW_FTM_COMBINE_DECAP1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP1), v)) /*@}*/ /*! @@ -2416,13 +2423,13 @@ #define BS_FTM_COMBINE_DTEN1 (1U) /*!< Bit field size in bits for FTM_COMBINE_DTEN1. */ /*! @brief Read current value of the FTM_COMBINE_DTEN1 field. */ -#define BR_FTM_COMBINE_DTEN1(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN1)) +#define BR_FTM_COMBINE_DTEN1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN1))) /*! @brief Format value for bitfield FTM_COMBINE_DTEN1. */ #define BF_FTM_COMBINE_DTEN1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DTEN1) & BM_FTM_COMBINE_DTEN1) /*! @brief Set the DTEN1 field to a new value. */ -#define BW_FTM_COMBINE_DTEN1(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN1) = (v)) +#define BW_FTM_COMBINE_DTEN1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN1), v)) /*@}*/ /*! @@ -2440,13 +2447,13 @@ #define BS_FTM_COMBINE_SYNCEN1 (1U) /*!< Bit field size in bits for FTM_COMBINE_SYNCEN1. */ /*! @brief Read current value of the FTM_COMBINE_SYNCEN1 field. */ -#define BR_FTM_COMBINE_SYNCEN1(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN1)) +#define BR_FTM_COMBINE_SYNCEN1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN1))) /*! @brief Format value for bitfield FTM_COMBINE_SYNCEN1. */ #define BF_FTM_COMBINE_SYNCEN1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_SYNCEN1) & BM_FTM_COMBINE_SYNCEN1) /*! @brief Set the SYNCEN1 field to a new value. */ -#define BW_FTM_COMBINE_SYNCEN1(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN1) = (v)) +#define BW_FTM_COMBINE_SYNCEN1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN1), v)) /*@}*/ /*! @@ -2465,13 +2472,13 @@ #define BS_FTM_COMBINE_FAULTEN1 (1U) /*!< Bit field size in bits for FTM_COMBINE_FAULTEN1. */ /*! @brief Read current value of the FTM_COMBINE_FAULTEN1 field. */ -#define BR_FTM_COMBINE_FAULTEN1(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN1)) +#define BR_FTM_COMBINE_FAULTEN1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN1))) /*! @brief Format value for bitfield FTM_COMBINE_FAULTEN1. */ #define BF_FTM_COMBINE_FAULTEN1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_FAULTEN1) & BM_FTM_COMBINE_FAULTEN1) /*! @brief Set the FAULTEN1 field to a new value. */ -#define BW_FTM_COMBINE_FAULTEN1(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN1) = (v)) +#define BW_FTM_COMBINE_FAULTEN1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN1), v)) /*@}*/ /*! @@ -2490,13 +2497,13 @@ #define BS_FTM_COMBINE_COMBINE2 (1U) /*!< Bit field size in bits for FTM_COMBINE_COMBINE2. */ /*! @brief Read current value of the FTM_COMBINE_COMBINE2 field. */ -#define BR_FTM_COMBINE_COMBINE2(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE2)) +#define BR_FTM_COMBINE_COMBINE2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE2))) /*! @brief Format value for bitfield FTM_COMBINE_COMBINE2. */ #define BF_FTM_COMBINE_COMBINE2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_COMBINE2) & BM_FTM_COMBINE_COMBINE2) /*! @brief Set the COMBINE2 field to a new value. */ -#define BW_FTM_COMBINE_COMBINE2(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE2) = (v)) +#define BW_FTM_COMBINE_COMBINE2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE2), v)) /*@}*/ /*! @@ -2516,13 +2523,13 @@ #define BS_FTM_COMBINE_COMP2 (1U) /*!< Bit field size in bits for FTM_COMBINE_COMP2. */ /*! @brief Read current value of the FTM_COMBINE_COMP2 field. */ -#define BR_FTM_COMBINE_COMP2(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP2)) +#define BR_FTM_COMBINE_COMP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP2))) /*! @brief Format value for bitfield FTM_COMBINE_COMP2. */ #define BF_FTM_COMBINE_COMP2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_COMP2) & BM_FTM_COMBINE_COMP2) /*! @brief Set the COMP2 field to a new value. */ -#define BW_FTM_COMBINE_COMP2(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP2) = (v)) +#define BW_FTM_COMBINE_COMP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP2), v)) /*@}*/ /*! @@ -2544,13 +2551,13 @@ #define BS_FTM_COMBINE_DECAPEN2 (1U) /*!< Bit field size in bits for FTM_COMBINE_DECAPEN2. */ /*! @brief Read current value of the FTM_COMBINE_DECAPEN2 field. */ -#define BR_FTM_COMBINE_DECAPEN2(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN2)) +#define BR_FTM_COMBINE_DECAPEN2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN2))) /*! @brief Format value for bitfield FTM_COMBINE_DECAPEN2. */ #define BF_FTM_COMBINE_DECAPEN2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DECAPEN2) & BM_FTM_COMBINE_DECAPEN2) /*! @brief Set the DECAPEN2 field to a new value. */ -#define BW_FTM_COMBINE_DECAPEN2(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN2) = (v)) +#define BW_FTM_COMBINE_DECAPEN2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN2), v)) /*@}*/ /*! @@ -2572,13 +2579,13 @@ #define BS_FTM_COMBINE_DECAP2 (1U) /*!< Bit field size in bits for FTM_COMBINE_DECAP2. */ /*! @brief Read current value of the FTM_COMBINE_DECAP2 field. */ -#define BR_FTM_COMBINE_DECAP2(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP2)) +#define BR_FTM_COMBINE_DECAP2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP2))) /*! @brief Format value for bitfield FTM_COMBINE_DECAP2. */ #define BF_FTM_COMBINE_DECAP2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DECAP2) & BM_FTM_COMBINE_DECAP2) /*! @brief Set the DECAP2 field to a new value. */ -#define BW_FTM_COMBINE_DECAP2(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP2) = (v)) +#define BW_FTM_COMBINE_DECAP2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP2), v)) /*@}*/ /*! @@ -2597,13 +2604,13 @@ #define BS_FTM_COMBINE_DTEN2 (1U) /*!< Bit field size in bits for FTM_COMBINE_DTEN2. */ /*! @brief Read current value of the FTM_COMBINE_DTEN2 field. */ -#define BR_FTM_COMBINE_DTEN2(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN2)) +#define BR_FTM_COMBINE_DTEN2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN2))) /*! @brief Format value for bitfield FTM_COMBINE_DTEN2. */ #define BF_FTM_COMBINE_DTEN2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DTEN2) & BM_FTM_COMBINE_DTEN2) /*! @brief Set the DTEN2 field to a new value. */ -#define BW_FTM_COMBINE_DTEN2(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN2) = (v)) +#define BW_FTM_COMBINE_DTEN2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN2), v)) /*@}*/ /*! @@ -2621,13 +2628,13 @@ #define BS_FTM_COMBINE_SYNCEN2 (1U) /*!< Bit field size in bits for FTM_COMBINE_SYNCEN2. */ /*! @brief Read current value of the FTM_COMBINE_SYNCEN2 field. */ -#define BR_FTM_COMBINE_SYNCEN2(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN2)) +#define BR_FTM_COMBINE_SYNCEN2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN2))) /*! @brief Format value for bitfield FTM_COMBINE_SYNCEN2. */ #define BF_FTM_COMBINE_SYNCEN2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_SYNCEN2) & BM_FTM_COMBINE_SYNCEN2) /*! @brief Set the SYNCEN2 field to a new value. */ -#define BW_FTM_COMBINE_SYNCEN2(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN2) = (v)) +#define BW_FTM_COMBINE_SYNCEN2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN2), v)) /*@}*/ /*! @@ -2646,13 +2653,13 @@ #define BS_FTM_COMBINE_FAULTEN2 (1U) /*!< Bit field size in bits for FTM_COMBINE_FAULTEN2. */ /*! @brief Read current value of the FTM_COMBINE_FAULTEN2 field. */ -#define BR_FTM_COMBINE_FAULTEN2(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN2)) +#define BR_FTM_COMBINE_FAULTEN2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN2))) /*! @brief Format value for bitfield FTM_COMBINE_FAULTEN2. */ #define BF_FTM_COMBINE_FAULTEN2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_FAULTEN2) & BM_FTM_COMBINE_FAULTEN2) /*! @brief Set the FAULTEN2 field to a new value. */ -#define BW_FTM_COMBINE_FAULTEN2(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN2) = (v)) +#define BW_FTM_COMBINE_FAULTEN2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN2), v)) /*@}*/ /*! @@ -2671,13 +2678,13 @@ #define BS_FTM_COMBINE_COMBINE3 (1U) /*!< Bit field size in bits for FTM_COMBINE_COMBINE3. */ /*! @brief Read current value of the FTM_COMBINE_COMBINE3 field. */ -#define BR_FTM_COMBINE_COMBINE3(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE3)) +#define BR_FTM_COMBINE_COMBINE3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE3))) /*! @brief Format value for bitfield FTM_COMBINE_COMBINE3. */ #define BF_FTM_COMBINE_COMBINE3(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_COMBINE3) & BM_FTM_COMBINE_COMBINE3) /*! @brief Set the COMBINE3 field to a new value. */ -#define BW_FTM_COMBINE_COMBINE3(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE3) = (v)) +#define BW_FTM_COMBINE_COMBINE3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMBINE3), v)) /*@}*/ /*! @@ -2697,13 +2704,13 @@ #define BS_FTM_COMBINE_COMP3 (1U) /*!< Bit field size in bits for FTM_COMBINE_COMP3. */ /*! @brief Read current value of the FTM_COMBINE_COMP3 field. */ -#define BR_FTM_COMBINE_COMP3(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP3)) +#define BR_FTM_COMBINE_COMP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP3))) /*! @brief Format value for bitfield FTM_COMBINE_COMP3. */ #define BF_FTM_COMBINE_COMP3(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_COMP3) & BM_FTM_COMBINE_COMP3) /*! @brief Set the COMP3 field to a new value. */ -#define BW_FTM_COMBINE_COMP3(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP3) = (v)) +#define BW_FTM_COMBINE_COMP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_COMP3), v)) /*@}*/ /*! @@ -2725,13 +2732,13 @@ #define BS_FTM_COMBINE_DECAPEN3 (1U) /*!< Bit field size in bits for FTM_COMBINE_DECAPEN3. */ /*! @brief Read current value of the FTM_COMBINE_DECAPEN3 field. */ -#define BR_FTM_COMBINE_DECAPEN3(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN3)) +#define BR_FTM_COMBINE_DECAPEN3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN3))) /*! @brief Format value for bitfield FTM_COMBINE_DECAPEN3. */ #define BF_FTM_COMBINE_DECAPEN3(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DECAPEN3) & BM_FTM_COMBINE_DECAPEN3) /*! @brief Set the DECAPEN3 field to a new value. */ -#define BW_FTM_COMBINE_DECAPEN3(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN3) = (v)) +#define BW_FTM_COMBINE_DECAPEN3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAPEN3), v)) /*@}*/ /*! @@ -2753,13 +2760,13 @@ #define BS_FTM_COMBINE_DECAP3 (1U) /*!< Bit field size in bits for FTM_COMBINE_DECAP3. */ /*! @brief Read current value of the FTM_COMBINE_DECAP3 field. */ -#define BR_FTM_COMBINE_DECAP3(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP3)) +#define BR_FTM_COMBINE_DECAP3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP3))) /*! @brief Format value for bitfield FTM_COMBINE_DECAP3. */ #define BF_FTM_COMBINE_DECAP3(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DECAP3) & BM_FTM_COMBINE_DECAP3) /*! @brief Set the DECAP3 field to a new value. */ -#define BW_FTM_COMBINE_DECAP3(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP3) = (v)) +#define BW_FTM_COMBINE_DECAP3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DECAP3), v)) /*@}*/ /*! @@ -2778,13 +2785,13 @@ #define BS_FTM_COMBINE_DTEN3 (1U) /*!< Bit field size in bits for FTM_COMBINE_DTEN3. */ /*! @brief Read current value of the FTM_COMBINE_DTEN3 field. */ -#define BR_FTM_COMBINE_DTEN3(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN3)) +#define BR_FTM_COMBINE_DTEN3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN3))) /*! @brief Format value for bitfield FTM_COMBINE_DTEN3. */ #define BF_FTM_COMBINE_DTEN3(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_DTEN3) & BM_FTM_COMBINE_DTEN3) /*! @brief Set the DTEN3 field to a new value. */ -#define BW_FTM_COMBINE_DTEN3(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN3) = (v)) +#define BW_FTM_COMBINE_DTEN3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_DTEN3), v)) /*@}*/ /*! @@ -2802,13 +2809,13 @@ #define BS_FTM_COMBINE_SYNCEN3 (1U) /*!< Bit field size in bits for FTM_COMBINE_SYNCEN3. */ /*! @brief Read current value of the FTM_COMBINE_SYNCEN3 field. */ -#define BR_FTM_COMBINE_SYNCEN3(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN3)) +#define BR_FTM_COMBINE_SYNCEN3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN3))) /*! @brief Format value for bitfield FTM_COMBINE_SYNCEN3. */ #define BF_FTM_COMBINE_SYNCEN3(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_SYNCEN3) & BM_FTM_COMBINE_SYNCEN3) /*! @brief Set the SYNCEN3 field to a new value. */ -#define BW_FTM_COMBINE_SYNCEN3(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN3) = (v)) +#define BW_FTM_COMBINE_SYNCEN3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_SYNCEN3), v)) /*@}*/ /*! @@ -2827,13 +2834,13 @@ #define BS_FTM_COMBINE_FAULTEN3 (1U) /*!< Bit field size in bits for FTM_COMBINE_FAULTEN3. */ /*! @brief Read current value of the FTM_COMBINE_FAULTEN3 field. */ -#define BR_FTM_COMBINE_FAULTEN3(x) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN3)) +#define BR_FTM_COMBINE_FAULTEN3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN3))) /*! @brief Format value for bitfield FTM_COMBINE_FAULTEN3. */ #define BF_FTM_COMBINE_FAULTEN3(v) ((uint32_t)((uint32_t)(v) << BP_FTM_COMBINE_FAULTEN3) & BM_FTM_COMBINE_FAULTEN3) /*! @brief Set the FAULTEN3 field to a new value. */ -#define BW_FTM_COMBINE_FAULTEN3(x, v) (BITBAND_ACCESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN3) = (v)) +#define BW_FTM_COMBINE_FAULTEN3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_COMBINE_ADDR(x), BP_FTM_COMBINE_FAULTEN3), v)) /*@}*/ /******************************************************************************* @@ -2867,8 +2874,8 @@ #define HW_FTM_DEADTIME_ADDR(x) ((x) + 0x68U) #define HW_FTM_DEADTIME(x) (*(__IO hw_ftm_deadtime_t *) HW_FTM_DEADTIME_ADDR(x)) -#define HW_FTM_DEADTIME_RD(x) (HW_FTM_DEADTIME(x).U) -#define HW_FTM_DEADTIME_WR(x, v) (HW_FTM_DEADTIME(x).U = (v)) +#define HW_FTM_DEADTIME_RD(x) (ADDRESS_READ(hw_ftm_deadtime_t, HW_FTM_DEADTIME_ADDR(x))) +#define HW_FTM_DEADTIME_WR(x, v) (ADDRESS_WRITE(hw_ftm_deadtime_t, HW_FTM_DEADTIME_ADDR(x), v)) #define HW_FTM_DEADTIME_SET(x, v) (HW_FTM_DEADTIME_WR(x, HW_FTM_DEADTIME_RD(x) | (v))) #define HW_FTM_DEADTIME_CLR(x, v) (HW_FTM_DEADTIME_WR(x, HW_FTM_DEADTIME_RD(x) & ~(v))) #define HW_FTM_DEADTIME_TOG(x, v) (HW_FTM_DEADTIME_WR(x, HW_FTM_DEADTIME_RD(x) ^ (v))) @@ -2895,7 +2902,7 @@ #define BS_FTM_DEADTIME_DTVAL (6U) /*!< Bit field size in bits for FTM_DEADTIME_DTVAL. */ /*! @brief Read current value of the FTM_DEADTIME_DTVAL field. */ -#define BR_FTM_DEADTIME_DTVAL(x) (HW_FTM_DEADTIME(x).B.DTVAL) +#define BR_FTM_DEADTIME_DTVAL(x) (UNION_READ(hw_ftm_deadtime_t, HW_FTM_DEADTIME_ADDR(x), U, B.DTVAL)) /*! @brief Format value for bitfield FTM_DEADTIME_DTVAL. */ #define BF_FTM_DEADTIME_DTVAL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_DEADTIME_DTVAL) & BM_FTM_DEADTIME_DTVAL) @@ -2922,7 +2929,7 @@ #define BS_FTM_DEADTIME_DTPS (2U) /*!< Bit field size in bits for FTM_DEADTIME_DTPS. */ /*! @brief Read current value of the FTM_DEADTIME_DTPS field. */ -#define BR_FTM_DEADTIME_DTPS(x) (HW_FTM_DEADTIME(x).B.DTPS) +#define BR_FTM_DEADTIME_DTPS(x) (UNION_READ(hw_ftm_deadtime_t, HW_FTM_DEADTIME_ADDR(x), U, B.DTPS)) /*! @brief Format value for bitfield FTM_DEADTIME_DTPS. */ #define BF_FTM_DEADTIME_DTPS(v) ((uint32_t)((uint32_t)(v) << BP_FTM_DEADTIME_DTPS) & BM_FTM_DEADTIME_DTPS) @@ -2970,8 +2977,8 @@ #define HW_FTM_EXTTRIG_ADDR(x) ((x) + 0x6CU) #define HW_FTM_EXTTRIG(x) (*(__IO hw_ftm_exttrig_t *) HW_FTM_EXTTRIG_ADDR(x)) -#define HW_FTM_EXTTRIG_RD(x) (HW_FTM_EXTTRIG(x).U) -#define HW_FTM_EXTTRIG_WR(x, v) (HW_FTM_EXTTRIG(x).U = (v)) +#define HW_FTM_EXTTRIG_RD(x) (ADDRESS_READ(hw_ftm_exttrig_t, HW_FTM_EXTTRIG_ADDR(x))) +#define HW_FTM_EXTTRIG_WR(x, v) (ADDRESS_WRITE(hw_ftm_exttrig_t, HW_FTM_EXTTRIG_ADDR(x), v)) #define HW_FTM_EXTTRIG_SET(x, v) (HW_FTM_EXTTRIG_WR(x, HW_FTM_EXTTRIG_RD(x) | (v))) #define HW_FTM_EXTTRIG_CLR(x, v) (HW_FTM_EXTTRIG_WR(x, HW_FTM_EXTTRIG_RD(x) & ~(v))) #define HW_FTM_EXTTRIG_TOG(x, v) (HW_FTM_EXTTRIG_WR(x, HW_FTM_EXTTRIG_RD(x) ^ (v))) @@ -2997,13 +3004,13 @@ #define BS_FTM_EXTTRIG_CH2TRIG (1U) /*!< Bit field size in bits for FTM_EXTTRIG_CH2TRIG. */ /*! @brief Read current value of the FTM_EXTTRIG_CH2TRIG field. */ -#define BR_FTM_EXTTRIG_CH2TRIG(x) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH2TRIG)) +#define BR_FTM_EXTTRIG_CH2TRIG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH2TRIG))) /*! @brief Format value for bitfield FTM_EXTTRIG_CH2TRIG. */ #define BF_FTM_EXTTRIG_CH2TRIG(v) ((uint32_t)((uint32_t)(v) << BP_FTM_EXTTRIG_CH2TRIG) & BM_FTM_EXTTRIG_CH2TRIG) /*! @brief Set the CH2TRIG field to a new value. */ -#define BW_FTM_EXTTRIG_CH2TRIG(x, v) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH2TRIG) = (v)) +#define BW_FTM_EXTTRIG_CH2TRIG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH2TRIG), v)) /*@}*/ /*! @@ -3022,13 +3029,13 @@ #define BS_FTM_EXTTRIG_CH3TRIG (1U) /*!< Bit field size in bits for FTM_EXTTRIG_CH3TRIG. */ /*! @brief Read current value of the FTM_EXTTRIG_CH3TRIG field. */ -#define BR_FTM_EXTTRIG_CH3TRIG(x) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH3TRIG)) +#define BR_FTM_EXTTRIG_CH3TRIG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH3TRIG))) /*! @brief Format value for bitfield FTM_EXTTRIG_CH3TRIG. */ #define BF_FTM_EXTTRIG_CH3TRIG(v) ((uint32_t)((uint32_t)(v) << BP_FTM_EXTTRIG_CH3TRIG) & BM_FTM_EXTTRIG_CH3TRIG) /*! @brief Set the CH3TRIG field to a new value. */ -#define BW_FTM_EXTTRIG_CH3TRIG(x, v) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH3TRIG) = (v)) +#define BW_FTM_EXTTRIG_CH3TRIG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH3TRIG), v)) /*@}*/ /*! @@ -3047,13 +3054,13 @@ #define BS_FTM_EXTTRIG_CH4TRIG (1U) /*!< Bit field size in bits for FTM_EXTTRIG_CH4TRIG. */ /*! @brief Read current value of the FTM_EXTTRIG_CH4TRIG field. */ -#define BR_FTM_EXTTRIG_CH4TRIG(x) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH4TRIG)) +#define BR_FTM_EXTTRIG_CH4TRIG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH4TRIG))) /*! @brief Format value for bitfield FTM_EXTTRIG_CH4TRIG. */ #define BF_FTM_EXTTRIG_CH4TRIG(v) ((uint32_t)((uint32_t)(v) << BP_FTM_EXTTRIG_CH4TRIG) & BM_FTM_EXTTRIG_CH4TRIG) /*! @brief Set the CH4TRIG field to a new value. */ -#define BW_FTM_EXTTRIG_CH4TRIG(x, v) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH4TRIG) = (v)) +#define BW_FTM_EXTTRIG_CH4TRIG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH4TRIG), v)) /*@}*/ /*! @@ -3072,13 +3079,13 @@ #define BS_FTM_EXTTRIG_CH5TRIG (1U) /*!< Bit field size in bits for FTM_EXTTRIG_CH5TRIG. */ /*! @brief Read current value of the FTM_EXTTRIG_CH5TRIG field. */ -#define BR_FTM_EXTTRIG_CH5TRIG(x) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH5TRIG)) +#define BR_FTM_EXTTRIG_CH5TRIG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH5TRIG))) /*! @brief Format value for bitfield FTM_EXTTRIG_CH5TRIG. */ #define BF_FTM_EXTTRIG_CH5TRIG(v) ((uint32_t)((uint32_t)(v) << BP_FTM_EXTTRIG_CH5TRIG) & BM_FTM_EXTTRIG_CH5TRIG) /*! @brief Set the CH5TRIG field to a new value. */ -#define BW_FTM_EXTTRIG_CH5TRIG(x, v) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH5TRIG) = (v)) +#define BW_FTM_EXTTRIG_CH5TRIG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH5TRIG), v)) /*@}*/ /*! @@ -3097,13 +3104,13 @@ #define BS_FTM_EXTTRIG_CH0TRIG (1U) /*!< Bit field size in bits for FTM_EXTTRIG_CH0TRIG. */ /*! @brief Read current value of the FTM_EXTTRIG_CH0TRIG field. */ -#define BR_FTM_EXTTRIG_CH0TRIG(x) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH0TRIG)) +#define BR_FTM_EXTTRIG_CH0TRIG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH0TRIG))) /*! @brief Format value for bitfield FTM_EXTTRIG_CH0TRIG. */ #define BF_FTM_EXTTRIG_CH0TRIG(v) ((uint32_t)((uint32_t)(v) << BP_FTM_EXTTRIG_CH0TRIG) & BM_FTM_EXTTRIG_CH0TRIG) /*! @brief Set the CH0TRIG field to a new value. */ -#define BW_FTM_EXTTRIG_CH0TRIG(x, v) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH0TRIG) = (v)) +#define BW_FTM_EXTTRIG_CH0TRIG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH0TRIG), v)) /*@}*/ /*! @@ -3122,13 +3129,13 @@ #define BS_FTM_EXTTRIG_CH1TRIG (1U) /*!< Bit field size in bits for FTM_EXTTRIG_CH1TRIG. */ /*! @brief Read current value of the FTM_EXTTRIG_CH1TRIG field. */ -#define BR_FTM_EXTTRIG_CH1TRIG(x) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH1TRIG)) +#define BR_FTM_EXTTRIG_CH1TRIG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH1TRIG))) /*! @brief Format value for bitfield FTM_EXTTRIG_CH1TRIG. */ #define BF_FTM_EXTTRIG_CH1TRIG(v) ((uint32_t)((uint32_t)(v) << BP_FTM_EXTTRIG_CH1TRIG) & BM_FTM_EXTTRIG_CH1TRIG) /*! @brief Set the CH1TRIG field to a new value. */ -#define BW_FTM_EXTTRIG_CH1TRIG(x, v) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH1TRIG) = (v)) +#define BW_FTM_EXTTRIG_CH1TRIG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_CH1TRIG), v)) /*@}*/ /*! @@ -3147,13 +3154,13 @@ #define BS_FTM_EXTTRIG_INITTRIGEN (1U) /*!< Bit field size in bits for FTM_EXTTRIG_INITTRIGEN. */ /*! @brief Read current value of the FTM_EXTTRIG_INITTRIGEN field. */ -#define BR_FTM_EXTTRIG_INITTRIGEN(x) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_INITTRIGEN)) +#define BR_FTM_EXTTRIG_INITTRIGEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_INITTRIGEN))) /*! @brief Format value for bitfield FTM_EXTTRIG_INITTRIGEN. */ #define BF_FTM_EXTTRIG_INITTRIGEN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_EXTTRIG_INITTRIGEN) & BM_FTM_EXTTRIG_INITTRIGEN) /*! @brief Set the INITTRIGEN field to a new value. */ -#define BW_FTM_EXTTRIG_INITTRIGEN(x, v) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_INITTRIGEN) = (v)) +#define BW_FTM_EXTTRIG_INITTRIGEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_INITTRIGEN), v)) /*@}*/ /*! @@ -3175,13 +3182,13 @@ #define BS_FTM_EXTTRIG_TRIGF (1U) /*!< Bit field size in bits for FTM_EXTTRIG_TRIGF. */ /*! @brief Read current value of the FTM_EXTTRIG_TRIGF field. */ -#define BR_FTM_EXTTRIG_TRIGF(x) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_TRIGF)) +#define BR_FTM_EXTTRIG_TRIGF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_TRIGF))) /*! @brief Format value for bitfield FTM_EXTTRIG_TRIGF. */ #define BF_FTM_EXTTRIG_TRIGF(v) ((uint32_t)((uint32_t)(v) << BP_FTM_EXTTRIG_TRIGF) & BM_FTM_EXTTRIG_TRIGF) /*! @brief Set the TRIGF field to a new value. */ -#define BW_FTM_EXTTRIG_TRIGF(x, v) (BITBAND_ACCESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_TRIGF) = (v)) +#define BW_FTM_EXTTRIG_TRIGF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_EXTTRIG_ADDR(x), BP_FTM_EXTTRIG_TRIGF), v)) /*@}*/ /******************************************************************************* @@ -3222,8 +3229,8 @@ #define HW_FTM_POL_ADDR(x) ((x) + 0x70U) #define HW_FTM_POL(x) (*(__IO hw_ftm_pol_t *) HW_FTM_POL_ADDR(x)) -#define HW_FTM_POL_RD(x) (HW_FTM_POL(x).U) -#define HW_FTM_POL_WR(x, v) (HW_FTM_POL(x).U = (v)) +#define HW_FTM_POL_RD(x) (ADDRESS_READ(hw_ftm_pol_t, HW_FTM_POL_ADDR(x))) +#define HW_FTM_POL_WR(x, v) (ADDRESS_WRITE(hw_ftm_pol_t, HW_FTM_POL_ADDR(x), v)) #define HW_FTM_POL_SET(x, v) (HW_FTM_POL_WR(x, HW_FTM_POL_RD(x) | (v))) #define HW_FTM_POL_CLR(x, v) (HW_FTM_POL_WR(x, HW_FTM_POL_RD(x) & ~(v))) #define HW_FTM_POL_TOG(x, v) (HW_FTM_POL_WR(x, HW_FTM_POL_RD(x) ^ (v))) @@ -3249,13 +3256,13 @@ #define BS_FTM_POL_POL0 (1U) /*!< Bit field size in bits for FTM_POL_POL0. */ /*! @brief Read current value of the FTM_POL_POL0 field. */ -#define BR_FTM_POL_POL0(x) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL0)) +#define BR_FTM_POL_POL0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL0))) /*! @brief Format value for bitfield FTM_POL_POL0. */ #define BF_FTM_POL_POL0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_POL_POL0) & BM_FTM_POL_POL0) /*! @brief Set the POL0 field to a new value. */ -#define BW_FTM_POL_POL0(x, v) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL0) = (v)) +#define BW_FTM_POL_POL0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL0), v)) /*@}*/ /*! @@ -3274,13 +3281,13 @@ #define BS_FTM_POL_POL1 (1U) /*!< Bit field size in bits for FTM_POL_POL1. */ /*! @brief Read current value of the FTM_POL_POL1 field. */ -#define BR_FTM_POL_POL1(x) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL1)) +#define BR_FTM_POL_POL1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL1))) /*! @brief Format value for bitfield FTM_POL_POL1. */ #define BF_FTM_POL_POL1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_POL_POL1) & BM_FTM_POL_POL1) /*! @brief Set the POL1 field to a new value. */ -#define BW_FTM_POL_POL1(x, v) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL1) = (v)) +#define BW_FTM_POL_POL1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL1), v)) /*@}*/ /*! @@ -3299,13 +3306,13 @@ #define BS_FTM_POL_POL2 (1U) /*!< Bit field size in bits for FTM_POL_POL2. */ /*! @brief Read current value of the FTM_POL_POL2 field. */ -#define BR_FTM_POL_POL2(x) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL2)) +#define BR_FTM_POL_POL2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL2))) /*! @brief Format value for bitfield FTM_POL_POL2. */ #define BF_FTM_POL_POL2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_POL_POL2) & BM_FTM_POL_POL2) /*! @brief Set the POL2 field to a new value. */ -#define BW_FTM_POL_POL2(x, v) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL2) = (v)) +#define BW_FTM_POL_POL2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL2), v)) /*@}*/ /*! @@ -3324,13 +3331,13 @@ #define BS_FTM_POL_POL3 (1U) /*!< Bit field size in bits for FTM_POL_POL3. */ /*! @brief Read current value of the FTM_POL_POL3 field. */ -#define BR_FTM_POL_POL3(x) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL3)) +#define BR_FTM_POL_POL3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL3))) /*! @brief Format value for bitfield FTM_POL_POL3. */ #define BF_FTM_POL_POL3(v) ((uint32_t)((uint32_t)(v) << BP_FTM_POL_POL3) & BM_FTM_POL_POL3) /*! @brief Set the POL3 field to a new value. */ -#define BW_FTM_POL_POL3(x, v) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL3) = (v)) +#define BW_FTM_POL_POL3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL3), v)) /*@}*/ /*! @@ -3349,13 +3356,13 @@ #define BS_FTM_POL_POL4 (1U) /*!< Bit field size in bits for FTM_POL_POL4. */ /*! @brief Read current value of the FTM_POL_POL4 field. */ -#define BR_FTM_POL_POL4(x) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL4)) +#define BR_FTM_POL_POL4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL4))) /*! @brief Format value for bitfield FTM_POL_POL4. */ #define BF_FTM_POL_POL4(v) ((uint32_t)((uint32_t)(v) << BP_FTM_POL_POL4) & BM_FTM_POL_POL4) /*! @brief Set the POL4 field to a new value. */ -#define BW_FTM_POL_POL4(x, v) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL4) = (v)) +#define BW_FTM_POL_POL4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL4), v)) /*@}*/ /*! @@ -3374,13 +3381,13 @@ #define BS_FTM_POL_POL5 (1U) /*!< Bit field size in bits for FTM_POL_POL5. */ /*! @brief Read current value of the FTM_POL_POL5 field. */ -#define BR_FTM_POL_POL5(x) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL5)) +#define BR_FTM_POL_POL5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL5))) /*! @brief Format value for bitfield FTM_POL_POL5. */ #define BF_FTM_POL_POL5(v) ((uint32_t)((uint32_t)(v) << BP_FTM_POL_POL5) & BM_FTM_POL_POL5) /*! @brief Set the POL5 field to a new value. */ -#define BW_FTM_POL_POL5(x, v) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL5) = (v)) +#define BW_FTM_POL_POL5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL5), v)) /*@}*/ /*! @@ -3399,13 +3406,13 @@ #define BS_FTM_POL_POL6 (1U) /*!< Bit field size in bits for FTM_POL_POL6. */ /*! @brief Read current value of the FTM_POL_POL6 field. */ -#define BR_FTM_POL_POL6(x) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL6)) +#define BR_FTM_POL_POL6(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL6))) /*! @brief Format value for bitfield FTM_POL_POL6. */ #define BF_FTM_POL_POL6(v) ((uint32_t)((uint32_t)(v) << BP_FTM_POL_POL6) & BM_FTM_POL_POL6) /*! @brief Set the POL6 field to a new value. */ -#define BW_FTM_POL_POL6(x, v) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL6) = (v)) +#define BW_FTM_POL_POL6(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL6), v)) /*@}*/ /*! @@ -3424,13 +3431,13 @@ #define BS_FTM_POL_POL7 (1U) /*!< Bit field size in bits for FTM_POL_POL7. */ /*! @brief Read current value of the FTM_POL_POL7 field. */ -#define BR_FTM_POL_POL7(x) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL7)) +#define BR_FTM_POL_POL7(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL7))) /*! @brief Format value for bitfield FTM_POL_POL7. */ #define BF_FTM_POL_POL7(v) ((uint32_t)((uint32_t)(v) << BP_FTM_POL_POL7) & BM_FTM_POL_POL7) /*! @brief Set the POL7 field to a new value. */ -#define BW_FTM_POL_POL7(x, v) (BITBAND_ACCESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL7) = (v)) +#define BW_FTM_POL_POL7(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_POL_ADDR(x), BP_FTM_POL_POL7), v)) /*@}*/ /******************************************************************************* @@ -3469,8 +3476,8 @@ #define HW_FTM_FMS_ADDR(x) ((x) + 0x74U) #define HW_FTM_FMS(x) (*(__IO hw_ftm_fms_t *) HW_FTM_FMS_ADDR(x)) -#define HW_FTM_FMS_RD(x) (HW_FTM_FMS(x).U) -#define HW_FTM_FMS_WR(x, v) (HW_FTM_FMS(x).U = (v)) +#define HW_FTM_FMS_RD(x) (ADDRESS_READ(hw_ftm_fms_t, HW_FTM_FMS_ADDR(x))) +#define HW_FTM_FMS_WR(x, v) (ADDRESS_WRITE(hw_ftm_fms_t, HW_FTM_FMS_ADDR(x), v)) #define HW_FTM_FMS_SET(x, v) (HW_FTM_FMS_WR(x, HW_FTM_FMS_RD(x) | (v))) #define HW_FTM_FMS_CLR(x, v) (HW_FTM_FMS_WR(x, HW_FTM_FMS_RD(x) & ~(v))) #define HW_FTM_FMS_TOG(x, v) (HW_FTM_FMS_WR(x, HW_FTM_FMS_RD(x) ^ (v))) @@ -3503,13 +3510,13 @@ #define BS_FTM_FMS_FAULTF0 (1U) /*!< Bit field size in bits for FTM_FMS_FAULTF0. */ /*! @brief Read current value of the FTM_FMS_FAULTF0 field. */ -#define BR_FTM_FMS_FAULTF0(x) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF0)) +#define BR_FTM_FMS_FAULTF0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF0))) /*! @brief Format value for bitfield FTM_FMS_FAULTF0. */ #define BF_FTM_FMS_FAULTF0(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FMS_FAULTF0) & BM_FTM_FMS_FAULTF0) /*! @brief Set the FAULTF0 field to a new value. */ -#define BW_FTM_FMS_FAULTF0(x, v) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF0) = (v)) +#define BW_FTM_FMS_FAULTF0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF0), v)) /*@}*/ /*! @@ -3535,13 +3542,13 @@ #define BS_FTM_FMS_FAULTF1 (1U) /*!< Bit field size in bits for FTM_FMS_FAULTF1. */ /*! @brief Read current value of the FTM_FMS_FAULTF1 field. */ -#define BR_FTM_FMS_FAULTF1(x) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF1)) +#define BR_FTM_FMS_FAULTF1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF1))) /*! @brief Format value for bitfield FTM_FMS_FAULTF1. */ #define BF_FTM_FMS_FAULTF1(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FMS_FAULTF1) & BM_FTM_FMS_FAULTF1) /*! @brief Set the FAULTF1 field to a new value. */ -#define BW_FTM_FMS_FAULTF1(x, v) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF1) = (v)) +#define BW_FTM_FMS_FAULTF1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF1), v)) /*@}*/ /*! @@ -3567,13 +3574,13 @@ #define BS_FTM_FMS_FAULTF2 (1U) /*!< Bit field size in bits for FTM_FMS_FAULTF2. */ /*! @brief Read current value of the FTM_FMS_FAULTF2 field. */ -#define BR_FTM_FMS_FAULTF2(x) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF2)) +#define BR_FTM_FMS_FAULTF2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF2))) /*! @brief Format value for bitfield FTM_FMS_FAULTF2. */ #define BF_FTM_FMS_FAULTF2(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FMS_FAULTF2) & BM_FTM_FMS_FAULTF2) /*! @brief Set the FAULTF2 field to a new value. */ -#define BW_FTM_FMS_FAULTF2(x, v) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF2) = (v)) +#define BW_FTM_FMS_FAULTF2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF2), v)) /*@}*/ /*! @@ -3599,13 +3606,13 @@ #define BS_FTM_FMS_FAULTF3 (1U) /*!< Bit field size in bits for FTM_FMS_FAULTF3. */ /*! @brief Read current value of the FTM_FMS_FAULTF3 field. */ -#define BR_FTM_FMS_FAULTF3(x) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF3)) +#define BR_FTM_FMS_FAULTF3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF3))) /*! @brief Format value for bitfield FTM_FMS_FAULTF3. */ #define BF_FTM_FMS_FAULTF3(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FMS_FAULTF3) & BM_FTM_FMS_FAULTF3) /*! @brief Set the FAULTF3 field to a new value. */ -#define BW_FTM_FMS_FAULTF3(x, v) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF3) = (v)) +#define BW_FTM_FMS_FAULTF3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF3), v)) /*@}*/ /*! @@ -3624,7 +3631,7 @@ #define BS_FTM_FMS_FAULTIN (1U) /*!< Bit field size in bits for FTM_FMS_FAULTIN. */ /*! @brief Read current value of the FTM_FMS_FAULTIN field. */ -#define BR_FTM_FMS_FAULTIN(x) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTIN)) +#define BR_FTM_FMS_FAULTIN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTIN))) /*@}*/ /*! @@ -3644,13 +3651,13 @@ #define BS_FTM_FMS_WPEN (1U) /*!< Bit field size in bits for FTM_FMS_WPEN. */ /*! @brief Read current value of the FTM_FMS_WPEN field. */ -#define BR_FTM_FMS_WPEN(x) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_WPEN)) +#define BR_FTM_FMS_WPEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_WPEN))) /*! @brief Format value for bitfield FTM_FMS_WPEN. */ #define BF_FTM_FMS_WPEN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FMS_WPEN) & BM_FTM_FMS_WPEN) /*! @brief Set the WPEN field to a new value. */ -#define BW_FTM_FMS_WPEN(x, v) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_WPEN) = (v)) +#define BW_FTM_FMS_WPEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_WPEN), v)) /*@}*/ /*! @@ -3675,13 +3682,13 @@ #define BS_FTM_FMS_FAULTF (1U) /*!< Bit field size in bits for FTM_FMS_FAULTF. */ /*! @brief Read current value of the FTM_FMS_FAULTF field. */ -#define BR_FTM_FMS_FAULTF(x) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF)) +#define BR_FTM_FMS_FAULTF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF))) /*! @brief Format value for bitfield FTM_FMS_FAULTF. */ #define BF_FTM_FMS_FAULTF(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FMS_FAULTF) & BM_FTM_FMS_FAULTF) /*! @brief Set the FAULTF field to a new value. */ -#define BW_FTM_FMS_FAULTF(x, v) (BITBAND_ACCESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF) = (v)) +#define BW_FTM_FMS_FAULTF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FMS_ADDR(x), BP_FTM_FMS_FAULTF), v)) /*@}*/ /******************************************************************************* @@ -3718,8 +3725,8 @@ #define HW_FTM_FILTER_ADDR(x) ((x) + 0x78U) #define HW_FTM_FILTER(x) (*(__IO hw_ftm_filter_t *) HW_FTM_FILTER_ADDR(x)) -#define HW_FTM_FILTER_RD(x) (HW_FTM_FILTER(x).U) -#define HW_FTM_FILTER_WR(x, v) (HW_FTM_FILTER(x).U = (v)) +#define HW_FTM_FILTER_RD(x) (ADDRESS_READ(hw_ftm_filter_t, HW_FTM_FILTER_ADDR(x))) +#define HW_FTM_FILTER_WR(x, v) (ADDRESS_WRITE(hw_ftm_filter_t, HW_FTM_FILTER_ADDR(x), v)) #define HW_FTM_FILTER_SET(x, v) (HW_FTM_FILTER_WR(x, HW_FTM_FILTER_RD(x) | (v))) #define HW_FTM_FILTER_CLR(x, v) (HW_FTM_FILTER_WR(x, HW_FTM_FILTER_RD(x) & ~(v))) #define HW_FTM_FILTER_TOG(x, v) (HW_FTM_FILTER_WR(x, HW_FTM_FILTER_RD(x) ^ (v))) @@ -3741,7 +3748,7 @@ #define BS_FTM_FILTER_CH0FVAL (4U) /*!< Bit field size in bits for FTM_FILTER_CH0FVAL. */ /*! @brief Read current value of the FTM_FILTER_CH0FVAL field. */ -#define BR_FTM_FILTER_CH0FVAL(x) (HW_FTM_FILTER(x).B.CH0FVAL) +#define BR_FTM_FILTER_CH0FVAL(x) (UNION_READ(hw_ftm_filter_t, HW_FTM_FILTER_ADDR(x), U, B.CH0FVAL)) /*! @brief Format value for bitfield FTM_FILTER_CH0FVAL. */ #define BF_FTM_FILTER_CH0FVAL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FILTER_CH0FVAL) & BM_FTM_FILTER_CH0FVAL) @@ -3762,7 +3769,7 @@ #define BS_FTM_FILTER_CH1FVAL (4U) /*!< Bit field size in bits for FTM_FILTER_CH1FVAL. */ /*! @brief Read current value of the FTM_FILTER_CH1FVAL field. */ -#define BR_FTM_FILTER_CH1FVAL(x) (HW_FTM_FILTER(x).B.CH1FVAL) +#define BR_FTM_FILTER_CH1FVAL(x) (UNION_READ(hw_ftm_filter_t, HW_FTM_FILTER_ADDR(x), U, B.CH1FVAL)) /*! @brief Format value for bitfield FTM_FILTER_CH1FVAL. */ #define BF_FTM_FILTER_CH1FVAL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FILTER_CH1FVAL) & BM_FTM_FILTER_CH1FVAL) @@ -3783,7 +3790,7 @@ #define BS_FTM_FILTER_CH2FVAL (4U) /*!< Bit field size in bits for FTM_FILTER_CH2FVAL. */ /*! @brief Read current value of the FTM_FILTER_CH2FVAL field. */ -#define BR_FTM_FILTER_CH2FVAL(x) (HW_FTM_FILTER(x).B.CH2FVAL) +#define BR_FTM_FILTER_CH2FVAL(x) (UNION_READ(hw_ftm_filter_t, HW_FTM_FILTER_ADDR(x), U, B.CH2FVAL)) /*! @brief Format value for bitfield FTM_FILTER_CH2FVAL. */ #define BF_FTM_FILTER_CH2FVAL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FILTER_CH2FVAL) & BM_FTM_FILTER_CH2FVAL) @@ -3804,7 +3811,7 @@ #define BS_FTM_FILTER_CH3FVAL (4U) /*!< Bit field size in bits for FTM_FILTER_CH3FVAL. */ /*! @brief Read current value of the FTM_FILTER_CH3FVAL field. */ -#define BR_FTM_FILTER_CH3FVAL(x) (HW_FTM_FILTER(x).B.CH3FVAL) +#define BR_FTM_FILTER_CH3FVAL(x) (UNION_READ(hw_ftm_filter_t, HW_FTM_FILTER_ADDR(x), U, B.CH3FVAL)) /*! @brief Format value for bitfield FTM_FILTER_CH3FVAL. */ #define BF_FTM_FILTER_CH3FVAL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FILTER_CH3FVAL) & BM_FTM_FILTER_CH3FVAL) @@ -3850,8 +3857,8 @@ #define HW_FTM_FLTCTRL_ADDR(x) ((x) + 0x7CU) #define HW_FTM_FLTCTRL(x) (*(__IO hw_ftm_fltctrl_t *) HW_FTM_FLTCTRL_ADDR(x)) -#define HW_FTM_FLTCTRL_RD(x) (HW_FTM_FLTCTRL(x).U) -#define HW_FTM_FLTCTRL_WR(x, v) (HW_FTM_FLTCTRL(x).U = (v)) +#define HW_FTM_FLTCTRL_RD(x) (ADDRESS_READ(hw_ftm_fltctrl_t, HW_FTM_FLTCTRL_ADDR(x))) +#define HW_FTM_FLTCTRL_WR(x, v) (ADDRESS_WRITE(hw_ftm_fltctrl_t, HW_FTM_FLTCTRL_ADDR(x), v)) #define HW_FTM_FLTCTRL_SET(x, v) (HW_FTM_FLTCTRL_WR(x, HW_FTM_FLTCTRL_RD(x) | (v))) #define HW_FTM_FLTCTRL_CLR(x, v) (HW_FTM_FLTCTRL_WR(x, HW_FTM_FLTCTRL_RD(x) & ~(v))) #define HW_FTM_FLTCTRL_TOG(x, v) (HW_FTM_FLTCTRL_WR(x, HW_FTM_FLTCTRL_RD(x) ^ (v))) @@ -3877,13 +3884,13 @@ #define BS_FTM_FLTCTRL_FAULT0EN (1U) /*!< Bit field size in bits for FTM_FLTCTRL_FAULT0EN. */ /*! @brief Read current value of the FTM_FLTCTRL_FAULT0EN field. */ -#define BR_FTM_FLTCTRL_FAULT0EN(x) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT0EN)) +#define BR_FTM_FLTCTRL_FAULT0EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT0EN))) /*! @brief Format value for bitfield FTM_FLTCTRL_FAULT0EN. */ #define BF_FTM_FLTCTRL_FAULT0EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTCTRL_FAULT0EN) & BM_FTM_FLTCTRL_FAULT0EN) /*! @brief Set the FAULT0EN field to a new value. */ -#define BW_FTM_FLTCTRL_FAULT0EN(x, v) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT0EN) = (v)) +#define BW_FTM_FLTCTRL_FAULT0EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT0EN), v)) /*@}*/ /*! @@ -3902,13 +3909,13 @@ #define BS_FTM_FLTCTRL_FAULT1EN (1U) /*!< Bit field size in bits for FTM_FLTCTRL_FAULT1EN. */ /*! @brief Read current value of the FTM_FLTCTRL_FAULT1EN field. */ -#define BR_FTM_FLTCTRL_FAULT1EN(x) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT1EN)) +#define BR_FTM_FLTCTRL_FAULT1EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT1EN))) /*! @brief Format value for bitfield FTM_FLTCTRL_FAULT1EN. */ #define BF_FTM_FLTCTRL_FAULT1EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTCTRL_FAULT1EN) & BM_FTM_FLTCTRL_FAULT1EN) /*! @brief Set the FAULT1EN field to a new value. */ -#define BW_FTM_FLTCTRL_FAULT1EN(x, v) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT1EN) = (v)) +#define BW_FTM_FLTCTRL_FAULT1EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT1EN), v)) /*@}*/ /*! @@ -3927,13 +3934,13 @@ #define BS_FTM_FLTCTRL_FAULT2EN (1U) /*!< Bit field size in bits for FTM_FLTCTRL_FAULT2EN. */ /*! @brief Read current value of the FTM_FLTCTRL_FAULT2EN field. */ -#define BR_FTM_FLTCTRL_FAULT2EN(x) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT2EN)) +#define BR_FTM_FLTCTRL_FAULT2EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT2EN))) /*! @brief Format value for bitfield FTM_FLTCTRL_FAULT2EN. */ #define BF_FTM_FLTCTRL_FAULT2EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTCTRL_FAULT2EN) & BM_FTM_FLTCTRL_FAULT2EN) /*! @brief Set the FAULT2EN field to a new value. */ -#define BW_FTM_FLTCTRL_FAULT2EN(x, v) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT2EN) = (v)) +#define BW_FTM_FLTCTRL_FAULT2EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT2EN), v)) /*@}*/ /*! @@ -3952,13 +3959,13 @@ #define BS_FTM_FLTCTRL_FAULT3EN (1U) /*!< Bit field size in bits for FTM_FLTCTRL_FAULT3EN. */ /*! @brief Read current value of the FTM_FLTCTRL_FAULT3EN field. */ -#define BR_FTM_FLTCTRL_FAULT3EN(x) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT3EN)) +#define BR_FTM_FLTCTRL_FAULT3EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT3EN))) /*! @brief Format value for bitfield FTM_FLTCTRL_FAULT3EN. */ #define BF_FTM_FLTCTRL_FAULT3EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTCTRL_FAULT3EN) & BM_FTM_FLTCTRL_FAULT3EN) /*! @brief Set the FAULT3EN field to a new value. */ -#define BW_FTM_FLTCTRL_FAULT3EN(x, v) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT3EN) = (v)) +#define BW_FTM_FLTCTRL_FAULT3EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FAULT3EN), v)) /*@}*/ /*! @@ -3977,13 +3984,13 @@ #define BS_FTM_FLTCTRL_FFLTR0EN (1U) /*!< Bit field size in bits for FTM_FLTCTRL_FFLTR0EN. */ /*! @brief Read current value of the FTM_FLTCTRL_FFLTR0EN field. */ -#define BR_FTM_FLTCTRL_FFLTR0EN(x) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR0EN)) +#define BR_FTM_FLTCTRL_FFLTR0EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR0EN))) /*! @brief Format value for bitfield FTM_FLTCTRL_FFLTR0EN. */ #define BF_FTM_FLTCTRL_FFLTR0EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTCTRL_FFLTR0EN) & BM_FTM_FLTCTRL_FFLTR0EN) /*! @brief Set the FFLTR0EN field to a new value. */ -#define BW_FTM_FLTCTRL_FFLTR0EN(x, v) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR0EN) = (v)) +#define BW_FTM_FLTCTRL_FFLTR0EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR0EN), v)) /*@}*/ /*! @@ -4002,13 +4009,13 @@ #define BS_FTM_FLTCTRL_FFLTR1EN (1U) /*!< Bit field size in bits for FTM_FLTCTRL_FFLTR1EN. */ /*! @brief Read current value of the FTM_FLTCTRL_FFLTR1EN field. */ -#define BR_FTM_FLTCTRL_FFLTR1EN(x) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR1EN)) +#define BR_FTM_FLTCTRL_FFLTR1EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR1EN))) /*! @brief Format value for bitfield FTM_FLTCTRL_FFLTR1EN. */ #define BF_FTM_FLTCTRL_FFLTR1EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTCTRL_FFLTR1EN) & BM_FTM_FLTCTRL_FFLTR1EN) /*! @brief Set the FFLTR1EN field to a new value. */ -#define BW_FTM_FLTCTRL_FFLTR1EN(x, v) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR1EN) = (v)) +#define BW_FTM_FLTCTRL_FFLTR1EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR1EN), v)) /*@}*/ /*! @@ -4027,13 +4034,13 @@ #define BS_FTM_FLTCTRL_FFLTR2EN (1U) /*!< Bit field size in bits for FTM_FLTCTRL_FFLTR2EN. */ /*! @brief Read current value of the FTM_FLTCTRL_FFLTR2EN field. */ -#define BR_FTM_FLTCTRL_FFLTR2EN(x) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR2EN)) +#define BR_FTM_FLTCTRL_FFLTR2EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR2EN))) /*! @brief Format value for bitfield FTM_FLTCTRL_FFLTR2EN. */ #define BF_FTM_FLTCTRL_FFLTR2EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTCTRL_FFLTR2EN) & BM_FTM_FLTCTRL_FFLTR2EN) /*! @brief Set the FFLTR2EN field to a new value. */ -#define BW_FTM_FLTCTRL_FFLTR2EN(x, v) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR2EN) = (v)) +#define BW_FTM_FLTCTRL_FFLTR2EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR2EN), v)) /*@}*/ /*! @@ -4052,13 +4059,13 @@ #define BS_FTM_FLTCTRL_FFLTR3EN (1U) /*!< Bit field size in bits for FTM_FLTCTRL_FFLTR3EN. */ /*! @brief Read current value of the FTM_FLTCTRL_FFLTR3EN field. */ -#define BR_FTM_FLTCTRL_FFLTR3EN(x) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR3EN)) +#define BR_FTM_FLTCTRL_FFLTR3EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR3EN))) /*! @brief Format value for bitfield FTM_FLTCTRL_FFLTR3EN. */ #define BF_FTM_FLTCTRL_FFLTR3EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTCTRL_FFLTR3EN) & BM_FTM_FLTCTRL_FFLTR3EN) /*! @brief Set the FFLTR3EN field to a new value. */ -#define BW_FTM_FLTCTRL_FFLTR3EN(x, v) (BITBAND_ACCESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR3EN) = (v)) +#define BW_FTM_FLTCTRL_FFLTR3EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTCTRL_ADDR(x), BP_FTM_FLTCTRL_FFLTR3EN), v)) /*@}*/ /*! @@ -4075,7 +4082,7 @@ #define BS_FTM_FLTCTRL_FFVAL (4U) /*!< Bit field size in bits for FTM_FLTCTRL_FFVAL. */ /*! @brief Read current value of the FTM_FLTCTRL_FFVAL field. */ -#define BR_FTM_FLTCTRL_FFVAL(x) (HW_FTM_FLTCTRL(x).B.FFVAL) +#define BR_FTM_FLTCTRL_FFVAL(x) (UNION_READ(hw_ftm_fltctrl_t, HW_FTM_FLTCTRL_ADDR(x), U, B.FFVAL)) /*! @brief Format value for bitfield FTM_FLTCTRL_FFVAL. */ #define BF_FTM_FLTCTRL_FFVAL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTCTRL_FFVAL) & BM_FTM_FLTCTRL_FFVAL) @@ -4121,8 +4128,8 @@ #define HW_FTM_QDCTRL_ADDR(x) ((x) + 0x80U) #define HW_FTM_QDCTRL(x) (*(__IO hw_ftm_qdctrl_t *) HW_FTM_QDCTRL_ADDR(x)) -#define HW_FTM_QDCTRL_RD(x) (HW_FTM_QDCTRL(x).U) -#define HW_FTM_QDCTRL_WR(x, v) (HW_FTM_QDCTRL(x).U = (v)) +#define HW_FTM_QDCTRL_RD(x) (ADDRESS_READ(hw_ftm_qdctrl_t, HW_FTM_QDCTRL_ADDR(x))) +#define HW_FTM_QDCTRL_WR(x, v) (ADDRESS_WRITE(hw_ftm_qdctrl_t, HW_FTM_QDCTRL_ADDR(x), v)) #define HW_FTM_QDCTRL_SET(x, v) (HW_FTM_QDCTRL_WR(x, HW_FTM_QDCTRL_RD(x) | (v))) #define HW_FTM_QDCTRL_CLR(x, v) (HW_FTM_QDCTRL_WR(x, HW_FTM_QDCTRL_RD(x) & ~(v))) #define HW_FTM_QDCTRL_TOG(x, v) (HW_FTM_QDCTRL_WR(x, HW_FTM_QDCTRL_RD(x) ^ (v))) @@ -4150,13 +4157,13 @@ #define BS_FTM_QDCTRL_QUADEN (1U) /*!< Bit field size in bits for FTM_QDCTRL_QUADEN. */ /*! @brief Read current value of the FTM_QDCTRL_QUADEN field. */ -#define BR_FTM_QDCTRL_QUADEN(x) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADEN)) +#define BR_FTM_QDCTRL_QUADEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADEN))) /*! @brief Format value for bitfield FTM_QDCTRL_QUADEN. */ #define BF_FTM_QDCTRL_QUADEN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_QDCTRL_QUADEN) & BM_FTM_QDCTRL_QUADEN) /*! @brief Set the QUADEN field to a new value. */ -#define BW_FTM_QDCTRL_QUADEN(x, v) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADEN) = (v)) +#define BW_FTM_QDCTRL_QUADEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADEN), v)) /*@}*/ /*! @@ -4178,7 +4185,7 @@ #define BS_FTM_QDCTRL_TOFDIR (1U) /*!< Bit field size in bits for FTM_QDCTRL_TOFDIR. */ /*! @brief Read current value of the FTM_QDCTRL_TOFDIR field. */ -#define BR_FTM_QDCTRL_TOFDIR(x) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_TOFDIR)) +#define BR_FTM_QDCTRL_TOFDIR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_TOFDIR))) /*@}*/ /*! @@ -4196,7 +4203,7 @@ #define BS_FTM_QDCTRL_QUADIR (1U) /*!< Bit field size in bits for FTM_QDCTRL_QUADIR. */ /*! @brief Read current value of the FTM_QDCTRL_QUADIR field. */ -#define BR_FTM_QDCTRL_QUADIR(x) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADIR)) +#define BR_FTM_QDCTRL_QUADIR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADIR))) /*@}*/ /*! @@ -4214,13 +4221,13 @@ #define BS_FTM_QDCTRL_QUADMODE (1U) /*!< Bit field size in bits for FTM_QDCTRL_QUADMODE. */ /*! @brief Read current value of the FTM_QDCTRL_QUADMODE field. */ -#define BR_FTM_QDCTRL_QUADMODE(x) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADMODE)) +#define BR_FTM_QDCTRL_QUADMODE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADMODE))) /*! @brief Format value for bitfield FTM_QDCTRL_QUADMODE. */ #define BF_FTM_QDCTRL_QUADMODE(v) ((uint32_t)((uint32_t)(v) << BP_FTM_QDCTRL_QUADMODE) & BM_FTM_QDCTRL_QUADMODE) /*! @brief Set the QUADMODE field to a new value. */ -#define BW_FTM_QDCTRL_QUADMODE(x, v) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADMODE) = (v)) +#define BW_FTM_QDCTRL_QUADMODE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_QUADMODE), v)) /*@}*/ /*! @@ -4240,13 +4247,13 @@ #define BS_FTM_QDCTRL_PHBPOL (1U) /*!< Bit field size in bits for FTM_QDCTRL_PHBPOL. */ /*! @brief Read current value of the FTM_QDCTRL_PHBPOL field. */ -#define BR_FTM_QDCTRL_PHBPOL(x) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHBPOL)) +#define BR_FTM_QDCTRL_PHBPOL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHBPOL))) /*! @brief Format value for bitfield FTM_QDCTRL_PHBPOL. */ #define BF_FTM_QDCTRL_PHBPOL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_QDCTRL_PHBPOL) & BM_FTM_QDCTRL_PHBPOL) /*! @brief Set the PHBPOL field to a new value. */ -#define BW_FTM_QDCTRL_PHBPOL(x, v) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHBPOL) = (v)) +#define BW_FTM_QDCTRL_PHBPOL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHBPOL), v)) /*@}*/ /*! @@ -4266,13 +4273,13 @@ #define BS_FTM_QDCTRL_PHAPOL (1U) /*!< Bit field size in bits for FTM_QDCTRL_PHAPOL. */ /*! @brief Read current value of the FTM_QDCTRL_PHAPOL field. */ -#define BR_FTM_QDCTRL_PHAPOL(x) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHAPOL)) +#define BR_FTM_QDCTRL_PHAPOL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHAPOL))) /*! @brief Format value for bitfield FTM_QDCTRL_PHAPOL. */ #define BF_FTM_QDCTRL_PHAPOL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_QDCTRL_PHAPOL) & BM_FTM_QDCTRL_PHAPOL) /*! @brief Set the PHAPOL field to a new value. */ -#define BW_FTM_QDCTRL_PHAPOL(x, v) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHAPOL) = (v)) +#define BW_FTM_QDCTRL_PHAPOL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHAPOL), v)) /*@}*/ /*! @@ -4292,13 +4299,13 @@ #define BS_FTM_QDCTRL_PHBFLTREN (1U) /*!< Bit field size in bits for FTM_QDCTRL_PHBFLTREN. */ /*! @brief Read current value of the FTM_QDCTRL_PHBFLTREN field. */ -#define BR_FTM_QDCTRL_PHBFLTREN(x) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHBFLTREN)) +#define BR_FTM_QDCTRL_PHBFLTREN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHBFLTREN))) /*! @brief Format value for bitfield FTM_QDCTRL_PHBFLTREN. */ #define BF_FTM_QDCTRL_PHBFLTREN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_QDCTRL_PHBFLTREN) & BM_FTM_QDCTRL_PHBFLTREN) /*! @brief Set the PHBFLTREN field to a new value. */ -#define BW_FTM_QDCTRL_PHBFLTREN(x, v) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHBFLTREN) = (v)) +#define BW_FTM_QDCTRL_PHBFLTREN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHBFLTREN), v)) /*@}*/ /*! @@ -4318,13 +4325,13 @@ #define BS_FTM_QDCTRL_PHAFLTREN (1U) /*!< Bit field size in bits for FTM_QDCTRL_PHAFLTREN. */ /*! @brief Read current value of the FTM_QDCTRL_PHAFLTREN field. */ -#define BR_FTM_QDCTRL_PHAFLTREN(x) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHAFLTREN)) +#define BR_FTM_QDCTRL_PHAFLTREN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHAFLTREN))) /*! @brief Format value for bitfield FTM_QDCTRL_PHAFLTREN. */ #define BF_FTM_QDCTRL_PHAFLTREN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_QDCTRL_PHAFLTREN) & BM_FTM_QDCTRL_PHAFLTREN) /*! @brief Set the PHAFLTREN field to a new value. */ -#define BW_FTM_QDCTRL_PHAFLTREN(x, v) (BITBAND_ACCESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHAFLTREN) = (v)) +#define BW_FTM_QDCTRL_PHAFLTREN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_QDCTRL_ADDR(x), BP_FTM_QDCTRL_PHAFLTREN), v)) /*@}*/ /******************************************************************************* @@ -4362,8 +4369,8 @@ #define HW_FTM_CONF_ADDR(x) ((x) + 0x84U) #define HW_FTM_CONF(x) (*(__IO hw_ftm_conf_t *) HW_FTM_CONF_ADDR(x)) -#define HW_FTM_CONF_RD(x) (HW_FTM_CONF(x).U) -#define HW_FTM_CONF_WR(x, v) (HW_FTM_CONF(x).U = (v)) +#define HW_FTM_CONF_RD(x) (ADDRESS_READ(hw_ftm_conf_t, HW_FTM_CONF_ADDR(x))) +#define HW_FTM_CONF_WR(x, v) (ADDRESS_WRITE(hw_ftm_conf_t, HW_FTM_CONF_ADDR(x), v)) #define HW_FTM_CONF_SET(x, v) (HW_FTM_CONF_WR(x, HW_FTM_CONF_RD(x) | (v))) #define HW_FTM_CONF_CLR(x, v) (HW_FTM_CONF_WR(x, HW_FTM_CONF_RD(x) & ~(v))) #define HW_FTM_CONF_TOG(x, v) (HW_FTM_CONF_WR(x, HW_FTM_CONF_RD(x) ^ (v))) @@ -4390,7 +4397,7 @@ #define BS_FTM_CONF_NUMTOF (5U) /*!< Bit field size in bits for FTM_CONF_NUMTOF. */ /*! @brief Read current value of the FTM_CONF_NUMTOF field. */ -#define BR_FTM_CONF_NUMTOF(x) (HW_FTM_CONF(x).B.NUMTOF) +#define BR_FTM_CONF_NUMTOF(x) (UNION_READ(hw_ftm_conf_t, HW_FTM_CONF_ADDR(x), U, B.NUMTOF)) /*! @brief Format value for bitfield FTM_CONF_NUMTOF. */ #define BF_FTM_CONF_NUMTOF(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CONF_NUMTOF) & BM_FTM_CONF_NUMTOF) @@ -4410,7 +4417,7 @@ #define BS_FTM_CONF_BDMMODE (2U) /*!< Bit field size in bits for FTM_CONF_BDMMODE. */ /*! @brief Read current value of the FTM_CONF_BDMMODE field. */ -#define BR_FTM_CONF_BDMMODE(x) (HW_FTM_CONF(x).B.BDMMODE) +#define BR_FTM_CONF_BDMMODE(x) (UNION_READ(hw_ftm_conf_t, HW_FTM_CONF_ADDR(x), U, B.BDMMODE)) /*! @brief Format value for bitfield FTM_CONF_BDMMODE. */ #define BF_FTM_CONF_BDMMODE(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CONF_BDMMODE) & BM_FTM_CONF_BDMMODE) @@ -4435,13 +4442,13 @@ #define BS_FTM_CONF_GTBEEN (1U) /*!< Bit field size in bits for FTM_CONF_GTBEEN. */ /*! @brief Read current value of the FTM_CONF_GTBEEN field. */ -#define BR_FTM_CONF_GTBEEN(x) (BITBAND_ACCESS32(HW_FTM_CONF_ADDR(x), BP_FTM_CONF_GTBEEN)) +#define BR_FTM_CONF_GTBEEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_CONF_ADDR(x), BP_FTM_CONF_GTBEEN))) /*! @brief Format value for bitfield FTM_CONF_GTBEEN. */ #define BF_FTM_CONF_GTBEEN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CONF_GTBEEN) & BM_FTM_CONF_GTBEEN) /*! @brief Set the GTBEEN field to a new value. */ -#define BW_FTM_CONF_GTBEEN(x, v) (BITBAND_ACCESS32(HW_FTM_CONF_ADDR(x), BP_FTM_CONF_GTBEEN) = (v)) +#define BW_FTM_CONF_GTBEEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_CONF_ADDR(x), BP_FTM_CONF_GTBEEN), v)) /*@}*/ /*! @@ -4459,13 +4466,13 @@ #define BS_FTM_CONF_GTBEOUT (1U) /*!< Bit field size in bits for FTM_CONF_GTBEOUT. */ /*! @brief Read current value of the FTM_CONF_GTBEOUT field. */ -#define BR_FTM_CONF_GTBEOUT(x) (BITBAND_ACCESS32(HW_FTM_CONF_ADDR(x), BP_FTM_CONF_GTBEOUT)) +#define BR_FTM_CONF_GTBEOUT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_CONF_ADDR(x), BP_FTM_CONF_GTBEOUT))) /*! @brief Format value for bitfield FTM_CONF_GTBEOUT. */ #define BF_FTM_CONF_GTBEOUT(v) ((uint32_t)((uint32_t)(v) << BP_FTM_CONF_GTBEOUT) & BM_FTM_CONF_GTBEOUT) /*! @brief Set the GTBEOUT field to a new value. */ -#define BW_FTM_CONF_GTBEOUT(x, v) (BITBAND_ACCESS32(HW_FTM_CONF_ADDR(x), BP_FTM_CONF_GTBEOUT) = (v)) +#define BW_FTM_CONF_GTBEOUT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_CONF_ADDR(x), BP_FTM_CONF_GTBEOUT), v)) /*@}*/ /******************************************************************************* @@ -4499,8 +4506,8 @@ #define HW_FTM_FLTPOL_ADDR(x) ((x) + 0x88U) #define HW_FTM_FLTPOL(x) (*(__IO hw_ftm_fltpol_t *) HW_FTM_FLTPOL_ADDR(x)) -#define HW_FTM_FLTPOL_RD(x) (HW_FTM_FLTPOL(x).U) -#define HW_FTM_FLTPOL_WR(x, v) (HW_FTM_FLTPOL(x).U = (v)) +#define HW_FTM_FLTPOL_RD(x) (ADDRESS_READ(hw_ftm_fltpol_t, HW_FTM_FLTPOL_ADDR(x))) +#define HW_FTM_FLTPOL_WR(x, v) (ADDRESS_WRITE(hw_ftm_fltpol_t, HW_FTM_FLTPOL_ADDR(x), v)) #define HW_FTM_FLTPOL_SET(x, v) (HW_FTM_FLTPOL_WR(x, HW_FTM_FLTPOL_RD(x) | (v))) #define HW_FTM_FLTPOL_CLR(x, v) (HW_FTM_FLTPOL_WR(x, HW_FTM_FLTPOL_RD(x) & ~(v))) #define HW_FTM_FLTPOL_TOG(x, v) (HW_FTM_FLTPOL_WR(x, HW_FTM_FLTPOL_RD(x) ^ (v))) @@ -4528,13 +4535,13 @@ #define BS_FTM_FLTPOL_FLT0POL (1U) /*!< Bit field size in bits for FTM_FLTPOL_FLT0POL. */ /*! @brief Read current value of the FTM_FLTPOL_FLT0POL field. */ -#define BR_FTM_FLTPOL_FLT0POL(x) (BITBAND_ACCESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT0POL)) +#define BR_FTM_FLTPOL_FLT0POL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT0POL))) /*! @brief Format value for bitfield FTM_FLTPOL_FLT0POL. */ #define BF_FTM_FLTPOL_FLT0POL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTPOL_FLT0POL) & BM_FTM_FLTPOL_FLT0POL) /*! @brief Set the FLT0POL field to a new value. */ -#define BW_FTM_FLTPOL_FLT0POL(x, v) (BITBAND_ACCESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT0POL) = (v)) +#define BW_FTM_FLTPOL_FLT0POL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT0POL), v)) /*@}*/ /*! @@ -4555,13 +4562,13 @@ #define BS_FTM_FLTPOL_FLT1POL (1U) /*!< Bit field size in bits for FTM_FLTPOL_FLT1POL. */ /*! @brief Read current value of the FTM_FLTPOL_FLT1POL field. */ -#define BR_FTM_FLTPOL_FLT1POL(x) (BITBAND_ACCESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT1POL)) +#define BR_FTM_FLTPOL_FLT1POL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT1POL))) /*! @brief Format value for bitfield FTM_FLTPOL_FLT1POL. */ #define BF_FTM_FLTPOL_FLT1POL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTPOL_FLT1POL) & BM_FTM_FLTPOL_FLT1POL) /*! @brief Set the FLT1POL field to a new value. */ -#define BW_FTM_FLTPOL_FLT1POL(x, v) (BITBAND_ACCESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT1POL) = (v)) +#define BW_FTM_FLTPOL_FLT1POL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT1POL), v)) /*@}*/ /*! @@ -4582,13 +4589,13 @@ #define BS_FTM_FLTPOL_FLT2POL (1U) /*!< Bit field size in bits for FTM_FLTPOL_FLT2POL. */ /*! @brief Read current value of the FTM_FLTPOL_FLT2POL field. */ -#define BR_FTM_FLTPOL_FLT2POL(x) (BITBAND_ACCESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT2POL)) +#define BR_FTM_FLTPOL_FLT2POL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT2POL))) /*! @brief Format value for bitfield FTM_FLTPOL_FLT2POL. */ #define BF_FTM_FLTPOL_FLT2POL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTPOL_FLT2POL) & BM_FTM_FLTPOL_FLT2POL) /*! @brief Set the FLT2POL field to a new value. */ -#define BW_FTM_FLTPOL_FLT2POL(x, v) (BITBAND_ACCESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT2POL) = (v)) +#define BW_FTM_FLTPOL_FLT2POL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT2POL), v)) /*@}*/ /*! @@ -4609,13 +4616,13 @@ #define BS_FTM_FLTPOL_FLT3POL (1U) /*!< Bit field size in bits for FTM_FLTPOL_FLT3POL. */ /*! @brief Read current value of the FTM_FLTPOL_FLT3POL field. */ -#define BR_FTM_FLTPOL_FLT3POL(x) (BITBAND_ACCESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT3POL)) +#define BR_FTM_FLTPOL_FLT3POL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT3POL))) /*! @brief Format value for bitfield FTM_FLTPOL_FLT3POL. */ #define BF_FTM_FLTPOL_FLT3POL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_FLTPOL_FLT3POL) & BM_FTM_FLTPOL_FLT3POL) /*! @brief Set the FLT3POL field to a new value. */ -#define BW_FTM_FLTPOL_FLT3POL(x, v) (BITBAND_ACCESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT3POL) = (v)) +#define BW_FTM_FLTPOL_FLT3POL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_FLTPOL_ADDR(x), BP_FTM_FLTPOL_FLT3POL), v)) /*@}*/ /******************************************************************************* @@ -4666,8 +4673,8 @@ #define HW_FTM_SYNCONF_ADDR(x) ((x) + 0x8CU) #define HW_FTM_SYNCONF(x) (*(__IO hw_ftm_synconf_t *) HW_FTM_SYNCONF_ADDR(x)) -#define HW_FTM_SYNCONF_RD(x) (HW_FTM_SYNCONF(x).U) -#define HW_FTM_SYNCONF_WR(x, v) (HW_FTM_SYNCONF(x).U = (v)) +#define HW_FTM_SYNCONF_RD(x) (ADDRESS_READ(hw_ftm_synconf_t, HW_FTM_SYNCONF_ADDR(x))) +#define HW_FTM_SYNCONF_WR(x, v) (ADDRESS_WRITE(hw_ftm_synconf_t, HW_FTM_SYNCONF_ADDR(x), v)) #define HW_FTM_SYNCONF_SET(x, v) (HW_FTM_SYNCONF_WR(x, HW_FTM_SYNCONF_RD(x) | (v))) #define HW_FTM_SYNCONF_CLR(x, v) (HW_FTM_SYNCONF_WR(x, HW_FTM_SYNCONF_RD(x) & ~(v))) #define HW_FTM_SYNCONF_TOG(x, v) (HW_FTM_SYNCONF_WR(x, HW_FTM_SYNCONF_RD(x) ^ (v))) @@ -4692,13 +4699,13 @@ #define BS_FTM_SYNCONF_HWTRIGMODE (1U) /*!< Bit field size in bits for FTM_SYNCONF_HWTRIGMODE. */ /*! @brief Read current value of the FTM_SYNCONF_HWTRIGMODE field. */ -#define BR_FTM_SYNCONF_HWTRIGMODE(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWTRIGMODE)) +#define BR_FTM_SYNCONF_HWTRIGMODE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWTRIGMODE))) /*! @brief Format value for bitfield FTM_SYNCONF_HWTRIGMODE. */ #define BF_FTM_SYNCONF_HWTRIGMODE(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_HWTRIGMODE) & BM_FTM_SYNCONF_HWTRIGMODE) /*! @brief Set the HWTRIGMODE field to a new value. */ -#define BW_FTM_SYNCONF_HWTRIGMODE(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWTRIGMODE) = (v)) +#define BW_FTM_SYNCONF_HWTRIGMODE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWTRIGMODE), v)) /*@}*/ /*! @@ -4716,13 +4723,13 @@ #define BS_FTM_SYNCONF_CNTINC (1U) /*!< Bit field size in bits for FTM_SYNCONF_CNTINC. */ /*! @brief Read current value of the FTM_SYNCONF_CNTINC field. */ -#define BR_FTM_SYNCONF_CNTINC(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_CNTINC)) +#define BR_FTM_SYNCONF_CNTINC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_CNTINC))) /*! @brief Format value for bitfield FTM_SYNCONF_CNTINC. */ #define BF_FTM_SYNCONF_CNTINC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_CNTINC) & BM_FTM_SYNCONF_CNTINC) /*! @brief Set the CNTINC field to a new value. */ -#define BW_FTM_SYNCONF_CNTINC(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_CNTINC) = (v)) +#define BW_FTM_SYNCONF_CNTINC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_CNTINC), v)) /*@}*/ /*! @@ -4740,13 +4747,13 @@ #define BS_FTM_SYNCONF_INVC (1U) /*!< Bit field size in bits for FTM_SYNCONF_INVC. */ /*! @brief Read current value of the FTM_SYNCONF_INVC field. */ -#define BR_FTM_SYNCONF_INVC(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_INVC)) +#define BR_FTM_SYNCONF_INVC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_INVC))) /*! @brief Format value for bitfield FTM_SYNCONF_INVC. */ #define BF_FTM_SYNCONF_INVC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_INVC) & BM_FTM_SYNCONF_INVC) /*! @brief Set the INVC field to a new value. */ -#define BW_FTM_SYNCONF_INVC(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_INVC) = (v)) +#define BW_FTM_SYNCONF_INVC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_INVC), v)) /*@}*/ /*! @@ -4764,13 +4771,13 @@ #define BS_FTM_SYNCONF_SWOC (1U) /*!< Bit field size in bits for FTM_SYNCONF_SWOC. */ /*! @brief Read current value of the FTM_SYNCONF_SWOC field. */ -#define BR_FTM_SYNCONF_SWOC(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWOC)) +#define BR_FTM_SYNCONF_SWOC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWOC))) /*! @brief Format value for bitfield FTM_SYNCONF_SWOC. */ #define BF_FTM_SYNCONF_SWOC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_SWOC) & BM_FTM_SYNCONF_SWOC) /*! @brief Set the SWOC field to a new value. */ -#define BW_FTM_SYNCONF_SWOC(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWOC) = (v)) +#define BW_FTM_SYNCONF_SWOC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWOC), v)) /*@}*/ /*! @@ -4788,13 +4795,13 @@ #define BS_FTM_SYNCONF_SYNCMODE (1U) /*!< Bit field size in bits for FTM_SYNCONF_SYNCMODE. */ /*! @brief Read current value of the FTM_SYNCONF_SYNCMODE field. */ -#define BR_FTM_SYNCONF_SYNCMODE(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SYNCMODE)) +#define BR_FTM_SYNCONF_SYNCMODE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SYNCMODE))) /*! @brief Format value for bitfield FTM_SYNCONF_SYNCMODE. */ #define BF_FTM_SYNCONF_SYNCMODE(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_SYNCMODE) & BM_FTM_SYNCONF_SYNCMODE) /*! @brief Set the SYNCMODE field to a new value. */ -#define BW_FTM_SYNCONF_SYNCMODE(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SYNCMODE) = (v)) +#define BW_FTM_SYNCONF_SYNCMODE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SYNCMODE), v)) /*@}*/ /*! @@ -4812,13 +4819,13 @@ #define BS_FTM_SYNCONF_SWRSTCNT (1U) /*!< Bit field size in bits for FTM_SYNCONF_SWRSTCNT. */ /*! @brief Read current value of the FTM_SYNCONF_SWRSTCNT field. */ -#define BR_FTM_SYNCONF_SWRSTCNT(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWRSTCNT)) +#define BR_FTM_SYNCONF_SWRSTCNT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWRSTCNT))) /*! @brief Format value for bitfield FTM_SYNCONF_SWRSTCNT. */ #define BF_FTM_SYNCONF_SWRSTCNT(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_SWRSTCNT) & BM_FTM_SYNCONF_SWRSTCNT) /*! @brief Set the SWRSTCNT field to a new value. */ -#define BW_FTM_SYNCONF_SWRSTCNT(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWRSTCNT) = (v)) +#define BW_FTM_SYNCONF_SWRSTCNT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWRSTCNT), v)) /*@}*/ /*! @@ -4839,13 +4846,13 @@ #define BS_FTM_SYNCONF_SWWRBUF (1U) /*!< Bit field size in bits for FTM_SYNCONF_SWWRBUF. */ /*! @brief Read current value of the FTM_SYNCONF_SWWRBUF field. */ -#define BR_FTM_SYNCONF_SWWRBUF(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWWRBUF)) +#define BR_FTM_SYNCONF_SWWRBUF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWWRBUF))) /*! @brief Format value for bitfield FTM_SYNCONF_SWWRBUF. */ #define BF_FTM_SYNCONF_SWWRBUF(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_SWWRBUF) & BM_FTM_SYNCONF_SWWRBUF) /*! @brief Set the SWWRBUF field to a new value. */ -#define BW_FTM_SYNCONF_SWWRBUF(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWWRBUF) = (v)) +#define BW_FTM_SYNCONF_SWWRBUF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWWRBUF), v)) /*@}*/ /*! @@ -4864,13 +4871,13 @@ #define BS_FTM_SYNCONF_SWOM (1U) /*!< Bit field size in bits for FTM_SYNCONF_SWOM. */ /*! @brief Read current value of the FTM_SYNCONF_SWOM field. */ -#define BR_FTM_SYNCONF_SWOM(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWOM)) +#define BR_FTM_SYNCONF_SWOM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWOM))) /*! @brief Format value for bitfield FTM_SYNCONF_SWOM. */ #define BF_FTM_SYNCONF_SWOM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_SWOM) & BM_FTM_SYNCONF_SWOM) /*! @brief Set the SWOM field to a new value. */ -#define BW_FTM_SYNCONF_SWOM(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWOM) = (v)) +#define BW_FTM_SYNCONF_SWOM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWOM), v)) /*@}*/ /*! @@ -4889,13 +4896,13 @@ #define BS_FTM_SYNCONF_SWINVC (1U) /*!< Bit field size in bits for FTM_SYNCONF_SWINVC. */ /*! @brief Read current value of the FTM_SYNCONF_SWINVC field. */ -#define BR_FTM_SYNCONF_SWINVC(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWINVC)) +#define BR_FTM_SYNCONF_SWINVC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWINVC))) /*! @brief Format value for bitfield FTM_SYNCONF_SWINVC. */ #define BF_FTM_SYNCONF_SWINVC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_SWINVC) & BM_FTM_SYNCONF_SWINVC) /*! @brief Set the SWINVC field to a new value. */ -#define BW_FTM_SYNCONF_SWINVC(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWINVC) = (v)) +#define BW_FTM_SYNCONF_SWINVC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWINVC), v)) /*@}*/ /*! @@ -4914,13 +4921,13 @@ #define BS_FTM_SYNCONF_SWSOC (1U) /*!< Bit field size in bits for FTM_SYNCONF_SWSOC. */ /*! @brief Read current value of the FTM_SYNCONF_SWSOC field. */ -#define BR_FTM_SYNCONF_SWSOC(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWSOC)) +#define BR_FTM_SYNCONF_SWSOC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWSOC))) /*! @brief Format value for bitfield FTM_SYNCONF_SWSOC. */ #define BF_FTM_SYNCONF_SWSOC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_SWSOC) & BM_FTM_SYNCONF_SWSOC) /*! @brief Set the SWSOC field to a new value. */ -#define BW_FTM_SYNCONF_SWSOC(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWSOC) = (v)) +#define BW_FTM_SYNCONF_SWSOC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_SWSOC), v)) /*@}*/ /*! @@ -4938,13 +4945,13 @@ #define BS_FTM_SYNCONF_HWRSTCNT (1U) /*!< Bit field size in bits for FTM_SYNCONF_HWRSTCNT. */ /*! @brief Read current value of the FTM_SYNCONF_HWRSTCNT field. */ -#define BR_FTM_SYNCONF_HWRSTCNT(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWRSTCNT)) +#define BR_FTM_SYNCONF_HWRSTCNT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWRSTCNT))) /*! @brief Format value for bitfield FTM_SYNCONF_HWRSTCNT. */ #define BF_FTM_SYNCONF_HWRSTCNT(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_HWRSTCNT) & BM_FTM_SYNCONF_HWRSTCNT) /*! @brief Set the HWRSTCNT field to a new value. */ -#define BW_FTM_SYNCONF_HWRSTCNT(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWRSTCNT) = (v)) +#define BW_FTM_SYNCONF_HWRSTCNT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWRSTCNT), v)) /*@}*/ /*! @@ -4965,13 +4972,13 @@ #define BS_FTM_SYNCONF_HWWRBUF (1U) /*!< Bit field size in bits for FTM_SYNCONF_HWWRBUF. */ /*! @brief Read current value of the FTM_SYNCONF_HWWRBUF field. */ -#define BR_FTM_SYNCONF_HWWRBUF(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWWRBUF)) +#define BR_FTM_SYNCONF_HWWRBUF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWWRBUF))) /*! @brief Format value for bitfield FTM_SYNCONF_HWWRBUF. */ #define BF_FTM_SYNCONF_HWWRBUF(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_HWWRBUF) & BM_FTM_SYNCONF_HWWRBUF) /*! @brief Set the HWWRBUF field to a new value. */ -#define BW_FTM_SYNCONF_HWWRBUF(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWWRBUF) = (v)) +#define BW_FTM_SYNCONF_HWWRBUF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWWRBUF), v)) /*@}*/ /*! @@ -4990,13 +4997,13 @@ #define BS_FTM_SYNCONF_HWOM (1U) /*!< Bit field size in bits for FTM_SYNCONF_HWOM. */ /*! @brief Read current value of the FTM_SYNCONF_HWOM field. */ -#define BR_FTM_SYNCONF_HWOM(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWOM)) +#define BR_FTM_SYNCONF_HWOM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWOM))) /*! @brief Format value for bitfield FTM_SYNCONF_HWOM. */ #define BF_FTM_SYNCONF_HWOM(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_HWOM) & BM_FTM_SYNCONF_HWOM) /*! @brief Set the HWOM field to a new value. */ -#define BW_FTM_SYNCONF_HWOM(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWOM) = (v)) +#define BW_FTM_SYNCONF_HWOM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWOM), v)) /*@}*/ /*! @@ -5015,13 +5022,13 @@ #define BS_FTM_SYNCONF_HWINVC (1U) /*!< Bit field size in bits for FTM_SYNCONF_HWINVC. */ /*! @brief Read current value of the FTM_SYNCONF_HWINVC field. */ -#define BR_FTM_SYNCONF_HWINVC(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWINVC)) +#define BR_FTM_SYNCONF_HWINVC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWINVC))) /*! @brief Format value for bitfield FTM_SYNCONF_HWINVC. */ #define BF_FTM_SYNCONF_HWINVC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_HWINVC) & BM_FTM_SYNCONF_HWINVC) /*! @brief Set the HWINVC field to a new value. */ -#define BW_FTM_SYNCONF_HWINVC(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWINVC) = (v)) +#define BW_FTM_SYNCONF_HWINVC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWINVC), v)) /*@}*/ /*! @@ -5040,13 +5047,13 @@ #define BS_FTM_SYNCONF_HWSOC (1U) /*!< Bit field size in bits for FTM_SYNCONF_HWSOC. */ /*! @brief Read current value of the FTM_SYNCONF_HWSOC field. */ -#define BR_FTM_SYNCONF_HWSOC(x) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWSOC)) +#define BR_FTM_SYNCONF_HWSOC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWSOC))) /*! @brief Format value for bitfield FTM_SYNCONF_HWSOC. */ #define BF_FTM_SYNCONF_HWSOC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SYNCONF_HWSOC) & BM_FTM_SYNCONF_HWSOC) /*! @brief Set the HWSOC field to a new value. */ -#define BW_FTM_SYNCONF_HWSOC(x, v) (BITBAND_ACCESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWSOC) = (v)) +#define BW_FTM_SYNCONF_HWSOC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SYNCONF_ADDR(x), BP_FTM_SYNCONF_HWSOC), v)) /*@}*/ /******************************************************************************* @@ -5084,8 +5091,8 @@ #define HW_FTM_INVCTRL_ADDR(x) ((x) + 0x90U) #define HW_FTM_INVCTRL(x) (*(__IO hw_ftm_invctrl_t *) HW_FTM_INVCTRL_ADDR(x)) -#define HW_FTM_INVCTRL_RD(x) (HW_FTM_INVCTRL(x).U) -#define HW_FTM_INVCTRL_WR(x, v) (HW_FTM_INVCTRL(x).U = (v)) +#define HW_FTM_INVCTRL_RD(x) (ADDRESS_READ(hw_ftm_invctrl_t, HW_FTM_INVCTRL_ADDR(x))) +#define HW_FTM_INVCTRL_WR(x, v) (ADDRESS_WRITE(hw_ftm_invctrl_t, HW_FTM_INVCTRL_ADDR(x), v)) #define HW_FTM_INVCTRL_SET(x, v) (HW_FTM_INVCTRL_WR(x, HW_FTM_INVCTRL_RD(x) | (v))) #define HW_FTM_INVCTRL_CLR(x, v) (HW_FTM_INVCTRL_WR(x, HW_FTM_INVCTRL_RD(x) & ~(v))) #define HW_FTM_INVCTRL_TOG(x, v) (HW_FTM_INVCTRL_WR(x, HW_FTM_INVCTRL_RD(x) ^ (v))) @@ -5108,13 +5115,13 @@ #define BS_FTM_INVCTRL_INV0EN (1U) /*!< Bit field size in bits for FTM_INVCTRL_INV0EN. */ /*! @brief Read current value of the FTM_INVCTRL_INV0EN field. */ -#define BR_FTM_INVCTRL_INV0EN(x) (BITBAND_ACCESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV0EN)) +#define BR_FTM_INVCTRL_INV0EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV0EN))) /*! @brief Format value for bitfield FTM_INVCTRL_INV0EN. */ #define BF_FTM_INVCTRL_INV0EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_INVCTRL_INV0EN) & BM_FTM_INVCTRL_INV0EN) /*! @brief Set the INV0EN field to a new value. */ -#define BW_FTM_INVCTRL_INV0EN(x, v) (BITBAND_ACCESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV0EN) = (v)) +#define BW_FTM_INVCTRL_INV0EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV0EN), v)) /*@}*/ /*! @@ -5130,13 +5137,13 @@ #define BS_FTM_INVCTRL_INV1EN (1U) /*!< Bit field size in bits for FTM_INVCTRL_INV1EN. */ /*! @brief Read current value of the FTM_INVCTRL_INV1EN field. */ -#define BR_FTM_INVCTRL_INV1EN(x) (BITBAND_ACCESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV1EN)) +#define BR_FTM_INVCTRL_INV1EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV1EN))) /*! @brief Format value for bitfield FTM_INVCTRL_INV1EN. */ #define BF_FTM_INVCTRL_INV1EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_INVCTRL_INV1EN) & BM_FTM_INVCTRL_INV1EN) /*! @brief Set the INV1EN field to a new value. */ -#define BW_FTM_INVCTRL_INV1EN(x, v) (BITBAND_ACCESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV1EN) = (v)) +#define BW_FTM_INVCTRL_INV1EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV1EN), v)) /*@}*/ /*! @@ -5152,13 +5159,13 @@ #define BS_FTM_INVCTRL_INV2EN (1U) /*!< Bit field size in bits for FTM_INVCTRL_INV2EN. */ /*! @brief Read current value of the FTM_INVCTRL_INV2EN field. */ -#define BR_FTM_INVCTRL_INV2EN(x) (BITBAND_ACCESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV2EN)) +#define BR_FTM_INVCTRL_INV2EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV2EN))) /*! @brief Format value for bitfield FTM_INVCTRL_INV2EN. */ #define BF_FTM_INVCTRL_INV2EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_INVCTRL_INV2EN) & BM_FTM_INVCTRL_INV2EN) /*! @brief Set the INV2EN field to a new value. */ -#define BW_FTM_INVCTRL_INV2EN(x, v) (BITBAND_ACCESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV2EN) = (v)) +#define BW_FTM_INVCTRL_INV2EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV2EN), v)) /*@}*/ /*! @@ -5174,13 +5181,13 @@ #define BS_FTM_INVCTRL_INV3EN (1U) /*!< Bit field size in bits for FTM_INVCTRL_INV3EN. */ /*! @brief Read current value of the FTM_INVCTRL_INV3EN field. */ -#define BR_FTM_INVCTRL_INV3EN(x) (BITBAND_ACCESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV3EN)) +#define BR_FTM_INVCTRL_INV3EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV3EN))) /*! @brief Format value for bitfield FTM_INVCTRL_INV3EN. */ #define BF_FTM_INVCTRL_INV3EN(v) ((uint32_t)((uint32_t)(v) << BP_FTM_INVCTRL_INV3EN) & BM_FTM_INVCTRL_INV3EN) /*! @brief Set the INV3EN field to a new value. */ -#define BW_FTM_INVCTRL_INV3EN(x, v) (BITBAND_ACCESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV3EN) = (v)) +#define BW_FTM_INVCTRL_INV3EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_INVCTRL_ADDR(x), BP_FTM_INVCTRL_INV3EN), v)) /*@}*/ /******************************************************************************* @@ -5246,8 +5253,8 @@ #define HW_FTM_SWOCTRL_ADDR(x) ((x) + 0x94U) #define HW_FTM_SWOCTRL(x) (*(__IO hw_ftm_swoctrl_t *) HW_FTM_SWOCTRL_ADDR(x)) -#define HW_FTM_SWOCTRL_RD(x) (HW_FTM_SWOCTRL(x).U) -#define HW_FTM_SWOCTRL_WR(x, v) (HW_FTM_SWOCTRL(x).U = (v)) +#define HW_FTM_SWOCTRL_RD(x) (ADDRESS_READ(hw_ftm_swoctrl_t, HW_FTM_SWOCTRL_ADDR(x))) +#define HW_FTM_SWOCTRL_WR(x, v) (ADDRESS_WRITE(hw_ftm_swoctrl_t, HW_FTM_SWOCTRL_ADDR(x), v)) #define HW_FTM_SWOCTRL_SET(x, v) (HW_FTM_SWOCTRL_WR(x, HW_FTM_SWOCTRL_RD(x) | (v))) #define HW_FTM_SWOCTRL_CLR(x, v) (HW_FTM_SWOCTRL_WR(x, HW_FTM_SWOCTRL_RD(x) & ~(v))) #define HW_FTM_SWOCTRL_TOG(x, v) (HW_FTM_SWOCTRL_WR(x, HW_FTM_SWOCTRL_RD(x) ^ (v))) @@ -5270,13 +5277,13 @@ #define BS_FTM_SWOCTRL_CH0OC (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH0OC. */ /*! @brief Read current value of the FTM_SWOCTRL_CH0OC field. */ -#define BR_FTM_SWOCTRL_CH0OC(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH0OC)) +#define BR_FTM_SWOCTRL_CH0OC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH0OC))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH0OC. */ #define BF_FTM_SWOCTRL_CH0OC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH0OC) & BM_FTM_SWOCTRL_CH0OC) /*! @brief Set the CH0OC field to a new value. */ -#define BW_FTM_SWOCTRL_CH0OC(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH0OC) = (v)) +#define BW_FTM_SWOCTRL_CH0OC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH0OC), v)) /*@}*/ /*! @@ -5292,13 +5299,13 @@ #define BS_FTM_SWOCTRL_CH1OC (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH1OC. */ /*! @brief Read current value of the FTM_SWOCTRL_CH1OC field. */ -#define BR_FTM_SWOCTRL_CH1OC(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH1OC)) +#define BR_FTM_SWOCTRL_CH1OC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH1OC))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH1OC. */ #define BF_FTM_SWOCTRL_CH1OC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH1OC) & BM_FTM_SWOCTRL_CH1OC) /*! @brief Set the CH1OC field to a new value. */ -#define BW_FTM_SWOCTRL_CH1OC(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH1OC) = (v)) +#define BW_FTM_SWOCTRL_CH1OC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH1OC), v)) /*@}*/ /*! @@ -5314,13 +5321,13 @@ #define BS_FTM_SWOCTRL_CH2OC (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH2OC. */ /*! @brief Read current value of the FTM_SWOCTRL_CH2OC field. */ -#define BR_FTM_SWOCTRL_CH2OC(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH2OC)) +#define BR_FTM_SWOCTRL_CH2OC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH2OC))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH2OC. */ #define BF_FTM_SWOCTRL_CH2OC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH2OC) & BM_FTM_SWOCTRL_CH2OC) /*! @brief Set the CH2OC field to a new value. */ -#define BW_FTM_SWOCTRL_CH2OC(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH2OC) = (v)) +#define BW_FTM_SWOCTRL_CH2OC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH2OC), v)) /*@}*/ /*! @@ -5336,13 +5343,13 @@ #define BS_FTM_SWOCTRL_CH3OC (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH3OC. */ /*! @brief Read current value of the FTM_SWOCTRL_CH3OC field. */ -#define BR_FTM_SWOCTRL_CH3OC(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH3OC)) +#define BR_FTM_SWOCTRL_CH3OC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH3OC))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH3OC. */ #define BF_FTM_SWOCTRL_CH3OC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH3OC) & BM_FTM_SWOCTRL_CH3OC) /*! @brief Set the CH3OC field to a new value. */ -#define BW_FTM_SWOCTRL_CH3OC(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH3OC) = (v)) +#define BW_FTM_SWOCTRL_CH3OC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH3OC), v)) /*@}*/ /*! @@ -5358,13 +5365,13 @@ #define BS_FTM_SWOCTRL_CH4OC (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH4OC. */ /*! @brief Read current value of the FTM_SWOCTRL_CH4OC field. */ -#define BR_FTM_SWOCTRL_CH4OC(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH4OC)) +#define BR_FTM_SWOCTRL_CH4OC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH4OC))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH4OC. */ #define BF_FTM_SWOCTRL_CH4OC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH4OC) & BM_FTM_SWOCTRL_CH4OC) /*! @brief Set the CH4OC field to a new value. */ -#define BW_FTM_SWOCTRL_CH4OC(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH4OC) = (v)) +#define BW_FTM_SWOCTRL_CH4OC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH4OC), v)) /*@}*/ /*! @@ -5380,13 +5387,13 @@ #define BS_FTM_SWOCTRL_CH5OC (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH5OC. */ /*! @brief Read current value of the FTM_SWOCTRL_CH5OC field. */ -#define BR_FTM_SWOCTRL_CH5OC(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH5OC)) +#define BR_FTM_SWOCTRL_CH5OC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH5OC))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH5OC. */ #define BF_FTM_SWOCTRL_CH5OC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH5OC) & BM_FTM_SWOCTRL_CH5OC) /*! @brief Set the CH5OC field to a new value. */ -#define BW_FTM_SWOCTRL_CH5OC(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH5OC) = (v)) +#define BW_FTM_SWOCTRL_CH5OC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH5OC), v)) /*@}*/ /*! @@ -5402,13 +5409,13 @@ #define BS_FTM_SWOCTRL_CH6OC (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH6OC. */ /*! @brief Read current value of the FTM_SWOCTRL_CH6OC field. */ -#define BR_FTM_SWOCTRL_CH6OC(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH6OC)) +#define BR_FTM_SWOCTRL_CH6OC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH6OC))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH6OC. */ #define BF_FTM_SWOCTRL_CH6OC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH6OC) & BM_FTM_SWOCTRL_CH6OC) /*! @brief Set the CH6OC field to a new value. */ -#define BW_FTM_SWOCTRL_CH6OC(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH6OC) = (v)) +#define BW_FTM_SWOCTRL_CH6OC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH6OC), v)) /*@}*/ /*! @@ -5424,13 +5431,13 @@ #define BS_FTM_SWOCTRL_CH7OC (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH7OC. */ /*! @brief Read current value of the FTM_SWOCTRL_CH7OC field. */ -#define BR_FTM_SWOCTRL_CH7OC(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH7OC)) +#define BR_FTM_SWOCTRL_CH7OC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH7OC))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH7OC. */ #define BF_FTM_SWOCTRL_CH7OC(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH7OC) & BM_FTM_SWOCTRL_CH7OC) /*! @brief Set the CH7OC field to a new value. */ -#define BW_FTM_SWOCTRL_CH7OC(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH7OC) = (v)) +#define BW_FTM_SWOCTRL_CH7OC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH7OC), v)) /*@}*/ /*! @@ -5446,13 +5453,13 @@ #define BS_FTM_SWOCTRL_CH0OCV (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH0OCV. */ /*! @brief Read current value of the FTM_SWOCTRL_CH0OCV field. */ -#define BR_FTM_SWOCTRL_CH0OCV(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH0OCV)) +#define BR_FTM_SWOCTRL_CH0OCV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH0OCV))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH0OCV. */ #define BF_FTM_SWOCTRL_CH0OCV(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH0OCV) & BM_FTM_SWOCTRL_CH0OCV) /*! @brief Set the CH0OCV field to a new value. */ -#define BW_FTM_SWOCTRL_CH0OCV(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH0OCV) = (v)) +#define BW_FTM_SWOCTRL_CH0OCV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH0OCV), v)) /*@}*/ /*! @@ -5468,13 +5475,13 @@ #define BS_FTM_SWOCTRL_CH1OCV (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH1OCV. */ /*! @brief Read current value of the FTM_SWOCTRL_CH1OCV field. */ -#define BR_FTM_SWOCTRL_CH1OCV(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH1OCV)) +#define BR_FTM_SWOCTRL_CH1OCV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH1OCV))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH1OCV. */ #define BF_FTM_SWOCTRL_CH1OCV(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH1OCV) & BM_FTM_SWOCTRL_CH1OCV) /*! @brief Set the CH1OCV field to a new value. */ -#define BW_FTM_SWOCTRL_CH1OCV(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH1OCV) = (v)) +#define BW_FTM_SWOCTRL_CH1OCV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH1OCV), v)) /*@}*/ /*! @@ -5490,13 +5497,13 @@ #define BS_FTM_SWOCTRL_CH2OCV (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH2OCV. */ /*! @brief Read current value of the FTM_SWOCTRL_CH2OCV field. */ -#define BR_FTM_SWOCTRL_CH2OCV(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH2OCV)) +#define BR_FTM_SWOCTRL_CH2OCV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH2OCV))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH2OCV. */ #define BF_FTM_SWOCTRL_CH2OCV(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH2OCV) & BM_FTM_SWOCTRL_CH2OCV) /*! @brief Set the CH2OCV field to a new value. */ -#define BW_FTM_SWOCTRL_CH2OCV(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH2OCV) = (v)) +#define BW_FTM_SWOCTRL_CH2OCV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH2OCV), v)) /*@}*/ /*! @@ -5512,13 +5519,13 @@ #define BS_FTM_SWOCTRL_CH3OCV (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH3OCV. */ /*! @brief Read current value of the FTM_SWOCTRL_CH3OCV field. */ -#define BR_FTM_SWOCTRL_CH3OCV(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH3OCV)) +#define BR_FTM_SWOCTRL_CH3OCV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH3OCV))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH3OCV. */ #define BF_FTM_SWOCTRL_CH3OCV(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH3OCV) & BM_FTM_SWOCTRL_CH3OCV) /*! @brief Set the CH3OCV field to a new value. */ -#define BW_FTM_SWOCTRL_CH3OCV(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH3OCV) = (v)) +#define BW_FTM_SWOCTRL_CH3OCV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH3OCV), v)) /*@}*/ /*! @@ -5534,13 +5541,13 @@ #define BS_FTM_SWOCTRL_CH4OCV (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH4OCV. */ /*! @brief Read current value of the FTM_SWOCTRL_CH4OCV field. */ -#define BR_FTM_SWOCTRL_CH4OCV(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH4OCV)) +#define BR_FTM_SWOCTRL_CH4OCV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH4OCV))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH4OCV. */ #define BF_FTM_SWOCTRL_CH4OCV(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH4OCV) & BM_FTM_SWOCTRL_CH4OCV) /*! @brief Set the CH4OCV field to a new value. */ -#define BW_FTM_SWOCTRL_CH4OCV(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH4OCV) = (v)) +#define BW_FTM_SWOCTRL_CH4OCV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH4OCV), v)) /*@}*/ /*! @@ -5556,13 +5563,13 @@ #define BS_FTM_SWOCTRL_CH5OCV (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH5OCV. */ /*! @brief Read current value of the FTM_SWOCTRL_CH5OCV field. */ -#define BR_FTM_SWOCTRL_CH5OCV(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH5OCV)) +#define BR_FTM_SWOCTRL_CH5OCV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH5OCV))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH5OCV. */ #define BF_FTM_SWOCTRL_CH5OCV(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH5OCV) & BM_FTM_SWOCTRL_CH5OCV) /*! @brief Set the CH5OCV field to a new value. */ -#define BW_FTM_SWOCTRL_CH5OCV(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH5OCV) = (v)) +#define BW_FTM_SWOCTRL_CH5OCV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH5OCV), v)) /*@}*/ /*! @@ -5578,13 +5585,13 @@ #define BS_FTM_SWOCTRL_CH6OCV (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH6OCV. */ /*! @brief Read current value of the FTM_SWOCTRL_CH6OCV field. */ -#define BR_FTM_SWOCTRL_CH6OCV(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH6OCV)) +#define BR_FTM_SWOCTRL_CH6OCV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH6OCV))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH6OCV. */ #define BF_FTM_SWOCTRL_CH6OCV(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH6OCV) & BM_FTM_SWOCTRL_CH6OCV) /*! @brief Set the CH6OCV field to a new value. */ -#define BW_FTM_SWOCTRL_CH6OCV(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH6OCV) = (v)) +#define BW_FTM_SWOCTRL_CH6OCV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH6OCV), v)) /*@}*/ /*! @@ -5600,13 +5607,13 @@ #define BS_FTM_SWOCTRL_CH7OCV (1U) /*!< Bit field size in bits for FTM_SWOCTRL_CH7OCV. */ /*! @brief Read current value of the FTM_SWOCTRL_CH7OCV field. */ -#define BR_FTM_SWOCTRL_CH7OCV(x) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH7OCV)) +#define BR_FTM_SWOCTRL_CH7OCV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH7OCV))) /*! @brief Format value for bitfield FTM_SWOCTRL_CH7OCV. */ #define BF_FTM_SWOCTRL_CH7OCV(v) ((uint32_t)((uint32_t)(v) << BP_FTM_SWOCTRL_CH7OCV) & BM_FTM_SWOCTRL_CH7OCV) /*! @brief Set the CH7OCV field to a new value. */ -#define BW_FTM_SWOCTRL_CH7OCV(x, v) (BITBAND_ACCESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH7OCV) = (v)) +#define BW_FTM_SWOCTRL_CH7OCV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_SWOCTRL_ADDR(x), BP_FTM_SWOCTRL_CH7OCV), v)) /*@}*/ /******************************************************************************* @@ -5649,8 +5656,8 @@ #define HW_FTM_PWMLOAD_ADDR(x) ((x) + 0x98U) #define HW_FTM_PWMLOAD(x) (*(__IO hw_ftm_pwmload_t *) HW_FTM_PWMLOAD_ADDR(x)) -#define HW_FTM_PWMLOAD_RD(x) (HW_FTM_PWMLOAD(x).U) -#define HW_FTM_PWMLOAD_WR(x, v) (HW_FTM_PWMLOAD(x).U = (v)) +#define HW_FTM_PWMLOAD_RD(x) (ADDRESS_READ(hw_ftm_pwmload_t, HW_FTM_PWMLOAD_ADDR(x))) +#define HW_FTM_PWMLOAD_WR(x, v) (ADDRESS_WRITE(hw_ftm_pwmload_t, HW_FTM_PWMLOAD_ADDR(x), v)) #define HW_FTM_PWMLOAD_SET(x, v) (HW_FTM_PWMLOAD_WR(x, HW_FTM_PWMLOAD_RD(x) | (v))) #define HW_FTM_PWMLOAD_CLR(x, v) (HW_FTM_PWMLOAD_WR(x, HW_FTM_PWMLOAD_RD(x) & ~(v))) #define HW_FTM_PWMLOAD_TOG(x, v) (HW_FTM_PWMLOAD_WR(x, HW_FTM_PWMLOAD_RD(x) ^ (v))) @@ -5673,13 +5680,13 @@ #define BS_FTM_PWMLOAD_CH0SEL (1U) /*!< Bit field size in bits for FTM_PWMLOAD_CH0SEL. */ /*! @brief Read current value of the FTM_PWMLOAD_CH0SEL field. */ -#define BR_FTM_PWMLOAD_CH0SEL(x) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH0SEL)) +#define BR_FTM_PWMLOAD_CH0SEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH0SEL))) /*! @brief Format value for bitfield FTM_PWMLOAD_CH0SEL. */ #define BF_FTM_PWMLOAD_CH0SEL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_PWMLOAD_CH0SEL) & BM_FTM_PWMLOAD_CH0SEL) /*! @brief Set the CH0SEL field to a new value. */ -#define BW_FTM_PWMLOAD_CH0SEL(x, v) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH0SEL) = (v)) +#define BW_FTM_PWMLOAD_CH0SEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH0SEL), v)) /*@}*/ /*! @@ -5695,13 +5702,13 @@ #define BS_FTM_PWMLOAD_CH1SEL (1U) /*!< Bit field size in bits for FTM_PWMLOAD_CH1SEL. */ /*! @brief Read current value of the FTM_PWMLOAD_CH1SEL field. */ -#define BR_FTM_PWMLOAD_CH1SEL(x) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH1SEL)) +#define BR_FTM_PWMLOAD_CH1SEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH1SEL))) /*! @brief Format value for bitfield FTM_PWMLOAD_CH1SEL. */ #define BF_FTM_PWMLOAD_CH1SEL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_PWMLOAD_CH1SEL) & BM_FTM_PWMLOAD_CH1SEL) /*! @brief Set the CH1SEL field to a new value. */ -#define BW_FTM_PWMLOAD_CH1SEL(x, v) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH1SEL) = (v)) +#define BW_FTM_PWMLOAD_CH1SEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH1SEL), v)) /*@}*/ /*! @@ -5717,13 +5724,13 @@ #define BS_FTM_PWMLOAD_CH2SEL (1U) /*!< Bit field size in bits for FTM_PWMLOAD_CH2SEL. */ /*! @brief Read current value of the FTM_PWMLOAD_CH2SEL field. */ -#define BR_FTM_PWMLOAD_CH2SEL(x) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH2SEL)) +#define BR_FTM_PWMLOAD_CH2SEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH2SEL))) /*! @brief Format value for bitfield FTM_PWMLOAD_CH2SEL. */ #define BF_FTM_PWMLOAD_CH2SEL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_PWMLOAD_CH2SEL) & BM_FTM_PWMLOAD_CH2SEL) /*! @brief Set the CH2SEL field to a new value. */ -#define BW_FTM_PWMLOAD_CH2SEL(x, v) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH2SEL) = (v)) +#define BW_FTM_PWMLOAD_CH2SEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH2SEL), v)) /*@}*/ /*! @@ -5739,13 +5746,13 @@ #define BS_FTM_PWMLOAD_CH3SEL (1U) /*!< Bit field size in bits for FTM_PWMLOAD_CH3SEL. */ /*! @brief Read current value of the FTM_PWMLOAD_CH3SEL field. */ -#define BR_FTM_PWMLOAD_CH3SEL(x) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH3SEL)) +#define BR_FTM_PWMLOAD_CH3SEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH3SEL))) /*! @brief Format value for bitfield FTM_PWMLOAD_CH3SEL. */ #define BF_FTM_PWMLOAD_CH3SEL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_PWMLOAD_CH3SEL) & BM_FTM_PWMLOAD_CH3SEL) /*! @brief Set the CH3SEL field to a new value. */ -#define BW_FTM_PWMLOAD_CH3SEL(x, v) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH3SEL) = (v)) +#define BW_FTM_PWMLOAD_CH3SEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH3SEL), v)) /*@}*/ /*! @@ -5761,13 +5768,13 @@ #define BS_FTM_PWMLOAD_CH4SEL (1U) /*!< Bit field size in bits for FTM_PWMLOAD_CH4SEL. */ /*! @brief Read current value of the FTM_PWMLOAD_CH4SEL field. */ -#define BR_FTM_PWMLOAD_CH4SEL(x) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH4SEL)) +#define BR_FTM_PWMLOAD_CH4SEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH4SEL))) /*! @brief Format value for bitfield FTM_PWMLOAD_CH4SEL. */ #define BF_FTM_PWMLOAD_CH4SEL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_PWMLOAD_CH4SEL) & BM_FTM_PWMLOAD_CH4SEL) /*! @brief Set the CH4SEL field to a new value. */ -#define BW_FTM_PWMLOAD_CH4SEL(x, v) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH4SEL) = (v)) +#define BW_FTM_PWMLOAD_CH4SEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH4SEL), v)) /*@}*/ /*! @@ -5783,13 +5790,13 @@ #define BS_FTM_PWMLOAD_CH5SEL (1U) /*!< Bit field size in bits for FTM_PWMLOAD_CH5SEL. */ /*! @brief Read current value of the FTM_PWMLOAD_CH5SEL field. */ -#define BR_FTM_PWMLOAD_CH5SEL(x) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH5SEL)) +#define BR_FTM_PWMLOAD_CH5SEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH5SEL))) /*! @brief Format value for bitfield FTM_PWMLOAD_CH5SEL. */ #define BF_FTM_PWMLOAD_CH5SEL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_PWMLOAD_CH5SEL) & BM_FTM_PWMLOAD_CH5SEL) /*! @brief Set the CH5SEL field to a new value. */ -#define BW_FTM_PWMLOAD_CH5SEL(x, v) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH5SEL) = (v)) +#define BW_FTM_PWMLOAD_CH5SEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH5SEL), v)) /*@}*/ /*! @@ -5805,13 +5812,13 @@ #define BS_FTM_PWMLOAD_CH6SEL (1U) /*!< Bit field size in bits for FTM_PWMLOAD_CH6SEL. */ /*! @brief Read current value of the FTM_PWMLOAD_CH6SEL field. */ -#define BR_FTM_PWMLOAD_CH6SEL(x) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH6SEL)) +#define BR_FTM_PWMLOAD_CH6SEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH6SEL))) /*! @brief Format value for bitfield FTM_PWMLOAD_CH6SEL. */ #define BF_FTM_PWMLOAD_CH6SEL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_PWMLOAD_CH6SEL) & BM_FTM_PWMLOAD_CH6SEL) /*! @brief Set the CH6SEL field to a new value. */ -#define BW_FTM_PWMLOAD_CH6SEL(x, v) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH6SEL) = (v)) +#define BW_FTM_PWMLOAD_CH6SEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH6SEL), v)) /*@}*/ /*! @@ -5827,13 +5834,13 @@ #define BS_FTM_PWMLOAD_CH7SEL (1U) /*!< Bit field size in bits for FTM_PWMLOAD_CH7SEL. */ /*! @brief Read current value of the FTM_PWMLOAD_CH7SEL field. */ -#define BR_FTM_PWMLOAD_CH7SEL(x) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH7SEL)) +#define BR_FTM_PWMLOAD_CH7SEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH7SEL))) /*! @brief Format value for bitfield FTM_PWMLOAD_CH7SEL. */ #define BF_FTM_PWMLOAD_CH7SEL(v) ((uint32_t)((uint32_t)(v) << BP_FTM_PWMLOAD_CH7SEL) & BM_FTM_PWMLOAD_CH7SEL) /*! @brief Set the CH7SEL field to a new value. */ -#define BW_FTM_PWMLOAD_CH7SEL(x, v) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH7SEL) = (v)) +#define BW_FTM_PWMLOAD_CH7SEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_CH7SEL), v)) /*@}*/ /*! @@ -5852,13 +5859,13 @@ #define BS_FTM_PWMLOAD_LDOK (1U) /*!< Bit field size in bits for FTM_PWMLOAD_LDOK. */ /*! @brief Read current value of the FTM_PWMLOAD_LDOK field. */ -#define BR_FTM_PWMLOAD_LDOK(x) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_LDOK)) +#define BR_FTM_PWMLOAD_LDOK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_LDOK))) /*! @brief Format value for bitfield FTM_PWMLOAD_LDOK. */ #define BF_FTM_PWMLOAD_LDOK(v) ((uint32_t)((uint32_t)(v) << BP_FTM_PWMLOAD_LDOK) & BM_FTM_PWMLOAD_LDOK) /*! @brief Set the LDOK field to a new value. */ -#define BW_FTM_PWMLOAD_LDOK(x, v) (BITBAND_ACCESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_LDOK) = (v)) +#define BW_FTM_PWMLOAD_LDOK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FTM_PWMLOAD_ADDR(x), BP_FTM_PWMLOAD_LDOK), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_gpio.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_gpio.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -136,8 +143,8 @@ #define HW_GPIO_PDOR_ADDR(x) ((x) + 0x0U) #define HW_GPIO_PDOR(x) (*(__IO hw_gpio_pdor_t *) HW_GPIO_PDOR_ADDR(x)) -#define HW_GPIO_PDOR_RD(x) (HW_GPIO_PDOR(x).U) -#define HW_GPIO_PDOR_WR(x, v) (HW_GPIO_PDOR(x).U = (v)) +#define HW_GPIO_PDOR_RD(x) (ADDRESS_READ(hw_gpio_pdor_t, HW_GPIO_PDOR_ADDR(x))) +#define HW_GPIO_PDOR_WR(x, v) (ADDRESS_WRITE(hw_gpio_pdor_t, HW_GPIO_PDOR_ADDR(x), v)) #define HW_GPIO_PDOR_SET(x, v) (HW_GPIO_PDOR_WR(x, HW_GPIO_PDOR_RD(x) | (v))) #define HW_GPIO_PDOR_CLR(x, v) (HW_GPIO_PDOR_WR(x, HW_GPIO_PDOR_RD(x) & ~(v))) #define HW_GPIO_PDOR_TOG(x, v) (HW_GPIO_PDOR_WR(x, HW_GPIO_PDOR_RD(x) ^ (v))) @@ -200,8 +207,8 @@ #define HW_GPIO_PSOR_ADDR(x) ((x) + 0x4U) #define HW_GPIO_PSOR(x) (*(__O hw_gpio_psor_t *) HW_GPIO_PSOR_ADDR(x)) -#define HW_GPIO_PSOR_RD(x) (HW_GPIO_PSOR(x).U) -#define HW_GPIO_PSOR_WR(x, v) (HW_GPIO_PSOR(x).U = (v)) +#define HW_GPIO_PSOR_RD(x) (ADDRESS_READ(hw_gpio_psor_t, HW_GPIO_PSOR_ADDR(x))) +#define HW_GPIO_PSOR_WR(x, v) (ADDRESS_WRITE(hw_gpio_psor_t, HW_GPIO_PSOR_ADDR(x), v)) /*@}*/ /* @@ -257,8 +264,8 @@ #define HW_GPIO_PCOR_ADDR(x) ((x) + 0x8U) #define HW_GPIO_PCOR(x) (*(__O hw_gpio_pcor_t *) HW_GPIO_PCOR_ADDR(x)) -#define HW_GPIO_PCOR_RD(x) (HW_GPIO_PCOR(x).U) -#define HW_GPIO_PCOR_WR(x, v) (HW_GPIO_PCOR(x).U = (v)) +#define HW_GPIO_PCOR_RD(x) (ADDRESS_READ(hw_gpio_pcor_t, HW_GPIO_PCOR_ADDR(x))) +#define HW_GPIO_PCOR_WR(x, v) (ADDRESS_WRITE(hw_gpio_pcor_t, HW_GPIO_PCOR_ADDR(x), v)) /*@}*/ /* @@ -312,8 +319,8 @@ #define HW_GPIO_PTOR_ADDR(x) ((x) + 0xCU) #define HW_GPIO_PTOR(x) (*(__O hw_gpio_ptor_t *) HW_GPIO_PTOR_ADDR(x)) -#define HW_GPIO_PTOR_RD(x) (HW_GPIO_PTOR(x).U) -#define HW_GPIO_PTOR_WR(x, v) (HW_GPIO_PTOR(x).U = (v)) +#define HW_GPIO_PTOR_RD(x) (ADDRESS_READ(hw_gpio_ptor_t, HW_GPIO_PTOR_ADDR(x))) +#define HW_GPIO_PTOR_WR(x, v) (ADDRESS_WRITE(hw_gpio_ptor_t, HW_GPIO_PTOR_ADDR(x), v)) /*@}*/ /* @@ -372,7 +379,7 @@ #define HW_GPIO_PDIR_ADDR(x) ((x) + 0x10U) #define HW_GPIO_PDIR(x) (*(__I hw_gpio_pdir_t *) HW_GPIO_PDIR_ADDR(x)) -#define HW_GPIO_PDIR_RD(x) (HW_GPIO_PDIR(x).U) +#define HW_GPIO_PDIR_RD(x) (ADDRESS_READ(hw_gpio_pdir_t, HW_GPIO_PDIR_ADDR(x))) /*@}*/ /* @@ -427,8 +434,8 @@ #define HW_GPIO_PDDR_ADDR(x) ((x) + 0x14U) #define HW_GPIO_PDDR(x) (*(__IO hw_gpio_pddr_t *) HW_GPIO_PDDR_ADDR(x)) -#define HW_GPIO_PDDR_RD(x) (HW_GPIO_PDDR(x).U) -#define HW_GPIO_PDDR_WR(x, v) (HW_GPIO_PDDR(x).U = (v)) +#define HW_GPIO_PDDR_RD(x) (ADDRESS_READ(hw_gpio_pddr_t, HW_GPIO_PDDR_ADDR(x))) +#define HW_GPIO_PDDR_WR(x, v) (ADDRESS_WRITE(hw_gpio_pddr_t, HW_GPIO_PDDR_ADDR(x), v)) #define HW_GPIO_PDDR_SET(x, v) (HW_GPIO_PDDR_WR(x, HW_GPIO_PDDR_RD(x) | (v))) #define HW_GPIO_PDDR_CLR(x, v) (HW_GPIO_PDDR_WR(x, HW_GPIO_PDDR_RD(x) & ~(v))) #define HW_GPIO_PDDR_TOG(x, v) (HW_GPIO_PDDR_WR(x, HW_GPIO_PDDR_RD(x) ^ (v)))
--- a/hal/device/device/MK64F12/MK64F12_i2c.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_i2c.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -138,8 +145,8 @@ #define HW_I2C_A1_ADDR(x) ((x) + 0x0U) #define HW_I2C_A1(x) (*(__IO hw_i2c_a1_t *) HW_I2C_A1_ADDR(x)) -#define HW_I2C_A1_RD(x) (HW_I2C_A1(x).U) -#define HW_I2C_A1_WR(x, v) (HW_I2C_A1(x).U = (v)) +#define HW_I2C_A1_RD(x) (ADDRESS_READ(hw_i2c_a1_t, HW_I2C_A1_ADDR(x))) +#define HW_I2C_A1_WR(x, v) (ADDRESS_WRITE(hw_i2c_a1_t, HW_I2C_A1_ADDR(x), v)) #define HW_I2C_A1_SET(x, v) (HW_I2C_A1_WR(x, HW_I2C_A1_RD(x) | (v))) #define HW_I2C_A1_CLR(x, v) (HW_I2C_A1_WR(x, HW_I2C_A1_RD(x) & ~(v))) #define HW_I2C_A1_TOG(x, v) (HW_I2C_A1_WR(x, HW_I2C_A1_RD(x) ^ (v))) @@ -162,7 +169,7 @@ #define BS_I2C_A1_AD (7U) /*!< Bit field size in bits for I2C_A1_AD. */ /*! @brief Read current value of the I2C_A1_AD field. */ -#define BR_I2C_A1_AD(x) (HW_I2C_A1(x).B.AD) +#define BR_I2C_A1_AD(x) (UNION_READ(hw_i2c_a1_t, HW_I2C_A1_ADDR(x), U, B.AD)) /*! @brief Format value for bitfield I2C_A1_AD. */ #define BF_I2C_A1_AD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_A1_AD) & BM_I2C_A1_AD) @@ -197,8 +204,8 @@ #define HW_I2C_F_ADDR(x) ((x) + 0x1U) #define HW_I2C_F(x) (*(__IO hw_i2c_f_t *) HW_I2C_F_ADDR(x)) -#define HW_I2C_F_RD(x) (HW_I2C_F(x).U) -#define HW_I2C_F_WR(x, v) (HW_I2C_F(x).U = (v)) +#define HW_I2C_F_RD(x) (ADDRESS_READ(hw_i2c_f_t, HW_I2C_F_ADDR(x))) +#define HW_I2C_F_WR(x, v) (ADDRESS_WRITE(hw_i2c_f_t, HW_I2C_F_ADDR(x), v)) #define HW_I2C_F_SET(x, v) (HW_I2C_F_WR(x, HW_I2C_F_RD(x) | (v))) #define HW_I2C_F_CLR(x, v) (HW_I2C_F_WR(x, HW_I2C_F_RD(x) & ~(v))) #define HW_I2C_F_TOG(x, v) (HW_I2C_F_WR(x, HW_I2C_F_RD(x) ^ (v))) @@ -237,7 +244,7 @@ #define BS_I2C_F_ICR (6U) /*!< Bit field size in bits for I2C_F_ICR. */ /*! @brief Read current value of the I2C_F_ICR field. */ -#define BR_I2C_F_ICR(x) (HW_I2C_F(x).B.ICR) +#define BR_I2C_F_ICR(x) (UNION_READ(hw_i2c_f_t, HW_I2C_F_ADDR(x), U, B.ICR)) /*! @brief Format value for bitfield I2C_F_ICR. */ #define BF_I2C_F_ICR(v) ((uint8_t)((uint8_t)(v) << BP_I2C_F_ICR) & BM_I2C_F_ICR) @@ -264,7 +271,7 @@ #define BS_I2C_F_MULT (2U) /*!< Bit field size in bits for I2C_F_MULT. */ /*! @brief Read current value of the I2C_F_MULT field. */ -#define BR_I2C_F_MULT(x) (HW_I2C_F(x).B.MULT) +#define BR_I2C_F_MULT(x) (UNION_READ(hw_i2c_f_t, HW_I2C_F_ADDR(x), U, B.MULT)) /*! @brief Format value for bitfield I2C_F_MULT. */ #define BF_I2C_F_MULT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_F_MULT) & BM_I2C_F_MULT) @@ -305,8 +312,8 @@ #define HW_I2C_C1_ADDR(x) ((x) + 0x2U) #define HW_I2C_C1(x) (*(__IO hw_i2c_c1_t *) HW_I2C_C1_ADDR(x)) -#define HW_I2C_C1_RD(x) (HW_I2C_C1(x).U) -#define HW_I2C_C1_WR(x, v) (HW_I2C_C1(x).U = (v)) +#define HW_I2C_C1_RD(x) (ADDRESS_READ(hw_i2c_c1_t, HW_I2C_C1_ADDR(x))) +#define HW_I2C_C1_WR(x, v) (ADDRESS_WRITE(hw_i2c_c1_t, HW_I2C_C1_ADDR(x), v)) #define HW_I2C_C1_SET(x, v) (HW_I2C_C1_WR(x, HW_I2C_C1_RD(x) | (v))) #define HW_I2C_C1_CLR(x, v) (HW_I2C_C1_WR(x, HW_I2C_C1_RD(x) & ~(v))) #define HW_I2C_C1_TOG(x, v) (HW_I2C_C1_WR(x, HW_I2C_C1_RD(x) ^ (v))) @@ -340,13 +347,13 @@ #define BS_I2C_C1_DMAEN (1U) /*!< Bit field size in bits for I2C_C1_DMAEN. */ /*! @brief Read current value of the I2C_C1_DMAEN field. */ -#define BR_I2C_C1_DMAEN(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN)) +#define BR_I2C_C1_DMAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN))) /*! @brief Format value for bitfield I2C_C1_DMAEN. */ #define BF_I2C_C1_DMAEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_DMAEN) & BM_I2C_C1_DMAEN) /*! @brief Set the DMAEN field to a new value. */ -#define BW_I2C_C1_DMAEN(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN) = (v)) +#define BW_I2C_C1_DMAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN), v)) /*@}*/ /*! @@ -366,13 +373,13 @@ #define BS_I2C_C1_WUEN (1U) /*!< Bit field size in bits for I2C_C1_WUEN. */ /*! @brief Read current value of the I2C_C1_WUEN field. */ -#define BR_I2C_C1_WUEN(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN)) +#define BR_I2C_C1_WUEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN))) /*! @brief Format value for bitfield I2C_C1_WUEN. */ #define BF_I2C_C1_WUEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_WUEN) & BM_I2C_C1_WUEN) /*! @brief Set the WUEN field to a new value. */ -#define BW_I2C_C1_WUEN(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN) = (v)) +#define BW_I2C_C1_WUEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN), v)) /*@}*/ /*! @@ -391,7 +398,7 @@ #define BF_I2C_C1_RSTA(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_RSTA) & BM_I2C_C1_RSTA) /*! @brief Set the RSTA field to a new value. */ -#define BW_I2C_C1_RSTA(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_RSTA) = (v)) +#define BW_I2C_C1_RSTA(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_RSTA), v)) /*@}*/ /*! @@ -414,13 +421,13 @@ #define BS_I2C_C1_TXAK (1U) /*!< Bit field size in bits for I2C_C1_TXAK. */ /*! @brief Read current value of the I2C_C1_TXAK field. */ -#define BR_I2C_C1_TXAK(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK)) +#define BR_I2C_C1_TXAK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK))) /*! @brief Format value for bitfield I2C_C1_TXAK. */ #define BF_I2C_C1_TXAK(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_TXAK) & BM_I2C_C1_TXAK) /*! @brief Set the TXAK field to a new value. */ -#define BW_I2C_C1_TXAK(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK) = (v)) +#define BW_I2C_C1_TXAK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK), v)) /*@}*/ /*! @@ -441,13 +448,13 @@ #define BS_I2C_C1_TX (1U) /*!< Bit field size in bits for I2C_C1_TX. */ /*! @brief Read current value of the I2C_C1_TX field. */ -#define BR_I2C_C1_TX(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX)) +#define BR_I2C_C1_TX(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX))) /*! @brief Format value for bitfield I2C_C1_TX. */ #define BF_I2C_C1_TX(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_TX) & BM_I2C_C1_TX) /*! @brief Set the TX field to a new value. */ -#define BW_I2C_C1_TX(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX) = (v)) +#define BW_I2C_C1_TX(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX), v)) /*@}*/ /*! @@ -467,13 +474,13 @@ #define BS_I2C_C1_MST (1U) /*!< Bit field size in bits for I2C_C1_MST. */ /*! @brief Read current value of the I2C_C1_MST field. */ -#define BR_I2C_C1_MST(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST)) +#define BR_I2C_C1_MST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST))) /*! @brief Format value for bitfield I2C_C1_MST. */ #define BF_I2C_C1_MST(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_MST) & BM_I2C_C1_MST) /*! @brief Set the MST field to a new value. */ -#define BW_I2C_C1_MST(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST) = (v)) +#define BW_I2C_C1_MST(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST), v)) /*@}*/ /*! @@ -491,13 +498,13 @@ #define BS_I2C_C1_IICIE (1U) /*!< Bit field size in bits for I2C_C1_IICIE. */ /*! @brief Read current value of the I2C_C1_IICIE field. */ -#define BR_I2C_C1_IICIE(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE)) +#define BR_I2C_C1_IICIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE))) /*! @brief Format value for bitfield I2C_C1_IICIE. */ #define BF_I2C_C1_IICIE(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_IICIE) & BM_I2C_C1_IICIE) /*! @brief Set the IICIE field to a new value. */ -#define BW_I2C_C1_IICIE(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE) = (v)) +#define BW_I2C_C1_IICIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE), v)) /*@}*/ /*! @@ -515,13 +522,13 @@ #define BS_I2C_C1_IICEN (1U) /*!< Bit field size in bits for I2C_C1_IICEN. */ /*! @brief Read current value of the I2C_C1_IICEN field. */ -#define BR_I2C_C1_IICEN(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN)) +#define BR_I2C_C1_IICEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN))) /*! @brief Format value for bitfield I2C_C1_IICEN. */ #define BF_I2C_C1_IICEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_IICEN) & BM_I2C_C1_IICEN) /*! @brief Set the IICEN field to a new value. */ -#define BW_I2C_C1_IICEN(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN) = (v)) +#define BW_I2C_C1_IICEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN), v)) /*@}*/ /******************************************************************************* @@ -556,8 +563,8 @@ #define HW_I2C_S_ADDR(x) ((x) + 0x3U) #define HW_I2C_S(x) (*(__IO hw_i2c_s_t *) HW_I2C_S_ADDR(x)) -#define HW_I2C_S_RD(x) (HW_I2C_S(x).U) -#define HW_I2C_S_WR(x, v) (HW_I2C_S(x).U = (v)) +#define HW_I2C_S_RD(x) (ADDRESS_READ(hw_i2c_s_t, HW_I2C_S_ADDR(x))) +#define HW_I2C_S_WR(x, v) (ADDRESS_WRITE(hw_i2c_s_t, HW_I2C_S_ADDR(x), v)) #define HW_I2C_S_SET(x, v) (HW_I2C_S_WR(x, HW_I2C_S_RD(x) | (v))) #define HW_I2C_S_CLR(x, v) (HW_I2C_S_WR(x, HW_I2C_S_RD(x) & ~(v))) #define HW_I2C_S_TOG(x, v) (HW_I2C_S_WR(x, HW_I2C_S_RD(x) ^ (v))) @@ -581,7 +588,7 @@ #define BS_I2C_S_RXAK (1U) /*!< Bit field size in bits for I2C_S_RXAK. */ /*! @brief Read current value of the I2C_S_RXAK field. */ -#define BR_I2C_S_RXAK(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RXAK)) +#define BR_I2C_S_RXAK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RXAK))) /*@}*/ /*! @@ -612,13 +619,13 @@ #define BS_I2C_S_IICIF (1U) /*!< Bit field size in bits for I2C_S_IICIF. */ /*! @brief Read current value of the I2C_S_IICIF field. */ -#define BR_I2C_S_IICIF(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF)) +#define BR_I2C_S_IICIF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF))) /*! @brief Format value for bitfield I2C_S_IICIF. */ #define BF_I2C_S_IICIF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_IICIF) & BM_I2C_S_IICIF) /*! @brief Set the IICIF field to a new value. */ -#define BW_I2C_S_IICIF(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF) = (v)) +#define BW_I2C_S_IICIF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF), v)) /*@}*/ /*! @@ -637,7 +644,7 @@ #define BS_I2C_S_SRW (1U) /*!< Bit field size in bits for I2C_S_SRW. */ /*! @brief Read current value of the I2C_S_SRW field. */ -#define BR_I2C_S_SRW(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_SRW)) +#define BR_I2C_S_SRW(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_SRW))) /*@}*/ /*! @@ -659,13 +666,13 @@ #define BS_I2C_S_RAM (1U) /*!< Bit field size in bits for I2C_S_RAM. */ /*! @brief Read current value of the I2C_S_RAM field. */ -#define BR_I2C_S_RAM(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM)) +#define BR_I2C_S_RAM(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM))) /*! @brief Format value for bitfield I2C_S_RAM. */ #define BF_I2C_S_RAM(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_RAM) & BM_I2C_S_RAM) /*! @brief Set the RAM field to a new value. */ -#define BW_I2C_S_RAM(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM) = (v)) +#define BW_I2C_S_RAM(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM), v)) /*@}*/ /*! @@ -684,13 +691,13 @@ #define BS_I2C_S_ARBL (1U) /*!< Bit field size in bits for I2C_S_ARBL. */ /*! @brief Read current value of the I2C_S_ARBL field. */ -#define BR_I2C_S_ARBL(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL)) +#define BR_I2C_S_ARBL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL))) /*! @brief Format value for bitfield I2C_S_ARBL. */ #define BF_I2C_S_ARBL(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_ARBL) & BM_I2C_S_ARBL) /*! @brief Set the ARBL field to a new value. */ -#define BW_I2C_S_ARBL(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL) = (v)) +#define BW_I2C_S_ARBL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL), v)) /*@}*/ /*! @@ -710,7 +717,7 @@ #define BS_I2C_S_BUSY (1U) /*!< Bit field size in bits for I2C_S_BUSY. */ /*! @brief Read current value of the I2C_S_BUSY field. */ -#define BR_I2C_S_BUSY(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_BUSY)) +#define BR_I2C_S_BUSY(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_BUSY))) /*@}*/ /*! @@ -737,13 +744,13 @@ #define BS_I2C_S_IAAS (1U) /*!< Bit field size in bits for I2C_S_IAAS. */ /*! @brief Read current value of the I2C_S_IAAS field. */ -#define BR_I2C_S_IAAS(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS)) +#define BR_I2C_S_IAAS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS))) /*! @brief Format value for bitfield I2C_S_IAAS. */ #define BF_I2C_S_IAAS(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_IAAS) & BM_I2C_S_IAAS) /*! @brief Set the IAAS field to a new value. */ -#define BW_I2C_S_IAAS(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS) = (v)) +#define BW_I2C_S_IAAS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS), v)) /*@}*/ /*! @@ -764,7 +771,7 @@ #define BS_I2C_S_TCF (1U) /*!< Bit field size in bits for I2C_S_TCF. */ /*! @brief Read current value of the I2C_S_TCF field. */ -#define BR_I2C_S_TCF(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_TCF)) +#define BR_I2C_S_TCF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_TCF))) /*@}*/ /******************************************************************************* @@ -792,8 +799,8 @@ #define HW_I2C_D_ADDR(x) ((x) + 0x4U) #define HW_I2C_D(x) (*(__IO hw_i2c_d_t *) HW_I2C_D_ADDR(x)) -#define HW_I2C_D_RD(x) (HW_I2C_D(x).U) -#define HW_I2C_D_WR(x, v) (HW_I2C_D(x).U = (v)) +#define HW_I2C_D_RD(x) (ADDRESS_READ(hw_i2c_d_t, HW_I2C_D_ADDR(x))) +#define HW_I2C_D_WR(x, v) (ADDRESS_WRITE(hw_i2c_d_t, HW_I2C_D_ADDR(x), v)) #define HW_I2C_D_SET(x, v) (HW_I2C_D_WR(x, HW_I2C_D_RD(x) | (v))) #define HW_I2C_D_CLR(x, v) (HW_I2C_D_WR(x, HW_I2C_D_RD(x) & ~(v))) #define HW_I2C_D_TOG(x, v) (HW_I2C_D_WR(x, HW_I2C_D_RD(x) ^ (v))) @@ -870,8 +877,8 @@ #define HW_I2C_C2_ADDR(x) ((x) + 0x5U) #define HW_I2C_C2(x) (*(__IO hw_i2c_c2_t *) HW_I2C_C2_ADDR(x)) -#define HW_I2C_C2_RD(x) (HW_I2C_C2(x).U) -#define HW_I2C_C2_WR(x, v) (HW_I2C_C2(x).U = (v)) +#define HW_I2C_C2_RD(x) (ADDRESS_READ(hw_i2c_c2_t, HW_I2C_C2_ADDR(x))) +#define HW_I2C_C2_WR(x, v) (ADDRESS_WRITE(hw_i2c_c2_t, HW_I2C_C2_ADDR(x), v)) #define HW_I2C_C2_SET(x, v) (HW_I2C_C2_WR(x, HW_I2C_C2_RD(x) | (v))) #define HW_I2C_C2_CLR(x, v) (HW_I2C_C2_WR(x, HW_I2C_C2_RD(x) & ~(v))) #define HW_I2C_C2_TOG(x, v) (HW_I2C_C2_WR(x, HW_I2C_C2_RD(x) ^ (v))) @@ -893,7 +900,7 @@ #define BS_I2C_C2_AD (3U) /*!< Bit field size in bits for I2C_C2_AD. */ /*! @brief Read current value of the I2C_C2_AD field. */ -#define BR_I2C_C2_AD(x) (HW_I2C_C2(x).B.AD) +#define BR_I2C_C2_AD(x) (UNION_READ(hw_i2c_c2_t, HW_I2C_C2_ADDR(x), U, B.AD)) /*! @brief Format value for bitfield I2C_C2_AD. */ #define BF_I2C_C2_AD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_AD) & BM_I2C_C2_AD) @@ -922,13 +929,13 @@ #define BS_I2C_C2_RMEN (1U) /*!< Bit field size in bits for I2C_C2_RMEN. */ /*! @brief Read current value of the I2C_C2_RMEN field. */ -#define BR_I2C_C2_RMEN(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN)) +#define BR_I2C_C2_RMEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN))) /*! @brief Format value for bitfield I2C_C2_RMEN. */ #define BF_I2C_C2_RMEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_RMEN) & BM_I2C_C2_RMEN) /*! @brief Set the RMEN field to a new value. */ -#define BW_I2C_C2_RMEN(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN) = (v)) +#define BW_I2C_C2_RMEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN), v)) /*@}*/ /*! @@ -950,13 +957,13 @@ #define BS_I2C_C2_SBRC (1U) /*!< Bit field size in bits for I2C_C2_SBRC. */ /*! @brief Read current value of the I2C_C2_SBRC field. */ -#define BR_I2C_C2_SBRC(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC)) +#define BR_I2C_C2_SBRC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC))) /*! @brief Format value for bitfield I2C_C2_SBRC. */ #define BF_I2C_C2_SBRC(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_SBRC) & BM_I2C_C2_SBRC) /*! @brief Set the SBRC field to a new value. */ -#define BW_I2C_C2_SBRC(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC) = (v)) +#define BW_I2C_C2_SBRC(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC), v)) /*@}*/ /*! @@ -974,13 +981,13 @@ #define BS_I2C_C2_HDRS (1U) /*!< Bit field size in bits for I2C_C2_HDRS. */ /*! @brief Read current value of the I2C_C2_HDRS field. */ -#define BR_I2C_C2_HDRS(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS)) +#define BR_I2C_C2_HDRS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS))) /*! @brief Format value for bitfield I2C_C2_HDRS. */ #define BF_I2C_C2_HDRS(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_HDRS) & BM_I2C_C2_HDRS) /*! @brief Set the HDRS field to a new value. */ -#define BW_I2C_C2_HDRS(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS) = (v)) +#define BW_I2C_C2_HDRS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS), v)) /*@}*/ /*! @@ -998,13 +1005,13 @@ #define BS_I2C_C2_ADEXT (1U) /*!< Bit field size in bits for I2C_C2_ADEXT. */ /*! @brief Read current value of the I2C_C2_ADEXT field. */ -#define BR_I2C_C2_ADEXT(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT)) +#define BR_I2C_C2_ADEXT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT))) /*! @brief Format value for bitfield I2C_C2_ADEXT. */ #define BF_I2C_C2_ADEXT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_ADEXT) & BM_I2C_C2_ADEXT) /*! @brief Set the ADEXT field to a new value. */ -#define BW_I2C_C2_ADEXT(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT) = (v)) +#define BW_I2C_C2_ADEXT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT), v)) /*@}*/ /*! @@ -1022,13 +1029,13 @@ #define BS_I2C_C2_GCAEN (1U) /*!< Bit field size in bits for I2C_C2_GCAEN. */ /*! @brief Read current value of the I2C_C2_GCAEN field. */ -#define BR_I2C_C2_GCAEN(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN)) +#define BR_I2C_C2_GCAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN))) /*! @brief Format value for bitfield I2C_C2_GCAEN. */ #define BF_I2C_C2_GCAEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_GCAEN) & BM_I2C_C2_GCAEN) /*! @brief Set the GCAEN field to a new value. */ -#define BW_I2C_C2_GCAEN(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN) = (v)) +#define BW_I2C_C2_GCAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN), v)) /*@}*/ /******************************************************************************* @@ -1060,8 +1067,8 @@ #define HW_I2C_FLT_ADDR(x) ((x) + 0x6U) #define HW_I2C_FLT(x) (*(__IO hw_i2c_flt_t *) HW_I2C_FLT_ADDR(x)) -#define HW_I2C_FLT_RD(x) (HW_I2C_FLT(x).U) -#define HW_I2C_FLT_WR(x, v) (HW_I2C_FLT(x).U = (v)) +#define HW_I2C_FLT_RD(x) (ADDRESS_READ(hw_i2c_flt_t, HW_I2C_FLT_ADDR(x))) +#define HW_I2C_FLT_WR(x, v) (ADDRESS_WRITE(hw_i2c_flt_t, HW_I2C_FLT_ADDR(x), v)) #define HW_I2C_FLT_SET(x, v) (HW_I2C_FLT_WR(x, HW_I2C_FLT_RD(x) | (v))) #define HW_I2C_FLT_CLR(x, v) (HW_I2C_FLT_WR(x, HW_I2C_FLT_RD(x) & ~(v))) #define HW_I2C_FLT_TOG(x, v) (HW_I2C_FLT_WR(x, HW_I2C_FLT_RD(x) ^ (v))) @@ -1087,7 +1094,7 @@ #define BS_I2C_FLT_FLT (4U) /*!< Bit field size in bits for I2C_FLT_FLT. */ /*! @brief Read current value of the I2C_FLT_FLT field. */ -#define BR_I2C_FLT_FLT(x) (HW_I2C_FLT(x).B.FLT) +#define BR_I2C_FLT_FLT(x) (UNION_READ(hw_i2c_flt_t, HW_I2C_FLT_ADDR(x), U, B.FLT)) /*! @brief Format value for bitfield I2C_FLT_FLT. */ #define BF_I2C_FLT_FLT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_FLT) & BM_I2C_FLT_FLT) @@ -1112,13 +1119,13 @@ #define BS_I2C_FLT_STARTF (1U) /*!< Bit field size in bits for I2C_FLT_STARTF. */ /*! @brief Read current value of the I2C_FLT_STARTF field. */ -#define BR_I2C_FLT_STARTF(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF)) +#define BR_I2C_FLT_STARTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF))) /*! @brief Format value for bitfield I2C_FLT_STARTF. */ #define BF_I2C_FLT_STARTF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_STARTF) & BM_I2C_FLT_STARTF) /*! @brief Set the STARTF field to a new value. */ -#define BW_I2C_FLT_STARTF(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF) = (v)) +#define BW_I2C_FLT_STARTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF), v)) /*@}*/ /*! @@ -1140,13 +1147,13 @@ #define BS_I2C_FLT_SSIE (1U) /*!< Bit field size in bits for I2C_FLT_SSIE. */ /*! @brief Read current value of the I2C_FLT_SSIE field. */ -#define BR_I2C_FLT_SSIE(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE)) +#define BR_I2C_FLT_SSIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE))) /*! @brief Format value for bitfield I2C_FLT_SSIE. */ #define BF_I2C_FLT_SSIE(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_SSIE) & BM_I2C_FLT_SSIE) /*! @brief Set the SSIE field to a new value. */ -#define BW_I2C_FLT_SSIE(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE) = (v)) +#define BW_I2C_FLT_SSIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE), v)) /*@}*/ /*! @@ -1165,13 +1172,13 @@ #define BS_I2C_FLT_STOPF (1U) /*!< Bit field size in bits for I2C_FLT_STOPF. */ /*! @brief Read current value of the I2C_FLT_STOPF field. */ -#define BR_I2C_FLT_STOPF(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF)) +#define BR_I2C_FLT_STOPF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF))) /*! @brief Format value for bitfield I2C_FLT_STOPF. */ #define BF_I2C_FLT_STOPF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_STOPF) & BM_I2C_FLT_STOPF) /*! @brief Set the STOPF field to a new value. */ -#define BW_I2C_FLT_STOPF(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF) = (v)) +#define BW_I2C_FLT_STOPF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF), v)) /*@}*/ /*! @@ -1206,13 +1213,13 @@ #define BS_I2C_FLT_SHEN (1U) /*!< Bit field size in bits for I2C_FLT_SHEN. */ /*! @brief Read current value of the I2C_FLT_SHEN field. */ -#define BR_I2C_FLT_SHEN(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN)) +#define BR_I2C_FLT_SHEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN))) /*! @brief Format value for bitfield I2C_FLT_SHEN. */ #define BF_I2C_FLT_SHEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_SHEN) & BM_I2C_FLT_SHEN) /*! @brief Set the SHEN field to a new value. */ -#define BW_I2C_FLT_SHEN(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN) = (v)) +#define BW_I2C_FLT_SHEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN), v)) /*@}*/ /******************************************************************************* @@ -1241,8 +1248,8 @@ #define HW_I2C_RA_ADDR(x) ((x) + 0x7U) #define HW_I2C_RA(x) (*(__IO hw_i2c_ra_t *) HW_I2C_RA_ADDR(x)) -#define HW_I2C_RA_RD(x) (HW_I2C_RA(x).U) -#define HW_I2C_RA_WR(x, v) (HW_I2C_RA(x).U = (v)) +#define HW_I2C_RA_RD(x) (ADDRESS_READ(hw_i2c_ra_t, HW_I2C_RA_ADDR(x))) +#define HW_I2C_RA_WR(x, v) (ADDRESS_WRITE(hw_i2c_ra_t, HW_I2C_RA_ADDR(x), v)) #define HW_I2C_RA_SET(x, v) (HW_I2C_RA_WR(x, HW_I2C_RA_RD(x) | (v))) #define HW_I2C_RA_CLR(x, v) (HW_I2C_RA_WR(x, HW_I2C_RA_RD(x) & ~(v))) #define HW_I2C_RA_TOG(x, v) (HW_I2C_RA_WR(x, HW_I2C_RA_RD(x) ^ (v))) @@ -1266,7 +1273,7 @@ #define BS_I2C_RA_RAD (7U) /*!< Bit field size in bits for I2C_RA_RAD. */ /*! @brief Read current value of the I2C_RA_RAD field. */ -#define BR_I2C_RA_RAD(x) (HW_I2C_RA(x).B.RAD) +#define BR_I2C_RA_RAD(x) (UNION_READ(hw_i2c_ra_t, HW_I2C_RA_ADDR(x), U, B.RAD)) /*! @brief Format value for bitfield I2C_RA_RAD. */ #define BF_I2C_RA_RAD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_RA_RAD) & BM_I2C_RA_RAD) @@ -1315,8 +1322,8 @@ #define HW_I2C_SMB_ADDR(x) ((x) + 0x8U) #define HW_I2C_SMB(x) (*(__IO hw_i2c_smb_t *) HW_I2C_SMB_ADDR(x)) -#define HW_I2C_SMB_RD(x) (HW_I2C_SMB(x).U) -#define HW_I2C_SMB_WR(x, v) (HW_I2C_SMB(x).U = (v)) +#define HW_I2C_SMB_RD(x) (ADDRESS_READ(hw_i2c_smb_t, HW_I2C_SMB_ADDR(x))) +#define HW_I2C_SMB_WR(x, v) (ADDRESS_WRITE(hw_i2c_smb_t, HW_I2C_SMB_ADDR(x), v)) #define HW_I2C_SMB_SET(x, v) (HW_I2C_SMB_WR(x, HW_I2C_SMB_RD(x) | (v))) #define HW_I2C_SMB_CLR(x, v) (HW_I2C_SMB_WR(x, HW_I2C_SMB_RD(x) & ~(v))) #define HW_I2C_SMB_TOG(x, v) (HW_I2C_SMB_WR(x, HW_I2C_SMB_RD(x) ^ (v))) @@ -1341,13 +1348,13 @@ #define BS_I2C_SMB_SHTF2IE (1U) /*!< Bit field size in bits for I2C_SMB_SHTF2IE. */ /*! @brief Read current value of the I2C_SMB_SHTF2IE field. */ -#define BR_I2C_SMB_SHTF2IE(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE)) +#define BR_I2C_SMB_SHTF2IE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE))) /*! @brief Format value for bitfield I2C_SMB_SHTF2IE. */ #define BF_I2C_SMB_SHTF2IE(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SHTF2IE) & BM_I2C_SMB_SHTF2IE) /*! @brief Set the SHTF2IE field to a new value. */ -#define BW_I2C_SMB_SHTF2IE(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE) = (v)) +#define BW_I2C_SMB_SHTF2IE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE), v)) /*@}*/ /*! @@ -1366,13 +1373,13 @@ #define BS_I2C_SMB_SHTF2 (1U) /*!< Bit field size in bits for I2C_SMB_SHTF2. */ /*! @brief Read current value of the I2C_SMB_SHTF2 field. */ -#define BR_I2C_SMB_SHTF2(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2)) +#define BR_I2C_SMB_SHTF2(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2))) /*! @brief Format value for bitfield I2C_SMB_SHTF2. */ #define BF_I2C_SMB_SHTF2(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SHTF2) & BM_I2C_SMB_SHTF2) /*! @brief Set the SHTF2 field to a new value. */ -#define BW_I2C_SMB_SHTF2(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2) = (v)) +#define BW_I2C_SMB_SHTF2(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2), v)) /*@}*/ /*! @@ -1391,7 +1398,7 @@ #define BS_I2C_SMB_SHTF1 (1U) /*!< Bit field size in bits for I2C_SMB_SHTF1. */ /*! @brief Read current value of the I2C_SMB_SHTF1 field. */ -#define BR_I2C_SMB_SHTF1(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF1)) +#define BR_I2C_SMB_SHTF1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF1))) /*@}*/ /*! @@ -1412,13 +1419,13 @@ #define BS_I2C_SMB_SLTF (1U) /*!< Bit field size in bits for I2C_SMB_SLTF. */ /*! @brief Read current value of the I2C_SMB_SLTF field. */ -#define BR_I2C_SMB_SLTF(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF)) +#define BR_I2C_SMB_SLTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF))) /*! @brief Format value for bitfield I2C_SMB_SLTF. */ #define BF_I2C_SMB_SLTF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SLTF) & BM_I2C_SMB_SLTF) /*! @brief Set the SLTF field to a new value. */ -#define BW_I2C_SMB_SLTF(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF) = (v)) +#define BW_I2C_SMB_SLTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF), v)) /*@}*/ /*! @@ -1436,13 +1443,13 @@ #define BS_I2C_SMB_TCKSEL (1U) /*!< Bit field size in bits for I2C_SMB_TCKSEL. */ /*! @brief Read current value of the I2C_SMB_TCKSEL field. */ -#define BR_I2C_SMB_TCKSEL(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL)) +#define BR_I2C_SMB_TCKSEL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL))) /*! @brief Format value for bitfield I2C_SMB_TCKSEL. */ #define BF_I2C_SMB_TCKSEL(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_TCKSEL) & BM_I2C_SMB_TCKSEL) /*! @brief Set the TCKSEL field to a new value. */ -#define BW_I2C_SMB_TCKSEL(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL) = (v)) +#define BW_I2C_SMB_TCKSEL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL), v)) /*@}*/ /*! @@ -1460,13 +1467,13 @@ #define BS_I2C_SMB_SIICAEN (1U) /*!< Bit field size in bits for I2C_SMB_SIICAEN. */ /*! @brief Read current value of the I2C_SMB_SIICAEN field. */ -#define BR_I2C_SMB_SIICAEN(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN)) +#define BR_I2C_SMB_SIICAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN))) /*! @brief Format value for bitfield I2C_SMB_SIICAEN. */ #define BF_I2C_SMB_SIICAEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SIICAEN) & BM_I2C_SMB_SIICAEN) /*! @brief Set the SIICAEN field to a new value. */ -#define BW_I2C_SMB_SIICAEN(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN) = (v)) +#define BW_I2C_SMB_SIICAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN), v)) /*@}*/ /*! @@ -1487,13 +1494,13 @@ #define BS_I2C_SMB_ALERTEN (1U) /*!< Bit field size in bits for I2C_SMB_ALERTEN. */ /*! @brief Read current value of the I2C_SMB_ALERTEN field. */ -#define BR_I2C_SMB_ALERTEN(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN)) +#define BR_I2C_SMB_ALERTEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN))) /*! @brief Format value for bitfield I2C_SMB_ALERTEN. */ #define BF_I2C_SMB_ALERTEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_ALERTEN) & BM_I2C_SMB_ALERTEN) /*! @brief Set the ALERTEN field to a new value. */ -#define BW_I2C_SMB_ALERTEN(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN) = (v)) +#define BW_I2C_SMB_ALERTEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN), v)) /*@}*/ /*! @@ -1513,13 +1520,13 @@ #define BS_I2C_SMB_FACK (1U) /*!< Bit field size in bits for I2C_SMB_FACK. */ /*! @brief Read current value of the I2C_SMB_FACK field. */ -#define BR_I2C_SMB_FACK(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK)) +#define BR_I2C_SMB_FACK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK))) /*! @brief Format value for bitfield I2C_SMB_FACK. */ #define BF_I2C_SMB_FACK(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_FACK) & BM_I2C_SMB_FACK) /*! @brief Set the FACK field to a new value. */ -#define BW_I2C_SMB_FACK(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK) = (v)) +#define BW_I2C_SMB_FACK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK), v)) /*@}*/ /******************************************************************************* @@ -1548,8 +1555,8 @@ #define HW_I2C_A2_ADDR(x) ((x) + 0x9U) #define HW_I2C_A2(x) (*(__IO hw_i2c_a2_t *) HW_I2C_A2_ADDR(x)) -#define HW_I2C_A2_RD(x) (HW_I2C_A2(x).U) -#define HW_I2C_A2_WR(x, v) (HW_I2C_A2(x).U = (v)) +#define HW_I2C_A2_RD(x) (ADDRESS_READ(hw_i2c_a2_t, HW_I2C_A2_ADDR(x))) +#define HW_I2C_A2_WR(x, v) (ADDRESS_WRITE(hw_i2c_a2_t, HW_I2C_A2_ADDR(x), v)) #define HW_I2C_A2_SET(x, v) (HW_I2C_A2_WR(x, HW_I2C_A2_RD(x) | (v))) #define HW_I2C_A2_CLR(x, v) (HW_I2C_A2_WR(x, HW_I2C_A2_RD(x) & ~(v))) #define HW_I2C_A2_TOG(x, v) (HW_I2C_A2_WR(x, HW_I2C_A2_RD(x) ^ (v))) @@ -1571,7 +1578,7 @@ #define BS_I2C_A2_SAD (7U) /*!< Bit field size in bits for I2C_A2_SAD. */ /*! @brief Read current value of the I2C_A2_SAD field. */ -#define BR_I2C_A2_SAD(x) (HW_I2C_A2(x).B.SAD) +#define BR_I2C_A2_SAD(x) (UNION_READ(hw_i2c_a2_t, HW_I2C_A2_ADDR(x), U, B.SAD)) /*! @brief Format value for bitfield I2C_A2_SAD. */ #define BF_I2C_A2_SAD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_A2_SAD) & BM_I2C_A2_SAD) @@ -1605,8 +1612,8 @@ #define HW_I2C_SLTH_ADDR(x) ((x) + 0xAU) #define HW_I2C_SLTH(x) (*(__IO hw_i2c_slth_t *) HW_I2C_SLTH_ADDR(x)) -#define HW_I2C_SLTH_RD(x) (HW_I2C_SLTH(x).U) -#define HW_I2C_SLTH_WR(x, v) (HW_I2C_SLTH(x).U = (v)) +#define HW_I2C_SLTH_RD(x) (ADDRESS_READ(hw_i2c_slth_t, HW_I2C_SLTH_ADDR(x))) +#define HW_I2C_SLTH_WR(x, v) (ADDRESS_WRITE(hw_i2c_slth_t, HW_I2C_SLTH_ADDR(x), v)) #define HW_I2C_SLTH_SET(x, v) (HW_I2C_SLTH_WR(x, HW_I2C_SLTH_RD(x) | (v))) #define HW_I2C_SLTH_CLR(x, v) (HW_I2C_SLTH_WR(x, HW_I2C_SLTH_RD(x) & ~(v))) #define HW_I2C_SLTH_TOG(x, v) (HW_I2C_SLTH_WR(x, HW_I2C_SLTH_RD(x) ^ (v))) @@ -1662,8 +1669,8 @@ #define HW_I2C_SLTL_ADDR(x) ((x) + 0xBU) #define HW_I2C_SLTL(x) (*(__IO hw_i2c_sltl_t *) HW_I2C_SLTL_ADDR(x)) -#define HW_I2C_SLTL_RD(x) (HW_I2C_SLTL(x).U) -#define HW_I2C_SLTL_WR(x, v) (HW_I2C_SLTL(x).U = (v)) +#define HW_I2C_SLTL_RD(x) (ADDRESS_READ(hw_i2c_sltl_t, HW_I2C_SLTL_ADDR(x))) +#define HW_I2C_SLTL_WR(x, v) (ADDRESS_WRITE(hw_i2c_sltl_t, HW_I2C_SLTL_ADDR(x), v)) #define HW_I2C_SLTL_SET(x, v) (HW_I2C_SLTL_WR(x, HW_I2C_SLTL_RD(x) | (v))) #define HW_I2C_SLTL_CLR(x, v) (HW_I2C_SLTL_WR(x, HW_I2C_SLTL_RD(x) & ~(v))) #define HW_I2C_SLTL_TOG(x, v) (HW_I2C_SLTL_WR(x, HW_I2C_SLTL_RD(x) ^ (v)))
--- a/hal/device/device/MK64F12/MK64F12_i2s.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_i2s.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -161,8 +168,8 @@ #define HW_I2S_TCSR_ADDR(x) ((x) + 0x0U) #define HW_I2S_TCSR(x) (*(__IO hw_i2s_tcsr_t *) HW_I2S_TCSR_ADDR(x)) -#define HW_I2S_TCSR_RD(x) (HW_I2S_TCSR(x).U) -#define HW_I2S_TCSR_WR(x, v) (HW_I2S_TCSR(x).U = (v)) +#define HW_I2S_TCSR_RD(x) (ADDRESS_READ(hw_i2s_tcsr_t, HW_I2S_TCSR_ADDR(x))) +#define HW_I2S_TCSR_WR(x, v) (ADDRESS_WRITE(hw_i2s_tcsr_t, HW_I2S_TCSR_ADDR(x), v)) #define HW_I2S_TCSR_SET(x, v) (HW_I2S_TCSR_WR(x, HW_I2S_TCSR_RD(x) | (v))) #define HW_I2S_TCSR_CLR(x, v) (HW_I2S_TCSR_WR(x, HW_I2S_TCSR_RD(x) & ~(v))) #define HW_I2S_TCSR_TOG(x, v) (HW_I2S_TCSR_WR(x, HW_I2S_TCSR_RD(x) ^ (v))) @@ -187,13 +194,13 @@ #define BS_I2S_TCSR_FRDE (1U) /*!< Bit field size in bits for I2S_TCSR_FRDE. */ /*! @brief Read current value of the I2S_TCSR_FRDE field. */ -#define BR_I2S_TCSR_FRDE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRDE)) +#define BR_I2S_TCSR_FRDE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRDE))) /*! @brief Format value for bitfield I2S_TCSR_FRDE. */ #define BF_I2S_TCSR_FRDE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_FRDE) & BM_I2S_TCSR_FRDE) /*! @brief Set the FRDE field to a new value. */ -#define BW_I2S_TCSR_FRDE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRDE) = (v)) +#define BW_I2S_TCSR_FRDE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRDE), v)) /*@}*/ /*! @@ -211,13 +218,13 @@ #define BS_I2S_TCSR_FWDE (1U) /*!< Bit field size in bits for I2S_TCSR_FWDE. */ /*! @brief Read current value of the I2S_TCSR_FWDE field. */ -#define BR_I2S_TCSR_FWDE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWDE)) +#define BR_I2S_TCSR_FWDE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWDE))) /*! @brief Format value for bitfield I2S_TCSR_FWDE. */ #define BF_I2S_TCSR_FWDE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_FWDE) & BM_I2S_TCSR_FWDE) /*! @brief Set the FWDE field to a new value. */ -#define BW_I2S_TCSR_FWDE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWDE) = (v)) +#define BW_I2S_TCSR_FWDE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWDE), v)) /*@}*/ /*! @@ -235,13 +242,13 @@ #define BS_I2S_TCSR_FRIE (1U) /*!< Bit field size in bits for I2S_TCSR_FRIE. */ /*! @brief Read current value of the I2S_TCSR_FRIE field. */ -#define BR_I2S_TCSR_FRIE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRIE)) +#define BR_I2S_TCSR_FRIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRIE))) /*! @brief Format value for bitfield I2S_TCSR_FRIE. */ #define BF_I2S_TCSR_FRIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_FRIE) & BM_I2S_TCSR_FRIE) /*! @brief Set the FRIE field to a new value. */ -#define BW_I2S_TCSR_FRIE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRIE) = (v)) +#define BW_I2S_TCSR_FRIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRIE), v)) /*@}*/ /*! @@ -259,13 +266,13 @@ #define BS_I2S_TCSR_FWIE (1U) /*!< Bit field size in bits for I2S_TCSR_FWIE. */ /*! @brief Read current value of the I2S_TCSR_FWIE field. */ -#define BR_I2S_TCSR_FWIE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWIE)) +#define BR_I2S_TCSR_FWIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWIE))) /*! @brief Format value for bitfield I2S_TCSR_FWIE. */ #define BF_I2S_TCSR_FWIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_FWIE) & BM_I2S_TCSR_FWIE) /*! @brief Set the FWIE field to a new value. */ -#define BW_I2S_TCSR_FWIE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWIE) = (v)) +#define BW_I2S_TCSR_FWIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWIE), v)) /*@}*/ /*! @@ -283,13 +290,13 @@ #define BS_I2S_TCSR_FEIE (1U) /*!< Bit field size in bits for I2S_TCSR_FEIE. */ /*! @brief Read current value of the I2S_TCSR_FEIE field. */ -#define BR_I2S_TCSR_FEIE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FEIE)) +#define BR_I2S_TCSR_FEIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FEIE))) /*! @brief Format value for bitfield I2S_TCSR_FEIE. */ #define BF_I2S_TCSR_FEIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_FEIE) & BM_I2S_TCSR_FEIE) /*! @brief Set the FEIE field to a new value. */ -#define BW_I2S_TCSR_FEIE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FEIE) = (v)) +#define BW_I2S_TCSR_FEIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FEIE), v)) /*@}*/ /*! @@ -307,13 +314,13 @@ #define BS_I2S_TCSR_SEIE (1U) /*!< Bit field size in bits for I2S_TCSR_SEIE. */ /*! @brief Read current value of the I2S_TCSR_SEIE field. */ -#define BR_I2S_TCSR_SEIE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SEIE)) +#define BR_I2S_TCSR_SEIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SEIE))) /*! @brief Format value for bitfield I2S_TCSR_SEIE. */ #define BF_I2S_TCSR_SEIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_SEIE) & BM_I2S_TCSR_SEIE) /*! @brief Set the SEIE field to a new value. */ -#define BW_I2S_TCSR_SEIE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SEIE) = (v)) +#define BW_I2S_TCSR_SEIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SEIE), v)) /*@}*/ /*! @@ -331,13 +338,13 @@ #define BS_I2S_TCSR_WSIE (1U) /*!< Bit field size in bits for I2S_TCSR_WSIE. */ /*! @brief Read current value of the I2S_TCSR_WSIE field. */ -#define BR_I2S_TCSR_WSIE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_WSIE)) +#define BR_I2S_TCSR_WSIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_WSIE))) /*! @brief Format value for bitfield I2S_TCSR_WSIE. */ #define BF_I2S_TCSR_WSIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_WSIE) & BM_I2S_TCSR_WSIE) /*! @brief Set the WSIE field to a new value. */ -#define BW_I2S_TCSR_WSIE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_WSIE) = (v)) +#define BW_I2S_TCSR_WSIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_WSIE), v)) /*@}*/ /*! @@ -356,7 +363,7 @@ #define BS_I2S_TCSR_FRF (1U) /*!< Bit field size in bits for I2S_TCSR_FRF. */ /*! @brief Read current value of the I2S_TCSR_FRF field. */ -#define BR_I2S_TCSR_FRF(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRF)) +#define BR_I2S_TCSR_FRF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FRF))) /*@}*/ /*! @@ -374,7 +381,7 @@ #define BS_I2S_TCSR_FWF (1U) /*!< Bit field size in bits for I2S_TCSR_FWF. */ /*! @brief Read current value of the I2S_TCSR_FWF field. */ -#define BR_I2S_TCSR_FWF(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWF)) +#define BR_I2S_TCSR_FWF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FWF))) /*@}*/ /*! @@ -393,13 +400,13 @@ #define BS_I2S_TCSR_FEF (1U) /*!< Bit field size in bits for I2S_TCSR_FEF. */ /*! @brief Read current value of the I2S_TCSR_FEF field. */ -#define BR_I2S_TCSR_FEF(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FEF)) +#define BR_I2S_TCSR_FEF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FEF))) /*! @brief Format value for bitfield I2S_TCSR_FEF. */ #define BF_I2S_TCSR_FEF(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_FEF) & BM_I2S_TCSR_FEF) /*! @brief Set the FEF field to a new value. */ -#define BW_I2S_TCSR_FEF(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FEF) = (v)) +#define BW_I2S_TCSR_FEF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FEF), v)) /*@}*/ /*! @@ -418,13 +425,13 @@ #define BS_I2S_TCSR_SEF (1U) /*!< Bit field size in bits for I2S_TCSR_SEF. */ /*! @brief Read current value of the I2S_TCSR_SEF field. */ -#define BR_I2S_TCSR_SEF(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SEF)) +#define BR_I2S_TCSR_SEF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SEF))) /*! @brief Format value for bitfield I2S_TCSR_SEF. */ #define BF_I2S_TCSR_SEF(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_SEF) & BM_I2S_TCSR_SEF) /*! @brief Set the SEF field to a new value. */ -#define BW_I2S_TCSR_SEF(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SEF) = (v)) +#define BW_I2S_TCSR_SEF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SEF), v)) /*@}*/ /*! @@ -443,13 +450,13 @@ #define BS_I2S_TCSR_WSF (1U) /*!< Bit field size in bits for I2S_TCSR_WSF. */ /*! @brief Read current value of the I2S_TCSR_WSF field. */ -#define BR_I2S_TCSR_WSF(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_WSF)) +#define BR_I2S_TCSR_WSF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_WSF))) /*! @brief Format value for bitfield I2S_TCSR_WSF. */ #define BF_I2S_TCSR_WSF(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_WSF) & BM_I2S_TCSR_WSF) /*! @brief Set the WSF field to a new value. */ -#define BW_I2S_TCSR_WSF(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_WSF) = (v)) +#define BW_I2S_TCSR_WSF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_WSF), v)) /*@}*/ /*! @@ -468,13 +475,13 @@ #define BS_I2S_TCSR_SR (1U) /*!< Bit field size in bits for I2S_TCSR_SR. */ /*! @brief Read current value of the I2S_TCSR_SR field. */ -#define BR_I2S_TCSR_SR(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SR)) +#define BR_I2S_TCSR_SR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SR))) /*! @brief Format value for bitfield I2S_TCSR_SR. */ #define BF_I2S_TCSR_SR(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_SR) & BM_I2S_TCSR_SR) /*! @brief Set the SR field to a new value. */ -#define BW_I2S_TCSR_SR(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SR) = (v)) +#define BW_I2S_TCSR_SR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_SR), v)) /*@}*/ /*! @@ -497,7 +504,7 @@ #define BF_I2S_TCSR_FR(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_FR) & BM_I2S_TCSR_FR) /*! @brief Set the FR field to a new value. */ -#define BW_I2S_TCSR_FR(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FR) = (v)) +#define BW_I2S_TCSR_FR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_FR), v)) /*@}*/ /*! @@ -518,13 +525,13 @@ #define BS_I2S_TCSR_BCE (1U) /*!< Bit field size in bits for I2S_TCSR_BCE. */ /*! @brief Read current value of the I2S_TCSR_BCE field. */ -#define BR_I2S_TCSR_BCE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_BCE)) +#define BR_I2S_TCSR_BCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_BCE))) /*! @brief Format value for bitfield I2S_TCSR_BCE. */ #define BF_I2S_TCSR_BCE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_BCE) & BM_I2S_TCSR_BCE) /*! @brief Set the BCE field to a new value. */ -#define BW_I2S_TCSR_BCE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_BCE) = (v)) +#define BW_I2S_TCSR_BCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_BCE), v)) /*@}*/ /*! @@ -544,13 +551,13 @@ #define BS_I2S_TCSR_DBGE (1U) /*!< Bit field size in bits for I2S_TCSR_DBGE. */ /*! @brief Read current value of the I2S_TCSR_DBGE field. */ -#define BR_I2S_TCSR_DBGE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_DBGE)) +#define BR_I2S_TCSR_DBGE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_DBGE))) /*! @brief Format value for bitfield I2S_TCSR_DBGE. */ #define BF_I2S_TCSR_DBGE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_DBGE) & BM_I2S_TCSR_DBGE) /*! @brief Set the DBGE field to a new value. */ -#define BW_I2S_TCSR_DBGE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_DBGE) = (v)) +#define BW_I2S_TCSR_DBGE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_DBGE), v)) /*@}*/ /*! @@ -569,13 +576,13 @@ #define BS_I2S_TCSR_STOPE (1U) /*!< Bit field size in bits for I2S_TCSR_STOPE. */ /*! @brief Read current value of the I2S_TCSR_STOPE field. */ -#define BR_I2S_TCSR_STOPE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_STOPE)) +#define BR_I2S_TCSR_STOPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_STOPE))) /*! @brief Format value for bitfield I2S_TCSR_STOPE. */ #define BF_I2S_TCSR_STOPE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_STOPE) & BM_I2S_TCSR_STOPE) /*! @brief Set the STOPE field to a new value. */ -#define BW_I2S_TCSR_STOPE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_STOPE) = (v)) +#define BW_I2S_TCSR_STOPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_STOPE), v)) /*@}*/ /*! @@ -596,13 +603,13 @@ #define BS_I2S_TCSR_TE (1U) /*!< Bit field size in bits for I2S_TCSR_TE. */ /*! @brief Read current value of the I2S_TCSR_TE field. */ -#define BR_I2S_TCSR_TE(x) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_TE)) +#define BR_I2S_TCSR_TE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_TE))) /*! @brief Format value for bitfield I2S_TCSR_TE. */ #define BF_I2S_TCSR_TE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCSR_TE) & BM_I2S_TCSR_TE) /*! @brief Set the TE field to a new value. */ -#define BW_I2S_TCSR_TE(x, v) (BITBAND_ACCESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_TE) = (v)) +#define BW_I2S_TCSR_TE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCSR_ADDR(x), BP_I2S_TCSR_TE), v)) /*@}*/ /******************************************************************************* @@ -631,8 +638,8 @@ #define HW_I2S_TCR1_ADDR(x) ((x) + 0x4U) #define HW_I2S_TCR1(x) (*(__IO hw_i2s_tcr1_t *) HW_I2S_TCR1_ADDR(x)) -#define HW_I2S_TCR1_RD(x) (HW_I2S_TCR1(x).U) -#define HW_I2S_TCR1_WR(x, v) (HW_I2S_TCR1(x).U = (v)) +#define HW_I2S_TCR1_RD(x) (ADDRESS_READ(hw_i2s_tcr1_t, HW_I2S_TCR1_ADDR(x))) +#define HW_I2S_TCR1_WR(x, v) (ADDRESS_WRITE(hw_i2s_tcr1_t, HW_I2S_TCR1_ADDR(x), v)) #define HW_I2S_TCR1_SET(x, v) (HW_I2S_TCR1_WR(x, HW_I2S_TCR1_RD(x) | (v))) #define HW_I2S_TCR1_CLR(x, v) (HW_I2S_TCR1_WR(x, HW_I2S_TCR1_RD(x) & ~(v))) #define HW_I2S_TCR1_TOG(x, v) (HW_I2S_TCR1_WR(x, HW_I2S_TCR1_RD(x) ^ (v))) @@ -653,7 +660,7 @@ #define BS_I2S_TCR1_TFW (3U) /*!< Bit field size in bits for I2S_TCR1_TFW. */ /*! @brief Read current value of the I2S_TCR1_TFW field. */ -#define BR_I2S_TCR1_TFW(x) (HW_I2S_TCR1(x).B.TFW) +#define BR_I2S_TCR1_TFW(x) (UNION_READ(hw_i2s_tcr1_t, HW_I2S_TCR1_ADDR(x), U, B.TFW)) /*! @brief Format value for bitfield I2S_TCR1_TFW. */ #define BF_I2S_TCR1_TFW(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR1_TFW) & BM_I2S_TCR1_TFW) @@ -696,8 +703,8 @@ #define HW_I2S_TCR2_ADDR(x) ((x) + 0x8U) #define HW_I2S_TCR2(x) (*(__IO hw_i2s_tcr2_t *) HW_I2S_TCR2_ADDR(x)) -#define HW_I2S_TCR2_RD(x) (HW_I2S_TCR2(x).U) -#define HW_I2S_TCR2_WR(x, v) (HW_I2S_TCR2(x).U = (v)) +#define HW_I2S_TCR2_RD(x) (ADDRESS_READ(hw_i2s_tcr2_t, HW_I2S_TCR2_ADDR(x))) +#define HW_I2S_TCR2_WR(x, v) (ADDRESS_WRITE(hw_i2s_tcr2_t, HW_I2S_TCR2_ADDR(x), v)) #define HW_I2S_TCR2_SET(x, v) (HW_I2S_TCR2_WR(x, HW_I2S_TCR2_RD(x) | (v))) #define HW_I2S_TCR2_CLR(x, v) (HW_I2S_TCR2_WR(x, HW_I2S_TCR2_RD(x) & ~(v))) #define HW_I2S_TCR2_TOG(x, v) (HW_I2S_TCR2_WR(x, HW_I2S_TCR2_RD(x) ^ (v))) @@ -719,7 +726,7 @@ #define BS_I2S_TCR2_DIV (8U) /*!< Bit field size in bits for I2S_TCR2_DIV. */ /*! @brief Read current value of the I2S_TCR2_DIV field. */ -#define BR_I2S_TCR2_DIV(x) (HW_I2S_TCR2(x).B.DIV) +#define BR_I2S_TCR2_DIV(x) (UNION_READ(hw_i2s_tcr2_t, HW_I2S_TCR2_ADDR(x), U, B.DIV)) /*! @brief Format value for bitfield I2S_TCR2_DIV. */ #define BF_I2S_TCR2_DIV(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR2_DIV) & BM_I2S_TCR2_DIV) @@ -743,13 +750,13 @@ #define BS_I2S_TCR2_BCD (1U) /*!< Bit field size in bits for I2S_TCR2_BCD. */ /*! @brief Read current value of the I2S_TCR2_BCD field. */ -#define BR_I2S_TCR2_BCD(x) (BITBAND_ACCESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCD)) +#define BR_I2S_TCR2_BCD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCD))) /*! @brief Format value for bitfield I2S_TCR2_BCD. */ #define BF_I2S_TCR2_BCD(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR2_BCD) & BM_I2S_TCR2_BCD) /*! @brief Set the BCD field to a new value. */ -#define BW_I2S_TCR2_BCD(x, v) (BITBAND_ACCESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCD) = (v)) +#define BW_I2S_TCR2_BCD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCD), v)) /*@}*/ /*! @@ -769,13 +776,13 @@ #define BS_I2S_TCR2_BCP (1U) /*!< Bit field size in bits for I2S_TCR2_BCP. */ /*! @brief Read current value of the I2S_TCR2_BCP field. */ -#define BR_I2S_TCR2_BCP(x) (BITBAND_ACCESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCP)) +#define BR_I2S_TCR2_BCP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCP))) /*! @brief Format value for bitfield I2S_TCR2_BCP. */ #define BF_I2S_TCR2_BCP(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR2_BCP) & BM_I2S_TCR2_BCP) /*! @brief Set the BCP field to a new value. */ -#define BW_I2S_TCR2_BCP(x, v) (BITBAND_ACCESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCP) = (v)) +#define BW_I2S_TCR2_BCP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCP), v)) /*@}*/ /*! @@ -799,7 +806,7 @@ #define BS_I2S_TCR2_MSEL (2U) /*!< Bit field size in bits for I2S_TCR2_MSEL. */ /*! @brief Read current value of the I2S_TCR2_MSEL field. */ -#define BR_I2S_TCR2_MSEL(x) (HW_I2S_TCR2(x).B.MSEL) +#define BR_I2S_TCR2_MSEL(x) (UNION_READ(hw_i2s_tcr2_t, HW_I2S_TCR2_ADDR(x), U, B.MSEL)) /*! @brief Format value for bitfield I2S_TCR2_MSEL. */ #define BF_I2S_TCR2_MSEL(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR2_MSEL) & BM_I2S_TCR2_MSEL) @@ -832,13 +839,13 @@ #define BS_I2S_TCR2_BCI (1U) /*!< Bit field size in bits for I2S_TCR2_BCI. */ /*! @brief Read current value of the I2S_TCR2_BCI field. */ -#define BR_I2S_TCR2_BCI(x) (BITBAND_ACCESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCI)) +#define BR_I2S_TCR2_BCI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCI))) /*! @brief Format value for bitfield I2S_TCR2_BCI. */ #define BF_I2S_TCR2_BCI(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR2_BCI) & BM_I2S_TCR2_BCI) /*! @brief Set the BCI field to a new value. */ -#define BW_I2S_TCR2_BCI(x, v) (BITBAND_ACCESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCI) = (v)) +#define BW_I2S_TCR2_BCI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCI), v)) /*@}*/ /*! @@ -865,13 +872,13 @@ #define BS_I2S_TCR2_BCS (1U) /*!< Bit field size in bits for I2S_TCR2_BCS. */ /*! @brief Read current value of the I2S_TCR2_BCS field. */ -#define BR_I2S_TCR2_BCS(x) (BITBAND_ACCESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCS)) +#define BR_I2S_TCR2_BCS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCS))) /*! @brief Format value for bitfield I2S_TCR2_BCS. */ #define BF_I2S_TCR2_BCS(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR2_BCS) & BM_I2S_TCR2_BCS) /*! @brief Set the BCS field to a new value. */ -#define BW_I2S_TCR2_BCS(x, v) (BITBAND_ACCESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCS) = (v)) +#define BW_I2S_TCR2_BCS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR2_ADDR(x), BP_I2S_TCR2_BCS), v)) /*@}*/ /*! @@ -893,7 +900,7 @@ #define BS_I2S_TCR2_SYNC (2U) /*!< Bit field size in bits for I2S_TCR2_SYNC. */ /*! @brief Read current value of the I2S_TCR2_SYNC field. */ -#define BR_I2S_TCR2_SYNC(x) (HW_I2S_TCR2(x).B.SYNC) +#define BR_I2S_TCR2_SYNC(x) (UNION_READ(hw_i2s_tcr2_t, HW_I2S_TCR2_ADDR(x), U, B.SYNC)) /*! @brief Format value for bitfield I2S_TCR2_SYNC. */ #define BF_I2S_TCR2_SYNC(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR2_SYNC) & BM_I2S_TCR2_SYNC) @@ -932,8 +939,8 @@ #define HW_I2S_TCR3_ADDR(x) ((x) + 0xCU) #define HW_I2S_TCR3(x) (*(__IO hw_i2s_tcr3_t *) HW_I2S_TCR3_ADDR(x)) -#define HW_I2S_TCR3_RD(x) (HW_I2S_TCR3(x).U) -#define HW_I2S_TCR3_WR(x, v) (HW_I2S_TCR3(x).U = (v)) +#define HW_I2S_TCR3_RD(x) (ADDRESS_READ(hw_i2s_tcr3_t, HW_I2S_TCR3_ADDR(x))) +#define HW_I2S_TCR3_WR(x, v) (ADDRESS_WRITE(hw_i2s_tcr3_t, HW_I2S_TCR3_ADDR(x), v)) #define HW_I2S_TCR3_SET(x, v) (HW_I2S_TCR3_WR(x, HW_I2S_TCR3_RD(x) | (v))) #define HW_I2S_TCR3_CLR(x, v) (HW_I2S_TCR3_WR(x, HW_I2S_TCR3_RD(x) & ~(v))) #define HW_I2S_TCR3_TOG(x, v) (HW_I2S_TCR3_WR(x, HW_I2S_TCR3_RD(x) ^ (v))) @@ -957,7 +964,7 @@ #define BS_I2S_TCR3_WDFL (5U) /*!< Bit field size in bits for I2S_TCR3_WDFL. */ /*! @brief Read current value of the I2S_TCR3_WDFL field. */ -#define BR_I2S_TCR3_WDFL(x) (HW_I2S_TCR3(x).B.WDFL) +#define BR_I2S_TCR3_WDFL(x) (UNION_READ(hw_i2s_tcr3_t, HW_I2S_TCR3_ADDR(x), U, B.WDFL)) /*! @brief Format value for bitfield I2S_TCR3_WDFL. */ #define BF_I2S_TCR3_WDFL(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR3_WDFL) & BM_I2S_TCR3_WDFL) @@ -982,7 +989,7 @@ #define BS_I2S_TCR3_TCE (2U) /*!< Bit field size in bits for I2S_TCR3_TCE. */ /*! @brief Read current value of the I2S_TCR3_TCE field. */ -#define BR_I2S_TCR3_TCE(x) (HW_I2S_TCR3(x).B.TCE) +#define BR_I2S_TCR3_TCE(x) (UNION_READ(hw_i2s_tcr3_t, HW_I2S_TCR3_ADDR(x), U, B.TCE)) /*! @brief Format value for bitfield I2S_TCR3_TCE. */ #define BF_I2S_TCR3_TCE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR3_TCE) & BM_I2S_TCR3_TCE) @@ -1027,8 +1034,8 @@ #define HW_I2S_TCR4_ADDR(x) ((x) + 0x10U) #define HW_I2S_TCR4(x) (*(__IO hw_i2s_tcr4_t *) HW_I2S_TCR4_ADDR(x)) -#define HW_I2S_TCR4_RD(x) (HW_I2S_TCR4(x).U) -#define HW_I2S_TCR4_WR(x, v) (HW_I2S_TCR4(x).U = (v)) +#define HW_I2S_TCR4_RD(x) (ADDRESS_READ(hw_i2s_tcr4_t, HW_I2S_TCR4_ADDR(x))) +#define HW_I2S_TCR4_WR(x, v) (ADDRESS_WRITE(hw_i2s_tcr4_t, HW_I2S_TCR4_ADDR(x), v)) #define HW_I2S_TCR4_SET(x, v) (HW_I2S_TCR4_WR(x, HW_I2S_TCR4_RD(x) | (v))) #define HW_I2S_TCR4_CLR(x, v) (HW_I2S_TCR4_WR(x, HW_I2S_TCR4_RD(x) & ~(v))) #define HW_I2S_TCR4_TOG(x, v) (HW_I2S_TCR4_WR(x, HW_I2S_TCR4_RD(x) ^ (v))) @@ -1053,13 +1060,13 @@ #define BS_I2S_TCR4_FSD (1U) /*!< Bit field size in bits for I2S_TCR4_FSD. */ /*! @brief Read current value of the I2S_TCR4_FSD field. */ -#define BR_I2S_TCR4_FSD(x) (BITBAND_ACCESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSD)) +#define BR_I2S_TCR4_FSD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSD))) /*! @brief Format value for bitfield I2S_TCR4_FSD. */ #define BF_I2S_TCR4_FSD(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR4_FSD) & BM_I2S_TCR4_FSD) /*! @brief Set the FSD field to a new value. */ -#define BW_I2S_TCR4_FSD(x, v) (BITBAND_ACCESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSD) = (v)) +#define BW_I2S_TCR4_FSD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSD), v)) /*@}*/ /*! @@ -1077,13 +1084,13 @@ #define BS_I2S_TCR4_FSP (1U) /*!< Bit field size in bits for I2S_TCR4_FSP. */ /*! @brief Read current value of the I2S_TCR4_FSP field. */ -#define BR_I2S_TCR4_FSP(x) (BITBAND_ACCESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSP)) +#define BR_I2S_TCR4_FSP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSP))) /*! @brief Format value for bitfield I2S_TCR4_FSP. */ #define BF_I2S_TCR4_FSP(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR4_FSP) & BM_I2S_TCR4_FSP) /*! @brief Set the FSP field to a new value. */ -#define BW_I2S_TCR4_FSP(x, v) (BITBAND_ACCESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSP) = (v)) +#define BW_I2S_TCR4_FSP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSP), v)) /*@}*/ /*! @@ -1099,13 +1106,13 @@ #define BS_I2S_TCR4_FSE (1U) /*!< Bit field size in bits for I2S_TCR4_FSE. */ /*! @brief Read current value of the I2S_TCR4_FSE field. */ -#define BR_I2S_TCR4_FSE(x) (BITBAND_ACCESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSE)) +#define BR_I2S_TCR4_FSE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSE))) /*! @brief Format value for bitfield I2S_TCR4_FSE. */ #define BF_I2S_TCR4_FSE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR4_FSE) & BM_I2S_TCR4_FSE) /*! @brief Set the FSE field to a new value. */ -#define BW_I2S_TCR4_FSE(x, v) (BITBAND_ACCESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSE) = (v)) +#define BW_I2S_TCR4_FSE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_FSE), v)) /*@}*/ /*! @@ -1123,13 +1130,13 @@ #define BS_I2S_TCR4_MF (1U) /*!< Bit field size in bits for I2S_TCR4_MF. */ /*! @brief Read current value of the I2S_TCR4_MF field. */ -#define BR_I2S_TCR4_MF(x) (BITBAND_ACCESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_MF)) +#define BR_I2S_TCR4_MF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_MF))) /*! @brief Format value for bitfield I2S_TCR4_MF. */ #define BF_I2S_TCR4_MF(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR4_MF) & BM_I2S_TCR4_MF) /*! @brief Set the MF field to a new value. */ -#define BW_I2S_TCR4_MF(x, v) (BITBAND_ACCESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_MF) = (v)) +#define BW_I2S_TCR4_MF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_TCR4_ADDR(x), BP_I2S_TCR4_MF), v)) /*@}*/ /*! @@ -1146,7 +1153,7 @@ #define BS_I2S_TCR4_SYWD (5U) /*!< Bit field size in bits for I2S_TCR4_SYWD. */ /*! @brief Read current value of the I2S_TCR4_SYWD field. */ -#define BR_I2S_TCR4_SYWD(x) (HW_I2S_TCR4(x).B.SYWD) +#define BR_I2S_TCR4_SYWD(x) (UNION_READ(hw_i2s_tcr4_t, HW_I2S_TCR4_ADDR(x), U, B.SYWD)) /*! @brief Format value for bitfield I2S_TCR4_SYWD. */ #define BF_I2S_TCR4_SYWD(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR4_SYWD) & BM_I2S_TCR4_SYWD) @@ -1168,7 +1175,7 @@ #define BS_I2S_TCR4_FRSZ (5U) /*!< Bit field size in bits for I2S_TCR4_FRSZ. */ /*! @brief Read current value of the I2S_TCR4_FRSZ field. */ -#define BR_I2S_TCR4_FRSZ(x) (HW_I2S_TCR4(x).B.FRSZ) +#define BR_I2S_TCR4_FRSZ(x) (UNION_READ(hw_i2s_tcr4_t, HW_I2S_TCR4_ADDR(x), U, B.FRSZ)) /*! @brief Format value for bitfield I2S_TCR4_FRSZ. */ #define BF_I2S_TCR4_FRSZ(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR4_FRSZ) & BM_I2S_TCR4_FRSZ) @@ -1210,8 +1217,8 @@ #define HW_I2S_TCR5_ADDR(x) ((x) + 0x14U) #define HW_I2S_TCR5(x) (*(__IO hw_i2s_tcr5_t *) HW_I2S_TCR5_ADDR(x)) -#define HW_I2S_TCR5_RD(x) (HW_I2S_TCR5(x).U) -#define HW_I2S_TCR5_WR(x, v) (HW_I2S_TCR5(x).U = (v)) +#define HW_I2S_TCR5_RD(x) (ADDRESS_READ(hw_i2s_tcr5_t, HW_I2S_TCR5_ADDR(x))) +#define HW_I2S_TCR5_WR(x, v) (ADDRESS_WRITE(hw_i2s_tcr5_t, HW_I2S_TCR5_ADDR(x), v)) #define HW_I2S_TCR5_SET(x, v) (HW_I2S_TCR5_WR(x, HW_I2S_TCR5_RD(x) | (v))) #define HW_I2S_TCR5_CLR(x, v) (HW_I2S_TCR5_WR(x, HW_I2S_TCR5_RD(x) & ~(v))) #define HW_I2S_TCR5_TOG(x, v) (HW_I2S_TCR5_WR(x, HW_I2S_TCR5_RD(x) ^ (v))) @@ -1238,7 +1245,7 @@ #define BS_I2S_TCR5_FBT (5U) /*!< Bit field size in bits for I2S_TCR5_FBT. */ /*! @brief Read current value of the I2S_TCR5_FBT field. */ -#define BR_I2S_TCR5_FBT(x) (HW_I2S_TCR5(x).B.FBT) +#define BR_I2S_TCR5_FBT(x) (UNION_READ(hw_i2s_tcr5_t, HW_I2S_TCR5_ADDR(x), U, B.FBT)) /*! @brief Format value for bitfield I2S_TCR5_FBT. */ #define BF_I2S_TCR5_FBT(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR5_FBT) & BM_I2S_TCR5_FBT) @@ -1260,7 +1267,7 @@ #define BS_I2S_TCR5_W0W (5U) /*!< Bit field size in bits for I2S_TCR5_W0W. */ /*! @brief Read current value of the I2S_TCR5_W0W field. */ -#define BR_I2S_TCR5_W0W(x) (HW_I2S_TCR5(x).B.W0W) +#define BR_I2S_TCR5_W0W(x) (UNION_READ(hw_i2s_tcr5_t, HW_I2S_TCR5_ADDR(x), U, B.W0W)) /*! @brief Format value for bitfield I2S_TCR5_W0W. */ #define BF_I2S_TCR5_W0W(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR5_W0W) & BM_I2S_TCR5_W0W) @@ -1282,7 +1289,7 @@ #define BS_I2S_TCR5_WNW (5U) /*!< Bit field size in bits for I2S_TCR5_WNW. */ /*! @brief Read current value of the I2S_TCR5_WNW field. */ -#define BR_I2S_TCR5_WNW(x) (HW_I2S_TCR5(x).B.WNW) +#define BR_I2S_TCR5_WNW(x) (UNION_READ(hw_i2s_tcr5_t, HW_I2S_TCR5_ADDR(x), U, B.WNW)) /*! @brief Format value for bitfield I2S_TCR5_WNW. */ #define BF_I2S_TCR5_WNW(v) ((uint32_t)((uint32_t)(v) << BP_I2S_TCR5_WNW) & BM_I2S_TCR5_WNW) @@ -1318,8 +1325,8 @@ #define HW_I2S_TDRn_ADDR(x, n) ((x) + 0x20U + (0x4U * (n))) #define HW_I2S_TDRn(x, n) (*(__O hw_i2s_tdrn_t *) HW_I2S_TDRn_ADDR(x, n)) -#define HW_I2S_TDRn_RD(x, n) (HW_I2S_TDRn(x, n).U) -#define HW_I2S_TDRn_WR(x, n, v) (HW_I2S_TDRn(x, n).U = (v)) +#define HW_I2S_TDRn_RD(x, n) (ADDRESS_READ(hw_i2s_tdrn_t, HW_I2S_TDRn_ADDR(x, n))) +#define HW_I2S_TDRn_WR(x, n, v) (ADDRESS_WRITE(hw_i2s_tdrn_t, HW_I2S_TDRn_ADDR(x, n), v)) /*@}*/ /* @@ -1381,7 +1388,7 @@ #define HW_I2S_TFRn_ADDR(x, n) ((x) + 0x40U + (0x4U * (n))) #define HW_I2S_TFRn(x, n) (*(__I hw_i2s_tfrn_t *) HW_I2S_TFRn_ADDR(x, n)) -#define HW_I2S_TFRn_RD(x, n) (HW_I2S_TFRn(x, n).U) +#define HW_I2S_TFRn_RD(x, n) (ADDRESS_READ(hw_i2s_tfrn_t, HW_I2S_TFRn_ADDR(x, n))) /*@}*/ /* @@ -1399,7 +1406,7 @@ #define BS_I2S_TFRn_RFP (4U) /*!< Bit field size in bits for I2S_TFRn_RFP. */ /*! @brief Read current value of the I2S_TFRn_RFP field. */ -#define BR_I2S_TFRn_RFP(x, n) (HW_I2S_TFRn(x, n).B.RFP) +#define BR_I2S_TFRn_RFP(x, n) (UNION_READ(hw_i2s_tfrn_t, HW_I2S_TFRn_ADDR(x, n), U, B.RFP)) /*@}*/ /*! @@ -1413,7 +1420,7 @@ #define BS_I2S_TFRn_WFP (4U) /*!< Bit field size in bits for I2S_TFRn_WFP. */ /*! @brief Read current value of the I2S_TFRn_WFP field. */ -#define BR_I2S_TFRn_WFP(x, n) (HW_I2S_TFRn(x, n).B.WFP) +#define BR_I2S_TFRn_WFP(x, n) (UNION_READ(hw_i2s_tfrn_t, HW_I2S_TFRn_ADDR(x, n), U, B.WFP)) /*@}*/ /******************************************************************************* @@ -1445,8 +1452,8 @@ #define HW_I2S_TMR_ADDR(x) ((x) + 0x60U) #define HW_I2S_TMR(x) (*(__IO hw_i2s_tmr_t *) HW_I2S_TMR_ADDR(x)) -#define HW_I2S_TMR_RD(x) (HW_I2S_TMR(x).U) -#define HW_I2S_TMR_WR(x, v) (HW_I2S_TMR(x).U = (v)) +#define HW_I2S_TMR_RD(x) (ADDRESS_READ(hw_i2s_tmr_t, HW_I2S_TMR_ADDR(x))) +#define HW_I2S_TMR_WR(x, v) (ADDRESS_WRITE(hw_i2s_tmr_t, HW_I2S_TMR_ADDR(x), v)) #define HW_I2S_TMR_SET(x, v) (HW_I2S_TMR_WR(x, HW_I2S_TMR_RD(x) | (v))) #define HW_I2S_TMR_CLR(x, v) (HW_I2S_TMR_WR(x, HW_I2S_TMR_RD(x) & ~(v))) #define HW_I2S_TMR_TOG(x, v) (HW_I2S_TMR_WR(x, HW_I2S_TMR_RD(x) ^ (v))) @@ -1527,8 +1534,8 @@ #define HW_I2S_RCSR_ADDR(x) ((x) + 0x80U) #define HW_I2S_RCSR(x) (*(__IO hw_i2s_rcsr_t *) HW_I2S_RCSR_ADDR(x)) -#define HW_I2S_RCSR_RD(x) (HW_I2S_RCSR(x).U) -#define HW_I2S_RCSR_WR(x, v) (HW_I2S_RCSR(x).U = (v)) +#define HW_I2S_RCSR_RD(x) (ADDRESS_READ(hw_i2s_rcsr_t, HW_I2S_RCSR_ADDR(x))) +#define HW_I2S_RCSR_WR(x, v) (ADDRESS_WRITE(hw_i2s_rcsr_t, HW_I2S_RCSR_ADDR(x), v)) #define HW_I2S_RCSR_SET(x, v) (HW_I2S_RCSR_WR(x, HW_I2S_RCSR_RD(x) | (v))) #define HW_I2S_RCSR_CLR(x, v) (HW_I2S_RCSR_WR(x, HW_I2S_RCSR_RD(x) & ~(v))) #define HW_I2S_RCSR_TOG(x, v) (HW_I2S_RCSR_WR(x, HW_I2S_RCSR_RD(x) ^ (v))) @@ -1553,13 +1560,13 @@ #define BS_I2S_RCSR_FRDE (1U) /*!< Bit field size in bits for I2S_RCSR_FRDE. */ /*! @brief Read current value of the I2S_RCSR_FRDE field. */ -#define BR_I2S_RCSR_FRDE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRDE)) +#define BR_I2S_RCSR_FRDE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRDE))) /*! @brief Format value for bitfield I2S_RCSR_FRDE. */ #define BF_I2S_RCSR_FRDE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_FRDE) & BM_I2S_RCSR_FRDE) /*! @brief Set the FRDE field to a new value. */ -#define BW_I2S_RCSR_FRDE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRDE) = (v)) +#define BW_I2S_RCSR_FRDE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRDE), v)) /*@}*/ /*! @@ -1577,13 +1584,13 @@ #define BS_I2S_RCSR_FWDE (1U) /*!< Bit field size in bits for I2S_RCSR_FWDE. */ /*! @brief Read current value of the I2S_RCSR_FWDE field. */ -#define BR_I2S_RCSR_FWDE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWDE)) +#define BR_I2S_RCSR_FWDE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWDE))) /*! @brief Format value for bitfield I2S_RCSR_FWDE. */ #define BF_I2S_RCSR_FWDE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_FWDE) & BM_I2S_RCSR_FWDE) /*! @brief Set the FWDE field to a new value. */ -#define BW_I2S_RCSR_FWDE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWDE) = (v)) +#define BW_I2S_RCSR_FWDE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWDE), v)) /*@}*/ /*! @@ -1601,13 +1608,13 @@ #define BS_I2S_RCSR_FRIE (1U) /*!< Bit field size in bits for I2S_RCSR_FRIE. */ /*! @brief Read current value of the I2S_RCSR_FRIE field. */ -#define BR_I2S_RCSR_FRIE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRIE)) +#define BR_I2S_RCSR_FRIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRIE))) /*! @brief Format value for bitfield I2S_RCSR_FRIE. */ #define BF_I2S_RCSR_FRIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_FRIE) & BM_I2S_RCSR_FRIE) /*! @brief Set the FRIE field to a new value. */ -#define BW_I2S_RCSR_FRIE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRIE) = (v)) +#define BW_I2S_RCSR_FRIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRIE), v)) /*@}*/ /*! @@ -1625,13 +1632,13 @@ #define BS_I2S_RCSR_FWIE (1U) /*!< Bit field size in bits for I2S_RCSR_FWIE. */ /*! @brief Read current value of the I2S_RCSR_FWIE field. */ -#define BR_I2S_RCSR_FWIE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWIE)) +#define BR_I2S_RCSR_FWIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWIE))) /*! @brief Format value for bitfield I2S_RCSR_FWIE. */ #define BF_I2S_RCSR_FWIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_FWIE) & BM_I2S_RCSR_FWIE) /*! @brief Set the FWIE field to a new value. */ -#define BW_I2S_RCSR_FWIE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWIE) = (v)) +#define BW_I2S_RCSR_FWIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWIE), v)) /*@}*/ /*! @@ -1649,13 +1656,13 @@ #define BS_I2S_RCSR_FEIE (1U) /*!< Bit field size in bits for I2S_RCSR_FEIE. */ /*! @brief Read current value of the I2S_RCSR_FEIE field. */ -#define BR_I2S_RCSR_FEIE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FEIE)) +#define BR_I2S_RCSR_FEIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FEIE))) /*! @brief Format value for bitfield I2S_RCSR_FEIE. */ #define BF_I2S_RCSR_FEIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_FEIE) & BM_I2S_RCSR_FEIE) /*! @brief Set the FEIE field to a new value. */ -#define BW_I2S_RCSR_FEIE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FEIE) = (v)) +#define BW_I2S_RCSR_FEIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FEIE), v)) /*@}*/ /*! @@ -1673,13 +1680,13 @@ #define BS_I2S_RCSR_SEIE (1U) /*!< Bit field size in bits for I2S_RCSR_SEIE. */ /*! @brief Read current value of the I2S_RCSR_SEIE field. */ -#define BR_I2S_RCSR_SEIE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SEIE)) +#define BR_I2S_RCSR_SEIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SEIE))) /*! @brief Format value for bitfield I2S_RCSR_SEIE. */ #define BF_I2S_RCSR_SEIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_SEIE) & BM_I2S_RCSR_SEIE) /*! @brief Set the SEIE field to a new value. */ -#define BW_I2S_RCSR_SEIE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SEIE) = (v)) +#define BW_I2S_RCSR_SEIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SEIE), v)) /*@}*/ /*! @@ -1697,13 +1704,13 @@ #define BS_I2S_RCSR_WSIE (1U) /*!< Bit field size in bits for I2S_RCSR_WSIE. */ /*! @brief Read current value of the I2S_RCSR_WSIE field. */ -#define BR_I2S_RCSR_WSIE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_WSIE)) +#define BR_I2S_RCSR_WSIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_WSIE))) /*! @brief Format value for bitfield I2S_RCSR_WSIE. */ #define BF_I2S_RCSR_WSIE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_WSIE) & BM_I2S_RCSR_WSIE) /*! @brief Set the WSIE field to a new value. */ -#define BW_I2S_RCSR_WSIE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_WSIE) = (v)) +#define BW_I2S_RCSR_WSIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_WSIE), v)) /*@}*/ /*! @@ -1722,7 +1729,7 @@ #define BS_I2S_RCSR_FRF (1U) /*!< Bit field size in bits for I2S_RCSR_FRF. */ /*! @brief Read current value of the I2S_RCSR_FRF field. */ -#define BR_I2S_RCSR_FRF(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRF)) +#define BR_I2S_RCSR_FRF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FRF))) /*@}*/ /*! @@ -1740,7 +1747,7 @@ #define BS_I2S_RCSR_FWF (1U) /*!< Bit field size in bits for I2S_RCSR_FWF. */ /*! @brief Read current value of the I2S_RCSR_FWF field. */ -#define BR_I2S_RCSR_FWF(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWF)) +#define BR_I2S_RCSR_FWF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FWF))) /*@}*/ /*! @@ -1759,13 +1766,13 @@ #define BS_I2S_RCSR_FEF (1U) /*!< Bit field size in bits for I2S_RCSR_FEF. */ /*! @brief Read current value of the I2S_RCSR_FEF field. */ -#define BR_I2S_RCSR_FEF(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FEF)) +#define BR_I2S_RCSR_FEF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FEF))) /*! @brief Format value for bitfield I2S_RCSR_FEF. */ #define BF_I2S_RCSR_FEF(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_FEF) & BM_I2S_RCSR_FEF) /*! @brief Set the FEF field to a new value. */ -#define BW_I2S_RCSR_FEF(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FEF) = (v)) +#define BW_I2S_RCSR_FEF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FEF), v)) /*@}*/ /*! @@ -1784,13 +1791,13 @@ #define BS_I2S_RCSR_SEF (1U) /*!< Bit field size in bits for I2S_RCSR_SEF. */ /*! @brief Read current value of the I2S_RCSR_SEF field. */ -#define BR_I2S_RCSR_SEF(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SEF)) +#define BR_I2S_RCSR_SEF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SEF))) /*! @brief Format value for bitfield I2S_RCSR_SEF. */ #define BF_I2S_RCSR_SEF(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_SEF) & BM_I2S_RCSR_SEF) /*! @brief Set the SEF field to a new value. */ -#define BW_I2S_RCSR_SEF(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SEF) = (v)) +#define BW_I2S_RCSR_SEF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SEF), v)) /*@}*/ /*! @@ -1809,13 +1816,13 @@ #define BS_I2S_RCSR_WSF (1U) /*!< Bit field size in bits for I2S_RCSR_WSF. */ /*! @brief Read current value of the I2S_RCSR_WSF field. */ -#define BR_I2S_RCSR_WSF(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_WSF)) +#define BR_I2S_RCSR_WSF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_WSF))) /*! @brief Format value for bitfield I2S_RCSR_WSF. */ #define BF_I2S_RCSR_WSF(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_WSF) & BM_I2S_RCSR_WSF) /*! @brief Set the WSF field to a new value. */ -#define BW_I2S_RCSR_WSF(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_WSF) = (v)) +#define BW_I2S_RCSR_WSF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_WSF), v)) /*@}*/ /*! @@ -1834,13 +1841,13 @@ #define BS_I2S_RCSR_SR (1U) /*!< Bit field size in bits for I2S_RCSR_SR. */ /*! @brief Read current value of the I2S_RCSR_SR field. */ -#define BR_I2S_RCSR_SR(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SR)) +#define BR_I2S_RCSR_SR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SR))) /*! @brief Format value for bitfield I2S_RCSR_SR. */ #define BF_I2S_RCSR_SR(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_SR) & BM_I2S_RCSR_SR) /*! @brief Set the SR field to a new value. */ -#define BW_I2S_RCSR_SR(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SR) = (v)) +#define BW_I2S_RCSR_SR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_SR), v)) /*@}*/ /*! @@ -1863,7 +1870,7 @@ #define BF_I2S_RCSR_FR(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_FR) & BM_I2S_RCSR_FR) /*! @brief Set the FR field to a new value. */ -#define BW_I2S_RCSR_FR(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FR) = (v)) +#define BW_I2S_RCSR_FR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_FR), v)) /*@}*/ /*! @@ -1884,13 +1891,13 @@ #define BS_I2S_RCSR_BCE (1U) /*!< Bit field size in bits for I2S_RCSR_BCE. */ /*! @brief Read current value of the I2S_RCSR_BCE field. */ -#define BR_I2S_RCSR_BCE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_BCE)) +#define BR_I2S_RCSR_BCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_BCE))) /*! @brief Format value for bitfield I2S_RCSR_BCE. */ #define BF_I2S_RCSR_BCE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_BCE) & BM_I2S_RCSR_BCE) /*! @brief Set the BCE field to a new value. */ -#define BW_I2S_RCSR_BCE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_BCE) = (v)) +#define BW_I2S_RCSR_BCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_BCE), v)) /*@}*/ /*! @@ -1909,13 +1916,13 @@ #define BS_I2S_RCSR_DBGE (1U) /*!< Bit field size in bits for I2S_RCSR_DBGE. */ /*! @brief Read current value of the I2S_RCSR_DBGE field. */ -#define BR_I2S_RCSR_DBGE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_DBGE)) +#define BR_I2S_RCSR_DBGE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_DBGE))) /*! @brief Format value for bitfield I2S_RCSR_DBGE. */ #define BF_I2S_RCSR_DBGE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_DBGE) & BM_I2S_RCSR_DBGE) /*! @brief Set the DBGE field to a new value. */ -#define BW_I2S_RCSR_DBGE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_DBGE) = (v)) +#define BW_I2S_RCSR_DBGE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_DBGE), v)) /*@}*/ /*! @@ -1934,13 +1941,13 @@ #define BS_I2S_RCSR_STOPE (1U) /*!< Bit field size in bits for I2S_RCSR_STOPE. */ /*! @brief Read current value of the I2S_RCSR_STOPE field. */ -#define BR_I2S_RCSR_STOPE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_STOPE)) +#define BR_I2S_RCSR_STOPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_STOPE))) /*! @brief Format value for bitfield I2S_RCSR_STOPE. */ #define BF_I2S_RCSR_STOPE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_STOPE) & BM_I2S_RCSR_STOPE) /*! @brief Set the STOPE field to a new value. */ -#define BW_I2S_RCSR_STOPE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_STOPE) = (v)) +#define BW_I2S_RCSR_STOPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_STOPE), v)) /*@}*/ /*! @@ -1960,13 +1967,13 @@ #define BS_I2S_RCSR_RE (1U) /*!< Bit field size in bits for I2S_RCSR_RE. */ /*! @brief Read current value of the I2S_RCSR_RE field. */ -#define BR_I2S_RCSR_RE(x) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_RE)) +#define BR_I2S_RCSR_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_RE))) /*! @brief Format value for bitfield I2S_RCSR_RE. */ #define BF_I2S_RCSR_RE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCSR_RE) & BM_I2S_RCSR_RE) /*! @brief Set the RE field to a new value. */ -#define BW_I2S_RCSR_RE(x, v) (BITBAND_ACCESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_RE) = (v)) +#define BW_I2S_RCSR_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCSR_ADDR(x), BP_I2S_RCSR_RE), v)) /*@}*/ /******************************************************************************* @@ -1995,8 +2002,8 @@ #define HW_I2S_RCR1_ADDR(x) ((x) + 0x84U) #define HW_I2S_RCR1(x) (*(__IO hw_i2s_rcr1_t *) HW_I2S_RCR1_ADDR(x)) -#define HW_I2S_RCR1_RD(x) (HW_I2S_RCR1(x).U) -#define HW_I2S_RCR1_WR(x, v) (HW_I2S_RCR1(x).U = (v)) +#define HW_I2S_RCR1_RD(x) (ADDRESS_READ(hw_i2s_rcr1_t, HW_I2S_RCR1_ADDR(x))) +#define HW_I2S_RCR1_WR(x, v) (ADDRESS_WRITE(hw_i2s_rcr1_t, HW_I2S_RCR1_ADDR(x), v)) #define HW_I2S_RCR1_SET(x, v) (HW_I2S_RCR1_WR(x, HW_I2S_RCR1_RD(x) | (v))) #define HW_I2S_RCR1_CLR(x, v) (HW_I2S_RCR1_WR(x, HW_I2S_RCR1_RD(x) & ~(v))) #define HW_I2S_RCR1_TOG(x, v) (HW_I2S_RCR1_WR(x, HW_I2S_RCR1_RD(x) ^ (v))) @@ -2017,7 +2024,7 @@ #define BS_I2S_RCR1_RFW (3U) /*!< Bit field size in bits for I2S_RCR1_RFW. */ /*! @brief Read current value of the I2S_RCR1_RFW field. */ -#define BR_I2S_RCR1_RFW(x) (HW_I2S_RCR1(x).B.RFW) +#define BR_I2S_RCR1_RFW(x) (UNION_READ(hw_i2s_rcr1_t, HW_I2S_RCR1_ADDR(x), U, B.RFW)) /*! @brief Format value for bitfield I2S_RCR1_RFW. */ #define BF_I2S_RCR1_RFW(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR1_RFW) & BM_I2S_RCR1_RFW) @@ -2060,8 +2067,8 @@ #define HW_I2S_RCR2_ADDR(x) ((x) + 0x88U) #define HW_I2S_RCR2(x) (*(__IO hw_i2s_rcr2_t *) HW_I2S_RCR2_ADDR(x)) -#define HW_I2S_RCR2_RD(x) (HW_I2S_RCR2(x).U) -#define HW_I2S_RCR2_WR(x, v) (HW_I2S_RCR2(x).U = (v)) +#define HW_I2S_RCR2_RD(x) (ADDRESS_READ(hw_i2s_rcr2_t, HW_I2S_RCR2_ADDR(x))) +#define HW_I2S_RCR2_WR(x, v) (ADDRESS_WRITE(hw_i2s_rcr2_t, HW_I2S_RCR2_ADDR(x), v)) #define HW_I2S_RCR2_SET(x, v) (HW_I2S_RCR2_WR(x, HW_I2S_RCR2_RD(x) | (v))) #define HW_I2S_RCR2_CLR(x, v) (HW_I2S_RCR2_WR(x, HW_I2S_RCR2_RD(x) & ~(v))) #define HW_I2S_RCR2_TOG(x, v) (HW_I2S_RCR2_WR(x, HW_I2S_RCR2_RD(x) ^ (v))) @@ -2083,7 +2090,7 @@ #define BS_I2S_RCR2_DIV (8U) /*!< Bit field size in bits for I2S_RCR2_DIV. */ /*! @brief Read current value of the I2S_RCR2_DIV field. */ -#define BR_I2S_RCR2_DIV(x) (HW_I2S_RCR2(x).B.DIV) +#define BR_I2S_RCR2_DIV(x) (UNION_READ(hw_i2s_rcr2_t, HW_I2S_RCR2_ADDR(x), U, B.DIV)) /*! @brief Format value for bitfield I2S_RCR2_DIV. */ #define BF_I2S_RCR2_DIV(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR2_DIV) & BM_I2S_RCR2_DIV) @@ -2107,13 +2114,13 @@ #define BS_I2S_RCR2_BCD (1U) /*!< Bit field size in bits for I2S_RCR2_BCD. */ /*! @brief Read current value of the I2S_RCR2_BCD field. */ -#define BR_I2S_RCR2_BCD(x) (BITBAND_ACCESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCD)) +#define BR_I2S_RCR2_BCD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCD))) /*! @brief Format value for bitfield I2S_RCR2_BCD. */ #define BF_I2S_RCR2_BCD(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR2_BCD) & BM_I2S_RCR2_BCD) /*! @brief Set the BCD field to a new value. */ -#define BW_I2S_RCR2_BCD(x, v) (BITBAND_ACCESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCD) = (v)) +#define BW_I2S_RCR2_BCD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCD), v)) /*@}*/ /*! @@ -2133,13 +2140,13 @@ #define BS_I2S_RCR2_BCP (1U) /*!< Bit field size in bits for I2S_RCR2_BCP. */ /*! @brief Read current value of the I2S_RCR2_BCP field. */ -#define BR_I2S_RCR2_BCP(x) (BITBAND_ACCESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCP)) +#define BR_I2S_RCR2_BCP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCP))) /*! @brief Format value for bitfield I2S_RCR2_BCP. */ #define BF_I2S_RCR2_BCP(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR2_BCP) & BM_I2S_RCR2_BCP) /*! @brief Set the BCP field to a new value. */ -#define BW_I2S_RCR2_BCP(x, v) (BITBAND_ACCESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCP) = (v)) +#define BW_I2S_RCR2_BCP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCP), v)) /*@}*/ /*! @@ -2163,7 +2170,7 @@ #define BS_I2S_RCR2_MSEL (2U) /*!< Bit field size in bits for I2S_RCR2_MSEL. */ /*! @brief Read current value of the I2S_RCR2_MSEL field. */ -#define BR_I2S_RCR2_MSEL(x) (HW_I2S_RCR2(x).B.MSEL) +#define BR_I2S_RCR2_MSEL(x) (UNION_READ(hw_i2s_rcr2_t, HW_I2S_RCR2_ADDR(x), U, B.MSEL)) /*! @brief Format value for bitfield I2S_RCR2_MSEL. */ #define BF_I2S_RCR2_MSEL(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR2_MSEL) & BM_I2S_RCR2_MSEL) @@ -2196,13 +2203,13 @@ #define BS_I2S_RCR2_BCI (1U) /*!< Bit field size in bits for I2S_RCR2_BCI. */ /*! @brief Read current value of the I2S_RCR2_BCI field. */ -#define BR_I2S_RCR2_BCI(x) (BITBAND_ACCESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCI)) +#define BR_I2S_RCR2_BCI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCI))) /*! @brief Format value for bitfield I2S_RCR2_BCI. */ #define BF_I2S_RCR2_BCI(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR2_BCI) & BM_I2S_RCR2_BCI) /*! @brief Set the BCI field to a new value. */ -#define BW_I2S_RCR2_BCI(x, v) (BITBAND_ACCESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCI) = (v)) +#define BW_I2S_RCR2_BCI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCI), v)) /*@}*/ /*! @@ -2228,13 +2235,13 @@ #define BS_I2S_RCR2_BCS (1U) /*!< Bit field size in bits for I2S_RCR2_BCS. */ /*! @brief Read current value of the I2S_RCR2_BCS field. */ -#define BR_I2S_RCR2_BCS(x) (BITBAND_ACCESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCS)) +#define BR_I2S_RCR2_BCS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCS))) /*! @brief Format value for bitfield I2S_RCR2_BCS. */ #define BF_I2S_RCR2_BCS(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR2_BCS) & BM_I2S_RCR2_BCS) /*! @brief Set the BCS field to a new value. */ -#define BW_I2S_RCR2_BCS(x, v) (BITBAND_ACCESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCS) = (v)) +#define BW_I2S_RCR2_BCS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR2_ADDR(x), BP_I2S_RCR2_BCS), v)) /*@}*/ /*! @@ -2256,7 +2263,7 @@ #define BS_I2S_RCR2_SYNC (2U) /*!< Bit field size in bits for I2S_RCR2_SYNC. */ /*! @brief Read current value of the I2S_RCR2_SYNC field. */ -#define BR_I2S_RCR2_SYNC(x) (HW_I2S_RCR2(x).B.SYNC) +#define BR_I2S_RCR2_SYNC(x) (UNION_READ(hw_i2s_rcr2_t, HW_I2S_RCR2_ADDR(x), U, B.SYNC)) /*! @brief Format value for bitfield I2S_RCR2_SYNC. */ #define BF_I2S_RCR2_SYNC(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR2_SYNC) & BM_I2S_RCR2_SYNC) @@ -2295,8 +2302,8 @@ #define HW_I2S_RCR3_ADDR(x) ((x) + 0x8CU) #define HW_I2S_RCR3(x) (*(__IO hw_i2s_rcr3_t *) HW_I2S_RCR3_ADDR(x)) -#define HW_I2S_RCR3_RD(x) (HW_I2S_RCR3(x).U) -#define HW_I2S_RCR3_WR(x, v) (HW_I2S_RCR3(x).U = (v)) +#define HW_I2S_RCR3_RD(x) (ADDRESS_READ(hw_i2s_rcr3_t, HW_I2S_RCR3_ADDR(x))) +#define HW_I2S_RCR3_WR(x, v) (ADDRESS_WRITE(hw_i2s_rcr3_t, HW_I2S_RCR3_ADDR(x), v)) #define HW_I2S_RCR3_SET(x, v) (HW_I2S_RCR3_WR(x, HW_I2S_RCR3_RD(x) | (v))) #define HW_I2S_RCR3_CLR(x, v) (HW_I2S_RCR3_WR(x, HW_I2S_RCR3_RD(x) & ~(v))) #define HW_I2S_RCR3_TOG(x, v) (HW_I2S_RCR3_WR(x, HW_I2S_RCR3_RD(x) ^ (v))) @@ -2320,7 +2327,7 @@ #define BS_I2S_RCR3_WDFL (5U) /*!< Bit field size in bits for I2S_RCR3_WDFL. */ /*! @brief Read current value of the I2S_RCR3_WDFL field. */ -#define BR_I2S_RCR3_WDFL(x) (HW_I2S_RCR3(x).B.WDFL) +#define BR_I2S_RCR3_WDFL(x) (UNION_READ(hw_i2s_rcr3_t, HW_I2S_RCR3_ADDR(x), U, B.WDFL)) /*! @brief Format value for bitfield I2S_RCR3_WDFL. */ #define BF_I2S_RCR3_WDFL(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR3_WDFL) & BM_I2S_RCR3_WDFL) @@ -2345,7 +2352,7 @@ #define BS_I2S_RCR3_RCE (2U) /*!< Bit field size in bits for I2S_RCR3_RCE. */ /*! @brief Read current value of the I2S_RCR3_RCE field. */ -#define BR_I2S_RCR3_RCE(x) (HW_I2S_RCR3(x).B.RCE) +#define BR_I2S_RCR3_RCE(x) (UNION_READ(hw_i2s_rcr3_t, HW_I2S_RCR3_ADDR(x), U, B.RCE)) /*! @brief Format value for bitfield I2S_RCR3_RCE. */ #define BF_I2S_RCR3_RCE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR3_RCE) & BM_I2S_RCR3_RCE) @@ -2390,8 +2397,8 @@ #define HW_I2S_RCR4_ADDR(x) ((x) + 0x90U) #define HW_I2S_RCR4(x) (*(__IO hw_i2s_rcr4_t *) HW_I2S_RCR4_ADDR(x)) -#define HW_I2S_RCR4_RD(x) (HW_I2S_RCR4(x).U) -#define HW_I2S_RCR4_WR(x, v) (HW_I2S_RCR4(x).U = (v)) +#define HW_I2S_RCR4_RD(x) (ADDRESS_READ(hw_i2s_rcr4_t, HW_I2S_RCR4_ADDR(x))) +#define HW_I2S_RCR4_WR(x, v) (ADDRESS_WRITE(hw_i2s_rcr4_t, HW_I2S_RCR4_ADDR(x), v)) #define HW_I2S_RCR4_SET(x, v) (HW_I2S_RCR4_WR(x, HW_I2S_RCR4_RD(x) | (v))) #define HW_I2S_RCR4_CLR(x, v) (HW_I2S_RCR4_WR(x, HW_I2S_RCR4_RD(x) & ~(v))) #define HW_I2S_RCR4_TOG(x, v) (HW_I2S_RCR4_WR(x, HW_I2S_RCR4_RD(x) ^ (v))) @@ -2416,13 +2423,13 @@ #define BS_I2S_RCR4_FSD (1U) /*!< Bit field size in bits for I2S_RCR4_FSD. */ /*! @brief Read current value of the I2S_RCR4_FSD field. */ -#define BR_I2S_RCR4_FSD(x) (BITBAND_ACCESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSD)) +#define BR_I2S_RCR4_FSD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSD))) /*! @brief Format value for bitfield I2S_RCR4_FSD. */ #define BF_I2S_RCR4_FSD(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR4_FSD) & BM_I2S_RCR4_FSD) /*! @brief Set the FSD field to a new value. */ -#define BW_I2S_RCR4_FSD(x, v) (BITBAND_ACCESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSD) = (v)) +#define BW_I2S_RCR4_FSD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSD), v)) /*@}*/ /*! @@ -2440,13 +2447,13 @@ #define BS_I2S_RCR4_FSP (1U) /*!< Bit field size in bits for I2S_RCR4_FSP. */ /*! @brief Read current value of the I2S_RCR4_FSP field. */ -#define BR_I2S_RCR4_FSP(x) (BITBAND_ACCESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSP)) +#define BR_I2S_RCR4_FSP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSP))) /*! @brief Format value for bitfield I2S_RCR4_FSP. */ #define BF_I2S_RCR4_FSP(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR4_FSP) & BM_I2S_RCR4_FSP) /*! @brief Set the FSP field to a new value. */ -#define BW_I2S_RCR4_FSP(x, v) (BITBAND_ACCESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSP) = (v)) +#define BW_I2S_RCR4_FSP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSP), v)) /*@}*/ /*! @@ -2462,13 +2469,13 @@ #define BS_I2S_RCR4_FSE (1U) /*!< Bit field size in bits for I2S_RCR4_FSE. */ /*! @brief Read current value of the I2S_RCR4_FSE field. */ -#define BR_I2S_RCR4_FSE(x) (BITBAND_ACCESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSE)) +#define BR_I2S_RCR4_FSE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSE))) /*! @brief Format value for bitfield I2S_RCR4_FSE. */ #define BF_I2S_RCR4_FSE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR4_FSE) & BM_I2S_RCR4_FSE) /*! @brief Set the FSE field to a new value. */ -#define BW_I2S_RCR4_FSE(x, v) (BITBAND_ACCESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSE) = (v)) +#define BW_I2S_RCR4_FSE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_FSE), v)) /*@}*/ /*! @@ -2486,13 +2493,13 @@ #define BS_I2S_RCR4_MF (1U) /*!< Bit field size in bits for I2S_RCR4_MF. */ /*! @brief Read current value of the I2S_RCR4_MF field. */ -#define BR_I2S_RCR4_MF(x) (BITBAND_ACCESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_MF)) +#define BR_I2S_RCR4_MF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_MF))) /*! @brief Format value for bitfield I2S_RCR4_MF. */ #define BF_I2S_RCR4_MF(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR4_MF) & BM_I2S_RCR4_MF) /*! @brief Set the MF field to a new value. */ -#define BW_I2S_RCR4_MF(x, v) (BITBAND_ACCESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_MF) = (v)) +#define BW_I2S_RCR4_MF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_RCR4_ADDR(x), BP_I2S_RCR4_MF), v)) /*@}*/ /*! @@ -2509,7 +2516,7 @@ #define BS_I2S_RCR4_SYWD (5U) /*!< Bit field size in bits for I2S_RCR4_SYWD. */ /*! @brief Read current value of the I2S_RCR4_SYWD field. */ -#define BR_I2S_RCR4_SYWD(x) (HW_I2S_RCR4(x).B.SYWD) +#define BR_I2S_RCR4_SYWD(x) (UNION_READ(hw_i2s_rcr4_t, HW_I2S_RCR4_ADDR(x), U, B.SYWD)) /*! @brief Format value for bitfield I2S_RCR4_SYWD. */ #define BF_I2S_RCR4_SYWD(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR4_SYWD) & BM_I2S_RCR4_SYWD) @@ -2531,7 +2538,7 @@ #define BS_I2S_RCR4_FRSZ (5U) /*!< Bit field size in bits for I2S_RCR4_FRSZ. */ /*! @brief Read current value of the I2S_RCR4_FRSZ field. */ -#define BR_I2S_RCR4_FRSZ(x) (HW_I2S_RCR4(x).B.FRSZ) +#define BR_I2S_RCR4_FRSZ(x) (UNION_READ(hw_i2s_rcr4_t, HW_I2S_RCR4_ADDR(x), U, B.FRSZ)) /*! @brief Format value for bitfield I2S_RCR4_FRSZ. */ #define BF_I2S_RCR4_FRSZ(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR4_FRSZ) & BM_I2S_RCR4_FRSZ) @@ -2573,8 +2580,8 @@ #define HW_I2S_RCR5_ADDR(x) ((x) + 0x94U) #define HW_I2S_RCR5(x) (*(__IO hw_i2s_rcr5_t *) HW_I2S_RCR5_ADDR(x)) -#define HW_I2S_RCR5_RD(x) (HW_I2S_RCR5(x).U) -#define HW_I2S_RCR5_WR(x, v) (HW_I2S_RCR5(x).U = (v)) +#define HW_I2S_RCR5_RD(x) (ADDRESS_READ(hw_i2s_rcr5_t, HW_I2S_RCR5_ADDR(x))) +#define HW_I2S_RCR5_WR(x, v) (ADDRESS_WRITE(hw_i2s_rcr5_t, HW_I2S_RCR5_ADDR(x), v)) #define HW_I2S_RCR5_SET(x, v) (HW_I2S_RCR5_WR(x, HW_I2S_RCR5_RD(x) | (v))) #define HW_I2S_RCR5_CLR(x, v) (HW_I2S_RCR5_WR(x, HW_I2S_RCR5_RD(x) & ~(v))) #define HW_I2S_RCR5_TOG(x, v) (HW_I2S_RCR5_WR(x, HW_I2S_RCR5_RD(x) ^ (v))) @@ -2601,7 +2608,7 @@ #define BS_I2S_RCR5_FBT (5U) /*!< Bit field size in bits for I2S_RCR5_FBT. */ /*! @brief Read current value of the I2S_RCR5_FBT field. */ -#define BR_I2S_RCR5_FBT(x) (HW_I2S_RCR5(x).B.FBT) +#define BR_I2S_RCR5_FBT(x) (UNION_READ(hw_i2s_rcr5_t, HW_I2S_RCR5_ADDR(x), U, B.FBT)) /*! @brief Format value for bitfield I2S_RCR5_FBT. */ #define BF_I2S_RCR5_FBT(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR5_FBT) & BM_I2S_RCR5_FBT) @@ -2623,7 +2630,7 @@ #define BS_I2S_RCR5_W0W (5U) /*!< Bit field size in bits for I2S_RCR5_W0W. */ /*! @brief Read current value of the I2S_RCR5_W0W field. */ -#define BR_I2S_RCR5_W0W(x) (HW_I2S_RCR5(x).B.W0W) +#define BR_I2S_RCR5_W0W(x) (UNION_READ(hw_i2s_rcr5_t, HW_I2S_RCR5_ADDR(x), U, B.W0W)) /*! @brief Format value for bitfield I2S_RCR5_W0W. */ #define BF_I2S_RCR5_W0W(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR5_W0W) & BM_I2S_RCR5_W0W) @@ -2645,7 +2652,7 @@ #define BS_I2S_RCR5_WNW (5U) /*!< Bit field size in bits for I2S_RCR5_WNW. */ /*! @brief Read current value of the I2S_RCR5_WNW field. */ -#define BR_I2S_RCR5_WNW(x) (HW_I2S_RCR5(x).B.WNW) +#define BR_I2S_RCR5_WNW(x) (UNION_READ(hw_i2s_rcr5_t, HW_I2S_RCR5_ADDR(x), U, B.WNW)) /*! @brief Format value for bitfield I2S_RCR5_WNW. */ #define BF_I2S_RCR5_WNW(v) ((uint32_t)((uint32_t)(v) << BP_I2S_RCR5_WNW) & BM_I2S_RCR5_WNW) @@ -2684,7 +2691,7 @@ #define HW_I2S_RDRn_ADDR(x, n) ((x) + 0xA0U + (0x4U * (n))) #define HW_I2S_RDRn(x, n) (*(__I hw_i2s_rdrn_t *) HW_I2S_RDRn_ADDR(x, n)) -#define HW_I2S_RDRn_RD(x, n) (HW_I2S_RDRn(x, n).U) +#define HW_I2S_RDRn_RD(x, n) (ADDRESS_READ(hw_i2s_rdrn_t, HW_I2S_RDRn_ADDR(x, n))) /*@}*/ /* @@ -2743,7 +2750,7 @@ #define HW_I2S_RFRn_ADDR(x, n) ((x) + 0xC0U + (0x4U * (n))) #define HW_I2S_RFRn(x, n) (*(__I hw_i2s_rfrn_t *) HW_I2S_RFRn_ADDR(x, n)) -#define HW_I2S_RFRn_RD(x, n) (HW_I2S_RFRn(x, n).U) +#define HW_I2S_RFRn_RD(x, n) (ADDRESS_READ(hw_i2s_rfrn_t, HW_I2S_RFRn_ADDR(x, n))) /*@}*/ /* @@ -2761,7 +2768,7 @@ #define BS_I2S_RFRn_RFP (4U) /*!< Bit field size in bits for I2S_RFRn_RFP. */ /*! @brief Read current value of the I2S_RFRn_RFP field. */ -#define BR_I2S_RFRn_RFP(x, n) (HW_I2S_RFRn(x, n).B.RFP) +#define BR_I2S_RFRn_RFP(x, n) (UNION_READ(hw_i2s_rfrn_t, HW_I2S_RFRn_ADDR(x, n), U, B.RFP)) /*@}*/ /*! @@ -2775,7 +2782,7 @@ #define BS_I2S_RFRn_WFP (4U) /*!< Bit field size in bits for I2S_RFRn_WFP. */ /*! @brief Read current value of the I2S_RFRn_WFP field. */ -#define BR_I2S_RFRn_WFP(x, n) (HW_I2S_RFRn(x, n).B.WFP) +#define BR_I2S_RFRn_WFP(x, n) (UNION_READ(hw_i2s_rfrn_t, HW_I2S_RFRn_ADDR(x, n), U, B.WFP)) /*@}*/ /******************************************************************************* @@ -2807,8 +2814,8 @@ #define HW_I2S_RMR_ADDR(x) ((x) + 0xE0U) #define HW_I2S_RMR(x) (*(__IO hw_i2s_rmr_t *) HW_I2S_RMR_ADDR(x)) -#define HW_I2S_RMR_RD(x) (HW_I2S_RMR(x).U) -#define HW_I2S_RMR_WR(x, v) (HW_I2S_RMR(x).U = (v)) +#define HW_I2S_RMR_RD(x) (ADDRESS_READ(hw_i2s_rmr_t, HW_I2S_RMR_ADDR(x))) +#define HW_I2S_RMR_WR(x, v) (ADDRESS_WRITE(hw_i2s_rmr_t, HW_I2S_RMR_ADDR(x), v)) #define HW_I2S_RMR_SET(x, v) (HW_I2S_RMR_WR(x, HW_I2S_RMR_RD(x) | (v))) #define HW_I2S_RMR_CLR(x, v) (HW_I2S_RMR_WR(x, HW_I2S_RMR_RD(x) & ~(v))) #define HW_I2S_RMR_TOG(x, v) (HW_I2S_RMR_WR(x, HW_I2S_RMR_RD(x) ^ (v))) @@ -2875,8 +2882,8 @@ #define HW_I2S_MCR_ADDR(x) ((x) + 0x100U) #define HW_I2S_MCR(x) (*(__IO hw_i2s_mcr_t *) HW_I2S_MCR_ADDR(x)) -#define HW_I2S_MCR_RD(x) (HW_I2S_MCR(x).U) -#define HW_I2S_MCR_WR(x, v) (HW_I2S_MCR(x).U = (v)) +#define HW_I2S_MCR_RD(x) (ADDRESS_READ(hw_i2s_mcr_t, HW_I2S_MCR_ADDR(x))) +#define HW_I2S_MCR_WR(x, v) (ADDRESS_WRITE(hw_i2s_mcr_t, HW_I2S_MCR_ADDR(x), v)) #define HW_I2S_MCR_SET(x, v) (HW_I2S_MCR_WR(x, HW_I2S_MCR_RD(x) | (v))) #define HW_I2S_MCR_CLR(x, v) (HW_I2S_MCR_WR(x, HW_I2S_MCR_RD(x) & ~(v))) #define HW_I2S_MCR_TOG(x, v) (HW_I2S_MCR_WR(x, HW_I2S_MCR_RD(x) ^ (v))) @@ -2905,7 +2912,7 @@ #define BS_I2S_MCR_MICS (2U) /*!< Bit field size in bits for I2S_MCR_MICS. */ /*! @brief Read current value of the I2S_MCR_MICS field. */ -#define BR_I2S_MCR_MICS(x) (HW_I2S_MCR(x).B.MICS) +#define BR_I2S_MCR_MICS(x) (UNION_READ(hw_i2s_mcr_t, HW_I2S_MCR_ADDR(x), U, B.MICS)) /*! @brief Format value for bitfield I2S_MCR_MICS. */ #define BF_I2S_MCR_MICS(v) ((uint32_t)((uint32_t)(v) << BP_I2S_MCR_MICS) & BM_I2S_MCR_MICS) @@ -2933,13 +2940,13 @@ #define BS_I2S_MCR_MOE (1U) /*!< Bit field size in bits for I2S_MCR_MOE. */ /*! @brief Read current value of the I2S_MCR_MOE field. */ -#define BR_I2S_MCR_MOE(x) (BITBAND_ACCESS32(HW_I2S_MCR_ADDR(x), BP_I2S_MCR_MOE)) +#define BR_I2S_MCR_MOE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_MCR_ADDR(x), BP_I2S_MCR_MOE))) /*! @brief Format value for bitfield I2S_MCR_MOE. */ #define BF_I2S_MCR_MOE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_MCR_MOE) & BM_I2S_MCR_MOE) /*! @brief Set the MOE field to a new value. */ -#define BW_I2S_MCR_MOE(x, v) (BITBAND_ACCESS32(HW_I2S_MCR_ADDR(x), BP_I2S_MCR_MOE) = (v)) +#define BW_I2S_MCR_MOE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_I2S_MCR_ADDR(x), BP_I2S_MCR_MOE), v)) /*@}*/ /*! @@ -2958,7 +2965,7 @@ #define BS_I2S_MCR_DUF (1U) /*!< Bit field size in bits for I2S_MCR_DUF. */ /*! @brief Read current value of the I2S_MCR_DUF field. */ -#define BR_I2S_MCR_DUF(x) (BITBAND_ACCESS32(HW_I2S_MCR_ADDR(x), BP_I2S_MCR_DUF)) +#define BR_I2S_MCR_DUF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_I2S_MCR_ADDR(x), BP_I2S_MCR_DUF))) /*@}*/ /******************************************************************************* @@ -2993,8 +3000,8 @@ #define HW_I2S_MDR_ADDR(x) ((x) + 0x104U) #define HW_I2S_MDR(x) (*(__IO hw_i2s_mdr_t *) HW_I2S_MDR_ADDR(x)) -#define HW_I2S_MDR_RD(x) (HW_I2S_MDR(x).U) -#define HW_I2S_MDR_WR(x, v) (HW_I2S_MDR(x).U = (v)) +#define HW_I2S_MDR_RD(x) (ADDRESS_READ(hw_i2s_mdr_t, HW_I2S_MDR_ADDR(x))) +#define HW_I2S_MDR_WR(x, v) (ADDRESS_WRITE(hw_i2s_mdr_t, HW_I2S_MDR_ADDR(x), v)) #define HW_I2S_MDR_SET(x, v) (HW_I2S_MDR_WR(x, HW_I2S_MDR_RD(x) | (v))) #define HW_I2S_MDR_CLR(x, v) (HW_I2S_MDR_WR(x, HW_I2S_MDR_RD(x) & ~(v))) #define HW_I2S_MDR_TOG(x, v) (HW_I2S_MDR_WR(x, HW_I2S_MDR_RD(x) ^ (v))) @@ -3017,7 +3024,7 @@ #define BS_I2S_MDR_DIVIDE (12U) /*!< Bit field size in bits for I2S_MDR_DIVIDE. */ /*! @brief Read current value of the I2S_MDR_DIVIDE field. */ -#define BR_I2S_MDR_DIVIDE(x) (HW_I2S_MDR(x).B.DIVIDE) +#define BR_I2S_MDR_DIVIDE(x) (UNION_READ(hw_i2s_mdr_t, HW_I2S_MDR_ADDR(x), U, B.DIVIDE)) /*! @brief Format value for bitfield I2S_MDR_DIVIDE. */ #define BF_I2S_MDR_DIVIDE(v) ((uint32_t)((uint32_t)(v) << BP_I2S_MDR_DIVIDE) & BM_I2S_MDR_DIVIDE) @@ -3039,7 +3046,7 @@ #define BS_I2S_MDR_FRACT (8U) /*!< Bit field size in bits for I2S_MDR_FRACT. */ /*! @brief Read current value of the I2S_MDR_FRACT field. */ -#define BR_I2S_MDR_FRACT(x) (HW_I2S_MDR(x).B.FRACT) +#define BR_I2S_MDR_FRACT(x) (UNION_READ(hw_i2s_mdr_t, HW_I2S_MDR_ADDR(x), U, B.FRACT)) /*! @brief Format value for bitfield I2S_MDR_FRACT. */ #define BF_I2S_MDR_FRACT(v) ((uint32_t)((uint32_t)(v) << BP_I2S_MDR_FRACT) & BM_I2S_MDR_FRACT)
--- a/hal/device/device/MK64F12/MK64F12_llwu.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_llwu.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -142,8 +149,8 @@ #define HW_LLWU_PE1_ADDR(x) ((x) + 0x0U) #define HW_LLWU_PE1(x) (*(__IO hw_llwu_pe1_t *) HW_LLWU_PE1_ADDR(x)) -#define HW_LLWU_PE1_RD(x) (HW_LLWU_PE1(x).U) -#define HW_LLWU_PE1_WR(x, v) (HW_LLWU_PE1(x).U = (v)) +#define HW_LLWU_PE1_RD(x) (ADDRESS_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x))) +#define HW_LLWU_PE1_WR(x, v) (ADDRESS_WRITE(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), v)) #define HW_LLWU_PE1_SET(x, v) (HW_LLWU_PE1_WR(x, HW_LLWU_PE1_RD(x) | (v))) #define HW_LLWU_PE1_CLR(x, v) (HW_LLWU_PE1_WR(x, HW_LLWU_PE1_RD(x) & ~(v))) #define HW_LLWU_PE1_TOG(x, v) (HW_LLWU_PE1_WR(x, HW_LLWU_PE1_RD(x) ^ (v))) @@ -170,7 +177,7 @@ #define BS_LLWU_PE1_WUPE0 (2U) /*!< Bit field size in bits for LLWU_PE1_WUPE0. */ /*! @brief Read current value of the LLWU_PE1_WUPE0 field. */ -#define BR_LLWU_PE1_WUPE0(x) (HW_LLWU_PE1(x).B.WUPE0) +#define BR_LLWU_PE1_WUPE0(x) (UNION_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), U, B.WUPE0)) /*! @brief Format value for bitfield LLWU_PE1_WUPE0. */ #define BF_LLWU_PE1_WUPE0(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE1_WUPE0) & BM_LLWU_PE1_WUPE0) @@ -196,7 +203,7 @@ #define BS_LLWU_PE1_WUPE1 (2U) /*!< Bit field size in bits for LLWU_PE1_WUPE1. */ /*! @brief Read current value of the LLWU_PE1_WUPE1 field. */ -#define BR_LLWU_PE1_WUPE1(x) (HW_LLWU_PE1(x).B.WUPE1) +#define BR_LLWU_PE1_WUPE1(x) (UNION_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), U, B.WUPE1)) /*! @brief Format value for bitfield LLWU_PE1_WUPE1. */ #define BF_LLWU_PE1_WUPE1(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE1_WUPE1) & BM_LLWU_PE1_WUPE1) @@ -222,7 +229,7 @@ #define BS_LLWU_PE1_WUPE2 (2U) /*!< Bit field size in bits for LLWU_PE1_WUPE2. */ /*! @brief Read current value of the LLWU_PE1_WUPE2 field. */ -#define BR_LLWU_PE1_WUPE2(x) (HW_LLWU_PE1(x).B.WUPE2) +#define BR_LLWU_PE1_WUPE2(x) (UNION_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), U, B.WUPE2)) /*! @brief Format value for bitfield LLWU_PE1_WUPE2. */ #define BF_LLWU_PE1_WUPE2(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE1_WUPE2) & BM_LLWU_PE1_WUPE2) @@ -248,7 +255,7 @@ #define BS_LLWU_PE1_WUPE3 (2U) /*!< Bit field size in bits for LLWU_PE1_WUPE3. */ /*! @brief Read current value of the LLWU_PE1_WUPE3 field. */ -#define BR_LLWU_PE1_WUPE3(x) (HW_LLWU_PE1(x).B.WUPE3) +#define BR_LLWU_PE1_WUPE3(x) (UNION_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), U, B.WUPE3)) /*! @brief Format value for bitfield LLWU_PE1_WUPE3. */ #define BF_LLWU_PE1_WUPE3(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE1_WUPE3) & BM_LLWU_PE1_WUPE3) @@ -293,8 +300,8 @@ #define HW_LLWU_PE2_ADDR(x) ((x) + 0x1U) #define HW_LLWU_PE2(x) (*(__IO hw_llwu_pe2_t *) HW_LLWU_PE2_ADDR(x)) -#define HW_LLWU_PE2_RD(x) (HW_LLWU_PE2(x).U) -#define HW_LLWU_PE2_WR(x, v) (HW_LLWU_PE2(x).U = (v)) +#define HW_LLWU_PE2_RD(x) (ADDRESS_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x))) +#define HW_LLWU_PE2_WR(x, v) (ADDRESS_WRITE(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), v)) #define HW_LLWU_PE2_SET(x, v) (HW_LLWU_PE2_WR(x, HW_LLWU_PE2_RD(x) | (v))) #define HW_LLWU_PE2_CLR(x, v) (HW_LLWU_PE2_WR(x, HW_LLWU_PE2_RD(x) & ~(v))) #define HW_LLWU_PE2_TOG(x, v) (HW_LLWU_PE2_WR(x, HW_LLWU_PE2_RD(x) ^ (v))) @@ -321,7 +328,7 @@ #define BS_LLWU_PE2_WUPE4 (2U) /*!< Bit field size in bits for LLWU_PE2_WUPE4. */ /*! @brief Read current value of the LLWU_PE2_WUPE4 field. */ -#define BR_LLWU_PE2_WUPE4(x) (HW_LLWU_PE2(x).B.WUPE4) +#define BR_LLWU_PE2_WUPE4(x) (UNION_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), U, B.WUPE4)) /*! @brief Format value for bitfield LLWU_PE2_WUPE4. */ #define BF_LLWU_PE2_WUPE4(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE2_WUPE4) & BM_LLWU_PE2_WUPE4) @@ -347,7 +354,7 @@ #define BS_LLWU_PE2_WUPE5 (2U) /*!< Bit field size in bits for LLWU_PE2_WUPE5. */ /*! @brief Read current value of the LLWU_PE2_WUPE5 field. */ -#define BR_LLWU_PE2_WUPE5(x) (HW_LLWU_PE2(x).B.WUPE5) +#define BR_LLWU_PE2_WUPE5(x) (UNION_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), U, B.WUPE5)) /*! @brief Format value for bitfield LLWU_PE2_WUPE5. */ #define BF_LLWU_PE2_WUPE5(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE2_WUPE5) & BM_LLWU_PE2_WUPE5) @@ -373,7 +380,7 @@ #define BS_LLWU_PE2_WUPE6 (2U) /*!< Bit field size in bits for LLWU_PE2_WUPE6. */ /*! @brief Read current value of the LLWU_PE2_WUPE6 field. */ -#define BR_LLWU_PE2_WUPE6(x) (HW_LLWU_PE2(x).B.WUPE6) +#define BR_LLWU_PE2_WUPE6(x) (UNION_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), U, B.WUPE6)) /*! @brief Format value for bitfield LLWU_PE2_WUPE6. */ #define BF_LLWU_PE2_WUPE6(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE2_WUPE6) & BM_LLWU_PE2_WUPE6) @@ -399,7 +406,7 @@ #define BS_LLWU_PE2_WUPE7 (2U) /*!< Bit field size in bits for LLWU_PE2_WUPE7. */ /*! @brief Read current value of the LLWU_PE2_WUPE7 field. */ -#define BR_LLWU_PE2_WUPE7(x) (HW_LLWU_PE2(x).B.WUPE7) +#define BR_LLWU_PE2_WUPE7(x) (UNION_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), U, B.WUPE7)) /*! @brief Format value for bitfield LLWU_PE2_WUPE7. */ #define BF_LLWU_PE2_WUPE7(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE2_WUPE7) & BM_LLWU_PE2_WUPE7) @@ -444,8 +451,8 @@ #define HW_LLWU_PE3_ADDR(x) ((x) + 0x2U) #define HW_LLWU_PE3(x) (*(__IO hw_llwu_pe3_t *) HW_LLWU_PE3_ADDR(x)) -#define HW_LLWU_PE3_RD(x) (HW_LLWU_PE3(x).U) -#define HW_LLWU_PE3_WR(x, v) (HW_LLWU_PE3(x).U = (v)) +#define HW_LLWU_PE3_RD(x) (ADDRESS_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x))) +#define HW_LLWU_PE3_WR(x, v) (ADDRESS_WRITE(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), v)) #define HW_LLWU_PE3_SET(x, v) (HW_LLWU_PE3_WR(x, HW_LLWU_PE3_RD(x) | (v))) #define HW_LLWU_PE3_CLR(x, v) (HW_LLWU_PE3_WR(x, HW_LLWU_PE3_RD(x) & ~(v))) #define HW_LLWU_PE3_TOG(x, v) (HW_LLWU_PE3_WR(x, HW_LLWU_PE3_RD(x) ^ (v))) @@ -472,7 +479,7 @@ #define BS_LLWU_PE3_WUPE8 (2U) /*!< Bit field size in bits for LLWU_PE3_WUPE8. */ /*! @brief Read current value of the LLWU_PE3_WUPE8 field. */ -#define BR_LLWU_PE3_WUPE8(x) (HW_LLWU_PE3(x).B.WUPE8) +#define BR_LLWU_PE3_WUPE8(x) (UNION_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), U, B.WUPE8)) /*! @brief Format value for bitfield LLWU_PE3_WUPE8. */ #define BF_LLWU_PE3_WUPE8(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE3_WUPE8) & BM_LLWU_PE3_WUPE8) @@ -498,7 +505,7 @@ #define BS_LLWU_PE3_WUPE9 (2U) /*!< Bit field size in bits for LLWU_PE3_WUPE9. */ /*! @brief Read current value of the LLWU_PE3_WUPE9 field. */ -#define BR_LLWU_PE3_WUPE9(x) (HW_LLWU_PE3(x).B.WUPE9) +#define BR_LLWU_PE3_WUPE9(x) (UNION_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), U, B.WUPE9)) /*! @brief Format value for bitfield LLWU_PE3_WUPE9. */ #define BF_LLWU_PE3_WUPE9(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE3_WUPE9) & BM_LLWU_PE3_WUPE9) @@ -524,7 +531,7 @@ #define BS_LLWU_PE3_WUPE10 (2U) /*!< Bit field size in bits for LLWU_PE3_WUPE10. */ /*! @brief Read current value of the LLWU_PE3_WUPE10 field. */ -#define BR_LLWU_PE3_WUPE10(x) (HW_LLWU_PE3(x).B.WUPE10) +#define BR_LLWU_PE3_WUPE10(x) (UNION_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), U, B.WUPE10)) /*! @brief Format value for bitfield LLWU_PE3_WUPE10. */ #define BF_LLWU_PE3_WUPE10(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE3_WUPE10) & BM_LLWU_PE3_WUPE10) @@ -550,7 +557,7 @@ #define BS_LLWU_PE3_WUPE11 (2U) /*!< Bit field size in bits for LLWU_PE3_WUPE11. */ /*! @brief Read current value of the LLWU_PE3_WUPE11 field. */ -#define BR_LLWU_PE3_WUPE11(x) (HW_LLWU_PE3(x).B.WUPE11) +#define BR_LLWU_PE3_WUPE11(x) (UNION_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), U, B.WUPE11)) /*! @brief Format value for bitfield LLWU_PE3_WUPE11. */ #define BF_LLWU_PE3_WUPE11(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE3_WUPE11) & BM_LLWU_PE3_WUPE11) @@ -595,8 +602,8 @@ #define HW_LLWU_PE4_ADDR(x) ((x) + 0x3U) #define HW_LLWU_PE4(x) (*(__IO hw_llwu_pe4_t *) HW_LLWU_PE4_ADDR(x)) -#define HW_LLWU_PE4_RD(x) (HW_LLWU_PE4(x).U) -#define HW_LLWU_PE4_WR(x, v) (HW_LLWU_PE4(x).U = (v)) +#define HW_LLWU_PE4_RD(x) (ADDRESS_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x))) +#define HW_LLWU_PE4_WR(x, v) (ADDRESS_WRITE(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), v)) #define HW_LLWU_PE4_SET(x, v) (HW_LLWU_PE4_WR(x, HW_LLWU_PE4_RD(x) | (v))) #define HW_LLWU_PE4_CLR(x, v) (HW_LLWU_PE4_WR(x, HW_LLWU_PE4_RD(x) & ~(v))) #define HW_LLWU_PE4_TOG(x, v) (HW_LLWU_PE4_WR(x, HW_LLWU_PE4_RD(x) ^ (v))) @@ -623,7 +630,7 @@ #define BS_LLWU_PE4_WUPE12 (2U) /*!< Bit field size in bits for LLWU_PE4_WUPE12. */ /*! @brief Read current value of the LLWU_PE4_WUPE12 field. */ -#define BR_LLWU_PE4_WUPE12(x) (HW_LLWU_PE4(x).B.WUPE12) +#define BR_LLWU_PE4_WUPE12(x) (UNION_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), U, B.WUPE12)) /*! @brief Format value for bitfield LLWU_PE4_WUPE12. */ #define BF_LLWU_PE4_WUPE12(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE4_WUPE12) & BM_LLWU_PE4_WUPE12) @@ -649,7 +656,7 @@ #define BS_LLWU_PE4_WUPE13 (2U) /*!< Bit field size in bits for LLWU_PE4_WUPE13. */ /*! @brief Read current value of the LLWU_PE4_WUPE13 field. */ -#define BR_LLWU_PE4_WUPE13(x) (HW_LLWU_PE4(x).B.WUPE13) +#define BR_LLWU_PE4_WUPE13(x) (UNION_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), U, B.WUPE13)) /*! @brief Format value for bitfield LLWU_PE4_WUPE13. */ #define BF_LLWU_PE4_WUPE13(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE4_WUPE13) & BM_LLWU_PE4_WUPE13) @@ -675,7 +682,7 @@ #define BS_LLWU_PE4_WUPE14 (2U) /*!< Bit field size in bits for LLWU_PE4_WUPE14. */ /*! @brief Read current value of the LLWU_PE4_WUPE14 field. */ -#define BR_LLWU_PE4_WUPE14(x) (HW_LLWU_PE4(x).B.WUPE14) +#define BR_LLWU_PE4_WUPE14(x) (UNION_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), U, B.WUPE14)) /*! @brief Format value for bitfield LLWU_PE4_WUPE14. */ #define BF_LLWU_PE4_WUPE14(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE4_WUPE14) & BM_LLWU_PE4_WUPE14) @@ -701,7 +708,7 @@ #define BS_LLWU_PE4_WUPE15 (2U) /*!< Bit field size in bits for LLWU_PE4_WUPE15. */ /*! @brief Read current value of the LLWU_PE4_WUPE15 field. */ -#define BR_LLWU_PE4_WUPE15(x) (HW_LLWU_PE4(x).B.WUPE15) +#define BR_LLWU_PE4_WUPE15(x) (UNION_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), U, B.WUPE15)) /*! @brief Format value for bitfield LLWU_PE4_WUPE15. */ #define BF_LLWU_PE4_WUPE15(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE4_WUPE15) & BM_LLWU_PE4_WUPE15) @@ -750,8 +757,8 @@ #define HW_LLWU_ME_ADDR(x) ((x) + 0x4U) #define HW_LLWU_ME(x) (*(__IO hw_llwu_me_t *) HW_LLWU_ME_ADDR(x)) -#define HW_LLWU_ME_RD(x) (HW_LLWU_ME(x).U) -#define HW_LLWU_ME_WR(x, v) (HW_LLWU_ME(x).U = (v)) +#define HW_LLWU_ME_RD(x) (ADDRESS_READ(hw_llwu_me_t, HW_LLWU_ME_ADDR(x))) +#define HW_LLWU_ME_WR(x, v) (ADDRESS_WRITE(hw_llwu_me_t, HW_LLWU_ME_ADDR(x), v)) #define HW_LLWU_ME_SET(x, v) (HW_LLWU_ME_WR(x, HW_LLWU_ME_RD(x) | (v))) #define HW_LLWU_ME_CLR(x, v) (HW_LLWU_ME_WR(x, HW_LLWU_ME_RD(x) & ~(v))) #define HW_LLWU_ME_TOG(x, v) (HW_LLWU_ME_WR(x, HW_LLWU_ME_RD(x) ^ (v))) @@ -776,13 +783,13 @@ #define BS_LLWU_ME_WUME0 (1U) /*!< Bit field size in bits for LLWU_ME_WUME0. */ /*! @brief Read current value of the LLWU_ME_WUME0 field. */ -#define BR_LLWU_ME_WUME0(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME0)) +#define BR_LLWU_ME_WUME0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME0))) /*! @brief Format value for bitfield LLWU_ME_WUME0. */ #define BF_LLWU_ME_WUME0(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME0) & BM_LLWU_ME_WUME0) /*! @brief Set the WUME0 field to a new value. */ -#define BW_LLWU_ME_WUME0(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME0) = (v)) +#define BW_LLWU_ME_WUME0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME0), v)) /*@}*/ /*! @@ -800,13 +807,13 @@ #define BS_LLWU_ME_WUME1 (1U) /*!< Bit field size in bits for LLWU_ME_WUME1. */ /*! @brief Read current value of the LLWU_ME_WUME1 field. */ -#define BR_LLWU_ME_WUME1(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME1)) +#define BR_LLWU_ME_WUME1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME1))) /*! @brief Format value for bitfield LLWU_ME_WUME1. */ #define BF_LLWU_ME_WUME1(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME1) & BM_LLWU_ME_WUME1) /*! @brief Set the WUME1 field to a new value. */ -#define BW_LLWU_ME_WUME1(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME1) = (v)) +#define BW_LLWU_ME_WUME1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME1), v)) /*@}*/ /*! @@ -824,13 +831,13 @@ #define BS_LLWU_ME_WUME2 (1U) /*!< Bit field size in bits for LLWU_ME_WUME2. */ /*! @brief Read current value of the LLWU_ME_WUME2 field. */ -#define BR_LLWU_ME_WUME2(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME2)) +#define BR_LLWU_ME_WUME2(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME2))) /*! @brief Format value for bitfield LLWU_ME_WUME2. */ #define BF_LLWU_ME_WUME2(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME2) & BM_LLWU_ME_WUME2) /*! @brief Set the WUME2 field to a new value. */ -#define BW_LLWU_ME_WUME2(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME2) = (v)) +#define BW_LLWU_ME_WUME2(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME2), v)) /*@}*/ /*! @@ -848,13 +855,13 @@ #define BS_LLWU_ME_WUME3 (1U) /*!< Bit field size in bits for LLWU_ME_WUME3. */ /*! @brief Read current value of the LLWU_ME_WUME3 field. */ -#define BR_LLWU_ME_WUME3(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME3)) +#define BR_LLWU_ME_WUME3(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME3))) /*! @brief Format value for bitfield LLWU_ME_WUME3. */ #define BF_LLWU_ME_WUME3(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME3) & BM_LLWU_ME_WUME3) /*! @brief Set the WUME3 field to a new value. */ -#define BW_LLWU_ME_WUME3(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME3) = (v)) +#define BW_LLWU_ME_WUME3(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME3), v)) /*@}*/ /*! @@ -872,13 +879,13 @@ #define BS_LLWU_ME_WUME4 (1U) /*!< Bit field size in bits for LLWU_ME_WUME4. */ /*! @brief Read current value of the LLWU_ME_WUME4 field. */ -#define BR_LLWU_ME_WUME4(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME4)) +#define BR_LLWU_ME_WUME4(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME4))) /*! @brief Format value for bitfield LLWU_ME_WUME4. */ #define BF_LLWU_ME_WUME4(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME4) & BM_LLWU_ME_WUME4) /*! @brief Set the WUME4 field to a new value. */ -#define BW_LLWU_ME_WUME4(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME4) = (v)) +#define BW_LLWU_ME_WUME4(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME4), v)) /*@}*/ /*! @@ -896,13 +903,13 @@ #define BS_LLWU_ME_WUME5 (1U) /*!< Bit field size in bits for LLWU_ME_WUME5. */ /*! @brief Read current value of the LLWU_ME_WUME5 field. */ -#define BR_LLWU_ME_WUME5(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME5)) +#define BR_LLWU_ME_WUME5(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME5))) /*! @brief Format value for bitfield LLWU_ME_WUME5. */ #define BF_LLWU_ME_WUME5(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME5) & BM_LLWU_ME_WUME5) /*! @brief Set the WUME5 field to a new value. */ -#define BW_LLWU_ME_WUME5(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME5) = (v)) +#define BW_LLWU_ME_WUME5(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME5), v)) /*@}*/ /*! @@ -920,13 +927,13 @@ #define BS_LLWU_ME_WUME6 (1U) /*!< Bit field size in bits for LLWU_ME_WUME6. */ /*! @brief Read current value of the LLWU_ME_WUME6 field. */ -#define BR_LLWU_ME_WUME6(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME6)) +#define BR_LLWU_ME_WUME6(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME6))) /*! @brief Format value for bitfield LLWU_ME_WUME6. */ #define BF_LLWU_ME_WUME6(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME6) & BM_LLWU_ME_WUME6) /*! @brief Set the WUME6 field to a new value. */ -#define BW_LLWU_ME_WUME6(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME6) = (v)) +#define BW_LLWU_ME_WUME6(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME6), v)) /*@}*/ /*! @@ -944,13 +951,13 @@ #define BS_LLWU_ME_WUME7 (1U) /*!< Bit field size in bits for LLWU_ME_WUME7. */ /*! @brief Read current value of the LLWU_ME_WUME7 field. */ -#define BR_LLWU_ME_WUME7(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME7)) +#define BR_LLWU_ME_WUME7(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME7))) /*! @brief Format value for bitfield LLWU_ME_WUME7. */ #define BF_LLWU_ME_WUME7(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME7) & BM_LLWU_ME_WUME7) /*! @brief Set the WUME7 field to a new value. */ -#define BW_LLWU_ME_WUME7(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME7) = (v)) +#define BW_LLWU_ME_WUME7(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME7), v)) /*@}*/ /******************************************************************************* @@ -997,8 +1004,8 @@ #define HW_LLWU_F1_ADDR(x) ((x) + 0x5U) #define HW_LLWU_F1(x) (*(__IO hw_llwu_f1_t *) HW_LLWU_F1_ADDR(x)) -#define HW_LLWU_F1_RD(x) (HW_LLWU_F1(x).U) -#define HW_LLWU_F1_WR(x, v) (HW_LLWU_F1(x).U = (v)) +#define HW_LLWU_F1_RD(x) (ADDRESS_READ(hw_llwu_f1_t, HW_LLWU_F1_ADDR(x))) +#define HW_LLWU_F1_WR(x, v) (ADDRESS_WRITE(hw_llwu_f1_t, HW_LLWU_F1_ADDR(x), v)) #define HW_LLWU_F1_SET(x, v) (HW_LLWU_F1_WR(x, HW_LLWU_F1_RD(x) | (v))) #define HW_LLWU_F1_CLR(x, v) (HW_LLWU_F1_WR(x, HW_LLWU_F1_RD(x) & ~(v))) #define HW_LLWU_F1_TOG(x, v) (HW_LLWU_F1_WR(x, HW_LLWU_F1_RD(x) ^ (v))) @@ -1024,13 +1031,13 @@ #define BS_LLWU_F1_WUF0 (1U) /*!< Bit field size in bits for LLWU_F1_WUF0. */ /*! @brief Read current value of the LLWU_F1_WUF0 field. */ -#define BR_LLWU_F1_WUF0(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF0)) +#define BR_LLWU_F1_WUF0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF0))) /*! @brief Format value for bitfield LLWU_F1_WUF0. */ #define BF_LLWU_F1_WUF0(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF0) & BM_LLWU_F1_WUF0) /*! @brief Set the WUF0 field to a new value. */ -#define BW_LLWU_F1_WUF0(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF0) = (v)) +#define BW_LLWU_F1_WUF0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF0), v)) /*@}*/ /*! @@ -1049,13 +1056,13 @@ #define BS_LLWU_F1_WUF1 (1U) /*!< Bit field size in bits for LLWU_F1_WUF1. */ /*! @brief Read current value of the LLWU_F1_WUF1 field. */ -#define BR_LLWU_F1_WUF1(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF1)) +#define BR_LLWU_F1_WUF1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF1))) /*! @brief Format value for bitfield LLWU_F1_WUF1. */ #define BF_LLWU_F1_WUF1(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF1) & BM_LLWU_F1_WUF1) /*! @brief Set the WUF1 field to a new value. */ -#define BW_LLWU_F1_WUF1(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF1) = (v)) +#define BW_LLWU_F1_WUF1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF1), v)) /*@}*/ /*! @@ -1074,13 +1081,13 @@ #define BS_LLWU_F1_WUF2 (1U) /*!< Bit field size in bits for LLWU_F1_WUF2. */ /*! @brief Read current value of the LLWU_F1_WUF2 field. */ -#define BR_LLWU_F1_WUF2(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF2)) +#define BR_LLWU_F1_WUF2(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF2))) /*! @brief Format value for bitfield LLWU_F1_WUF2. */ #define BF_LLWU_F1_WUF2(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF2) & BM_LLWU_F1_WUF2) /*! @brief Set the WUF2 field to a new value. */ -#define BW_LLWU_F1_WUF2(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF2) = (v)) +#define BW_LLWU_F1_WUF2(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF2), v)) /*@}*/ /*! @@ -1099,13 +1106,13 @@ #define BS_LLWU_F1_WUF3 (1U) /*!< Bit field size in bits for LLWU_F1_WUF3. */ /*! @brief Read current value of the LLWU_F1_WUF3 field. */ -#define BR_LLWU_F1_WUF3(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF3)) +#define BR_LLWU_F1_WUF3(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF3))) /*! @brief Format value for bitfield LLWU_F1_WUF3. */ #define BF_LLWU_F1_WUF3(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF3) & BM_LLWU_F1_WUF3) /*! @brief Set the WUF3 field to a new value. */ -#define BW_LLWU_F1_WUF3(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF3) = (v)) +#define BW_LLWU_F1_WUF3(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF3), v)) /*@}*/ /*! @@ -1124,13 +1131,13 @@ #define BS_LLWU_F1_WUF4 (1U) /*!< Bit field size in bits for LLWU_F1_WUF4. */ /*! @brief Read current value of the LLWU_F1_WUF4 field. */ -#define BR_LLWU_F1_WUF4(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF4)) +#define BR_LLWU_F1_WUF4(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF4))) /*! @brief Format value for bitfield LLWU_F1_WUF4. */ #define BF_LLWU_F1_WUF4(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF4) & BM_LLWU_F1_WUF4) /*! @brief Set the WUF4 field to a new value. */ -#define BW_LLWU_F1_WUF4(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF4) = (v)) +#define BW_LLWU_F1_WUF4(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF4), v)) /*@}*/ /*! @@ -1149,13 +1156,13 @@ #define BS_LLWU_F1_WUF5 (1U) /*!< Bit field size in bits for LLWU_F1_WUF5. */ /*! @brief Read current value of the LLWU_F1_WUF5 field. */ -#define BR_LLWU_F1_WUF5(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF5)) +#define BR_LLWU_F1_WUF5(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF5))) /*! @brief Format value for bitfield LLWU_F1_WUF5. */ #define BF_LLWU_F1_WUF5(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF5) & BM_LLWU_F1_WUF5) /*! @brief Set the WUF5 field to a new value. */ -#define BW_LLWU_F1_WUF5(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF5) = (v)) +#define BW_LLWU_F1_WUF5(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF5), v)) /*@}*/ /*! @@ -1174,13 +1181,13 @@ #define BS_LLWU_F1_WUF6 (1U) /*!< Bit field size in bits for LLWU_F1_WUF6. */ /*! @brief Read current value of the LLWU_F1_WUF6 field. */ -#define BR_LLWU_F1_WUF6(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF6)) +#define BR_LLWU_F1_WUF6(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF6))) /*! @brief Format value for bitfield LLWU_F1_WUF6. */ #define BF_LLWU_F1_WUF6(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF6) & BM_LLWU_F1_WUF6) /*! @brief Set the WUF6 field to a new value. */ -#define BW_LLWU_F1_WUF6(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF6) = (v)) +#define BW_LLWU_F1_WUF6(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF6), v)) /*@}*/ /*! @@ -1199,13 +1206,13 @@ #define BS_LLWU_F1_WUF7 (1U) /*!< Bit field size in bits for LLWU_F1_WUF7. */ /*! @brief Read current value of the LLWU_F1_WUF7 field. */ -#define BR_LLWU_F1_WUF7(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF7)) +#define BR_LLWU_F1_WUF7(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF7))) /*! @brief Format value for bitfield LLWU_F1_WUF7. */ #define BF_LLWU_F1_WUF7(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF7) & BM_LLWU_F1_WUF7) /*! @brief Set the WUF7 field to a new value. */ -#define BW_LLWU_F1_WUF7(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF7) = (v)) +#define BW_LLWU_F1_WUF7(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF7), v)) /*@}*/ /******************************************************************************* @@ -1252,8 +1259,8 @@ #define HW_LLWU_F2_ADDR(x) ((x) + 0x6U) #define HW_LLWU_F2(x) (*(__IO hw_llwu_f2_t *) HW_LLWU_F2_ADDR(x)) -#define HW_LLWU_F2_RD(x) (HW_LLWU_F2(x).U) -#define HW_LLWU_F2_WR(x, v) (HW_LLWU_F2(x).U = (v)) +#define HW_LLWU_F2_RD(x) (ADDRESS_READ(hw_llwu_f2_t, HW_LLWU_F2_ADDR(x))) +#define HW_LLWU_F2_WR(x, v) (ADDRESS_WRITE(hw_llwu_f2_t, HW_LLWU_F2_ADDR(x), v)) #define HW_LLWU_F2_SET(x, v) (HW_LLWU_F2_WR(x, HW_LLWU_F2_RD(x) | (v))) #define HW_LLWU_F2_CLR(x, v) (HW_LLWU_F2_WR(x, HW_LLWU_F2_RD(x) & ~(v))) #define HW_LLWU_F2_TOG(x, v) (HW_LLWU_F2_WR(x, HW_LLWU_F2_RD(x) ^ (v))) @@ -1279,13 +1286,13 @@ #define BS_LLWU_F2_WUF8 (1U) /*!< Bit field size in bits for LLWU_F2_WUF8. */ /*! @brief Read current value of the LLWU_F2_WUF8 field. */ -#define BR_LLWU_F2_WUF8(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF8)) +#define BR_LLWU_F2_WUF8(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF8))) /*! @brief Format value for bitfield LLWU_F2_WUF8. */ #define BF_LLWU_F2_WUF8(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF8) & BM_LLWU_F2_WUF8) /*! @brief Set the WUF8 field to a new value. */ -#define BW_LLWU_F2_WUF8(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF8) = (v)) +#define BW_LLWU_F2_WUF8(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF8), v)) /*@}*/ /*! @@ -1304,13 +1311,13 @@ #define BS_LLWU_F2_WUF9 (1U) /*!< Bit field size in bits for LLWU_F2_WUF9. */ /*! @brief Read current value of the LLWU_F2_WUF9 field. */ -#define BR_LLWU_F2_WUF9(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF9)) +#define BR_LLWU_F2_WUF9(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF9))) /*! @brief Format value for bitfield LLWU_F2_WUF9. */ #define BF_LLWU_F2_WUF9(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF9) & BM_LLWU_F2_WUF9) /*! @brief Set the WUF9 field to a new value. */ -#define BW_LLWU_F2_WUF9(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF9) = (v)) +#define BW_LLWU_F2_WUF9(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF9), v)) /*@}*/ /*! @@ -1329,13 +1336,13 @@ #define BS_LLWU_F2_WUF10 (1U) /*!< Bit field size in bits for LLWU_F2_WUF10. */ /*! @brief Read current value of the LLWU_F2_WUF10 field. */ -#define BR_LLWU_F2_WUF10(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF10)) +#define BR_LLWU_F2_WUF10(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF10))) /*! @brief Format value for bitfield LLWU_F2_WUF10. */ #define BF_LLWU_F2_WUF10(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF10) & BM_LLWU_F2_WUF10) /*! @brief Set the WUF10 field to a new value. */ -#define BW_LLWU_F2_WUF10(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF10) = (v)) +#define BW_LLWU_F2_WUF10(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF10), v)) /*@}*/ /*! @@ -1354,13 +1361,13 @@ #define BS_LLWU_F2_WUF11 (1U) /*!< Bit field size in bits for LLWU_F2_WUF11. */ /*! @brief Read current value of the LLWU_F2_WUF11 field. */ -#define BR_LLWU_F2_WUF11(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF11)) +#define BR_LLWU_F2_WUF11(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF11))) /*! @brief Format value for bitfield LLWU_F2_WUF11. */ #define BF_LLWU_F2_WUF11(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF11) & BM_LLWU_F2_WUF11) /*! @brief Set the WUF11 field to a new value. */ -#define BW_LLWU_F2_WUF11(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF11) = (v)) +#define BW_LLWU_F2_WUF11(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF11), v)) /*@}*/ /*! @@ -1379,13 +1386,13 @@ #define BS_LLWU_F2_WUF12 (1U) /*!< Bit field size in bits for LLWU_F2_WUF12. */ /*! @brief Read current value of the LLWU_F2_WUF12 field. */ -#define BR_LLWU_F2_WUF12(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF12)) +#define BR_LLWU_F2_WUF12(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF12))) /*! @brief Format value for bitfield LLWU_F2_WUF12. */ #define BF_LLWU_F2_WUF12(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF12) & BM_LLWU_F2_WUF12) /*! @brief Set the WUF12 field to a new value. */ -#define BW_LLWU_F2_WUF12(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF12) = (v)) +#define BW_LLWU_F2_WUF12(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF12), v)) /*@}*/ /*! @@ -1404,13 +1411,13 @@ #define BS_LLWU_F2_WUF13 (1U) /*!< Bit field size in bits for LLWU_F2_WUF13. */ /*! @brief Read current value of the LLWU_F2_WUF13 field. */ -#define BR_LLWU_F2_WUF13(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF13)) +#define BR_LLWU_F2_WUF13(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF13))) /*! @brief Format value for bitfield LLWU_F2_WUF13. */ #define BF_LLWU_F2_WUF13(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF13) & BM_LLWU_F2_WUF13) /*! @brief Set the WUF13 field to a new value. */ -#define BW_LLWU_F2_WUF13(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF13) = (v)) +#define BW_LLWU_F2_WUF13(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF13), v)) /*@}*/ /*! @@ -1429,13 +1436,13 @@ #define BS_LLWU_F2_WUF14 (1U) /*!< Bit field size in bits for LLWU_F2_WUF14. */ /*! @brief Read current value of the LLWU_F2_WUF14 field. */ -#define BR_LLWU_F2_WUF14(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF14)) +#define BR_LLWU_F2_WUF14(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF14))) /*! @brief Format value for bitfield LLWU_F2_WUF14. */ #define BF_LLWU_F2_WUF14(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF14) & BM_LLWU_F2_WUF14) /*! @brief Set the WUF14 field to a new value. */ -#define BW_LLWU_F2_WUF14(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF14) = (v)) +#define BW_LLWU_F2_WUF14(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF14), v)) /*@}*/ /*! @@ -1454,13 +1461,13 @@ #define BS_LLWU_F2_WUF15 (1U) /*!< Bit field size in bits for LLWU_F2_WUF15. */ /*! @brief Read current value of the LLWU_F2_WUF15 field. */ -#define BR_LLWU_F2_WUF15(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF15)) +#define BR_LLWU_F2_WUF15(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF15))) /*! @brief Format value for bitfield LLWU_F2_WUF15. */ #define BF_LLWU_F2_WUF15(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF15) & BM_LLWU_F2_WUF15) /*! @brief Set the WUF15 field to a new value. */ -#define BW_LLWU_F2_WUF15(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF15) = (v)) +#define BW_LLWU_F2_WUF15(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF15), v)) /*@}*/ /******************************************************************************* @@ -1509,7 +1516,7 @@ #define HW_LLWU_F3_ADDR(x) ((x) + 0x7U) #define HW_LLWU_F3(x) (*(__I hw_llwu_f3_t *) HW_LLWU_F3_ADDR(x)) -#define HW_LLWU_F3_RD(x) (HW_LLWU_F3(x).U) +#define HW_LLWU_F3_RD(x) (ADDRESS_READ(hw_llwu_f3_t, HW_LLWU_F3_ADDR(x))) /*@}*/ /* @@ -1533,7 +1540,7 @@ #define BS_LLWU_F3_MWUF0 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF0. */ /*! @brief Read current value of the LLWU_F3_MWUF0 field. */ -#define BR_LLWU_F3_MWUF0(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF0)) +#define BR_LLWU_F3_MWUF0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF0))) /*@}*/ /*! @@ -1553,7 +1560,7 @@ #define BS_LLWU_F3_MWUF1 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF1. */ /*! @brief Read current value of the LLWU_F3_MWUF1 field. */ -#define BR_LLWU_F3_MWUF1(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF1)) +#define BR_LLWU_F3_MWUF1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF1))) /*@}*/ /*! @@ -1573,7 +1580,7 @@ #define BS_LLWU_F3_MWUF2 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF2. */ /*! @brief Read current value of the LLWU_F3_MWUF2 field. */ -#define BR_LLWU_F3_MWUF2(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF2)) +#define BR_LLWU_F3_MWUF2(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF2))) /*@}*/ /*! @@ -1593,7 +1600,7 @@ #define BS_LLWU_F3_MWUF3 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF3. */ /*! @brief Read current value of the LLWU_F3_MWUF3 field. */ -#define BR_LLWU_F3_MWUF3(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF3)) +#define BR_LLWU_F3_MWUF3(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF3))) /*@}*/ /*! @@ -1613,7 +1620,7 @@ #define BS_LLWU_F3_MWUF4 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF4. */ /*! @brief Read current value of the LLWU_F3_MWUF4 field. */ -#define BR_LLWU_F3_MWUF4(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF4)) +#define BR_LLWU_F3_MWUF4(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF4))) /*@}*/ /*! @@ -1633,7 +1640,7 @@ #define BS_LLWU_F3_MWUF5 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF5. */ /*! @brief Read current value of the LLWU_F3_MWUF5 field. */ -#define BR_LLWU_F3_MWUF5(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF5)) +#define BR_LLWU_F3_MWUF5(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF5))) /*@}*/ /*! @@ -1653,7 +1660,7 @@ #define BS_LLWU_F3_MWUF6 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF6. */ /*! @brief Read current value of the LLWU_F3_MWUF6 field. */ -#define BR_LLWU_F3_MWUF6(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF6)) +#define BR_LLWU_F3_MWUF6(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF6))) /*@}*/ /*! @@ -1673,7 +1680,7 @@ #define BS_LLWU_F3_MWUF7 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF7. */ /*! @brief Read current value of the LLWU_F3_MWUF7 field. */ -#define BR_LLWU_F3_MWUF7(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF7)) +#define BR_LLWU_F3_MWUF7(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF7))) /*@}*/ /******************************************************************************* @@ -1712,8 +1719,8 @@ #define HW_LLWU_FILT1_ADDR(x) ((x) + 0x8U) #define HW_LLWU_FILT1(x) (*(__IO hw_llwu_filt1_t *) HW_LLWU_FILT1_ADDR(x)) -#define HW_LLWU_FILT1_RD(x) (HW_LLWU_FILT1(x).U) -#define HW_LLWU_FILT1_WR(x, v) (HW_LLWU_FILT1(x).U = (v)) +#define HW_LLWU_FILT1_RD(x) (ADDRESS_READ(hw_llwu_filt1_t, HW_LLWU_FILT1_ADDR(x))) +#define HW_LLWU_FILT1_WR(x, v) (ADDRESS_WRITE(hw_llwu_filt1_t, HW_LLWU_FILT1_ADDR(x), v)) #define HW_LLWU_FILT1_SET(x, v) (HW_LLWU_FILT1_WR(x, HW_LLWU_FILT1_RD(x) | (v))) #define HW_LLWU_FILT1_CLR(x, v) (HW_LLWU_FILT1_WR(x, HW_LLWU_FILT1_RD(x) & ~(v))) #define HW_LLWU_FILT1_TOG(x, v) (HW_LLWU_FILT1_WR(x, HW_LLWU_FILT1_RD(x) ^ (v))) @@ -1738,7 +1745,7 @@ #define BS_LLWU_FILT1_FILTSEL (4U) /*!< Bit field size in bits for LLWU_FILT1_FILTSEL. */ /*! @brief Read current value of the LLWU_FILT1_FILTSEL field. */ -#define BR_LLWU_FILT1_FILTSEL(x) (HW_LLWU_FILT1(x).B.FILTSEL) +#define BR_LLWU_FILT1_FILTSEL(x) (UNION_READ(hw_llwu_filt1_t, HW_LLWU_FILT1_ADDR(x), U, B.FILTSEL)) /*! @brief Format value for bitfield LLWU_FILT1_FILTSEL. */ #define BF_LLWU_FILT1_FILTSEL(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT1_FILTSEL) & BM_LLWU_FILT1_FILTSEL) @@ -1764,7 +1771,7 @@ #define BS_LLWU_FILT1_FILTE (2U) /*!< Bit field size in bits for LLWU_FILT1_FILTE. */ /*! @brief Read current value of the LLWU_FILT1_FILTE field. */ -#define BR_LLWU_FILT1_FILTE(x) (HW_LLWU_FILT1(x).B.FILTE) +#define BR_LLWU_FILT1_FILTE(x) (UNION_READ(hw_llwu_filt1_t, HW_LLWU_FILT1_ADDR(x), U, B.FILTE)) /*! @brief Format value for bitfield LLWU_FILT1_FILTE. */ #define BF_LLWU_FILT1_FILTE(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT1_FILTE) & BM_LLWU_FILT1_FILTE) @@ -1790,13 +1797,13 @@ #define BS_LLWU_FILT1_FILTF (1U) /*!< Bit field size in bits for LLWU_FILT1_FILTF. */ /*! @brief Read current value of the LLWU_FILT1_FILTF field. */ -#define BR_LLWU_FILT1_FILTF(x) (BITBAND_ACCESS8(HW_LLWU_FILT1_ADDR(x), BP_LLWU_FILT1_FILTF)) +#define BR_LLWU_FILT1_FILTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_FILT1_ADDR(x), BP_LLWU_FILT1_FILTF))) /*! @brief Format value for bitfield LLWU_FILT1_FILTF. */ #define BF_LLWU_FILT1_FILTF(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT1_FILTF) & BM_LLWU_FILT1_FILTF) /*! @brief Set the FILTF field to a new value. */ -#define BW_LLWU_FILT1_FILTF(x, v) (BITBAND_ACCESS8(HW_LLWU_FILT1_ADDR(x), BP_LLWU_FILT1_FILTF) = (v)) +#define BW_LLWU_FILT1_FILTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_FILT1_ADDR(x), BP_LLWU_FILT1_FILTF), v)) /*@}*/ /******************************************************************************* @@ -1835,8 +1842,8 @@ #define HW_LLWU_FILT2_ADDR(x) ((x) + 0x9U) #define HW_LLWU_FILT2(x) (*(__IO hw_llwu_filt2_t *) HW_LLWU_FILT2_ADDR(x)) -#define HW_LLWU_FILT2_RD(x) (HW_LLWU_FILT2(x).U) -#define HW_LLWU_FILT2_WR(x, v) (HW_LLWU_FILT2(x).U = (v)) +#define HW_LLWU_FILT2_RD(x) (ADDRESS_READ(hw_llwu_filt2_t, HW_LLWU_FILT2_ADDR(x))) +#define HW_LLWU_FILT2_WR(x, v) (ADDRESS_WRITE(hw_llwu_filt2_t, HW_LLWU_FILT2_ADDR(x), v)) #define HW_LLWU_FILT2_SET(x, v) (HW_LLWU_FILT2_WR(x, HW_LLWU_FILT2_RD(x) | (v))) #define HW_LLWU_FILT2_CLR(x, v) (HW_LLWU_FILT2_WR(x, HW_LLWU_FILT2_RD(x) & ~(v))) #define HW_LLWU_FILT2_TOG(x, v) (HW_LLWU_FILT2_WR(x, HW_LLWU_FILT2_RD(x) ^ (v))) @@ -1861,7 +1868,7 @@ #define BS_LLWU_FILT2_FILTSEL (4U) /*!< Bit field size in bits for LLWU_FILT2_FILTSEL. */ /*! @brief Read current value of the LLWU_FILT2_FILTSEL field. */ -#define BR_LLWU_FILT2_FILTSEL(x) (HW_LLWU_FILT2(x).B.FILTSEL) +#define BR_LLWU_FILT2_FILTSEL(x) (UNION_READ(hw_llwu_filt2_t, HW_LLWU_FILT2_ADDR(x), U, B.FILTSEL)) /*! @brief Format value for bitfield LLWU_FILT2_FILTSEL. */ #define BF_LLWU_FILT2_FILTSEL(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT2_FILTSEL) & BM_LLWU_FILT2_FILTSEL) @@ -1887,7 +1894,7 @@ #define BS_LLWU_FILT2_FILTE (2U) /*!< Bit field size in bits for LLWU_FILT2_FILTE. */ /*! @brief Read current value of the LLWU_FILT2_FILTE field. */ -#define BR_LLWU_FILT2_FILTE(x) (HW_LLWU_FILT2(x).B.FILTE) +#define BR_LLWU_FILT2_FILTE(x) (UNION_READ(hw_llwu_filt2_t, HW_LLWU_FILT2_ADDR(x), U, B.FILTE)) /*! @brief Format value for bitfield LLWU_FILT2_FILTE. */ #define BF_LLWU_FILT2_FILTE(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT2_FILTE) & BM_LLWU_FILT2_FILTE) @@ -1913,13 +1920,13 @@ #define BS_LLWU_FILT2_FILTF (1U) /*!< Bit field size in bits for LLWU_FILT2_FILTF. */ /*! @brief Read current value of the LLWU_FILT2_FILTF field. */ -#define BR_LLWU_FILT2_FILTF(x) (BITBAND_ACCESS8(HW_LLWU_FILT2_ADDR(x), BP_LLWU_FILT2_FILTF)) +#define BR_LLWU_FILT2_FILTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_FILT2_ADDR(x), BP_LLWU_FILT2_FILTF))) /*! @brief Format value for bitfield LLWU_FILT2_FILTF. */ #define BF_LLWU_FILT2_FILTF(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT2_FILTF) & BM_LLWU_FILT2_FILTF) /*! @brief Set the FILTF field to a new value. */ -#define BW_LLWU_FILT2_FILTF(x, v) (BITBAND_ACCESS8(HW_LLWU_FILT2_ADDR(x), BP_LLWU_FILT2_FILTF) = (v)) +#define BW_LLWU_FILT2_FILTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_FILT2_ADDR(x), BP_LLWU_FILT2_FILTF), v)) /*@}*/ /******************************************************************************* @@ -1957,8 +1964,8 @@ #define HW_LLWU_RST_ADDR(x) ((x) + 0xAU) #define HW_LLWU_RST(x) (*(__IO hw_llwu_rst_t *) HW_LLWU_RST_ADDR(x)) -#define HW_LLWU_RST_RD(x) (HW_LLWU_RST(x).U) -#define HW_LLWU_RST_WR(x, v) (HW_LLWU_RST(x).U = (v)) +#define HW_LLWU_RST_RD(x) (ADDRESS_READ(hw_llwu_rst_t, HW_LLWU_RST_ADDR(x))) +#define HW_LLWU_RST_WR(x, v) (ADDRESS_WRITE(hw_llwu_rst_t, HW_LLWU_RST_ADDR(x), v)) #define HW_LLWU_RST_SET(x, v) (HW_LLWU_RST_WR(x, HW_LLWU_RST_RD(x) | (v))) #define HW_LLWU_RST_CLR(x, v) (HW_LLWU_RST_WR(x, HW_LLWU_RST_RD(x) & ~(v))) #define HW_LLWU_RST_TOG(x, v) (HW_LLWU_RST_WR(x, HW_LLWU_RST_RD(x) ^ (v))) @@ -1984,13 +1991,13 @@ #define BS_LLWU_RST_RSTFILT (1U) /*!< Bit field size in bits for LLWU_RST_RSTFILT. */ /*! @brief Read current value of the LLWU_RST_RSTFILT field. */ -#define BR_LLWU_RST_RSTFILT(x) (BITBAND_ACCESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_RSTFILT)) +#define BR_LLWU_RST_RSTFILT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_RSTFILT))) /*! @brief Format value for bitfield LLWU_RST_RSTFILT. */ #define BF_LLWU_RST_RSTFILT(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_RST_RSTFILT) & BM_LLWU_RST_RSTFILT) /*! @brief Set the RSTFILT field to a new value. */ -#define BW_LLWU_RST_RSTFILT(x, v) (BITBAND_ACCESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_RSTFILT) = (v)) +#define BW_LLWU_RST_RSTFILT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_RSTFILT), v)) /*@}*/ /*! @@ -2010,13 +2017,13 @@ #define BS_LLWU_RST_LLRSTE (1U) /*!< Bit field size in bits for LLWU_RST_LLRSTE. */ /*! @brief Read current value of the LLWU_RST_LLRSTE field. */ -#define BR_LLWU_RST_LLRSTE(x) (BITBAND_ACCESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_LLRSTE)) +#define BR_LLWU_RST_LLRSTE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_LLRSTE))) /*! @brief Format value for bitfield LLWU_RST_LLRSTE. */ #define BF_LLWU_RST_LLRSTE(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_RST_LLRSTE) & BM_LLWU_RST_LLRSTE) /*! @brief Set the LLRSTE field to a new value. */ -#define BW_LLWU_RST_LLRSTE(x, v) (BITBAND_ACCESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_LLRSTE) = (v)) +#define BW_LLWU_RST_LLRSTE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_LLRSTE), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_lptmr.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_lptmr.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -131,8 +138,8 @@ #define HW_LPTMR_CSR_ADDR(x) ((x) + 0x0U) #define HW_LPTMR_CSR(x) (*(__IO hw_lptmr_csr_t *) HW_LPTMR_CSR_ADDR(x)) -#define HW_LPTMR_CSR_RD(x) (HW_LPTMR_CSR(x).U) -#define HW_LPTMR_CSR_WR(x, v) (HW_LPTMR_CSR(x).U = (v)) +#define HW_LPTMR_CSR_RD(x) (ADDRESS_READ(hw_lptmr_csr_t, HW_LPTMR_CSR_ADDR(x))) +#define HW_LPTMR_CSR_WR(x, v) (ADDRESS_WRITE(hw_lptmr_csr_t, HW_LPTMR_CSR_ADDR(x), v)) #define HW_LPTMR_CSR_SET(x, v) (HW_LPTMR_CSR_WR(x, HW_LPTMR_CSR_RD(x) | (v))) #define HW_LPTMR_CSR_CLR(x, v) (HW_LPTMR_CSR_WR(x, HW_LPTMR_CSR_RD(x) & ~(v))) #define HW_LPTMR_CSR_TOG(x, v) (HW_LPTMR_CSR_WR(x, HW_LPTMR_CSR_RD(x) ^ (v))) @@ -159,13 +166,13 @@ #define BS_LPTMR_CSR_TEN (1U) /*!< Bit field size in bits for LPTMR_CSR_TEN. */ /*! @brief Read current value of the LPTMR_CSR_TEN field. */ -#define BR_LPTMR_CSR_TEN(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TEN)) +#define BR_LPTMR_CSR_TEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TEN))) /*! @brief Format value for bitfield LPTMR_CSR_TEN. */ #define BF_LPTMR_CSR_TEN(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TEN) & BM_LPTMR_CSR_TEN) /*! @brief Set the TEN field to a new value. */ -#define BW_LPTMR_CSR_TEN(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TEN) = (v)) +#define BW_LPTMR_CSR_TEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TEN), v)) /*@}*/ /*! @@ -184,13 +191,13 @@ #define BS_LPTMR_CSR_TMS (1U) /*!< Bit field size in bits for LPTMR_CSR_TMS. */ /*! @brief Read current value of the LPTMR_CSR_TMS field. */ -#define BR_LPTMR_CSR_TMS(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TMS)) +#define BR_LPTMR_CSR_TMS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TMS))) /*! @brief Format value for bitfield LPTMR_CSR_TMS. */ #define BF_LPTMR_CSR_TMS(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TMS) & BM_LPTMR_CSR_TMS) /*! @brief Set the TMS field to a new value. */ -#define BW_LPTMR_CSR_TMS(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TMS) = (v)) +#define BW_LPTMR_CSR_TMS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TMS), v)) /*@}*/ /*! @@ -210,13 +217,13 @@ #define BS_LPTMR_CSR_TFC (1U) /*!< Bit field size in bits for LPTMR_CSR_TFC. */ /*! @brief Read current value of the LPTMR_CSR_TFC field. */ -#define BR_LPTMR_CSR_TFC(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TFC)) +#define BR_LPTMR_CSR_TFC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TFC))) /*! @brief Format value for bitfield LPTMR_CSR_TFC. */ #define BF_LPTMR_CSR_TFC(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TFC) & BM_LPTMR_CSR_TFC) /*! @brief Set the TFC field to a new value. */ -#define BW_LPTMR_CSR_TFC(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TFC) = (v)) +#define BW_LPTMR_CSR_TFC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TFC), v)) /*@}*/ /*! @@ -237,13 +244,13 @@ #define BS_LPTMR_CSR_TPP (1U) /*!< Bit field size in bits for LPTMR_CSR_TPP. */ /*! @brief Read current value of the LPTMR_CSR_TPP field. */ -#define BR_LPTMR_CSR_TPP(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TPP)) +#define BR_LPTMR_CSR_TPP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TPP))) /*! @brief Format value for bitfield LPTMR_CSR_TPP. */ #define BF_LPTMR_CSR_TPP(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TPP) & BM_LPTMR_CSR_TPP) /*! @brief Set the TPP field to a new value. */ -#define BW_LPTMR_CSR_TPP(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TPP) = (v)) +#define BW_LPTMR_CSR_TPP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TPP), v)) /*@}*/ /*! @@ -266,7 +273,7 @@ #define BS_LPTMR_CSR_TPS (2U) /*!< Bit field size in bits for LPTMR_CSR_TPS. */ /*! @brief Read current value of the LPTMR_CSR_TPS field. */ -#define BR_LPTMR_CSR_TPS(x) (HW_LPTMR_CSR(x).B.TPS) +#define BR_LPTMR_CSR_TPS(x) (UNION_READ(hw_lptmr_csr_t, HW_LPTMR_CSR_ADDR(x), U, B.TPS)) /*! @brief Format value for bitfield LPTMR_CSR_TPS. */ #define BF_LPTMR_CSR_TPS(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TPS) & BM_LPTMR_CSR_TPS) @@ -290,13 +297,13 @@ #define BS_LPTMR_CSR_TIE (1U) /*!< Bit field size in bits for LPTMR_CSR_TIE. */ /*! @brief Read current value of the LPTMR_CSR_TIE field. */ -#define BR_LPTMR_CSR_TIE(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TIE)) +#define BR_LPTMR_CSR_TIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TIE))) /*! @brief Format value for bitfield LPTMR_CSR_TIE. */ #define BF_LPTMR_CSR_TIE(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TIE) & BM_LPTMR_CSR_TIE) /*! @brief Set the TIE field to a new value. */ -#define BW_LPTMR_CSR_TIE(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TIE) = (v)) +#define BW_LPTMR_CSR_TIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TIE), v)) /*@}*/ /*! @@ -315,13 +322,13 @@ #define BS_LPTMR_CSR_TCF (1U) /*!< Bit field size in bits for LPTMR_CSR_TCF. */ /*! @brief Read current value of the LPTMR_CSR_TCF field. */ -#define BR_LPTMR_CSR_TCF(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TCF)) +#define BR_LPTMR_CSR_TCF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TCF))) /*! @brief Format value for bitfield LPTMR_CSR_TCF. */ #define BF_LPTMR_CSR_TCF(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TCF) & BM_LPTMR_CSR_TCF) /*! @brief Set the TCF field to a new value. */ -#define BW_LPTMR_CSR_TCF(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TCF) = (v)) +#define BW_LPTMR_CSR_TCF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TCF), v)) /*@}*/ /******************************************************************************* @@ -352,8 +359,8 @@ #define HW_LPTMR_PSR_ADDR(x) ((x) + 0x4U) #define HW_LPTMR_PSR(x) (*(__IO hw_lptmr_psr_t *) HW_LPTMR_PSR_ADDR(x)) -#define HW_LPTMR_PSR_RD(x) (HW_LPTMR_PSR(x).U) -#define HW_LPTMR_PSR_WR(x, v) (HW_LPTMR_PSR(x).U = (v)) +#define HW_LPTMR_PSR_RD(x) (ADDRESS_READ(hw_lptmr_psr_t, HW_LPTMR_PSR_ADDR(x))) +#define HW_LPTMR_PSR_WR(x, v) (ADDRESS_WRITE(hw_lptmr_psr_t, HW_LPTMR_PSR_ADDR(x), v)) #define HW_LPTMR_PSR_SET(x, v) (HW_LPTMR_PSR_WR(x, HW_LPTMR_PSR_RD(x) | (v))) #define HW_LPTMR_PSR_CLR(x, v) (HW_LPTMR_PSR_WR(x, HW_LPTMR_PSR_RD(x) & ~(v))) #define HW_LPTMR_PSR_TOG(x, v) (HW_LPTMR_PSR_WR(x, HW_LPTMR_PSR_RD(x) ^ (v))) @@ -383,7 +390,7 @@ #define BS_LPTMR_PSR_PCS (2U) /*!< Bit field size in bits for LPTMR_PSR_PCS. */ /*! @brief Read current value of the LPTMR_PSR_PCS field. */ -#define BR_LPTMR_PSR_PCS(x) (HW_LPTMR_PSR(x).B.PCS) +#define BR_LPTMR_PSR_PCS(x) (UNION_READ(hw_lptmr_psr_t, HW_LPTMR_PSR_ADDR(x), U, B.PCS)) /*! @brief Format value for bitfield LPTMR_PSR_PCS. */ #define BF_LPTMR_PSR_PCS(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_PSR_PCS) & BM_LPTMR_PSR_PCS) @@ -410,13 +417,13 @@ #define BS_LPTMR_PSR_PBYP (1U) /*!< Bit field size in bits for LPTMR_PSR_PBYP. */ /*! @brief Read current value of the LPTMR_PSR_PBYP field. */ -#define BR_LPTMR_PSR_PBYP(x) (BITBAND_ACCESS32(HW_LPTMR_PSR_ADDR(x), BP_LPTMR_PSR_PBYP)) +#define BR_LPTMR_PSR_PBYP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_PSR_ADDR(x), BP_LPTMR_PSR_PBYP))) /*! @brief Format value for bitfield LPTMR_PSR_PBYP. */ #define BF_LPTMR_PSR_PBYP(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_PSR_PBYP) & BM_LPTMR_PSR_PBYP) /*! @brief Set the PBYP field to a new value. */ -#define BW_LPTMR_PSR_PBYP(x, v) (BITBAND_ACCESS32(HW_LPTMR_PSR_ADDR(x), BP_LPTMR_PSR_PBYP) = (v)) +#define BW_LPTMR_PSR_PBYP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_PSR_ADDR(x), BP_LPTMR_PSR_PBYP), v)) /*@}*/ /*! @@ -466,7 +473,7 @@ #define BS_LPTMR_PSR_PRESCALE (4U) /*!< Bit field size in bits for LPTMR_PSR_PRESCALE. */ /*! @brief Read current value of the LPTMR_PSR_PRESCALE field. */ -#define BR_LPTMR_PSR_PRESCALE(x) (HW_LPTMR_PSR(x).B.PRESCALE) +#define BR_LPTMR_PSR_PRESCALE(x) (UNION_READ(hw_lptmr_psr_t, HW_LPTMR_PSR_ADDR(x), U, B.PRESCALE)) /*! @brief Format value for bitfield LPTMR_PSR_PRESCALE. */ #define BF_LPTMR_PSR_PRESCALE(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_PSR_PRESCALE) & BM_LPTMR_PSR_PRESCALE) @@ -501,8 +508,8 @@ #define HW_LPTMR_CMR_ADDR(x) ((x) + 0x8U) #define HW_LPTMR_CMR(x) (*(__IO hw_lptmr_cmr_t *) HW_LPTMR_CMR_ADDR(x)) -#define HW_LPTMR_CMR_RD(x) (HW_LPTMR_CMR(x).U) -#define HW_LPTMR_CMR_WR(x, v) (HW_LPTMR_CMR(x).U = (v)) +#define HW_LPTMR_CMR_RD(x) (ADDRESS_READ(hw_lptmr_cmr_t, HW_LPTMR_CMR_ADDR(x))) +#define HW_LPTMR_CMR_WR(x, v) (ADDRESS_WRITE(hw_lptmr_cmr_t, HW_LPTMR_CMR_ADDR(x), v)) #define HW_LPTMR_CMR_SET(x, v) (HW_LPTMR_CMR_WR(x, HW_LPTMR_CMR_RD(x) | (v))) #define HW_LPTMR_CMR_CLR(x, v) (HW_LPTMR_CMR_WR(x, HW_LPTMR_CMR_RD(x) & ~(v))) #define HW_LPTMR_CMR_TOG(x, v) (HW_LPTMR_CMR_WR(x, HW_LPTMR_CMR_RD(x) ^ (v))) @@ -527,7 +534,7 @@ #define BS_LPTMR_CMR_COMPARE (16U) /*!< Bit field size in bits for LPTMR_CMR_COMPARE. */ /*! @brief Read current value of the LPTMR_CMR_COMPARE field. */ -#define BR_LPTMR_CMR_COMPARE(x) (HW_LPTMR_CMR(x).B.COMPARE) +#define BR_LPTMR_CMR_COMPARE(x) (UNION_READ(hw_lptmr_cmr_t, HW_LPTMR_CMR_ADDR(x), U, B.COMPARE)) /*! @brief Format value for bitfield LPTMR_CMR_COMPARE. */ #define BF_LPTMR_CMR_COMPARE(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CMR_COMPARE) & BM_LPTMR_CMR_COMPARE) @@ -562,8 +569,8 @@ #define HW_LPTMR_CNR_ADDR(x) ((x) + 0xCU) #define HW_LPTMR_CNR(x) (*(__IO hw_lptmr_cnr_t *) HW_LPTMR_CNR_ADDR(x)) -#define HW_LPTMR_CNR_RD(x) (HW_LPTMR_CNR(x).U) -#define HW_LPTMR_CNR_WR(x, v) (HW_LPTMR_CNR(x).U = (v)) +#define HW_LPTMR_CNR_RD(x) (ADDRESS_READ(hw_lptmr_cnr_t, HW_LPTMR_CNR_ADDR(x))) +#define HW_LPTMR_CNR_WR(x, v) (ADDRESS_WRITE(hw_lptmr_cnr_t, HW_LPTMR_CNR_ADDR(x), v)) #define HW_LPTMR_CNR_SET(x, v) (HW_LPTMR_CNR_WR(x, HW_LPTMR_CNR_RD(x) | (v))) #define HW_LPTMR_CNR_CLR(x, v) (HW_LPTMR_CNR_WR(x, HW_LPTMR_CNR_RD(x) & ~(v))) #define HW_LPTMR_CNR_TOG(x, v) (HW_LPTMR_CNR_WR(x, HW_LPTMR_CNR_RD(x) ^ (v))) @@ -582,7 +589,7 @@ #define BS_LPTMR_CNR_COUNTER (16U) /*!< Bit field size in bits for LPTMR_CNR_COUNTER. */ /*! @brief Read current value of the LPTMR_CNR_COUNTER field. */ -#define BR_LPTMR_CNR_COUNTER(x) (HW_LPTMR_CNR(x).B.COUNTER) +#define BR_LPTMR_CNR_COUNTER(x) (UNION_READ(hw_lptmr_cnr_t, HW_LPTMR_CNR_ADDR(x), U, B.COUNTER)) /*! @brief Format value for bitfield LPTMR_CNR_COUNTER. */ #define BF_LPTMR_CNR_COUNTER(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CNR_COUNTER) & BM_LPTMR_CNR_COUNTER)
--- a/hal/device/device/MK64F12/MK64F12_mcg.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_mcg.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -136,8 +143,8 @@ #define HW_MCG_C1_ADDR(x) ((x) + 0x0U) #define HW_MCG_C1(x) (*(__IO hw_mcg_c1_t *) HW_MCG_C1_ADDR(x)) -#define HW_MCG_C1_RD(x) (HW_MCG_C1(x).U) -#define HW_MCG_C1_WR(x, v) (HW_MCG_C1(x).U = (v)) +#define HW_MCG_C1_RD(x) (ADDRESS_READ(hw_mcg_c1_t, HW_MCG_C1_ADDR(x))) +#define HW_MCG_C1_WR(x, v) (ADDRESS_WRITE(hw_mcg_c1_t, HW_MCG_C1_ADDR(x), v)) #define HW_MCG_C1_SET(x, v) (HW_MCG_C1_WR(x, HW_MCG_C1_RD(x) | (v))) #define HW_MCG_C1_CLR(x, v) (HW_MCG_C1_WR(x, HW_MCG_C1_RD(x) & ~(v))) #define HW_MCG_C1_TOG(x, v) (HW_MCG_C1_WR(x, HW_MCG_C1_RD(x) ^ (v))) @@ -164,13 +171,13 @@ #define BS_MCG_C1_IREFSTEN (1U) /*!< Bit field size in bits for MCG_C1_IREFSTEN. */ /*! @brief Read current value of the MCG_C1_IREFSTEN field. */ -#define BR_MCG_C1_IREFSTEN(x) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFSTEN)) +#define BR_MCG_C1_IREFSTEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFSTEN))) /*! @brief Format value for bitfield MCG_C1_IREFSTEN. */ #define BF_MCG_C1_IREFSTEN(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_IREFSTEN) & BM_MCG_C1_IREFSTEN) /*! @brief Set the IREFSTEN field to a new value. */ -#define BW_MCG_C1_IREFSTEN(x, v) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFSTEN) = (v)) +#define BW_MCG_C1_IREFSTEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFSTEN), v)) /*@}*/ /*! @@ -188,13 +195,13 @@ #define BS_MCG_C1_IRCLKEN (1U) /*!< Bit field size in bits for MCG_C1_IRCLKEN. */ /*! @brief Read current value of the MCG_C1_IRCLKEN field. */ -#define BR_MCG_C1_IRCLKEN(x) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IRCLKEN)) +#define BR_MCG_C1_IRCLKEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IRCLKEN))) /*! @brief Format value for bitfield MCG_C1_IRCLKEN. */ #define BF_MCG_C1_IRCLKEN(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_IRCLKEN) & BM_MCG_C1_IRCLKEN) /*! @brief Set the IRCLKEN field to a new value. */ -#define BW_MCG_C1_IRCLKEN(x, v) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IRCLKEN) = (v)) +#define BW_MCG_C1_IRCLKEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IRCLKEN), v)) /*@}*/ /*! @@ -212,13 +219,13 @@ #define BS_MCG_C1_IREFS (1U) /*!< Bit field size in bits for MCG_C1_IREFS. */ /*! @brief Read current value of the MCG_C1_IREFS field. */ -#define BR_MCG_C1_IREFS(x) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFS)) +#define BR_MCG_C1_IREFS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFS))) /*! @brief Format value for bitfield MCG_C1_IREFS. */ #define BF_MCG_C1_IREFS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_IREFS) & BM_MCG_C1_IREFS) /*! @brief Set the IREFS field to a new value. */ -#define BW_MCG_C1_IREFS(x, v) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFS) = (v)) +#define BW_MCG_C1_IREFS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFS), v)) /*@}*/ /*! @@ -254,7 +261,7 @@ #define BS_MCG_C1_FRDIV (3U) /*!< Bit field size in bits for MCG_C1_FRDIV. */ /*! @brief Read current value of the MCG_C1_FRDIV field. */ -#define BR_MCG_C1_FRDIV(x) (HW_MCG_C1(x).B.FRDIV) +#define BR_MCG_C1_FRDIV(x) (UNION_READ(hw_mcg_c1_t, HW_MCG_C1_ADDR(x), U, B.FRDIV)) /*! @brief Format value for bitfield MCG_C1_FRDIV. */ #define BF_MCG_C1_FRDIV(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_FRDIV) & BM_MCG_C1_FRDIV) @@ -281,7 +288,7 @@ #define BS_MCG_C1_CLKS (2U) /*!< Bit field size in bits for MCG_C1_CLKS. */ /*! @brief Read current value of the MCG_C1_CLKS field. */ -#define BR_MCG_C1_CLKS(x) (HW_MCG_C1(x).B.CLKS) +#define BR_MCG_C1_CLKS(x) (UNION_READ(hw_mcg_c1_t, HW_MCG_C1_ADDR(x), U, B.CLKS)) /*! @brief Format value for bitfield MCG_C1_CLKS. */ #define BF_MCG_C1_CLKS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_CLKS) & BM_MCG_C1_CLKS) @@ -322,8 +329,8 @@ #define HW_MCG_C2_ADDR(x) ((x) + 0x1U) #define HW_MCG_C2(x) (*(__IO hw_mcg_c2_t *) HW_MCG_C2_ADDR(x)) -#define HW_MCG_C2_RD(x) (HW_MCG_C2(x).U) -#define HW_MCG_C2_WR(x, v) (HW_MCG_C2(x).U = (v)) +#define HW_MCG_C2_RD(x) (ADDRESS_READ(hw_mcg_c2_t, HW_MCG_C2_ADDR(x))) +#define HW_MCG_C2_WR(x, v) (ADDRESS_WRITE(hw_mcg_c2_t, HW_MCG_C2_ADDR(x), v)) #define HW_MCG_C2_SET(x, v) (HW_MCG_C2_WR(x, HW_MCG_C2_RD(x) | (v))) #define HW_MCG_C2_CLR(x, v) (HW_MCG_C2_WR(x, HW_MCG_C2_RD(x) & ~(v))) #define HW_MCG_C2_TOG(x, v) (HW_MCG_C2_WR(x, HW_MCG_C2_RD(x) ^ (v))) @@ -348,13 +355,13 @@ #define BS_MCG_C2_IRCS (1U) /*!< Bit field size in bits for MCG_C2_IRCS. */ /*! @brief Read current value of the MCG_C2_IRCS field. */ -#define BR_MCG_C2_IRCS(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_IRCS)) +#define BR_MCG_C2_IRCS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_IRCS))) /*! @brief Format value for bitfield MCG_C2_IRCS. */ #define BF_MCG_C2_IRCS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_IRCS) & BM_MCG_C2_IRCS) /*! @brief Set the IRCS field to a new value. */ -#define BW_MCG_C2_IRCS(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_IRCS) = (v)) +#define BW_MCG_C2_IRCS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_IRCS), v)) /*@}*/ /*! @@ -375,13 +382,13 @@ #define BS_MCG_C2_LP (1U) /*!< Bit field size in bits for MCG_C2_LP. */ /*! @brief Read current value of the MCG_C2_LP field. */ -#define BR_MCG_C2_LP(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LP)) +#define BR_MCG_C2_LP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LP))) /*! @brief Format value for bitfield MCG_C2_LP. */ #define BF_MCG_C2_LP(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_LP) & BM_MCG_C2_LP) /*! @brief Set the LP field to a new value. */ -#define BW_MCG_C2_LP(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LP) = (v)) +#define BW_MCG_C2_LP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LP), v)) /*@}*/ /*! @@ -400,13 +407,13 @@ #define BS_MCG_C2_EREFS (1U) /*!< Bit field size in bits for MCG_C2_EREFS. */ /*! @brief Read current value of the MCG_C2_EREFS field. */ -#define BR_MCG_C2_EREFS(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_EREFS)) +#define BR_MCG_C2_EREFS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_EREFS))) /*! @brief Format value for bitfield MCG_C2_EREFS. */ #define BF_MCG_C2_EREFS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_EREFS) & BM_MCG_C2_EREFS) /*! @brief Set the EREFS field to a new value. */ -#define BW_MCG_C2_EREFS(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_EREFS) = (v)) +#define BW_MCG_C2_EREFS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_EREFS), v)) /*@}*/ /*! @@ -425,13 +432,13 @@ #define BS_MCG_C2_HGO (1U) /*!< Bit field size in bits for MCG_C2_HGO. */ /*! @brief Read current value of the MCG_C2_HGO field. */ -#define BR_MCG_C2_HGO(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_HGO)) +#define BR_MCG_C2_HGO(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_HGO))) /*! @brief Format value for bitfield MCG_C2_HGO. */ #define BF_MCG_C2_HGO(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_HGO) & BM_MCG_C2_HGO) /*! @brief Set the HGO field to a new value. */ -#define BW_MCG_C2_HGO(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_HGO) = (v)) +#define BW_MCG_C2_HGO(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_HGO), v)) /*@}*/ /*! @@ -451,7 +458,7 @@ #define BS_MCG_C2_RANGE (2U) /*!< Bit field size in bits for MCG_C2_RANGE. */ /*! @brief Read current value of the MCG_C2_RANGE field. */ -#define BR_MCG_C2_RANGE(x) (HW_MCG_C2(x).B.RANGE) +#define BR_MCG_C2_RANGE(x) (UNION_READ(hw_mcg_c2_t, HW_MCG_C2_ADDR(x), U, B.RANGE)) /*! @brief Format value for bitfield MCG_C2_RANGE. */ #define BF_MCG_C2_RANGE(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_RANGE) & BM_MCG_C2_RANGE) @@ -475,13 +482,13 @@ #define BS_MCG_C2_FCFTRIM (1U) /*!< Bit field size in bits for MCG_C2_FCFTRIM. */ /*! @brief Read current value of the MCG_C2_FCFTRIM field. */ -#define BR_MCG_C2_FCFTRIM(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_FCFTRIM)) +#define BR_MCG_C2_FCFTRIM(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_FCFTRIM))) /*! @brief Format value for bitfield MCG_C2_FCFTRIM. */ #define BF_MCG_C2_FCFTRIM(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_FCFTRIM) & BM_MCG_C2_FCFTRIM) /*! @brief Set the FCFTRIM field to a new value. */ -#define BW_MCG_C2_FCFTRIM(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_FCFTRIM) = (v)) +#define BW_MCG_C2_FCFTRIM(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_FCFTRIM), v)) /*@}*/ /*! @@ -502,13 +509,13 @@ #define BS_MCG_C2_LOCRE0 (1U) /*!< Bit field size in bits for MCG_C2_LOCRE0. */ /*! @brief Read current value of the MCG_C2_LOCRE0 field. */ -#define BR_MCG_C2_LOCRE0(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LOCRE0)) +#define BR_MCG_C2_LOCRE0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LOCRE0))) /*! @brief Format value for bitfield MCG_C2_LOCRE0. */ #define BF_MCG_C2_LOCRE0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_LOCRE0) & BM_MCG_C2_LOCRE0) /*! @brief Set the LOCRE0 field to a new value. */ -#define BW_MCG_C2_LOCRE0(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LOCRE0) = (v)) +#define BW_MCG_C2_LOCRE0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LOCRE0), v)) /*@}*/ /******************************************************************************* @@ -537,8 +544,8 @@ #define HW_MCG_C3_ADDR(x) ((x) + 0x2U) #define HW_MCG_C3(x) (*(__IO hw_mcg_c3_t *) HW_MCG_C3_ADDR(x)) -#define HW_MCG_C3_RD(x) (HW_MCG_C3(x).U) -#define HW_MCG_C3_WR(x, v) (HW_MCG_C3(x).U = (v)) +#define HW_MCG_C3_RD(x) (ADDRESS_READ(hw_mcg_c3_t, HW_MCG_C3_ADDR(x))) +#define HW_MCG_C3_WR(x, v) (ADDRESS_WRITE(hw_mcg_c3_t, HW_MCG_C3_ADDR(x), v)) #define HW_MCG_C3_SET(x, v) (HW_MCG_C3_WR(x, HW_MCG_C3_RD(x) | (v))) #define HW_MCG_C3_CLR(x, v) (HW_MCG_C3_WR(x, HW_MCG_C3_RD(x) & ~(v))) #define HW_MCG_C3_TOG(x, v) (HW_MCG_C3_WR(x, HW_MCG_C3_RD(x) ^ (v))) @@ -609,8 +616,8 @@ #define HW_MCG_C4_ADDR(x) ((x) + 0x3U) #define HW_MCG_C4(x) (*(__IO hw_mcg_c4_t *) HW_MCG_C4_ADDR(x)) -#define HW_MCG_C4_RD(x) (HW_MCG_C4(x).U) -#define HW_MCG_C4_WR(x, v) (HW_MCG_C4(x).U = (v)) +#define HW_MCG_C4_RD(x) (ADDRESS_READ(hw_mcg_c4_t, HW_MCG_C4_ADDR(x))) +#define HW_MCG_C4_WR(x, v) (ADDRESS_WRITE(hw_mcg_c4_t, HW_MCG_C4_ADDR(x), v)) #define HW_MCG_C4_SET(x, v) (HW_MCG_C4_WR(x, HW_MCG_C4_RD(x) | (v))) #define HW_MCG_C4_CLR(x, v) (HW_MCG_C4_WR(x, HW_MCG_C4_RD(x) & ~(v))) #define HW_MCG_C4_TOG(x, v) (HW_MCG_C4_WR(x, HW_MCG_C4_RD(x) ^ (v))) @@ -636,13 +643,13 @@ #define BS_MCG_C4_SCFTRIM (1U) /*!< Bit field size in bits for MCG_C4_SCFTRIM. */ /*! @brief Read current value of the MCG_C4_SCFTRIM field. */ -#define BR_MCG_C4_SCFTRIM(x) (BITBAND_ACCESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_SCFTRIM)) +#define BR_MCG_C4_SCFTRIM(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_SCFTRIM))) /*! @brief Format value for bitfield MCG_C4_SCFTRIM. */ #define BF_MCG_C4_SCFTRIM(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C4_SCFTRIM) & BM_MCG_C4_SCFTRIM) /*! @brief Set the SCFTRIM field to a new value. */ -#define BW_MCG_C4_SCFTRIM(x, v) (BITBAND_ACCESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_SCFTRIM) = (v)) +#define BW_MCG_C4_SCFTRIM(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_SCFTRIM), v)) /*@}*/ /*! @@ -662,7 +669,7 @@ #define BS_MCG_C4_FCTRIM (4U) /*!< Bit field size in bits for MCG_C4_FCTRIM. */ /*! @brief Read current value of the MCG_C4_FCTRIM field. */ -#define BR_MCG_C4_FCTRIM(x) (HW_MCG_C4(x).B.FCTRIM) +#define BR_MCG_C4_FCTRIM(x) (UNION_READ(hw_mcg_c4_t, HW_MCG_C4_ADDR(x), U, B.FCTRIM)) /*! @brief Format value for bitfield MCG_C4_FCTRIM. */ #define BF_MCG_C4_FCTRIM(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C4_FCTRIM) & BM_MCG_C4_FCTRIM) @@ -692,7 +699,7 @@ #define BS_MCG_C4_DRST_DRS (2U) /*!< Bit field size in bits for MCG_C4_DRST_DRS. */ /*! @brief Read current value of the MCG_C4_DRST_DRS field. */ -#define BR_MCG_C4_DRST_DRS(x) (HW_MCG_C4(x).B.DRST_DRS) +#define BR_MCG_C4_DRST_DRS(x) (UNION_READ(hw_mcg_c4_t, HW_MCG_C4_ADDR(x), U, B.DRST_DRS)) /*! @brief Format value for bitfield MCG_C4_DRST_DRS. */ #define BF_MCG_C4_DRST_DRS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C4_DRST_DRS) & BM_MCG_C4_DRST_DRS) @@ -723,13 +730,13 @@ #define BS_MCG_C4_DMX32 (1U) /*!< Bit field size in bits for MCG_C4_DMX32. */ /*! @brief Read current value of the MCG_C4_DMX32 field. */ -#define BR_MCG_C4_DMX32(x) (BITBAND_ACCESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_DMX32)) +#define BR_MCG_C4_DMX32(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_DMX32))) /*! @brief Format value for bitfield MCG_C4_DMX32. */ #define BF_MCG_C4_DMX32(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C4_DMX32) & BM_MCG_C4_DMX32) /*! @brief Set the DMX32 field to a new value. */ -#define BW_MCG_C4_DMX32(x, v) (BITBAND_ACCESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_DMX32) = (v)) +#define BW_MCG_C4_DMX32(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_DMX32), v)) /*@}*/ /******************************************************************************* @@ -760,8 +767,8 @@ #define HW_MCG_C5_ADDR(x) ((x) + 0x4U) #define HW_MCG_C5(x) (*(__IO hw_mcg_c5_t *) HW_MCG_C5_ADDR(x)) -#define HW_MCG_C5_RD(x) (HW_MCG_C5(x).U) -#define HW_MCG_C5_WR(x, v) (HW_MCG_C5(x).U = (v)) +#define HW_MCG_C5_RD(x) (ADDRESS_READ(hw_mcg_c5_t, HW_MCG_C5_ADDR(x))) +#define HW_MCG_C5_WR(x, v) (ADDRESS_WRITE(hw_mcg_c5_t, HW_MCG_C5_ADDR(x), v)) #define HW_MCG_C5_SET(x, v) (HW_MCG_C5_WR(x, HW_MCG_C5_RD(x) | (v))) #define HW_MCG_C5_CLR(x, v) (HW_MCG_C5_WR(x, HW_MCG_C5_RD(x) & ~(v))) #define HW_MCG_C5_TOG(x, v) (HW_MCG_C5_WR(x, HW_MCG_C5_RD(x) ^ (v))) @@ -791,7 +798,7 @@ #define BS_MCG_C5_PRDIV0 (5U) /*!< Bit field size in bits for MCG_C5_PRDIV0. */ /*! @brief Read current value of the MCG_C5_PRDIV0 field. */ -#define BR_MCG_C5_PRDIV0(x) (HW_MCG_C5(x).B.PRDIV0) +#define BR_MCG_C5_PRDIV0(x) (UNION_READ(hw_mcg_c5_t, HW_MCG_C5_ADDR(x), U, B.PRDIV0)) /*! @brief Format value for bitfield MCG_C5_PRDIV0. */ #define BF_MCG_C5_PRDIV0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C5_PRDIV0) & BM_MCG_C5_PRDIV0) @@ -817,13 +824,13 @@ #define BS_MCG_C5_PLLSTEN0 (1U) /*!< Bit field size in bits for MCG_C5_PLLSTEN0. */ /*! @brief Read current value of the MCG_C5_PLLSTEN0 field. */ -#define BR_MCG_C5_PLLSTEN0(x) (BITBAND_ACCESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLSTEN0)) +#define BR_MCG_C5_PLLSTEN0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLSTEN0))) /*! @brief Format value for bitfield MCG_C5_PLLSTEN0. */ #define BF_MCG_C5_PLLSTEN0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C5_PLLSTEN0) & BM_MCG_C5_PLLSTEN0) /*! @brief Set the PLLSTEN0 field to a new value. */ -#define BW_MCG_C5_PLLSTEN0(x, v) (BITBAND_ACCESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLSTEN0) = (v)) +#define BW_MCG_C5_PLLSTEN0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLSTEN0), v)) /*@}*/ /*! @@ -847,13 +854,13 @@ #define BS_MCG_C5_PLLCLKEN0 (1U) /*!< Bit field size in bits for MCG_C5_PLLCLKEN0. */ /*! @brief Read current value of the MCG_C5_PLLCLKEN0 field. */ -#define BR_MCG_C5_PLLCLKEN0(x) (BITBAND_ACCESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLCLKEN0)) +#define BR_MCG_C5_PLLCLKEN0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLCLKEN0))) /*! @brief Format value for bitfield MCG_C5_PLLCLKEN0. */ #define BF_MCG_C5_PLLCLKEN0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C5_PLLCLKEN0) & BM_MCG_C5_PLLCLKEN0) /*! @brief Set the PLLCLKEN0 field to a new value. */ -#define BW_MCG_C5_PLLCLKEN0(x, v) (BITBAND_ACCESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLCLKEN0) = (v)) +#define BW_MCG_C5_PLLCLKEN0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLCLKEN0), v)) /*@}*/ /******************************************************************************* @@ -884,8 +891,8 @@ #define HW_MCG_C6_ADDR(x) ((x) + 0x5U) #define HW_MCG_C6(x) (*(__IO hw_mcg_c6_t *) HW_MCG_C6_ADDR(x)) -#define HW_MCG_C6_RD(x) (HW_MCG_C6(x).U) -#define HW_MCG_C6_WR(x, v) (HW_MCG_C6(x).U = (v)) +#define HW_MCG_C6_RD(x) (ADDRESS_READ(hw_mcg_c6_t, HW_MCG_C6_ADDR(x))) +#define HW_MCG_C6_WR(x, v) (ADDRESS_WRITE(hw_mcg_c6_t, HW_MCG_C6_ADDR(x), v)) #define HW_MCG_C6_SET(x, v) (HW_MCG_C6_WR(x, HW_MCG_C6_RD(x) | (v))) #define HW_MCG_C6_CLR(x, v) (HW_MCG_C6_WR(x, HW_MCG_C6_RD(x) & ~(v))) #define HW_MCG_C6_TOG(x, v) (HW_MCG_C6_WR(x, HW_MCG_C6_RD(x) ^ (v))) @@ -914,7 +921,7 @@ #define BS_MCG_C6_VDIV0 (5U) /*!< Bit field size in bits for MCG_C6_VDIV0. */ /*! @brief Read current value of the MCG_C6_VDIV0 field. */ -#define BR_MCG_C6_VDIV0(x) (HW_MCG_C6(x).B.VDIV0) +#define BR_MCG_C6_VDIV0(x) (UNION_READ(hw_mcg_c6_t, HW_MCG_C6_ADDR(x), U, B.VDIV0)) /*! @brief Format value for bitfield MCG_C6_VDIV0. */ #define BF_MCG_C6_VDIV0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C6_VDIV0) & BM_MCG_C6_VDIV0) @@ -946,13 +953,13 @@ #define BS_MCG_C6_CME0 (1U) /*!< Bit field size in bits for MCG_C6_CME0. */ /*! @brief Read current value of the MCG_C6_CME0 field. */ -#define BR_MCG_C6_CME0(x) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_CME0)) +#define BR_MCG_C6_CME0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_CME0))) /*! @brief Format value for bitfield MCG_C6_CME0. */ #define BF_MCG_C6_CME0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C6_CME0) & BM_MCG_C6_CME0) /*! @brief Set the CME0 field to a new value. */ -#define BW_MCG_C6_CME0(x, v) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_CME0) = (v)) +#define BW_MCG_C6_CME0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_CME0), v)) /*@}*/ /*! @@ -974,13 +981,13 @@ #define BS_MCG_C6_PLLS (1U) /*!< Bit field size in bits for MCG_C6_PLLS. */ /*! @brief Read current value of the MCG_C6_PLLS field. */ -#define BR_MCG_C6_PLLS(x) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_PLLS)) +#define BR_MCG_C6_PLLS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_PLLS))) /*! @brief Format value for bitfield MCG_C6_PLLS. */ #define BF_MCG_C6_PLLS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C6_PLLS) & BM_MCG_C6_PLLS) /*! @brief Set the PLLS field to a new value. */ -#define BW_MCG_C6_PLLS(x, v) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_PLLS) = (v)) +#define BW_MCG_C6_PLLS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_PLLS), v)) /*@}*/ /*! @@ -999,13 +1006,13 @@ #define BS_MCG_C6_LOLIE0 (1U) /*!< Bit field size in bits for MCG_C6_LOLIE0. */ /*! @brief Read current value of the MCG_C6_LOLIE0 field. */ -#define BR_MCG_C6_LOLIE0(x) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_LOLIE0)) +#define BR_MCG_C6_LOLIE0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_LOLIE0))) /*! @brief Format value for bitfield MCG_C6_LOLIE0. */ #define BF_MCG_C6_LOLIE0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C6_LOLIE0) & BM_MCG_C6_LOLIE0) /*! @brief Set the LOLIE0 field to a new value. */ -#define BW_MCG_C6_LOLIE0(x, v) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_LOLIE0) = (v)) +#define BW_MCG_C6_LOLIE0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_LOLIE0), v)) /*@}*/ /******************************************************************************* @@ -1039,8 +1046,8 @@ #define HW_MCG_S_ADDR(x) ((x) + 0x6U) #define HW_MCG_S(x) (*(__IO hw_mcg_s_t *) HW_MCG_S_ADDR(x)) -#define HW_MCG_S_RD(x) (HW_MCG_S(x).U) -#define HW_MCG_S_WR(x, v) (HW_MCG_S(x).U = (v)) +#define HW_MCG_S_RD(x) (ADDRESS_READ(hw_mcg_s_t, HW_MCG_S_ADDR(x))) +#define HW_MCG_S_WR(x, v) (ADDRESS_WRITE(hw_mcg_s_t, HW_MCG_S_ADDR(x), v)) #define HW_MCG_S_SET(x, v) (HW_MCG_S_WR(x, HW_MCG_S_RD(x) | (v))) #define HW_MCG_S_CLR(x, v) (HW_MCG_S_WR(x, HW_MCG_S_RD(x) & ~(v))) #define HW_MCG_S_TOG(x, v) (HW_MCG_S_WR(x, HW_MCG_S_RD(x) ^ (v))) @@ -1070,7 +1077,7 @@ #define BS_MCG_S_IRCST (1U) /*!< Bit field size in bits for MCG_S_IRCST. */ /*! @brief Read current value of the MCG_S_IRCST field. */ -#define BR_MCG_S_IRCST(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_IRCST)) +#define BR_MCG_S_IRCST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_IRCST))) /*@}*/ /*! @@ -1087,7 +1094,7 @@ #define BS_MCG_S_OSCINIT0 (1U) /*!< Bit field size in bits for MCG_S_OSCINIT0. */ /*! @brief Read current value of the MCG_S_OSCINIT0 field. */ -#define BR_MCG_S_OSCINIT0(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_OSCINIT0)) +#define BR_MCG_S_OSCINIT0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_OSCINIT0))) /*@}*/ /*! @@ -1109,7 +1116,7 @@ #define BS_MCG_S_CLKST (2U) /*!< Bit field size in bits for MCG_S_CLKST. */ /*! @brief Read current value of the MCG_S_CLKST field. */ -#define BR_MCG_S_CLKST(x) (HW_MCG_S(x).B.CLKST) +#define BR_MCG_S_CLKST(x) (UNION_READ(hw_mcg_s_t, HW_MCG_S_ADDR(x), U, B.CLKST)) /*@}*/ /*! @@ -1129,7 +1136,7 @@ #define BS_MCG_S_IREFST (1U) /*!< Bit field size in bits for MCG_S_IREFST. */ /*! @brief Read current value of the MCG_S_IREFST field. */ -#define BR_MCG_S_IREFST(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_IREFST)) +#define BR_MCG_S_IREFST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_IREFST))) /*@}*/ /*! @@ -1149,7 +1156,7 @@ #define BS_MCG_S_PLLST (1U) /*!< Bit field size in bits for MCG_S_PLLST. */ /*! @brief Read current value of the MCG_S_PLLST field. */ -#define BR_MCG_S_PLLST(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_PLLST)) +#define BR_MCG_S_PLLST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_PLLST))) /*@}*/ /*! @@ -1179,7 +1186,7 @@ #define BS_MCG_S_LOCK0 (1U) /*!< Bit field size in bits for MCG_S_LOCK0. */ /*! @brief Read current value of the MCG_S_LOCK0 field. */ -#define BR_MCG_S_LOCK0(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOCK0)) +#define BR_MCG_S_LOCK0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOCK0))) /*@}*/ /*! @@ -1202,13 +1209,13 @@ #define BS_MCG_S_LOLS0 (1U) /*!< Bit field size in bits for MCG_S_LOLS0. */ /*! @brief Read current value of the MCG_S_LOLS0 field. */ -#define BR_MCG_S_LOLS0(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOLS0)) +#define BR_MCG_S_LOLS0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOLS0))) /*! @brief Format value for bitfield MCG_S_LOLS0. */ #define BF_MCG_S_LOLS0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_S_LOLS0) & BM_MCG_S_LOLS0) /*! @brief Set the LOLS0 field to a new value. */ -#define BW_MCG_S_LOLS0(x, v) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOLS0) = (v)) +#define BW_MCG_S_LOLS0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOLS0), v)) /*@}*/ /******************************************************************************* @@ -1242,8 +1249,8 @@ #define HW_MCG_SC_ADDR(x) ((x) + 0x8U) #define HW_MCG_SC(x) (*(__IO hw_mcg_sc_t *) HW_MCG_SC_ADDR(x)) -#define HW_MCG_SC_RD(x) (HW_MCG_SC(x).U) -#define HW_MCG_SC_WR(x, v) (HW_MCG_SC(x).U = (v)) +#define HW_MCG_SC_RD(x) (ADDRESS_READ(hw_mcg_sc_t, HW_MCG_SC_ADDR(x))) +#define HW_MCG_SC_WR(x, v) (ADDRESS_WRITE(hw_mcg_sc_t, HW_MCG_SC_ADDR(x), v)) #define HW_MCG_SC_SET(x, v) (HW_MCG_SC_WR(x, HW_MCG_SC_RD(x) | (v))) #define HW_MCG_SC_CLR(x, v) (HW_MCG_SC_WR(x, HW_MCG_SC_RD(x) & ~(v))) #define HW_MCG_SC_TOG(x, v) (HW_MCG_SC_WR(x, HW_MCG_SC_RD(x) ^ (v))) @@ -1270,13 +1277,13 @@ #define BS_MCG_SC_LOCS0 (1U) /*!< Bit field size in bits for MCG_SC_LOCS0. */ /*! @brief Read current value of the MCG_SC_LOCS0 field. */ -#define BR_MCG_SC_LOCS0(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_LOCS0)) +#define BR_MCG_SC_LOCS0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_LOCS0))) /*! @brief Format value for bitfield MCG_SC_LOCS0. */ #define BF_MCG_SC_LOCS0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_LOCS0) & BM_MCG_SC_LOCS0) /*! @brief Set the LOCS0 field to a new value. */ -#define BW_MCG_SC_LOCS0(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_LOCS0) = (v)) +#define BW_MCG_SC_LOCS0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_LOCS0), v)) /*@}*/ /*! @@ -1302,7 +1309,7 @@ #define BS_MCG_SC_FCRDIV (3U) /*!< Bit field size in bits for MCG_SC_FCRDIV. */ /*! @brief Read current value of the MCG_SC_FCRDIV field. */ -#define BR_MCG_SC_FCRDIV(x) (HW_MCG_SC(x).B.FCRDIV) +#define BR_MCG_SC_FCRDIV(x) (UNION_READ(hw_mcg_sc_t, HW_MCG_SC_ADDR(x), U, B.FCRDIV)) /*! @brief Format value for bitfield MCG_SC_FCRDIV. */ #define BF_MCG_SC_FCRDIV(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_FCRDIV) & BM_MCG_SC_FCRDIV) @@ -1332,13 +1339,13 @@ #define BS_MCG_SC_FLTPRSRV (1U) /*!< Bit field size in bits for MCG_SC_FLTPRSRV. */ /*! @brief Read current value of the MCG_SC_FLTPRSRV field. */ -#define BR_MCG_SC_FLTPRSRV(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_FLTPRSRV)) +#define BR_MCG_SC_FLTPRSRV(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_FLTPRSRV))) /*! @brief Format value for bitfield MCG_SC_FLTPRSRV. */ #define BF_MCG_SC_FLTPRSRV(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_FLTPRSRV) & BM_MCG_SC_FLTPRSRV) /*! @brief Set the FLTPRSRV field to a new value. */ -#define BW_MCG_SC_FLTPRSRV(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_FLTPRSRV) = (v)) +#define BW_MCG_SC_FLTPRSRV(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_FLTPRSRV), v)) /*@}*/ /*! @@ -1359,13 +1366,13 @@ #define BS_MCG_SC_ATMF (1U) /*!< Bit field size in bits for MCG_SC_ATMF. */ /*! @brief Read current value of the MCG_SC_ATMF field. */ -#define BR_MCG_SC_ATMF(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMF)) +#define BR_MCG_SC_ATMF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMF))) /*! @brief Format value for bitfield MCG_SC_ATMF. */ #define BF_MCG_SC_ATMF(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_ATMF) & BM_MCG_SC_ATMF) /*! @brief Set the ATMF field to a new value. */ -#define BW_MCG_SC_ATMF(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMF) = (v)) +#define BW_MCG_SC_ATMF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMF), v)) /*@}*/ /*! @@ -1383,13 +1390,13 @@ #define BS_MCG_SC_ATMS (1U) /*!< Bit field size in bits for MCG_SC_ATMS. */ /*! @brief Read current value of the MCG_SC_ATMS field. */ -#define BR_MCG_SC_ATMS(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMS)) +#define BR_MCG_SC_ATMS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMS))) /*! @brief Format value for bitfield MCG_SC_ATMS. */ #define BF_MCG_SC_ATMS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_ATMS) & BM_MCG_SC_ATMS) /*! @brief Set the ATMS field to a new value. */ -#define BW_MCG_SC_ATMS(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMS) = (v)) +#define BW_MCG_SC_ATMS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMS), v)) /*@}*/ /*! @@ -1411,13 +1418,13 @@ #define BS_MCG_SC_ATME (1U) /*!< Bit field size in bits for MCG_SC_ATME. */ /*! @brief Read current value of the MCG_SC_ATME field. */ -#define BR_MCG_SC_ATME(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATME)) +#define BR_MCG_SC_ATME(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATME))) /*! @brief Format value for bitfield MCG_SC_ATME. */ #define BF_MCG_SC_ATME(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_ATME) & BM_MCG_SC_ATME) /*! @brief Set the ATME field to a new value. */ -#define BW_MCG_SC_ATME(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATME) = (v)) +#define BW_MCG_SC_ATME(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATME), v)) /*@}*/ /******************************************************************************* @@ -1445,8 +1452,8 @@ #define HW_MCG_ATCVH_ADDR(x) ((x) + 0xAU) #define HW_MCG_ATCVH(x) (*(__IO hw_mcg_atcvh_t *) HW_MCG_ATCVH_ADDR(x)) -#define HW_MCG_ATCVH_RD(x) (HW_MCG_ATCVH(x).U) -#define HW_MCG_ATCVH_WR(x, v) (HW_MCG_ATCVH(x).U = (v)) +#define HW_MCG_ATCVH_RD(x) (ADDRESS_READ(hw_mcg_atcvh_t, HW_MCG_ATCVH_ADDR(x))) +#define HW_MCG_ATCVH_WR(x, v) (ADDRESS_WRITE(hw_mcg_atcvh_t, HW_MCG_ATCVH_ADDR(x), v)) #define HW_MCG_ATCVH_SET(x, v) (HW_MCG_ATCVH_WR(x, HW_MCG_ATCVH_RD(x) | (v))) #define HW_MCG_ATCVH_CLR(x, v) (HW_MCG_ATCVH_WR(x, HW_MCG_ATCVH_RD(x) & ~(v))) #define HW_MCG_ATCVH_TOG(x, v) (HW_MCG_ATCVH_WR(x, HW_MCG_ATCVH_RD(x) ^ (v))) @@ -1502,8 +1509,8 @@ #define HW_MCG_ATCVL_ADDR(x) ((x) + 0xBU) #define HW_MCG_ATCVL(x) (*(__IO hw_mcg_atcvl_t *) HW_MCG_ATCVL_ADDR(x)) -#define HW_MCG_ATCVL_RD(x) (HW_MCG_ATCVL(x).U) -#define HW_MCG_ATCVL_WR(x, v) (HW_MCG_ATCVL(x).U = (v)) +#define HW_MCG_ATCVL_RD(x) (ADDRESS_READ(hw_mcg_atcvl_t, HW_MCG_ATCVL_ADDR(x))) +#define HW_MCG_ATCVL_WR(x, v) (ADDRESS_WRITE(hw_mcg_atcvl_t, HW_MCG_ATCVL_ADDR(x), v)) #define HW_MCG_ATCVL_SET(x, v) (HW_MCG_ATCVL_WR(x, HW_MCG_ATCVL_RD(x) | (v))) #define HW_MCG_ATCVL_CLR(x, v) (HW_MCG_ATCVL_WR(x, HW_MCG_ATCVL_RD(x) & ~(v))) #define HW_MCG_ATCVL_TOG(x, v) (HW_MCG_ATCVL_WR(x, HW_MCG_ATCVL_RD(x) ^ (v))) @@ -1560,8 +1567,8 @@ #define HW_MCG_C7_ADDR(x) ((x) + 0xCU) #define HW_MCG_C7(x) (*(__IO hw_mcg_c7_t *) HW_MCG_C7_ADDR(x)) -#define HW_MCG_C7_RD(x) (HW_MCG_C7(x).U) -#define HW_MCG_C7_WR(x, v) (HW_MCG_C7(x).U = (v)) +#define HW_MCG_C7_RD(x) (ADDRESS_READ(hw_mcg_c7_t, HW_MCG_C7_ADDR(x))) +#define HW_MCG_C7_WR(x, v) (ADDRESS_WRITE(hw_mcg_c7_t, HW_MCG_C7_ADDR(x), v)) #define HW_MCG_C7_SET(x, v) (HW_MCG_C7_WR(x, HW_MCG_C7_RD(x) | (v))) #define HW_MCG_C7_CLR(x, v) (HW_MCG_C7_WR(x, HW_MCG_C7_RD(x) & ~(v))) #define HW_MCG_C7_TOG(x, v) (HW_MCG_C7_WR(x, HW_MCG_C7_RD(x) ^ (v))) @@ -1588,7 +1595,7 @@ #define BS_MCG_C7_OSCSEL (2U) /*!< Bit field size in bits for MCG_C7_OSCSEL. */ /*! @brief Read current value of the MCG_C7_OSCSEL field. */ -#define BR_MCG_C7_OSCSEL(x) (HW_MCG_C7(x).B.OSCSEL) +#define BR_MCG_C7_OSCSEL(x) (UNION_READ(hw_mcg_c7_t, HW_MCG_C7_ADDR(x), U, B.OSCSEL)) /*! @brief Format value for bitfield MCG_C7_OSCSEL. */ #define BF_MCG_C7_OSCSEL(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C7_OSCSEL) & BM_MCG_C7_OSCSEL) @@ -1626,8 +1633,8 @@ #define HW_MCG_C8_ADDR(x) ((x) + 0xDU) #define HW_MCG_C8(x) (*(__IO hw_mcg_c8_t *) HW_MCG_C8_ADDR(x)) -#define HW_MCG_C8_RD(x) (HW_MCG_C8(x).U) -#define HW_MCG_C8_WR(x, v) (HW_MCG_C8(x).U = (v)) +#define HW_MCG_C8_RD(x) (ADDRESS_READ(hw_mcg_c8_t, HW_MCG_C8_ADDR(x))) +#define HW_MCG_C8_WR(x, v) (ADDRESS_WRITE(hw_mcg_c8_t, HW_MCG_C8_ADDR(x), v)) #define HW_MCG_C8_SET(x, v) (HW_MCG_C8_WR(x, HW_MCG_C8_RD(x) | (v))) #define HW_MCG_C8_CLR(x, v) (HW_MCG_C8_WR(x, HW_MCG_C8_RD(x) & ~(v))) #define HW_MCG_C8_TOG(x, v) (HW_MCG_C8_WR(x, HW_MCG_C8_RD(x) ^ (v))) @@ -1653,13 +1660,13 @@ #define BS_MCG_C8_LOCS1 (1U) /*!< Bit field size in bits for MCG_C8_LOCS1. */ /*! @brief Read current value of the MCG_C8_LOCS1 field. */ -#define BR_MCG_C8_LOCS1(x) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCS1)) +#define BR_MCG_C8_LOCS1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCS1))) /*! @brief Format value for bitfield MCG_C8_LOCS1. */ #define BF_MCG_C8_LOCS1(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C8_LOCS1) & BM_MCG_C8_LOCS1) /*! @brief Set the LOCS1 field to a new value. */ -#define BW_MCG_C8_LOCS1(x, v) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCS1) = (v)) +#define BW_MCG_C8_LOCS1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCS1), v)) /*@}*/ /*! @@ -1684,13 +1691,13 @@ #define BS_MCG_C8_CME1 (1U) /*!< Bit field size in bits for MCG_C8_CME1. */ /*! @brief Read current value of the MCG_C8_CME1 field. */ -#define BR_MCG_C8_CME1(x) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_CME1)) +#define BR_MCG_C8_CME1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_CME1))) /*! @brief Format value for bitfield MCG_C8_CME1. */ #define BF_MCG_C8_CME1(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C8_CME1) & BM_MCG_C8_CME1) /*! @brief Set the CME1 field to a new value. */ -#define BW_MCG_C8_CME1(x, v) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_CME1) = (v)) +#define BW_MCG_C8_CME1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_CME1), v)) /*@}*/ /*! @@ -1711,13 +1718,13 @@ #define BS_MCG_C8_LOLRE (1U) /*!< Bit field size in bits for MCG_C8_LOLRE. */ /*! @brief Read current value of the MCG_C8_LOLRE field. */ -#define BR_MCG_C8_LOLRE(x) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOLRE)) +#define BR_MCG_C8_LOLRE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOLRE))) /*! @brief Format value for bitfield MCG_C8_LOLRE. */ #define BF_MCG_C8_LOLRE(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C8_LOLRE) & BM_MCG_C8_LOLRE) /*! @brief Set the LOLRE field to a new value. */ -#define BW_MCG_C8_LOLRE(x, v) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOLRE) = (v)) +#define BW_MCG_C8_LOLRE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOLRE), v)) /*@}*/ /*! @@ -1737,13 +1744,13 @@ #define BS_MCG_C8_LOCRE1 (1U) /*!< Bit field size in bits for MCG_C8_LOCRE1. */ /*! @brief Read current value of the MCG_C8_LOCRE1 field. */ -#define BR_MCG_C8_LOCRE1(x) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCRE1)) +#define BR_MCG_C8_LOCRE1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCRE1))) /*! @brief Format value for bitfield MCG_C8_LOCRE1. */ #define BF_MCG_C8_LOCRE1(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C8_LOCRE1) & BM_MCG_C8_LOCRE1) /*! @brief Set the LOCRE1 field to a new value. */ -#define BW_MCG_C8_LOCRE1(x, v) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCRE1) = (v)) +#define BW_MCG_C8_LOCRE1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCRE1), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_mcm.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_mcm.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -134,7 +141,7 @@ #define HW_MCM_PLASC_ADDR(x) ((x) + 0x8U) #define HW_MCM_PLASC(x) (*(__I hw_mcm_plasc_t *) HW_MCM_PLASC_ADDR(x)) -#define HW_MCM_PLASC_RD(x) (HW_MCM_PLASC(x).U) +#define HW_MCM_PLASC_RD(x) (ADDRESS_READ(hw_mcm_plasc_t, HW_MCM_PLASC_ADDR(x))) /*@}*/ /* @@ -154,7 +161,7 @@ #define BS_MCM_PLASC_ASC (8U) /*!< Bit field size in bits for MCM_PLASC_ASC. */ /*! @brief Read current value of the MCM_PLASC_ASC field. */ -#define BR_MCM_PLASC_ASC(x) (HW_MCM_PLASC(x).B.ASC) +#define BR_MCM_PLASC_ASC(x) (UNION_READ(hw_mcm_plasc_t, HW_MCM_PLASC_ADDR(x), U, B.ASC)) /*@}*/ /******************************************************************************* @@ -187,7 +194,7 @@ #define HW_MCM_PLAMC_ADDR(x) ((x) + 0xAU) #define HW_MCM_PLAMC(x) (*(__I hw_mcm_plamc_t *) HW_MCM_PLAMC_ADDR(x)) -#define HW_MCM_PLAMC_RD(x) (HW_MCM_PLAMC(x).U) +#define HW_MCM_PLAMC_RD(x) (ADDRESS_READ(hw_mcm_plamc_t, HW_MCM_PLAMC_ADDR(x))) /*@}*/ /* @@ -207,7 +214,7 @@ #define BS_MCM_PLAMC_AMC (8U) /*!< Bit field size in bits for MCM_PLAMC_AMC. */ /*! @brief Read current value of the MCM_PLAMC_AMC field. */ -#define BR_MCM_PLAMC_AMC(x) (HW_MCM_PLAMC(x).B.AMC) +#define BR_MCM_PLAMC_AMC(x) (UNION_READ(hw_mcm_plamc_t, HW_MCM_PLAMC_ADDR(x), U, B.AMC)) /*@}*/ /******************************************************************************* @@ -244,8 +251,8 @@ #define HW_MCM_CR_ADDR(x) ((x) + 0xCU) #define HW_MCM_CR(x) (*(__IO hw_mcm_cr_t *) HW_MCM_CR_ADDR(x)) -#define HW_MCM_CR_RD(x) (HW_MCM_CR(x).U) -#define HW_MCM_CR_WR(x, v) (HW_MCM_CR(x).U = (v)) +#define HW_MCM_CR_RD(x) (ADDRESS_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x))) +#define HW_MCM_CR_WR(x, v) (ADDRESS_WRITE(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), v)) #define HW_MCM_CR_SET(x, v) (HW_MCM_CR_WR(x, HW_MCM_CR_RD(x) | (v))) #define HW_MCM_CR_CLR(x, v) (HW_MCM_CR_WR(x, HW_MCM_CR_RD(x) & ~(v))) #define HW_MCM_CR_TOG(x, v) (HW_MCM_CR_WR(x, HW_MCM_CR_RD(x) ^ (v))) @@ -273,7 +280,7 @@ #define BS_MCM_CR_SRAMUAP (2U) /*!< Bit field size in bits for MCM_CR_SRAMUAP. */ /*! @brief Read current value of the MCM_CR_SRAMUAP field. */ -#define BR_MCM_CR_SRAMUAP(x) (HW_MCM_CR(x).B.SRAMUAP) +#define BR_MCM_CR_SRAMUAP(x) (UNION_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), U, B.SRAMUAP)) /*! @brief Format value for bitfield MCM_CR_SRAMUAP. */ #define BF_MCM_CR_SRAMUAP(v) ((uint32_t)((uint32_t)(v) << BP_MCM_CR_SRAMUAP) & BM_MCM_CR_SRAMUAP) @@ -293,7 +300,7 @@ #define BS_MCM_CR_SRAMUWP (1U) /*!< Bit field size in bits for MCM_CR_SRAMUWP. */ /*! @brief Read current value of the MCM_CR_SRAMUWP field. */ -#define BR_MCM_CR_SRAMUWP(x) (HW_MCM_CR(x).B.SRAMUWP) +#define BR_MCM_CR_SRAMUWP(x) (UNION_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), U, B.SRAMUWP)) /*! @brief Format value for bitfield MCM_CR_SRAMUWP. */ #define BF_MCM_CR_SRAMUWP(v) ((uint32_t)((uint32_t)(v) << BP_MCM_CR_SRAMUWP) & BM_MCM_CR_SRAMUWP) @@ -320,7 +327,7 @@ #define BS_MCM_CR_SRAMLAP (2U) /*!< Bit field size in bits for MCM_CR_SRAMLAP. */ /*! @brief Read current value of the MCM_CR_SRAMLAP field. */ -#define BR_MCM_CR_SRAMLAP(x) (HW_MCM_CR(x).B.SRAMLAP) +#define BR_MCM_CR_SRAMLAP(x) (UNION_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), U, B.SRAMLAP)) /*! @brief Format value for bitfield MCM_CR_SRAMLAP. */ #define BF_MCM_CR_SRAMLAP(v) ((uint32_t)((uint32_t)(v) << BP_MCM_CR_SRAMLAP) & BM_MCM_CR_SRAMLAP) @@ -340,7 +347,7 @@ #define BS_MCM_CR_SRAMLWP (1U) /*!< Bit field size in bits for MCM_CR_SRAMLWP. */ /*! @brief Read current value of the MCM_CR_SRAMLWP field. */ -#define BR_MCM_CR_SRAMLWP(x) (HW_MCM_CR(x).B.SRAMLWP) +#define BR_MCM_CR_SRAMLWP(x) (UNION_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), U, B.SRAMLWP)) /*! @brief Format value for bitfield MCM_CR_SRAMLWP. */ #define BF_MCM_CR_SRAMLWP(v) ((uint32_t)((uint32_t)(v) << BP_MCM_CR_SRAMLWP) & BM_MCM_CR_SRAMLWP) @@ -394,8 +401,8 @@ #define HW_MCM_ISCR_ADDR(x) ((x) + 0x10U) #define HW_MCM_ISCR(x) (*(__IO hw_mcm_iscr_t *) HW_MCM_ISCR_ADDR(x)) -#define HW_MCM_ISCR_RD(x) (HW_MCM_ISCR(x).U) -#define HW_MCM_ISCR_WR(x, v) (HW_MCM_ISCR(x).U = (v)) +#define HW_MCM_ISCR_RD(x) (ADDRESS_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x))) +#define HW_MCM_ISCR_WR(x, v) (ADDRESS_WRITE(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), v)) #define HW_MCM_ISCR_SET(x, v) (HW_MCM_ISCR_WR(x, HW_MCM_ISCR_RD(x) | (v))) #define HW_MCM_ISCR_CLR(x, v) (HW_MCM_ISCR_WR(x, HW_MCM_ISCR_RD(x) & ~(v))) #define HW_MCM_ISCR_TOG(x, v) (HW_MCM_ISCR_WR(x, HW_MCM_ISCR_RD(x) ^ (v))) @@ -420,7 +427,7 @@ #define BS_MCM_ISCR_IRQ (1U) /*!< Bit field size in bits for MCM_ISCR_IRQ. */ /*! @brief Read current value of the MCM_ISCR_IRQ field. */ -#define BR_MCM_ISCR_IRQ(x) (HW_MCM_ISCR(x).B.IRQ) +#define BR_MCM_ISCR_IRQ(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.IRQ)) /*! @brief Format value for bitfield MCM_ISCR_IRQ. */ #define BF_MCM_ISCR_IRQ(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_IRQ) & BM_MCM_ISCR_IRQ) @@ -444,7 +451,7 @@ #define BS_MCM_ISCR_NMI (1U) /*!< Bit field size in bits for MCM_ISCR_NMI. */ /*! @brief Read current value of the MCM_ISCR_NMI field. */ -#define BR_MCM_ISCR_NMI(x) (HW_MCM_ISCR(x).B.NMI) +#define BR_MCM_ISCR_NMI(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.NMI)) /*! @brief Format value for bitfield MCM_ISCR_NMI. */ #define BF_MCM_ISCR_NMI(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_NMI) & BM_MCM_ISCR_NMI) @@ -470,7 +477,7 @@ #define BS_MCM_ISCR_DHREQ (1U) /*!< Bit field size in bits for MCM_ISCR_DHREQ. */ /*! @brief Read current value of the MCM_ISCR_DHREQ field. */ -#define BR_MCM_ISCR_DHREQ(x) (HW_MCM_ISCR(x).B.DHREQ) +#define BR_MCM_ISCR_DHREQ(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.DHREQ)) /*@}*/ /*! @@ -490,7 +497,7 @@ #define BS_MCM_ISCR_FIOC (1U) /*!< Bit field size in bits for MCM_ISCR_FIOC. */ /*! @brief Read current value of the MCM_ISCR_FIOC field. */ -#define BR_MCM_ISCR_FIOC(x) (HW_MCM_ISCR(x).B.FIOC) +#define BR_MCM_ISCR_FIOC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIOC)) /*@}*/ /*! @@ -510,7 +517,7 @@ #define BS_MCM_ISCR_FDZC (1U) /*!< Bit field size in bits for MCM_ISCR_FDZC. */ /*! @brief Read current value of the MCM_ISCR_FDZC field. */ -#define BR_MCM_ISCR_FDZC(x) (HW_MCM_ISCR(x).B.FDZC) +#define BR_MCM_ISCR_FDZC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FDZC)) /*@}*/ /*! @@ -530,7 +537,7 @@ #define BS_MCM_ISCR_FOFC (1U) /*!< Bit field size in bits for MCM_ISCR_FOFC. */ /*! @brief Read current value of the MCM_ISCR_FOFC field. */ -#define BR_MCM_ISCR_FOFC(x) (HW_MCM_ISCR(x).B.FOFC) +#define BR_MCM_ISCR_FOFC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FOFC)) /*@}*/ /*! @@ -550,7 +557,7 @@ #define BS_MCM_ISCR_FUFC (1U) /*!< Bit field size in bits for MCM_ISCR_FUFC. */ /*! @brief Read current value of the MCM_ISCR_FUFC field. */ -#define BR_MCM_ISCR_FUFC(x) (HW_MCM_ISCR(x).B.FUFC) +#define BR_MCM_ISCR_FUFC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FUFC)) /*@}*/ /*! @@ -570,7 +577,7 @@ #define BS_MCM_ISCR_FIXC (1U) /*!< Bit field size in bits for MCM_ISCR_FIXC. */ /*! @brief Read current value of the MCM_ISCR_FIXC field. */ -#define BR_MCM_ISCR_FIXC(x) (HW_MCM_ISCR(x).B.FIXC) +#define BR_MCM_ISCR_FIXC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIXC)) /*@}*/ /*! @@ -590,7 +597,7 @@ #define BS_MCM_ISCR_FIDC (1U) /*!< Bit field size in bits for MCM_ISCR_FIDC. */ /*! @brief Read current value of the MCM_ISCR_FIDC field. */ -#define BR_MCM_ISCR_FIDC(x) (HW_MCM_ISCR(x).B.FIDC) +#define BR_MCM_ISCR_FIDC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIDC)) /*@}*/ /*! @@ -606,7 +613,7 @@ #define BS_MCM_ISCR_FIOCE (1U) /*!< Bit field size in bits for MCM_ISCR_FIOCE. */ /*! @brief Read current value of the MCM_ISCR_FIOCE field. */ -#define BR_MCM_ISCR_FIOCE(x) (HW_MCM_ISCR(x).B.FIOCE) +#define BR_MCM_ISCR_FIOCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIOCE)) /*! @brief Format value for bitfield MCM_ISCR_FIOCE. */ #define BF_MCM_ISCR_FIOCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FIOCE) & BM_MCM_ISCR_FIOCE) @@ -628,7 +635,7 @@ #define BS_MCM_ISCR_FDZCE (1U) /*!< Bit field size in bits for MCM_ISCR_FDZCE. */ /*! @brief Read current value of the MCM_ISCR_FDZCE field. */ -#define BR_MCM_ISCR_FDZCE(x) (HW_MCM_ISCR(x).B.FDZCE) +#define BR_MCM_ISCR_FDZCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FDZCE)) /*! @brief Format value for bitfield MCM_ISCR_FDZCE. */ #define BF_MCM_ISCR_FDZCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FDZCE) & BM_MCM_ISCR_FDZCE) @@ -650,7 +657,7 @@ #define BS_MCM_ISCR_FOFCE (1U) /*!< Bit field size in bits for MCM_ISCR_FOFCE. */ /*! @brief Read current value of the MCM_ISCR_FOFCE field. */ -#define BR_MCM_ISCR_FOFCE(x) (HW_MCM_ISCR(x).B.FOFCE) +#define BR_MCM_ISCR_FOFCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FOFCE)) /*! @brief Format value for bitfield MCM_ISCR_FOFCE. */ #define BF_MCM_ISCR_FOFCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FOFCE) & BM_MCM_ISCR_FOFCE) @@ -672,7 +679,7 @@ #define BS_MCM_ISCR_FUFCE (1U) /*!< Bit field size in bits for MCM_ISCR_FUFCE. */ /*! @brief Read current value of the MCM_ISCR_FUFCE field. */ -#define BR_MCM_ISCR_FUFCE(x) (HW_MCM_ISCR(x).B.FUFCE) +#define BR_MCM_ISCR_FUFCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FUFCE)) /*! @brief Format value for bitfield MCM_ISCR_FUFCE. */ #define BF_MCM_ISCR_FUFCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FUFCE) & BM_MCM_ISCR_FUFCE) @@ -694,7 +701,7 @@ #define BS_MCM_ISCR_FIXCE (1U) /*!< Bit field size in bits for MCM_ISCR_FIXCE. */ /*! @brief Read current value of the MCM_ISCR_FIXCE field. */ -#define BR_MCM_ISCR_FIXCE(x) (HW_MCM_ISCR(x).B.FIXCE) +#define BR_MCM_ISCR_FIXCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIXCE)) /*! @brief Format value for bitfield MCM_ISCR_FIXCE. */ #define BF_MCM_ISCR_FIXCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FIXCE) & BM_MCM_ISCR_FIXCE) @@ -716,7 +723,7 @@ #define BS_MCM_ISCR_FIDCE (1U) /*!< Bit field size in bits for MCM_ISCR_FIDCE. */ /*! @brief Read current value of the MCM_ISCR_FIDCE field. */ -#define BR_MCM_ISCR_FIDCE(x) (HW_MCM_ISCR(x).B.FIDCE) +#define BR_MCM_ISCR_FIDCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIDCE)) /*! @brief Format value for bitfield MCM_ISCR_FIDCE. */ #define BF_MCM_ISCR_FIDCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FIDCE) & BM_MCM_ISCR_FIDCE) @@ -755,8 +762,8 @@ #define HW_MCM_ETBCC_ADDR(x) ((x) + 0x14U) #define HW_MCM_ETBCC(x) (*(__IO hw_mcm_etbcc_t *) HW_MCM_ETBCC_ADDR(x)) -#define HW_MCM_ETBCC_RD(x) (HW_MCM_ETBCC(x).U) -#define HW_MCM_ETBCC_WR(x, v) (HW_MCM_ETBCC(x).U = (v)) +#define HW_MCM_ETBCC_RD(x) (ADDRESS_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x))) +#define HW_MCM_ETBCC_WR(x, v) (ADDRESS_WRITE(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), v)) #define HW_MCM_ETBCC_SET(x, v) (HW_MCM_ETBCC_WR(x, HW_MCM_ETBCC_RD(x) | (v))) #define HW_MCM_ETBCC_CLR(x, v) (HW_MCM_ETBCC_WR(x, HW_MCM_ETBCC_RD(x) & ~(v))) #define HW_MCM_ETBCC_TOG(x, v) (HW_MCM_ETBCC_WR(x, HW_MCM_ETBCC_RD(x) ^ (v))) @@ -781,7 +788,7 @@ #define BS_MCM_ETBCC_CNTEN (1U) /*!< Bit field size in bits for MCM_ETBCC_CNTEN. */ /*! @brief Read current value of the MCM_ETBCC_CNTEN field. */ -#define BR_MCM_ETBCC_CNTEN(x) (HW_MCM_ETBCC(x).B.CNTEN) +#define BR_MCM_ETBCC_CNTEN(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.CNTEN)) /*! @brief Format value for bitfield MCM_ETBCC_CNTEN. */ #define BF_MCM_ETBCC_CNTEN(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_CNTEN) & BM_MCM_ETBCC_CNTEN) @@ -805,7 +812,7 @@ #define BS_MCM_ETBCC_RSPT (2U) /*!< Bit field size in bits for MCM_ETBCC_RSPT. */ /*! @brief Read current value of the MCM_ETBCC_RSPT field. */ -#define BR_MCM_ETBCC_RSPT(x) (HW_MCM_ETBCC(x).B.RSPT) +#define BR_MCM_ETBCC_RSPT(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.RSPT)) /*! @brief Format value for bitfield MCM_ETBCC_RSPT. */ #define BF_MCM_ETBCC_RSPT(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_RSPT) & BM_MCM_ETBCC_RSPT) @@ -833,7 +840,7 @@ #define BS_MCM_ETBCC_RLRQ (1U) /*!< Bit field size in bits for MCM_ETBCC_RLRQ. */ /*! @brief Read current value of the MCM_ETBCC_RLRQ field. */ -#define BR_MCM_ETBCC_RLRQ(x) (HW_MCM_ETBCC(x).B.RLRQ) +#define BR_MCM_ETBCC_RLRQ(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.RLRQ)) /*! @brief Format value for bitfield MCM_ETBCC_RLRQ. */ #define BF_MCM_ETBCC_RLRQ(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_RLRQ) & BM_MCM_ETBCC_RLRQ) @@ -857,7 +864,7 @@ #define BS_MCM_ETBCC_ETDIS (1U) /*!< Bit field size in bits for MCM_ETBCC_ETDIS. */ /*! @brief Read current value of the MCM_ETBCC_ETDIS field. */ -#define BR_MCM_ETBCC_ETDIS(x) (HW_MCM_ETBCC(x).B.ETDIS) +#define BR_MCM_ETBCC_ETDIS(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.ETDIS)) /*! @brief Format value for bitfield MCM_ETBCC_ETDIS. */ #define BF_MCM_ETBCC_ETDIS(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_ETDIS) & BM_MCM_ETBCC_ETDIS) @@ -881,7 +888,7 @@ #define BS_MCM_ETBCC_ITDIS (1U) /*!< Bit field size in bits for MCM_ETBCC_ITDIS. */ /*! @brief Read current value of the MCM_ETBCC_ITDIS field. */ -#define BR_MCM_ETBCC_ITDIS(x) (HW_MCM_ETBCC(x).B.ITDIS) +#define BR_MCM_ETBCC_ITDIS(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.ITDIS)) /*! @brief Format value for bitfield MCM_ETBCC_ITDIS. */ #define BF_MCM_ETBCC_ITDIS(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_ITDIS) & BM_MCM_ETBCC_ITDIS) @@ -916,8 +923,8 @@ #define HW_MCM_ETBRL_ADDR(x) ((x) + 0x18U) #define HW_MCM_ETBRL(x) (*(__IO hw_mcm_etbrl_t *) HW_MCM_ETBRL_ADDR(x)) -#define HW_MCM_ETBRL_RD(x) (HW_MCM_ETBRL(x).U) -#define HW_MCM_ETBRL_WR(x, v) (HW_MCM_ETBRL(x).U = (v)) +#define HW_MCM_ETBRL_RD(x) (ADDRESS_READ(hw_mcm_etbrl_t, HW_MCM_ETBRL_ADDR(x))) +#define HW_MCM_ETBRL_WR(x, v) (ADDRESS_WRITE(hw_mcm_etbrl_t, HW_MCM_ETBRL_ADDR(x), v)) #define HW_MCM_ETBRL_SET(x, v) (HW_MCM_ETBRL_WR(x, HW_MCM_ETBRL_RD(x) | (v))) #define HW_MCM_ETBRL_CLR(x, v) (HW_MCM_ETBRL_WR(x, HW_MCM_ETBRL_RD(x) & ~(v))) #define HW_MCM_ETBRL_TOG(x, v) (HW_MCM_ETBRL_WR(x, HW_MCM_ETBRL_RD(x) ^ (v))) @@ -939,7 +946,7 @@ #define BS_MCM_ETBRL_RELOAD (11U) /*!< Bit field size in bits for MCM_ETBRL_RELOAD. */ /*! @brief Read current value of the MCM_ETBRL_RELOAD field. */ -#define BR_MCM_ETBRL_RELOAD(x) (HW_MCM_ETBRL(x).B.RELOAD) +#define BR_MCM_ETBRL_RELOAD(x) (UNION_READ(hw_mcm_etbrl_t, HW_MCM_ETBRL_ADDR(x), U, B.RELOAD)) /*! @brief Format value for bitfield MCM_ETBRL_RELOAD. */ #define BF_MCM_ETBRL_RELOAD(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBRL_RELOAD) & BM_MCM_ETBRL_RELOAD) @@ -974,7 +981,7 @@ #define HW_MCM_ETBCNT_ADDR(x) ((x) + 0x1CU) #define HW_MCM_ETBCNT(x) (*(__I hw_mcm_etbcnt_t *) HW_MCM_ETBCNT_ADDR(x)) -#define HW_MCM_ETBCNT_RD(x) (HW_MCM_ETBCNT(x).U) +#define HW_MCM_ETBCNT_RD(x) (ADDRESS_READ(hw_mcm_etbcnt_t, HW_MCM_ETBCNT_ADDR(x))) /*@}*/ /* @@ -992,7 +999,7 @@ #define BS_MCM_ETBCNT_COUNTER (11U) /*!< Bit field size in bits for MCM_ETBCNT_COUNTER. */ /*! @brief Read current value of the MCM_ETBCNT_COUNTER field. */ -#define BR_MCM_ETBCNT_COUNTER(x) (HW_MCM_ETBCNT(x).B.COUNTER) +#define BR_MCM_ETBCNT_COUNTER(x) (UNION_READ(hw_mcm_etbcnt_t, HW_MCM_ETBCNT_ADDR(x), U, B.COUNTER)) /*@}*/ /******************************************************************************* @@ -1026,8 +1033,8 @@ #define HW_MCM_PID_ADDR(x) ((x) + 0x30U) #define HW_MCM_PID(x) (*(__IO hw_mcm_pid_t *) HW_MCM_PID_ADDR(x)) -#define HW_MCM_PID_RD(x) (HW_MCM_PID(x).U) -#define HW_MCM_PID_WR(x, v) (HW_MCM_PID(x).U = (v)) +#define HW_MCM_PID_RD(x) (ADDRESS_READ(hw_mcm_pid_t, HW_MCM_PID_ADDR(x))) +#define HW_MCM_PID_WR(x, v) (ADDRESS_WRITE(hw_mcm_pid_t, HW_MCM_PID_ADDR(x), v)) #define HW_MCM_PID_SET(x, v) (HW_MCM_PID_WR(x, HW_MCM_PID_RD(x) | (v))) #define HW_MCM_PID_CLR(x, v) (HW_MCM_PID_WR(x, HW_MCM_PID_RD(x) & ~(v))) #define HW_MCM_PID_TOG(x, v) (HW_MCM_PID_WR(x, HW_MCM_PID_RD(x) ^ (v))) @@ -1048,7 +1055,7 @@ #define BS_MCM_PID_PID (8U) /*!< Bit field size in bits for MCM_PID_PID. */ /*! @brief Read current value of the MCM_PID_PID field. */ -#define BR_MCM_PID_PID(x) (HW_MCM_PID(x).B.PID) +#define BR_MCM_PID_PID(x) (UNION_READ(hw_mcm_pid_t, HW_MCM_PID_ADDR(x), U, B.PID)) /*! @brief Format value for bitfield MCM_PID_PID. */ #define BF_MCM_PID_PID(v) ((uint32_t)((uint32_t)(v) << BP_MCM_PID_PID) & BM_MCM_PID_PID)
--- a/hal/device/device/MK64F12/MK64F12_mpu.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_mpu.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -134,8 +141,8 @@ #define HW_MPU_CESR_ADDR(x) ((x) + 0x0U) #define HW_MPU_CESR(x) (*(__IO hw_mpu_cesr_t *) HW_MPU_CESR_ADDR(x)) -#define HW_MPU_CESR_RD(x) (HW_MPU_CESR(x).U) -#define HW_MPU_CESR_WR(x, v) (HW_MPU_CESR(x).U = (v)) +#define HW_MPU_CESR_RD(x) (ADDRESS_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x))) +#define HW_MPU_CESR_WR(x, v) (ADDRESS_WRITE(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), v)) #define HW_MPU_CESR_SET(x, v) (HW_MPU_CESR_WR(x, HW_MPU_CESR_RD(x) | (v))) #define HW_MPU_CESR_CLR(x, v) (HW_MPU_CESR_WR(x, HW_MPU_CESR_RD(x) & ~(v))) #define HW_MPU_CESR_TOG(x, v) (HW_MPU_CESR_WR(x, HW_MPU_CESR_RD(x) ^ (v))) @@ -160,13 +167,13 @@ #define BS_MPU_CESR_VLD (1U) /*!< Bit field size in bits for MPU_CESR_VLD. */ /*! @brief Read current value of the MPU_CESR_VLD field. */ -#define BR_MPU_CESR_VLD(x) (BITBAND_ACCESS32(HW_MPU_CESR_ADDR(x), BP_MPU_CESR_VLD)) +#define BR_MPU_CESR_VLD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_CESR_ADDR(x), BP_MPU_CESR_VLD))) /*! @brief Format value for bitfield MPU_CESR_VLD. */ #define BF_MPU_CESR_VLD(v) ((uint32_t)((uint32_t)(v) << BP_MPU_CESR_VLD) & BM_MPU_CESR_VLD) /*! @brief Set the VLD field to a new value. */ -#define BW_MPU_CESR_VLD(x, v) (BITBAND_ACCESS32(HW_MPU_CESR_ADDR(x), BP_MPU_CESR_VLD) = (v)) +#define BW_MPU_CESR_VLD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_CESR_ADDR(x), BP_MPU_CESR_VLD), v)) /*@}*/ /*! @@ -185,7 +192,7 @@ #define BS_MPU_CESR_NRGD (4U) /*!< Bit field size in bits for MPU_CESR_NRGD. */ /*! @brief Read current value of the MPU_CESR_NRGD field. */ -#define BR_MPU_CESR_NRGD(x) (HW_MPU_CESR(x).B.NRGD) +#define BR_MPU_CESR_NRGD(x) (UNION_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), U, B.NRGD)) /*@}*/ /*! @@ -199,7 +206,7 @@ #define BS_MPU_CESR_NSP (4U) /*!< Bit field size in bits for MPU_CESR_NSP. */ /*! @brief Read current value of the MPU_CESR_NSP field. */ -#define BR_MPU_CESR_NSP(x) (HW_MPU_CESR(x).B.NSP) +#define BR_MPU_CESR_NSP(x) (UNION_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), U, B.NSP)) /*@}*/ /*! @@ -214,7 +221,7 @@ #define BS_MPU_CESR_HRL (4U) /*!< Bit field size in bits for MPU_CESR_HRL. */ /*! @brief Read current value of the MPU_CESR_HRL field. */ -#define BR_MPU_CESR_HRL(x) (HW_MPU_CESR(x).B.HRL) +#define BR_MPU_CESR_HRL(x) (UNION_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), U, B.HRL)) /*@}*/ /*! @@ -239,7 +246,7 @@ #define BS_MPU_CESR_SPERR (5U) /*!< Bit field size in bits for MPU_CESR_SPERR. */ /*! @brief Read current value of the MPU_CESR_SPERR field. */ -#define BR_MPU_CESR_SPERR(x) (HW_MPU_CESR(x).B.SPERR) +#define BR_MPU_CESR_SPERR(x) (UNION_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), U, B.SPERR)) /*! @brief Format value for bitfield MPU_CESR_SPERR. */ #define BF_MPU_CESR_SPERR(v) ((uint32_t)((uint32_t)(v) << BP_MPU_CESR_SPERR) & BM_MPU_CESR_SPERR) @@ -283,7 +290,7 @@ #define HW_MPU_EARn_ADDR(x, n) ((x) + 0x10U + (0x8U * (n))) #define HW_MPU_EARn(x, n) (*(__I hw_mpu_earn_t *) HW_MPU_EARn_ADDR(x, n)) -#define HW_MPU_EARn_RD(x, n) (HW_MPU_EARn(x, n).U) +#define HW_MPU_EARn_RD(x, n) (ADDRESS_READ(hw_mpu_earn_t, HW_MPU_EARn_ADDR(x, n))) /*@}*/ /* @@ -343,7 +350,7 @@ #define HW_MPU_EDRn_ADDR(x, n) ((x) + 0x14U + (0x8U * (n))) #define HW_MPU_EDRn(x, n) (*(__I hw_mpu_edrn_t *) HW_MPU_EDRn_ADDR(x, n)) -#define HW_MPU_EDRn_RD(x, n) (HW_MPU_EDRn(x, n).U) +#define HW_MPU_EDRn_RD(x, n) (ADDRESS_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n))) /*@}*/ /* @@ -365,7 +372,7 @@ #define BS_MPU_EDRn_ERW (1U) /*!< Bit field size in bits for MPU_EDRn_ERW. */ /*! @brief Read current value of the MPU_EDRn_ERW field. */ -#define BR_MPU_EDRn_ERW(x, n) (BITBAND_ACCESS32(HW_MPU_EDRn_ADDR(x, n), BP_MPU_EDRn_ERW)) +#define BR_MPU_EDRn_ERW(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_EDRn_ADDR(x, n), BP_MPU_EDRn_ERW))) /*@}*/ /*! @@ -386,7 +393,7 @@ #define BS_MPU_EDRn_EATTR (3U) /*!< Bit field size in bits for MPU_EDRn_EATTR. */ /*! @brief Read current value of the MPU_EDRn_EATTR field. */ -#define BR_MPU_EDRn_EATTR(x, n) (HW_MPU_EDRn(x, n).B.EATTR) +#define BR_MPU_EDRn_EATTR(x, n) (UNION_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n), U, B.EATTR)) /*@}*/ /*! @@ -400,7 +407,7 @@ #define BS_MPU_EDRn_EMN (4U) /*!< Bit field size in bits for MPU_EDRn_EMN. */ /*! @brief Read current value of the MPU_EDRn_EMN field. */ -#define BR_MPU_EDRn_EMN(x, n) (HW_MPU_EDRn(x, n).B.EMN) +#define BR_MPU_EDRn_EMN(x, n) (UNION_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n), U, B.EMN)) /*@}*/ /*! @@ -416,7 +423,7 @@ #define BS_MPU_EDRn_EPID (8U) /*!< Bit field size in bits for MPU_EDRn_EPID. */ /*! @brief Read current value of the MPU_EDRn_EPID field. */ -#define BR_MPU_EDRn_EPID(x, n) (HW_MPU_EDRn(x, n).B.EPID) +#define BR_MPU_EDRn_EPID(x, n) (UNION_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n), U, B.EPID)) /*@}*/ /*! @@ -434,7 +441,7 @@ #define BS_MPU_EDRn_EACD (16U) /*!< Bit field size in bits for MPU_EDRn_EACD. */ /*! @brief Read current value of the MPU_EDRn_EACD field. */ -#define BR_MPU_EDRn_EACD(x, n) (HW_MPU_EDRn(x, n).B.EACD) +#define BR_MPU_EDRn_EACD(x, n) (UNION_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n), U, B.EACD)) /*@}*/ /******************************************************************************* @@ -469,8 +476,8 @@ #define HW_MPU_RGDn_WORD0_ADDR(x, n) ((x) + 0x400U + (0x10U * (n))) #define HW_MPU_RGDn_WORD0(x, n) (*(__IO hw_mpu_rgdn_word0_t *) HW_MPU_RGDn_WORD0_ADDR(x, n)) -#define HW_MPU_RGDn_WORD0_RD(x, n) (HW_MPU_RGDn_WORD0(x, n).U) -#define HW_MPU_RGDn_WORD0_WR(x, n, v) (HW_MPU_RGDn_WORD0(x, n).U = (v)) +#define HW_MPU_RGDn_WORD0_RD(x, n) (ADDRESS_READ(hw_mpu_rgdn_word0_t, HW_MPU_RGDn_WORD0_ADDR(x, n))) +#define HW_MPU_RGDn_WORD0_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdn_word0_t, HW_MPU_RGDn_WORD0_ADDR(x, n), v)) #define HW_MPU_RGDn_WORD0_SET(x, n, v) (HW_MPU_RGDn_WORD0_WR(x, n, HW_MPU_RGDn_WORD0_RD(x, n) | (v))) #define HW_MPU_RGDn_WORD0_CLR(x, n, v) (HW_MPU_RGDn_WORD0_WR(x, n, HW_MPU_RGDn_WORD0_RD(x, n) & ~(v))) #define HW_MPU_RGDn_WORD0_TOG(x, n, v) (HW_MPU_RGDn_WORD0_WR(x, n, HW_MPU_RGDn_WORD0_RD(x, n) ^ (v))) @@ -492,7 +499,7 @@ #define BS_MPU_RGDn_WORD0_SRTADDR (27U) /*!< Bit field size in bits for MPU_RGDn_WORD0_SRTADDR. */ /*! @brief Read current value of the MPU_RGDn_WORD0_SRTADDR field. */ -#define BR_MPU_RGDn_WORD0_SRTADDR(x, n) (HW_MPU_RGDn_WORD0(x, n).B.SRTADDR) +#define BR_MPU_RGDn_WORD0_SRTADDR(x, n) (UNION_READ(hw_mpu_rgdn_word0_t, HW_MPU_RGDn_WORD0_ADDR(x, n), U, B.SRTADDR)) /*! @brief Format value for bitfield MPU_RGDn_WORD0_SRTADDR. */ #define BF_MPU_RGDn_WORD0_SRTADDR(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD0_SRTADDR) & BM_MPU_RGDn_WORD0_SRTADDR) @@ -532,8 +539,8 @@ #define HW_MPU_RGDn_WORD1_ADDR(x, n) ((x) + 0x404U + (0x10U * (n))) #define HW_MPU_RGDn_WORD1(x, n) (*(__IO hw_mpu_rgdn_word1_t *) HW_MPU_RGDn_WORD1_ADDR(x, n)) -#define HW_MPU_RGDn_WORD1_RD(x, n) (HW_MPU_RGDn_WORD1(x, n).U) -#define HW_MPU_RGDn_WORD1_WR(x, n, v) (HW_MPU_RGDn_WORD1(x, n).U = (v)) +#define HW_MPU_RGDn_WORD1_RD(x, n) (ADDRESS_READ(hw_mpu_rgdn_word1_t, HW_MPU_RGDn_WORD1_ADDR(x, n))) +#define HW_MPU_RGDn_WORD1_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdn_word1_t, HW_MPU_RGDn_WORD1_ADDR(x, n), v)) #define HW_MPU_RGDn_WORD1_SET(x, n, v) (HW_MPU_RGDn_WORD1_WR(x, n, HW_MPU_RGDn_WORD1_RD(x, n) | (v))) #define HW_MPU_RGDn_WORD1_CLR(x, n, v) (HW_MPU_RGDn_WORD1_WR(x, n, HW_MPU_RGDn_WORD1_RD(x, n) & ~(v))) #define HW_MPU_RGDn_WORD1_TOG(x, n, v) (HW_MPU_RGDn_WORD1_WR(x, n, HW_MPU_RGDn_WORD1_RD(x, n) ^ (v))) @@ -555,7 +562,7 @@ #define BS_MPU_RGDn_WORD1_ENDADDR (27U) /*!< Bit field size in bits for MPU_RGDn_WORD1_ENDADDR. */ /*! @brief Read current value of the MPU_RGDn_WORD1_ENDADDR field. */ -#define BR_MPU_RGDn_WORD1_ENDADDR(x, n) (HW_MPU_RGDn_WORD1(x, n).B.ENDADDR) +#define BR_MPU_RGDn_WORD1_ENDADDR(x, n) (UNION_READ(hw_mpu_rgdn_word1_t, HW_MPU_RGDn_WORD1_ADDR(x, n), U, B.ENDADDR)) /*! @brief Format value for bitfield MPU_RGDn_WORD1_ENDADDR. */ #define BF_MPU_RGDn_WORD1_ENDADDR(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD1_ENDADDR) & BM_MPU_RGDn_WORD1_ENDADDR) @@ -630,8 +637,8 @@ #define HW_MPU_RGDn_WORD2_ADDR(x, n) ((x) + 0x408U + (0x10U * (n))) #define HW_MPU_RGDn_WORD2(x, n) (*(__IO hw_mpu_rgdn_word2_t *) HW_MPU_RGDn_WORD2_ADDR(x, n)) -#define HW_MPU_RGDn_WORD2_RD(x, n) (HW_MPU_RGDn_WORD2(x, n).U) -#define HW_MPU_RGDn_WORD2_WR(x, n, v) (HW_MPU_RGDn_WORD2(x, n).U = (v)) +#define HW_MPU_RGDn_WORD2_RD(x, n) (ADDRESS_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n))) +#define HW_MPU_RGDn_WORD2_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), v)) #define HW_MPU_RGDn_WORD2_SET(x, n, v) (HW_MPU_RGDn_WORD2_WR(x, n, HW_MPU_RGDn_WORD2_RD(x, n) | (v))) #define HW_MPU_RGDn_WORD2_CLR(x, n, v) (HW_MPU_RGDn_WORD2_WR(x, n, HW_MPU_RGDn_WORD2_RD(x, n) & ~(v))) #define HW_MPU_RGDn_WORD2_TOG(x, n, v) (HW_MPU_RGDn_WORD2_WR(x, n, HW_MPU_RGDn_WORD2_RD(x, n) ^ (v))) @@ -652,7 +659,7 @@ #define BS_MPU_RGDn_WORD2_M0UM (3U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M0UM. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M0UM field. */ -#define BR_MPU_RGDn_WORD2_M0UM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M0UM) +#define BR_MPU_RGDn_WORD2_M0UM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M0UM)) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M0UM. */ #define BF_MPU_RGDn_WORD2_M0UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M0UM) & BM_MPU_RGDn_WORD2_M0UM) @@ -672,7 +679,7 @@ #define BS_MPU_RGDn_WORD2_M0SM (2U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M0SM. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M0SM field. */ -#define BR_MPU_RGDn_WORD2_M0SM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M0SM) +#define BR_MPU_RGDn_WORD2_M0SM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M0SM)) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M0SM. */ #define BF_MPU_RGDn_WORD2_M0SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M0SM) & BM_MPU_RGDn_WORD2_M0SM) @@ -692,13 +699,13 @@ #define BS_MPU_RGDn_WORD2_M0PE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M0PE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M0PE field. */ -#define BR_MPU_RGDn_WORD2_M0PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M0PE)) +#define BR_MPU_RGDn_WORD2_M0PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M0PE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M0PE. */ #define BF_MPU_RGDn_WORD2_M0PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M0PE) & BM_MPU_RGDn_WORD2_M0PE) /*! @brief Set the M0PE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M0PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M0PE) = (v)) +#define BW_MPU_RGDn_WORD2_M0PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M0PE), v)) /*@}*/ /*! @@ -712,7 +719,7 @@ #define BS_MPU_RGDn_WORD2_M1UM (3U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M1UM. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M1UM field. */ -#define BR_MPU_RGDn_WORD2_M1UM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M1UM) +#define BR_MPU_RGDn_WORD2_M1UM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M1UM)) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M1UM. */ #define BF_MPU_RGDn_WORD2_M1UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M1UM) & BM_MPU_RGDn_WORD2_M1UM) @@ -732,7 +739,7 @@ #define BS_MPU_RGDn_WORD2_M1SM (2U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M1SM. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M1SM field. */ -#define BR_MPU_RGDn_WORD2_M1SM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M1SM) +#define BR_MPU_RGDn_WORD2_M1SM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M1SM)) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M1SM. */ #define BF_MPU_RGDn_WORD2_M1SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M1SM) & BM_MPU_RGDn_WORD2_M1SM) @@ -752,13 +759,13 @@ #define BS_MPU_RGDn_WORD2_M1PE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M1PE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M1PE field. */ -#define BR_MPU_RGDn_WORD2_M1PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M1PE)) +#define BR_MPU_RGDn_WORD2_M1PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M1PE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M1PE. */ #define BF_MPU_RGDn_WORD2_M1PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M1PE) & BM_MPU_RGDn_WORD2_M1PE) /*! @brief Set the M1PE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M1PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M1PE) = (v)) +#define BW_MPU_RGDn_WORD2_M1PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M1PE), v)) /*@}*/ /*! @@ -772,7 +779,7 @@ #define BS_MPU_RGDn_WORD2_M2UM (3U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M2UM. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M2UM field. */ -#define BR_MPU_RGDn_WORD2_M2UM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M2UM) +#define BR_MPU_RGDn_WORD2_M2UM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M2UM)) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M2UM. */ #define BF_MPU_RGDn_WORD2_M2UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M2UM) & BM_MPU_RGDn_WORD2_M2UM) @@ -792,7 +799,7 @@ #define BS_MPU_RGDn_WORD2_M2SM (2U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M2SM. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M2SM field. */ -#define BR_MPU_RGDn_WORD2_M2SM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M2SM) +#define BR_MPU_RGDn_WORD2_M2SM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M2SM)) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M2SM. */ #define BF_MPU_RGDn_WORD2_M2SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M2SM) & BM_MPU_RGDn_WORD2_M2SM) @@ -812,13 +819,13 @@ #define BS_MPU_RGDn_WORD2_M2PE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M2PE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M2PE field. */ -#define BR_MPU_RGDn_WORD2_M2PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M2PE)) +#define BR_MPU_RGDn_WORD2_M2PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M2PE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M2PE. */ #define BF_MPU_RGDn_WORD2_M2PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M2PE) & BM_MPU_RGDn_WORD2_M2PE) /*! @brief Set the M2PE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M2PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M2PE) = (v)) +#define BW_MPU_RGDn_WORD2_M2PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M2PE), v)) /*@}*/ /*! @@ -839,7 +846,7 @@ #define BS_MPU_RGDn_WORD2_M3UM (3U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M3UM. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M3UM field. */ -#define BR_MPU_RGDn_WORD2_M3UM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M3UM) +#define BR_MPU_RGDn_WORD2_M3UM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M3UM)) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M3UM. */ #define BF_MPU_RGDn_WORD2_M3UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M3UM) & BM_MPU_RGDn_WORD2_M3UM) @@ -865,7 +872,7 @@ #define BS_MPU_RGDn_WORD2_M3SM (2U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M3SM. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M3SM field. */ -#define BR_MPU_RGDn_WORD2_M3SM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M3SM) +#define BR_MPU_RGDn_WORD2_M3SM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M3SM)) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M3SM. */ #define BF_MPU_RGDn_WORD2_M3SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M3SM) & BM_MPU_RGDn_WORD2_M3SM) @@ -888,13 +895,13 @@ #define BS_MPU_RGDn_WORD2_M3PE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M3PE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M3PE field. */ -#define BR_MPU_RGDn_WORD2_M3PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M3PE)) +#define BR_MPU_RGDn_WORD2_M3PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M3PE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M3PE. */ #define BF_MPU_RGDn_WORD2_M3PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M3PE) & BM_MPU_RGDn_WORD2_M3PE) /*! @brief Set the M3PE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M3PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M3PE) = (v)) +#define BW_MPU_RGDn_WORD2_M3PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M3PE), v)) /*@}*/ /*! @@ -911,13 +918,13 @@ #define BS_MPU_RGDn_WORD2_M4WE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M4WE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M4WE field. */ -#define BR_MPU_RGDn_WORD2_M4WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4WE)) +#define BR_MPU_RGDn_WORD2_M4WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4WE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M4WE. */ #define BF_MPU_RGDn_WORD2_M4WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M4WE) & BM_MPU_RGDn_WORD2_M4WE) /*! @brief Set the M4WE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M4WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4WE) = (v)) +#define BW_MPU_RGDn_WORD2_M4WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4WE), v)) /*@}*/ /*! @@ -934,13 +941,13 @@ #define BS_MPU_RGDn_WORD2_M4RE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M4RE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M4RE field. */ -#define BR_MPU_RGDn_WORD2_M4RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4RE)) +#define BR_MPU_RGDn_WORD2_M4RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4RE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M4RE. */ #define BF_MPU_RGDn_WORD2_M4RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M4RE) & BM_MPU_RGDn_WORD2_M4RE) /*! @brief Set the M4RE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M4RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4RE) = (v)) +#define BW_MPU_RGDn_WORD2_M4RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4RE), v)) /*@}*/ /*! @@ -957,13 +964,13 @@ #define BS_MPU_RGDn_WORD2_M5WE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M5WE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M5WE field. */ -#define BR_MPU_RGDn_WORD2_M5WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5WE)) +#define BR_MPU_RGDn_WORD2_M5WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5WE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M5WE. */ #define BF_MPU_RGDn_WORD2_M5WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M5WE) & BM_MPU_RGDn_WORD2_M5WE) /*! @brief Set the M5WE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M5WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5WE) = (v)) +#define BW_MPU_RGDn_WORD2_M5WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5WE), v)) /*@}*/ /*! @@ -980,13 +987,13 @@ #define BS_MPU_RGDn_WORD2_M5RE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M5RE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M5RE field. */ -#define BR_MPU_RGDn_WORD2_M5RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5RE)) +#define BR_MPU_RGDn_WORD2_M5RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5RE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M5RE. */ #define BF_MPU_RGDn_WORD2_M5RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M5RE) & BM_MPU_RGDn_WORD2_M5RE) /*! @brief Set the M5RE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M5RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5RE) = (v)) +#define BW_MPU_RGDn_WORD2_M5RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5RE), v)) /*@}*/ /*! @@ -1003,13 +1010,13 @@ #define BS_MPU_RGDn_WORD2_M6WE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M6WE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M6WE field. */ -#define BR_MPU_RGDn_WORD2_M6WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6WE)) +#define BR_MPU_RGDn_WORD2_M6WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6WE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M6WE. */ #define BF_MPU_RGDn_WORD2_M6WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M6WE) & BM_MPU_RGDn_WORD2_M6WE) /*! @brief Set the M6WE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M6WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6WE) = (v)) +#define BW_MPU_RGDn_WORD2_M6WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6WE), v)) /*@}*/ /*! @@ -1026,13 +1033,13 @@ #define BS_MPU_RGDn_WORD2_M6RE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M6RE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M6RE field. */ -#define BR_MPU_RGDn_WORD2_M6RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6RE)) +#define BR_MPU_RGDn_WORD2_M6RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6RE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M6RE. */ #define BF_MPU_RGDn_WORD2_M6RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M6RE) & BM_MPU_RGDn_WORD2_M6RE) /*! @brief Set the M6RE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M6RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6RE) = (v)) +#define BW_MPU_RGDn_WORD2_M6RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6RE), v)) /*@}*/ /*! @@ -1049,13 +1056,13 @@ #define BS_MPU_RGDn_WORD2_M7WE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M7WE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M7WE field. */ -#define BR_MPU_RGDn_WORD2_M7WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7WE)) +#define BR_MPU_RGDn_WORD2_M7WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7WE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M7WE. */ #define BF_MPU_RGDn_WORD2_M7WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M7WE) & BM_MPU_RGDn_WORD2_M7WE) /*! @brief Set the M7WE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M7WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7WE) = (v)) +#define BW_MPU_RGDn_WORD2_M7WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7WE), v)) /*@}*/ /*! @@ -1072,13 +1079,13 @@ #define BS_MPU_RGDn_WORD2_M7RE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M7RE. */ /*! @brief Read current value of the MPU_RGDn_WORD2_M7RE field. */ -#define BR_MPU_RGDn_WORD2_M7RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7RE)) +#define BR_MPU_RGDn_WORD2_M7RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7RE))) /*! @brief Format value for bitfield MPU_RGDn_WORD2_M7RE. */ #define BF_MPU_RGDn_WORD2_M7RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M7RE) & BM_MPU_RGDn_WORD2_M7RE) /*! @brief Set the M7RE field to a new value. */ -#define BW_MPU_RGDn_WORD2_M7RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7RE) = (v)) +#define BW_MPU_RGDn_WORD2_M7RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7RE), v)) /*@}*/ /******************************************************************************* * HW_MPU_RGDn_WORD3 - Region Descriptor n, Word 3 @@ -1113,8 +1120,8 @@ #define HW_MPU_RGDn_WORD3_ADDR(x, n) ((x) + 0x40CU + (0x10U * (n))) #define HW_MPU_RGDn_WORD3(x, n) (*(__IO hw_mpu_rgdn_word3_t *) HW_MPU_RGDn_WORD3_ADDR(x, n)) -#define HW_MPU_RGDn_WORD3_RD(x, n) (HW_MPU_RGDn_WORD3(x, n).U) -#define HW_MPU_RGDn_WORD3_WR(x, n, v) (HW_MPU_RGDn_WORD3(x, n).U = (v)) +#define HW_MPU_RGDn_WORD3_RD(x, n) (ADDRESS_READ(hw_mpu_rgdn_word3_t, HW_MPU_RGDn_WORD3_ADDR(x, n))) +#define HW_MPU_RGDn_WORD3_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdn_word3_t, HW_MPU_RGDn_WORD3_ADDR(x, n), v)) #define HW_MPU_RGDn_WORD3_SET(x, n, v) (HW_MPU_RGDn_WORD3_WR(x, n, HW_MPU_RGDn_WORD3_RD(x, n) | (v))) #define HW_MPU_RGDn_WORD3_CLR(x, n, v) (HW_MPU_RGDn_WORD3_WR(x, n, HW_MPU_RGDn_WORD3_RD(x, n) & ~(v))) #define HW_MPU_RGDn_WORD3_TOG(x, n, v) (HW_MPU_RGDn_WORD3_WR(x, n, HW_MPU_RGDn_WORD3_RD(x, n) ^ (v))) @@ -1140,13 +1147,13 @@ #define BS_MPU_RGDn_WORD3_VLD (1U) /*!< Bit field size in bits for MPU_RGDn_WORD3_VLD. */ /*! @brief Read current value of the MPU_RGDn_WORD3_VLD field. */ -#define BR_MPU_RGDn_WORD3_VLD(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD3_ADDR(x, n), BP_MPU_RGDn_WORD3_VLD)) +#define BR_MPU_RGDn_WORD3_VLD(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD3_ADDR(x, n), BP_MPU_RGDn_WORD3_VLD))) /*! @brief Format value for bitfield MPU_RGDn_WORD3_VLD. */ #define BF_MPU_RGDn_WORD3_VLD(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD3_VLD) & BM_MPU_RGDn_WORD3_VLD) /*! @brief Set the VLD field to a new value. */ -#define BW_MPU_RGDn_WORD3_VLD(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD3_ADDR(x, n), BP_MPU_RGDn_WORD3_VLD) = (v)) +#define BW_MPU_RGDn_WORD3_VLD(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD3_ADDR(x, n), BP_MPU_RGDn_WORD3_VLD), v)) /*@}*/ /*! @@ -1165,7 +1172,7 @@ #define BS_MPU_RGDn_WORD3_PIDMASK (8U) /*!< Bit field size in bits for MPU_RGDn_WORD3_PIDMASK. */ /*! @brief Read current value of the MPU_RGDn_WORD3_PIDMASK field. */ -#define BR_MPU_RGDn_WORD3_PIDMASK(x, n) (HW_MPU_RGDn_WORD3(x, n).B.PIDMASK) +#define BR_MPU_RGDn_WORD3_PIDMASK(x, n) (UNION_READ(hw_mpu_rgdn_word3_t, HW_MPU_RGDn_WORD3_ADDR(x, n), U, B.PIDMASK)) /*! @brief Format value for bitfield MPU_RGDn_WORD3_PIDMASK. */ #define BF_MPU_RGDn_WORD3_PIDMASK(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD3_PIDMASK) & BM_MPU_RGDn_WORD3_PIDMASK) @@ -1187,7 +1194,7 @@ #define BS_MPU_RGDn_WORD3_PID (8U) /*!< Bit field size in bits for MPU_RGDn_WORD3_PID. */ /*! @brief Read current value of the MPU_RGDn_WORD3_PID field. */ -#define BR_MPU_RGDn_WORD3_PID(x, n) (HW_MPU_RGDn_WORD3(x, n).B.PID) +#define BR_MPU_RGDn_WORD3_PID(x, n) (UNION_READ(hw_mpu_rgdn_word3_t, HW_MPU_RGDn_WORD3_ADDR(x, n), U, B.PID)) /*! @brief Format value for bitfield MPU_RGDn_WORD3_PID. */ #define BF_MPU_RGDn_WORD3_PID(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD3_PID) & BM_MPU_RGDn_WORD3_PID) @@ -1253,8 +1260,8 @@ #define HW_MPU_RGDAACn_ADDR(x, n) ((x) + 0x800U + (0x4U * (n))) #define HW_MPU_RGDAACn(x, n) (*(__IO hw_mpu_rgdaacn_t *) HW_MPU_RGDAACn_ADDR(x, n)) -#define HW_MPU_RGDAACn_RD(x, n) (HW_MPU_RGDAACn(x, n).U) -#define HW_MPU_RGDAACn_WR(x, n, v) (HW_MPU_RGDAACn(x, n).U = (v)) +#define HW_MPU_RGDAACn_RD(x, n) (ADDRESS_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n))) +#define HW_MPU_RGDAACn_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), v)) #define HW_MPU_RGDAACn_SET(x, n, v) (HW_MPU_RGDAACn_WR(x, n, HW_MPU_RGDAACn_RD(x, n) | (v))) #define HW_MPU_RGDAACn_CLR(x, n, v) (HW_MPU_RGDAACn_WR(x, n, HW_MPU_RGDAACn_RD(x, n) & ~(v))) #define HW_MPU_RGDAACn_TOG(x, n, v) (HW_MPU_RGDAACn_WR(x, n, HW_MPU_RGDAACn_RD(x, n) ^ (v))) @@ -1275,7 +1282,7 @@ #define BS_MPU_RGDAACn_M0UM (3U) /*!< Bit field size in bits for MPU_RGDAACn_M0UM. */ /*! @brief Read current value of the MPU_RGDAACn_M0UM field. */ -#define BR_MPU_RGDAACn_M0UM(x, n) (HW_MPU_RGDAACn(x, n).B.M0UM) +#define BR_MPU_RGDAACn_M0UM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M0UM)) /*! @brief Format value for bitfield MPU_RGDAACn_M0UM. */ #define BF_MPU_RGDAACn_M0UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M0UM) & BM_MPU_RGDAACn_M0UM) @@ -1295,7 +1302,7 @@ #define BS_MPU_RGDAACn_M0SM (2U) /*!< Bit field size in bits for MPU_RGDAACn_M0SM. */ /*! @brief Read current value of the MPU_RGDAACn_M0SM field. */ -#define BR_MPU_RGDAACn_M0SM(x, n) (HW_MPU_RGDAACn(x, n).B.M0SM) +#define BR_MPU_RGDAACn_M0SM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M0SM)) /*! @brief Format value for bitfield MPU_RGDAACn_M0SM. */ #define BF_MPU_RGDAACn_M0SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M0SM) & BM_MPU_RGDAACn_M0SM) @@ -1315,13 +1322,13 @@ #define BS_MPU_RGDAACn_M0PE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M0PE. */ /*! @brief Read current value of the MPU_RGDAACn_M0PE field. */ -#define BR_MPU_RGDAACn_M0PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M0PE)) +#define BR_MPU_RGDAACn_M0PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M0PE))) /*! @brief Format value for bitfield MPU_RGDAACn_M0PE. */ #define BF_MPU_RGDAACn_M0PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M0PE) & BM_MPU_RGDAACn_M0PE) /*! @brief Set the M0PE field to a new value. */ -#define BW_MPU_RGDAACn_M0PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M0PE) = (v)) +#define BW_MPU_RGDAACn_M0PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M0PE), v)) /*@}*/ /*! @@ -1335,7 +1342,7 @@ #define BS_MPU_RGDAACn_M1UM (3U) /*!< Bit field size in bits for MPU_RGDAACn_M1UM. */ /*! @brief Read current value of the MPU_RGDAACn_M1UM field. */ -#define BR_MPU_RGDAACn_M1UM(x, n) (HW_MPU_RGDAACn(x, n).B.M1UM) +#define BR_MPU_RGDAACn_M1UM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M1UM)) /*! @brief Format value for bitfield MPU_RGDAACn_M1UM. */ #define BF_MPU_RGDAACn_M1UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M1UM) & BM_MPU_RGDAACn_M1UM) @@ -1355,7 +1362,7 @@ #define BS_MPU_RGDAACn_M1SM (2U) /*!< Bit field size in bits for MPU_RGDAACn_M1SM. */ /*! @brief Read current value of the MPU_RGDAACn_M1SM field. */ -#define BR_MPU_RGDAACn_M1SM(x, n) (HW_MPU_RGDAACn(x, n).B.M1SM) +#define BR_MPU_RGDAACn_M1SM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M1SM)) /*! @brief Format value for bitfield MPU_RGDAACn_M1SM. */ #define BF_MPU_RGDAACn_M1SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M1SM) & BM_MPU_RGDAACn_M1SM) @@ -1375,13 +1382,13 @@ #define BS_MPU_RGDAACn_M1PE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M1PE. */ /*! @brief Read current value of the MPU_RGDAACn_M1PE field. */ -#define BR_MPU_RGDAACn_M1PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M1PE)) +#define BR_MPU_RGDAACn_M1PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M1PE))) /*! @brief Format value for bitfield MPU_RGDAACn_M1PE. */ #define BF_MPU_RGDAACn_M1PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M1PE) & BM_MPU_RGDAACn_M1PE) /*! @brief Set the M1PE field to a new value. */ -#define BW_MPU_RGDAACn_M1PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M1PE) = (v)) +#define BW_MPU_RGDAACn_M1PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M1PE), v)) /*@}*/ /*! @@ -1395,7 +1402,7 @@ #define BS_MPU_RGDAACn_M2UM (3U) /*!< Bit field size in bits for MPU_RGDAACn_M2UM. */ /*! @brief Read current value of the MPU_RGDAACn_M2UM field. */ -#define BR_MPU_RGDAACn_M2UM(x, n) (HW_MPU_RGDAACn(x, n).B.M2UM) +#define BR_MPU_RGDAACn_M2UM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M2UM)) /*! @brief Format value for bitfield MPU_RGDAACn_M2UM. */ #define BF_MPU_RGDAACn_M2UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M2UM) & BM_MPU_RGDAACn_M2UM) @@ -1415,7 +1422,7 @@ #define BS_MPU_RGDAACn_M2SM (2U) /*!< Bit field size in bits for MPU_RGDAACn_M2SM. */ /*! @brief Read current value of the MPU_RGDAACn_M2SM field. */ -#define BR_MPU_RGDAACn_M2SM(x, n) (HW_MPU_RGDAACn(x, n).B.M2SM) +#define BR_MPU_RGDAACn_M2SM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M2SM)) /*! @brief Format value for bitfield MPU_RGDAACn_M2SM. */ #define BF_MPU_RGDAACn_M2SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M2SM) & BM_MPU_RGDAACn_M2SM) @@ -1435,13 +1442,13 @@ #define BS_MPU_RGDAACn_M2PE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M2PE. */ /*! @brief Read current value of the MPU_RGDAACn_M2PE field. */ -#define BR_MPU_RGDAACn_M2PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M2PE)) +#define BR_MPU_RGDAACn_M2PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M2PE))) /*! @brief Format value for bitfield MPU_RGDAACn_M2PE. */ #define BF_MPU_RGDAACn_M2PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M2PE) & BM_MPU_RGDAACn_M2PE) /*! @brief Set the M2PE field to a new value. */ -#define BW_MPU_RGDAACn_M2PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M2PE) = (v)) +#define BW_MPU_RGDAACn_M2PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M2PE), v)) /*@}*/ /*! @@ -1462,7 +1469,7 @@ #define BS_MPU_RGDAACn_M3UM (3U) /*!< Bit field size in bits for MPU_RGDAACn_M3UM. */ /*! @brief Read current value of the MPU_RGDAACn_M3UM field. */ -#define BR_MPU_RGDAACn_M3UM(x, n) (HW_MPU_RGDAACn(x, n).B.M3UM) +#define BR_MPU_RGDAACn_M3UM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M3UM)) /*! @brief Format value for bitfield MPU_RGDAACn_M3UM. */ #define BF_MPU_RGDAACn_M3UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M3UM) & BM_MPU_RGDAACn_M3UM) @@ -1488,7 +1495,7 @@ #define BS_MPU_RGDAACn_M3SM (2U) /*!< Bit field size in bits for MPU_RGDAACn_M3SM. */ /*! @brief Read current value of the MPU_RGDAACn_M3SM field. */ -#define BR_MPU_RGDAACn_M3SM(x, n) (HW_MPU_RGDAACn(x, n).B.M3SM) +#define BR_MPU_RGDAACn_M3SM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M3SM)) /*! @brief Format value for bitfield MPU_RGDAACn_M3SM. */ #define BF_MPU_RGDAACn_M3SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M3SM) & BM_MPU_RGDAACn_M3SM) @@ -1511,13 +1518,13 @@ #define BS_MPU_RGDAACn_M3PE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M3PE. */ /*! @brief Read current value of the MPU_RGDAACn_M3PE field. */ -#define BR_MPU_RGDAACn_M3PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M3PE)) +#define BR_MPU_RGDAACn_M3PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M3PE))) /*! @brief Format value for bitfield MPU_RGDAACn_M3PE. */ #define BF_MPU_RGDAACn_M3PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M3PE) & BM_MPU_RGDAACn_M3PE) /*! @brief Set the M3PE field to a new value. */ -#define BW_MPU_RGDAACn_M3PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M3PE) = (v)) +#define BW_MPU_RGDAACn_M3PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M3PE), v)) /*@}*/ /*! @@ -1534,13 +1541,13 @@ #define BS_MPU_RGDAACn_M4WE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M4WE. */ /*! @brief Read current value of the MPU_RGDAACn_M4WE field. */ -#define BR_MPU_RGDAACn_M4WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4WE)) +#define BR_MPU_RGDAACn_M4WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4WE))) /*! @brief Format value for bitfield MPU_RGDAACn_M4WE. */ #define BF_MPU_RGDAACn_M4WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M4WE) & BM_MPU_RGDAACn_M4WE) /*! @brief Set the M4WE field to a new value. */ -#define BW_MPU_RGDAACn_M4WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4WE) = (v)) +#define BW_MPU_RGDAACn_M4WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4WE), v)) /*@}*/ /*! @@ -1557,13 +1564,13 @@ #define BS_MPU_RGDAACn_M4RE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M4RE. */ /*! @brief Read current value of the MPU_RGDAACn_M4RE field. */ -#define BR_MPU_RGDAACn_M4RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4RE)) +#define BR_MPU_RGDAACn_M4RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4RE))) /*! @brief Format value for bitfield MPU_RGDAACn_M4RE. */ #define BF_MPU_RGDAACn_M4RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M4RE) & BM_MPU_RGDAACn_M4RE) /*! @brief Set the M4RE field to a new value. */ -#define BW_MPU_RGDAACn_M4RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4RE) = (v)) +#define BW_MPU_RGDAACn_M4RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4RE), v)) /*@}*/ /*! @@ -1580,13 +1587,13 @@ #define BS_MPU_RGDAACn_M5WE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M5WE. */ /*! @brief Read current value of the MPU_RGDAACn_M5WE field. */ -#define BR_MPU_RGDAACn_M5WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5WE)) +#define BR_MPU_RGDAACn_M5WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5WE))) /*! @brief Format value for bitfield MPU_RGDAACn_M5WE. */ #define BF_MPU_RGDAACn_M5WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M5WE) & BM_MPU_RGDAACn_M5WE) /*! @brief Set the M5WE field to a new value. */ -#define BW_MPU_RGDAACn_M5WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5WE) = (v)) +#define BW_MPU_RGDAACn_M5WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5WE), v)) /*@}*/ /*! @@ -1603,13 +1610,13 @@ #define BS_MPU_RGDAACn_M5RE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M5RE. */ /*! @brief Read current value of the MPU_RGDAACn_M5RE field. */ -#define BR_MPU_RGDAACn_M5RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5RE)) +#define BR_MPU_RGDAACn_M5RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5RE))) /*! @brief Format value for bitfield MPU_RGDAACn_M5RE. */ #define BF_MPU_RGDAACn_M5RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M5RE) & BM_MPU_RGDAACn_M5RE) /*! @brief Set the M5RE field to a new value. */ -#define BW_MPU_RGDAACn_M5RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5RE) = (v)) +#define BW_MPU_RGDAACn_M5RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5RE), v)) /*@}*/ /*! @@ -1626,13 +1633,13 @@ #define BS_MPU_RGDAACn_M6WE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M6WE. */ /*! @brief Read current value of the MPU_RGDAACn_M6WE field. */ -#define BR_MPU_RGDAACn_M6WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6WE)) +#define BR_MPU_RGDAACn_M6WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6WE))) /*! @brief Format value for bitfield MPU_RGDAACn_M6WE. */ #define BF_MPU_RGDAACn_M6WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M6WE) & BM_MPU_RGDAACn_M6WE) /*! @brief Set the M6WE field to a new value. */ -#define BW_MPU_RGDAACn_M6WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6WE) = (v)) +#define BW_MPU_RGDAACn_M6WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6WE), v)) /*@}*/ /*! @@ -1649,13 +1656,13 @@ #define BS_MPU_RGDAACn_M6RE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M6RE. */ /*! @brief Read current value of the MPU_RGDAACn_M6RE field. */ -#define BR_MPU_RGDAACn_M6RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6RE)) +#define BR_MPU_RGDAACn_M6RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6RE))) /*! @brief Format value for bitfield MPU_RGDAACn_M6RE. */ #define BF_MPU_RGDAACn_M6RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M6RE) & BM_MPU_RGDAACn_M6RE) /*! @brief Set the M6RE field to a new value. */ -#define BW_MPU_RGDAACn_M6RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6RE) = (v)) +#define BW_MPU_RGDAACn_M6RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6RE), v)) /*@}*/ /*! @@ -1672,13 +1679,13 @@ #define BS_MPU_RGDAACn_M7WE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M7WE. */ /*! @brief Read current value of the MPU_RGDAACn_M7WE field. */ -#define BR_MPU_RGDAACn_M7WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7WE)) +#define BR_MPU_RGDAACn_M7WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7WE))) /*! @brief Format value for bitfield MPU_RGDAACn_M7WE. */ #define BF_MPU_RGDAACn_M7WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M7WE) & BM_MPU_RGDAACn_M7WE) /*! @brief Set the M7WE field to a new value. */ -#define BW_MPU_RGDAACn_M7WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7WE) = (v)) +#define BW_MPU_RGDAACn_M7WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7WE), v)) /*@}*/ /*! @@ -1695,13 +1702,13 @@ #define BS_MPU_RGDAACn_M7RE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M7RE. */ /*! @brief Read current value of the MPU_RGDAACn_M7RE field. */ -#define BR_MPU_RGDAACn_M7RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7RE)) +#define BR_MPU_RGDAACn_M7RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7RE))) /*! @brief Format value for bitfield MPU_RGDAACn_M7RE. */ #define BF_MPU_RGDAACn_M7RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M7RE) & BM_MPU_RGDAACn_M7RE) /*! @brief Set the M7RE field to a new value. */ -#define BW_MPU_RGDAACn_M7RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7RE) = (v)) +#define BW_MPU_RGDAACn_M7RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7RE), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_nv.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_nv.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -136,7 +143,7 @@ #define HW_NV_BACKKEY3_ADDR(x) ((x) + 0x0U) #define HW_NV_BACKKEY3(x) (*(__I hw_nv_backkey3_t *) HW_NV_BACKKEY3_ADDR(x)) -#define HW_NV_BACKKEY3_RD(x) (HW_NV_BACKKEY3(x).U) +#define HW_NV_BACKKEY3_RD(x) (ADDRESS_READ(hw_nv_backkey3_t, HW_NV_BACKKEY3_ADDR(x))) /*@}*/ /* @@ -180,7 +187,7 @@ #define HW_NV_BACKKEY2_ADDR(x) ((x) + 0x1U) #define HW_NV_BACKKEY2(x) (*(__I hw_nv_backkey2_t *) HW_NV_BACKKEY2_ADDR(x)) -#define HW_NV_BACKKEY2_RD(x) (HW_NV_BACKKEY2(x).U) +#define HW_NV_BACKKEY2_RD(x) (ADDRESS_READ(hw_nv_backkey2_t, HW_NV_BACKKEY2_ADDR(x))) /*@}*/ /* @@ -224,7 +231,7 @@ #define HW_NV_BACKKEY1_ADDR(x) ((x) + 0x2U) #define HW_NV_BACKKEY1(x) (*(__I hw_nv_backkey1_t *) HW_NV_BACKKEY1_ADDR(x)) -#define HW_NV_BACKKEY1_RD(x) (HW_NV_BACKKEY1(x).U) +#define HW_NV_BACKKEY1_RD(x) (ADDRESS_READ(hw_nv_backkey1_t, HW_NV_BACKKEY1_ADDR(x))) /*@}*/ /* @@ -268,7 +275,7 @@ #define HW_NV_BACKKEY0_ADDR(x) ((x) + 0x3U) #define HW_NV_BACKKEY0(x) (*(__I hw_nv_backkey0_t *) HW_NV_BACKKEY0_ADDR(x)) -#define HW_NV_BACKKEY0_RD(x) (HW_NV_BACKKEY0(x).U) +#define HW_NV_BACKKEY0_RD(x) (ADDRESS_READ(hw_nv_backkey0_t, HW_NV_BACKKEY0_ADDR(x))) /*@}*/ /* @@ -312,7 +319,7 @@ #define HW_NV_BACKKEY7_ADDR(x) ((x) + 0x4U) #define HW_NV_BACKKEY7(x) (*(__I hw_nv_backkey7_t *) HW_NV_BACKKEY7_ADDR(x)) -#define HW_NV_BACKKEY7_RD(x) (HW_NV_BACKKEY7(x).U) +#define HW_NV_BACKKEY7_RD(x) (ADDRESS_READ(hw_nv_backkey7_t, HW_NV_BACKKEY7_ADDR(x))) /*@}*/ /* @@ -356,7 +363,7 @@ #define HW_NV_BACKKEY6_ADDR(x) ((x) + 0x5U) #define HW_NV_BACKKEY6(x) (*(__I hw_nv_backkey6_t *) HW_NV_BACKKEY6_ADDR(x)) -#define HW_NV_BACKKEY6_RD(x) (HW_NV_BACKKEY6(x).U) +#define HW_NV_BACKKEY6_RD(x) (ADDRESS_READ(hw_nv_backkey6_t, HW_NV_BACKKEY6_ADDR(x))) /*@}*/ /* @@ -400,7 +407,7 @@ #define HW_NV_BACKKEY5_ADDR(x) ((x) + 0x6U) #define HW_NV_BACKKEY5(x) (*(__I hw_nv_backkey5_t *) HW_NV_BACKKEY5_ADDR(x)) -#define HW_NV_BACKKEY5_RD(x) (HW_NV_BACKKEY5(x).U) +#define HW_NV_BACKKEY5_RD(x) (ADDRESS_READ(hw_nv_backkey5_t, HW_NV_BACKKEY5_ADDR(x))) /*@}*/ /* @@ -444,7 +451,7 @@ #define HW_NV_BACKKEY4_ADDR(x) ((x) + 0x7U) #define HW_NV_BACKKEY4(x) (*(__I hw_nv_backkey4_t *) HW_NV_BACKKEY4_ADDR(x)) -#define HW_NV_BACKKEY4_RD(x) (HW_NV_BACKKEY4(x).U) +#define HW_NV_BACKKEY4_RD(x) (ADDRESS_READ(hw_nv_backkey4_t, HW_NV_BACKKEY4_ADDR(x))) /*@}*/ /* @@ -488,7 +495,7 @@ #define HW_NV_FPROT3_ADDR(x) ((x) + 0x8U) #define HW_NV_FPROT3(x) (*(__I hw_nv_fprot3_t *) HW_NV_FPROT3_ADDR(x)) -#define HW_NV_FPROT3_RD(x) (HW_NV_FPROT3(x).U) +#define HW_NV_FPROT3_RD(x) (ADDRESS_READ(hw_nv_fprot3_t, HW_NV_FPROT3_ADDR(x))) /*@}*/ /* @@ -532,7 +539,7 @@ #define HW_NV_FPROT2_ADDR(x) ((x) + 0x9U) #define HW_NV_FPROT2(x) (*(__I hw_nv_fprot2_t *) HW_NV_FPROT2_ADDR(x)) -#define HW_NV_FPROT2_RD(x) (HW_NV_FPROT2(x).U) +#define HW_NV_FPROT2_RD(x) (ADDRESS_READ(hw_nv_fprot2_t, HW_NV_FPROT2_ADDR(x))) /*@}*/ /* @@ -576,7 +583,7 @@ #define HW_NV_FPROT1_ADDR(x) ((x) + 0xAU) #define HW_NV_FPROT1(x) (*(__I hw_nv_fprot1_t *) HW_NV_FPROT1_ADDR(x)) -#define HW_NV_FPROT1_RD(x) (HW_NV_FPROT1(x).U) +#define HW_NV_FPROT1_RD(x) (ADDRESS_READ(hw_nv_fprot1_t, HW_NV_FPROT1_ADDR(x))) /*@}*/ /* @@ -620,7 +627,7 @@ #define HW_NV_FPROT0_ADDR(x) ((x) + 0xBU) #define HW_NV_FPROT0(x) (*(__I hw_nv_fprot0_t *) HW_NV_FPROT0_ADDR(x)) -#define HW_NV_FPROT0_RD(x) (HW_NV_FPROT0(x).U) +#define HW_NV_FPROT0_RD(x) (ADDRESS_READ(hw_nv_fprot0_t, HW_NV_FPROT0_ADDR(x))) /*@}*/ /* @@ -670,7 +677,7 @@ #define HW_NV_FSEC_ADDR(x) ((x) + 0xCU) #define HW_NV_FSEC(x) (*(__I hw_nv_fsec_t *) HW_NV_FSEC_ADDR(x)) -#define HW_NV_FSEC_RD(x) (HW_NV_FSEC(x).U) +#define HW_NV_FSEC_RD(x) (ADDRESS_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x))) /*@}*/ /* @@ -690,7 +697,7 @@ #define BS_NV_FSEC_SEC (2U) /*!< Bit field size in bits for NV_FSEC_SEC. */ /*! @brief Read current value of the NV_FSEC_SEC field. */ -#define BR_NV_FSEC_SEC(x) (HW_NV_FSEC(x).B.SEC) +#define BR_NV_FSEC_SEC(x) (UNION_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x), U, B.SEC)) /*@}*/ /*! @@ -706,7 +713,7 @@ #define BS_NV_FSEC_FSLACC (2U) /*!< Bit field size in bits for NV_FSEC_FSLACC. */ /*! @brief Read current value of the NV_FSEC_FSLACC field. */ -#define BR_NV_FSEC_FSLACC(x) (HW_NV_FSEC(x).B.FSLACC) +#define BR_NV_FSEC_FSLACC(x) (UNION_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x), U, B.FSLACC)) /*@}*/ /*! @@ -722,7 +729,7 @@ #define BS_NV_FSEC_MEEN (2U) /*!< Bit field size in bits for NV_FSEC_MEEN. */ /*! @brief Read current value of the NV_FSEC_MEEN field. */ -#define BR_NV_FSEC_MEEN(x) (HW_NV_FSEC(x).B.MEEN) +#define BR_NV_FSEC_MEEN(x) (UNION_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x), U, B.MEEN)) /*@}*/ /*! @@ -738,7 +745,7 @@ #define BS_NV_FSEC_KEYEN (2U) /*!< Bit field size in bits for NV_FSEC_KEYEN. */ /*! @brief Read current value of the NV_FSEC_KEYEN field. */ -#define BR_NV_FSEC_KEYEN(x) (HW_NV_FSEC(x).B.KEYEN) +#define BR_NV_FSEC_KEYEN(x) (UNION_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x), U, B.KEYEN)) /*@}*/ /******************************************************************************* @@ -768,7 +775,7 @@ #define HW_NV_FOPT_ADDR(x) ((x) + 0xDU) #define HW_NV_FOPT(x) (*(__I hw_nv_fopt_t *) HW_NV_FOPT_ADDR(x)) -#define HW_NV_FOPT_RD(x) (HW_NV_FOPT(x).U) +#define HW_NV_FOPT_RD(x) (ADDRESS_READ(hw_nv_fopt_t, HW_NV_FOPT_ADDR(x))) /*@}*/ /* @@ -788,7 +795,7 @@ #define BS_NV_FOPT_LPBOOT (1U) /*!< Bit field size in bits for NV_FOPT_LPBOOT. */ /*! @brief Read current value of the NV_FOPT_LPBOOT field. */ -#define BR_NV_FOPT_LPBOOT(x) (BITBAND_ACCESS8(HW_NV_FOPT_ADDR(x), BP_NV_FOPT_LPBOOT)) +#define BR_NV_FOPT_LPBOOT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_NV_FOPT_ADDR(x), BP_NV_FOPT_LPBOOT))) /*@}*/ /*! @@ -800,7 +807,7 @@ #define BS_NV_FOPT_EZPORT_DIS (1U) /*!< Bit field size in bits for NV_FOPT_EZPORT_DIS. */ /*! @brief Read current value of the NV_FOPT_EZPORT_DIS field. */ -#define BR_NV_FOPT_EZPORT_DIS(x) (BITBAND_ACCESS8(HW_NV_FOPT_ADDR(x), BP_NV_FOPT_EZPORT_DIS)) +#define BR_NV_FOPT_EZPORT_DIS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_NV_FOPT_ADDR(x), BP_NV_FOPT_EZPORT_DIS))) /*@}*/ /******************************************************************************* @@ -828,7 +835,7 @@ #define HW_NV_FEPROT_ADDR(x) ((x) + 0xEU) #define HW_NV_FEPROT(x) (*(__I hw_nv_feprot_t *) HW_NV_FEPROT_ADDR(x)) -#define HW_NV_FEPROT_RD(x) (HW_NV_FEPROT(x).U) +#define HW_NV_FEPROT_RD(x) (ADDRESS_READ(hw_nv_feprot_t, HW_NV_FEPROT_ADDR(x))) /*@}*/ /* @@ -872,7 +879,7 @@ #define HW_NV_FDPROT_ADDR(x) ((x) + 0xFU) #define HW_NV_FDPROT(x) (*(__I hw_nv_fdprot_t *) HW_NV_FDPROT_ADDR(x)) -#define HW_NV_FDPROT_RD(x) (HW_NV_FDPROT(x).U) +#define HW_NV_FDPROT_RD(x) (ADDRESS_READ(hw_nv_fdprot_t, HW_NV_FDPROT_ADDR(x))) /*@}*/ /*
--- a/hal/device/device/MK64F12/MK64F12_osc.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_osc.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -132,8 +139,8 @@ #define HW_OSC_CR_ADDR(x) ((x) + 0x0U) #define HW_OSC_CR(x) (*(__IO hw_osc_cr_t *) HW_OSC_CR_ADDR(x)) -#define HW_OSC_CR_RD(x) (HW_OSC_CR(x).U) -#define HW_OSC_CR_WR(x, v) (HW_OSC_CR(x).U = (v)) +#define HW_OSC_CR_RD(x) (ADDRESS_READ(hw_osc_cr_t, HW_OSC_CR_ADDR(x))) +#define HW_OSC_CR_WR(x, v) (ADDRESS_WRITE(hw_osc_cr_t, HW_OSC_CR_ADDR(x), v)) #define HW_OSC_CR_SET(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) | (v))) #define HW_OSC_CR_CLR(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) & ~(v))) #define HW_OSC_CR_TOG(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) ^ (v))) @@ -158,13 +165,13 @@ #define BS_OSC_CR_SC16P (1U) /*!< Bit field size in bits for OSC_CR_SC16P. */ /*! @brief Read current value of the OSC_CR_SC16P field. */ -#define BR_OSC_CR_SC16P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P)) +#define BR_OSC_CR_SC16P(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P))) /*! @brief Format value for bitfield OSC_CR_SC16P. */ #define BF_OSC_CR_SC16P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC16P) & BM_OSC_CR_SC16P) /*! @brief Set the SC16P field to a new value. */ -#define BW_OSC_CR_SC16P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P) = (v)) +#define BW_OSC_CR_SC16P(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P), v)) /*@}*/ /*! @@ -182,13 +189,13 @@ #define BS_OSC_CR_SC8P (1U) /*!< Bit field size in bits for OSC_CR_SC8P. */ /*! @brief Read current value of the OSC_CR_SC8P field. */ -#define BR_OSC_CR_SC8P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P)) +#define BR_OSC_CR_SC8P(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P))) /*! @brief Format value for bitfield OSC_CR_SC8P. */ #define BF_OSC_CR_SC8P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC8P) & BM_OSC_CR_SC8P) /*! @brief Set the SC8P field to a new value. */ -#define BW_OSC_CR_SC8P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P) = (v)) +#define BW_OSC_CR_SC8P(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P), v)) /*@}*/ /*! @@ -206,13 +213,13 @@ #define BS_OSC_CR_SC4P (1U) /*!< Bit field size in bits for OSC_CR_SC4P. */ /*! @brief Read current value of the OSC_CR_SC4P field. */ -#define BR_OSC_CR_SC4P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P)) +#define BR_OSC_CR_SC4P(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P))) /*! @brief Format value for bitfield OSC_CR_SC4P. */ #define BF_OSC_CR_SC4P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC4P) & BM_OSC_CR_SC4P) /*! @brief Set the SC4P field to a new value. */ -#define BW_OSC_CR_SC4P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P) = (v)) +#define BW_OSC_CR_SC4P(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P), v)) /*@}*/ /*! @@ -230,13 +237,13 @@ #define BS_OSC_CR_SC2P (1U) /*!< Bit field size in bits for OSC_CR_SC2P. */ /*! @brief Read current value of the OSC_CR_SC2P field. */ -#define BR_OSC_CR_SC2P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P)) +#define BR_OSC_CR_SC2P(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P))) /*! @brief Format value for bitfield OSC_CR_SC2P. */ #define BF_OSC_CR_SC2P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC2P) & BM_OSC_CR_SC2P) /*! @brief Set the SC2P field to a new value. */ -#define BW_OSC_CR_SC2P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P) = (v)) +#define BW_OSC_CR_SC2P(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P), v)) /*@}*/ /*! @@ -256,13 +263,13 @@ #define BS_OSC_CR_EREFSTEN (1U) /*!< Bit field size in bits for OSC_CR_EREFSTEN. */ /*! @brief Read current value of the OSC_CR_EREFSTEN field. */ -#define BR_OSC_CR_EREFSTEN(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN)) +#define BR_OSC_CR_EREFSTEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN))) /*! @brief Format value for bitfield OSC_CR_EREFSTEN. */ #define BF_OSC_CR_EREFSTEN(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_EREFSTEN) & BM_OSC_CR_EREFSTEN) /*! @brief Set the EREFSTEN field to a new value. */ -#define BW_OSC_CR_EREFSTEN(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN) = (v)) +#define BW_OSC_CR_EREFSTEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN), v)) /*@}*/ /*! @@ -280,13 +287,13 @@ #define BS_OSC_CR_ERCLKEN (1U) /*!< Bit field size in bits for OSC_CR_ERCLKEN. */ /*! @brief Read current value of the OSC_CR_ERCLKEN field. */ -#define BR_OSC_CR_ERCLKEN(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN)) +#define BR_OSC_CR_ERCLKEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN))) /*! @brief Format value for bitfield OSC_CR_ERCLKEN. */ #define BF_OSC_CR_ERCLKEN(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_ERCLKEN) & BM_OSC_CR_ERCLKEN) /*! @brief Set the ERCLKEN field to a new value. */ -#define BW_OSC_CR_ERCLKEN(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN) = (v)) +#define BW_OSC_CR_ERCLKEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_pdb.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_pdb.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -146,8 +153,8 @@ #define HW_PDB_SC_ADDR(x) ((x) + 0x0U) #define HW_PDB_SC(x) (*(__IO hw_pdb_sc_t *) HW_PDB_SC_ADDR(x)) -#define HW_PDB_SC_RD(x) (HW_PDB_SC(x).U) -#define HW_PDB_SC_WR(x, v) (HW_PDB_SC(x).U = (v)) +#define HW_PDB_SC_RD(x) (ADDRESS_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x))) +#define HW_PDB_SC_WR(x, v) (ADDRESS_WRITE(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), v)) #define HW_PDB_SC_SET(x, v) (HW_PDB_SC_WR(x, HW_PDB_SC_RD(x) | (v))) #define HW_PDB_SC_CLR(x, v) (HW_PDB_SC_WR(x, HW_PDB_SC_RD(x) & ~(v))) #define HW_PDB_SC_TOG(x, v) (HW_PDB_SC_WR(x, HW_PDB_SC_RD(x) ^ (v))) @@ -176,13 +183,13 @@ #define BS_PDB_SC_LDOK (1U) /*!< Bit field size in bits for PDB_SC_LDOK. */ /*! @brief Read current value of the PDB_SC_LDOK field. */ -#define BR_PDB_SC_LDOK(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_LDOK)) +#define BR_PDB_SC_LDOK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_LDOK))) /*! @brief Format value for bitfield PDB_SC_LDOK. */ #define BF_PDB_SC_LDOK(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_LDOK) & BM_PDB_SC_LDOK) /*! @brief Set the LDOK field to a new value. */ -#define BW_PDB_SC_LDOK(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_LDOK) = (v)) +#define BW_PDB_SC_LDOK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_LDOK), v)) /*@}*/ /*! @@ -200,13 +207,13 @@ #define BS_PDB_SC_CONT (1U) /*!< Bit field size in bits for PDB_SC_CONT. */ /*! @brief Read current value of the PDB_SC_CONT field. */ -#define BR_PDB_SC_CONT(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_CONT)) +#define BR_PDB_SC_CONT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_CONT))) /*! @brief Format value for bitfield PDB_SC_CONT. */ #define BF_PDB_SC_CONT(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_CONT) & BM_PDB_SC_CONT) /*! @brief Set the CONT field to a new value. */ -#define BW_PDB_SC_CONT(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_CONT) = (v)) +#define BW_PDB_SC_CONT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_CONT), v)) /*@}*/ /*! @@ -227,7 +234,7 @@ #define BS_PDB_SC_MULT (2U) /*!< Bit field size in bits for PDB_SC_MULT. */ /*! @brief Read current value of the PDB_SC_MULT field. */ -#define BR_PDB_SC_MULT(x) (HW_PDB_SC(x).B.MULT) +#define BR_PDB_SC_MULT(x) (UNION_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), U, B.MULT)) /*! @brief Format value for bitfield PDB_SC_MULT. */ #define BF_PDB_SC_MULT(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_MULT) & BM_PDB_SC_MULT) @@ -252,13 +259,13 @@ #define BS_PDB_SC_PDBIE (1U) /*!< Bit field size in bits for PDB_SC_PDBIE. */ /*! @brief Read current value of the PDB_SC_PDBIE field. */ -#define BR_PDB_SC_PDBIE(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIE)) +#define BR_PDB_SC_PDBIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIE))) /*! @brief Format value for bitfield PDB_SC_PDBIE. */ #define BF_PDB_SC_PDBIE(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PDBIE) & BM_PDB_SC_PDBIE) /*! @brief Set the PDBIE field to a new value. */ -#define BW_PDB_SC_PDBIE(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIE) = (v)) +#define BW_PDB_SC_PDBIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIE), v)) /*@}*/ /*! @@ -273,13 +280,13 @@ #define BS_PDB_SC_PDBIF (1U) /*!< Bit field size in bits for PDB_SC_PDBIF. */ /*! @brief Read current value of the PDB_SC_PDBIF field. */ -#define BR_PDB_SC_PDBIF(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIF)) +#define BR_PDB_SC_PDBIF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIF))) /*! @brief Format value for bitfield PDB_SC_PDBIF. */ #define BF_PDB_SC_PDBIF(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PDBIF) & BM_PDB_SC_PDBIF) /*! @brief Set the PDBIF field to a new value. */ -#define BW_PDB_SC_PDBIF(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIF) = (v)) +#define BW_PDB_SC_PDBIF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIF), v)) /*@}*/ /*! @@ -295,13 +302,13 @@ #define BS_PDB_SC_PDBEN (1U) /*!< Bit field size in bits for PDB_SC_PDBEN. */ /*! @brief Read current value of the PDB_SC_PDBEN field. */ -#define BR_PDB_SC_PDBEN(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEN)) +#define BR_PDB_SC_PDBEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEN))) /*! @brief Format value for bitfield PDB_SC_PDBEN. */ #define BF_PDB_SC_PDBEN(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PDBEN) & BM_PDB_SC_PDBEN) /*! @brief Set the PDBEN field to a new value. */ -#define BW_PDB_SC_PDBEN(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEN) = (v)) +#define BW_PDB_SC_PDBEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEN), v)) /*@}*/ /*! @@ -335,7 +342,7 @@ #define BS_PDB_SC_TRGSEL (4U) /*!< Bit field size in bits for PDB_SC_TRGSEL. */ /*! @brief Read current value of the PDB_SC_TRGSEL field. */ -#define BR_PDB_SC_TRGSEL(x) (HW_PDB_SC(x).B.TRGSEL) +#define BR_PDB_SC_TRGSEL(x) (UNION_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), U, B.TRGSEL)) /*! @brief Format value for bitfield PDB_SC_TRGSEL. */ #define BF_PDB_SC_TRGSEL(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_TRGSEL) & BM_PDB_SC_TRGSEL) @@ -371,7 +378,7 @@ #define BS_PDB_SC_PRESCALER (3U) /*!< Bit field size in bits for PDB_SC_PRESCALER. */ /*! @brief Read current value of the PDB_SC_PRESCALER field. */ -#define BR_PDB_SC_PRESCALER(x) (HW_PDB_SC(x).B.PRESCALER) +#define BR_PDB_SC_PRESCALER(x) (UNION_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), U, B.PRESCALER)) /*! @brief Format value for bitfield PDB_SC_PRESCALER. */ #define BF_PDB_SC_PRESCALER(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PRESCALER) & BM_PDB_SC_PRESCALER) @@ -396,13 +403,13 @@ #define BS_PDB_SC_DMAEN (1U) /*!< Bit field size in bits for PDB_SC_DMAEN. */ /*! @brief Read current value of the PDB_SC_DMAEN field. */ -#define BR_PDB_SC_DMAEN(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_DMAEN)) +#define BR_PDB_SC_DMAEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_DMAEN))) /*! @brief Format value for bitfield PDB_SC_DMAEN. */ #define BF_PDB_SC_DMAEN(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_DMAEN) & BM_PDB_SC_DMAEN) /*! @brief Set the DMAEN field to a new value. */ -#define BW_PDB_SC_DMAEN(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_DMAEN) = (v)) +#define BW_PDB_SC_DMAEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_DMAEN), v)) /*@}*/ /*! @@ -421,7 +428,7 @@ #define BF_PDB_SC_SWTRIG(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_SWTRIG) & BM_PDB_SC_SWTRIG) /*! @brief Set the SWTRIG field to a new value. */ -#define BW_PDB_SC_SWTRIG(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_SWTRIG) = (v)) +#define BW_PDB_SC_SWTRIG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_SWTRIG), v)) /*@}*/ /*! @@ -440,13 +447,13 @@ #define BS_PDB_SC_PDBEIE (1U) /*!< Bit field size in bits for PDB_SC_PDBEIE. */ /*! @brief Read current value of the PDB_SC_PDBEIE field. */ -#define BR_PDB_SC_PDBEIE(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEIE)) +#define BR_PDB_SC_PDBEIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEIE))) /*! @brief Format value for bitfield PDB_SC_PDBEIE. */ #define BF_PDB_SC_PDBEIE(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PDBEIE) & BM_PDB_SC_PDBEIE) /*! @brief Set the PDBEIE field to a new value. */ -#define BW_PDB_SC_PDBEIE(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEIE) = (v)) +#define BW_PDB_SC_PDBEIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEIE), v)) /*@}*/ /*! @@ -473,7 +480,7 @@ #define BS_PDB_SC_LDMOD (2U) /*!< Bit field size in bits for PDB_SC_LDMOD. */ /*! @brief Read current value of the PDB_SC_LDMOD field. */ -#define BR_PDB_SC_LDMOD(x) (HW_PDB_SC(x).B.LDMOD) +#define BR_PDB_SC_LDMOD(x) (UNION_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), U, B.LDMOD)) /*! @brief Format value for bitfield PDB_SC_LDMOD. */ #define BF_PDB_SC_LDMOD(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_LDMOD) & BM_PDB_SC_LDMOD) @@ -508,8 +515,8 @@ #define HW_PDB_MOD_ADDR(x) ((x) + 0x4U) #define HW_PDB_MOD(x) (*(__IO hw_pdb_mod_t *) HW_PDB_MOD_ADDR(x)) -#define HW_PDB_MOD_RD(x) (HW_PDB_MOD(x).U) -#define HW_PDB_MOD_WR(x, v) (HW_PDB_MOD(x).U = (v)) +#define HW_PDB_MOD_RD(x) (ADDRESS_READ(hw_pdb_mod_t, HW_PDB_MOD_ADDR(x))) +#define HW_PDB_MOD_WR(x, v) (ADDRESS_WRITE(hw_pdb_mod_t, HW_PDB_MOD_ADDR(x), v)) #define HW_PDB_MOD_SET(x, v) (HW_PDB_MOD_WR(x, HW_PDB_MOD_RD(x) | (v))) #define HW_PDB_MOD_CLR(x, v) (HW_PDB_MOD_WR(x, HW_PDB_MOD_RD(x) & ~(v))) #define HW_PDB_MOD_TOG(x, v) (HW_PDB_MOD_WR(x, HW_PDB_MOD_RD(x) ^ (v))) @@ -533,7 +540,7 @@ #define BS_PDB_MOD_MOD (16U) /*!< Bit field size in bits for PDB_MOD_MOD. */ /*! @brief Read current value of the PDB_MOD_MOD field. */ -#define BR_PDB_MOD_MOD(x) (HW_PDB_MOD(x).B.MOD) +#define BR_PDB_MOD_MOD(x) (UNION_READ(hw_pdb_mod_t, HW_PDB_MOD_ADDR(x), U, B.MOD)) /*! @brief Format value for bitfield PDB_MOD_MOD. */ #define BF_PDB_MOD_MOD(v) ((uint32_t)((uint32_t)(v) << BP_PDB_MOD_MOD) & BM_PDB_MOD_MOD) @@ -568,7 +575,7 @@ #define HW_PDB_CNT_ADDR(x) ((x) + 0x8U) #define HW_PDB_CNT(x) (*(__I hw_pdb_cnt_t *) HW_PDB_CNT_ADDR(x)) -#define HW_PDB_CNT_RD(x) (HW_PDB_CNT(x).U) +#define HW_PDB_CNT_RD(x) (ADDRESS_READ(hw_pdb_cnt_t, HW_PDB_CNT_ADDR(x))) /*@}*/ /* @@ -586,7 +593,7 @@ #define BS_PDB_CNT_CNT (16U) /*!< Bit field size in bits for PDB_CNT_CNT. */ /*! @brief Read current value of the PDB_CNT_CNT field. */ -#define BR_PDB_CNT_CNT(x) (HW_PDB_CNT(x).B.CNT) +#define BR_PDB_CNT_CNT(x) (UNION_READ(hw_pdb_cnt_t, HW_PDB_CNT_ADDR(x), U, B.CNT)) /*@}*/ /******************************************************************************* @@ -615,8 +622,8 @@ #define HW_PDB_IDLY_ADDR(x) ((x) + 0xCU) #define HW_PDB_IDLY(x) (*(__IO hw_pdb_idly_t *) HW_PDB_IDLY_ADDR(x)) -#define HW_PDB_IDLY_RD(x) (HW_PDB_IDLY(x).U) -#define HW_PDB_IDLY_WR(x, v) (HW_PDB_IDLY(x).U = (v)) +#define HW_PDB_IDLY_RD(x) (ADDRESS_READ(hw_pdb_idly_t, HW_PDB_IDLY_ADDR(x))) +#define HW_PDB_IDLY_WR(x, v) (ADDRESS_WRITE(hw_pdb_idly_t, HW_PDB_IDLY_ADDR(x), v)) #define HW_PDB_IDLY_SET(x, v) (HW_PDB_IDLY_WR(x, HW_PDB_IDLY_RD(x) | (v))) #define HW_PDB_IDLY_CLR(x, v) (HW_PDB_IDLY_WR(x, HW_PDB_IDLY_RD(x) & ~(v))) #define HW_PDB_IDLY_TOG(x, v) (HW_PDB_IDLY_WR(x, HW_PDB_IDLY_RD(x) ^ (v))) @@ -641,7 +648,7 @@ #define BS_PDB_IDLY_IDLY (16U) /*!< Bit field size in bits for PDB_IDLY_IDLY. */ /*! @brief Read current value of the PDB_IDLY_IDLY field. */ -#define BR_PDB_IDLY_IDLY(x) (HW_PDB_IDLY(x).B.IDLY) +#define BR_PDB_IDLY_IDLY(x) (UNION_READ(hw_pdb_idly_t, HW_PDB_IDLY_ADDR(x), U, B.IDLY)) /*! @brief Format value for bitfield PDB_IDLY_IDLY. */ #define BF_PDB_IDLY_IDLY(v) ((uint32_t)((uint32_t)(v) << BP_PDB_IDLY_IDLY) & BM_PDB_IDLY_IDLY) @@ -684,8 +691,8 @@ #define HW_PDB_CHnC1_ADDR(x, n) ((x) + 0x10U + (0x28U * (n))) #define HW_PDB_CHnC1(x, n) (*(__IO hw_pdb_chnc1_t *) HW_PDB_CHnC1_ADDR(x, n)) -#define HW_PDB_CHnC1_RD(x, n) (HW_PDB_CHnC1(x, n).U) -#define HW_PDB_CHnC1_WR(x, n, v) (HW_PDB_CHnC1(x, n).U = (v)) +#define HW_PDB_CHnC1_RD(x, n) (ADDRESS_READ(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n))) +#define HW_PDB_CHnC1_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n), v)) #define HW_PDB_CHnC1_SET(x, n, v) (HW_PDB_CHnC1_WR(x, n, HW_PDB_CHnC1_RD(x, n) | (v))) #define HW_PDB_CHnC1_CLR(x, n, v) (HW_PDB_CHnC1_WR(x, n, HW_PDB_CHnC1_RD(x, n) & ~(v))) #define HW_PDB_CHnC1_TOG(x, n, v) (HW_PDB_CHnC1_WR(x, n, HW_PDB_CHnC1_RD(x, n) ^ (v))) @@ -711,7 +718,7 @@ #define BS_PDB_CHnC1_EN (8U) /*!< Bit field size in bits for PDB_CHnC1_EN. */ /*! @brief Read current value of the PDB_CHnC1_EN field. */ -#define BR_PDB_CHnC1_EN(x, n) (HW_PDB_CHnC1(x, n).B.EN) +#define BR_PDB_CHnC1_EN(x, n) (UNION_READ(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n), U, B.EN)) /*! @brief Format value for bitfield PDB_CHnC1_EN. */ #define BF_PDB_CHnC1_EN(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnC1_EN) & BM_PDB_CHnC1_EN) @@ -742,7 +749,7 @@ #define BS_PDB_CHnC1_TOS (8U) /*!< Bit field size in bits for PDB_CHnC1_TOS. */ /*! @brief Read current value of the PDB_CHnC1_TOS field. */ -#define BR_PDB_CHnC1_TOS(x, n) (HW_PDB_CHnC1(x, n).B.TOS) +#define BR_PDB_CHnC1_TOS(x, n) (UNION_READ(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n), U, B.TOS)) /*! @brief Format value for bitfield PDB_CHnC1_TOS. */ #define BF_PDB_CHnC1_TOS(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnC1_TOS) & BM_PDB_CHnC1_TOS) @@ -772,7 +779,7 @@ #define BS_PDB_CHnC1_BB (8U) /*!< Bit field size in bits for PDB_CHnC1_BB. */ /*! @brief Read current value of the PDB_CHnC1_BB field. */ -#define BR_PDB_CHnC1_BB(x, n) (HW_PDB_CHnC1(x, n).B.BB) +#define BR_PDB_CHnC1_BB(x, n) (UNION_READ(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n), U, B.BB)) /*! @brief Format value for bitfield PDB_CHnC1_BB. */ #define BF_PDB_CHnC1_BB(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnC1_BB) & BM_PDB_CHnC1_BB) @@ -810,8 +817,8 @@ #define HW_PDB_CHnS_ADDR(x, n) ((x) + 0x14U + (0x28U * (n))) #define HW_PDB_CHnS(x, n) (*(__IO hw_pdb_chns_t *) HW_PDB_CHnS_ADDR(x, n)) -#define HW_PDB_CHnS_RD(x, n) (HW_PDB_CHnS(x, n).U) -#define HW_PDB_CHnS_WR(x, n, v) (HW_PDB_CHnS(x, n).U = (v)) +#define HW_PDB_CHnS_RD(x, n) (ADDRESS_READ(hw_pdb_chns_t, HW_PDB_CHnS_ADDR(x, n))) +#define HW_PDB_CHnS_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_chns_t, HW_PDB_CHnS_ADDR(x, n), v)) #define HW_PDB_CHnS_SET(x, n, v) (HW_PDB_CHnS_WR(x, n, HW_PDB_CHnS_RD(x, n) | (v))) #define HW_PDB_CHnS_CLR(x, n, v) (HW_PDB_CHnS_WR(x, n, HW_PDB_CHnS_RD(x, n) & ~(v))) #define HW_PDB_CHnS_TOG(x, n, v) (HW_PDB_CHnS_WR(x, n, HW_PDB_CHnS_RD(x, n) ^ (v))) @@ -841,7 +848,7 @@ #define BS_PDB_CHnS_ERR (8U) /*!< Bit field size in bits for PDB_CHnS_ERR. */ /*! @brief Read current value of the PDB_CHnS_ERR field. */ -#define BR_PDB_CHnS_ERR(x, n) (HW_PDB_CHnS(x, n).B.ERR) +#define BR_PDB_CHnS_ERR(x, n) (UNION_READ(hw_pdb_chns_t, HW_PDB_CHnS_ADDR(x, n), U, B.ERR)) /*! @brief Format value for bitfield PDB_CHnS_ERR. */ #define BF_PDB_CHnS_ERR(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnS_ERR) & BM_PDB_CHnS_ERR) @@ -862,7 +869,7 @@ #define BS_PDB_CHnS_CF (8U) /*!< Bit field size in bits for PDB_CHnS_CF. */ /*! @brief Read current value of the PDB_CHnS_CF field. */ -#define BR_PDB_CHnS_CF(x, n) (HW_PDB_CHnS(x, n).B.CF) +#define BR_PDB_CHnS_CF(x, n) (UNION_READ(hw_pdb_chns_t, HW_PDB_CHnS_ADDR(x, n), U, B.CF)) /*! @brief Format value for bitfield PDB_CHnS_CF. */ #define BF_PDB_CHnS_CF(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnS_CF) & BM_PDB_CHnS_CF) @@ -898,8 +905,8 @@ #define HW_PDB_CHnDLY0_ADDR(x, n) ((x) + 0x18U + (0x28U * (n))) #define HW_PDB_CHnDLY0(x, n) (*(__IO hw_pdb_chndly0_t *) HW_PDB_CHnDLY0_ADDR(x, n)) -#define HW_PDB_CHnDLY0_RD(x, n) (HW_PDB_CHnDLY0(x, n).U) -#define HW_PDB_CHnDLY0_WR(x, n, v) (HW_PDB_CHnDLY0(x, n).U = (v)) +#define HW_PDB_CHnDLY0_RD(x, n) (ADDRESS_READ(hw_pdb_chndly0_t, HW_PDB_CHnDLY0_ADDR(x, n))) +#define HW_PDB_CHnDLY0_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_chndly0_t, HW_PDB_CHnDLY0_ADDR(x, n), v)) #define HW_PDB_CHnDLY0_SET(x, n, v) (HW_PDB_CHnDLY0_WR(x, n, HW_PDB_CHnDLY0_RD(x, n) | (v))) #define HW_PDB_CHnDLY0_CLR(x, n, v) (HW_PDB_CHnDLY0_WR(x, n, HW_PDB_CHnDLY0_RD(x, n) & ~(v))) #define HW_PDB_CHnDLY0_TOG(x, n, v) (HW_PDB_CHnDLY0_WR(x, n, HW_PDB_CHnDLY0_RD(x, n) ^ (v))) @@ -922,7 +929,7 @@ #define BS_PDB_CHnDLY0_DLY (16U) /*!< Bit field size in bits for PDB_CHnDLY0_DLY. */ /*! @brief Read current value of the PDB_CHnDLY0_DLY field. */ -#define BR_PDB_CHnDLY0_DLY(x, n) (HW_PDB_CHnDLY0(x, n).B.DLY) +#define BR_PDB_CHnDLY0_DLY(x, n) (UNION_READ(hw_pdb_chndly0_t, HW_PDB_CHnDLY0_ADDR(x, n), U, B.DLY)) /*! @brief Format value for bitfield PDB_CHnDLY0_DLY. */ #define BF_PDB_CHnDLY0_DLY(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnDLY0_DLY) & BM_PDB_CHnDLY0_DLY) @@ -958,8 +965,8 @@ #define HW_PDB_CHnDLY1_ADDR(x, n) ((x) + 0x1CU + (0x28U * (n))) #define HW_PDB_CHnDLY1(x, n) (*(__IO hw_pdb_chndly1_t *) HW_PDB_CHnDLY1_ADDR(x, n)) -#define HW_PDB_CHnDLY1_RD(x, n) (HW_PDB_CHnDLY1(x, n).U) -#define HW_PDB_CHnDLY1_WR(x, n, v) (HW_PDB_CHnDLY1(x, n).U = (v)) +#define HW_PDB_CHnDLY1_RD(x, n) (ADDRESS_READ(hw_pdb_chndly1_t, HW_PDB_CHnDLY1_ADDR(x, n))) +#define HW_PDB_CHnDLY1_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_chndly1_t, HW_PDB_CHnDLY1_ADDR(x, n), v)) #define HW_PDB_CHnDLY1_SET(x, n, v) (HW_PDB_CHnDLY1_WR(x, n, HW_PDB_CHnDLY1_RD(x, n) | (v))) #define HW_PDB_CHnDLY1_CLR(x, n, v) (HW_PDB_CHnDLY1_WR(x, n, HW_PDB_CHnDLY1_RD(x, n) & ~(v))) #define HW_PDB_CHnDLY1_TOG(x, n, v) (HW_PDB_CHnDLY1_WR(x, n, HW_PDB_CHnDLY1_RD(x, n) ^ (v))) @@ -983,7 +990,7 @@ #define BS_PDB_CHnDLY1_DLY (16U) /*!< Bit field size in bits for PDB_CHnDLY1_DLY. */ /*! @brief Read current value of the PDB_CHnDLY1_DLY field. */ -#define BR_PDB_CHnDLY1_DLY(x, n) (HW_PDB_CHnDLY1(x, n).B.DLY) +#define BR_PDB_CHnDLY1_DLY(x, n) (UNION_READ(hw_pdb_chndly1_t, HW_PDB_CHnDLY1_ADDR(x, n), U, B.DLY)) /*! @brief Format value for bitfield PDB_CHnDLY1_DLY. */ #define BF_PDB_CHnDLY1_DLY(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnDLY1_DLY) & BM_PDB_CHnDLY1_DLY) @@ -1021,8 +1028,8 @@ #define HW_PDB_DACINTCn_ADDR(x, n) ((x) + 0x150U + (0x8U * (n))) #define HW_PDB_DACINTCn(x, n) (*(__IO hw_pdb_dacintcn_t *) HW_PDB_DACINTCn_ADDR(x, n)) -#define HW_PDB_DACINTCn_RD(x, n) (HW_PDB_DACINTCn(x, n).U) -#define HW_PDB_DACINTCn_WR(x, n, v) (HW_PDB_DACINTCn(x, n).U = (v)) +#define HW_PDB_DACINTCn_RD(x, n) (ADDRESS_READ(hw_pdb_dacintcn_t, HW_PDB_DACINTCn_ADDR(x, n))) +#define HW_PDB_DACINTCn_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_dacintcn_t, HW_PDB_DACINTCn_ADDR(x, n), v)) #define HW_PDB_DACINTCn_SET(x, n, v) (HW_PDB_DACINTCn_WR(x, n, HW_PDB_DACINTCn_RD(x, n) | (v))) #define HW_PDB_DACINTCn_CLR(x, n, v) (HW_PDB_DACINTCn_WR(x, n, HW_PDB_DACINTCn_RD(x, n) & ~(v))) #define HW_PDB_DACINTCn_TOG(x, n, v) (HW_PDB_DACINTCn_WR(x, n, HW_PDB_DACINTCn_RD(x, n) ^ (v))) @@ -1047,13 +1054,13 @@ #define BS_PDB_DACINTCn_TOE (1U) /*!< Bit field size in bits for PDB_DACINTCn_TOE. */ /*! @brief Read current value of the PDB_DACINTCn_TOE field. */ -#define BR_PDB_DACINTCn_TOE(x, n) (BITBAND_ACCESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_TOE)) +#define BR_PDB_DACINTCn_TOE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_TOE))) /*! @brief Format value for bitfield PDB_DACINTCn_TOE. */ #define BF_PDB_DACINTCn_TOE(v) ((uint32_t)((uint32_t)(v) << BP_PDB_DACINTCn_TOE) & BM_PDB_DACINTCn_TOE) /*! @brief Set the TOE field to a new value. */ -#define BW_PDB_DACINTCn_TOE(x, n, v) (BITBAND_ACCESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_TOE) = (v)) +#define BW_PDB_DACINTCn_TOE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_TOE), v)) /*@}*/ /*! @@ -1074,13 +1081,13 @@ #define BS_PDB_DACINTCn_EXT (1U) /*!< Bit field size in bits for PDB_DACINTCn_EXT. */ /*! @brief Read current value of the PDB_DACINTCn_EXT field. */ -#define BR_PDB_DACINTCn_EXT(x, n) (BITBAND_ACCESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_EXT)) +#define BR_PDB_DACINTCn_EXT(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_EXT))) /*! @brief Format value for bitfield PDB_DACINTCn_EXT. */ #define BF_PDB_DACINTCn_EXT(v) ((uint32_t)((uint32_t)(v) << BP_PDB_DACINTCn_EXT) & BM_PDB_DACINTCn_EXT) /*! @brief Set the EXT field to a new value. */ -#define BW_PDB_DACINTCn_EXT(x, n, v) (BITBAND_ACCESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_EXT) = (v)) +#define BW_PDB_DACINTCn_EXT(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_EXT), v)) /*@}*/ /******************************************************************************* * HW_PDB_DACINTn - DAC Interval n register @@ -1110,8 +1117,8 @@ #define HW_PDB_DACINTn_ADDR(x, n) ((x) + 0x154U + (0x8U * (n))) #define HW_PDB_DACINTn(x, n) (*(__IO hw_pdb_dacintn_t *) HW_PDB_DACINTn_ADDR(x, n)) -#define HW_PDB_DACINTn_RD(x, n) (HW_PDB_DACINTn(x, n).U) -#define HW_PDB_DACINTn_WR(x, n, v) (HW_PDB_DACINTn(x, n).U = (v)) +#define HW_PDB_DACINTn_RD(x, n) (ADDRESS_READ(hw_pdb_dacintn_t, HW_PDB_DACINTn_ADDR(x, n))) +#define HW_PDB_DACINTn_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_dacintn_t, HW_PDB_DACINTn_ADDR(x, n), v)) #define HW_PDB_DACINTn_SET(x, n, v) (HW_PDB_DACINTn_WR(x, n, HW_PDB_DACINTn_RD(x, n) | (v))) #define HW_PDB_DACINTn_CLR(x, n, v) (HW_PDB_DACINTn_WR(x, n, HW_PDB_DACINTn_RD(x, n) & ~(v))) #define HW_PDB_DACINTn_TOG(x, n, v) (HW_PDB_DACINTn_WR(x, n, HW_PDB_DACINTn_RD(x, n) ^ (v))) @@ -1135,7 +1142,7 @@ #define BS_PDB_DACINTn_INT (16U) /*!< Bit field size in bits for PDB_DACINTn_INT. */ /*! @brief Read current value of the PDB_DACINTn_INT field. */ -#define BR_PDB_DACINTn_INT(x, n) (HW_PDB_DACINTn(x, n).B.INT) +#define BR_PDB_DACINTn_INT(x, n) (UNION_READ(hw_pdb_dacintn_t, HW_PDB_DACINTn_ADDR(x, n), U, B.INT)) /*! @brief Format value for bitfield PDB_DACINTn_INT. */ #define BF_PDB_DACINTn_INT(v) ((uint32_t)((uint32_t)(v) << BP_PDB_DACINTn_INT) & BM_PDB_DACINTn_INT) @@ -1170,8 +1177,8 @@ #define HW_PDB_POEN_ADDR(x) ((x) + 0x190U) #define HW_PDB_POEN(x) (*(__IO hw_pdb_poen_t *) HW_PDB_POEN_ADDR(x)) -#define HW_PDB_POEN_RD(x) (HW_PDB_POEN(x).U) -#define HW_PDB_POEN_WR(x, v) (HW_PDB_POEN(x).U = (v)) +#define HW_PDB_POEN_RD(x) (ADDRESS_READ(hw_pdb_poen_t, HW_PDB_POEN_ADDR(x))) +#define HW_PDB_POEN_WR(x, v) (ADDRESS_WRITE(hw_pdb_poen_t, HW_PDB_POEN_ADDR(x), v)) #define HW_PDB_POEN_SET(x, v) (HW_PDB_POEN_WR(x, HW_PDB_POEN_RD(x) | (v))) #define HW_PDB_POEN_CLR(x, v) (HW_PDB_POEN_WR(x, HW_PDB_POEN_RD(x) & ~(v))) #define HW_PDB_POEN_TOG(x, v) (HW_PDB_POEN_WR(x, HW_PDB_POEN_RD(x) ^ (v))) @@ -1196,7 +1203,7 @@ #define BS_PDB_POEN_POEN (8U) /*!< Bit field size in bits for PDB_POEN_POEN. */ /*! @brief Read current value of the PDB_POEN_POEN field. */ -#define BR_PDB_POEN_POEN(x) (HW_PDB_POEN(x).B.POEN) +#define BR_PDB_POEN_POEN(x) (UNION_READ(hw_pdb_poen_t, HW_PDB_POEN_ADDR(x), U, B.POEN)) /*! @brief Format value for bitfield PDB_POEN_POEN. */ #define BF_PDB_POEN_POEN(v) ((uint32_t)((uint32_t)(v) << BP_PDB_POEN_POEN) & BM_PDB_POEN_POEN) @@ -1233,8 +1240,8 @@ #define HW_PDB_POnDLY_ADDR(x, n) ((x) + 0x194U + (0x4U * (n))) #define HW_PDB_POnDLY(x, n) (*(__IO hw_pdb_pondly_t *) HW_PDB_POnDLY_ADDR(x, n)) -#define HW_PDB_POnDLY_RD(x, n) (HW_PDB_POnDLY(x, n).U) -#define HW_PDB_POnDLY_WR(x, n, v) (HW_PDB_POnDLY(x, n).U = (v)) +#define HW_PDB_POnDLY_RD(x, n) (ADDRESS_READ(hw_pdb_pondly_t, HW_PDB_POnDLY_ADDR(x, n))) +#define HW_PDB_POnDLY_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_pondly_t, HW_PDB_POnDLY_ADDR(x, n), v)) #define HW_PDB_POnDLY_SET(x, n, v) (HW_PDB_POnDLY_WR(x, n, HW_PDB_POnDLY_RD(x, n) | (v))) #define HW_PDB_POnDLY_CLR(x, n, v) (HW_PDB_POnDLY_WR(x, n, HW_PDB_POnDLY_RD(x, n) & ~(v))) #define HW_PDB_POnDLY_TOG(x, n, v) (HW_PDB_POnDLY_WR(x, n, HW_PDB_POnDLY_RD(x, n) ^ (v))) @@ -1257,7 +1264,7 @@ #define BS_PDB_POnDLY_DLY2 (16U) /*!< Bit field size in bits for PDB_POnDLY_DLY2. */ /*! @brief Read current value of the PDB_POnDLY_DLY2 field. */ -#define BR_PDB_POnDLY_DLY2(x, n) (HW_PDB_POnDLY(x, n).B.DLY2) +#define BR_PDB_POnDLY_DLY2(x, n) (UNION_READ(hw_pdb_pondly_t, HW_PDB_POnDLY_ADDR(x, n), U, B.DLY2)) /*! @brief Format value for bitfield PDB_POnDLY_DLY2. */ #define BF_PDB_POnDLY_DLY2(v) ((uint32_t)((uint32_t)(v) << BP_PDB_POnDLY_DLY2) & BM_PDB_POnDLY_DLY2) @@ -1279,7 +1286,7 @@ #define BS_PDB_POnDLY_DLY1 (16U) /*!< Bit field size in bits for PDB_POnDLY_DLY1. */ /*! @brief Read current value of the PDB_POnDLY_DLY1 field. */ -#define BR_PDB_POnDLY_DLY1(x, n) (HW_PDB_POnDLY(x, n).B.DLY1) +#define BR_PDB_POnDLY_DLY1(x, n) (UNION_READ(hw_pdb_pondly_t, HW_PDB_POnDLY_ADDR(x, n), U, B.DLY1)) /*! @brief Format value for bitfield PDB_POnDLY_DLY1. */ #define BF_PDB_POnDLY_DLY1(v) ((uint32_t)((uint32_t)(v) << BP_PDB_POnDLY_DLY1) & BM_PDB_POnDLY_DLY1)
--- a/hal/device/device/MK64F12/MK64F12_pit.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_pit.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -130,8 +137,8 @@ #define HW_PIT_MCR_ADDR(x) ((x) + 0x0U) #define HW_PIT_MCR(x) (*(__IO hw_pit_mcr_t *) HW_PIT_MCR_ADDR(x)) -#define HW_PIT_MCR_RD(x) (HW_PIT_MCR(x).U) -#define HW_PIT_MCR_WR(x, v) (HW_PIT_MCR(x).U = (v)) +#define HW_PIT_MCR_RD(x) (ADDRESS_READ(hw_pit_mcr_t, HW_PIT_MCR_ADDR(x))) +#define HW_PIT_MCR_WR(x, v) (ADDRESS_WRITE(hw_pit_mcr_t, HW_PIT_MCR_ADDR(x), v)) #define HW_PIT_MCR_SET(x, v) (HW_PIT_MCR_WR(x, HW_PIT_MCR_RD(x) | (v))) #define HW_PIT_MCR_CLR(x, v) (HW_PIT_MCR_WR(x, HW_PIT_MCR_RD(x) & ~(v))) #define HW_PIT_MCR_TOG(x, v) (HW_PIT_MCR_WR(x, HW_PIT_MCR_RD(x) ^ (v))) @@ -156,13 +163,13 @@ #define BS_PIT_MCR_FRZ (1U) /*!< Bit field size in bits for PIT_MCR_FRZ. */ /*! @brief Read current value of the PIT_MCR_FRZ field. */ -#define BR_PIT_MCR_FRZ(x) (BITBAND_ACCESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_FRZ)) +#define BR_PIT_MCR_FRZ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_FRZ))) /*! @brief Format value for bitfield PIT_MCR_FRZ. */ #define BF_PIT_MCR_FRZ(v) ((uint32_t)((uint32_t)(v) << BP_PIT_MCR_FRZ) & BM_PIT_MCR_FRZ) /*! @brief Set the FRZ field to a new value. */ -#define BW_PIT_MCR_FRZ(x, v) (BITBAND_ACCESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_FRZ) = (v)) +#define BW_PIT_MCR_FRZ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_FRZ), v)) /*@}*/ /*! @@ -181,13 +188,13 @@ #define BS_PIT_MCR_MDIS (1U) /*!< Bit field size in bits for PIT_MCR_MDIS. */ /*! @brief Read current value of the PIT_MCR_MDIS field. */ -#define BR_PIT_MCR_MDIS(x) (BITBAND_ACCESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_MDIS)) +#define BR_PIT_MCR_MDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_MDIS))) /*! @brief Format value for bitfield PIT_MCR_MDIS. */ #define BF_PIT_MCR_MDIS(v) ((uint32_t)((uint32_t)(v) << BP_PIT_MCR_MDIS) & BM_PIT_MCR_MDIS) /*! @brief Set the MDIS field to a new value. */ -#define BW_PIT_MCR_MDIS(x, v) (BITBAND_ACCESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_MDIS) = (v)) +#define BW_PIT_MCR_MDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_MDIS), v)) /*@}*/ /******************************************************************************* @@ -219,8 +226,8 @@ #define HW_PIT_LDVALn_ADDR(x, n) ((x) + 0x100U + (0x10U * (n))) #define HW_PIT_LDVALn(x, n) (*(__IO hw_pit_ldvaln_t *) HW_PIT_LDVALn_ADDR(x, n)) -#define HW_PIT_LDVALn_RD(x, n) (HW_PIT_LDVALn(x, n).U) -#define HW_PIT_LDVALn_WR(x, n, v) (HW_PIT_LDVALn(x, n).U = (v)) +#define HW_PIT_LDVALn_RD(x, n) (ADDRESS_READ(hw_pit_ldvaln_t, HW_PIT_LDVALn_ADDR(x, n))) +#define HW_PIT_LDVALn_WR(x, n, v) (ADDRESS_WRITE(hw_pit_ldvaln_t, HW_PIT_LDVALn_ADDR(x, n), v)) #define HW_PIT_LDVALn_SET(x, n, v) (HW_PIT_LDVALn_WR(x, n, HW_PIT_LDVALn_RD(x, n) | (v))) #define HW_PIT_LDVALn_CLR(x, n, v) (HW_PIT_LDVALn_WR(x, n, HW_PIT_LDVALn_RD(x, n) & ~(v))) #define HW_PIT_LDVALn_TOG(x, n, v) (HW_PIT_LDVALn_WR(x, n, HW_PIT_LDVALn_RD(x, n) ^ (v))) @@ -282,7 +289,7 @@ #define HW_PIT_CVALn_ADDR(x, n) ((x) + 0x104U + (0x10U * (n))) #define HW_PIT_CVALn(x, n) (*(__I hw_pit_cvaln_t *) HW_PIT_CVALn_ADDR(x, n)) -#define HW_PIT_CVALn_RD(x, n) (HW_PIT_CVALn(x, n).U) +#define HW_PIT_CVALn_RD(x, n) (ADDRESS_READ(hw_pit_cvaln_t, HW_PIT_CVALn_ADDR(x, n))) /*@}*/ /* @@ -336,8 +343,8 @@ #define HW_PIT_TCTRLn_ADDR(x, n) ((x) + 0x108U + (0x10U * (n))) #define HW_PIT_TCTRLn(x, n) (*(__IO hw_pit_tctrln_t *) HW_PIT_TCTRLn_ADDR(x, n)) -#define HW_PIT_TCTRLn_RD(x, n) (HW_PIT_TCTRLn(x, n).U) -#define HW_PIT_TCTRLn_WR(x, n, v) (HW_PIT_TCTRLn(x, n).U = (v)) +#define HW_PIT_TCTRLn_RD(x, n) (ADDRESS_READ(hw_pit_tctrln_t, HW_PIT_TCTRLn_ADDR(x, n))) +#define HW_PIT_TCTRLn_WR(x, n, v) (ADDRESS_WRITE(hw_pit_tctrln_t, HW_PIT_TCTRLn_ADDR(x, n), v)) #define HW_PIT_TCTRLn_SET(x, n, v) (HW_PIT_TCTRLn_WR(x, n, HW_PIT_TCTRLn_RD(x, n) | (v))) #define HW_PIT_TCTRLn_CLR(x, n, v) (HW_PIT_TCTRLn_WR(x, n, HW_PIT_TCTRLn_RD(x, n) & ~(v))) #define HW_PIT_TCTRLn_TOG(x, n, v) (HW_PIT_TCTRLn_WR(x, n, HW_PIT_TCTRLn_RD(x, n) ^ (v))) @@ -362,13 +369,13 @@ #define BS_PIT_TCTRLn_TEN (1U) /*!< Bit field size in bits for PIT_TCTRLn_TEN. */ /*! @brief Read current value of the PIT_TCTRLn_TEN field. */ -#define BR_PIT_TCTRLn_TEN(x, n) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TEN)) +#define BR_PIT_TCTRLn_TEN(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TEN))) /*! @brief Format value for bitfield PIT_TCTRLn_TEN. */ #define BF_PIT_TCTRLn_TEN(v) ((uint32_t)((uint32_t)(v) << BP_PIT_TCTRLn_TEN) & BM_PIT_TCTRLn_TEN) /*! @brief Set the TEN field to a new value. */ -#define BW_PIT_TCTRLn_TEN(x, n, v) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TEN) = (v)) +#define BW_PIT_TCTRLn_TEN(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TEN), v)) /*@}*/ /*! @@ -388,13 +395,13 @@ #define BS_PIT_TCTRLn_TIE (1U) /*!< Bit field size in bits for PIT_TCTRLn_TIE. */ /*! @brief Read current value of the PIT_TCTRLn_TIE field. */ -#define BR_PIT_TCTRLn_TIE(x, n) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TIE)) +#define BR_PIT_TCTRLn_TIE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TIE))) /*! @brief Format value for bitfield PIT_TCTRLn_TIE. */ #define BF_PIT_TCTRLn_TIE(v) ((uint32_t)((uint32_t)(v) << BP_PIT_TCTRLn_TIE) & BM_PIT_TCTRLn_TIE) /*! @brief Set the TIE field to a new value. */ -#define BW_PIT_TCTRLn_TIE(x, n, v) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TIE) = (v)) +#define BW_PIT_TCTRLn_TIE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TIE), v)) /*@}*/ /*! @@ -414,13 +421,13 @@ #define BS_PIT_TCTRLn_CHN (1U) /*!< Bit field size in bits for PIT_TCTRLn_CHN. */ /*! @brief Read current value of the PIT_TCTRLn_CHN field. */ -#define BR_PIT_TCTRLn_CHN(x, n) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_CHN)) +#define BR_PIT_TCTRLn_CHN(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_CHN))) /*! @brief Format value for bitfield PIT_TCTRLn_CHN. */ #define BF_PIT_TCTRLn_CHN(v) ((uint32_t)((uint32_t)(v) << BP_PIT_TCTRLn_CHN) & BM_PIT_TCTRLn_CHN) /*! @brief Set the CHN field to a new value. */ -#define BW_PIT_TCTRLn_CHN(x, n, v) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_CHN) = (v)) +#define BW_PIT_TCTRLn_CHN(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_CHN), v)) /*@}*/ /******************************************************************************* * HW_PIT_TFLGn - Timer Flag Register @@ -452,8 +459,8 @@ #define HW_PIT_TFLGn_ADDR(x, n) ((x) + 0x10CU + (0x10U * (n))) #define HW_PIT_TFLGn(x, n) (*(__IO hw_pit_tflgn_t *) HW_PIT_TFLGn_ADDR(x, n)) -#define HW_PIT_TFLGn_RD(x, n) (HW_PIT_TFLGn(x, n).U) -#define HW_PIT_TFLGn_WR(x, n, v) (HW_PIT_TFLGn(x, n).U = (v)) +#define HW_PIT_TFLGn_RD(x, n) (ADDRESS_READ(hw_pit_tflgn_t, HW_PIT_TFLGn_ADDR(x, n))) +#define HW_PIT_TFLGn_WR(x, n, v) (ADDRESS_WRITE(hw_pit_tflgn_t, HW_PIT_TFLGn_ADDR(x, n), v)) #define HW_PIT_TFLGn_SET(x, n, v) (HW_PIT_TFLGn_WR(x, n, HW_PIT_TFLGn_RD(x, n) | (v))) #define HW_PIT_TFLGn_CLR(x, n, v) (HW_PIT_TFLGn_WR(x, n, HW_PIT_TFLGn_RD(x, n) & ~(v))) #define HW_PIT_TFLGn_TOG(x, n, v) (HW_PIT_TFLGn_WR(x, n, HW_PIT_TFLGn_RD(x, n) ^ (v))) @@ -480,13 +487,13 @@ #define BS_PIT_TFLGn_TIF (1U) /*!< Bit field size in bits for PIT_TFLGn_TIF. */ /*! @brief Read current value of the PIT_TFLGn_TIF field. */ -#define BR_PIT_TFLGn_TIF(x, n) (BITBAND_ACCESS32(HW_PIT_TFLGn_ADDR(x, n), BP_PIT_TFLGn_TIF)) +#define BR_PIT_TFLGn_TIF(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_TFLGn_ADDR(x, n), BP_PIT_TFLGn_TIF))) /*! @brief Format value for bitfield PIT_TFLGn_TIF. */ #define BF_PIT_TFLGn_TIF(v) ((uint32_t)((uint32_t)(v) << BP_PIT_TFLGn_TIF) & BM_PIT_TFLGn_TIF) /*! @brief Set the TIF field to a new value. */ -#define BW_PIT_TFLGn_TIF(x, n, v) (BITBAND_ACCESS32(HW_PIT_TFLGn_ADDR(x, n), BP_PIT_TFLGn_TIF) = (v)) +#define BW_PIT_TFLGn_TIF(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_TFLGn_ADDR(x, n), BP_PIT_TFLGn_TIF), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_pmc.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_pmc.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -140,8 +147,8 @@ #define HW_PMC_LVDSC1_ADDR(x) ((x) + 0x0U) #define HW_PMC_LVDSC1(x) (*(__IO hw_pmc_lvdsc1_t *) HW_PMC_LVDSC1_ADDR(x)) -#define HW_PMC_LVDSC1_RD(x) (HW_PMC_LVDSC1(x).U) -#define HW_PMC_LVDSC1_WR(x, v) (HW_PMC_LVDSC1(x).U = (v)) +#define HW_PMC_LVDSC1_RD(x) (ADDRESS_READ(hw_pmc_lvdsc1_t, HW_PMC_LVDSC1_ADDR(x))) +#define HW_PMC_LVDSC1_WR(x, v) (ADDRESS_WRITE(hw_pmc_lvdsc1_t, HW_PMC_LVDSC1_ADDR(x), v)) #define HW_PMC_LVDSC1_SET(x, v) (HW_PMC_LVDSC1_WR(x, HW_PMC_LVDSC1_RD(x) | (v))) #define HW_PMC_LVDSC1_CLR(x, v) (HW_PMC_LVDSC1_WR(x, HW_PMC_LVDSC1_RD(x) & ~(v))) #define HW_PMC_LVDSC1_TOG(x, v) (HW_PMC_LVDSC1_WR(x, HW_PMC_LVDSC1_RD(x) ^ (v))) @@ -168,7 +175,7 @@ #define BS_PMC_LVDSC1_LVDV (2U) /*!< Bit field size in bits for PMC_LVDSC1_LVDV. */ /*! @brief Read current value of the PMC_LVDSC1_LVDV field. */ -#define BR_PMC_LVDSC1_LVDV(x) (HW_PMC_LVDSC1(x).B.LVDV) +#define BR_PMC_LVDSC1_LVDV(x) (UNION_READ(hw_pmc_lvdsc1_t, HW_PMC_LVDSC1_ADDR(x), U, B.LVDV)) /*! @brief Format value for bitfield PMC_LVDSC1_LVDV. */ #define BF_PMC_LVDSC1_LVDV(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC1_LVDV) & BM_PMC_LVDSC1_LVDV) @@ -193,13 +200,13 @@ #define BS_PMC_LVDSC1_LVDRE (1U) /*!< Bit field size in bits for PMC_LVDSC1_LVDRE. */ /*! @brief Read current value of the PMC_LVDSC1_LVDRE field. */ -#define BR_PMC_LVDSC1_LVDRE(x) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDRE)) +#define BR_PMC_LVDSC1_LVDRE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDRE))) /*! @brief Format value for bitfield PMC_LVDSC1_LVDRE. */ #define BF_PMC_LVDSC1_LVDRE(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC1_LVDRE) & BM_PMC_LVDSC1_LVDRE) /*! @brief Set the LVDRE field to a new value. */ -#define BW_PMC_LVDSC1_LVDRE(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDRE) = (v)) +#define BW_PMC_LVDSC1_LVDRE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDRE), v)) /*@}*/ /*! @@ -217,13 +224,13 @@ #define BS_PMC_LVDSC1_LVDIE (1U) /*!< Bit field size in bits for PMC_LVDSC1_LVDIE. */ /*! @brief Read current value of the PMC_LVDSC1_LVDIE field. */ -#define BR_PMC_LVDSC1_LVDIE(x) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDIE)) +#define BR_PMC_LVDSC1_LVDIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDIE))) /*! @brief Format value for bitfield PMC_LVDSC1_LVDIE. */ #define BF_PMC_LVDSC1_LVDIE(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC1_LVDIE) & BM_PMC_LVDSC1_LVDIE) /*! @brief Set the LVDIE field to a new value. */ -#define BW_PMC_LVDSC1_LVDIE(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDIE) = (v)) +#define BW_PMC_LVDSC1_LVDIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDIE), v)) /*@}*/ /*! @@ -241,7 +248,7 @@ #define BF_PMC_LVDSC1_LVDACK(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC1_LVDACK) & BM_PMC_LVDSC1_LVDACK) /*! @brief Set the LVDACK field to a new value. */ -#define BW_PMC_LVDSC1_LVDACK(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDACK) = (v)) +#define BW_PMC_LVDSC1_LVDACK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDACK), v)) /*@}*/ /*! @@ -259,7 +266,7 @@ #define BS_PMC_LVDSC1_LVDF (1U) /*!< Bit field size in bits for PMC_LVDSC1_LVDF. */ /*! @brief Read current value of the PMC_LVDSC1_LVDF field. */ -#define BR_PMC_LVDSC1_LVDF(x) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDF)) +#define BR_PMC_LVDSC1_LVDF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDF))) /*@}*/ /******************************************************************************* @@ -299,8 +306,8 @@ #define HW_PMC_LVDSC2_ADDR(x) ((x) + 0x1U) #define HW_PMC_LVDSC2(x) (*(__IO hw_pmc_lvdsc2_t *) HW_PMC_LVDSC2_ADDR(x)) -#define HW_PMC_LVDSC2_RD(x) (HW_PMC_LVDSC2(x).U) -#define HW_PMC_LVDSC2_WR(x, v) (HW_PMC_LVDSC2(x).U = (v)) +#define HW_PMC_LVDSC2_RD(x) (ADDRESS_READ(hw_pmc_lvdsc2_t, HW_PMC_LVDSC2_ADDR(x))) +#define HW_PMC_LVDSC2_WR(x, v) (ADDRESS_WRITE(hw_pmc_lvdsc2_t, HW_PMC_LVDSC2_ADDR(x), v)) #define HW_PMC_LVDSC2_SET(x, v) (HW_PMC_LVDSC2_WR(x, HW_PMC_LVDSC2_RD(x) | (v))) #define HW_PMC_LVDSC2_CLR(x, v) (HW_PMC_LVDSC2_WR(x, HW_PMC_LVDSC2_RD(x) & ~(v))) #define HW_PMC_LVDSC2_TOG(x, v) (HW_PMC_LVDSC2_WR(x, HW_PMC_LVDSC2_RD(x) ^ (v))) @@ -328,7 +335,7 @@ #define BS_PMC_LVDSC2_LVWV (2U) /*!< Bit field size in bits for PMC_LVDSC2_LVWV. */ /*! @brief Read current value of the PMC_LVDSC2_LVWV field. */ -#define BR_PMC_LVDSC2_LVWV(x) (HW_PMC_LVDSC2(x).B.LVWV) +#define BR_PMC_LVDSC2_LVWV(x) (UNION_READ(hw_pmc_lvdsc2_t, HW_PMC_LVDSC2_ADDR(x), U, B.LVWV)) /*! @brief Format value for bitfield PMC_LVDSC2_LVWV. */ #define BF_PMC_LVDSC2_LVWV(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC2_LVWV) & BM_PMC_LVDSC2_LVWV) @@ -352,13 +359,13 @@ #define BS_PMC_LVDSC2_LVWIE (1U) /*!< Bit field size in bits for PMC_LVDSC2_LVWIE. */ /*! @brief Read current value of the PMC_LVDSC2_LVWIE field. */ -#define BR_PMC_LVDSC2_LVWIE(x) (BITBAND_ACCESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWIE)) +#define BR_PMC_LVDSC2_LVWIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWIE))) /*! @brief Format value for bitfield PMC_LVDSC2_LVWIE. */ #define BF_PMC_LVDSC2_LVWIE(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC2_LVWIE) & BM_PMC_LVDSC2_LVWIE) /*! @brief Set the LVWIE field to a new value. */ -#define BW_PMC_LVDSC2_LVWIE(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWIE) = (v)) +#define BW_PMC_LVDSC2_LVWIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWIE), v)) /*@}*/ /*! @@ -376,7 +383,7 @@ #define BF_PMC_LVDSC2_LVWACK(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC2_LVWACK) & BM_PMC_LVDSC2_LVWACK) /*! @brief Set the LVWACK field to a new value. */ -#define BW_PMC_LVDSC2_LVWACK(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWACK) = (v)) +#define BW_PMC_LVDSC2_LVWACK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWACK), v)) /*@}*/ /*! @@ -398,7 +405,7 @@ #define BS_PMC_LVDSC2_LVWF (1U) /*!< Bit field size in bits for PMC_LVDSC2_LVWF. */ /*! @brief Read current value of the PMC_LVDSC2_LVWF field. */ -#define BR_PMC_LVDSC2_LVWF(x) (BITBAND_ACCESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWF)) +#define BR_PMC_LVDSC2_LVWF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWF))) /*@}*/ /******************************************************************************* @@ -438,8 +445,8 @@ #define HW_PMC_REGSC_ADDR(x) ((x) + 0x2U) #define HW_PMC_REGSC(x) (*(__IO hw_pmc_regsc_t *) HW_PMC_REGSC_ADDR(x)) -#define HW_PMC_REGSC_RD(x) (HW_PMC_REGSC(x).U) -#define HW_PMC_REGSC_WR(x, v) (HW_PMC_REGSC(x).U = (v)) +#define HW_PMC_REGSC_RD(x) (ADDRESS_READ(hw_pmc_regsc_t, HW_PMC_REGSC_ADDR(x))) +#define HW_PMC_REGSC_WR(x, v) (ADDRESS_WRITE(hw_pmc_regsc_t, HW_PMC_REGSC_ADDR(x), v)) #define HW_PMC_REGSC_SET(x, v) (HW_PMC_REGSC_WR(x, HW_PMC_REGSC_RD(x) | (v))) #define HW_PMC_REGSC_CLR(x, v) (HW_PMC_REGSC_WR(x, HW_PMC_REGSC_RD(x) & ~(v))) #define HW_PMC_REGSC_TOG(x, v) (HW_PMC_REGSC_WR(x, HW_PMC_REGSC_RD(x) ^ (v))) @@ -464,13 +471,13 @@ #define BS_PMC_REGSC_BGBE (1U) /*!< Bit field size in bits for PMC_REGSC_BGBE. */ /*! @brief Read current value of the PMC_REGSC_BGBE field. */ -#define BR_PMC_REGSC_BGBE(x) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGBE)) +#define BR_PMC_REGSC_BGBE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGBE))) /*! @brief Format value for bitfield PMC_REGSC_BGBE. */ #define BF_PMC_REGSC_BGBE(v) ((uint8_t)((uint8_t)(v) << BP_PMC_REGSC_BGBE) & BM_PMC_REGSC_BGBE) /*! @brief Set the BGBE field to a new value. */ -#define BW_PMC_REGSC_BGBE(x, v) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGBE) = (v)) +#define BW_PMC_REGSC_BGBE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGBE), v)) /*@}*/ /*! @@ -489,7 +496,7 @@ #define BS_PMC_REGSC_REGONS (1U) /*!< Bit field size in bits for PMC_REGSC_REGONS. */ /*! @brief Read current value of the PMC_REGSC_REGONS field. */ -#define BR_PMC_REGSC_REGONS(x) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_REGONS)) +#define BR_PMC_REGSC_REGONS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_REGONS))) /*@}*/ /*! @@ -513,13 +520,13 @@ #define BS_PMC_REGSC_ACKISO (1U) /*!< Bit field size in bits for PMC_REGSC_ACKISO. */ /*! @brief Read current value of the PMC_REGSC_ACKISO field. */ -#define BR_PMC_REGSC_ACKISO(x) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_ACKISO)) +#define BR_PMC_REGSC_ACKISO(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_ACKISO))) /*! @brief Format value for bitfield PMC_REGSC_ACKISO. */ #define BF_PMC_REGSC_ACKISO(v) ((uint8_t)((uint8_t)(v) << BP_PMC_REGSC_ACKISO) & BM_PMC_REGSC_ACKISO) /*! @brief Set the ACKISO field to a new value. */ -#define BW_PMC_REGSC_ACKISO(x, v) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_ACKISO) = (v)) +#define BW_PMC_REGSC_ACKISO(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_ACKISO), v)) /*@}*/ /*! @@ -541,13 +548,13 @@ #define BS_PMC_REGSC_BGEN (1U) /*!< Bit field size in bits for PMC_REGSC_BGEN. */ /*! @brief Read current value of the PMC_REGSC_BGEN field. */ -#define BR_PMC_REGSC_BGEN(x) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGEN)) +#define BR_PMC_REGSC_BGEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGEN))) /*! @brief Format value for bitfield PMC_REGSC_BGEN. */ #define BF_PMC_REGSC_BGEN(v) ((uint8_t)((uint8_t)(v) << BP_PMC_REGSC_BGEN) & BM_PMC_REGSC_BGEN) /*! @brief Set the BGEN field to a new value. */ -#define BW_PMC_REGSC_BGEN(x, v) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGEN) = (v)) +#define BW_PMC_REGSC_BGEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGEN), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_port.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_port.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -154,8 +161,8 @@ #define HW_PORT_PCRn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n))) #define HW_PORT_PCRn(x, n) (*(__IO hw_port_pcrn_t *) HW_PORT_PCRn_ADDR(x, n)) -#define HW_PORT_PCRn_RD(x, n) (HW_PORT_PCRn(x, n).U) -#define HW_PORT_PCRn_WR(x, n, v) (HW_PORT_PCRn(x, n).U = (v)) +#define HW_PORT_PCRn_RD(x, n) (ADDRESS_READ(hw_port_pcrn_t, HW_PORT_PCRn_ADDR(x, n))) +#define HW_PORT_PCRn_WR(x, n, v) (ADDRESS_WRITE(hw_port_pcrn_t, HW_PORT_PCRn_ADDR(x, n), v)) #define HW_PORT_PCRn_SET(x, n, v) (HW_PORT_PCRn_WR(x, n, HW_PORT_PCRn_RD(x, n) | (v))) #define HW_PORT_PCRn_CLR(x, n, v) (HW_PORT_PCRn_WR(x, n, HW_PORT_PCRn_RD(x, n) & ~(v))) #define HW_PORT_PCRn_TOG(x, n, v) (HW_PORT_PCRn_WR(x, n, HW_PORT_PCRn_RD(x, n) ^ (v))) @@ -182,13 +189,13 @@ #define BS_PORT_PCRn_PS (1U) /*!< Bit field size in bits for PORT_PCRn_PS. */ /*! @brief Read current value of the PORT_PCRn_PS field. */ -#define BR_PORT_PCRn_PS(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PS)) +#define BR_PORT_PCRn_PS(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PS))) /*! @brief Format value for bitfield PORT_PCRn_PS. */ #define BF_PORT_PCRn_PS(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_PS) & BM_PORT_PCRn_PS) /*! @brief Set the PS field to a new value. */ -#define BW_PORT_PCRn_PS(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PS) = (v)) +#define BW_PORT_PCRn_PS(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PS), v)) /*@}*/ /*! @@ -208,13 +215,13 @@ #define BS_PORT_PCRn_PE (1U) /*!< Bit field size in bits for PORT_PCRn_PE. */ /*! @brief Read current value of the PORT_PCRn_PE field. */ -#define BR_PORT_PCRn_PE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PE)) +#define BR_PORT_PCRn_PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PE))) /*! @brief Format value for bitfield PORT_PCRn_PE. */ #define BF_PORT_PCRn_PE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_PE) & BM_PORT_PCRn_PE) /*! @brief Set the PE field to a new value. */ -#define BW_PORT_PCRn_PE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PE) = (v)) +#define BW_PORT_PCRn_PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PE), v)) /*@}*/ /*! @@ -234,13 +241,13 @@ #define BS_PORT_PCRn_SRE (1U) /*!< Bit field size in bits for PORT_PCRn_SRE. */ /*! @brief Read current value of the PORT_PCRn_SRE field. */ -#define BR_PORT_PCRn_SRE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_SRE)) +#define BR_PORT_PCRn_SRE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_SRE))) /*! @brief Format value for bitfield PORT_PCRn_SRE. */ #define BF_PORT_PCRn_SRE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_SRE) & BM_PORT_PCRn_SRE) /*! @brief Set the SRE field to a new value. */ -#define BW_PORT_PCRn_SRE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_SRE) = (v)) +#define BW_PORT_PCRn_SRE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_SRE), v)) /*@}*/ /*! @@ -260,13 +267,13 @@ #define BS_PORT_PCRn_PFE (1U) /*!< Bit field size in bits for PORT_PCRn_PFE. */ /*! @brief Read current value of the PORT_PCRn_PFE field. */ -#define BR_PORT_PCRn_PFE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PFE)) +#define BR_PORT_PCRn_PFE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PFE))) /*! @brief Format value for bitfield PORT_PCRn_PFE. */ #define BF_PORT_PCRn_PFE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_PFE) & BM_PORT_PCRn_PFE) /*! @brief Set the PFE field to a new value. */ -#define BW_PORT_PCRn_PFE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PFE) = (v)) +#define BW_PORT_PCRn_PFE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PFE), v)) /*@}*/ /*! @@ -285,13 +292,13 @@ #define BS_PORT_PCRn_ODE (1U) /*!< Bit field size in bits for PORT_PCRn_ODE. */ /*! @brief Read current value of the PORT_PCRn_ODE field. */ -#define BR_PORT_PCRn_ODE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ODE)) +#define BR_PORT_PCRn_ODE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ODE))) /*! @brief Format value for bitfield PORT_PCRn_ODE. */ #define BF_PORT_PCRn_ODE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_ODE) & BM_PORT_PCRn_ODE) /*! @brief Set the ODE field to a new value. */ -#define BW_PORT_PCRn_ODE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ODE) = (v)) +#define BW_PORT_PCRn_ODE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ODE), v)) /*@}*/ /*! @@ -311,13 +318,13 @@ #define BS_PORT_PCRn_DSE (1U) /*!< Bit field size in bits for PORT_PCRn_DSE. */ /*! @brief Read current value of the PORT_PCRn_DSE field. */ -#define BR_PORT_PCRn_DSE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_DSE)) +#define BR_PORT_PCRn_DSE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_DSE))) /*! @brief Format value for bitfield PORT_PCRn_DSE. */ #define BF_PORT_PCRn_DSE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_DSE) & BM_PORT_PCRn_DSE) /*! @brief Set the DSE field to a new value. */ -#define BW_PORT_PCRn_DSE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_DSE) = (v)) +#define BW_PORT_PCRn_DSE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_DSE), v)) /*@}*/ /*! @@ -344,7 +351,7 @@ #define BS_PORT_PCRn_MUX (3U) /*!< Bit field size in bits for PORT_PCRn_MUX. */ /*! @brief Read current value of the PORT_PCRn_MUX field. */ -#define BR_PORT_PCRn_MUX(x, n) (HW_PORT_PCRn(x, n).B.MUX) +#define BR_PORT_PCRn_MUX(x, n) (UNION_READ(hw_port_pcrn_t, HW_PORT_PCRn_ADDR(x, n), U, B.MUX)) /*! @brief Format value for bitfield PORT_PCRn_MUX. */ #define BF_PORT_PCRn_MUX(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_MUX) & BM_PORT_PCRn_MUX) @@ -367,13 +374,13 @@ #define BS_PORT_PCRn_LK (1U) /*!< Bit field size in bits for PORT_PCRn_LK. */ /*! @brief Read current value of the PORT_PCRn_LK field. */ -#define BR_PORT_PCRn_LK(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_LK)) +#define BR_PORT_PCRn_LK(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_LK))) /*! @brief Format value for bitfield PORT_PCRn_LK. */ #define BF_PORT_PCRn_LK(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_LK) & BM_PORT_PCRn_LK) /*! @brief Set the LK field to a new value. */ -#define BW_PORT_PCRn_LK(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_LK) = (v)) +#define BW_PORT_PCRn_LK(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_LK), v)) /*@}*/ /*! @@ -399,7 +406,7 @@ #define BS_PORT_PCRn_IRQC (4U) /*!< Bit field size in bits for PORT_PCRn_IRQC. */ /*! @brief Read current value of the PORT_PCRn_IRQC field. */ -#define BR_PORT_PCRn_IRQC(x, n) (HW_PORT_PCRn(x, n).B.IRQC) +#define BR_PORT_PCRn_IRQC(x, n) (UNION_READ(hw_port_pcrn_t, HW_PORT_PCRn_ADDR(x, n), U, B.IRQC)) /*! @brief Format value for bitfield PORT_PCRn_IRQC. */ #define BF_PORT_PCRn_IRQC(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_IRQC) & BM_PORT_PCRn_IRQC) @@ -428,13 +435,13 @@ #define BS_PORT_PCRn_ISF (1U) /*!< Bit field size in bits for PORT_PCRn_ISF. */ /*! @brief Read current value of the PORT_PCRn_ISF field. */ -#define BR_PORT_PCRn_ISF(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ISF)) +#define BR_PORT_PCRn_ISF(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ISF))) /*! @brief Format value for bitfield PORT_PCRn_ISF. */ #define BF_PORT_PCRn_ISF(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_ISF) & BM_PORT_PCRn_ISF) /*! @brief Set the ISF field to a new value. */ -#define BW_PORT_PCRn_ISF(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ISF) = (v)) +#define BW_PORT_PCRn_ISF(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ISF), v)) /*@}*/ /******************************************************************************* @@ -465,8 +472,8 @@ #define HW_PORT_GPCLR_ADDR(x) ((x) + 0x80U) #define HW_PORT_GPCLR(x) (*(__O hw_port_gpclr_t *) HW_PORT_GPCLR_ADDR(x)) -#define HW_PORT_GPCLR_RD(x) (HW_PORT_GPCLR(x).U) -#define HW_PORT_GPCLR_WR(x, v) (HW_PORT_GPCLR(x).U = (v)) +#define HW_PORT_GPCLR_RD(x) (ADDRESS_READ(hw_port_gpclr_t, HW_PORT_GPCLR_ADDR(x))) +#define HW_PORT_GPCLR_WR(x, v) (ADDRESS_WRITE(hw_port_gpclr_t, HW_PORT_GPCLR_ADDR(x), v)) /*@}*/ /* @@ -543,8 +550,8 @@ #define HW_PORT_GPCHR_ADDR(x) ((x) + 0x84U) #define HW_PORT_GPCHR(x) (*(__O hw_port_gpchr_t *) HW_PORT_GPCHR_ADDR(x)) -#define HW_PORT_GPCHR_RD(x) (HW_PORT_GPCHR(x).U) -#define HW_PORT_GPCHR_WR(x, v) (HW_PORT_GPCHR(x).U = (v)) +#define HW_PORT_GPCHR_RD(x) (ADDRESS_READ(hw_port_gpchr_t, HW_PORT_GPCHR_ADDR(x))) +#define HW_PORT_GPCHR_WR(x, v) (ADDRESS_WRITE(hw_port_gpchr_t, HW_PORT_GPCHR_ADDR(x), v)) /*@}*/ /* @@ -622,8 +629,8 @@ #define HW_PORT_ISFR_ADDR(x) ((x) + 0xA0U) #define HW_PORT_ISFR(x) (*(__IO hw_port_isfr_t *) HW_PORT_ISFR_ADDR(x)) -#define HW_PORT_ISFR_RD(x) (HW_PORT_ISFR(x).U) -#define HW_PORT_ISFR_WR(x, v) (HW_PORT_ISFR(x).U = (v)) +#define HW_PORT_ISFR_RD(x) (ADDRESS_READ(hw_port_isfr_t, HW_PORT_ISFR_ADDR(x))) +#define HW_PORT_ISFR_WR(x, v) (ADDRESS_WRITE(hw_port_isfr_t, HW_PORT_ISFR_ADDR(x), v)) #define HW_PORT_ISFR_SET(x, v) (HW_PORT_ISFR_WR(x, HW_PORT_ISFR_RD(x) | (v))) #define HW_PORT_ISFR_CLR(x, v) (HW_PORT_ISFR_WR(x, HW_PORT_ISFR_RD(x) & ~(v))) #define HW_PORT_ISFR_TOG(x, v) (HW_PORT_ISFR_WR(x, HW_PORT_ISFR_RD(x) ^ (v))) @@ -693,8 +700,8 @@ #define HW_PORT_DFER_ADDR(x) ((x) + 0xC0U) #define HW_PORT_DFER(x) (*(__IO hw_port_dfer_t *) HW_PORT_DFER_ADDR(x)) -#define HW_PORT_DFER_RD(x) (HW_PORT_DFER(x).U) -#define HW_PORT_DFER_WR(x, v) (HW_PORT_DFER(x).U = (v)) +#define HW_PORT_DFER_RD(x) (ADDRESS_READ(hw_port_dfer_t, HW_PORT_DFER_ADDR(x))) +#define HW_PORT_DFER_WR(x, v) (ADDRESS_WRITE(hw_port_dfer_t, HW_PORT_DFER_ADDR(x), v)) #define HW_PORT_DFER_SET(x, v) (HW_PORT_DFER_WR(x, HW_PORT_DFER_RD(x) | (v))) #define HW_PORT_DFER_CLR(x, v) (HW_PORT_DFER_WR(x, HW_PORT_DFER_RD(x) & ~(v))) #define HW_PORT_DFER_TOG(x, v) (HW_PORT_DFER_WR(x, HW_PORT_DFER_RD(x) ^ (v))) @@ -762,8 +769,8 @@ #define HW_PORT_DFCR_ADDR(x) ((x) + 0xC4U) #define HW_PORT_DFCR(x) (*(__IO hw_port_dfcr_t *) HW_PORT_DFCR_ADDR(x)) -#define HW_PORT_DFCR_RD(x) (HW_PORT_DFCR(x).U) -#define HW_PORT_DFCR_WR(x, v) (HW_PORT_DFCR(x).U = (v)) +#define HW_PORT_DFCR_RD(x) (ADDRESS_READ(hw_port_dfcr_t, HW_PORT_DFCR_ADDR(x))) +#define HW_PORT_DFCR_WR(x, v) (ADDRESS_WRITE(hw_port_dfcr_t, HW_PORT_DFCR_ADDR(x), v)) #define HW_PORT_DFCR_SET(x, v) (HW_PORT_DFCR_WR(x, HW_PORT_DFCR_RD(x) | (v))) #define HW_PORT_DFCR_CLR(x, v) (HW_PORT_DFCR_WR(x, HW_PORT_DFCR_RD(x) & ~(v))) #define HW_PORT_DFCR_TOG(x, v) (HW_PORT_DFCR_WR(x, HW_PORT_DFCR_RD(x) ^ (v))) @@ -790,13 +797,13 @@ #define BS_PORT_DFCR_CS (1U) /*!< Bit field size in bits for PORT_DFCR_CS. */ /*! @brief Read current value of the PORT_DFCR_CS field. */ -#define BR_PORT_DFCR_CS(x) (BITBAND_ACCESS32(HW_PORT_DFCR_ADDR(x), BP_PORT_DFCR_CS)) +#define BR_PORT_DFCR_CS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_DFCR_ADDR(x), BP_PORT_DFCR_CS))) /*! @brief Format value for bitfield PORT_DFCR_CS. */ #define BF_PORT_DFCR_CS(v) ((uint32_t)((uint32_t)(v) << BP_PORT_DFCR_CS) & BM_PORT_DFCR_CS) /*! @brief Set the CS field to a new value. */ -#define BW_PORT_DFCR_CS(x, v) (BITBAND_ACCESS32(HW_PORT_DFCR_ADDR(x), BP_PORT_DFCR_CS) = (v)) +#define BW_PORT_DFCR_CS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_DFCR_ADDR(x), BP_PORT_DFCR_CS), v)) /*@}*/ /******************************************************************************* @@ -828,8 +835,8 @@ #define HW_PORT_DFWR_ADDR(x) ((x) + 0xC8U) #define HW_PORT_DFWR(x) (*(__IO hw_port_dfwr_t *) HW_PORT_DFWR_ADDR(x)) -#define HW_PORT_DFWR_RD(x) (HW_PORT_DFWR(x).U) -#define HW_PORT_DFWR_WR(x, v) (HW_PORT_DFWR(x).U = (v)) +#define HW_PORT_DFWR_RD(x) (ADDRESS_READ(hw_port_dfwr_t, HW_PORT_DFWR_ADDR(x))) +#define HW_PORT_DFWR_WR(x, v) (ADDRESS_WRITE(hw_port_dfwr_t, HW_PORT_DFWR_ADDR(x), v)) #define HW_PORT_DFWR_SET(x, v) (HW_PORT_DFWR_WR(x, HW_PORT_DFWR_RD(x) | (v))) #define HW_PORT_DFWR_CLR(x, v) (HW_PORT_DFWR_WR(x, HW_PORT_DFWR_RD(x) & ~(v))) #define HW_PORT_DFWR_TOG(x, v) (HW_PORT_DFWR_WR(x, HW_PORT_DFWR_RD(x) ^ (v))) @@ -855,7 +862,7 @@ #define BS_PORT_DFWR_FILT (5U) /*!< Bit field size in bits for PORT_DFWR_FILT. */ /*! @brief Read current value of the PORT_DFWR_FILT field. */ -#define BR_PORT_DFWR_FILT(x) (HW_PORT_DFWR(x).B.FILT) +#define BR_PORT_DFWR_FILT(x) (UNION_READ(hw_port_dfwr_t, HW_PORT_DFWR_ADDR(x), U, B.FILT)) /*! @brief Format value for bitfield PORT_DFWR_FILT. */ #define BF_PORT_DFWR_FILT(v) ((uint32_t)((uint32_t)(v) << BP_PORT_DFWR_FILT) & BM_PORT_DFWR_FILT)
--- a/hal/device/device/MK64F12/MK64F12_rcm.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_rcm.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -139,7 +146,7 @@ #define HW_RCM_SRS0_ADDR(x) ((x) + 0x0U) #define HW_RCM_SRS0(x) (*(__I hw_rcm_srs0_t *) HW_RCM_SRS0_ADDR(x)) -#define HW_RCM_SRS0_RD(x) (HW_RCM_SRS0(x).U) +#define HW_RCM_SRS0_RD(x) (ADDRESS_READ(hw_rcm_srs0_t, HW_RCM_SRS0_ADDR(x))) /*@}*/ /* @@ -164,7 +171,7 @@ #define BS_RCM_SRS0_WAKEUP (1U) /*!< Bit field size in bits for RCM_SRS0_WAKEUP. */ /*! @brief Read current value of the RCM_SRS0_WAKEUP field. */ -#define BR_RCM_SRS0_WAKEUP(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_WAKEUP)) +#define BR_RCM_SRS0_WAKEUP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_WAKEUP))) /*@}*/ /*! @@ -183,7 +190,7 @@ #define BS_RCM_SRS0_LVD (1U) /*!< Bit field size in bits for RCM_SRS0_LVD. */ /*! @brief Read current value of the RCM_SRS0_LVD field. */ -#define BR_RCM_SRS0_LVD(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LVD)) +#define BR_RCM_SRS0_LVD(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LVD))) /*@}*/ /*! @@ -203,7 +210,7 @@ #define BS_RCM_SRS0_LOC (1U) /*!< Bit field size in bits for RCM_SRS0_LOC. */ /*! @brief Read current value of the RCM_SRS0_LOC field. */ -#define BR_RCM_SRS0_LOC(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LOC)) +#define BR_RCM_SRS0_LOC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LOC))) /*@}*/ /*! @@ -222,7 +229,7 @@ #define BS_RCM_SRS0_LOL (1U) /*!< Bit field size in bits for RCM_SRS0_LOL. */ /*! @brief Read current value of the RCM_SRS0_LOL field. */ -#define BR_RCM_SRS0_LOL(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LOL)) +#define BR_RCM_SRS0_LOL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LOL))) /*@}*/ /*! @@ -242,7 +249,7 @@ #define BS_RCM_SRS0_WDOG (1U) /*!< Bit field size in bits for RCM_SRS0_WDOG. */ /*! @brief Read current value of the RCM_SRS0_WDOG field. */ -#define BR_RCM_SRS0_WDOG(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_WDOG)) +#define BR_RCM_SRS0_WDOG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_WDOG))) /*@}*/ /*! @@ -261,7 +268,7 @@ #define BS_RCM_SRS0_PIN (1U) /*!< Bit field size in bits for RCM_SRS0_PIN. */ /*! @brief Read current value of the RCM_SRS0_PIN field. */ -#define BR_RCM_SRS0_PIN(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_PIN)) +#define BR_RCM_SRS0_PIN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_PIN))) /*@}*/ /*! @@ -282,7 +289,7 @@ #define BS_RCM_SRS0_POR (1U) /*!< Bit field size in bits for RCM_SRS0_POR. */ /*! @brief Read current value of the RCM_SRS0_POR field. */ -#define BR_RCM_SRS0_POR(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_POR)) +#define BR_RCM_SRS0_POR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_POR))) /*@}*/ /******************************************************************************* @@ -322,7 +329,7 @@ #define HW_RCM_SRS1_ADDR(x) ((x) + 0x1U) #define HW_RCM_SRS1(x) (*(__I hw_rcm_srs1_t *) HW_RCM_SRS1_ADDR(x)) -#define HW_RCM_SRS1_RD(x) (HW_RCM_SRS1(x).U) +#define HW_RCM_SRS1_RD(x) (ADDRESS_READ(hw_rcm_srs1_t, HW_RCM_SRS1_ADDR(x))) /*@}*/ /* @@ -345,7 +352,7 @@ #define BS_RCM_SRS1_JTAG (1U) /*!< Bit field size in bits for RCM_SRS1_JTAG. */ /*! @brief Read current value of the RCM_SRS1_JTAG field. */ -#define BR_RCM_SRS1_JTAG(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_JTAG)) +#define BR_RCM_SRS1_JTAG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_JTAG))) /*@}*/ /*! @@ -364,7 +371,7 @@ #define BS_RCM_SRS1_LOCKUP (1U) /*!< Bit field size in bits for RCM_SRS1_LOCKUP. */ /*! @brief Read current value of the RCM_SRS1_LOCKUP field. */ -#define BR_RCM_SRS1_LOCKUP(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_LOCKUP)) +#define BR_RCM_SRS1_LOCKUP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_LOCKUP))) /*@}*/ /*! @@ -383,7 +390,7 @@ #define BS_RCM_SRS1_SW (1U) /*!< Bit field size in bits for RCM_SRS1_SW. */ /*! @brief Read current value of the RCM_SRS1_SW field. */ -#define BR_RCM_SRS1_SW(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_SW)) +#define BR_RCM_SRS1_SW(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_SW))) /*@}*/ /*! @@ -404,7 +411,7 @@ #define BS_RCM_SRS1_MDM_AP (1U) /*!< Bit field size in bits for RCM_SRS1_MDM_AP. */ /*! @brief Read current value of the RCM_SRS1_MDM_AP field. */ -#define BR_RCM_SRS1_MDM_AP(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_MDM_AP)) +#define BR_RCM_SRS1_MDM_AP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_MDM_AP))) /*@}*/ /*! @@ -425,7 +432,7 @@ #define BS_RCM_SRS1_EZPT (1U) /*!< Bit field size in bits for RCM_SRS1_EZPT. */ /*! @brief Read current value of the RCM_SRS1_EZPT field. */ -#define BR_RCM_SRS1_EZPT(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_EZPT)) +#define BR_RCM_SRS1_EZPT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_EZPT))) /*@}*/ /*! @@ -447,7 +454,7 @@ #define BS_RCM_SRS1_SACKERR (1U) /*!< Bit field size in bits for RCM_SRS1_SACKERR. */ /*! @brief Read current value of the RCM_SRS1_SACKERR field. */ -#define BR_RCM_SRS1_SACKERR(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_SACKERR)) +#define BR_RCM_SRS1_SACKERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_SACKERR))) /*@}*/ /******************************************************************************* @@ -483,8 +490,8 @@ #define HW_RCM_RPFC_ADDR(x) ((x) + 0x4U) #define HW_RCM_RPFC(x) (*(__IO hw_rcm_rpfc_t *) HW_RCM_RPFC_ADDR(x)) -#define HW_RCM_RPFC_RD(x) (HW_RCM_RPFC(x).U) -#define HW_RCM_RPFC_WR(x, v) (HW_RCM_RPFC(x).U = (v)) +#define HW_RCM_RPFC_RD(x) (ADDRESS_READ(hw_rcm_rpfc_t, HW_RCM_RPFC_ADDR(x))) +#define HW_RCM_RPFC_WR(x, v) (ADDRESS_WRITE(hw_rcm_rpfc_t, HW_RCM_RPFC_ADDR(x), v)) #define HW_RCM_RPFC_SET(x, v) (HW_RCM_RPFC_WR(x, HW_RCM_RPFC_RD(x) | (v))) #define HW_RCM_RPFC_CLR(x, v) (HW_RCM_RPFC_WR(x, HW_RCM_RPFC_RD(x) & ~(v))) #define HW_RCM_RPFC_TOG(x, v) (HW_RCM_RPFC_WR(x, HW_RCM_RPFC_RD(x) ^ (v))) @@ -511,7 +518,7 @@ #define BS_RCM_RPFC_RSTFLTSRW (2U) /*!< Bit field size in bits for RCM_RPFC_RSTFLTSRW. */ /*! @brief Read current value of the RCM_RPFC_RSTFLTSRW field. */ -#define BR_RCM_RPFC_RSTFLTSRW(x) (HW_RCM_RPFC(x).B.RSTFLTSRW) +#define BR_RCM_RPFC_RSTFLTSRW(x) (UNION_READ(hw_rcm_rpfc_t, HW_RCM_RPFC_ADDR(x), U, B.RSTFLTSRW)) /*! @brief Format value for bitfield RCM_RPFC_RSTFLTSRW. */ #define BF_RCM_RPFC_RSTFLTSRW(v) ((uint8_t)((uint8_t)(v) << BP_RCM_RPFC_RSTFLTSRW) & BM_RCM_RPFC_RSTFLTSRW) @@ -535,13 +542,13 @@ #define BS_RCM_RPFC_RSTFLTSS (1U) /*!< Bit field size in bits for RCM_RPFC_RSTFLTSS. */ /*! @brief Read current value of the RCM_RPFC_RSTFLTSS field. */ -#define BR_RCM_RPFC_RSTFLTSS(x) (BITBAND_ACCESS8(HW_RCM_RPFC_ADDR(x), BP_RCM_RPFC_RSTFLTSS)) +#define BR_RCM_RPFC_RSTFLTSS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_RPFC_ADDR(x), BP_RCM_RPFC_RSTFLTSS))) /*! @brief Format value for bitfield RCM_RPFC_RSTFLTSS. */ #define BF_RCM_RPFC_RSTFLTSS(v) ((uint8_t)((uint8_t)(v) << BP_RCM_RPFC_RSTFLTSS) & BM_RCM_RPFC_RSTFLTSS) /*! @brief Set the RSTFLTSS field to a new value. */ -#define BW_RCM_RPFC_RSTFLTSS(x, v) (BITBAND_ACCESS8(HW_RCM_RPFC_ADDR(x), BP_RCM_RPFC_RSTFLTSS) = (v)) +#define BW_RCM_RPFC_RSTFLTSS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_RCM_RPFC_ADDR(x), BP_RCM_RPFC_RSTFLTSS), v)) /*@}*/ /******************************************************************************* @@ -573,8 +580,8 @@ #define HW_RCM_RPFW_ADDR(x) ((x) + 0x5U) #define HW_RCM_RPFW(x) (*(__IO hw_rcm_rpfw_t *) HW_RCM_RPFW_ADDR(x)) -#define HW_RCM_RPFW_RD(x) (HW_RCM_RPFW(x).U) -#define HW_RCM_RPFW_WR(x, v) (HW_RCM_RPFW(x).U = (v)) +#define HW_RCM_RPFW_RD(x) (ADDRESS_READ(hw_rcm_rpfw_t, HW_RCM_RPFW_ADDR(x))) +#define HW_RCM_RPFW_WR(x, v) (ADDRESS_WRITE(hw_rcm_rpfw_t, HW_RCM_RPFW_ADDR(x), v)) #define HW_RCM_RPFW_SET(x, v) (HW_RCM_RPFW_WR(x, HW_RCM_RPFW_RD(x) | (v))) #define HW_RCM_RPFW_CLR(x, v) (HW_RCM_RPFW_WR(x, HW_RCM_RPFW_RD(x) & ~(v))) #define HW_RCM_RPFW_TOG(x, v) (HW_RCM_RPFW_WR(x, HW_RCM_RPFW_RD(x) ^ (v))) @@ -629,7 +636,7 @@ #define BS_RCM_RPFW_RSTFLTSEL (5U) /*!< Bit field size in bits for RCM_RPFW_RSTFLTSEL. */ /*! @brief Read current value of the RCM_RPFW_RSTFLTSEL field. */ -#define BR_RCM_RPFW_RSTFLTSEL(x) (HW_RCM_RPFW(x).B.RSTFLTSEL) +#define BR_RCM_RPFW_RSTFLTSEL(x) (UNION_READ(hw_rcm_rpfw_t, HW_RCM_RPFW_ADDR(x), U, B.RSTFLTSEL)) /*! @brief Format value for bitfield RCM_RPFW_RSTFLTSEL. */ #define BF_RCM_RPFW_RSTFLTSEL(v) ((uint8_t)((uint8_t)(v) << BP_RCM_RPFW_RSTFLTSEL) & BM_RCM_RPFW_RSTFLTSEL) @@ -668,7 +675,7 @@ #define HW_RCM_MR_ADDR(x) ((x) + 0x7U) #define HW_RCM_MR(x) (*(__I hw_rcm_mr_t *) HW_RCM_MR_ADDR(x)) -#define HW_RCM_MR_RD(x) (HW_RCM_MR(x).U) +#define HW_RCM_MR_RD(x) (ADDRESS_READ(hw_rcm_mr_t, HW_RCM_MR_ADDR(x))) /*@}*/ /* @@ -690,7 +697,7 @@ #define BS_RCM_MR_EZP_MS (1U) /*!< Bit field size in bits for RCM_MR_EZP_MS. */ /*! @brief Read current value of the RCM_MR_EZP_MS field. */ -#define BR_RCM_MR_EZP_MS(x) (BITBAND_ACCESS8(HW_RCM_MR_ADDR(x), BP_RCM_MR_EZP_MS)) +#define BR_RCM_MR_EZP_MS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_MR_ADDR(x), BP_RCM_MR_EZP_MS))) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_rfsys.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_rfsys.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -128,8 +135,8 @@ #define HW_RFSYS_REGn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n))) #define HW_RFSYS_REGn(x, n) (*(__IO hw_rfsys_regn_t *) HW_RFSYS_REGn_ADDR(x, n)) -#define HW_RFSYS_REGn_RD(x, n) (HW_RFSYS_REGn(x, n).U) -#define HW_RFSYS_REGn_WR(x, n, v) (HW_RFSYS_REGn(x, n).U = (v)) +#define HW_RFSYS_REGn_RD(x, n) (ADDRESS_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n))) +#define HW_RFSYS_REGn_WR(x, n, v) (ADDRESS_WRITE(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), v)) #define HW_RFSYS_REGn_SET(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) | (v))) #define HW_RFSYS_REGn_CLR(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) & ~(v))) #define HW_RFSYS_REGn_TOG(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) ^ (v))) @@ -150,7 +157,7 @@ #define BS_RFSYS_REGn_LL (8U) /*!< Bit field size in bits for RFSYS_REGn_LL. */ /*! @brief Read current value of the RFSYS_REGn_LL field. */ -#define BR_RFSYS_REGn_LL(x, n) (HW_RFSYS_REGn(x, n).B.LL) +#define BR_RFSYS_REGn_LL(x, n) (UNION_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), U, B.LL)) /*! @brief Format value for bitfield RFSYS_REGn_LL. */ #define BF_RFSYS_REGn_LL(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_LL) & BM_RFSYS_REGn_LL) @@ -170,7 +177,7 @@ #define BS_RFSYS_REGn_LH (8U) /*!< Bit field size in bits for RFSYS_REGn_LH. */ /*! @brief Read current value of the RFSYS_REGn_LH field. */ -#define BR_RFSYS_REGn_LH(x, n) (HW_RFSYS_REGn(x, n).B.LH) +#define BR_RFSYS_REGn_LH(x, n) (UNION_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), U, B.LH)) /*! @brief Format value for bitfield RFSYS_REGn_LH. */ #define BF_RFSYS_REGn_LH(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_LH) & BM_RFSYS_REGn_LH) @@ -190,7 +197,7 @@ #define BS_RFSYS_REGn_HL (8U) /*!< Bit field size in bits for RFSYS_REGn_HL. */ /*! @brief Read current value of the RFSYS_REGn_HL field. */ -#define BR_RFSYS_REGn_HL(x, n) (HW_RFSYS_REGn(x, n).B.HL) +#define BR_RFSYS_REGn_HL(x, n) (UNION_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), U, B.HL)) /*! @brief Format value for bitfield RFSYS_REGn_HL. */ #define BF_RFSYS_REGn_HL(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_HL) & BM_RFSYS_REGn_HL) @@ -210,7 +217,7 @@ #define BS_RFSYS_REGn_HH (8U) /*!< Bit field size in bits for RFSYS_REGn_HH. */ /*! @brief Read current value of the RFSYS_REGn_HH field. */ -#define BR_RFSYS_REGn_HH(x, n) (HW_RFSYS_REGn(x, n).B.HH) +#define BR_RFSYS_REGn_HH(x, n) (UNION_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), U, B.HH)) /*! @brief Format value for bitfield RFSYS_REGn_HH. */ #define BF_RFSYS_REGn_HH(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_HH) & BM_RFSYS_REGn_HH)
--- a/hal/device/device/MK64F12/MK64F12_rfvbat.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_rfvbat.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -128,8 +135,8 @@ #define HW_RFVBAT_REGn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n))) #define HW_RFVBAT_REGn(x, n) (*(__IO hw_rfvbat_regn_t *) HW_RFVBAT_REGn_ADDR(x, n)) -#define HW_RFVBAT_REGn_RD(x, n) (HW_RFVBAT_REGn(x, n).U) -#define HW_RFVBAT_REGn_WR(x, n, v) (HW_RFVBAT_REGn(x, n).U = (v)) +#define HW_RFVBAT_REGn_RD(x, n) (ADDRESS_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n))) +#define HW_RFVBAT_REGn_WR(x, n, v) (ADDRESS_WRITE(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), v)) #define HW_RFVBAT_REGn_SET(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) | (v))) #define HW_RFVBAT_REGn_CLR(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) & ~(v))) #define HW_RFVBAT_REGn_TOG(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) ^ (v))) @@ -150,7 +157,7 @@ #define BS_RFVBAT_REGn_LL (8U) /*!< Bit field size in bits for RFVBAT_REGn_LL. */ /*! @brief Read current value of the RFVBAT_REGn_LL field. */ -#define BR_RFVBAT_REGn_LL(x, n) (HW_RFVBAT_REGn(x, n).B.LL) +#define BR_RFVBAT_REGn_LL(x, n) (UNION_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), U, B.LL)) /*! @brief Format value for bitfield RFVBAT_REGn_LL. */ #define BF_RFVBAT_REGn_LL(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_LL) & BM_RFVBAT_REGn_LL) @@ -170,7 +177,7 @@ #define BS_RFVBAT_REGn_LH (8U) /*!< Bit field size in bits for RFVBAT_REGn_LH. */ /*! @brief Read current value of the RFVBAT_REGn_LH field. */ -#define BR_RFVBAT_REGn_LH(x, n) (HW_RFVBAT_REGn(x, n).B.LH) +#define BR_RFVBAT_REGn_LH(x, n) (UNION_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), U, B.LH)) /*! @brief Format value for bitfield RFVBAT_REGn_LH. */ #define BF_RFVBAT_REGn_LH(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_LH) & BM_RFVBAT_REGn_LH) @@ -190,7 +197,7 @@ #define BS_RFVBAT_REGn_HL (8U) /*!< Bit field size in bits for RFVBAT_REGn_HL. */ /*! @brief Read current value of the RFVBAT_REGn_HL field. */ -#define BR_RFVBAT_REGn_HL(x, n) (HW_RFVBAT_REGn(x, n).B.HL) +#define BR_RFVBAT_REGn_HL(x, n) (UNION_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), U, B.HL)) /*! @brief Format value for bitfield RFVBAT_REGn_HL. */ #define BF_RFVBAT_REGn_HL(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_HL) & BM_RFVBAT_REGn_HL) @@ -210,7 +217,7 @@ #define BS_RFVBAT_REGn_HH (8U) /*!< Bit field size in bits for RFVBAT_REGn_HH. */ /*! @brief Read current value of the RFVBAT_REGn_HH field. */ -#define BR_RFVBAT_REGn_HH(x, n) (HW_RFVBAT_REGn(x, n).B.HH) +#define BR_RFVBAT_REGn_HH(x, n) (UNION_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), U, B.HH)) /*! @brief Format value for bitfield RFVBAT_REGn_HH. */ #define BF_RFVBAT_REGn_HH(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_HH) & BM_RFVBAT_REGn_HH)
--- a/hal/device/device/MK64F12/MK64F12_rng.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_rng.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -131,8 +138,8 @@ #define HW_RNG_CR_ADDR(x) ((x) + 0x0U) #define HW_RNG_CR(x) (*(__IO hw_rng_cr_t *) HW_RNG_CR_ADDR(x)) -#define HW_RNG_CR_RD(x) (HW_RNG_CR(x).U) -#define HW_RNG_CR_WR(x, v) (HW_RNG_CR(x).U = (v)) +#define HW_RNG_CR_RD(x) (ADDRESS_READ(hw_rng_cr_t, HW_RNG_CR_ADDR(x))) +#define HW_RNG_CR_WR(x, v) (ADDRESS_WRITE(hw_rng_cr_t, HW_RNG_CR_ADDR(x), v)) #define HW_RNG_CR_SET(x, v) (HW_RNG_CR_WR(x, HW_RNG_CR_RD(x) | (v))) #define HW_RNG_CR_CLR(x, v) (HW_RNG_CR_WR(x, HW_RNG_CR_RD(x) & ~(v))) #define HW_RNG_CR_TOG(x, v) (HW_RNG_CR_WR(x, HW_RNG_CR_RD(x) ^ (v))) @@ -159,13 +166,13 @@ #define BS_RNG_CR_GO (1U) /*!< Bit field size in bits for RNG_CR_GO. */ /*! @brief Read current value of the RNG_CR_GO field. */ -#define BR_RNG_CR_GO(x) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_GO)) +#define BR_RNG_CR_GO(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_GO))) /*! @brief Format value for bitfield RNG_CR_GO. */ #define BF_RNG_CR_GO(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_GO) & BM_RNG_CR_GO) /*! @brief Set the GO field to a new value. */ -#define BW_RNG_CR_GO(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_GO) = (v)) +#define BW_RNG_CR_GO(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_GO), v)) /*@}*/ /*! @@ -186,13 +193,13 @@ #define BS_RNG_CR_HA (1U) /*!< Bit field size in bits for RNG_CR_HA. */ /*! @brief Read current value of the RNG_CR_HA field. */ -#define BR_RNG_CR_HA(x) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_HA)) +#define BR_RNG_CR_HA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_HA))) /*! @brief Format value for bitfield RNG_CR_HA. */ #define BF_RNG_CR_HA(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_HA) & BM_RNG_CR_HA) /*! @brief Set the HA field to a new value. */ -#define BW_RNG_CR_HA(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_HA) = (v)) +#define BW_RNG_CR_HA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_HA), v)) /*@}*/ /*! @@ -212,13 +219,13 @@ #define BS_RNG_CR_INTM (1U) /*!< Bit field size in bits for RNG_CR_INTM. */ /*! @brief Read current value of the RNG_CR_INTM field. */ -#define BR_RNG_CR_INTM(x) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_INTM)) +#define BR_RNG_CR_INTM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_INTM))) /*! @brief Format value for bitfield RNG_CR_INTM. */ #define BF_RNG_CR_INTM(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_INTM) & BM_RNG_CR_INTM) /*! @brief Set the INTM field to a new value. */ -#define BW_RNG_CR_INTM(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_INTM) = (v)) +#define BW_RNG_CR_INTM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_INTM), v)) /*@}*/ /*! @@ -240,7 +247,7 @@ #define BF_RNG_CR_CLRI(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_CLRI) & BM_RNG_CR_CLRI) /*! @brief Set the CLRI field to a new value. */ -#define BW_RNG_CR_CLRI(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_CLRI) = (v)) +#define BW_RNG_CR_CLRI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_CLRI), v)) /*@}*/ /*! @@ -259,13 +266,13 @@ #define BS_RNG_CR_SLP (1U) /*!< Bit field size in bits for RNG_CR_SLP. */ /*! @brief Read current value of the RNG_CR_SLP field. */ -#define BR_RNG_CR_SLP(x) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_SLP)) +#define BR_RNG_CR_SLP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_SLP))) /*! @brief Format value for bitfield RNG_CR_SLP. */ #define BF_RNG_CR_SLP(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_SLP) & BM_RNG_CR_SLP) /*! @brief Set the SLP field to a new value. */ -#define BW_RNG_CR_SLP(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_SLP) = (v)) +#define BW_RNG_CR_SLP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_SLP), v)) /*@}*/ /******************************************************************************* @@ -303,7 +310,7 @@ #define HW_RNG_SR_ADDR(x) ((x) + 0x4U) #define HW_RNG_SR(x) (*(__I hw_rng_sr_t *) HW_RNG_SR_ADDR(x)) -#define HW_RNG_SR_RD(x) (HW_RNG_SR(x).U) +#define HW_RNG_SR_RD(x) (ADDRESS_READ(hw_rng_sr_t, HW_RNG_SR_ADDR(x))) /*@}*/ /* @@ -327,7 +334,7 @@ #define BS_RNG_SR_SECV (1U) /*!< Bit field size in bits for RNG_SR_SECV. */ /*! @brief Read current value of the RNG_SR_SECV field. */ -#define BR_RNG_SR_SECV(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_SECV)) +#define BR_RNG_SR_SECV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_SECV))) /*@}*/ /*! @@ -348,7 +355,7 @@ #define BS_RNG_SR_LRS (1U) /*!< Bit field size in bits for RNG_SR_LRS. */ /*! @brief Read current value of the RNG_SR_LRS field. */ -#define BR_RNG_SR_LRS(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_LRS)) +#define BR_RNG_SR_LRS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_LRS))) /*@}*/ /*! @@ -370,7 +377,7 @@ #define BS_RNG_SR_ORU (1U) /*!< Bit field size in bits for RNG_SR_ORU. */ /*! @brief Read current value of the RNG_SR_ORU field. */ -#define BR_RNG_SR_ORU(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_ORU)) +#define BR_RNG_SR_ORU(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_ORU))) /*@}*/ /*! @@ -392,7 +399,7 @@ #define BS_RNG_SR_ERRI (1U) /*!< Bit field size in bits for RNG_SR_ERRI. */ /*! @brief Read current value of the RNG_SR_ERRI field. */ -#define BR_RNG_SR_ERRI(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_ERRI)) +#define BR_RNG_SR_ERRI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_ERRI))) /*@}*/ /*! @@ -411,7 +418,7 @@ #define BS_RNG_SR_SLP (1U) /*!< Bit field size in bits for RNG_SR_SLP. */ /*! @brief Read current value of the RNG_SR_SLP field. */ -#define BR_RNG_SR_SLP(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_SLP)) +#define BR_RNG_SR_SLP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_SLP))) /*@}*/ /*! @@ -432,7 +439,7 @@ #define BS_RNG_SR_OREG_LVL (8U) /*!< Bit field size in bits for RNG_SR_OREG_LVL. */ /*! @brief Read current value of the RNG_SR_OREG_LVL field. */ -#define BR_RNG_SR_OREG_LVL(x) (HW_RNG_SR(x).B.OREG_LVL) +#define BR_RNG_SR_OREG_LVL(x) (UNION_READ(hw_rng_sr_t, HW_RNG_SR_ADDR(x), U, B.OREG_LVL)) /*@}*/ /*! @@ -450,7 +457,7 @@ #define BS_RNG_SR_OREG_SIZE (8U) /*!< Bit field size in bits for RNG_SR_OREG_SIZE. */ /*! @brief Read current value of the RNG_SR_OREG_SIZE field. */ -#define BR_RNG_SR_OREG_SIZE(x) (HW_RNG_SR(x).B.OREG_SIZE) +#define BR_RNG_SR_OREG_SIZE(x) (UNION_READ(hw_rng_sr_t, HW_RNG_SR_ADDR(x), U, B.OREG_SIZE)) /*@}*/ /******************************************************************************* @@ -482,8 +489,8 @@ #define HW_RNG_ER_ADDR(x) ((x) + 0x8U) #define HW_RNG_ER(x) (*(__O hw_rng_er_t *) HW_RNG_ER_ADDR(x)) -#define HW_RNG_ER_RD(x) (HW_RNG_ER(x).U) -#define HW_RNG_ER_WR(x, v) (HW_RNG_ER(x).U = (v)) +#define HW_RNG_ER_RD(x) (ADDRESS_READ(hw_rng_er_t, HW_RNG_ER_ADDR(x))) +#define HW_RNG_ER_WR(x, v) (ADDRESS_WRITE(hw_rng_er_t, HW_RNG_ER_ADDR(x), v)) /*@}*/ /* @@ -536,7 +543,7 @@ #define HW_RNG_OR_ADDR(x) ((x) + 0xCU) #define HW_RNG_OR(x) (*(__I hw_rng_or_t *) HW_RNG_OR_ADDR(x)) -#define HW_RNG_OR_RD(x) (HW_RNG_OR(x).U) +#define HW_RNG_OR_RD(x) (ADDRESS_READ(hw_rng_or_t, HW_RNG_OR_ADDR(x))) /*@}*/ /*
--- a/hal/device/device/MK64F12/MK64F12_rtc.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_rtc.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -130,8 +137,8 @@ #define HW_RTC_TSR_ADDR(x) ((x) + 0x0U) #define HW_RTC_TSR(x) (*(__IO hw_rtc_tsr_t *) HW_RTC_TSR_ADDR(x)) -#define HW_RTC_TSR_RD(x) (HW_RTC_TSR(x).U) -#define HW_RTC_TSR_WR(x, v) (HW_RTC_TSR(x).U = (v)) +#define HW_RTC_TSR_RD(x) (ADDRESS_READ(hw_rtc_tsr_t, HW_RTC_TSR_ADDR(x))) +#define HW_RTC_TSR_WR(x, v) (ADDRESS_WRITE(hw_rtc_tsr_t, HW_RTC_TSR_ADDR(x), v)) #define HW_RTC_TSR_SET(x, v) (HW_RTC_TSR_WR(x, HW_RTC_TSR_RD(x) | (v))) #define HW_RTC_TSR_CLR(x, v) (HW_RTC_TSR_WR(x, HW_RTC_TSR_RD(x) & ~(v))) #define HW_RTC_TSR_TOG(x, v) (HW_RTC_TSR_WR(x, HW_RTC_TSR_RD(x) ^ (v))) @@ -193,8 +200,8 @@ #define HW_RTC_TPR_ADDR(x) ((x) + 0x4U) #define HW_RTC_TPR(x) (*(__IO hw_rtc_tpr_t *) HW_RTC_TPR_ADDR(x)) -#define HW_RTC_TPR_RD(x) (HW_RTC_TPR(x).U) -#define HW_RTC_TPR_WR(x, v) (HW_RTC_TPR(x).U = (v)) +#define HW_RTC_TPR_RD(x) (ADDRESS_READ(hw_rtc_tpr_t, HW_RTC_TPR_ADDR(x))) +#define HW_RTC_TPR_WR(x, v) (ADDRESS_WRITE(hw_rtc_tpr_t, HW_RTC_TPR_ADDR(x), v)) #define HW_RTC_TPR_SET(x, v) (HW_RTC_TPR_WR(x, HW_RTC_TPR_RD(x) | (v))) #define HW_RTC_TPR_CLR(x, v) (HW_RTC_TPR_WR(x, HW_RTC_TPR_RD(x) & ~(v))) #define HW_RTC_TPR_TOG(x, v) (HW_RTC_TPR_WR(x, HW_RTC_TPR_RD(x) ^ (v))) @@ -219,7 +226,7 @@ #define BS_RTC_TPR_TPR (16U) /*!< Bit field size in bits for RTC_TPR_TPR. */ /*! @brief Read current value of the RTC_TPR_TPR field. */ -#define BR_RTC_TPR_TPR(x) (HW_RTC_TPR(x).B.TPR) +#define BR_RTC_TPR_TPR(x) (UNION_READ(hw_rtc_tpr_t, HW_RTC_TPR_ADDR(x), U, B.TPR)) /*! @brief Format value for bitfield RTC_TPR_TPR. */ #define BF_RTC_TPR_TPR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_TPR_TPR) & BM_RTC_TPR_TPR) @@ -253,8 +260,8 @@ #define HW_RTC_TAR_ADDR(x) ((x) + 0x8U) #define HW_RTC_TAR(x) (*(__IO hw_rtc_tar_t *) HW_RTC_TAR_ADDR(x)) -#define HW_RTC_TAR_RD(x) (HW_RTC_TAR(x).U) -#define HW_RTC_TAR_WR(x, v) (HW_RTC_TAR(x).U = (v)) +#define HW_RTC_TAR_RD(x) (ADDRESS_READ(hw_rtc_tar_t, HW_RTC_TAR_ADDR(x))) +#define HW_RTC_TAR_WR(x, v) (ADDRESS_WRITE(hw_rtc_tar_t, HW_RTC_TAR_ADDR(x), v)) #define HW_RTC_TAR_SET(x, v) (HW_RTC_TAR_WR(x, HW_RTC_TAR_RD(x) | (v))) #define HW_RTC_TAR_CLR(x, v) (HW_RTC_TAR_WR(x, HW_RTC_TAR_RD(x) & ~(v))) #define HW_RTC_TAR_TOG(x, v) (HW_RTC_TAR_WR(x, HW_RTC_TAR_RD(x) ^ (v))) @@ -314,8 +321,8 @@ #define HW_RTC_TCR_ADDR(x) ((x) + 0xCU) #define HW_RTC_TCR(x) (*(__IO hw_rtc_tcr_t *) HW_RTC_TCR_ADDR(x)) -#define HW_RTC_TCR_RD(x) (HW_RTC_TCR(x).U) -#define HW_RTC_TCR_WR(x, v) (HW_RTC_TCR(x).U = (v)) +#define HW_RTC_TCR_RD(x) (ADDRESS_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x))) +#define HW_RTC_TCR_WR(x, v) (ADDRESS_WRITE(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), v)) #define HW_RTC_TCR_SET(x, v) (HW_RTC_TCR_WR(x, HW_RTC_TCR_RD(x) | (v))) #define HW_RTC_TCR_CLR(x, v) (HW_RTC_TCR_WR(x, HW_RTC_TCR_RD(x) & ~(v))) #define HW_RTC_TCR_TOG(x, v) (HW_RTC_TCR_WR(x, HW_RTC_TCR_RD(x) ^ (v))) @@ -345,7 +352,7 @@ #define BS_RTC_TCR_TCR (8U) /*!< Bit field size in bits for RTC_TCR_TCR. */ /*! @brief Read current value of the RTC_TCR_TCR field. */ -#define BR_RTC_TCR_TCR(x) (HW_RTC_TCR(x).B.TCR) +#define BR_RTC_TCR_TCR(x) (UNION_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), U, B.TCR)) /*! @brief Format value for bitfield RTC_TCR_TCR. */ #define BF_RTC_TCR_TCR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_TCR_TCR) & BM_RTC_TCR_TCR) @@ -370,7 +377,7 @@ #define BS_RTC_TCR_CIR (8U) /*!< Bit field size in bits for RTC_TCR_CIR. */ /*! @brief Read current value of the RTC_TCR_CIR field. */ -#define BR_RTC_TCR_CIR(x) (HW_RTC_TCR(x).B.CIR) +#define BR_RTC_TCR_CIR(x) (UNION_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), U, B.CIR)) /*! @brief Format value for bitfield RTC_TCR_CIR. */ #define BF_RTC_TCR_CIR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_TCR_CIR) & BM_RTC_TCR_CIR) @@ -393,7 +400,7 @@ #define BS_RTC_TCR_TCV (8U) /*!< Bit field size in bits for RTC_TCR_TCV. */ /*! @brief Read current value of the RTC_TCR_TCV field. */ -#define BR_RTC_TCR_TCV(x) (HW_RTC_TCR(x).B.TCV) +#define BR_RTC_TCR_TCV(x) (UNION_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), U, B.TCV)) /*@}*/ /*! @@ -409,7 +416,7 @@ #define BS_RTC_TCR_CIC (8U) /*!< Bit field size in bits for RTC_TCR_CIC. */ /*! @brief Read current value of the RTC_TCR_CIC field. */ -#define BR_RTC_TCR_CIC(x) (HW_RTC_TCR(x).B.CIC) +#define BR_RTC_TCR_CIC(x) (UNION_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), U, B.CIC)) /*@}*/ /******************************************************************************* @@ -449,8 +456,8 @@ #define HW_RTC_CR_ADDR(x) ((x) + 0x10U) #define HW_RTC_CR(x) (*(__IO hw_rtc_cr_t *) HW_RTC_CR_ADDR(x)) -#define HW_RTC_CR_RD(x) (HW_RTC_CR(x).U) -#define HW_RTC_CR_WR(x, v) (HW_RTC_CR(x).U = (v)) +#define HW_RTC_CR_RD(x) (ADDRESS_READ(hw_rtc_cr_t, HW_RTC_CR_ADDR(x))) +#define HW_RTC_CR_WR(x, v) (ADDRESS_WRITE(hw_rtc_cr_t, HW_RTC_CR_ADDR(x), v)) #define HW_RTC_CR_SET(x, v) (HW_RTC_CR_WR(x, HW_RTC_CR_RD(x) | (v))) #define HW_RTC_CR_CLR(x, v) (HW_RTC_CR_WR(x, HW_RTC_CR_RD(x) & ~(v))) #define HW_RTC_CR_TOG(x, v) (HW_RTC_CR_WR(x, HW_RTC_CR_RD(x) ^ (v))) @@ -475,13 +482,13 @@ #define BS_RTC_CR_SWR (1U) /*!< Bit field size in bits for RTC_CR_SWR. */ /*! @brief Read current value of the RTC_CR_SWR field. */ -#define BR_RTC_CR_SWR(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SWR)) +#define BR_RTC_CR_SWR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SWR))) /*! @brief Format value for bitfield RTC_CR_SWR. */ #define BF_RTC_CR_SWR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SWR) & BM_RTC_CR_SWR) /*! @brief Set the SWR field to a new value. */ -#define BW_RTC_CR_SWR(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SWR) = (v)) +#define BW_RTC_CR_SWR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SWR), v)) /*@}*/ /*! @@ -500,13 +507,13 @@ #define BS_RTC_CR_WPE (1U) /*!< Bit field size in bits for RTC_CR_WPE. */ /*! @brief Read current value of the RTC_CR_WPE field. */ -#define BR_RTC_CR_WPE(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPE)) +#define BR_RTC_CR_WPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPE))) /*! @brief Format value for bitfield RTC_CR_WPE. */ #define BF_RTC_CR_WPE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_WPE) & BM_RTC_CR_WPE) /*! @brief Set the WPE field to a new value. */ -#define BW_RTC_CR_WPE(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPE) = (v)) +#define BW_RTC_CR_WPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPE), v)) /*@}*/ /*! @@ -523,13 +530,13 @@ #define BS_RTC_CR_SUP (1U) /*!< Bit field size in bits for RTC_CR_SUP. */ /*! @brief Read current value of the RTC_CR_SUP field. */ -#define BR_RTC_CR_SUP(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SUP)) +#define BR_RTC_CR_SUP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SUP))) /*! @brief Format value for bitfield RTC_CR_SUP. */ #define BF_RTC_CR_SUP(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SUP) & BM_RTC_CR_SUP) /*! @brief Set the SUP field to a new value. */ -#define BW_RTC_CR_SUP(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SUP) = (v)) +#define BW_RTC_CR_SUP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SUP), v)) /*@}*/ /*! @@ -549,13 +556,13 @@ #define BS_RTC_CR_UM (1U) /*!< Bit field size in bits for RTC_CR_UM. */ /*! @brief Read current value of the RTC_CR_UM field. */ -#define BR_RTC_CR_UM(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_UM)) +#define BR_RTC_CR_UM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_UM))) /*! @brief Format value for bitfield RTC_CR_UM. */ #define BF_RTC_CR_UM(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_UM) & BM_RTC_CR_UM) /*! @brief Set the UM field to a new value. */ -#define BW_RTC_CR_UM(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_UM) = (v)) +#define BW_RTC_CR_UM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_UM), v)) /*@}*/ /*! @@ -575,13 +582,13 @@ #define BS_RTC_CR_WPS (1U) /*!< Bit field size in bits for RTC_CR_WPS. */ /*! @brief Read current value of the RTC_CR_WPS field. */ -#define BR_RTC_CR_WPS(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPS)) +#define BR_RTC_CR_WPS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPS))) /*! @brief Format value for bitfield RTC_CR_WPS. */ #define BF_RTC_CR_WPS(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_WPS) & BM_RTC_CR_WPS) /*! @brief Set the WPS field to a new value. */ -#define BW_RTC_CR_WPS(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPS) = (v)) +#define BW_RTC_CR_WPS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPS), v)) /*@}*/ /*! @@ -599,13 +606,13 @@ #define BS_RTC_CR_OSCE (1U) /*!< Bit field size in bits for RTC_CR_OSCE. */ /*! @brief Read current value of the RTC_CR_OSCE field. */ -#define BR_RTC_CR_OSCE(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_OSCE)) +#define BR_RTC_CR_OSCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_OSCE))) /*! @brief Format value for bitfield RTC_CR_OSCE. */ #define BF_RTC_CR_OSCE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_OSCE) & BM_RTC_CR_OSCE) /*! @brief Set the OSCE field to a new value. */ -#define BW_RTC_CR_OSCE(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_OSCE) = (v)) +#define BW_RTC_CR_OSCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_OSCE), v)) /*@}*/ /*! @@ -621,13 +628,13 @@ #define BS_RTC_CR_CLKO (1U) /*!< Bit field size in bits for RTC_CR_CLKO. */ /*! @brief Read current value of the RTC_CR_CLKO field. */ -#define BR_RTC_CR_CLKO(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_CLKO)) +#define BR_RTC_CR_CLKO(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_CLKO))) /*! @brief Format value for bitfield RTC_CR_CLKO. */ #define BF_RTC_CR_CLKO(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_CLKO) & BM_RTC_CR_CLKO) /*! @brief Set the CLKO field to a new value. */ -#define BW_RTC_CR_CLKO(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_CLKO) = (v)) +#define BW_RTC_CR_CLKO(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_CLKO), v)) /*@}*/ /*! @@ -643,13 +650,13 @@ #define BS_RTC_CR_SC16P (1U) /*!< Bit field size in bits for RTC_CR_SC16P. */ /*! @brief Read current value of the RTC_CR_SC16P field. */ -#define BR_RTC_CR_SC16P(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC16P)) +#define BR_RTC_CR_SC16P(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC16P))) /*! @brief Format value for bitfield RTC_CR_SC16P. */ #define BF_RTC_CR_SC16P(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SC16P) & BM_RTC_CR_SC16P) /*! @brief Set the SC16P field to a new value. */ -#define BW_RTC_CR_SC16P(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC16P) = (v)) +#define BW_RTC_CR_SC16P(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC16P), v)) /*@}*/ /*! @@ -665,13 +672,13 @@ #define BS_RTC_CR_SC8P (1U) /*!< Bit field size in bits for RTC_CR_SC8P. */ /*! @brief Read current value of the RTC_CR_SC8P field. */ -#define BR_RTC_CR_SC8P(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC8P)) +#define BR_RTC_CR_SC8P(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC8P))) /*! @brief Format value for bitfield RTC_CR_SC8P. */ #define BF_RTC_CR_SC8P(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SC8P) & BM_RTC_CR_SC8P) /*! @brief Set the SC8P field to a new value. */ -#define BW_RTC_CR_SC8P(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC8P) = (v)) +#define BW_RTC_CR_SC8P(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC8P), v)) /*@}*/ /*! @@ -687,13 +694,13 @@ #define BS_RTC_CR_SC4P (1U) /*!< Bit field size in bits for RTC_CR_SC4P. */ /*! @brief Read current value of the RTC_CR_SC4P field. */ -#define BR_RTC_CR_SC4P(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC4P)) +#define BR_RTC_CR_SC4P(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC4P))) /*! @brief Format value for bitfield RTC_CR_SC4P. */ #define BF_RTC_CR_SC4P(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SC4P) & BM_RTC_CR_SC4P) /*! @brief Set the SC4P field to a new value. */ -#define BW_RTC_CR_SC4P(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC4P) = (v)) +#define BW_RTC_CR_SC4P(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC4P), v)) /*@}*/ /*! @@ -709,13 +716,13 @@ #define BS_RTC_CR_SC2P (1U) /*!< Bit field size in bits for RTC_CR_SC2P. */ /*! @brief Read current value of the RTC_CR_SC2P field. */ -#define BR_RTC_CR_SC2P(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC2P)) +#define BR_RTC_CR_SC2P(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC2P))) /*! @brief Format value for bitfield RTC_CR_SC2P. */ #define BF_RTC_CR_SC2P(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SC2P) & BM_RTC_CR_SC2P) /*! @brief Set the SC2P field to a new value. */ -#define BW_RTC_CR_SC2P(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC2P) = (v)) +#define BW_RTC_CR_SC2P(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC2P), v)) /*@}*/ /******************************************************************************* @@ -748,8 +755,8 @@ #define HW_RTC_SR_ADDR(x) ((x) + 0x14U) #define HW_RTC_SR(x) (*(__IO hw_rtc_sr_t *) HW_RTC_SR_ADDR(x)) -#define HW_RTC_SR_RD(x) (HW_RTC_SR(x).U) -#define HW_RTC_SR_WR(x, v) (HW_RTC_SR(x).U = (v)) +#define HW_RTC_SR_RD(x) (ADDRESS_READ(hw_rtc_sr_t, HW_RTC_SR_ADDR(x))) +#define HW_RTC_SR_WR(x, v) (ADDRESS_WRITE(hw_rtc_sr_t, HW_RTC_SR_ADDR(x), v)) #define HW_RTC_SR_SET(x, v) (HW_RTC_SR_WR(x, HW_RTC_SR_RD(x) | (v))) #define HW_RTC_SR_CLR(x, v) (HW_RTC_SR_WR(x, HW_RTC_SR_RD(x) & ~(v))) #define HW_RTC_SR_TOG(x, v) (HW_RTC_SR_WR(x, HW_RTC_SR_RD(x) ^ (v))) @@ -776,7 +783,7 @@ #define BS_RTC_SR_TIF (1U) /*!< Bit field size in bits for RTC_SR_TIF. */ /*! @brief Read current value of the RTC_SR_TIF field. */ -#define BR_RTC_SR_TIF(x) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TIF)) +#define BR_RTC_SR_TIF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TIF))) /*@}*/ /*! @@ -796,7 +803,7 @@ #define BS_RTC_SR_TOF (1U) /*!< Bit field size in bits for RTC_SR_TOF. */ /*! @brief Read current value of the RTC_SR_TOF field. */ -#define BR_RTC_SR_TOF(x) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TOF)) +#define BR_RTC_SR_TOF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TOF))) /*@}*/ /*! @@ -815,7 +822,7 @@ #define BS_RTC_SR_TAF (1U) /*!< Bit field size in bits for RTC_SR_TAF. */ /*! @brief Read current value of the RTC_SR_TAF field. */ -#define BR_RTC_SR_TAF(x) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TAF)) +#define BR_RTC_SR_TAF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TAF))) /*@}*/ /*! @@ -835,13 +842,13 @@ #define BS_RTC_SR_TCE (1U) /*!< Bit field size in bits for RTC_SR_TCE. */ /*! @brief Read current value of the RTC_SR_TCE field. */ -#define BR_RTC_SR_TCE(x) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TCE)) +#define BR_RTC_SR_TCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TCE))) /*! @brief Format value for bitfield RTC_SR_TCE. */ #define BF_RTC_SR_TCE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_SR_TCE) & BM_RTC_SR_TCE) /*! @brief Set the TCE field to a new value. */ -#define BW_RTC_SR_TCE(x, v) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TCE) = (v)) +#define BW_RTC_SR_TCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TCE), v)) /*@}*/ /******************************************************************************* @@ -874,8 +881,8 @@ #define HW_RTC_LR_ADDR(x) ((x) + 0x18U) #define HW_RTC_LR(x) (*(__IO hw_rtc_lr_t *) HW_RTC_LR_ADDR(x)) -#define HW_RTC_LR_RD(x) (HW_RTC_LR(x).U) -#define HW_RTC_LR_WR(x, v) (HW_RTC_LR(x).U = (v)) +#define HW_RTC_LR_RD(x) (ADDRESS_READ(hw_rtc_lr_t, HW_RTC_LR_ADDR(x))) +#define HW_RTC_LR_WR(x, v) (ADDRESS_WRITE(hw_rtc_lr_t, HW_RTC_LR_ADDR(x), v)) #define HW_RTC_LR_SET(x, v) (HW_RTC_LR_WR(x, HW_RTC_LR_RD(x) | (v))) #define HW_RTC_LR_CLR(x, v) (HW_RTC_LR_WR(x, HW_RTC_LR_RD(x) & ~(v))) #define HW_RTC_LR_TOG(x, v) (HW_RTC_LR_WR(x, HW_RTC_LR_RD(x) ^ (v))) @@ -900,13 +907,13 @@ #define BS_RTC_LR_TCL (1U) /*!< Bit field size in bits for RTC_LR_TCL. */ /*! @brief Read current value of the RTC_LR_TCL field. */ -#define BR_RTC_LR_TCL(x) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_TCL)) +#define BR_RTC_LR_TCL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_TCL))) /*! @brief Format value for bitfield RTC_LR_TCL. */ #define BF_RTC_LR_TCL(v) ((uint32_t)((uint32_t)(v) << BP_RTC_LR_TCL) & BM_RTC_LR_TCL) /*! @brief Set the TCL field to a new value. */ -#define BW_RTC_LR_TCL(x, v) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_TCL) = (v)) +#define BW_RTC_LR_TCL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_TCL), v)) /*@}*/ /*! @@ -924,13 +931,13 @@ #define BS_RTC_LR_CRL (1U) /*!< Bit field size in bits for RTC_LR_CRL. */ /*! @brief Read current value of the RTC_LR_CRL field. */ -#define BR_RTC_LR_CRL(x) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_CRL)) +#define BR_RTC_LR_CRL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_CRL))) /*! @brief Format value for bitfield RTC_LR_CRL. */ #define BF_RTC_LR_CRL(v) ((uint32_t)((uint32_t)(v) << BP_RTC_LR_CRL) & BM_RTC_LR_CRL) /*! @brief Set the CRL field to a new value. */ -#define BW_RTC_LR_CRL(x, v) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_CRL) = (v)) +#define BW_RTC_LR_CRL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_CRL), v)) /*@}*/ /*! @@ -948,13 +955,13 @@ #define BS_RTC_LR_SRL (1U) /*!< Bit field size in bits for RTC_LR_SRL. */ /*! @brief Read current value of the RTC_LR_SRL field. */ -#define BR_RTC_LR_SRL(x) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_SRL)) +#define BR_RTC_LR_SRL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_SRL))) /*! @brief Format value for bitfield RTC_LR_SRL. */ #define BF_RTC_LR_SRL(v) ((uint32_t)((uint32_t)(v) << BP_RTC_LR_SRL) & BM_RTC_LR_SRL) /*! @brief Set the SRL field to a new value. */ -#define BW_RTC_LR_SRL(x, v) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_SRL) = (v)) +#define BW_RTC_LR_SRL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_SRL), v)) /*@}*/ /*! @@ -972,13 +979,13 @@ #define BS_RTC_LR_LRL (1U) /*!< Bit field size in bits for RTC_LR_LRL. */ /*! @brief Read current value of the RTC_LR_LRL field. */ -#define BR_RTC_LR_LRL(x) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_LRL)) +#define BR_RTC_LR_LRL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_LRL))) /*! @brief Format value for bitfield RTC_LR_LRL. */ #define BF_RTC_LR_LRL(v) ((uint32_t)((uint32_t)(v) << BP_RTC_LR_LRL) & BM_RTC_LR_LRL) /*! @brief Set the LRL field to a new value. */ -#define BW_RTC_LR_LRL(x, v) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_LRL) = (v)) +#define BW_RTC_LR_LRL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_LRL), v)) /*@}*/ /******************************************************************************* @@ -1013,8 +1020,8 @@ #define HW_RTC_IER_ADDR(x) ((x) + 0x1CU) #define HW_RTC_IER(x) (*(__IO hw_rtc_ier_t *) HW_RTC_IER_ADDR(x)) -#define HW_RTC_IER_RD(x) (HW_RTC_IER(x).U) -#define HW_RTC_IER_WR(x, v) (HW_RTC_IER(x).U = (v)) +#define HW_RTC_IER_RD(x) (ADDRESS_READ(hw_rtc_ier_t, HW_RTC_IER_ADDR(x))) +#define HW_RTC_IER_WR(x, v) (ADDRESS_WRITE(hw_rtc_ier_t, HW_RTC_IER_ADDR(x), v)) #define HW_RTC_IER_SET(x, v) (HW_RTC_IER_WR(x, HW_RTC_IER_RD(x) | (v))) #define HW_RTC_IER_CLR(x, v) (HW_RTC_IER_WR(x, HW_RTC_IER_RD(x) & ~(v))) #define HW_RTC_IER_TOG(x, v) (HW_RTC_IER_WR(x, HW_RTC_IER_RD(x) ^ (v))) @@ -1037,13 +1044,13 @@ #define BS_RTC_IER_TIIE (1U) /*!< Bit field size in bits for RTC_IER_TIIE. */ /*! @brief Read current value of the RTC_IER_TIIE field. */ -#define BR_RTC_IER_TIIE(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TIIE)) +#define BR_RTC_IER_TIIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TIIE))) /*! @brief Format value for bitfield RTC_IER_TIIE. */ #define BF_RTC_IER_TIIE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_TIIE) & BM_RTC_IER_TIIE) /*! @brief Set the TIIE field to a new value. */ -#define BW_RTC_IER_TIIE(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TIIE) = (v)) +#define BW_RTC_IER_TIIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TIIE), v)) /*@}*/ /*! @@ -1059,13 +1066,13 @@ #define BS_RTC_IER_TOIE (1U) /*!< Bit field size in bits for RTC_IER_TOIE. */ /*! @brief Read current value of the RTC_IER_TOIE field. */ -#define BR_RTC_IER_TOIE(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TOIE)) +#define BR_RTC_IER_TOIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TOIE))) /*! @brief Format value for bitfield RTC_IER_TOIE. */ #define BF_RTC_IER_TOIE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_TOIE) & BM_RTC_IER_TOIE) /*! @brief Set the TOIE field to a new value. */ -#define BW_RTC_IER_TOIE(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TOIE) = (v)) +#define BW_RTC_IER_TOIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TOIE), v)) /*@}*/ /*! @@ -1081,13 +1088,13 @@ #define BS_RTC_IER_TAIE (1U) /*!< Bit field size in bits for RTC_IER_TAIE. */ /*! @brief Read current value of the RTC_IER_TAIE field. */ -#define BR_RTC_IER_TAIE(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TAIE)) +#define BR_RTC_IER_TAIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TAIE))) /*! @brief Format value for bitfield RTC_IER_TAIE. */ #define BF_RTC_IER_TAIE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_TAIE) & BM_RTC_IER_TAIE) /*! @brief Set the TAIE field to a new value. */ -#define BW_RTC_IER_TAIE(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TAIE) = (v)) +#define BW_RTC_IER_TAIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TAIE), v)) /*@}*/ /*! @@ -1107,13 +1114,13 @@ #define BS_RTC_IER_TSIE (1U) /*!< Bit field size in bits for RTC_IER_TSIE. */ /*! @brief Read current value of the RTC_IER_TSIE field. */ -#define BR_RTC_IER_TSIE(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TSIE)) +#define BR_RTC_IER_TSIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TSIE))) /*! @brief Format value for bitfield RTC_IER_TSIE. */ #define BF_RTC_IER_TSIE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_TSIE) & BM_RTC_IER_TSIE) /*! @brief Set the TSIE field to a new value. */ -#define BW_RTC_IER_TSIE(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TSIE) = (v)) +#define BW_RTC_IER_TSIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TSIE), v)) /*@}*/ /*! @@ -1132,13 +1139,13 @@ #define BS_RTC_IER_WPON (1U) /*!< Bit field size in bits for RTC_IER_WPON. */ /*! @brief Read current value of the RTC_IER_WPON field. */ -#define BR_RTC_IER_WPON(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_WPON)) +#define BR_RTC_IER_WPON(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_WPON))) /*! @brief Format value for bitfield RTC_IER_WPON. */ #define BF_RTC_IER_WPON(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_WPON) & BM_RTC_IER_WPON) /*! @brief Set the WPON field to a new value. */ -#define BW_RTC_IER_WPON(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_WPON) = (v)) +#define BW_RTC_IER_WPON(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_WPON), v)) /*@}*/ /******************************************************************************* @@ -1174,8 +1181,8 @@ #define HW_RTC_WAR_ADDR(x) ((x) + 0x800U) #define HW_RTC_WAR(x) (*(__IO hw_rtc_war_t *) HW_RTC_WAR_ADDR(x)) -#define HW_RTC_WAR_RD(x) (HW_RTC_WAR(x).U) -#define HW_RTC_WAR_WR(x, v) (HW_RTC_WAR(x).U = (v)) +#define HW_RTC_WAR_RD(x) (ADDRESS_READ(hw_rtc_war_t, HW_RTC_WAR_ADDR(x))) +#define HW_RTC_WAR_WR(x, v) (ADDRESS_WRITE(hw_rtc_war_t, HW_RTC_WAR_ADDR(x), v)) #define HW_RTC_WAR_SET(x, v) (HW_RTC_WAR_WR(x, HW_RTC_WAR_RD(x) | (v))) #define HW_RTC_WAR_CLR(x, v) (HW_RTC_WAR_WR(x, HW_RTC_WAR_RD(x) & ~(v))) #define HW_RTC_WAR_TOG(x, v) (HW_RTC_WAR_WR(x, HW_RTC_WAR_RD(x) ^ (v))) @@ -1201,13 +1208,13 @@ #define BS_RTC_WAR_TSRW (1U) /*!< Bit field size in bits for RTC_WAR_TSRW. */ /*! @brief Read current value of the RTC_WAR_TSRW field. */ -#define BR_RTC_WAR_TSRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TSRW)) +#define BR_RTC_WAR_TSRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TSRW))) /*! @brief Format value for bitfield RTC_WAR_TSRW. */ #define BF_RTC_WAR_TSRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_TSRW) & BM_RTC_WAR_TSRW) /*! @brief Set the TSRW field to a new value. */ -#define BW_RTC_WAR_TSRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TSRW) = (v)) +#define BW_RTC_WAR_TSRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TSRW), v)) /*@}*/ /*! @@ -1226,13 +1233,13 @@ #define BS_RTC_WAR_TPRW (1U) /*!< Bit field size in bits for RTC_WAR_TPRW. */ /*! @brief Read current value of the RTC_WAR_TPRW field. */ -#define BR_RTC_WAR_TPRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TPRW)) +#define BR_RTC_WAR_TPRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TPRW))) /*! @brief Format value for bitfield RTC_WAR_TPRW. */ #define BF_RTC_WAR_TPRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_TPRW) & BM_RTC_WAR_TPRW) /*! @brief Set the TPRW field to a new value. */ -#define BW_RTC_WAR_TPRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TPRW) = (v)) +#define BW_RTC_WAR_TPRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TPRW), v)) /*@}*/ /*! @@ -1251,13 +1258,13 @@ #define BS_RTC_WAR_TARW (1U) /*!< Bit field size in bits for RTC_WAR_TARW. */ /*! @brief Read current value of the RTC_WAR_TARW field. */ -#define BR_RTC_WAR_TARW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TARW)) +#define BR_RTC_WAR_TARW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TARW))) /*! @brief Format value for bitfield RTC_WAR_TARW. */ #define BF_RTC_WAR_TARW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_TARW) & BM_RTC_WAR_TARW) /*! @brief Set the TARW field to a new value. */ -#define BW_RTC_WAR_TARW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TARW) = (v)) +#define BW_RTC_WAR_TARW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TARW), v)) /*@}*/ /*! @@ -1276,13 +1283,13 @@ #define BS_RTC_WAR_TCRW (1U) /*!< Bit field size in bits for RTC_WAR_TCRW. */ /*! @brief Read current value of the RTC_WAR_TCRW field. */ -#define BR_RTC_WAR_TCRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TCRW)) +#define BR_RTC_WAR_TCRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TCRW))) /*! @brief Format value for bitfield RTC_WAR_TCRW. */ #define BF_RTC_WAR_TCRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_TCRW) & BM_RTC_WAR_TCRW) /*! @brief Set the TCRW field to a new value. */ -#define BW_RTC_WAR_TCRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TCRW) = (v)) +#define BW_RTC_WAR_TCRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TCRW), v)) /*@}*/ /*! @@ -1301,13 +1308,13 @@ #define BS_RTC_WAR_CRW (1U) /*!< Bit field size in bits for RTC_WAR_CRW. */ /*! @brief Read current value of the RTC_WAR_CRW field. */ -#define BR_RTC_WAR_CRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_CRW)) +#define BR_RTC_WAR_CRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_CRW))) /*! @brief Format value for bitfield RTC_WAR_CRW. */ #define BF_RTC_WAR_CRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_CRW) & BM_RTC_WAR_CRW) /*! @brief Set the CRW field to a new value. */ -#define BW_RTC_WAR_CRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_CRW) = (v)) +#define BW_RTC_WAR_CRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_CRW), v)) /*@}*/ /*! @@ -1326,13 +1333,13 @@ #define BS_RTC_WAR_SRW (1U) /*!< Bit field size in bits for RTC_WAR_SRW. */ /*! @brief Read current value of the RTC_WAR_SRW field. */ -#define BR_RTC_WAR_SRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_SRW)) +#define BR_RTC_WAR_SRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_SRW))) /*! @brief Format value for bitfield RTC_WAR_SRW. */ #define BF_RTC_WAR_SRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_SRW) & BM_RTC_WAR_SRW) /*! @brief Set the SRW field to a new value. */ -#define BW_RTC_WAR_SRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_SRW) = (v)) +#define BW_RTC_WAR_SRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_SRW), v)) /*@}*/ /*! @@ -1351,13 +1358,13 @@ #define BS_RTC_WAR_LRW (1U) /*!< Bit field size in bits for RTC_WAR_LRW. */ /*! @brief Read current value of the RTC_WAR_LRW field. */ -#define BR_RTC_WAR_LRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_LRW)) +#define BR_RTC_WAR_LRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_LRW))) /*! @brief Format value for bitfield RTC_WAR_LRW. */ #define BF_RTC_WAR_LRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_LRW) & BM_RTC_WAR_LRW) /*! @brief Set the LRW field to a new value. */ -#define BW_RTC_WAR_LRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_LRW) = (v)) +#define BW_RTC_WAR_LRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_LRW), v)) /*@}*/ /*! @@ -1376,13 +1383,13 @@ #define BS_RTC_WAR_IERW (1U) /*!< Bit field size in bits for RTC_WAR_IERW. */ /*! @brief Read current value of the RTC_WAR_IERW field. */ -#define BR_RTC_WAR_IERW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_IERW)) +#define BR_RTC_WAR_IERW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_IERW))) /*! @brief Format value for bitfield RTC_WAR_IERW. */ #define BF_RTC_WAR_IERW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_IERW) & BM_RTC_WAR_IERW) /*! @brief Set the IERW field to a new value. */ -#define BW_RTC_WAR_IERW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_IERW) = (v)) +#define BW_RTC_WAR_IERW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_IERW), v)) /*@}*/ /******************************************************************************* @@ -1418,8 +1425,8 @@ #define HW_RTC_RAR_ADDR(x) ((x) + 0x804U) #define HW_RTC_RAR(x) (*(__IO hw_rtc_rar_t *) HW_RTC_RAR_ADDR(x)) -#define HW_RTC_RAR_RD(x) (HW_RTC_RAR(x).U) -#define HW_RTC_RAR_WR(x, v) (HW_RTC_RAR(x).U = (v)) +#define HW_RTC_RAR_RD(x) (ADDRESS_READ(hw_rtc_rar_t, HW_RTC_RAR_ADDR(x))) +#define HW_RTC_RAR_WR(x, v) (ADDRESS_WRITE(hw_rtc_rar_t, HW_RTC_RAR_ADDR(x), v)) #define HW_RTC_RAR_SET(x, v) (HW_RTC_RAR_WR(x, HW_RTC_RAR_RD(x) | (v))) #define HW_RTC_RAR_CLR(x, v) (HW_RTC_RAR_WR(x, HW_RTC_RAR_RD(x) & ~(v))) #define HW_RTC_RAR_TOG(x, v) (HW_RTC_RAR_WR(x, HW_RTC_RAR_RD(x) ^ (v))) @@ -1445,13 +1452,13 @@ #define BS_RTC_RAR_TSRR (1U) /*!< Bit field size in bits for RTC_RAR_TSRR. */ /*! @brief Read current value of the RTC_RAR_TSRR field. */ -#define BR_RTC_RAR_TSRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TSRR)) +#define BR_RTC_RAR_TSRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TSRR))) /*! @brief Format value for bitfield RTC_RAR_TSRR. */ #define BF_RTC_RAR_TSRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_TSRR) & BM_RTC_RAR_TSRR) /*! @brief Set the TSRR field to a new value. */ -#define BW_RTC_RAR_TSRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TSRR) = (v)) +#define BW_RTC_RAR_TSRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TSRR), v)) /*@}*/ /*! @@ -1470,13 +1477,13 @@ #define BS_RTC_RAR_TPRR (1U) /*!< Bit field size in bits for RTC_RAR_TPRR. */ /*! @brief Read current value of the RTC_RAR_TPRR field. */ -#define BR_RTC_RAR_TPRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TPRR)) +#define BR_RTC_RAR_TPRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TPRR))) /*! @brief Format value for bitfield RTC_RAR_TPRR. */ #define BF_RTC_RAR_TPRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_TPRR) & BM_RTC_RAR_TPRR) /*! @brief Set the TPRR field to a new value. */ -#define BW_RTC_RAR_TPRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TPRR) = (v)) +#define BW_RTC_RAR_TPRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TPRR), v)) /*@}*/ /*! @@ -1495,13 +1502,13 @@ #define BS_RTC_RAR_TARR (1U) /*!< Bit field size in bits for RTC_RAR_TARR. */ /*! @brief Read current value of the RTC_RAR_TARR field. */ -#define BR_RTC_RAR_TARR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TARR)) +#define BR_RTC_RAR_TARR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TARR))) /*! @brief Format value for bitfield RTC_RAR_TARR. */ #define BF_RTC_RAR_TARR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_TARR) & BM_RTC_RAR_TARR) /*! @brief Set the TARR field to a new value. */ -#define BW_RTC_RAR_TARR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TARR) = (v)) +#define BW_RTC_RAR_TARR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TARR), v)) /*@}*/ /*! @@ -1520,13 +1527,13 @@ #define BS_RTC_RAR_TCRR (1U) /*!< Bit field size in bits for RTC_RAR_TCRR. */ /*! @brief Read current value of the RTC_RAR_TCRR field. */ -#define BR_RTC_RAR_TCRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TCRR)) +#define BR_RTC_RAR_TCRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TCRR))) /*! @brief Format value for bitfield RTC_RAR_TCRR. */ #define BF_RTC_RAR_TCRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_TCRR) & BM_RTC_RAR_TCRR) /*! @brief Set the TCRR field to a new value. */ -#define BW_RTC_RAR_TCRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TCRR) = (v)) +#define BW_RTC_RAR_TCRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TCRR), v)) /*@}*/ /*! @@ -1545,13 +1552,13 @@ #define BS_RTC_RAR_CRR (1U) /*!< Bit field size in bits for RTC_RAR_CRR. */ /*! @brief Read current value of the RTC_RAR_CRR field. */ -#define BR_RTC_RAR_CRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_CRR)) +#define BR_RTC_RAR_CRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_CRR))) /*! @brief Format value for bitfield RTC_RAR_CRR. */ #define BF_RTC_RAR_CRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_CRR) & BM_RTC_RAR_CRR) /*! @brief Set the CRR field to a new value. */ -#define BW_RTC_RAR_CRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_CRR) = (v)) +#define BW_RTC_RAR_CRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_CRR), v)) /*@}*/ /*! @@ -1570,13 +1577,13 @@ #define BS_RTC_RAR_SRR (1U) /*!< Bit field size in bits for RTC_RAR_SRR. */ /*! @brief Read current value of the RTC_RAR_SRR field. */ -#define BR_RTC_RAR_SRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_SRR)) +#define BR_RTC_RAR_SRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_SRR))) /*! @brief Format value for bitfield RTC_RAR_SRR. */ #define BF_RTC_RAR_SRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_SRR) & BM_RTC_RAR_SRR) /*! @brief Set the SRR field to a new value. */ -#define BW_RTC_RAR_SRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_SRR) = (v)) +#define BW_RTC_RAR_SRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_SRR), v)) /*@}*/ /*! @@ -1595,13 +1602,13 @@ #define BS_RTC_RAR_LRR (1U) /*!< Bit field size in bits for RTC_RAR_LRR. */ /*! @brief Read current value of the RTC_RAR_LRR field. */ -#define BR_RTC_RAR_LRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_LRR)) +#define BR_RTC_RAR_LRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_LRR))) /*! @brief Format value for bitfield RTC_RAR_LRR. */ #define BF_RTC_RAR_LRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_LRR) & BM_RTC_RAR_LRR) /*! @brief Set the LRR field to a new value. */ -#define BW_RTC_RAR_LRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_LRR) = (v)) +#define BW_RTC_RAR_LRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_LRR), v)) /*@}*/ /*! @@ -1620,13 +1627,13 @@ #define BS_RTC_RAR_IERR (1U) /*!< Bit field size in bits for RTC_RAR_IERR. */ /*! @brief Read current value of the RTC_RAR_IERR field. */ -#define BR_RTC_RAR_IERR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_IERR)) +#define BR_RTC_RAR_IERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_IERR))) /*! @brief Format value for bitfield RTC_RAR_IERR. */ #define BF_RTC_RAR_IERR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_IERR) & BM_RTC_RAR_IERR) /*! @brief Set the IERR field to a new value. */ -#define BW_RTC_RAR_IERR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_IERR) = (v)) +#define BW_RTC_RAR_IERR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_IERR), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_sdhc.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_sdhc.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -148,8 +155,8 @@ #define HW_SDHC_DSADDR_ADDR(x) ((x) + 0x0U) #define HW_SDHC_DSADDR(x) (*(__IO hw_sdhc_dsaddr_t *) HW_SDHC_DSADDR_ADDR(x)) -#define HW_SDHC_DSADDR_RD(x) (HW_SDHC_DSADDR(x).U) -#define HW_SDHC_DSADDR_WR(x, v) (HW_SDHC_DSADDR(x).U = (v)) +#define HW_SDHC_DSADDR_RD(x) (ADDRESS_READ(hw_sdhc_dsaddr_t, HW_SDHC_DSADDR_ADDR(x))) +#define HW_SDHC_DSADDR_WR(x, v) (ADDRESS_WRITE(hw_sdhc_dsaddr_t, HW_SDHC_DSADDR_ADDR(x), v)) #define HW_SDHC_DSADDR_SET(x, v) (HW_SDHC_DSADDR_WR(x, HW_SDHC_DSADDR_RD(x) | (v))) #define HW_SDHC_DSADDR_CLR(x, v) (HW_SDHC_DSADDR_WR(x, HW_SDHC_DSADDR_RD(x) & ~(v))) #define HW_SDHC_DSADDR_TOG(x, v) (HW_SDHC_DSADDR_WR(x, HW_SDHC_DSADDR_RD(x) ^ (v))) @@ -186,7 +193,7 @@ #define BS_SDHC_DSADDR_DSADDR (30U) /*!< Bit field size in bits for SDHC_DSADDR_DSADDR. */ /*! @brief Read current value of the SDHC_DSADDR_DSADDR field. */ -#define BR_SDHC_DSADDR_DSADDR(x) (HW_SDHC_DSADDR(x).B.DSADDR) +#define BR_SDHC_DSADDR_DSADDR(x) (UNION_READ(hw_sdhc_dsaddr_t, HW_SDHC_DSADDR_ADDR(x), U, B.DSADDR)) /*! @brief Format value for bitfield SDHC_DSADDR_DSADDR. */ #define BF_SDHC_DSADDR_DSADDR(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_DSADDR_DSADDR) & BM_SDHC_DSADDR_DSADDR) @@ -226,8 +233,8 @@ #define HW_SDHC_BLKATTR_ADDR(x) ((x) + 0x4U) #define HW_SDHC_BLKATTR(x) (*(__IO hw_sdhc_blkattr_t *) HW_SDHC_BLKATTR_ADDR(x)) -#define HW_SDHC_BLKATTR_RD(x) (HW_SDHC_BLKATTR(x).U) -#define HW_SDHC_BLKATTR_WR(x, v) (HW_SDHC_BLKATTR(x).U = (v)) +#define HW_SDHC_BLKATTR_RD(x) (ADDRESS_READ(hw_sdhc_blkattr_t, HW_SDHC_BLKATTR_ADDR(x))) +#define HW_SDHC_BLKATTR_WR(x, v) (ADDRESS_WRITE(hw_sdhc_blkattr_t, HW_SDHC_BLKATTR_ADDR(x), v)) #define HW_SDHC_BLKATTR_SET(x, v) (HW_SDHC_BLKATTR_WR(x, HW_SDHC_BLKATTR_RD(x) | (v))) #define HW_SDHC_BLKATTR_CLR(x, v) (HW_SDHC_BLKATTR_WR(x, HW_SDHC_BLKATTR_RD(x) & ~(v))) #define HW_SDHC_BLKATTR_TOG(x, v) (HW_SDHC_BLKATTR_WR(x, HW_SDHC_BLKATTR_RD(x) ^ (v))) @@ -263,7 +270,7 @@ #define BS_SDHC_BLKATTR_BLKSIZE (13U) /*!< Bit field size in bits for SDHC_BLKATTR_BLKSIZE. */ /*! @brief Read current value of the SDHC_BLKATTR_BLKSIZE field. */ -#define BR_SDHC_BLKATTR_BLKSIZE(x) (HW_SDHC_BLKATTR(x).B.BLKSIZE) +#define BR_SDHC_BLKATTR_BLKSIZE(x) (UNION_READ(hw_sdhc_blkattr_t, HW_SDHC_BLKATTR_ADDR(x), U, B.BLKSIZE)) /*! @brief Format value for bitfield SDHC_BLKATTR_BLKSIZE. */ #define BF_SDHC_BLKATTR_BLKSIZE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_BLKATTR_BLKSIZE) & BM_SDHC_BLKATTR_BLKSIZE) @@ -308,7 +315,7 @@ #define BS_SDHC_BLKATTR_BLKCNT (16U) /*!< Bit field size in bits for SDHC_BLKATTR_BLKCNT. */ /*! @brief Read current value of the SDHC_BLKATTR_BLKCNT field. */ -#define BR_SDHC_BLKATTR_BLKCNT(x) (HW_SDHC_BLKATTR(x).B.BLKCNT) +#define BR_SDHC_BLKATTR_BLKCNT(x) (UNION_READ(hw_sdhc_blkattr_t, HW_SDHC_BLKATTR_ADDR(x), U, B.BLKCNT)) /*! @brief Format value for bitfield SDHC_BLKATTR_BLKCNT. */ #define BF_SDHC_BLKATTR_BLKCNT(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_BLKATTR_BLKCNT) & BM_SDHC_BLKATTR_BLKCNT) @@ -344,8 +351,8 @@ #define HW_SDHC_CMDARG_ADDR(x) ((x) + 0x8U) #define HW_SDHC_CMDARG(x) (*(__IO hw_sdhc_cmdarg_t *) HW_SDHC_CMDARG_ADDR(x)) -#define HW_SDHC_CMDARG_RD(x) (HW_SDHC_CMDARG(x).U) -#define HW_SDHC_CMDARG_WR(x, v) (HW_SDHC_CMDARG(x).U = (v)) +#define HW_SDHC_CMDARG_RD(x) (ADDRESS_READ(hw_sdhc_cmdarg_t, HW_SDHC_CMDARG_ADDR(x))) +#define HW_SDHC_CMDARG_WR(x, v) (ADDRESS_WRITE(hw_sdhc_cmdarg_t, HW_SDHC_CMDARG_ADDR(x), v)) #define HW_SDHC_CMDARG_SET(x, v) (HW_SDHC_CMDARG_WR(x, HW_SDHC_CMDARG_RD(x) | (v))) #define HW_SDHC_CMDARG_CLR(x, v) (HW_SDHC_CMDARG_WR(x, HW_SDHC_CMDARG_RD(x) & ~(v))) #define HW_SDHC_CMDARG_TOG(x, v) (HW_SDHC_CMDARG_WR(x, HW_SDHC_CMDARG_RD(x) ^ (v))) @@ -456,8 +463,8 @@ #define HW_SDHC_XFERTYP_ADDR(x) ((x) + 0xCU) #define HW_SDHC_XFERTYP(x) (*(__IO hw_sdhc_xfertyp_t *) HW_SDHC_XFERTYP_ADDR(x)) -#define HW_SDHC_XFERTYP_RD(x) (HW_SDHC_XFERTYP(x).U) -#define HW_SDHC_XFERTYP_WR(x, v) (HW_SDHC_XFERTYP(x).U = (v)) +#define HW_SDHC_XFERTYP_RD(x) (ADDRESS_READ(hw_sdhc_xfertyp_t, HW_SDHC_XFERTYP_ADDR(x))) +#define HW_SDHC_XFERTYP_WR(x, v) (ADDRESS_WRITE(hw_sdhc_xfertyp_t, HW_SDHC_XFERTYP_ADDR(x), v)) #define HW_SDHC_XFERTYP_SET(x, v) (HW_SDHC_XFERTYP_WR(x, HW_SDHC_XFERTYP_RD(x) | (v))) #define HW_SDHC_XFERTYP_CLR(x, v) (HW_SDHC_XFERTYP_WR(x, HW_SDHC_XFERTYP_RD(x) & ~(v))) #define HW_SDHC_XFERTYP_TOG(x, v) (HW_SDHC_XFERTYP_WR(x, HW_SDHC_XFERTYP_RD(x) ^ (v))) @@ -484,13 +491,13 @@ #define BS_SDHC_XFERTYP_DMAEN (1U) /*!< Bit field size in bits for SDHC_XFERTYP_DMAEN. */ /*! @brief Read current value of the SDHC_XFERTYP_DMAEN field. */ -#define BR_SDHC_XFERTYP_DMAEN(x) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DMAEN)) +#define BR_SDHC_XFERTYP_DMAEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DMAEN))) /*! @brief Format value for bitfield SDHC_XFERTYP_DMAEN. */ #define BF_SDHC_XFERTYP_DMAEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_DMAEN) & BM_SDHC_XFERTYP_DMAEN) /*! @brief Set the DMAEN field to a new value. */ -#define BW_SDHC_XFERTYP_DMAEN(x, v) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DMAEN) = (v)) +#define BW_SDHC_XFERTYP_DMAEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DMAEN), v)) /*@}*/ /*! @@ -510,13 +517,13 @@ #define BS_SDHC_XFERTYP_BCEN (1U) /*!< Bit field size in bits for SDHC_XFERTYP_BCEN. */ /*! @brief Read current value of the SDHC_XFERTYP_BCEN field. */ -#define BR_SDHC_XFERTYP_BCEN(x) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_BCEN)) +#define BR_SDHC_XFERTYP_BCEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_BCEN))) /*! @brief Format value for bitfield SDHC_XFERTYP_BCEN. */ #define BF_SDHC_XFERTYP_BCEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_BCEN) & BM_SDHC_XFERTYP_BCEN) /*! @brief Set the BCEN field to a new value. */ -#define BW_SDHC_XFERTYP_BCEN(x, v) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_BCEN) = (v)) +#define BW_SDHC_XFERTYP_BCEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_BCEN), v)) /*@}*/ /*! @@ -540,13 +547,13 @@ #define BS_SDHC_XFERTYP_AC12EN (1U) /*!< Bit field size in bits for SDHC_XFERTYP_AC12EN. */ /*! @brief Read current value of the SDHC_XFERTYP_AC12EN field. */ -#define BR_SDHC_XFERTYP_AC12EN(x) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_AC12EN)) +#define BR_SDHC_XFERTYP_AC12EN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_AC12EN))) /*! @brief Format value for bitfield SDHC_XFERTYP_AC12EN. */ #define BF_SDHC_XFERTYP_AC12EN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_AC12EN) & BM_SDHC_XFERTYP_AC12EN) /*! @brief Set the AC12EN field to a new value. */ -#define BW_SDHC_XFERTYP_AC12EN(x, v) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_AC12EN) = (v)) +#define BW_SDHC_XFERTYP_AC12EN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_AC12EN), v)) /*@}*/ /*! @@ -566,13 +573,13 @@ #define BS_SDHC_XFERTYP_DTDSEL (1U) /*!< Bit field size in bits for SDHC_XFERTYP_DTDSEL. */ /*! @brief Read current value of the SDHC_XFERTYP_DTDSEL field. */ -#define BR_SDHC_XFERTYP_DTDSEL(x) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DTDSEL)) +#define BR_SDHC_XFERTYP_DTDSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DTDSEL))) /*! @brief Format value for bitfield SDHC_XFERTYP_DTDSEL. */ #define BF_SDHC_XFERTYP_DTDSEL(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_DTDSEL) & BM_SDHC_XFERTYP_DTDSEL) /*! @brief Set the DTDSEL field to a new value. */ -#define BW_SDHC_XFERTYP_DTDSEL(x, v) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DTDSEL) = (v)) +#define BW_SDHC_XFERTYP_DTDSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DTDSEL), v)) /*@}*/ /*! @@ -592,13 +599,13 @@ #define BS_SDHC_XFERTYP_MSBSEL (1U) /*!< Bit field size in bits for SDHC_XFERTYP_MSBSEL. */ /*! @brief Read current value of the SDHC_XFERTYP_MSBSEL field. */ -#define BR_SDHC_XFERTYP_MSBSEL(x) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_MSBSEL)) +#define BR_SDHC_XFERTYP_MSBSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_MSBSEL))) /*! @brief Format value for bitfield SDHC_XFERTYP_MSBSEL. */ #define BF_SDHC_XFERTYP_MSBSEL(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_MSBSEL) & BM_SDHC_XFERTYP_MSBSEL) /*! @brief Set the MSBSEL field to a new value. */ -#define BW_SDHC_XFERTYP_MSBSEL(x, v) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_MSBSEL) = (v)) +#define BW_SDHC_XFERTYP_MSBSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_MSBSEL), v)) /*@}*/ /*! @@ -616,7 +623,7 @@ #define BS_SDHC_XFERTYP_RSPTYP (2U) /*!< Bit field size in bits for SDHC_XFERTYP_RSPTYP. */ /*! @brief Read current value of the SDHC_XFERTYP_RSPTYP field. */ -#define BR_SDHC_XFERTYP_RSPTYP(x) (HW_SDHC_XFERTYP(x).B.RSPTYP) +#define BR_SDHC_XFERTYP_RSPTYP(x) (UNION_READ(hw_sdhc_xfertyp_t, HW_SDHC_XFERTYP_ADDR(x), U, B.RSPTYP)) /*! @brief Format value for bitfield SDHC_XFERTYP_RSPTYP. */ #define BF_SDHC_XFERTYP_RSPTYP(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_RSPTYP) & BM_SDHC_XFERTYP_RSPTYP) @@ -643,13 +650,13 @@ #define BS_SDHC_XFERTYP_CCCEN (1U) /*!< Bit field size in bits for SDHC_XFERTYP_CCCEN. */ /*! @brief Read current value of the SDHC_XFERTYP_CCCEN field. */ -#define BR_SDHC_XFERTYP_CCCEN(x) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_CCCEN)) +#define BR_SDHC_XFERTYP_CCCEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_CCCEN))) /*! @brief Format value for bitfield SDHC_XFERTYP_CCCEN. */ #define BF_SDHC_XFERTYP_CCCEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_CCCEN) & BM_SDHC_XFERTYP_CCCEN) /*! @brief Set the CCCEN field to a new value. */ -#define BW_SDHC_XFERTYP_CCCEN(x, v) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_CCCEN) = (v)) +#define BW_SDHC_XFERTYP_CCCEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_CCCEN), v)) /*@}*/ /*! @@ -670,13 +677,13 @@ #define BS_SDHC_XFERTYP_CICEN (1U) /*!< Bit field size in bits for SDHC_XFERTYP_CICEN. */ /*! @brief Read current value of the SDHC_XFERTYP_CICEN field. */ -#define BR_SDHC_XFERTYP_CICEN(x) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_CICEN)) +#define BR_SDHC_XFERTYP_CICEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_CICEN))) /*! @brief Format value for bitfield SDHC_XFERTYP_CICEN. */ #define BF_SDHC_XFERTYP_CICEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_CICEN) & BM_SDHC_XFERTYP_CICEN) /*! @brief Set the CICEN field to a new value. */ -#define BW_SDHC_XFERTYP_CICEN(x, v) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_CICEN) = (v)) +#define BW_SDHC_XFERTYP_CICEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_CICEN), v)) /*@}*/ /*! @@ -702,13 +709,13 @@ #define BS_SDHC_XFERTYP_DPSEL (1U) /*!< Bit field size in bits for SDHC_XFERTYP_DPSEL. */ /*! @brief Read current value of the SDHC_XFERTYP_DPSEL field. */ -#define BR_SDHC_XFERTYP_DPSEL(x) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DPSEL)) +#define BR_SDHC_XFERTYP_DPSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DPSEL))) /*! @brief Format value for bitfield SDHC_XFERTYP_DPSEL. */ #define BF_SDHC_XFERTYP_DPSEL(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_DPSEL) & BM_SDHC_XFERTYP_DPSEL) /*! @brief Set the DPSEL field to a new value. */ -#define BW_SDHC_XFERTYP_DPSEL(x, v) (BITBAND_ACCESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DPSEL) = (v)) +#define BW_SDHC_XFERTYP_DPSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_XFERTYP_ADDR(x), BP_SDHC_XFERTYP_DPSEL), v)) /*@}*/ /*! @@ -747,7 +754,7 @@ #define BS_SDHC_XFERTYP_CMDTYP (2U) /*!< Bit field size in bits for SDHC_XFERTYP_CMDTYP. */ /*! @brief Read current value of the SDHC_XFERTYP_CMDTYP field. */ -#define BR_SDHC_XFERTYP_CMDTYP(x) (HW_SDHC_XFERTYP(x).B.CMDTYP) +#define BR_SDHC_XFERTYP_CMDTYP(x) (UNION_READ(hw_sdhc_xfertyp_t, HW_SDHC_XFERTYP_ADDR(x), U, B.CMDTYP)) /*! @brief Format value for bitfield SDHC_XFERTYP_CMDTYP. */ #define BF_SDHC_XFERTYP_CMDTYP(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_CMDTYP) & BM_SDHC_XFERTYP_CMDTYP) @@ -769,7 +776,7 @@ #define BS_SDHC_XFERTYP_CMDINX (6U) /*!< Bit field size in bits for SDHC_XFERTYP_CMDINX. */ /*! @brief Read current value of the SDHC_XFERTYP_CMDINX field. */ -#define BR_SDHC_XFERTYP_CMDINX(x) (HW_SDHC_XFERTYP(x).B.CMDINX) +#define BR_SDHC_XFERTYP_CMDINX(x) (UNION_READ(hw_sdhc_xfertyp_t, HW_SDHC_XFERTYP_ADDR(x), U, B.CMDINX)) /*! @brief Format value for bitfield SDHC_XFERTYP_CMDINX. */ #define BF_SDHC_XFERTYP_CMDINX(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_XFERTYP_CMDINX) & BM_SDHC_XFERTYP_CMDINX) @@ -805,7 +812,7 @@ #define HW_SDHC_CMDRSP0_ADDR(x) ((x) + 0x10U) #define HW_SDHC_CMDRSP0(x) (*(__I hw_sdhc_cmdrsp0_t *) HW_SDHC_CMDRSP0_ADDR(x)) -#define HW_SDHC_CMDRSP0_RD(x) (HW_SDHC_CMDRSP0(x).U) +#define HW_SDHC_CMDRSP0_RD(x) (ADDRESS_READ(hw_sdhc_cmdrsp0_t, HW_SDHC_CMDRSP0_ADDR(x))) /*@}*/ /* @@ -851,7 +858,7 @@ #define HW_SDHC_CMDRSP1_ADDR(x) ((x) + 0x14U) #define HW_SDHC_CMDRSP1(x) (*(__I hw_sdhc_cmdrsp1_t *) HW_SDHC_CMDRSP1_ADDR(x)) -#define HW_SDHC_CMDRSP1_RD(x) (HW_SDHC_CMDRSP1(x).U) +#define HW_SDHC_CMDRSP1_RD(x) (ADDRESS_READ(hw_sdhc_cmdrsp1_t, HW_SDHC_CMDRSP1_ADDR(x))) /*@}*/ /* @@ -897,7 +904,7 @@ #define HW_SDHC_CMDRSP2_ADDR(x) ((x) + 0x18U) #define HW_SDHC_CMDRSP2(x) (*(__I hw_sdhc_cmdrsp2_t *) HW_SDHC_CMDRSP2_ADDR(x)) -#define HW_SDHC_CMDRSP2_RD(x) (HW_SDHC_CMDRSP2(x).U) +#define HW_SDHC_CMDRSP2_RD(x) (ADDRESS_READ(hw_sdhc_cmdrsp2_t, HW_SDHC_CMDRSP2_ADDR(x))) /*@}*/ /* @@ -972,7 +979,7 @@ #define HW_SDHC_CMDRSP3_ADDR(x) ((x) + 0x1CU) #define HW_SDHC_CMDRSP3(x) (*(__I hw_sdhc_cmdrsp3_t *) HW_SDHC_CMDRSP3_ADDR(x)) -#define HW_SDHC_CMDRSP3_RD(x) (HW_SDHC_CMDRSP3(x).U) +#define HW_SDHC_CMDRSP3_RD(x) (ADDRESS_READ(hw_sdhc_cmdrsp3_t, HW_SDHC_CMDRSP3_ADDR(x))) /*@}*/ /* @@ -1019,8 +1026,8 @@ #define HW_SDHC_DATPORT_ADDR(x) ((x) + 0x20U) #define HW_SDHC_DATPORT(x) (*(__IO hw_sdhc_datport_t *) HW_SDHC_DATPORT_ADDR(x)) -#define HW_SDHC_DATPORT_RD(x) (HW_SDHC_DATPORT(x).U) -#define HW_SDHC_DATPORT_WR(x, v) (HW_SDHC_DATPORT(x).U = (v)) +#define HW_SDHC_DATPORT_RD(x) (ADDRESS_READ(hw_sdhc_datport_t, HW_SDHC_DATPORT_ADDR(x))) +#define HW_SDHC_DATPORT_WR(x, v) (ADDRESS_WRITE(hw_sdhc_datport_t, HW_SDHC_DATPORT_ADDR(x), v)) #define HW_SDHC_DATPORT_SET(x, v) (HW_SDHC_DATPORT_WR(x, HW_SDHC_DATPORT_RD(x) | (v))) #define HW_SDHC_DATPORT_CLR(x, v) (HW_SDHC_DATPORT_WR(x, HW_SDHC_DATPORT_RD(x) & ~(v))) #define HW_SDHC_DATPORT_TOG(x, v) (HW_SDHC_DATPORT_WR(x, HW_SDHC_DATPORT_RD(x) ^ (v))) @@ -1100,7 +1107,7 @@ #define HW_SDHC_PRSSTAT_ADDR(x) ((x) + 0x24U) #define HW_SDHC_PRSSTAT(x) (*(__I hw_sdhc_prsstat_t *) HW_SDHC_PRSSTAT_ADDR(x)) -#define HW_SDHC_PRSSTAT_RD(x) (HW_SDHC_PRSSTAT(x).U) +#define HW_SDHC_PRSSTAT_RD(x) (ADDRESS_READ(hw_sdhc_prsstat_t, HW_SDHC_PRSSTAT_ADDR(x))) /*@}*/ /* @@ -1131,7 +1138,7 @@ #define BS_SDHC_PRSSTAT_CIHB (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_CIHB. */ /*! @brief Read current value of the SDHC_PRSSTAT_CIHB field. */ -#define BR_SDHC_PRSSTAT_CIHB(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_CIHB)) +#define BR_SDHC_PRSSTAT_CIHB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_CIHB))) /*@}*/ /*! @@ -1155,7 +1162,7 @@ #define BS_SDHC_PRSSTAT_CDIHB (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_CDIHB. */ /*! @brief Read current value of the SDHC_PRSSTAT_CDIHB field. */ -#define BR_SDHC_PRSSTAT_CDIHB(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_CDIHB)) +#define BR_SDHC_PRSSTAT_CDIHB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_CDIHB))) /*@}*/ /*! @@ -1199,7 +1206,7 @@ #define BS_SDHC_PRSSTAT_DLA (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_DLA. */ /*! @brief Read current value of the SDHC_PRSSTAT_DLA field. */ -#define BR_SDHC_PRSSTAT_DLA(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_DLA)) +#define BR_SDHC_PRSSTAT_DLA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_DLA))) /*@}*/ /*! @@ -1220,7 +1227,7 @@ #define BS_SDHC_PRSSTAT_SDSTB (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_SDSTB. */ /*! @brief Read current value of the SDHC_PRSSTAT_SDSTB field. */ -#define BR_SDHC_PRSSTAT_SDSTB(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_SDSTB)) +#define BR_SDHC_PRSSTAT_SDSTB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_SDSTB))) /*@}*/ /*! @@ -1239,7 +1246,7 @@ #define BS_SDHC_PRSSTAT_IPGOFF (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_IPGOFF. */ /*! @brief Read current value of the SDHC_PRSSTAT_IPGOFF field. */ -#define BR_SDHC_PRSSTAT_IPGOFF(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_IPGOFF)) +#define BR_SDHC_PRSSTAT_IPGOFF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_IPGOFF))) /*@}*/ /*! @@ -1258,7 +1265,7 @@ #define BS_SDHC_PRSSTAT_HCKOFF (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_HCKOFF. */ /*! @brief Read current value of the SDHC_PRSSTAT_HCKOFF field. */ -#define BR_SDHC_PRSSTAT_HCKOFF(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_HCKOFF)) +#define BR_SDHC_PRSSTAT_HCKOFF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_HCKOFF))) /*@}*/ /*! @@ -1280,7 +1287,7 @@ #define BS_SDHC_PRSSTAT_PEROFF (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_PEROFF. */ /*! @brief Read current value of the SDHC_PRSSTAT_PEROFF field. */ -#define BR_SDHC_PRSSTAT_PEROFF(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_PEROFF)) +#define BR_SDHC_PRSSTAT_PEROFF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_PEROFF))) /*@}*/ /*! @@ -1301,7 +1308,7 @@ #define BS_SDHC_PRSSTAT_SDOFF (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_SDOFF. */ /*! @brief Read current value of the SDHC_PRSSTAT_SDOFF field. */ -#define BR_SDHC_PRSSTAT_SDOFF(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_SDOFF)) +#define BR_SDHC_PRSSTAT_SDOFF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_SDOFF))) /*@}*/ /*! @@ -1329,7 +1336,7 @@ #define BS_SDHC_PRSSTAT_WTA (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_WTA. */ /*! @brief Read current value of the SDHC_PRSSTAT_WTA field. */ -#define BR_SDHC_PRSSTAT_WTA(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_WTA)) +#define BR_SDHC_PRSSTAT_WTA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_WTA))) /*@}*/ /*! @@ -1355,7 +1362,7 @@ #define BS_SDHC_PRSSTAT_RTA (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_RTA. */ /*! @brief Read current value of the SDHC_PRSSTAT_RTA field. */ -#define BR_SDHC_PRSSTAT_RTA(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_RTA)) +#define BR_SDHC_PRSSTAT_RTA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_RTA))) /*@}*/ /*! @@ -1379,7 +1386,7 @@ #define BS_SDHC_PRSSTAT_BWEN (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_BWEN. */ /*! @brief Read current value of the SDHC_PRSSTAT_BWEN field. */ -#define BR_SDHC_PRSSTAT_BWEN(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_BWEN)) +#define BR_SDHC_PRSSTAT_BWEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_BWEN))) /*@}*/ /*! @@ -1403,7 +1410,7 @@ #define BS_SDHC_PRSSTAT_BREN (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_BREN. */ /*! @brief Read current value of the SDHC_PRSSTAT_BREN field. */ -#define BR_SDHC_PRSSTAT_BREN(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_BREN)) +#define BR_SDHC_PRSSTAT_BREN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_BREN))) /*@}*/ /*! @@ -1427,7 +1434,7 @@ #define BS_SDHC_PRSSTAT_CINS (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_CINS. */ /*! @brief Read current value of the SDHC_PRSSTAT_CINS field. */ -#define BR_SDHC_PRSSTAT_CINS(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_CINS)) +#define BR_SDHC_PRSSTAT_CINS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_CINS))) /*@}*/ /*! @@ -1444,7 +1451,7 @@ #define BS_SDHC_PRSSTAT_CLSL (1U) /*!< Bit field size in bits for SDHC_PRSSTAT_CLSL. */ /*! @brief Read current value of the SDHC_PRSSTAT_CLSL field. */ -#define BR_SDHC_PRSSTAT_CLSL(x) (BITBAND_ACCESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_CLSL)) +#define BR_SDHC_PRSSTAT_CLSL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PRSSTAT_ADDR(x), BP_SDHC_PRSSTAT_CLSL))) /*@}*/ /*! @@ -1462,7 +1469,7 @@ #define BS_SDHC_PRSSTAT_DLSL (8U) /*!< Bit field size in bits for SDHC_PRSSTAT_DLSL. */ /*! @brief Read current value of the SDHC_PRSSTAT_DLSL field. */ -#define BR_SDHC_PRSSTAT_DLSL(x) (HW_SDHC_PRSSTAT(x).B.DLSL) +#define BR_SDHC_PRSSTAT_DLSL(x) (UNION_READ(hw_sdhc_prsstat_t, HW_SDHC_PRSSTAT_ADDR(x), U, B.DLSL)) /*@}*/ /******************************************************************************* @@ -1522,8 +1529,8 @@ #define HW_SDHC_PROCTL_ADDR(x) ((x) + 0x28U) #define HW_SDHC_PROCTL(x) (*(__IO hw_sdhc_proctl_t *) HW_SDHC_PROCTL_ADDR(x)) -#define HW_SDHC_PROCTL_RD(x) (HW_SDHC_PROCTL(x).U) -#define HW_SDHC_PROCTL_WR(x, v) (HW_SDHC_PROCTL(x).U = (v)) +#define HW_SDHC_PROCTL_RD(x) (ADDRESS_READ(hw_sdhc_proctl_t, HW_SDHC_PROCTL_ADDR(x))) +#define HW_SDHC_PROCTL_WR(x, v) (ADDRESS_WRITE(hw_sdhc_proctl_t, HW_SDHC_PROCTL_ADDR(x), v)) #define HW_SDHC_PROCTL_SET(x, v) (HW_SDHC_PROCTL_WR(x, HW_SDHC_PROCTL_RD(x) | (v))) #define HW_SDHC_PROCTL_CLR(x, v) (HW_SDHC_PROCTL_WR(x, HW_SDHC_PROCTL_RD(x) & ~(v))) #define HW_SDHC_PROCTL_TOG(x, v) (HW_SDHC_PROCTL_WR(x, HW_SDHC_PROCTL_RD(x) ^ (v))) @@ -1553,13 +1560,13 @@ #define BS_SDHC_PROCTL_LCTL (1U) /*!< Bit field size in bits for SDHC_PROCTL_LCTL. */ /*! @brief Read current value of the SDHC_PROCTL_LCTL field. */ -#define BR_SDHC_PROCTL_LCTL(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_LCTL)) +#define BR_SDHC_PROCTL_LCTL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_LCTL))) /*! @brief Format value for bitfield SDHC_PROCTL_LCTL. */ #define BF_SDHC_PROCTL_LCTL(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_LCTL) & BM_SDHC_PROCTL_LCTL) /*! @brief Set the LCTL field to a new value. */ -#define BW_SDHC_PROCTL_LCTL(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_LCTL) = (v)) +#define BW_SDHC_PROCTL_LCTL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_LCTL), v)) /*@}*/ /*! @@ -1581,7 +1588,7 @@ #define BS_SDHC_PROCTL_DTW (2U) /*!< Bit field size in bits for SDHC_PROCTL_DTW. */ /*! @brief Read current value of the SDHC_PROCTL_DTW field. */ -#define BR_SDHC_PROCTL_DTW(x) (HW_SDHC_PROCTL(x).B.DTW) +#define BR_SDHC_PROCTL_DTW(x) (UNION_READ(hw_sdhc_proctl_t, HW_SDHC_PROCTL_ADDR(x), U, B.DTW)) /*! @brief Format value for bitfield SDHC_PROCTL_DTW. */ #define BF_SDHC_PROCTL_DTW(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_DTW) & BM_SDHC_PROCTL_DTW) @@ -1609,13 +1616,13 @@ #define BS_SDHC_PROCTL_D3CD (1U) /*!< Bit field size in bits for SDHC_PROCTL_D3CD. */ /*! @brief Read current value of the SDHC_PROCTL_D3CD field. */ -#define BR_SDHC_PROCTL_D3CD(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_D3CD)) +#define BR_SDHC_PROCTL_D3CD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_D3CD))) /*! @brief Format value for bitfield SDHC_PROCTL_D3CD. */ #define BF_SDHC_PROCTL_D3CD(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_D3CD) & BM_SDHC_PROCTL_D3CD) /*! @brief Set the D3CD field to a new value. */ -#define BW_SDHC_PROCTL_D3CD(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_D3CD) = (v)) +#define BW_SDHC_PROCTL_D3CD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_D3CD), v)) /*@}*/ /*! @@ -1635,7 +1642,7 @@ #define BS_SDHC_PROCTL_EMODE (2U) /*!< Bit field size in bits for SDHC_PROCTL_EMODE. */ /*! @brief Read current value of the SDHC_PROCTL_EMODE field. */ -#define BR_SDHC_PROCTL_EMODE(x) (HW_SDHC_PROCTL(x).B.EMODE) +#define BR_SDHC_PROCTL_EMODE(x) (UNION_READ(hw_sdhc_proctl_t, HW_SDHC_PROCTL_ADDR(x), U, B.EMODE)) /*! @brief Format value for bitfield SDHC_PROCTL_EMODE. */ #define BF_SDHC_PROCTL_EMODE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_EMODE) & BM_SDHC_PROCTL_EMODE) @@ -1659,13 +1666,13 @@ #define BS_SDHC_PROCTL_CDTL (1U) /*!< Bit field size in bits for SDHC_PROCTL_CDTL. */ /*! @brief Read current value of the SDHC_PROCTL_CDTL field. */ -#define BR_SDHC_PROCTL_CDTL(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CDTL)) +#define BR_SDHC_PROCTL_CDTL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CDTL))) /*! @brief Format value for bitfield SDHC_PROCTL_CDTL. */ #define BF_SDHC_PROCTL_CDTL(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_CDTL) & BM_SDHC_PROCTL_CDTL) /*! @brief Set the CDTL field to a new value. */ -#define BW_SDHC_PROCTL_CDTL(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CDTL) = (v)) +#define BW_SDHC_PROCTL_CDTL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CDTL), v)) /*@}*/ /*! @@ -1683,13 +1690,13 @@ #define BS_SDHC_PROCTL_CDSS (1U) /*!< Bit field size in bits for SDHC_PROCTL_CDSS. */ /*! @brief Read current value of the SDHC_PROCTL_CDSS field. */ -#define BR_SDHC_PROCTL_CDSS(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CDSS)) +#define BR_SDHC_PROCTL_CDSS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CDSS))) /*! @brief Format value for bitfield SDHC_PROCTL_CDSS. */ #define BF_SDHC_PROCTL_CDSS(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_CDSS) & BM_SDHC_PROCTL_CDSS) /*! @brief Set the CDSS field to a new value. */ -#define BW_SDHC_PROCTL_CDSS(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CDSS) = (v)) +#define BW_SDHC_PROCTL_CDSS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CDSS), v)) /*@}*/ /*! @@ -1710,7 +1717,7 @@ #define BS_SDHC_PROCTL_DMAS (2U) /*!< Bit field size in bits for SDHC_PROCTL_DMAS. */ /*! @brief Read current value of the SDHC_PROCTL_DMAS field. */ -#define BR_SDHC_PROCTL_DMAS(x) (HW_SDHC_PROCTL(x).B.DMAS) +#define BR_SDHC_PROCTL_DMAS(x) (UNION_READ(hw_sdhc_proctl_t, HW_SDHC_PROCTL_ADDR(x), U, B.DMAS)) /*! @brief Format value for bitfield SDHC_PROCTL_DMAS. */ #define BF_SDHC_PROCTL_DMAS(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_DMAS) & BM_SDHC_PROCTL_DMAS) @@ -1749,13 +1756,13 @@ #define BS_SDHC_PROCTL_SABGREQ (1U) /*!< Bit field size in bits for SDHC_PROCTL_SABGREQ. */ /*! @brief Read current value of the SDHC_PROCTL_SABGREQ field. */ -#define BR_SDHC_PROCTL_SABGREQ(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_SABGREQ)) +#define BR_SDHC_PROCTL_SABGREQ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_SABGREQ))) /*! @brief Format value for bitfield SDHC_PROCTL_SABGREQ. */ #define BF_SDHC_PROCTL_SABGREQ(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_SABGREQ) & BM_SDHC_PROCTL_SABGREQ) /*! @brief Set the SABGREQ field to a new value. */ -#define BW_SDHC_PROCTL_SABGREQ(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_SABGREQ) = (v)) +#define BW_SDHC_PROCTL_SABGREQ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_SABGREQ), v)) /*@}*/ /*! @@ -1779,13 +1786,13 @@ #define BS_SDHC_PROCTL_CREQ (1U) /*!< Bit field size in bits for SDHC_PROCTL_CREQ. */ /*! @brief Read current value of the SDHC_PROCTL_CREQ field. */ -#define BR_SDHC_PROCTL_CREQ(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CREQ)) +#define BR_SDHC_PROCTL_CREQ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CREQ))) /*! @brief Format value for bitfield SDHC_PROCTL_CREQ. */ #define BF_SDHC_PROCTL_CREQ(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_CREQ) & BM_SDHC_PROCTL_CREQ) /*! @brief Set the CREQ field to a new value. */ -#define BW_SDHC_PROCTL_CREQ(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CREQ) = (v)) +#define BW_SDHC_PROCTL_CREQ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_CREQ), v)) /*@}*/ /*! @@ -1813,13 +1820,13 @@ #define BS_SDHC_PROCTL_RWCTL (1U) /*!< Bit field size in bits for SDHC_PROCTL_RWCTL. */ /*! @brief Read current value of the SDHC_PROCTL_RWCTL field. */ -#define BR_SDHC_PROCTL_RWCTL(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_RWCTL)) +#define BR_SDHC_PROCTL_RWCTL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_RWCTL))) /*! @brief Format value for bitfield SDHC_PROCTL_RWCTL. */ #define BF_SDHC_PROCTL_RWCTL(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_RWCTL) & BM_SDHC_PROCTL_RWCTL) /*! @brief Set the RWCTL field to a new value. */ -#define BW_SDHC_PROCTL_RWCTL(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_RWCTL) = (v)) +#define BW_SDHC_PROCTL_RWCTL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_RWCTL), v)) /*@}*/ /*! @@ -1843,13 +1850,13 @@ #define BS_SDHC_PROCTL_IABG (1U) /*!< Bit field size in bits for SDHC_PROCTL_IABG. */ /*! @brief Read current value of the SDHC_PROCTL_IABG field. */ -#define BR_SDHC_PROCTL_IABG(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_IABG)) +#define BR_SDHC_PROCTL_IABG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_IABG))) /*! @brief Format value for bitfield SDHC_PROCTL_IABG. */ #define BF_SDHC_PROCTL_IABG(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_IABG) & BM_SDHC_PROCTL_IABG) /*! @brief Set the IABG field to a new value. */ -#define BW_SDHC_PROCTL_IABG(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_IABG) = (v)) +#define BW_SDHC_PROCTL_IABG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_IABG), v)) /*@}*/ /*! @@ -1871,13 +1878,13 @@ #define BS_SDHC_PROCTL_WECINT (1U) /*!< Bit field size in bits for SDHC_PROCTL_WECINT. */ /*! @brief Read current value of the SDHC_PROCTL_WECINT field. */ -#define BR_SDHC_PROCTL_WECINT(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECINT)) +#define BR_SDHC_PROCTL_WECINT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECINT))) /*! @brief Format value for bitfield SDHC_PROCTL_WECINT. */ #define BF_SDHC_PROCTL_WECINT(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_WECINT) & BM_SDHC_PROCTL_WECINT) /*! @brief Set the WECINT field to a new value. */ -#define BW_SDHC_PROCTL_WECINT(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECINT) = (v)) +#define BW_SDHC_PROCTL_WECINT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECINT), v)) /*@}*/ /*! @@ -1899,13 +1906,13 @@ #define BS_SDHC_PROCTL_WECINS (1U) /*!< Bit field size in bits for SDHC_PROCTL_WECINS. */ /*! @brief Read current value of the SDHC_PROCTL_WECINS field. */ -#define BR_SDHC_PROCTL_WECINS(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECINS)) +#define BR_SDHC_PROCTL_WECINS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECINS))) /*! @brief Format value for bitfield SDHC_PROCTL_WECINS. */ #define BF_SDHC_PROCTL_WECINS(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_WECINS) & BM_SDHC_PROCTL_WECINS) /*! @brief Set the WECINS field to a new value. */ -#define BW_SDHC_PROCTL_WECINS(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECINS) = (v)) +#define BW_SDHC_PROCTL_WECINS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECINS), v)) /*@}*/ /*! @@ -1926,13 +1933,13 @@ #define BS_SDHC_PROCTL_WECRM (1U) /*!< Bit field size in bits for SDHC_PROCTL_WECRM. */ /*! @brief Read current value of the SDHC_PROCTL_WECRM field. */ -#define BR_SDHC_PROCTL_WECRM(x) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECRM)) +#define BR_SDHC_PROCTL_WECRM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECRM))) /*! @brief Format value for bitfield SDHC_PROCTL_WECRM. */ #define BF_SDHC_PROCTL_WECRM(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_PROCTL_WECRM) & BM_SDHC_PROCTL_WECRM) /*! @brief Set the WECRM field to a new value. */ -#define BW_SDHC_PROCTL_WECRM(x, v) (BITBAND_ACCESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECRM) = (v)) +#define BW_SDHC_PROCTL_WECRM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_PROCTL_ADDR(x), BP_SDHC_PROCTL_WECRM), v)) /*@}*/ /******************************************************************************* @@ -1972,8 +1979,8 @@ #define HW_SDHC_SYSCTL_ADDR(x) ((x) + 0x2CU) #define HW_SDHC_SYSCTL(x) (*(__IO hw_sdhc_sysctl_t *) HW_SDHC_SYSCTL_ADDR(x)) -#define HW_SDHC_SYSCTL_RD(x) (HW_SDHC_SYSCTL(x).U) -#define HW_SDHC_SYSCTL_WR(x, v) (HW_SDHC_SYSCTL(x).U = (v)) +#define HW_SDHC_SYSCTL_RD(x) (ADDRESS_READ(hw_sdhc_sysctl_t, HW_SDHC_SYSCTL_ADDR(x))) +#define HW_SDHC_SYSCTL_WR(x, v) (ADDRESS_WRITE(hw_sdhc_sysctl_t, HW_SDHC_SYSCTL_ADDR(x), v)) #define HW_SDHC_SYSCTL_SET(x, v) (HW_SDHC_SYSCTL_WR(x, HW_SDHC_SYSCTL_RD(x) | (v))) #define HW_SDHC_SYSCTL_CLR(x, v) (HW_SDHC_SYSCTL_WR(x, HW_SDHC_SYSCTL_RD(x) & ~(v))) #define HW_SDHC_SYSCTL_TOG(x, v) (HW_SDHC_SYSCTL_WR(x, HW_SDHC_SYSCTL_RD(x) ^ (v))) @@ -2006,13 +2013,13 @@ #define BS_SDHC_SYSCTL_IPGEN (1U) /*!< Bit field size in bits for SDHC_SYSCTL_IPGEN. */ /*! @brief Read current value of the SDHC_SYSCTL_IPGEN field. */ -#define BR_SDHC_SYSCTL_IPGEN(x) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_IPGEN)) +#define BR_SDHC_SYSCTL_IPGEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_IPGEN))) /*! @brief Format value for bitfield SDHC_SYSCTL_IPGEN. */ #define BF_SDHC_SYSCTL_IPGEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_IPGEN) & BM_SDHC_SYSCTL_IPGEN) /*! @brief Set the IPGEN field to a new value. */ -#define BW_SDHC_SYSCTL_IPGEN(x, v) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_IPGEN) = (v)) +#define BW_SDHC_SYSCTL_IPGEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_IPGEN), v)) /*@}*/ /*! @@ -2032,13 +2039,13 @@ #define BS_SDHC_SYSCTL_HCKEN (1U) /*!< Bit field size in bits for SDHC_SYSCTL_HCKEN. */ /*! @brief Read current value of the SDHC_SYSCTL_HCKEN field. */ -#define BR_SDHC_SYSCTL_HCKEN(x) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_HCKEN)) +#define BR_SDHC_SYSCTL_HCKEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_HCKEN))) /*! @brief Format value for bitfield SDHC_SYSCTL_HCKEN. */ #define BF_SDHC_SYSCTL_HCKEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_HCKEN) & BM_SDHC_SYSCTL_HCKEN) /*! @brief Set the HCKEN field to a new value. */ -#define BW_SDHC_SYSCTL_HCKEN(x, v) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_HCKEN) = (v)) +#define BW_SDHC_SYSCTL_HCKEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_HCKEN), v)) /*@}*/ /*! @@ -2066,13 +2073,13 @@ #define BS_SDHC_SYSCTL_PEREN (1U) /*!< Bit field size in bits for SDHC_SYSCTL_PEREN. */ /*! @brief Read current value of the SDHC_SYSCTL_PEREN field. */ -#define BR_SDHC_SYSCTL_PEREN(x) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_PEREN)) +#define BR_SDHC_SYSCTL_PEREN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_PEREN))) /*! @brief Format value for bitfield SDHC_SYSCTL_PEREN. */ #define BF_SDHC_SYSCTL_PEREN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_PEREN) & BM_SDHC_SYSCTL_PEREN) /*! @brief Set the PEREN field to a new value. */ -#define BW_SDHC_SYSCTL_PEREN(x, v) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_PEREN) = (v)) +#define BW_SDHC_SYSCTL_PEREN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_PEREN), v)) /*@}*/ /*! @@ -2090,13 +2097,13 @@ #define BS_SDHC_SYSCTL_SDCLKEN (1U) /*!< Bit field size in bits for SDHC_SYSCTL_SDCLKEN. */ /*! @brief Read current value of the SDHC_SYSCTL_SDCLKEN field. */ -#define BR_SDHC_SYSCTL_SDCLKEN(x) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_SDCLKEN)) +#define BR_SDHC_SYSCTL_SDCLKEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_SDCLKEN))) /*! @brief Format value for bitfield SDHC_SYSCTL_SDCLKEN. */ #define BF_SDHC_SYSCTL_SDCLKEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_SDCLKEN) & BM_SDHC_SYSCTL_SDCLKEN) /*! @brief Set the SDCLKEN field to a new value. */ -#define BW_SDHC_SYSCTL_SDCLKEN(x, v) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_SDCLKEN) = (v)) +#define BW_SDHC_SYSCTL_SDCLKEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_SDCLKEN), v)) /*@}*/ /*! @@ -2118,7 +2125,7 @@ #define BS_SDHC_SYSCTL_DVS (4U) /*!< Bit field size in bits for SDHC_SYSCTL_DVS. */ /*! @brief Read current value of the SDHC_SYSCTL_DVS field. */ -#define BR_SDHC_SYSCTL_DVS(x) (HW_SDHC_SYSCTL(x).B.DVS) +#define BR_SDHC_SYSCTL_DVS(x) (UNION_READ(hw_sdhc_sysctl_t, HW_SDHC_SYSCTL_ADDR(x), U, B.DVS)) /*! @brief Format value for bitfield SDHC_SYSCTL_DVS. */ #define BF_SDHC_SYSCTL_DVS(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_DVS) & BM_SDHC_SYSCTL_DVS) @@ -2164,7 +2171,7 @@ #define BS_SDHC_SYSCTL_SDCLKFS (8U) /*!< Bit field size in bits for SDHC_SYSCTL_SDCLKFS. */ /*! @brief Read current value of the SDHC_SYSCTL_SDCLKFS field. */ -#define BR_SDHC_SYSCTL_SDCLKFS(x) (HW_SDHC_SYSCTL(x).B.SDCLKFS) +#define BR_SDHC_SYSCTL_SDCLKFS(x) (UNION_READ(hw_sdhc_sysctl_t, HW_SDHC_SYSCTL_ADDR(x), U, B.SDCLKFS)) /*! @brief Format value for bitfield SDHC_SYSCTL_SDCLKFS. */ #define BF_SDHC_SYSCTL_SDCLKFS(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_SDCLKFS) & BM_SDHC_SYSCTL_SDCLKFS) @@ -2194,7 +2201,7 @@ #define BS_SDHC_SYSCTL_DTOCV (4U) /*!< Bit field size in bits for SDHC_SYSCTL_DTOCV. */ /*! @brief Read current value of the SDHC_SYSCTL_DTOCV field. */ -#define BR_SDHC_SYSCTL_DTOCV(x) (HW_SDHC_SYSCTL(x).B.DTOCV) +#define BR_SDHC_SYSCTL_DTOCV(x) (UNION_READ(hw_sdhc_sysctl_t, HW_SDHC_SYSCTL_ADDR(x), U, B.DTOCV)) /*! @brief Format value for bitfield SDHC_SYSCTL_DTOCV. */ #define BF_SDHC_SYSCTL_DTOCV(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_DTOCV) & BM_SDHC_SYSCTL_DTOCV) @@ -2227,7 +2234,7 @@ #define BF_SDHC_SYSCTL_RSTA(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_RSTA) & BM_SDHC_SYSCTL_RSTA) /*! @brief Set the RSTA field to a new value. */ -#define BW_SDHC_SYSCTL_RSTA(x, v) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_RSTA) = (v)) +#define BW_SDHC_SYSCTL_RSTA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_RSTA), v)) /*@}*/ /*! @@ -2249,7 +2256,7 @@ #define BF_SDHC_SYSCTL_RSTC(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_RSTC) & BM_SDHC_SYSCTL_RSTC) /*! @brief Set the RSTC field to a new value. */ -#define BW_SDHC_SYSCTL_RSTC(x, v) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_RSTC) = (v)) +#define BW_SDHC_SYSCTL_RSTC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_RSTC), v)) /*@}*/ /*! @@ -2276,7 +2283,7 @@ #define BF_SDHC_SYSCTL_RSTD(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_RSTD) & BM_SDHC_SYSCTL_RSTD) /*! @brief Set the RSTD field to a new value. */ -#define BW_SDHC_SYSCTL_RSTD(x, v) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_RSTD) = (v)) +#define BW_SDHC_SYSCTL_RSTD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_RSTD), v)) /*@}*/ /*! @@ -2302,13 +2309,13 @@ #define BS_SDHC_SYSCTL_INITA (1U) /*!< Bit field size in bits for SDHC_SYSCTL_INITA. */ /*! @brief Read current value of the SDHC_SYSCTL_INITA field. */ -#define BR_SDHC_SYSCTL_INITA(x) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_INITA)) +#define BR_SDHC_SYSCTL_INITA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_INITA))) /*! @brief Format value for bitfield SDHC_SYSCTL_INITA. */ #define BF_SDHC_SYSCTL_INITA(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_SYSCTL_INITA) & BM_SDHC_SYSCTL_INITA) /*! @brief Set the INITA field to a new value. */ -#define BW_SDHC_SYSCTL_INITA(x, v) (BITBAND_ACCESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_INITA) = (v)) +#define BW_SDHC_SYSCTL_INITA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_SYSCTL_ADDR(x), BP_SDHC_SYSCTL_INITA), v)) /*@}*/ /******************************************************************************* @@ -2376,8 +2383,8 @@ #define HW_SDHC_IRQSTAT_ADDR(x) ((x) + 0x30U) #define HW_SDHC_IRQSTAT(x) (*(__IO hw_sdhc_irqstat_t *) HW_SDHC_IRQSTAT_ADDR(x)) -#define HW_SDHC_IRQSTAT_RD(x) (HW_SDHC_IRQSTAT(x).U) -#define HW_SDHC_IRQSTAT_WR(x, v) (HW_SDHC_IRQSTAT(x).U = (v)) +#define HW_SDHC_IRQSTAT_RD(x) (ADDRESS_READ(hw_sdhc_irqstat_t, HW_SDHC_IRQSTAT_ADDR(x))) +#define HW_SDHC_IRQSTAT_WR(x, v) (ADDRESS_WRITE(hw_sdhc_irqstat_t, HW_SDHC_IRQSTAT_ADDR(x), v)) #define HW_SDHC_IRQSTAT_SET(x, v) (HW_SDHC_IRQSTAT_WR(x, HW_SDHC_IRQSTAT_RD(x) | (v))) #define HW_SDHC_IRQSTAT_CLR(x, v) (HW_SDHC_IRQSTAT_WR(x, HW_SDHC_IRQSTAT_RD(x) & ~(v))) #define HW_SDHC_IRQSTAT_TOG(x, v) (HW_SDHC_IRQSTAT_WR(x, HW_SDHC_IRQSTAT_RD(x) ^ (v))) @@ -2403,13 +2410,13 @@ #define BS_SDHC_IRQSTAT_CC (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_CC. */ /*! @brief Read current value of the SDHC_IRQSTAT_CC field. */ -#define BR_SDHC_IRQSTAT_CC(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CC)) +#define BR_SDHC_IRQSTAT_CC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CC))) /*! @brief Format value for bitfield SDHC_IRQSTAT_CC. */ #define BF_SDHC_IRQSTAT_CC(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_CC) & BM_SDHC_IRQSTAT_CC) /*! @brief Set the CC field to a new value. */ -#define BW_SDHC_IRQSTAT_CC(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CC) = (v)) +#define BW_SDHC_IRQSTAT_CC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CC), v)) /*@}*/ /*! @@ -2439,13 +2446,13 @@ #define BS_SDHC_IRQSTAT_TC (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_TC. */ /*! @brief Read current value of the SDHC_IRQSTAT_TC field. */ -#define BR_SDHC_IRQSTAT_TC(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_TC)) +#define BR_SDHC_IRQSTAT_TC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_TC))) /*! @brief Format value for bitfield SDHC_IRQSTAT_TC. */ #define BF_SDHC_IRQSTAT_TC(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_TC) & BM_SDHC_IRQSTAT_TC) /*! @brief Set the TC field to a new value. */ -#define BW_SDHC_IRQSTAT_TC(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_TC) = (v)) +#define BW_SDHC_IRQSTAT_TC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_TC), v)) /*@}*/ /*! @@ -2469,13 +2476,13 @@ #define BS_SDHC_IRQSTAT_BGE (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_BGE. */ /*! @brief Read current value of the SDHC_IRQSTAT_BGE field. */ -#define BR_SDHC_IRQSTAT_BGE(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BGE)) +#define BR_SDHC_IRQSTAT_BGE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BGE))) /*! @brief Format value for bitfield SDHC_IRQSTAT_BGE. */ #define BF_SDHC_IRQSTAT_BGE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_BGE) & BM_SDHC_IRQSTAT_BGE) /*! @brief Set the BGE field to a new value. */ -#define BW_SDHC_IRQSTAT_BGE(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BGE) = (v)) +#define BW_SDHC_IRQSTAT_BGE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BGE), v)) /*@}*/ /*! @@ -2496,13 +2503,13 @@ #define BS_SDHC_IRQSTAT_DINT (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_DINT. */ /*! @brief Read current value of the SDHC_IRQSTAT_DINT field. */ -#define BR_SDHC_IRQSTAT_DINT(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DINT)) +#define BR_SDHC_IRQSTAT_DINT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DINT))) /*! @brief Format value for bitfield SDHC_IRQSTAT_DINT. */ #define BF_SDHC_IRQSTAT_DINT(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_DINT) & BM_SDHC_IRQSTAT_DINT) /*! @brief Set the DINT field to a new value. */ -#define BW_SDHC_IRQSTAT_DINT(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DINT) = (v)) +#define BW_SDHC_IRQSTAT_DINT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DINT), v)) /*@}*/ /*! @@ -2522,13 +2529,13 @@ #define BS_SDHC_IRQSTAT_BWR (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_BWR. */ /*! @brief Read current value of the SDHC_IRQSTAT_BWR field. */ -#define BR_SDHC_IRQSTAT_BWR(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BWR)) +#define BR_SDHC_IRQSTAT_BWR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BWR))) /*! @brief Format value for bitfield SDHC_IRQSTAT_BWR. */ #define BF_SDHC_IRQSTAT_BWR(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_BWR) & BM_SDHC_IRQSTAT_BWR) /*! @brief Set the BWR field to a new value. */ -#define BW_SDHC_IRQSTAT_BWR(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BWR) = (v)) +#define BW_SDHC_IRQSTAT_BWR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BWR), v)) /*@}*/ /*! @@ -2548,13 +2555,13 @@ #define BS_SDHC_IRQSTAT_BRR (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_BRR. */ /*! @brief Read current value of the SDHC_IRQSTAT_BRR field. */ -#define BR_SDHC_IRQSTAT_BRR(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BRR)) +#define BR_SDHC_IRQSTAT_BRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BRR))) /*! @brief Format value for bitfield SDHC_IRQSTAT_BRR. */ #define BF_SDHC_IRQSTAT_BRR(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_BRR) & BM_SDHC_IRQSTAT_BRR) /*! @brief Set the BRR field to a new value. */ -#define BW_SDHC_IRQSTAT_BRR(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BRR) = (v)) +#define BW_SDHC_IRQSTAT_BRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_BRR), v)) /*@}*/ /*! @@ -2578,13 +2585,13 @@ #define BS_SDHC_IRQSTAT_CINS (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_CINS. */ /*! @brief Read current value of the SDHC_IRQSTAT_CINS field. */ -#define BR_SDHC_IRQSTAT_CINS(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CINS)) +#define BR_SDHC_IRQSTAT_CINS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CINS))) /*! @brief Format value for bitfield SDHC_IRQSTAT_CINS. */ #define BF_SDHC_IRQSTAT_CINS(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_CINS) & BM_SDHC_IRQSTAT_CINS) /*! @brief Set the CINS field to a new value. */ -#define BW_SDHC_IRQSTAT_CINS(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CINS) = (v)) +#define BW_SDHC_IRQSTAT_CINS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CINS), v)) /*@}*/ /*! @@ -2608,13 +2615,13 @@ #define BS_SDHC_IRQSTAT_CRM (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_CRM. */ /*! @brief Read current value of the SDHC_IRQSTAT_CRM field. */ -#define BR_SDHC_IRQSTAT_CRM(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CRM)) +#define BR_SDHC_IRQSTAT_CRM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CRM))) /*! @brief Format value for bitfield SDHC_IRQSTAT_CRM. */ #define BF_SDHC_IRQSTAT_CRM(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_CRM) & BM_SDHC_IRQSTAT_CRM) /*! @brief Set the CRM field to a new value. */ -#define BW_SDHC_IRQSTAT_CRM(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CRM) = (v)) +#define BW_SDHC_IRQSTAT_CRM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CRM), v)) /*@}*/ /*! @@ -2647,13 +2654,13 @@ #define BS_SDHC_IRQSTAT_CINT (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_CINT. */ /*! @brief Read current value of the SDHC_IRQSTAT_CINT field. */ -#define BR_SDHC_IRQSTAT_CINT(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CINT)) +#define BR_SDHC_IRQSTAT_CINT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CINT))) /*! @brief Format value for bitfield SDHC_IRQSTAT_CINT. */ #define BF_SDHC_IRQSTAT_CINT(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_CINT) & BM_SDHC_IRQSTAT_CINT) /*! @brief Set the CINT field to a new value. */ -#define BW_SDHC_IRQSTAT_CINT(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CINT) = (v)) +#define BW_SDHC_IRQSTAT_CINT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CINT), v)) /*@}*/ /*! @@ -2674,13 +2681,13 @@ #define BS_SDHC_IRQSTAT_CTOE (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_CTOE. */ /*! @brief Read current value of the SDHC_IRQSTAT_CTOE field. */ -#define BR_SDHC_IRQSTAT_CTOE(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CTOE)) +#define BR_SDHC_IRQSTAT_CTOE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CTOE))) /*! @brief Format value for bitfield SDHC_IRQSTAT_CTOE. */ #define BF_SDHC_IRQSTAT_CTOE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_CTOE) & BM_SDHC_IRQSTAT_CTOE) /*! @brief Set the CTOE field to a new value. */ -#define BW_SDHC_IRQSTAT_CTOE(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CTOE) = (v)) +#define BW_SDHC_IRQSTAT_CTOE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CTOE), v)) /*@}*/ /*! @@ -2705,13 +2712,13 @@ #define BS_SDHC_IRQSTAT_CCE (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_CCE. */ /*! @brief Read current value of the SDHC_IRQSTAT_CCE field. */ -#define BR_SDHC_IRQSTAT_CCE(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CCE)) +#define BR_SDHC_IRQSTAT_CCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CCE))) /*! @brief Format value for bitfield SDHC_IRQSTAT_CCE. */ #define BF_SDHC_IRQSTAT_CCE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_CCE) & BM_SDHC_IRQSTAT_CCE) /*! @brief Set the CCE field to a new value. */ -#define BW_SDHC_IRQSTAT_CCE(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CCE) = (v)) +#define BW_SDHC_IRQSTAT_CCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CCE), v)) /*@}*/ /*! @@ -2729,13 +2736,13 @@ #define BS_SDHC_IRQSTAT_CEBE (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_CEBE. */ /*! @brief Read current value of the SDHC_IRQSTAT_CEBE field. */ -#define BR_SDHC_IRQSTAT_CEBE(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CEBE)) +#define BR_SDHC_IRQSTAT_CEBE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CEBE))) /*! @brief Format value for bitfield SDHC_IRQSTAT_CEBE. */ #define BF_SDHC_IRQSTAT_CEBE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_CEBE) & BM_SDHC_IRQSTAT_CEBE) /*! @brief Set the CEBE field to a new value. */ -#define BW_SDHC_IRQSTAT_CEBE(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CEBE) = (v)) +#define BW_SDHC_IRQSTAT_CEBE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CEBE), v)) /*@}*/ /*! @@ -2753,13 +2760,13 @@ #define BS_SDHC_IRQSTAT_CIE (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_CIE. */ /*! @brief Read current value of the SDHC_IRQSTAT_CIE field. */ -#define BR_SDHC_IRQSTAT_CIE(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CIE)) +#define BR_SDHC_IRQSTAT_CIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CIE))) /*! @brief Format value for bitfield SDHC_IRQSTAT_CIE. */ #define BF_SDHC_IRQSTAT_CIE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_CIE) & BM_SDHC_IRQSTAT_CIE) /*! @brief Set the CIE field to a new value. */ -#define BW_SDHC_IRQSTAT_CIE(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CIE) = (v)) +#define BW_SDHC_IRQSTAT_CIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_CIE), v)) /*@}*/ /*! @@ -2778,13 +2785,13 @@ #define BS_SDHC_IRQSTAT_DTOE (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_DTOE. */ /*! @brief Read current value of the SDHC_IRQSTAT_DTOE field. */ -#define BR_SDHC_IRQSTAT_DTOE(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DTOE)) +#define BR_SDHC_IRQSTAT_DTOE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DTOE))) /*! @brief Format value for bitfield SDHC_IRQSTAT_DTOE. */ #define BF_SDHC_IRQSTAT_DTOE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_DTOE) & BM_SDHC_IRQSTAT_DTOE) /*! @brief Set the DTOE field to a new value. */ -#define BW_SDHC_IRQSTAT_DTOE(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DTOE) = (v)) +#define BW_SDHC_IRQSTAT_DTOE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DTOE), v)) /*@}*/ /*! @@ -2804,13 +2811,13 @@ #define BS_SDHC_IRQSTAT_DCE (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_DCE. */ /*! @brief Read current value of the SDHC_IRQSTAT_DCE field. */ -#define BR_SDHC_IRQSTAT_DCE(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DCE)) +#define BR_SDHC_IRQSTAT_DCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DCE))) /*! @brief Format value for bitfield SDHC_IRQSTAT_DCE. */ #define BF_SDHC_IRQSTAT_DCE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_DCE) & BM_SDHC_IRQSTAT_DCE) /*! @brief Set the DCE field to a new value. */ -#define BW_SDHC_IRQSTAT_DCE(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DCE) = (v)) +#define BW_SDHC_IRQSTAT_DCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DCE), v)) /*@}*/ /*! @@ -2829,13 +2836,13 @@ #define BS_SDHC_IRQSTAT_DEBE (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_DEBE. */ /*! @brief Read current value of the SDHC_IRQSTAT_DEBE field. */ -#define BR_SDHC_IRQSTAT_DEBE(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DEBE)) +#define BR_SDHC_IRQSTAT_DEBE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DEBE))) /*! @brief Format value for bitfield SDHC_IRQSTAT_DEBE. */ #define BF_SDHC_IRQSTAT_DEBE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_DEBE) & BM_SDHC_IRQSTAT_DEBE) /*! @brief Set the DEBE field to a new value. */ -#define BW_SDHC_IRQSTAT_DEBE(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DEBE) = (v)) +#define BW_SDHC_IRQSTAT_DEBE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DEBE), v)) /*@}*/ /*! @@ -2856,13 +2863,13 @@ #define BS_SDHC_IRQSTAT_AC12E (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_AC12E. */ /*! @brief Read current value of the SDHC_IRQSTAT_AC12E field. */ -#define BR_SDHC_IRQSTAT_AC12E(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_AC12E)) +#define BR_SDHC_IRQSTAT_AC12E(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_AC12E))) /*! @brief Format value for bitfield SDHC_IRQSTAT_AC12E. */ #define BF_SDHC_IRQSTAT_AC12E(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_AC12E) & BM_SDHC_IRQSTAT_AC12E) /*! @brief Set the AC12E field to a new value. */ -#define BW_SDHC_IRQSTAT_AC12E(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_AC12E) = (v)) +#define BW_SDHC_IRQSTAT_AC12E(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_AC12E), v)) /*@}*/ /*! @@ -2887,13 +2894,13 @@ #define BS_SDHC_IRQSTAT_DMAE (1U) /*!< Bit field size in bits for SDHC_IRQSTAT_DMAE. */ /*! @brief Read current value of the SDHC_IRQSTAT_DMAE field. */ -#define BR_SDHC_IRQSTAT_DMAE(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DMAE)) +#define BR_SDHC_IRQSTAT_DMAE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DMAE))) /*! @brief Format value for bitfield SDHC_IRQSTAT_DMAE. */ #define BF_SDHC_IRQSTAT_DMAE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTAT_DMAE) & BM_SDHC_IRQSTAT_DMAE) /*! @brief Set the DMAE field to a new value. */ -#define BW_SDHC_IRQSTAT_DMAE(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DMAE) = (v)) +#define BW_SDHC_IRQSTAT_DMAE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTAT_ADDR(x), BP_SDHC_IRQSTAT_DMAE), v)) /*@}*/ /******************************************************************************* @@ -2952,8 +2959,8 @@ #define HW_SDHC_IRQSTATEN_ADDR(x) ((x) + 0x34U) #define HW_SDHC_IRQSTATEN(x) (*(__IO hw_sdhc_irqstaten_t *) HW_SDHC_IRQSTATEN_ADDR(x)) -#define HW_SDHC_IRQSTATEN_RD(x) (HW_SDHC_IRQSTATEN(x).U) -#define HW_SDHC_IRQSTATEN_WR(x, v) (HW_SDHC_IRQSTATEN(x).U = (v)) +#define HW_SDHC_IRQSTATEN_RD(x) (ADDRESS_READ(hw_sdhc_irqstaten_t, HW_SDHC_IRQSTATEN_ADDR(x))) +#define HW_SDHC_IRQSTATEN_WR(x, v) (ADDRESS_WRITE(hw_sdhc_irqstaten_t, HW_SDHC_IRQSTATEN_ADDR(x), v)) #define HW_SDHC_IRQSTATEN_SET(x, v) (HW_SDHC_IRQSTATEN_WR(x, HW_SDHC_IRQSTATEN_RD(x) | (v))) #define HW_SDHC_IRQSTATEN_CLR(x, v) (HW_SDHC_IRQSTATEN_WR(x, HW_SDHC_IRQSTATEN_RD(x) & ~(v))) #define HW_SDHC_IRQSTATEN_TOG(x, v) (HW_SDHC_IRQSTATEN_WR(x, HW_SDHC_IRQSTATEN_RD(x) ^ (v))) @@ -2976,13 +2983,13 @@ #define BS_SDHC_IRQSTATEN_CCSEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_CCSEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_CCSEN field. */ -#define BR_SDHC_IRQSTATEN_CCSEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CCSEN)) +#define BR_SDHC_IRQSTATEN_CCSEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CCSEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_CCSEN. */ #define BF_SDHC_IRQSTATEN_CCSEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_CCSEN) & BM_SDHC_IRQSTATEN_CCSEN) /*! @brief Set the CCSEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_CCSEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CCSEN) = (v)) +#define BW_SDHC_IRQSTATEN_CCSEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CCSEN), v)) /*@}*/ /*! @@ -2998,13 +3005,13 @@ #define BS_SDHC_IRQSTATEN_TCSEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_TCSEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_TCSEN field. */ -#define BR_SDHC_IRQSTATEN_TCSEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_TCSEN)) +#define BR_SDHC_IRQSTATEN_TCSEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_TCSEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_TCSEN. */ #define BF_SDHC_IRQSTATEN_TCSEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_TCSEN) & BM_SDHC_IRQSTATEN_TCSEN) /*! @brief Set the TCSEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_TCSEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_TCSEN) = (v)) +#define BW_SDHC_IRQSTATEN_TCSEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_TCSEN), v)) /*@}*/ /*! @@ -3020,13 +3027,13 @@ #define BS_SDHC_IRQSTATEN_BGESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_BGESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_BGESEN field. */ -#define BR_SDHC_IRQSTATEN_BGESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BGESEN)) +#define BR_SDHC_IRQSTATEN_BGESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BGESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_BGESEN. */ #define BF_SDHC_IRQSTATEN_BGESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_BGESEN) & BM_SDHC_IRQSTATEN_BGESEN) /*! @brief Set the BGESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_BGESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BGESEN) = (v)) +#define BW_SDHC_IRQSTATEN_BGESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BGESEN), v)) /*@}*/ /*! @@ -3042,13 +3049,13 @@ #define BS_SDHC_IRQSTATEN_DINTSEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_DINTSEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_DINTSEN field. */ -#define BR_SDHC_IRQSTATEN_DINTSEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DINTSEN)) +#define BR_SDHC_IRQSTATEN_DINTSEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DINTSEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_DINTSEN. */ #define BF_SDHC_IRQSTATEN_DINTSEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_DINTSEN) & BM_SDHC_IRQSTATEN_DINTSEN) /*! @brief Set the DINTSEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_DINTSEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DINTSEN) = (v)) +#define BW_SDHC_IRQSTATEN_DINTSEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DINTSEN), v)) /*@}*/ /*! @@ -3064,13 +3071,13 @@ #define BS_SDHC_IRQSTATEN_BWRSEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_BWRSEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_BWRSEN field. */ -#define BR_SDHC_IRQSTATEN_BWRSEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BWRSEN)) +#define BR_SDHC_IRQSTATEN_BWRSEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BWRSEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_BWRSEN. */ #define BF_SDHC_IRQSTATEN_BWRSEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_BWRSEN) & BM_SDHC_IRQSTATEN_BWRSEN) /*! @brief Set the BWRSEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_BWRSEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BWRSEN) = (v)) +#define BW_SDHC_IRQSTATEN_BWRSEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BWRSEN), v)) /*@}*/ /*! @@ -3086,13 +3093,13 @@ #define BS_SDHC_IRQSTATEN_BRRSEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_BRRSEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_BRRSEN field. */ -#define BR_SDHC_IRQSTATEN_BRRSEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BRRSEN)) +#define BR_SDHC_IRQSTATEN_BRRSEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BRRSEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_BRRSEN. */ #define BF_SDHC_IRQSTATEN_BRRSEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_BRRSEN) & BM_SDHC_IRQSTATEN_BRRSEN) /*! @brief Set the BRRSEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_BRRSEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BRRSEN) = (v)) +#define BW_SDHC_IRQSTATEN_BRRSEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_BRRSEN), v)) /*@}*/ /*! @@ -3108,13 +3115,13 @@ #define BS_SDHC_IRQSTATEN_CINSEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_CINSEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_CINSEN field. */ -#define BR_SDHC_IRQSTATEN_CINSEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CINSEN)) +#define BR_SDHC_IRQSTATEN_CINSEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CINSEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_CINSEN. */ #define BF_SDHC_IRQSTATEN_CINSEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_CINSEN) & BM_SDHC_IRQSTATEN_CINSEN) /*! @brief Set the CINSEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_CINSEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CINSEN) = (v)) +#define BW_SDHC_IRQSTATEN_CINSEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CINSEN), v)) /*@}*/ /*! @@ -3130,13 +3137,13 @@ #define BS_SDHC_IRQSTATEN_CRMSEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_CRMSEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_CRMSEN field. */ -#define BR_SDHC_IRQSTATEN_CRMSEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CRMSEN)) +#define BR_SDHC_IRQSTATEN_CRMSEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CRMSEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_CRMSEN. */ #define BF_SDHC_IRQSTATEN_CRMSEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_CRMSEN) & BM_SDHC_IRQSTATEN_CRMSEN) /*! @brief Set the CRMSEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_CRMSEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CRMSEN) = (v)) +#define BW_SDHC_IRQSTATEN_CRMSEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CRMSEN), v)) /*@}*/ /*! @@ -3158,13 +3165,13 @@ #define BS_SDHC_IRQSTATEN_CINTSEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_CINTSEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_CINTSEN field. */ -#define BR_SDHC_IRQSTATEN_CINTSEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CINTSEN)) +#define BR_SDHC_IRQSTATEN_CINTSEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CINTSEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_CINTSEN. */ #define BF_SDHC_IRQSTATEN_CINTSEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_CINTSEN) & BM_SDHC_IRQSTATEN_CINTSEN) /*! @brief Set the CINTSEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_CINTSEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CINTSEN) = (v)) +#define BW_SDHC_IRQSTATEN_CINTSEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CINTSEN), v)) /*@}*/ /*! @@ -3180,13 +3187,13 @@ #define BS_SDHC_IRQSTATEN_CTOESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_CTOESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_CTOESEN field. */ -#define BR_SDHC_IRQSTATEN_CTOESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CTOESEN)) +#define BR_SDHC_IRQSTATEN_CTOESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CTOESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_CTOESEN. */ #define BF_SDHC_IRQSTATEN_CTOESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_CTOESEN) & BM_SDHC_IRQSTATEN_CTOESEN) /*! @brief Set the CTOESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_CTOESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CTOESEN) = (v)) +#define BW_SDHC_IRQSTATEN_CTOESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CTOESEN), v)) /*@}*/ /*! @@ -3202,13 +3209,13 @@ #define BS_SDHC_IRQSTATEN_CCESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_CCESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_CCESEN field. */ -#define BR_SDHC_IRQSTATEN_CCESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CCESEN)) +#define BR_SDHC_IRQSTATEN_CCESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CCESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_CCESEN. */ #define BF_SDHC_IRQSTATEN_CCESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_CCESEN) & BM_SDHC_IRQSTATEN_CCESEN) /*! @brief Set the CCESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_CCESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CCESEN) = (v)) +#define BW_SDHC_IRQSTATEN_CCESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CCESEN), v)) /*@}*/ /*! @@ -3224,13 +3231,13 @@ #define BS_SDHC_IRQSTATEN_CEBESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_CEBESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_CEBESEN field. */ -#define BR_SDHC_IRQSTATEN_CEBESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CEBESEN)) +#define BR_SDHC_IRQSTATEN_CEBESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CEBESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_CEBESEN. */ #define BF_SDHC_IRQSTATEN_CEBESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_CEBESEN) & BM_SDHC_IRQSTATEN_CEBESEN) /*! @brief Set the CEBESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_CEBESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CEBESEN) = (v)) +#define BW_SDHC_IRQSTATEN_CEBESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CEBESEN), v)) /*@}*/ /*! @@ -3246,13 +3253,13 @@ #define BS_SDHC_IRQSTATEN_CIESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_CIESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_CIESEN field. */ -#define BR_SDHC_IRQSTATEN_CIESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CIESEN)) +#define BR_SDHC_IRQSTATEN_CIESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CIESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_CIESEN. */ #define BF_SDHC_IRQSTATEN_CIESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_CIESEN) & BM_SDHC_IRQSTATEN_CIESEN) /*! @brief Set the CIESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_CIESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CIESEN) = (v)) +#define BW_SDHC_IRQSTATEN_CIESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_CIESEN), v)) /*@}*/ /*! @@ -3268,13 +3275,13 @@ #define BS_SDHC_IRQSTATEN_DTOESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_DTOESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_DTOESEN field. */ -#define BR_SDHC_IRQSTATEN_DTOESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DTOESEN)) +#define BR_SDHC_IRQSTATEN_DTOESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DTOESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_DTOESEN. */ #define BF_SDHC_IRQSTATEN_DTOESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_DTOESEN) & BM_SDHC_IRQSTATEN_DTOESEN) /*! @brief Set the DTOESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_DTOESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DTOESEN) = (v)) +#define BW_SDHC_IRQSTATEN_DTOESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DTOESEN), v)) /*@}*/ /*! @@ -3290,13 +3297,13 @@ #define BS_SDHC_IRQSTATEN_DCESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_DCESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_DCESEN field. */ -#define BR_SDHC_IRQSTATEN_DCESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DCESEN)) +#define BR_SDHC_IRQSTATEN_DCESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DCESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_DCESEN. */ #define BF_SDHC_IRQSTATEN_DCESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_DCESEN) & BM_SDHC_IRQSTATEN_DCESEN) /*! @brief Set the DCESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_DCESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DCESEN) = (v)) +#define BW_SDHC_IRQSTATEN_DCESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DCESEN), v)) /*@}*/ /*! @@ -3312,13 +3319,13 @@ #define BS_SDHC_IRQSTATEN_DEBESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_DEBESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_DEBESEN field. */ -#define BR_SDHC_IRQSTATEN_DEBESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DEBESEN)) +#define BR_SDHC_IRQSTATEN_DEBESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DEBESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_DEBESEN. */ #define BF_SDHC_IRQSTATEN_DEBESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_DEBESEN) & BM_SDHC_IRQSTATEN_DEBESEN) /*! @brief Set the DEBESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_DEBESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DEBESEN) = (v)) +#define BW_SDHC_IRQSTATEN_DEBESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DEBESEN), v)) /*@}*/ /*! @@ -3334,13 +3341,13 @@ #define BS_SDHC_IRQSTATEN_AC12ESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_AC12ESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_AC12ESEN field. */ -#define BR_SDHC_IRQSTATEN_AC12ESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_AC12ESEN)) +#define BR_SDHC_IRQSTATEN_AC12ESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_AC12ESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_AC12ESEN. */ #define BF_SDHC_IRQSTATEN_AC12ESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_AC12ESEN) & BM_SDHC_IRQSTATEN_AC12ESEN) /*! @brief Set the AC12ESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_AC12ESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_AC12ESEN) = (v)) +#define BW_SDHC_IRQSTATEN_AC12ESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_AC12ESEN), v)) /*@}*/ /*! @@ -3356,13 +3363,13 @@ #define BS_SDHC_IRQSTATEN_DMAESEN (1U) /*!< Bit field size in bits for SDHC_IRQSTATEN_DMAESEN. */ /*! @brief Read current value of the SDHC_IRQSTATEN_DMAESEN field. */ -#define BR_SDHC_IRQSTATEN_DMAESEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DMAESEN)) +#define BR_SDHC_IRQSTATEN_DMAESEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DMAESEN))) /*! @brief Format value for bitfield SDHC_IRQSTATEN_DMAESEN. */ #define BF_SDHC_IRQSTATEN_DMAESEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSTATEN_DMAESEN) & BM_SDHC_IRQSTATEN_DMAESEN) /*! @brief Set the DMAESEN field to a new value. */ -#define BW_SDHC_IRQSTATEN_DMAESEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DMAESEN) = (v)) +#define BW_SDHC_IRQSTATEN_DMAESEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSTATEN_ADDR(x), BP_SDHC_IRQSTATEN_DMAESEN), v)) /*@}*/ /******************************************************************************* @@ -3419,8 +3426,8 @@ #define HW_SDHC_IRQSIGEN_ADDR(x) ((x) + 0x38U) #define HW_SDHC_IRQSIGEN(x) (*(__IO hw_sdhc_irqsigen_t *) HW_SDHC_IRQSIGEN_ADDR(x)) -#define HW_SDHC_IRQSIGEN_RD(x) (HW_SDHC_IRQSIGEN(x).U) -#define HW_SDHC_IRQSIGEN_WR(x, v) (HW_SDHC_IRQSIGEN(x).U = (v)) +#define HW_SDHC_IRQSIGEN_RD(x) (ADDRESS_READ(hw_sdhc_irqsigen_t, HW_SDHC_IRQSIGEN_ADDR(x))) +#define HW_SDHC_IRQSIGEN_WR(x, v) (ADDRESS_WRITE(hw_sdhc_irqsigen_t, HW_SDHC_IRQSIGEN_ADDR(x), v)) #define HW_SDHC_IRQSIGEN_SET(x, v) (HW_SDHC_IRQSIGEN_WR(x, HW_SDHC_IRQSIGEN_RD(x) | (v))) #define HW_SDHC_IRQSIGEN_CLR(x, v) (HW_SDHC_IRQSIGEN_WR(x, HW_SDHC_IRQSIGEN_RD(x) & ~(v))) #define HW_SDHC_IRQSIGEN_TOG(x, v) (HW_SDHC_IRQSIGEN_WR(x, HW_SDHC_IRQSIGEN_RD(x) ^ (v))) @@ -3443,13 +3450,13 @@ #define BS_SDHC_IRQSIGEN_CCIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_CCIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_CCIEN field. */ -#define BR_SDHC_IRQSIGEN_CCIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CCIEN)) +#define BR_SDHC_IRQSIGEN_CCIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CCIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_CCIEN. */ #define BF_SDHC_IRQSIGEN_CCIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_CCIEN) & BM_SDHC_IRQSIGEN_CCIEN) /*! @brief Set the CCIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_CCIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CCIEN) = (v)) +#define BW_SDHC_IRQSIGEN_CCIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CCIEN), v)) /*@}*/ /*! @@ -3465,13 +3472,13 @@ #define BS_SDHC_IRQSIGEN_TCIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_TCIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_TCIEN field. */ -#define BR_SDHC_IRQSIGEN_TCIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_TCIEN)) +#define BR_SDHC_IRQSIGEN_TCIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_TCIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_TCIEN. */ #define BF_SDHC_IRQSIGEN_TCIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_TCIEN) & BM_SDHC_IRQSIGEN_TCIEN) /*! @brief Set the TCIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_TCIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_TCIEN) = (v)) +#define BW_SDHC_IRQSIGEN_TCIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_TCIEN), v)) /*@}*/ /*! @@ -3487,13 +3494,13 @@ #define BS_SDHC_IRQSIGEN_BGEIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_BGEIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_BGEIEN field. */ -#define BR_SDHC_IRQSIGEN_BGEIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BGEIEN)) +#define BR_SDHC_IRQSIGEN_BGEIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BGEIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_BGEIEN. */ #define BF_SDHC_IRQSIGEN_BGEIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_BGEIEN) & BM_SDHC_IRQSIGEN_BGEIEN) /*! @brief Set the BGEIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_BGEIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BGEIEN) = (v)) +#define BW_SDHC_IRQSIGEN_BGEIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BGEIEN), v)) /*@}*/ /*! @@ -3509,13 +3516,13 @@ #define BS_SDHC_IRQSIGEN_DINTIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_DINTIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_DINTIEN field. */ -#define BR_SDHC_IRQSIGEN_DINTIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DINTIEN)) +#define BR_SDHC_IRQSIGEN_DINTIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DINTIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_DINTIEN. */ #define BF_SDHC_IRQSIGEN_DINTIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_DINTIEN) & BM_SDHC_IRQSIGEN_DINTIEN) /*! @brief Set the DINTIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_DINTIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DINTIEN) = (v)) +#define BW_SDHC_IRQSIGEN_DINTIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DINTIEN), v)) /*@}*/ /*! @@ -3531,13 +3538,13 @@ #define BS_SDHC_IRQSIGEN_BWRIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_BWRIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_BWRIEN field. */ -#define BR_SDHC_IRQSIGEN_BWRIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BWRIEN)) +#define BR_SDHC_IRQSIGEN_BWRIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BWRIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_BWRIEN. */ #define BF_SDHC_IRQSIGEN_BWRIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_BWRIEN) & BM_SDHC_IRQSIGEN_BWRIEN) /*! @brief Set the BWRIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_BWRIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BWRIEN) = (v)) +#define BW_SDHC_IRQSIGEN_BWRIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BWRIEN), v)) /*@}*/ /*! @@ -3553,13 +3560,13 @@ #define BS_SDHC_IRQSIGEN_BRRIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_BRRIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_BRRIEN field. */ -#define BR_SDHC_IRQSIGEN_BRRIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BRRIEN)) +#define BR_SDHC_IRQSIGEN_BRRIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BRRIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_BRRIEN. */ #define BF_SDHC_IRQSIGEN_BRRIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_BRRIEN) & BM_SDHC_IRQSIGEN_BRRIEN) /*! @brief Set the BRRIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_BRRIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BRRIEN) = (v)) +#define BW_SDHC_IRQSIGEN_BRRIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_BRRIEN), v)) /*@}*/ /*! @@ -3575,13 +3582,13 @@ #define BS_SDHC_IRQSIGEN_CINSIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_CINSIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_CINSIEN field. */ -#define BR_SDHC_IRQSIGEN_CINSIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CINSIEN)) +#define BR_SDHC_IRQSIGEN_CINSIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CINSIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_CINSIEN. */ #define BF_SDHC_IRQSIGEN_CINSIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_CINSIEN) & BM_SDHC_IRQSIGEN_CINSIEN) /*! @brief Set the CINSIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_CINSIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CINSIEN) = (v)) +#define BW_SDHC_IRQSIGEN_CINSIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CINSIEN), v)) /*@}*/ /*! @@ -3597,13 +3604,13 @@ #define BS_SDHC_IRQSIGEN_CRMIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_CRMIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_CRMIEN field. */ -#define BR_SDHC_IRQSIGEN_CRMIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CRMIEN)) +#define BR_SDHC_IRQSIGEN_CRMIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CRMIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_CRMIEN. */ #define BF_SDHC_IRQSIGEN_CRMIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_CRMIEN) & BM_SDHC_IRQSIGEN_CRMIEN) /*! @brief Set the CRMIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_CRMIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CRMIEN) = (v)) +#define BW_SDHC_IRQSIGEN_CRMIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CRMIEN), v)) /*@}*/ /*! @@ -3619,13 +3626,13 @@ #define BS_SDHC_IRQSIGEN_CINTIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_CINTIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_CINTIEN field. */ -#define BR_SDHC_IRQSIGEN_CINTIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CINTIEN)) +#define BR_SDHC_IRQSIGEN_CINTIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CINTIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_CINTIEN. */ #define BF_SDHC_IRQSIGEN_CINTIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_CINTIEN) & BM_SDHC_IRQSIGEN_CINTIEN) /*! @brief Set the CINTIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_CINTIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CINTIEN) = (v)) +#define BW_SDHC_IRQSIGEN_CINTIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CINTIEN), v)) /*@}*/ /*! @@ -3641,13 +3648,13 @@ #define BS_SDHC_IRQSIGEN_CTOEIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_CTOEIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_CTOEIEN field. */ -#define BR_SDHC_IRQSIGEN_CTOEIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CTOEIEN)) +#define BR_SDHC_IRQSIGEN_CTOEIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CTOEIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_CTOEIEN. */ #define BF_SDHC_IRQSIGEN_CTOEIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_CTOEIEN) & BM_SDHC_IRQSIGEN_CTOEIEN) /*! @brief Set the CTOEIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_CTOEIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CTOEIEN) = (v)) +#define BW_SDHC_IRQSIGEN_CTOEIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CTOEIEN), v)) /*@}*/ /*! @@ -3663,13 +3670,13 @@ #define BS_SDHC_IRQSIGEN_CCEIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_CCEIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_CCEIEN field. */ -#define BR_SDHC_IRQSIGEN_CCEIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CCEIEN)) +#define BR_SDHC_IRQSIGEN_CCEIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CCEIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_CCEIEN. */ #define BF_SDHC_IRQSIGEN_CCEIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_CCEIEN) & BM_SDHC_IRQSIGEN_CCEIEN) /*! @brief Set the CCEIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_CCEIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CCEIEN) = (v)) +#define BW_SDHC_IRQSIGEN_CCEIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CCEIEN), v)) /*@}*/ /*! @@ -3685,13 +3692,13 @@ #define BS_SDHC_IRQSIGEN_CEBEIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_CEBEIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_CEBEIEN field. */ -#define BR_SDHC_IRQSIGEN_CEBEIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CEBEIEN)) +#define BR_SDHC_IRQSIGEN_CEBEIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CEBEIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_CEBEIEN. */ #define BF_SDHC_IRQSIGEN_CEBEIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_CEBEIEN) & BM_SDHC_IRQSIGEN_CEBEIEN) /*! @brief Set the CEBEIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_CEBEIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CEBEIEN) = (v)) +#define BW_SDHC_IRQSIGEN_CEBEIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CEBEIEN), v)) /*@}*/ /*! @@ -3707,13 +3714,13 @@ #define BS_SDHC_IRQSIGEN_CIEIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_CIEIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_CIEIEN field. */ -#define BR_SDHC_IRQSIGEN_CIEIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CIEIEN)) +#define BR_SDHC_IRQSIGEN_CIEIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CIEIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_CIEIEN. */ #define BF_SDHC_IRQSIGEN_CIEIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_CIEIEN) & BM_SDHC_IRQSIGEN_CIEIEN) /*! @brief Set the CIEIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_CIEIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CIEIEN) = (v)) +#define BW_SDHC_IRQSIGEN_CIEIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_CIEIEN), v)) /*@}*/ /*! @@ -3729,13 +3736,13 @@ #define BS_SDHC_IRQSIGEN_DTOEIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_DTOEIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_DTOEIEN field. */ -#define BR_SDHC_IRQSIGEN_DTOEIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DTOEIEN)) +#define BR_SDHC_IRQSIGEN_DTOEIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DTOEIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_DTOEIEN. */ #define BF_SDHC_IRQSIGEN_DTOEIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_DTOEIEN) & BM_SDHC_IRQSIGEN_DTOEIEN) /*! @brief Set the DTOEIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_DTOEIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DTOEIEN) = (v)) +#define BW_SDHC_IRQSIGEN_DTOEIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DTOEIEN), v)) /*@}*/ /*! @@ -3751,13 +3758,13 @@ #define BS_SDHC_IRQSIGEN_DCEIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_DCEIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_DCEIEN field. */ -#define BR_SDHC_IRQSIGEN_DCEIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DCEIEN)) +#define BR_SDHC_IRQSIGEN_DCEIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DCEIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_DCEIEN. */ #define BF_SDHC_IRQSIGEN_DCEIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_DCEIEN) & BM_SDHC_IRQSIGEN_DCEIEN) /*! @brief Set the DCEIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_DCEIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DCEIEN) = (v)) +#define BW_SDHC_IRQSIGEN_DCEIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DCEIEN), v)) /*@}*/ /*! @@ -3773,13 +3780,13 @@ #define BS_SDHC_IRQSIGEN_DEBEIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_DEBEIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_DEBEIEN field. */ -#define BR_SDHC_IRQSIGEN_DEBEIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DEBEIEN)) +#define BR_SDHC_IRQSIGEN_DEBEIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DEBEIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_DEBEIEN. */ #define BF_SDHC_IRQSIGEN_DEBEIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_DEBEIEN) & BM_SDHC_IRQSIGEN_DEBEIEN) /*! @brief Set the DEBEIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_DEBEIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DEBEIEN) = (v)) +#define BW_SDHC_IRQSIGEN_DEBEIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DEBEIEN), v)) /*@}*/ /*! @@ -3795,13 +3802,13 @@ #define BS_SDHC_IRQSIGEN_AC12EIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_AC12EIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_AC12EIEN field. */ -#define BR_SDHC_IRQSIGEN_AC12EIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_AC12EIEN)) +#define BR_SDHC_IRQSIGEN_AC12EIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_AC12EIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_AC12EIEN. */ #define BF_SDHC_IRQSIGEN_AC12EIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_AC12EIEN) & BM_SDHC_IRQSIGEN_AC12EIEN) /*! @brief Set the AC12EIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_AC12EIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_AC12EIEN) = (v)) +#define BW_SDHC_IRQSIGEN_AC12EIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_AC12EIEN), v)) /*@}*/ /*! @@ -3817,13 +3824,13 @@ #define BS_SDHC_IRQSIGEN_DMAEIEN (1U) /*!< Bit field size in bits for SDHC_IRQSIGEN_DMAEIEN. */ /*! @brief Read current value of the SDHC_IRQSIGEN_DMAEIEN field. */ -#define BR_SDHC_IRQSIGEN_DMAEIEN(x) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DMAEIEN)) +#define BR_SDHC_IRQSIGEN_DMAEIEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DMAEIEN))) /*! @brief Format value for bitfield SDHC_IRQSIGEN_DMAEIEN. */ #define BF_SDHC_IRQSIGEN_DMAEIEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_IRQSIGEN_DMAEIEN) & BM_SDHC_IRQSIGEN_DMAEIEN) /*! @brief Set the DMAEIEN field to a new value. */ -#define BW_SDHC_IRQSIGEN_DMAEIEN(x, v) (BITBAND_ACCESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DMAEIEN) = (v)) +#define BW_SDHC_IRQSIGEN_DMAEIEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_IRQSIGEN_ADDR(x), BP_SDHC_IRQSIGEN_DMAEIEN), v)) /*@}*/ /******************************************************************************* @@ -3881,7 +3888,7 @@ #define HW_SDHC_AC12ERR_ADDR(x) ((x) + 0x3CU) #define HW_SDHC_AC12ERR(x) (*(__I hw_sdhc_ac12err_t *) HW_SDHC_AC12ERR_ADDR(x)) -#define HW_SDHC_AC12ERR_RD(x) (HW_SDHC_AC12ERR(x).U) +#define HW_SDHC_AC12ERR_RD(x) (ADDRESS_READ(hw_sdhc_ac12err_t, HW_SDHC_AC12ERR_ADDR(x))) /*@}*/ /* @@ -3907,7 +3914,7 @@ #define BS_SDHC_AC12ERR_AC12NE (1U) /*!< Bit field size in bits for SDHC_AC12ERR_AC12NE. */ /*! @brief Read current value of the SDHC_AC12ERR_AC12NE field. */ -#define BR_SDHC_AC12ERR_AC12NE(x) (BITBAND_ACCESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12NE)) +#define BR_SDHC_AC12ERR_AC12NE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12NE))) /*@}*/ /*! @@ -3927,7 +3934,7 @@ #define BS_SDHC_AC12ERR_AC12TOE (1U) /*!< Bit field size in bits for SDHC_AC12ERR_AC12TOE. */ /*! @brief Read current value of the SDHC_AC12ERR_AC12TOE field. */ -#define BR_SDHC_AC12ERR_AC12TOE(x) (BITBAND_ACCESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12TOE)) +#define BR_SDHC_AC12ERR_AC12TOE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12TOE))) /*@}*/ /*! @@ -3946,7 +3953,7 @@ #define BS_SDHC_AC12ERR_AC12EBE (1U) /*!< Bit field size in bits for SDHC_AC12ERR_AC12EBE. */ /*! @brief Read current value of the SDHC_AC12ERR_AC12EBE field. */ -#define BR_SDHC_AC12ERR_AC12EBE(x) (BITBAND_ACCESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12EBE)) +#define BR_SDHC_AC12ERR_AC12EBE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12EBE))) /*@}*/ /*! @@ -3964,7 +3971,7 @@ #define BS_SDHC_AC12ERR_AC12CE (1U) /*!< Bit field size in bits for SDHC_AC12ERR_AC12CE. */ /*! @brief Read current value of the SDHC_AC12ERR_AC12CE field. */ -#define BR_SDHC_AC12ERR_AC12CE(x) (BITBAND_ACCESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12CE)) +#define BR_SDHC_AC12ERR_AC12CE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12CE))) /*@}*/ /*! @@ -3982,7 +3989,7 @@ #define BS_SDHC_AC12ERR_AC12IE (1U) /*!< Bit field size in bits for SDHC_AC12ERR_AC12IE. */ /*! @brief Read current value of the SDHC_AC12ERR_AC12IE field. */ -#define BR_SDHC_AC12ERR_AC12IE(x) (BITBAND_ACCESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12IE)) +#define BR_SDHC_AC12ERR_AC12IE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_AC12IE))) /*@}*/ /*! @@ -4001,7 +4008,7 @@ #define BS_SDHC_AC12ERR_CNIBAC12E (1U) /*!< Bit field size in bits for SDHC_AC12ERR_CNIBAC12E. */ /*! @brief Read current value of the SDHC_AC12ERR_CNIBAC12E field. */ -#define BR_SDHC_AC12ERR_CNIBAC12E(x) (BITBAND_ACCESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_CNIBAC12E)) +#define BR_SDHC_AC12ERR_CNIBAC12E(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_AC12ERR_ADDR(x), BP_SDHC_AC12ERR_CNIBAC12E))) /*@}*/ /******************************************************************************* @@ -4041,7 +4048,7 @@ #define HW_SDHC_HTCAPBLT_ADDR(x) ((x) + 0x40U) #define HW_SDHC_HTCAPBLT(x) (*(__I hw_sdhc_htcapblt_t *) HW_SDHC_HTCAPBLT_ADDR(x)) -#define HW_SDHC_HTCAPBLT_RD(x) (HW_SDHC_HTCAPBLT(x).U) +#define HW_SDHC_HTCAPBLT_RD(x) (ADDRESS_READ(hw_sdhc_htcapblt_t, HW_SDHC_HTCAPBLT_ADDR(x))) /*@}*/ /* @@ -4067,7 +4074,7 @@ #define BS_SDHC_HTCAPBLT_MBL (3U) /*!< Bit field size in bits for SDHC_HTCAPBLT_MBL. */ /*! @brief Read current value of the SDHC_HTCAPBLT_MBL field. */ -#define BR_SDHC_HTCAPBLT_MBL(x) (HW_SDHC_HTCAPBLT(x).B.MBL) +#define BR_SDHC_HTCAPBLT_MBL(x) (UNION_READ(hw_sdhc_htcapblt_t, HW_SDHC_HTCAPBLT_ADDR(x), U, B.MBL)) /*@}*/ /*! @@ -4085,7 +4092,7 @@ #define BS_SDHC_HTCAPBLT_ADMAS (1U) /*!< Bit field size in bits for SDHC_HTCAPBLT_ADMAS. */ /*! @brief Read current value of the SDHC_HTCAPBLT_ADMAS field. */ -#define BR_SDHC_HTCAPBLT_ADMAS(x) (BITBAND_ACCESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_ADMAS)) +#define BR_SDHC_HTCAPBLT_ADMAS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_ADMAS))) /*@}*/ /*! @@ -4104,7 +4111,7 @@ #define BS_SDHC_HTCAPBLT_HSS (1U) /*!< Bit field size in bits for SDHC_HTCAPBLT_HSS. */ /*! @brief Read current value of the SDHC_HTCAPBLT_HSS field. */ -#define BR_SDHC_HTCAPBLT_HSS(x) (BITBAND_ACCESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_HSS)) +#define BR_SDHC_HTCAPBLT_HSS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_HSS))) /*@}*/ /*! @@ -4123,7 +4130,7 @@ #define BS_SDHC_HTCAPBLT_DMAS (1U) /*!< Bit field size in bits for SDHC_HTCAPBLT_DMAS. */ /*! @brief Read current value of the SDHC_HTCAPBLT_DMAS field. */ -#define BR_SDHC_HTCAPBLT_DMAS(x) (BITBAND_ACCESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_DMAS)) +#define BR_SDHC_HTCAPBLT_DMAS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_DMAS))) /*@}*/ /*! @@ -4144,7 +4151,7 @@ #define BS_SDHC_HTCAPBLT_SRS (1U) /*!< Bit field size in bits for SDHC_HTCAPBLT_SRS. */ /*! @brief Read current value of the SDHC_HTCAPBLT_SRS field. */ -#define BR_SDHC_HTCAPBLT_SRS(x) (BITBAND_ACCESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_SRS)) +#define BR_SDHC_HTCAPBLT_SRS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_SRS))) /*@}*/ /*! @@ -4162,7 +4169,7 @@ #define BS_SDHC_HTCAPBLT_VS33 (1U) /*!< Bit field size in bits for SDHC_HTCAPBLT_VS33. */ /*! @brief Read current value of the SDHC_HTCAPBLT_VS33 field. */ -#define BR_SDHC_HTCAPBLT_VS33(x) (BITBAND_ACCESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_VS33)) +#define BR_SDHC_HTCAPBLT_VS33(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_HTCAPBLT_ADDR(x), BP_SDHC_HTCAPBLT_VS33))) /*@}*/ /******************************************************************************* @@ -4197,8 +4204,8 @@ #define HW_SDHC_WML_ADDR(x) ((x) + 0x44U) #define HW_SDHC_WML(x) (*(__IO hw_sdhc_wml_t *) HW_SDHC_WML_ADDR(x)) -#define HW_SDHC_WML_RD(x) (HW_SDHC_WML(x).U) -#define HW_SDHC_WML_WR(x, v) (HW_SDHC_WML(x).U = (v)) +#define HW_SDHC_WML_RD(x) (ADDRESS_READ(hw_sdhc_wml_t, HW_SDHC_WML_ADDR(x))) +#define HW_SDHC_WML_WR(x, v) (ADDRESS_WRITE(hw_sdhc_wml_t, HW_SDHC_WML_ADDR(x), v)) #define HW_SDHC_WML_SET(x, v) (HW_SDHC_WML_WR(x, HW_SDHC_WML_RD(x) | (v))) #define HW_SDHC_WML_CLR(x, v) (HW_SDHC_WML_WR(x, HW_SDHC_WML_RD(x) & ~(v))) #define HW_SDHC_WML_TOG(x, v) (HW_SDHC_WML_WR(x, HW_SDHC_WML_RD(x) ^ (v))) @@ -4221,7 +4228,7 @@ #define BS_SDHC_WML_RDWML (8U) /*!< Bit field size in bits for SDHC_WML_RDWML. */ /*! @brief Read current value of the SDHC_WML_RDWML field. */ -#define BR_SDHC_WML_RDWML(x) (HW_SDHC_WML(x).B.RDWML) +#define BR_SDHC_WML_RDWML(x) (UNION_READ(hw_sdhc_wml_t, HW_SDHC_WML_ADDR(x), U, B.RDWML)) /*! @brief Format value for bitfield SDHC_WML_RDWML. */ #define BF_SDHC_WML_RDWML(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_WML_RDWML) & BM_SDHC_WML_RDWML) @@ -4243,7 +4250,7 @@ #define BS_SDHC_WML_WRWML (8U) /*!< Bit field size in bits for SDHC_WML_WRWML. */ /*! @brief Read current value of the SDHC_WML_WRWML field. */ -#define BR_SDHC_WML_WRWML(x) (HW_SDHC_WML(x).B.WRWML) +#define BR_SDHC_WML_WRWML(x) (UNION_READ(hw_sdhc_wml_t, HW_SDHC_WML_ADDR(x), U, B.WRWML)) /*! @brief Format value for bitfield SDHC_WML_WRWML. */ #define BF_SDHC_WML_WRWML(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_WML_WRWML) & BM_SDHC_WML_WRWML) @@ -4314,8 +4321,8 @@ #define HW_SDHC_FEVT_ADDR(x) ((x) + 0x50U) #define HW_SDHC_FEVT(x) (*(__O hw_sdhc_fevt_t *) HW_SDHC_FEVT_ADDR(x)) -#define HW_SDHC_FEVT_RD(x) (HW_SDHC_FEVT(x).U) -#define HW_SDHC_FEVT_WR(x, v) (HW_SDHC_FEVT(x).U = (v)) +#define HW_SDHC_FEVT_RD(x) (ADDRESS_READ(hw_sdhc_fevt_t, HW_SDHC_FEVT_ADDR(x))) +#define HW_SDHC_FEVT_WR(x, v) (ADDRESS_WRITE(hw_sdhc_fevt_t, HW_SDHC_FEVT_ADDR(x), v)) /*@}*/ /* @@ -4336,7 +4343,7 @@ #define BF_SDHC_FEVT_AC12NE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_AC12NE) & BM_SDHC_FEVT_AC12NE) /*! @brief Set the AC12NE field to a new value. */ -#define BW_SDHC_FEVT_AC12NE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12NE) = (v)) +#define BW_SDHC_FEVT_AC12NE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12NE), v)) /*@}*/ /*! @@ -4353,7 +4360,7 @@ #define BF_SDHC_FEVT_AC12TOE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_AC12TOE) & BM_SDHC_FEVT_AC12TOE) /*! @brief Set the AC12TOE field to a new value. */ -#define BW_SDHC_FEVT_AC12TOE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12TOE) = (v)) +#define BW_SDHC_FEVT_AC12TOE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12TOE), v)) /*@}*/ /*! @@ -4370,7 +4377,7 @@ #define BF_SDHC_FEVT_AC12CE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_AC12CE) & BM_SDHC_FEVT_AC12CE) /*! @brief Set the AC12CE field to a new value. */ -#define BW_SDHC_FEVT_AC12CE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12CE) = (v)) +#define BW_SDHC_FEVT_AC12CE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12CE), v)) /*@}*/ /*! @@ -4387,7 +4394,7 @@ #define BF_SDHC_FEVT_AC12EBE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_AC12EBE) & BM_SDHC_FEVT_AC12EBE) /*! @brief Set the AC12EBE field to a new value. */ -#define BW_SDHC_FEVT_AC12EBE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12EBE) = (v)) +#define BW_SDHC_FEVT_AC12EBE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12EBE), v)) /*@}*/ /*! @@ -4404,7 +4411,7 @@ #define BF_SDHC_FEVT_AC12IE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_AC12IE) & BM_SDHC_FEVT_AC12IE) /*! @brief Set the AC12IE field to a new value. */ -#define BW_SDHC_FEVT_AC12IE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12IE) = (v)) +#define BW_SDHC_FEVT_AC12IE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12IE), v)) /*@}*/ /*! @@ -4421,7 +4428,7 @@ #define BF_SDHC_FEVT_CNIBAC12E(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_CNIBAC12E) & BM_SDHC_FEVT_CNIBAC12E) /*! @brief Set the CNIBAC12E field to a new value. */ -#define BW_SDHC_FEVT_CNIBAC12E(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CNIBAC12E) = (v)) +#define BW_SDHC_FEVT_CNIBAC12E(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CNIBAC12E), v)) /*@}*/ /*! @@ -4438,7 +4445,7 @@ #define BF_SDHC_FEVT_CTOE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_CTOE) & BM_SDHC_FEVT_CTOE) /*! @brief Set the CTOE field to a new value. */ -#define BW_SDHC_FEVT_CTOE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CTOE) = (v)) +#define BW_SDHC_FEVT_CTOE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CTOE), v)) /*@}*/ /*! @@ -4455,7 +4462,7 @@ #define BF_SDHC_FEVT_CCE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_CCE) & BM_SDHC_FEVT_CCE) /*! @brief Set the CCE field to a new value. */ -#define BW_SDHC_FEVT_CCE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CCE) = (v)) +#define BW_SDHC_FEVT_CCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CCE), v)) /*@}*/ /*! @@ -4472,7 +4479,7 @@ #define BF_SDHC_FEVT_CEBE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_CEBE) & BM_SDHC_FEVT_CEBE) /*! @brief Set the CEBE field to a new value. */ -#define BW_SDHC_FEVT_CEBE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CEBE) = (v)) +#define BW_SDHC_FEVT_CEBE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CEBE), v)) /*@}*/ /*! @@ -4489,7 +4496,7 @@ #define BF_SDHC_FEVT_CIE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_CIE) & BM_SDHC_FEVT_CIE) /*! @brief Set the CIE field to a new value. */ -#define BW_SDHC_FEVT_CIE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CIE) = (v)) +#define BW_SDHC_FEVT_CIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CIE), v)) /*@}*/ /*! @@ -4506,7 +4513,7 @@ #define BF_SDHC_FEVT_DTOE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_DTOE) & BM_SDHC_FEVT_DTOE) /*! @brief Set the DTOE field to a new value. */ -#define BW_SDHC_FEVT_DTOE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_DTOE) = (v)) +#define BW_SDHC_FEVT_DTOE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_DTOE), v)) /*@}*/ /*! @@ -4523,7 +4530,7 @@ #define BF_SDHC_FEVT_DCE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_DCE) & BM_SDHC_FEVT_DCE) /*! @brief Set the DCE field to a new value. */ -#define BW_SDHC_FEVT_DCE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_DCE) = (v)) +#define BW_SDHC_FEVT_DCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_DCE), v)) /*@}*/ /*! @@ -4540,7 +4547,7 @@ #define BF_SDHC_FEVT_DEBE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_DEBE) & BM_SDHC_FEVT_DEBE) /*! @brief Set the DEBE field to a new value. */ -#define BW_SDHC_FEVT_DEBE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_DEBE) = (v)) +#define BW_SDHC_FEVT_DEBE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_DEBE), v)) /*@}*/ /*! @@ -4557,7 +4564,7 @@ #define BF_SDHC_FEVT_AC12E(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_AC12E) & BM_SDHC_FEVT_AC12E) /*! @brief Set the AC12E field to a new value. */ -#define BW_SDHC_FEVT_AC12E(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12E) = (v)) +#define BW_SDHC_FEVT_AC12E(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_AC12E), v)) /*@}*/ /*! @@ -4574,7 +4581,7 @@ #define BF_SDHC_FEVT_DMAE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_DMAE) & BM_SDHC_FEVT_DMAE) /*! @brief Set the DMAE field to a new value. */ -#define BW_SDHC_FEVT_DMAE(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_DMAE) = (v)) +#define BW_SDHC_FEVT_DMAE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_DMAE), v)) /*@}*/ /*! @@ -4594,7 +4601,7 @@ #define BF_SDHC_FEVT_CINT(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_FEVT_CINT) & BM_SDHC_FEVT_CINT) /*! @brief Set the CINT field to a new value. */ -#define BW_SDHC_FEVT_CINT(x, v) (BITBAND_ACCESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CINT) = (v)) +#define BW_SDHC_FEVT_CINT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_FEVT_ADDR(x), BP_SDHC_FEVT_CINT), v)) /*@}*/ /******************************************************************************* @@ -4647,7 +4654,7 @@ #define HW_SDHC_ADMAES_ADDR(x) ((x) + 0x54U) #define HW_SDHC_ADMAES(x) (*(__I hw_sdhc_admaes_t *) HW_SDHC_ADMAES_ADDR(x)) -#define HW_SDHC_ADMAES_RD(x) (HW_SDHC_ADMAES(x).U) +#define HW_SDHC_ADMAES_RD(x) (ADDRESS_READ(hw_sdhc_admaes_t, HW_SDHC_ADMAES_ADDR(x))) /*@}*/ /* @@ -4666,7 +4673,7 @@ #define BS_SDHC_ADMAES_ADMAES (2U) /*!< Bit field size in bits for SDHC_ADMAES_ADMAES. */ /*! @brief Read current value of the SDHC_ADMAES_ADMAES field. */ -#define BR_SDHC_ADMAES_ADMAES(x) (HW_SDHC_ADMAES(x).B.ADMAES) +#define BR_SDHC_ADMAES_ADMAES(x) (UNION_READ(hw_sdhc_admaes_t, HW_SDHC_ADMAES_ADDR(x), U, B.ADMAES)) /*@}*/ /*! @@ -4687,7 +4694,7 @@ #define BS_SDHC_ADMAES_ADMALME (1U) /*!< Bit field size in bits for SDHC_ADMAES_ADMALME. */ /*! @brief Read current value of the SDHC_ADMAES_ADMALME field. */ -#define BR_SDHC_ADMAES_ADMALME(x) (BITBAND_ACCESS32(HW_SDHC_ADMAES_ADDR(x), BP_SDHC_ADMAES_ADMALME)) +#define BR_SDHC_ADMAES_ADMALME(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_ADMAES_ADDR(x), BP_SDHC_ADMAES_ADMALME))) /*@}*/ /*! @@ -4705,7 +4712,7 @@ #define BS_SDHC_ADMAES_ADMADCE (1U) /*!< Bit field size in bits for SDHC_ADMAES_ADMADCE. */ /*! @brief Read current value of the SDHC_ADMAES_ADMADCE field. */ -#define BR_SDHC_ADMAES_ADMADCE(x) (BITBAND_ACCESS32(HW_SDHC_ADMAES_ADDR(x), BP_SDHC_ADMAES_ADMADCE)) +#define BR_SDHC_ADMAES_ADMADCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_ADMAES_ADDR(x), BP_SDHC_ADMAES_ADMADCE))) /*@}*/ /******************************************************************************* @@ -4737,8 +4744,8 @@ #define HW_SDHC_ADSADDR_ADDR(x) ((x) + 0x58U) #define HW_SDHC_ADSADDR(x) (*(__IO hw_sdhc_adsaddr_t *) HW_SDHC_ADSADDR_ADDR(x)) -#define HW_SDHC_ADSADDR_RD(x) (HW_SDHC_ADSADDR(x).U) -#define HW_SDHC_ADSADDR_WR(x, v) (HW_SDHC_ADSADDR(x).U = (v)) +#define HW_SDHC_ADSADDR_RD(x) (ADDRESS_READ(hw_sdhc_adsaddr_t, HW_SDHC_ADSADDR_ADDR(x))) +#define HW_SDHC_ADSADDR_WR(x, v) (ADDRESS_WRITE(hw_sdhc_adsaddr_t, HW_SDHC_ADSADDR_ADDR(x), v)) #define HW_SDHC_ADSADDR_SET(x, v) (HW_SDHC_ADSADDR_WR(x, HW_SDHC_ADSADDR_RD(x) | (v))) #define HW_SDHC_ADSADDR_CLR(x, v) (HW_SDHC_ADSADDR_WR(x, HW_SDHC_ADSADDR_RD(x) & ~(v))) #define HW_SDHC_ADSADDR_TOG(x, v) (HW_SDHC_ADSADDR_WR(x, HW_SDHC_ADSADDR_RD(x) ^ (v))) @@ -4769,7 +4776,7 @@ #define BS_SDHC_ADSADDR_ADSADDR (30U) /*!< Bit field size in bits for SDHC_ADSADDR_ADSADDR. */ /*! @brief Read current value of the SDHC_ADSADDR_ADSADDR field. */ -#define BR_SDHC_ADSADDR_ADSADDR(x) (HW_SDHC_ADSADDR(x).B.ADSADDR) +#define BR_SDHC_ADSADDR_ADSADDR(x) (UNION_READ(hw_sdhc_adsaddr_t, HW_SDHC_ADSADDR_ADDR(x), U, B.ADSADDR)) /*! @brief Format value for bitfield SDHC_ADSADDR_ADSADDR. */ #define BF_SDHC_ADSADDR_ADSADDR(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_ADSADDR_ADSADDR) & BM_SDHC_ADSADDR_ADSADDR) @@ -4810,8 +4817,8 @@ #define HW_SDHC_VENDOR_ADDR(x) ((x) + 0xC0U) #define HW_SDHC_VENDOR(x) (*(__IO hw_sdhc_vendor_t *) HW_SDHC_VENDOR_ADDR(x)) -#define HW_SDHC_VENDOR_RD(x) (HW_SDHC_VENDOR(x).U) -#define HW_SDHC_VENDOR_WR(x, v) (HW_SDHC_VENDOR(x).U = (v)) +#define HW_SDHC_VENDOR_RD(x) (ADDRESS_READ(hw_sdhc_vendor_t, HW_SDHC_VENDOR_ADDR(x))) +#define HW_SDHC_VENDOR_WR(x, v) (ADDRESS_WRITE(hw_sdhc_vendor_t, HW_SDHC_VENDOR_ADDR(x), v)) #define HW_SDHC_VENDOR_SET(x, v) (HW_SDHC_VENDOR_WR(x, HW_SDHC_VENDOR_RD(x) | (v))) #define HW_SDHC_VENDOR_CLR(x, v) (HW_SDHC_VENDOR_WR(x, HW_SDHC_VENDOR_RD(x) & ~(v))) #define HW_SDHC_VENDOR_TOG(x, v) (HW_SDHC_VENDOR_WR(x, HW_SDHC_VENDOR_RD(x) ^ (v))) @@ -4841,13 +4848,13 @@ #define BS_SDHC_VENDOR_EXTDMAEN (1U) /*!< Bit field size in bits for SDHC_VENDOR_EXTDMAEN. */ /*! @brief Read current value of the SDHC_VENDOR_EXTDMAEN field. */ -#define BR_SDHC_VENDOR_EXTDMAEN(x) (BITBAND_ACCESS32(HW_SDHC_VENDOR_ADDR(x), BP_SDHC_VENDOR_EXTDMAEN)) +#define BR_SDHC_VENDOR_EXTDMAEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_VENDOR_ADDR(x), BP_SDHC_VENDOR_EXTDMAEN))) /*! @brief Format value for bitfield SDHC_VENDOR_EXTDMAEN. */ #define BF_SDHC_VENDOR_EXTDMAEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_VENDOR_EXTDMAEN) & BM_SDHC_VENDOR_EXTDMAEN) /*! @brief Set the EXTDMAEN field to a new value. */ -#define BW_SDHC_VENDOR_EXTDMAEN(x, v) (BITBAND_ACCESS32(HW_SDHC_VENDOR_ADDR(x), BP_SDHC_VENDOR_EXTDMAEN) = (v)) +#define BW_SDHC_VENDOR_EXTDMAEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_VENDOR_ADDR(x), BP_SDHC_VENDOR_EXTDMAEN), v)) /*@}*/ /*! @@ -4867,13 +4874,13 @@ #define BS_SDHC_VENDOR_EXBLKNU (1U) /*!< Bit field size in bits for SDHC_VENDOR_EXBLKNU. */ /*! @brief Read current value of the SDHC_VENDOR_EXBLKNU field. */ -#define BR_SDHC_VENDOR_EXBLKNU(x) (BITBAND_ACCESS32(HW_SDHC_VENDOR_ADDR(x), BP_SDHC_VENDOR_EXBLKNU)) +#define BR_SDHC_VENDOR_EXBLKNU(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_VENDOR_ADDR(x), BP_SDHC_VENDOR_EXBLKNU))) /*! @brief Format value for bitfield SDHC_VENDOR_EXBLKNU. */ #define BF_SDHC_VENDOR_EXBLKNU(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_VENDOR_EXBLKNU) & BM_SDHC_VENDOR_EXBLKNU) /*! @brief Set the EXBLKNU field to a new value. */ -#define BW_SDHC_VENDOR_EXBLKNU(x, v) (BITBAND_ACCESS32(HW_SDHC_VENDOR_ADDR(x), BP_SDHC_VENDOR_EXBLKNU) = (v)) +#define BW_SDHC_VENDOR_EXBLKNU(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_VENDOR_ADDR(x), BP_SDHC_VENDOR_EXBLKNU), v)) /*@}*/ /*! @@ -4889,7 +4896,7 @@ #define BS_SDHC_VENDOR_INTSTVAL (8U) /*!< Bit field size in bits for SDHC_VENDOR_INTSTVAL. */ /*! @brief Read current value of the SDHC_VENDOR_INTSTVAL field. */ -#define BR_SDHC_VENDOR_INTSTVAL(x) (HW_SDHC_VENDOR(x).B.INTSTVAL) +#define BR_SDHC_VENDOR_INTSTVAL(x) (UNION_READ(hw_sdhc_vendor_t, HW_SDHC_VENDOR_ADDR(x), U, B.INTSTVAL)) /*@}*/ /******************************************************************************* @@ -4925,8 +4932,8 @@ #define HW_SDHC_MMCBOOT_ADDR(x) ((x) + 0xC4U) #define HW_SDHC_MMCBOOT(x) (*(__IO hw_sdhc_mmcboot_t *) HW_SDHC_MMCBOOT_ADDR(x)) -#define HW_SDHC_MMCBOOT_RD(x) (HW_SDHC_MMCBOOT(x).U) -#define HW_SDHC_MMCBOOT_WR(x, v) (HW_SDHC_MMCBOOT(x).U = (v)) +#define HW_SDHC_MMCBOOT_RD(x) (ADDRESS_READ(hw_sdhc_mmcboot_t, HW_SDHC_MMCBOOT_ADDR(x))) +#define HW_SDHC_MMCBOOT_WR(x, v) (ADDRESS_WRITE(hw_sdhc_mmcboot_t, HW_SDHC_MMCBOOT_ADDR(x), v)) #define HW_SDHC_MMCBOOT_SET(x, v) (HW_SDHC_MMCBOOT_WR(x, HW_SDHC_MMCBOOT_RD(x) | (v))) #define HW_SDHC_MMCBOOT_CLR(x, v) (HW_SDHC_MMCBOOT_WR(x, HW_SDHC_MMCBOOT_RD(x) & ~(v))) #define HW_SDHC_MMCBOOT_TOG(x, v) (HW_SDHC_MMCBOOT_WR(x, HW_SDHC_MMCBOOT_RD(x) ^ (v))) @@ -4957,7 +4964,7 @@ #define BS_SDHC_MMCBOOT_DTOCVACK (4U) /*!< Bit field size in bits for SDHC_MMCBOOT_DTOCVACK. */ /*! @brief Read current value of the SDHC_MMCBOOT_DTOCVACK field. */ -#define BR_SDHC_MMCBOOT_DTOCVACK(x) (HW_SDHC_MMCBOOT(x).B.DTOCVACK) +#define BR_SDHC_MMCBOOT_DTOCVACK(x) (UNION_READ(hw_sdhc_mmcboot_t, HW_SDHC_MMCBOOT_ADDR(x), U, B.DTOCVACK)) /*! @brief Format value for bitfield SDHC_MMCBOOT_DTOCVACK. */ #define BF_SDHC_MMCBOOT_DTOCVACK(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_MMCBOOT_DTOCVACK) & BM_SDHC_MMCBOOT_DTOCVACK) @@ -4979,13 +4986,13 @@ #define BS_SDHC_MMCBOOT_BOOTACK (1U) /*!< Bit field size in bits for SDHC_MMCBOOT_BOOTACK. */ /*! @brief Read current value of the SDHC_MMCBOOT_BOOTACK field. */ -#define BR_SDHC_MMCBOOT_BOOTACK(x) (BITBAND_ACCESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTACK)) +#define BR_SDHC_MMCBOOT_BOOTACK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTACK))) /*! @brief Format value for bitfield SDHC_MMCBOOT_BOOTACK. */ #define BF_SDHC_MMCBOOT_BOOTACK(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_MMCBOOT_BOOTACK) & BM_SDHC_MMCBOOT_BOOTACK) /*! @brief Set the BOOTACK field to a new value. */ -#define BW_SDHC_MMCBOOT_BOOTACK(x, v) (BITBAND_ACCESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTACK) = (v)) +#define BW_SDHC_MMCBOOT_BOOTACK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTACK), v)) /*@}*/ /*! @@ -5001,13 +5008,13 @@ #define BS_SDHC_MMCBOOT_BOOTMODE (1U) /*!< Bit field size in bits for SDHC_MMCBOOT_BOOTMODE. */ /*! @brief Read current value of the SDHC_MMCBOOT_BOOTMODE field. */ -#define BR_SDHC_MMCBOOT_BOOTMODE(x) (BITBAND_ACCESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTMODE)) +#define BR_SDHC_MMCBOOT_BOOTMODE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTMODE))) /*! @brief Format value for bitfield SDHC_MMCBOOT_BOOTMODE. */ #define BF_SDHC_MMCBOOT_BOOTMODE(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_MMCBOOT_BOOTMODE) & BM_SDHC_MMCBOOT_BOOTMODE) /*! @brief Set the BOOTMODE field to a new value. */ -#define BW_SDHC_MMCBOOT_BOOTMODE(x, v) (BITBAND_ACCESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTMODE) = (v)) +#define BW_SDHC_MMCBOOT_BOOTMODE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTMODE), v)) /*@}*/ /*! @@ -5023,13 +5030,13 @@ #define BS_SDHC_MMCBOOT_BOOTEN (1U) /*!< Bit field size in bits for SDHC_MMCBOOT_BOOTEN. */ /*! @brief Read current value of the SDHC_MMCBOOT_BOOTEN field. */ -#define BR_SDHC_MMCBOOT_BOOTEN(x) (BITBAND_ACCESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTEN)) +#define BR_SDHC_MMCBOOT_BOOTEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTEN))) /*! @brief Format value for bitfield SDHC_MMCBOOT_BOOTEN. */ #define BF_SDHC_MMCBOOT_BOOTEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_MMCBOOT_BOOTEN) & BM_SDHC_MMCBOOT_BOOTEN) /*! @brief Set the BOOTEN field to a new value. */ -#define BW_SDHC_MMCBOOT_BOOTEN(x, v) (BITBAND_ACCESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTEN) = (v)) +#define BW_SDHC_MMCBOOT_BOOTEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_BOOTEN), v)) /*@}*/ /*! @@ -5045,13 +5052,13 @@ #define BS_SDHC_MMCBOOT_AUTOSABGEN (1U) /*!< Bit field size in bits for SDHC_MMCBOOT_AUTOSABGEN. */ /*! @brief Read current value of the SDHC_MMCBOOT_AUTOSABGEN field. */ -#define BR_SDHC_MMCBOOT_AUTOSABGEN(x) (BITBAND_ACCESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_AUTOSABGEN)) +#define BR_SDHC_MMCBOOT_AUTOSABGEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_AUTOSABGEN))) /*! @brief Format value for bitfield SDHC_MMCBOOT_AUTOSABGEN. */ #define BF_SDHC_MMCBOOT_AUTOSABGEN(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_MMCBOOT_AUTOSABGEN) & BM_SDHC_MMCBOOT_AUTOSABGEN) /*! @brief Set the AUTOSABGEN field to a new value. */ -#define BW_SDHC_MMCBOOT_AUTOSABGEN(x, v) (BITBAND_ACCESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_AUTOSABGEN) = (v)) +#define BW_SDHC_MMCBOOT_AUTOSABGEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SDHC_MMCBOOT_ADDR(x), BP_SDHC_MMCBOOT_AUTOSABGEN), v)) /*@}*/ /*! @@ -5066,7 +5073,7 @@ #define BS_SDHC_MMCBOOT_BOOTBLKCNT (16U) /*!< Bit field size in bits for SDHC_MMCBOOT_BOOTBLKCNT. */ /*! @brief Read current value of the SDHC_MMCBOOT_BOOTBLKCNT field. */ -#define BR_SDHC_MMCBOOT_BOOTBLKCNT(x) (HW_SDHC_MMCBOOT(x).B.BOOTBLKCNT) +#define BR_SDHC_MMCBOOT_BOOTBLKCNT(x) (UNION_READ(hw_sdhc_mmcboot_t, HW_SDHC_MMCBOOT_ADDR(x), U, B.BOOTBLKCNT)) /*! @brief Format value for bitfield SDHC_MMCBOOT_BOOTBLKCNT. */ #define BF_SDHC_MMCBOOT_BOOTBLKCNT(v) ((uint32_t)((uint32_t)(v) << BP_SDHC_MMCBOOT_BOOTBLKCNT) & BM_SDHC_MMCBOOT_BOOTBLKCNT) @@ -5105,7 +5112,7 @@ #define HW_SDHC_HOSTVER_ADDR(x) ((x) + 0xFCU) #define HW_SDHC_HOSTVER(x) (*(__I hw_sdhc_hostver_t *) HW_SDHC_HOSTVER_ADDR(x)) -#define HW_SDHC_HOSTVER_RD(x) (HW_SDHC_HOSTVER(x).U) +#define HW_SDHC_HOSTVER_RD(x) (ADDRESS_READ(hw_sdhc_hostver_t, HW_SDHC_HOSTVER_ADDR(x))) /*@}*/ /* @@ -5127,7 +5134,7 @@ #define BS_SDHC_HOSTVER_SVN (8U) /*!< Bit field size in bits for SDHC_HOSTVER_SVN. */ /*! @brief Read current value of the SDHC_HOSTVER_SVN field. */ -#define BR_SDHC_HOSTVER_SVN(x) (HW_SDHC_HOSTVER(x).B.SVN) +#define BR_SDHC_HOSTVER_SVN(x) (UNION_READ(hw_sdhc_hostver_t, HW_SDHC_HOSTVER_ADDR(x), U, B.SVN)) /*@}*/ /*! @@ -5148,7 +5155,7 @@ #define BS_SDHC_HOSTVER_VVN (8U) /*!< Bit field size in bits for SDHC_HOSTVER_VVN. */ /*! @brief Read current value of the SDHC_HOSTVER_VVN field. */ -#define BR_SDHC_HOSTVER_VVN(x) (HW_SDHC_HOSTVER(x).B.VVN) +#define BR_SDHC_HOSTVER_VVN(x) (UNION_READ(hw_sdhc_hostver_t, HW_SDHC_HOSTVER_ADDR(x), U, B.VVN)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_sim.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_sim.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -153,8 +160,8 @@ #define HW_SIM_SOPT1_ADDR(x) ((x) + 0x0U) #define HW_SIM_SOPT1(x) (*(__IO hw_sim_sopt1_t *) HW_SIM_SOPT1_ADDR(x)) -#define HW_SIM_SOPT1_RD(x) (HW_SIM_SOPT1(x).U) -#define HW_SIM_SOPT1_WR(x, v) (HW_SIM_SOPT1(x).U = (v)) +#define HW_SIM_SOPT1_RD(x) (ADDRESS_READ(hw_sim_sopt1_t, HW_SIM_SOPT1_ADDR(x))) +#define HW_SIM_SOPT1_WR(x, v) (ADDRESS_WRITE(hw_sim_sopt1_t, HW_SIM_SOPT1_ADDR(x), v)) #define HW_SIM_SOPT1_SET(x, v) (HW_SIM_SOPT1_WR(x, HW_SIM_SOPT1_RD(x) | (v))) #define HW_SIM_SOPT1_CLR(x, v) (HW_SIM_SOPT1_WR(x, HW_SIM_SOPT1_RD(x) & ~(v))) #define HW_SIM_SOPT1_TOG(x, v) (HW_SIM_SOPT1_WR(x, HW_SIM_SOPT1_RD(x) ^ (v))) @@ -186,7 +193,7 @@ #define BS_SIM_SOPT1_RAMSIZE (4U) /*!< Bit field size in bits for SIM_SOPT1_RAMSIZE. */ /*! @brief Read current value of the SIM_SOPT1_RAMSIZE field. */ -#define BR_SIM_SOPT1_RAMSIZE(x) (HW_SIM_SOPT1(x).B.RAMSIZE) +#define BR_SIM_SOPT1_RAMSIZE(x) (UNION_READ(hw_sim_sopt1_t, HW_SIM_SOPT1_ADDR(x), U, B.RAMSIZE)) /*@}*/ /*! @@ -207,7 +214,7 @@ #define BS_SIM_SOPT1_OSC32KSEL (2U) /*!< Bit field size in bits for SIM_SOPT1_OSC32KSEL. */ /*! @brief Read current value of the SIM_SOPT1_OSC32KSEL field. */ -#define BR_SIM_SOPT1_OSC32KSEL(x) (HW_SIM_SOPT1(x).B.OSC32KSEL) +#define BR_SIM_SOPT1_OSC32KSEL(x) (UNION_READ(hw_sim_sopt1_t, HW_SIM_SOPT1_ADDR(x), U, B.OSC32KSEL)) /*! @brief Format value for bitfield SIM_SOPT1_OSC32KSEL. */ #define BF_SIM_SOPT1_OSC32KSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT1_OSC32KSEL) & BM_SIM_SOPT1_OSC32KSEL) @@ -232,13 +239,13 @@ #define BS_SIM_SOPT1_USBVSTBY (1U) /*!< Bit field size in bits for SIM_SOPT1_USBVSTBY. */ /*! @brief Read current value of the SIM_SOPT1_USBVSTBY field. */ -#define BR_SIM_SOPT1_USBVSTBY(x) (BITBAND_ACCESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBVSTBY)) +#define BR_SIM_SOPT1_USBVSTBY(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBVSTBY))) /*! @brief Format value for bitfield SIM_SOPT1_USBVSTBY. */ #define BF_SIM_SOPT1_USBVSTBY(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT1_USBVSTBY) & BM_SIM_SOPT1_USBVSTBY) /*! @brief Set the USBVSTBY field to a new value. */ -#define BW_SIM_SOPT1_USBVSTBY(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBVSTBY) = (v)) +#define BW_SIM_SOPT1_USBVSTBY(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBVSTBY), v)) /*@}*/ /*! @@ -258,13 +265,13 @@ #define BS_SIM_SOPT1_USBSSTBY (1U) /*!< Bit field size in bits for SIM_SOPT1_USBSSTBY. */ /*! @brief Read current value of the SIM_SOPT1_USBSSTBY field. */ -#define BR_SIM_SOPT1_USBSSTBY(x) (BITBAND_ACCESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBSSTBY)) +#define BR_SIM_SOPT1_USBSSTBY(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBSSTBY))) /*! @brief Format value for bitfield SIM_SOPT1_USBSSTBY. */ #define BF_SIM_SOPT1_USBSSTBY(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT1_USBSSTBY) & BM_SIM_SOPT1_USBSSTBY) /*! @brief Set the USBSSTBY field to a new value. */ -#define BW_SIM_SOPT1_USBSSTBY(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBSSTBY) = (v)) +#define BW_SIM_SOPT1_USBSSTBY(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBSSTBY), v)) /*@}*/ /*! @@ -282,13 +289,13 @@ #define BS_SIM_SOPT1_USBREGEN (1U) /*!< Bit field size in bits for SIM_SOPT1_USBREGEN. */ /*! @brief Read current value of the SIM_SOPT1_USBREGEN field. */ -#define BR_SIM_SOPT1_USBREGEN(x) (BITBAND_ACCESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBREGEN)) +#define BR_SIM_SOPT1_USBREGEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBREGEN))) /*! @brief Format value for bitfield SIM_SOPT1_USBREGEN. */ #define BF_SIM_SOPT1_USBREGEN(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT1_USBREGEN) & BM_SIM_SOPT1_USBREGEN) /*! @brief Set the USBREGEN field to a new value. */ -#define BW_SIM_SOPT1_USBREGEN(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBREGEN) = (v)) +#define BW_SIM_SOPT1_USBREGEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1_ADDR(x), BP_SIM_SOPT1_USBREGEN), v)) /*@}*/ /******************************************************************************* @@ -325,8 +332,8 @@ #define HW_SIM_SOPT1CFG_ADDR(x) ((x) + 0x4U) #define HW_SIM_SOPT1CFG(x) (*(__IO hw_sim_sopt1cfg_t *) HW_SIM_SOPT1CFG_ADDR(x)) -#define HW_SIM_SOPT1CFG_RD(x) (HW_SIM_SOPT1CFG(x).U) -#define HW_SIM_SOPT1CFG_WR(x, v) (HW_SIM_SOPT1CFG(x).U = (v)) +#define HW_SIM_SOPT1CFG_RD(x) (ADDRESS_READ(hw_sim_sopt1cfg_t, HW_SIM_SOPT1CFG_ADDR(x))) +#define HW_SIM_SOPT1CFG_WR(x, v) (ADDRESS_WRITE(hw_sim_sopt1cfg_t, HW_SIM_SOPT1CFG_ADDR(x), v)) #define HW_SIM_SOPT1CFG_SET(x, v) (HW_SIM_SOPT1CFG_WR(x, HW_SIM_SOPT1CFG_RD(x) | (v))) #define HW_SIM_SOPT1CFG_CLR(x, v) (HW_SIM_SOPT1CFG_WR(x, HW_SIM_SOPT1CFG_RD(x) & ~(v))) #define HW_SIM_SOPT1CFG_TOG(x, v) (HW_SIM_SOPT1CFG_WR(x, HW_SIM_SOPT1CFG_RD(x) ^ (v))) @@ -352,13 +359,13 @@ #define BS_SIM_SOPT1CFG_URWE (1U) /*!< Bit field size in bits for SIM_SOPT1CFG_URWE. */ /*! @brief Read current value of the SIM_SOPT1CFG_URWE field. */ -#define BR_SIM_SOPT1CFG_URWE(x) (BITBAND_ACCESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_URWE)) +#define BR_SIM_SOPT1CFG_URWE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_URWE))) /*! @brief Format value for bitfield SIM_SOPT1CFG_URWE. */ #define BF_SIM_SOPT1CFG_URWE(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT1CFG_URWE) & BM_SIM_SOPT1CFG_URWE) /*! @brief Set the URWE field to a new value. */ -#define BW_SIM_SOPT1CFG_URWE(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_URWE) = (v)) +#define BW_SIM_SOPT1CFG_URWE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_URWE), v)) /*@}*/ /*! @@ -377,13 +384,13 @@ #define BS_SIM_SOPT1CFG_UVSWE (1U) /*!< Bit field size in bits for SIM_SOPT1CFG_UVSWE. */ /*! @brief Read current value of the SIM_SOPT1CFG_UVSWE field. */ -#define BR_SIM_SOPT1CFG_UVSWE(x) (BITBAND_ACCESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_UVSWE)) +#define BR_SIM_SOPT1CFG_UVSWE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_UVSWE))) /*! @brief Format value for bitfield SIM_SOPT1CFG_UVSWE. */ #define BF_SIM_SOPT1CFG_UVSWE(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT1CFG_UVSWE) & BM_SIM_SOPT1CFG_UVSWE) /*! @brief Set the UVSWE field to a new value. */ -#define BW_SIM_SOPT1CFG_UVSWE(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_UVSWE) = (v)) +#define BW_SIM_SOPT1CFG_UVSWE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_UVSWE), v)) /*@}*/ /*! @@ -402,13 +409,13 @@ #define BS_SIM_SOPT1CFG_USSWE (1U) /*!< Bit field size in bits for SIM_SOPT1CFG_USSWE. */ /*! @brief Read current value of the SIM_SOPT1CFG_USSWE field. */ -#define BR_SIM_SOPT1CFG_USSWE(x) (BITBAND_ACCESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_USSWE)) +#define BR_SIM_SOPT1CFG_USSWE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_USSWE))) /*! @brief Format value for bitfield SIM_SOPT1CFG_USSWE. */ #define BF_SIM_SOPT1CFG_USSWE(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT1CFG_USSWE) & BM_SIM_SOPT1CFG_USSWE) /*! @brief Set the USSWE field to a new value. */ -#define BW_SIM_SOPT1CFG_USSWE(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_USSWE) = (v)) +#define BW_SIM_SOPT1CFG_USSWE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT1CFG_ADDR(x), BP_SIM_SOPT1CFG_USSWE), v)) /*@}*/ /******************************************************************************* @@ -455,8 +462,8 @@ #define HW_SIM_SOPT2_ADDR(x) ((x) + 0x1004U) #define HW_SIM_SOPT2(x) (*(__IO hw_sim_sopt2_t *) HW_SIM_SOPT2_ADDR(x)) -#define HW_SIM_SOPT2_RD(x) (HW_SIM_SOPT2(x).U) -#define HW_SIM_SOPT2_WR(x, v) (HW_SIM_SOPT2(x).U = (v)) +#define HW_SIM_SOPT2_RD(x) (ADDRESS_READ(hw_sim_sopt2_t, HW_SIM_SOPT2_ADDR(x))) +#define HW_SIM_SOPT2_WR(x, v) (ADDRESS_WRITE(hw_sim_sopt2_t, HW_SIM_SOPT2_ADDR(x), v)) #define HW_SIM_SOPT2_SET(x, v) (HW_SIM_SOPT2_WR(x, HW_SIM_SOPT2_RD(x) | (v))) #define HW_SIM_SOPT2_CLR(x, v) (HW_SIM_SOPT2_WR(x, HW_SIM_SOPT2_RD(x) & ~(v))) #define HW_SIM_SOPT2_TOG(x, v) (HW_SIM_SOPT2_WR(x, HW_SIM_SOPT2_RD(x) ^ (v))) @@ -482,13 +489,13 @@ #define BS_SIM_SOPT2_RTCCLKOUTSEL (1U) /*!< Bit field size in bits for SIM_SOPT2_RTCCLKOUTSEL. */ /*! @brief Read current value of the SIM_SOPT2_RTCCLKOUTSEL field. */ -#define BR_SIM_SOPT2_RTCCLKOUTSEL(x) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_RTCCLKOUTSEL)) +#define BR_SIM_SOPT2_RTCCLKOUTSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_RTCCLKOUTSEL))) /*! @brief Format value for bitfield SIM_SOPT2_RTCCLKOUTSEL. */ #define BF_SIM_SOPT2_RTCCLKOUTSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_RTCCLKOUTSEL) & BM_SIM_SOPT2_RTCCLKOUTSEL) /*! @brief Set the RTCCLKOUTSEL field to a new value. */ -#define BW_SIM_SOPT2_RTCCLKOUTSEL(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_RTCCLKOUTSEL) = (v)) +#define BW_SIM_SOPT2_RTCCLKOUTSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_RTCCLKOUTSEL), v)) /*@}*/ /*! @@ -512,7 +519,7 @@ #define BS_SIM_SOPT2_CLKOUTSEL (3U) /*!< Bit field size in bits for SIM_SOPT2_CLKOUTSEL. */ /*! @brief Read current value of the SIM_SOPT2_CLKOUTSEL field. */ -#define BR_SIM_SOPT2_CLKOUTSEL(x) (HW_SIM_SOPT2(x).B.CLKOUTSEL) +#define BR_SIM_SOPT2_CLKOUTSEL(x) (UNION_READ(hw_sim_sopt2_t, HW_SIM_SOPT2_ADDR(x), U, B.CLKOUTSEL)) /*! @brief Format value for bitfield SIM_SOPT2_CLKOUTSEL. */ #define BF_SIM_SOPT2_CLKOUTSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_CLKOUTSEL) & BM_SIM_SOPT2_CLKOUTSEL) @@ -543,7 +550,7 @@ #define BS_SIM_SOPT2_FBSL (2U) /*!< Bit field size in bits for SIM_SOPT2_FBSL. */ /*! @brief Read current value of the SIM_SOPT2_FBSL field. */ -#define BR_SIM_SOPT2_FBSL(x) (HW_SIM_SOPT2(x).B.FBSL) +#define BR_SIM_SOPT2_FBSL(x) (UNION_READ(hw_sim_sopt2_t, HW_SIM_SOPT2_ADDR(x), U, B.FBSL)) /*! @brief Format value for bitfield SIM_SOPT2_FBSL. */ #define BF_SIM_SOPT2_FBSL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_FBSL) & BM_SIM_SOPT2_FBSL) @@ -568,13 +575,13 @@ #define BS_SIM_SOPT2_PTD7PAD (1U) /*!< Bit field size in bits for SIM_SOPT2_PTD7PAD. */ /*! @brief Read current value of the SIM_SOPT2_PTD7PAD field. */ -#define BR_SIM_SOPT2_PTD7PAD(x) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_PTD7PAD)) +#define BR_SIM_SOPT2_PTD7PAD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_PTD7PAD))) /*! @brief Format value for bitfield SIM_SOPT2_PTD7PAD. */ #define BF_SIM_SOPT2_PTD7PAD(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_PTD7PAD) & BM_SIM_SOPT2_PTD7PAD) /*! @brief Set the PTD7PAD field to a new value. */ -#define BW_SIM_SOPT2_PTD7PAD(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_PTD7PAD) = (v)) +#define BW_SIM_SOPT2_PTD7PAD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_PTD7PAD), v)) /*@}*/ /*! @@ -593,13 +600,13 @@ #define BS_SIM_SOPT2_TRACECLKSEL (1U) /*!< Bit field size in bits for SIM_SOPT2_TRACECLKSEL. */ /*! @brief Read current value of the SIM_SOPT2_TRACECLKSEL field. */ -#define BR_SIM_SOPT2_TRACECLKSEL(x) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_TRACECLKSEL)) +#define BR_SIM_SOPT2_TRACECLKSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_TRACECLKSEL))) /*! @brief Format value for bitfield SIM_SOPT2_TRACECLKSEL. */ #define BF_SIM_SOPT2_TRACECLKSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_TRACECLKSEL) & BM_SIM_SOPT2_TRACECLKSEL) /*! @brief Set the TRACECLKSEL field to a new value. */ -#define BW_SIM_SOPT2_TRACECLKSEL(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_TRACECLKSEL) = (v)) +#define BW_SIM_SOPT2_TRACECLKSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_TRACECLKSEL), v)) /*@}*/ /*! @@ -619,7 +626,7 @@ #define BS_SIM_SOPT2_PLLFLLSEL (2U) /*!< Bit field size in bits for SIM_SOPT2_PLLFLLSEL. */ /*! @brief Read current value of the SIM_SOPT2_PLLFLLSEL field. */ -#define BR_SIM_SOPT2_PLLFLLSEL(x) (HW_SIM_SOPT2(x).B.PLLFLLSEL) +#define BR_SIM_SOPT2_PLLFLLSEL(x) (UNION_READ(hw_sim_sopt2_t, HW_SIM_SOPT2_ADDR(x), U, B.PLLFLLSEL)) /*! @brief Format value for bitfield SIM_SOPT2_PLLFLLSEL. */ #define BF_SIM_SOPT2_PLLFLLSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_PLLFLLSEL) & BM_SIM_SOPT2_PLLFLLSEL) @@ -645,13 +652,13 @@ #define BS_SIM_SOPT2_USBSRC (1U) /*!< Bit field size in bits for SIM_SOPT2_USBSRC. */ /*! @brief Read current value of the SIM_SOPT2_USBSRC field. */ -#define BR_SIM_SOPT2_USBSRC(x) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_USBSRC)) +#define BR_SIM_SOPT2_USBSRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_USBSRC))) /*! @brief Format value for bitfield SIM_SOPT2_USBSRC. */ #define BF_SIM_SOPT2_USBSRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_USBSRC) & BM_SIM_SOPT2_USBSRC) /*! @brief Set the USBSRC field to a new value. */ -#define BW_SIM_SOPT2_USBSRC(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_USBSRC) = (v)) +#define BW_SIM_SOPT2_USBSRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_USBSRC), v)) /*@}*/ /*! @@ -669,13 +676,13 @@ #define BS_SIM_SOPT2_RMIISRC (1U) /*!< Bit field size in bits for SIM_SOPT2_RMIISRC. */ /*! @brief Read current value of the SIM_SOPT2_RMIISRC field. */ -#define BR_SIM_SOPT2_RMIISRC(x) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_RMIISRC)) +#define BR_SIM_SOPT2_RMIISRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_RMIISRC))) /*! @brief Format value for bitfield SIM_SOPT2_RMIISRC. */ #define BF_SIM_SOPT2_RMIISRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_RMIISRC) & BM_SIM_SOPT2_RMIISRC) /*! @brief Set the RMIISRC field to a new value. */ -#define BW_SIM_SOPT2_RMIISRC(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_RMIISRC) = (v)) +#define BW_SIM_SOPT2_RMIISRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT2_ADDR(x), BP_SIM_SOPT2_RMIISRC), v)) /*@}*/ /*! @@ -696,7 +703,7 @@ #define BS_SIM_SOPT2_TIMESRC (2U) /*!< Bit field size in bits for SIM_SOPT2_TIMESRC. */ /*! @brief Read current value of the SIM_SOPT2_TIMESRC field. */ -#define BR_SIM_SOPT2_TIMESRC(x) (HW_SIM_SOPT2(x).B.TIMESRC) +#define BR_SIM_SOPT2_TIMESRC(x) (UNION_READ(hw_sim_sopt2_t, HW_SIM_SOPT2_ADDR(x), U, B.TIMESRC)) /*! @brief Format value for bitfield SIM_SOPT2_TIMESRC. */ #define BF_SIM_SOPT2_TIMESRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_TIMESRC) & BM_SIM_SOPT2_TIMESRC) @@ -723,7 +730,7 @@ #define BS_SIM_SOPT2_SDHCSRC (2U) /*!< Bit field size in bits for SIM_SOPT2_SDHCSRC. */ /*! @brief Read current value of the SIM_SOPT2_SDHCSRC field. */ -#define BR_SIM_SOPT2_SDHCSRC(x) (HW_SIM_SOPT2(x).B.SDHCSRC) +#define BR_SIM_SOPT2_SDHCSRC(x) (UNION_READ(hw_sim_sopt2_t, HW_SIM_SOPT2_ADDR(x), U, B.SDHCSRC)) /*! @brief Format value for bitfield SIM_SOPT2_SDHCSRC. */ #define BF_SIM_SOPT2_SDHCSRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT2_SDHCSRC) & BM_SIM_SOPT2_SDHCSRC) @@ -786,8 +793,8 @@ #define HW_SIM_SOPT4_ADDR(x) ((x) + 0x100CU) #define HW_SIM_SOPT4(x) (*(__IO hw_sim_sopt4_t *) HW_SIM_SOPT4_ADDR(x)) -#define HW_SIM_SOPT4_RD(x) (HW_SIM_SOPT4(x).U) -#define HW_SIM_SOPT4_WR(x, v) (HW_SIM_SOPT4(x).U = (v)) +#define HW_SIM_SOPT4_RD(x) (ADDRESS_READ(hw_sim_sopt4_t, HW_SIM_SOPT4_ADDR(x))) +#define HW_SIM_SOPT4_WR(x, v) (ADDRESS_WRITE(hw_sim_sopt4_t, HW_SIM_SOPT4_ADDR(x), v)) #define HW_SIM_SOPT4_SET(x, v) (HW_SIM_SOPT4_WR(x, HW_SIM_SOPT4_RD(x) | (v))) #define HW_SIM_SOPT4_CLR(x, v) (HW_SIM_SOPT4_WR(x, HW_SIM_SOPT4_RD(x) & ~(v))) #define HW_SIM_SOPT4_TOG(x, v) (HW_SIM_SOPT4_WR(x, HW_SIM_SOPT4_RD(x) ^ (v))) @@ -814,13 +821,13 @@ #define BS_SIM_SOPT4_FTM0FLT0 (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM0FLT0. */ /*! @brief Read current value of the SIM_SOPT4_FTM0FLT0 field. */ -#define BR_SIM_SOPT4_FTM0FLT0(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT0)) +#define BR_SIM_SOPT4_FTM0FLT0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT0))) /*! @brief Format value for bitfield SIM_SOPT4_FTM0FLT0. */ #define BF_SIM_SOPT4_FTM0FLT0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM0FLT0) & BM_SIM_SOPT4_FTM0FLT0) /*! @brief Set the FTM0FLT0 field to a new value. */ -#define BW_SIM_SOPT4_FTM0FLT0(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT0) = (v)) +#define BW_SIM_SOPT4_FTM0FLT0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT0), v)) /*@}*/ /*! @@ -840,13 +847,13 @@ #define BS_SIM_SOPT4_FTM0FLT1 (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM0FLT1. */ /*! @brief Read current value of the SIM_SOPT4_FTM0FLT1 field. */ -#define BR_SIM_SOPT4_FTM0FLT1(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT1)) +#define BR_SIM_SOPT4_FTM0FLT1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT1))) /*! @brief Format value for bitfield SIM_SOPT4_FTM0FLT1. */ #define BF_SIM_SOPT4_FTM0FLT1(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM0FLT1) & BM_SIM_SOPT4_FTM0FLT1) /*! @brief Set the FTM0FLT1 field to a new value. */ -#define BW_SIM_SOPT4_FTM0FLT1(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT1) = (v)) +#define BW_SIM_SOPT4_FTM0FLT1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT1), v)) /*@}*/ /*! @@ -866,13 +873,13 @@ #define BS_SIM_SOPT4_FTM0FLT2 (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM0FLT2. */ /*! @brief Read current value of the SIM_SOPT4_FTM0FLT2 field. */ -#define BR_SIM_SOPT4_FTM0FLT2(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT2)) +#define BR_SIM_SOPT4_FTM0FLT2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT2))) /*! @brief Format value for bitfield SIM_SOPT4_FTM0FLT2. */ #define BF_SIM_SOPT4_FTM0FLT2(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM0FLT2) & BM_SIM_SOPT4_FTM0FLT2) /*! @brief Set the FTM0FLT2 field to a new value. */ -#define BW_SIM_SOPT4_FTM0FLT2(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT2) = (v)) +#define BW_SIM_SOPT4_FTM0FLT2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0FLT2), v)) /*@}*/ /*! @@ -892,13 +899,13 @@ #define BS_SIM_SOPT4_FTM1FLT0 (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM1FLT0. */ /*! @brief Read current value of the SIM_SOPT4_FTM1FLT0 field. */ -#define BR_SIM_SOPT4_FTM1FLT0(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM1FLT0)) +#define BR_SIM_SOPT4_FTM1FLT0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM1FLT0))) /*! @brief Format value for bitfield SIM_SOPT4_FTM1FLT0. */ #define BF_SIM_SOPT4_FTM1FLT0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM1FLT0) & BM_SIM_SOPT4_FTM1FLT0) /*! @brief Set the FTM1FLT0 field to a new value. */ -#define BW_SIM_SOPT4_FTM1FLT0(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM1FLT0) = (v)) +#define BW_SIM_SOPT4_FTM1FLT0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM1FLT0), v)) /*@}*/ /*! @@ -918,13 +925,13 @@ #define BS_SIM_SOPT4_FTM2FLT0 (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM2FLT0. */ /*! @brief Read current value of the SIM_SOPT4_FTM2FLT0 field. */ -#define BR_SIM_SOPT4_FTM2FLT0(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM2FLT0)) +#define BR_SIM_SOPT4_FTM2FLT0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM2FLT0))) /*! @brief Format value for bitfield SIM_SOPT4_FTM2FLT0. */ #define BF_SIM_SOPT4_FTM2FLT0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM2FLT0) & BM_SIM_SOPT4_FTM2FLT0) /*! @brief Set the FTM2FLT0 field to a new value. */ -#define BW_SIM_SOPT4_FTM2FLT0(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM2FLT0) = (v)) +#define BW_SIM_SOPT4_FTM2FLT0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM2FLT0), v)) /*@}*/ /*! @@ -944,13 +951,13 @@ #define BS_SIM_SOPT4_FTM3FLT0 (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM3FLT0. */ /*! @brief Read current value of the SIM_SOPT4_FTM3FLT0 field. */ -#define BR_SIM_SOPT4_FTM3FLT0(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3FLT0)) +#define BR_SIM_SOPT4_FTM3FLT0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3FLT0))) /*! @brief Format value for bitfield SIM_SOPT4_FTM3FLT0. */ #define BF_SIM_SOPT4_FTM3FLT0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM3FLT0) & BM_SIM_SOPT4_FTM3FLT0) /*! @brief Set the FTM3FLT0 field to a new value. */ -#define BW_SIM_SOPT4_FTM3FLT0(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3FLT0) = (v)) +#define BW_SIM_SOPT4_FTM3FLT0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3FLT0), v)) /*@}*/ /*! @@ -971,7 +978,7 @@ #define BS_SIM_SOPT4_FTM1CH0SRC (2U) /*!< Bit field size in bits for SIM_SOPT4_FTM1CH0SRC. */ /*! @brief Read current value of the SIM_SOPT4_FTM1CH0SRC field. */ -#define BR_SIM_SOPT4_FTM1CH0SRC(x) (HW_SIM_SOPT4(x).B.FTM1CH0SRC) +#define BR_SIM_SOPT4_FTM1CH0SRC(x) (UNION_READ(hw_sim_sopt4_t, HW_SIM_SOPT4_ADDR(x), U, B.FTM1CH0SRC)) /*! @brief Format value for bitfield SIM_SOPT4_FTM1CH0SRC. */ #define BF_SIM_SOPT4_FTM1CH0SRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM1CH0SRC) & BM_SIM_SOPT4_FTM1CH0SRC) @@ -998,7 +1005,7 @@ #define BS_SIM_SOPT4_FTM2CH0SRC (2U) /*!< Bit field size in bits for SIM_SOPT4_FTM2CH0SRC. */ /*! @brief Read current value of the SIM_SOPT4_FTM2CH0SRC field. */ -#define BR_SIM_SOPT4_FTM2CH0SRC(x) (HW_SIM_SOPT4(x).B.FTM2CH0SRC) +#define BR_SIM_SOPT4_FTM2CH0SRC(x) (UNION_READ(hw_sim_sopt4_t, HW_SIM_SOPT4_ADDR(x), U, B.FTM2CH0SRC)) /*! @brief Format value for bitfield SIM_SOPT4_FTM2CH0SRC. */ #define BF_SIM_SOPT4_FTM2CH0SRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM2CH0SRC) & BM_SIM_SOPT4_FTM2CH0SRC) @@ -1024,13 +1031,13 @@ #define BS_SIM_SOPT4_FTM0CLKSEL (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM0CLKSEL. */ /*! @brief Read current value of the SIM_SOPT4_FTM0CLKSEL field. */ -#define BR_SIM_SOPT4_FTM0CLKSEL(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0CLKSEL)) +#define BR_SIM_SOPT4_FTM0CLKSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0CLKSEL))) /*! @brief Format value for bitfield SIM_SOPT4_FTM0CLKSEL. */ #define BF_SIM_SOPT4_FTM0CLKSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM0CLKSEL) & BM_SIM_SOPT4_FTM0CLKSEL) /*! @brief Set the FTM0CLKSEL field to a new value. */ -#define BW_SIM_SOPT4_FTM0CLKSEL(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0CLKSEL) = (v)) +#define BW_SIM_SOPT4_FTM0CLKSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0CLKSEL), v)) /*@}*/ /*! @@ -1050,13 +1057,13 @@ #define BS_SIM_SOPT4_FTM1CLKSEL (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM1CLKSEL. */ /*! @brief Read current value of the SIM_SOPT4_FTM1CLKSEL field. */ -#define BR_SIM_SOPT4_FTM1CLKSEL(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM1CLKSEL)) +#define BR_SIM_SOPT4_FTM1CLKSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM1CLKSEL))) /*! @brief Format value for bitfield SIM_SOPT4_FTM1CLKSEL. */ #define BF_SIM_SOPT4_FTM1CLKSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM1CLKSEL) & BM_SIM_SOPT4_FTM1CLKSEL) /*! @brief Set the FTM1CLKSEL field to a new value. */ -#define BW_SIM_SOPT4_FTM1CLKSEL(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM1CLKSEL) = (v)) +#define BW_SIM_SOPT4_FTM1CLKSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM1CLKSEL), v)) /*@}*/ /*! @@ -1076,13 +1083,13 @@ #define BS_SIM_SOPT4_FTM2CLKSEL (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM2CLKSEL. */ /*! @brief Read current value of the SIM_SOPT4_FTM2CLKSEL field. */ -#define BR_SIM_SOPT4_FTM2CLKSEL(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM2CLKSEL)) +#define BR_SIM_SOPT4_FTM2CLKSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM2CLKSEL))) /*! @brief Format value for bitfield SIM_SOPT4_FTM2CLKSEL. */ #define BF_SIM_SOPT4_FTM2CLKSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM2CLKSEL) & BM_SIM_SOPT4_FTM2CLKSEL) /*! @brief Set the FTM2CLKSEL field to a new value. */ -#define BW_SIM_SOPT4_FTM2CLKSEL(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM2CLKSEL) = (v)) +#define BW_SIM_SOPT4_FTM2CLKSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM2CLKSEL), v)) /*@}*/ /*! @@ -1102,13 +1109,13 @@ #define BS_SIM_SOPT4_FTM3CLKSEL (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM3CLKSEL. */ /*! @brief Read current value of the SIM_SOPT4_FTM3CLKSEL field. */ -#define BR_SIM_SOPT4_FTM3CLKSEL(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3CLKSEL)) +#define BR_SIM_SOPT4_FTM3CLKSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3CLKSEL))) /*! @brief Format value for bitfield SIM_SOPT4_FTM3CLKSEL. */ #define BF_SIM_SOPT4_FTM3CLKSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM3CLKSEL) & BM_SIM_SOPT4_FTM3CLKSEL) /*! @brief Set the FTM3CLKSEL field to a new value. */ -#define BW_SIM_SOPT4_FTM3CLKSEL(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3CLKSEL) = (v)) +#define BW_SIM_SOPT4_FTM3CLKSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3CLKSEL), v)) /*@}*/ /*! @@ -1126,13 +1133,13 @@ #define BS_SIM_SOPT4_FTM0TRG0SRC (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM0TRG0SRC. */ /*! @brief Read current value of the SIM_SOPT4_FTM0TRG0SRC field. */ -#define BR_SIM_SOPT4_FTM0TRG0SRC(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0TRG0SRC)) +#define BR_SIM_SOPT4_FTM0TRG0SRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0TRG0SRC))) /*! @brief Format value for bitfield SIM_SOPT4_FTM0TRG0SRC. */ #define BF_SIM_SOPT4_FTM0TRG0SRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM0TRG0SRC) & BM_SIM_SOPT4_FTM0TRG0SRC) /*! @brief Set the FTM0TRG0SRC field to a new value. */ -#define BW_SIM_SOPT4_FTM0TRG0SRC(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0TRG0SRC) = (v)) +#define BW_SIM_SOPT4_FTM0TRG0SRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0TRG0SRC), v)) /*@}*/ /*! @@ -1150,13 +1157,13 @@ #define BS_SIM_SOPT4_FTM0TRG1SRC (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM0TRG1SRC. */ /*! @brief Read current value of the SIM_SOPT4_FTM0TRG1SRC field. */ -#define BR_SIM_SOPT4_FTM0TRG1SRC(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0TRG1SRC)) +#define BR_SIM_SOPT4_FTM0TRG1SRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0TRG1SRC))) /*! @brief Format value for bitfield SIM_SOPT4_FTM0TRG1SRC. */ #define BF_SIM_SOPT4_FTM0TRG1SRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM0TRG1SRC) & BM_SIM_SOPT4_FTM0TRG1SRC) /*! @brief Set the FTM0TRG1SRC field to a new value. */ -#define BW_SIM_SOPT4_FTM0TRG1SRC(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0TRG1SRC) = (v)) +#define BW_SIM_SOPT4_FTM0TRG1SRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM0TRG1SRC), v)) /*@}*/ /*! @@ -1174,13 +1181,13 @@ #define BS_SIM_SOPT4_FTM3TRG0SRC (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM3TRG0SRC. */ /*! @brief Read current value of the SIM_SOPT4_FTM3TRG0SRC field. */ -#define BR_SIM_SOPT4_FTM3TRG0SRC(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3TRG0SRC)) +#define BR_SIM_SOPT4_FTM3TRG0SRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3TRG0SRC))) /*! @brief Format value for bitfield SIM_SOPT4_FTM3TRG0SRC. */ #define BF_SIM_SOPT4_FTM3TRG0SRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM3TRG0SRC) & BM_SIM_SOPT4_FTM3TRG0SRC) /*! @brief Set the FTM3TRG0SRC field to a new value. */ -#define BW_SIM_SOPT4_FTM3TRG0SRC(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3TRG0SRC) = (v)) +#define BW_SIM_SOPT4_FTM3TRG0SRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3TRG0SRC), v)) /*@}*/ /*! @@ -1198,13 +1205,13 @@ #define BS_SIM_SOPT4_FTM3TRG1SRC (1U) /*!< Bit field size in bits for SIM_SOPT4_FTM3TRG1SRC. */ /*! @brief Read current value of the SIM_SOPT4_FTM3TRG1SRC field. */ -#define BR_SIM_SOPT4_FTM3TRG1SRC(x) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3TRG1SRC)) +#define BR_SIM_SOPT4_FTM3TRG1SRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3TRG1SRC))) /*! @brief Format value for bitfield SIM_SOPT4_FTM3TRG1SRC. */ #define BF_SIM_SOPT4_FTM3TRG1SRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT4_FTM3TRG1SRC) & BM_SIM_SOPT4_FTM3TRG1SRC) /*! @brief Set the FTM3TRG1SRC field to a new value. */ -#define BW_SIM_SOPT4_FTM3TRG1SRC(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3TRG1SRC) = (v)) +#define BW_SIM_SOPT4_FTM3TRG1SRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT4_ADDR(x), BP_SIM_SOPT4_FTM3TRG1SRC), v)) /*@}*/ /******************************************************************************* @@ -1240,8 +1247,8 @@ #define HW_SIM_SOPT5_ADDR(x) ((x) + 0x1010U) #define HW_SIM_SOPT5(x) (*(__IO hw_sim_sopt5_t *) HW_SIM_SOPT5_ADDR(x)) -#define HW_SIM_SOPT5_RD(x) (HW_SIM_SOPT5(x).U) -#define HW_SIM_SOPT5_WR(x, v) (HW_SIM_SOPT5(x).U = (v)) +#define HW_SIM_SOPT5_RD(x) (ADDRESS_READ(hw_sim_sopt5_t, HW_SIM_SOPT5_ADDR(x))) +#define HW_SIM_SOPT5_WR(x, v) (ADDRESS_WRITE(hw_sim_sopt5_t, HW_SIM_SOPT5_ADDR(x), v)) #define HW_SIM_SOPT5_SET(x, v) (HW_SIM_SOPT5_WR(x, HW_SIM_SOPT5_RD(x) | (v))) #define HW_SIM_SOPT5_CLR(x, v) (HW_SIM_SOPT5_WR(x, HW_SIM_SOPT5_RD(x) & ~(v))) #define HW_SIM_SOPT5_TOG(x, v) (HW_SIM_SOPT5_WR(x, HW_SIM_SOPT5_RD(x) ^ (v))) @@ -1268,7 +1275,7 @@ #define BS_SIM_SOPT5_UART0TXSRC (2U) /*!< Bit field size in bits for SIM_SOPT5_UART0TXSRC. */ /*! @brief Read current value of the SIM_SOPT5_UART0TXSRC field. */ -#define BR_SIM_SOPT5_UART0TXSRC(x) (HW_SIM_SOPT5(x).B.UART0TXSRC) +#define BR_SIM_SOPT5_UART0TXSRC(x) (UNION_READ(hw_sim_sopt5_t, HW_SIM_SOPT5_ADDR(x), U, B.UART0TXSRC)) /*! @brief Format value for bitfield SIM_SOPT5_UART0TXSRC. */ #define BF_SIM_SOPT5_UART0TXSRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT5_UART0TXSRC) & BM_SIM_SOPT5_UART0TXSRC) @@ -1294,7 +1301,7 @@ #define BS_SIM_SOPT5_UART0RXSRC (2U) /*!< Bit field size in bits for SIM_SOPT5_UART0RXSRC. */ /*! @brief Read current value of the SIM_SOPT5_UART0RXSRC field. */ -#define BR_SIM_SOPT5_UART0RXSRC(x) (HW_SIM_SOPT5(x).B.UART0RXSRC) +#define BR_SIM_SOPT5_UART0RXSRC(x) (UNION_READ(hw_sim_sopt5_t, HW_SIM_SOPT5_ADDR(x), U, B.UART0RXSRC)) /*! @brief Format value for bitfield SIM_SOPT5_UART0RXSRC. */ #define BF_SIM_SOPT5_UART0RXSRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT5_UART0RXSRC) & BM_SIM_SOPT5_UART0RXSRC) @@ -1320,7 +1327,7 @@ #define BS_SIM_SOPT5_UART1TXSRC (2U) /*!< Bit field size in bits for SIM_SOPT5_UART1TXSRC. */ /*! @brief Read current value of the SIM_SOPT5_UART1TXSRC field. */ -#define BR_SIM_SOPT5_UART1TXSRC(x) (HW_SIM_SOPT5(x).B.UART1TXSRC) +#define BR_SIM_SOPT5_UART1TXSRC(x) (UNION_READ(hw_sim_sopt5_t, HW_SIM_SOPT5_ADDR(x), U, B.UART1TXSRC)) /*! @brief Format value for bitfield SIM_SOPT5_UART1TXSRC. */ #define BF_SIM_SOPT5_UART1TXSRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT5_UART1TXSRC) & BM_SIM_SOPT5_UART1TXSRC) @@ -1346,7 +1353,7 @@ #define BS_SIM_SOPT5_UART1RXSRC (2U) /*!< Bit field size in bits for SIM_SOPT5_UART1RXSRC. */ /*! @brief Read current value of the SIM_SOPT5_UART1RXSRC field. */ -#define BR_SIM_SOPT5_UART1RXSRC(x) (HW_SIM_SOPT5(x).B.UART1RXSRC) +#define BR_SIM_SOPT5_UART1RXSRC(x) (UNION_READ(hw_sim_sopt5_t, HW_SIM_SOPT5_ADDR(x), U, B.UART1RXSRC)) /*! @brief Format value for bitfield SIM_SOPT5_UART1RXSRC. */ #define BF_SIM_SOPT5_UART1RXSRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT5_UART1RXSRC) & BM_SIM_SOPT5_UART1RXSRC) @@ -1388,8 +1395,8 @@ #define HW_SIM_SOPT7_ADDR(x) ((x) + 0x1018U) #define HW_SIM_SOPT7(x) (*(__IO hw_sim_sopt7_t *) HW_SIM_SOPT7_ADDR(x)) -#define HW_SIM_SOPT7_RD(x) (HW_SIM_SOPT7(x).U) -#define HW_SIM_SOPT7_WR(x, v) (HW_SIM_SOPT7(x).U = (v)) +#define HW_SIM_SOPT7_RD(x) (ADDRESS_READ(hw_sim_sopt7_t, HW_SIM_SOPT7_ADDR(x))) +#define HW_SIM_SOPT7_WR(x, v) (ADDRESS_WRITE(hw_sim_sopt7_t, HW_SIM_SOPT7_ADDR(x), v)) #define HW_SIM_SOPT7_SET(x, v) (HW_SIM_SOPT7_WR(x, HW_SIM_SOPT7_RD(x) | (v))) #define HW_SIM_SOPT7_CLR(x, v) (HW_SIM_SOPT7_WR(x, HW_SIM_SOPT7_RD(x) & ~(v))) #define HW_SIM_SOPT7_TOG(x, v) (HW_SIM_SOPT7_WR(x, HW_SIM_SOPT7_RD(x) ^ (v))) @@ -1429,7 +1436,7 @@ #define BS_SIM_SOPT7_ADC0TRGSEL (4U) /*!< Bit field size in bits for SIM_SOPT7_ADC0TRGSEL. */ /*! @brief Read current value of the SIM_SOPT7_ADC0TRGSEL field. */ -#define BR_SIM_SOPT7_ADC0TRGSEL(x) (HW_SIM_SOPT7(x).B.ADC0TRGSEL) +#define BR_SIM_SOPT7_ADC0TRGSEL(x) (UNION_READ(hw_sim_sopt7_t, HW_SIM_SOPT7_ADDR(x), U, B.ADC0TRGSEL)) /*! @brief Format value for bitfield SIM_SOPT7_ADC0TRGSEL. */ #define BF_SIM_SOPT7_ADC0TRGSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT7_ADC0TRGSEL) & BM_SIM_SOPT7_ADC0TRGSEL) @@ -1454,13 +1461,13 @@ #define BS_SIM_SOPT7_ADC0PRETRGSEL (1U) /*!< Bit field size in bits for SIM_SOPT7_ADC0PRETRGSEL. */ /*! @brief Read current value of the SIM_SOPT7_ADC0PRETRGSEL field. */ -#define BR_SIM_SOPT7_ADC0PRETRGSEL(x) (BITBAND_ACCESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC0PRETRGSEL)) +#define BR_SIM_SOPT7_ADC0PRETRGSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC0PRETRGSEL))) /*! @brief Format value for bitfield SIM_SOPT7_ADC0PRETRGSEL. */ #define BF_SIM_SOPT7_ADC0PRETRGSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT7_ADC0PRETRGSEL) & BM_SIM_SOPT7_ADC0PRETRGSEL) /*! @brief Set the ADC0PRETRGSEL field to a new value. */ -#define BW_SIM_SOPT7_ADC0PRETRGSEL(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC0PRETRGSEL) = (v)) +#define BW_SIM_SOPT7_ADC0PRETRGSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC0PRETRGSEL), v)) /*@}*/ /*! @@ -1478,13 +1485,13 @@ #define BS_SIM_SOPT7_ADC0ALTTRGEN (1U) /*!< Bit field size in bits for SIM_SOPT7_ADC0ALTTRGEN. */ /*! @brief Read current value of the SIM_SOPT7_ADC0ALTTRGEN field. */ -#define BR_SIM_SOPT7_ADC0ALTTRGEN(x) (BITBAND_ACCESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC0ALTTRGEN)) +#define BR_SIM_SOPT7_ADC0ALTTRGEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC0ALTTRGEN))) /*! @brief Format value for bitfield SIM_SOPT7_ADC0ALTTRGEN. */ #define BF_SIM_SOPT7_ADC0ALTTRGEN(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT7_ADC0ALTTRGEN) & BM_SIM_SOPT7_ADC0ALTTRGEN) /*! @brief Set the ADC0ALTTRGEN field to a new value. */ -#define BW_SIM_SOPT7_ADC0ALTTRGEN(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC0ALTTRGEN) = (v)) +#define BW_SIM_SOPT7_ADC0ALTTRGEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC0ALTTRGEN), v)) /*@}*/ /*! @@ -1517,7 +1524,7 @@ #define BS_SIM_SOPT7_ADC1TRGSEL (4U) /*!< Bit field size in bits for SIM_SOPT7_ADC1TRGSEL. */ /*! @brief Read current value of the SIM_SOPT7_ADC1TRGSEL field. */ -#define BR_SIM_SOPT7_ADC1TRGSEL(x) (HW_SIM_SOPT7(x).B.ADC1TRGSEL) +#define BR_SIM_SOPT7_ADC1TRGSEL(x) (UNION_READ(hw_sim_sopt7_t, HW_SIM_SOPT7_ADDR(x), U, B.ADC1TRGSEL)) /*! @brief Format value for bitfield SIM_SOPT7_ADC1TRGSEL. */ #define BF_SIM_SOPT7_ADC1TRGSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT7_ADC1TRGSEL) & BM_SIM_SOPT7_ADC1TRGSEL) @@ -1542,13 +1549,13 @@ #define BS_SIM_SOPT7_ADC1PRETRGSEL (1U) /*!< Bit field size in bits for SIM_SOPT7_ADC1PRETRGSEL. */ /*! @brief Read current value of the SIM_SOPT7_ADC1PRETRGSEL field. */ -#define BR_SIM_SOPT7_ADC1PRETRGSEL(x) (BITBAND_ACCESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC1PRETRGSEL)) +#define BR_SIM_SOPT7_ADC1PRETRGSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC1PRETRGSEL))) /*! @brief Format value for bitfield SIM_SOPT7_ADC1PRETRGSEL. */ #define BF_SIM_SOPT7_ADC1PRETRGSEL(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT7_ADC1PRETRGSEL) & BM_SIM_SOPT7_ADC1PRETRGSEL) /*! @brief Set the ADC1PRETRGSEL field to a new value. */ -#define BW_SIM_SOPT7_ADC1PRETRGSEL(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC1PRETRGSEL) = (v)) +#define BW_SIM_SOPT7_ADC1PRETRGSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC1PRETRGSEL), v)) /*@}*/ /*! @@ -1566,13 +1573,13 @@ #define BS_SIM_SOPT7_ADC1ALTTRGEN (1U) /*!< Bit field size in bits for SIM_SOPT7_ADC1ALTTRGEN. */ /*! @brief Read current value of the SIM_SOPT7_ADC1ALTTRGEN field. */ -#define BR_SIM_SOPT7_ADC1ALTTRGEN(x) (BITBAND_ACCESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC1ALTTRGEN)) +#define BR_SIM_SOPT7_ADC1ALTTRGEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC1ALTTRGEN))) /*! @brief Format value for bitfield SIM_SOPT7_ADC1ALTTRGEN. */ #define BF_SIM_SOPT7_ADC1ALTTRGEN(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SOPT7_ADC1ALTTRGEN) & BM_SIM_SOPT7_ADC1ALTTRGEN) /*! @brief Set the ADC1ALTTRGEN field to a new value. */ -#define BW_SIM_SOPT7_ADC1ALTTRGEN(x, v) (BITBAND_ACCESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC1ALTTRGEN) = (v)) +#define BW_SIM_SOPT7_ADC1ALTTRGEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SOPT7_ADDR(x), BP_SIM_SOPT7_ADC1ALTTRGEN), v)) /*@}*/ /******************************************************************************* @@ -1607,7 +1614,7 @@ #define HW_SIM_SDID_ADDR(x) ((x) + 0x1024U) #define HW_SIM_SDID(x) (*(__I hw_sim_sdid_t *) HW_SIM_SDID_ADDR(x)) -#define HW_SIM_SDID_RD(x) (HW_SIM_SDID(x).U) +#define HW_SIM_SDID_RD(x) (ADDRESS_READ(hw_sim_sdid_t, HW_SIM_SDID_ADDR(x))) /*@}*/ /* @@ -1643,7 +1650,7 @@ #define BS_SIM_SDID_PINID (4U) /*!< Bit field size in bits for SIM_SDID_PINID. */ /*! @brief Read current value of the SIM_SDID_PINID field. */ -#define BR_SIM_SDID_PINID(x) (HW_SIM_SDID(x).B.PINID) +#define BR_SIM_SDID_PINID(x) (UNION_READ(hw_sim_sdid_t, HW_SIM_SDID_ADDR(x), U, B.PINID)) /*@}*/ /*! @@ -1668,7 +1675,7 @@ #define BS_SIM_SDID_FAMID (3U) /*!< Bit field size in bits for SIM_SDID_FAMID. */ /*! @brief Read current value of the SIM_SDID_FAMID field. */ -#define BR_SIM_SDID_FAMID(x) (HW_SIM_SDID(x).B.FAMID) +#define BR_SIM_SDID_FAMID(x) (UNION_READ(hw_sim_sdid_t, HW_SIM_SDID_ADDR(x), U, B.FAMID)) /*@}*/ /*! @@ -1682,7 +1689,7 @@ #define BS_SIM_SDID_DIEID (5U) /*!< Bit field size in bits for SIM_SDID_DIEID. */ /*! @brief Read current value of the SIM_SDID_DIEID field. */ -#define BR_SIM_SDID_DIEID(x) (HW_SIM_SDID(x).B.DIEID) +#define BR_SIM_SDID_DIEID(x) (UNION_READ(hw_sim_sdid_t, HW_SIM_SDID_ADDR(x), U, B.DIEID)) /*@}*/ /*! @@ -1696,7 +1703,7 @@ #define BS_SIM_SDID_REVID (4U) /*!< Bit field size in bits for SIM_SDID_REVID. */ /*! @brief Read current value of the SIM_SDID_REVID field. */ -#define BR_SIM_SDID_REVID(x) (HW_SIM_SDID(x).B.REVID) +#define BR_SIM_SDID_REVID(x) (UNION_READ(hw_sim_sdid_t, HW_SIM_SDID_ADDR(x), U, B.REVID)) /*@}*/ /*! @@ -1716,7 +1723,7 @@ #define BS_SIM_SDID_SERIESID (4U) /*!< Bit field size in bits for SIM_SDID_SERIESID. */ /*! @brief Read current value of the SIM_SDID_SERIESID field. */ -#define BR_SIM_SDID_SERIESID(x) (HW_SIM_SDID(x).B.SERIESID) +#define BR_SIM_SDID_SERIESID(x) (UNION_READ(hw_sim_sdid_t, HW_SIM_SDID_ADDR(x), U, B.SERIESID)) /*@}*/ /*! @@ -1739,7 +1746,7 @@ #define BS_SIM_SDID_SUBFAMID (4U) /*!< Bit field size in bits for SIM_SDID_SUBFAMID. */ /*! @brief Read current value of the SIM_SDID_SUBFAMID field. */ -#define BR_SIM_SDID_SUBFAMID(x) (HW_SIM_SDID(x).B.SUBFAMID) +#define BR_SIM_SDID_SUBFAMID(x) (UNION_READ(hw_sim_sdid_t, HW_SIM_SDID_ADDR(x), U, B.SUBFAMID)) /*@}*/ /*! @@ -1761,7 +1768,7 @@ #define BS_SIM_SDID_FAMILYID (4U) /*!< Bit field size in bits for SIM_SDID_FAMILYID. */ /*! @brief Read current value of the SIM_SDID_FAMILYID field. */ -#define BR_SIM_SDID_FAMILYID(x) (HW_SIM_SDID(x).B.FAMILYID) +#define BR_SIM_SDID_FAMILYID(x) (UNION_READ(hw_sim_sdid_t, HW_SIM_SDID_ADDR(x), U, B.FAMILYID)) /*@}*/ /******************************************************************************* @@ -1794,8 +1801,8 @@ #define HW_SIM_SCGC1_ADDR(x) ((x) + 0x1028U) #define HW_SIM_SCGC1(x) (*(__IO hw_sim_scgc1_t *) HW_SIM_SCGC1_ADDR(x)) -#define HW_SIM_SCGC1_RD(x) (HW_SIM_SCGC1(x).U) -#define HW_SIM_SCGC1_WR(x, v) (HW_SIM_SCGC1(x).U = (v)) +#define HW_SIM_SCGC1_RD(x) (ADDRESS_READ(hw_sim_scgc1_t, HW_SIM_SCGC1_ADDR(x))) +#define HW_SIM_SCGC1_WR(x, v) (ADDRESS_WRITE(hw_sim_scgc1_t, HW_SIM_SCGC1_ADDR(x), v)) #define HW_SIM_SCGC1_SET(x, v) (HW_SIM_SCGC1_WR(x, HW_SIM_SCGC1_RD(x) | (v))) #define HW_SIM_SCGC1_CLR(x, v) (HW_SIM_SCGC1_WR(x, HW_SIM_SCGC1_RD(x) & ~(v))) #define HW_SIM_SCGC1_TOG(x, v) (HW_SIM_SCGC1_WR(x, HW_SIM_SCGC1_RD(x) ^ (v))) @@ -1820,13 +1827,13 @@ #define BS_SIM_SCGC1_I2C2 (1U) /*!< Bit field size in bits for SIM_SCGC1_I2C2. */ /*! @brief Read current value of the SIM_SCGC1_I2C2 field. */ -#define BR_SIM_SCGC1_I2C2(x) (BITBAND_ACCESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_I2C2)) +#define BR_SIM_SCGC1_I2C2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_I2C2))) /*! @brief Format value for bitfield SIM_SCGC1_I2C2. */ #define BF_SIM_SCGC1_I2C2(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC1_I2C2) & BM_SIM_SCGC1_I2C2) /*! @brief Set the I2C2 field to a new value. */ -#define BW_SIM_SCGC1_I2C2(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_I2C2) = (v)) +#define BW_SIM_SCGC1_I2C2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_I2C2), v)) /*@}*/ /*! @@ -1844,13 +1851,13 @@ #define BS_SIM_SCGC1_UART4 (1U) /*!< Bit field size in bits for SIM_SCGC1_UART4. */ /*! @brief Read current value of the SIM_SCGC1_UART4 field. */ -#define BR_SIM_SCGC1_UART4(x) (BITBAND_ACCESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_UART4)) +#define BR_SIM_SCGC1_UART4(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_UART4))) /*! @brief Format value for bitfield SIM_SCGC1_UART4. */ #define BF_SIM_SCGC1_UART4(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC1_UART4) & BM_SIM_SCGC1_UART4) /*! @brief Set the UART4 field to a new value. */ -#define BW_SIM_SCGC1_UART4(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_UART4) = (v)) +#define BW_SIM_SCGC1_UART4(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_UART4), v)) /*@}*/ /*! @@ -1868,13 +1875,13 @@ #define BS_SIM_SCGC1_UART5 (1U) /*!< Bit field size in bits for SIM_SCGC1_UART5. */ /*! @brief Read current value of the SIM_SCGC1_UART5 field. */ -#define BR_SIM_SCGC1_UART5(x) (BITBAND_ACCESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_UART5)) +#define BR_SIM_SCGC1_UART5(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_UART5))) /*! @brief Format value for bitfield SIM_SCGC1_UART5. */ #define BF_SIM_SCGC1_UART5(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC1_UART5) & BM_SIM_SCGC1_UART5) /*! @brief Set the UART5 field to a new value. */ -#define BW_SIM_SCGC1_UART5(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_UART5) = (v)) +#define BW_SIM_SCGC1_UART5(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC1_ADDR(x), BP_SIM_SCGC1_UART5), v)) /*@}*/ /******************************************************************************* @@ -1910,8 +1917,8 @@ #define HW_SIM_SCGC2_ADDR(x) ((x) + 0x102CU) #define HW_SIM_SCGC2(x) (*(__IO hw_sim_scgc2_t *) HW_SIM_SCGC2_ADDR(x)) -#define HW_SIM_SCGC2_RD(x) (HW_SIM_SCGC2(x).U) -#define HW_SIM_SCGC2_WR(x, v) (HW_SIM_SCGC2(x).U = (v)) +#define HW_SIM_SCGC2_RD(x) (ADDRESS_READ(hw_sim_scgc2_t, HW_SIM_SCGC2_ADDR(x))) +#define HW_SIM_SCGC2_WR(x, v) (ADDRESS_WRITE(hw_sim_scgc2_t, HW_SIM_SCGC2_ADDR(x), v)) #define HW_SIM_SCGC2_SET(x, v) (HW_SIM_SCGC2_WR(x, HW_SIM_SCGC2_RD(x) | (v))) #define HW_SIM_SCGC2_CLR(x, v) (HW_SIM_SCGC2_WR(x, HW_SIM_SCGC2_RD(x) & ~(v))) #define HW_SIM_SCGC2_TOG(x, v) (HW_SIM_SCGC2_WR(x, HW_SIM_SCGC2_RD(x) ^ (v))) @@ -1936,13 +1943,13 @@ #define BS_SIM_SCGC2_ENET (1U) /*!< Bit field size in bits for SIM_SCGC2_ENET. */ /*! @brief Read current value of the SIM_SCGC2_ENET field. */ -#define BR_SIM_SCGC2_ENET(x) (BITBAND_ACCESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_ENET)) +#define BR_SIM_SCGC2_ENET(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_ENET))) /*! @brief Format value for bitfield SIM_SCGC2_ENET. */ #define BF_SIM_SCGC2_ENET(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC2_ENET) & BM_SIM_SCGC2_ENET) /*! @brief Set the ENET field to a new value. */ -#define BW_SIM_SCGC2_ENET(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_ENET) = (v)) +#define BW_SIM_SCGC2_ENET(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_ENET), v)) /*@}*/ /*! @@ -1960,13 +1967,13 @@ #define BS_SIM_SCGC2_DAC0 (1U) /*!< Bit field size in bits for SIM_SCGC2_DAC0. */ /*! @brief Read current value of the SIM_SCGC2_DAC0 field. */ -#define BR_SIM_SCGC2_DAC0(x) (BITBAND_ACCESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_DAC0)) +#define BR_SIM_SCGC2_DAC0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_DAC0))) /*! @brief Format value for bitfield SIM_SCGC2_DAC0. */ #define BF_SIM_SCGC2_DAC0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC2_DAC0) & BM_SIM_SCGC2_DAC0) /*! @brief Set the DAC0 field to a new value. */ -#define BW_SIM_SCGC2_DAC0(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_DAC0) = (v)) +#define BW_SIM_SCGC2_DAC0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_DAC0), v)) /*@}*/ /*! @@ -1984,13 +1991,13 @@ #define BS_SIM_SCGC2_DAC1 (1U) /*!< Bit field size in bits for SIM_SCGC2_DAC1. */ /*! @brief Read current value of the SIM_SCGC2_DAC1 field. */ -#define BR_SIM_SCGC2_DAC1(x) (BITBAND_ACCESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_DAC1)) +#define BR_SIM_SCGC2_DAC1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_DAC1))) /*! @brief Format value for bitfield SIM_SCGC2_DAC1. */ #define BF_SIM_SCGC2_DAC1(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC2_DAC1) & BM_SIM_SCGC2_DAC1) /*! @brief Set the DAC1 field to a new value. */ -#define BW_SIM_SCGC2_DAC1(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_DAC1) = (v)) +#define BW_SIM_SCGC2_DAC1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC2_ADDR(x), BP_SIM_SCGC2_DAC1), v)) /*@}*/ /******************************************************************************* @@ -2032,8 +2039,8 @@ #define HW_SIM_SCGC3_ADDR(x) ((x) + 0x1030U) #define HW_SIM_SCGC3(x) (*(__IO hw_sim_scgc3_t *) HW_SIM_SCGC3_ADDR(x)) -#define HW_SIM_SCGC3_RD(x) (HW_SIM_SCGC3(x).U) -#define HW_SIM_SCGC3_WR(x, v) (HW_SIM_SCGC3(x).U = (v)) +#define HW_SIM_SCGC3_RD(x) (ADDRESS_READ(hw_sim_scgc3_t, HW_SIM_SCGC3_ADDR(x))) +#define HW_SIM_SCGC3_WR(x, v) (ADDRESS_WRITE(hw_sim_scgc3_t, HW_SIM_SCGC3_ADDR(x), v)) #define HW_SIM_SCGC3_SET(x, v) (HW_SIM_SCGC3_WR(x, HW_SIM_SCGC3_RD(x) | (v))) #define HW_SIM_SCGC3_CLR(x, v) (HW_SIM_SCGC3_WR(x, HW_SIM_SCGC3_RD(x) & ~(v))) #define HW_SIM_SCGC3_TOG(x, v) (HW_SIM_SCGC3_WR(x, HW_SIM_SCGC3_RD(x) ^ (v))) @@ -2058,13 +2065,13 @@ #define BS_SIM_SCGC3_RNGA (1U) /*!< Bit field size in bits for SIM_SCGC3_RNGA. */ /*! @brief Read current value of the SIM_SCGC3_RNGA field. */ -#define BR_SIM_SCGC3_RNGA(x) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_RNGA)) +#define BR_SIM_SCGC3_RNGA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_RNGA))) /*! @brief Format value for bitfield SIM_SCGC3_RNGA. */ #define BF_SIM_SCGC3_RNGA(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC3_RNGA) & BM_SIM_SCGC3_RNGA) /*! @brief Set the RNGA field to a new value. */ -#define BW_SIM_SCGC3_RNGA(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_RNGA) = (v)) +#define BW_SIM_SCGC3_RNGA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_RNGA), v)) /*@}*/ /*! @@ -2082,13 +2089,13 @@ #define BS_SIM_SCGC3_SPI2 (1U) /*!< Bit field size in bits for SIM_SCGC3_SPI2. */ /*! @brief Read current value of the SIM_SCGC3_SPI2 field. */ -#define BR_SIM_SCGC3_SPI2(x) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_SPI2)) +#define BR_SIM_SCGC3_SPI2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_SPI2))) /*! @brief Format value for bitfield SIM_SCGC3_SPI2. */ #define BF_SIM_SCGC3_SPI2(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC3_SPI2) & BM_SIM_SCGC3_SPI2) /*! @brief Set the SPI2 field to a new value. */ -#define BW_SIM_SCGC3_SPI2(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_SPI2) = (v)) +#define BW_SIM_SCGC3_SPI2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_SPI2), v)) /*@}*/ /*! @@ -2106,13 +2113,13 @@ #define BS_SIM_SCGC3_SDHC (1U) /*!< Bit field size in bits for SIM_SCGC3_SDHC. */ /*! @brief Read current value of the SIM_SCGC3_SDHC field. */ -#define BR_SIM_SCGC3_SDHC(x) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_SDHC)) +#define BR_SIM_SCGC3_SDHC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_SDHC))) /*! @brief Format value for bitfield SIM_SCGC3_SDHC. */ #define BF_SIM_SCGC3_SDHC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC3_SDHC) & BM_SIM_SCGC3_SDHC) /*! @brief Set the SDHC field to a new value. */ -#define BW_SIM_SCGC3_SDHC(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_SDHC) = (v)) +#define BW_SIM_SCGC3_SDHC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_SDHC), v)) /*@}*/ /*! @@ -2130,13 +2137,13 @@ #define BS_SIM_SCGC3_FTM2 (1U) /*!< Bit field size in bits for SIM_SCGC3_FTM2. */ /*! @brief Read current value of the SIM_SCGC3_FTM2 field. */ -#define BR_SIM_SCGC3_FTM2(x) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_FTM2)) +#define BR_SIM_SCGC3_FTM2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_FTM2))) /*! @brief Format value for bitfield SIM_SCGC3_FTM2. */ #define BF_SIM_SCGC3_FTM2(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC3_FTM2) & BM_SIM_SCGC3_FTM2) /*! @brief Set the FTM2 field to a new value. */ -#define BW_SIM_SCGC3_FTM2(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_FTM2) = (v)) +#define BW_SIM_SCGC3_FTM2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_FTM2), v)) /*@}*/ /*! @@ -2154,13 +2161,13 @@ #define BS_SIM_SCGC3_FTM3 (1U) /*!< Bit field size in bits for SIM_SCGC3_FTM3. */ /*! @brief Read current value of the SIM_SCGC3_FTM3 field. */ -#define BR_SIM_SCGC3_FTM3(x) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_FTM3)) +#define BR_SIM_SCGC3_FTM3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_FTM3))) /*! @brief Format value for bitfield SIM_SCGC3_FTM3. */ #define BF_SIM_SCGC3_FTM3(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC3_FTM3) & BM_SIM_SCGC3_FTM3) /*! @brief Set the FTM3 field to a new value. */ -#define BW_SIM_SCGC3_FTM3(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_FTM3) = (v)) +#define BW_SIM_SCGC3_FTM3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_FTM3), v)) /*@}*/ /*! @@ -2178,13 +2185,13 @@ #define BS_SIM_SCGC3_ADC1 (1U) /*!< Bit field size in bits for SIM_SCGC3_ADC1. */ /*! @brief Read current value of the SIM_SCGC3_ADC1 field. */ -#define BR_SIM_SCGC3_ADC1(x) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_ADC1)) +#define BR_SIM_SCGC3_ADC1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_ADC1))) /*! @brief Format value for bitfield SIM_SCGC3_ADC1. */ #define BF_SIM_SCGC3_ADC1(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC3_ADC1) & BM_SIM_SCGC3_ADC1) /*! @brief Set the ADC1 field to a new value. */ -#define BW_SIM_SCGC3_ADC1(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_ADC1) = (v)) +#define BW_SIM_SCGC3_ADC1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC3_ADDR(x), BP_SIM_SCGC3_ADC1), v)) /*@}*/ /******************************************************************************* @@ -2227,8 +2234,8 @@ #define HW_SIM_SCGC4_ADDR(x) ((x) + 0x1034U) #define HW_SIM_SCGC4(x) (*(__IO hw_sim_scgc4_t *) HW_SIM_SCGC4_ADDR(x)) -#define HW_SIM_SCGC4_RD(x) (HW_SIM_SCGC4(x).U) -#define HW_SIM_SCGC4_WR(x, v) (HW_SIM_SCGC4(x).U = (v)) +#define HW_SIM_SCGC4_RD(x) (ADDRESS_READ(hw_sim_scgc4_t, HW_SIM_SCGC4_ADDR(x))) +#define HW_SIM_SCGC4_WR(x, v) (ADDRESS_WRITE(hw_sim_scgc4_t, HW_SIM_SCGC4_ADDR(x), v)) #define HW_SIM_SCGC4_SET(x, v) (HW_SIM_SCGC4_WR(x, HW_SIM_SCGC4_RD(x) | (v))) #define HW_SIM_SCGC4_CLR(x, v) (HW_SIM_SCGC4_WR(x, HW_SIM_SCGC4_RD(x) & ~(v))) #define HW_SIM_SCGC4_TOG(x, v) (HW_SIM_SCGC4_WR(x, HW_SIM_SCGC4_RD(x) ^ (v))) @@ -2253,13 +2260,13 @@ #define BS_SIM_SCGC4_EWM (1U) /*!< Bit field size in bits for SIM_SCGC4_EWM. */ /*! @brief Read current value of the SIM_SCGC4_EWM field. */ -#define BR_SIM_SCGC4_EWM(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_EWM)) +#define BR_SIM_SCGC4_EWM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_EWM))) /*! @brief Format value for bitfield SIM_SCGC4_EWM. */ #define BF_SIM_SCGC4_EWM(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_EWM) & BM_SIM_SCGC4_EWM) /*! @brief Set the EWM field to a new value. */ -#define BW_SIM_SCGC4_EWM(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_EWM) = (v)) +#define BW_SIM_SCGC4_EWM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_EWM), v)) /*@}*/ /*! @@ -2277,13 +2284,13 @@ #define BS_SIM_SCGC4_CMT (1U) /*!< Bit field size in bits for SIM_SCGC4_CMT. */ /*! @brief Read current value of the SIM_SCGC4_CMT field. */ -#define BR_SIM_SCGC4_CMT(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_CMT)) +#define BR_SIM_SCGC4_CMT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_CMT))) /*! @brief Format value for bitfield SIM_SCGC4_CMT. */ #define BF_SIM_SCGC4_CMT(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_CMT) & BM_SIM_SCGC4_CMT) /*! @brief Set the CMT field to a new value. */ -#define BW_SIM_SCGC4_CMT(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_CMT) = (v)) +#define BW_SIM_SCGC4_CMT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_CMT), v)) /*@}*/ /*! @@ -2301,13 +2308,13 @@ #define BS_SIM_SCGC4_I2C0 (1U) /*!< Bit field size in bits for SIM_SCGC4_I2C0. */ /*! @brief Read current value of the SIM_SCGC4_I2C0 field. */ -#define BR_SIM_SCGC4_I2C0(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_I2C0)) +#define BR_SIM_SCGC4_I2C0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_I2C0))) /*! @brief Format value for bitfield SIM_SCGC4_I2C0. */ #define BF_SIM_SCGC4_I2C0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_I2C0) & BM_SIM_SCGC4_I2C0) /*! @brief Set the I2C0 field to a new value. */ -#define BW_SIM_SCGC4_I2C0(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_I2C0) = (v)) +#define BW_SIM_SCGC4_I2C0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_I2C0), v)) /*@}*/ /*! @@ -2325,13 +2332,13 @@ #define BS_SIM_SCGC4_I2C1 (1U) /*!< Bit field size in bits for SIM_SCGC4_I2C1. */ /*! @brief Read current value of the SIM_SCGC4_I2C1 field. */ -#define BR_SIM_SCGC4_I2C1(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_I2C1)) +#define BR_SIM_SCGC4_I2C1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_I2C1))) /*! @brief Format value for bitfield SIM_SCGC4_I2C1. */ #define BF_SIM_SCGC4_I2C1(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_I2C1) & BM_SIM_SCGC4_I2C1) /*! @brief Set the I2C1 field to a new value. */ -#define BW_SIM_SCGC4_I2C1(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_I2C1) = (v)) +#define BW_SIM_SCGC4_I2C1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_I2C1), v)) /*@}*/ /*! @@ -2349,13 +2356,13 @@ #define BS_SIM_SCGC4_UART0 (1U) /*!< Bit field size in bits for SIM_SCGC4_UART0. */ /*! @brief Read current value of the SIM_SCGC4_UART0 field. */ -#define BR_SIM_SCGC4_UART0(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART0)) +#define BR_SIM_SCGC4_UART0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART0))) /*! @brief Format value for bitfield SIM_SCGC4_UART0. */ #define BF_SIM_SCGC4_UART0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_UART0) & BM_SIM_SCGC4_UART0) /*! @brief Set the UART0 field to a new value. */ -#define BW_SIM_SCGC4_UART0(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART0) = (v)) +#define BW_SIM_SCGC4_UART0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART0), v)) /*@}*/ /*! @@ -2373,13 +2380,13 @@ #define BS_SIM_SCGC4_UART1 (1U) /*!< Bit field size in bits for SIM_SCGC4_UART1. */ /*! @brief Read current value of the SIM_SCGC4_UART1 field. */ -#define BR_SIM_SCGC4_UART1(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART1)) +#define BR_SIM_SCGC4_UART1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART1))) /*! @brief Format value for bitfield SIM_SCGC4_UART1. */ #define BF_SIM_SCGC4_UART1(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_UART1) & BM_SIM_SCGC4_UART1) /*! @brief Set the UART1 field to a new value. */ -#define BW_SIM_SCGC4_UART1(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART1) = (v)) +#define BW_SIM_SCGC4_UART1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART1), v)) /*@}*/ /*! @@ -2397,13 +2404,13 @@ #define BS_SIM_SCGC4_UART2 (1U) /*!< Bit field size in bits for SIM_SCGC4_UART2. */ /*! @brief Read current value of the SIM_SCGC4_UART2 field. */ -#define BR_SIM_SCGC4_UART2(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART2)) +#define BR_SIM_SCGC4_UART2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART2))) /*! @brief Format value for bitfield SIM_SCGC4_UART2. */ #define BF_SIM_SCGC4_UART2(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_UART2) & BM_SIM_SCGC4_UART2) /*! @brief Set the UART2 field to a new value. */ -#define BW_SIM_SCGC4_UART2(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART2) = (v)) +#define BW_SIM_SCGC4_UART2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART2), v)) /*@}*/ /*! @@ -2421,13 +2428,13 @@ #define BS_SIM_SCGC4_UART3 (1U) /*!< Bit field size in bits for SIM_SCGC4_UART3. */ /*! @brief Read current value of the SIM_SCGC4_UART3 field. */ -#define BR_SIM_SCGC4_UART3(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART3)) +#define BR_SIM_SCGC4_UART3(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART3))) /*! @brief Format value for bitfield SIM_SCGC4_UART3. */ #define BF_SIM_SCGC4_UART3(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_UART3) & BM_SIM_SCGC4_UART3) /*! @brief Set the UART3 field to a new value. */ -#define BW_SIM_SCGC4_UART3(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART3) = (v)) +#define BW_SIM_SCGC4_UART3(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_UART3), v)) /*@}*/ /*! @@ -2445,13 +2452,13 @@ #define BS_SIM_SCGC4_USBOTG (1U) /*!< Bit field size in bits for SIM_SCGC4_USBOTG. */ /*! @brief Read current value of the SIM_SCGC4_USBOTG field. */ -#define BR_SIM_SCGC4_USBOTG(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_USBOTG)) +#define BR_SIM_SCGC4_USBOTG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_USBOTG))) /*! @brief Format value for bitfield SIM_SCGC4_USBOTG. */ #define BF_SIM_SCGC4_USBOTG(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_USBOTG) & BM_SIM_SCGC4_USBOTG) /*! @brief Set the USBOTG field to a new value. */ -#define BW_SIM_SCGC4_USBOTG(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_USBOTG) = (v)) +#define BW_SIM_SCGC4_USBOTG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_USBOTG), v)) /*@}*/ /*! @@ -2469,13 +2476,13 @@ #define BS_SIM_SCGC4_CMP (1U) /*!< Bit field size in bits for SIM_SCGC4_CMP. */ /*! @brief Read current value of the SIM_SCGC4_CMP field. */ -#define BR_SIM_SCGC4_CMP(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_CMP)) +#define BR_SIM_SCGC4_CMP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_CMP))) /*! @brief Format value for bitfield SIM_SCGC4_CMP. */ #define BF_SIM_SCGC4_CMP(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_CMP) & BM_SIM_SCGC4_CMP) /*! @brief Set the CMP field to a new value. */ -#define BW_SIM_SCGC4_CMP(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_CMP) = (v)) +#define BW_SIM_SCGC4_CMP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_CMP), v)) /*@}*/ /*! @@ -2493,13 +2500,13 @@ #define BS_SIM_SCGC4_VREF (1U) /*!< Bit field size in bits for SIM_SCGC4_VREF. */ /*! @brief Read current value of the SIM_SCGC4_VREF field. */ -#define BR_SIM_SCGC4_VREF(x) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_VREF)) +#define BR_SIM_SCGC4_VREF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_VREF))) /*! @brief Format value for bitfield SIM_SCGC4_VREF. */ #define BF_SIM_SCGC4_VREF(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC4_VREF) & BM_SIM_SCGC4_VREF) /*! @brief Set the VREF field to a new value. */ -#define BW_SIM_SCGC4_VREF(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_VREF) = (v)) +#define BW_SIM_SCGC4_VREF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC4_ADDR(x), BP_SIM_SCGC4_VREF), v)) /*@}*/ /******************************************************************************* @@ -2534,8 +2541,8 @@ #define HW_SIM_SCGC5_ADDR(x) ((x) + 0x1038U) #define HW_SIM_SCGC5(x) (*(__IO hw_sim_scgc5_t *) HW_SIM_SCGC5_ADDR(x)) -#define HW_SIM_SCGC5_RD(x) (HW_SIM_SCGC5(x).U) -#define HW_SIM_SCGC5_WR(x, v) (HW_SIM_SCGC5(x).U = (v)) +#define HW_SIM_SCGC5_RD(x) (ADDRESS_READ(hw_sim_scgc5_t, HW_SIM_SCGC5_ADDR(x))) +#define HW_SIM_SCGC5_WR(x, v) (ADDRESS_WRITE(hw_sim_scgc5_t, HW_SIM_SCGC5_ADDR(x), v)) #define HW_SIM_SCGC5_SET(x, v) (HW_SIM_SCGC5_WR(x, HW_SIM_SCGC5_RD(x) | (v))) #define HW_SIM_SCGC5_CLR(x, v) (HW_SIM_SCGC5_WR(x, HW_SIM_SCGC5_RD(x) & ~(v))) #define HW_SIM_SCGC5_TOG(x, v) (HW_SIM_SCGC5_WR(x, HW_SIM_SCGC5_RD(x) ^ (v))) @@ -2560,13 +2567,13 @@ #define BS_SIM_SCGC5_LPTMR (1U) /*!< Bit field size in bits for SIM_SCGC5_LPTMR. */ /*! @brief Read current value of the SIM_SCGC5_LPTMR field. */ -#define BR_SIM_SCGC5_LPTMR(x) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_LPTMR)) +#define BR_SIM_SCGC5_LPTMR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_LPTMR))) /*! @brief Format value for bitfield SIM_SCGC5_LPTMR. */ #define BF_SIM_SCGC5_LPTMR(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC5_LPTMR) & BM_SIM_SCGC5_LPTMR) /*! @brief Set the LPTMR field to a new value. */ -#define BW_SIM_SCGC5_LPTMR(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_LPTMR) = (v)) +#define BW_SIM_SCGC5_LPTMR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_LPTMR), v)) /*@}*/ /*! @@ -2584,13 +2591,13 @@ #define BS_SIM_SCGC5_PORTA (1U) /*!< Bit field size in bits for SIM_SCGC5_PORTA. */ /*! @brief Read current value of the SIM_SCGC5_PORTA field. */ -#define BR_SIM_SCGC5_PORTA(x) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTA)) +#define BR_SIM_SCGC5_PORTA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTA))) /*! @brief Format value for bitfield SIM_SCGC5_PORTA. */ #define BF_SIM_SCGC5_PORTA(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC5_PORTA) & BM_SIM_SCGC5_PORTA) /*! @brief Set the PORTA field to a new value. */ -#define BW_SIM_SCGC5_PORTA(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTA) = (v)) +#define BW_SIM_SCGC5_PORTA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTA), v)) /*@}*/ /*! @@ -2608,13 +2615,13 @@ #define BS_SIM_SCGC5_PORTB (1U) /*!< Bit field size in bits for SIM_SCGC5_PORTB. */ /*! @brief Read current value of the SIM_SCGC5_PORTB field. */ -#define BR_SIM_SCGC5_PORTB(x) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTB)) +#define BR_SIM_SCGC5_PORTB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTB))) /*! @brief Format value for bitfield SIM_SCGC5_PORTB. */ #define BF_SIM_SCGC5_PORTB(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC5_PORTB) & BM_SIM_SCGC5_PORTB) /*! @brief Set the PORTB field to a new value. */ -#define BW_SIM_SCGC5_PORTB(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTB) = (v)) +#define BW_SIM_SCGC5_PORTB(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTB), v)) /*@}*/ /*! @@ -2632,13 +2639,13 @@ #define BS_SIM_SCGC5_PORTC (1U) /*!< Bit field size in bits for SIM_SCGC5_PORTC. */ /*! @brief Read current value of the SIM_SCGC5_PORTC field. */ -#define BR_SIM_SCGC5_PORTC(x) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTC)) +#define BR_SIM_SCGC5_PORTC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTC))) /*! @brief Format value for bitfield SIM_SCGC5_PORTC. */ #define BF_SIM_SCGC5_PORTC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC5_PORTC) & BM_SIM_SCGC5_PORTC) /*! @brief Set the PORTC field to a new value. */ -#define BW_SIM_SCGC5_PORTC(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTC) = (v)) +#define BW_SIM_SCGC5_PORTC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTC), v)) /*@}*/ /*! @@ -2656,13 +2663,13 @@ #define BS_SIM_SCGC5_PORTD (1U) /*!< Bit field size in bits for SIM_SCGC5_PORTD. */ /*! @brief Read current value of the SIM_SCGC5_PORTD field. */ -#define BR_SIM_SCGC5_PORTD(x) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTD)) +#define BR_SIM_SCGC5_PORTD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTD))) /*! @brief Format value for bitfield SIM_SCGC5_PORTD. */ #define BF_SIM_SCGC5_PORTD(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC5_PORTD) & BM_SIM_SCGC5_PORTD) /*! @brief Set the PORTD field to a new value. */ -#define BW_SIM_SCGC5_PORTD(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTD) = (v)) +#define BW_SIM_SCGC5_PORTD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTD), v)) /*@}*/ /*! @@ -2680,13 +2687,13 @@ #define BS_SIM_SCGC5_PORTE (1U) /*!< Bit field size in bits for SIM_SCGC5_PORTE. */ /*! @brief Read current value of the SIM_SCGC5_PORTE field. */ -#define BR_SIM_SCGC5_PORTE(x) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTE)) +#define BR_SIM_SCGC5_PORTE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTE))) /*! @brief Format value for bitfield SIM_SCGC5_PORTE. */ #define BF_SIM_SCGC5_PORTE(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC5_PORTE) & BM_SIM_SCGC5_PORTE) /*! @brief Set the PORTE field to a new value. */ -#define BW_SIM_SCGC5_PORTE(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTE) = (v)) +#define BW_SIM_SCGC5_PORTE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC5_ADDR(x), BP_SIM_SCGC5_PORTE), v)) /*@}*/ /******************************************************************************* @@ -2742,8 +2749,8 @@ #define HW_SIM_SCGC6_ADDR(x) ((x) + 0x103CU) #define HW_SIM_SCGC6(x) (*(__IO hw_sim_scgc6_t *) HW_SIM_SCGC6_ADDR(x)) -#define HW_SIM_SCGC6_RD(x) (HW_SIM_SCGC6(x).U) -#define HW_SIM_SCGC6_WR(x, v) (HW_SIM_SCGC6(x).U = (v)) +#define HW_SIM_SCGC6_RD(x) (ADDRESS_READ(hw_sim_scgc6_t, HW_SIM_SCGC6_ADDR(x))) +#define HW_SIM_SCGC6_WR(x, v) (ADDRESS_WRITE(hw_sim_scgc6_t, HW_SIM_SCGC6_ADDR(x), v)) #define HW_SIM_SCGC6_SET(x, v) (HW_SIM_SCGC6_WR(x, HW_SIM_SCGC6_RD(x) | (v))) #define HW_SIM_SCGC6_CLR(x, v) (HW_SIM_SCGC6_WR(x, HW_SIM_SCGC6_RD(x) & ~(v))) #define HW_SIM_SCGC6_TOG(x, v) (HW_SIM_SCGC6_WR(x, HW_SIM_SCGC6_RD(x) ^ (v))) @@ -2770,13 +2777,13 @@ #define BS_SIM_SCGC6_FTF (1U) /*!< Bit field size in bits for SIM_SCGC6_FTF. */ /*! @brief Read current value of the SIM_SCGC6_FTF field. */ -#define BR_SIM_SCGC6_FTF(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTF)) +#define BR_SIM_SCGC6_FTF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTF))) /*! @brief Format value for bitfield SIM_SCGC6_FTF. */ #define BF_SIM_SCGC6_FTF(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_FTF) & BM_SIM_SCGC6_FTF) /*! @brief Set the FTF field to a new value. */ -#define BW_SIM_SCGC6_FTF(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTF) = (v)) +#define BW_SIM_SCGC6_FTF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTF), v)) /*@}*/ /*! @@ -2794,13 +2801,13 @@ #define BS_SIM_SCGC6_DMAMUX (1U) /*!< Bit field size in bits for SIM_SCGC6_DMAMUX. */ /*! @brief Read current value of the SIM_SCGC6_DMAMUX field. */ -#define BR_SIM_SCGC6_DMAMUX(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_DMAMUX)) +#define BR_SIM_SCGC6_DMAMUX(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_DMAMUX))) /*! @brief Format value for bitfield SIM_SCGC6_DMAMUX. */ #define BF_SIM_SCGC6_DMAMUX(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_DMAMUX) & BM_SIM_SCGC6_DMAMUX) /*! @brief Set the DMAMUX field to a new value. */ -#define BW_SIM_SCGC6_DMAMUX(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_DMAMUX) = (v)) +#define BW_SIM_SCGC6_DMAMUX(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_DMAMUX), v)) /*@}*/ /*! @@ -2818,13 +2825,13 @@ #define BS_SIM_SCGC6_FLEXCAN0 (1U) /*!< Bit field size in bits for SIM_SCGC6_FLEXCAN0. */ /*! @brief Read current value of the SIM_SCGC6_FLEXCAN0 field. */ -#define BR_SIM_SCGC6_FLEXCAN0(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FLEXCAN0)) +#define BR_SIM_SCGC6_FLEXCAN0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FLEXCAN0))) /*! @brief Format value for bitfield SIM_SCGC6_FLEXCAN0. */ #define BF_SIM_SCGC6_FLEXCAN0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_FLEXCAN0) & BM_SIM_SCGC6_FLEXCAN0) /*! @brief Set the FLEXCAN0 field to a new value. */ -#define BW_SIM_SCGC6_FLEXCAN0(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FLEXCAN0) = (v)) +#define BW_SIM_SCGC6_FLEXCAN0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FLEXCAN0), v)) /*@}*/ /*! @@ -2838,13 +2845,13 @@ #define BS_SIM_SCGC6_RNGA (1U) /*!< Bit field size in bits for SIM_SCGC6_RNGA. */ /*! @brief Read current value of the SIM_SCGC6_RNGA field. */ -#define BR_SIM_SCGC6_RNGA(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_RNGA)) +#define BR_SIM_SCGC6_RNGA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_RNGA))) /*! @brief Format value for bitfield SIM_SCGC6_RNGA. */ #define BF_SIM_SCGC6_RNGA(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_RNGA) & BM_SIM_SCGC6_RNGA) /*! @brief Set the RNGA field to a new value. */ -#define BW_SIM_SCGC6_RNGA(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_RNGA) = (v)) +#define BW_SIM_SCGC6_RNGA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_RNGA), v)) /*@}*/ /*! @@ -2862,13 +2869,13 @@ #define BS_SIM_SCGC6_SPI0 (1U) /*!< Bit field size in bits for SIM_SCGC6_SPI0. */ /*! @brief Read current value of the SIM_SCGC6_SPI0 field. */ -#define BR_SIM_SCGC6_SPI0(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_SPI0)) +#define BR_SIM_SCGC6_SPI0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_SPI0))) /*! @brief Format value for bitfield SIM_SCGC6_SPI0. */ #define BF_SIM_SCGC6_SPI0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_SPI0) & BM_SIM_SCGC6_SPI0) /*! @brief Set the SPI0 field to a new value. */ -#define BW_SIM_SCGC6_SPI0(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_SPI0) = (v)) +#define BW_SIM_SCGC6_SPI0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_SPI0), v)) /*@}*/ /*! @@ -2886,13 +2893,13 @@ #define BS_SIM_SCGC6_SPI1 (1U) /*!< Bit field size in bits for SIM_SCGC6_SPI1. */ /*! @brief Read current value of the SIM_SCGC6_SPI1 field. */ -#define BR_SIM_SCGC6_SPI1(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_SPI1)) +#define BR_SIM_SCGC6_SPI1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_SPI1))) /*! @brief Format value for bitfield SIM_SCGC6_SPI1. */ #define BF_SIM_SCGC6_SPI1(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_SPI1) & BM_SIM_SCGC6_SPI1) /*! @brief Set the SPI1 field to a new value. */ -#define BW_SIM_SCGC6_SPI1(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_SPI1) = (v)) +#define BW_SIM_SCGC6_SPI1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_SPI1), v)) /*@}*/ /*! @@ -2910,13 +2917,13 @@ #define BS_SIM_SCGC6_I2S (1U) /*!< Bit field size in bits for SIM_SCGC6_I2S. */ /*! @brief Read current value of the SIM_SCGC6_I2S field. */ -#define BR_SIM_SCGC6_I2S(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_I2S)) +#define BR_SIM_SCGC6_I2S(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_I2S))) /*! @brief Format value for bitfield SIM_SCGC6_I2S. */ #define BF_SIM_SCGC6_I2S(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_I2S) & BM_SIM_SCGC6_I2S) /*! @brief Set the I2S field to a new value. */ -#define BW_SIM_SCGC6_I2S(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_I2S) = (v)) +#define BW_SIM_SCGC6_I2S(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_I2S), v)) /*@}*/ /*! @@ -2934,13 +2941,13 @@ #define BS_SIM_SCGC6_CRC (1U) /*!< Bit field size in bits for SIM_SCGC6_CRC. */ /*! @brief Read current value of the SIM_SCGC6_CRC field. */ -#define BR_SIM_SCGC6_CRC(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_CRC)) +#define BR_SIM_SCGC6_CRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_CRC))) /*! @brief Format value for bitfield SIM_SCGC6_CRC. */ #define BF_SIM_SCGC6_CRC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_CRC) & BM_SIM_SCGC6_CRC) /*! @brief Set the CRC field to a new value. */ -#define BW_SIM_SCGC6_CRC(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_CRC) = (v)) +#define BW_SIM_SCGC6_CRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_CRC), v)) /*@}*/ /*! @@ -2958,13 +2965,13 @@ #define BS_SIM_SCGC6_USBDCD (1U) /*!< Bit field size in bits for SIM_SCGC6_USBDCD. */ /*! @brief Read current value of the SIM_SCGC6_USBDCD field. */ -#define BR_SIM_SCGC6_USBDCD(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_USBDCD)) +#define BR_SIM_SCGC6_USBDCD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_USBDCD))) /*! @brief Format value for bitfield SIM_SCGC6_USBDCD. */ #define BF_SIM_SCGC6_USBDCD(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_USBDCD) & BM_SIM_SCGC6_USBDCD) /*! @brief Set the USBDCD field to a new value. */ -#define BW_SIM_SCGC6_USBDCD(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_USBDCD) = (v)) +#define BW_SIM_SCGC6_USBDCD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_USBDCD), v)) /*@}*/ /*! @@ -2982,13 +2989,13 @@ #define BS_SIM_SCGC6_PDB (1U) /*!< Bit field size in bits for SIM_SCGC6_PDB. */ /*! @brief Read current value of the SIM_SCGC6_PDB field. */ -#define BR_SIM_SCGC6_PDB(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_PDB)) +#define BR_SIM_SCGC6_PDB(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_PDB))) /*! @brief Format value for bitfield SIM_SCGC6_PDB. */ #define BF_SIM_SCGC6_PDB(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_PDB) & BM_SIM_SCGC6_PDB) /*! @brief Set the PDB field to a new value. */ -#define BW_SIM_SCGC6_PDB(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_PDB) = (v)) +#define BW_SIM_SCGC6_PDB(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_PDB), v)) /*@}*/ /*! @@ -3006,13 +3013,13 @@ #define BS_SIM_SCGC6_PIT (1U) /*!< Bit field size in bits for SIM_SCGC6_PIT. */ /*! @brief Read current value of the SIM_SCGC6_PIT field. */ -#define BR_SIM_SCGC6_PIT(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_PIT)) +#define BR_SIM_SCGC6_PIT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_PIT))) /*! @brief Format value for bitfield SIM_SCGC6_PIT. */ #define BF_SIM_SCGC6_PIT(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_PIT) & BM_SIM_SCGC6_PIT) /*! @brief Set the PIT field to a new value. */ -#define BW_SIM_SCGC6_PIT(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_PIT) = (v)) +#define BW_SIM_SCGC6_PIT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_PIT), v)) /*@}*/ /*! @@ -3030,13 +3037,13 @@ #define BS_SIM_SCGC6_FTM0 (1U) /*!< Bit field size in bits for SIM_SCGC6_FTM0. */ /*! @brief Read current value of the SIM_SCGC6_FTM0 field. */ -#define BR_SIM_SCGC6_FTM0(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM0)) +#define BR_SIM_SCGC6_FTM0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM0))) /*! @brief Format value for bitfield SIM_SCGC6_FTM0. */ #define BF_SIM_SCGC6_FTM0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_FTM0) & BM_SIM_SCGC6_FTM0) /*! @brief Set the FTM0 field to a new value. */ -#define BW_SIM_SCGC6_FTM0(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM0) = (v)) +#define BW_SIM_SCGC6_FTM0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM0), v)) /*@}*/ /*! @@ -3054,13 +3061,13 @@ #define BS_SIM_SCGC6_FTM1 (1U) /*!< Bit field size in bits for SIM_SCGC6_FTM1. */ /*! @brief Read current value of the SIM_SCGC6_FTM1 field. */ -#define BR_SIM_SCGC6_FTM1(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM1)) +#define BR_SIM_SCGC6_FTM1(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM1))) /*! @brief Format value for bitfield SIM_SCGC6_FTM1. */ #define BF_SIM_SCGC6_FTM1(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_FTM1) & BM_SIM_SCGC6_FTM1) /*! @brief Set the FTM1 field to a new value. */ -#define BW_SIM_SCGC6_FTM1(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM1) = (v)) +#define BW_SIM_SCGC6_FTM1(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM1), v)) /*@}*/ /*! @@ -3078,13 +3085,13 @@ #define BS_SIM_SCGC6_FTM2 (1U) /*!< Bit field size in bits for SIM_SCGC6_FTM2. */ /*! @brief Read current value of the SIM_SCGC6_FTM2 field. */ -#define BR_SIM_SCGC6_FTM2(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM2)) +#define BR_SIM_SCGC6_FTM2(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM2))) /*! @brief Format value for bitfield SIM_SCGC6_FTM2. */ #define BF_SIM_SCGC6_FTM2(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_FTM2) & BM_SIM_SCGC6_FTM2) /*! @brief Set the FTM2 field to a new value. */ -#define BW_SIM_SCGC6_FTM2(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM2) = (v)) +#define BW_SIM_SCGC6_FTM2(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_FTM2), v)) /*@}*/ /*! @@ -3102,13 +3109,13 @@ #define BS_SIM_SCGC6_ADC0 (1U) /*!< Bit field size in bits for SIM_SCGC6_ADC0. */ /*! @brief Read current value of the SIM_SCGC6_ADC0 field. */ -#define BR_SIM_SCGC6_ADC0(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_ADC0)) +#define BR_SIM_SCGC6_ADC0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_ADC0))) /*! @brief Format value for bitfield SIM_SCGC6_ADC0. */ #define BF_SIM_SCGC6_ADC0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_ADC0) & BM_SIM_SCGC6_ADC0) /*! @brief Set the ADC0 field to a new value. */ -#define BW_SIM_SCGC6_ADC0(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_ADC0) = (v)) +#define BW_SIM_SCGC6_ADC0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_ADC0), v)) /*@}*/ /*! @@ -3126,13 +3133,13 @@ #define BS_SIM_SCGC6_RTC (1U) /*!< Bit field size in bits for SIM_SCGC6_RTC. */ /*! @brief Read current value of the SIM_SCGC6_RTC field. */ -#define BR_SIM_SCGC6_RTC(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_RTC)) +#define BR_SIM_SCGC6_RTC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_RTC))) /*! @brief Format value for bitfield SIM_SCGC6_RTC. */ #define BF_SIM_SCGC6_RTC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_RTC) & BM_SIM_SCGC6_RTC) /*! @brief Set the RTC field to a new value. */ -#define BW_SIM_SCGC6_RTC(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_RTC) = (v)) +#define BW_SIM_SCGC6_RTC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_RTC), v)) /*@}*/ /*! @@ -3150,13 +3157,13 @@ #define BS_SIM_SCGC6_DAC0 (1U) /*!< Bit field size in bits for SIM_SCGC6_DAC0. */ /*! @brief Read current value of the SIM_SCGC6_DAC0 field. */ -#define BR_SIM_SCGC6_DAC0(x) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_DAC0)) +#define BR_SIM_SCGC6_DAC0(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_DAC0))) /*! @brief Format value for bitfield SIM_SCGC6_DAC0. */ #define BF_SIM_SCGC6_DAC0(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC6_DAC0) & BM_SIM_SCGC6_DAC0) /*! @brief Set the DAC0 field to a new value. */ -#define BW_SIM_SCGC6_DAC0(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_DAC0) = (v)) +#define BW_SIM_SCGC6_DAC0(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC6_ADDR(x), BP_SIM_SCGC6_DAC0), v)) /*@}*/ /******************************************************************************* @@ -3187,8 +3194,8 @@ #define HW_SIM_SCGC7_ADDR(x) ((x) + 0x1040U) #define HW_SIM_SCGC7(x) (*(__IO hw_sim_scgc7_t *) HW_SIM_SCGC7_ADDR(x)) -#define HW_SIM_SCGC7_RD(x) (HW_SIM_SCGC7(x).U) -#define HW_SIM_SCGC7_WR(x, v) (HW_SIM_SCGC7(x).U = (v)) +#define HW_SIM_SCGC7_RD(x) (ADDRESS_READ(hw_sim_scgc7_t, HW_SIM_SCGC7_ADDR(x))) +#define HW_SIM_SCGC7_WR(x, v) (ADDRESS_WRITE(hw_sim_scgc7_t, HW_SIM_SCGC7_ADDR(x), v)) #define HW_SIM_SCGC7_SET(x, v) (HW_SIM_SCGC7_WR(x, HW_SIM_SCGC7_RD(x) | (v))) #define HW_SIM_SCGC7_CLR(x, v) (HW_SIM_SCGC7_WR(x, HW_SIM_SCGC7_RD(x) & ~(v))) #define HW_SIM_SCGC7_TOG(x, v) (HW_SIM_SCGC7_WR(x, HW_SIM_SCGC7_RD(x) ^ (v))) @@ -3213,13 +3220,13 @@ #define BS_SIM_SCGC7_FLEXBUS (1U) /*!< Bit field size in bits for SIM_SCGC7_FLEXBUS. */ /*! @brief Read current value of the SIM_SCGC7_FLEXBUS field. */ -#define BR_SIM_SCGC7_FLEXBUS(x) (BITBAND_ACCESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_FLEXBUS)) +#define BR_SIM_SCGC7_FLEXBUS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_FLEXBUS))) /*! @brief Format value for bitfield SIM_SCGC7_FLEXBUS. */ #define BF_SIM_SCGC7_FLEXBUS(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC7_FLEXBUS) & BM_SIM_SCGC7_FLEXBUS) /*! @brief Set the FLEXBUS field to a new value. */ -#define BW_SIM_SCGC7_FLEXBUS(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_FLEXBUS) = (v)) +#define BW_SIM_SCGC7_FLEXBUS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_FLEXBUS), v)) /*@}*/ /*! @@ -3237,13 +3244,13 @@ #define BS_SIM_SCGC7_DMA (1U) /*!< Bit field size in bits for SIM_SCGC7_DMA. */ /*! @brief Read current value of the SIM_SCGC7_DMA field. */ -#define BR_SIM_SCGC7_DMA(x) (BITBAND_ACCESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_DMA)) +#define BR_SIM_SCGC7_DMA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_DMA))) /*! @brief Format value for bitfield SIM_SCGC7_DMA. */ #define BF_SIM_SCGC7_DMA(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC7_DMA) & BM_SIM_SCGC7_DMA) /*! @brief Set the DMA field to a new value. */ -#define BW_SIM_SCGC7_DMA(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_DMA) = (v)) +#define BW_SIM_SCGC7_DMA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_DMA), v)) /*@}*/ /*! @@ -3261,13 +3268,13 @@ #define BS_SIM_SCGC7_MPU (1U) /*!< Bit field size in bits for SIM_SCGC7_MPU. */ /*! @brief Read current value of the SIM_SCGC7_MPU field. */ -#define BR_SIM_SCGC7_MPU(x) (BITBAND_ACCESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_MPU)) +#define BR_SIM_SCGC7_MPU(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_MPU))) /*! @brief Format value for bitfield SIM_SCGC7_MPU. */ #define BF_SIM_SCGC7_MPU(v) ((uint32_t)((uint32_t)(v) << BP_SIM_SCGC7_MPU) & BM_SIM_SCGC7_MPU) /*! @brief Set the MPU field to a new value. */ -#define BW_SIM_SCGC7_MPU(x, v) (BITBAND_ACCESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_MPU) = (v)) +#define BW_SIM_SCGC7_MPU(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_SCGC7_ADDR(x), BP_SIM_SCGC7_MPU), v)) /*@}*/ /******************************************************************************* @@ -3307,8 +3314,8 @@ #define HW_SIM_CLKDIV1_ADDR(x) ((x) + 0x1044U) #define HW_SIM_CLKDIV1(x) (*(__IO hw_sim_clkdiv1_t *) HW_SIM_CLKDIV1_ADDR(x)) -#define HW_SIM_CLKDIV1_RD(x) (HW_SIM_CLKDIV1(x).U) -#define HW_SIM_CLKDIV1_WR(x, v) (HW_SIM_CLKDIV1(x).U = (v)) +#define HW_SIM_CLKDIV1_RD(x) (ADDRESS_READ(hw_sim_clkdiv1_t, HW_SIM_CLKDIV1_ADDR(x))) +#define HW_SIM_CLKDIV1_WR(x, v) (ADDRESS_WRITE(hw_sim_clkdiv1_t, HW_SIM_CLKDIV1_ADDR(x), v)) #define HW_SIM_CLKDIV1_SET(x, v) (HW_SIM_CLKDIV1_WR(x, HW_SIM_CLKDIV1_RD(x) | (v))) #define HW_SIM_CLKDIV1_CLR(x, v) (HW_SIM_CLKDIV1_WR(x, HW_SIM_CLKDIV1_RD(x) & ~(v))) #define HW_SIM_CLKDIV1_TOG(x, v) (HW_SIM_CLKDIV1_WR(x, HW_SIM_CLKDIV1_RD(x) ^ (v))) @@ -3350,7 +3357,7 @@ #define BS_SIM_CLKDIV1_OUTDIV4 (4U) /*!< Bit field size in bits for SIM_CLKDIV1_OUTDIV4. */ /*! @brief Read current value of the SIM_CLKDIV1_OUTDIV4 field. */ -#define BR_SIM_CLKDIV1_OUTDIV4(x) (HW_SIM_CLKDIV1(x).B.OUTDIV4) +#define BR_SIM_CLKDIV1_OUTDIV4(x) (UNION_READ(hw_sim_clkdiv1_t, HW_SIM_CLKDIV1_ADDR(x), U, B.OUTDIV4)) /*! @brief Format value for bitfield SIM_CLKDIV1_OUTDIV4. */ #define BF_SIM_CLKDIV1_OUTDIV4(v) ((uint32_t)((uint32_t)(v) << BP_SIM_CLKDIV1_OUTDIV4) & BM_SIM_CLKDIV1_OUTDIV4) @@ -3391,7 +3398,7 @@ #define BS_SIM_CLKDIV1_OUTDIV3 (4U) /*!< Bit field size in bits for SIM_CLKDIV1_OUTDIV3. */ /*! @brief Read current value of the SIM_CLKDIV1_OUTDIV3 field. */ -#define BR_SIM_CLKDIV1_OUTDIV3(x) (HW_SIM_CLKDIV1(x).B.OUTDIV3) +#define BR_SIM_CLKDIV1_OUTDIV3(x) (UNION_READ(hw_sim_clkdiv1_t, HW_SIM_CLKDIV1_ADDR(x), U, B.OUTDIV3)) /*! @brief Format value for bitfield SIM_CLKDIV1_OUTDIV3. */ #define BF_SIM_CLKDIV1_OUTDIV3(v) ((uint32_t)((uint32_t)(v) << BP_SIM_CLKDIV1_OUTDIV3) & BM_SIM_CLKDIV1_OUTDIV3) @@ -3432,7 +3439,7 @@ #define BS_SIM_CLKDIV1_OUTDIV2 (4U) /*!< Bit field size in bits for SIM_CLKDIV1_OUTDIV2. */ /*! @brief Read current value of the SIM_CLKDIV1_OUTDIV2 field. */ -#define BR_SIM_CLKDIV1_OUTDIV2(x) (HW_SIM_CLKDIV1(x).B.OUTDIV2) +#define BR_SIM_CLKDIV1_OUTDIV2(x) (UNION_READ(hw_sim_clkdiv1_t, HW_SIM_CLKDIV1_ADDR(x), U, B.OUTDIV2)) /*! @brief Format value for bitfield SIM_CLKDIV1_OUTDIV2. */ #define BF_SIM_CLKDIV1_OUTDIV2(v) ((uint32_t)((uint32_t)(v) << BP_SIM_CLKDIV1_OUTDIV2) & BM_SIM_CLKDIV1_OUTDIV2) @@ -3472,7 +3479,7 @@ #define BS_SIM_CLKDIV1_OUTDIV1 (4U) /*!< Bit field size in bits for SIM_CLKDIV1_OUTDIV1. */ /*! @brief Read current value of the SIM_CLKDIV1_OUTDIV1 field. */ -#define BR_SIM_CLKDIV1_OUTDIV1(x) (HW_SIM_CLKDIV1(x).B.OUTDIV1) +#define BR_SIM_CLKDIV1_OUTDIV1(x) (UNION_READ(hw_sim_clkdiv1_t, HW_SIM_CLKDIV1_ADDR(x), U, B.OUTDIV1)) /*! @brief Format value for bitfield SIM_CLKDIV1_OUTDIV1. */ #define BF_SIM_CLKDIV1_OUTDIV1(v) ((uint32_t)((uint32_t)(v) << BP_SIM_CLKDIV1_OUTDIV1) & BM_SIM_CLKDIV1_OUTDIV1) @@ -3508,8 +3515,8 @@ #define HW_SIM_CLKDIV2_ADDR(x) ((x) + 0x1048U) #define HW_SIM_CLKDIV2(x) (*(__IO hw_sim_clkdiv2_t *) HW_SIM_CLKDIV2_ADDR(x)) -#define HW_SIM_CLKDIV2_RD(x) (HW_SIM_CLKDIV2(x).U) -#define HW_SIM_CLKDIV2_WR(x, v) (HW_SIM_CLKDIV2(x).U = (v)) +#define HW_SIM_CLKDIV2_RD(x) (ADDRESS_READ(hw_sim_clkdiv2_t, HW_SIM_CLKDIV2_ADDR(x))) +#define HW_SIM_CLKDIV2_WR(x, v) (ADDRESS_WRITE(hw_sim_clkdiv2_t, HW_SIM_CLKDIV2_ADDR(x), v)) #define HW_SIM_CLKDIV2_SET(x, v) (HW_SIM_CLKDIV2_WR(x, HW_SIM_CLKDIV2_RD(x) | (v))) #define HW_SIM_CLKDIV2_CLR(x, v) (HW_SIM_CLKDIV2_WR(x, HW_SIM_CLKDIV2_RD(x) & ~(v))) #define HW_SIM_CLKDIV2_TOG(x, v) (HW_SIM_CLKDIV2_WR(x, HW_SIM_CLKDIV2_RD(x) ^ (v))) @@ -3532,13 +3539,13 @@ #define BS_SIM_CLKDIV2_USBFRAC (1U) /*!< Bit field size in bits for SIM_CLKDIV2_USBFRAC. */ /*! @brief Read current value of the SIM_CLKDIV2_USBFRAC field. */ -#define BR_SIM_CLKDIV2_USBFRAC(x) (BITBAND_ACCESS32(HW_SIM_CLKDIV2_ADDR(x), BP_SIM_CLKDIV2_USBFRAC)) +#define BR_SIM_CLKDIV2_USBFRAC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_CLKDIV2_ADDR(x), BP_SIM_CLKDIV2_USBFRAC))) /*! @brief Format value for bitfield SIM_CLKDIV2_USBFRAC. */ #define BF_SIM_CLKDIV2_USBFRAC(v) ((uint32_t)((uint32_t)(v) << BP_SIM_CLKDIV2_USBFRAC) & BM_SIM_CLKDIV2_USBFRAC) /*! @brief Set the USBFRAC field to a new value. */ -#define BW_SIM_CLKDIV2_USBFRAC(x, v) (BITBAND_ACCESS32(HW_SIM_CLKDIV2_ADDR(x), BP_SIM_CLKDIV2_USBFRAC) = (v)) +#define BW_SIM_CLKDIV2_USBFRAC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_CLKDIV2_ADDR(x), BP_SIM_CLKDIV2_USBFRAC), v)) /*@}*/ /*! @@ -3554,7 +3561,7 @@ #define BS_SIM_CLKDIV2_USBDIV (3U) /*!< Bit field size in bits for SIM_CLKDIV2_USBDIV. */ /*! @brief Read current value of the SIM_CLKDIV2_USBDIV field. */ -#define BR_SIM_CLKDIV2_USBDIV(x) (HW_SIM_CLKDIV2(x).B.USBDIV) +#define BR_SIM_CLKDIV2_USBDIV(x) (UNION_READ(hw_sim_clkdiv2_t, HW_SIM_CLKDIV2_ADDR(x), U, B.USBDIV)) /*! @brief Format value for bitfield SIM_CLKDIV2_USBDIV. */ #define BF_SIM_CLKDIV2_USBDIV(v) ((uint32_t)((uint32_t)(v) << BP_SIM_CLKDIV2_USBDIV) & BM_SIM_CLKDIV2_USBDIV) @@ -3600,8 +3607,8 @@ #define HW_SIM_FCFG1_ADDR(x) ((x) + 0x104CU) #define HW_SIM_FCFG1(x) (*(__IO hw_sim_fcfg1_t *) HW_SIM_FCFG1_ADDR(x)) -#define HW_SIM_FCFG1_RD(x) (HW_SIM_FCFG1(x).U) -#define HW_SIM_FCFG1_WR(x, v) (HW_SIM_FCFG1(x).U = (v)) +#define HW_SIM_FCFG1_RD(x) (ADDRESS_READ(hw_sim_fcfg1_t, HW_SIM_FCFG1_ADDR(x))) +#define HW_SIM_FCFG1_WR(x, v) (ADDRESS_WRITE(hw_sim_fcfg1_t, HW_SIM_FCFG1_ADDR(x), v)) #define HW_SIM_FCFG1_SET(x, v) (HW_SIM_FCFG1_WR(x, HW_SIM_FCFG1_RD(x) | (v))) #define HW_SIM_FCFG1_CLR(x, v) (HW_SIM_FCFG1_WR(x, HW_SIM_FCFG1_RD(x) & ~(v))) #define HW_SIM_FCFG1_TOG(x, v) (HW_SIM_FCFG1_WR(x, HW_SIM_FCFG1_RD(x) ^ (v))) @@ -3629,13 +3636,13 @@ #define BS_SIM_FCFG1_FLASHDIS (1U) /*!< Bit field size in bits for SIM_FCFG1_FLASHDIS. */ /*! @brief Read current value of the SIM_FCFG1_FLASHDIS field. */ -#define BR_SIM_FCFG1_FLASHDIS(x) (BITBAND_ACCESS32(HW_SIM_FCFG1_ADDR(x), BP_SIM_FCFG1_FLASHDIS)) +#define BR_SIM_FCFG1_FLASHDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_FCFG1_ADDR(x), BP_SIM_FCFG1_FLASHDIS))) /*! @brief Format value for bitfield SIM_FCFG1_FLASHDIS. */ #define BF_SIM_FCFG1_FLASHDIS(v) ((uint32_t)((uint32_t)(v) << BP_SIM_FCFG1_FLASHDIS) & BM_SIM_FCFG1_FLASHDIS) /*! @brief Set the FLASHDIS field to a new value. */ -#define BW_SIM_FCFG1_FLASHDIS(x, v) (BITBAND_ACCESS32(HW_SIM_FCFG1_ADDR(x), BP_SIM_FCFG1_FLASHDIS) = (v)) +#define BW_SIM_FCFG1_FLASHDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_FCFG1_ADDR(x), BP_SIM_FCFG1_FLASHDIS), v)) /*@}*/ /*! @@ -3658,13 +3665,13 @@ #define BS_SIM_FCFG1_FLASHDOZE (1U) /*!< Bit field size in bits for SIM_FCFG1_FLASHDOZE. */ /*! @brief Read current value of the SIM_FCFG1_FLASHDOZE field. */ -#define BR_SIM_FCFG1_FLASHDOZE(x) (BITBAND_ACCESS32(HW_SIM_FCFG1_ADDR(x), BP_SIM_FCFG1_FLASHDOZE)) +#define BR_SIM_FCFG1_FLASHDOZE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_FCFG1_ADDR(x), BP_SIM_FCFG1_FLASHDOZE))) /*! @brief Format value for bitfield SIM_FCFG1_FLASHDOZE. */ #define BF_SIM_FCFG1_FLASHDOZE(v) ((uint32_t)((uint32_t)(v) << BP_SIM_FCFG1_FLASHDOZE) & BM_SIM_FCFG1_FLASHDOZE) /*! @brief Set the FLASHDOZE field to a new value. */ -#define BW_SIM_FCFG1_FLASHDOZE(x, v) (BITBAND_ACCESS32(HW_SIM_FCFG1_ADDR(x), BP_SIM_FCFG1_FLASHDOZE) = (v)) +#define BW_SIM_FCFG1_FLASHDOZE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SIM_FCFG1_ADDR(x), BP_SIM_FCFG1_FLASHDOZE), v)) /*@}*/ /*! @@ -3679,7 +3686,7 @@ #define BS_SIM_FCFG1_DEPART (4U) /*!< Bit field size in bits for SIM_FCFG1_DEPART. */ /*! @brief Read current value of the SIM_FCFG1_DEPART field. */ -#define BR_SIM_FCFG1_DEPART(x) (HW_SIM_FCFG1(x).B.DEPART) +#define BR_SIM_FCFG1_DEPART(x) (UNION_READ(hw_sim_fcfg1_t, HW_SIM_FCFG1_ADDR(x), U, B.DEPART)) /*@}*/ /*! @@ -3706,7 +3713,7 @@ #define BS_SIM_FCFG1_EESIZE (4U) /*!< Bit field size in bits for SIM_FCFG1_EESIZE. */ /*! @brief Read current value of the SIM_FCFG1_EESIZE field. */ -#define BR_SIM_FCFG1_EESIZE(x) (HW_SIM_FCFG1(x).B.EESIZE) +#define BR_SIM_FCFG1_EESIZE(x) (UNION_READ(hw_sim_fcfg1_t, HW_SIM_FCFG1_ADDR(x), U, B.EESIZE)) /*@}*/ /*! @@ -3730,7 +3737,7 @@ #define BS_SIM_FCFG1_PFSIZE (4U) /*!< Bit field size in bits for SIM_FCFG1_PFSIZE. */ /*! @brief Read current value of the SIM_FCFG1_PFSIZE field. */ -#define BR_SIM_FCFG1_PFSIZE(x) (HW_SIM_FCFG1(x).B.PFSIZE) +#define BR_SIM_FCFG1_PFSIZE(x) (UNION_READ(hw_sim_fcfg1_t, HW_SIM_FCFG1_ADDR(x), U, B.PFSIZE)) /*@}*/ /*! @@ -3754,7 +3761,7 @@ #define BS_SIM_FCFG1_NVMSIZE (4U) /*!< Bit field size in bits for SIM_FCFG1_NVMSIZE. */ /*! @brief Read current value of the SIM_FCFG1_NVMSIZE field. */ -#define BR_SIM_FCFG1_NVMSIZE(x) (HW_SIM_FCFG1(x).B.NVMSIZE) +#define BR_SIM_FCFG1_NVMSIZE(x) (UNION_READ(hw_sim_fcfg1_t, HW_SIM_FCFG1_ADDR(x), U, B.NVMSIZE)) /*@}*/ /******************************************************************************* @@ -3786,7 +3793,7 @@ #define HW_SIM_FCFG2_ADDR(x) ((x) + 0x1050U) #define HW_SIM_FCFG2(x) (*(__I hw_sim_fcfg2_t *) HW_SIM_FCFG2_ADDR(x)) -#define HW_SIM_FCFG2_RD(x) (HW_SIM_FCFG2(x).U) +#define HW_SIM_FCFG2_RD(x) (ADDRESS_READ(hw_sim_fcfg2_t, HW_SIM_FCFG2_ADDR(x))) /*@}*/ /* @@ -3813,7 +3820,7 @@ #define BS_SIM_FCFG2_MAXADDR1 (7U) /*!< Bit field size in bits for SIM_FCFG2_MAXADDR1. */ /*! @brief Read current value of the SIM_FCFG2_MAXADDR1 field. */ -#define BR_SIM_FCFG2_MAXADDR1(x) (HW_SIM_FCFG2(x).B.MAXADDR1) +#define BR_SIM_FCFG2_MAXADDR1(x) (UNION_READ(hw_sim_fcfg2_t, HW_SIM_FCFG2_ADDR(x), U, B.MAXADDR1)) /*@}*/ /*! @@ -3832,7 +3839,7 @@ #define BS_SIM_FCFG2_PFLSH (1U) /*!< Bit field size in bits for SIM_FCFG2_PFLSH. */ /*! @brief Read current value of the SIM_FCFG2_PFLSH field. */ -#define BR_SIM_FCFG2_PFLSH(x) (BITBAND_ACCESS32(HW_SIM_FCFG2_ADDR(x), BP_SIM_FCFG2_PFLSH)) +#define BR_SIM_FCFG2_PFLSH(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SIM_FCFG2_ADDR(x), BP_SIM_FCFG2_PFLSH))) /*@}*/ /*! @@ -3849,7 +3856,7 @@ #define BS_SIM_FCFG2_MAXADDR0 (7U) /*!< Bit field size in bits for SIM_FCFG2_MAXADDR0. */ /*! @brief Read current value of the SIM_FCFG2_MAXADDR0 field. */ -#define BR_SIM_FCFG2_MAXADDR0(x) (HW_SIM_FCFG2(x).B.MAXADDR0) +#define BR_SIM_FCFG2_MAXADDR0(x) (UNION_READ(hw_sim_fcfg2_t, HW_SIM_FCFG2_ADDR(x), U, B.MAXADDR0)) /*@}*/ /******************************************************************************* @@ -3877,7 +3884,7 @@ #define HW_SIM_UIDH_ADDR(x) ((x) + 0x1054U) #define HW_SIM_UIDH(x) (*(__I hw_sim_uidh_t *) HW_SIM_UIDH_ADDR(x)) -#define HW_SIM_UIDH_RD(x) (HW_SIM_UIDH(x).U) +#define HW_SIM_UIDH_RD(x) (ADDRESS_READ(hw_sim_uidh_t, HW_SIM_UIDH_ADDR(x))) /*@}*/ /* @@ -3923,7 +3930,7 @@ #define HW_SIM_UIDMH_ADDR(x) ((x) + 0x1058U) #define HW_SIM_UIDMH(x) (*(__I hw_sim_uidmh_t *) HW_SIM_UIDMH_ADDR(x)) -#define HW_SIM_UIDMH_RD(x) (HW_SIM_UIDMH(x).U) +#define HW_SIM_UIDMH_RD(x) (ADDRESS_READ(hw_sim_uidmh_t, HW_SIM_UIDMH_ADDR(x))) /*@}*/ /* @@ -3969,7 +3976,7 @@ #define HW_SIM_UIDML_ADDR(x) ((x) + 0x105CU) #define HW_SIM_UIDML(x) (*(__I hw_sim_uidml_t *) HW_SIM_UIDML_ADDR(x)) -#define HW_SIM_UIDML_RD(x) (HW_SIM_UIDML(x).U) +#define HW_SIM_UIDML_RD(x) (ADDRESS_READ(hw_sim_uidml_t, HW_SIM_UIDML_ADDR(x))) /*@}*/ /* @@ -4015,7 +4022,7 @@ #define HW_SIM_UIDL_ADDR(x) ((x) + 0x1060U) #define HW_SIM_UIDL(x) (*(__I hw_sim_uidl_t *) HW_SIM_UIDL_ADDR(x)) -#define HW_SIM_UIDL_RD(x) (HW_SIM_UIDL(x).U) +#define HW_SIM_UIDL_RD(x) (ADDRESS_READ(hw_sim_uidl_t, HW_SIM_UIDL_ADDR(x))) /*@}*/ /*
--- a/hal/device/device/MK64F12/MK64F12_smc.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_smc.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -142,8 +149,8 @@ #define HW_SMC_PMPROT_ADDR(x) ((x) + 0x0U) #define HW_SMC_PMPROT(x) (*(__IO hw_smc_pmprot_t *) HW_SMC_PMPROT_ADDR(x)) -#define HW_SMC_PMPROT_RD(x) (HW_SMC_PMPROT(x).U) -#define HW_SMC_PMPROT_WR(x, v) (HW_SMC_PMPROT(x).U = (v)) +#define HW_SMC_PMPROT_RD(x) (ADDRESS_READ(hw_smc_pmprot_t, HW_SMC_PMPROT_ADDR(x))) +#define HW_SMC_PMPROT_WR(x, v) (ADDRESS_WRITE(hw_smc_pmprot_t, HW_SMC_PMPROT_ADDR(x), v)) #define HW_SMC_PMPROT_SET(x, v) (HW_SMC_PMPROT_WR(x, HW_SMC_PMPROT_RD(x) | (v))) #define HW_SMC_PMPROT_CLR(x, v) (HW_SMC_PMPROT_WR(x, HW_SMC_PMPROT_RD(x) & ~(v))) #define HW_SMC_PMPROT_TOG(x, v) (HW_SMC_PMPROT_WR(x, HW_SMC_PMPROT_RD(x) ^ (v))) @@ -169,13 +176,13 @@ #define BS_SMC_PMPROT_AVLLS (1U) /*!< Bit field size in bits for SMC_PMPROT_AVLLS. */ /*! @brief Read current value of the SMC_PMPROT_AVLLS field. */ -#define BR_SMC_PMPROT_AVLLS(x) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLLS)) +#define BR_SMC_PMPROT_AVLLS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLLS))) /*! @brief Format value for bitfield SMC_PMPROT_AVLLS. */ #define BF_SMC_PMPROT_AVLLS(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMPROT_AVLLS) & BM_SMC_PMPROT_AVLLS) /*! @brief Set the AVLLS field to a new value. */ -#define BW_SMC_PMPROT_AVLLS(x, v) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLLS) = (v)) +#define BW_SMC_PMPROT_AVLLS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLLS), v)) /*@}*/ /*! @@ -194,13 +201,13 @@ #define BS_SMC_PMPROT_ALLS (1U) /*!< Bit field size in bits for SMC_PMPROT_ALLS. */ /*! @brief Read current value of the SMC_PMPROT_ALLS field. */ -#define BR_SMC_PMPROT_ALLS(x) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_ALLS)) +#define BR_SMC_PMPROT_ALLS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_ALLS))) /*! @brief Format value for bitfield SMC_PMPROT_ALLS. */ #define BF_SMC_PMPROT_ALLS(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMPROT_ALLS) & BM_SMC_PMPROT_ALLS) /*! @brief Set the ALLS field to a new value. */ -#define BW_SMC_PMPROT_ALLS(x, v) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_ALLS) = (v)) +#define BW_SMC_PMPROT_ALLS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_ALLS), v)) /*@}*/ /*! @@ -219,13 +226,13 @@ #define BS_SMC_PMPROT_AVLP (1U) /*!< Bit field size in bits for SMC_PMPROT_AVLP. */ /*! @brief Read current value of the SMC_PMPROT_AVLP field. */ -#define BR_SMC_PMPROT_AVLP(x) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLP)) +#define BR_SMC_PMPROT_AVLP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLP))) /*! @brief Format value for bitfield SMC_PMPROT_AVLP. */ #define BF_SMC_PMPROT_AVLP(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMPROT_AVLP) & BM_SMC_PMPROT_AVLP) /*! @brief Set the AVLP field to a new value. */ -#define BW_SMC_PMPROT_AVLP(x, v) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLP) = (v)) +#define BW_SMC_PMPROT_AVLP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLP), v)) /*@}*/ /******************************************************************************* @@ -264,8 +271,8 @@ #define HW_SMC_PMCTRL_ADDR(x) ((x) + 0x1U) #define HW_SMC_PMCTRL(x) (*(__IO hw_smc_pmctrl_t *) HW_SMC_PMCTRL_ADDR(x)) -#define HW_SMC_PMCTRL_RD(x) (HW_SMC_PMCTRL(x).U) -#define HW_SMC_PMCTRL_WR(x, v) (HW_SMC_PMCTRL(x).U = (v)) +#define HW_SMC_PMCTRL_RD(x) (ADDRESS_READ(hw_smc_pmctrl_t, HW_SMC_PMCTRL_ADDR(x))) +#define HW_SMC_PMCTRL_WR(x, v) (ADDRESS_WRITE(hw_smc_pmctrl_t, HW_SMC_PMCTRL_ADDR(x), v)) #define HW_SMC_PMCTRL_SET(x, v) (HW_SMC_PMCTRL_WR(x, HW_SMC_PMCTRL_RD(x) | (v))) #define HW_SMC_PMCTRL_CLR(x, v) (HW_SMC_PMCTRL_WR(x, HW_SMC_PMCTRL_RD(x) & ~(v))) #define HW_SMC_PMCTRL_TOG(x, v) (HW_SMC_PMCTRL_WR(x, HW_SMC_PMCTRL_RD(x) ^ (v))) @@ -302,7 +309,7 @@ #define BS_SMC_PMCTRL_STOPM (3U) /*!< Bit field size in bits for SMC_PMCTRL_STOPM. */ /*! @brief Read current value of the SMC_PMCTRL_STOPM field. */ -#define BR_SMC_PMCTRL_STOPM(x) (HW_SMC_PMCTRL(x).B.STOPM) +#define BR_SMC_PMCTRL_STOPM(x) (UNION_READ(hw_smc_pmctrl_t, HW_SMC_PMCTRL_ADDR(x), U, B.STOPM)) /*! @brief Format value for bitfield SMC_PMCTRL_STOPM. */ #define BF_SMC_PMCTRL_STOPM(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMCTRL_STOPM) & BM_SMC_PMCTRL_STOPM) @@ -329,7 +336,7 @@ #define BS_SMC_PMCTRL_STOPA (1U) /*!< Bit field size in bits for SMC_PMCTRL_STOPA. */ /*! @brief Read current value of the SMC_PMCTRL_STOPA field. */ -#define BR_SMC_PMCTRL_STOPA(x) (BITBAND_ACCESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_STOPA)) +#define BR_SMC_PMCTRL_STOPA(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_STOPA))) /*@}*/ /*! @@ -352,7 +359,7 @@ #define BS_SMC_PMCTRL_RUNM (2U) /*!< Bit field size in bits for SMC_PMCTRL_RUNM. */ /*! @brief Read current value of the SMC_PMCTRL_RUNM field. */ -#define BR_SMC_PMCTRL_RUNM(x) (HW_SMC_PMCTRL(x).B.RUNM) +#define BR_SMC_PMCTRL_RUNM(x) (UNION_READ(hw_smc_pmctrl_t, HW_SMC_PMCTRL_ADDR(x), U, B.RUNM)) /*! @brief Format value for bitfield SMC_PMCTRL_RUNM. */ #define BF_SMC_PMCTRL_RUNM(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMCTRL_RUNM) & BM_SMC_PMCTRL_RUNM) @@ -380,13 +387,13 @@ #define BS_SMC_PMCTRL_LPWUI (1U) /*!< Bit field size in bits for SMC_PMCTRL_LPWUI. */ /*! @brief Read current value of the SMC_PMCTRL_LPWUI field. */ -#define BR_SMC_PMCTRL_LPWUI(x) (BITBAND_ACCESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_LPWUI)) +#define BR_SMC_PMCTRL_LPWUI(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_LPWUI))) /*! @brief Format value for bitfield SMC_PMCTRL_LPWUI. */ #define BF_SMC_PMCTRL_LPWUI(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMCTRL_LPWUI) & BM_SMC_PMCTRL_LPWUI) /*! @brief Set the LPWUI field to a new value. */ -#define BW_SMC_PMCTRL_LPWUI(x, v) (BITBAND_ACCESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_LPWUI) = (v)) +#define BW_SMC_PMCTRL_LPWUI(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_LPWUI), v)) /*@}*/ /******************************************************************************* @@ -422,8 +429,8 @@ #define HW_SMC_VLLSCTRL_ADDR(x) ((x) + 0x2U) #define HW_SMC_VLLSCTRL(x) (*(__IO hw_smc_vllsctrl_t *) HW_SMC_VLLSCTRL_ADDR(x)) -#define HW_SMC_VLLSCTRL_RD(x) (HW_SMC_VLLSCTRL(x).U) -#define HW_SMC_VLLSCTRL_WR(x, v) (HW_SMC_VLLSCTRL(x).U = (v)) +#define HW_SMC_VLLSCTRL_RD(x) (ADDRESS_READ(hw_smc_vllsctrl_t, HW_SMC_VLLSCTRL_ADDR(x))) +#define HW_SMC_VLLSCTRL_WR(x, v) (ADDRESS_WRITE(hw_smc_vllsctrl_t, HW_SMC_VLLSCTRL_ADDR(x), v)) #define HW_SMC_VLLSCTRL_SET(x, v) (HW_SMC_VLLSCTRL_WR(x, HW_SMC_VLLSCTRL_RD(x) | (v))) #define HW_SMC_VLLSCTRL_CLR(x, v) (HW_SMC_VLLSCTRL_WR(x, HW_SMC_VLLSCTRL_RD(x) & ~(v))) #define HW_SMC_VLLSCTRL_TOG(x, v) (HW_SMC_VLLSCTRL_WR(x, HW_SMC_VLLSCTRL_RD(x) ^ (v))) @@ -454,7 +461,7 @@ #define BS_SMC_VLLSCTRL_VLLSM (3U) /*!< Bit field size in bits for SMC_VLLSCTRL_VLLSM. */ /*! @brief Read current value of the SMC_VLLSCTRL_VLLSM field. */ -#define BR_SMC_VLLSCTRL_VLLSM(x) (HW_SMC_VLLSCTRL(x).B.VLLSM) +#define BR_SMC_VLLSCTRL_VLLSM(x) (UNION_READ(hw_smc_vllsctrl_t, HW_SMC_VLLSCTRL_ADDR(x), U, B.VLLSM)) /*! @brief Format value for bitfield SMC_VLLSCTRL_VLLSM. */ #define BF_SMC_VLLSCTRL_VLLSM(v) ((uint8_t)((uint8_t)(v) << BP_SMC_VLLSCTRL_VLLSM) & BM_SMC_VLLSCTRL_VLLSM) @@ -479,13 +486,13 @@ #define BS_SMC_VLLSCTRL_PORPO (1U) /*!< Bit field size in bits for SMC_VLLSCTRL_PORPO. */ /*! @brief Read current value of the SMC_VLLSCTRL_PORPO field. */ -#define BR_SMC_VLLSCTRL_PORPO(x) (BITBAND_ACCESS8(HW_SMC_VLLSCTRL_ADDR(x), BP_SMC_VLLSCTRL_PORPO)) +#define BR_SMC_VLLSCTRL_PORPO(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_VLLSCTRL_ADDR(x), BP_SMC_VLLSCTRL_PORPO))) /*! @brief Format value for bitfield SMC_VLLSCTRL_PORPO. */ #define BF_SMC_VLLSCTRL_PORPO(v) ((uint8_t)((uint8_t)(v) << BP_SMC_VLLSCTRL_PORPO) & BM_SMC_VLLSCTRL_PORPO) /*! @brief Set the PORPO field to a new value. */ -#define BW_SMC_VLLSCTRL_PORPO(x, v) (BITBAND_ACCESS8(HW_SMC_VLLSCTRL_ADDR(x), BP_SMC_VLLSCTRL_PORPO) = (v)) +#define BW_SMC_VLLSCTRL_PORPO(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_VLLSCTRL_ADDR(x), BP_SMC_VLLSCTRL_PORPO), v)) /*@}*/ /******************************************************************************* @@ -519,7 +526,7 @@ #define HW_SMC_PMSTAT_ADDR(x) ((x) + 0x3U) #define HW_SMC_PMSTAT(x) (*(__I hw_smc_pmstat_t *) HW_SMC_PMSTAT_ADDR(x)) -#define HW_SMC_PMSTAT_RD(x) (HW_SMC_PMSTAT(x).U) +#define HW_SMC_PMSTAT_RD(x) (ADDRESS_READ(hw_smc_pmstat_t, HW_SMC_PMSTAT_ADDR(x))) /*@}*/ /* @@ -537,7 +544,7 @@ #define BS_SMC_PMSTAT_PMSTAT (7U) /*!< Bit field size in bits for SMC_PMSTAT_PMSTAT. */ /*! @brief Read current value of the SMC_PMSTAT_PMSTAT field. */ -#define BR_SMC_PMSTAT_PMSTAT(x) (HW_SMC_PMSTAT(x).B.PMSTAT) +#define BR_SMC_PMSTAT_PMSTAT(x) (UNION_READ(hw_smc_pmstat_t, HW_SMC_PMSTAT_ADDR(x), U, B.PMSTAT)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_spi.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_spi.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -157,8 +164,8 @@ #define HW_SPI_MCR_ADDR(x) ((x) + 0x0U) #define HW_SPI_MCR(x) (*(__IO hw_spi_mcr_t *) HW_SPI_MCR_ADDR(x)) -#define HW_SPI_MCR_RD(x) (HW_SPI_MCR(x).U) -#define HW_SPI_MCR_WR(x, v) (HW_SPI_MCR(x).U = (v)) +#define HW_SPI_MCR_RD(x) (ADDRESS_READ(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x))) +#define HW_SPI_MCR_WR(x, v) (ADDRESS_WRITE(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x), v)) #define HW_SPI_MCR_SET(x, v) (HW_SPI_MCR_WR(x, HW_SPI_MCR_RD(x) | (v))) #define HW_SPI_MCR_CLR(x, v) (HW_SPI_MCR_WR(x, HW_SPI_MCR_RD(x) & ~(v))) #define HW_SPI_MCR_TOG(x, v) (HW_SPI_MCR_WR(x, HW_SPI_MCR_RD(x) ^ (v))) @@ -184,13 +191,13 @@ #define BS_SPI_MCR_HALT (1U) /*!< Bit field size in bits for SPI_MCR_HALT. */ /*! @brief Read current value of the SPI_MCR_HALT field. */ -#define BR_SPI_MCR_HALT(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_HALT)) +#define BR_SPI_MCR_HALT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_HALT))) /*! @brief Format value for bitfield SPI_MCR_HALT. */ #define BF_SPI_MCR_HALT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_HALT) & BM_SPI_MCR_HALT) /*! @brief Set the HALT field to a new value. */ -#define BW_SPI_MCR_HALT(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_HALT) = (v)) +#define BW_SPI_MCR_HALT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_HALT), v)) /*@}*/ /*! @@ -211,7 +218,7 @@ #define BS_SPI_MCR_SMPL_PT (2U) /*!< Bit field size in bits for SPI_MCR_SMPL_PT. */ /*! @brief Read current value of the SPI_MCR_SMPL_PT field. */ -#define BR_SPI_MCR_SMPL_PT(x) (HW_SPI_MCR(x).B.SMPL_PT) +#define BR_SPI_MCR_SMPL_PT(x) (UNION_READ(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x), U, B.SMPL_PT)) /*! @brief Format value for bitfield SPI_MCR_SMPL_PT. */ #define BF_SPI_MCR_SMPL_PT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_SMPL_PT) & BM_SPI_MCR_SMPL_PT) @@ -239,7 +246,7 @@ #define BF_SPI_MCR_CLR_RXF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_CLR_RXF) & BM_SPI_MCR_CLR_RXF) /*! @brief Set the CLR_RXF field to a new value. */ -#define BW_SPI_MCR_CLR_RXF(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CLR_RXF) = (v)) +#define BW_SPI_MCR_CLR_RXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CLR_RXF), v)) /*@}*/ /*! @@ -261,7 +268,7 @@ #define BF_SPI_MCR_CLR_TXF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_CLR_TXF) & BM_SPI_MCR_CLR_TXF) /*! @brief Set the CLR_TXF field to a new value. */ -#define BW_SPI_MCR_CLR_TXF(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CLR_TXF) = (v)) +#define BW_SPI_MCR_CLR_TXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CLR_TXF), v)) /*@}*/ /*! @@ -281,13 +288,13 @@ #define BS_SPI_MCR_DIS_RXF (1U) /*!< Bit field size in bits for SPI_MCR_DIS_RXF. */ /*! @brief Read current value of the SPI_MCR_DIS_RXF field. */ -#define BR_SPI_MCR_DIS_RXF(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_RXF)) +#define BR_SPI_MCR_DIS_RXF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_RXF))) /*! @brief Format value for bitfield SPI_MCR_DIS_RXF. */ #define BF_SPI_MCR_DIS_RXF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_DIS_RXF) & BM_SPI_MCR_DIS_RXF) /*! @brief Set the DIS_RXF field to a new value. */ -#define BW_SPI_MCR_DIS_RXF(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_RXF) = (v)) +#define BW_SPI_MCR_DIS_RXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_RXF), v)) /*@}*/ /*! @@ -307,13 +314,13 @@ #define BS_SPI_MCR_DIS_TXF (1U) /*!< Bit field size in bits for SPI_MCR_DIS_TXF. */ /*! @brief Read current value of the SPI_MCR_DIS_TXF field. */ -#define BR_SPI_MCR_DIS_TXF(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_TXF)) +#define BR_SPI_MCR_DIS_TXF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_TXF))) /*! @brief Format value for bitfield SPI_MCR_DIS_TXF. */ #define BF_SPI_MCR_DIS_TXF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_DIS_TXF) & BM_SPI_MCR_DIS_TXF) /*! @brief Set the DIS_TXF field to a new value. */ -#define BW_SPI_MCR_DIS_TXF(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_TXF) = (v)) +#define BW_SPI_MCR_DIS_TXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_TXF), v)) /*@}*/ /*! @@ -335,13 +342,13 @@ #define BS_SPI_MCR_MDIS (1U) /*!< Bit field size in bits for SPI_MCR_MDIS. */ /*! @brief Read current value of the SPI_MCR_MDIS field. */ -#define BR_SPI_MCR_MDIS(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MDIS)) +#define BR_SPI_MCR_MDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MDIS))) /*! @brief Format value for bitfield SPI_MCR_MDIS. */ #define BF_SPI_MCR_MDIS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_MDIS) & BM_SPI_MCR_MDIS) /*! @brief Set the MDIS field to a new value. */ -#define BW_SPI_MCR_MDIS(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MDIS) = (v)) +#define BW_SPI_MCR_MDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MDIS), v)) /*@}*/ /*! @@ -360,13 +367,13 @@ #define BS_SPI_MCR_DOZE (1U) /*!< Bit field size in bits for SPI_MCR_DOZE. */ /*! @brief Read current value of the SPI_MCR_DOZE field. */ -#define BR_SPI_MCR_DOZE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DOZE)) +#define BR_SPI_MCR_DOZE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DOZE))) /*! @brief Format value for bitfield SPI_MCR_DOZE. */ #define BF_SPI_MCR_DOZE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_DOZE) & BM_SPI_MCR_DOZE) /*! @brief Set the DOZE field to a new value. */ -#define BW_SPI_MCR_DOZE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DOZE) = (v)) +#define BW_SPI_MCR_DOZE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DOZE), v)) /*@}*/ /*! @@ -384,7 +391,7 @@ #define BS_SPI_MCR_PCSIS (6U) /*!< Bit field size in bits for SPI_MCR_PCSIS. */ /*! @brief Read current value of the SPI_MCR_PCSIS field. */ -#define BR_SPI_MCR_PCSIS(x) (HW_SPI_MCR(x).B.PCSIS) +#define BR_SPI_MCR_PCSIS(x) (UNION_READ(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x), U, B.PCSIS)) /*! @brief Format value for bitfield SPI_MCR_PCSIS. */ #define BF_SPI_MCR_PCSIS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_PCSIS) & BM_SPI_MCR_PCSIS) @@ -411,13 +418,13 @@ #define BS_SPI_MCR_ROOE (1U) /*!< Bit field size in bits for SPI_MCR_ROOE. */ /*! @brief Read current value of the SPI_MCR_ROOE field. */ -#define BR_SPI_MCR_ROOE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_ROOE)) +#define BR_SPI_MCR_ROOE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_ROOE))) /*! @brief Format value for bitfield SPI_MCR_ROOE. */ #define BF_SPI_MCR_ROOE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_ROOE) & BM_SPI_MCR_ROOE) /*! @brief Set the ROOE field to a new value. */ -#define BW_SPI_MCR_ROOE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_ROOE) = (v)) +#define BW_SPI_MCR_ROOE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_ROOE), v)) /*@}*/ /*! @@ -435,13 +442,13 @@ #define BS_SPI_MCR_PCSSE (1U) /*!< Bit field size in bits for SPI_MCR_PCSSE. */ /*! @brief Read current value of the SPI_MCR_PCSSE field. */ -#define BR_SPI_MCR_PCSSE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_PCSSE)) +#define BR_SPI_MCR_PCSSE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_PCSSE))) /*! @brief Format value for bitfield SPI_MCR_PCSSE. */ #define BF_SPI_MCR_PCSSE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_PCSSE) & BM_SPI_MCR_PCSSE) /*! @brief Set the PCSSE field to a new value. */ -#define BW_SPI_MCR_PCSSE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_PCSSE) = (v)) +#define BW_SPI_MCR_PCSSE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_PCSSE), v)) /*@}*/ /*! @@ -459,13 +466,13 @@ #define BS_SPI_MCR_MTFE (1U) /*!< Bit field size in bits for SPI_MCR_MTFE. */ /*! @brief Read current value of the SPI_MCR_MTFE field. */ -#define BR_SPI_MCR_MTFE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MTFE)) +#define BR_SPI_MCR_MTFE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MTFE))) /*! @brief Format value for bitfield SPI_MCR_MTFE. */ #define BF_SPI_MCR_MTFE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_MTFE) & BM_SPI_MCR_MTFE) /*! @brief Set the MTFE field to a new value. */ -#define BW_SPI_MCR_MTFE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MTFE) = (v)) +#define BW_SPI_MCR_MTFE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MTFE), v)) /*@}*/ /*! @@ -484,13 +491,13 @@ #define BS_SPI_MCR_FRZ (1U) /*!< Bit field size in bits for SPI_MCR_FRZ. */ /*! @brief Read current value of the SPI_MCR_FRZ field. */ -#define BR_SPI_MCR_FRZ(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_FRZ)) +#define BR_SPI_MCR_FRZ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_FRZ))) /*! @brief Format value for bitfield SPI_MCR_FRZ. */ #define BF_SPI_MCR_FRZ(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_FRZ) & BM_SPI_MCR_FRZ) /*! @brief Set the FRZ field to a new value. */ -#define BW_SPI_MCR_FRZ(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_FRZ) = (v)) +#define BW_SPI_MCR_FRZ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_FRZ), v)) /*@}*/ /*! @@ -510,7 +517,7 @@ #define BS_SPI_MCR_DCONF (2U) /*!< Bit field size in bits for SPI_MCR_DCONF. */ /*! @brief Read current value of the SPI_MCR_DCONF field. */ -#define BR_SPI_MCR_DCONF(x) (HW_SPI_MCR(x).B.DCONF) +#define BR_SPI_MCR_DCONF(x) (UNION_READ(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x), U, B.DCONF)) /*@}*/ /*! @@ -528,13 +535,13 @@ #define BS_SPI_MCR_CONT_SCKE (1U) /*!< Bit field size in bits for SPI_MCR_CONT_SCKE. */ /*! @brief Read current value of the SPI_MCR_CONT_SCKE field. */ -#define BR_SPI_MCR_CONT_SCKE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CONT_SCKE)) +#define BR_SPI_MCR_CONT_SCKE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CONT_SCKE))) /*! @brief Format value for bitfield SPI_MCR_CONT_SCKE. */ #define BF_SPI_MCR_CONT_SCKE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_CONT_SCKE) & BM_SPI_MCR_CONT_SCKE) /*! @brief Set the CONT_SCKE field to a new value. */ -#define BW_SPI_MCR_CONT_SCKE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CONT_SCKE) = (v)) +#define BW_SPI_MCR_CONT_SCKE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CONT_SCKE), v)) /*@}*/ /*! @@ -553,13 +560,13 @@ #define BS_SPI_MCR_MSTR (1U) /*!< Bit field size in bits for SPI_MCR_MSTR. */ /*! @brief Read current value of the SPI_MCR_MSTR field. */ -#define BR_SPI_MCR_MSTR(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MSTR)) +#define BR_SPI_MCR_MSTR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MSTR))) /*! @brief Format value for bitfield SPI_MCR_MSTR. */ #define BF_SPI_MCR_MSTR(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_MSTR) & BM_SPI_MCR_MSTR) /*! @brief Set the MSTR field to a new value. */ -#define BW_SPI_MCR_MSTR(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MSTR) = (v)) +#define BW_SPI_MCR_MSTR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MSTR), v)) /*@}*/ /******************************************************************************* @@ -592,8 +599,8 @@ #define HW_SPI_TCR_ADDR(x) ((x) + 0x8U) #define HW_SPI_TCR(x) (*(__IO hw_spi_tcr_t *) HW_SPI_TCR_ADDR(x)) -#define HW_SPI_TCR_RD(x) (HW_SPI_TCR(x).U) -#define HW_SPI_TCR_WR(x, v) (HW_SPI_TCR(x).U = (v)) +#define HW_SPI_TCR_RD(x) (ADDRESS_READ(hw_spi_tcr_t, HW_SPI_TCR_ADDR(x))) +#define HW_SPI_TCR_WR(x, v) (ADDRESS_WRITE(hw_spi_tcr_t, HW_SPI_TCR_ADDR(x), v)) #define HW_SPI_TCR_SET(x, v) (HW_SPI_TCR_WR(x, HW_SPI_TCR_RD(x) | (v))) #define HW_SPI_TCR_CLR(x, v) (HW_SPI_TCR_WR(x, HW_SPI_TCR_RD(x) & ~(v))) #define HW_SPI_TCR_TOG(x, v) (HW_SPI_TCR_WR(x, HW_SPI_TCR_RD(x) ^ (v))) @@ -619,7 +626,7 @@ #define BS_SPI_TCR_SPI_TCNT (16U) /*!< Bit field size in bits for SPI_TCR_SPI_TCNT. */ /*! @brief Read current value of the SPI_TCR_SPI_TCNT field. */ -#define BR_SPI_TCR_SPI_TCNT(x) (HW_SPI_TCR(x).B.SPI_TCNT) +#define BR_SPI_TCR_SPI_TCNT(x) (UNION_READ(hw_spi_tcr_t, HW_SPI_TCR_ADDR(x), U, B.SPI_TCNT)) /*! @brief Format value for bitfield SPI_TCR_SPI_TCNT. */ #define BF_SPI_TCR_SPI_TCNT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_TCR_SPI_TCNT) & BM_SPI_TCR_SPI_TCNT) @@ -677,8 +684,8 @@ #define HW_SPI_CTARn_ADDR(x, n) ((x) + 0xCU + (0x4U * (n))) #define HW_SPI_CTARn(x, n) (*(__IO hw_spi_ctarn_t *) HW_SPI_CTARn_ADDR(x, n)) -#define HW_SPI_CTARn_RD(x, n) (HW_SPI_CTARn(x, n).U) -#define HW_SPI_CTARn_WR(x, n, v) (HW_SPI_CTARn(x, n).U = (v)) +#define HW_SPI_CTARn_RD(x, n) (ADDRESS_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n))) +#define HW_SPI_CTARn_WR(x, n, v) (ADDRESS_WRITE(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), v)) #define HW_SPI_CTARn_SET(x, n, v) (HW_SPI_CTARn_WR(x, n, HW_SPI_CTARn_RD(x, n) | (v))) #define HW_SPI_CTARn_CLR(x, n, v) (HW_SPI_CTARn_WR(x, n, HW_SPI_CTARn_RD(x, n) & ~(v))) #define HW_SPI_CTARn_TOG(x, n, v) (HW_SPI_CTARn_WR(x, n, HW_SPI_CTARn_RD(x, n) ^ (v))) @@ -705,7 +712,7 @@ #define BS_SPI_CTARn_BR (4U) /*!< Bit field size in bits for SPI_CTARn_BR. */ /*! @brief Read current value of the SPI_CTARn_BR field. */ -#define BR_SPI_CTARn_BR(x, n) (HW_SPI_CTARn(x, n).B.BR) +#define BR_SPI_CTARn_BR(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.BR)) /*! @brief Format value for bitfield SPI_CTARn_BR. */ #define BF_SPI_CTARn_BR(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_BR) & BM_SPI_CTARn_BR) @@ -732,7 +739,7 @@ #define BS_SPI_CTARn_DT (4U) /*!< Bit field size in bits for SPI_CTARn_DT. */ /*! @brief Read current value of the SPI_CTARn_DT field. */ -#define BR_SPI_CTARn_DT(x, n) (HW_SPI_CTARn(x, n).B.DT) +#define BR_SPI_CTARn_DT(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.DT)) /*! @brief Format value for bitfield SPI_CTARn_DT. */ #define BF_SPI_CTARn_DT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_DT) & BM_SPI_CTARn_DT) @@ -757,7 +764,7 @@ #define BS_SPI_CTARn_ASC (4U) /*!< Bit field size in bits for SPI_CTARn_ASC. */ /*! @brief Read current value of the SPI_CTARn_ASC field. */ -#define BR_SPI_CTARn_ASC(x, n) (HW_SPI_CTARn(x, n).B.ASC) +#define BR_SPI_CTARn_ASC(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.ASC)) /*! @brief Format value for bitfield SPI_CTARn_ASC. */ #define BF_SPI_CTARn_ASC(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_ASC) & BM_SPI_CTARn_ASC) @@ -785,7 +792,7 @@ #define BS_SPI_CTARn_CSSCK (4U) /*!< Bit field size in bits for SPI_CTARn_CSSCK. */ /*! @brief Read current value of the SPI_CTARn_CSSCK field. */ -#define BR_SPI_CTARn_CSSCK(x, n) (HW_SPI_CTARn(x, n).B.CSSCK) +#define BR_SPI_CTARn_CSSCK(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.CSSCK)) /*! @brief Format value for bitfield SPI_CTARn_CSSCK. */ #define BF_SPI_CTARn_CSSCK(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_CSSCK) & BM_SPI_CTARn_CSSCK) @@ -814,7 +821,7 @@ #define BS_SPI_CTARn_PBR (2U) /*!< Bit field size in bits for SPI_CTARn_PBR. */ /*! @brief Read current value of the SPI_CTARn_PBR field. */ -#define BR_SPI_CTARn_PBR(x, n) (HW_SPI_CTARn(x, n).B.PBR) +#define BR_SPI_CTARn_PBR(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.PBR)) /*! @brief Format value for bitfield SPI_CTARn_PBR. */ #define BF_SPI_CTARn_PBR(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_PBR) & BM_SPI_CTARn_PBR) @@ -844,7 +851,7 @@ #define BS_SPI_CTARn_PDT (2U) /*!< Bit field size in bits for SPI_CTARn_PDT. */ /*! @brief Read current value of the SPI_CTARn_PDT field. */ -#define BR_SPI_CTARn_PDT(x, n) (HW_SPI_CTARn(x, n).B.PDT) +#define BR_SPI_CTARn_PDT(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.PDT)) /*! @brief Format value for bitfield SPI_CTARn_PDT. */ #define BF_SPI_CTARn_PDT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_PDT) & BM_SPI_CTARn_PDT) @@ -872,7 +879,7 @@ #define BS_SPI_CTARn_PASC (2U) /*!< Bit field size in bits for SPI_CTARn_PASC. */ /*! @brief Read current value of the SPI_CTARn_PASC field. */ -#define BR_SPI_CTARn_PASC(x, n) (HW_SPI_CTARn(x, n).B.PASC) +#define BR_SPI_CTARn_PASC(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.PASC)) /*! @brief Format value for bitfield SPI_CTARn_PASC. */ #define BF_SPI_CTARn_PASC(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_PASC) & BM_SPI_CTARn_PASC) @@ -900,7 +907,7 @@ #define BS_SPI_CTARn_PCSSCK (2U) /*!< Bit field size in bits for SPI_CTARn_PCSSCK. */ /*! @brief Read current value of the SPI_CTARn_PCSSCK field. */ -#define BR_SPI_CTARn_PCSSCK(x, n) (HW_SPI_CTARn(x, n).B.PCSSCK) +#define BR_SPI_CTARn_PCSSCK(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.PCSSCK)) /*! @brief Format value for bitfield SPI_CTARn_PCSSCK. */ #define BF_SPI_CTARn_PCSSCK(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_PCSSCK) & BM_SPI_CTARn_PCSSCK) @@ -924,13 +931,13 @@ #define BS_SPI_CTARn_LSBFE (1U) /*!< Bit field size in bits for SPI_CTARn_LSBFE. */ /*! @brief Read current value of the SPI_CTARn_LSBFE field. */ -#define BR_SPI_CTARn_LSBFE(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_LSBFE)) +#define BR_SPI_CTARn_LSBFE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_LSBFE))) /*! @brief Format value for bitfield SPI_CTARn_LSBFE. */ #define BF_SPI_CTARn_LSBFE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_LSBFE) & BM_SPI_CTARn_LSBFE) /*! @brief Set the LSBFE field to a new value. */ -#define BW_SPI_CTARn_LSBFE(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_LSBFE) = (v)) +#define BW_SPI_CTARn_LSBFE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_LSBFE), v)) /*@}*/ /*! @@ -954,13 +961,13 @@ #define BS_SPI_CTARn_CPHA (1U) /*!< Bit field size in bits for SPI_CTARn_CPHA. */ /*! @brief Read current value of the SPI_CTARn_CPHA field. */ -#define BR_SPI_CTARn_CPHA(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPHA)) +#define BR_SPI_CTARn_CPHA(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPHA))) /*! @brief Format value for bitfield SPI_CTARn_CPHA. */ #define BF_SPI_CTARn_CPHA(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_CPHA) & BM_SPI_CTARn_CPHA) /*! @brief Set the CPHA field to a new value. */ -#define BW_SPI_CTARn_CPHA(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPHA) = (v)) +#define BW_SPI_CTARn_CPHA(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPHA), v)) /*@}*/ /*! @@ -985,13 +992,13 @@ #define BS_SPI_CTARn_CPOL (1U) /*!< Bit field size in bits for SPI_CTARn_CPOL. */ /*! @brief Read current value of the SPI_CTARn_CPOL field. */ -#define BR_SPI_CTARn_CPOL(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPOL)) +#define BR_SPI_CTARn_CPOL(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPOL))) /*! @brief Format value for bitfield SPI_CTARn_CPOL. */ #define BF_SPI_CTARn_CPOL(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_CPOL) & BM_SPI_CTARn_CPOL) /*! @brief Set the CPOL field to a new value. */ -#define BW_SPI_CTARn_CPOL(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPOL) = (v)) +#define BW_SPI_CTARn_CPOL(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPOL), v)) /*@}*/ /*! @@ -1006,7 +1013,7 @@ #define BS_SPI_CTARn_FMSZ (4U) /*!< Bit field size in bits for SPI_CTARn_FMSZ. */ /*! @brief Read current value of the SPI_CTARn_FMSZ field. */ -#define BR_SPI_CTARn_FMSZ(x, n) (HW_SPI_CTARn(x, n).B.FMSZ) +#define BR_SPI_CTARn_FMSZ(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.FMSZ)) /*! @brief Format value for bitfield SPI_CTARn_FMSZ. */ #define BF_SPI_CTARn_FMSZ(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_FMSZ) & BM_SPI_CTARn_FMSZ) @@ -1039,13 +1046,13 @@ #define BS_SPI_CTARn_DBR (1U) /*!< Bit field size in bits for SPI_CTARn_DBR. */ /*! @brief Read current value of the SPI_CTARn_DBR field. */ -#define BR_SPI_CTARn_DBR(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_DBR)) +#define BR_SPI_CTARn_DBR(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_DBR))) /*! @brief Format value for bitfield SPI_CTARn_DBR. */ #define BF_SPI_CTARn_DBR(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_DBR) & BM_SPI_CTARn_DBR) /*! @brief Set the DBR field to a new value. */ -#define BW_SPI_CTARn_DBR(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_DBR) = (v)) +#define BW_SPI_CTARn_DBR(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_DBR), v)) /*@}*/ /******************************************************************************* * HW_SPI_CTARn_SLAVE - Clock and Transfer Attributes Register (In Slave Mode) @@ -1079,8 +1086,8 @@ #define HW_SPI_CTARn_SLAVE_ADDR(x, n) ((x) + 0xCU + (0x4U * (n))) #define HW_SPI_CTARn_SLAVE(x, n) (*(__IO hw_spi_ctarn_slave_t *) HW_SPI_CTARn_SLAVE_ADDR(x, n)) -#define HW_SPI_CTARn_SLAVE_RD(x, n) (HW_SPI_CTARn_SLAVE(x, n).U) -#define HW_SPI_CTARn_SLAVE_WR(x, n, v) (HW_SPI_CTARn_SLAVE(x, n).U = (v)) +#define HW_SPI_CTARn_SLAVE_RD(x, n) (ADDRESS_READ(hw_spi_ctarn_slave_t, HW_SPI_CTARn_SLAVE_ADDR(x, n))) +#define HW_SPI_CTARn_SLAVE_WR(x, n, v) (ADDRESS_WRITE(hw_spi_ctarn_slave_t, HW_SPI_CTARn_SLAVE_ADDR(x, n), v)) #define HW_SPI_CTARn_SLAVE_SET(x, n, v) (HW_SPI_CTARn_SLAVE_WR(x, n, HW_SPI_CTARn_SLAVE_RD(x, n) | (v))) #define HW_SPI_CTARn_SLAVE_CLR(x, n, v) (HW_SPI_CTARn_SLAVE_WR(x, n, HW_SPI_CTARn_SLAVE_RD(x, n) & ~(v))) #define HW_SPI_CTARn_SLAVE_TOG(x, n, v) (HW_SPI_CTARn_SLAVE_WR(x, n, HW_SPI_CTARn_SLAVE_RD(x, n) ^ (v))) @@ -1111,13 +1118,13 @@ #define BS_SPI_CTARn_SLAVE_CPHA (1U) /*!< Bit field size in bits for SPI_CTARn_SLAVE_CPHA. */ /*! @brief Read current value of the SPI_CTARn_SLAVE_CPHA field. */ -#define BR_SPI_CTARn_SLAVE_CPHA(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPHA)) +#define BR_SPI_CTARn_SLAVE_CPHA(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPHA))) /*! @brief Format value for bitfield SPI_CTARn_SLAVE_CPHA. */ #define BF_SPI_CTARn_SLAVE_CPHA(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_SLAVE_CPHA) & BM_SPI_CTARn_SLAVE_CPHA) /*! @brief Set the CPHA field to a new value. */ -#define BW_SPI_CTARn_SLAVE_CPHA(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPHA) = (v)) +#define BW_SPI_CTARn_SLAVE_CPHA(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPHA), v)) /*@}*/ /*! @@ -1137,13 +1144,13 @@ #define BS_SPI_CTARn_SLAVE_CPOL (1U) /*!< Bit field size in bits for SPI_CTARn_SLAVE_CPOL. */ /*! @brief Read current value of the SPI_CTARn_SLAVE_CPOL field. */ -#define BR_SPI_CTARn_SLAVE_CPOL(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPOL)) +#define BR_SPI_CTARn_SLAVE_CPOL(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPOL))) /*! @brief Format value for bitfield SPI_CTARn_SLAVE_CPOL. */ #define BF_SPI_CTARn_SLAVE_CPOL(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_SLAVE_CPOL) & BM_SPI_CTARn_SLAVE_CPOL) /*! @brief Set the CPOL field to a new value. */ -#define BW_SPI_CTARn_SLAVE_CPOL(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPOL) = (v)) +#define BW_SPI_CTARn_SLAVE_CPOL(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPOL), v)) /*@}*/ /*! @@ -1158,7 +1165,7 @@ #define BS_SPI_CTARn_SLAVE_FMSZ (5U) /*!< Bit field size in bits for SPI_CTARn_SLAVE_FMSZ. */ /*! @brief Read current value of the SPI_CTARn_SLAVE_FMSZ field. */ -#define BR_SPI_CTARn_SLAVE_FMSZ(x, n) (HW_SPI_CTARn_SLAVE(x, n).B.FMSZ) +#define BR_SPI_CTARn_SLAVE_FMSZ(x, n) (UNION_READ(hw_spi_ctarn_slave_t, HW_SPI_CTARn_SLAVE_ADDR(x, n), U, B.FMSZ)) /*! @brief Format value for bitfield SPI_CTARn_SLAVE_FMSZ. */ #define BF_SPI_CTARn_SLAVE_FMSZ(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_SLAVE_FMSZ) & BM_SPI_CTARn_SLAVE_FMSZ) @@ -1213,8 +1220,8 @@ #define HW_SPI_SR_ADDR(x) ((x) + 0x2CU) #define HW_SPI_SR(x) (*(__IO hw_spi_sr_t *) HW_SPI_SR_ADDR(x)) -#define HW_SPI_SR_RD(x) (HW_SPI_SR(x).U) -#define HW_SPI_SR_WR(x, v) (HW_SPI_SR(x).U = (v)) +#define HW_SPI_SR_RD(x) (ADDRESS_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x))) +#define HW_SPI_SR_WR(x, v) (ADDRESS_WRITE(hw_spi_sr_t, HW_SPI_SR_ADDR(x), v)) #define HW_SPI_SR_SET(x, v) (HW_SPI_SR_WR(x, HW_SPI_SR_RD(x) | (v))) #define HW_SPI_SR_CLR(x, v) (HW_SPI_SR_WR(x, HW_SPI_SR_RD(x) & ~(v))) #define HW_SPI_SR_TOG(x, v) (HW_SPI_SR_WR(x, HW_SPI_SR_RD(x) ^ (v))) @@ -1236,7 +1243,7 @@ #define BS_SPI_SR_POPNXTPTR (4U) /*!< Bit field size in bits for SPI_SR_POPNXTPTR. */ /*! @brief Read current value of the SPI_SR_POPNXTPTR field. */ -#define BR_SPI_SR_POPNXTPTR(x) (HW_SPI_SR(x).B.POPNXTPTR) +#define BR_SPI_SR_POPNXTPTR(x) (UNION_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x), U, B.POPNXTPTR)) /*@}*/ /*! @@ -1252,7 +1259,7 @@ #define BS_SPI_SR_RXCTR (4U) /*!< Bit field size in bits for SPI_SR_RXCTR. */ /*! @brief Read current value of the SPI_SR_RXCTR field. */ -#define BR_SPI_SR_RXCTR(x) (HW_SPI_SR(x).B.RXCTR) +#define BR_SPI_SR_RXCTR(x) (UNION_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x), U, B.RXCTR)) /*@}*/ /*! @@ -1268,7 +1275,7 @@ #define BS_SPI_SR_TXNXTPTR (4U) /*!< Bit field size in bits for SPI_SR_TXNXTPTR. */ /*! @brief Read current value of the SPI_SR_TXNXTPTR field. */ -#define BR_SPI_SR_TXNXTPTR(x) (HW_SPI_SR(x).B.TXNXTPTR) +#define BR_SPI_SR_TXNXTPTR(x) (UNION_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x), U, B.TXNXTPTR)) /*@}*/ /*! @@ -1284,7 +1291,7 @@ #define BS_SPI_SR_TXCTR (4U) /*!< Bit field size in bits for SPI_SR_TXCTR. */ /*! @brief Read current value of the SPI_SR_TXCTR field. */ -#define BR_SPI_SR_TXCTR(x) (HW_SPI_SR(x).B.TXCTR) +#define BR_SPI_SR_TXCTR(x) (UNION_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x), U, B.TXCTR)) /*@}*/ /*! @@ -1305,13 +1312,13 @@ #define BS_SPI_SR_RFDF (1U) /*!< Bit field size in bits for SPI_SR_RFDF. */ /*! @brief Read current value of the SPI_SR_RFDF field. */ -#define BR_SPI_SR_RFDF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFDF)) +#define BR_SPI_SR_RFDF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFDF))) /*! @brief Format value for bitfield SPI_SR_RFDF. */ #define BF_SPI_SR_RFDF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_RFDF) & BM_SPI_SR_RFDF) /*! @brief Set the RFDF field to a new value. */ -#define BW_SPI_SR_RFDF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFDF) = (v)) +#define BW_SPI_SR_RFDF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFDF), v)) /*@}*/ /*! @@ -1331,13 +1338,13 @@ #define BS_SPI_SR_RFOF (1U) /*!< Bit field size in bits for SPI_SR_RFOF. */ /*! @brief Read current value of the SPI_SR_RFOF field. */ -#define BR_SPI_SR_RFOF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFOF)) +#define BR_SPI_SR_RFOF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFOF))) /*! @brief Format value for bitfield SPI_SR_RFOF. */ #define BF_SPI_SR_RFOF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_RFOF) & BM_SPI_SR_RFOF) /*! @brief Set the RFOF field to a new value. */ -#define BW_SPI_SR_RFOF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFOF) = (v)) +#define BW_SPI_SR_RFOF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFOF), v)) /*@}*/ /*! @@ -1358,13 +1365,13 @@ #define BS_SPI_SR_TFFF (1U) /*!< Bit field size in bits for SPI_SR_TFFF. */ /*! @brief Read current value of the SPI_SR_TFFF field. */ -#define BR_SPI_SR_TFFF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFFF)) +#define BR_SPI_SR_TFFF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFFF))) /*! @brief Format value for bitfield SPI_SR_TFFF. */ #define BF_SPI_SR_TFFF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_TFFF) & BM_SPI_SR_TFFF) /*! @brief Set the TFFF field to a new value. */ -#define BW_SPI_SR_TFFF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFFF) = (v)) +#define BW_SPI_SR_TFFF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFFF), v)) /*@}*/ /*! @@ -1386,13 +1393,13 @@ #define BS_SPI_SR_TFUF (1U) /*!< Bit field size in bits for SPI_SR_TFUF. */ /*! @brief Read current value of the SPI_SR_TFUF field. */ -#define BR_SPI_SR_TFUF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFUF)) +#define BR_SPI_SR_TFUF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFUF))) /*! @brief Format value for bitfield SPI_SR_TFUF. */ #define BF_SPI_SR_TFUF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_TFUF) & BM_SPI_SR_TFUF) /*! @brief Set the TFUF field to a new value. */ -#define BW_SPI_SR_TFUF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFUF) = (v)) +#define BW_SPI_SR_TFUF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFUF), v)) /*@}*/ /*! @@ -1414,13 +1421,13 @@ #define BS_SPI_SR_EOQF (1U) /*!< Bit field size in bits for SPI_SR_EOQF. */ /*! @brief Read current value of the SPI_SR_EOQF field. */ -#define BR_SPI_SR_EOQF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_EOQF)) +#define BR_SPI_SR_EOQF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_EOQF))) /*! @brief Format value for bitfield SPI_SR_EOQF. */ #define BF_SPI_SR_EOQF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_EOQF) & BM_SPI_SR_EOQF) /*! @brief Set the EOQF field to a new value. */ -#define BW_SPI_SR_EOQF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_EOQF) = (v)) +#define BW_SPI_SR_EOQF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_EOQF), v)) /*@}*/ /*! @@ -1440,13 +1447,13 @@ #define BS_SPI_SR_TXRXS (1U) /*!< Bit field size in bits for SPI_SR_TXRXS. */ /*! @brief Read current value of the SPI_SR_TXRXS field. */ -#define BR_SPI_SR_TXRXS(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TXRXS)) +#define BR_SPI_SR_TXRXS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TXRXS))) /*! @brief Format value for bitfield SPI_SR_TXRXS. */ #define BF_SPI_SR_TXRXS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_TXRXS) & BM_SPI_SR_TXRXS) /*! @brief Set the TXRXS field to a new value. */ -#define BW_SPI_SR_TXRXS(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TXRXS) = (v)) +#define BW_SPI_SR_TXRXS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TXRXS), v)) /*@}*/ /*! @@ -1465,13 +1472,13 @@ #define BS_SPI_SR_TCF (1U) /*!< Bit field size in bits for SPI_SR_TCF. */ /*! @brief Read current value of the SPI_SR_TCF field. */ -#define BR_SPI_SR_TCF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TCF)) +#define BR_SPI_SR_TCF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TCF))) /*! @brief Format value for bitfield SPI_SR_TCF. */ #define BF_SPI_SR_TCF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_TCF) & BM_SPI_SR_TCF) /*! @brief Set the TCF field to a new value. */ -#define BW_SPI_SR_TCF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TCF) = (v)) +#define BW_SPI_SR_TCF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TCF), v)) /*@}*/ /******************************************************************************* @@ -1518,8 +1525,8 @@ #define HW_SPI_RSER_ADDR(x) ((x) + 0x30U) #define HW_SPI_RSER(x) (*(__IO hw_spi_rser_t *) HW_SPI_RSER_ADDR(x)) -#define HW_SPI_RSER_RD(x) (HW_SPI_RSER(x).U) -#define HW_SPI_RSER_WR(x, v) (HW_SPI_RSER(x).U = (v)) +#define HW_SPI_RSER_RD(x) (ADDRESS_READ(hw_spi_rser_t, HW_SPI_RSER_ADDR(x))) +#define HW_SPI_RSER_WR(x, v) (ADDRESS_WRITE(hw_spi_rser_t, HW_SPI_RSER_ADDR(x), v)) #define HW_SPI_RSER_SET(x, v) (HW_SPI_RSER_WR(x, HW_SPI_RSER_RD(x) | (v))) #define HW_SPI_RSER_CLR(x, v) (HW_SPI_RSER_WR(x, HW_SPI_RSER_RD(x) & ~(v))) #define HW_SPI_RSER_TOG(x, v) (HW_SPI_RSER_WR(x, HW_SPI_RSER_RD(x) ^ (v))) @@ -1546,13 +1553,13 @@ #define BS_SPI_RSER_RFDF_DIRS (1U) /*!< Bit field size in bits for SPI_RSER_RFDF_DIRS. */ /*! @brief Read current value of the SPI_RSER_RFDF_DIRS field. */ -#define BR_SPI_RSER_RFDF_DIRS(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_DIRS)) +#define BR_SPI_RSER_RFDF_DIRS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_DIRS))) /*! @brief Format value for bitfield SPI_RSER_RFDF_DIRS. */ #define BF_SPI_RSER_RFDF_DIRS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_RFDF_DIRS) & BM_SPI_RSER_RFDF_DIRS) /*! @brief Set the RFDF_DIRS field to a new value. */ -#define BW_SPI_RSER_RFDF_DIRS(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_DIRS) = (v)) +#define BW_SPI_RSER_RFDF_DIRS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_DIRS), v)) /*@}*/ /*! @@ -1571,13 +1578,13 @@ #define BS_SPI_RSER_RFDF_RE (1U) /*!< Bit field size in bits for SPI_RSER_RFDF_RE. */ /*! @brief Read current value of the SPI_RSER_RFDF_RE field. */ -#define BR_SPI_RSER_RFDF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_RE)) +#define BR_SPI_RSER_RFDF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_RE))) /*! @brief Format value for bitfield SPI_RSER_RFDF_RE. */ #define BF_SPI_RSER_RFDF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_RFDF_RE) & BM_SPI_RSER_RFDF_RE) /*! @brief Set the RFDF_RE field to a new value. */ -#define BW_SPI_RSER_RFDF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_RE) = (v)) +#define BW_SPI_RSER_RFDF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_RE), v)) /*@}*/ /*! @@ -1595,13 +1602,13 @@ #define BS_SPI_RSER_RFOF_RE (1U) /*!< Bit field size in bits for SPI_RSER_RFOF_RE. */ /*! @brief Read current value of the SPI_RSER_RFOF_RE field. */ -#define BR_SPI_RSER_RFOF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFOF_RE)) +#define BR_SPI_RSER_RFOF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFOF_RE))) /*! @brief Format value for bitfield SPI_RSER_RFOF_RE. */ #define BF_SPI_RSER_RFOF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_RFOF_RE) & BM_SPI_RSER_RFOF_RE) /*! @brief Set the RFOF_RE field to a new value. */ -#define BW_SPI_RSER_RFOF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFOF_RE) = (v)) +#define BW_SPI_RSER_RFOF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFOF_RE), v)) /*@}*/ /*! @@ -1621,13 +1628,13 @@ #define BS_SPI_RSER_TFFF_DIRS (1U) /*!< Bit field size in bits for SPI_RSER_TFFF_DIRS. */ /*! @brief Read current value of the SPI_RSER_TFFF_DIRS field. */ -#define BR_SPI_RSER_TFFF_DIRS(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_DIRS)) +#define BR_SPI_RSER_TFFF_DIRS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_DIRS))) /*! @brief Format value for bitfield SPI_RSER_TFFF_DIRS. */ #define BF_SPI_RSER_TFFF_DIRS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_TFFF_DIRS) & BM_SPI_RSER_TFFF_DIRS) /*! @brief Set the TFFF_DIRS field to a new value. */ -#define BW_SPI_RSER_TFFF_DIRS(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_DIRS) = (v)) +#define BW_SPI_RSER_TFFF_DIRS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_DIRS), v)) /*@}*/ /*! @@ -1646,13 +1653,13 @@ #define BS_SPI_RSER_TFFF_RE (1U) /*!< Bit field size in bits for SPI_RSER_TFFF_RE. */ /*! @brief Read current value of the SPI_RSER_TFFF_RE field. */ -#define BR_SPI_RSER_TFFF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_RE)) +#define BR_SPI_RSER_TFFF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_RE))) /*! @brief Format value for bitfield SPI_RSER_TFFF_RE. */ #define BF_SPI_RSER_TFFF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_TFFF_RE) & BM_SPI_RSER_TFFF_RE) /*! @brief Set the TFFF_RE field to a new value. */ -#define BW_SPI_RSER_TFFF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_RE) = (v)) +#define BW_SPI_RSER_TFFF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_RE), v)) /*@}*/ /*! @@ -1670,13 +1677,13 @@ #define BS_SPI_RSER_TFUF_RE (1U) /*!< Bit field size in bits for SPI_RSER_TFUF_RE. */ /*! @brief Read current value of the SPI_RSER_TFUF_RE field. */ -#define BR_SPI_RSER_TFUF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFUF_RE)) +#define BR_SPI_RSER_TFUF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFUF_RE))) /*! @brief Format value for bitfield SPI_RSER_TFUF_RE. */ #define BF_SPI_RSER_TFUF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_TFUF_RE) & BM_SPI_RSER_TFUF_RE) /*! @brief Set the TFUF_RE field to a new value. */ -#define BW_SPI_RSER_TFUF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFUF_RE) = (v)) +#define BW_SPI_RSER_TFUF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFUF_RE), v)) /*@}*/ /*! @@ -1694,13 +1701,13 @@ #define BS_SPI_RSER_EOQF_RE (1U) /*!< Bit field size in bits for SPI_RSER_EOQF_RE. */ /*! @brief Read current value of the SPI_RSER_EOQF_RE field. */ -#define BR_SPI_RSER_EOQF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_EOQF_RE)) +#define BR_SPI_RSER_EOQF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_EOQF_RE))) /*! @brief Format value for bitfield SPI_RSER_EOQF_RE. */ #define BF_SPI_RSER_EOQF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_EOQF_RE) & BM_SPI_RSER_EOQF_RE) /*! @brief Set the EOQF_RE field to a new value. */ -#define BW_SPI_RSER_EOQF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_EOQF_RE) = (v)) +#define BW_SPI_RSER_EOQF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_EOQF_RE), v)) /*@}*/ /*! @@ -1718,13 +1725,13 @@ #define BS_SPI_RSER_TCF_RE (1U) /*!< Bit field size in bits for SPI_RSER_TCF_RE. */ /*! @brief Read current value of the SPI_RSER_TCF_RE field. */ -#define BR_SPI_RSER_TCF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TCF_RE)) +#define BR_SPI_RSER_TCF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TCF_RE))) /*! @brief Format value for bitfield SPI_RSER_TCF_RE. */ #define BF_SPI_RSER_TCF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_TCF_RE) & BM_SPI_RSER_TCF_RE) /*! @brief Set the TCF_RE field to a new value. */ -#define BW_SPI_RSER_TCF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TCF_RE) = (v)) +#define BW_SPI_RSER_TCF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TCF_RE), v)) /*@}*/ /******************************************************************************* @@ -1769,8 +1776,8 @@ #define HW_SPI_PUSHR_ADDR(x) ((x) + 0x34U) #define HW_SPI_PUSHR(x) (*(__IO hw_spi_pushr_t *) HW_SPI_PUSHR_ADDR(x)) -#define HW_SPI_PUSHR_RD(x) (HW_SPI_PUSHR(x).U) -#define HW_SPI_PUSHR_WR(x, v) (HW_SPI_PUSHR(x).U = (v)) +#define HW_SPI_PUSHR_RD(x) (ADDRESS_READ(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x))) +#define HW_SPI_PUSHR_WR(x, v) (ADDRESS_WRITE(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x), v)) #define HW_SPI_PUSHR_SET(x, v) (HW_SPI_PUSHR_WR(x, HW_SPI_PUSHR_RD(x) | (v))) #define HW_SPI_PUSHR_CLR(x, v) (HW_SPI_PUSHR_WR(x, HW_SPI_PUSHR_RD(x) & ~(v))) #define HW_SPI_PUSHR_TOG(x, v) (HW_SPI_PUSHR_WR(x, HW_SPI_PUSHR_RD(x) ^ (v))) @@ -1791,7 +1798,7 @@ #define BS_SPI_PUSHR_TXDATA (16U) /*!< Bit field size in bits for SPI_PUSHR_TXDATA. */ /*! @brief Read current value of the SPI_PUSHR_TXDATA field. */ -#define BR_SPI_PUSHR_TXDATA(x) (HW_SPI_PUSHR(x).B.TXDATA) +#define BR_SPI_PUSHR_TXDATA(x) (UNION_READ(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x), U, B.TXDATA)) /*! @brief Format value for bitfield SPI_PUSHR_TXDATA. */ #define BF_SPI_PUSHR_TXDATA(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_TXDATA) & BM_SPI_PUSHR_TXDATA) @@ -1816,7 +1823,7 @@ #define BS_SPI_PUSHR_PCS (6U) /*!< Bit field size in bits for SPI_PUSHR_PCS. */ /*! @brief Read current value of the SPI_PUSHR_PCS field. */ -#define BR_SPI_PUSHR_PCS(x) (HW_SPI_PUSHR(x).B.PCS) +#define BR_SPI_PUSHR_PCS(x) (UNION_READ(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x), U, B.PCS)) /*! @brief Format value for bitfield SPI_PUSHR_PCS. */ #define BF_SPI_PUSHR_PCS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_PCS) & BM_SPI_PUSHR_PCS) @@ -1841,13 +1848,13 @@ #define BS_SPI_PUSHR_CTCNT (1U) /*!< Bit field size in bits for SPI_PUSHR_CTCNT. */ /*! @brief Read current value of the SPI_PUSHR_CTCNT field. */ -#define BR_SPI_PUSHR_CTCNT(x) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CTCNT)) +#define BR_SPI_PUSHR_CTCNT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CTCNT))) /*! @brief Format value for bitfield SPI_PUSHR_CTCNT. */ #define BF_SPI_PUSHR_CTCNT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_CTCNT) & BM_SPI_PUSHR_CTCNT) /*! @brief Set the CTCNT field to a new value. */ -#define BW_SPI_PUSHR_CTCNT(x, v) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CTCNT) = (v)) +#define BW_SPI_PUSHR_CTCNT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CTCNT), v)) /*@}*/ /*! @@ -1867,13 +1874,13 @@ #define BS_SPI_PUSHR_EOQ (1U) /*!< Bit field size in bits for SPI_PUSHR_EOQ. */ /*! @brief Read current value of the SPI_PUSHR_EOQ field. */ -#define BR_SPI_PUSHR_EOQ(x) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_EOQ)) +#define BR_SPI_PUSHR_EOQ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_EOQ))) /*! @brief Format value for bitfield SPI_PUSHR_EOQ. */ #define BF_SPI_PUSHR_EOQ(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_EOQ) & BM_SPI_PUSHR_EOQ) /*! @brief Set the EOQ field to a new value. */ -#define BW_SPI_PUSHR_EOQ(x, v) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_EOQ) = (v)) +#define BW_SPI_PUSHR_EOQ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_EOQ), v)) /*@}*/ /*! @@ -1900,7 +1907,7 @@ #define BS_SPI_PUSHR_CTAS (3U) /*!< Bit field size in bits for SPI_PUSHR_CTAS. */ /*! @brief Read current value of the SPI_PUSHR_CTAS field. */ -#define BR_SPI_PUSHR_CTAS(x) (HW_SPI_PUSHR(x).B.CTAS) +#define BR_SPI_PUSHR_CTAS(x) (UNION_READ(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x), U, B.CTAS)) /*! @brief Format value for bitfield SPI_PUSHR_CTAS. */ #define BF_SPI_PUSHR_CTAS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_CTAS) & BM_SPI_PUSHR_CTAS) @@ -1925,13 +1932,13 @@ #define BS_SPI_PUSHR_CONT (1U) /*!< Bit field size in bits for SPI_PUSHR_CONT. */ /*! @brief Read current value of the SPI_PUSHR_CONT field. */ -#define BR_SPI_PUSHR_CONT(x) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CONT)) +#define BR_SPI_PUSHR_CONT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CONT))) /*! @brief Format value for bitfield SPI_PUSHR_CONT. */ #define BF_SPI_PUSHR_CONT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_CONT) & BM_SPI_PUSHR_CONT) /*! @brief Set the CONT field to a new value. */ -#define BW_SPI_PUSHR_CONT(x, v) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CONT) = (v)) +#define BW_SPI_PUSHR_CONT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CONT), v)) /*@}*/ /******************************************************************************* * HW_SPI_PUSHR_SLAVE - PUSH TX FIFO Register In Slave Mode @@ -1964,8 +1971,8 @@ #define HW_SPI_PUSHR_SLAVE_ADDR(x) ((x) + 0x34U) #define HW_SPI_PUSHR_SLAVE(x) (*(__IO hw_spi_pushr_slave_t *) HW_SPI_PUSHR_SLAVE_ADDR(x)) -#define HW_SPI_PUSHR_SLAVE_RD(x) (HW_SPI_PUSHR_SLAVE(x).U) -#define HW_SPI_PUSHR_SLAVE_WR(x, v) (HW_SPI_PUSHR_SLAVE(x).U = (v)) +#define HW_SPI_PUSHR_SLAVE_RD(x) (ADDRESS_READ(hw_spi_pushr_slave_t, HW_SPI_PUSHR_SLAVE_ADDR(x))) +#define HW_SPI_PUSHR_SLAVE_WR(x, v) (ADDRESS_WRITE(hw_spi_pushr_slave_t, HW_SPI_PUSHR_SLAVE_ADDR(x), v)) #define HW_SPI_PUSHR_SLAVE_SET(x, v) (HW_SPI_PUSHR_SLAVE_WR(x, HW_SPI_PUSHR_SLAVE_RD(x) | (v))) #define HW_SPI_PUSHR_SLAVE_CLR(x, v) (HW_SPI_PUSHR_SLAVE_WR(x, HW_SPI_PUSHR_SLAVE_RD(x) & ~(v))) #define HW_SPI_PUSHR_SLAVE_TOG(x, v) (HW_SPI_PUSHR_SLAVE_WR(x, HW_SPI_PUSHR_SLAVE_RD(x) ^ (v))) @@ -2024,7 +2031,7 @@ #define HW_SPI_POPR_ADDR(x) ((x) + 0x38U) #define HW_SPI_POPR(x) (*(__I hw_spi_popr_t *) HW_SPI_POPR_ADDR(x)) -#define HW_SPI_POPR_RD(x) (HW_SPI_POPR(x).U) +#define HW_SPI_POPR_RD(x) (ADDRESS_READ(hw_spi_popr_t, HW_SPI_POPR_ADDR(x))) /*@}*/ /* @@ -2080,7 +2087,7 @@ #define HW_SPI_TXFRn_ADDR(x, n) ((x) + 0x3CU + (0x4U * (n))) #define HW_SPI_TXFRn(x, n) (*(__I hw_spi_txfrn_t *) HW_SPI_TXFRn_ADDR(x, n)) -#define HW_SPI_TXFRn_RD(x, n) (HW_SPI_TXFRn(x, n).U) +#define HW_SPI_TXFRn_RD(x, n) (ADDRESS_READ(hw_spi_txfrn_t, HW_SPI_TXFRn_ADDR(x, n))) /*@}*/ /* @@ -2098,7 +2105,7 @@ #define BS_SPI_TXFRn_TXDATA (16U) /*!< Bit field size in bits for SPI_TXFRn_TXDATA. */ /*! @brief Read current value of the SPI_TXFRn_TXDATA field. */ -#define BR_SPI_TXFRn_TXDATA(x, n) (HW_SPI_TXFRn(x, n).B.TXDATA) +#define BR_SPI_TXFRn_TXDATA(x, n) (UNION_READ(hw_spi_txfrn_t, HW_SPI_TXFRn_ADDR(x, n), U, B.TXDATA)) /*@}*/ /*! @@ -2114,7 +2121,7 @@ #define BS_SPI_TXFRn_TXCMD_TXDATA (16U) /*!< Bit field size in bits for SPI_TXFRn_TXCMD_TXDATA. */ /*! @brief Read current value of the SPI_TXFRn_TXCMD_TXDATA field. */ -#define BR_SPI_TXFRn_TXCMD_TXDATA(x, n) (HW_SPI_TXFRn(x, n).B.TXCMD_TXDATA) +#define BR_SPI_TXFRn_TXCMD_TXDATA(x, n) (UNION_READ(hw_spi_txfrn_t, HW_SPI_TXFRn_ADDR(x, n), U, B.TXCMD_TXDATA)) /*@}*/ /******************************************************************************* @@ -2148,7 +2155,7 @@ #define HW_SPI_RXFRn_ADDR(x, n) ((x) + 0x7CU + (0x4U * (n))) #define HW_SPI_RXFRn(x, n) (*(__I hw_spi_rxfrn_t *) HW_SPI_RXFRn_ADDR(x, n)) -#define HW_SPI_RXFRn_RD(x, n) (HW_SPI_RXFRn(x, n).U) +#define HW_SPI_RXFRn_RD(x, n) (ADDRESS_READ(hw_spi_rxfrn_t, HW_SPI_RXFRn_ADDR(x, n))) /*@}*/ /*
--- a/hal/device/device/MK64F12/MK64F12_uart.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_uart.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -170,8 +177,8 @@ #define HW_UART_BDH_ADDR(x) ((x) + 0x0U) #define HW_UART_BDH(x) (*(__IO hw_uart_bdh_t *) HW_UART_BDH_ADDR(x)) -#define HW_UART_BDH_RD(x) (HW_UART_BDH(x).U) -#define HW_UART_BDH_WR(x, v) (HW_UART_BDH(x).U = (v)) +#define HW_UART_BDH_RD(x) (ADDRESS_READ(hw_uart_bdh_t, HW_UART_BDH_ADDR(x))) +#define HW_UART_BDH_WR(x, v) (ADDRESS_WRITE(hw_uart_bdh_t, HW_UART_BDH_ADDR(x), v)) #define HW_UART_BDH_SET(x, v) (HW_UART_BDH_WR(x, HW_UART_BDH_RD(x) | (v))) #define HW_UART_BDH_CLR(x, v) (HW_UART_BDH_WR(x, HW_UART_BDH_RD(x) & ~(v))) #define HW_UART_BDH_TOG(x, v) (HW_UART_BDH_WR(x, HW_UART_BDH_RD(x) ^ (v))) @@ -196,7 +203,7 @@ #define BS_UART_BDH_SBR (5U) /*!< Bit field size in bits for UART_BDH_SBR. */ /*! @brief Read current value of the UART_BDH_SBR field. */ -#define BR_UART_BDH_SBR(x) (HW_UART_BDH(x).B.SBR) +#define BR_UART_BDH_SBR(x) (UNION_READ(hw_uart_bdh_t, HW_UART_BDH_ADDR(x), U, B.SBR)) /*! @brief Format value for bitfield UART_BDH_SBR. */ #define BF_UART_BDH_SBR(v) ((uint8_t)((uint8_t)(v) << BP_UART_BDH_SBR) & BM_UART_BDH_SBR) @@ -222,13 +229,13 @@ #define BS_UART_BDH_SBNS (1U) /*!< Bit field size in bits for UART_BDH_SBNS. */ /*! @brief Read current value of the UART_BDH_SBNS field. */ -#define BR_UART_BDH_SBNS(x) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_SBNS)) +#define BR_UART_BDH_SBNS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_SBNS))) /*! @brief Format value for bitfield UART_BDH_SBNS. */ #define BF_UART_BDH_SBNS(v) ((uint8_t)((uint8_t)(v) << BP_UART_BDH_SBNS) & BM_UART_BDH_SBNS) /*! @brief Set the SBNS field to a new value. */ -#define BW_UART_BDH_SBNS(x, v) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_SBNS) = (v)) +#define BW_UART_BDH_SBNS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_SBNS), v)) /*@}*/ /*! @@ -247,13 +254,13 @@ #define BS_UART_BDH_RXEDGIE (1U) /*!< Bit field size in bits for UART_BDH_RXEDGIE. */ /*! @brief Read current value of the UART_BDH_RXEDGIE field. */ -#define BR_UART_BDH_RXEDGIE(x) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_RXEDGIE)) +#define BR_UART_BDH_RXEDGIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_RXEDGIE))) /*! @brief Format value for bitfield UART_BDH_RXEDGIE. */ #define BF_UART_BDH_RXEDGIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_BDH_RXEDGIE) & BM_UART_BDH_RXEDGIE) /*! @brief Set the RXEDGIE field to a new value. */ -#define BW_UART_BDH_RXEDGIE(x, v) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_RXEDGIE) = (v)) +#define BW_UART_BDH_RXEDGIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_RXEDGIE), v)) /*@}*/ /*! @@ -272,13 +279,13 @@ #define BS_UART_BDH_LBKDIE (1U) /*!< Bit field size in bits for UART_BDH_LBKDIE. */ /*! @brief Read current value of the UART_BDH_LBKDIE field. */ -#define BR_UART_BDH_LBKDIE(x) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_LBKDIE)) +#define BR_UART_BDH_LBKDIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_LBKDIE))) /*! @brief Format value for bitfield UART_BDH_LBKDIE. */ #define BF_UART_BDH_LBKDIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_BDH_LBKDIE) & BM_UART_BDH_LBKDIE) /*! @brief Set the LBKDIE field to a new value. */ -#define BW_UART_BDH_LBKDIE(x, v) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_LBKDIE) = (v)) +#define BW_UART_BDH_LBKDIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_LBKDIE), v)) /*@}*/ /******************************************************************************* @@ -314,8 +321,8 @@ #define HW_UART_BDL_ADDR(x) ((x) + 0x1U) #define HW_UART_BDL(x) (*(__IO hw_uart_bdl_t *) HW_UART_BDL_ADDR(x)) -#define HW_UART_BDL_RD(x) (HW_UART_BDL(x).U) -#define HW_UART_BDL_WR(x, v) (HW_UART_BDL(x).U = (v)) +#define HW_UART_BDL_RD(x) (ADDRESS_READ(hw_uart_bdl_t, HW_UART_BDL_ADDR(x))) +#define HW_UART_BDL_WR(x, v) (ADDRESS_WRITE(hw_uart_bdl_t, HW_UART_BDL_ADDR(x), v)) #define HW_UART_BDL_SET(x, v) (HW_UART_BDL_WR(x, HW_UART_BDL_RD(x) | (v))) #define HW_UART_BDL_CLR(x, v) (HW_UART_BDL_WR(x, HW_UART_BDL_RD(x) & ~(v))) #define HW_UART_BDL_TOG(x, v) (HW_UART_BDL_WR(x, HW_UART_BDL_RD(x) ^ (v))) @@ -387,8 +394,8 @@ #define HW_UART_C1_ADDR(x) ((x) + 0x2U) #define HW_UART_C1(x) (*(__IO hw_uart_c1_t *) HW_UART_C1_ADDR(x)) -#define HW_UART_C1_RD(x) (HW_UART_C1(x).U) -#define HW_UART_C1_WR(x, v) (HW_UART_C1(x).U = (v)) +#define HW_UART_C1_RD(x) (ADDRESS_READ(hw_uart_c1_t, HW_UART_C1_ADDR(x))) +#define HW_UART_C1_WR(x, v) (ADDRESS_WRITE(hw_uart_c1_t, HW_UART_C1_ADDR(x), v)) #define HW_UART_C1_SET(x, v) (HW_UART_C1_WR(x, HW_UART_C1_RD(x) | (v))) #define HW_UART_C1_CLR(x, v) (HW_UART_C1_WR(x, HW_UART_C1_RD(x) & ~(v))) #define HW_UART_C1_TOG(x, v) (HW_UART_C1_WR(x, HW_UART_C1_RD(x) ^ (v))) @@ -417,13 +424,13 @@ #define BS_UART_C1_PT (1U) /*!< Bit field size in bits for UART_C1_PT. */ /*! @brief Read current value of the UART_C1_PT field. */ -#define BR_UART_C1_PT(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PT)) +#define BR_UART_C1_PT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PT))) /*! @brief Format value for bitfield UART_C1_PT. */ #define BF_UART_C1_PT(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_PT) & BM_UART_C1_PT) /*! @brief Set the PT field to a new value. */ -#define BW_UART_C1_PT(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PT) = (v)) +#define BW_UART_C1_PT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PT), v)) /*@}*/ /*! @@ -443,13 +450,13 @@ #define BS_UART_C1_PE (1U) /*!< Bit field size in bits for UART_C1_PE. */ /*! @brief Read current value of the UART_C1_PE field. */ -#define BR_UART_C1_PE(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PE)) +#define BR_UART_C1_PE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PE))) /*! @brief Format value for bitfield UART_C1_PE. */ #define BF_UART_C1_PE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_PE) & BM_UART_C1_PE) /*! @brief Set the PE field to a new value. */ -#define BW_UART_C1_PE(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PE) = (v)) +#define BW_UART_C1_PE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PE), v)) /*@}*/ /*! @@ -478,13 +485,13 @@ #define BS_UART_C1_ILT (1U) /*!< Bit field size in bits for UART_C1_ILT. */ /*! @brief Read current value of the UART_C1_ILT field. */ -#define BR_UART_C1_ILT(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_ILT)) +#define BR_UART_C1_ILT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_ILT))) /*! @brief Format value for bitfield UART_C1_ILT. */ #define BF_UART_C1_ILT(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_ILT) & BM_UART_C1_ILT) /*! @brief Set the ILT field to a new value. */ -#define BW_UART_C1_ILT(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_ILT) = (v)) +#define BW_UART_C1_ILT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_ILT), v)) /*@}*/ /*! @@ -504,13 +511,13 @@ #define BS_UART_C1_WAKE (1U) /*!< Bit field size in bits for UART_C1_WAKE. */ /*! @brief Read current value of the UART_C1_WAKE field. */ -#define BR_UART_C1_WAKE(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_WAKE)) +#define BR_UART_C1_WAKE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_WAKE))) /*! @brief Format value for bitfield UART_C1_WAKE. */ #define BF_UART_C1_WAKE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_WAKE) & BM_UART_C1_WAKE) /*! @brief Set the WAKE field to a new value. */ -#define BW_UART_C1_WAKE(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_WAKE) = (v)) +#define BW_UART_C1_WAKE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_WAKE), v)) /*@}*/ /*! @@ -528,13 +535,13 @@ #define BS_UART_C1_M (1U) /*!< Bit field size in bits for UART_C1_M. */ /*! @brief Read current value of the UART_C1_M field. */ -#define BR_UART_C1_M(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_M)) +#define BR_UART_C1_M(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_M))) /*! @brief Format value for bitfield UART_C1_M. */ #define BF_UART_C1_M(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_M) & BM_UART_C1_M) /*! @brief Set the M field to a new value. */ -#define BW_UART_C1_M(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_M) = (v)) +#define BW_UART_C1_M(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_M), v)) /*@}*/ /*! @@ -556,13 +563,13 @@ #define BS_UART_C1_RSRC (1U) /*!< Bit field size in bits for UART_C1_RSRC. */ /*! @brief Read current value of the UART_C1_RSRC field. */ -#define BR_UART_C1_RSRC(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_RSRC)) +#define BR_UART_C1_RSRC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_RSRC))) /*! @brief Format value for bitfield UART_C1_RSRC. */ #define BF_UART_C1_RSRC(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_RSRC) & BM_UART_C1_RSRC) /*! @brief Set the RSRC field to a new value. */ -#define BW_UART_C1_RSRC(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_RSRC) = (v)) +#define BW_UART_C1_RSRC(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_RSRC), v)) /*@}*/ /*! @@ -578,13 +585,13 @@ #define BS_UART_C1_UARTSWAI (1U) /*!< Bit field size in bits for UART_C1_UARTSWAI. */ /*! @brief Read current value of the UART_C1_UARTSWAI field. */ -#define BR_UART_C1_UARTSWAI(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_UARTSWAI)) +#define BR_UART_C1_UARTSWAI(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_UARTSWAI))) /*! @brief Format value for bitfield UART_C1_UARTSWAI. */ #define BF_UART_C1_UARTSWAI(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_UARTSWAI) & BM_UART_C1_UARTSWAI) /*! @brief Set the UARTSWAI field to a new value. */ -#define BW_UART_C1_UARTSWAI(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_UARTSWAI) = (v)) +#define BW_UART_C1_UARTSWAI(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_UARTSWAI), v)) /*@}*/ /*! @@ -605,13 +612,13 @@ #define BS_UART_C1_LOOPS (1U) /*!< Bit field size in bits for UART_C1_LOOPS. */ /*! @brief Read current value of the UART_C1_LOOPS field. */ -#define BR_UART_C1_LOOPS(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_LOOPS)) +#define BR_UART_C1_LOOPS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_LOOPS))) /*! @brief Format value for bitfield UART_C1_LOOPS. */ #define BF_UART_C1_LOOPS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_LOOPS) & BM_UART_C1_LOOPS) /*! @brief Set the LOOPS field to a new value. */ -#define BW_UART_C1_LOOPS(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_LOOPS) = (v)) +#define BW_UART_C1_LOOPS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C1_ADDR(x), BP_UART_C1_LOOPS), v)) /*@}*/ /******************************************************************************* @@ -651,8 +658,8 @@ #define HW_UART_C2_ADDR(x) ((x) + 0x3U) #define HW_UART_C2(x) (*(__IO hw_uart_c2_t *) HW_UART_C2_ADDR(x)) -#define HW_UART_C2_RD(x) (HW_UART_C2(x).U) -#define HW_UART_C2_WR(x, v) (HW_UART_C2(x).U = (v)) +#define HW_UART_C2_RD(x) (ADDRESS_READ(hw_uart_c2_t, HW_UART_C2_ADDR(x))) +#define HW_UART_C2_WR(x, v) (ADDRESS_WRITE(hw_uart_c2_t, HW_UART_C2_ADDR(x), v)) #define HW_UART_C2_SET(x, v) (HW_UART_C2_WR(x, HW_UART_C2_RD(x) | (v))) #define HW_UART_C2_CLR(x, v) (HW_UART_C2_WR(x, HW_UART_C2_RD(x) & ~(v))) #define HW_UART_C2_TOG(x, v) (HW_UART_C2_WR(x, HW_UART_C2_RD(x) ^ (v))) @@ -685,13 +692,13 @@ #define BS_UART_C2_SBK (1U) /*!< Bit field size in bits for UART_C2_SBK. */ /*! @brief Read current value of the UART_C2_SBK field. */ -#define BR_UART_C2_SBK(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_SBK)) +#define BR_UART_C2_SBK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_SBK))) /*! @brief Format value for bitfield UART_C2_SBK. */ #define BF_UART_C2_SBK(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_SBK) & BM_UART_C2_SBK) /*! @brief Set the SBK field to a new value. */ -#define BW_UART_C2_SBK(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_SBK) = (v)) +#define BW_UART_C2_SBK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_SBK), v)) /*@}*/ /*! @@ -719,13 +726,13 @@ #define BS_UART_C2_RWU (1U) /*!< Bit field size in bits for UART_C2_RWU. */ /*! @brief Read current value of the UART_C2_RWU field. */ -#define BR_UART_C2_RWU(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RWU)) +#define BR_UART_C2_RWU(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RWU))) /*! @brief Format value for bitfield UART_C2_RWU. */ #define BF_UART_C2_RWU(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_RWU) & BM_UART_C2_RWU) /*! @brief Set the RWU field to a new value. */ -#define BW_UART_C2_RWU(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RWU) = (v)) +#define BW_UART_C2_RWU(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RWU), v)) /*@}*/ /*! @@ -743,13 +750,13 @@ #define BS_UART_C2_RE (1U) /*!< Bit field size in bits for UART_C2_RE. */ /*! @brief Read current value of the UART_C2_RE field. */ -#define BR_UART_C2_RE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RE)) +#define BR_UART_C2_RE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RE))) /*! @brief Format value for bitfield UART_C2_RE. */ #define BF_UART_C2_RE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_RE) & BM_UART_C2_RE) /*! @brief Set the RE field to a new value. */ -#define BW_UART_C2_RE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RE) = (v)) +#define BW_UART_C2_RE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RE), v)) /*@}*/ /*! @@ -771,13 +778,13 @@ #define BS_UART_C2_TE (1U) /*!< Bit field size in bits for UART_C2_TE. */ /*! @brief Read current value of the UART_C2_TE field. */ -#define BR_UART_C2_TE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TE)) +#define BR_UART_C2_TE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TE))) /*! @brief Format value for bitfield UART_C2_TE. */ #define BF_UART_C2_TE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_TE) & BM_UART_C2_TE) /*! @brief Set the TE field to a new value. */ -#define BW_UART_C2_TE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TE) = (v)) +#define BW_UART_C2_TE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TE), v)) /*@}*/ /*! @@ -796,13 +803,13 @@ #define BS_UART_C2_ILIE (1U) /*!< Bit field size in bits for UART_C2_ILIE. */ /*! @brief Read current value of the UART_C2_ILIE field. */ -#define BR_UART_C2_ILIE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_ILIE)) +#define BR_UART_C2_ILIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_ILIE))) /*! @brief Format value for bitfield UART_C2_ILIE. */ #define BF_UART_C2_ILIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_ILIE) & BM_UART_C2_ILIE) /*! @brief Set the ILIE field to a new value. */ -#define BW_UART_C2_ILIE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_ILIE) = (v)) +#define BW_UART_C2_ILIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_ILIE), v)) /*@}*/ /*! @@ -821,13 +828,13 @@ #define BS_UART_C2_RIE (1U) /*!< Bit field size in bits for UART_C2_RIE. */ /*! @brief Read current value of the UART_C2_RIE field. */ -#define BR_UART_C2_RIE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RIE)) +#define BR_UART_C2_RIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RIE))) /*! @brief Format value for bitfield UART_C2_RIE. */ #define BF_UART_C2_RIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_RIE) & BM_UART_C2_RIE) /*! @brief Set the RIE field to a new value. */ -#define BW_UART_C2_RIE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RIE) = (v)) +#define BW_UART_C2_RIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RIE), v)) /*@}*/ /*! @@ -848,13 +855,13 @@ #define BS_UART_C2_TCIE (1U) /*!< Bit field size in bits for UART_C2_TCIE. */ /*! @brief Read current value of the UART_C2_TCIE field. */ -#define BR_UART_C2_TCIE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TCIE)) +#define BR_UART_C2_TCIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TCIE))) /*! @brief Format value for bitfield UART_C2_TCIE. */ #define BF_UART_C2_TCIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_TCIE) & BM_UART_C2_TCIE) /*! @brief Set the TCIE field to a new value. */ -#define BW_UART_C2_TCIE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TCIE) = (v)) +#define BW_UART_C2_TCIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TCIE), v)) /*@}*/ /*! @@ -874,13 +881,13 @@ #define BS_UART_C2_TIE (1U) /*!< Bit field size in bits for UART_C2_TIE. */ /*! @brief Read current value of the UART_C2_TIE field. */ -#define BR_UART_C2_TIE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TIE)) +#define BR_UART_C2_TIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TIE))) /*! @brief Format value for bitfield UART_C2_TIE. */ #define BF_UART_C2_TIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_TIE) & BM_UART_C2_TIE) /*! @brief Set the TIE field to a new value. */ -#define BW_UART_C2_TIE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TIE) = (v)) +#define BW_UART_C2_TIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TIE), v)) /*@}*/ /******************************************************************************* @@ -933,7 +940,7 @@ #define HW_UART_S1_ADDR(x) ((x) + 0x4U) #define HW_UART_S1(x) (*(__I hw_uart_s1_t *) HW_UART_S1_ADDR(x)) -#define HW_UART_S1_RD(x) (HW_UART_S1(x).U) +#define HW_UART_S1_RD(x) (ADDRESS_READ(hw_uart_s1_t, HW_UART_S1_ADDR(x))) /*@}*/ /* @@ -967,7 +974,7 @@ #define BS_UART_S1_PF (1U) /*!< Bit field size in bits for UART_S1_PF. */ /*! @brief Read current value of the UART_S1_PF field. */ -#define BR_UART_S1_PF(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_PF)) +#define BR_UART_S1_PF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S1_ADDR(x), BP_UART_S1_PF))) /*@}*/ /*! @@ -992,7 +999,7 @@ #define BS_UART_S1_FE (1U) /*!< Bit field size in bits for UART_S1_FE. */ /*! @brief Read current value of the UART_S1_FE field. */ -#define BR_UART_S1_FE(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_FE)) +#define BR_UART_S1_FE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S1_ADDR(x), BP_UART_S1_FE))) /*@}*/ /*! @@ -1019,7 +1026,7 @@ #define BS_UART_S1_NF (1U) /*!< Bit field size in bits for UART_S1_NF. */ /*! @brief Read current value of the UART_S1_NF field. */ -#define BR_UART_S1_NF(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_NF)) +#define BR_UART_S1_NF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S1_ADDR(x), BP_UART_S1_NF))) /*@}*/ /*! @@ -1050,7 +1057,7 @@ #define BS_UART_S1_OR (1U) /*!< Bit field size in bits for UART_S1_OR. */ /*! @brief Read current value of the UART_S1_OR field. */ -#define BR_UART_S1_OR(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_OR)) +#define BR_UART_S1_OR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S1_ADDR(x), BP_UART_S1_OR))) /*@}*/ /*! @@ -1079,7 +1086,7 @@ #define BS_UART_S1_IDLE (1U) /*!< Bit field size in bits for UART_S1_IDLE. */ /*! @brief Read current value of the UART_S1_IDLE field. */ -#define BR_UART_S1_IDLE(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_IDLE)) +#define BR_UART_S1_IDLE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S1_ADDR(x), BP_UART_S1_IDLE))) /*@}*/ /*! @@ -1109,7 +1116,7 @@ #define BS_UART_S1_RDRF (1U) /*!< Bit field size in bits for UART_S1_RDRF. */ /*! @brief Read current value of the UART_S1_RDRF field. */ -#define BR_UART_S1_RDRF(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_RDRF)) +#define BR_UART_S1_RDRF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S1_ADDR(x), BP_UART_S1_RDRF))) /*@}*/ /*! @@ -1134,7 +1141,7 @@ #define BS_UART_S1_TC (1U) /*!< Bit field size in bits for UART_S1_TC. */ /*! @brief Read current value of the UART_S1_TC field. */ -#define BR_UART_S1_TC(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_TC)) +#define BR_UART_S1_TC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S1_ADDR(x), BP_UART_S1_TC))) /*@}*/ /*! @@ -1164,7 +1171,7 @@ #define BS_UART_S1_TDRE (1U) /*!< Bit field size in bits for UART_S1_TDRE. */ /*! @brief Read current value of the UART_S1_TDRE field. */ -#define BR_UART_S1_TDRE(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_TDRE)) +#define BR_UART_S1_TDRE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S1_ADDR(x), BP_UART_S1_TDRE))) /*@}*/ /******************************************************************************* @@ -1205,8 +1212,8 @@ #define HW_UART_S2_ADDR(x) ((x) + 0x5U) #define HW_UART_S2(x) (*(__IO hw_uart_s2_t *) HW_UART_S2_ADDR(x)) -#define HW_UART_S2_RD(x) (HW_UART_S2(x).U) -#define HW_UART_S2_WR(x, v) (HW_UART_S2(x).U = (v)) +#define HW_UART_S2_RD(x) (ADDRESS_READ(hw_uart_s2_t, HW_UART_S2_ADDR(x))) +#define HW_UART_S2_WR(x, v) (ADDRESS_WRITE(hw_uart_s2_t, HW_UART_S2_ADDR(x), v)) #define HW_UART_S2_SET(x, v) (HW_UART_S2_WR(x, HW_UART_S2_RD(x) | (v))) #define HW_UART_S2_CLR(x, v) (HW_UART_S2_WR(x, HW_UART_S2_RD(x) & ~(v))) #define HW_UART_S2_TOG(x, v) (HW_UART_S2_WR(x, HW_UART_S2_RD(x) ^ (v))) @@ -1239,7 +1246,7 @@ #define BS_UART_S2_RAF (1U) /*!< Bit field size in bits for UART_S2_RAF. */ /*! @brief Read current value of the UART_S2_RAF field. */ -#define BR_UART_S2_RAF(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RAF)) +#define BR_UART_S2_RAF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RAF))) /*@}*/ /*! @@ -1260,13 +1267,13 @@ #define BS_UART_S2_LBKDE (1U) /*!< Bit field size in bits for UART_S2_LBKDE. */ /*! @brief Read current value of the UART_S2_LBKDE field. */ -#define BR_UART_S2_LBKDE(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDE)) +#define BR_UART_S2_LBKDE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDE))) /*! @brief Format value for bitfield UART_S2_LBKDE. */ #define BF_UART_S2_LBKDE(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_LBKDE) & BM_UART_S2_LBKDE) /*! @brief Set the LBKDE field to a new value. */ -#define BW_UART_S2_LBKDE(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDE) = (v)) +#define BW_UART_S2_LBKDE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDE), v)) /*@}*/ /*! @@ -1287,13 +1294,13 @@ #define BS_UART_S2_BRK13 (1U) /*!< Bit field size in bits for UART_S2_BRK13. */ /*! @brief Read current value of the UART_S2_BRK13 field. */ -#define BR_UART_S2_BRK13(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_BRK13)) +#define BR_UART_S2_BRK13(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_BRK13))) /*! @brief Format value for bitfield UART_S2_BRK13. */ #define BF_UART_S2_BRK13(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_BRK13) & BM_UART_S2_BRK13) /*! @brief Set the BRK13 field to a new value. */ -#define BW_UART_S2_BRK13(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_BRK13) = (v)) +#define BW_UART_S2_BRK13(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_BRK13), v)) /*@}*/ /*! @@ -1313,13 +1320,13 @@ #define BS_UART_S2_RWUID (1U) /*!< Bit field size in bits for UART_S2_RWUID. */ /*! @brief Read current value of the UART_S2_RWUID field. */ -#define BR_UART_S2_RWUID(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RWUID)) +#define BR_UART_S2_RWUID(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RWUID))) /*! @brief Format value for bitfield UART_S2_RWUID. */ #define BF_UART_S2_RWUID(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_RWUID) & BM_UART_S2_RWUID) /*! @brief Set the RWUID field to a new value. */ -#define BW_UART_S2_RWUID(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RWUID) = (v)) +#define BW_UART_S2_RWUID(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RWUID), v)) /*@}*/ /*! @@ -1347,13 +1354,13 @@ #define BS_UART_S2_RXINV (1U) /*!< Bit field size in bits for UART_S2_RXINV. */ /*! @brief Read current value of the UART_S2_RXINV field. */ -#define BR_UART_S2_RXINV(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXINV)) +#define BR_UART_S2_RXINV(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXINV))) /*! @brief Format value for bitfield UART_S2_RXINV. */ #define BF_UART_S2_RXINV(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_RXINV) & BM_UART_S2_RXINV) /*! @brief Set the RXINV field to a new value. */ -#define BW_UART_S2_RXINV(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXINV) = (v)) +#define BW_UART_S2_RXINV(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXINV), v)) /*@}*/ /*! @@ -1380,13 +1387,13 @@ #define BS_UART_S2_MSBF (1U) /*!< Bit field size in bits for UART_S2_MSBF. */ /*! @brief Read current value of the UART_S2_MSBF field. */ -#define BR_UART_S2_MSBF(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_MSBF)) +#define BR_UART_S2_MSBF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_MSBF))) /*! @brief Format value for bitfield UART_S2_MSBF. */ #define BF_UART_S2_MSBF(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_MSBF) & BM_UART_S2_MSBF) /*! @brief Set the MSBF field to a new value. */ -#define BW_UART_S2_MSBF(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_MSBF) = (v)) +#define BW_UART_S2_MSBF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_MSBF), v)) /*@}*/ /*! @@ -1407,13 +1414,13 @@ #define BS_UART_S2_RXEDGIF (1U) /*!< Bit field size in bits for UART_S2_RXEDGIF. */ /*! @brief Read current value of the UART_S2_RXEDGIF field. */ -#define BR_UART_S2_RXEDGIF(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXEDGIF)) +#define BR_UART_S2_RXEDGIF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXEDGIF))) /*! @brief Format value for bitfield UART_S2_RXEDGIF. */ #define BF_UART_S2_RXEDGIF(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_RXEDGIF) & BM_UART_S2_RXEDGIF) /*! @brief Set the RXEDGIF field to a new value. */ -#define BW_UART_S2_RXEDGIF(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXEDGIF) = (v)) +#define BW_UART_S2_RXEDGIF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXEDGIF), v)) /*@}*/ /*! @@ -1434,13 +1441,13 @@ #define BS_UART_S2_LBKDIF (1U) /*!< Bit field size in bits for UART_S2_LBKDIF. */ /*! @brief Read current value of the UART_S2_LBKDIF field. */ -#define BR_UART_S2_LBKDIF(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDIF)) +#define BR_UART_S2_LBKDIF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDIF))) /*! @brief Format value for bitfield UART_S2_LBKDIF. */ #define BF_UART_S2_LBKDIF(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_LBKDIF) & BM_UART_S2_LBKDIF) /*! @brief Set the LBKDIF field to a new value. */ -#define BW_UART_S2_LBKDIF(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDIF) = (v)) +#define BW_UART_S2_LBKDIF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDIF), v)) /*@}*/ /******************************************************************************* @@ -1479,8 +1486,8 @@ #define HW_UART_C3_ADDR(x) ((x) + 0x6U) #define HW_UART_C3(x) (*(__IO hw_uart_c3_t *) HW_UART_C3_ADDR(x)) -#define HW_UART_C3_RD(x) (HW_UART_C3(x).U) -#define HW_UART_C3_WR(x, v) (HW_UART_C3(x).U = (v)) +#define HW_UART_C3_RD(x) (ADDRESS_READ(hw_uart_c3_t, HW_UART_C3_ADDR(x))) +#define HW_UART_C3_WR(x, v) (ADDRESS_WRITE(hw_uart_c3_t, HW_UART_C3_ADDR(x), v)) #define HW_UART_C3_SET(x, v) (HW_UART_C3_WR(x, HW_UART_C3_RD(x) | (v))) #define HW_UART_C3_CLR(x, v) (HW_UART_C3_WR(x, HW_UART_C3_RD(x) & ~(v))) #define HW_UART_C3_TOG(x, v) (HW_UART_C3_WR(x, HW_UART_C3_RD(x) ^ (v))) @@ -1505,13 +1512,13 @@ #define BS_UART_C3_PEIE (1U) /*!< Bit field size in bits for UART_C3_PEIE. */ /*! @brief Read current value of the UART_C3_PEIE field. */ -#define BR_UART_C3_PEIE(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_PEIE)) +#define BR_UART_C3_PEIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_PEIE))) /*! @brief Format value for bitfield UART_C3_PEIE. */ #define BF_UART_C3_PEIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_PEIE) & BM_UART_C3_PEIE) /*! @brief Set the PEIE field to a new value. */ -#define BW_UART_C3_PEIE(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_PEIE) = (v)) +#define BW_UART_C3_PEIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_PEIE), v)) /*@}*/ /*! @@ -1529,13 +1536,13 @@ #define BS_UART_C3_FEIE (1U) /*!< Bit field size in bits for UART_C3_FEIE. */ /*! @brief Read current value of the UART_C3_FEIE field. */ -#define BR_UART_C3_FEIE(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_FEIE)) +#define BR_UART_C3_FEIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_FEIE))) /*! @brief Format value for bitfield UART_C3_FEIE. */ #define BF_UART_C3_FEIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_FEIE) & BM_UART_C3_FEIE) /*! @brief Set the FEIE field to a new value. */ -#define BW_UART_C3_FEIE(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_FEIE) = (v)) +#define BW_UART_C3_FEIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_FEIE), v)) /*@}*/ /*! @@ -1553,13 +1560,13 @@ #define BS_UART_C3_NEIE (1U) /*!< Bit field size in bits for UART_C3_NEIE. */ /*! @brief Read current value of the UART_C3_NEIE field. */ -#define BR_UART_C3_NEIE(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_NEIE)) +#define BR_UART_C3_NEIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_NEIE))) /*! @brief Format value for bitfield UART_C3_NEIE. */ #define BF_UART_C3_NEIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_NEIE) & BM_UART_C3_NEIE) /*! @brief Set the NEIE field to a new value. */ -#define BW_UART_C3_NEIE(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_NEIE) = (v)) +#define BW_UART_C3_NEIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_NEIE), v)) /*@}*/ /*! @@ -1577,13 +1584,13 @@ #define BS_UART_C3_ORIE (1U) /*!< Bit field size in bits for UART_C3_ORIE. */ /*! @brief Read current value of the UART_C3_ORIE field. */ -#define BR_UART_C3_ORIE(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_ORIE)) +#define BR_UART_C3_ORIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_ORIE))) /*! @brief Format value for bitfield UART_C3_ORIE. */ #define BF_UART_C3_ORIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_ORIE) & BM_UART_C3_ORIE) /*! @brief Set the ORIE field to a new value. */ -#define BW_UART_C3_ORIE(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_ORIE) = (v)) +#define BW_UART_C3_ORIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_ORIE), v)) /*@}*/ /*! @@ -1612,13 +1619,13 @@ #define BS_UART_C3_TXINV (1U) /*!< Bit field size in bits for UART_C3_TXINV. */ /*! @brief Read current value of the UART_C3_TXINV field. */ -#define BR_UART_C3_TXINV(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXINV)) +#define BR_UART_C3_TXINV(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXINV))) /*! @brief Format value for bitfield UART_C3_TXINV. */ #define BF_UART_C3_TXINV(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_TXINV) & BM_UART_C3_TXINV) /*! @brief Set the TXINV field to a new value. */ -#define BW_UART_C3_TXINV(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXINV) = (v)) +#define BW_UART_C3_TXINV(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXINV), v)) /*@}*/ /*! @@ -1644,13 +1651,13 @@ #define BS_UART_C3_TXDIR (1U) /*!< Bit field size in bits for UART_C3_TXDIR. */ /*! @brief Read current value of the UART_C3_TXDIR field. */ -#define BR_UART_C3_TXDIR(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXDIR)) +#define BR_UART_C3_TXDIR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXDIR))) /*! @brief Format value for bitfield UART_C3_TXDIR. */ #define BF_UART_C3_TXDIR(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_TXDIR) & BM_UART_C3_TXDIR) /*! @brief Set the TXDIR field to a new value. */ -#define BW_UART_C3_TXDIR(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXDIR) = (v)) +#define BW_UART_C3_TXDIR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXDIR), v)) /*@}*/ /*! @@ -1669,13 +1676,13 @@ #define BS_UART_C3_T8 (1U) /*!< Bit field size in bits for UART_C3_T8. */ /*! @brief Read current value of the UART_C3_T8 field. */ -#define BR_UART_C3_T8(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_T8)) +#define BR_UART_C3_T8(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_T8))) /*! @brief Format value for bitfield UART_C3_T8. */ #define BF_UART_C3_T8(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_T8) & BM_UART_C3_T8) /*! @brief Set the T8 field to a new value. */ -#define BW_UART_C3_T8(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_T8) = (v)) +#define BW_UART_C3_T8(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_T8), v)) /*@}*/ /*! @@ -1692,7 +1699,7 @@ #define BS_UART_C3_R8 (1U) /*!< Bit field size in bits for UART_C3_R8. */ /*! @brief Read current value of the UART_C3_R8 field. */ -#define BR_UART_C3_R8(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_R8)) +#define BR_UART_C3_R8(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C3_ADDR(x), BP_UART_C3_R8))) /*@}*/ /******************************************************************************* @@ -1737,8 +1744,8 @@ #define HW_UART_D_ADDR(x) ((x) + 0x7U) #define HW_UART_D(x) (*(__IO hw_uart_d_t *) HW_UART_D_ADDR(x)) -#define HW_UART_D_RD(x) (HW_UART_D(x).U) -#define HW_UART_D_WR(x, v) (HW_UART_D(x).U = (v)) +#define HW_UART_D_RD(x) (ADDRESS_READ(hw_uart_d_t, HW_UART_D_ADDR(x))) +#define HW_UART_D_WR(x, v) (ADDRESS_WRITE(hw_uart_d_t, HW_UART_D_ADDR(x), v)) #define HW_UART_D_SET(x, v) (HW_UART_D_WR(x, HW_UART_D_RD(x) | (v))) #define HW_UART_D_CLR(x, v) (HW_UART_D_WR(x, HW_UART_D_RD(x) & ~(v))) #define HW_UART_D_TOG(x, v) (HW_UART_D_WR(x, HW_UART_D_RD(x) ^ (v))) @@ -1800,8 +1807,8 @@ #define HW_UART_MA1_ADDR(x) ((x) + 0x8U) #define HW_UART_MA1(x) (*(__IO hw_uart_ma1_t *) HW_UART_MA1_ADDR(x)) -#define HW_UART_MA1_RD(x) (HW_UART_MA1(x).U) -#define HW_UART_MA1_WR(x, v) (HW_UART_MA1(x).U = (v)) +#define HW_UART_MA1_RD(x) (ADDRESS_READ(hw_uart_ma1_t, HW_UART_MA1_ADDR(x))) +#define HW_UART_MA1_WR(x, v) (ADDRESS_WRITE(hw_uart_ma1_t, HW_UART_MA1_ADDR(x), v)) #define HW_UART_MA1_SET(x, v) (HW_UART_MA1_WR(x, HW_UART_MA1_RD(x) | (v))) #define HW_UART_MA1_CLR(x, v) (HW_UART_MA1_WR(x, HW_UART_MA1_RD(x) & ~(v))) #define HW_UART_MA1_TOG(x, v) (HW_UART_MA1_WR(x, HW_UART_MA1_RD(x) ^ (v))) @@ -1860,8 +1867,8 @@ #define HW_UART_MA2_ADDR(x) ((x) + 0x9U) #define HW_UART_MA2(x) (*(__IO hw_uart_ma2_t *) HW_UART_MA2_ADDR(x)) -#define HW_UART_MA2_RD(x) (HW_UART_MA2(x).U) -#define HW_UART_MA2_WR(x, v) (HW_UART_MA2(x).U = (v)) +#define HW_UART_MA2_RD(x) (ADDRESS_READ(hw_uart_ma2_t, HW_UART_MA2_ADDR(x))) +#define HW_UART_MA2_WR(x, v) (ADDRESS_WRITE(hw_uart_ma2_t, HW_UART_MA2_ADDR(x), v)) #define HW_UART_MA2_SET(x, v) (HW_UART_MA2_WR(x, HW_UART_MA2_RD(x) | (v))) #define HW_UART_MA2_CLR(x, v) (HW_UART_MA2_WR(x, HW_UART_MA2_RD(x) & ~(v))) #define HW_UART_MA2_TOG(x, v) (HW_UART_MA2_WR(x, HW_UART_MA2_RD(x) ^ (v))) @@ -1917,8 +1924,8 @@ #define HW_UART_C4_ADDR(x) ((x) + 0xAU) #define HW_UART_C4(x) (*(__IO hw_uart_c4_t *) HW_UART_C4_ADDR(x)) -#define HW_UART_C4_RD(x) (HW_UART_C4(x).U) -#define HW_UART_C4_WR(x, v) (HW_UART_C4(x).U = (v)) +#define HW_UART_C4_RD(x) (ADDRESS_READ(hw_uart_c4_t, HW_UART_C4_ADDR(x))) +#define HW_UART_C4_WR(x, v) (ADDRESS_WRITE(hw_uart_c4_t, HW_UART_C4_ADDR(x), v)) #define HW_UART_C4_SET(x, v) (HW_UART_C4_WR(x, HW_UART_C4_RD(x) | (v))) #define HW_UART_C4_CLR(x, v) (HW_UART_C4_WR(x, HW_UART_C4_RD(x) & ~(v))) #define HW_UART_C4_TOG(x, v) (HW_UART_C4_WR(x, HW_UART_C4_RD(x) ^ (v))) @@ -1940,7 +1947,7 @@ #define BS_UART_C4_BRFA (5U) /*!< Bit field size in bits for UART_C4_BRFA. */ /*! @brief Read current value of the UART_C4_BRFA field. */ -#define BR_UART_C4_BRFA(x) (HW_UART_C4(x).B.BRFA) +#define BR_UART_C4_BRFA(x) (UNION_READ(hw_uart_c4_t, HW_UART_C4_ADDR(x), U, B.BRFA)) /*! @brief Format value for bitfield UART_C4_BRFA. */ #define BF_UART_C4_BRFA(v) ((uint8_t)((uint8_t)(v) << BP_UART_C4_BRFA) & BM_UART_C4_BRFA) @@ -1968,13 +1975,13 @@ #define BS_UART_C4_M10 (1U) /*!< Bit field size in bits for UART_C4_M10. */ /*! @brief Read current value of the UART_C4_M10 field. */ -#define BR_UART_C4_M10(x) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_M10)) +#define BR_UART_C4_M10(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C4_ADDR(x), BP_UART_C4_M10))) /*! @brief Format value for bitfield UART_C4_M10. */ #define BF_UART_C4_M10(v) ((uint8_t)((uint8_t)(v) << BP_UART_C4_M10) & BM_UART_C4_M10) /*! @brief Set the M10 field to a new value. */ -#define BW_UART_C4_M10(x, v) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_M10) = (v)) +#define BW_UART_C4_M10(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C4_ADDR(x), BP_UART_C4_M10), v)) /*@}*/ /*! @@ -1996,13 +2003,13 @@ #define BS_UART_C4_MAEN2 (1U) /*!< Bit field size in bits for UART_C4_MAEN2. */ /*! @brief Read current value of the UART_C4_MAEN2 field. */ -#define BR_UART_C4_MAEN2(x) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN2)) +#define BR_UART_C4_MAEN2(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN2))) /*! @brief Format value for bitfield UART_C4_MAEN2. */ #define BF_UART_C4_MAEN2(v) ((uint8_t)((uint8_t)(v) << BP_UART_C4_MAEN2) & BM_UART_C4_MAEN2) /*! @brief Set the MAEN2 field to a new value. */ -#define BW_UART_C4_MAEN2(x, v) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN2) = (v)) +#define BW_UART_C4_MAEN2(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN2), v)) /*@}*/ /*! @@ -2024,13 +2031,13 @@ #define BS_UART_C4_MAEN1 (1U) /*!< Bit field size in bits for UART_C4_MAEN1. */ /*! @brief Read current value of the UART_C4_MAEN1 field. */ -#define BR_UART_C4_MAEN1(x) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN1)) +#define BR_UART_C4_MAEN1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN1))) /*! @brief Format value for bitfield UART_C4_MAEN1. */ #define BF_UART_C4_MAEN1(v) ((uint8_t)((uint8_t)(v) << BP_UART_C4_MAEN1) & BM_UART_C4_MAEN1) /*! @brief Set the MAEN1 field to a new value. */ -#define BW_UART_C4_MAEN1(x, v) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN1) = (v)) +#define BW_UART_C4_MAEN1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN1), v)) /*@}*/ /******************************************************************************* @@ -2063,8 +2070,8 @@ #define HW_UART_C5_ADDR(x) ((x) + 0xBU) #define HW_UART_C5(x) (*(__IO hw_uart_c5_t *) HW_UART_C5_ADDR(x)) -#define HW_UART_C5_RD(x) (HW_UART_C5(x).U) -#define HW_UART_C5_WR(x, v) (HW_UART_C5(x).U = (v)) +#define HW_UART_C5_RD(x) (ADDRESS_READ(hw_uart_c5_t, HW_UART_C5_ADDR(x))) +#define HW_UART_C5_WR(x, v) (ADDRESS_WRITE(hw_uart_c5_t, HW_UART_C5_ADDR(x), v)) #define HW_UART_C5_SET(x, v) (HW_UART_C5_WR(x, HW_UART_C5_RD(x) | (v))) #define HW_UART_C5_CLR(x, v) (HW_UART_C5_WR(x, HW_UART_C5_RD(x) & ~(v))) #define HW_UART_C5_TOG(x, v) (HW_UART_C5_WR(x, HW_UART_C5_RD(x) ^ (v))) @@ -2094,13 +2101,13 @@ #define BS_UART_C5_LBKDDMAS (1U) /*!< Bit field size in bits for UART_C5_LBKDDMAS. */ /*! @brief Read current value of the UART_C5_LBKDDMAS field. */ -#define BR_UART_C5_LBKDDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_LBKDDMAS)) +#define BR_UART_C5_LBKDDMAS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_LBKDDMAS))) /*! @brief Format value for bitfield UART_C5_LBKDDMAS. */ #define BF_UART_C5_LBKDDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_LBKDDMAS) & BM_UART_C5_LBKDDMAS) /*! @brief Set the LBKDDMAS field to a new value. */ -#define BW_UART_C5_LBKDDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_LBKDDMAS) = (v)) +#define BW_UART_C5_LBKDDMAS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_LBKDDMAS), v)) /*@}*/ /*! @@ -2123,13 +2130,13 @@ #define BS_UART_C5_ILDMAS (1U) /*!< Bit field size in bits for UART_C5_ILDMAS. */ /*! @brief Read current value of the UART_C5_ILDMAS field. */ -#define BR_UART_C5_ILDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_ILDMAS)) +#define BR_UART_C5_ILDMAS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_ILDMAS))) /*! @brief Format value for bitfield UART_C5_ILDMAS. */ #define BF_UART_C5_ILDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_ILDMAS) & BM_UART_C5_ILDMAS) /*! @brief Set the ILDMAS field to a new value. */ -#define BW_UART_C5_ILDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_ILDMAS) = (v)) +#define BW_UART_C5_ILDMAS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_ILDMAS), v)) /*@}*/ /*! @@ -2152,13 +2159,13 @@ #define BS_UART_C5_RDMAS (1U) /*!< Bit field size in bits for UART_C5_RDMAS. */ /*! @brief Read current value of the UART_C5_RDMAS field. */ -#define BR_UART_C5_RDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_RDMAS)) +#define BR_UART_C5_RDMAS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_RDMAS))) /*! @brief Format value for bitfield UART_C5_RDMAS. */ #define BF_UART_C5_RDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_RDMAS) & BM_UART_C5_RDMAS) /*! @brief Set the RDMAS field to a new value. */ -#define BW_UART_C5_RDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_RDMAS) = (v)) +#define BW_UART_C5_RDMAS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_RDMAS), v)) /*@}*/ /*! @@ -2182,13 +2189,13 @@ #define BS_UART_C5_TCDMAS (1U) /*!< Bit field size in bits for UART_C5_TCDMAS. */ /*! @brief Read current value of the UART_C5_TCDMAS field. */ -#define BR_UART_C5_TCDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TCDMAS)) +#define BR_UART_C5_TCDMAS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TCDMAS))) /*! @brief Format value for bitfield UART_C5_TCDMAS. */ #define BF_UART_C5_TCDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_TCDMAS) & BM_UART_C5_TCDMAS) /*! @brief Set the TCDMAS field to a new value. */ -#define BW_UART_C5_TCDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TCDMAS) = (v)) +#define BW_UART_C5_TCDMAS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TCDMAS), v)) /*@}*/ /*! @@ -2213,13 +2220,13 @@ #define BS_UART_C5_TDMAS (1U) /*!< Bit field size in bits for UART_C5_TDMAS. */ /*! @brief Read current value of the UART_C5_TDMAS field. */ -#define BR_UART_C5_TDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TDMAS)) +#define BR_UART_C5_TDMAS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TDMAS))) /*! @brief Format value for bitfield UART_C5_TDMAS. */ #define BF_UART_C5_TDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_TDMAS) & BM_UART_C5_TDMAS) /*! @brief Set the TDMAS field to a new value. */ -#define BW_UART_C5_TDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TDMAS) = (v)) +#define BW_UART_C5_TDMAS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TDMAS), v)) /*@}*/ /******************************************************************************* @@ -2259,7 +2266,7 @@ #define HW_UART_ED_ADDR(x) ((x) + 0xCU) #define HW_UART_ED(x) (*(__I hw_uart_ed_t *) HW_UART_ED_ADDR(x)) -#define HW_UART_ED_RD(x) (HW_UART_ED(x).U) +#define HW_UART_ED_RD(x) (ADDRESS_READ(hw_uart_ed_t, HW_UART_ED_ADDR(x))) /*@}*/ /* @@ -2282,7 +2289,7 @@ #define BS_UART_ED_PARITYE (1U) /*!< Bit field size in bits for UART_ED_PARITYE. */ /*! @brief Read current value of the UART_ED_PARITYE field. */ -#define BR_UART_ED_PARITYE(x) (BITBAND_ACCESS8(HW_UART_ED_ADDR(x), BP_UART_ED_PARITYE)) +#define BR_UART_ED_PARITYE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_ED_ADDR(x), BP_UART_ED_PARITYE))) /*@}*/ /*! @@ -2301,7 +2308,7 @@ #define BS_UART_ED_NOISY (1U) /*!< Bit field size in bits for UART_ED_NOISY. */ /*! @brief Read current value of the UART_ED_NOISY field. */ -#define BR_UART_ED_NOISY(x) (BITBAND_ACCESS8(HW_UART_ED_ADDR(x), BP_UART_ED_NOISY)) +#define BR_UART_ED_NOISY(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_ED_ADDR(x), BP_UART_ED_NOISY))) /*@}*/ /******************************************************************************* @@ -2338,8 +2345,8 @@ #define HW_UART_MODEM_ADDR(x) ((x) + 0xDU) #define HW_UART_MODEM(x) (*(__IO hw_uart_modem_t *) HW_UART_MODEM_ADDR(x)) -#define HW_UART_MODEM_RD(x) (HW_UART_MODEM(x).U) -#define HW_UART_MODEM_WR(x, v) (HW_UART_MODEM(x).U = (v)) +#define HW_UART_MODEM_RD(x) (ADDRESS_READ(hw_uart_modem_t, HW_UART_MODEM_ADDR(x))) +#define HW_UART_MODEM_WR(x, v) (ADDRESS_WRITE(hw_uart_modem_t, HW_UART_MODEM_ADDR(x), v)) #define HW_UART_MODEM_SET(x, v) (HW_UART_MODEM_WR(x, HW_UART_MODEM_RD(x) | (v))) #define HW_UART_MODEM_CLR(x, v) (HW_UART_MODEM_WR(x, HW_UART_MODEM_RD(x) & ~(v))) #define HW_UART_MODEM_TOG(x, v) (HW_UART_MODEM_WR(x, HW_UART_MODEM_RD(x) ^ (v))) @@ -2369,13 +2376,13 @@ #define BS_UART_MODEM_TXCTSE (1U) /*!< Bit field size in bits for UART_MODEM_TXCTSE. */ /*! @brief Read current value of the UART_MODEM_TXCTSE field. */ -#define BR_UART_MODEM_TXCTSE(x) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXCTSE)) +#define BR_UART_MODEM_TXCTSE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXCTSE))) /*! @brief Format value for bitfield UART_MODEM_TXCTSE. */ #define BF_UART_MODEM_TXCTSE(v) ((uint8_t)((uint8_t)(v) << BP_UART_MODEM_TXCTSE) & BM_UART_MODEM_TXCTSE) /*! @brief Set the TXCTSE field to a new value. */ -#define BW_UART_MODEM_TXCTSE(x, v) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXCTSE) = (v)) +#define BW_UART_MODEM_TXCTSE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXCTSE), v)) /*@}*/ /*! @@ -2396,13 +2403,13 @@ #define BS_UART_MODEM_TXRTSE (1U) /*!< Bit field size in bits for UART_MODEM_TXRTSE. */ /*! @brief Read current value of the UART_MODEM_TXRTSE field. */ -#define BR_UART_MODEM_TXRTSE(x) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSE)) +#define BR_UART_MODEM_TXRTSE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSE))) /*! @brief Format value for bitfield UART_MODEM_TXRTSE. */ #define BF_UART_MODEM_TXRTSE(v) ((uint8_t)((uint8_t)(v) << BP_UART_MODEM_TXRTSE) & BM_UART_MODEM_TXRTSE) /*! @brief Set the TXRTSE field to a new value. */ -#define BW_UART_MODEM_TXRTSE(x, v) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSE) = (v)) +#define BW_UART_MODEM_TXRTSE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSE), v)) /*@}*/ /*! @@ -2422,13 +2429,13 @@ #define BS_UART_MODEM_TXRTSPOL (1U) /*!< Bit field size in bits for UART_MODEM_TXRTSPOL. */ /*! @brief Read current value of the UART_MODEM_TXRTSPOL field. */ -#define BR_UART_MODEM_TXRTSPOL(x) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSPOL)) +#define BR_UART_MODEM_TXRTSPOL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSPOL))) /*! @brief Format value for bitfield UART_MODEM_TXRTSPOL. */ #define BF_UART_MODEM_TXRTSPOL(v) ((uint8_t)((uint8_t)(v) << BP_UART_MODEM_TXRTSPOL) & BM_UART_MODEM_TXRTSPOL) /*! @brief Set the TXRTSPOL field to a new value. */ -#define BW_UART_MODEM_TXRTSPOL(x, v) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSPOL) = (v)) +#define BW_UART_MODEM_TXRTSPOL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSPOL), v)) /*@}*/ /*! @@ -2450,13 +2457,13 @@ #define BS_UART_MODEM_RXRTSE (1U) /*!< Bit field size in bits for UART_MODEM_RXRTSE. */ /*! @brief Read current value of the UART_MODEM_RXRTSE field. */ -#define BR_UART_MODEM_RXRTSE(x) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_RXRTSE)) +#define BR_UART_MODEM_RXRTSE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_RXRTSE))) /*! @brief Format value for bitfield UART_MODEM_RXRTSE. */ #define BF_UART_MODEM_RXRTSE(v) ((uint8_t)((uint8_t)(v) << BP_UART_MODEM_RXRTSE) & BM_UART_MODEM_RXRTSE) /*! @brief Set the RXRTSE field to a new value. */ -#define BW_UART_MODEM_RXRTSE(x, v) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_RXRTSE) = (v)) +#define BW_UART_MODEM_RXRTSE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_RXRTSE), v)) /*@}*/ /******************************************************************************* @@ -2488,8 +2495,8 @@ #define HW_UART_IR_ADDR(x) ((x) + 0xEU) #define HW_UART_IR(x) (*(__IO hw_uart_ir_t *) HW_UART_IR_ADDR(x)) -#define HW_UART_IR_RD(x) (HW_UART_IR(x).U) -#define HW_UART_IR_WR(x, v) (HW_UART_IR(x).U = (v)) +#define HW_UART_IR_RD(x) (ADDRESS_READ(hw_uart_ir_t, HW_UART_IR_ADDR(x))) +#define HW_UART_IR_WR(x, v) (ADDRESS_WRITE(hw_uart_ir_t, HW_UART_IR_ADDR(x), v)) #define HW_UART_IR_SET(x, v) (HW_UART_IR_WR(x, HW_UART_IR_RD(x) | (v))) #define HW_UART_IR_CLR(x, v) (HW_UART_IR_WR(x, HW_UART_IR_RD(x) & ~(v))) #define HW_UART_IR_TOG(x, v) (HW_UART_IR_WR(x, HW_UART_IR_RD(x) ^ (v))) @@ -2516,7 +2523,7 @@ #define BS_UART_IR_TNP (2U) /*!< Bit field size in bits for UART_IR_TNP. */ /*! @brief Read current value of the UART_IR_TNP field. */ -#define BR_UART_IR_TNP(x) (HW_UART_IR(x).B.TNP) +#define BR_UART_IR_TNP(x) (UNION_READ(hw_uart_ir_t, HW_UART_IR_ADDR(x), U, B.TNP)) /*! @brief Format value for bitfield UART_IR_TNP. */ #define BF_UART_IR_TNP(v) ((uint8_t)((uint8_t)(v) << BP_UART_IR_TNP) & BM_UART_IR_TNP) @@ -2540,13 +2547,13 @@ #define BS_UART_IR_IREN (1U) /*!< Bit field size in bits for UART_IR_IREN. */ /*! @brief Read current value of the UART_IR_IREN field. */ -#define BR_UART_IR_IREN(x) (BITBAND_ACCESS8(HW_UART_IR_ADDR(x), BP_UART_IR_IREN)) +#define BR_UART_IR_IREN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IR_ADDR(x), BP_UART_IR_IREN))) /*! @brief Format value for bitfield UART_IR_IREN. */ #define BF_UART_IR_IREN(v) ((uint8_t)((uint8_t)(v) << BP_UART_IR_IREN) & BM_UART_IR_IREN) /*! @brief Set the IREN field to a new value. */ -#define BW_UART_IR_IREN(x, v) (BITBAND_ACCESS8(HW_UART_IR_ADDR(x), BP_UART_IR_IREN) = (v)) +#define BW_UART_IR_IREN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IR_ADDR(x), BP_UART_IR_IREN), v)) /*@}*/ /******************************************************************************* @@ -2583,8 +2590,8 @@ #define HW_UART_PFIFO_ADDR(x) ((x) + 0x10U) #define HW_UART_PFIFO(x) (*(__IO hw_uart_pfifo_t *) HW_UART_PFIFO_ADDR(x)) -#define HW_UART_PFIFO_RD(x) (HW_UART_PFIFO(x).U) -#define HW_UART_PFIFO_WR(x, v) (HW_UART_PFIFO(x).U = (v)) +#define HW_UART_PFIFO_RD(x) (ADDRESS_READ(hw_uart_pfifo_t, HW_UART_PFIFO_ADDR(x))) +#define HW_UART_PFIFO_WR(x, v) (ADDRESS_WRITE(hw_uart_pfifo_t, HW_UART_PFIFO_ADDR(x), v)) #define HW_UART_PFIFO_SET(x, v) (HW_UART_PFIFO_WR(x, HW_UART_PFIFO_RD(x) | (v))) #define HW_UART_PFIFO_CLR(x, v) (HW_UART_PFIFO_WR(x, HW_UART_PFIFO_RD(x) & ~(v))) #define HW_UART_PFIFO_TOG(x, v) (HW_UART_PFIFO_WR(x, HW_UART_PFIFO_RD(x) ^ (v))) @@ -2616,7 +2623,7 @@ #define BS_UART_PFIFO_RXFIFOSIZE (3U) /*!< Bit field size in bits for UART_PFIFO_RXFIFOSIZE. */ /*! @brief Read current value of the UART_PFIFO_RXFIFOSIZE field. */ -#define BR_UART_PFIFO_RXFIFOSIZE(x) (HW_UART_PFIFO(x).B.RXFIFOSIZE) +#define BR_UART_PFIFO_RXFIFOSIZE(x) (UNION_READ(hw_uart_pfifo_t, HW_UART_PFIFO_ADDR(x), U, B.RXFIFOSIZE)) /*@}*/ /*! @@ -2639,13 +2646,13 @@ #define BS_UART_PFIFO_RXFE (1U) /*!< Bit field size in bits for UART_PFIFO_RXFE. */ /*! @brief Read current value of the UART_PFIFO_RXFE field. */ -#define BR_UART_PFIFO_RXFE(x) (BITBAND_ACCESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_RXFE)) +#define BR_UART_PFIFO_RXFE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_RXFE))) /*! @brief Format value for bitfield UART_PFIFO_RXFE. */ #define BF_UART_PFIFO_RXFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_PFIFO_RXFE) & BM_UART_PFIFO_RXFE) /*! @brief Set the RXFE field to a new value. */ -#define BW_UART_PFIFO_RXFE(x, v) (BITBAND_ACCESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_RXFE) = (v)) +#define BW_UART_PFIFO_RXFE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_RXFE), v)) /*@}*/ /*! @@ -2670,7 +2677,7 @@ #define BS_UART_PFIFO_TXFIFOSIZE (3U) /*!< Bit field size in bits for UART_PFIFO_TXFIFOSIZE. */ /*! @brief Read current value of the UART_PFIFO_TXFIFOSIZE field. */ -#define BR_UART_PFIFO_TXFIFOSIZE(x) (HW_UART_PFIFO(x).B.TXFIFOSIZE) +#define BR_UART_PFIFO_TXFIFOSIZE(x) (UNION_READ(hw_uart_pfifo_t, HW_UART_PFIFO_ADDR(x), U, B.TXFIFOSIZE)) /*@}*/ /*! @@ -2693,13 +2700,13 @@ #define BS_UART_PFIFO_TXFE (1U) /*!< Bit field size in bits for UART_PFIFO_TXFE. */ /*! @brief Read current value of the UART_PFIFO_TXFE field. */ -#define BR_UART_PFIFO_TXFE(x) (BITBAND_ACCESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_TXFE)) +#define BR_UART_PFIFO_TXFE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_TXFE))) /*! @brief Format value for bitfield UART_PFIFO_TXFE. */ #define BF_UART_PFIFO_TXFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_PFIFO_TXFE) & BM_UART_PFIFO_TXFE) /*! @brief Set the TXFE field to a new value. */ -#define BW_UART_PFIFO_TXFE(x, v) (BITBAND_ACCESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_TXFE) = (v)) +#define BW_UART_PFIFO_TXFE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_TXFE), v)) /*@}*/ /******************************************************************************* @@ -2738,8 +2745,8 @@ #define HW_UART_CFIFO_ADDR(x) ((x) + 0x11U) #define HW_UART_CFIFO(x) (*(__IO hw_uart_cfifo_t *) HW_UART_CFIFO_ADDR(x)) -#define HW_UART_CFIFO_RD(x) (HW_UART_CFIFO(x).U) -#define HW_UART_CFIFO_WR(x, v) (HW_UART_CFIFO(x).U = (v)) +#define HW_UART_CFIFO_RD(x) (ADDRESS_READ(hw_uart_cfifo_t, HW_UART_CFIFO_ADDR(x))) +#define HW_UART_CFIFO_WR(x, v) (ADDRESS_WRITE(hw_uart_cfifo_t, HW_UART_CFIFO_ADDR(x), v)) #define HW_UART_CFIFO_SET(x, v) (HW_UART_CFIFO_WR(x, HW_UART_CFIFO_RD(x) | (v))) #define HW_UART_CFIFO_CLR(x, v) (HW_UART_CFIFO_WR(x, HW_UART_CFIFO_RD(x) & ~(v))) #define HW_UART_CFIFO_TOG(x, v) (HW_UART_CFIFO_WR(x, HW_UART_CFIFO_RD(x) ^ (v))) @@ -2764,13 +2771,13 @@ #define BS_UART_CFIFO_RXUFE (1U) /*!< Bit field size in bits for UART_CFIFO_RXUFE. */ /*! @brief Read current value of the UART_CFIFO_RXUFE field. */ -#define BR_UART_CFIFO_RXUFE(x) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXUFE)) +#define BR_UART_CFIFO_RXUFE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXUFE))) /*! @brief Format value for bitfield UART_CFIFO_RXUFE. */ #define BF_UART_CFIFO_RXUFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_RXUFE) & BM_UART_CFIFO_RXUFE) /*! @brief Set the RXUFE field to a new value. */ -#define BW_UART_CFIFO_RXUFE(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXUFE) = (v)) +#define BW_UART_CFIFO_RXUFE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXUFE), v)) /*@}*/ /*! @@ -2788,13 +2795,13 @@ #define BS_UART_CFIFO_TXOFE (1U) /*!< Bit field size in bits for UART_CFIFO_TXOFE. */ /*! @brief Read current value of the UART_CFIFO_TXOFE field. */ -#define BR_UART_CFIFO_TXOFE(x) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_TXOFE)) +#define BR_UART_CFIFO_TXOFE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_TXOFE))) /*! @brief Format value for bitfield UART_CFIFO_TXOFE. */ #define BF_UART_CFIFO_TXOFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_TXOFE) & BM_UART_CFIFO_TXOFE) /*! @brief Set the TXOFE field to a new value. */ -#define BW_UART_CFIFO_TXOFE(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_TXOFE) = (v)) +#define BW_UART_CFIFO_TXOFE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_TXOFE), v)) /*@}*/ /*! @@ -2812,13 +2819,13 @@ #define BS_UART_CFIFO_RXOFE (1U) /*!< Bit field size in bits for UART_CFIFO_RXOFE. */ /*! @brief Read current value of the UART_CFIFO_RXOFE field. */ -#define BR_UART_CFIFO_RXOFE(x) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXOFE)) +#define BR_UART_CFIFO_RXOFE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXOFE))) /*! @brief Format value for bitfield UART_CFIFO_RXOFE. */ #define BF_UART_CFIFO_RXOFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_RXOFE) & BM_UART_CFIFO_RXOFE) /*! @brief Set the RXOFE field to a new value. */ -#define BW_UART_CFIFO_RXOFE(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXOFE) = (v)) +#define BW_UART_CFIFO_RXOFE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXOFE), v)) /*@}*/ /*! @@ -2841,7 +2848,7 @@ #define BF_UART_CFIFO_RXFLUSH(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_RXFLUSH) & BM_UART_CFIFO_RXFLUSH) /*! @brief Set the RXFLUSH field to a new value. */ -#define BW_UART_CFIFO_RXFLUSH(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXFLUSH) = (v)) +#define BW_UART_CFIFO_RXFLUSH(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXFLUSH), v)) /*@}*/ /*! @@ -2864,7 +2871,7 @@ #define BF_UART_CFIFO_TXFLUSH(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_TXFLUSH) & BM_UART_CFIFO_TXFLUSH) /*! @brief Set the TXFLUSH field to a new value. */ -#define BW_UART_CFIFO_TXFLUSH(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_TXFLUSH) = (v)) +#define BW_UART_CFIFO_TXFLUSH(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_TXFLUSH), v)) /*@}*/ /******************************************************************************* @@ -2901,8 +2908,8 @@ #define HW_UART_SFIFO_ADDR(x) ((x) + 0x12U) #define HW_UART_SFIFO(x) (*(__IO hw_uart_sfifo_t *) HW_UART_SFIFO_ADDR(x)) -#define HW_UART_SFIFO_RD(x) (HW_UART_SFIFO(x).U) -#define HW_UART_SFIFO_WR(x, v) (HW_UART_SFIFO(x).U = (v)) +#define HW_UART_SFIFO_RD(x) (ADDRESS_READ(hw_uart_sfifo_t, HW_UART_SFIFO_ADDR(x))) +#define HW_UART_SFIFO_WR(x, v) (ADDRESS_WRITE(hw_uart_sfifo_t, HW_UART_SFIFO_ADDR(x), v)) #define HW_UART_SFIFO_SET(x, v) (HW_UART_SFIFO_WR(x, HW_UART_SFIFO_RD(x) | (v))) #define HW_UART_SFIFO_CLR(x, v) (HW_UART_SFIFO_WR(x, HW_UART_SFIFO_RD(x) & ~(v))) #define HW_UART_SFIFO_TOG(x, v) (HW_UART_SFIFO_WR(x, HW_UART_SFIFO_RD(x) ^ (v))) @@ -2932,13 +2939,13 @@ #define BS_UART_SFIFO_RXUF (1U) /*!< Bit field size in bits for UART_SFIFO_RXUF. */ /*! @brief Read current value of the UART_SFIFO_RXUF field. */ -#define BR_UART_SFIFO_RXUF(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXUF)) +#define BR_UART_SFIFO_RXUF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXUF))) /*! @brief Format value for bitfield UART_SFIFO_RXUF. */ #define BF_UART_SFIFO_RXUF(v) ((uint8_t)((uint8_t)(v) << BP_UART_SFIFO_RXUF) & BM_UART_SFIFO_RXUF) /*! @brief Set the RXUF field to a new value. */ -#define BW_UART_SFIFO_RXUF(x, v) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXUF) = (v)) +#define BW_UART_SFIFO_RXUF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXUF), v)) /*@}*/ /*! @@ -2961,13 +2968,13 @@ #define BS_UART_SFIFO_TXOF (1U) /*!< Bit field size in bits for UART_SFIFO_TXOF. */ /*! @brief Read current value of the UART_SFIFO_TXOF field. */ -#define BR_UART_SFIFO_TXOF(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_TXOF)) +#define BR_UART_SFIFO_TXOF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_TXOF))) /*! @brief Format value for bitfield UART_SFIFO_TXOF. */ #define BF_UART_SFIFO_TXOF(v) ((uint8_t)((uint8_t)(v) << BP_UART_SFIFO_TXOF) & BM_UART_SFIFO_TXOF) /*! @brief Set the TXOF field to a new value. */ -#define BW_UART_SFIFO_TXOF(x, v) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_TXOF) = (v)) +#define BW_UART_SFIFO_TXOF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_TXOF), v)) /*@}*/ /*! @@ -2990,13 +2997,13 @@ #define BS_UART_SFIFO_RXOF (1U) /*!< Bit field size in bits for UART_SFIFO_RXOF. */ /*! @brief Read current value of the UART_SFIFO_RXOF field. */ -#define BR_UART_SFIFO_RXOF(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXOF)) +#define BR_UART_SFIFO_RXOF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXOF))) /*! @brief Format value for bitfield UART_SFIFO_RXOF. */ #define BF_UART_SFIFO_RXOF(v) ((uint8_t)((uint8_t)(v) << BP_UART_SFIFO_RXOF) & BM_UART_SFIFO_RXOF) /*! @brief Set the RXOF field to a new value. */ -#define BW_UART_SFIFO_RXOF(x, v) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXOF) = (v)) +#define BW_UART_SFIFO_RXOF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXOF), v)) /*@}*/ /*! @@ -3015,7 +3022,7 @@ #define BS_UART_SFIFO_RXEMPT (1U) /*!< Bit field size in bits for UART_SFIFO_RXEMPT. */ /*! @brief Read current value of the UART_SFIFO_RXEMPT field. */ -#define BR_UART_SFIFO_RXEMPT(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXEMPT)) +#define BR_UART_SFIFO_RXEMPT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXEMPT))) /*@}*/ /*! @@ -3034,7 +3041,7 @@ #define BS_UART_SFIFO_TXEMPT (1U) /*!< Bit field size in bits for UART_SFIFO_TXEMPT. */ /*! @brief Read current value of the UART_SFIFO_TXEMPT field. */ -#define BR_UART_SFIFO_TXEMPT(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_TXEMPT)) +#define BR_UART_SFIFO_TXEMPT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_TXEMPT))) /*@}*/ /******************************************************************************* @@ -3067,8 +3074,8 @@ #define HW_UART_TWFIFO_ADDR(x) ((x) + 0x13U) #define HW_UART_TWFIFO(x) (*(__IO hw_uart_twfifo_t *) HW_UART_TWFIFO_ADDR(x)) -#define HW_UART_TWFIFO_RD(x) (HW_UART_TWFIFO(x).U) -#define HW_UART_TWFIFO_WR(x, v) (HW_UART_TWFIFO(x).U = (v)) +#define HW_UART_TWFIFO_RD(x) (ADDRESS_READ(hw_uart_twfifo_t, HW_UART_TWFIFO_ADDR(x))) +#define HW_UART_TWFIFO_WR(x, v) (ADDRESS_WRITE(hw_uart_twfifo_t, HW_UART_TWFIFO_ADDR(x), v)) #define HW_UART_TWFIFO_SET(x, v) (HW_UART_TWFIFO_WR(x, HW_UART_TWFIFO_RD(x) | (v))) #define HW_UART_TWFIFO_CLR(x, v) (HW_UART_TWFIFO_WR(x, HW_UART_TWFIFO_RD(x) & ~(v))) #define HW_UART_TWFIFO_TOG(x, v) (HW_UART_TWFIFO_WR(x, HW_UART_TWFIFO_RD(x) ^ (v))) @@ -3130,7 +3137,7 @@ #define HW_UART_TCFIFO_ADDR(x) ((x) + 0x14U) #define HW_UART_TCFIFO(x) (*(__I hw_uart_tcfifo_t *) HW_UART_TCFIFO_ADDR(x)) -#define HW_UART_TCFIFO_RD(x) (HW_UART_TCFIFO(x).U) +#define HW_UART_TCFIFO_RD(x) (ADDRESS_READ(hw_uart_tcfifo_t, HW_UART_TCFIFO_ADDR(x))) /*@}*/ /* @@ -3185,8 +3192,8 @@ #define HW_UART_RWFIFO_ADDR(x) ((x) + 0x15U) #define HW_UART_RWFIFO(x) (*(__IO hw_uart_rwfifo_t *) HW_UART_RWFIFO_ADDR(x)) -#define HW_UART_RWFIFO_RD(x) (HW_UART_RWFIFO(x).U) -#define HW_UART_RWFIFO_WR(x, v) (HW_UART_RWFIFO(x).U = (v)) +#define HW_UART_RWFIFO_RD(x) (ADDRESS_READ(hw_uart_rwfifo_t, HW_UART_RWFIFO_ADDR(x))) +#define HW_UART_RWFIFO_WR(x, v) (ADDRESS_WRITE(hw_uart_rwfifo_t, HW_UART_RWFIFO_ADDR(x), v)) #define HW_UART_RWFIFO_SET(x, v) (HW_UART_RWFIFO_WR(x, HW_UART_RWFIFO_RD(x) | (v))) #define HW_UART_RWFIFO_CLR(x, v) (HW_UART_RWFIFO_WR(x, HW_UART_RWFIFO_RD(x) & ~(v))) #define HW_UART_RWFIFO_TOG(x, v) (HW_UART_RWFIFO_WR(x, HW_UART_RWFIFO_RD(x) ^ (v))) @@ -3249,7 +3256,7 @@ #define HW_UART_RCFIFO_ADDR(x) ((x) + 0x16U) #define HW_UART_RCFIFO(x) (*(__I hw_uart_rcfifo_t *) HW_UART_RCFIFO_ADDR(x)) -#define HW_UART_RCFIFO_RD(x) (HW_UART_RCFIFO(x).U) +#define HW_UART_RCFIFO_RD(x) (ADDRESS_READ(hw_uart_rcfifo_t, HW_UART_RCFIFO_ADDR(x))) /*@}*/ /* @@ -3310,8 +3317,8 @@ #define HW_UART_C7816_ADDR(x) ((x) + 0x18U) #define HW_UART_C7816(x) (*(__IO hw_uart_c7816_t *) HW_UART_C7816_ADDR(x)) -#define HW_UART_C7816_RD(x) (HW_UART_C7816(x).U) -#define HW_UART_C7816_WR(x, v) (HW_UART_C7816(x).U = (v)) +#define HW_UART_C7816_RD(x) (ADDRESS_READ(hw_uart_c7816_t, HW_UART_C7816_ADDR(x))) +#define HW_UART_C7816_WR(x, v) (ADDRESS_WRITE(hw_uart_c7816_t, HW_UART_C7816_ADDR(x), v)) #define HW_UART_C7816_SET(x, v) (HW_UART_C7816_WR(x, HW_UART_C7816_RD(x) | (v))) #define HW_UART_C7816_CLR(x, v) (HW_UART_C7816_WR(x, HW_UART_C7816_RD(x) & ~(v))) #define HW_UART_C7816_TOG(x, v) (HW_UART_C7816_WR(x, HW_UART_C7816_RD(x) ^ (v))) @@ -3339,13 +3346,13 @@ #define BS_UART_C7816_ISO_7816E (1U) /*!< Bit field size in bits for UART_C7816_ISO_7816E. */ /*! @brief Read current value of the UART_C7816_ISO_7816E field. */ -#define BR_UART_C7816_ISO_7816E(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ISO_7816E)) +#define BR_UART_C7816_ISO_7816E(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ISO_7816E))) /*! @brief Format value for bitfield UART_C7816_ISO_7816E. */ #define BF_UART_C7816_ISO_7816E(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_ISO_7816E) & BM_UART_C7816_ISO_7816E) /*! @brief Set the ISO_7816E field to a new value. */ -#define BW_UART_C7816_ISO_7816E(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ISO_7816E) = (v)) +#define BW_UART_C7816_ISO_7816E(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ISO_7816E), v)) /*@}*/ /*! @@ -3364,13 +3371,13 @@ #define BS_UART_C7816_TTYPE (1U) /*!< Bit field size in bits for UART_C7816_TTYPE. */ /*! @brief Read current value of the UART_C7816_TTYPE field. */ -#define BR_UART_C7816_TTYPE(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_TTYPE)) +#define BR_UART_C7816_TTYPE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_TTYPE))) /*! @brief Format value for bitfield UART_C7816_TTYPE. */ #define BF_UART_C7816_TTYPE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_TTYPE) & BM_UART_C7816_TTYPE) /*! @brief Set the TTYPE field to a new value. */ -#define BW_UART_C7816_TTYPE(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_TTYPE) = (v)) +#define BW_UART_C7816_TTYPE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_TTYPE), v)) /*@}*/ /*! @@ -3400,13 +3407,13 @@ #define BS_UART_C7816_INIT (1U) /*!< Bit field size in bits for UART_C7816_INIT. */ /*! @brief Read current value of the UART_C7816_INIT field. */ -#define BR_UART_C7816_INIT(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_INIT)) +#define BR_UART_C7816_INIT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_INIT))) /*! @brief Format value for bitfield UART_C7816_INIT. */ #define BF_UART_C7816_INIT(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_INIT) & BM_UART_C7816_INIT) /*! @brief Set the INIT field to a new value. */ -#define BW_UART_C7816_INIT(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_INIT) = (v)) +#define BW_UART_C7816_INIT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_INIT), v)) /*@}*/ /*! @@ -3429,13 +3436,13 @@ #define BS_UART_C7816_ANACK (1U) /*!< Bit field size in bits for UART_C7816_ANACK. */ /*! @brief Read current value of the UART_C7816_ANACK field. */ -#define BR_UART_C7816_ANACK(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ANACK)) +#define BR_UART_C7816_ANACK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ANACK))) /*! @brief Format value for bitfield UART_C7816_ANACK. */ #define BF_UART_C7816_ANACK(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_ANACK) & BM_UART_C7816_ANACK) /*! @brief Set the ANACK field to a new value. */ -#define BW_UART_C7816_ANACK(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ANACK) = (v)) +#define BW_UART_C7816_ANACK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ANACK), v)) /*@}*/ /*! @@ -3460,13 +3467,13 @@ #define BS_UART_C7816_ONACK (1U) /*!< Bit field size in bits for UART_C7816_ONACK. */ /*! @brief Read current value of the UART_C7816_ONACK field. */ -#define BR_UART_C7816_ONACK(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ONACK)) +#define BR_UART_C7816_ONACK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ONACK))) /*! @brief Format value for bitfield UART_C7816_ONACK. */ #define BF_UART_C7816_ONACK(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_ONACK) & BM_UART_C7816_ONACK) /*! @brief Set the ONACK field to a new value. */ -#define BW_UART_C7816_ONACK(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ONACK) = (v)) +#define BW_UART_C7816_ONACK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ONACK), v)) /*@}*/ /******************************************************************************* @@ -3510,8 +3517,8 @@ #define HW_UART_IE7816_ADDR(x) ((x) + 0x19U) #define HW_UART_IE7816(x) (*(__IO hw_uart_ie7816_t *) HW_UART_IE7816_ADDR(x)) -#define HW_UART_IE7816_RD(x) (HW_UART_IE7816(x).U) -#define HW_UART_IE7816_WR(x, v) (HW_UART_IE7816(x).U = (v)) +#define HW_UART_IE7816_RD(x) (ADDRESS_READ(hw_uart_ie7816_t, HW_UART_IE7816_ADDR(x))) +#define HW_UART_IE7816_WR(x, v) (ADDRESS_WRITE(hw_uart_ie7816_t, HW_UART_IE7816_ADDR(x), v)) #define HW_UART_IE7816_SET(x, v) (HW_UART_IE7816_WR(x, HW_UART_IE7816_RD(x) | (v))) #define HW_UART_IE7816_CLR(x, v) (HW_UART_IE7816_WR(x, HW_UART_IE7816_RD(x) & ~(v))) #define HW_UART_IE7816_TOG(x, v) (HW_UART_IE7816_WR(x, HW_UART_IE7816_RD(x) ^ (v))) @@ -3535,13 +3542,13 @@ #define BS_UART_IE7816_RXTE (1U) /*!< Bit field size in bits for UART_IE7816_RXTE. */ /*! @brief Read current value of the UART_IE7816_RXTE field. */ -#define BR_UART_IE7816_RXTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_RXTE)) +#define BR_UART_IE7816_RXTE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_RXTE))) /*! @brief Format value for bitfield UART_IE7816_RXTE. */ #define BF_UART_IE7816_RXTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_RXTE) & BM_UART_IE7816_RXTE) /*! @brief Set the RXTE field to a new value. */ -#define BW_UART_IE7816_RXTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_RXTE) = (v)) +#define BW_UART_IE7816_RXTE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_RXTE), v)) /*@}*/ /*! @@ -3558,13 +3565,13 @@ #define BS_UART_IE7816_TXTE (1U) /*!< Bit field size in bits for UART_IE7816_TXTE. */ /*! @brief Read current value of the UART_IE7816_TXTE field. */ -#define BR_UART_IE7816_TXTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_TXTE)) +#define BR_UART_IE7816_TXTE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_TXTE))) /*! @brief Format value for bitfield UART_IE7816_TXTE. */ #define BF_UART_IE7816_TXTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_TXTE) & BM_UART_IE7816_TXTE) /*! @brief Set the TXTE field to a new value. */ -#define BW_UART_IE7816_TXTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_TXTE) = (v)) +#define BW_UART_IE7816_TXTE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_TXTE), v)) /*@}*/ /*! @@ -3581,13 +3588,13 @@ #define BS_UART_IE7816_GTVE (1U) /*!< Bit field size in bits for UART_IE7816_GTVE. */ /*! @brief Read current value of the UART_IE7816_GTVE field. */ -#define BR_UART_IE7816_GTVE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_GTVE)) +#define BR_UART_IE7816_GTVE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_GTVE))) /*! @brief Format value for bitfield UART_IE7816_GTVE. */ #define BF_UART_IE7816_GTVE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_GTVE) & BM_UART_IE7816_GTVE) /*! @brief Set the GTVE field to a new value. */ -#define BW_UART_IE7816_GTVE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_GTVE) = (v)) +#define BW_UART_IE7816_GTVE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_GTVE), v)) /*@}*/ /*! @@ -3605,13 +3612,13 @@ #define BS_UART_IE7816_INITDE (1U) /*!< Bit field size in bits for UART_IE7816_INITDE. */ /*! @brief Read current value of the UART_IE7816_INITDE field. */ -#define BR_UART_IE7816_INITDE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_INITDE)) +#define BR_UART_IE7816_INITDE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_INITDE))) /*! @brief Format value for bitfield UART_IE7816_INITDE. */ #define BF_UART_IE7816_INITDE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_INITDE) & BM_UART_IE7816_INITDE) /*! @brief Set the INITDE field to a new value. */ -#define BW_UART_IE7816_INITDE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_INITDE) = (v)) +#define BW_UART_IE7816_INITDE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_INITDE), v)) /*@}*/ /*! @@ -3628,13 +3635,13 @@ #define BS_UART_IE7816_BWTE (1U) /*!< Bit field size in bits for UART_IE7816_BWTE. */ /*! @brief Read current value of the UART_IE7816_BWTE field. */ -#define BR_UART_IE7816_BWTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_BWTE)) +#define BR_UART_IE7816_BWTE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_BWTE))) /*! @brief Format value for bitfield UART_IE7816_BWTE. */ #define BF_UART_IE7816_BWTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_BWTE) & BM_UART_IE7816_BWTE) /*! @brief Set the BWTE field to a new value. */ -#define BW_UART_IE7816_BWTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_BWTE) = (v)) +#define BW_UART_IE7816_BWTE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_BWTE), v)) /*@}*/ /*! @@ -3651,13 +3658,13 @@ #define BS_UART_IE7816_CWTE (1U) /*!< Bit field size in bits for UART_IE7816_CWTE. */ /*! @brief Read current value of the UART_IE7816_CWTE field. */ -#define BR_UART_IE7816_CWTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_CWTE)) +#define BR_UART_IE7816_CWTE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_CWTE))) /*! @brief Format value for bitfield UART_IE7816_CWTE. */ #define BF_UART_IE7816_CWTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_CWTE) & BM_UART_IE7816_CWTE) /*! @brief Set the CWTE field to a new value. */ -#define BW_UART_IE7816_CWTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_CWTE) = (v)) +#define BW_UART_IE7816_CWTE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_CWTE), v)) /*@}*/ /*! @@ -3674,13 +3681,13 @@ #define BS_UART_IE7816_WTE (1U) /*!< Bit field size in bits for UART_IE7816_WTE. */ /*! @brief Read current value of the UART_IE7816_WTE field. */ -#define BR_UART_IE7816_WTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_WTE)) +#define BR_UART_IE7816_WTE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_WTE))) /*! @brief Format value for bitfield UART_IE7816_WTE. */ #define BF_UART_IE7816_WTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_WTE) & BM_UART_IE7816_WTE) /*! @brief Set the WTE field to a new value. */ -#define BW_UART_IE7816_WTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_WTE) = (v)) +#define BW_UART_IE7816_WTE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_WTE), v)) /*@}*/ /******************************************************************************* @@ -3726,8 +3733,8 @@ #define HW_UART_IS7816_ADDR(x) ((x) + 0x1AU) #define HW_UART_IS7816(x) (*(__IO hw_uart_is7816_t *) HW_UART_IS7816_ADDR(x)) -#define HW_UART_IS7816_RD(x) (HW_UART_IS7816(x).U) -#define HW_UART_IS7816_WR(x, v) (HW_UART_IS7816(x).U = (v)) +#define HW_UART_IS7816_RD(x) (ADDRESS_READ(hw_uart_is7816_t, HW_UART_IS7816_ADDR(x))) +#define HW_UART_IS7816_WR(x, v) (ADDRESS_WRITE(hw_uart_is7816_t, HW_UART_IS7816_ADDR(x), v)) #define HW_UART_IS7816_SET(x, v) (HW_UART_IS7816_WR(x, HW_UART_IS7816_RD(x) | (v))) #define HW_UART_IS7816_CLR(x, v) (HW_UART_IS7816_WR(x, HW_UART_IS7816_RD(x) & ~(v))) #define HW_UART_IS7816_TOG(x, v) (HW_UART_IS7816_WR(x, HW_UART_IS7816_RD(x) ^ (v))) @@ -3763,13 +3770,13 @@ #define BS_UART_IS7816_RXT (1U) /*!< Bit field size in bits for UART_IS7816_RXT. */ /*! @brief Read current value of the UART_IS7816_RXT field. */ -#define BR_UART_IS7816_RXT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_RXT)) +#define BR_UART_IS7816_RXT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_RXT))) /*! @brief Format value for bitfield UART_IS7816_RXT. */ #define BF_UART_IS7816_RXT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_RXT) & BM_UART_IS7816_RXT) /*! @brief Set the RXT field to a new value. */ -#define BW_UART_IS7816_RXT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_RXT) = (v)) +#define BW_UART_IS7816_RXT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_RXT), v)) /*@}*/ /*! @@ -3795,13 +3802,13 @@ #define BS_UART_IS7816_TXT (1U) /*!< Bit field size in bits for UART_IS7816_TXT. */ /*! @brief Read current value of the UART_IS7816_TXT field. */ -#define BR_UART_IS7816_TXT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_TXT)) +#define BR_UART_IS7816_TXT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_TXT))) /*! @brief Format value for bitfield UART_IS7816_TXT. */ #define BF_UART_IS7816_TXT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_TXT) & BM_UART_IS7816_TXT) /*! @brief Set the TXT field to a new value. */ -#define BW_UART_IS7816_TXT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_TXT) = (v)) +#define BW_UART_IS7816_TXT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_TXT), v)) /*@}*/ /*! @@ -3820,13 +3827,13 @@ #define BS_UART_IS7816_GTV (1U) /*!< Bit field size in bits for UART_IS7816_GTV. */ /*! @brief Read current value of the UART_IS7816_GTV field. */ -#define BR_UART_IS7816_GTV(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_GTV)) +#define BR_UART_IS7816_GTV(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_GTV))) /*! @brief Format value for bitfield UART_IS7816_GTV. */ #define BF_UART_IS7816_GTV(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_GTV) & BM_UART_IS7816_GTV) /*! @brief Set the GTV field to a new value. */ -#define BW_UART_IS7816_GTV(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_GTV) = (v)) +#define BW_UART_IS7816_GTV(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_GTV), v)) /*@}*/ /*! @@ -3845,13 +3852,13 @@ #define BS_UART_IS7816_INITD (1U) /*!< Bit field size in bits for UART_IS7816_INITD. */ /*! @brief Read current value of the UART_IS7816_INITD field. */ -#define BR_UART_IS7816_INITD(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_INITD)) +#define BR_UART_IS7816_INITD(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_INITD))) /*! @brief Format value for bitfield UART_IS7816_INITD. */ #define BF_UART_IS7816_INITD(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_INITD) & BM_UART_IS7816_INITD) /*! @brief Set the INITD field to a new value. */ -#define BW_UART_IS7816_INITD(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_INITD) = (v)) +#define BW_UART_IS7816_INITD(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_INITD), v)) /*@}*/ /*! @@ -3872,13 +3879,13 @@ #define BS_UART_IS7816_BWT (1U) /*!< Bit field size in bits for UART_IS7816_BWT. */ /*! @brief Read current value of the UART_IS7816_BWT field. */ -#define BR_UART_IS7816_BWT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_BWT)) +#define BR_UART_IS7816_BWT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_BWT))) /*! @brief Format value for bitfield UART_IS7816_BWT. */ #define BF_UART_IS7816_BWT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_BWT) & BM_UART_IS7816_BWT) /*! @brief Set the BWT field to a new value. */ -#define BW_UART_IS7816_BWT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_BWT) = (v)) +#define BW_UART_IS7816_BWT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_BWT), v)) /*@}*/ /*! @@ -3899,13 +3906,13 @@ #define BS_UART_IS7816_CWT (1U) /*!< Bit field size in bits for UART_IS7816_CWT. */ /*! @brief Read current value of the UART_IS7816_CWT field. */ -#define BR_UART_IS7816_CWT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_CWT)) +#define BR_UART_IS7816_CWT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_CWT))) /*! @brief Format value for bitfield UART_IS7816_CWT. */ #define BF_UART_IS7816_CWT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_CWT) & BM_UART_IS7816_CWT) /*! @brief Set the CWT field to a new value. */ -#define BW_UART_IS7816_CWT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_CWT) = (v)) +#define BW_UART_IS7816_CWT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_CWT), v)) /*@}*/ /*! @@ -3926,13 +3933,13 @@ #define BS_UART_IS7816_WT (1U) /*!< Bit field size in bits for UART_IS7816_WT. */ /*! @brief Read current value of the UART_IS7816_WT field. */ -#define BR_UART_IS7816_WT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_WT)) +#define BR_UART_IS7816_WT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_WT))) /*! @brief Format value for bitfield UART_IS7816_WT. */ #define BF_UART_IS7816_WT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_WT) & BM_UART_IS7816_WT) /*! @brief Set the WT field to a new value. */ -#define BW_UART_IS7816_WT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_WT) = (v)) +#define BW_UART_IS7816_WT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_WT), v)) /*@}*/ /******************************************************************************* @@ -3965,8 +3972,8 @@ #define HW_UART_WP7816T0_ADDR(x) ((x) + 0x1BU) #define HW_UART_WP7816T0(x) (*(__IO hw_uart_wp7816t0_t *) HW_UART_WP7816T0_ADDR(x)) -#define HW_UART_WP7816T0_RD(x) (HW_UART_WP7816T0(x).U) -#define HW_UART_WP7816T0_WR(x, v) (HW_UART_WP7816T0(x).U = (v)) +#define HW_UART_WP7816T0_RD(x) (ADDRESS_READ(hw_uart_wp7816t0_t, HW_UART_WP7816T0_ADDR(x))) +#define HW_UART_WP7816T0_WR(x, v) (ADDRESS_WRITE(hw_uart_wp7816t0_t, HW_UART_WP7816T0_ADDR(x), v)) #define HW_UART_WP7816T0_SET(x, v) (HW_UART_WP7816T0_WR(x, HW_UART_WP7816T0_RD(x) | (v))) #define HW_UART_WP7816T0_CLR(x, v) (HW_UART_WP7816T0_WR(x, HW_UART_WP7816T0_RD(x) & ~(v))) #define HW_UART_WP7816T0_TOG(x, v) (HW_UART_WP7816T0_WR(x, HW_UART_WP7816T0_RD(x) ^ (v))) @@ -4030,8 +4037,8 @@ #define HW_UART_WP7816T1_ADDR(x) ((x) + 0x1BU) #define HW_UART_WP7816T1(x) (*(__IO hw_uart_wp7816t1_t *) HW_UART_WP7816T1_ADDR(x)) -#define HW_UART_WP7816T1_RD(x) (HW_UART_WP7816T1(x).U) -#define HW_UART_WP7816T1_WR(x, v) (HW_UART_WP7816T1(x).U = (v)) +#define HW_UART_WP7816T1_RD(x) (ADDRESS_READ(hw_uart_wp7816t1_t, HW_UART_WP7816T1_ADDR(x))) +#define HW_UART_WP7816T1_WR(x, v) (ADDRESS_WRITE(hw_uart_wp7816t1_t, HW_UART_WP7816T1_ADDR(x), v)) #define HW_UART_WP7816T1_SET(x, v) (HW_UART_WP7816T1_WR(x, HW_UART_WP7816T1_RD(x) | (v))) #define HW_UART_WP7816T1_CLR(x, v) (HW_UART_WP7816T1_WR(x, HW_UART_WP7816T1_RD(x) & ~(v))) #define HW_UART_WP7816T1_TOG(x, v) (HW_UART_WP7816T1_WR(x, HW_UART_WP7816T1_RD(x) ^ (v))) @@ -4054,7 +4061,7 @@ #define BS_UART_WP7816T1_BWI (4U) /*!< Bit field size in bits for UART_WP7816T1_BWI. */ /*! @brief Read current value of the UART_WP7816T1_BWI field. */ -#define BR_UART_WP7816T1_BWI(x) (HW_UART_WP7816T1(x).B.BWI) +#define BR_UART_WP7816T1_BWI(x) (UNION_READ(hw_uart_wp7816t1_t, HW_UART_WP7816T1_ADDR(x), U, B.BWI)) /*! @brief Format value for bitfield UART_WP7816T1_BWI. */ #define BF_UART_WP7816T1_BWI(v) ((uint8_t)((uint8_t)(v) << BP_UART_WP7816T1_BWI) & BM_UART_WP7816T1_BWI) @@ -4076,7 +4083,7 @@ #define BS_UART_WP7816T1_CWI (4U) /*!< Bit field size in bits for UART_WP7816T1_CWI. */ /*! @brief Read current value of the UART_WP7816T1_CWI field. */ -#define BR_UART_WP7816T1_CWI(x) (HW_UART_WP7816T1(x).B.CWI) +#define BR_UART_WP7816T1_CWI(x) (UNION_READ(hw_uart_wp7816t1_t, HW_UART_WP7816T1_ADDR(x), U, B.CWI)) /*! @brief Format value for bitfield UART_WP7816T1_CWI. */ #define BF_UART_WP7816T1_CWI(v) ((uint8_t)((uint8_t)(v) << BP_UART_WP7816T1_CWI) & BM_UART_WP7816T1_CWI) @@ -4114,8 +4121,8 @@ #define HW_UART_WN7816_ADDR(x) ((x) + 0x1CU) #define HW_UART_WN7816(x) (*(__IO hw_uart_wn7816_t *) HW_UART_WN7816_ADDR(x)) -#define HW_UART_WN7816_RD(x) (HW_UART_WN7816(x).U) -#define HW_UART_WN7816_WR(x, v) (HW_UART_WN7816(x).U = (v)) +#define HW_UART_WN7816_RD(x) (ADDRESS_READ(hw_uart_wn7816_t, HW_UART_WN7816_ADDR(x))) +#define HW_UART_WN7816_WR(x, v) (ADDRESS_WRITE(hw_uart_wn7816_t, HW_UART_WN7816_ADDR(x), v)) #define HW_UART_WN7816_SET(x, v) (HW_UART_WN7816_WR(x, HW_UART_WN7816_RD(x) | (v))) #define HW_UART_WN7816_CLR(x, v) (HW_UART_WN7816_WR(x, HW_UART_WN7816_RD(x) & ~(v))) #define HW_UART_WN7816_TOG(x, v) (HW_UART_WN7816_WR(x, HW_UART_WN7816_RD(x) ^ (v))) @@ -4176,8 +4183,8 @@ #define HW_UART_WF7816_ADDR(x) ((x) + 0x1DU) #define HW_UART_WF7816(x) (*(__IO hw_uart_wf7816_t *) HW_UART_WF7816_ADDR(x)) -#define HW_UART_WF7816_RD(x) (HW_UART_WF7816(x).U) -#define HW_UART_WF7816_WR(x, v) (HW_UART_WF7816(x).U = (v)) +#define HW_UART_WF7816_RD(x) (ADDRESS_READ(hw_uart_wf7816_t, HW_UART_WF7816_ADDR(x))) +#define HW_UART_WF7816_WR(x, v) (ADDRESS_WRITE(hw_uart_wf7816_t, HW_UART_WF7816_ADDR(x), v)) #define HW_UART_WF7816_SET(x, v) (HW_UART_WF7816_WR(x, HW_UART_WF7816_RD(x) | (v))) #define HW_UART_WF7816_CLR(x, v) (HW_UART_WF7816_WR(x, HW_UART_WF7816_RD(x) & ~(v))) #define HW_UART_WF7816_TOG(x, v) (HW_UART_WF7816_WR(x, HW_UART_WF7816_RD(x) ^ (v))) @@ -4241,8 +4248,8 @@ #define HW_UART_ET7816_ADDR(x) ((x) + 0x1EU) #define HW_UART_ET7816(x) (*(__IO hw_uart_et7816_t *) HW_UART_ET7816_ADDR(x)) -#define HW_UART_ET7816_RD(x) (HW_UART_ET7816(x).U) -#define HW_UART_ET7816_WR(x, v) (HW_UART_ET7816(x).U = (v)) +#define HW_UART_ET7816_RD(x) (ADDRESS_READ(hw_uart_et7816_t, HW_UART_ET7816_ADDR(x))) +#define HW_UART_ET7816_WR(x, v) (ADDRESS_WRITE(hw_uart_et7816_t, HW_UART_ET7816_ADDR(x), v)) #define HW_UART_ET7816_SET(x, v) (HW_UART_ET7816_WR(x, HW_UART_ET7816_RD(x) | (v))) #define HW_UART_ET7816_CLR(x, v) (HW_UART_ET7816_WR(x, HW_UART_ET7816_RD(x) & ~(v))) #define HW_UART_ET7816_TOG(x, v) (HW_UART_ET7816_WR(x, HW_UART_ET7816_RD(x) ^ (v))) @@ -4271,7 +4278,7 @@ #define BS_UART_ET7816_RXTHRESHOLD (4U) /*!< Bit field size in bits for UART_ET7816_RXTHRESHOLD. */ /*! @brief Read current value of the UART_ET7816_RXTHRESHOLD field. */ -#define BR_UART_ET7816_RXTHRESHOLD(x) (HW_UART_ET7816(x).B.RXTHRESHOLD) +#define BR_UART_ET7816_RXTHRESHOLD(x) (UNION_READ(hw_uart_et7816_t, HW_UART_ET7816_ADDR(x), U, B.RXTHRESHOLD)) /*! @brief Format value for bitfield UART_ET7816_RXTHRESHOLD. */ #define BF_UART_ET7816_RXTHRESHOLD(v) ((uint8_t)((uint8_t)(v) << BP_UART_ET7816_RXTHRESHOLD) & BM_UART_ET7816_RXTHRESHOLD) @@ -4303,7 +4310,7 @@ #define BS_UART_ET7816_TXTHRESHOLD (4U) /*!< Bit field size in bits for UART_ET7816_TXTHRESHOLD. */ /*! @brief Read current value of the UART_ET7816_TXTHRESHOLD field. */ -#define BR_UART_ET7816_TXTHRESHOLD(x) (HW_UART_ET7816(x).B.TXTHRESHOLD) +#define BR_UART_ET7816_TXTHRESHOLD(x) (UNION_READ(hw_uart_et7816_t, HW_UART_ET7816_ADDR(x), U, B.TXTHRESHOLD)) /*! @brief Format value for bitfield UART_ET7816_TXTHRESHOLD. */ #define BF_UART_ET7816_TXTHRESHOLD(v) ((uint8_t)((uint8_t)(v) << BP_UART_ET7816_TXTHRESHOLD) & BM_UART_ET7816_TXTHRESHOLD) @@ -4342,8 +4349,8 @@ #define HW_UART_TL7816_ADDR(x) ((x) + 0x1FU) #define HW_UART_TL7816(x) (*(__IO hw_uart_tl7816_t *) HW_UART_TL7816_ADDR(x)) -#define HW_UART_TL7816_RD(x) (HW_UART_TL7816(x).U) -#define HW_UART_TL7816_WR(x, v) (HW_UART_TL7816(x).U = (v)) +#define HW_UART_TL7816_RD(x) (ADDRESS_READ(hw_uart_tl7816_t, HW_UART_TL7816_ADDR(x))) +#define HW_UART_TL7816_WR(x, v) (ADDRESS_WRITE(hw_uart_tl7816_t, HW_UART_TL7816_ADDR(x), v)) #define HW_UART_TL7816_SET(x, v) (HW_UART_TL7816_WR(x, HW_UART_TL7816_RD(x) | (v))) #define HW_UART_TL7816_CLR(x, v) (HW_UART_TL7816_WR(x, HW_UART_TL7816_RD(x) & ~(v))) #define HW_UART_TL7816_TOG(x, v) (HW_UART_TL7816_WR(x, HW_UART_TL7816_RD(x) ^ (v)))
--- a/hal/device/device/MK64F12/MK64F12_usb.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_usb.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -154,7 +161,7 @@ #define HW_USB_PERID_ADDR(x) ((x) + 0x0U) #define HW_USB_PERID(x) (*(__I hw_usb_perid_t *) HW_USB_PERID_ADDR(x)) -#define HW_USB_PERID_RD(x) (HW_USB_PERID(x).U) +#define HW_USB_PERID_RD(x) (ADDRESS_READ(hw_usb_perid_t, HW_USB_PERID_ADDR(x))) /*@}*/ /* @@ -172,7 +179,7 @@ #define BS_USB_PERID_ID (6U) /*!< Bit field size in bits for USB_PERID_ID. */ /*! @brief Read current value of the USB_PERID_ID field. */ -#define BR_USB_PERID_ID(x) (HW_USB_PERID(x).B.ID) +#define BR_USB_PERID_ID(x) (UNION_READ(hw_usb_perid_t, HW_USB_PERID_ADDR(x), U, B.ID)) /*@}*/ /******************************************************************************* @@ -204,7 +211,7 @@ #define HW_USB_IDCOMP_ADDR(x) ((x) + 0x4U) #define HW_USB_IDCOMP(x) (*(__I hw_usb_idcomp_t *) HW_USB_IDCOMP_ADDR(x)) -#define HW_USB_IDCOMP_RD(x) (HW_USB_IDCOMP(x).U) +#define HW_USB_IDCOMP_RD(x) (ADDRESS_READ(hw_usb_idcomp_t, HW_USB_IDCOMP_ADDR(x))) /*@}*/ /* @@ -222,7 +229,7 @@ #define BS_USB_IDCOMP_NID (6U) /*!< Bit field size in bits for USB_IDCOMP_NID. */ /*! @brief Read current value of the USB_IDCOMP_NID field. */ -#define BR_USB_IDCOMP_NID(x) (HW_USB_IDCOMP(x).B.NID) +#define BR_USB_IDCOMP_NID(x) (UNION_READ(hw_usb_idcomp_t, HW_USB_IDCOMP_ADDR(x), U, B.NID)) /*@}*/ /******************************************************************************* @@ -252,7 +259,7 @@ #define HW_USB_REV_ADDR(x) ((x) + 0x8U) #define HW_USB_REV(x) (*(__I hw_usb_rev_t *) HW_USB_REV_ADDR(x)) -#define HW_USB_REV_RD(x) (HW_USB_REV(x).U) +#define HW_USB_REV_RD(x) (ADDRESS_READ(hw_usb_rev_t, HW_USB_REV_ADDR(x))) /*@}*/ /* @@ -303,7 +310,7 @@ #define HW_USB_ADDINFO_ADDR(x) ((x) + 0xCU) #define HW_USB_ADDINFO(x) (*(__I hw_usb_addinfo_t *) HW_USB_ADDINFO_ADDR(x)) -#define HW_USB_ADDINFO_RD(x) (HW_USB_ADDINFO(x).U) +#define HW_USB_ADDINFO_RD(x) (ADDRESS_READ(hw_usb_addinfo_t, HW_USB_ADDINFO_ADDR(x))) /*@}*/ /* @@ -321,7 +328,7 @@ #define BS_USB_ADDINFO_IEHOST (1U) /*!< Bit field size in bits for USB_ADDINFO_IEHOST. */ /*! @brief Read current value of the USB_ADDINFO_IEHOST field. */ -#define BR_USB_ADDINFO_IEHOST(x) (BITBAND_ACCESS8(HW_USB_ADDINFO_ADDR(x), BP_USB_ADDINFO_IEHOST)) +#define BR_USB_ADDINFO_IEHOST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ADDINFO_ADDR(x), BP_USB_ADDINFO_IEHOST))) /*@}*/ /*! @@ -333,7 +340,7 @@ #define BS_USB_ADDINFO_IRQNUM (5U) /*!< Bit field size in bits for USB_ADDINFO_IRQNUM. */ /*! @brief Read current value of the USB_ADDINFO_IRQNUM field. */ -#define BR_USB_ADDINFO_IRQNUM(x) (HW_USB_ADDINFO(x).B.IRQNUM) +#define BR_USB_ADDINFO_IRQNUM(x) (UNION_READ(hw_usb_addinfo_t, HW_USB_ADDINFO_ADDR(x), U, B.IRQNUM)) /*@}*/ /******************************************************************************* @@ -373,8 +380,8 @@ #define HW_USB_OTGISTAT_ADDR(x) ((x) + 0x10U) #define HW_USB_OTGISTAT(x) (*(__IO hw_usb_otgistat_t *) HW_USB_OTGISTAT_ADDR(x)) -#define HW_USB_OTGISTAT_RD(x) (HW_USB_OTGISTAT(x).U) -#define HW_USB_OTGISTAT_WR(x, v) (HW_USB_OTGISTAT(x).U = (v)) +#define HW_USB_OTGISTAT_RD(x) (ADDRESS_READ(hw_usb_otgistat_t, HW_USB_OTGISTAT_ADDR(x))) +#define HW_USB_OTGISTAT_WR(x, v) (ADDRESS_WRITE(hw_usb_otgistat_t, HW_USB_OTGISTAT_ADDR(x), v)) #define HW_USB_OTGISTAT_SET(x, v) (HW_USB_OTGISTAT_WR(x, HW_USB_OTGISTAT_RD(x) | (v))) #define HW_USB_OTGISTAT_CLR(x, v) (HW_USB_OTGISTAT_WR(x, HW_USB_OTGISTAT_RD(x) & ~(v))) #define HW_USB_OTGISTAT_TOG(x, v) (HW_USB_OTGISTAT_WR(x, HW_USB_OTGISTAT_RD(x) ^ (v))) @@ -395,13 +402,13 @@ #define BS_USB_OTGISTAT_AVBUSCHG (1U) /*!< Bit field size in bits for USB_OTGISTAT_AVBUSCHG. */ /*! @brief Read current value of the USB_OTGISTAT_AVBUSCHG field. */ -#define BR_USB_OTGISTAT_AVBUSCHG(x) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_AVBUSCHG)) +#define BR_USB_OTGISTAT_AVBUSCHG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_AVBUSCHG))) /*! @brief Format value for bitfield USB_OTGISTAT_AVBUSCHG. */ #define BF_USB_OTGISTAT_AVBUSCHG(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGISTAT_AVBUSCHG) & BM_USB_OTGISTAT_AVBUSCHG) /*! @brief Set the AVBUSCHG field to a new value. */ -#define BW_USB_OTGISTAT_AVBUSCHG(x, v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_AVBUSCHG) = (v)) +#define BW_USB_OTGISTAT_AVBUSCHG(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_AVBUSCHG), v)) /*@}*/ /*! @@ -415,13 +422,13 @@ #define BS_USB_OTGISTAT_B_SESS_CHG (1U) /*!< Bit field size in bits for USB_OTGISTAT_B_SESS_CHG. */ /*! @brief Read current value of the USB_OTGISTAT_B_SESS_CHG field. */ -#define BR_USB_OTGISTAT_B_SESS_CHG(x) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_B_SESS_CHG)) +#define BR_USB_OTGISTAT_B_SESS_CHG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_B_SESS_CHG))) /*! @brief Format value for bitfield USB_OTGISTAT_B_SESS_CHG. */ #define BF_USB_OTGISTAT_B_SESS_CHG(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGISTAT_B_SESS_CHG) & BM_USB_OTGISTAT_B_SESS_CHG) /*! @brief Set the B_SESS_CHG field to a new value. */ -#define BW_USB_OTGISTAT_B_SESS_CHG(x, v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_B_SESS_CHG) = (v)) +#define BW_USB_OTGISTAT_B_SESS_CHG(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_B_SESS_CHG), v)) /*@}*/ /*! @@ -436,13 +443,13 @@ #define BS_USB_OTGISTAT_SESSVLDCHG (1U) /*!< Bit field size in bits for USB_OTGISTAT_SESSVLDCHG. */ /*! @brief Read current value of the USB_OTGISTAT_SESSVLDCHG field. */ -#define BR_USB_OTGISTAT_SESSVLDCHG(x) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_SESSVLDCHG)) +#define BR_USB_OTGISTAT_SESSVLDCHG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_SESSVLDCHG))) /*! @brief Format value for bitfield USB_OTGISTAT_SESSVLDCHG. */ #define BF_USB_OTGISTAT_SESSVLDCHG(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGISTAT_SESSVLDCHG) & BM_USB_OTGISTAT_SESSVLDCHG) /*! @brief Set the SESSVLDCHG field to a new value. */ -#define BW_USB_OTGISTAT_SESSVLDCHG(x, v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_SESSVLDCHG) = (v)) +#define BW_USB_OTGISTAT_SESSVLDCHG(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_SESSVLDCHG), v)) /*@}*/ /*! @@ -462,13 +469,13 @@ #define BS_USB_OTGISTAT_LINE_STATE_CHG (1U) /*!< Bit field size in bits for USB_OTGISTAT_LINE_STATE_CHG. */ /*! @brief Read current value of the USB_OTGISTAT_LINE_STATE_CHG field. */ -#define BR_USB_OTGISTAT_LINE_STATE_CHG(x) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_LINE_STATE_CHG)) +#define BR_USB_OTGISTAT_LINE_STATE_CHG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_LINE_STATE_CHG))) /*! @brief Format value for bitfield USB_OTGISTAT_LINE_STATE_CHG. */ #define BF_USB_OTGISTAT_LINE_STATE_CHG(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGISTAT_LINE_STATE_CHG) & BM_USB_OTGISTAT_LINE_STATE_CHG) /*! @brief Set the LINE_STATE_CHG field to a new value. */ -#define BW_USB_OTGISTAT_LINE_STATE_CHG(x, v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_LINE_STATE_CHG) = (v)) +#define BW_USB_OTGISTAT_LINE_STATE_CHG(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_LINE_STATE_CHG), v)) /*@}*/ /*! @@ -484,13 +491,13 @@ #define BS_USB_OTGISTAT_ONEMSEC (1U) /*!< Bit field size in bits for USB_OTGISTAT_ONEMSEC. */ /*! @brief Read current value of the USB_OTGISTAT_ONEMSEC field. */ -#define BR_USB_OTGISTAT_ONEMSEC(x) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_ONEMSEC)) +#define BR_USB_OTGISTAT_ONEMSEC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_ONEMSEC))) /*! @brief Format value for bitfield USB_OTGISTAT_ONEMSEC. */ #define BF_USB_OTGISTAT_ONEMSEC(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGISTAT_ONEMSEC) & BM_USB_OTGISTAT_ONEMSEC) /*! @brief Set the ONEMSEC field to a new value. */ -#define BW_USB_OTGISTAT_ONEMSEC(x, v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_ONEMSEC) = (v)) +#define BW_USB_OTGISTAT_ONEMSEC(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_ONEMSEC), v)) /*@}*/ /*! @@ -505,13 +512,13 @@ #define BS_USB_OTGISTAT_IDCHG (1U) /*!< Bit field size in bits for USB_OTGISTAT_IDCHG. */ /*! @brief Read current value of the USB_OTGISTAT_IDCHG field. */ -#define BR_USB_OTGISTAT_IDCHG(x) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_IDCHG)) +#define BR_USB_OTGISTAT_IDCHG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_IDCHG))) /*! @brief Format value for bitfield USB_OTGISTAT_IDCHG. */ #define BF_USB_OTGISTAT_IDCHG(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGISTAT_IDCHG) & BM_USB_OTGISTAT_IDCHG) /*! @brief Set the IDCHG field to a new value. */ -#define BW_USB_OTGISTAT_IDCHG(x, v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_IDCHG) = (v)) +#define BW_USB_OTGISTAT_IDCHG(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGISTAT_ADDR(x), BP_USB_OTGISTAT_IDCHG), v)) /*@}*/ /******************************************************************************* @@ -550,8 +557,8 @@ #define HW_USB_OTGICR_ADDR(x) ((x) + 0x14U) #define HW_USB_OTGICR(x) (*(__IO hw_usb_otgicr_t *) HW_USB_OTGICR_ADDR(x)) -#define HW_USB_OTGICR_RD(x) (HW_USB_OTGICR(x).U) -#define HW_USB_OTGICR_WR(x, v) (HW_USB_OTGICR(x).U = (v)) +#define HW_USB_OTGICR_RD(x) (ADDRESS_READ(hw_usb_otgicr_t, HW_USB_OTGICR_ADDR(x))) +#define HW_USB_OTGICR_WR(x, v) (ADDRESS_WRITE(hw_usb_otgicr_t, HW_USB_OTGICR_ADDR(x), v)) #define HW_USB_OTGICR_SET(x, v) (HW_USB_OTGICR_WR(x, HW_USB_OTGICR_RD(x) | (v))) #define HW_USB_OTGICR_CLR(x, v) (HW_USB_OTGICR_WR(x, HW_USB_OTGICR_RD(x) & ~(v))) #define HW_USB_OTGICR_TOG(x, v) (HW_USB_OTGICR_WR(x, HW_USB_OTGICR_RD(x) ^ (v))) @@ -574,13 +581,13 @@ #define BS_USB_OTGICR_AVBUSEN (1U) /*!< Bit field size in bits for USB_OTGICR_AVBUSEN. */ /*! @brief Read current value of the USB_OTGICR_AVBUSEN field. */ -#define BR_USB_OTGICR_AVBUSEN(x) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_AVBUSEN)) +#define BR_USB_OTGICR_AVBUSEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_AVBUSEN))) /*! @brief Format value for bitfield USB_OTGICR_AVBUSEN. */ #define BF_USB_OTGICR_AVBUSEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGICR_AVBUSEN) & BM_USB_OTGICR_AVBUSEN) /*! @brief Set the AVBUSEN field to a new value. */ -#define BW_USB_OTGICR_AVBUSEN(x, v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_AVBUSEN) = (v)) +#define BW_USB_OTGICR_AVBUSEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_AVBUSEN), v)) /*@}*/ /*! @@ -596,13 +603,13 @@ #define BS_USB_OTGICR_BSESSEN (1U) /*!< Bit field size in bits for USB_OTGICR_BSESSEN. */ /*! @brief Read current value of the USB_OTGICR_BSESSEN field. */ -#define BR_USB_OTGICR_BSESSEN(x) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_BSESSEN)) +#define BR_USB_OTGICR_BSESSEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_BSESSEN))) /*! @brief Format value for bitfield USB_OTGICR_BSESSEN. */ #define BF_USB_OTGICR_BSESSEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGICR_BSESSEN) & BM_USB_OTGICR_BSESSEN) /*! @brief Set the BSESSEN field to a new value. */ -#define BW_USB_OTGICR_BSESSEN(x, v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_BSESSEN) = (v)) +#define BW_USB_OTGICR_BSESSEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_BSESSEN), v)) /*@}*/ /*! @@ -618,13 +625,13 @@ #define BS_USB_OTGICR_SESSVLDEN (1U) /*!< Bit field size in bits for USB_OTGICR_SESSVLDEN. */ /*! @brief Read current value of the USB_OTGICR_SESSVLDEN field. */ -#define BR_USB_OTGICR_SESSVLDEN(x) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_SESSVLDEN)) +#define BR_USB_OTGICR_SESSVLDEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_SESSVLDEN))) /*! @brief Format value for bitfield USB_OTGICR_SESSVLDEN. */ #define BF_USB_OTGICR_SESSVLDEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGICR_SESSVLDEN) & BM_USB_OTGICR_SESSVLDEN) /*! @brief Set the SESSVLDEN field to a new value. */ -#define BW_USB_OTGICR_SESSVLDEN(x, v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_SESSVLDEN) = (v)) +#define BW_USB_OTGICR_SESSVLDEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_SESSVLDEN), v)) /*@}*/ /*! @@ -640,13 +647,13 @@ #define BS_USB_OTGICR_LINESTATEEN (1U) /*!< Bit field size in bits for USB_OTGICR_LINESTATEEN. */ /*! @brief Read current value of the USB_OTGICR_LINESTATEEN field. */ -#define BR_USB_OTGICR_LINESTATEEN(x) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_LINESTATEEN)) +#define BR_USB_OTGICR_LINESTATEEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_LINESTATEEN))) /*! @brief Format value for bitfield USB_OTGICR_LINESTATEEN. */ #define BF_USB_OTGICR_LINESTATEEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGICR_LINESTATEEN) & BM_USB_OTGICR_LINESTATEEN) /*! @brief Set the LINESTATEEN field to a new value. */ -#define BW_USB_OTGICR_LINESTATEEN(x, v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_LINESTATEEN) = (v)) +#define BW_USB_OTGICR_LINESTATEEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_LINESTATEEN), v)) /*@}*/ /*! @@ -662,13 +669,13 @@ #define BS_USB_OTGICR_ONEMSECEN (1U) /*!< Bit field size in bits for USB_OTGICR_ONEMSECEN. */ /*! @brief Read current value of the USB_OTGICR_ONEMSECEN field. */ -#define BR_USB_OTGICR_ONEMSECEN(x) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_ONEMSECEN)) +#define BR_USB_OTGICR_ONEMSECEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_ONEMSECEN))) /*! @brief Format value for bitfield USB_OTGICR_ONEMSECEN. */ #define BF_USB_OTGICR_ONEMSECEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGICR_ONEMSECEN) & BM_USB_OTGICR_ONEMSECEN) /*! @brief Set the ONEMSECEN field to a new value. */ -#define BW_USB_OTGICR_ONEMSECEN(x, v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_ONEMSECEN) = (v)) +#define BW_USB_OTGICR_ONEMSECEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_ONEMSECEN), v)) /*@}*/ /*! @@ -684,13 +691,13 @@ #define BS_USB_OTGICR_IDEN (1U) /*!< Bit field size in bits for USB_OTGICR_IDEN. */ /*! @brief Read current value of the USB_OTGICR_IDEN field. */ -#define BR_USB_OTGICR_IDEN(x) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_IDEN)) +#define BR_USB_OTGICR_IDEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_IDEN))) /*! @brief Format value for bitfield USB_OTGICR_IDEN. */ #define BF_USB_OTGICR_IDEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGICR_IDEN) & BM_USB_OTGICR_IDEN) /*! @brief Set the IDEN field to a new value. */ -#define BW_USB_OTGICR_IDEN(x, v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_IDEN) = (v)) +#define BW_USB_OTGICR_IDEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGICR_ADDR(x), BP_USB_OTGICR_IDEN), v)) /*@}*/ /******************************************************************************* @@ -728,8 +735,8 @@ #define HW_USB_OTGSTAT_ADDR(x) ((x) + 0x18U) #define HW_USB_OTGSTAT(x) (*(__IO hw_usb_otgstat_t *) HW_USB_OTGSTAT_ADDR(x)) -#define HW_USB_OTGSTAT_RD(x) (HW_USB_OTGSTAT(x).U) -#define HW_USB_OTGSTAT_WR(x, v) (HW_USB_OTGSTAT(x).U = (v)) +#define HW_USB_OTGSTAT_RD(x) (ADDRESS_READ(hw_usb_otgstat_t, HW_USB_OTGSTAT_ADDR(x))) +#define HW_USB_OTGSTAT_WR(x, v) (ADDRESS_WRITE(hw_usb_otgstat_t, HW_USB_OTGSTAT_ADDR(x), v)) #define HW_USB_OTGSTAT_SET(x, v) (HW_USB_OTGSTAT_WR(x, HW_USB_OTGSTAT_RD(x) | (v))) #define HW_USB_OTGSTAT_CLR(x, v) (HW_USB_OTGSTAT_WR(x, HW_USB_OTGSTAT_RD(x) & ~(v))) #define HW_USB_OTGSTAT_TOG(x, v) (HW_USB_OTGSTAT_WR(x, HW_USB_OTGSTAT_RD(x) ^ (v))) @@ -752,13 +759,13 @@ #define BS_USB_OTGSTAT_AVBUSVLD (1U) /*!< Bit field size in bits for USB_OTGSTAT_AVBUSVLD. */ /*! @brief Read current value of the USB_OTGSTAT_AVBUSVLD field. */ -#define BR_USB_OTGSTAT_AVBUSVLD(x) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_AVBUSVLD)) +#define BR_USB_OTGSTAT_AVBUSVLD(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_AVBUSVLD))) /*! @brief Format value for bitfield USB_OTGSTAT_AVBUSVLD. */ #define BF_USB_OTGSTAT_AVBUSVLD(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGSTAT_AVBUSVLD) & BM_USB_OTGSTAT_AVBUSVLD) /*! @brief Set the AVBUSVLD field to a new value. */ -#define BW_USB_OTGSTAT_AVBUSVLD(x, v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_AVBUSVLD) = (v)) +#define BW_USB_OTGSTAT_AVBUSVLD(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_AVBUSVLD), v)) /*@}*/ /*! @@ -774,13 +781,13 @@ #define BS_USB_OTGSTAT_BSESSEND (1U) /*!< Bit field size in bits for USB_OTGSTAT_BSESSEND. */ /*! @brief Read current value of the USB_OTGSTAT_BSESSEND field. */ -#define BR_USB_OTGSTAT_BSESSEND(x) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_BSESSEND)) +#define BR_USB_OTGSTAT_BSESSEND(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_BSESSEND))) /*! @brief Format value for bitfield USB_OTGSTAT_BSESSEND. */ #define BF_USB_OTGSTAT_BSESSEND(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGSTAT_BSESSEND) & BM_USB_OTGSTAT_BSESSEND) /*! @brief Set the BSESSEND field to a new value. */ -#define BW_USB_OTGSTAT_BSESSEND(x, v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_BSESSEND) = (v)) +#define BW_USB_OTGSTAT_BSESSEND(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_BSESSEND), v)) /*@}*/ /*! @@ -796,13 +803,13 @@ #define BS_USB_OTGSTAT_SESS_VLD (1U) /*!< Bit field size in bits for USB_OTGSTAT_SESS_VLD. */ /*! @brief Read current value of the USB_OTGSTAT_SESS_VLD field. */ -#define BR_USB_OTGSTAT_SESS_VLD(x) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_SESS_VLD)) +#define BR_USB_OTGSTAT_SESS_VLD(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_SESS_VLD))) /*! @brief Format value for bitfield USB_OTGSTAT_SESS_VLD. */ #define BF_USB_OTGSTAT_SESS_VLD(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGSTAT_SESS_VLD) & BM_USB_OTGSTAT_SESS_VLD) /*! @brief Set the SESS_VLD field to a new value. */ -#define BW_USB_OTGSTAT_SESS_VLD(x, v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_SESS_VLD) = (v)) +#define BW_USB_OTGSTAT_SESS_VLD(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_SESS_VLD), v)) /*@}*/ /*! @@ -823,13 +830,13 @@ #define BS_USB_OTGSTAT_LINESTATESTABLE (1U) /*!< Bit field size in bits for USB_OTGSTAT_LINESTATESTABLE. */ /*! @brief Read current value of the USB_OTGSTAT_LINESTATESTABLE field. */ -#define BR_USB_OTGSTAT_LINESTATESTABLE(x) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_LINESTATESTABLE)) +#define BR_USB_OTGSTAT_LINESTATESTABLE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_LINESTATESTABLE))) /*! @brief Format value for bitfield USB_OTGSTAT_LINESTATESTABLE. */ #define BF_USB_OTGSTAT_LINESTATESTABLE(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGSTAT_LINESTATESTABLE) & BM_USB_OTGSTAT_LINESTATESTABLE) /*! @brief Set the LINESTATESTABLE field to a new value. */ -#define BW_USB_OTGSTAT_LINESTATESTABLE(x, v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_LINESTATESTABLE) = (v)) +#define BW_USB_OTGSTAT_LINESTATESTABLE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_LINESTATESTABLE), v)) /*@}*/ /*! @@ -843,13 +850,13 @@ #define BS_USB_OTGSTAT_ONEMSECEN (1U) /*!< Bit field size in bits for USB_OTGSTAT_ONEMSECEN. */ /*! @brief Read current value of the USB_OTGSTAT_ONEMSECEN field. */ -#define BR_USB_OTGSTAT_ONEMSECEN(x) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_ONEMSECEN)) +#define BR_USB_OTGSTAT_ONEMSECEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_ONEMSECEN))) /*! @brief Format value for bitfield USB_OTGSTAT_ONEMSECEN. */ #define BF_USB_OTGSTAT_ONEMSECEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGSTAT_ONEMSECEN) & BM_USB_OTGSTAT_ONEMSECEN) /*! @brief Set the ONEMSECEN field to a new value. */ -#define BW_USB_OTGSTAT_ONEMSECEN(x, v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_ONEMSECEN) = (v)) +#define BW_USB_OTGSTAT_ONEMSECEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_ONEMSECEN), v)) /*@}*/ /*! @@ -868,13 +875,13 @@ #define BS_USB_OTGSTAT_ID (1U) /*!< Bit field size in bits for USB_OTGSTAT_ID. */ /*! @brief Read current value of the USB_OTGSTAT_ID field. */ -#define BR_USB_OTGSTAT_ID(x) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_ID)) +#define BR_USB_OTGSTAT_ID(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_ID))) /*! @brief Format value for bitfield USB_OTGSTAT_ID. */ #define BF_USB_OTGSTAT_ID(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGSTAT_ID) & BM_USB_OTGSTAT_ID) /*! @brief Set the ID field to a new value. */ -#define BW_USB_OTGSTAT_ID(x, v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_ID) = (v)) +#define BW_USB_OTGSTAT_ID(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGSTAT_ADDR(x), BP_USB_OTGSTAT_ID), v)) /*@}*/ /******************************************************************************* @@ -911,8 +918,8 @@ #define HW_USB_OTGCTL_ADDR(x) ((x) + 0x1CU) #define HW_USB_OTGCTL(x) (*(__IO hw_usb_otgctl_t *) HW_USB_OTGCTL_ADDR(x)) -#define HW_USB_OTGCTL_RD(x) (HW_USB_OTGCTL(x).U) -#define HW_USB_OTGCTL_WR(x, v) (HW_USB_OTGCTL(x).U = (v)) +#define HW_USB_OTGCTL_RD(x) (ADDRESS_READ(hw_usb_otgctl_t, HW_USB_OTGCTL_ADDR(x))) +#define HW_USB_OTGCTL_WR(x, v) (ADDRESS_WRITE(hw_usb_otgctl_t, HW_USB_OTGCTL_ADDR(x), v)) #define HW_USB_OTGCTL_SET(x, v) (HW_USB_OTGCTL_WR(x, HW_USB_OTGCTL_RD(x) | (v))) #define HW_USB_OTGCTL_CLR(x, v) (HW_USB_OTGCTL_WR(x, HW_USB_OTGCTL_RD(x) & ~(v))) #define HW_USB_OTGCTL_TOG(x, v) (HW_USB_OTGCTL_WR(x, HW_USB_OTGCTL_RD(x) ^ (v))) @@ -937,13 +944,13 @@ #define BS_USB_OTGCTL_OTGEN (1U) /*!< Bit field size in bits for USB_OTGCTL_OTGEN. */ /*! @brief Read current value of the USB_OTGCTL_OTGEN field. */ -#define BR_USB_OTGCTL_OTGEN(x) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_OTGEN)) +#define BR_USB_OTGCTL_OTGEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_OTGEN))) /*! @brief Format value for bitfield USB_OTGCTL_OTGEN. */ #define BF_USB_OTGCTL_OTGEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGCTL_OTGEN) & BM_USB_OTGCTL_OTGEN) /*! @brief Set the OTGEN field to a new value. */ -#define BW_USB_OTGCTL_OTGEN(x, v) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_OTGEN) = (v)) +#define BW_USB_OTGCTL_OTGEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_OTGEN), v)) /*@}*/ /*! @@ -959,13 +966,13 @@ #define BS_USB_OTGCTL_DMLOW (1U) /*!< Bit field size in bits for USB_OTGCTL_DMLOW. */ /*! @brief Read current value of the USB_OTGCTL_DMLOW field. */ -#define BR_USB_OTGCTL_DMLOW(x) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DMLOW)) +#define BR_USB_OTGCTL_DMLOW(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DMLOW))) /*! @brief Format value for bitfield USB_OTGCTL_DMLOW. */ #define BF_USB_OTGCTL_DMLOW(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGCTL_DMLOW) & BM_USB_OTGCTL_DMLOW) /*! @brief Set the DMLOW field to a new value. */ -#define BW_USB_OTGCTL_DMLOW(x, v) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DMLOW) = (v)) +#define BW_USB_OTGCTL_DMLOW(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DMLOW), v)) /*@}*/ /*! @@ -983,13 +990,13 @@ #define BS_USB_OTGCTL_DPLOW (1U) /*!< Bit field size in bits for USB_OTGCTL_DPLOW. */ /*! @brief Read current value of the USB_OTGCTL_DPLOW field. */ -#define BR_USB_OTGCTL_DPLOW(x) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DPLOW)) +#define BR_USB_OTGCTL_DPLOW(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DPLOW))) /*! @brief Format value for bitfield USB_OTGCTL_DPLOW. */ #define BF_USB_OTGCTL_DPLOW(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGCTL_DPLOW) & BM_USB_OTGCTL_DPLOW) /*! @brief Set the DPLOW field to a new value. */ -#define BW_USB_OTGCTL_DPLOW(x, v) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DPLOW) = (v)) +#define BW_USB_OTGCTL_DPLOW(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DPLOW), v)) /*@}*/ /*! @@ -1005,13 +1012,13 @@ #define BS_USB_OTGCTL_DPHIGH (1U) /*!< Bit field size in bits for USB_OTGCTL_DPHIGH. */ /*! @brief Read current value of the USB_OTGCTL_DPHIGH field. */ -#define BR_USB_OTGCTL_DPHIGH(x) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DPHIGH)) +#define BR_USB_OTGCTL_DPHIGH(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DPHIGH))) /*! @brief Format value for bitfield USB_OTGCTL_DPHIGH. */ #define BF_USB_OTGCTL_DPHIGH(v) ((uint8_t)((uint8_t)(v) << BP_USB_OTGCTL_DPHIGH) & BM_USB_OTGCTL_DPHIGH) /*! @brief Set the DPHIGH field to a new value. */ -#define BW_USB_OTGCTL_DPHIGH(x, v) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DPHIGH) = (v)) +#define BW_USB_OTGCTL_DPHIGH(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_OTGCTL_ADDR(x), BP_USB_OTGCTL_DPHIGH), v)) /*@}*/ /******************************************************************************* @@ -1054,8 +1061,8 @@ #define HW_USB_ISTAT_ADDR(x) ((x) + 0x80U) #define HW_USB_ISTAT(x) (*(__IO hw_usb_istat_t *) HW_USB_ISTAT_ADDR(x)) -#define HW_USB_ISTAT_RD(x) (HW_USB_ISTAT(x).U) -#define HW_USB_ISTAT_WR(x, v) (HW_USB_ISTAT(x).U = (v)) +#define HW_USB_ISTAT_RD(x) (ADDRESS_READ(hw_usb_istat_t, HW_USB_ISTAT_ADDR(x))) +#define HW_USB_ISTAT_WR(x, v) (ADDRESS_WRITE(hw_usb_istat_t, HW_USB_ISTAT_ADDR(x), v)) #define HW_USB_ISTAT_SET(x, v) (HW_USB_ISTAT_WR(x, HW_USB_ISTAT_RD(x) | (v))) #define HW_USB_ISTAT_CLR(x, v) (HW_USB_ISTAT_WR(x, HW_USB_ISTAT_RD(x) & ~(v))) #define HW_USB_ISTAT_TOG(x, v) (HW_USB_ISTAT_WR(x, HW_USB_ISTAT_RD(x) ^ (v))) @@ -1080,13 +1087,13 @@ #define BS_USB_ISTAT_USBRST (1U) /*!< Bit field size in bits for USB_ISTAT_USBRST. */ /*! @brief Read current value of the USB_ISTAT_USBRST field. */ -#define BR_USB_ISTAT_USBRST(x) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_USBRST)) +#define BR_USB_ISTAT_USBRST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_USBRST))) /*! @brief Format value for bitfield USB_ISTAT_USBRST. */ #define BF_USB_ISTAT_USBRST(v) ((uint8_t)((uint8_t)(v) << BP_USB_ISTAT_USBRST) & BM_USB_ISTAT_USBRST) /*! @brief Set the USBRST field to a new value. */ -#define BW_USB_ISTAT_USBRST(x, v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_USBRST) = (v)) +#define BW_USB_ISTAT_USBRST(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_USBRST), v)) /*@}*/ /*! @@ -1102,13 +1109,13 @@ #define BS_USB_ISTAT_ERROR (1U) /*!< Bit field size in bits for USB_ISTAT_ERROR. */ /*! @brief Read current value of the USB_ISTAT_ERROR field. */ -#define BR_USB_ISTAT_ERROR(x) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_ERROR)) +#define BR_USB_ISTAT_ERROR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_ERROR))) /*! @brief Format value for bitfield USB_ISTAT_ERROR. */ #define BF_USB_ISTAT_ERROR(v) ((uint8_t)((uint8_t)(v) << BP_USB_ISTAT_ERROR) & BM_USB_ISTAT_ERROR) /*! @brief Set the ERROR field to a new value. */ -#define BW_USB_ISTAT_ERROR(x, v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_ERROR) = (v)) +#define BW_USB_ISTAT_ERROR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_ERROR), v)) /*@}*/ /*! @@ -1124,13 +1131,13 @@ #define BS_USB_ISTAT_SOFTOK (1U) /*!< Bit field size in bits for USB_ISTAT_SOFTOK. */ /*! @brief Read current value of the USB_ISTAT_SOFTOK field. */ -#define BR_USB_ISTAT_SOFTOK(x) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_SOFTOK)) +#define BR_USB_ISTAT_SOFTOK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_SOFTOK))) /*! @brief Format value for bitfield USB_ISTAT_SOFTOK. */ #define BF_USB_ISTAT_SOFTOK(v) ((uint8_t)((uint8_t)(v) << BP_USB_ISTAT_SOFTOK) & BM_USB_ISTAT_SOFTOK) /*! @brief Set the SOFTOK field to a new value. */ -#define BW_USB_ISTAT_SOFTOK(x, v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_SOFTOK) = (v)) +#define BW_USB_ISTAT_SOFTOK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_SOFTOK), v)) /*@}*/ /*! @@ -1148,13 +1155,13 @@ #define BS_USB_ISTAT_TOKDNE (1U) /*!< Bit field size in bits for USB_ISTAT_TOKDNE. */ /*! @brief Read current value of the USB_ISTAT_TOKDNE field. */ -#define BR_USB_ISTAT_TOKDNE(x) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_TOKDNE)) +#define BR_USB_ISTAT_TOKDNE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_TOKDNE))) /*! @brief Format value for bitfield USB_ISTAT_TOKDNE. */ #define BF_USB_ISTAT_TOKDNE(v) ((uint8_t)((uint8_t)(v) << BP_USB_ISTAT_TOKDNE) & BM_USB_ISTAT_TOKDNE) /*! @brief Set the TOKDNE field to a new value. */ -#define BW_USB_ISTAT_TOKDNE(x, v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_TOKDNE) = (v)) +#define BW_USB_ISTAT_TOKDNE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_TOKDNE), v)) /*@}*/ /*! @@ -1169,13 +1176,13 @@ #define BS_USB_ISTAT_SLEEP (1U) /*!< Bit field size in bits for USB_ISTAT_SLEEP. */ /*! @brief Read current value of the USB_ISTAT_SLEEP field. */ -#define BR_USB_ISTAT_SLEEP(x) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_SLEEP)) +#define BR_USB_ISTAT_SLEEP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_SLEEP))) /*! @brief Format value for bitfield USB_ISTAT_SLEEP. */ #define BF_USB_ISTAT_SLEEP(v) ((uint8_t)((uint8_t)(v) << BP_USB_ISTAT_SLEEP) & BM_USB_ISTAT_SLEEP) /*! @brief Set the SLEEP field to a new value. */ -#define BW_USB_ISTAT_SLEEP(x, v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_SLEEP) = (v)) +#define BW_USB_ISTAT_SLEEP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_SLEEP), v)) /*@}*/ /*! @@ -1190,13 +1197,13 @@ #define BS_USB_ISTAT_RESUME (1U) /*!< Bit field size in bits for USB_ISTAT_RESUME. */ /*! @brief Read current value of the USB_ISTAT_RESUME field. */ -#define BR_USB_ISTAT_RESUME(x) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_RESUME)) +#define BR_USB_ISTAT_RESUME(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_RESUME))) /*! @brief Format value for bitfield USB_ISTAT_RESUME. */ #define BF_USB_ISTAT_RESUME(v) ((uint8_t)((uint8_t)(v) << BP_USB_ISTAT_RESUME) & BM_USB_ISTAT_RESUME) /*! @brief Set the RESUME field to a new value. */ -#define BW_USB_ISTAT_RESUME(x, v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_RESUME) = (v)) +#define BW_USB_ISTAT_RESUME(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_RESUME), v)) /*@}*/ /*! @@ -1213,13 +1220,13 @@ #define BS_USB_ISTAT_ATTACH (1U) /*!< Bit field size in bits for USB_ISTAT_ATTACH. */ /*! @brief Read current value of the USB_ISTAT_ATTACH field. */ -#define BR_USB_ISTAT_ATTACH(x) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_ATTACH)) +#define BR_USB_ISTAT_ATTACH(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_ATTACH))) /*! @brief Format value for bitfield USB_ISTAT_ATTACH. */ #define BF_USB_ISTAT_ATTACH(v) ((uint8_t)((uint8_t)(v) << BP_USB_ISTAT_ATTACH) & BM_USB_ISTAT_ATTACH) /*! @brief Set the ATTACH field to a new value. */ -#define BW_USB_ISTAT_ATTACH(x, v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_ATTACH) = (v)) +#define BW_USB_ISTAT_ATTACH(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_ATTACH), v)) /*@}*/ /*! @@ -1237,13 +1244,13 @@ #define BS_USB_ISTAT_STALL (1U) /*!< Bit field size in bits for USB_ISTAT_STALL. */ /*! @brief Read current value of the USB_ISTAT_STALL field. */ -#define BR_USB_ISTAT_STALL(x) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_STALL)) +#define BR_USB_ISTAT_STALL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_STALL))) /*! @brief Format value for bitfield USB_ISTAT_STALL. */ #define BF_USB_ISTAT_STALL(v) ((uint8_t)((uint8_t)(v) << BP_USB_ISTAT_STALL) & BM_USB_ISTAT_STALL) /*! @brief Set the STALL field to a new value. */ -#define BW_USB_ISTAT_STALL(x, v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_STALL) = (v)) +#define BW_USB_ISTAT_STALL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ISTAT_ADDR(x), BP_USB_ISTAT_STALL), v)) /*@}*/ /******************************************************************************* @@ -1282,8 +1289,8 @@ #define HW_USB_INTEN_ADDR(x) ((x) + 0x84U) #define HW_USB_INTEN(x) (*(__IO hw_usb_inten_t *) HW_USB_INTEN_ADDR(x)) -#define HW_USB_INTEN_RD(x) (HW_USB_INTEN(x).U) -#define HW_USB_INTEN_WR(x, v) (HW_USB_INTEN(x).U = (v)) +#define HW_USB_INTEN_RD(x) (ADDRESS_READ(hw_usb_inten_t, HW_USB_INTEN_ADDR(x))) +#define HW_USB_INTEN_WR(x, v) (ADDRESS_WRITE(hw_usb_inten_t, HW_USB_INTEN_ADDR(x), v)) #define HW_USB_INTEN_SET(x, v) (HW_USB_INTEN_WR(x, HW_USB_INTEN_RD(x) | (v))) #define HW_USB_INTEN_CLR(x, v) (HW_USB_INTEN_WR(x, HW_USB_INTEN_RD(x) & ~(v))) #define HW_USB_INTEN_TOG(x, v) (HW_USB_INTEN_WR(x, HW_USB_INTEN_RD(x) ^ (v))) @@ -1306,13 +1313,13 @@ #define BS_USB_INTEN_USBRSTEN (1U) /*!< Bit field size in bits for USB_INTEN_USBRSTEN. */ /*! @brief Read current value of the USB_INTEN_USBRSTEN field. */ -#define BR_USB_INTEN_USBRSTEN(x) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_USBRSTEN)) +#define BR_USB_INTEN_USBRSTEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_USBRSTEN))) /*! @brief Format value for bitfield USB_INTEN_USBRSTEN. */ #define BF_USB_INTEN_USBRSTEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_INTEN_USBRSTEN) & BM_USB_INTEN_USBRSTEN) /*! @brief Set the USBRSTEN field to a new value. */ -#define BW_USB_INTEN_USBRSTEN(x, v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_USBRSTEN) = (v)) +#define BW_USB_INTEN_USBRSTEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_USBRSTEN), v)) /*@}*/ /*! @@ -1328,13 +1335,13 @@ #define BS_USB_INTEN_ERROREN (1U) /*!< Bit field size in bits for USB_INTEN_ERROREN. */ /*! @brief Read current value of the USB_INTEN_ERROREN field. */ -#define BR_USB_INTEN_ERROREN(x) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_ERROREN)) +#define BR_USB_INTEN_ERROREN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_ERROREN))) /*! @brief Format value for bitfield USB_INTEN_ERROREN. */ #define BF_USB_INTEN_ERROREN(v) ((uint8_t)((uint8_t)(v) << BP_USB_INTEN_ERROREN) & BM_USB_INTEN_ERROREN) /*! @brief Set the ERROREN field to a new value. */ -#define BW_USB_INTEN_ERROREN(x, v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_ERROREN) = (v)) +#define BW_USB_INTEN_ERROREN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_ERROREN), v)) /*@}*/ /*! @@ -1350,13 +1357,13 @@ #define BS_USB_INTEN_SOFTOKEN (1U) /*!< Bit field size in bits for USB_INTEN_SOFTOKEN. */ /*! @brief Read current value of the USB_INTEN_SOFTOKEN field. */ -#define BR_USB_INTEN_SOFTOKEN(x) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_SOFTOKEN)) +#define BR_USB_INTEN_SOFTOKEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_SOFTOKEN))) /*! @brief Format value for bitfield USB_INTEN_SOFTOKEN. */ #define BF_USB_INTEN_SOFTOKEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_INTEN_SOFTOKEN) & BM_USB_INTEN_SOFTOKEN) /*! @brief Set the SOFTOKEN field to a new value. */ -#define BW_USB_INTEN_SOFTOKEN(x, v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_SOFTOKEN) = (v)) +#define BW_USB_INTEN_SOFTOKEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_SOFTOKEN), v)) /*@}*/ /*! @@ -1372,13 +1379,13 @@ #define BS_USB_INTEN_TOKDNEEN (1U) /*!< Bit field size in bits for USB_INTEN_TOKDNEEN. */ /*! @brief Read current value of the USB_INTEN_TOKDNEEN field. */ -#define BR_USB_INTEN_TOKDNEEN(x) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_TOKDNEEN)) +#define BR_USB_INTEN_TOKDNEEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_TOKDNEEN))) /*! @brief Format value for bitfield USB_INTEN_TOKDNEEN. */ #define BF_USB_INTEN_TOKDNEEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_INTEN_TOKDNEEN) & BM_USB_INTEN_TOKDNEEN) /*! @brief Set the TOKDNEEN field to a new value. */ -#define BW_USB_INTEN_TOKDNEEN(x, v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_TOKDNEEN) = (v)) +#define BW_USB_INTEN_TOKDNEEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_TOKDNEEN), v)) /*@}*/ /*! @@ -1394,13 +1401,13 @@ #define BS_USB_INTEN_SLEEPEN (1U) /*!< Bit field size in bits for USB_INTEN_SLEEPEN. */ /*! @brief Read current value of the USB_INTEN_SLEEPEN field. */ -#define BR_USB_INTEN_SLEEPEN(x) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_SLEEPEN)) +#define BR_USB_INTEN_SLEEPEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_SLEEPEN))) /*! @brief Format value for bitfield USB_INTEN_SLEEPEN. */ #define BF_USB_INTEN_SLEEPEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_INTEN_SLEEPEN) & BM_USB_INTEN_SLEEPEN) /*! @brief Set the SLEEPEN field to a new value. */ -#define BW_USB_INTEN_SLEEPEN(x, v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_SLEEPEN) = (v)) +#define BW_USB_INTEN_SLEEPEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_SLEEPEN), v)) /*@}*/ /*! @@ -1416,13 +1423,13 @@ #define BS_USB_INTEN_RESUMEEN (1U) /*!< Bit field size in bits for USB_INTEN_RESUMEEN. */ /*! @brief Read current value of the USB_INTEN_RESUMEEN field. */ -#define BR_USB_INTEN_RESUMEEN(x) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_RESUMEEN)) +#define BR_USB_INTEN_RESUMEEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_RESUMEEN))) /*! @brief Format value for bitfield USB_INTEN_RESUMEEN. */ #define BF_USB_INTEN_RESUMEEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_INTEN_RESUMEEN) & BM_USB_INTEN_RESUMEEN) /*! @brief Set the RESUMEEN field to a new value. */ -#define BW_USB_INTEN_RESUMEEN(x, v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_RESUMEEN) = (v)) +#define BW_USB_INTEN_RESUMEEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_RESUMEEN), v)) /*@}*/ /*! @@ -1438,13 +1445,13 @@ #define BS_USB_INTEN_ATTACHEN (1U) /*!< Bit field size in bits for USB_INTEN_ATTACHEN. */ /*! @brief Read current value of the USB_INTEN_ATTACHEN field. */ -#define BR_USB_INTEN_ATTACHEN(x) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_ATTACHEN)) +#define BR_USB_INTEN_ATTACHEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_ATTACHEN))) /*! @brief Format value for bitfield USB_INTEN_ATTACHEN. */ #define BF_USB_INTEN_ATTACHEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_INTEN_ATTACHEN) & BM_USB_INTEN_ATTACHEN) /*! @brief Set the ATTACHEN field to a new value. */ -#define BW_USB_INTEN_ATTACHEN(x, v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_ATTACHEN) = (v)) +#define BW_USB_INTEN_ATTACHEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_ATTACHEN), v)) /*@}*/ /*! @@ -1460,13 +1467,13 @@ #define BS_USB_INTEN_STALLEN (1U) /*!< Bit field size in bits for USB_INTEN_STALLEN. */ /*! @brief Read current value of the USB_INTEN_STALLEN field. */ -#define BR_USB_INTEN_STALLEN(x) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_STALLEN)) +#define BR_USB_INTEN_STALLEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_STALLEN))) /*! @brief Format value for bitfield USB_INTEN_STALLEN. */ #define BF_USB_INTEN_STALLEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_INTEN_STALLEN) & BM_USB_INTEN_STALLEN) /*! @brief Set the STALLEN field to a new value. */ -#define BW_USB_INTEN_STALLEN(x, v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_STALLEN) = (v)) +#define BW_USB_INTEN_STALLEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_INTEN_ADDR(x), BP_USB_INTEN_STALLEN), v)) /*@}*/ /******************************************************************************* @@ -1510,8 +1517,8 @@ #define HW_USB_ERRSTAT_ADDR(x) ((x) + 0x88U) #define HW_USB_ERRSTAT(x) (*(__IO hw_usb_errstat_t *) HW_USB_ERRSTAT_ADDR(x)) -#define HW_USB_ERRSTAT_RD(x) (HW_USB_ERRSTAT(x).U) -#define HW_USB_ERRSTAT_WR(x, v) (HW_USB_ERRSTAT(x).U = (v)) +#define HW_USB_ERRSTAT_RD(x) (ADDRESS_READ(hw_usb_errstat_t, HW_USB_ERRSTAT_ADDR(x))) +#define HW_USB_ERRSTAT_WR(x, v) (ADDRESS_WRITE(hw_usb_errstat_t, HW_USB_ERRSTAT_ADDR(x), v)) #define HW_USB_ERRSTAT_SET(x, v) (HW_USB_ERRSTAT_WR(x, HW_USB_ERRSTAT_RD(x) | (v))) #define HW_USB_ERRSTAT_CLR(x, v) (HW_USB_ERRSTAT_WR(x, HW_USB_ERRSTAT_RD(x) & ~(v))) #define HW_USB_ERRSTAT_TOG(x, v) (HW_USB_ERRSTAT_WR(x, HW_USB_ERRSTAT_RD(x) ^ (v))) @@ -1532,13 +1539,13 @@ #define BS_USB_ERRSTAT_PIDERR (1U) /*!< Bit field size in bits for USB_ERRSTAT_PIDERR. */ /*! @brief Read current value of the USB_ERRSTAT_PIDERR field. */ -#define BR_USB_ERRSTAT_PIDERR(x) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_PIDERR)) +#define BR_USB_ERRSTAT_PIDERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_PIDERR))) /*! @brief Format value for bitfield USB_ERRSTAT_PIDERR. */ #define BF_USB_ERRSTAT_PIDERR(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERRSTAT_PIDERR) & BM_USB_ERRSTAT_PIDERR) /*! @brief Set the PIDERR field to a new value. */ -#define BW_USB_ERRSTAT_PIDERR(x, v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_PIDERR) = (v)) +#define BW_USB_ERRSTAT_PIDERR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_PIDERR), v)) /*@}*/ /*! @@ -1559,13 +1566,13 @@ #define BS_USB_ERRSTAT_CRC5EOF (1U) /*!< Bit field size in bits for USB_ERRSTAT_CRC5EOF. */ /*! @brief Read current value of the USB_ERRSTAT_CRC5EOF field. */ -#define BR_USB_ERRSTAT_CRC5EOF(x) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_CRC5EOF)) +#define BR_USB_ERRSTAT_CRC5EOF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_CRC5EOF))) /*! @brief Format value for bitfield USB_ERRSTAT_CRC5EOF. */ #define BF_USB_ERRSTAT_CRC5EOF(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERRSTAT_CRC5EOF) & BM_USB_ERRSTAT_CRC5EOF) /*! @brief Set the CRC5EOF field to a new value. */ -#define BW_USB_ERRSTAT_CRC5EOF(x, v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_CRC5EOF) = (v)) +#define BW_USB_ERRSTAT_CRC5EOF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_CRC5EOF), v)) /*@}*/ /*! @@ -1579,13 +1586,13 @@ #define BS_USB_ERRSTAT_CRC16 (1U) /*!< Bit field size in bits for USB_ERRSTAT_CRC16. */ /*! @brief Read current value of the USB_ERRSTAT_CRC16 field. */ -#define BR_USB_ERRSTAT_CRC16(x) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_CRC16)) +#define BR_USB_ERRSTAT_CRC16(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_CRC16))) /*! @brief Format value for bitfield USB_ERRSTAT_CRC16. */ #define BF_USB_ERRSTAT_CRC16(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERRSTAT_CRC16) & BM_USB_ERRSTAT_CRC16) /*! @brief Set the CRC16 field to a new value. */ -#define BW_USB_ERRSTAT_CRC16(x, v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_CRC16) = (v)) +#define BW_USB_ERRSTAT_CRC16(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_CRC16), v)) /*@}*/ /*! @@ -1601,13 +1608,13 @@ #define BS_USB_ERRSTAT_DFN8 (1U) /*!< Bit field size in bits for USB_ERRSTAT_DFN8. */ /*! @brief Read current value of the USB_ERRSTAT_DFN8 field. */ -#define BR_USB_ERRSTAT_DFN8(x) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_DFN8)) +#define BR_USB_ERRSTAT_DFN8(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_DFN8))) /*! @brief Format value for bitfield USB_ERRSTAT_DFN8. */ #define BF_USB_ERRSTAT_DFN8(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERRSTAT_DFN8) & BM_USB_ERRSTAT_DFN8) /*! @brief Set the DFN8 field to a new value. */ -#define BW_USB_ERRSTAT_DFN8(x, v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_DFN8) = (v)) +#define BW_USB_ERRSTAT_DFN8(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_DFN8), v)) /*@}*/ /*! @@ -1625,13 +1632,13 @@ #define BS_USB_ERRSTAT_BTOERR (1U) /*!< Bit field size in bits for USB_ERRSTAT_BTOERR. */ /*! @brief Read current value of the USB_ERRSTAT_BTOERR field. */ -#define BR_USB_ERRSTAT_BTOERR(x) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_BTOERR)) +#define BR_USB_ERRSTAT_BTOERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_BTOERR))) /*! @brief Format value for bitfield USB_ERRSTAT_BTOERR. */ #define BF_USB_ERRSTAT_BTOERR(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERRSTAT_BTOERR) & BM_USB_ERRSTAT_BTOERR) /*! @brief Set the BTOERR field to a new value. */ -#define BW_USB_ERRSTAT_BTOERR(x, v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_BTOERR) = (v)) +#define BW_USB_ERRSTAT_BTOERR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_BTOERR), v)) /*@}*/ /*! @@ -1653,13 +1660,13 @@ #define BS_USB_ERRSTAT_DMAERR (1U) /*!< Bit field size in bits for USB_ERRSTAT_DMAERR. */ /*! @brief Read current value of the USB_ERRSTAT_DMAERR field. */ -#define BR_USB_ERRSTAT_DMAERR(x) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_DMAERR)) +#define BR_USB_ERRSTAT_DMAERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_DMAERR))) /*! @brief Format value for bitfield USB_ERRSTAT_DMAERR. */ #define BF_USB_ERRSTAT_DMAERR(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERRSTAT_DMAERR) & BM_USB_ERRSTAT_DMAERR) /*! @brief Set the DMAERR field to a new value. */ -#define BW_USB_ERRSTAT_DMAERR(x, v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_DMAERR) = (v)) +#define BW_USB_ERRSTAT_DMAERR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_DMAERR), v)) /*@}*/ /*! @@ -1674,13 +1681,13 @@ #define BS_USB_ERRSTAT_BTSERR (1U) /*!< Bit field size in bits for USB_ERRSTAT_BTSERR. */ /*! @brief Read current value of the USB_ERRSTAT_BTSERR field. */ -#define BR_USB_ERRSTAT_BTSERR(x) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_BTSERR)) +#define BR_USB_ERRSTAT_BTSERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_BTSERR))) /*! @brief Format value for bitfield USB_ERRSTAT_BTSERR. */ #define BF_USB_ERRSTAT_BTSERR(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERRSTAT_BTSERR) & BM_USB_ERRSTAT_BTSERR) /*! @brief Set the BTSERR field to a new value. */ -#define BW_USB_ERRSTAT_BTSERR(x, v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_BTSERR) = (v)) +#define BW_USB_ERRSTAT_BTSERR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERRSTAT_ADDR(x), BP_USB_ERRSTAT_BTSERR), v)) /*@}*/ /******************************************************************************* @@ -1721,8 +1728,8 @@ #define HW_USB_ERREN_ADDR(x) ((x) + 0x8CU) #define HW_USB_ERREN(x) (*(__IO hw_usb_erren_t *) HW_USB_ERREN_ADDR(x)) -#define HW_USB_ERREN_RD(x) (HW_USB_ERREN(x).U) -#define HW_USB_ERREN_WR(x, v) (HW_USB_ERREN(x).U = (v)) +#define HW_USB_ERREN_RD(x) (ADDRESS_READ(hw_usb_erren_t, HW_USB_ERREN_ADDR(x))) +#define HW_USB_ERREN_WR(x, v) (ADDRESS_WRITE(hw_usb_erren_t, HW_USB_ERREN_ADDR(x), v)) #define HW_USB_ERREN_SET(x, v) (HW_USB_ERREN_WR(x, HW_USB_ERREN_RD(x) | (v))) #define HW_USB_ERREN_CLR(x, v) (HW_USB_ERREN_WR(x, HW_USB_ERREN_RD(x) & ~(v))) #define HW_USB_ERREN_TOG(x, v) (HW_USB_ERREN_WR(x, HW_USB_ERREN_RD(x) ^ (v))) @@ -1745,13 +1752,13 @@ #define BS_USB_ERREN_PIDERREN (1U) /*!< Bit field size in bits for USB_ERREN_PIDERREN. */ /*! @brief Read current value of the USB_ERREN_PIDERREN field. */ -#define BR_USB_ERREN_PIDERREN(x) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_PIDERREN)) +#define BR_USB_ERREN_PIDERREN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_PIDERREN))) /*! @brief Format value for bitfield USB_ERREN_PIDERREN. */ #define BF_USB_ERREN_PIDERREN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERREN_PIDERREN) & BM_USB_ERREN_PIDERREN) /*! @brief Set the PIDERREN field to a new value. */ -#define BW_USB_ERREN_PIDERREN(x, v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_PIDERREN) = (v)) +#define BW_USB_ERREN_PIDERREN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_PIDERREN), v)) /*@}*/ /*! @@ -1767,13 +1774,13 @@ #define BS_USB_ERREN_CRC5EOFEN (1U) /*!< Bit field size in bits for USB_ERREN_CRC5EOFEN. */ /*! @brief Read current value of the USB_ERREN_CRC5EOFEN field. */ -#define BR_USB_ERREN_CRC5EOFEN(x) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_CRC5EOFEN)) +#define BR_USB_ERREN_CRC5EOFEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_CRC5EOFEN))) /*! @brief Format value for bitfield USB_ERREN_CRC5EOFEN. */ #define BF_USB_ERREN_CRC5EOFEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERREN_CRC5EOFEN) & BM_USB_ERREN_CRC5EOFEN) /*! @brief Set the CRC5EOFEN field to a new value. */ -#define BW_USB_ERREN_CRC5EOFEN(x, v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_CRC5EOFEN) = (v)) +#define BW_USB_ERREN_CRC5EOFEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_CRC5EOFEN), v)) /*@}*/ /*! @@ -1789,13 +1796,13 @@ #define BS_USB_ERREN_CRC16EN (1U) /*!< Bit field size in bits for USB_ERREN_CRC16EN. */ /*! @brief Read current value of the USB_ERREN_CRC16EN field. */ -#define BR_USB_ERREN_CRC16EN(x) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_CRC16EN)) +#define BR_USB_ERREN_CRC16EN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_CRC16EN))) /*! @brief Format value for bitfield USB_ERREN_CRC16EN. */ #define BF_USB_ERREN_CRC16EN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERREN_CRC16EN) & BM_USB_ERREN_CRC16EN) /*! @brief Set the CRC16EN field to a new value. */ -#define BW_USB_ERREN_CRC16EN(x, v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_CRC16EN) = (v)) +#define BW_USB_ERREN_CRC16EN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_CRC16EN), v)) /*@}*/ /*! @@ -1811,13 +1818,13 @@ #define BS_USB_ERREN_DFN8EN (1U) /*!< Bit field size in bits for USB_ERREN_DFN8EN. */ /*! @brief Read current value of the USB_ERREN_DFN8EN field. */ -#define BR_USB_ERREN_DFN8EN(x) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_DFN8EN)) +#define BR_USB_ERREN_DFN8EN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_DFN8EN))) /*! @brief Format value for bitfield USB_ERREN_DFN8EN. */ #define BF_USB_ERREN_DFN8EN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERREN_DFN8EN) & BM_USB_ERREN_DFN8EN) /*! @brief Set the DFN8EN field to a new value. */ -#define BW_USB_ERREN_DFN8EN(x, v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_DFN8EN) = (v)) +#define BW_USB_ERREN_DFN8EN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_DFN8EN), v)) /*@}*/ /*! @@ -1833,13 +1840,13 @@ #define BS_USB_ERREN_BTOERREN (1U) /*!< Bit field size in bits for USB_ERREN_BTOERREN. */ /*! @brief Read current value of the USB_ERREN_BTOERREN field. */ -#define BR_USB_ERREN_BTOERREN(x) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_BTOERREN)) +#define BR_USB_ERREN_BTOERREN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_BTOERREN))) /*! @brief Format value for bitfield USB_ERREN_BTOERREN. */ #define BF_USB_ERREN_BTOERREN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERREN_BTOERREN) & BM_USB_ERREN_BTOERREN) /*! @brief Set the BTOERREN field to a new value. */ -#define BW_USB_ERREN_BTOERREN(x, v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_BTOERREN) = (v)) +#define BW_USB_ERREN_BTOERREN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_BTOERREN), v)) /*@}*/ /*! @@ -1855,13 +1862,13 @@ #define BS_USB_ERREN_DMAERREN (1U) /*!< Bit field size in bits for USB_ERREN_DMAERREN. */ /*! @brief Read current value of the USB_ERREN_DMAERREN field. */ -#define BR_USB_ERREN_DMAERREN(x) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_DMAERREN)) +#define BR_USB_ERREN_DMAERREN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_DMAERREN))) /*! @brief Format value for bitfield USB_ERREN_DMAERREN. */ #define BF_USB_ERREN_DMAERREN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERREN_DMAERREN) & BM_USB_ERREN_DMAERREN) /*! @brief Set the DMAERREN field to a new value. */ -#define BW_USB_ERREN_DMAERREN(x, v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_DMAERREN) = (v)) +#define BW_USB_ERREN_DMAERREN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_DMAERREN), v)) /*@}*/ /*! @@ -1877,13 +1884,13 @@ #define BS_USB_ERREN_BTSERREN (1U) /*!< Bit field size in bits for USB_ERREN_BTSERREN. */ /*! @brief Read current value of the USB_ERREN_BTSERREN field. */ -#define BR_USB_ERREN_BTSERREN(x) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_BTSERREN)) +#define BR_USB_ERREN_BTSERREN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_BTSERREN))) /*! @brief Format value for bitfield USB_ERREN_BTSERREN. */ #define BF_USB_ERREN_BTSERREN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ERREN_BTSERREN) & BM_USB_ERREN_BTSERREN) /*! @brief Set the BTSERREN field to a new value. */ -#define BW_USB_ERREN_BTSERREN(x, v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_BTSERREN) = (v)) +#define BW_USB_ERREN_BTSERREN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ERREN_ADDR(x), BP_USB_ERREN_BTSERREN), v)) /*@}*/ /******************************************************************************* @@ -1928,7 +1935,7 @@ #define HW_USB_STAT_ADDR(x) ((x) + 0x90U) #define HW_USB_STAT(x) (*(__I hw_usb_stat_t *) HW_USB_STAT_ADDR(x)) -#define HW_USB_STAT_RD(x) (HW_USB_STAT(x).U) +#define HW_USB_STAT_RD(x) (ADDRESS_READ(hw_usb_stat_t, HW_USB_STAT_ADDR(x))) /*@}*/ /* @@ -1947,7 +1954,7 @@ #define BS_USB_STAT_ODD (1U) /*!< Bit field size in bits for USB_STAT_ODD. */ /*! @brief Read current value of the USB_STAT_ODD field. */ -#define BR_USB_STAT_ODD(x) (BITBAND_ACCESS8(HW_USB_STAT_ADDR(x), BP_USB_STAT_ODD)) +#define BR_USB_STAT_ODD(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_STAT_ADDR(x), BP_USB_STAT_ODD))) /*@}*/ /*! @@ -1963,7 +1970,7 @@ #define BS_USB_STAT_TX (1U) /*!< Bit field size in bits for USB_STAT_TX. */ /*! @brief Read current value of the USB_STAT_TX field. */ -#define BR_USB_STAT_TX(x) (BITBAND_ACCESS8(HW_USB_STAT_ADDR(x), BP_USB_STAT_TX)) +#define BR_USB_STAT_TX(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_STAT_ADDR(x), BP_USB_STAT_TX))) /*@}*/ /*! @@ -1979,7 +1986,7 @@ #define BS_USB_STAT_ENDP (4U) /*!< Bit field size in bits for USB_STAT_ENDP. */ /*! @brief Read current value of the USB_STAT_ENDP field. */ -#define BR_USB_STAT_ENDP(x) (HW_USB_STAT(x).B.ENDP) +#define BR_USB_STAT_ENDP(x) (UNION_READ(hw_usb_stat_t, HW_USB_STAT_ADDR(x), U, B.ENDP)) /*@}*/ /******************************************************************************* @@ -2017,8 +2024,8 @@ #define HW_USB_CTL_ADDR(x) ((x) + 0x94U) #define HW_USB_CTL(x) (*(__IO hw_usb_ctl_t *) HW_USB_CTL_ADDR(x)) -#define HW_USB_CTL_RD(x) (HW_USB_CTL(x).U) -#define HW_USB_CTL_WR(x, v) (HW_USB_CTL(x).U = (v)) +#define HW_USB_CTL_RD(x) (ADDRESS_READ(hw_usb_ctl_t, HW_USB_CTL_ADDR(x))) +#define HW_USB_CTL_WR(x, v) (ADDRESS_WRITE(hw_usb_ctl_t, HW_USB_CTL_ADDR(x), v)) #define HW_USB_CTL_SET(x, v) (HW_USB_CTL_WR(x, HW_USB_CTL_RD(x) | (v))) #define HW_USB_CTL_CLR(x, v) (HW_USB_CTL_WR(x, HW_USB_CTL_RD(x) & ~(v))) #define HW_USB_CTL_TOG(x, v) (HW_USB_CTL_WR(x, HW_USB_CTL_RD(x) ^ (v))) @@ -2046,13 +2053,13 @@ #define BS_USB_CTL_USBENSOFEN (1U) /*!< Bit field size in bits for USB_CTL_USBENSOFEN. */ /*! @brief Read current value of the USB_CTL_USBENSOFEN field. */ -#define BR_USB_CTL_USBENSOFEN(x) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_USBENSOFEN)) +#define BR_USB_CTL_USBENSOFEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_USBENSOFEN))) /*! @brief Format value for bitfield USB_CTL_USBENSOFEN. */ #define BF_USB_CTL_USBENSOFEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_CTL_USBENSOFEN) & BM_USB_CTL_USBENSOFEN) /*! @brief Set the USBENSOFEN field to a new value. */ -#define BW_USB_CTL_USBENSOFEN(x, v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_USBENSOFEN) = (v)) +#define BW_USB_CTL_USBENSOFEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_USBENSOFEN), v)) /*@}*/ /*! @@ -2067,13 +2074,13 @@ #define BS_USB_CTL_ODDRST (1U) /*!< Bit field size in bits for USB_CTL_ODDRST. */ /*! @brief Read current value of the USB_CTL_ODDRST field. */ -#define BR_USB_CTL_ODDRST(x) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_ODDRST)) +#define BR_USB_CTL_ODDRST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_ODDRST))) /*! @brief Format value for bitfield USB_CTL_ODDRST. */ #define BF_USB_CTL_ODDRST(v) ((uint8_t)((uint8_t)(v) << BP_USB_CTL_ODDRST) & BM_USB_CTL_ODDRST) /*! @brief Set the ODDRST field to a new value. */ -#define BW_USB_CTL_ODDRST(x, v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_ODDRST) = (v)) +#define BW_USB_CTL_ODDRST(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_ODDRST), v)) /*@}*/ /*! @@ -2092,13 +2099,13 @@ #define BS_USB_CTL_RESUME (1U) /*!< Bit field size in bits for USB_CTL_RESUME. */ /*! @brief Read current value of the USB_CTL_RESUME field. */ -#define BR_USB_CTL_RESUME(x) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_RESUME)) +#define BR_USB_CTL_RESUME(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_RESUME))) /*! @brief Format value for bitfield USB_CTL_RESUME. */ #define BF_USB_CTL_RESUME(v) ((uint8_t)((uint8_t)(v) << BP_USB_CTL_RESUME) & BM_USB_CTL_RESUME) /*! @brief Set the RESUME field to a new value. */ -#define BW_USB_CTL_RESUME(x, v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_RESUME) = (v)) +#define BW_USB_CTL_RESUME(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_RESUME), v)) /*@}*/ /*! @@ -2114,13 +2121,13 @@ #define BS_USB_CTL_HOSTMODEEN (1U) /*!< Bit field size in bits for USB_CTL_HOSTMODEEN. */ /*! @brief Read current value of the USB_CTL_HOSTMODEEN field. */ -#define BR_USB_CTL_HOSTMODEEN(x) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_HOSTMODEEN)) +#define BR_USB_CTL_HOSTMODEEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_HOSTMODEEN))) /*! @brief Format value for bitfield USB_CTL_HOSTMODEEN. */ #define BF_USB_CTL_HOSTMODEEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_CTL_HOSTMODEEN) & BM_USB_CTL_HOSTMODEEN) /*! @brief Set the HOSTMODEEN field to a new value. */ -#define BW_USB_CTL_HOSTMODEEN(x, v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_HOSTMODEEN) = (v)) +#define BW_USB_CTL_HOSTMODEEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_HOSTMODEEN), v)) /*@}*/ /*! @@ -2139,13 +2146,13 @@ #define BS_USB_CTL_RESET (1U) /*!< Bit field size in bits for USB_CTL_RESET. */ /*! @brief Read current value of the USB_CTL_RESET field. */ -#define BR_USB_CTL_RESET(x) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_RESET)) +#define BR_USB_CTL_RESET(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_RESET))) /*! @brief Format value for bitfield USB_CTL_RESET. */ #define BF_USB_CTL_RESET(v) ((uint8_t)((uint8_t)(v) << BP_USB_CTL_RESET) & BM_USB_CTL_RESET) /*! @brief Set the RESET field to a new value. */ -#define BW_USB_CTL_RESET(x, v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_RESET) = (v)) +#define BW_USB_CTL_RESET(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_RESET), v)) /*@}*/ /*! @@ -2166,13 +2173,13 @@ #define BS_USB_CTL_TXSUSPENDTOKENBUSY (1U) /*!< Bit field size in bits for USB_CTL_TXSUSPENDTOKENBUSY. */ /*! @brief Read current value of the USB_CTL_TXSUSPENDTOKENBUSY field. */ -#define BR_USB_CTL_TXSUSPENDTOKENBUSY(x) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_TXSUSPENDTOKENBUSY)) +#define BR_USB_CTL_TXSUSPENDTOKENBUSY(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_TXSUSPENDTOKENBUSY))) /*! @brief Format value for bitfield USB_CTL_TXSUSPENDTOKENBUSY. */ #define BF_USB_CTL_TXSUSPENDTOKENBUSY(v) ((uint8_t)((uint8_t)(v) << BP_USB_CTL_TXSUSPENDTOKENBUSY) & BM_USB_CTL_TXSUSPENDTOKENBUSY) /*! @brief Set the TXSUSPENDTOKENBUSY field to a new value. */ -#define BW_USB_CTL_TXSUSPENDTOKENBUSY(x, v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_TXSUSPENDTOKENBUSY) = (v)) +#define BW_USB_CTL_TXSUSPENDTOKENBUSY(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_TXSUSPENDTOKENBUSY), v)) /*@}*/ /*! @@ -2184,13 +2191,13 @@ #define BS_USB_CTL_SE0 (1U) /*!< Bit field size in bits for USB_CTL_SE0. */ /*! @brief Read current value of the USB_CTL_SE0 field. */ -#define BR_USB_CTL_SE0(x) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_SE0)) +#define BR_USB_CTL_SE0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_SE0))) /*! @brief Format value for bitfield USB_CTL_SE0. */ #define BF_USB_CTL_SE0(v) ((uint8_t)((uint8_t)(v) << BP_USB_CTL_SE0) & BM_USB_CTL_SE0) /*! @brief Set the SE0 field to a new value. */ -#define BW_USB_CTL_SE0(x, v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_SE0) = (v)) +#define BW_USB_CTL_SE0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_SE0), v)) /*@}*/ /*! @@ -2204,13 +2211,13 @@ #define BS_USB_CTL_JSTATE (1U) /*!< Bit field size in bits for USB_CTL_JSTATE. */ /*! @brief Read current value of the USB_CTL_JSTATE field. */ -#define BR_USB_CTL_JSTATE(x) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_JSTATE)) +#define BR_USB_CTL_JSTATE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_JSTATE))) /*! @brief Format value for bitfield USB_CTL_JSTATE. */ #define BF_USB_CTL_JSTATE(v) ((uint8_t)((uint8_t)(v) << BP_USB_CTL_JSTATE) & BM_USB_CTL_JSTATE) /*! @brief Set the JSTATE field to a new value. */ -#define BW_USB_CTL_JSTATE(x, v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_JSTATE) = (v)) +#define BW_USB_CTL_JSTATE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CTL_ADDR(x), BP_USB_CTL_JSTATE), v)) /*@}*/ /******************************************************************************* @@ -2247,8 +2254,8 @@ #define HW_USB_ADDR_ADDR(x) ((x) + 0x98U) #define HW_USB_ADDR(x) (*(__IO hw_usb_addr_t *) HW_USB_ADDR_ADDR(x)) -#define HW_USB_ADDR_RD(x) (HW_USB_ADDR(x).U) -#define HW_USB_ADDR_WR(x, v) (HW_USB_ADDR(x).U = (v)) +#define HW_USB_ADDR_RD(x) (ADDRESS_READ(hw_usb_addr_t, HW_USB_ADDR_ADDR(x))) +#define HW_USB_ADDR_WR(x, v) (ADDRESS_WRITE(hw_usb_addr_t, HW_USB_ADDR_ADDR(x), v)) #define HW_USB_ADDR_SET(x, v) (HW_USB_ADDR_WR(x, HW_USB_ADDR_RD(x) | (v))) #define HW_USB_ADDR_CLR(x, v) (HW_USB_ADDR_WR(x, HW_USB_ADDR_RD(x) & ~(v))) #define HW_USB_ADDR_TOG(x, v) (HW_USB_ADDR_WR(x, HW_USB_ADDR_RD(x) ^ (v))) @@ -2270,7 +2277,7 @@ #define BS_USB_ADDR_ADDR (7U) /*!< Bit field size in bits for USB_ADDR_ADDR. */ /*! @brief Read current value of the USB_ADDR_ADDR field. */ -#define BR_USB_ADDR_ADDR(x) (HW_USB_ADDR(x).B.ADDR) +#define BR_USB_ADDR_ADDR(x) (UNION_READ(hw_usb_addr_t, HW_USB_ADDR_ADDR(x), U, B.ADDR)) /*! @brief Format value for bitfield USB_ADDR_ADDR. */ #define BF_USB_ADDR_ADDR(v) ((uint8_t)((uint8_t)(v) << BP_USB_ADDR_ADDR) & BM_USB_ADDR_ADDR) @@ -2292,13 +2299,13 @@ #define BS_USB_ADDR_LSEN (1U) /*!< Bit field size in bits for USB_ADDR_LSEN. */ /*! @brief Read current value of the USB_ADDR_LSEN field. */ -#define BR_USB_ADDR_LSEN(x) (BITBAND_ACCESS8(HW_USB_ADDR_ADDR(x), BP_USB_ADDR_LSEN)) +#define BR_USB_ADDR_LSEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ADDR_ADDR(x), BP_USB_ADDR_LSEN))) /*! @brief Format value for bitfield USB_ADDR_LSEN. */ #define BF_USB_ADDR_LSEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ADDR_LSEN) & BM_USB_ADDR_LSEN) /*! @brief Set the LSEN field to a new value. */ -#define BW_USB_ADDR_LSEN(x, v) (BITBAND_ACCESS8(HW_USB_ADDR_ADDR(x), BP_USB_ADDR_LSEN) = (v)) +#define BW_USB_ADDR_LSEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ADDR_ADDR(x), BP_USB_ADDR_LSEN), v)) /*@}*/ /******************************************************************************* @@ -2332,8 +2339,8 @@ #define HW_USB_BDTPAGE1_ADDR(x) ((x) + 0x9CU) #define HW_USB_BDTPAGE1(x) (*(__IO hw_usb_bdtpage1_t *) HW_USB_BDTPAGE1_ADDR(x)) -#define HW_USB_BDTPAGE1_RD(x) (HW_USB_BDTPAGE1(x).U) -#define HW_USB_BDTPAGE1_WR(x, v) (HW_USB_BDTPAGE1(x).U = (v)) +#define HW_USB_BDTPAGE1_RD(x) (ADDRESS_READ(hw_usb_bdtpage1_t, HW_USB_BDTPAGE1_ADDR(x))) +#define HW_USB_BDTPAGE1_WR(x, v) (ADDRESS_WRITE(hw_usb_bdtpage1_t, HW_USB_BDTPAGE1_ADDR(x), v)) #define HW_USB_BDTPAGE1_SET(x, v) (HW_USB_BDTPAGE1_WR(x, HW_USB_BDTPAGE1_RD(x) | (v))) #define HW_USB_BDTPAGE1_CLR(x, v) (HW_USB_BDTPAGE1_WR(x, HW_USB_BDTPAGE1_RD(x) & ~(v))) #define HW_USB_BDTPAGE1_TOG(x, v) (HW_USB_BDTPAGE1_WR(x, HW_USB_BDTPAGE1_RD(x) ^ (v))) @@ -2354,7 +2361,7 @@ #define BS_USB_BDTPAGE1_BDTBA (7U) /*!< Bit field size in bits for USB_BDTPAGE1_BDTBA. */ /*! @brief Read current value of the USB_BDTPAGE1_BDTBA field. */ -#define BR_USB_BDTPAGE1_BDTBA(x) (HW_USB_BDTPAGE1(x).B.BDTBA) +#define BR_USB_BDTPAGE1_BDTBA(x) (UNION_READ(hw_usb_bdtpage1_t, HW_USB_BDTPAGE1_ADDR(x), U, B.BDTBA)) /*! @brief Format value for bitfield USB_BDTPAGE1_BDTBA. */ #define BF_USB_BDTPAGE1_BDTBA(v) ((uint8_t)((uint8_t)(v) << BP_USB_BDTPAGE1_BDTBA) & BM_USB_BDTPAGE1_BDTBA) @@ -2392,8 +2399,8 @@ #define HW_USB_FRMNUML_ADDR(x) ((x) + 0xA0U) #define HW_USB_FRMNUML(x) (*(__IO hw_usb_frmnuml_t *) HW_USB_FRMNUML_ADDR(x)) -#define HW_USB_FRMNUML_RD(x) (HW_USB_FRMNUML(x).U) -#define HW_USB_FRMNUML_WR(x, v) (HW_USB_FRMNUML(x).U = (v)) +#define HW_USB_FRMNUML_RD(x) (ADDRESS_READ(hw_usb_frmnuml_t, HW_USB_FRMNUML_ADDR(x))) +#define HW_USB_FRMNUML_WR(x, v) (ADDRESS_WRITE(hw_usb_frmnuml_t, HW_USB_FRMNUML_ADDR(x), v)) #define HW_USB_FRMNUML_SET(x, v) (HW_USB_FRMNUML_WR(x, HW_USB_FRMNUML_RD(x) | (v))) #define HW_USB_FRMNUML_CLR(x, v) (HW_USB_FRMNUML_WR(x, HW_USB_FRMNUML_RD(x) & ~(v))) #define HW_USB_FRMNUML_TOG(x, v) (HW_USB_FRMNUML_WR(x, HW_USB_FRMNUML_RD(x) ^ (v))) @@ -2455,8 +2462,8 @@ #define HW_USB_FRMNUMH_ADDR(x) ((x) + 0xA4U) #define HW_USB_FRMNUMH(x) (*(__IO hw_usb_frmnumh_t *) HW_USB_FRMNUMH_ADDR(x)) -#define HW_USB_FRMNUMH_RD(x) (HW_USB_FRMNUMH(x).U) -#define HW_USB_FRMNUMH_WR(x, v) (HW_USB_FRMNUMH(x).U = (v)) +#define HW_USB_FRMNUMH_RD(x) (ADDRESS_READ(hw_usb_frmnumh_t, HW_USB_FRMNUMH_ADDR(x))) +#define HW_USB_FRMNUMH_WR(x, v) (ADDRESS_WRITE(hw_usb_frmnumh_t, HW_USB_FRMNUMH_ADDR(x), v)) #define HW_USB_FRMNUMH_SET(x, v) (HW_USB_FRMNUMH_WR(x, HW_USB_FRMNUMH_RD(x) | (v))) #define HW_USB_FRMNUMH_CLR(x, v) (HW_USB_FRMNUMH_WR(x, HW_USB_FRMNUMH_RD(x) & ~(v))) #define HW_USB_FRMNUMH_TOG(x, v) (HW_USB_FRMNUMH_WR(x, HW_USB_FRMNUMH_RD(x) ^ (v))) @@ -2479,7 +2486,7 @@ #define BS_USB_FRMNUMH_FRM (3U) /*!< Bit field size in bits for USB_FRMNUMH_FRM. */ /*! @brief Read current value of the USB_FRMNUMH_FRM field. */ -#define BR_USB_FRMNUMH_FRM(x) (HW_USB_FRMNUMH(x).B.FRM) +#define BR_USB_FRMNUMH_FRM(x) (UNION_READ(hw_usb_frmnumh_t, HW_USB_FRMNUMH_ADDR(x), U, B.FRM)) /*! @brief Format value for bitfield USB_FRMNUMH_FRM. */ #define BF_USB_FRMNUMH_FRM(v) ((uint8_t)((uint8_t)(v) << BP_USB_FRMNUMH_FRM) & BM_USB_FRMNUMH_FRM) @@ -2527,8 +2534,8 @@ #define HW_USB_TOKEN_ADDR(x) ((x) + 0xA8U) #define HW_USB_TOKEN(x) (*(__IO hw_usb_token_t *) HW_USB_TOKEN_ADDR(x)) -#define HW_USB_TOKEN_RD(x) (HW_USB_TOKEN(x).U) -#define HW_USB_TOKEN_WR(x, v) (HW_USB_TOKEN(x).U = (v)) +#define HW_USB_TOKEN_RD(x) (ADDRESS_READ(hw_usb_token_t, HW_USB_TOKEN_ADDR(x))) +#define HW_USB_TOKEN_WR(x, v) (ADDRESS_WRITE(hw_usb_token_t, HW_USB_TOKEN_ADDR(x), v)) #define HW_USB_TOKEN_SET(x, v) (HW_USB_TOKEN_WR(x, HW_USB_TOKEN_RD(x) | (v))) #define HW_USB_TOKEN_CLR(x, v) (HW_USB_TOKEN_WR(x, HW_USB_TOKEN_RD(x) & ~(v))) #define HW_USB_TOKEN_TOG(x, v) (HW_USB_TOKEN_WR(x, HW_USB_TOKEN_RD(x) ^ (v))) @@ -2550,7 +2557,7 @@ #define BS_USB_TOKEN_TOKENENDPT (4U) /*!< Bit field size in bits for USB_TOKEN_TOKENENDPT. */ /*! @brief Read current value of the USB_TOKEN_TOKENENDPT field. */ -#define BR_USB_TOKEN_TOKENENDPT(x) (HW_USB_TOKEN(x).B.TOKENENDPT) +#define BR_USB_TOKEN_TOKENENDPT(x) (UNION_READ(hw_usb_token_t, HW_USB_TOKEN_ADDR(x), U, B.TOKENENDPT)) /*! @brief Format value for bitfield USB_TOKEN_TOKENENDPT. */ #define BF_USB_TOKEN_TOKENENDPT(v) ((uint8_t)((uint8_t)(v) << BP_USB_TOKEN_TOKENENDPT) & BM_USB_TOKEN_TOKENENDPT) @@ -2575,7 +2582,7 @@ #define BS_USB_TOKEN_TOKENPID (4U) /*!< Bit field size in bits for USB_TOKEN_TOKENPID. */ /*! @brief Read current value of the USB_TOKEN_TOKENPID field. */ -#define BR_USB_TOKEN_TOKENPID(x) (HW_USB_TOKEN(x).B.TOKENPID) +#define BR_USB_TOKEN_TOKENPID(x) (UNION_READ(hw_usb_token_t, HW_USB_TOKEN_ADDR(x), U, B.TOKENPID)) /*! @brief Format value for bitfield USB_TOKEN_TOKENPID. */ #define BF_USB_TOKEN_TOKENPID(v) ((uint8_t)((uint8_t)(v) << BP_USB_TOKEN_TOKENPID) & BM_USB_TOKEN_TOKENPID) @@ -2626,8 +2633,8 @@ #define HW_USB_SOFTHLD_ADDR(x) ((x) + 0xACU) #define HW_USB_SOFTHLD(x) (*(__IO hw_usb_softhld_t *) HW_USB_SOFTHLD_ADDR(x)) -#define HW_USB_SOFTHLD_RD(x) (HW_USB_SOFTHLD(x).U) -#define HW_USB_SOFTHLD_WR(x, v) (HW_USB_SOFTHLD(x).U = (v)) +#define HW_USB_SOFTHLD_RD(x) (ADDRESS_READ(hw_usb_softhld_t, HW_USB_SOFTHLD_ADDR(x))) +#define HW_USB_SOFTHLD_WR(x, v) (ADDRESS_WRITE(hw_usb_softhld_t, HW_USB_SOFTHLD_ADDR(x), v)) #define HW_USB_SOFTHLD_SET(x, v) (HW_USB_SOFTHLD_WR(x, HW_USB_SOFTHLD_RD(x) | (v))) #define HW_USB_SOFTHLD_CLR(x, v) (HW_USB_SOFTHLD_WR(x, HW_USB_SOFTHLD_RD(x) & ~(v))) #define HW_USB_SOFTHLD_TOG(x, v) (HW_USB_SOFTHLD_WR(x, HW_USB_SOFTHLD_RD(x) ^ (v))) @@ -2685,8 +2692,8 @@ #define HW_USB_BDTPAGE2_ADDR(x) ((x) + 0xB0U) #define HW_USB_BDTPAGE2(x) (*(__IO hw_usb_bdtpage2_t *) HW_USB_BDTPAGE2_ADDR(x)) -#define HW_USB_BDTPAGE2_RD(x) (HW_USB_BDTPAGE2(x).U) -#define HW_USB_BDTPAGE2_WR(x, v) (HW_USB_BDTPAGE2(x).U = (v)) +#define HW_USB_BDTPAGE2_RD(x) (ADDRESS_READ(hw_usb_bdtpage2_t, HW_USB_BDTPAGE2_ADDR(x))) +#define HW_USB_BDTPAGE2_WR(x, v) (ADDRESS_WRITE(hw_usb_bdtpage2_t, HW_USB_BDTPAGE2_ADDR(x), v)) #define HW_USB_BDTPAGE2_SET(x, v) (HW_USB_BDTPAGE2_WR(x, HW_USB_BDTPAGE2_RD(x) | (v))) #define HW_USB_BDTPAGE2_CLR(x, v) (HW_USB_BDTPAGE2_WR(x, HW_USB_BDTPAGE2_RD(x) & ~(v))) #define HW_USB_BDTPAGE2_TOG(x, v) (HW_USB_BDTPAGE2_WR(x, HW_USB_BDTPAGE2_RD(x) ^ (v))) @@ -2745,8 +2752,8 @@ #define HW_USB_BDTPAGE3_ADDR(x) ((x) + 0xB4U) #define HW_USB_BDTPAGE3(x) (*(__IO hw_usb_bdtpage3_t *) HW_USB_BDTPAGE3_ADDR(x)) -#define HW_USB_BDTPAGE3_RD(x) (HW_USB_BDTPAGE3(x).U) -#define HW_USB_BDTPAGE3_WR(x, v) (HW_USB_BDTPAGE3(x).U = (v)) +#define HW_USB_BDTPAGE3_RD(x) (ADDRESS_READ(hw_usb_bdtpage3_t, HW_USB_BDTPAGE3_ADDR(x))) +#define HW_USB_BDTPAGE3_WR(x, v) (ADDRESS_WRITE(hw_usb_bdtpage3_t, HW_USB_BDTPAGE3_ADDR(x), v)) #define HW_USB_BDTPAGE3_SET(x, v) (HW_USB_BDTPAGE3_WR(x, HW_USB_BDTPAGE3_RD(x) | (v))) #define HW_USB_BDTPAGE3_CLR(x, v) (HW_USB_BDTPAGE3_WR(x, HW_USB_BDTPAGE3_RD(x) & ~(v))) #define HW_USB_BDTPAGE3_TOG(x, v) (HW_USB_BDTPAGE3_WR(x, HW_USB_BDTPAGE3_RD(x) ^ (v))) @@ -2829,8 +2836,8 @@ #define HW_USB_ENDPTn_ADDR(x, n) ((x) + 0xC0U + (0x4U * (n))) #define HW_USB_ENDPTn(x, n) (*(__IO hw_usb_endptn_t *) HW_USB_ENDPTn_ADDR(x, n)) -#define HW_USB_ENDPTn_RD(x, n) (HW_USB_ENDPTn(x, n).U) -#define HW_USB_ENDPTn_WR(x, n, v) (HW_USB_ENDPTn(x, n).U = (v)) +#define HW_USB_ENDPTn_RD(x, n) (ADDRESS_READ(hw_usb_endptn_t, HW_USB_ENDPTn_ADDR(x, n))) +#define HW_USB_ENDPTn_WR(x, n, v) (ADDRESS_WRITE(hw_usb_endptn_t, HW_USB_ENDPTn_ADDR(x, n), v)) #define HW_USB_ENDPTn_SET(x, n, v) (HW_USB_ENDPTn_WR(x, n, HW_USB_ENDPTn_RD(x, n) | (v))) #define HW_USB_ENDPTn_CLR(x, n, v) (HW_USB_ENDPTn_WR(x, n, HW_USB_ENDPTn_RD(x, n) & ~(v))) #define HW_USB_ENDPTn_TOG(x, n, v) (HW_USB_ENDPTn_WR(x, n, HW_USB_ENDPTn_RD(x, n) ^ (v))) @@ -2853,13 +2860,13 @@ #define BS_USB_ENDPTn_EPHSHK (1U) /*!< Bit field size in bits for USB_ENDPTn_EPHSHK. */ /*! @brief Read current value of the USB_ENDPTn_EPHSHK field. */ -#define BR_USB_ENDPTn_EPHSHK(x, n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPHSHK)) +#define BR_USB_ENDPTn_EPHSHK(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPHSHK))) /*! @brief Format value for bitfield USB_ENDPTn_EPHSHK. */ #define BF_USB_ENDPTn_EPHSHK(v) ((uint8_t)((uint8_t)(v) << BP_USB_ENDPTn_EPHSHK) & BM_USB_ENDPTn_EPHSHK) /*! @brief Set the EPHSHK field to a new value. */ -#define BW_USB_ENDPTn_EPHSHK(x, n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPHSHK) = (v)) +#define BW_USB_ENDPTn_EPHSHK(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPHSHK), v)) /*@}*/ /*! @@ -2877,13 +2884,13 @@ #define BS_USB_ENDPTn_EPSTALL (1U) /*!< Bit field size in bits for USB_ENDPTn_EPSTALL. */ /*! @brief Read current value of the USB_ENDPTn_EPSTALL field. */ -#define BR_USB_ENDPTn_EPSTALL(x, n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPSTALL)) +#define BR_USB_ENDPTn_EPSTALL(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPSTALL))) /*! @brief Format value for bitfield USB_ENDPTn_EPSTALL. */ #define BF_USB_ENDPTn_EPSTALL(v) ((uint8_t)((uint8_t)(v) << BP_USB_ENDPTn_EPSTALL) & BM_USB_ENDPTn_EPSTALL) /*! @brief Set the EPSTALL field to a new value. */ -#define BW_USB_ENDPTn_EPSTALL(x, n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPSTALL) = (v)) +#define BW_USB_ENDPTn_EPSTALL(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPSTALL), v)) /*@}*/ /*! @@ -2897,13 +2904,13 @@ #define BS_USB_ENDPTn_EPTXEN (1U) /*!< Bit field size in bits for USB_ENDPTn_EPTXEN. */ /*! @brief Read current value of the USB_ENDPTn_EPTXEN field. */ -#define BR_USB_ENDPTn_EPTXEN(x, n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPTXEN)) +#define BR_USB_ENDPTn_EPTXEN(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPTXEN))) /*! @brief Format value for bitfield USB_ENDPTn_EPTXEN. */ #define BF_USB_ENDPTn_EPTXEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ENDPTn_EPTXEN) & BM_USB_ENDPTn_EPTXEN) /*! @brief Set the EPTXEN field to a new value. */ -#define BW_USB_ENDPTn_EPTXEN(x, n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPTXEN) = (v)) +#define BW_USB_ENDPTn_EPTXEN(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPTXEN), v)) /*@}*/ /*! @@ -2917,13 +2924,13 @@ #define BS_USB_ENDPTn_EPRXEN (1U) /*!< Bit field size in bits for USB_ENDPTn_EPRXEN. */ /*! @brief Read current value of the USB_ENDPTn_EPRXEN field. */ -#define BR_USB_ENDPTn_EPRXEN(x, n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPRXEN)) +#define BR_USB_ENDPTn_EPRXEN(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPRXEN))) /*! @brief Format value for bitfield USB_ENDPTn_EPRXEN. */ #define BF_USB_ENDPTn_EPRXEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_ENDPTn_EPRXEN) & BM_USB_ENDPTn_EPRXEN) /*! @brief Set the EPRXEN field to a new value. */ -#define BW_USB_ENDPTn_EPRXEN(x, n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPRXEN) = (v)) +#define BW_USB_ENDPTn_EPRXEN(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPRXEN), v)) /*@}*/ /*! @@ -2939,13 +2946,13 @@ #define BS_USB_ENDPTn_EPCTLDIS (1U) /*!< Bit field size in bits for USB_ENDPTn_EPCTLDIS. */ /*! @brief Read current value of the USB_ENDPTn_EPCTLDIS field. */ -#define BR_USB_ENDPTn_EPCTLDIS(x, n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPCTLDIS)) +#define BR_USB_ENDPTn_EPCTLDIS(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPCTLDIS))) /*! @brief Format value for bitfield USB_ENDPTn_EPCTLDIS. */ #define BF_USB_ENDPTn_EPCTLDIS(v) ((uint8_t)((uint8_t)(v) << BP_USB_ENDPTn_EPCTLDIS) & BM_USB_ENDPTn_EPCTLDIS) /*! @brief Set the EPCTLDIS field to a new value. */ -#define BW_USB_ENDPTn_EPCTLDIS(x, n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPCTLDIS) = (v)) +#define BW_USB_ENDPTn_EPCTLDIS(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_EPCTLDIS), v)) /*@}*/ /*! @@ -2964,13 +2971,13 @@ #define BS_USB_ENDPTn_RETRYDIS (1U) /*!< Bit field size in bits for USB_ENDPTn_RETRYDIS. */ /*! @brief Read current value of the USB_ENDPTn_RETRYDIS field. */ -#define BR_USB_ENDPTn_RETRYDIS(x, n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_RETRYDIS)) +#define BR_USB_ENDPTn_RETRYDIS(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_RETRYDIS))) /*! @brief Format value for bitfield USB_ENDPTn_RETRYDIS. */ #define BF_USB_ENDPTn_RETRYDIS(v) ((uint8_t)((uint8_t)(v) << BP_USB_ENDPTn_RETRYDIS) & BM_USB_ENDPTn_RETRYDIS) /*! @brief Set the RETRYDIS field to a new value. */ -#define BW_USB_ENDPTn_RETRYDIS(x, n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_RETRYDIS) = (v)) +#define BW_USB_ENDPTn_RETRYDIS(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_RETRYDIS), v)) /*@}*/ /*! @@ -2988,13 +2995,13 @@ #define BS_USB_ENDPTn_HOSTWOHUB (1U) /*!< Bit field size in bits for USB_ENDPTn_HOSTWOHUB. */ /*! @brief Read current value of the USB_ENDPTn_HOSTWOHUB field. */ -#define BR_USB_ENDPTn_HOSTWOHUB(x, n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_HOSTWOHUB)) +#define BR_USB_ENDPTn_HOSTWOHUB(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_HOSTWOHUB))) /*! @brief Format value for bitfield USB_ENDPTn_HOSTWOHUB. */ #define BF_USB_ENDPTn_HOSTWOHUB(v) ((uint8_t)((uint8_t)(v) << BP_USB_ENDPTn_HOSTWOHUB) & BM_USB_ENDPTn_HOSTWOHUB) /*! @brief Set the HOSTWOHUB field to a new value. */ -#define BW_USB_ENDPTn_HOSTWOHUB(x, n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_HOSTWOHUB) = (v)) +#define BW_USB_ENDPTn_HOSTWOHUB(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_ENDPTn_ADDR(x, n), BP_USB_ENDPTn_HOSTWOHUB), v)) /*@}*/ /******************************************************************************* @@ -3024,8 +3031,8 @@ #define HW_USB_USBCTRL_ADDR(x) ((x) + 0x100U) #define HW_USB_USBCTRL(x) (*(__IO hw_usb_usbctrl_t *) HW_USB_USBCTRL_ADDR(x)) -#define HW_USB_USBCTRL_RD(x) (HW_USB_USBCTRL(x).U) -#define HW_USB_USBCTRL_WR(x, v) (HW_USB_USBCTRL(x).U = (v)) +#define HW_USB_USBCTRL_RD(x) (ADDRESS_READ(hw_usb_usbctrl_t, HW_USB_USBCTRL_ADDR(x))) +#define HW_USB_USBCTRL_WR(x, v) (ADDRESS_WRITE(hw_usb_usbctrl_t, HW_USB_USBCTRL_ADDR(x), v)) #define HW_USB_USBCTRL_SET(x, v) (HW_USB_USBCTRL_WR(x, HW_USB_USBCTRL_RD(x) | (v))) #define HW_USB_USBCTRL_CLR(x, v) (HW_USB_USBCTRL_WR(x, HW_USB_USBCTRL_RD(x) & ~(v))) #define HW_USB_USBCTRL_TOG(x, v) (HW_USB_USBCTRL_WR(x, HW_USB_USBCTRL_RD(x) ^ (v))) @@ -3050,13 +3057,13 @@ #define BS_USB_USBCTRL_PDE (1U) /*!< Bit field size in bits for USB_USBCTRL_PDE. */ /*! @brief Read current value of the USB_USBCTRL_PDE field. */ -#define BR_USB_USBCTRL_PDE(x) (BITBAND_ACCESS8(HW_USB_USBCTRL_ADDR(x), BP_USB_USBCTRL_PDE)) +#define BR_USB_USBCTRL_PDE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_USBCTRL_ADDR(x), BP_USB_USBCTRL_PDE))) /*! @brief Format value for bitfield USB_USBCTRL_PDE. */ #define BF_USB_USBCTRL_PDE(v) ((uint8_t)((uint8_t)(v) << BP_USB_USBCTRL_PDE) & BM_USB_USBCTRL_PDE) /*! @brief Set the PDE field to a new value. */ -#define BW_USB_USBCTRL_PDE(x, v) (BITBAND_ACCESS8(HW_USB_USBCTRL_ADDR(x), BP_USB_USBCTRL_PDE) = (v)) +#define BW_USB_USBCTRL_PDE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_USBCTRL_ADDR(x), BP_USB_USBCTRL_PDE), v)) /*@}*/ /*! @@ -3074,13 +3081,13 @@ #define BS_USB_USBCTRL_SUSP (1U) /*!< Bit field size in bits for USB_USBCTRL_SUSP. */ /*! @brief Read current value of the USB_USBCTRL_SUSP field. */ -#define BR_USB_USBCTRL_SUSP(x) (BITBAND_ACCESS8(HW_USB_USBCTRL_ADDR(x), BP_USB_USBCTRL_SUSP)) +#define BR_USB_USBCTRL_SUSP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_USBCTRL_ADDR(x), BP_USB_USBCTRL_SUSP))) /*! @brief Format value for bitfield USB_USBCTRL_SUSP. */ #define BF_USB_USBCTRL_SUSP(v) ((uint8_t)((uint8_t)(v) << BP_USB_USBCTRL_SUSP) & BM_USB_USBCTRL_SUSP) /*! @brief Set the SUSP field to a new value. */ -#define BW_USB_USBCTRL_SUSP(x, v) (BITBAND_ACCESS8(HW_USB_USBCTRL_ADDR(x), BP_USB_USBCTRL_SUSP) = (v)) +#define BW_USB_USBCTRL_SUSP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_USBCTRL_ADDR(x), BP_USB_USBCTRL_SUSP), v)) /*@}*/ /******************************************************************************* @@ -3116,7 +3123,7 @@ #define HW_USB_OBSERVE_ADDR(x) ((x) + 0x104U) #define HW_USB_OBSERVE(x) (*(__I hw_usb_observe_t *) HW_USB_OBSERVE_ADDR(x)) -#define HW_USB_OBSERVE_RD(x) (HW_USB_OBSERVE(x).U) +#define HW_USB_OBSERVE_RD(x) (ADDRESS_READ(hw_usb_observe_t, HW_USB_OBSERVE_ADDR(x))) /*@}*/ /* @@ -3138,7 +3145,7 @@ #define BS_USB_OBSERVE_DMPD (1U) /*!< Bit field size in bits for USB_OBSERVE_DMPD. */ /*! @brief Read current value of the USB_OBSERVE_DMPD field. */ -#define BR_USB_OBSERVE_DMPD(x) (BITBAND_ACCESS8(HW_USB_OBSERVE_ADDR(x), BP_USB_OBSERVE_DMPD)) +#define BR_USB_OBSERVE_DMPD(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OBSERVE_ADDR(x), BP_USB_OBSERVE_DMPD))) /*@}*/ /*! @@ -3156,7 +3163,7 @@ #define BS_USB_OBSERVE_DPPD (1U) /*!< Bit field size in bits for USB_OBSERVE_DPPD. */ /*! @brief Read current value of the USB_OBSERVE_DPPD field. */ -#define BR_USB_OBSERVE_DPPD(x) (BITBAND_ACCESS8(HW_USB_OBSERVE_ADDR(x), BP_USB_OBSERVE_DPPD)) +#define BR_USB_OBSERVE_DPPD(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OBSERVE_ADDR(x), BP_USB_OBSERVE_DPPD))) /*@}*/ /*! @@ -3174,7 +3181,7 @@ #define BS_USB_OBSERVE_DPPU (1U) /*!< Bit field size in bits for USB_OBSERVE_DPPU. */ /*! @brief Read current value of the USB_OBSERVE_DPPU field. */ -#define BR_USB_OBSERVE_DPPU(x) (BITBAND_ACCESS8(HW_USB_OBSERVE_ADDR(x), BP_USB_OBSERVE_DPPU)) +#define BR_USB_OBSERVE_DPPU(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_OBSERVE_ADDR(x), BP_USB_OBSERVE_DPPU))) /*@}*/ /******************************************************************************* @@ -3204,8 +3211,8 @@ #define HW_USB_CONTROL_ADDR(x) ((x) + 0x108U) #define HW_USB_CONTROL(x) (*(__IO hw_usb_control_t *) HW_USB_CONTROL_ADDR(x)) -#define HW_USB_CONTROL_RD(x) (HW_USB_CONTROL(x).U) -#define HW_USB_CONTROL_WR(x, v) (HW_USB_CONTROL(x).U = (v)) +#define HW_USB_CONTROL_RD(x) (ADDRESS_READ(hw_usb_control_t, HW_USB_CONTROL_ADDR(x))) +#define HW_USB_CONTROL_WR(x, v) (ADDRESS_WRITE(hw_usb_control_t, HW_USB_CONTROL_ADDR(x), v)) #define HW_USB_CONTROL_SET(x, v) (HW_USB_CONTROL_WR(x, HW_USB_CONTROL_RD(x) | (v))) #define HW_USB_CONTROL_CLR(x, v) (HW_USB_CONTROL_WR(x, HW_USB_CONTROL_RD(x) & ~(v))) #define HW_USB_CONTROL_TOG(x, v) (HW_USB_CONTROL_WR(x, HW_USB_CONTROL_RD(x) ^ (v))) @@ -3231,13 +3238,13 @@ #define BS_USB_CONTROL_DPPULLUPNONOTG (1U) /*!< Bit field size in bits for USB_CONTROL_DPPULLUPNONOTG. */ /*! @brief Read current value of the USB_CONTROL_DPPULLUPNONOTG field. */ -#define BR_USB_CONTROL_DPPULLUPNONOTG(x) (BITBAND_ACCESS8(HW_USB_CONTROL_ADDR(x), BP_USB_CONTROL_DPPULLUPNONOTG)) +#define BR_USB_CONTROL_DPPULLUPNONOTG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CONTROL_ADDR(x), BP_USB_CONTROL_DPPULLUPNONOTG))) /*! @brief Format value for bitfield USB_CONTROL_DPPULLUPNONOTG. */ #define BF_USB_CONTROL_DPPULLUPNONOTG(v) ((uint8_t)((uint8_t)(v) << BP_USB_CONTROL_DPPULLUPNONOTG) & BM_USB_CONTROL_DPPULLUPNONOTG) /*! @brief Set the DPPULLUPNONOTG field to a new value. */ -#define BW_USB_CONTROL_DPPULLUPNONOTG(x, v) (BITBAND_ACCESS8(HW_USB_CONTROL_ADDR(x), BP_USB_CONTROL_DPPULLUPNONOTG) = (v)) +#define BW_USB_CONTROL_DPPULLUPNONOTG(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CONTROL_ADDR(x), BP_USB_CONTROL_DPPULLUPNONOTG), v)) /*@}*/ /******************************************************************************* @@ -3277,8 +3284,8 @@ #define HW_USB_USBTRC0_ADDR(x) ((x) + 0x10CU) #define HW_USB_USBTRC0(x) (*(__IO hw_usb_usbtrc0_t *) HW_USB_USBTRC0_ADDR(x)) -#define HW_USB_USBTRC0_RD(x) (HW_USB_USBTRC0(x).U) -#define HW_USB_USBTRC0_WR(x, v) (HW_USB_USBTRC0(x).U = (v)) +#define HW_USB_USBTRC0_RD(x) (ADDRESS_READ(hw_usb_usbtrc0_t, HW_USB_USBTRC0_ADDR(x))) +#define HW_USB_USBTRC0_WR(x, v) (ADDRESS_WRITE(hw_usb_usbtrc0_t, HW_USB_USBTRC0_ADDR(x), v)) #define HW_USB_USBTRC0_SET(x, v) (HW_USB_USBTRC0_WR(x, HW_USB_USBTRC0_RD(x) | (v))) #define HW_USB_USBTRC0_CLR(x, v) (HW_USB_USBTRC0_WR(x, HW_USB_USBTRC0_RD(x) & ~(v))) #define HW_USB_USBTRC0_TOG(x, v) (HW_USB_USBTRC0_WR(x, HW_USB_USBTRC0_RD(x) ^ (v))) @@ -3301,7 +3308,7 @@ #define BS_USB_USBTRC0_USB_RESUME_INT (1U) /*!< Bit field size in bits for USB_USBTRC0_USB_RESUME_INT. */ /*! @brief Read current value of the USB_USBTRC0_USB_RESUME_INT field. */ -#define BR_USB_USBTRC0_USB_RESUME_INT(x) (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_USB_RESUME_INT)) +#define BR_USB_USBTRC0_USB_RESUME_INT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_USB_RESUME_INT))) /*@}*/ /*! @@ -3317,7 +3324,7 @@ #define BS_USB_USBTRC0_SYNC_DET (1U) /*!< Bit field size in bits for USB_USBTRC0_SYNC_DET. */ /*! @brief Read current value of the USB_USBTRC0_SYNC_DET field. */ -#define BR_USB_USBTRC0_SYNC_DET(x) (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_SYNC_DET)) +#define BR_USB_USBTRC0_SYNC_DET(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_SYNC_DET))) /*@}*/ /*! @@ -3337,7 +3344,7 @@ #define BS_USB_USBTRC0_USB_CLK_RECOVERY_INT (1U) /*!< Bit field size in bits for USB_USBTRC0_USB_CLK_RECOVERY_INT. */ /*! @brief Read current value of the USB_USBTRC0_USB_CLK_RECOVERY_INT field. */ -#define BR_USB_USBTRC0_USB_CLK_RECOVERY_INT(x) (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_USB_CLK_RECOVERY_INT)) +#define BR_USB_USBTRC0_USB_CLK_RECOVERY_INT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_USB_CLK_RECOVERY_INT))) /*@}*/ /*! @@ -3363,13 +3370,13 @@ #define BS_USB_USBTRC0_USBRESMEN (1U) /*!< Bit field size in bits for USB_USBTRC0_USBRESMEN. */ /*! @brief Read current value of the USB_USBTRC0_USBRESMEN field. */ -#define BR_USB_USBTRC0_USBRESMEN(x) (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_USBRESMEN)) +#define BR_USB_USBTRC0_USBRESMEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_USBRESMEN))) /*! @brief Format value for bitfield USB_USBTRC0_USBRESMEN. */ #define BF_USB_USBTRC0_USBRESMEN(v) ((uint8_t)((uint8_t)(v) << BP_USB_USBTRC0_USBRESMEN) & BM_USB_USBTRC0_USBRESMEN) /*! @brief Set the USBRESMEN field to a new value. */ -#define BW_USB_USBTRC0_USBRESMEN(x, v) (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_USBRESMEN) = (v)) +#define BW_USB_USBTRC0_USBRESMEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_USBTRC0_ADDR(x), BP_USB_USBTRC0_USBRESMEN), v)) /*@}*/ /*! @@ -3417,8 +3424,8 @@ #define HW_USB_USBFRMADJUST_ADDR(x) ((x) + 0x114U) #define HW_USB_USBFRMADJUST(x) (*(__IO hw_usb_usbfrmadjust_t *) HW_USB_USBFRMADJUST_ADDR(x)) -#define HW_USB_USBFRMADJUST_RD(x) (HW_USB_USBFRMADJUST(x).U) -#define HW_USB_USBFRMADJUST_WR(x, v) (HW_USB_USBFRMADJUST(x).U = (v)) +#define HW_USB_USBFRMADJUST_RD(x) (ADDRESS_READ(hw_usb_usbfrmadjust_t, HW_USB_USBFRMADJUST_ADDR(x))) +#define HW_USB_USBFRMADJUST_WR(x, v) (ADDRESS_WRITE(hw_usb_usbfrmadjust_t, HW_USB_USBFRMADJUST_ADDR(x), v)) #define HW_USB_USBFRMADJUST_SET(x, v) (HW_USB_USBFRMADJUST_WR(x, HW_USB_USBFRMADJUST_RD(x) | (v))) #define HW_USB_USBFRMADJUST_CLR(x, v) (HW_USB_USBFRMADJUST_WR(x, HW_USB_USBFRMADJUST_RD(x) & ~(v))) #define HW_USB_USBFRMADJUST_TOG(x, v) (HW_USB_USBFRMADJUST_WR(x, HW_USB_USBFRMADJUST_RD(x) ^ (v))) @@ -3487,8 +3494,8 @@ #define HW_USB_CLK_RECOVER_CTRL_ADDR(x) ((x) + 0x140U) #define HW_USB_CLK_RECOVER_CTRL(x) (*(__IO hw_usb_clk_recover_ctrl_t *) HW_USB_CLK_RECOVER_CTRL_ADDR(x)) -#define HW_USB_CLK_RECOVER_CTRL_RD(x) (HW_USB_CLK_RECOVER_CTRL(x).U) -#define HW_USB_CLK_RECOVER_CTRL_WR(x, v) (HW_USB_CLK_RECOVER_CTRL(x).U = (v)) +#define HW_USB_CLK_RECOVER_CTRL_RD(x) (ADDRESS_READ(hw_usb_clk_recover_ctrl_t, HW_USB_CLK_RECOVER_CTRL_ADDR(x))) +#define HW_USB_CLK_RECOVER_CTRL_WR(x, v) (ADDRESS_WRITE(hw_usb_clk_recover_ctrl_t, HW_USB_CLK_RECOVER_CTRL_ADDR(x), v)) #define HW_USB_CLK_RECOVER_CTRL_SET(x, v) (HW_USB_CLK_RECOVER_CTRL_WR(x, HW_USB_CLK_RECOVER_CTRL_RD(x) | (v))) #define HW_USB_CLK_RECOVER_CTRL_CLR(x, v) (HW_USB_CLK_RECOVER_CTRL_WR(x, HW_USB_CLK_RECOVER_CTRL_RD(x) & ~(v))) #define HW_USB_CLK_RECOVER_CTRL_TOG(x, v) (HW_USB_CLK_RECOVER_CTRL_WR(x, HW_USB_CLK_RECOVER_CTRL_RD(x) ^ (v))) @@ -3517,13 +3524,13 @@ #define BS_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN (1U) /*!< Bit field size in bits for USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN. */ /*! @brief Read current value of the USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN field. */ -#define BR_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN(x) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN)) +#define BR_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN))) /*! @brief Format value for bitfield USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN. */ #define BF_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN(v) ((uint8_t)((uint8_t)(v) << BP_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN) & BM_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN) /*! @brief Set the RESTART_IFRTRIM_EN field to a new value. */ -#define BW_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN(x, v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN) = (v)) +#define BW_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN), v)) /*@}*/ /*! @@ -3547,13 +3554,13 @@ #define BS_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN (1U) /*!< Bit field size in bits for USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN. */ /*! @brief Read current value of the USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN field. */ -#define BR_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN(x) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN)) +#define BR_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN))) /*! @brief Format value for bitfield USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN. */ #define BF_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN(v) ((uint8_t)((uint8_t)(v) << BP_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN) & BM_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN) /*! @brief Set the RESET_RESUME_ROUGH_EN field to a new value. */ -#define BW_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN(x, v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN) = (v)) +#define BW_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN), v)) /*@}*/ /*! @@ -3573,13 +3580,13 @@ #define BS_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN (1U) /*!< Bit field size in bits for USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN. */ /*! @brief Read current value of the USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN field. */ -#define BR_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN(x) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN)) +#define BR_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN))) /*! @brief Format value for bitfield USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN. */ #define BF_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN(v) ((uint8_t)((uint8_t)(v) << BP_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN) & BM_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN) /*! @brief Set the CLOCK_RECOVER_EN field to a new value. */ -#define BW_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN(x, v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN) = (v)) +#define BW_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_CTRL_ADDR(x), BP_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN), v)) /*@}*/ /******************************************************************************* @@ -3613,8 +3620,8 @@ #define HW_USB_CLK_RECOVER_IRC_EN_ADDR(x) ((x) + 0x144U) #define HW_USB_CLK_RECOVER_IRC_EN(x) (*(__IO hw_usb_clk_recover_irc_en_t *) HW_USB_CLK_RECOVER_IRC_EN_ADDR(x)) -#define HW_USB_CLK_RECOVER_IRC_EN_RD(x) (HW_USB_CLK_RECOVER_IRC_EN(x).U) -#define HW_USB_CLK_RECOVER_IRC_EN_WR(x, v) (HW_USB_CLK_RECOVER_IRC_EN(x).U = (v)) +#define HW_USB_CLK_RECOVER_IRC_EN_RD(x) (ADDRESS_READ(hw_usb_clk_recover_irc_en_t, HW_USB_CLK_RECOVER_IRC_EN_ADDR(x))) +#define HW_USB_CLK_RECOVER_IRC_EN_WR(x, v) (ADDRESS_WRITE(hw_usb_clk_recover_irc_en_t, HW_USB_CLK_RECOVER_IRC_EN_ADDR(x), v)) #define HW_USB_CLK_RECOVER_IRC_EN_SET(x, v) (HW_USB_CLK_RECOVER_IRC_EN_WR(x, HW_USB_CLK_RECOVER_IRC_EN_RD(x) | (v))) #define HW_USB_CLK_RECOVER_IRC_EN_CLR(x, v) (HW_USB_CLK_RECOVER_IRC_EN_WR(x, HW_USB_CLK_RECOVER_IRC_EN_RD(x) & ~(v))) #define HW_USB_CLK_RECOVER_IRC_EN_TOG(x, v) (HW_USB_CLK_RECOVER_IRC_EN_WR(x, HW_USB_CLK_RECOVER_IRC_EN_RD(x) ^ (v))) @@ -3641,13 +3648,13 @@ #define BS_USB_CLK_RECOVER_IRC_EN_REG_EN (1U) /*!< Bit field size in bits for USB_CLK_RECOVER_IRC_EN_REG_EN. */ /*! @brief Read current value of the USB_CLK_RECOVER_IRC_EN_REG_EN field. */ -#define BR_USB_CLK_RECOVER_IRC_EN_REG_EN(x) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR(x), BP_USB_CLK_RECOVER_IRC_EN_REG_EN)) +#define BR_USB_CLK_RECOVER_IRC_EN_REG_EN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR(x), BP_USB_CLK_RECOVER_IRC_EN_REG_EN))) /*! @brief Format value for bitfield USB_CLK_RECOVER_IRC_EN_REG_EN. */ #define BF_USB_CLK_RECOVER_IRC_EN_REG_EN(v) ((uint8_t)((uint8_t)(v) << BP_USB_CLK_RECOVER_IRC_EN_REG_EN) & BM_USB_CLK_RECOVER_IRC_EN_REG_EN) /*! @brief Set the REG_EN field to a new value. */ -#define BW_USB_CLK_RECOVER_IRC_EN_REG_EN(x, v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR(x), BP_USB_CLK_RECOVER_IRC_EN_REG_EN) = (v)) +#define BW_USB_CLK_RECOVER_IRC_EN_REG_EN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR(x), BP_USB_CLK_RECOVER_IRC_EN_REG_EN), v)) /*@}*/ /*! @@ -3667,13 +3674,13 @@ #define BS_USB_CLK_RECOVER_IRC_EN_IRC_EN (1U) /*!< Bit field size in bits for USB_CLK_RECOVER_IRC_EN_IRC_EN. */ /*! @brief Read current value of the USB_CLK_RECOVER_IRC_EN_IRC_EN field. */ -#define BR_USB_CLK_RECOVER_IRC_EN_IRC_EN(x) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR(x), BP_USB_CLK_RECOVER_IRC_EN_IRC_EN)) +#define BR_USB_CLK_RECOVER_IRC_EN_IRC_EN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR(x), BP_USB_CLK_RECOVER_IRC_EN_IRC_EN))) /*! @brief Format value for bitfield USB_CLK_RECOVER_IRC_EN_IRC_EN. */ #define BF_USB_CLK_RECOVER_IRC_EN_IRC_EN(v) ((uint8_t)((uint8_t)(v) << BP_USB_CLK_RECOVER_IRC_EN_IRC_EN) & BM_USB_CLK_RECOVER_IRC_EN_IRC_EN) /*! @brief Set the IRC_EN field to a new value. */ -#define BW_USB_CLK_RECOVER_IRC_EN_IRC_EN(x, v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR(x), BP_USB_CLK_RECOVER_IRC_EN_IRC_EN) = (v)) +#define BW_USB_CLK_RECOVER_IRC_EN_IRC_EN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR(x), BP_USB_CLK_RECOVER_IRC_EN_IRC_EN), v)) /*@}*/ /******************************************************************************* @@ -3706,8 +3713,8 @@ #define HW_USB_CLK_RECOVER_INT_STATUS_ADDR(x) ((x) + 0x15CU) #define HW_USB_CLK_RECOVER_INT_STATUS(x) (*(__IO hw_usb_clk_recover_int_status_t *) HW_USB_CLK_RECOVER_INT_STATUS_ADDR(x)) -#define HW_USB_CLK_RECOVER_INT_STATUS_RD(x) (HW_USB_CLK_RECOVER_INT_STATUS(x).U) -#define HW_USB_CLK_RECOVER_INT_STATUS_WR(x, v) (HW_USB_CLK_RECOVER_INT_STATUS(x).U = (v)) +#define HW_USB_CLK_RECOVER_INT_STATUS_RD(x) (ADDRESS_READ(hw_usb_clk_recover_int_status_t, HW_USB_CLK_RECOVER_INT_STATUS_ADDR(x))) +#define HW_USB_CLK_RECOVER_INT_STATUS_WR(x, v) (ADDRESS_WRITE(hw_usb_clk_recover_int_status_t, HW_USB_CLK_RECOVER_INT_STATUS_ADDR(x), v)) #define HW_USB_CLK_RECOVER_INT_STATUS_SET(x, v) (HW_USB_CLK_RECOVER_INT_STATUS_WR(x, HW_USB_CLK_RECOVER_INT_STATUS_RD(x) | (v))) #define HW_USB_CLK_RECOVER_INT_STATUS_CLR(x, v) (HW_USB_CLK_RECOVER_INT_STATUS_WR(x, HW_USB_CLK_RECOVER_INT_STATUS_RD(x) & ~(v))) #define HW_USB_CLK_RECOVER_INT_STATUS_TOG(x, v) (HW_USB_CLK_RECOVER_INT_STATUS_WR(x, HW_USB_CLK_RECOVER_INT_STATUS_RD(x) ^ (v))) @@ -3734,13 +3741,13 @@ #define BS_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR (1U) /*!< Bit field size in bits for USB_CLK_RECOVER_INT_STATUS_OVF_ERROR. */ /*! @brief Read current value of the USB_CLK_RECOVER_INT_STATUS_OVF_ERROR field. */ -#define BR_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR(x) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_INT_STATUS_ADDR(x), BP_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR)) +#define BR_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_INT_STATUS_ADDR(x), BP_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR))) /*! @brief Format value for bitfield USB_CLK_RECOVER_INT_STATUS_OVF_ERROR. */ #define BF_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR(v) ((uint8_t)((uint8_t)(v) << BP_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR) & BM_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR) /*! @brief Set the OVF_ERROR field to a new value. */ -#define BW_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR(x, v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_INT_STATUS_ADDR(x), BP_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR) = (v)) +#define BW_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_USB_CLK_RECOVER_INT_STATUS_ADDR(x), BP_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_usbdcd.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_usbdcd.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -138,8 +145,8 @@ #define HW_USBDCD_CONTROL_ADDR(x) ((x) + 0x0U) #define HW_USBDCD_CONTROL(x) (*(__IO hw_usbdcd_control_t *) HW_USBDCD_CONTROL_ADDR(x)) -#define HW_USBDCD_CONTROL_RD(x) (HW_USBDCD_CONTROL(x).U) -#define HW_USBDCD_CONTROL_WR(x, v) (HW_USBDCD_CONTROL(x).U = (v)) +#define HW_USBDCD_CONTROL_RD(x) (ADDRESS_READ(hw_usbdcd_control_t, HW_USBDCD_CONTROL_ADDR(x))) +#define HW_USBDCD_CONTROL_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_control_t, HW_USBDCD_CONTROL_ADDR(x), v)) #define HW_USBDCD_CONTROL_SET(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) | (v))) #define HW_USBDCD_CONTROL_CLR(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) & ~(v))) #define HW_USBDCD_CONTROL_TOG(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) ^ (v))) @@ -167,7 +174,7 @@ #define BF_USBDCD_CONTROL_IACK(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_IACK) & BM_USBDCD_CONTROL_IACK) /*! @brief Set the IACK field to a new value. */ -#define BW_USBDCD_CONTROL_IACK(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IACK) = (v)) +#define BW_USBDCD_CONTROL_IACK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IACK), v)) /*@}*/ /*! @@ -185,7 +192,7 @@ #define BS_USBDCD_CONTROL_IF (1U) /*!< Bit field size in bits for USBDCD_CONTROL_IF. */ /*! @brief Read current value of the USBDCD_CONTROL_IF field. */ -#define BR_USBDCD_CONTROL_IF(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IF)) +#define BR_USBDCD_CONTROL_IF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IF))) /*@}*/ /*! @@ -203,13 +210,13 @@ #define BS_USBDCD_CONTROL_IE (1U) /*!< Bit field size in bits for USBDCD_CONTROL_IE. */ /*! @brief Read current value of the USBDCD_CONTROL_IE field. */ -#define BR_USBDCD_CONTROL_IE(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE)) +#define BR_USBDCD_CONTROL_IE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE))) /*! @brief Format value for bitfield USBDCD_CONTROL_IE. */ #define BF_USBDCD_CONTROL_IE(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_IE) & BM_USBDCD_CONTROL_IE) /*! @brief Set the IE field to a new value. */ -#define BW_USBDCD_CONTROL_IE(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE) = (v)) +#define BW_USBDCD_CONTROL_IE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE), v)) /*@}*/ /*! @@ -227,13 +234,13 @@ #define BS_USBDCD_CONTROL_BC12 (1U) /*!< Bit field size in bits for USBDCD_CONTROL_BC12. */ /*! @brief Read current value of the USBDCD_CONTROL_BC12 field. */ -#define BR_USBDCD_CONTROL_BC12(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12)) +#define BR_USBDCD_CONTROL_BC12(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12))) /*! @brief Format value for bitfield USBDCD_CONTROL_BC12. */ #define BF_USBDCD_CONTROL_BC12(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_BC12) & BM_USBDCD_CONTROL_BC12) /*! @brief Set the BC12 field to a new value. */ -#define BW_USBDCD_CONTROL_BC12(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12) = (v)) +#define BW_USBDCD_CONTROL_BC12(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12), v)) /*@}*/ /*! @@ -255,7 +262,7 @@ #define BF_USBDCD_CONTROL_START(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_START) & BM_USBDCD_CONTROL_START) /*! @brief Set the START field to a new value. */ -#define BW_USBDCD_CONTROL_START(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_START) = (v)) +#define BW_USBDCD_CONTROL_START(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_START), v)) /*@}*/ /*! @@ -276,7 +283,7 @@ #define BF_USBDCD_CONTROL_SR(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_SR) & BM_USBDCD_CONTROL_SR) /*! @brief Set the SR field to a new value. */ -#define BW_USBDCD_CONTROL_SR(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_SR) = (v)) +#define BW_USBDCD_CONTROL_SR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_SR), v)) /*@}*/ /******************************************************************************* @@ -309,8 +316,8 @@ #define HW_USBDCD_CLOCK_ADDR(x) ((x) + 0x4U) #define HW_USBDCD_CLOCK(x) (*(__IO hw_usbdcd_clock_t *) HW_USBDCD_CLOCK_ADDR(x)) -#define HW_USBDCD_CLOCK_RD(x) (HW_USBDCD_CLOCK(x).U) -#define HW_USBDCD_CLOCK_WR(x, v) (HW_USBDCD_CLOCK(x).U = (v)) +#define HW_USBDCD_CLOCK_RD(x) (ADDRESS_READ(hw_usbdcd_clock_t, HW_USBDCD_CLOCK_ADDR(x))) +#define HW_USBDCD_CLOCK_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_clock_t, HW_USBDCD_CLOCK_ADDR(x), v)) #define HW_USBDCD_CLOCK_SET(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) | (v))) #define HW_USBDCD_CLOCK_CLR(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) & ~(v))) #define HW_USBDCD_CLOCK_TOG(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) ^ (v))) @@ -335,13 +342,13 @@ #define BS_USBDCD_CLOCK_CLOCK_UNIT (1U) /*!< Bit field size in bits for USBDCD_CLOCK_CLOCK_UNIT. */ /*! @brief Read current value of the USBDCD_CLOCK_CLOCK_UNIT field. */ -#define BR_USBDCD_CLOCK_CLOCK_UNIT(x) (BITBAND_ACCESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT)) +#define BR_USBDCD_CLOCK_CLOCK_UNIT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT))) /*! @brief Format value for bitfield USBDCD_CLOCK_CLOCK_UNIT. */ #define BF_USBDCD_CLOCK_CLOCK_UNIT(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CLOCK_CLOCK_UNIT) & BM_USBDCD_CLOCK_CLOCK_UNIT) /*! @brief Set the CLOCK_UNIT field to a new value. */ -#define BW_USBDCD_CLOCK_CLOCK_UNIT(x, v) (BITBAND_ACCESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT) = (v)) +#define BW_USBDCD_CLOCK_CLOCK_UNIT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT), v)) /*@}*/ /*! @@ -359,7 +366,7 @@ #define BS_USBDCD_CLOCK_CLOCK_SPEED (10U) /*!< Bit field size in bits for USBDCD_CLOCK_CLOCK_SPEED. */ /*! @brief Read current value of the USBDCD_CLOCK_CLOCK_SPEED field. */ -#define BR_USBDCD_CLOCK_CLOCK_SPEED(x) (HW_USBDCD_CLOCK(x).B.CLOCK_SPEED) +#define BR_USBDCD_CLOCK_CLOCK_SPEED(x) (UNION_READ(hw_usbdcd_clock_t, HW_USBDCD_CLOCK_ADDR(x), U, B.CLOCK_SPEED)) /*! @brief Format value for bitfield USBDCD_CLOCK_CLOCK_SPEED. */ #define BF_USBDCD_CLOCK_CLOCK_SPEED(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CLOCK_CLOCK_SPEED) & BM_USBDCD_CLOCK_CLOCK_SPEED) @@ -403,7 +410,7 @@ #define HW_USBDCD_STATUS_ADDR(x) ((x) + 0x8U) #define HW_USBDCD_STATUS(x) (*(__I hw_usbdcd_status_t *) HW_USBDCD_STATUS_ADDR(x)) -#define HW_USBDCD_STATUS_RD(x) (HW_USBDCD_STATUS(x).U) +#define HW_USBDCD_STATUS_RD(x) (ADDRESS_READ(hw_usbdcd_status_t, HW_USBDCD_STATUS_ADDR(x))) /*@}*/ /* @@ -431,7 +438,7 @@ #define BS_USBDCD_STATUS_SEQ_RES (2U) /*!< Bit field size in bits for USBDCD_STATUS_SEQ_RES. */ /*! @brief Read current value of the USBDCD_STATUS_SEQ_RES field. */ -#define BR_USBDCD_STATUS_SEQ_RES(x) (HW_USBDCD_STATUS(x).B.SEQ_RES) +#define BR_USBDCD_STATUS_SEQ_RES(x) (UNION_READ(hw_usbdcd_status_t, HW_USBDCD_STATUS_ADDR(x), U, B.SEQ_RES)) /*@}*/ /*! @@ -452,7 +459,7 @@ #define BS_USBDCD_STATUS_SEQ_STAT (2U) /*!< Bit field size in bits for USBDCD_STATUS_SEQ_STAT. */ /*! @brief Read current value of the USBDCD_STATUS_SEQ_STAT field. */ -#define BR_USBDCD_STATUS_SEQ_STAT(x) (HW_USBDCD_STATUS(x).B.SEQ_STAT) +#define BR_USBDCD_STATUS_SEQ_STAT(x) (UNION_READ(hw_usbdcd_status_t, HW_USBDCD_STATUS_ADDR(x), U, B.SEQ_STAT)) /*@}*/ /*! @@ -471,7 +478,7 @@ #define BS_USBDCD_STATUS_ERR (1U) /*!< Bit field size in bits for USBDCD_STATUS_ERR. */ /*! @brief Read current value of the USBDCD_STATUS_ERR field. */ -#define BR_USBDCD_STATUS_ERR(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ERR)) +#define BR_USBDCD_STATUS_ERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ERR))) /*@}*/ /*! @@ -490,7 +497,7 @@ #define BS_USBDCD_STATUS_TO (1U) /*!< Bit field size in bits for USBDCD_STATUS_TO. */ /*! @brief Read current value of the USBDCD_STATUS_TO field. */ -#define BR_USBDCD_STATUS_TO(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_TO)) +#define BR_USBDCD_STATUS_TO(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_TO))) /*@}*/ /*! @@ -508,7 +515,7 @@ #define BS_USBDCD_STATUS_ACTIVE (1U) /*!< Bit field size in bits for USBDCD_STATUS_ACTIVE. */ /*! @brief Read current value of the USBDCD_STATUS_ACTIVE field. */ -#define BR_USBDCD_STATUS_ACTIVE(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ACTIVE)) +#define BR_USBDCD_STATUS_ACTIVE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ACTIVE))) /*@}*/ /******************************************************************************* @@ -548,8 +555,8 @@ #define HW_USBDCD_TIMER0_ADDR(x) ((x) + 0x10U) #define HW_USBDCD_TIMER0(x) (*(__IO hw_usbdcd_timer0_t *) HW_USBDCD_TIMER0_ADDR(x)) -#define HW_USBDCD_TIMER0_RD(x) (HW_USBDCD_TIMER0(x).U) -#define HW_USBDCD_TIMER0_WR(x, v) (HW_USBDCD_TIMER0(x).U = (v)) +#define HW_USBDCD_TIMER0_RD(x) (ADDRESS_READ(hw_usbdcd_timer0_t, HW_USBDCD_TIMER0_ADDR(x))) +#define HW_USBDCD_TIMER0_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_timer0_t, HW_USBDCD_TIMER0_ADDR(x), v)) #define HW_USBDCD_TIMER0_SET(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) | (v))) #define HW_USBDCD_TIMER0_CLR(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) & ~(v))) #define HW_USBDCD_TIMER0_TOG(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) ^ (v))) @@ -579,7 +586,7 @@ #define BS_USBDCD_TIMER0_TUNITCON (12U) /*!< Bit field size in bits for USBDCD_TIMER0_TUNITCON. */ /*! @brief Read current value of the USBDCD_TIMER0_TUNITCON field. */ -#define BR_USBDCD_TIMER0_TUNITCON(x) (HW_USBDCD_TIMER0(x).B.TUNITCON) +#define BR_USBDCD_TIMER0_TUNITCON(x) (UNION_READ(hw_usbdcd_timer0_t, HW_USBDCD_TIMER0_ADDR(x), U, B.TUNITCON)) /*@}*/ /*! @@ -598,7 +605,7 @@ #define BS_USBDCD_TIMER0_TSEQ_INIT (10U) /*!< Bit field size in bits for USBDCD_TIMER0_TSEQ_INIT. */ /*! @brief Read current value of the USBDCD_TIMER0_TSEQ_INIT field. */ -#define BR_USBDCD_TIMER0_TSEQ_INIT(x) (HW_USBDCD_TIMER0(x).B.TSEQ_INIT) +#define BR_USBDCD_TIMER0_TSEQ_INIT(x) (UNION_READ(hw_usbdcd_timer0_t, HW_USBDCD_TIMER0_ADDR(x), U, B.TSEQ_INIT)) /*! @brief Format value for bitfield USBDCD_TIMER0_TSEQ_INIT. */ #define BF_USBDCD_TIMER0_TSEQ_INIT(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER0_TSEQ_INIT) & BM_USBDCD_TIMER0_TSEQ_INIT) @@ -640,8 +647,8 @@ #define HW_USBDCD_TIMER1_ADDR(x) ((x) + 0x14U) #define HW_USBDCD_TIMER1(x) (*(__IO hw_usbdcd_timer1_t *) HW_USBDCD_TIMER1_ADDR(x)) -#define HW_USBDCD_TIMER1_RD(x) (HW_USBDCD_TIMER1(x).U) -#define HW_USBDCD_TIMER1_WR(x, v) (HW_USBDCD_TIMER1(x).U = (v)) +#define HW_USBDCD_TIMER1_RD(x) (ADDRESS_READ(hw_usbdcd_timer1_t, HW_USBDCD_TIMER1_ADDR(x))) +#define HW_USBDCD_TIMER1_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_timer1_t, HW_USBDCD_TIMER1_ADDR(x), v)) #define HW_USBDCD_TIMER1_SET(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) | (v))) #define HW_USBDCD_TIMER1_CLR(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) & ~(v))) #define HW_USBDCD_TIMER1_TOG(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) ^ (v))) @@ -664,7 +671,7 @@ #define BS_USBDCD_TIMER1_TVDPSRC_ON (10U) /*!< Bit field size in bits for USBDCD_TIMER1_TVDPSRC_ON. */ /*! @brief Read current value of the USBDCD_TIMER1_TVDPSRC_ON field. */ -#define BR_USBDCD_TIMER1_TVDPSRC_ON(x) (HW_USBDCD_TIMER1(x).B.TVDPSRC_ON) +#define BR_USBDCD_TIMER1_TVDPSRC_ON(x) (UNION_READ(hw_usbdcd_timer1_t, HW_USBDCD_TIMER1_ADDR(x), U, B.TVDPSRC_ON)) /*! @brief Format value for bitfield USBDCD_TIMER1_TVDPSRC_ON. */ #define BF_USBDCD_TIMER1_TVDPSRC_ON(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER1_TVDPSRC_ON) & BM_USBDCD_TIMER1_TVDPSRC_ON) @@ -687,7 +694,7 @@ #define BS_USBDCD_TIMER1_TDCD_DBNC (10U) /*!< Bit field size in bits for USBDCD_TIMER1_TDCD_DBNC. */ /*! @brief Read current value of the USBDCD_TIMER1_TDCD_DBNC field. */ -#define BR_USBDCD_TIMER1_TDCD_DBNC(x) (HW_USBDCD_TIMER1(x).B.TDCD_DBNC) +#define BR_USBDCD_TIMER1_TDCD_DBNC(x) (UNION_READ(hw_usbdcd_timer1_t, HW_USBDCD_TIMER1_ADDR(x), U, B.TDCD_DBNC)) /*! @brief Format value for bitfield USBDCD_TIMER1_TDCD_DBNC. */ #define BF_USBDCD_TIMER1_TDCD_DBNC(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER1_TDCD_DBNC) & BM_USBDCD_TIMER1_TDCD_DBNC) @@ -730,8 +737,8 @@ #define HW_USBDCD_TIMER2_BC11_ADDR(x) ((x) + 0x18U) #define HW_USBDCD_TIMER2_BC11(x) (*(__IO hw_usbdcd_timer2_bc11_t *) HW_USBDCD_TIMER2_BC11_ADDR(x)) -#define HW_USBDCD_TIMER2_BC11_RD(x) (HW_USBDCD_TIMER2_BC11(x).U) -#define HW_USBDCD_TIMER2_BC11_WR(x, v) (HW_USBDCD_TIMER2_BC11(x).U = (v)) +#define HW_USBDCD_TIMER2_BC11_RD(x) (ADDRESS_READ(hw_usbdcd_timer2_bc11_t, HW_USBDCD_TIMER2_BC11_ADDR(x))) +#define HW_USBDCD_TIMER2_BC11_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_timer2_bc11_t, HW_USBDCD_TIMER2_BC11_ADDR(x), v)) #define HW_USBDCD_TIMER2_BC11_SET(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) | (v))) #define HW_USBDCD_TIMER2_BC11_CLR(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) & ~(v))) #define HW_USBDCD_TIMER2_BC11_TOG(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) ^ (v))) @@ -754,7 +761,7 @@ #define BS_USBDCD_TIMER2_BC11_CHECK_DM (4U) /*!< Bit field size in bits for USBDCD_TIMER2_BC11_CHECK_DM. */ /*! @brief Read current value of the USBDCD_TIMER2_BC11_CHECK_DM field. */ -#define BR_USBDCD_TIMER2_BC11_CHECK_DM(x) (HW_USBDCD_TIMER2_BC11(x).B.CHECK_DM) +#define BR_USBDCD_TIMER2_BC11_CHECK_DM(x) (UNION_READ(hw_usbdcd_timer2_bc11_t, HW_USBDCD_TIMER2_BC11_ADDR(x), U, B.CHECK_DM)) /*! @brief Format value for bitfield USBDCD_TIMER2_BC11_CHECK_DM. */ #define BF_USBDCD_TIMER2_BC11_CHECK_DM(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC11_CHECK_DM) & BM_USBDCD_TIMER2_BC11_CHECK_DM) @@ -777,7 +784,7 @@ #define BS_USBDCD_TIMER2_BC11_TVDPSRC_CON (10U) /*!< Bit field size in bits for USBDCD_TIMER2_BC11_TVDPSRC_CON. */ /*! @brief Read current value of the USBDCD_TIMER2_BC11_TVDPSRC_CON field. */ -#define BR_USBDCD_TIMER2_BC11_TVDPSRC_CON(x) (HW_USBDCD_TIMER2_BC11(x).B.TVDPSRC_CON) +#define BR_USBDCD_TIMER2_BC11_TVDPSRC_CON(x) (UNION_READ(hw_usbdcd_timer2_bc11_t, HW_USBDCD_TIMER2_BC11_ADDR(x), U, B.TVDPSRC_CON)) /*! @brief Format value for bitfield USBDCD_TIMER2_BC11_TVDPSRC_CON. */ #define BF_USBDCD_TIMER2_BC11_TVDPSRC_CON(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC11_TVDPSRC_CON) & BM_USBDCD_TIMER2_BC11_TVDPSRC_CON) @@ -818,8 +825,8 @@ #define HW_USBDCD_TIMER2_BC12_ADDR(x) ((x) + 0x18U) #define HW_USBDCD_TIMER2_BC12(x) (*(__IO hw_usbdcd_timer2_bc12_t *) HW_USBDCD_TIMER2_BC12_ADDR(x)) -#define HW_USBDCD_TIMER2_BC12_RD(x) (HW_USBDCD_TIMER2_BC12(x).U) -#define HW_USBDCD_TIMER2_BC12_WR(x, v) (HW_USBDCD_TIMER2_BC12(x).U = (v)) +#define HW_USBDCD_TIMER2_BC12_RD(x) (ADDRESS_READ(hw_usbdcd_timer2_bc12_t, HW_USBDCD_TIMER2_BC12_ADDR(x))) +#define HW_USBDCD_TIMER2_BC12_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_timer2_bc12_t, HW_USBDCD_TIMER2_BC12_ADDR(x), v)) #define HW_USBDCD_TIMER2_BC12_SET(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) | (v))) #define HW_USBDCD_TIMER2_BC12_CLR(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) & ~(v))) #define HW_USBDCD_TIMER2_BC12_TOG(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) ^ (v))) @@ -841,7 +848,7 @@ #define BS_USBDCD_TIMER2_BC12_TVDMSRC_ON (10U) /*!< Bit field size in bits for USBDCD_TIMER2_BC12_TVDMSRC_ON. */ /*! @brief Read current value of the USBDCD_TIMER2_BC12_TVDMSRC_ON field. */ -#define BR_USBDCD_TIMER2_BC12_TVDMSRC_ON(x) (HW_USBDCD_TIMER2_BC12(x).B.TVDMSRC_ON) +#define BR_USBDCD_TIMER2_BC12_TVDMSRC_ON(x) (UNION_READ(hw_usbdcd_timer2_bc12_t, HW_USBDCD_TIMER2_BC12_ADDR(x), U, B.TVDMSRC_ON)) /*! @brief Format value for bitfield USBDCD_TIMER2_BC12_TVDMSRC_ON. */ #define BF_USBDCD_TIMER2_BC12_TVDMSRC_ON(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC12_TVDMSRC_ON) & BM_USBDCD_TIMER2_BC12_TVDMSRC_ON) @@ -863,7 +870,7 @@ #define BS_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD (10U) /*!< Bit field size in bits for USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD. */ /*! @brief Read current value of the USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD field. */ -#define BR_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(x) (HW_USBDCD_TIMER2_BC12(x).B.TWAIT_AFTER_PRD) +#define BR_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(x) (UNION_READ(hw_usbdcd_timer2_bc12_t, HW_USBDCD_TIMER2_BC12_ADDR(x), U, B.TWAIT_AFTER_PRD)) /*! @brief Format value for bitfield USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD. */ #define BF_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD) & BM_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD)
--- a/hal/device/device/MK64F12/MK64F12_vref.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_vref.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -129,8 +136,8 @@ #define HW_VREF_TRM_ADDR(x) ((x) + 0x0U) #define HW_VREF_TRM(x) (*(__IO hw_vref_trm_t *) HW_VREF_TRM_ADDR(x)) -#define HW_VREF_TRM_RD(x) (HW_VREF_TRM(x).U) -#define HW_VREF_TRM_WR(x, v) (HW_VREF_TRM(x).U = (v)) +#define HW_VREF_TRM_RD(x) (ADDRESS_READ(hw_vref_trm_t, HW_VREF_TRM_ADDR(x))) +#define HW_VREF_TRM_WR(x, v) (ADDRESS_WRITE(hw_vref_trm_t, HW_VREF_TRM_ADDR(x), v)) #define HW_VREF_TRM_SET(x, v) (HW_VREF_TRM_WR(x, HW_VREF_TRM_RD(x) | (v))) #define HW_VREF_TRM_CLR(x, v) (HW_VREF_TRM_WR(x, HW_VREF_TRM_RD(x) & ~(v))) #define HW_VREF_TRM_TOG(x, v) (HW_VREF_TRM_WR(x, HW_VREF_TRM_RD(x) ^ (v))) @@ -157,7 +164,7 @@ #define BS_VREF_TRM_TRIM (6U) /*!< Bit field size in bits for VREF_TRM_TRIM. */ /*! @brief Read current value of the VREF_TRM_TRIM field. */ -#define BR_VREF_TRM_TRIM(x) (HW_VREF_TRM(x).B.TRIM) +#define BR_VREF_TRM_TRIM(x) (UNION_READ(hw_vref_trm_t, HW_VREF_TRM_ADDR(x), U, B.TRIM)) /*! @brief Format value for bitfield VREF_TRM_TRIM. */ #define BF_VREF_TRM_TRIM(v) ((uint8_t)((uint8_t)(v) << BP_VREF_TRM_TRIM) & BM_VREF_TRM_TRIM) @@ -182,13 +189,13 @@ #define BS_VREF_TRM_CHOPEN (1U) /*!< Bit field size in bits for VREF_TRM_CHOPEN. */ /*! @brief Read current value of the VREF_TRM_CHOPEN field. */ -#define BR_VREF_TRM_CHOPEN(x) (BITBAND_ACCESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN)) +#define BR_VREF_TRM_CHOPEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN))) /*! @brief Format value for bitfield VREF_TRM_CHOPEN. */ #define BF_VREF_TRM_CHOPEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_TRM_CHOPEN) & BM_VREF_TRM_CHOPEN) /*! @brief Set the CHOPEN field to a new value. */ -#define BW_VREF_TRM_CHOPEN(x, v) (BITBAND_ACCESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN) = (v)) +#define BW_VREF_TRM_CHOPEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN), v)) /*@}*/ /******************************************************************************* @@ -225,8 +232,8 @@ #define HW_VREF_SC_ADDR(x) ((x) + 0x1U) #define HW_VREF_SC(x) (*(__IO hw_vref_sc_t *) HW_VREF_SC_ADDR(x)) -#define HW_VREF_SC_RD(x) (HW_VREF_SC(x).U) -#define HW_VREF_SC_WR(x, v) (HW_VREF_SC(x).U = (v)) +#define HW_VREF_SC_RD(x) (ADDRESS_READ(hw_vref_sc_t, HW_VREF_SC_ADDR(x))) +#define HW_VREF_SC_WR(x, v) (ADDRESS_WRITE(hw_vref_sc_t, HW_VREF_SC_ADDR(x), v)) #define HW_VREF_SC_SET(x, v) (HW_VREF_SC_WR(x, HW_VREF_SC_RD(x) | (v))) #define HW_VREF_SC_CLR(x, v) (HW_VREF_SC_WR(x, HW_VREF_SC_RD(x) & ~(v))) #define HW_VREF_SC_TOG(x, v) (HW_VREF_SC_WR(x, HW_VREF_SC_RD(x) ^ (v))) @@ -253,7 +260,7 @@ #define BS_VREF_SC_MODE_LV (2U) /*!< Bit field size in bits for VREF_SC_MODE_LV. */ /*! @brief Read current value of the VREF_SC_MODE_LV field. */ -#define BR_VREF_SC_MODE_LV(x) (HW_VREF_SC(x).B.MODE_LV) +#define BR_VREF_SC_MODE_LV(x) (UNION_READ(hw_vref_sc_t, HW_VREF_SC_ADDR(x), U, B.MODE_LV)) /*! @brief Format value for bitfield VREF_SC_MODE_LV. */ #define BF_VREF_SC_MODE_LV(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_MODE_LV) & BM_VREF_SC_MODE_LV) @@ -278,7 +285,7 @@ #define BS_VREF_SC_VREFST (1U) /*!< Bit field size in bits for VREF_SC_VREFST. */ /*! @brief Read current value of the VREF_SC_VREFST field. */ -#define BR_VREF_SC_VREFST(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFST)) +#define BR_VREF_SC_VREFST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFST))) /*@}*/ /*! @@ -297,13 +304,13 @@ #define BS_VREF_SC_ICOMPEN (1U) /*!< Bit field size in bits for VREF_SC_ICOMPEN. */ /*! @brief Read current value of the VREF_SC_ICOMPEN field. */ -#define BR_VREF_SC_ICOMPEN(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN)) +#define BR_VREF_SC_ICOMPEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN))) /*! @brief Format value for bitfield VREF_SC_ICOMPEN. */ #define BF_VREF_SC_ICOMPEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_ICOMPEN) & BM_VREF_SC_ICOMPEN) /*! @brief Set the ICOMPEN field to a new value. */ -#define BW_VREF_SC_ICOMPEN(x, v) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN) = (v)) +#define BW_VREF_SC_ICOMPEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN), v)) /*@}*/ /*! @@ -327,13 +334,13 @@ #define BS_VREF_SC_REGEN (1U) /*!< Bit field size in bits for VREF_SC_REGEN. */ /*! @brief Read current value of the VREF_SC_REGEN field. */ -#define BR_VREF_SC_REGEN(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN)) +#define BR_VREF_SC_REGEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN))) /*! @brief Format value for bitfield VREF_SC_REGEN. */ #define BF_VREF_SC_REGEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_REGEN) & BM_VREF_SC_REGEN) /*! @brief Set the REGEN field to a new value. */ -#define BW_VREF_SC_REGEN(x, v) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN) = (v)) +#define BW_VREF_SC_REGEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN), v)) /*@}*/ /*! @@ -354,13 +361,13 @@ #define BS_VREF_SC_VREFEN (1U) /*!< Bit field size in bits for VREF_SC_VREFEN. */ /*! @brief Read current value of the VREF_SC_VREFEN field. */ -#define BR_VREF_SC_VREFEN(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN)) +#define BR_VREF_SC_VREFEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN))) /*! @brief Format value for bitfield VREF_SC_VREFEN. */ #define BF_VREF_SC_VREFEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_VREFEN) & BM_VREF_SC_VREFEN) /*! @brief Set the VREFEN field to a new value. */ -#define BW_VREF_SC_VREFEN(x, v) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN) = (v)) +#define BW_VREF_SC_VREFEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN), v)) /*@}*/ /*******************************************************************************
--- a/hal/device/device/MK64F12/MK64F12_wdog.h Mon Apr 04 13:51:48 2016 +0100 +++ b/hal/device/device/MK64F12/MK64F12_wdog.h Mon Apr 04 14:09:12 2016 +0100 @@ -15,6 +15,9 @@ ** Copyright (c) 2014 Freescale Semiconductor, Inc. ** All rights reserved. ** +** (C) COPYRIGHT 2015-2015 ARM Limited +** ALL RIGHTS RESERVED +** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** @@ -68,6 +71,10 @@ ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h ** Update of SystemInit() and SystemCoreClockUpdate() functions. ** Module access macro module_BASES replaced by module_BASE_PTRS. +** - rev. 2.6 (2015-08-03) (ARM) +** All accesses to memory are replaced by equivalent macros; this allows +** memory read/write operations to be re-defined if needed (for example, +** to implement new security features ** ** ################################################################### */ @@ -145,8 +152,8 @@ #define HW_WDOG_STCTRLH_ADDR(x) ((x) + 0x0U) #define HW_WDOG_STCTRLH(x) (*(__IO hw_wdog_stctrlh_t *) HW_WDOG_STCTRLH_ADDR(x)) -#define HW_WDOG_STCTRLH_RD(x) (HW_WDOG_STCTRLH(x).U) -#define HW_WDOG_STCTRLH_WR(x, v) (HW_WDOG_STCTRLH(x).U = (v)) +#define HW_WDOG_STCTRLH_RD(x) (ADDRESS_READ(hw_wdog_stctrlh_t, HW_WDOG_STCTRLH_ADDR(x))) +#define HW_WDOG_STCTRLH_WR(x, v) (ADDRESS_WRITE(hw_wdog_stctrlh_t, HW_WDOG_STCTRLH_ADDR(x), v)) #define HW_WDOG_STCTRLH_SET(x, v) (HW_WDOG_STCTRLH_WR(x, HW_WDOG_STCTRLH_RD(x) | (v))) #define HW_WDOG_STCTRLH_CLR(x, v) (HW_WDOG_STCTRLH_WR(x, HW_WDOG_STCTRLH_RD(x) & ~(v))) #define HW_WDOG_STCTRLH_TOG(x, v) (HW_WDOG_STCTRLH_WR(x, HW_WDOG_STCTRLH_RD(x) ^ (v))) @@ -174,13 +181,13 @@ #define BS_WDOG_STCTRLH_WDOGEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_WDOGEN. */ /*! @brief Read current value of the WDOG_STCTRLH_WDOGEN field. */ -#define BR_WDOG_STCTRLH_WDOGEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WDOGEN)) +#define BR_WDOG_STCTRLH_WDOGEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WDOGEN))) /*! @brief Format value for bitfield WDOG_STCTRLH_WDOGEN. */ #define BF_WDOG_STCTRLH_WDOGEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_WDOGEN) & BM_WDOG_STCTRLH_WDOGEN) /*! @brief Set the WDOGEN field to a new value. */ -#define BW_WDOG_STCTRLH_WDOGEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WDOGEN) = (v)) +#define BW_WDOG_STCTRLH_WDOGEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WDOGEN), v)) /*@}*/ /*! @@ -198,13 +205,13 @@ #define BS_WDOG_STCTRLH_CLKSRC (1U) /*!< Bit field size in bits for WDOG_STCTRLH_CLKSRC. */ /*! @brief Read current value of the WDOG_STCTRLH_CLKSRC field. */ -#define BR_WDOG_STCTRLH_CLKSRC(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_CLKSRC)) +#define BR_WDOG_STCTRLH_CLKSRC(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_CLKSRC))) /*! @brief Format value for bitfield WDOG_STCTRLH_CLKSRC. */ #define BF_WDOG_STCTRLH_CLKSRC(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_CLKSRC) & BM_WDOG_STCTRLH_CLKSRC) /*! @brief Set the CLKSRC field to a new value. */ -#define BW_WDOG_STCTRLH_CLKSRC(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_CLKSRC) = (v)) +#define BW_WDOG_STCTRLH_CLKSRC(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_CLKSRC), v)) /*@}*/ /*! @@ -224,13 +231,13 @@ #define BS_WDOG_STCTRLH_IRQRSTEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_IRQRSTEN. */ /*! @brief Read current value of the WDOG_STCTRLH_IRQRSTEN field. */ -#define BR_WDOG_STCTRLH_IRQRSTEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_IRQRSTEN)) +#define BR_WDOG_STCTRLH_IRQRSTEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_IRQRSTEN))) /*! @brief Format value for bitfield WDOG_STCTRLH_IRQRSTEN. */ #define BF_WDOG_STCTRLH_IRQRSTEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_IRQRSTEN) & BM_WDOG_STCTRLH_IRQRSTEN) /*! @brief Set the IRQRSTEN field to a new value. */ -#define BW_WDOG_STCTRLH_IRQRSTEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_IRQRSTEN) = (v)) +#define BW_WDOG_STCTRLH_IRQRSTEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_IRQRSTEN), v)) /*@}*/ /*! @@ -248,13 +255,13 @@ #define BS_WDOG_STCTRLH_WINEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_WINEN. */ /*! @brief Read current value of the WDOG_STCTRLH_WINEN field. */ -#define BR_WDOG_STCTRLH_WINEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WINEN)) +#define BR_WDOG_STCTRLH_WINEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WINEN))) /*! @brief Format value for bitfield WDOG_STCTRLH_WINEN. */ #define BF_WDOG_STCTRLH_WINEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_WINEN) & BM_WDOG_STCTRLH_WINEN) /*! @brief Set the WINEN field to a new value. */ -#define BW_WDOG_STCTRLH_WINEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WINEN) = (v)) +#define BW_WDOG_STCTRLH_WINEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WINEN), v)) /*@}*/ /*! @@ -273,13 +280,13 @@ #define BS_WDOG_STCTRLH_ALLOWUPDATE (1U) /*!< Bit field size in bits for WDOG_STCTRLH_ALLOWUPDATE. */ /*! @brief Read current value of the WDOG_STCTRLH_ALLOWUPDATE field. */ -#define BR_WDOG_STCTRLH_ALLOWUPDATE(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_ALLOWUPDATE)) +#define BR_WDOG_STCTRLH_ALLOWUPDATE(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_ALLOWUPDATE))) /*! @brief Format value for bitfield WDOG_STCTRLH_ALLOWUPDATE. */ #define BF_WDOG_STCTRLH_ALLOWUPDATE(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_ALLOWUPDATE) & BM_WDOG_STCTRLH_ALLOWUPDATE) /*! @brief Set the ALLOWUPDATE field to a new value. */ -#define BW_WDOG_STCTRLH_ALLOWUPDATE(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_ALLOWUPDATE) = (v)) +#define BW_WDOG_STCTRLH_ALLOWUPDATE(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_ALLOWUPDATE), v)) /*@}*/ /*! @@ -297,13 +304,13 @@ #define BS_WDOG_STCTRLH_DBGEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_DBGEN. */ /*! @brief Read current value of the WDOG_STCTRLH_DBGEN field. */ -#define BR_WDOG_STCTRLH_DBGEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DBGEN)) +#define BR_WDOG_STCTRLH_DBGEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DBGEN))) /*! @brief Format value for bitfield WDOG_STCTRLH_DBGEN. */ #define BF_WDOG_STCTRLH_DBGEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_DBGEN) & BM_WDOG_STCTRLH_DBGEN) /*! @brief Set the DBGEN field to a new value. */ -#define BW_WDOG_STCTRLH_DBGEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DBGEN) = (v)) +#define BW_WDOG_STCTRLH_DBGEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DBGEN), v)) /*@}*/ /*! @@ -321,13 +328,13 @@ #define BS_WDOG_STCTRLH_STOPEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_STOPEN. */ /*! @brief Read current value of the WDOG_STCTRLH_STOPEN field. */ -#define BR_WDOG_STCTRLH_STOPEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_STOPEN)) +#define BR_WDOG_STCTRLH_STOPEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_STOPEN))) /*! @brief Format value for bitfield WDOG_STCTRLH_STOPEN. */ #define BF_WDOG_STCTRLH_STOPEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_STOPEN) & BM_WDOG_STCTRLH_STOPEN) /*! @brief Set the STOPEN field to a new value. */ -#define BW_WDOG_STCTRLH_STOPEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_STOPEN) = (v)) +#define BW_WDOG_STCTRLH_STOPEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_STOPEN), v)) /*@}*/ /*! @@ -345,13 +352,13 @@ #define BS_WDOG_STCTRLH_WAITEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_WAITEN. */ /*! @brief Read current value of the WDOG_STCTRLH_WAITEN field. */ -#define BR_WDOG_STCTRLH_WAITEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WAITEN)) +#define BR_WDOG_STCTRLH_WAITEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WAITEN))) /*! @brief Format value for bitfield WDOG_STCTRLH_WAITEN. */ #define BF_WDOG_STCTRLH_WAITEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_WAITEN) & BM_WDOG_STCTRLH_WAITEN) /*! @brief Set the WAITEN field to a new value. */ -#define BW_WDOG_STCTRLH_WAITEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WAITEN) = (v)) +#define BW_WDOG_STCTRLH_WAITEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WAITEN), v)) /*@}*/ /*! @@ -369,13 +376,13 @@ #define BS_WDOG_STCTRLH_TESTWDOG (1U) /*!< Bit field size in bits for WDOG_STCTRLH_TESTWDOG. */ /*! @brief Read current value of the WDOG_STCTRLH_TESTWDOG field. */ -#define BR_WDOG_STCTRLH_TESTWDOG(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTWDOG)) +#define BR_WDOG_STCTRLH_TESTWDOG(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTWDOG))) /*! @brief Format value for bitfield WDOG_STCTRLH_TESTWDOG. */ #define BF_WDOG_STCTRLH_TESTWDOG(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_TESTWDOG) & BM_WDOG_STCTRLH_TESTWDOG) /*! @brief Set the TESTWDOG field to a new value. */ -#define BW_WDOG_STCTRLH_TESTWDOG(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTWDOG) = (v)) +#define BW_WDOG_STCTRLH_TESTWDOG(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTWDOG), v)) /*@}*/ /*! @@ -398,13 +405,13 @@ #define BS_WDOG_STCTRLH_TESTSEL (1U) /*!< Bit field size in bits for WDOG_STCTRLH_TESTSEL. */ /*! @brief Read current value of the WDOG_STCTRLH_TESTSEL field. */ -#define BR_WDOG_STCTRLH_TESTSEL(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTSEL)) +#define BR_WDOG_STCTRLH_TESTSEL(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTSEL))) /*! @brief Format value for bitfield WDOG_STCTRLH_TESTSEL. */ #define BF_WDOG_STCTRLH_TESTSEL(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_TESTSEL) & BM_WDOG_STCTRLH_TESTSEL) /*! @brief Set the TESTSEL field to a new value. */ -#define BW_WDOG_STCTRLH_TESTSEL(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTSEL) = (v)) +#define BW_WDOG_STCTRLH_TESTSEL(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTSEL), v)) /*@}*/ /*! @@ -425,7 +432,7 @@ #define BS_WDOG_STCTRLH_BYTESEL (2U) /*!< Bit field size in bits for WDOG_STCTRLH_BYTESEL. */ /*! @brief Read current value of the WDOG_STCTRLH_BYTESEL field. */ -#define BR_WDOG_STCTRLH_BYTESEL(x) (HW_WDOG_STCTRLH(x).B.BYTESEL) +#define BR_WDOG_STCTRLH_BYTESEL(x) (UNION_READ(hw_wdog_stctrlh_t, HW_WDOG_STCTRLH_ADDR(x), U, B.BYTESEL)) /*! @brief Format value for bitfield WDOG_STCTRLH_BYTESEL. */ #define BF_WDOG_STCTRLH_BYTESEL(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_BYTESEL) & BM_WDOG_STCTRLH_BYTESEL) @@ -451,13 +458,13 @@ #define BS_WDOG_STCTRLH_DISTESTWDOG (1U) /*!< Bit field size in bits for WDOG_STCTRLH_DISTESTWDOG. */ /*! @brief Read current value of the WDOG_STCTRLH_DISTESTWDOG field. */ -#define BR_WDOG_STCTRLH_DISTESTWDOG(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DISTESTWDOG)) +#define BR_WDOG_STCTRLH_DISTESTWDOG(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DISTESTWDOG))) /*! @brief Format value for bitfield WDOG_STCTRLH_DISTESTWDOG. */ #define BF_WDOG_STCTRLH_DISTESTWDOG(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_DISTESTWDOG) & BM_WDOG_STCTRLH_DISTESTWDOG) /*! @brief Set the DISTESTWDOG field to a new value. */ -#define BW_WDOG_STCTRLH_DISTESTWDOG(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DISTESTWDOG) = (v)) +#define BW_WDOG_STCTRLH_DISTESTWDOG(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DISTESTWDOG), v)) /*@}*/ /******************************************************************************* @@ -486,8 +493,8 @@ #define HW_WDOG_STCTRLL_ADDR(x) ((x) + 0x2U) #define HW_WDOG_STCTRLL(x) (*(__IO hw_wdog_stctrll_t *) HW_WDOG_STCTRLL_ADDR(x)) -#define HW_WDOG_STCTRLL_RD(x) (HW_WDOG_STCTRLL(x).U) -#define HW_WDOG_STCTRLL_WR(x, v) (HW_WDOG_STCTRLL(x).U = (v)) +#define HW_WDOG_STCTRLL_RD(x) (ADDRESS_READ(hw_wdog_stctrll_t, HW_WDOG_STCTRLL_ADDR(x))) +#define HW_WDOG_STCTRLL_WR(x, v) (ADDRESS_WRITE(hw_wdog_stctrll_t, HW_WDOG_STCTRLL_ADDR(x), v)) #define HW_WDOG_STCTRLL_SET(x, v) (HW_WDOG_STCTRLL_WR(x, HW_WDOG_STCTRLL_RD(x) | (v))) #define HW_WDOG_STCTRLL_CLR(x, v) (HW_WDOG_STCTRLL_WR(x, HW_WDOG_STCTRLL_RD(x) & ~(v))) #define HW_WDOG_STCTRLL_TOG(x, v) (HW_WDOG_STCTRLL_WR(x, HW_WDOG_STCTRLL_RD(x) ^ (v))) @@ -511,13 +518,13 @@ #define BS_WDOG_STCTRLL_INTFLG (1U) /*!< Bit field size in bits for WDOG_STCTRLL_INTFLG. */ /*! @brief Read current value of the WDOG_STCTRLL_INTFLG field. */ -#define BR_WDOG_STCTRLL_INTFLG(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLL_ADDR(x), BP_WDOG_STCTRLL_INTFLG)) +#define BR_WDOG_STCTRLL_INTFLG(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLL_ADDR(x), BP_WDOG_STCTRLL_INTFLG))) /*! @brief Format value for bitfield WDOG_STCTRLL_INTFLG. */ #define BF_WDOG_STCTRLL_INTFLG(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLL_INTFLG) & BM_WDOG_STCTRLL_INTFLG) /*! @brief Set the INTFLG field to a new value. */ -#define BW_WDOG_STCTRLL_INTFLG(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLL_ADDR(x), BP_WDOG_STCTRLL_INTFLG) = (v)) +#define BW_WDOG_STCTRLL_INTFLG(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLL_ADDR(x), BP_WDOG_STCTRLL_INTFLG), v)) /*@}*/ /******************************************************************************* @@ -545,8 +552,8 @@ #define HW_WDOG_TOVALH_ADDR(x) ((x) + 0x4U) #define HW_WDOG_TOVALH(x) (*(__IO hw_wdog_tovalh_t *) HW_WDOG_TOVALH_ADDR(x)) -#define HW_WDOG_TOVALH_RD(x) (HW_WDOG_TOVALH(x).U) -#define HW_WDOG_TOVALH_WR(x, v) (HW_WDOG_TOVALH(x).U = (v)) +#define HW_WDOG_TOVALH_RD(x) (ADDRESS_READ(hw_wdog_tovalh_t, HW_WDOG_TOVALH_ADDR(x))) +#define HW_WDOG_TOVALH_WR(x, v) (ADDRESS_WRITE(hw_wdog_tovalh_t, HW_WDOG_TOVALH_ADDR(x), v)) #define HW_WDOG_TOVALH_SET(x, v) (HW_WDOG_TOVALH_WR(x, HW_WDOG_TOVALH_RD(x) | (v))) #define HW_WDOG_TOVALH_CLR(x, v) (HW_WDOG_TOVALH_WR(x, HW_WDOG_TOVALH_RD(x) & ~(v))) #define HW_WDOG_TOVALH_TOG(x, v) (HW_WDOG_TOVALH_WR(x, HW_WDOG_TOVALH_RD(x) ^ (v))) @@ -606,8 +613,8 @@ #define HW_WDOG_TOVALL_ADDR(x) ((x) + 0x6U) #define HW_WDOG_TOVALL(x) (*(__IO hw_wdog_tovall_t *) HW_WDOG_TOVALL_ADDR(x)) -#define HW_WDOG_TOVALL_RD(x) (HW_WDOG_TOVALL(x).U) -#define HW_WDOG_TOVALL_WR(x, v) (HW_WDOG_TOVALL(x).U = (v)) +#define HW_WDOG_TOVALL_RD(x) (ADDRESS_READ(hw_wdog_tovall_t, HW_WDOG_TOVALL_ADDR(x))) +#define HW_WDOG_TOVALL_WR(x, v) (ADDRESS_WRITE(hw_wdog_tovall_t, HW_WDOG_TOVALL_ADDR(x), v)) #define HW_WDOG_TOVALL_SET(x, v) (HW_WDOG_TOVALL_WR(x, HW_WDOG_TOVALL_RD(x) | (v))) #define HW_WDOG_TOVALL_CLR(x, v) (HW_WDOG_TOVALL_WR(x, HW_WDOG_TOVALL_RD(x) & ~(v))) #define HW_WDOG_TOVALL_TOG(x, v) (HW_WDOG_TOVALL_WR(x, HW_WDOG_TOVALL_RD(x) ^ (v))) @@ -665,8 +672,8 @@ #define HW_WDOG_WINH_ADDR(x) ((x) + 0x8U) #define HW_WDOG_WINH(x) (*(__IO hw_wdog_winh_t *) HW_WDOG_WINH_ADDR(x)) -#define HW_WDOG_WINH_RD(x) (HW_WDOG_WINH(x).U) -#define HW_WDOG_WINH_WR(x, v) (HW_WDOG_WINH(x).U = (v)) +#define HW_WDOG_WINH_RD(x) (ADDRESS_READ(hw_wdog_winh_t, HW_WDOG_WINH_ADDR(x))) +#define HW_WDOG_WINH_WR(x, v) (ADDRESS_WRITE(hw_wdog_winh_t, HW_WDOG_WINH_ADDR(x), v)) #define HW_WDOG_WINH_SET(x, v) (HW_WDOG_WINH_WR(x, HW_WDOG_WINH_RD(x) | (v))) #define HW_WDOG_WINH_CLR(x, v) (HW_WDOG_WINH_WR(x, HW_WDOG_WINH_RD(x) & ~(v))) #define HW_WDOG_WINH_TOG(x, v) (HW_WDOG_WINH_WR(x, HW_WDOG_WINH_RD(x) ^ (v))) @@ -728,8 +735,8 @@ #define HW_WDOG_WINL_ADDR(x) ((x) + 0xAU) #define HW_WDOG_WINL(x) (*(__IO hw_wdog_winl_t *) HW_WDOG_WINL_ADDR(x)) -#define HW_WDOG_WINL_RD(x) (HW_WDOG_WINL(x).U) -#define HW_WDOG_WINL_WR(x, v) (HW_WDOG_WINL(x).U = (v)) +#define HW_WDOG_WINL_RD(x) (ADDRESS_READ(hw_wdog_winl_t, HW_WDOG_WINL_ADDR(x))) +#define HW_WDOG_WINL_WR(x, v) (ADDRESS_WRITE(hw_wdog_winl_t, HW_WDOG_WINL_ADDR(x), v)) #define HW_WDOG_WINL_SET(x, v) (HW_WDOG_WINL_WR(x, HW_WDOG_WINL_RD(x) | (v))) #define HW_WDOG_WINL_CLR(x, v) (HW_WDOG_WINL_WR(x, HW_WDOG_WINL_RD(x) & ~(v))) #define HW_WDOG_WINL_TOG(x, v) (HW_WDOG_WINL_WR(x, HW_WDOG_WINL_RD(x) ^ (v))) @@ -789,8 +796,8 @@ #define HW_WDOG_REFRESH_ADDR(x) ((x) + 0xCU) #define HW_WDOG_REFRESH(x) (*(__IO hw_wdog_refresh_t *) HW_WDOG_REFRESH_ADDR(x)) -#define HW_WDOG_REFRESH_RD(x) (HW_WDOG_REFRESH(x).U) -#define HW_WDOG_REFRESH_WR(x, v) (HW_WDOG_REFRESH(x).U = (v)) +#define HW_WDOG_REFRESH_RD(x) (ADDRESS_READ(hw_wdog_refresh_t, HW_WDOG_REFRESH_ADDR(x))) +#define HW_WDOG_REFRESH_WR(x, v) (ADDRESS_WRITE(hw_wdog_refresh_t, HW_WDOG_REFRESH_ADDR(x), v)) #define HW_WDOG_REFRESH_SET(x, v) (HW_WDOG_REFRESH_WR(x, HW_WDOG_REFRESH_RD(x) | (v))) #define HW_WDOG_REFRESH_CLR(x, v) (HW_WDOG_REFRESH_WR(x, HW_WDOG_REFRESH_RD(x) & ~(v))) #define HW_WDOG_REFRESH_TOG(x, v) (HW_WDOG_REFRESH_WR(x, HW_WDOG_REFRESH_RD(x) ^ (v))) @@ -849,8 +856,8 @@ #define HW_WDOG_UNLOCK_ADDR(x) ((x) + 0xEU) #define HW_WDOG_UNLOCK(x) (*(__IO hw_wdog_unlock_t *) HW_WDOG_UNLOCK_ADDR(x)) -#define HW_WDOG_UNLOCK_RD(x) (HW_WDOG_UNLOCK(x).U) -#define HW_WDOG_UNLOCK_WR(x, v) (HW_WDOG_UNLOCK(x).U = (v)) +#define HW_WDOG_UNLOCK_RD(x) (ADDRESS_READ(hw_wdog_unlock_t, HW_WDOG_UNLOCK_ADDR(x))) +#define HW_WDOG_UNLOCK_WR(x, v) (ADDRESS_WRITE(hw_wdog_unlock_t, HW_WDOG_UNLOCK_ADDR(x), v)) #define HW_WDOG_UNLOCK_SET(x, v) (HW_WDOG_UNLOCK_WR(x, HW_WDOG_UNLOCK_RD(x) | (v))) #define HW_WDOG_UNLOCK_CLR(x, v) (HW_WDOG_UNLOCK_WR(x, HW_WDOG_UNLOCK_RD(x) & ~(v))) #define HW_WDOG_UNLOCK_TOG(x, v) (HW_WDOG_UNLOCK_WR(x, HW_WDOG_UNLOCK_RD(x) ^ (v))) @@ -912,8 +919,8 @@ #define HW_WDOG_TMROUTH_ADDR(x) ((x) + 0x10U) #define HW_WDOG_TMROUTH(x) (*(__IO hw_wdog_tmrouth_t *) HW_WDOG_TMROUTH_ADDR(x)) -#define HW_WDOG_TMROUTH_RD(x) (HW_WDOG_TMROUTH(x).U) -#define HW_WDOG_TMROUTH_WR(x, v) (HW_WDOG_TMROUTH(x).U = (v)) +#define HW_WDOG_TMROUTH_RD(x) (ADDRESS_READ(hw_wdog_tmrouth_t, HW_WDOG_TMROUTH_ADDR(x))) +#define HW_WDOG_TMROUTH_WR(x, v) (ADDRESS_WRITE(hw_wdog_tmrouth_t, HW_WDOG_TMROUTH_ADDR(x), v)) #define HW_WDOG_TMROUTH_SET(x, v) (HW_WDOG_TMROUTH_WR(x, HW_WDOG_TMROUTH_RD(x) | (v))) #define HW_WDOG_TMROUTH_CLR(x, v) (HW_WDOG_TMROUTH_WR(x, HW_WDOG_TMROUTH_RD(x) & ~(v))) #define HW_WDOG_TMROUTH_TOG(x, v) (HW_WDOG_TMROUTH_WR(x, HW_WDOG_TMROUTH_RD(x) ^ (v))) @@ -973,8 +980,8 @@ #define HW_WDOG_TMROUTL_ADDR(x) ((x) + 0x12U) #define HW_WDOG_TMROUTL(x) (*(__IO hw_wdog_tmroutl_t *) HW_WDOG_TMROUTL_ADDR(x)) -#define HW_WDOG_TMROUTL_RD(x) (HW_WDOG_TMROUTL(x).U) -#define HW_WDOG_TMROUTL_WR(x, v) (HW_WDOG_TMROUTL(x).U = (v)) +#define HW_WDOG_TMROUTL_RD(x) (ADDRESS_READ(hw_wdog_tmroutl_t, HW_WDOG_TMROUTL_ADDR(x))) +#define HW_WDOG_TMROUTL_WR(x, v) (ADDRESS_WRITE(hw_wdog_tmroutl_t, HW_WDOG_TMROUTL_ADDR(x), v)) #define HW_WDOG_TMROUTL_SET(x, v) (HW_WDOG_TMROUTL_WR(x, HW_WDOG_TMROUTL_RD(x) | (v))) #define HW_WDOG_TMROUTL_CLR(x, v) (HW_WDOG_TMROUTL_WR(x, HW_WDOG_TMROUTL_RD(x) & ~(v))) #define HW_WDOG_TMROUTL_TOG(x, v) (HW_WDOG_TMROUTL_WR(x, HW_WDOG_TMROUTL_RD(x) ^ (v))) @@ -1029,8 +1036,8 @@ #define HW_WDOG_RSTCNT_ADDR(x) ((x) + 0x14U) #define HW_WDOG_RSTCNT(x) (*(__IO hw_wdog_rstcnt_t *) HW_WDOG_RSTCNT_ADDR(x)) -#define HW_WDOG_RSTCNT_RD(x) (HW_WDOG_RSTCNT(x).U) -#define HW_WDOG_RSTCNT_WR(x, v) (HW_WDOG_RSTCNT(x).U = (v)) +#define HW_WDOG_RSTCNT_RD(x) (ADDRESS_READ(hw_wdog_rstcnt_t, HW_WDOG_RSTCNT_ADDR(x))) +#define HW_WDOG_RSTCNT_WR(x, v) (ADDRESS_WRITE(hw_wdog_rstcnt_t, HW_WDOG_RSTCNT_ADDR(x), v)) #define HW_WDOG_RSTCNT_SET(x, v) (HW_WDOG_RSTCNT_WR(x, HW_WDOG_RSTCNT_RD(x) | (v))) #define HW_WDOG_RSTCNT_CLR(x, v) (HW_WDOG_RSTCNT_WR(x, HW_WDOG_RSTCNT_RD(x) & ~(v))) #define HW_WDOG_RSTCNT_TOG(x, v) (HW_WDOG_RSTCNT_WR(x, HW_WDOG_RSTCNT_RD(x) ^ (v))) @@ -1089,8 +1096,8 @@ #define HW_WDOG_PRESC_ADDR(x) ((x) + 0x16U) #define HW_WDOG_PRESC(x) (*(__IO hw_wdog_presc_t *) HW_WDOG_PRESC_ADDR(x)) -#define HW_WDOG_PRESC_RD(x) (HW_WDOG_PRESC(x).U) -#define HW_WDOG_PRESC_WR(x, v) (HW_WDOG_PRESC(x).U = (v)) +#define HW_WDOG_PRESC_RD(x) (ADDRESS_READ(hw_wdog_presc_t, HW_WDOG_PRESC_ADDR(x))) +#define HW_WDOG_PRESC_WR(x, v) (ADDRESS_WRITE(hw_wdog_presc_t, HW_WDOG_PRESC_ADDR(x), v)) #define HW_WDOG_PRESC_SET(x, v) (HW_WDOG_PRESC_WR(x, HW_WDOG_PRESC_RD(x) | (v))) #define HW_WDOG_PRESC_CLR(x, v) (HW_WDOG_PRESC_WR(x, HW_WDOG_PRESC_RD(x) & ~(v))) #define HW_WDOG_PRESC_TOG(x, v) (HW_WDOG_PRESC_WR(x, HW_WDOG_PRESC_RD(x) ^ (v))) @@ -1113,7 +1120,7 @@ #define BS_WDOG_PRESC_PRESCVAL (3U) /*!< Bit field size in bits for WDOG_PRESC_PRESCVAL. */ /*! @brief Read current value of the WDOG_PRESC_PRESCVAL field. */ -#define BR_WDOG_PRESC_PRESCVAL(x) (HW_WDOG_PRESC(x).B.PRESCVAL) +#define BR_WDOG_PRESC_PRESCVAL(x) (UNION_READ(hw_wdog_presc_t, HW_WDOG_PRESC_ADDR(x), U, B.PRESCVAL)) /*! @brief Format value for bitfield WDOG_PRESC_PRESCVAL. */ #define BF_WDOG_PRESC_PRESCVAL(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_PRESC_PRESCVAL) & BM_WDOG_PRESC_PRESCVAL)