Power Management

Reducing power is not only green, it saves money by saving power. Over the life of a computer system, the money spent to power and cool the device can cost as much as the device itself. So well engineered designs need to minimize power whenever practical. Devices running off of batteries such as cellphones need power management for long battery run times. A fully powered cellphone would run down the battery in just a few minutes without power management. In the current technology used for CMOS integrated circuits, the primary source of power consumption occurs during switching:

Power = Capacitive load x Voltage2 x Clock Frequency

So to reduce power, you need to reduce one or more of these terms.

Reducing Capacitive Load

Capacitive load is a function of both the gate technology and the number of transistors. An embedded designer cannot change the gate technology, but they can power down unused hardware devices to lower the capacitive load. Many devices have hardware support to turn off various I/O hardware units by disabling their clock and in some cases by turning off power. If power is turned off instead of disabling the clock, values in registers will be lost.

Reducing Voltage Levels

In recent years, voltage levels have been reduced on logic from 5V to 3.3V and internal devices in many processors use core voltages near 1V. Some processors can vary the core voltage depending on the computational load. Reduction below 1V is unlikely due to limits in device physics. An embedded designer can't change the internal processor design when using a commercial processor, but they can use new lower power 3.3V devices instead of 5V when possible to reduce the power used in a design.

Reducing Clock Frequency

Processors have been able to increase clock frequency to run faster as IC circuits have become smaller. A faster clock boosts performance, but unfortunately also increases power levels. So turning off the clock, or slowing down the clock whenever excess CPU time is available can be used to reduce power levels. Many processors have hardware support to vary the clock frequency or even turn off the clock (i.e., Sleep mode). Some reduced static power levels will still be required even with the clock off to save the values in registers and volatile RAM memory, so that the device can wakeup without a full reboot. Interrupt hardware is used to wake a device from Sleep mode, so the hardware used for wakeup can't be turned off.

Code example reducing mbed power

The mbed LPC1768 board was not designed for very low power levels, but it is still possible to save significant power with a little additional effort. It is possible to turn off some of the external devices and the processor includes support to power down unused devices inside the processor chip, vary the clock rate, and enter low power Sleep modes. Here is a simple code example showing how to get started on using the power management features to reduce the power levels on mbed. The demo code blinks the LEDs using a bit less than half of the normal power levels. The Ethernet controller is powered down by writing to some registers that disable it. The mbed USB interface is powered down by sending it a special power down command supported in a new version of the firmware. To support this feature, power must be supplied using the mbed's Vin pin instead of the USB cable.

Instead of using wait, Sleep is used. Sleep does not clock in new instructions, it turns off the clock on the processor core and waits for a timer interrupt (i.e., Ticker). Power reductions are stated in mW assuming a 5V supply is used. Recall that Power = V * I , so if you want to see the mA levels just divide by 5.

This code is based on some power control information in the forums at http://mbed.org/users/no2chem/notebook/mbed-power-controlconsumption/ and some new experimental firmware that allows the USB interface chip to reduce power levels at http://mbed.org/users/simon/notebook/interface-powerdown/. This is helpful when running mbed from limited power sources such as batteries. Information on how these power down functions are used to power down the devices can be found in Chapter 4 Section 8 of LPC1768 User Manual and they are also discussed in Chapter 14 of the Cortex M3 textbook.

Blink_LED_with_Power_Manangement

#include "mbed.h"
#include "PowerControl/PowerControl.h"
#include "PowerControl/EthernetPowerControl.h"
// Need PowerControl *.h files from this URL
// http://mbed.org/users/no2chem/notebook/mbed-power-controlconsumption/

// Function to power down magic USB interface chip with new firmware
#define USR_POWERDOWN    (0x104)
int semihost_powerdown() {
    uint32_t arg;
    return __semihost(USR_POWERDOWN, &arg);
}

DigitalOut myled1(LED1);
DigitalOut myled2(LED2);
DigitalOut myled3(LED3);
DigitalOut myled4(LED4);

Ticker blinker;
int count=1;

void blink() {
    count = count << 1;
    if (count > 0x08) count = 0x01;
    myled1 = count & 0x01;
    myled2 = count & 0x02;
    myled3 = count & 0x04;
    myled4 = count & 0x08;
}

int main() {
    int result;
// Normal mbed power level for this setup is around 690mW
// assuming 5V used on Vin pin
// If you don't need networking...
// Power down Ethernet interface - saves around 175mW
// Also need to unplug network cable - just a cable sucks power
    PHY_PowerDown();

// If you don't need the PC host USB interface....
// Power down magic USB interface chip - saves around 150mW
// Needs new firmware (URL below) and USB cable not connected
// http://mbed.org/users/simon/notebook/interface-powerdown/
// Supply power to mbed using Vin pin
    result = semihost_powerdown();
// Power consumption is now around half

// Turn off clock enables on unused I/O Peripherals (UARTs, Timers, PWM, SPI, CAN, I2C, A/D...)
// To save just a tiny bit more power - most are already off by default in this short code example
// See PowerControl.h for I/O device bit assignments
// Don't turn off GPIO - it is needed to blink the LEDs
    Peripheral_PowerDown(0xFFFF7FFF);

// use Ticker interrupt and Sleep instead of a wait for time delay - saves up to 70mW
// Sleep halts and waits for an interrupt instead of executing instructions
// power is saved by not constantly fetching and decoding instructions
// Exact power level reduction depends on the amount of time spent in Sleep mode
    blinker.attach(&blink, 0.0625);
    while (1) {
        Sleep();
    }
}





The example code is running in this video. The USB cable is not attached. Initially power is off and all LEDs are off. The switch is then clicked on the power supply to apply 5VDC power to mbed's Vin pin. Note that the main mbed blue power LED blinks briefly and then quickly turns off at power on reset. This occurs when the example code powers down the mbed magic USB interface chip. The new magic USB interface chip firmware will only power down, if power is not being supplied via the USB cable. This feature insures that it is possible to download new code to the mbed via USB, even if the default program code is trying to turn off the USB interface chip. The blink LED demo is now running at a bit less than half of the default power level.

In the example code, the function, Peripheral_PowerDown(), writes a 32-bit value to the peripheral power control register. This allows the selective power down of 27 different I/O hardware units in the mbed processor. The bit assignments and hardware units controlled are shown in the table that follows. Peripheral_PowerUp() can be used to turn them back on. Note that many of the I/O hardware units are disabled at reset. Be careful here, do not turn off a unit that is actually being used in the code. Registers cannot be read or written on disabled hardware units. The mbed runtime powers up some units when they are used in code. Most of the hardware units are already disabled in this simple code example. If all units are on and then all units are turned off, the maximum power reduction is in the range of a couple hundred mWs.

Peripheral Power Control Register

BitNameDescriptionValue at Reset
0-Reserved.NA
1PCTIM0Timer/Counter 0 power/clock control bit.1
2PCTIM1Timer/Counter 1 power/clock control bit.1
3PCUART0UART0 power/clock control bit.1
4PCUART1UART1 power/clock control bit.1
5-Reserved.NA
6PCPWM1PWM1 power/clock control bit.1
7PCI2C0The I2C0 interface power/clock control bit.1
8PCSPIThe SPI interface power/clock control bit.1
9PCRTCThe RTC power/clock control bit.1
10PCSSP1The SSP 1 interface power/clock control bit.1
11-Reserved.NA
12PCADCA/D converter (ADC) power/clock control bit.0
13PCCAN1CAN Controller 1 power/clock control bit.0
14PCCAN2CAN Controller 2 power/clock control bit.0
15PCGPIOPower/clock control bit for IOCON, GPIO, and GPIO interrupts.1
16PCRITRepetitive Interrupt Timer power/clock control bit.0
17PCMCPWMMotor Control PWM0
18PCQEIQuadrature Encoder Interface power/clock control bit.0
19PCI2C1The I2C1 interface power/clock control bit.1
20-Reserved.NA
21PCSSP0The SSP0 interface power/clock control bit.1
22PCTIM2Timer 2 power/clock control bit.0
23PCTIM3Timer 3 power/clock control bit.0
24PCUART2UART 2 power/clock control bit.0
25PCUART3UART 3 power/clock control bit.0
26PCI2C2I2C interface 2 power/clock control bit.1
27PCI2SI2S interface power/clock control bit.0
28-Reserved.NA
29PCGPDMAGPDMA function power/clock control bit.0
30PCENETEthernet block power/clock control bit.0
31PCUSBUSB interface power/clock control bit.0



Saving Additional Power

It is also possible to vary the clock rate on mbed from 48MHz to 128MHz, but it gets a bit complex since some I/O device clock rates will also need to change (i.e., Baud rate divisors). Information on changing the clock rate can be found at http://mbed.org/users/no2chem/notebook/mbed-clock-control--benchmarks/. At a clock rate of 48Mhz perfomance is reduced by 50%, but the power level is only reduced to 86% of that with the default 96Mhz clock. This is somewhat typical on devices where the clock rate can vary since there is a static portion of the power consumption that is not directly related to clocking.

In addition to Sleep mode, there is also a DeepSleep mode, a PowerDown mode, and a DeepPowerDown mode. They each save some additional power, but they also take longer to power up again and require a somewhat more complex setup using WatchDog (Deep Sleep only), RTC, or external interrupts to wake up. The Power down modes also turn off the flash memory. Flash memory requires about 100 us to wake up. PLLs and clock dividers also need to be reconfigured on wakeup from these modes since power is actually turned off on these units. http://mbed.org/forum/bugs-suggestions/topic/434/ has more information on some debug mode related issues that will need to be resolved before using the lower power modes. Some additional information can be found in NXP Application Note AN10915. The NXP manuals state that you must exit debug mode (on mbed this requires an interface powerdown) and then reset or power cycle to wakeup from DeepSleep or lower power modes.

In a battery operated device, very low power levels are desirable. The new mbed NXP LPC11U24 Cortex M0 board was developed to support even lower power levels.