Updated for more display types. Fixed memoryaddress confusion in address() method. Added new getAddress() method. Added support for UDCs, Backlight control and other features such as control through I2C and SPI port expanders and controllers with native I2C and SPI interfaces. Refactored to fix issue with pins that are default declared as NC.

Dependents:   GPSDevice TestTextLCD SD to Flash Data Transfer DrumMachine ... more

Fork of TextLCD by Simon Ford

Example

Hello World! for the TextLCD

#include "mbed.h"
#include "TextLCD.h"
 
// Host PC Communication channels
Serial pc(USBTX, USBRX); // tx, rx
 
// I2C Communication
I2C i2c_lcd(p28,p27); // SDA, SCL
 
// SPI Communication
SPI spi_lcd(p5, NC, p7); // MOSI, MISO, SCLK

//TextLCD lcd(p15, p16, p17, p18, p19, p20);                // RS, E, D4-D7, LCDType=LCD16x2, BL=NC, E2=NC, LCDTCtrl=HD44780
//TextLCD_SPI lcd(&spi_lcd, p8, TextLCD::LCD40x4);   // SPI bus, 74595 expander, CS pin, LCD Type  
TextLCD_I2C lcd(&i2c_lcd, 0x42, TextLCD::LCD20x4);  // I2C bus, PCF8574 Slaveaddress, LCD Type
//TextLCD_I2C lcd(&i2c_lcd, 0x42, TextLCD::LCD16x2, TextLCD::WS0010); // I2C bus, PCF8574 Slaveaddress, LCD Type, Device Type
//TextLCD_SPI_N lcd(&spi_lcd, p8, p9);               // SPI bus, CS pin, RS pin, LCDType=LCD16x2, BL=NC, LCDTCtrl=ST7032_3V3   
//TextLCD_I2C_N lcd(&i2c_lcd, ST7032_SA, TextLCD::LCD16x2, NC, TextLCD::ST7032_3V3); // I2C bus, Slaveaddress, LCD Type, BL=NC, LCDTCtrl=ST7032_3V3  

int main() {
    pc.printf("LCD Test. Columns=%d, Rows=%d\n\r", lcd.columns(), lcd.rows());
    
    for (int row=0; row<lcd.rows(); row++) {
      int col=0;
      
      pc.printf("MemAddr(Col=%d, Row=%d)=0x%02X\n\r", col, row, lcd.getAddress(col, row));      
//      lcd.putc('-');
      lcd.putc('0' + row);      
      
      for (col=1; col<lcd.columns()-1; col++) {    
        lcd.putc('*');
      }
 
      pc.printf("MemAddr(Col=%d, Row=%d)=0x%02X\n\r", col, row, lcd.getAddress(col, row));      
      lcd.putc('+');
        
    }    
    
// Show cursor as blinking character
    lcd.setCursor(TextLCD::CurOff_BlkOn);
 
// Set and show user defined characters. A maximum of 8 UDCs are supported by the HD44780.
// They are defined by a 5x7 bitpattern. 
    lcd.setUDC(0, (char *) udc_0);  // Show |>
    lcd.putc(0);    
    lcd.setUDC(1, (char *) udc_1);  // Show <|
    lcd.putc(1);    

}

Handbook page

More info is here

Committer:
wim
Date:
Tue May 19 18:13:00 2015 +0000
Revision:
39:e9c2319de9c5
Parent:
38:cbe275b0b647
Child:
40:d3496c3ea301
Working version PCF2119

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 37:ce348c002929 1 /* mbed TextLCD Library, for LCDs based on HD44780 controllers
simon 6:e4cb7ddee0d3 2 * Copyright (c) 2007-2010, sford, http://mbed.org
wim 14:0c32b66b14b8 3 * 2013, v01: WH, Added LCD types, fixed LCD address issues, added Cursor and UDCs
wim 14:0c32b66b14b8 4 * 2013, v02: WH, Added I2C and SPI bus interfaces
wim 15:b70ebfffb258 5 * 2013, v03: WH, Added support for LCD40x4 which uses 2 controllers
wim 18:bd65dc10f27f 6 * 2013, v04: WH, Added support for Display On/Off, improved 4bit bootprocess
wim 18:bd65dc10f27f 7 * 2013, v05: WH, Added support for 8x2B, added some UDCs
wim 19:c747b9e2e7b8 8 * 2013, v06: WH, Added support for devices that use internal DC/DC converters
wim 20:e0da005a777f 9 * 2013, v07: WH, Added support for backlight and include portdefinitions for LCD2004 Module from DFROBOT
wim 22:35742ec80c24 10 * 2014, v08: WH, Refactored in Base and Derived Classes to deal with mbed lib change regarding 'NC' defined pins
wim 25:6162b31128c9 11 * 2014, v09: WH/EO, Added Class for Native SPI controllers such as ST7032
wim 26:bd897a001012 12 * 2014, v10: WH, Added Class for Native I2C controllers such as ST7032i, Added support for MCP23008 I2C portexpander, Added support for Adafruit module
wim 30:033048611c01 13 * 2014, v11: WH, Added support for native I2C controllers such as PCF21XX, Improved the _initCtrl() method to deal with differences between all supported controllers
wim 32:59c4b8f648d4 14 * 2014, v12: WH, Added support for native I2C controller PCF2119 and native I2C/SPI controllers SSD1803, ST7036, added setContrast method (by JH1PJL) for supported devices (eg ST7032i)
wim 34:e5a0dcb43ecc 15 * 2014, v13: WH, Added support for controllers US2066/SSD1311 (OLED), added setUDCBlink() method for supported devices (eg SSD1803), fixed issue in setPower()
wim 34:e5a0dcb43ecc 16 * 2014, v14: WH, Added support for PT6314 (VFD), added setOrient() method for supported devices (eg SSD1803, US2066), added Double Height lines for supported devices,
wim 34:e5a0dcb43ecc 17 * added 16 UDCs for supported devices (eg PCF2103), moved UDC defines to TextLCD_UDC file, added TextLCD_Config.h for feature and footprint settings.
wim 35:311be6444a39 18 * 2014, v15: WH, Added AC780 support, added I2C expander modules, fixed setBacklight() for inverted logic modules. Fixed bug in LCD_SPI_N define
wim 36:9f5f86dfd44a 19 * 2014, v16: WH, Added ST7070 and KS0073 support, added setIcon(), clrIcon() and setInvert() method for supported devices
wim 37:ce348c002929 20 * 2015, v17: WH, Clean up low-level _writeCommand() and _writeData(), Added support for alternative fonttables (eg PCF21XX), Added ST7066_ACM controller for ACM1602 module
wim 38:cbe275b0b647 21 * 2015, v18: WH, Performance improvement I2C portexpander
wim 38:cbe275b0b647 22 * 2015, v19: WH, Fixed Adafruit I2C/SPI portexpander pinmappings, fixed SYDZ Backlight
wim 39:e9c2319de9c5 23 * 2015, v20: WH, Fixed occasional Init fail caused by insufficient wait time after ReturnHome command (0x02), Added defines to reduce memory footprint (eg LCD_ICON),
wim 39:e9c2319de9c5 24 * Fixed and Added more fonttable support for PCF2119K, Added HD66712 controller.
simon 1:ac48b187213c 25 *
simon 1:ac48b187213c 26 * Permission is hereby granted, free of charge, to any person obtaining a copy
simon 1:ac48b187213c 27 * of this software and associated documentation files (the "Software"), to deal
simon 1:ac48b187213c 28 * in the Software without restriction, including without limitation the rights
simon 1:ac48b187213c 29 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
simon 1:ac48b187213c 30 * copies of the Software, and to permit persons to whom the Software is
simon 1:ac48b187213c 31 * furnished to do so, subject to the following conditions:
simon 1:ac48b187213c 32 *
simon 1:ac48b187213c 33 * The above copyright notice and this permission notice shall be included in
simon 1:ac48b187213c 34 * all copies or substantial portions of the Software.
simon 1:ac48b187213c 35 *
simon 1:ac48b187213c 36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
simon 1:ac48b187213c 37 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
simon 1:ac48b187213c 38 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
simon 1:ac48b187213c 39 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
simon 1:ac48b187213c 40 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
simon 1:ac48b187213c 41 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
simon 1:ac48b187213c 42 * THE SOFTWARE.
simon 1:ac48b187213c 43 */
wim 34:e5a0dcb43ecc 44 #include "mbed.h"
simon 1:ac48b187213c 45 #include "TextLCD.h"
wim 34:e5a0dcb43ecc 46 #include "TextLCD_UDC.inc"
wim 34:e5a0dcb43ecc 47
wim 21:9eb628d9e164 48 /** Create a TextLCD_Base interface
wim 15:b70ebfffb258 49 *
wim 21:9eb628d9e164 50 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 51 * @param ctrl LCD controller (default = HD44780)
wim 15:b70ebfffb258 52 */
wim 21:9eb628d9e164 53 TextLCD_Base::TextLCD_Base(LCDType type, LCDCtrl ctrl) : _type(type), _ctrl(ctrl) {
wim 30:033048611c01 54
wim 30:033048611c01 55 // Extract LCDType data
wim 30:033048611c01 56
wim 30:033048611c01 57 // Columns encoded in b7..b0
wim 30:033048611c01 58 _nr_cols = (_type & 0xFF);
wim 30:033048611c01 59
wim 30:033048611c01 60 // Rows encoded in b15..b8
wim 30:033048611c01 61 _nr_rows = ((_type >> 8) & 0xFF);
wim 30:033048611c01 62
wim 30:033048611c01 63 // Addressing mode encoded in b19..b16
wim 30:033048611c01 64 _addr_mode = _type & LCD_T_ADR_MSK;
wim 37:ce348c002929 65
wim 37:ce348c002929 66 // Font table, encoded in LCDCtrl
wim 39:e9c2319de9c5 67 _font = _ctrl & LCD_C_FNT_MSK;
wim 14:0c32b66b14b8 68 }
wim 14:0c32b66b14b8 69
wim 21:9eb628d9e164 70 /** Init the LCD Controller(s)
wim 21:9eb628d9e164 71 * Clear display
wim 36:9f5f86dfd44a 72 * @param _LCDDatalength dl sets the datalength of data/commands
wim 36:9f5f86dfd44a 73 * @return none
wim 21:9eb628d9e164 74 */
wim 36:9f5f86dfd44a 75 void TextLCD_Base::_init(_LCDDatalength dl) {
wim 38:cbe275b0b647 76
wim 38:cbe275b0b647 77 wait_ms(100); // Wait 100ms to ensure powered up
wim 15:b70ebfffb258 78
wim 15:b70ebfffb258 79 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 80 if(_type==LCD40x4) {
wim 30:033048611c01 81 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 36:9f5f86dfd44a 82 _initCtrl(dl); // Init 2nd controller
wim 15:b70ebfffb258 83 }
wim 15:b70ebfffb258 84
wim 15:b70ebfffb258 85 // Select and configure primary LCD controller
wim 27:22d5086f6ba6 86 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 36:9f5f86dfd44a 87 _initCtrl(dl); // Init primary controller
wim 28:30fa94f7341c 88
wim 32:59c4b8f648d4 89 // Clear whole display and Reset Cursor location
wim 32:59c4b8f648d4 90 // Note: This will make sure that some 3-line displays that skip topline of a 4-line configuration
wim 32:59c4b8f648d4 91 // are cleared and init cursor correctly.
wim 32:59c4b8f648d4 92 cls();
wim 15:b70ebfffb258 93 }
wim 15:b70ebfffb258 94
wim 21:9eb628d9e164 95 /** Init the LCD controller
wim 36:9f5f86dfd44a 96 * Set number of lines, fonttype, no cursor etc
wim 36:9f5f86dfd44a 97 * The controller is accessed in 4-bit parallel mode either directly via mbed pins or through I2C or SPI expander.
wim 36:9f5f86dfd44a 98 * Some controllers also support native I2C or SPI interfaces.
wim 36:9f5f86dfd44a 99 *
wim 36:9f5f86dfd44a 100 * @param _LCDDatalength dl sets the 4 or 8 bit datalength of data/commands. Required for some native serial modes.
wim 36:9f5f86dfd44a 101 * @return none
wim 30:033048611c01 102 *
wim 30:033048611c01 103 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 21:9eb628d9e164 104 */
wim 36:9f5f86dfd44a 105 void TextLCD_Base::_initCtrl(_LCDDatalength dl) {
wim 32:59c4b8f648d4 106 int _bias_lines=0; // Set Bias and lines (Instr Set 1), temporary variable.
wim 32:59c4b8f648d4 107 int _lines=0; // Set lines (Ext Instr Set), temporary variable.
wim 36:9f5f86dfd44a 108
wim 26:bd897a001012 109 this->_setRS(false); // command mode
simon 1:ac48b187213c 110
wim 37:ce348c002929 111 if (dl == _LCD_DL_4) {
wim 37:ce348c002929 112 // The Controller could be in 8 bit mode (power-on reset) or in 4 bit mode (warm reboot) at this point.
wim 37:ce348c002929 113 // Follow this procedure to make sure the Controller enters the correct state. The hardware interface
wim 37:ce348c002929 114 // between the uP and the LCD can only write the 4 most significant bits (Most Significant Nibble, MSN).
wim 37:ce348c002929 115 // In 4 bit mode the LCD expects the MSN first, followed by the LSN.
wim 37:ce348c002929 116 //
wim 38:cbe275b0b647 117 // Current state: 8 bit mode | 4 bit mode, MSN is next | 4 bit mode, LSN is next
wim 37:ce348c002929 118 //-------------------------------------------------------------------------------------------------
wim 38:cbe275b0b647 119 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN), | set dummy LSN,
wim 38:cbe275b0b647 120 // remains in 8 bit mode | remains in 4 bit mode | remains in 4 bit mode
wim 37:ce348c002929 121 wait_ms(15); //
wim 37:ce348c002929 122
wim 38:cbe275b0b647 123 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set dummy LSN, | set 8bit mode (MSN),
wim 38:cbe275b0b647 124 // remains in 8 bit mode | change to 8 bit mode | remains in 4 bit mode
wim 37:ce348c002929 125 wait_ms(15); //
wim 33:900a94bc7585 126
wim 38:cbe275b0b647 127 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN) and dummy LSN, | set dummy LSN,
wim 38:cbe275b0b647 128 // remains in 8 bit mode | remains in 8 bit mode | change to 8 bit mode
wim 37:ce348c002929 129 wait_ms(15); //
wim 37:ce348c002929 130
wim 37:ce348c002929 131 // Controller is now in 8 bit mode
wim 37:ce348c002929 132
wim 37:ce348c002929 133 _writeNibble(0x2); // Change to 4-bit mode (MSN), the LSN is undefined dummy
wim 37:ce348c002929 134 wait_us(40); // most instructions take 40us
wim 37:ce348c002929 135
wim 37:ce348c002929 136 // Controller is now in 4-bit mode
wim 37:ce348c002929 137 // Note: 4/8 bit mode is ignored for most native SPI and I2C devices. They dont use the parallel bus.
wim 37:ce348c002929 138 // However, _writeNibble() method is void anyway for native SPI and I2C devices.
wim 38:cbe275b0b647 139 }
wim 38:cbe275b0b647 140 else {
wim 38:cbe275b0b647 141 // Reset in 8 bit mode, final Function set will follow
wim 38:cbe275b0b647 142 _writeCommand(0x30); // Function set 0 0 1 DL=1 N F x x
wim 39:e9c2319de9c5 143 wait_ms(1); // most instructions take 40us
wim 37:ce348c002929 144 }
wim 25:6162b31128c9 145
wim 29:a3663151aa65 146 // Device specific initialisations: DC/DC converter to generate VLCD or VLED, number of lines etc
wim 19:c747b9e2e7b8 147 switch (_ctrl) {
wim 32:59c4b8f648d4 148
wim 36:9f5f86dfd44a 149 case KS0073:
wim 36:9f5f86dfd44a 150 // Initialise Display configuration
wim 36:9f5f86dfd44a 151 switch (_type) {
wim 36:9f5f86dfd44a 152 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 153 case LCD12x1:
wim 36:9f5f86dfd44a 154 case LCD16x1:
wim 36:9f5f86dfd44a 155 case LCD20x1:
wim 36:9f5f86dfd44a 156 case LCD24x1:
wim 36:9f5f86dfd44a 157 // case LCD32x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 158 // case LCD40x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 159 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 160 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 161 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 162 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 163 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 164 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 165
wim 36:9f5f86dfd44a 166 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 167 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 168 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 169 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 170 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 171 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 172
wim 36:9f5f86dfd44a 173 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 174 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 175 break;
wim 36:9f5f86dfd44a 176
wim 36:9f5f86dfd44a 177 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 178 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 179 case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 180 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 181 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 182 case LCD20x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 183 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 184 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 185 // N=0 (dont care for 4 line mode)
wim 36:9f5f86dfd44a 186 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 187 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 188 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 189
wim 36:9f5f86dfd44a 190 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 191 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 192 // N=0 (1-line mode), N=1 (2-line mode)
wim 36:9f5f86dfd44a 193 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 194 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 195 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 196
wim 36:9f5f86dfd44a 197 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 198 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 199 break;
wim 36:9f5f86dfd44a 200
wim 36:9f5f86dfd44a 201
wim 36:9f5f86dfd44a 202 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 203 // case LCD24x3D: // Special mode for KS0078
wim 36:9f5f86dfd44a 204 // case LCD24x3D1: // Special mode for KS0078
wim 36:9f5f86dfd44a 205 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 206 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 207 break;
wim 36:9f5f86dfd44a 208
wim 36:9f5f86dfd44a 209 default:
wim 36:9f5f86dfd44a 210 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 211 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 212 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 213 // N=1 (2-line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 214 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 215 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 216 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 217
wim 36:9f5f86dfd44a 218 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 219 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 220 // N=1 (2 line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 221 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 222 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 223 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 224
wim 36:9f5f86dfd44a 225 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 226 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 227 break;
wim 36:9f5f86dfd44a 228 } // switch type
wim 36:9f5f86dfd44a 229
wim 36:9f5f86dfd44a 230 // init special features
wim 36:9f5f86dfd44a 231 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 232 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 233 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 234 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 235 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 236 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 237
wim 36:9f5f86dfd44a 238 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 239 // FW=0 (5-dot font, special mode for KS0073)
wim 36:9f5f86dfd44a 240 // BW=0 (Cur BW invert disable, special mode for KS0073)
wim 36:9f5f86dfd44a 241 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0073)
wim 36:9f5f86dfd44a 242
wim 36:9f5f86dfd44a 243 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 36:9f5f86dfd44a 244 // Dotscroll/Display shift enable (Special mode for KS0073)
wim 36:9f5f86dfd44a 245
wim 36:9f5f86dfd44a 246 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 36:9f5f86dfd44a 247 // Scroll quantity (Special mode for KS0073)
wim 36:9f5f86dfd44a 248
wim 36:9f5f86dfd44a 249 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 250 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 251 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 252 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 253 // DH=1 (Disp shift enable/disable, special mode for KS0073)
wim 36:9f5f86dfd44a 254 // REV=0 (Reverse/Normal, special mode for KS0073)
wim 36:9f5f86dfd44a 255 break; // case KS0073 Controller
wim 36:9f5f86dfd44a 256
wim 36:9f5f86dfd44a 257
wim 29:a3663151aa65 258 case KS0078:
wim 29:a3663151aa65 259 // Initialise Display configuration
wim 29:a3663151aa65 260 switch (_type) {
wim 29:a3663151aa65 261 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 262 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 263 // case LCD12x1:
wim 29:a3663151aa65 264 case LCD16x1:
wim 30:033048611c01 265 // case LCD20x1:
wim 29:a3663151aa65 266 case LCD24x1:
wim 32:59c4b8f648d4 267 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 268 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 269 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 270 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 271 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 272 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 273
wim 33:900a94bc7585 274 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 275 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 276 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 277 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 278 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 279 // 0
wim 30:033048611c01 280
wim 32:59c4b8f648d4 281 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 282 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 283 break;
wim 29:a3663151aa65 284
wim 36:9f5f86dfd44a 285 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 286 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 287 // case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 288 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 289 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 290 // case LCD20x4D: // Special mode for KS0073, KS0078
wim 30:033048611c01 291 // case LCD24x3D: // Special mode for KS0078
wim 30:033048611c01 292 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 293 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 294 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 295 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 296 // N=0 (dont care for 4 line mode)
wim 32:59c4b8f648d4 297 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 298 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 299 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 300
wim 33:900a94bc7585 301 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 302 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 303 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 304 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 305 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 306 // 0
wim 29:a3663151aa65 307
wim 32:59c4b8f648d4 308 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 309 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 30:033048611c01 310 break;
wim 33:900a94bc7585 311
wim 33:900a94bc7585 312 case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 313 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 314 break;
wim 30:033048611c01 315
wim 29:a3663151aa65 316 default:
wim 30:033048611c01 317 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 318 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 319 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 320 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 321 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 322 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 323 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 324
wim 33:900a94bc7585 325 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 326 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 327 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 328 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 329 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 330 // 0
wim 30:033048611c01 331
wim 32:59c4b8f648d4 332 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 333 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 334 break;
wim 29:a3663151aa65 335 } // switch type
wim 29:a3663151aa65 336
wim 32:59c4b8f648d4 337 // init special features
wim 32:59c4b8f648d4 338 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 339 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 340 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 341 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 342 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 343 // 0
wim 32:59c4b8f648d4 344
wim 32:59c4b8f648d4 345 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 346 // FW=0 (5-dot font, special mode for KS0078)
wim 32:59c4b8f648d4 347 // BW=0 (Cur BW invert disable, special mode for KS0078)
wim 32:59c4b8f648d4 348 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0078)
wim 32:59c4b8f648d4 349
wim 32:59c4b8f648d4 350 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 32:59c4b8f648d4 351 // Dotscroll/Display shift enable (Special mode for KS0078)
wim 32:59c4b8f648d4 352
wim 32:59c4b8f648d4 353 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 32:59c4b8f648d4 354 // Scroll quantity (Special mode for KS0078)
wim 32:59c4b8f648d4 355
wim 32:59c4b8f648d4 356 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 357 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 358 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 359 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 360 // DH=1 (Disp shift enable/disable, special mode for KS0078)
wim 32:59c4b8f648d4 361 // REV=0 (Reverse/Normal, special mode for KS0078)
wim 29:a3663151aa65 362 break; // case KS0078 Controller
wim 29:a3663151aa65 363
wim 26:bd897a001012 364 case ST7032_3V3:
wim 26:bd897a001012 365 // ST7032 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 26:bd897a001012 366 case ST7032_5V:
wim 32:59c4b8f648d4 367 // ST7032 controller: Disable Voltage booster for VLCD. VDD=5V
wim 29:a3663151aa65 368
wim 29:a3663151aa65 369 // Initialise Display configuration
wim 29:a3663151aa65 370 switch (_type) {
wim 29:a3663151aa65 371 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 372 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 373 // case LCD12x1:
wim 29:a3663151aa65 374 case LCD16x1:
wim 30:033048611c01 375 // case LCD20x1:
wim 32:59c4b8f648d4 376 case LCD24x1:
wim 32:59c4b8f648d4 377 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 378 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 379 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 380 break;
wim 28:30fa94f7341c 381
wim 32:59c4b8f648d4 382 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 383 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 384 case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 385 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 386 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 387 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 388 break;
wim 29:a3663151aa65 389
wim 32:59c4b8f648d4 390 default:
wim 32:59c4b8f648d4 391 // All other LCD types are initialised as 2 Line displays
wim 32:59c4b8f648d4 392 _function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 393 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 394 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 395 break;
wim 32:59c4b8f648d4 396 } // switch type
wim 32:59c4b8f648d4 397
wim 32:59c4b8f648d4 398 // init special features
wim 33:900a94bc7585 399 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 33:900a94bc7585 400
wim 33:900a94bc7585 401 _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim 32:59c4b8f648d4 402
wim 32:59c4b8f648d4 403 _contrast = LCD_ST7032_CONTRAST;
wim 32:59c4b8f648d4 404 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim 32:59c4b8f648d4 405
wim 32:59c4b8f648d4 406
wim 32:59c4b8f648d4 407 if (_ctrl == ST7032_3V3) {
wim 36:9f5f86dfd44a 408 // _icon_power = 0x04; // Icon display off, Booster circuit is turned on (IS=1)
wim 36:9f5f86dfd44a 409 _icon_power = 0x0C; // Icon display on, Booster circuit is turned on (IS=1)
wim 32:59c4b8f648d4 410 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 411 }
wim 32:59c4b8f648d4 412 else {
wim 36:9f5f86dfd44a 413 // _icon_power = 0x00; // Icon display off, Booster circuit is turned off (IS=1)
wim 36:9f5f86dfd44a 414 _icon_power = 0x08; // Icon display on, Booster circuit is turned off (IS=1)
wim 32:59c4b8f648d4 415 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 416 }
wim 32:59c4b8f648d4 417 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
wim 32:59c4b8f648d4 418 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 419
wim 32:59c4b8f648d4 420 _writeCommand(0x68 | (LCD_ST7032_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim 32:59c4b8f648d4 421 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 422
wim 32:59c4b8f648d4 423 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 424
wim 32:59c4b8f648d4 425 break; // case ST7032_3V3 Controller
wim 32:59c4b8f648d4 426 // case ST7032_5V Controller
wim 32:59c4b8f648d4 427
wim 32:59c4b8f648d4 428 case ST7036_3V3:
wim 32:59c4b8f648d4 429 // ST7036 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 430 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 431 case ST7036_5V:
wim 32:59c4b8f648d4 432 // ST7036 controller: Disable Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 433 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 434
wim 32:59c4b8f648d4 435 // Initialise Display configuration
wim 32:59c4b8f648d4 436 switch (_type) {
wim 32:59c4b8f648d4 437 case LCD8x1: //8x1 is a regular 1 line display
wim 32:59c4b8f648d4 438 case LCD8x2B: //8x2D is a special case of 16x1
wim 32:59c4b8f648d4 439 // case LCD12x1:
wim 32:59c4b8f648d4 440 case LCD16x1:
wim 32:59c4b8f648d4 441 case LCD24x1:
wim 32:59c4b8f648d4 442 _function = 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), DH=0 (5x7font), IS2, IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 443 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 444 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 445
wim 32:59c4b8f648d4 446 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 447 break;
wim 32:59c4b8f648d4 448
wim 32:59c4b8f648d4 449 // case LCD12x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 450 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 451 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 452 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 453 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 454
wim 32:59c4b8f648d4 455 _bias_lines = 0x05; // Bias: 1/5, 3-Lines LCD
wim 32:59c4b8f648d4 456 break;
wim 32:59c4b8f648d4 457
wim 32:59c4b8f648d4 458 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 459 // case LCD16x3D1: // Special mode for SSD1803
wim 30:033048611c01 460 case LCD12x4D: // Special mode for PCF2116
wim 30:033048611c01 461 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 462 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 463 break;
wim 28:30fa94f7341c 464
wim 29:a3663151aa65 465 default:
wim 32:59c4b8f648d4 466 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 467 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 468 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 469 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 470
wim 32:59c4b8f648d4 471 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 472 break;
wim 32:59c4b8f648d4 473 } // switch type
wim 32:59c4b8f648d4 474
wim 29:a3663151aa65 475
wim 32:59c4b8f648d4 476 // init special features
wim 33:900a94bc7585 477 _writeCommand(0x20 | _function | 0x01); // Set function, IS2,IS1 = 01 (Select Instr Set = 1)
wim 32:59c4b8f648d4 478 _writeCommand(0x10 | _bias_lines); // Set Bias and 1,2 or 3 lines (Instr Set 1)
wim 29:a3663151aa65 479
wim 32:59c4b8f648d4 480 _contrast = LCD_ST7036_CONTRAST;
wim 32:59c4b8f648d4 481 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast, 0 1 1 1 C3 C2 C1 C0 (Instr Set 1)
wim 32:59c4b8f648d4 482
wim 32:59c4b8f648d4 483 if (_ctrl == ST7036_3V3) {
wim 36:9f5f86dfd44a 484 _icon_power = 0x0C; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=1 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 485 // _icon_power = 0x04; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=1 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 486 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 487 }
wim 32:59c4b8f648d4 488 else {
wim 36:9f5f86dfd44a 489 _icon_power = 0x08; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=0 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 490 // _icon_power = 0x00; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=0 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 491 }
wim 29:a3663151aa65 492
wim 32:59c4b8f648d4 493 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Contrast C5, C4 (Instr Set 1)
wim 32:59c4b8f648d4 494 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 495
wim 32:59c4b8f648d4 496 _writeCommand(0x68 | (LCD_ST7036_RAB & 0x07)); // Voltagefollower On = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 0 1 (Instr Set 1)
wim 32:59c4b8f648d4 497 wait_ms(10); // Wait 10ms to ensure powered up
wim 28:30fa94f7341c 498
wim 32:59c4b8f648d4 499 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instruction Set = 0)
wim 32:59c4b8f648d4 500
wim 32:59c4b8f648d4 501 break; // case ST7036_3V3 Controller
wim 32:59c4b8f648d4 502 // case ST7036_5V Controller
wim 36:9f5f86dfd44a 503
wim 36:9f5f86dfd44a 504 case ST7070:
wim 36:9f5f86dfd44a 505 // Initialise Display configuration
wim 36:9f5f86dfd44a 506 switch (_type) {
wim 36:9f5f86dfd44a 507 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 508 case LCD8x2B: //8x2D is a special case of 16x1
wim 36:9f5f86dfd44a 509 // case LCD12x1:
wim 36:9f5f86dfd44a 510 case LCD16x1:
wim 36:9f5f86dfd44a 511 case LCD24x1:
wim 36:9f5f86dfd44a 512 _function = dl | 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 513 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 514 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 515 break;
wim 36:9f5f86dfd44a 516
wim 36:9f5f86dfd44a 517 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 36:9f5f86dfd44a 518 // case LCD16x3D1: // Special mode for SSD1803
wim 36:9f5f86dfd44a 519 case LCD12x4D: // Special mode for PCF2116
wim 36:9f5f86dfd44a 520 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 521 // case LCD12x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 522 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 523 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 524 break;
wim 36:9f5f86dfd44a 525
wim 36:9f5f86dfd44a 526 default:
wim 36:9f5f86dfd44a 527 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 528 _function = dl | 0x08; // Set function, 0 0 1 DL, N=1 (2 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 529 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 530 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 531 break;
wim 36:9f5f86dfd44a 532 } // switch type
wim 36:9f5f86dfd44a 533
wim 36:9f5f86dfd44a 534 // _writeCommand(0x00); // NOP, make sure to sync SPI
wim 36:9f5f86dfd44a 535
wim 36:9f5f86dfd44a 536 // init special features
wim 36:9f5f86dfd44a 537 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 538
wim 36:9f5f86dfd44a 539 _writeCommand(0x04 | 0x00); // Set Bias resistors 0 0 0 0 0 1 Rb1,Rb0= 0 0 (Extern Res) (Instr Set 1)
wim 36:9f5f86dfd44a 540
wim 36:9f5f86dfd44a 541 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 542 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 543 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 544
wim 36:9f5f86dfd44a 545 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 546
wim 36:9f5f86dfd44a 547 break; // case ST7070 Controller
wim 36:9f5f86dfd44a 548
wim 32:59c4b8f648d4 549 case SSD1803_3V3:
wim 32:59c4b8f648d4 550 // SSD1803 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 551 // Note: supports 1,2, 3 or 4 lines
wim 32:59c4b8f648d4 552 // case SSD1803_5V:
wim 32:59c4b8f648d4 553 // SSD1803 controller: No Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 554
wim 29:a3663151aa65 555 // Initialise Display configuration
wim 29:a3663151aa65 556 switch (_type) {
wim 29:a3663151aa65 557 case LCD8x1: //8x1 is a regular 1 line display
wim 30:033048611c01 558 case LCD8x2B: //8x2D is a special case of 16x1
wim 29:a3663151aa65 559 // case LCD12x1:
wim 29:a3663151aa65 560 case LCD16x1:
wim 29:a3663151aa65 561 case LCD24x1:
wim 32:59c4b8f648d4 562 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 563 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 564 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 565 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 566 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 567 // DH=0 Double Height disable
wim 32:59c4b8f648d4 568 // IS=0
wim 32:59c4b8f648d4 569
wim 33:900a94bc7585 570 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 571 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 572 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 573 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 574 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 575 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 576 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 577
wim 32:59c4b8f648d4 578 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 579 // NW=0 1-Line LCD (N=0)
wim 29:a3663151aa65 580 break;
wim 32:59c4b8f648d4 581
wim 33:900a94bc7585 582 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 583 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 584 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 585 // case LCD16x3D1: // Special mode for SSD1803
wim 32:59c4b8f648d4 586 // case LCD20x3D: // Special mode for SSD1803
wim 32:59c4b8f648d4 587 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 588 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 589 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 590 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 591 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 592 // DH=0 Double Height disable
wim 32:59c4b8f648d4 593 // IS=0
wim 32:59c4b8f648d4 594
wim 33:900a94bc7585 595 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 596 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 597 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 598 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 599 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 600 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 601 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 602
wim 32:59c4b8f648d4 603 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 604 // NW=1 3-Line LCD (N=0)
wim 29:a3663151aa65 605 break;
wim 30:033048611c01 606
wim 39:e9c2319de9c5 607 // case LCD10x2D: // Special mode for SSD1803, 4-line mode but switch to double height font
wim 39:e9c2319de9c5 608 case LCD10x4D: // Special mode for SSD1803
wim 32:59c4b8f648d4 609 case LCD20x4D: // Special mode for SSD1803
wim 32:59c4b8f648d4 610 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 611 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 612 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 613 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 614 // N=1 4 Line
wim 32:59c4b8f648d4 615 // DH=0 Double Height disable
wim 32:59c4b8f648d4 616 // IS=0
wim 32:59c4b8f648d4 617
wim 33:900a94bc7585 618 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 619 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 620 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 621 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 622 // N=1 4 Line
wim 32:59c4b8f648d4 623 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 624 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 625
wim 32:59c4b8f648d4 626 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 627 // NW=1 4-Line LCD (N=1)
wim 32:59c4b8f648d4 628 break;
wim 32:59c4b8f648d4 629
wim 33:900a94bc7585 630 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 631 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 632 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 633 break;
wim 30:033048611c01 634
wim 29:a3663151aa65 635 default:
wim 30:033048611c01 636 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 637 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 638 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 639 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 640 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 641 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 642 // DH=0 Double Height disable
wim 36:9f5f86dfd44a 643 // RE=0
wim 32:59c4b8f648d4 644 // IS=0
wim 29:a3663151aa65 645
wim 33:900a94bc7585 646 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 647 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 648 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 649 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 650 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 651 // BE=0 Blink Enable off, special feature of SSD1803
wim 36:9f5f86dfd44a 652 // RE=1
wim 32:59c4b8f648d4 653 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 654
wim 32:59c4b8f648d4 655 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 656 // NW=0 2-Line LCD (N=1)
wim 32:59c4b8f648d4 657 break;
wim 32:59c4b8f648d4 658 } // switch type
wim 32:59c4b8f648d4 659
wim 32:59c4b8f648d4 660
wim 32:59c4b8f648d4 661 // init special features
wim 33:900a94bc7585 662 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 663 // Select Extended Instruction Set
wim 33:900a94bc7585 664
wim 33:900a94bc7585 665 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 666 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 667 wait_ms(5); // Wait to ensure completion or SSD1803 fails to set Top/Bottom after reset..
wim 33:900a94bc7585 668
wim 33:900a94bc7585 669 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 32:59c4b8f648d4 670
wim 32:59c4b8f648d4 671 _writeCommand(0x10); // Double Height and Bias, 0 0 0 1 UD2=0, UD1=0, BS1=0 Bias 1/5, DH=0 (Ext Instr Set)
wim 32:59c4b8f648d4 672
wim 32:59c4b8f648d4 673 // _writeCommand(0x76); // Set TC Control, 0 1 1 1 0 1 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 674 // _writeData(0x02); // Set TC data, 0 0 0 0 0 TC2,TC1,TC0 = 0 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 675
wim 32:59c4b8f648d4 676 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS=1 Select Instruction Set 1
wim 32:59c4b8f648d4 677 // Select Std Instr set, Select IS=1
wim 32:59c4b8f648d4 678
wim 32:59c4b8f648d4 679 _contrast = LCD_SSD1_CONTRAST;
wim 32:59c4b8f648d4 680 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast 0 1 1 1 C3, C2, C1, C0 (Instr Set 1)
wim 32:59c4b8f648d4 681
wim 36:9f5f86dfd44a 682 // _icon_power = 0x04; // Icon off, Booster on (Instr Set 1)
wim 36:9f5f86dfd44a 683 _icon_power = 0x0C; // Icon on, Booster on (Instr Set 1)
wim 32:59c4b8f648d4 684 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 685 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Power, Icon and Contrast, 0 1 0 1 Ion Bon C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 686 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 687
wim 32:59c4b8f648d4 688 _writeCommand(0x68 | (LCD_SSD1_RAB & 0x07)); // Set Voltagefollower 0 1 1 0 Don = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 1 0 (Instr Set 1)
wim 32:59c4b8f648d4 689 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 690
wim 33:900a94bc7585 691 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 692 // Select Extended Instruction Set 1
wim 32:59c4b8f648d4 693 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set 1)
wim 32:59c4b8f648d4 694
wim 32:59c4b8f648d4 695
wim 32:59c4b8f648d4 696 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 32:59c4b8f648d4 697 // Select Std Instr set, Select IS=0
wim 32:59c4b8f648d4 698
wim 32:59c4b8f648d4 699 break; // case SSD1803 Controller
wim 32:59c4b8f648d4 700
wim 29:a3663151aa65 701
wim 32:59c4b8f648d4 702 // Note1: The PCF21XX family of controllers has several types that dont have an onboard voltage generator for V-LCD.
wim 32:59c4b8f648d4 703 // You must supply this LCD voltage externally and not try to enable VGen.
wim 32:59c4b8f648d4 704 // Note2: The early versions of PCF2116 controllers (eg PCF2116C) can not generate sufficiently negative voltage for the LCD at a VDD of 3V3.
wim 32:59c4b8f648d4 705 // You must supply this voltage externally and not enable VGen or you must use a higher VDD (e.g. 5V) and enable VGen.
wim 32:59c4b8f648d4 706 // More recent versions of the controller (eg PCF2116K) have an improved VGen that will work with 3V3.
wim 32:59c4b8f648d4 707 // Note3: See datasheet, PCF2116 and other types provide a V0 pin to control the LCD contrast voltage that is provided by VGen. This pins allows
wim 32:59c4b8f648d4 708 // contrast control similar to that of pin 3 on the standard 14pin LCD module connector.
wim 32:59c4b8f648d4 709 // You can disable VGen by connecting Vo to VDD. VLCD will then be used directly as LCD voltage.
wim 32:59c4b8f648d4 710 // Note4: PCF2113 and PCF2119 are different wrt to VLCD generator! There is no V0 pin. The contrast voltage is software controlled by setting the VA and VB registers.
wim 32:59c4b8f648d4 711 // Vgen is automatically switched off when the contrast voltage VA or VB is set to 0x00. Note that certain limits apply to allowed values for VA and VB.
wim 32:59c4b8f648d4 712 // Note5: See datasheet, members of the PCF21XX family support different numbers of rows/columns. Not all can support 3 or 4 rows.
wim 32:59c4b8f648d4 713 // Note6: See datasheet, the PCF21XX-C and PCF21XX-K use a non-standard character set. This may result is strange looking text when not corrected..
wim 32:59c4b8f648d4 714
wim 34:e5a0dcb43ecc 715 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 716 // PCF2103 controller: No Voltage generator for VLCD, VDD=3V3..5V, VLCD input controls contrast voltage.
wim 34:e5a0dcb43ecc 717 // Initialise Display configuration
wim 34:e5a0dcb43ecc 718 switch (_type) {
wim 34:e5a0dcb43ecc 719 case LCD24x1:
wim 34:e5a0dcb43ecc 720 _function = 0x00; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=0 1-line/24 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 721 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 722 break;
wim 34:e5a0dcb43ecc 723
wim 34:e5a0dcb43ecc 724 // case LCD12x1D: //Special mode for PCF21XX, Only top line used
wim 34:e5a0dcb43ecc 725 case LCD12x2:
wim 34:e5a0dcb43ecc 726 _function = 0x04; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/12 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 727 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 728 break;
wim 34:e5a0dcb43ecc 729
wim 34:e5a0dcb43ecc 730 default:
wim 34:e5a0dcb43ecc 731 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 732 break;
wim 34:e5a0dcb43ecc 733
wim 34:e5a0dcb43ecc 734 } // switch type
wim 34:e5a0dcb43ecc 735
wim 34:e5a0dcb43ecc 736 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 737 wait_ms(10); // Wait 10ms to ensure powered up
wim 34:e5a0dcb43ecc 738
wim 34:e5a0dcb43ecc 739 // Note: Display from GA628 shows 12 chars. This is actually the right half of a 24x1 display. The commons have been connected in reverse order.
wim 34:e5a0dcb43ecc 740 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 741
wim 34:e5a0dcb43ecc 742 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 743 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no Icon blink), 0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 744
wim 34:e5a0dcb43ecc 745 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 746
wim 36:9f5f86dfd44a 747 #if(0)
wim 34:e5a0dcb43ecc 748 // Select CG RAM
wim 34:e5a0dcb43ecc 749 _writeCommand(0x40); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 750 // Store UDC/Icon pattern:
wim 34:e5a0dcb43ecc 751 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 34:e5a0dcb43ecc 752 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 34:e5a0dcb43ecc 753 for (int i=0; i<(8 * 8); i++) {
wim 34:e5a0dcb43ecc 754 // _writeData(0x1F); // All On
wim 34:e5a0dcb43ecc 755 _writeData(0x00); // All Off
wim 34:e5a0dcb43ecc 756 }
wim 36:9f5f86dfd44a 757 #endif
wim 34:e5a0dcb43ecc 758 break; // case PCF2103_3V3 Controller
wim 34:e5a0dcb43ecc 759
wim 30:033048611c01 760 case PCF2113_3V3:
wim 32:59c4b8f648d4 761 // PCF2113 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 29:a3663151aa65 762 // Initialise Display configuration
wim 29:a3663151aa65 763 switch (_type) {
wim 29:a3663151aa65 764 // case LCD12x1:
wim 33:900a94bc7585 765 // _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/12 chars display mode, SL=1, IS=0
wim 32:59c4b8f648d4 766 // Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 767 case LCD24x1:
wim 33:900a94bc7585 768 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/24 chars display mode, SL=0, IS=0
wim 32:59c4b8f648d4 769 // Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 770 break;
wim 30:033048611c01 771
wim 30:033048611c01 772 case LCD12x2:
wim 33:900a94bc7585 773 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=1 2-line/12 chars display mode, SL=0, IS=0
wim 30:033048611c01 774 break;
wim 30:033048611c01 775
wim 30:033048611c01 776 default:
wim 30:033048611c01 777 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 778 break;
wim 30:033048611c01 779
wim 30:033048611c01 780 } // switch type
wim 30:033048611c01 781
wim 32:59c4b8f648d4 782 // Init special features
wim 33:900a94bc7585 783 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 33:900a94bc7585 784
wim 33:900a94bc7585 785 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 33:900a94bc7585 786 _writeCommand(0x10); // Temp Compensation Set 0001 0, 0, TC1=0, TC2=0 (Instr. Set 1)
wim 33:900a94bc7585 787 // _writeCommand(0x42); // HV GEN 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 33:900a94bc7585 788 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV Gen 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 32:59c4b8f648d4 789
wim 32:59c4b8f648d4 790 _contrast = LCD_PCF2_CONTRAST;
wim 33:900a94bc7585 791 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=0, VA=contrast
wim 33:900a94bc7585 792 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=1, VB=contrast
wim 32:59c4b8f648d4 793 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 794
wim 33:900a94bc7585 795 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 33:900a94bc7585 796 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no icon blink) DM=0 (no direct mode) (Instr. Set 1)
wim 33:900a94bc7585 797
wim 33:900a94bc7585 798 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 32:59c4b8f648d4 799
wim 30:033048611c01 800 break; // case PCF2113_3V3 Controller
wim 30:033048611c01 801
wim 30:033048611c01 802
wim 32:59c4b8f648d4 803 // case PCF2113_5V:
wim 32:59c4b8f648d4 804 // PCF2113 controller: No Voltage generator for VLCD. VDD=5V. Contrast voltage controlled by VA or VB.
wim 32:59c4b8f648d4 805 //@TODO
wim 32:59c4b8f648d4 806
wim 30:033048611c01 807
wim 30:033048611c01 808 case PCF2116_3V3:
wim 32:59c4b8f648d4 809 // PCF2116 controller: Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 30:033048611c01 810 // Initialise Display configuration
wim 30:033048611c01 811 switch (_type) {
wim 30:033048611c01 812 // case LCD12x1:
wim 30:033048611c01 813 // case LCD12x2:
wim 30:033048611c01 814 case LCD24x1:
wim 34:e5a0dcb43ecc 815 _writeCommand(0x22); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=1 Vgen on, 0
wim 29:a3663151aa65 816 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 817 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 818 break;
wim 29:a3663151aa65 819
wim 32:59c4b8f648d4 820 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 821 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 822 case LCD12x4D: // Special mode for PCF21XX:
wim 34:e5a0dcb43ecc 823 _writeCommand(0x2E); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 824 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 825 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 826 break;
wim 30:033048611c01 827
wim 30:033048611c01 828 case LCD24x2:
wim 34:e5a0dcb43ecc 829 _writeCommand(0x2A); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=0 2-line/24 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 830 //Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 831 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 832 break;
wim 32:59c4b8f648d4 833
wim 30:033048611c01 834 default:
wim 30:033048611c01 835 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 836 break;
wim 30:033048611c01 837
wim 29:a3663151aa65 838 } // switch type
wim 29:a3663151aa65 839
wim 30:033048611c01 840 break; // case PCF2116_3V3 Controller
wim 29:a3663151aa65 841
wim 32:59c4b8f648d4 842
wim 32:59c4b8f648d4 843 //Experimental for cellphone 3-line display, SA=0x74, No Ack supported, Character set C or K, DL = 8 bit, N=0,M=1 (reserved mode !!), external VLCD -2V5
wim 32:59c4b8f648d4 844 //@TODO
wim 32:59c4b8f648d4 845 case PCF2116_5V:
wim 32:59c4b8f648d4 846 // PCF2116 controller: No Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 32:59c4b8f648d4 847 // Initialise Display configuration
wim 32:59c4b8f648d4 848 switch (_type) {
wim 32:59c4b8f648d4 849 // case LCD12x1:
wim 32:59c4b8f648d4 850 // case LCD12x2:
wim 32:59c4b8f648d4 851 // case LCD24x1:
wim 34:e5a0dcb43ecc 852 // _writeCommand(0x20); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=0 no Vgen, 0
wim 32:59c4b8f648d4 853 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 854 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 855 // break;
wim 32:59c4b8f648d4 856
wim 32:59c4b8f648d4 857 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 858 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 859 case LCD12x4D: // Special mode for PCF21XX:
wim 32:59c4b8f648d4 860 // _writeCommand(0x34); //FUNCTION SET 8 bit, N=0/M=1 4-line/12 chars display mode OK
wim 32:59c4b8f648d4 861 // _writeCommand(0x24); //FUNCTION SET 4 bit, N=0/M=1 4-line/12 chars display mode OK
wim 34:e5a0dcb43ecc 862 _writeCommand(0x2C); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=0 no Vgen, 0 OK
wim 32:59c4b8f648d4 863 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 864 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 865 break;
wim 32:59c4b8f648d4 866
wim 32:59c4b8f648d4 867 // case LCD24x2:
wim 32:59c4b8f648d4 868 // _writeCommand(0x28); //FUNCTION SET 4 bit, N=1/M=0 2-line/24 chars display mode
wim 32:59c4b8f648d4 869 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 870 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 871 // break;
wim 32:59c4b8f648d4 872
wim 32:59c4b8f648d4 873 default:
wim 32:59c4b8f648d4 874 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 875 break;
wim 32:59c4b8f648d4 876
wim 32:59c4b8f648d4 877 } // switch type
wim 32:59c4b8f648d4 878
wim 32:59c4b8f648d4 879 break; // case PCF2116_5V Controller
wim 32:59c4b8f648d4 880
wim 32:59c4b8f648d4 881 case PCF2119_3V3:
wim 39:e9c2319de9c5 882 case PCF2119R_3V3:
wim 32:59c4b8f648d4 883 // PCF2119 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 884 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 885 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 32:59c4b8f648d4 886
wim 32:59c4b8f648d4 887 //POR or Hardware Reset should be applied
wim 32:59c4b8f648d4 888 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 889
wim 32:59c4b8f648d4 890 // Initialise Display configuration
wim 32:59c4b8f648d4 891 switch (_type) {
wim 32:59c4b8f648d4 892 case LCD8x1:
wim 32:59c4b8f648d4 893 // case LCD12x1:
wim 32:59c4b8f648d4 894 case LCD16x1:
wim 34:e5a0dcb43ecc 895 _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/16 chars display mode, SL=1
wim 32:59c4b8f648d4 896 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 897 break;
wim 32:59c4b8f648d4 898
wim 32:59c4b8f648d4 899 case LCD24x1:
wim 32:59c4b8f648d4 900 // case LCD32x1:
wim 34:e5a0dcb43ecc 901 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/32 chars display mode, SL=0
wim 32:59c4b8f648d4 902 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 903 break;
wim 32:59c4b8f648d4 904
wim 32:59c4b8f648d4 905 case LCD8x2:
wim 32:59c4b8f648d4 906 // case LCD12x2:
wim 32:59c4b8f648d4 907 case LCD16x2:
wim 34:e5a0dcb43ecc 908 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/16 chars display mode, SL=0
wim 32:59c4b8f648d4 909 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 910 break;
wim 32:59c4b8f648d4 911
wim 32:59c4b8f648d4 912 default:
wim 32:59c4b8f648d4 913 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 914 break;
wim 32:59c4b8f648d4 915
wim 32:59c4b8f648d4 916 } // switch type
wim 32:59c4b8f648d4 917
wim 32:59c4b8f648d4 918 // Init special features
wim 32:59c4b8f648d4 919 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 920
wim 39:e9c2319de9c5 921 // _writeCommand(0x04); // DISP CONF SET (Instr. Set 1) 0000, 0, 1, P=0, Q=0 (IC at Bottom)
wim 39:e9c2319de9c5 922 // _writeCommand(0x05); // Display Conf Set 0000, 0, 1, P=0, Q=1
wim 39:e9c2319de9c5 923 // _writeCommand(0x06); // Display Conf Set 0000, 0, 1, P=1, Q=0
wim 39:e9c2319de9c5 924 _writeCommand(0x07); // Display Conf Set 0000, 0, 1, P=1, Q=1 (IC at Top)
wim 39:e9c2319de9c5 925
wim 32:59c4b8f648d4 926 _writeCommand(0x10); // TEMP CTRL SET (Instr. Set 1) 0001, 0, 0, TC1=0, TC2=0
wim 32:59c4b8f648d4 927 // _writeCommand(0x42); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 928 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 929
wim 32:59c4b8f648d4 930 _contrast = LCD_PCF2_CONTRAST;
wim 32:59c4b8f648d4 931 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 932 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 933 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 934
wim 32:59c4b8f648d4 935 _writeCommand(0x02); // SCRN CONF (Instr. Set 1) L=0
wim 32:59c4b8f648d4 936 _writeCommand(0x08); // ICON CONF (Instr. Set 1) IM=0 (Char mode) IB=0 (no icon blink) DM=0 (no direct mode)
wim 32:59c4b8f648d4 937
wim 32:59c4b8f648d4 938 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 939
wim 32:59c4b8f648d4 940 break; // case PCF2119_3V3 Controller
wim 32:59c4b8f648d4 941
wim 32:59c4b8f648d4 942 // case PCF2119_5V:
wim 32:59c4b8f648d4 943 // PCF2119 controller: No Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 944 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 945 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 30:033048611c01 946 //@TODO
wim 29:a3663151aa65 947
wim 19:c747b9e2e7b8 948 case WS0010:
wim 19:c747b9e2e7b8 949 // WS0010 OLED controller: Initialise DC/DC Voltage converter for LEDs
wim 30:033048611c01 950 // Note1: Identical to RS0010
wim 30:033048611c01 951 // Note2: supports 1 or 2 lines (and 16x100 graphics)
wim 30:033048611c01 952 // supports 4 fonts (English/Japanese (default), Western European-I, English/Russian, Western European-II)
wim 19:c747b9e2e7b8 953 // Cursor/Disp shift set 0001 SC RL 0 0
wim 19:c747b9e2e7b8 954 //
wim 30:033048611c01 955 // Mode and Power set 0001 GC PWR 1 1
wim 19:c747b9e2e7b8 956 // GC = 0 (Graph Mode=1, Char Mode=0)
wim 30:033048611c01 957 // PWR = 1 (DC/DC On/Off)
wim 30:033048611c01 958
wim 30:033048611c01 959 //@Todo: This may be needed to enable a warm reboot
wim 32:59c4b8f648d4 960 //_writeCommand(0x13); // Char mode, DC/DC off
wim 30:033048611c01 961 //wait_ms(10); // Wait 10ms to ensure powered down
wim 32:59c4b8f648d4 962 _writeCommand(0x17); // Char mode, DC/DC on
wim 30:033048611c01 963 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 964
wim 29:a3663151aa65 965 // Initialise Display configuration
wim 29:a3663151aa65 966 switch (_type) {
wim 29:a3663151aa65 967 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 968 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 969 // case LCD12x1:
wim 29:a3663151aa65 970 case LCD16x1:
wim 30:033048611c01 971 case LCD24x1:
wim 30:033048611c01 972 _writeCommand(0x20); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 973 // DL=0 (4 bits bus)
wim 30:033048611c01 974 // N=0 (1 line)
wim 30:033048611c01 975 // F=0 (5x7 dots font)
wim 30:033048611c01 976 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 977 break;
wim 30:033048611c01 978
wim 32:59c4b8f648d4 979 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 980 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 981 case LCD12x4D: // Special mode for PCF21XX:
wim 33:900a94bc7585 982 case LCD16x3G: // Special mode for ST7036
wim 30:033048611c01 983 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 984 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 985 break;
wim 29:a3663151aa65 986
wim 29:a3663151aa65 987 default:
wim 30:033048611c01 988 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 30:033048611c01 989 _writeCommand(0x28); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 990 // DL=0 (4 bits bus)
wim 30:033048611c01 991 // N=1 (2 lines)
wim 30:033048611c01 992 // F=0 (5x7 dots font)
wim 30:033048611c01 993 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 994
wim 29:a3663151aa65 995 break;
wim 29:a3663151aa65 996 } // switch type
wim 29:a3663151aa65 997
wim 32:59c4b8f648d4 998 break; // case WS0010 Controller
wim 33:900a94bc7585 999
wim 33:900a94bc7585 1000
wim 33:900a94bc7585 1001 case US2066_3V3:
wim 33:900a94bc7585 1002 // US2066/SSD1311 OLED controller, Initialise for VDD=3V3
wim 33:900a94bc7585 1003 // Note: supports 1,2, 3 or 4 lines
wim 33:900a94bc7585 1004 // case USS2066_5V:
wim 33:900a94bc7585 1005 // US2066 controller, VDD=5V
wim 33:900a94bc7585 1006
wim 33:900a94bc7585 1007 // Initialise Display configuration
wim 33:900a94bc7585 1008 switch (_type) {
wim 33:900a94bc7585 1009 case LCD8x1: //8x1 is a regular 1 line display
wim 33:900a94bc7585 1010 case LCD8x2B: //8x2D is a special case of 16x1
wim 33:900a94bc7585 1011 // case LCD12x1:
wim 33:900a94bc7585 1012 case LCD16x1:
wim 33:900a94bc7585 1013 // case LCD20x1:
wim 33:900a94bc7585 1014 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1015 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1016 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1017 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1018 // DH=0 Double Height disable
wim 33:900a94bc7585 1019 // IS=0
wim 33:900a94bc7585 1020
wim 33:900a94bc7585 1021 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1022 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1023 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1024 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1025 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1026 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1027
wim 33:900a94bc7585 1028 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1029 // NW=0 1-Line LCD (N=0)
wim 33:900a94bc7585 1030 break;
wim 33:900a94bc7585 1031
wim 33:900a94bc7585 1032 case LCD16x1C:
wim 33:900a94bc7585 1033 case LCD8x2:
wim 33:900a94bc7585 1034 case LCD16x2:
wim 33:900a94bc7585 1035 case LCD20x2:
wim 33:900a94bc7585 1036 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1037 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1038 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1039 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1040 // DH=0 Double Height disable
wim 33:900a94bc7585 1041 // IS=0
wim 33:900a94bc7585 1042
wim 33:900a94bc7585 1043 _function_1 = 0x0A; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1044 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1045 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1046 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1047 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1048 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1049
wim 33:900a94bc7585 1050 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1051 // NW=0 2-Line LCD (N=1)
wim 33:900a94bc7585 1052 break;
wim 33:900a94bc7585 1053
wim 33:900a94bc7585 1054 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1055 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1056 case LCD16x3D: // Special mode for KS0078, SSD1803 and US2066
wim 33:900a94bc7585 1057 // case LCD16x3D1: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1058 // case LCD20x3D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1059 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1060 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1061 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1062 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1063 // DH=0 Double Height disable
wim 33:900a94bc7585 1064 // IS=0
wim 33:900a94bc7585 1065
wim 33:900a94bc7585 1066 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1067 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1068 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1069 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1070 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1071 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1072
wim 33:900a94bc7585 1073 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1074 // NW=1 3-Line LCD (N=0)
wim 33:900a94bc7585 1075 break;
wim 33:900a94bc7585 1076
wim 33:900a94bc7585 1077 case LCD20x4D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1078 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1079 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1080 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1081 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1082 // DH=0 Double Height disable
wim 33:900a94bc7585 1083 // IS=0
wim 33:900a94bc7585 1084
wim 33:900a94bc7585 1085 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1086 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1087 // DL=0 bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1088 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1089 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1090 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1091
wim 33:900a94bc7585 1092 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1093 // NW=1 4-Line LCD (N=1)
wim 33:900a94bc7585 1094 break;
wim 33:900a94bc7585 1095
wim 33:900a94bc7585 1096 // case LCD24x1:
wim 33:900a94bc7585 1097 // case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 1098 // case LCD24x4D: // Special mode for KS0078
wim 33:900a94bc7585 1099 default:
wim 33:900a94bc7585 1100 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 1101 break;
wim 33:900a94bc7585 1102
wim 33:900a94bc7585 1103 } // switch type
wim 33:900a94bc7585 1104
wim 34:e5a0dcb43ecc 1105 _writeCommand(0x00); // NOP, make sure to sync SPI
wim 33:900a94bc7585 1106
wim 33:900a94bc7585 1107 // init special features
wim 33:900a94bc7585 1108 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1109 // Select Extended Instruction Set
wim 33:900a94bc7585 1110
wim 33:900a94bc7585 1111 _writeCommand(0x71); // Function Select A: 0 1 1 1 0 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1112 _writeData(0x00); // Disable Internal VDD
wim 33:900a94bc7585 1113
wim 33:900a94bc7585 1114 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1115
wim 33:900a94bc7585 1116 _writeCommand(0xD5); // Display Clock Divide Ratio: 1 1 0 1 0 1 0 1 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1117 _writeCommand(0x70); // Display Clock Divide Ratio value: 0 1 1 1 0 0 0 0 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1118
wim 33:900a94bc7585 1119 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1120
wim 33:900a94bc7585 1121 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 1122 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 1123
wim 33:900a94bc7585 1124 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 33:900a94bc7585 1125
wim 34:e5a0dcb43ecc 1126 // _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 33:900a94bc7585 1127 // // Default
wim 33:900a94bc7585 1128
wim 33:900a94bc7585 1129 _writeCommand(0x72); // Function Select B: 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 33:900a94bc7585 1130 _writeData(0x01); // Select ROM A (CGRAM 8, CGROM 248)
wim 33:900a94bc7585 1131
wim 33:900a94bc7585 1132 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1133
wim 33:900a94bc7585 1134 _writeCommand(0xDA); // Set Segm Pins Config: 1 1 0 1 1 0 1 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1135 _writeCommand(0x10); // Set Segm Pins Config value: Altern Odd/Even, Disable Remap (Ext Instr Set, OLED)
wim 33:900a94bc7585 1136
wim 33:900a94bc7585 1137 _writeCommand(0xDC); // Function Select C: 1 1 0 1 1 1 0 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1138 // _writeCommand(0x00); // Set internal VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1139 _writeCommand(0x80); // Set external VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1140
wim 33:900a94bc7585 1141 _contrast = LCD_US20_CONTRAST;
wim 33:900a94bc7585 1142 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1143 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits, use 6 bits for compatibility
wim 33:900a94bc7585 1144
wim 33:900a94bc7585 1145 _writeCommand(0xD9); // Set Phase Length: 1 1 0 1 1 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1146 _writeCommand(0xF1); // Set Phase Length Value:
wim 33:900a94bc7585 1147
wim 33:900a94bc7585 1148 _writeCommand(0xDB); // Set VCOMH Deselect Lvl: 1 1 0 1 1 0 1 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1149 _writeCommand(0x30); // Set VCOMH Deselect Value: 0.83 x VCC
wim 33:900a94bc7585 1150
wim 33:900a94bc7585 1151 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 1152
wim 33:900a94bc7585 1153 //Test Fade/Blinking. Hard Blink on/off, No fade in/out ??
wim 33:900a94bc7585 1154 // _writeCommand(0x23); // Set (Ext Instr Set, OLED)
wim 33:900a94bc7585 1155 // _writeCommand(0x3F); // Set interval 128 frames
wim 33:900a94bc7585 1156 //End Test Blinking
wim 33:900a94bc7585 1157
wim 33:900a94bc7585 1158 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1159
wim 33:900a94bc7585 1160 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 X N DH RE(0) IS=1 Select Instruction Set 1
wim 33:900a94bc7585 1161 // Select Std Instr set, Select IS=1
wim 33:900a94bc7585 1162
wim 33:900a94bc7585 1163 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1164 // Select Ext Instr Set, IS=1
wim 33:900a94bc7585 1165 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set, IS=1)
wim 33:900a94bc7585 1166
wim 33:900a94bc7585 1167 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 1168 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1169 break; // case US2066/SSD1311 Controller
wim 33:900a94bc7585 1170
wim 34:e5a0dcb43ecc 1171 //not yet tested on hardware
wim 34:e5a0dcb43ecc 1172 case PT6314 :
wim 34:e5a0dcb43ecc 1173 // Initialise Display configuration
wim 34:e5a0dcb43ecc 1174 switch (_type) {
wim 34:e5a0dcb43ecc 1175 case LCD8x1: //8x1 is a regular 1 line display
wim 34:e5a0dcb43ecc 1176 case LCD8x2B: //8x2B is a special case of 16x1
wim 34:e5a0dcb43ecc 1177 // case LCD12x1:
wim 34:e5a0dcb43ecc 1178 case LCD16x1:
wim 34:e5a0dcb43ecc 1179 case LCD20x1:
wim 34:e5a0dcb43ecc 1180 case LCD24x1:
wim 34:e5a0dcb43ecc 1181 _function = 0x00; // Function set 001 DL N X BR1 BR0
wim 34:e5a0dcb43ecc 1182 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1183 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1184 // N=0 (1 line)
wim 34:e5a0dcb43ecc 1185 // X
wim 34:e5a0dcb43ecc 1186 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1187 // BR0=0
wim 34:e5a0dcb43ecc 1188 // 0x0 = 100%
wim 34:e5a0dcb43ecc 1189 // 0x1 = 75%
wim 34:e5a0dcb43ecc 1190 // 0x2 = 50%
wim 34:e5a0dcb43ecc 1191 // 0x3 = 25%
wim 34:e5a0dcb43ecc 1192
wim 34:e5a0dcb43ecc 1193 break;
wim 34:e5a0dcb43ecc 1194
wim 34:e5a0dcb43ecc 1195 // All other valid LCD types are initialised as 2 Line displays
wim 34:e5a0dcb43ecc 1196 case LCD8x2:
wim 34:e5a0dcb43ecc 1197 case LCD16x2:
wim 34:e5a0dcb43ecc 1198 case LCD20x2:
wim 34:e5a0dcb43ecc 1199 case LCD24x2:
wim 34:e5a0dcb43ecc 1200 _function = 0x08; // Function set 001 DL N X BR1 BR2
wim 34:e5a0dcb43ecc 1201 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1202 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1203 // N=1 (2 lines)
wim 34:e5a0dcb43ecc 1204 // X
wim 34:e5a0dcb43ecc 1205 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1206 // BR0=0
wim 34:e5a0dcb43ecc 1207 break;
wim 34:e5a0dcb43ecc 1208
wim 34:e5a0dcb43ecc 1209 default:
wim 34:e5a0dcb43ecc 1210 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 1211 break;
wim 34:e5a0dcb43ecc 1212 } // switch type
wim 34:e5a0dcb43ecc 1213
wim 34:e5a0dcb43ecc 1214 _contrast = LCD_PT63_CONTRAST;
wim 34:e5a0dcb43ecc 1215 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 34:e5a0dcb43ecc 1216 break; // case PT6314 Controller (VFD)
wim 39:e9c2319de9c5 1217
wim 39:e9c2319de9c5 1218
wim 39:e9c2319de9c5 1219 case HD66712:
wim 39:e9c2319de9c5 1220 // Initialise Display configuration
wim 39:e9c2319de9c5 1221 switch (_type) {
wim 39:e9c2319de9c5 1222 case LCD8x1: //8x1 is a regular 1 line display
wim 39:e9c2319de9c5 1223 case LCD12x1:
wim 39:e9c2319de9c5 1224 case LCD16x1:
wim 39:e9c2319de9c5 1225 case LCD20x1:
wim 39:e9c2319de9c5 1226 case LCD24x1:
wim 39:e9c2319de9c5 1227 // case LCD32x1: // EXT pin is High, extension driver needed
wim 39:e9c2319de9c5 1228 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 39:e9c2319de9c5 1229 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1230 // N=0 (1-line mode, N=1 2-line mode)
wim 39:e9c2319de9c5 1231 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 39:e9c2319de9c5 1232 // DH=1 (Disp shift enable, special mode for KS0073)
wim 39:e9c2319de9c5 1233 // REV=0 (Reverse normal, special mode for KS0073)
wim 39:e9c2319de9c5 1234
wim 39:e9c2319de9c5 1235 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1236 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1237 // N=0 (1-line mode, N=1 2-line mode)
wim 39:e9c2319de9c5 1238 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 39:e9c2319de9c5 1239 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 39:e9c2319de9c5 1240 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1241
wim 39:e9c2319de9c5 1242 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 39:e9c2319de9c5 1243 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 39:e9c2319de9c5 1244 break;
wim 39:e9c2319de9c5 1245
wim 39:e9c2319de9c5 1246 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 39:e9c2319de9c5 1247 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 39:e9c2319de9c5 1248 case LCD12x4D: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 39:e9c2319de9c5 1249 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 39:e9c2319de9c5 1250 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 39:e9c2319de9c5 1251 case LCD20x4D: // Special mode for KS0073, KS0078 and HD66712
wim 39:e9c2319de9c5 1252 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 39:e9c2319de9c5 1253 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1254 // N=0 (dont care for 4 line mode)
wim 39:e9c2319de9c5 1255 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 39:e9c2319de9c5 1256 // DH=1 (Disp shift enable, special mode for KS0073)
wim 39:e9c2319de9c5 1257 // REV=0 (Reverse normal, special mode for KS0073)
wim 39:e9c2319de9c5 1258
wim 39:e9c2319de9c5 1259 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1260 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1261 // N=0 (1-line mode), N=1 (2-line mode)
wim 39:e9c2319de9c5 1262 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 39:e9c2319de9c5 1263 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 39:e9c2319de9c5 1264 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1265
wim 39:e9c2319de9c5 1266 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 39:e9c2319de9c5 1267 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 39:e9c2319de9c5 1268 break;
wim 39:e9c2319de9c5 1269
wim 39:e9c2319de9c5 1270
wim 39:e9c2319de9c5 1271 case LCD16x3G: // Special mode for ST7036
wim 39:e9c2319de9c5 1272 // case LCD24x3D: // Special mode for KS0078
wim 39:e9c2319de9c5 1273 // case LCD24x3D1: // Special mode for KS0078
wim 39:e9c2319de9c5 1274 case LCD24x4D: // Special mode for KS0078
wim 39:e9c2319de9c5 1275 error("Error: LCD Controller type does not support this Display type\n\r");
wim 39:e9c2319de9c5 1276 break;
wim 39:e9c2319de9c5 1277
wim 39:e9c2319de9c5 1278 default:
wim 39:e9c2319de9c5 1279 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 39:e9c2319de9c5 1280 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 39:e9c2319de9c5 1281 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1282 // N=1 (2-line mode), N=0 (1-line mode)
wim 39:e9c2319de9c5 1283 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 39:e9c2319de9c5 1284 // DH=1 (Disp shift enable, special mode for KS0073)
wim 39:e9c2319de9c5 1285 // REV=0 (Reverse normal, special mode for KS0073)
wim 39:e9c2319de9c5 1286
wim 39:e9c2319de9c5 1287 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1288 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1289 // N=1 (2 line mode), N=0 (1-line mode)
wim 39:e9c2319de9c5 1290 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 39:e9c2319de9c5 1291 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 39:e9c2319de9c5 1292 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1293
wim 39:e9c2319de9c5 1294 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 39:e9c2319de9c5 1295 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 39:e9c2319de9c5 1296 break;
wim 39:e9c2319de9c5 1297 } // switch type
wim 39:e9c2319de9c5 1298
wim 39:e9c2319de9c5 1299 // init special features
wim 39:e9c2319de9c5 1300 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1301 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 39:e9c2319de9c5 1302 // N=0 (1 line mode), N=1 (2 line mode)
wim 39:e9c2319de9c5 1303 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 39:e9c2319de9c5 1304 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0073)
wim 39:e9c2319de9c5 1305 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1306
wim 39:e9c2319de9c5 1307 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 39:e9c2319de9c5 1308 // FW=0 (5-dot font, special mode for KS0073)
wim 39:e9c2319de9c5 1309 // BW=0 (Cur BW invert disable, special mode for KS0073)
wim 39:e9c2319de9c5 1310 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0073)
wim 39:e9c2319de9c5 1311
wim 39:e9c2319de9c5 1312 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 39:e9c2319de9c5 1313 // Dotscroll/Display shift enable (Special mode for KS0073)
wim 39:e9c2319de9c5 1314
wim 39:e9c2319de9c5 1315 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 39:e9c2319de9c5 1316 // Scroll quantity (Special mode for KS0073)
wim 39:e9c2319de9c5 1317
wim 39:e9c2319de9c5 1318 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 39:e9c2319de9c5 1319 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 39:e9c2319de9c5 1320 // N=0 (1 line mode), N=1 (2 line mode)
wim 39:e9c2319de9c5 1321 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 39:e9c2319de9c5 1322 // DH=1 (Disp shift enable/disable, special mode for KS0073)
wim 39:e9c2319de9c5 1323 // REV=0 (Reverse/Normal, special mode for KS0073)
wim 39:e9c2319de9c5 1324 break; // case HD66712 Controller
wim 39:e9c2319de9c5 1325
wim 29:a3663151aa65 1326
wim 37:ce348c002929 1327 case ST7066_ACM: // ST7066 4/8 bit, I2C on ACM1602 using a PIC
wim 19:c747b9e2e7b8 1328 default:
wim 32:59c4b8f648d4 1329 // Devices fully compatible to HD44780 that do not use any DC/DC Voltage converters but external VLCD, no icons etc
wim 10:dd9b3a696acd 1330
wim 29:a3663151aa65 1331 // Initialise Display configuration
wim 29:a3663151aa65 1332 switch (_type) {
wim 29:a3663151aa65 1333 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 1334 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 1335 // case LCD12x1:
wim 29:a3663151aa65 1336 case LCD16x1:
wim 30:033048611c01 1337 // case LCD20x1:
wim 29:a3663151aa65 1338 case LCD24x1:
wim 30:033048611c01 1339 // case LCD40x1:
wim 32:59c4b8f648d4 1340 _function = 0x00; // Function set 001 DL N F - -
wim 29:a3663151aa65 1341 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1342 // N=0 (1 line)
wim 29:a3663151aa65 1343 // F=0 (5x7 dots font)
wim 29:a3663151aa65 1344 break;
wim 29:a3663151aa65 1345
wim 32:59c4b8f648d4 1346 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1347 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1348 case LCD12x4D: // Special mode for KS0078 and PCF21XX:
wim 33:900a94bc7585 1349 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1350 // case LCD16x3D1: // Special mode for KS0078
wim 30:033048611c01 1351 // case LCD24x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1352 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 1353 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 1354 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 1355 break;
wim 30:033048611c01 1356
wim 30:033048611c01 1357 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 29:a3663151aa65 1358 default:
wim 32:59c4b8f648d4 1359 _function = 0x08; // Function set 001 DL N F - -
wim 29:a3663151aa65 1360 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1361 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 29:a3663151aa65 1362 // N=1 (2 lines)
wim 29:a3663151aa65 1363 // F=0 (5x7 dots font, only option for 2 line display)
wim 32:59c4b8f648d4 1364 // - (Don't care)
wim 29:a3663151aa65 1365 break;
wim 29:a3663151aa65 1366 } // switch type
wim 10:dd9b3a696acd 1367
wim 34:e5a0dcb43ecc 1368 _writeCommand(0x20 | _function);
wim 29:a3663151aa65 1369 break; // case default Controller
wim 29:a3663151aa65 1370
wim 34:e5a0dcb43ecc 1371 } // switch Controller specific initialisations
wim 10:dd9b3a696acd 1372
wim 30:033048611c01 1373 // Controller general initialisations
wim 39:e9c2319de9c5 1374 // _writeCommand(0x01); // Clear Display and set cursor to 0
wim 32:59c4b8f648d4 1375 // wait_ms(10); // The CLS command takes 1.64 ms.
wim 32:59c4b8f648d4 1376 // // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1377
wim 39:e9c2319de9c5 1378 _writeCommand(0x02); // Cursor Home, DDRAM Address to Origin
wim 39:e9c2319de9c5 1379 wait_ms(10); // The Return Home command takes 1.64 ms.
wim 39:e9c2319de9c5 1380 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1381
wim 28:30fa94f7341c 1382 _writeCommand(0x06); // Entry Mode 0000 0 1 I/D S
wim 13:24506ba22480 1383 // Cursor Direction and Display Shift
wim 28:30fa94f7341c 1384 // I/D=1 (Cur incr)
wim 28:30fa94f7341c 1385 // S=0 (No display shift)
wim 10:dd9b3a696acd 1386
wim 29:a3663151aa65 1387 _writeCommand(0x14); // Cursor or Display shift 0001 S/C R/L x x
wim 29:a3663151aa65 1388 // S/C=0 Cursor moves
wim 29:a3663151aa65 1389 // R/L=1 Right
wim 29:a3663151aa65 1390 //
wim 29:a3663151aa65 1391
wim 13:24506ba22480 1392 // _writeCommand(0x0C); // Display Ctrl 0000 1 D C B
wim 17:652ab113bc2e 1393 // // Display On, Cursor Off, Blink Off
wim 36:9f5f86dfd44a 1394
wim 39:e9c2319de9c5 1395 // setCursor(CurOff_BlkOff);
wim 39:e9c2319de9c5 1396 setCursor(CurOn_BlkOff);
wim 21:9eb628d9e164 1397 setMode(DispOn);
simon 1:ac48b187213c 1398 }
simon 1:ac48b187213c 1399
wim 8:03116f75b66e 1400
wim 21:9eb628d9e164 1401 /** Clear the screen, Cursor home.
wim 39:e9c2319de9c5 1402 * Note: The whole display is initialised to charcode 0x20, which may not be a 'space' on some controllers with a
wim 39:e9c2319de9c5 1403 * different fontset such as the PCF2116C or PCF2119R. In this case you should fill the display with 'spaces'.
wim 21:9eb628d9e164 1404 */
wim 21:9eb628d9e164 1405 void TextLCD_Base::cls() {
wim 15:b70ebfffb258 1406
wim 15:b70ebfffb258 1407 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1408 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1409 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 15:b70ebfffb258 1410
wim 15:b70ebfffb258 1411 // Second LCD controller Cursor always Off
wim 21:9eb628d9e164 1412 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 15:b70ebfffb258 1413
wim 15:b70ebfffb258 1414 // Second LCD controller Clearscreen
wim 27:22d5086f6ba6 1415 _writeCommand(0x01); // cls, and set cursor to 0
wim 39:e9c2319de9c5 1416 wait_ms(20); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1417 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1418
wim 21:9eb628d9e164 1419 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 15:b70ebfffb258 1420 }
wim 15:b70ebfffb258 1421
wim 15:b70ebfffb258 1422 // Primary LCD controller Clearscreen
wim 27:22d5086f6ba6 1423 _writeCommand(0x01); // cls, and set cursor to 0
wim 39:e9c2319de9c5 1424 wait_ms(20); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1425 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1426
wim 15:b70ebfffb258 1427 // Restore cursormode on primary LCD controller when needed
wim 15:b70ebfffb258 1428 if(_type==LCD40x4) {
wim 17:652ab113bc2e 1429 _setCursorAndDisplayMode(_currentMode,_currentCursor);
wim 15:b70ebfffb258 1430 }
wim 15:b70ebfffb258 1431
wim 29:a3663151aa65 1432 setAddress(0, 0); // Reset Cursor location
wim 32:59c4b8f648d4 1433 // Note: This is needed because some displays (eg PCF21XX) don't use line 0 in the '3 Line' mode.
simon 1:ac48b187213c 1434 }
simon 1:ac48b187213c 1435
wim 29:a3663151aa65 1436 /** Locate cursor to a screen column and row
wim 29:a3663151aa65 1437 *
wim 29:a3663151aa65 1438 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1439 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1440 */
wim 21:9eb628d9e164 1441 void TextLCD_Base::locate(int column, int row) {
wim 15:b70ebfffb258 1442
wim 15:b70ebfffb258 1443 // setAddress() does all the heavy lifting:
wim 15:b70ebfffb258 1444 // check column and row sanity,
wim 15:b70ebfffb258 1445 // switch controllers for LCD40x4 if needed
wim 15:b70ebfffb258 1446 // switch cursor for LCD40x4 if needed
wim 15:b70ebfffb258 1447 // set the new memory address to show cursor at correct location
wim 32:59c4b8f648d4 1448 setAddress(column, row);
wim 15:b70ebfffb258 1449 }
wim 30:033048611c01 1450
wim 15:b70ebfffb258 1451
wim 21:9eb628d9e164 1452 /** Write a single character (Stream implementation)
wim 21:9eb628d9e164 1453 */
wim 21:9eb628d9e164 1454 int TextLCD_Base::_putc(int value) {
wim 15:b70ebfffb258 1455 int addr;
wim 15:b70ebfffb258 1456
wim 15:b70ebfffb258 1457 if (value == '\n') {
wim 15:b70ebfffb258 1458 //No character to write
wim 15:b70ebfffb258 1459
wim 15:b70ebfffb258 1460 //Update Cursor
wim 15:b70ebfffb258 1461 _column = 0;
wim 15:b70ebfffb258 1462 _row++;
wim 15:b70ebfffb258 1463 if (_row >= rows()) {
wim 15:b70ebfffb258 1464 _row = 0;
wim 15:b70ebfffb258 1465 }
wim 15:b70ebfffb258 1466 }
wim 15:b70ebfffb258 1467 else {
wim 37:ce348c002929 1468 //Character to write
wim 37:ce348c002929 1469 #if (LCD_DEFAULT_FONT == 1)
wim 37:ce348c002929 1470 _writeData(value);
wim 37:ce348c002929 1471 #else
wim 37:ce348c002929 1472 _writeData(ASCII_2_LCD(value));
wim 37:ce348c002929 1473 #endif
wim 15:b70ebfffb258 1474 //Update Cursor
wim 15:b70ebfffb258 1475 _column++;
wim 15:b70ebfffb258 1476 if (_column >= columns()) {
wim 15:b70ebfffb258 1477 _column = 0;
wim 15:b70ebfffb258 1478 _row++;
wim 15:b70ebfffb258 1479 if (_row >= rows()) {
wim 15:b70ebfffb258 1480 _row = 0;
wim 15:b70ebfffb258 1481 }
wim 15:b70ebfffb258 1482 }
wim 15:b70ebfffb258 1483 } //else
wim 15:b70ebfffb258 1484
wim 15:b70ebfffb258 1485 //Set next memoryaddress, make sure cursor blinks at next location
wim 15:b70ebfffb258 1486 addr = getAddress(_column, _row);
wim 15:b70ebfffb258 1487 _writeCommand(0x80 | addr);
wim 15:b70ebfffb258 1488
wim 15:b70ebfffb258 1489 return value;
wim 15:b70ebfffb258 1490 }
wim 15:b70ebfffb258 1491
wim 15:b70ebfffb258 1492
wim 16:c276b75e6585 1493 // get a single character (Stream implementation)
wim 21:9eb628d9e164 1494 int TextLCD_Base::_getc() {
simon 1:ac48b187213c 1495 return -1;
simon 1:ac48b187213c 1496 }
simon 1:ac48b187213c 1497
wim 37:ce348c002929 1498 /** Convert ASCII character code to the LCD fonttable code
wim 37:ce348c002929 1499 *
wim 37:ce348c002929 1500 * @param c The character to write to the display
wim 37:ce348c002929 1501 * @return The character code for the specific fonttable of the controller
wim 37:ce348c002929 1502 */
wim 37:ce348c002929 1503 int TextLCD_Base::ASCII_2_LCD (int c) {
wim 37:ce348c002929 1504
wim 37:ce348c002929 1505 //LCD_C_FT0 is default for HD44780 and compatible series
wim 37:ce348c002929 1506 if (_font == LCD_C_FT0) return c;
wim 37:ce348c002929 1507
wim 37:ce348c002929 1508 //LCD_C_FT1 for PCF21XXC series
wim 39:e9c2319de9c5 1509 //LCD_C_FT2 for PCF21XXR series
wim 39:e9c2319de9c5 1510 //Used code from Suga koubou library for PCF2119K and PCF2119R
wim 37:ce348c002929 1511 if (((c >= ' ') && (c <= '?')) || ((c >= 'A') && (c <= 'Z')) || ((c >= 'a') && (c <= 'z'))) {
wim 37:ce348c002929 1512 c |= 0x80;
wim 39:e9c2319de9c5 1513 } else if (c >= 0xF0 && c <= 0xFF) {
wim 37:ce348c002929 1514 c &= 0x0f;
wim 37:ce348c002929 1515 }
wim 37:ce348c002929 1516 return c;
wim 37:ce348c002929 1517
wim 37:ce348c002929 1518 //LCD_C_FT2 ...
wim 37:ce348c002929 1519 //@TODO add more, eg cyrillic
wim 37:ce348c002929 1520 //@TODO add method to switch between fonts for controllers that support this
wim 37:ce348c002929 1521 }
wim 37:ce348c002929 1522
wim 14:0c32b66b14b8 1523
wim 34:e5a0dcb43ecc 1524 #if(LCD_PRINTF != 1)
wim 34:e5a0dcb43ecc 1525 /** Write a character to the LCD
wim 34:e5a0dcb43ecc 1526 *
wim 34:e5a0dcb43ecc 1527 * @param c The character to write to the display
wim 34:e5a0dcb43ecc 1528 */
wim 34:e5a0dcb43ecc 1529 int TextLCD_Base::putc(int c){
wim 34:e5a0dcb43ecc 1530 return _putc(c);
wim 34:e5a0dcb43ecc 1531 }
wim 34:e5a0dcb43ecc 1532
wim 34:e5a0dcb43ecc 1533
wim 34:e5a0dcb43ecc 1534 /** Write a raw string to the LCD
wim 34:e5a0dcb43ecc 1535 *
wim 34:e5a0dcb43ecc 1536 * @param string text, may be followed by variables to emulate formatting the string.
wim 34:e5a0dcb43ecc 1537 * However, printf formatting is NOT supported and variables will be ignored!
wim 34:e5a0dcb43ecc 1538 */
wim 34:e5a0dcb43ecc 1539 int TextLCD_Base::printf(const char* text, ...) {
wim 34:e5a0dcb43ecc 1540
wim 34:e5a0dcb43ecc 1541 while (*text !=0) {
wim 34:e5a0dcb43ecc 1542 _putc(*text);
wim 34:e5a0dcb43ecc 1543 text++;
wim 34:e5a0dcb43ecc 1544 }
wim 34:e5a0dcb43ecc 1545 return 0;
wim 34:e5a0dcb43ecc 1546 }
wim 34:e5a0dcb43ecc 1547 #endif
wim 34:e5a0dcb43ecc 1548
wim 34:e5a0dcb43ecc 1549
wim 17:652ab113bc2e 1550 // Write a nibble using the 4-bit interface
wim 21:9eb628d9e164 1551 void TextLCD_Base::_writeNibble(int value) {
wim 17:652ab113bc2e 1552
wim 17:652ab113bc2e 1553 // Enable is Low
wim 21:9eb628d9e164 1554 this->_setEnable(true);
wim 38:cbe275b0b647 1555 this->_setData(value); // Low nibble of value on D4..D7
wim 17:652ab113bc2e 1556 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1557 this->_setEnable(false);
wim 17:652ab113bc2e 1558 wait_us(1); // Datahold time
wim 17:652ab113bc2e 1559 // Enable is Low
wim 17:652ab113bc2e 1560 }
wim 17:652ab113bc2e 1561
wim 16:c276b75e6585 1562 // Write a byte using the 4-bit interface
wim 21:9eb628d9e164 1563 void TextLCD_Base::_writeByte(int value) {
wim 15:b70ebfffb258 1564
wim 15:b70ebfffb258 1565 // Enable is Low
wim 21:9eb628d9e164 1566 this->_setEnable(true);
wim 21:9eb628d9e164 1567 this->_setData(value >> 4); // High nibble
wim 15:b70ebfffb258 1568 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1569 this->_setEnable(false);
wim 15:b70ebfffb258 1570 wait_us(1); // Data hold time
wim 15:b70ebfffb258 1571
wim 21:9eb628d9e164 1572 this->_setEnable(true);
wim 37:ce348c002929 1573 this->_setData(value); // Low nibble
wim 15:b70ebfffb258 1574 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1575 this->_setEnable(false);
wim 15:b70ebfffb258 1576 wait_us(1); // Datahold time
wim 15:b70ebfffb258 1577
wim 15:b70ebfffb258 1578 // Enable is Low
simon 1:ac48b187213c 1579 }
simon 1:ac48b187213c 1580
wim 21:9eb628d9e164 1581 // Write a command byte to the LCD controller
wim 21:9eb628d9e164 1582 void TextLCD_Base::_writeCommand(int command) {
wim 15:b70ebfffb258 1583
wim 21:9eb628d9e164 1584 this->_setRS(false);
wim 16:c276b75e6585 1585 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1586
wim 21:9eb628d9e164 1587 this->_writeByte(command);
wim 15:b70ebfffb258 1588 wait_us(40); // most instructions take 40us
simon 1:ac48b187213c 1589 }
simon 1:ac48b187213c 1590
wim 21:9eb628d9e164 1591 // Write a data byte to the LCD controller
wim 21:9eb628d9e164 1592 void TextLCD_Base::_writeData(int data) {
wim 15:b70ebfffb258 1593
wim 21:9eb628d9e164 1594 this->_setRS(true);
wim 16:c276b75e6585 1595 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1596
wim 21:9eb628d9e164 1597 this->_writeByte(data);
wim 15:b70ebfffb258 1598 wait_us(40); // data writes take 40us
simon 1:ac48b187213c 1599 }
simon 1:ac48b187213c 1600
wim 8:03116f75b66e 1601
wim 32:59c4b8f648d4 1602 // This replaces the original _address() method.
wim 8:03116f75b66e 1603 // It is confusing since it returns the memoryaddress or-ed with the set memorycommand 0x80.
wim 8:03116f75b66e 1604 // Left it in here for compatibility with older code. New applications should use getAddress() instead.
wim 21:9eb628d9e164 1605 int TextLCD_Base::_address(int column, int row) {
wim 8:03116f75b66e 1606 return 0x80 | getAddress(column, row);
wim 8:03116f75b66e 1607 }
wim 8:03116f75b66e 1608
wim 30:033048611c01 1609
wim 30:033048611c01 1610 // This is new method to return the memory address based on row, column and displaytype.
wim 30:033048611c01 1611 //
wim 30:033048611c01 1612 /** Return the memoryaddress of screen column and row location
wim 30:033048611c01 1613 *
wim 30:033048611c01 1614 * @param column The horizontal position from the left, indexed from 0
wim 30:033048611c01 1615 * @param row The vertical position from the top, indexed from 0
wim 36:9f5f86dfd44a 1616 * @return The memoryaddress of screen column and row location
wim 30:033048611c01 1617 *
wim 30:033048611c01 1618 */
wim 30:033048611c01 1619 int TextLCD_Base::getAddress(int column, int row) {
wim 30:033048611c01 1620
wim 30:033048611c01 1621 switch (_addr_mode) {
wim 30:033048611c01 1622
wim 30:033048611c01 1623 case LCD_T_A:
wim 30:033048611c01 1624 //Default addressing mode for 1, 2 and 4 rows (except 40x4)
wim 30:033048611c01 1625 //The two available rows are split and stacked on top of eachother. Addressing for 3rd and 4th line continues where lines 1 and 2 were split.
wim 30:033048611c01 1626 //Displays top rows when less than four are used.
wim 30:033048611c01 1627 switch (row) {
wim 30:033048611c01 1628 case 0:
wim 30:033048611c01 1629 return 0x00 + column;
wim 30:033048611c01 1630 case 1:
wim 30:033048611c01 1631 return 0x40 + column;
wim 30:033048611c01 1632 case 2:
wim 30:033048611c01 1633 return 0x00 + _nr_cols + column;
wim 30:033048611c01 1634 case 3:
wim 30:033048611c01 1635 return 0x40 + _nr_cols + column;
wim 30:033048611c01 1636 // Should never get here.
wim 39:e9c2319de9c5 1637 // default:
wim 39:e9c2319de9c5 1638 // return 0x00;
wim 30:033048611c01 1639 }
wim 30:033048611c01 1640
wim 30:033048611c01 1641 case LCD_T_B:
wim 30:033048611c01 1642 // LCD8x2B is a special layout of LCD16x1
wim 30:033048611c01 1643 if (row==0)
wim 30:033048611c01 1644 return 0x00 + column;
wim 30:033048611c01 1645 else
wim 30:033048611c01 1646 // return _nr_cols + column;
wim 30:033048611c01 1647 return 0x08 + column;
wim 30:033048611c01 1648
wim 30:033048611c01 1649 case LCD_T_C:
wim 30:033048611c01 1650 // LCD16x1C is a special layout of LCD8x2
wim 33:900a94bc7585 1651 // LCD32x1C is a special layout of LCD16x2
wim 33:900a94bc7585 1652 // LCD40x1C is a special layout of LCD20x2
wim 33:900a94bc7585 1653 #if(0)
wim 32:59c4b8f648d4 1654 if (column < 8)
wim 30:033048611c01 1655 return 0x00 + column;
wim 30:033048611c01 1656 else
wim 30:033048611c01 1657 return 0x40 + (column - 8);
wim 32:59c4b8f648d4 1658 #else
wim 32:59c4b8f648d4 1659 if (column < (_nr_cols >> 1))
wim 32:59c4b8f648d4 1660 return 0x00 + column;
wim 32:59c4b8f648d4 1661 else
wim 32:59c4b8f648d4 1662 return 0x40 + (column - (_nr_cols >> 1));
wim 32:59c4b8f648d4 1663 #endif
wim 30:033048611c01 1664
wim 30:033048611c01 1665 // Not sure about this one, seems wrong.
wim 30:033048611c01 1666 // Left in for compatibility with original library
wim 30:033048611c01 1667 // case LCD16x2B:
wim 30:033048611c01 1668 // return 0x00 + (row * 40) + column;
wim 30:033048611c01 1669
wim 30:033048611c01 1670 case LCD_T_D:
wim 36:9f5f86dfd44a 1671 //Alternate addressing mode for 3 and 4 row displays (except 40x4). Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1672 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1673 //Displays top rows when less than four are used.
wim 30:033048611c01 1674 switch (row) {
wim 30:033048611c01 1675 case 0:
wim 30:033048611c01 1676 return 0x00 + column;
wim 30:033048611c01 1677 case 1:
wim 30:033048611c01 1678 return 0x20 + column;
wim 30:033048611c01 1679 case 2:
wim 30:033048611c01 1680 return 0x40 + column;
wim 30:033048611c01 1681 case 3:
wim 30:033048611c01 1682 return 0x60 + column;
wim 30:033048611c01 1683 // Should never get here.
wim 39:e9c2319de9c5 1684 // default:
wim 39:e9c2319de9c5 1685 // return 0x00;
wim 30:033048611c01 1686 }
wim 30:033048611c01 1687
wim 30:033048611c01 1688 case LCD_T_D1:
wim 36:9f5f86dfd44a 1689 //Alternate addressing mode for 3 row displays. Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1690 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1691 //Skips top row of 4 row display and starts display at row 1
wim 30:033048611c01 1692 switch (row) {
wim 30:033048611c01 1693 case 0:
wim 30:033048611c01 1694 return 0x20 + column;
wim 30:033048611c01 1695 case 1:
wim 30:033048611c01 1696 return 0x40 + column;
wim 30:033048611c01 1697 case 2:
wim 30:033048611c01 1698 return 0x60 + column;
wim 30:033048611c01 1699 // Should never get here.
wim 39:e9c2319de9c5 1700 // default:
wim 39:e9c2319de9c5 1701 // return 0x00;
wim 30:033048611c01 1702 }
wim 30:033048611c01 1703
wim 30:033048611c01 1704 case LCD_T_E:
wim 30:033048611c01 1705 // LCD40x4 is a special case since it has 2 controllers.
wim 30:033048611c01 1706 // Each controller is configured as 40x2 (Type A)
wim 30:033048611c01 1707 if (row<2) {
wim 30:033048611c01 1708 // Test to see if we need to switch between controllers
wim 30:033048611c01 1709 if (_ctrl_idx != _LCDCtrl_0) {
wim 30:033048611c01 1710
wim 30:033048611c01 1711 // Second LCD controller Cursor Off
wim 30:033048611c01 1712 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1713
wim 30:033048611c01 1714 // Select primary controller
wim 30:033048611c01 1715 _ctrl_idx = _LCDCtrl_0;
wim 30:033048611c01 1716
wim 30:033048611c01 1717 // Restore cursormode on primary LCD controller
wim 30:033048611c01 1718 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1719 }
wim 30:033048611c01 1720
wim 30:033048611c01 1721 return 0x00 + (row * 0x40) + column;
wim 30:033048611c01 1722 }
wim 30:033048611c01 1723 else {
wim 30:033048611c01 1724
wim 30:033048611c01 1725 // Test to see if we need to switch between controllers
wim 30:033048611c01 1726 if (_ctrl_idx != _LCDCtrl_1) {
wim 30:033048611c01 1727 // Primary LCD controller Cursor Off
wim 30:033048611c01 1728 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1729
wim 30:033048611c01 1730 // Select secondary controller
wim 30:033048611c01 1731 _ctrl_idx = _LCDCtrl_1;
wim 30:033048611c01 1732
wim 30:033048611c01 1733 // Restore cursormode on secondary LCD controller
wim 30:033048611c01 1734 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1735 }
wim 30:033048611c01 1736
wim 30:033048611c01 1737 return 0x00 + ((row-2) * 0x40) + column;
wim 30:033048611c01 1738 }
wim 30:033048611c01 1739
wim 32:59c4b8f648d4 1740 case LCD_T_F:
wim 32:59c4b8f648d4 1741 //Alternate addressing mode for 3 row displays.
wim 32:59c4b8f648d4 1742 //The first half of 3rd row continues from 1st row, the second half continues from 2nd row.
wim 32:59c4b8f648d4 1743 switch (row) {
wim 32:59c4b8f648d4 1744 case 0:
wim 32:59c4b8f648d4 1745 return 0x00 + column;
wim 32:59c4b8f648d4 1746 case 1:
wim 32:59c4b8f648d4 1747 return 0x40 + column;
wim 32:59c4b8f648d4 1748 case 2:
wim 32:59c4b8f648d4 1749 if (column < (_nr_cols >> 1)) // check first or second half of line
wim 32:59c4b8f648d4 1750 return (0x00 + _nr_cols + column);
wim 32:59c4b8f648d4 1751 else
wim 32:59c4b8f648d4 1752 return (0x40 + _nr_cols + (column - (_nr_cols >> 1)));
wim 32:59c4b8f648d4 1753 // Should never get here.
wim 39:e9c2319de9c5 1754 // default:
wim 39:e9c2319de9c5 1755 // return 0x00;
wim 32:59c4b8f648d4 1756 }
wim 32:59c4b8f648d4 1757
wim 32:59c4b8f648d4 1758 case LCD_T_G:
wim 32:59c4b8f648d4 1759 //Alternate addressing mode for 3 row displays. Used by ST7036
wim 32:59c4b8f648d4 1760 switch (row) {
wim 32:59c4b8f648d4 1761 case 0:
wim 32:59c4b8f648d4 1762 return 0x00 + column;
wim 32:59c4b8f648d4 1763 case 1:
wim 32:59c4b8f648d4 1764 return 0x10 + column;
wim 32:59c4b8f648d4 1765 case 2:
wim 32:59c4b8f648d4 1766 return 0x20 + column;
wim 32:59c4b8f648d4 1767 // Should never get here.
wim 39:e9c2319de9c5 1768 // default:
wim 39:e9c2319de9c5 1769 // return 0x00;
wim 32:59c4b8f648d4 1770 }
wim 32:59c4b8f648d4 1771
wim 30:033048611c01 1772 // Should never get here.
wim 30:033048611c01 1773 default:
wim 30:033048611c01 1774 return 0x00;
wim 32:59c4b8f648d4 1775
wim 32:59c4b8f648d4 1776 } // switch _addr_mode
wim 30:033048611c01 1777 }
wim 30:033048611c01 1778
wim 30:033048611c01 1779
wim 29:a3663151aa65 1780 /** Set the memoryaddress of screen column and row location
wim 29:a3663151aa65 1781 *
wim 29:a3663151aa65 1782 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1783 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1784 */
wim 21:9eb628d9e164 1785 void TextLCD_Base::setAddress(int column, int row) {
wim 15:b70ebfffb258 1786
wim 15:b70ebfffb258 1787 // Sanity Check column
wim 15:b70ebfffb258 1788 if (column < 0) {
wim 15:b70ebfffb258 1789 _column = 0;
wim 15:b70ebfffb258 1790 }
wim 36:9f5f86dfd44a 1791 else if (column >= _nr_cols) {
wim 36:9f5f86dfd44a 1792 _column = _nr_cols - 1;
wim 15:b70ebfffb258 1793 } else _column = column;
wim 8:03116f75b66e 1794
wim 15:b70ebfffb258 1795 // Sanity Check row
wim 15:b70ebfffb258 1796 if (row < 0) {
wim 15:b70ebfffb258 1797 _row = 0;
wim 15:b70ebfffb258 1798 }
wim 36:9f5f86dfd44a 1799 else if (row >= _nr_rows) {
wim 36:9f5f86dfd44a 1800 _row = _nr_rows - 1;
wim 15:b70ebfffb258 1801 } else _row = row;
wim 15:b70ebfffb258 1802
wim 15:b70ebfffb258 1803
wim 15:b70ebfffb258 1804 // Compute the memory address
wim 15:b70ebfffb258 1805 // For LCD40x4: switch controllers if needed
wim 15:b70ebfffb258 1806 // switch cursor if needed
wim 15:b70ebfffb258 1807 int addr = getAddress(_column, _row);
wim 8:03116f75b66e 1808
wim 13:24506ba22480 1809 _writeCommand(0x80 | addr);
wim 8:03116f75b66e 1810 }
simon 1:ac48b187213c 1811
wim 29:a3663151aa65 1812
wim 29:a3663151aa65 1813 /** Return the number of columns
wim 29:a3663151aa65 1814 *
wim 36:9f5f86dfd44a 1815 * @return The number of columns
wim 30:033048611c01 1816 *
wim 30:033048611c01 1817 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1818 */
wim 21:9eb628d9e164 1819 int TextLCD_Base::columns() {
wim 30:033048611c01 1820
wim 30:033048611c01 1821 // Columns encoded in b7..b0
wim 30:033048611c01 1822 //return (_type & 0xFF);
wim 31:ef31cd8a00d1 1823 return _nr_cols;
simon 1:ac48b187213c 1824 }
simon 1:ac48b187213c 1825
wim 29:a3663151aa65 1826 /** Return the number of rows
wim 29:a3663151aa65 1827 *
wim 36:9f5f86dfd44a 1828 * @return The number of rows
wim 30:033048611c01 1829 *
wim 30:033048611c01 1830 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1831 */
wim 21:9eb628d9e164 1832 int TextLCD_Base::rows() {
wim 30:033048611c01 1833
wim 30:033048611c01 1834 // Rows encoded in b15..b8
wim 30:033048611c01 1835 //return ((_type >> 8) & 0xFF);
wim 30:033048611c01 1836 return _nr_rows;
simon 1:ac48b187213c 1837 }
wim 10:dd9b3a696acd 1838
wim 29:a3663151aa65 1839 /** Set the Cursormode
wim 29:a3663151aa65 1840 *
wim 29:a3663151aa65 1841 * @param cursorMode The Cursor mode (CurOff_BlkOff, CurOn_BlkOff, CurOff_BlkOn, CurOn_BlkOn)
wim 29:a3663151aa65 1842 */
wim 21:9eb628d9e164 1843 void TextLCD_Base::setCursor(LCDCursor cursorMode) {
wim 15:b70ebfffb258 1844
wim 17:652ab113bc2e 1845 // Save new cursor mode, needed when 2 controllers are in use or when display is switched off/on
wim 17:652ab113bc2e 1846 _currentCursor = cursorMode;
wim 10:dd9b3a696acd 1847
wim 17:652ab113bc2e 1848 // Configure only current LCD controller
wim 31:ef31cd8a00d1 1849 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 15:b70ebfffb258 1850 }
wim 15:b70ebfffb258 1851
wim 29:a3663151aa65 1852 /** Set the Displaymode
wim 29:a3663151aa65 1853 *
wim 29:a3663151aa65 1854 * @param displayMode The Display mode (DispOff, DispOn)
wim 29:a3663151aa65 1855 */
wim 21:9eb628d9e164 1856 void TextLCD_Base::setMode(LCDMode displayMode) {
wim 17:652ab113bc2e 1857
wim 17:652ab113bc2e 1858 // Save new displayMode, needed when 2 controllers are in use or when cursor is changed
wim 17:652ab113bc2e 1859 _currentMode = displayMode;
wim 15:b70ebfffb258 1860
wim 17:652ab113bc2e 1861 // Select and configure second LCD controller when needed
wim 17:652ab113bc2e 1862 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1863 if (_ctrl_idx==_LCDCtrl_0) {
wim 17:652ab113bc2e 1864 // Configure primary LCD controller
wim 17:652ab113bc2e 1865 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 11:9ec02df863a1 1866
wim 17:652ab113bc2e 1867 // Select 2nd controller
wim 21:9eb628d9e164 1868 _ctrl_idx=_LCDCtrl_1;
wim 17:652ab113bc2e 1869
wim 17:652ab113bc2e 1870 // Configure secondary LCD controller
wim 21:9eb628d9e164 1871 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 11:9ec02df863a1 1872
wim 17:652ab113bc2e 1873 // Restore current controller
wim 21:9eb628d9e164 1874 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1875 }
wim 17:652ab113bc2e 1876 else {
wim 17:652ab113bc2e 1877 // Select primary controller
wim 21:9eb628d9e164 1878 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1879
wim 17:652ab113bc2e 1880 // Configure primary LCD controller
wim 21:9eb628d9e164 1881 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 17:652ab113bc2e 1882
wim 17:652ab113bc2e 1883 // Restore current controller
wim 21:9eb628d9e164 1884 _ctrl_idx=_LCDCtrl_1;
wim 11:9ec02df863a1 1885
wim 17:652ab113bc2e 1886 // Configure secondary LCD controller
wim 17:652ab113bc2e 1887 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 10:dd9b3a696acd 1888 }
wim 17:652ab113bc2e 1889 }
wim 17:652ab113bc2e 1890 else {
wim 17:652ab113bc2e 1891 // Configure primary LCD controller
wim 17:652ab113bc2e 1892 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1893 }
wim 17:652ab113bc2e 1894 }
wim 17:652ab113bc2e 1895
wim 29:a3663151aa65 1896 /** Low level method to restore the cursortype and display mode for current controller
wim 29:a3663151aa65 1897 */
wim 36:9f5f86dfd44a 1898 void TextLCD_Base::_setCursorAndDisplayMode(LCDMode displayMode, LCDCursor cursorType) {
wim 36:9f5f86dfd44a 1899
wim 36:9f5f86dfd44a 1900 // Configure current LCD controller
wim 36:9f5f86dfd44a 1901 switch (_ctrl) {
wim 36:9f5f86dfd44a 1902 case ST7070:
wim 36:9f5f86dfd44a 1903 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 36:9f5f86dfd44a 1904 _writeCommand(0x08 | displayMode | (cursorType & 0x02));
wim 36:9f5f86dfd44a 1905 break;
wim 36:9f5f86dfd44a 1906 default:
wim 36:9f5f86dfd44a 1907 _writeCommand(0x08 | displayMode | cursorType);
wim 36:9f5f86dfd44a 1908 break;
wim 36:9f5f86dfd44a 1909 } //switch
wim 10:dd9b3a696acd 1910 }
wim 10:dd9b3a696acd 1911
wim 29:a3663151aa65 1912 /** Set the Backlight mode
wim 29:a3663151aa65 1913 *
wim 29:a3663151aa65 1914 * @param backlightMode The Backlight mode (LightOff, LightOn)
wim 29:a3663151aa65 1915 */
wim 21:9eb628d9e164 1916 void TextLCD_Base::setBacklight(LCDBacklight backlightMode) {
wim 20:e0da005a777f 1917
wim 35:311be6444a39 1918 #if (BACKLIGHT_INV==0)
wim 35:311be6444a39 1919 // Positive Backlight control pin logic
wim 20:e0da005a777f 1920 if (backlightMode == LightOn) {
wim 35:311be6444a39 1921 this->_setBL(true);
wim 20:e0da005a777f 1922 }
wim 20:e0da005a777f 1923 else {
wim 21:9eb628d9e164 1924 this->_setBL(false);
wim 20:e0da005a777f 1925 }
wim 35:311be6444a39 1926 #else
wim 35:311be6444a39 1927 // Inverted Backlight control pin logic
wim 35:311be6444a39 1928 if (backlightMode == LightOn) {
wim 35:311be6444a39 1929 this->_setBL(false);
wim 35:311be6444a39 1930 }
wim 35:311be6444a39 1931 else {
wim 35:311be6444a39 1932 this->_setBL(true);
wim 35:311be6444a39 1933 }
wim 35:311be6444a39 1934 #endif
wim 20:e0da005a777f 1935 }
wim 20:e0da005a777f 1936
wim 29:a3663151aa65 1937 /** Set User Defined Characters
wim 29:a3663151aa65 1938 *
wim 34:e5a0dcb43ecc 1939 * @param unsigned char c The Index of the UDC (0..7) for HD44780 or clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1940 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 29:a3663151aa65 1941 */
wim 21:9eb628d9e164 1942 void TextLCD_Base::setUDC(unsigned char c, char *udc_data) {
wim 15:b70ebfffb258 1943
wim 15:b70ebfffb258 1944 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1945 if(_type==LCD40x4) {
wim 19:c747b9e2e7b8 1946 _LCDCtrl_Idx current_ctrl_idx = _ctrl_idx; // Temp save current controller
wim 15:b70ebfffb258 1947
wim 15:b70ebfffb258 1948 // Select primary controller
wim 21:9eb628d9e164 1949 _ctrl_idx=_LCDCtrl_0;
wim 15:b70ebfffb258 1950
wim 15:b70ebfffb258 1951 // Configure primary LCD controller
wim 15:b70ebfffb258 1952 _setUDC(c, udc_data);
wim 15:b70ebfffb258 1953
wim 15:b70ebfffb258 1954 // Select 2nd controller
wim 21:9eb628d9e164 1955 _ctrl_idx=_LCDCtrl_1;
wim 15:b70ebfffb258 1956
wim 15:b70ebfffb258 1957 // Configure secondary LCD controller
wim 15:b70ebfffb258 1958 _setUDC(c, udc_data);
wim 11:9ec02df863a1 1959
wim 15:b70ebfffb258 1960 // Restore current controller
wim 19:c747b9e2e7b8 1961 _ctrl_idx=current_ctrl_idx;
wim 15:b70ebfffb258 1962 }
wim 15:b70ebfffb258 1963 else {
wim 15:b70ebfffb258 1964 // Configure primary LCD controller
wim 15:b70ebfffb258 1965 _setUDC(c, udc_data);
wim 34:e5a0dcb43ecc 1966 }
wim 15:b70ebfffb258 1967 }
wim 15:b70ebfffb258 1968
wim 34:e5a0dcb43ecc 1969 /** Low level method to store user defined characters for current controller
wim 34:e5a0dcb43ecc 1970 *
wim 34:e5a0dcb43ecc 1971 * @param unsigned char c The Index of the UDC (0..7) for HD44780 clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1972 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 34:e5a0dcb43ecc 1973 */
wim 34:e5a0dcb43ecc 1974 void TextLCD_Base::_setUDC(unsigned char c, char *udc_data) {
wim 34:e5a0dcb43ecc 1975
wim 34:e5a0dcb43ecc 1976 switch (_ctrl) {
wim 34:e5a0dcb43ecc 1977 case PCF2103_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1978 case PCF2113_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1979 case PCF2116_3V3 :
wim 34:e5a0dcb43ecc 1980 case PCF2116_5V :
wim 34:e5a0dcb43ecc 1981 case PCF2119_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1982 c = c & 0x0F; // mask down to valid range
wim 34:e5a0dcb43ecc 1983 break;
wim 34:e5a0dcb43ecc 1984
wim 34:e5a0dcb43ecc 1985 default:
wim 34:e5a0dcb43ecc 1986 c = c & 0x07; // mask down to valid range
wim 34:e5a0dcb43ecc 1987 break;
wim 34:e5a0dcb43ecc 1988 } //switch _ctrl
wim 34:e5a0dcb43ecc 1989
wim 34:e5a0dcb43ecc 1990 // Select DD RAM for current LCD controller
wim 34:e5a0dcb43ecc 1991 // This is needed to correctly set Bit 6 of the addresspointer for controllers that support 16 UDCs
wim 34:e5a0dcb43ecc 1992 _writeCommand(0x80 | ((c << 3) & 0x40)) ;
wim 34:e5a0dcb43ecc 1993
wim 34:e5a0dcb43ecc 1994 // Select CG RAM for current LCD controller
wim 34:e5a0dcb43ecc 1995 _writeCommand(0x40 | ((c << 3) & 0x3F)); //Set CG-RAM address, (note that Bit 6 is retained and can not be set by this command !)
wim 34:e5a0dcb43ecc 1996 //8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 1997 // Store UDC pattern
wim 34:e5a0dcb43ecc 1998 for (int i=0; i<8; i++) {
wim 34:e5a0dcb43ecc 1999 _writeData(*udc_data++);
wim 34:e5a0dcb43ecc 2000 }
wim 34:e5a0dcb43ecc 2001
wim 34:e5a0dcb43ecc 2002 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 34:e5a0dcb43ecc 2003 int addr = getAddress(_column, _row);
wim 34:e5a0dcb43ecc 2004 _writeCommand(0x80 | addr);
wim 34:e5a0dcb43ecc 2005 }
wim 32:59c4b8f648d4 2006
wim 39:e9c2319de9c5 2007 #if(LCD_BLINK == 1)
wim 36:9f5f86dfd44a 2008 /** Set UDC Blink and Icon blink
wim 33:900a94bc7585 2009 * setUDCBlink method is supported by some compatible devices (eg SSD1803)
wim 33:900a94bc7585 2010 *
wim 33:900a94bc7585 2011 * @param blinkMode The Blink mode (BlinkOff, BlinkOn)
wim 33:900a94bc7585 2012 */
wim 33:900a94bc7585 2013 void TextLCD_Base::setUDCBlink(LCDBlink blinkMode){
wim 36:9f5f86dfd44a 2014 // Blinking UDCs (and icons) are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2015 // The blinking pixels in the UDC and icons can be controlled by setting additional bits in the UDC or icon bitpattern.
wim 36:9f5f86dfd44a 2016 // UDCs are defined by an 8 byte bitpattern. The P0..P4 form the character pattern.
wim 33:900a94bc7585 2017 // P7 P6 P5 P4 P3 P2 P1 P0
wim 33:900a94bc7585 2018 // 0 B1 B0 x 0 1 1 1 0
wim 33:900a94bc7585 2019 // 1 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 2020 // .............
wim 33:900a94bc7585 2021 // 7 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 2022 //
wim 33:900a94bc7585 2023 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 33:900a94bc7585 2024 // B1 B0 Mode
wim 33:900a94bc7585 2025 // 0 0 No Blinking in this row of the UDC
wim 33:900a94bc7585 2026 // 0 1 Enabled pixels in P4 will blink
wim 33:900a94bc7585 2027 // 1 x Enabled pixels in P0..P4 will blink
wim 36:9f5f86dfd44a 2028 //
wim 36:9f5f86dfd44a 2029 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2030 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2031 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2032 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2033 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2034 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 33:900a94bc7585 2035 switch (blinkMode) {
wim 33:900a94bc7585 2036 case BlinkOn:
wim 36:9f5f86dfd44a 2037 // Controllers that support UDC/Icon Blink
wim 33:900a94bc7585 2038 switch (_ctrl) {
wim 36:9f5f86dfd44a 2039 case KS0073 :
wim 33:900a94bc7585 2040 case KS0078 :
wim 36:9f5f86dfd44a 2041 _function_1 |= 0x02; // Enable UDC/Icon Blink
wim 36:9f5f86dfd44a 2042 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 2043
wim 33:900a94bc7585 2044 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 2045 break; // case KS0073, KS0078 Controller
wim 33:900a94bc7585 2046
wim 33:900a94bc7585 2047 case US2066_3V3 :
wim 33:900a94bc7585 2048 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2049 _function_1 |= 0x04; // Enable UDC/Icon Blink
wim 33:900a94bc7585 2050 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2051 // Select Ext Instr Set
wim 33:900a94bc7585 2052
wim 33:900a94bc7585 2053 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2054 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2055 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 2056
wim 36:9f5f86dfd44a 2057 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 2058 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 2059 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2060 case PCF2119R_3V3 :
wim 36:9f5f86dfd44a 2061 // Enable Icon Blink
wim 36:9f5f86dfd44a 2062 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 2063 _writeCommand(0x08 | 0x02); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 2064 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 2065
wim 36:9f5f86dfd44a 2066 break;
wim 33:900a94bc7585 2067
wim 33:900a94bc7585 2068 default:
wim 33:900a94bc7585 2069 //Unsupported feature for other controllers
wim 33:900a94bc7585 2070 break;
wim 33:900a94bc7585 2071 } //switch _ctrl
wim 33:900a94bc7585 2072
wim 36:9f5f86dfd44a 2073 break; // BlinkOn
wim 33:900a94bc7585 2074
wim 33:900a94bc7585 2075 case BlinkOff:
wim 33:900a94bc7585 2076 // Controllers that support UDC Blink
wim 33:900a94bc7585 2077 switch (_ctrl) {
wim 36:9f5f86dfd44a 2078 case KS0073 :
wim 33:900a94bc7585 2079 case KS0078 :
wim 36:9f5f86dfd44a 2080 _function_1 &= ~0x02; // Disable UDC/Icon Blink
wim 36:9f5f86dfd44a 2081 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 2082
wim 33:900a94bc7585 2083 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 2084 break; // case KS0073, KS0078 Controller
wim 33:900a94bc7585 2085
wim 33:900a94bc7585 2086 case US2066_3V3 :
wim 33:900a94bc7585 2087 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2088 _function_1 &= ~0x04; // Disable UDC/Icon Blink
wim 33:900a94bc7585 2089 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2090 // Select Ext Instr Set
wim 33:900a94bc7585 2091
wim 33:900a94bc7585 2092 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2093 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2094 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 2095
wim 36:9f5f86dfd44a 2096 case PCF2103_3V3 :
wim 39:e9c2319de9c5 2097 case PCF2113_3V3 :
wim 39:e9c2319de9c5 2098 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2099 case PCF2119R_3V3 :
wim 36:9f5f86dfd44a 2100 // Disable Icon Blink
wim 36:9f5f86dfd44a 2101 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 2102 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 2103 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 2104
wim 36:9f5f86dfd44a 2105 break;
wim 33:900a94bc7585 2106
wim 33:900a94bc7585 2107 default:
wim 33:900a94bc7585 2108 //Unsupported feature for other controllers
wim 33:900a94bc7585 2109 break;
wim 33:900a94bc7585 2110 } //switch _ctrl
wim 33:900a94bc7585 2111
wim 36:9f5f86dfd44a 2112 break; //BlinkOff
wim 33:900a94bc7585 2113
wim 33:900a94bc7585 2114 default:
wim 33:900a94bc7585 2115 break;
wim 33:900a94bc7585 2116 } // blinkMode
wim 33:900a94bc7585 2117
wim 33:900a94bc7585 2118 } // setUDCBlink()
wim 39:e9c2319de9c5 2119 #endif
wim 33:900a94bc7585 2120
wim 32:59c4b8f648d4 2121 /** Set Contrast
wim 32:59c4b8f648d4 2122 * setContrast method is supported by some compatible devices (eg ST7032i) that have onboard LCD voltage generation
wim 32:59c4b8f648d4 2123 * Initial code for ST70XX imported from fork by JH1PJL
wim 32:59c4b8f648d4 2124 *
wim 32:59c4b8f648d4 2125 * @param unsigned char c contrast data (6 significant bits, valid range 0..63, Value 0 will disable the Vgen)
wim 32:59c4b8f648d4 2126 * @return none
wim 32:59c4b8f648d4 2127 */
wim 32:59c4b8f648d4 2128 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2129 void TextLCD_Base::setContrast(unsigned char c) {
wim 32:59c4b8f648d4 2130
wim 32:59c4b8f648d4 2131 // Function set mode stored during Init. Make sure we dont accidentally switch between 1-line and 2-line mode!
wim 32:59c4b8f648d4 2132 // Icon/Booster mode stored during Init. Make sure we dont accidentally change this!
wim 32:59c4b8f648d4 2133
wim 32:59c4b8f648d4 2134 _contrast = c & 0x3F; // Sanity check
wim 32:59c4b8f648d4 2135
wim 33:900a94bc7585 2136 switch (_ctrl) {
wim 32:59c4b8f648d4 2137 case PCF2113_3V3 :
wim 39:e9c2319de9c5 2138 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2139 case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2140 if (_contrast < 5) _contrast = 0; // See datasheet. Sanity check for PCF2113/PCF2119
wim 32:59c4b8f648d4 2141 if (_contrast > 55) _contrast = 55;
wim 32:59c4b8f648d4 2142
wim 32:59c4b8f648d4 2143 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 2144 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 2145 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 2146 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2147 break;
wim 32:59c4b8f648d4 2148
wim 32:59c4b8f648d4 2149 case ST7032_3V3 :
wim 32:59c4b8f648d4 2150 case ST7032_5V :
wim 32:59c4b8f648d4 2151 case ST7036_3V3 :
wim 32:59c4b8f648d4 2152 // case ST7036_5V :
wim 32:59c4b8f648d4 2153 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2154 _writeCommand(0x20 | _function | 0x01); // Select Instruction Set = 1
wim 32:59c4b8f648d4 2155 _writeCommand(0x70 | (_contrast & 0x0F)); // Contrast Low bits
wim 32:59c4b8f648d4 2156 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Contrast High bits
wim 32:59c4b8f648d4 2157 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2158 break;
wim 32:59c4b8f648d4 2159
wim 33:900a94bc7585 2160 case US2066_3V3 :
wim 33:900a94bc7585 2161 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2162 // Select Extended Instruction Set
wim 33:900a94bc7585 2163
wim 33:900a94bc7585 2164 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 2165
wim 33:900a94bc7585 2166 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 2167 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits. Use 6 bits for compatibility
wim 33:900a94bc7585 2168
wim 33:900a94bc7585 2169 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 2170
wim 33:900a94bc7585 2171 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2172 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2173 break;
wim 33:900a94bc7585 2174
wim 34:e5a0dcb43ecc 2175 //not yet tested on hardware
wim 32:59c4b8f648d4 2176 case PT6314 :
wim 32:59c4b8f648d4 2177 // Only 2 significant bits
wim 32:59c4b8f648d4 2178 // 0x00 = 100%
wim 32:59c4b8f648d4 2179 // 0x01 = 75%
wim 32:59c4b8f648d4 2180 // 0x02 = 50%
wim 32:59c4b8f648d4 2181 // 0x03 = 25%
wim 32:59c4b8f648d4 2182 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 32:59c4b8f648d4 2183 break;
wim 32:59c4b8f648d4 2184
wim 32:59c4b8f648d4 2185 default:
wim 32:59c4b8f648d4 2186 //Unsupported feature for other controllers
wim 33:900a94bc7585 2187 break;
wim 33:900a94bc7585 2188 } // end switch
wim 33:900a94bc7585 2189 } // end setContrast()
wim 32:59c4b8f648d4 2190
wim 39:e9c2319de9c5 2191 #if(LCD_POWER == 1)
wim 32:59c4b8f648d4 2192 /** Set Power
wim 32:59c4b8f648d4 2193 * setPower method is supported by some compatible devices (eg SSD1803) that have power down modes
wim 32:59c4b8f648d4 2194 *
wim 32:59c4b8f648d4 2195 * @param bool powerOn Power on/off
wim 32:59c4b8f648d4 2196 * @return none
wim 32:59c4b8f648d4 2197 */
wim 32:59c4b8f648d4 2198 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2199 void TextLCD_Base::setPower(bool powerOn) {
wim 32:59c4b8f648d4 2200
wim 32:59c4b8f648d4 2201 if (powerOn) {
wim 32:59c4b8f648d4 2202 // Switch on
wim 32:59c4b8f648d4 2203 setMode(DispOn);
wim 32:59c4b8f648d4 2204
wim 32:59c4b8f648d4 2205 // Controllers that supports specific Power Down mode
wim 32:59c4b8f648d4 2206 switch (_ctrl) {
wim 32:59c4b8f648d4 2207
wim 32:59c4b8f648d4 2208 // case PCF2113_3V3 :
wim 39:e9c2319de9c5 2209 // case PCF2119_3V3 :
wim 39:e9c2319de9c5 2210 // case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2211 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2212 //@todo
wim 33:900a94bc7585 2213 // enable Booster Bon
wim 33:900a94bc7585 2214
wim 33:900a94bc7585 2215 case WS0010:
wim 33:900a94bc7585 2216 _writeCommand(0x17); // Char mode, DC/DC on
wim 33:900a94bc7585 2217 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 2218 break;
wim 33:900a94bc7585 2219
wim 36:9f5f86dfd44a 2220 case KS0073:
wim 33:900a94bc7585 2221 case KS0078:
wim 32:59c4b8f648d4 2222 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2223 // case SSD1803_5V :
wim 33:900a94bc7585 2224 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2225 _writeCommand(0x02); // Power On
wim 32:59c4b8f648d4 2226 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2227 break;
wim 32:59c4b8f648d4 2228
wim 32:59c4b8f648d4 2229 default:
wim 32:59c4b8f648d4 2230 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2231 break;
wim 32:59c4b8f648d4 2232 } // end switch
wim 32:59c4b8f648d4 2233 }
wim 32:59c4b8f648d4 2234 else {
wim 32:59c4b8f648d4 2235 // Switch off
wim 32:59c4b8f648d4 2236 setMode(DispOff);
wim 32:59c4b8f648d4 2237
wim 32:59c4b8f648d4 2238 // Controllers that support specific Power Down mode
wim 32:59c4b8f648d4 2239 switch (_ctrl) {
wim 32:59c4b8f648d4 2240
wim 32:59c4b8f648d4 2241 // case PCF2113_3V3 :
wim 39:e9c2319de9c5 2242 // case PCF2119_3V3 :
wim 39:e9c2319de9c5 2243 // case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2244 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2245 //@todo
wim 33:900a94bc7585 2246 // disable Booster Bon
wim 33:900a94bc7585 2247
wim 33:900a94bc7585 2248 case WS0010:
wim 33:900a94bc7585 2249 _writeCommand(0x13); // Char mode, DC/DC off
wim 33:900a94bc7585 2250 break;
wim 33:900a94bc7585 2251
wim 36:9f5f86dfd44a 2252 case KS0073:
wim 33:900a94bc7585 2253 case KS0078:
wim 32:59c4b8f648d4 2254 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2255 // case SSD1803_5V :
wim 33:900a94bc7585 2256 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2257 _writeCommand(0x03); // Power Down
wim 32:59c4b8f648d4 2258 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2259 break;
wim 32:59c4b8f648d4 2260
wim 32:59c4b8f648d4 2261 default:
wim 32:59c4b8f648d4 2262 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2263 break;
wim 32:59c4b8f648d4 2264 } // end switch
wim 32:59c4b8f648d4 2265 }
wim 33:900a94bc7585 2266 } // end setPower()
wim 39:e9c2319de9c5 2267 #endif
wim 39:e9c2319de9c5 2268
wim 39:e9c2319de9c5 2269 #if(LCD_ORIENT == 1)
wim 33:900a94bc7585 2270 /** Set Orient
wim 33:900a94bc7585 2271 * setOrient method is supported by some compatible devices (eg SSD1803, US2066) that have top/bottom view modes
wim 33:900a94bc7585 2272 *
wim 33:900a94bc7585 2273 * @param LCDOrient orient Orientation
wim 33:900a94bc7585 2274 * @return none
wim 33:900a94bc7585 2275 */
wim 33:900a94bc7585 2276 void TextLCD_Base::setOrient(LCDOrient orient){
wim 33:900a94bc7585 2277
wim 33:900a94bc7585 2278 switch (orient) {
wim 33:900a94bc7585 2279
wim 33:900a94bc7585 2280 case Top:
wim 33:900a94bc7585 2281 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2282 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2283 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2284 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2285 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2286 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2287 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2288 break;
wim 39:e9c2319de9c5 2289
wim 39:e9c2319de9c5 2290 case PCF2119_3V3:
wim 39:e9c2319de9c5 2291 case PCF2119R_3V3:
wim 39:e9c2319de9c5 2292 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 39:e9c2319de9c5 2293 _writeCommand(0x07); // Display Conf Set 0000 0, 1, P=1, Q=1 (Instr. Set 1)
wim 39:e9c2319de9c5 2294 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 39:e9c2319de9c5 2295 break;
wim 34:e5a0dcb43ecc 2296
wim 33:900a94bc7585 2297 case SSD1803_3V3 :
wim 33:900a94bc7585 2298 // case SSD1803_5V :
wim 33:900a94bc7585 2299 case US2066_3V3 :
wim 33:900a94bc7585 2300 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2301 // Select Extended Instruction Set
wim 33:900a94bc7585 2302 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2303 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2304
wim 33:900a94bc7585 2305 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2306 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2307 break;
wim 36:9f5f86dfd44a 2308
wim 36:9f5f86dfd44a 2309 case ST7070:
wim 36:9f5f86dfd44a 2310 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL, N, EXT=1, x, x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2311
wim 36:9f5f86dfd44a 2312 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2313 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2314 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2315 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2316
wim 36:9f5f86dfd44a 2317 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2318
wim 36:9f5f86dfd44a 2319 break; // case ST7070 Controller
wim 33:900a94bc7585 2320
wim 33:900a94bc7585 2321 default:
wim 33:900a94bc7585 2322 //Unsupported feature for other controllers
wim 33:900a94bc7585 2323 break;
wim 33:900a94bc7585 2324
wim 33:900a94bc7585 2325 } // end switch _ctrl
wim 33:900a94bc7585 2326 break; // end Top
wim 33:900a94bc7585 2327
wim 33:900a94bc7585 2328 case Bottom:
wim 33:900a94bc7585 2329 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2330 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2331 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2332 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2333 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2334 _writeCommand(0x06); // Display Conf Set 0000 0, 1, P=1, Q=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2335 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2336 break;
wim 39:e9c2319de9c5 2337
wim 39:e9c2319de9c5 2338 case PCF2119_3V3:
wim 39:e9c2319de9c5 2339 case PCF2119R_3V3 :
wim 39:e9c2319de9c5 2340 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 39:e9c2319de9c5 2341 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 39:e9c2319de9c5 2342 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 39:e9c2319de9c5 2343 break;
wim 34:e5a0dcb43ecc 2344
wim 33:900a94bc7585 2345 case SSD1803_3V3 :
wim 33:900a94bc7585 2346 // case SSD1803_5V :
wim 33:900a94bc7585 2347 case US2066_3V3 :
wim 33:900a94bc7585 2348 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2349 // Select Extended Instruction Set
wim 33:900a94bc7585 2350 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2351 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2352
wim 33:900a94bc7585 2353 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2354 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2355 break;
wim 36:9f5f86dfd44a 2356
wim 36:9f5f86dfd44a 2357 case ST7070:
wim 36:9f5f86dfd44a 2358 //Note: this does not result in correct top/bottom view.
wim 36:9f5f86dfd44a 2359 //The left and right half of each row are reversed and the addressing of both rows is also incorrect:
wim 36:9f5f86dfd44a 2360 //Top/bottomline when orientation is flipped:
wim 36:9f5f86dfd44a 2361 // 0x48...0x4F 0x40...0x47
wim 36:9f5f86dfd44a 2362 // 0x08...0x0F 0x00...0x07
wim 36:9f5f86dfd44a 2363 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2364
wim 36:9f5f86dfd44a 2365 _writeCommand(0x40 | 0x0F); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2366 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2367 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2368 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2369
wim 36:9f5f86dfd44a 2370 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2371
wim 36:9f5f86dfd44a 2372 break; // case ST7070 Controller
wim 33:900a94bc7585 2373
wim 33:900a94bc7585 2374 default:
wim 33:900a94bc7585 2375 //Unsupported feature for other controllers
wim 33:900a94bc7585 2376 break;
wim 33:900a94bc7585 2377
wim 33:900a94bc7585 2378 } // end switch _ctrl
wim 33:900a94bc7585 2379
wim 33:900a94bc7585 2380 break; // end Bottom
wim 33:900a94bc7585 2381 } // end switch orient
wim 33:900a94bc7585 2382 } // end setOrient()
wim 39:e9c2319de9c5 2383 #endif
wim 39:e9c2319de9c5 2384
wim 39:e9c2319de9c5 2385 #if(LCD_BIGFONT == 1)
wim 34:e5a0dcb43ecc 2386 /** Set Big Font
wim 34:e5a0dcb43ecc 2387 * setBigFont method is supported by some compatible devices (eg SSD1803, US2066)
wim 34:e5a0dcb43ecc 2388 *
wim 34:e5a0dcb43ecc 2389 * @param lines The selected Big Font lines (None, TopLine, CenterLine, BottomLine, TopBottomLine)
wim 34:e5a0dcb43ecc 2390 * Double height characters can be shown on lines 1+2, 2+3, 3+4 or 1+2 and 3+4
wim 34:e5a0dcb43ecc 2391 * Valid double height lines depend on the LCDs number of rows.
wim 34:e5a0dcb43ecc 2392 */
wim 34:e5a0dcb43ecc 2393 void TextLCD_Base::setBigFont(LCDBigFont lines) {
wim 34:e5a0dcb43ecc 2394
wim 34:e5a0dcb43ecc 2395 switch (lines) {
wim 34:e5a0dcb43ecc 2396 case None:
wim 34:e5a0dcb43ecc 2397 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2398 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2399 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2400 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2401 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2402 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2403 // Default
wim 34:e5a0dcb43ecc 2404 _function = _function & ~0x04; // Set function, 0 0 1 DL N DH=0 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2405 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2406 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2407 break; // end US2066
wim 34:e5a0dcb43ecc 2408
wim 34:e5a0dcb43ecc 2409 default:
wim 34:e5a0dcb43ecc 2410 break; // end default
wim 34:e5a0dcb43ecc 2411 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2412 break; // end None
wim 34:e5a0dcb43ecc 2413
wim 34:e5a0dcb43ecc 2414 case TopLine:
wim 34:e5a0dcb43ecc 2415 if (_nr_rows < 2) return; //Sanity check
wim 34:e5a0dcb43ecc 2416
wim 34:e5a0dcb43ecc 2417 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2418 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2419 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2420 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2421 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2422 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2423 // Default
wim 34:e5a0dcb43ecc 2424 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2425 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2426 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2427 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2428
wim 34:e5a0dcb43ecc 2429 default:
wim 34:e5a0dcb43ecc 2430 break; // end default
wim 34:e5a0dcb43ecc 2431 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2432 break; // end TopLine
wim 34:e5a0dcb43ecc 2433
wim 34:e5a0dcb43ecc 2434 case CenterLine:
wim 34:e5a0dcb43ecc 2435 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2436
wim 34:e5a0dcb43ecc 2437 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2438 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2439 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2440 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2441 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2442 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2443 // Default
wim 34:e5a0dcb43ecc 2444 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2445 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2446 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2447 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2448
wim 34:e5a0dcb43ecc 2449 default:
wim 34:e5a0dcb43ecc 2450 break; // end default
wim 34:e5a0dcb43ecc 2451 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2452 break; // end CenterLine
wim 34:e5a0dcb43ecc 2453
wim 34:e5a0dcb43ecc 2454 case BottomLine:
wim 34:e5a0dcb43ecc 2455 if (_nr_rows < 3) return; //Sanity check
wim 34:e5a0dcb43ecc 2456
wim 34:e5a0dcb43ecc 2457 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2458 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2459 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2460 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2461 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2462 if (_nr_rows == 3) {
wim 34:e5a0dcb43ecc 2463 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2464 }
wim 34:e5a0dcb43ecc 2465 else {
wim 34:e5a0dcb43ecc 2466 _writeCommand(0x10); // Double Height, 0 0 0 1 UD2=0, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2467 }
wim 34:e5a0dcb43ecc 2468 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2469 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2470 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2471 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2472
wim 34:e5a0dcb43ecc 2473 default:
wim 34:e5a0dcb43ecc 2474 break; // end default
wim 34:e5a0dcb43ecc 2475 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2476 break; // end BottomLine
wim 34:e5a0dcb43ecc 2477
wim 34:e5a0dcb43ecc 2478 case TopBottomLine:
wim 34:e5a0dcb43ecc 2479 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2480
wim 34:e5a0dcb43ecc 2481 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2482 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2483 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2484 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2485 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2486 _writeCommand(0x18); // Double Height, 0 0 0 1 UD2=1, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2487 // Default
wim 34:e5a0dcb43ecc 2488 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2489 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2490 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2491 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2492
wim 34:e5a0dcb43ecc 2493 default:
wim 34:e5a0dcb43ecc 2494 break; // end default
wim 34:e5a0dcb43ecc 2495 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2496 break; // end TopBottomLine
wim 34:e5a0dcb43ecc 2497
wim 34:e5a0dcb43ecc 2498 } // end switch lines
wim 34:e5a0dcb43ecc 2499
wim 34:e5a0dcb43ecc 2500 } // end setBigFont()
wim 39:e9c2319de9c5 2501 #endif
wim 39:e9c2319de9c5 2502
wim 39:e9c2319de9c5 2503 #if(LCD_ICON==1)
wim 36:9f5f86dfd44a 2504 /** Set Icons
wim 36:9f5f86dfd44a 2505 *
wim 36:9f5f86dfd44a 2506 * @param unsigned char idx The Index of the icon pattern (0..15) for KS0073 and similar controllers
wim 36:9f5f86dfd44a 2507 * and Index (0..31) for PCF2103 and similar controllers
wim 36:9f5f86dfd44a 2508 * @param unsigned char data The bitpattern for the icons (6 lsb for KS0073 bitpattern (5 lsb for KS0078) and 2 msb for blinkmode)
wim 36:9f5f86dfd44a 2509 * The bitpattern for the PCF2103 icons is 5 lsb (UDC 0..2) and 5 lsb for blinkmode (UDC 4..6)
wim 36:9f5f86dfd44a 2510 */
wim 36:9f5f86dfd44a 2511 void TextLCD_Base::setIcon(unsigned char idx, unsigned char data) {
wim 36:9f5f86dfd44a 2512 // Blinking icons are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2513 // The blinking pixels in the icons can be controlled by setting additional bits in the icon bitpattern.
wim 36:9f5f86dfd44a 2514 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2515 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2516 // 0 B1 B0 0 0 1 1 1 0
wim 36:9f5f86dfd44a 2517 // 1 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2518 // .............
wim 36:9f5f86dfd44a 2519 // 15 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2520 //
wim 36:9f5f86dfd44a 2521 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2522 // B1 B0 Mode
wim 36:9f5f86dfd44a 2523 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2524 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2525 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2526 //
wim 36:9f5f86dfd44a 2527 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2528 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2529 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2530 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2531 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2532 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2533
wim 36:9f5f86dfd44a 2534 switch (_ctrl) {
wim 36:9f5f86dfd44a 2535 case KS0073:
wim 36:9f5f86dfd44a 2536 case KS0078:
wim 36:9f5f86dfd44a 2537 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2538 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2539 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2540
wim 36:9f5f86dfd44a 2541 _writeData(data); // Set Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2542
wim 36:9f5f86dfd44a 2543 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2544 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2545 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2546
wim 36:9f5f86dfd44a 2547 case ST7032_3V3:
wim 36:9f5f86dfd44a 2548 case ST7032_5V:
wim 36:9f5f86dfd44a 2549 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2550 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2551
wim 36:9f5f86dfd44a 2552 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2553
wim 36:9f5f86dfd44a 2554 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2555 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2556 break; // end ST7032
wim 36:9f5f86dfd44a 2557
wim 36:9f5f86dfd44a 2558 case ST7036_3V3:
wim 36:9f5f86dfd44a 2559 case ST7036_5V:
wim 36:9f5f86dfd44a 2560 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2561 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2562
wim 36:9f5f86dfd44a 2563 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2564
wim 36:9f5f86dfd44a 2565 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2566 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2567 break; // end ST7036
wim 36:9f5f86dfd44a 2568
wim 36:9f5f86dfd44a 2569 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2570 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2571 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2572 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2573 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set = 1)
wim 36:9f5f86dfd44a 2574 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2575
wim 36:9f5f86dfd44a 2576 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2577 // Select IS=0
wim 36:9f5f86dfd44a 2578 break; // end SSD1803
wim 36:9f5f86dfd44a 2579
wim 36:9f5f86dfd44a 2580 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2581 case PCF2113_3V3:
wim 39:e9c2319de9c5 2582 case PCF2119_3V3:
wim 39:e9c2319de9c5 2583 case PCF2119R_3V3:
wim 36:9f5f86dfd44a 2584 // Store UDC/Icon pattern for PCF2103 and PCF2113:
wim 36:9f5f86dfd44a 2585 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2586 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2587 // Store UDC/Icon pattern for PCF2119:
wim 36:9f5f86dfd44a 2588 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2589 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2590 _writeCommand(0x40 | (idx & 0x3F)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2591 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2592 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2593
wim 36:9f5f86dfd44a 2594 default:
wim 36:9f5f86dfd44a 2595 break; // end default
wim 36:9f5f86dfd44a 2596 } // end switch _ctrl
wim 36:9f5f86dfd44a 2597
wim 36:9f5f86dfd44a 2598 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2599 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2600 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2601
wim 36:9f5f86dfd44a 2602 } // end setIcon()
wim 36:9f5f86dfd44a 2603
wim 36:9f5f86dfd44a 2604 /** Clear Icons
wim 36:9f5f86dfd44a 2605 *
wim 36:9f5f86dfd44a 2606 * @param none
wim 36:9f5f86dfd44a 2607 * @return none
wim 36:9f5f86dfd44a 2608 */
wim 36:9f5f86dfd44a 2609 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2610 void TextLCD_Base::clrIcon() {
wim 36:9f5f86dfd44a 2611 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2612 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2613 // 0 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2614 // 1 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2615 // .............
wim 36:9f5f86dfd44a 2616 // 15 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2617 //
wim 36:9f5f86dfd44a 2618 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2619 // B1 B0 Mode
wim 36:9f5f86dfd44a 2620 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2621 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2622 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2623 //
wim 36:9f5f86dfd44a 2624 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2625 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2626 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2627 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2628 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2629 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2630 int idx;
wim 36:9f5f86dfd44a 2631
wim 36:9f5f86dfd44a 2632 switch (_ctrl) {
wim 36:9f5f86dfd44a 2633 case KS0073:
wim 36:9f5f86dfd44a 2634 case KS0078:
wim 36:9f5f86dfd44a 2635 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2636 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2637 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2638 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2639 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2640 }
wim 36:9f5f86dfd44a 2641 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Std Instruction Set
wim 36:9f5f86dfd44a 2642 // Select Std Instr set
wim 36:9f5f86dfd44a 2643 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2644
wim 36:9f5f86dfd44a 2645 case ST7032_3V3:
wim 36:9f5f86dfd44a 2646 case ST7032_5V:
wim 36:9f5f86dfd44a 2647 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2648
wim 36:9f5f86dfd44a 2649 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2650 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2651 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2652 }
wim 36:9f5f86dfd44a 2653
wim 36:9f5f86dfd44a 2654 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2655 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2656 break; // end ST7032
wim 36:9f5f86dfd44a 2657
wim 36:9f5f86dfd44a 2658 case ST7036_3V3:
wim 36:9f5f86dfd44a 2659 case ST7036_5V:
wim 36:9f5f86dfd44a 2660 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2661
wim 36:9f5f86dfd44a 2662 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2663 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2664 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2665 }
wim 36:9f5f86dfd44a 2666
wim 36:9f5f86dfd44a 2667 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2668 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2669 break; // end ST7036
wim 36:9f5f86dfd44a 2670
wim 36:9f5f86dfd44a 2671 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2672 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2673 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2674 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2675 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2676 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2677 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2678 }
wim 36:9f5f86dfd44a 2679 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2680 // Select IS=0
wim 36:9f5f86dfd44a 2681 break; // end SSD1803
wim 36:9f5f86dfd44a 2682
wim 36:9f5f86dfd44a 2683 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2684 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2685 // PCF2103 and PCF2113 use part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2686 // Select CG RAM
wim 36:9f5f86dfd44a 2687
wim 36:9f5f86dfd44a 2688 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2689 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2690 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2691 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2692 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2693 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2694 }
wim 36:9f5f86dfd44a 2695
wim 36:9f5f86dfd44a 2696 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2697 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2698 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2699 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2700 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2701 }
wim 36:9f5f86dfd44a 2702 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2703
wim 39:e9c2319de9c5 2704 case PCF2119_3V3:
wim 39:e9c2319de9c5 2705 case PCF2119R_3V3:
wim 36:9f5f86dfd44a 2706 // PCF2119 uses part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2707 // Select CG RAM
wim 36:9f5f86dfd44a 2708
wim 36:9f5f86dfd44a 2709 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2710 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2711 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2712 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2713 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2714 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2715 }
wim 36:9f5f86dfd44a 2716
wim 36:9f5f86dfd44a 2717 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2718 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2719 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2720 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2721 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2722 }
wim 36:9f5f86dfd44a 2723 break; // case PCF2119_3V3 Controller
wim 36:9f5f86dfd44a 2724
wim 36:9f5f86dfd44a 2725 default:
wim 36:9f5f86dfd44a 2726 break; // end default
wim 36:9f5f86dfd44a 2727 } // end switch _ctrl
wim 36:9f5f86dfd44a 2728
wim 36:9f5f86dfd44a 2729 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2730 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2731 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2732 } //end clrIcon()
wim 39:e9c2319de9c5 2733 #endif
wim 39:e9c2319de9c5 2734
wim 39:e9c2319de9c5 2735 #if(LCD_INVERT == 1)
wim 36:9f5f86dfd44a 2736 /** Set Invert
wim 36:9f5f86dfd44a 2737 * setInvert method is supported by some compatible devices (eg KS0073) to swap between black and white
wim 36:9f5f86dfd44a 2738 *
wim 36:9f5f86dfd44a 2739 * @param bool invertOn Invert on/off
wim 36:9f5f86dfd44a 2740 * @return none
wim 36:9f5f86dfd44a 2741 */
wim 36:9f5f86dfd44a 2742 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2743 void TextLCD_Base::setInvert(bool invertOn) {
wim 36:9f5f86dfd44a 2744
wim 36:9f5f86dfd44a 2745 if (invertOn) {
wim 36:9f5f86dfd44a 2746 // Controllers that support Invert
wim 36:9f5f86dfd44a 2747 switch (_ctrl) {
wim 36:9f5f86dfd44a 2748 case KS0073:
wim 36:9f5f86dfd44a 2749 case KS0078:
wim 36:9f5f86dfd44a 2750 _function = _function | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2751 _writeCommand(0x20 | _function); // Activate Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2752 break;
wim 36:9f5f86dfd44a 2753 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2754 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2755 case US2066_3V3:
wim 36:9f5f86dfd44a 2756 // case USS2066_5V:
wim 36:9f5f86dfd44a 2757 _function_1 = _function_1 | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2758 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2759 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2760 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2761 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2762 break;
wim 36:9f5f86dfd44a 2763 default:
wim 36:9f5f86dfd44a 2764 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2765 break;
wim 36:9f5f86dfd44a 2766 } // end switch
wim 36:9f5f86dfd44a 2767 }
wim 36:9f5f86dfd44a 2768 else {
wim 36:9f5f86dfd44a 2769 // Controllers that support Invert
wim 36:9f5f86dfd44a 2770 switch (_ctrl) {
wim 36:9f5f86dfd44a 2771 case KS0073:
wim 36:9f5f86dfd44a 2772 case KS0078:
wim 36:9f5f86dfd44a 2773 _function = _function & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2774 _writeCommand(0x20 | _function); // Disable Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2775 break;
wim 36:9f5f86dfd44a 2776 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2777 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2778 case US2066_3V3:
wim 36:9f5f86dfd44a 2779 // case USS2066_5V:
wim 36:9f5f86dfd44a 2780 _function_1 = _function_1 & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2781 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2782 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2783 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2784 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2785 break;
wim 36:9f5f86dfd44a 2786
wim 36:9f5f86dfd44a 2787 default:
wim 36:9f5f86dfd44a 2788 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2789 break;
wim 36:9f5f86dfd44a 2790 } // end switch
wim 36:9f5f86dfd44a 2791 }
wim 36:9f5f86dfd44a 2792 } // end setInvert()
wim 39:e9c2319de9c5 2793 #endif
wim 36:9f5f86dfd44a 2794
wim 23:d47f226efb24 2795 //--------- End TextLCD_Base -----------
wim 21:9eb628d9e164 2796
wim 22:35742ec80c24 2797
wim 23:d47f226efb24 2798 //--------- Start TextLCD Bus -----------
wim 21:9eb628d9e164 2799
wim 21:9eb628d9e164 2800 /* Create a TextLCD interface for using regular mbed pins
wim 21:9eb628d9e164 2801 *
wim 21:9eb628d9e164 2802 * @param rs Instruction/data control line
wim 21:9eb628d9e164 2803 * @param e Enable line (clock)
wim 21:9eb628d9e164 2804 * @param d4-d7 Data lines for using as a 4-bit interface
wim 21:9eb628d9e164 2805 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 2806 * @param bl Backlight control line (optional, default = NC)
wim 21:9eb628d9e164 2807 * @param e2 Enable2 line (clock for second controller, LCD40x4 only)
wim 21:9eb628d9e164 2808 * @param ctrl LCD controller (default = HD44780)
wim 21:9eb628d9e164 2809 */
wim 21:9eb628d9e164 2810 TextLCD::TextLCD(PinName rs, PinName e,
wim 21:9eb628d9e164 2811 PinName d4, PinName d5, PinName d6, PinName d7,
wim 21:9eb628d9e164 2812 LCDType type, PinName bl, PinName e2, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2813 TextLCD_Base(type, ctrl),
wim 22:35742ec80c24 2814 _rs(rs), _e(e), _d(d4, d5, d6, d7) {
wim 22:35742ec80c24 2815
wim 22:35742ec80c24 2816 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2817 if (bl != NC) {
wim 22:35742ec80c24 2818 _bl = new DigitalOut(bl); //Construct new pin
wim 22:35742ec80c24 2819 _bl->write(0); //Deactivate
wim 22:35742ec80c24 2820 }
wim 22:35742ec80c24 2821 else {
wim 22:35742ec80c24 2822 // No Hardware Backlight pin
wim 22:35742ec80c24 2823 _bl = NULL; //Construct dummy pin
wim 22:35742ec80c24 2824 }
wim 22:35742ec80c24 2825
wim 22:35742ec80c24 2826 // The hardware Enable2 pin is only needed for LCD40x4. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2827 if (e2 != NC) {
wim 22:35742ec80c24 2828 _e2 = new DigitalOut(e2); //Construct new pin
wim 22:35742ec80c24 2829 _e2->write(0); //Deactivate
wim 22:35742ec80c24 2830 }
wim 22:35742ec80c24 2831 else {
wim 22:35742ec80c24 2832 // No Hardware Enable pin
wim 22:35742ec80c24 2833 _e2 = NULL; //Construct dummy pin
wim 22:35742ec80c24 2834 }
wim 38:cbe275b0b647 2835
wim 38:cbe275b0b647 2836 _init(_LCD_DL_4); // Set Datalength to 4 bit for mbed bus interfaces
wim 21:9eb628d9e164 2837 }
wim 21:9eb628d9e164 2838
wim 29:a3663151aa65 2839 /** Destruct a TextLCD interface for using regular mbed pins
wim 29:a3663151aa65 2840 *
wim 29:a3663151aa65 2841 * @param none
wim 29:a3663151aa65 2842 * @return none
wim 29:a3663151aa65 2843 */
wim 29:a3663151aa65 2844 TextLCD::~TextLCD() {
wim 29:a3663151aa65 2845 if (_bl != NULL) {delete _bl;} // BL pin
wim 29:a3663151aa65 2846 if (_e2 != NULL) {delete _e2;} // E2 pin
wim 29:a3663151aa65 2847 }
wim 29:a3663151aa65 2848
wim 22:35742ec80c24 2849 /** Set E pin (or E2 pin)
wim 22:35742ec80c24 2850 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2851 * Default PinName value for E2 is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2852 * @param value true or false
wim 22:35742ec80c24 2853 * @return none
wim 22:35742ec80c24 2854 */
wim 21:9eb628d9e164 2855 void TextLCD::_setEnable(bool value) {
wim 21:9eb628d9e164 2856
wim 22:35742ec80c24 2857 if(_ctrl_idx==_LCDCtrl_0) {
wim 22:35742ec80c24 2858 if (value) {
wim 22:35742ec80c24 2859 _e = 1; // Set E bit
wim 22:35742ec80c24 2860 }
wim 22:35742ec80c24 2861 else {
wim 22:35742ec80c24 2862 _e = 0; // Reset E bit
wim 22:35742ec80c24 2863 }
wim 22:35742ec80c24 2864 }
wim 22:35742ec80c24 2865 else {
wim 22:35742ec80c24 2866 if (value) {
wim 22:35742ec80c24 2867 if (_e2 != NULL) {_e2->write(1);} //Set E2 bit
wim 22:35742ec80c24 2868 }
wim 22:35742ec80c24 2869 else {
wim 22:35742ec80c24 2870 if (_e2 != NULL) {_e2->write(0);} //Reset E2 bit
wim 22:35742ec80c24 2871 }
wim 22:35742ec80c24 2872 }
wim 21:9eb628d9e164 2873 }
wim 21:9eb628d9e164 2874
wim 21:9eb628d9e164 2875 // Set RS pin
wim 21:9eb628d9e164 2876 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2877 void TextLCD::_setRS(bool value) {
wim 21:9eb628d9e164 2878
wim 22:35742ec80c24 2879 if (value) {
wim 21:9eb628d9e164 2880 _rs = 1; // Set RS bit
wim 22:35742ec80c24 2881 }
wim 22:35742ec80c24 2882 else {
wim 21:9eb628d9e164 2883 _rs = 0; // Reset RS bit
wim 22:35742ec80c24 2884 }
wim 21:9eb628d9e164 2885 }
wim 21:9eb628d9e164 2886
wim 22:35742ec80c24 2887 /** Set BL pin
wim 22:35742ec80c24 2888 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2889 * Default PinName value is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2890 * @param value true or false
wim 22:35742ec80c24 2891 * @return none
wim 22:35742ec80c24 2892 */
wim 21:9eb628d9e164 2893 void TextLCD::_setBL(bool value) {
wim 21:9eb628d9e164 2894
wim 22:35742ec80c24 2895 if (value) {
wim 22:35742ec80c24 2896 if (_bl != NULL) {_bl->write(1);} //Set BL bit
wim 22:35742ec80c24 2897 }
wim 22:35742ec80c24 2898 else {
wim 22:35742ec80c24 2899 if (_bl != NULL) {_bl->write(0);} //Reset BL bit
wim 22:35742ec80c24 2900 }
wim 21:9eb628d9e164 2901 }
wim 21:9eb628d9e164 2902
wim 21:9eb628d9e164 2903 // Place the 4bit data on the databus
wim 21:9eb628d9e164 2904 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 21:9eb628d9e164 2905 void TextLCD::_setData(int value) {
wim 21:9eb628d9e164 2906 _d = value & 0x0F; // Write Databits
wim 21:9eb628d9e164 2907 }
wim 34:e5a0dcb43ecc 2908
wim 23:d47f226efb24 2909 //----------- End TextLCD ---------------
wim 21:9eb628d9e164 2910
wim 21:9eb628d9e164 2911
wim 23:d47f226efb24 2912 //--------- Start TextLCD_I2C -----------
wim 34:e5a0dcb43ecc 2913 #if(LCD_I2C == 1) /* I2C Expander PCF8574/MCP23008 */
wim 26:bd897a001012 2914 /** Create a TextLCD interface using an I2C PC8574 (or PCF8574A) or MCP23008 portexpander
wim 22:35742ec80c24 2915 *
wim 22:35742ec80c24 2916 * @param i2c I2C Bus
wim 26:bd897a001012 2917 * @param deviceAddress I2C slave address (PCF8574, PCF8574A or MCP23008, default = 0x40)
wim 22:35742ec80c24 2918 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 22:35742ec80c24 2919 * @param ctrl LCD controller (default = HD44780)
wim 22:35742ec80c24 2920 */
wim 21:9eb628d9e164 2921 TextLCD_I2C::TextLCD_I2C(I2C *i2c, char deviceAddress, LCDType type, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2922 TextLCD_Base(type, ctrl),
wim 21:9eb628d9e164 2923 _i2c(i2c){
wim 21:9eb628d9e164 2924
wim 22:35742ec80c24 2925 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 2926
wim 28:30fa94f7341c 2927 // Setup the I2C bus
wim 28:30fa94f7341c 2928 // The max bitrate for PCF8574 is 100kbit, the max bitrate for MCP23008 is 400kbit,
wim 32:59c4b8f648d4 2929 _i2c->frequency(100000);
wim 21:9eb628d9e164 2930
wim 26:bd897a001012 2931 #if (MCP23008==1)
wim 26:bd897a001012 2932 // MCP23008 portexpander Init
wim 37:ce348c002929 2933 _writeRegister(IODIR, 0x00); // All pins are outputs
wim 37:ce348c002929 2934 _writeRegister(IPOL, 0x00); // No reverse polarity on inputs
wim 37:ce348c002929 2935 _writeRegister(GPINTEN, 0x00); // No interrupt on change of input pins
wim 37:ce348c002929 2936 _writeRegister(DEFVAL, 0x00); // Default value to compare against for interrupts
wim 37:ce348c002929 2937 _writeRegister(INTCON, 0x00); // No interrupt on changes, compare against previous pin value
wim 37:ce348c002929 2938 _writeRegister(IOCON, 0x20); // b1=0 - Interrupt polarity active low
wim 37:ce348c002929 2939 // b2=0 - Interrupt pin active driver output
wim 37:ce348c002929 2940 // b4=0 - Slew rate enable on SDA
wim 37:ce348c002929 2941 // b5=0 - Auto-increment on registeraddress
wim 37:ce348c002929 2942 // b5=1 - No auto-increment on registeraddress => needed for performance improved I2C expander mode
wim 37:ce348c002929 2943 _writeRegister(GPPU, 0x00); // No Pullup
wim 37:ce348c002929 2944 // INTF // Interrupt flags read (Read-Only)
wim 37:ce348c002929 2945 // INTCAP // Captured inputpins at time of interrupt (Read-Only)
wim 37:ce348c002929 2946 // _writeRegister(GPIO, 0x00); // Output/Input pins
wim 37:ce348c002929 2947 // _writeRegister(OLAT, 0x00); // Output Latch
wim 26:bd897a001012 2948
wim 21:9eb628d9e164 2949 // Init the portexpander bus
wim 38:cbe275b0b647 2950 _lcd_bus = LCD_BUS_I2C_DEF;
wim 21:9eb628d9e164 2951
wim 21:9eb628d9e164 2952 // write the new data to the portexpander
wim 37:ce348c002929 2953 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2954 #else
wim 26:bd897a001012 2955 // PCF8574 of PCF8574A portexpander
wim 26:bd897a001012 2956
wim 26:bd897a001012 2957 // Init the portexpander bus
wim 38:cbe275b0b647 2958 _lcd_bus = LCD_BUS_I2C_DEF;
wim 26:bd897a001012 2959
wim 26:bd897a001012 2960 // write the new data to the portexpander
wim 21:9eb628d9e164 2961 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 2962 #endif
wim 21:9eb628d9e164 2963
wim 37:ce348c002929 2964 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 21:9eb628d9e164 2965 }
wim 21:9eb628d9e164 2966
wim 37:ce348c002929 2967 // Set E bit (or E2 bit) in the databus shadowvalue
wim 37:ce348c002929 2968 // Used for mbed I2C bus expander
wim 37:ce348c002929 2969 void TextLCD_I2C::_setEnableBit(bool value) {
wim 21:9eb628d9e164 2970
wim 22:35742ec80c24 2971 if(_ctrl_idx==_LCDCtrl_0) {
wim 26:bd897a001012 2972 if (value) {
wim 38:cbe275b0b647 2973 _lcd_bus |= LCD_BUS_I2C_E; // Set E bit
wim 26:bd897a001012 2974 }
wim 26:bd897a001012 2975 else {
wim 38:cbe275b0b647 2976 _lcd_bus &= ~LCD_BUS_I2C_E; // Reset E bit
wim 26:bd897a001012 2977 }
wim 22:35742ec80c24 2978 }
wim 22:35742ec80c24 2979 else {
wim 26:bd897a001012 2980 if (value) {
wim 38:cbe275b0b647 2981 _lcd_bus |= LCD_BUS_I2C_E2; // Set E2 bit
wim 26:bd897a001012 2982 }
wim 26:bd897a001012 2983 else {
wim 38:cbe275b0b647 2984 _lcd_bus &= ~LCD_BUS_I2C_E2; // Reset E2bit
wim 26:bd897a001012 2985 }
wim 26:bd897a001012 2986 }
wim 37:ce348c002929 2987 }
wim 37:ce348c002929 2988
wim 37:ce348c002929 2989 // Set E pin (or E2 pin)
wim 37:ce348c002929 2990 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 2991 void TextLCD_I2C::_setEnable(bool value) {
wim 37:ce348c002929 2992
wim 37:ce348c002929 2993 // Place the E or E2 bit data on the databus shadowvalue
wim 37:ce348c002929 2994 _setEnableBit(value);
wim 26:bd897a001012 2995
wim 26:bd897a001012 2996 #if (MCP23008==1)
wim 26:bd897a001012 2997 // MCP23008 portexpander
wim 26:bd897a001012 2998
wim 26:bd897a001012 2999 // write the new data to the portexpander
wim 37:ce348c002929 3000 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3001 #else
wim 26:bd897a001012 3002 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3003
wim 22:35742ec80c24 3004 // write the new data to the I2C portexpander
wim 22:35742ec80c24 3005 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 3006 #endif
wim 21:9eb628d9e164 3007 }
wim 21:9eb628d9e164 3008
wim 37:ce348c002929 3009
wim 21:9eb628d9e164 3010 // Set RS pin
wim 21:9eb628d9e164 3011 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3012 void TextLCD_I2C::_setRS(bool value) {
wim 21:9eb628d9e164 3013
wim 26:bd897a001012 3014 if (value) {
wim 38:cbe275b0b647 3015 _lcd_bus |= LCD_BUS_I2C_RS; // Set RS bit
wim 26:bd897a001012 3016 }
wim 26:bd897a001012 3017 else {
wim 38:cbe275b0b647 3018 _lcd_bus &= ~LCD_BUS_I2C_RS; // Reset RS bit
wim 26:bd897a001012 3019 }
wim 26:bd897a001012 3020
wim 26:bd897a001012 3021 #if (MCP23008==1)
wim 26:bd897a001012 3022 // MCP23008 portexpander
wim 26:bd897a001012 3023
wim 26:bd897a001012 3024 // write the new data to the portexpander
wim 37:ce348c002929 3025 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3026 #else
wim 26:bd897a001012 3027 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3028
wim 22:35742ec80c24 3029 // write the new data to the I2C portexpander
wim 22:35742ec80c24 3030 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 3031 #endif
wim 21:9eb628d9e164 3032 }
wim 21:9eb628d9e164 3033
wim 21:9eb628d9e164 3034 // Set BL pin
wim 21:9eb628d9e164 3035 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3036 void TextLCD_I2C::_setBL(bool value) {
wim 21:9eb628d9e164 3037
wim 26:bd897a001012 3038 if (value) {
wim 38:cbe275b0b647 3039 _lcd_bus |= LCD_BUS_I2C_BL; // Set BL bit
wim 26:bd897a001012 3040 }
wim 26:bd897a001012 3041 else {
wim 38:cbe275b0b647 3042 _lcd_bus &= ~LCD_BUS_I2C_BL; // Reset BL bit
wim 26:bd897a001012 3043 }
wim 26:bd897a001012 3044
wim 26:bd897a001012 3045 #if (MCP23008==1)
wim 26:bd897a001012 3046 // MCP23008 portexpander
wim 26:bd897a001012 3047
wim 26:bd897a001012 3048 // write the new data to the portexpander
wim 37:ce348c002929 3049 _writeRegister(GPIO, _lcd_bus);
wim 37:ce348c002929 3050 #else
wim 37:ce348c002929 3051 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 3052
wim 37:ce348c002929 3053 // write the new data to the I2C portexpander
wim 37:ce348c002929 3054 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 37:ce348c002929 3055 #endif
wim 37:ce348c002929 3056 }
wim 37:ce348c002929 3057
wim 38:cbe275b0b647 3058 #if(0)
wim 38:cbe275b0b647 3059 // New optimized v018
wim 38:cbe275b0b647 3060 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574), same as v018
wim 38:cbe275b0b647 3061 // Place the 4bit data in the databus shadowvalue
wim 38:cbe275b0b647 3062 // Used for mbed I2C bus expander
wim 38:cbe275b0b647 3063 const char _LCD_DATA_BITS[16] = {
wim 38:cbe275b0b647 3064 0x00,
wim 38:cbe275b0b647 3065 ( LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3066 ( LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3067 ( LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3068 ( LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 3069 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3070 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3071 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3072 (LCD_BUS_I2C_D7 ),
wim 38:cbe275b0b647 3073 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3074 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3075 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3076 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 3077 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3078 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3079 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4)
wim 38:cbe275b0b647 3080 };
wim 38:cbe275b0b647 3081 void TextLCD_I2C::_setDataBits(int value) {
wim 38:cbe275b0b647 3082
wim 38:cbe275b0b647 3083 //Clear all databits
wim 38:cbe275b0b647 3084 _lcd_bus &= ~LCD_BUS_I2C_MSK;
wim 38:cbe275b0b647 3085
wim 38:cbe275b0b647 3086 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 38:cbe275b0b647 3087 _lcd_bus |= _LCD_DATA_BITS[value & 0x0F];
wim 38:cbe275b0b647 3088 }
wim 39:e9c2319de9c5 3089 #endif
wim 39:e9c2319de9c5 3090
wim 39:e9c2319de9c5 3091 #if(0)
wim 38:cbe275b0b647 3092 //orig v017
wim 38:cbe275b0b647 3093 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 37:ce348c002929 3094 // Place the 4bit data in the databus shadowvalue
wim 37:ce348c002929 3095 // Used for mbed I2C bus expander
wim 37:ce348c002929 3096 void TextLCD_I2C::_setDataBits(int value) {
wim 37:ce348c002929 3097
wim 37:ce348c002929 3098 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 3099 if (value & 0x01){
wim 38:cbe275b0b647 3100 _lcd_bus |= LCD_BUS_I2C_D4; // Set Databit
wim 37:ce348c002929 3101 }
wim 37:ce348c002929 3102 else {
wim 38:cbe275b0b647 3103 _lcd_bus &= ~LCD_BUS_I2C_D4; // Reset Databit
wim 37:ce348c002929 3104 }
wim 37:ce348c002929 3105
wim 37:ce348c002929 3106 if (value & 0x02){
wim 38:cbe275b0b647 3107 _lcd_bus |= LCD_BUS_I2C_D5; // Set Databit
wim 37:ce348c002929 3108 }
wim 37:ce348c002929 3109 else {
wim 38:cbe275b0b647 3110 _lcd_bus &= ~LCD_BUS_I2C_D5; // Reset Databit
wim 37:ce348c002929 3111 }
wim 37:ce348c002929 3112
wim 37:ce348c002929 3113 if (value & 0x04) {
wim 38:cbe275b0b647 3114 _lcd_bus |= LCD_BUS_I2C_D6; // Set Databit
wim 37:ce348c002929 3115 }
wim 37:ce348c002929 3116 else {
wim 38:cbe275b0b647 3117 _lcd_bus &= ~LCD_BUS_I2C_D6; // Reset Databit
wim 37:ce348c002929 3118 }
wim 37:ce348c002929 3119
wim 37:ce348c002929 3120 if (value & 0x08) {
wim 38:cbe275b0b647 3121 _lcd_bus |= LCD_BUS_I2C_D7; // Set Databit
wim 37:ce348c002929 3122 }
wim 37:ce348c002929 3123 else {
wim 38:cbe275b0b647 3124 _lcd_bus &= ~LCD_BUS_I2C_D7; // Reset Databit
wim 37:ce348c002929 3125 }
wim 37:ce348c002929 3126 }
wim 38:cbe275b0b647 3127 #endif
wim 38:cbe275b0b647 3128
wim 39:e9c2319de9c5 3129 #if(1)
wim 39:e9c2319de9c5 3130 //orig v017, with optimised codesize
wim 39:e9c2319de9c5 3131 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 39:e9c2319de9c5 3132 // Place the 4bit data in the databus shadowvalue
wim 39:e9c2319de9c5 3133 // Used for mbed I2C bus expander
wim 39:e9c2319de9c5 3134 void TextLCD_I2C::_setDataBits(int value) {
wim 39:e9c2319de9c5 3135
wim 39:e9c2319de9c5 3136 //Clear all databits
wim 39:e9c2319de9c5 3137 _lcd_bus &= ~LCD_BUS_I2C_MSK;
wim 39:e9c2319de9c5 3138
wim 39:e9c2319de9c5 3139 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 39:e9c2319de9c5 3140 if (value & 0x01){
wim 39:e9c2319de9c5 3141 _lcd_bus |= LCD_BUS_I2C_D4; // Set Databit
wim 39:e9c2319de9c5 3142 }
wim 39:e9c2319de9c5 3143
wim 39:e9c2319de9c5 3144 if (value & 0x02){
wim 39:e9c2319de9c5 3145 _lcd_bus |= LCD_BUS_I2C_D5; // Set Databit
wim 39:e9c2319de9c5 3146 }
wim 39:e9c2319de9c5 3147
wim 39:e9c2319de9c5 3148 if (value & 0x04) {
wim 39:e9c2319de9c5 3149 _lcd_bus |= LCD_BUS_I2C_D6; // Set Databit
wim 39:e9c2319de9c5 3150 }
wim 39:e9c2319de9c5 3151
wim 39:e9c2319de9c5 3152 if (value & 0x08) {
wim 39:e9c2319de9c5 3153 _lcd_bus |= LCD_BUS_I2C_D7; // Set Databit
wim 39:e9c2319de9c5 3154 }
wim 39:e9c2319de9c5 3155 }
wim 39:e9c2319de9c5 3156 #endif
wim 37:ce348c002929 3157
wim 37:ce348c002929 3158 // Place the 4bit data on the databus
wim 37:ce348c002929 3159 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 37:ce348c002929 3160 void TextLCD_I2C::_setData(int value) {
wim 37:ce348c002929 3161
wim 37:ce348c002929 3162 // Place the 4bit data on the databus shadowvalue
wim 37:ce348c002929 3163 _setDataBits(value);
wim 37:ce348c002929 3164
wim 37:ce348c002929 3165 // Place the 4bit data on the databus
wim 37:ce348c002929 3166 #if (MCP23008==1)
wim 37:ce348c002929 3167 // MCP23008 portexpander
wim 37:ce348c002929 3168
wim 37:ce348c002929 3169 // write the new data to the portexpander
wim 37:ce348c002929 3170 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3171 #else
wim 26:bd897a001012 3172 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3173
wim 21:9eb628d9e164 3174 // write the new data to the I2C portexpander
wim 21:9eb628d9e164 3175 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 3176 #endif
wim 21:9eb628d9e164 3177 }
wim 21:9eb628d9e164 3178
wim 37:ce348c002929 3179 // Write data to MCP23008 I2C portexpander
wim 37:ce348c002929 3180 // Used for mbed I2C bus expander
wim 37:ce348c002929 3181 void TextLCD_I2C::_writeRegister (int reg, int value) {
wim 37:ce348c002929 3182 char data[] = {reg, value};
wim 37:ce348c002929 3183
wim 37:ce348c002929 3184 _i2c->write(_slaveAddress, data, 2);
wim 37:ce348c002929 3185 }
wim 37:ce348c002929 3186
wim 37:ce348c002929 3187 //New optimized
wim 37:ce348c002929 3188 //Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 37:ce348c002929 3189 //Test faster _writeByte 0.14s vs 0.34s for a 20x4 fillscreen (MCP23008)
wim 37:ce348c002929 3190
wim 37:ce348c002929 3191 // Write a byte using I2C
wim 37:ce348c002929 3192 void TextLCD_I2C::_writeByte(int value) {
wim 37:ce348c002929 3193 char data[6];
wim 37:ce348c002929 3194
wim 37:ce348c002929 3195 #if (MCP23008==1)
wim 37:ce348c002929 3196 // MCP23008 portexpander
wim 37:ce348c002929 3197
wim 37:ce348c002929 3198 data[0] = GPIO; // set registeraddres
wim 37:ce348c002929 3199 // Note: auto-increment is disabled so all data will go to GPIO register
wim 37:ce348c002929 3200
wim 37:ce348c002929 3201 _setEnableBit(true); // set E
wim 37:ce348c002929 3202 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3203 data[1] = _lcd_bus;
wim 37:ce348c002929 3204
wim 37:ce348c002929 3205 _setEnableBit(false); // clear E
wim 37:ce348c002929 3206 data[2] = _lcd_bus;
wim 37:ce348c002929 3207
wim 37:ce348c002929 3208 _setEnableBit(true); // set E
wim 37:ce348c002929 3209 _setDataBits(value); // set data low
wim 37:ce348c002929 3210 data[3] = _lcd_bus;
wim 37:ce348c002929 3211
wim 37:ce348c002929 3212 _setEnableBit(false); // clear E
wim 37:ce348c002929 3213 data[4] = _lcd_bus;
wim 37:ce348c002929 3214
wim 37:ce348c002929 3215 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3216 _i2c->write(_slaveAddress, data, 5);
wim 37:ce348c002929 3217 #else
wim 37:ce348c002929 3218 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 3219
wim 37:ce348c002929 3220 _setEnableBit(true); // set E
wim 37:ce348c002929 3221 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3222 data[0] = _lcd_bus;
wim 37:ce348c002929 3223
wim 37:ce348c002929 3224 _setEnableBit(false); // clear E
wim 37:ce348c002929 3225 data[1] = _lcd_bus;
wim 37:ce348c002929 3226
wim 37:ce348c002929 3227 _setEnableBit(true); // set E
wim 37:ce348c002929 3228 _setDataBits(value); // set data low
wim 37:ce348c002929 3229 data[2] = _lcd_bus;
wim 37:ce348c002929 3230
wim 37:ce348c002929 3231 _setEnableBit(false); // clear E
wim 37:ce348c002929 3232 data[3] = _lcd_bus;
wim 37:ce348c002929 3233
wim 37:ce348c002929 3234 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3235 _i2c->write(_slaveAddress, data, 4);
wim 37:ce348c002929 3236 #endif
wim 37:ce348c002929 3237 }
wim 37:ce348c002929 3238
wim 37:ce348c002929 3239 #endif /* I2C Expander PCF8574/MCP23008 */
wim 37:ce348c002929 3240 //---------- End TextLCD_I2C ------------
wim 37:ce348c002929 3241
wim 37:ce348c002929 3242
wim 37:ce348c002929 3243 //--------- Start TextLCD_SPI -----------
wim 37:ce348c002929 3244 #if(LCD_SPI == 1) /* SPI Expander SN74595 */
wim 37:ce348c002929 3245
wim 37:ce348c002929 3246 /** Create a TextLCD interface using an SPI 74595 portexpander
wim 37:ce348c002929 3247 *
wim 37:ce348c002929 3248 * @param spi SPI Bus
wim 37:ce348c002929 3249 * @param cs chip select pin (active low)
wim 37:ce348c002929 3250 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 37:ce348c002929 3251 * @param ctrl LCD controller (default = HD44780)
wim 37:ce348c002929 3252 */
wim 37:ce348c002929 3253 TextLCD_SPI::TextLCD_SPI(SPI *spi, PinName cs, LCDType type, LCDCtrl ctrl) :
wim 37:ce348c002929 3254 TextLCD_Base(type, ctrl),
wim 37:ce348c002929 3255 _spi(spi),
wim 38:cbe275b0b647 3256 _cs(cs) {
wim 37:ce348c002929 3257 // Init cs
wim 37:ce348c002929 3258 _cs = 1;
wim 37:ce348c002929 3259
wim 37:ce348c002929 3260 // Setup the spi for 8 bit data, low steady state clock,
wim 37:ce348c002929 3261 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 37:ce348c002929 3262 _spi->format(8,0);
wim 37:ce348c002929 3263 _spi->frequency(500000);
wim 37:ce348c002929 3264 //_spi.frequency(1000000);
wim 37:ce348c002929 3265
wim 38:cbe275b0b647 3266 wait_ms(100); // Wait 100ms to ensure LCD powered up
wim 38:cbe275b0b647 3267
wim 37:ce348c002929 3268 // Init the portexpander bus
wim 38:cbe275b0b647 3269 _lcd_bus = LCD_BUS_SPI_DEF;
wim 37:ce348c002929 3270
wim 37:ce348c002929 3271 // write the new data to the portexpander
wim 37:ce348c002929 3272 _cs = 0;
wim 37:ce348c002929 3273 _spi->write(_lcd_bus);
wim 37:ce348c002929 3274 _cs = 1;
wim 37:ce348c002929 3275
wim 37:ce348c002929 3276 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 37:ce348c002929 3277 }
wim 37:ce348c002929 3278
wim 37:ce348c002929 3279 // Set E pin (or E2 pin)
wim 37:ce348c002929 3280 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3281 void TextLCD_SPI::_setEnable(bool value) {
wim 37:ce348c002929 3282
wim 37:ce348c002929 3283 if(_ctrl_idx==_LCDCtrl_0) {
wim 37:ce348c002929 3284 if (value) {
wim 38:cbe275b0b647 3285 _lcd_bus |= LCD_BUS_SPI_E; // Set E bit
wim 37:ce348c002929 3286 }
wim 37:ce348c002929 3287 else {
wim 38:cbe275b0b647 3288 _lcd_bus &= ~LCD_BUS_SPI_E; // Reset E bit
wim 37:ce348c002929 3289 }
wim 37:ce348c002929 3290 }
wim 37:ce348c002929 3291 else {
wim 37:ce348c002929 3292 if (value) {
wim 38:cbe275b0b647 3293 _lcd_bus |= LCD_BUS_SPI_E2; // Set E2 bit
wim 37:ce348c002929 3294 }
wim 37:ce348c002929 3295 else {
wim 38:cbe275b0b647 3296 _lcd_bus &= ~LCD_BUS_SPI_E2; // Reset E2 bit
wim 37:ce348c002929 3297 }
wim 37:ce348c002929 3298 }
wim 37:ce348c002929 3299
wim 37:ce348c002929 3300 // write the new data to the SPI portexpander
wim 37:ce348c002929 3301 _cs = 0;
wim 37:ce348c002929 3302 _spi->write(_lcd_bus);
wim 37:ce348c002929 3303 _cs = 1;
wim 37:ce348c002929 3304 }
wim 37:ce348c002929 3305
wim 37:ce348c002929 3306 // Set RS pin
wim 37:ce348c002929 3307 // Used for mbed pins, I2C bus expander or SPI shiftregister and SPI_N
wim 37:ce348c002929 3308 void TextLCD_SPI::_setRS(bool value) {
wim 37:ce348c002929 3309
wim 37:ce348c002929 3310 if (value) {
wim 38:cbe275b0b647 3311 _lcd_bus |= LCD_BUS_SPI_RS; // Set RS bit
wim 37:ce348c002929 3312 }
wim 37:ce348c002929 3313 else {
wim 38:cbe275b0b647 3314 _lcd_bus &= ~LCD_BUS_SPI_RS; // Reset RS bit
wim 37:ce348c002929 3315 }
wim 37:ce348c002929 3316
wim 37:ce348c002929 3317 // write the new data to the SPI portexpander
wim 37:ce348c002929 3318 _cs = 0;
wim 37:ce348c002929 3319 _spi->write(_lcd_bus);
wim 37:ce348c002929 3320 _cs = 1;
wim 37:ce348c002929 3321 }
wim 37:ce348c002929 3322
wim 37:ce348c002929 3323 // Set BL pin
wim 37:ce348c002929 3324 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3325 void TextLCD_SPI::_setBL(bool value) {
wim 37:ce348c002929 3326
wim 37:ce348c002929 3327 if (value) {
wim 38:cbe275b0b647 3328 _lcd_bus |= LCD_BUS_SPI_BL; // Set BL bit
wim 37:ce348c002929 3329 }
wim 37:ce348c002929 3330 else {
wim 38:cbe275b0b647 3331 _lcd_bus &= ~LCD_BUS_SPI_BL; // Reset BL bit
wim 37:ce348c002929 3332 }
wim 37:ce348c002929 3333
wim 37:ce348c002929 3334 // write the new data to the SPI portexpander
wim 37:ce348c002929 3335 _cs = 0;
wim 37:ce348c002929 3336 _spi->write(_lcd_bus);
wim 37:ce348c002929 3337 _cs = 1;
wim 37:ce348c002929 3338 }
wim 21:9eb628d9e164 3339
wim 21:9eb628d9e164 3340 // Place the 4bit data on the databus
wim 37:ce348c002929 3341 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3342 void TextLCD_SPI::_setData(int value) {
wim 22:35742ec80c24 3343
wim 22:35742ec80c24 3344 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 3345 if (value & 0x01) {
wim 38:cbe275b0b647 3346 _lcd_bus |= LCD_BUS_SPI_D4; // Set Databit
wim 26:bd897a001012 3347 }
wim 37:ce348c002929 3348 else {
wim 38:cbe275b0b647 3349 _lcd_bus &= ~LCD_BUS_SPI_D4; // Reset Databit
wim 37:ce348c002929 3350 }
wim 37:ce348c002929 3351
wim 37:ce348c002929 3352 if (value & 0x02) {
wim 38:cbe275b0b647 3353 _lcd_bus |= LCD_BUS_SPI_D5; // Set Databit
wim 26:bd897a001012 3354 }
wim 26:bd897a001012 3355 else {
wim 38:cbe275b0b647 3356 _lcd_bus &= ~LCD_BUS_SPI_D5; // Reset Databit
wim 37:ce348c002929 3357 }
wim 37:ce348c002929 3358
wim 37:ce348c002929 3359 if (value & 0x04) {
wim 38:cbe275b0b647 3360 _lcd_bus |= LCD_BUS_SPI_D6; // Set Databit
wim 26:bd897a001012 3361 }
wim 37:ce348c002929 3362 else {
wim 38:cbe275b0b647 3363 _lcd_bus &= ~LCD_BUS_SPI_D6; // Reset Databit
wim 37:ce348c002929 3364 }
wim 37:ce348c002929 3365
wim 37:ce348c002929 3366 if (value & 0x08) {
wim 38:cbe275b0b647 3367 _lcd_bus |= LCD_BUS_SPI_D7; // Set Databit
wim 26:bd897a001012 3368 }
wim 26:bd897a001012 3369 else {
wim 38:cbe275b0b647 3370 _lcd_bus &= ~LCD_BUS_SPI_D7; // Reset Databit
wim 26:bd897a001012 3371 }
wim 21:9eb628d9e164 3372
wim 37:ce348c002929 3373 // write the new data to the SPI portexpander
wim 37:ce348c002929 3374 _cs = 0;
wim 37:ce348c002929 3375 _spi->write(_lcd_bus);
wim 37:ce348c002929 3376 _cs = 1;
wim 22:35742ec80c24 3377 }
wim 21:9eb628d9e164 3378
wim 37:ce348c002929 3379 #endif /* SPI Expander SN74595 */
wim 37:ce348c002929 3380 //---------- End TextLCD_SPI ------------
wim 21:9eb628d9e164 3381
wim 21:9eb628d9e164 3382
wim 28:30fa94f7341c 3383 //--------- Start TextLCD_I2C_N ---------
wim 34:e5a0dcb43ecc 3384 #if(LCD_I2C_N == 1) /* Native I2C */
wim 28:30fa94f7341c 3385
wim 28:30fa94f7341c 3386 /** Create a TextLCD interface using a controller with native I2C interface
wim 28:30fa94f7341c 3387 *
wim 28:30fa94f7341c 3388 * @param i2c I2C Bus
wim 28:30fa94f7341c 3389 * @param deviceAddress I2C slave address (default = 0x7C)
wim 28:30fa94f7341c 3390 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 28:30fa94f7341c 3391 * @param bl Backlight control line (optional, default = NC)
wim 28:30fa94f7341c 3392 * @param ctrl LCD controller (default = ST7032_3V3)
wim 28:30fa94f7341c 3393 */
wim 28:30fa94f7341c 3394 TextLCD_I2C_N::TextLCD_I2C_N(I2C *i2c, char deviceAddress, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 28:30fa94f7341c 3395 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3396
wim 33:900a94bc7585 3397 _i2c(i2c){
wim 30:033048611c01 3398
wim 28:30fa94f7341c 3399 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 3400
wim 28:30fa94f7341c 3401 // Setup the I2C bus
wim 29:a3663151aa65 3402 // The max bitrate for ST7032i is 400kbit, lets stick to default here
wim 29:a3663151aa65 3403 _i2c->frequency(100000);
wim 32:59c4b8f648d4 3404
wim 30:033048611c01 3405
wim 28:30fa94f7341c 3406 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 28:30fa94f7341c 3407 if (bl != NC) {
wim 28:30fa94f7341c 3408 _bl = new DigitalOut(bl); //Construct new pin
wim 28:30fa94f7341c 3409 _bl->write(0); //Deactivate
wim 28:30fa94f7341c 3410 }
wim 28:30fa94f7341c 3411 else {
wim 28:30fa94f7341c 3412 // No Hardware Backlight pin
wim 28:30fa94f7341c 3413 _bl = NULL; //Construct dummy pin
wim 28:30fa94f7341c 3414 }
wim 28:30fa94f7341c 3415
wim 30:033048611c01 3416 //Sanity check
wim 30:033048611c01 3417 if (_ctrl & LCD_C_I2C) {
wim 36:9f5f86dfd44a 3418 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3419 }
wim 30:033048611c01 3420 else {
wim 30:033048611c01 3421 error("Error: LCD Controller type does not support native I2C interface\n\r");
wim 30:033048611c01 3422 }
wim 28:30fa94f7341c 3423 }
wim 28:30fa94f7341c 3424
wim 28:30fa94f7341c 3425 TextLCD_I2C_N::~TextLCD_I2C_N() {
wim 28:30fa94f7341c 3426 if (_bl != NULL) {delete _bl;} // BL pin
wim 28:30fa94f7341c 3427 }
wim 28:30fa94f7341c 3428
wim 28:30fa94f7341c 3429 // Not used in this mode
wim 28:30fa94f7341c 3430 void TextLCD_I2C_N::_setEnable(bool value) {
wim 28:30fa94f7341c 3431 }
wim 28:30fa94f7341c 3432
wim 28:30fa94f7341c 3433 // Set RS pin
wim 28:30fa94f7341c 3434 // Used for mbed pins, I2C bus expander or SPI shiftregister and native I2C or SPI
wim 28:30fa94f7341c 3435 void TextLCD_I2C_N::_setRS(bool value) {
wim 30:033048611c01 3436 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3437 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3438 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3439 //
wim 30:033048611c01 3440 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3441 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3442 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3443 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3444 //
wim 30:033048611c01 3445
wim 28:30fa94f7341c 3446 if (value) {
wim 28:30fa94f7341c 3447 _controlbyte = 0x40; // Next byte is data, No more control bytes will follow
wim 28:30fa94f7341c 3448 }
wim 28:30fa94f7341c 3449 else {
wim 28:30fa94f7341c 3450 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 28:30fa94f7341c 3451 }
wim 28:30fa94f7341c 3452 }
wim 28:30fa94f7341c 3453
wim 28:30fa94f7341c 3454 // Set BL pin
wim 28:30fa94f7341c 3455 void TextLCD_I2C_N::_setBL(bool value) {
wim 28:30fa94f7341c 3456 if (_bl) {
wim 28:30fa94f7341c 3457 _bl->write(value);
wim 28:30fa94f7341c 3458 }
wim 28:30fa94f7341c 3459 }
wim 29:a3663151aa65 3460
wim 29:a3663151aa65 3461 // Not used in this mode
wim 29:a3663151aa65 3462 void TextLCD_I2C_N::_setData(int value) {
wim 29:a3663151aa65 3463 }
wim 29:a3663151aa65 3464
wim 28:30fa94f7341c 3465 // Write a byte using I2C
wim 28:30fa94f7341c 3466 void TextLCD_I2C_N::_writeByte(int value) {
wim 30:033048611c01 3467 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3468 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3469 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3470 //
wim 30:033048611c01 3471 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3472 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3473 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3474 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3475 //
wim 28:30fa94f7341c 3476 char data[] = {_controlbyte, value};
wim 28:30fa94f7341c 3477
wim 32:59c4b8f648d4 3478 #if(LCD_I2C_ACK==1)
wim 32:59c4b8f648d4 3479 //Controllers that support ACK
wim 30:033048611c01 3480 _i2c->write(_slaveAddress, data, 2);
wim 32:59c4b8f648d4 3481 #else
wim 32:59c4b8f648d4 3482 //Controllers that dont support ACK
wim 37:ce348c002929 3483 //Note: This may be issue with some mbed platforms that dont fully/correctly support I2C byte operations.
wim 32:59c4b8f648d4 3484 _i2c->start();
wim 32:59c4b8f648d4 3485 _i2c->write(_slaveAddress);
wim 32:59c4b8f648d4 3486 _i2c->write(data[0]);
wim 32:59c4b8f648d4 3487 _i2c->write(data[1]);
wim 32:59c4b8f648d4 3488 _i2c->stop();
wim 32:59c4b8f648d4 3489 #endif
wim 28:30fa94f7341c 3490 }
wim 34:e5a0dcb43ecc 3491 #endif /* Native I2C */
wim 28:30fa94f7341c 3492 //-------- End TextLCD_I2C_N ------------
wim 28:30fa94f7341c 3493
wim 28:30fa94f7341c 3494
wim 25:6162b31128c9 3495 //--------- Start TextLCD_SPI_N ---------
wim 34:e5a0dcb43ecc 3496 #if(LCD_SPI_N == 1) /* Native SPI bus */
wim 30:033048611c01 3497 /** Create a TextLCD interface using a controller with a native SPI4 interface
Sissors 24:fb3399713710 3498 *
Sissors 24:fb3399713710 3499 * @param spi SPI Bus
Sissors 24:fb3399713710 3500 * @param cs chip select pin (active low)
wim 25:6162b31128c9 3501 * @param rs Instruction/data control line
Sissors 24:fb3399713710 3502 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 25:6162b31128c9 3503 * @param bl Backlight control line (optional, default = NC)
wim 26:bd897a001012 3504 * @param ctrl LCD controller (default = ST7032_3V3)
wim 25:6162b31128c9 3505 */
wim 25:6162b31128c9 3506 TextLCD_SPI_N::TextLCD_SPI_N(SPI *spi, PinName cs, PinName rs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 25:6162b31128c9 3507 TextLCD_Base(type, ctrl),
wim 25:6162b31128c9 3508 _spi(spi),
wim 25:6162b31128c9 3509 _cs(cs),
wim 25:6162b31128c9 3510 _rs(rs) {
Sissors 24:fb3399713710 3511
wim 32:59c4b8f648d4 3512 // Init CS
wim 32:59c4b8f648d4 3513 _cs = 1;
wim 32:59c4b8f648d4 3514
wim 36:9f5f86dfd44a 3515 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3516 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3517 // _spi->format(8,3);
wim 37:ce348c002929 3518 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3519 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3520
Sissors 24:fb3399713710 3521 // Setup the spi for 8 bit data, low steady state clock,
Sissors 24:fb3399713710 3522 // rising edge capture, with a 500KHz or 1MHz clock rate
Sissors 24:fb3399713710 3523 _spi->format(8,0);
wim 36:9f5f86dfd44a 3524 // _spi->frequency(500000);
Sissors 24:fb3399713710 3525 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3526
Sissors 24:fb3399713710 3527 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
Sissors 24:fb3399713710 3528 if (bl != NC) {
Sissors 24:fb3399713710 3529 _bl = new DigitalOut(bl); //Construct new pin
Sissors 24:fb3399713710 3530 _bl->write(0); //Deactivate
Sissors 24:fb3399713710 3531 }
Sissors 24:fb3399713710 3532 else {
Sissors 24:fb3399713710 3533 // No Hardware Backlight pin
Sissors 24:fb3399713710 3534 _bl = NULL; //Construct dummy pin
Sissors 24:fb3399713710 3535 }
wim 30:033048611c01 3536
wim 30:033048611c01 3537 //Sanity check
wim 30:033048611c01 3538 if (_ctrl & LCD_C_SPI4) {
wim 36:9f5f86dfd44a 3539 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3540 // ST7070 must set datalength to 8 bits!
wim 30:033048611c01 3541 }
wim 30:033048611c01 3542 else {
wim 30:033048611c01 3543 error("Error: LCD Controller type does not support native SPI4 interface\n\r");
wim 30:033048611c01 3544 }
Sissors 24:fb3399713710 3545 }
Sissors 24:fb3399713710 3546
wim 25:6162b31128c9 3547 TextLCD_SPI_N::~TextLCD_SPI_N() {
Sissors 24:fb3399713710 3548 if (_bl != NULL) {delete _bl;} // BL pin
Sissors 24:fb3399713710 3549 }
Sissors 24:fb3399713710 3550
Sissors 24:fb3399713710 3551 // Not used in this mode
wim 25:6162b31128c9 3552 void TextLCD_SPI_N::_setEnable(bool value) {
Sissors 24:fb3399713710 3553 }
Sissors 24:fb3399713710 3554
Sissors 24:fb3399713710 3555 // Set RS pin
wim 36:9f5f86dfd44a 3556 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 25:6162b31128c9 3557 void TextLCD_SPI_N::_setRS(bool value) {
Sissors 24:fb3399713710 3558 _rs = value;
Sissors 24:fb3399713710 3559 }
Sissors 24:fb3399713710 3560
Sissors 24:fb3399713710 3561 // Set BL pin
wim 25:6162b31128c9 3562 void TextLCD_SPI_N::_setBL(bool value) {
wim 26:bd897a001012 3563 if (_bl) {
Sissors 24:fb3399713710 3564 _bl->write(value);
wim 26:bd897a001012 3565 }
Sissors 24:fb3399713710 3566 }
Sissors 24:fb3399713710 3567
wim 29:a3663151aa65 3568 // Not used in this mode
wim 29:a3663151aa65 3569 void TextLCD_SPI_N::_setData(int value) {
wim 29:a3663151aa65 3570 }
wim 29:a3663151aa65 3571
Sissors 24:fb3399713710 3572 // Write a byte using SPI
wim 25:6162b31128c9 3573 void TextLCD_SPI_N::_writeByte(int value) {
Sissors 24:fb3399713710 3574 _cs = 0;
Sissors 24:fb3399713710 3575 wait_us(1);
Sissors 24:fb3399713710 3576 _spi->write(value);
Sissors 24:fb3399713710 3577 wait_us(1);
Sissors 24:fb3399713710 3578 _cs = 1;
Sissors 24:fb3399713710 3579 }
wim 34:e5a0dcb43ecc 3580 #endif /* Native SPI bus */
wim 25:6162b31128c9 3581 //-------- End TextLCD_SPI_N ------------
wim 21:9eb628d9e164 3582
wim 21:9eb628d9e164 3583
wim 36:9f5f86dfd44a 3584 //-------- Start TextLCD_SPI_N_3_8 --------
wim 36:9f5f86dfd44a 3585 #if(LCD_SPI_N_3_8 == 1) /* Native SPI bus */
wim 36:9f5f86dfd44a 3586
wim 36:9f5f86dfd44a 3587 /** Create a TextLCD interface using a controller with a native SPI3 8 bits interface
wim 36:9f5f86dfd44a 3588 * This mode is supported by ST7070. Note that implementation in TexTLCD is not very efficient due to
wim 36:9f5f86dfd44a 3589 * structure of the TextLCD library: each databyte is written separately and requires a separate 'count command' set to 1 byte.
wim 36:9f5f86dfd44a 3590 *
wim 36:9f5f86dfd44a 3591 * @param spi SPI Bus
wim 36:9f5f86dfd44a 3592 * @param cs chip select pin (active low)
wim 36:9f5f86dfd44a 3593 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 36:9f5f86dfd44a 3594 * @param bl Backlight control line (optional, default = NC)
wim 36:9f5f86dfd44a 3595 * @param ctrl LCD controller (default = ST7070)
wim 36:9f5f86dfd44a 3596 */
wim 36:9f5f86dfd44a 3597 TextLCD_SPI_N_3_8::TextLCD_SPI_N_3_8(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 36:9f5f86dfd44a 3598 TextLCD_Base(type, ctrl),
wim 36:9f5f86dfd44a 3599 _spi(spi),
wim 36:9f5f86dfd44a 3600 _cs(cs) {
wim 36:9f5f86dfd44a 3601
wim 36:9f5f86dfd44a 3602 // Init CS
wim 36:9f5f86dfd44a 3603 _cs = 1;
wim 36:9f5f86dfd44a 3604
wim 36:9f5f86dfd44a 3605 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3606 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3607 // _spi->format(8,3);
wim 37:ce348c002929 3608 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3609 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3610
wim 36:9f5f86dfd44a 3611 // Setup the spi for 8 bit data, low steady state clock,
wim 36:9f5f86dfd44a 3612 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3613 _spi->format(8,0);
wim 36:9f5f86dfd44a 3614 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3615 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3616
wim 36:9f5f86dfd44a 3617
wim 36:9f5f86dfd44a 3618 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 36:9f5f86dfd44a 3619 if (bl != NC) {
wim 36:9f5f86dfd44a 3620 _bl = new DigitalOut(bl); //Construct new pin
wim 36:9f5f86dfd44a 3621 _bl->write(0); //Deactivate
wim 36:9f5f86dfd44a 3622 }
wim 36:9f5f86dfd44a 3623 else {
wim 36:9f5f86dfd44a 3624 // No Hardware Backlight pin
wim 36:9f5f86dfd44a 3625 _bl = NULL; //Construct dummy pin
wim 36:9f5f86dfd44a 3626 }
wim 36:9f5f86dfd44a 3627
wim 36:9f5f86dfd44a 3628 //Sanity check
wim 36:9f5f86dfd44a 3629 if (_ctrl & LCD_C_SPI3_8) {
wim 36:9f5f86dfd44a 3630 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3631 }
wim 36:9f5f86dfd44a 3632 else {
wim 36:9f5f86dfd44a 3633 error("Error: LCD Controller type does not support native SPI3 8 bits interface\n\r");
wim 36:9f5f86dfd44a 3634 }
wim 36:9f5f86dfd44a 3635 }
wim 36:9f5f86dfd44a 3636
wim 36:9f5f86dfd44a 3637 TextLCD_SPI_N_3_8::~TextLCD_SPI_N_3_8() {
wim 36:9f5f86dfd44a 3638 if (_bl != NULL) {delete _bl;} // BL pin
wim 36:9f5f86dfd44a 3639 }
wim 36:9f5f86dfd44a 3640
wim 36:9f5f86dfd44a 3641 // Not used in this mode
wim 36:9f5f86dfd44a 3642 void TextLCD_SPI_N_3_8::_setEnable(bool value) {
wim 36:9f5f86dfd44a 3643 }
wim 36:9f5f86dfd44a 3644
wim 36:9f5f86dfd44a 3645 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 36:9f5f86dfd44a 3646 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 36:9f5f86dfd44a 3647 void TextLCD_SPI_N_3_8::_setRS(bool value) {
wim 36:9f5f86dfd44a 3648
wim 36:9f5f86dfd44a 3649 if (value) {
wim 36:9f5f86dfd44a 3650 _controlbyte = 0x01; // Next byte is data, No more control bytes will follow
wim 36:9f5f86dfd44a 3651 }
wim 36:9f5f86dfd44a 3652 else {
wim 36:9f5f86dfd44a 3653 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 36:9f5f86dfd44a 3654 }
wim 36:9f5f86dfd44a 3655 }
wim 36:9f5f86dfd44a 3656
wim 36:9f5f86dfd44a 3657 // Set BL pin
wim 36:9f5f86dfd44a 3658 void TextLCD_SPI_N_3_8::_setBL(bool value) {
wim 36:9f5f86dfd44a 3659 if (_bl) {
wim 36:9f5f86dfd44a 3660 _bl->write(value);
wim 36:9f5f86dfd44a 3661 }
wim 36:9f5f86dfd44a 3662 }
wim 36:9f5f86dfd44a 3663
wim 36:9f5f86dfd44a 3664 // Not used in this mode
wim 36:9f5f86dfd44a 3665 void TextLCD_SPI_N_3_8::_setData(int value) {
wim 36:9f5f86dfd44a 3666 }
wim 36:9f5f86dfd44a 3667
wim 36:9f5f86dfd44a 3668 // Write a byte using SPI3 8 bits mode (ST7070)
wim 36:9f5f86dfd44a 3669 void TextLCD_SPI_N_3_8::_writeByte(int value) {
wim 36:9f5f86dfd44a 3670
wim 36:9f5f86dfd44a 3671 if (_controlbyte == 0x00) { // Byte is command
wim 36:9f5f86dfd44a 3672 _cs = 0;
wim 36:9f5f86dfd44a 3673 wait_us(1);
wim 36:9f5f86dfd44a 3674 _spi->write(value);
wim 36:9f5f86dfd44a 3675 wait_us(1);
wim 36:9f5f86dfd44a 3676 _cs = 1;
wim 36:9f5f86dfd44a 3677 }
wim 36:9f5f86dfd44a 3678 else { // Byte is data
wim 36:9f5f86dfd44a 3679 // Select Extended Instr Set
wim 36:9f5f86dfd44a 3680 _cs = 0;
wim 36:9f5f86dfd44a 3681 wait_us(1);
wim 36:9f5f86dfd44a 3682 _spi->write(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1));
wim 36:9f5f86dfd44a 3683 wait_us(1);
wim 36:9f5f86dfd44a 3684 _cs = 1;
wim 36:9f5f86dfd44a 3685
wim 36:9f5f86dfd44a 3686 wait_us(40); // Wait until command has finished...
wim 36:9f5f86dfd44a 3687
wim 36:9f5f86dfd44a 3688 // Set Count to 1 databyte
wim 36:9f5f86dfd44a 3689 _cs = 0;
wim 36:9f5f86dfd44a 3690 wait_us(1);
wim 36:9f5f86dfd44a 3691 _spi->write(0x80); // Set display data length, 1 L6 L5 L4 L3 L2 L1 L0 (Instr Set = 1)
wim 36:9f5f86dfd44a 3692 wait_us(1);
wim 36:9f5f86dfd44a 3693 _cs = 1;
wim 36:9f5f86dfd44a 3694
wim 36:9f5f86dfd44a 3695 wait_us(40);
wim 36:9f5f86dfd44a 3696
wim 36:9f5f86dfd44a 3697 // Write 1 databyte
wim 36:9f5f86dfd44a 3698 _cs = 0;
wim 36:9f5f86dfd44a 3699 wait_us(1);
wim 36:9f5f86dfd44a 3700 _spi->write(value); // Write data (Instr Set = 1)
wim 36:9f5f86dfd44a 3701 wait_us(1);
wim 36:9f5f86dfd44a 3702 _cs = 1;
wim 36:9f5f86dfd44a 3703
wim 36:9f5f86dfd44a 3704 wait_us(40);
wim 36:9f5f86dfd44a 3705
wim 36:9f5f86dfd44a 3706 // Select Standard Instr Set
wim 36:9f5f86dfd44a 3707 _cs = 0;
wim 36:9f5f86dfd44a 3708 wait_us(1);
wim 36:9f5f86dfd44a 3709 _spi->write(0x20 | _function); // Set function, 0 0 1 DL N EXT=0 x x (Select Instr Set = 0));
wim 36:9f5f86dfd44a 3710 wait_us(1);
wim 36:9f5f86dfd44a 3711 _cs = 1;
wim 36:9f5f86dfd44a 3712 }
wim 36:9f5f86dfd44a 3713 }
wim 36:9f5f86dfd44a 3714 #endif /* Native SPI bus */
wim 36:9f5f86dfd44a 3715 //------- End TextLCD_SPI_N_3_8 -----------
wim 36:9f5f86dfd44a 3716
wim 36:9f5f86dfd44a 3717
wim 30:033048611c01 3718 //-------- Start TextLCD_SPI_N_3_9 --------
wim 34:e5a0dcb43ecc 3719 #if(LCD_SPI_N_3_9 == 1) /* Native SPI bus */
wim 34:e5a0dcb43ecc 3720 //Code checked out on logic analyser. Not yet tested on hardware..
wim 30:033048611c01 3721
wim 30:033048611c01 3722 /** Create a TextLCD interface using a controller with a native SPI3 9 bits interface
wim 30:033048611c01 3723 *
wim 30:033048611c01 3724 * @param spi SPI Bus
wim 30:033048611c01 3725 * @param cs chip select pin (active low)
wim 30:033048611c01 3726 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3727 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3728 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3729 */
wim 30:033048611c01 3730 TextLCD_SPI_N_3_9::TextLCD_SPI_N_3_9(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3731 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3732 _spi(spi),
wim 33:900a94bc7585 3733 _cs(cs) {
wim 32:59c4b8f648d4 3734
wim 32:59c4b8f648d4 3735 // Init CS
wim 32:59c4b8f648d4 3736 _cs = 1;
wim 32:59c4b8f648d4 3737
wim 34:e5a0dcb43ecc 3738 // Setup the spi for 9 bit data, high steady state clock,
wim 30:033048611c01 3739 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3740 _spi->format(9,3);
wim 30:033048611c01 3741 _spi->frequency(1000000);
wim 30:033048611c01 3742
wim 30:033048611c01 3743 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3744 if (bl != NC) {
wim 30:033048611c01 3745 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3746 _bl->write(0); //Deactivate
wim 30:033048611c01 3747 }
wim 30:033048611c01 3748 else {
wim 30:033048611c01 3749 // No Hardware Backlight pin
wim 30:033048611c01 3750 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3751 }
wim 30:033048611c01 3752
wim 30:033048611c01 3753 //Sanity check
wim 36:9f5f86dfd44a 3754 if (_ctrl & LCD_C_SPI3_9) {
wim 36:9f5f86dfd44a 3755 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3756 }
wim 30:033048611c01 3757 else {
wim 30:033048611c01 3758 error("Error: LCD Controller type does not support native SPI3 9 bits interface\n\r");
wim 30:033048611c01 3759 }
wim 30:033048611c01 3760 }
wim 30:033048611c01 3761
wim 30:033048611c01 3762 TextLCD_SPI_N_3_9::~TextLCD_SPI_N_3_9() {
wim 30:033048611c01 3763 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3764 }
wim 30:033048611c01 3765
wim 30:033048611c01 3766 // Not used in this mode
wim 30:033048611c01 3767 void TextLCD_SPI_N_3_9::_setEnable(bool value) {
wim 30:033048611c01 3768 }
wim 30:033048611c01 3769
wim 30:033048611c01 3770 // Set RS pin
wim 30:033048611c01 3771 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3772 void TextLCD_SPI_N_3_9::_setRS(bool value) {
wim 30:033048611c01 3773 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3774 // b8 b7...........b0
wim 30:033048611c01 3775 // RS command or data
wim 30:033048611c01 3776 //
wim 30:033048611c01 3777 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3778 //
wim 30:033048611c01 3779
wim 30:033048611c01 3780 if (value) {
wim 30:033048611c01 3781 _controlbyte = 0x01; // Next byte is data
wim 30:033048611c01 3782 }
wim 30:033048611c01 3783 else {
wim 30:033048611c01 3784 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3785 }
wim 30:033048611c01 3786 }
wim 30:033048611c01 3787
wim 30:033048611c01 3788 // Set BL pin
wim 30:033048611c01 3789 void TextLCD_SPI_N_3_9::_setBL(bool value) {
wim 30:033048611c01 3790 if (_bl) {
wim 30:033048611c01 3791 _bl->write(value);
wim 30:033048611c01 3792 }
wim 30:033048611c01 3793 }
wim 30:033048611c01 3794
wim 30:033048611c01 3795 // Not used in this mode
wim 30:033048611c01 3796 void TextLCD_SPI_N_3_9::_setData(int value) {
wim 30:033048611c01 3797 }
wim 30:033048611c01 3798
wim 30:033048611c01 3799 // Write a byte using SPI3 9 bits mode
wim 30:033048611c01 3800 void TextLCD_SPI_N_3_9::_writeByte(int value) {
wim 30:033048611c01 3801 _cs = 0;
wim 30:033048611c01 3802 wait_us(1);
wim 30:033048611c01 3803 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3804 wait_us(1);
wim 30:033048611c01 3805 _cs = 1;
wim 30:033048611c01 3806 }
wim 34:e5a0dcb43ecc 3807 #endif /* Native SPI bus */
wim 30:033048611c01 3808 //------- End TextLCD_SPI_N_3_9 -----------
wim 34:e5a0dcb43ecc 3809
wim 34:e5a0dcb43ecc 3810
wim 30:033048611c01 3811 //------- Start TextLCD_SPI_N_3_10 --------
wim 34:e5a0dcb43ecc 3812 #if(LCD_SPI_N_3_10 == 1) /* Native SPI bus */
wim 30:033048611c01 3813
wim 30:033048611c01 3814 /** Create a TextLCD interface using a controller with a native SPI3 10 bits interface
wim 30:033048611c01 3815 *
wim 30:033048611c01 3816 * @param spi SPI Bus
wim 30:033048611c01 3817 * @param cs chip select pin (active low)
wim 30:033048611c01 3818 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3819 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3820 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3821 */
wim 30:033048611c01 3822 TextLCD_SPI_N_3_10::TextLCD_SPI_N_3_10(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3823 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3824 _spi(spi),
wim 30:033048611c01 3825 _cs(cs) {
wim 30:033048611c01 3826
wim 32:59c4b8f648d4 3827 // Init CS
wim 32:59c4b8f648d4 3828 _cs = 1;
wim 32:59c4b8f648d4 3829
wim 30:033048611c01 3830 // Setup the spi for 10 bit data, low steady state clock,
wim 30:033048611c01 3831 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 30:033048611c01 3832 _spi->format(10,0);
wim 30:033048611c01 3833 _spi->frequency(1000000);
wim 30:033048611c01 3834
wim 30:033048611c01 3835 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3836 if (bl != NC) {
wim 30:033048611c01 3837 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3838 _bl->write(0); //Deactivate
wim 30:033048611c01 3839 }
wim 30:033048611c01 3840 else {
wim 30:033048611c01 3841 // No Hardware Backlight pin
wim 30:033048611c01 3842 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3843 }
wim 30:033048611c01 3844
wim 30:033048611c01 3845 //Sanity check
wim 30:033048611c01 3846 if (_ctrl & LCD_C_SPI3_10) {
wim 36:9f5f86dfd44a 3847 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3848 }
wim 30:033048611c01 3849 else {
wim 30:033048611c01 3850 error("Error: LCD Controller type does not support native SPI3 10 bits interface\n\r");
wim 30:033048611c01 3851 }
wim 30:033048611c01 3852 }
wim 30:033048611c01 3853
wim 30:033048611c01 3854 TextLCD_SPI_N_3_10::~TextLCD_SPI_N_3_10() {
wim 30:033048611c01 3855 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3856 }
wim 30:033048611c01 3857
wim 30:033048611c01 3858 // Not used in this mode
wim 30:033048611c01 3859 void TextLCD_SPI_N_3_10::_setEnable(bool value) {
wim 30:033048611c01 3860 }
wim 30:033048611c01 3861
wim 30:033048611c01 3862 // Set RS pin
wim 30:033048611c01 3863 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3864 void TextLCD_SPI_N_3_10::_setRS(bool value) {
wim 30:033048611c01 3865 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3866 // b9 b8 b7...........b0
wim 30:033048611c01 3867 // RS RW command or data
wim 30:033048611c01 3868 //
wim 30:033048611c01 3869 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3870 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 30:033048611c01 3871 //
wim 30:033048611c01 3872
wim 30:033048611c01 3873 if (value) {
wim 30:033048611c01 3874 _controlbyte = 0x02; // Next byte is data
wim 30:033048611c01 3875 }
wim 30:033048611c01 3876 else {
wim 30:033048611c01 3877 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3878 }
wim 30:033048611c01 3879 }
wim 30:033048611c01 3880
wim 30:033048611c01 3881 // Set BL pin
wim 30:033048611c01 3882 void TextLCD_SPI_N_3_10::_setBL(bool value) {
wim 30:033048611c01 3883 if (_bl) {
wim 30:033048611c01 3884 _bl->write(value);
wim 30:033048611c01 3885 }
wim 30:033048611c01 3886 }
wim 30:033048611c01 3887
wim 30:033048611c01 3888 // Not used in this mode
wim 30:033048611c01 3889 void TextLCD_SPI_N_3_10::_setData(int value) {
wim 30:033048611c01 3890 }
wim 30:033048611c01 3891
wim 30:033048611c01 3892 // Write a byte using SPI3 10 bits mode
wim 30:033048611c01 3893 void TextLCD_SPI_N_3_10::_writeByte(int value) {
wim 30:033048611c01 3894 _cs = 0;
wim 30:033048611c01 3895 wait_us(1);
wim 30:033048611c01 3896 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3897 wait_us(1);
wim 30:033048611c01 3898 _cs = 1;
wim 30:033048611c01 3899 }
wim 34:e5a0dcb43ecc 3900 #endif /* Native SPI bus */
wim 30:033048611c01 3901 //------- End TextLCD_SPI_N_3_10 ----------
wim 34:e5a0dcb43ecc 3902
wim 32:59c4b8f648d4 3903
wim 32:59c4b8f648d4 3904 //------- Start TextLCD_SPI_N_3_16 --------
wim 34:e5a0dcb43ecc 3905 #if(LCD_SPI_N_3_16 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 3906
wim 32:59c4b8f648d4 3907 /** Create a TextLCD interface using a controller with a native SPI3 16 bits interface
wim 32:59c4b8f648d4 3908 *
wim 32:59c4b8f648d4 3909 * @param spi SPI Bus
wim 32:59c4b8f648d4 3910 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 3911 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 3912 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 3913 * @param ctrl LCD controller (default = PT6314)
wim 32:59c4b8f648d4 3914 */
wim 32:59c4b8f648d4 3915 TextLCD_SPI_N_3_16::TextLCD_SPI_N_3_16(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 3916 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3917 _spi(spi),
wim 32:59c4b8f648d4 3918 _cs(cs) {
wim 32:59c4b8f648d4 3919
wim 32:59c4b8f648d4 3920 // Init CS
wim 32:59c4b8f648d4 3921 _cs = 1;
wim 32:59c4b8f648d4 3922
wim 32:59c4b8f648d4 3923 // Setup the spi for 8 bit data, low steady state clock,
wim 32:59c4b8f648d4 3924 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3925 _spi->format(8,0);
wim 32:59c4b8f648d4 3926 _spi->frequency(1000000);
wim 32:59c4b8f648d4 3927
wim 32:59c4b8f648d4 3928 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 3929 if (bl != NC) {
wim 32:59c4b8f648d4 3930 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 3931 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 3932 }
wim 32:59c4b8f648d4 3933 else {
wim 32:59c4b8f648d4 3934 // No Hardware Backlight pin
wim 32:59c4b8f648d4 3935 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 3936 }
wim 32:59c4b8f648d4 3937
wim 32:59c4b8f648d4 3938 //Sanity check
wim 32:59c4b8f648d4 3939 if (_ctrl & LCD_C_SPI3_16) {
wim 36:9f5f86dfd44a 3940 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 3941 }
wim 32:59c4b8f648d4 3942 else {
wim 32:59c4b8f648d4 3943 error("Error: LCD Controller type does not support native SPI3 16 bits interface\n\r");
wim 32:59c4b8f648d4 3944 }
wim 32:59c4b8f648d4 3945 }
wim 32:59c4b8f648d4 3946
wim 32:59c4b8f648d4 3947 TextLCD_SPI_N_3_16::~TextLCD_SPI_N_3_16() {
wim 32:59c4b8f648d4 3948 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 3949 }
wim 32:59c4b8f648d4 3950
wim 32:59c4b8f648d4 3951 // Not used in this mode
wim 32:59c4b8f648d4 3952 void TextLCD_SPI_N_3_16::_setEnable(bool value) {
wim 32:59c4b8f648d4 3953 }
wim 32:59c4b8f648d4 3954
wim 32:59c4b8f648d4 3955 // Set RS pin
wim 32:59c4b8f648d4 3956 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 3957 void TextLCD_SPI_N_3_16::_setRS(bool value) {
wim 32:59c4b8f648d4 3958 // The 16bit mode is split in 2 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next byte.
wim 32:59c4b8f648d4 3959 // The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 3960 // b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 3961 // 1 1 1 1 1 RW RS 0 d7 d6 d5 d4 d3 d2 d1 d0
wim 32:59c4b8f648d4 3962 //
wim 32:59c4b8f648d4 3963 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 3964 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 3965 //
wim 32:59c4b8f648d4 3966
wim 32:59c4b8f648d4 3967 if (value) {
wim 32:59c4b8f648d4 3968 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 3969 }
wim 32:59c4b8f648d4 3970 else {
wim 32:59c4b8f648d4 3971 _controlbyte = 0xF8; // Next byte is command
wim 32:59c4b8f648d4 3972 }
wim 32:59c4b8f648d4 3973 }
wim 32:59c4b8f648d4 3974
wim 32:59c4b8f648d4 3975 // Set BL pin
wim 32:59c4b8f648d4 3976 void TextLCD_SPI_N_3_16::_setBL(bool value) {
wim 32:59c4b8f648d4 3977 if (_bl) {
wim 32:59c4b8f648d4 3978 _bl->write(value);
wim 32:59c4b8f648d4 3979 }
wim 32:59c4b8f648d4 3980 }
wim 32:59c4b8f648d4 3981
wim 32:59c4b8f648d4 3982 // Not used in this mode
wim 32:59c4b8f648d4 3983 void TextLCD_SPI_N_3_16::_setData(int value) {
wim 32:59c4b8f648d4 3984 }
wim 34:e5a0dcb43ecc 3985
wim 32:59c4b8f648d4 3986 // Write a byte using SPI3 16 bits mode
wim 32:59c4b8f648d4 3987 void TextLCD_SPI_N_3_16::_writeByte(int value) {
wim 32:59c4b8f648d4 3988 _cs = 0;
wim 32:59c4b8f648d4 3989 wait_us(1);
wim 32:59c4b8f648d4 3990
wim 32:59c4b8f648d4 3991 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 3992
wim 32:59c4b8f648d4 3993 _spi->write(value);
wim 32:59c4b8f648d4 3994
wim 32:59c4b8f648d4 3995 wait_us(1);
wim 32:59c4b8f648d4 3996 _cs = 1;
wim 32:59c4b8f648d4 3997 }
wim 34:e5a0dcb43ecc 3998 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 3999 //------- End TextLCD_SPI_N_3_16 ----------
wim 34:e5a0dcb43ecc 4000
wim 34:e5a0dcb43ecc 4001
wim 32:59c4b8f648d4 4002 //------- Start TextLCD_SPI_N_3_24 --------
wim 34:e5a0dcb43ecc 4003 #if(LCD_SPI_N_3_24 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 4004
wim 32:59c4b8f648d4 4005 /** Create a TextLCD interface using a controller with a native SPI3 24 bits interface
wim 32:59c4b8f648d4 4006 *
wim 32:59c4b8f648d4 4007 * @param spi SPI Bus
wim 32:59c4b8f648d4 4008 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 4009 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 4010 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 4011 * @param ctrl LCD controller (default = SSD1803)
wim 32:59c4b8f648d4 4012 */
wim 32:59c4b8f648d4 4013 TextLCD_SPI_N_3_24::TextLCD_SPI_N_3_24(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 4014 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 4015 _spi(spi),
wim 32:59c4b8f648d4 4016 _cs(cs) {
wim 32:59c4b8f648d4 4017
wim 32:59c4b8f648d4 4018 // Init CS
wim 32:59c4b8f648d4 4019 _cs = 1;
wim 32:59c4b8f648d4 4020
wim 34:e5a0dcb43ecc 4021 // Setup the spi for 8 bit data, high steady state clock,
wim 32:59c4b8f648d4 4022 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 34:e5a0dcb43ecc 4023 _spi->format(8,3);
wim 32:59c4b8f648d4 4024 _spi->frequency(1000000);
wim 32:59c4b8f648d4 4025
wim 32:59c4b8f648d4 4026 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 4027 if (bl != NC) {
wim 32:59c4b8f648d4 4028 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 4029 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 4030 }
wim 32:59c4b8f648d4 4031 else {
wim 32:59c4b8f648d4 4032 // No Hardware Backlight pin
wim 32:59c4b8f648d4 4033 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 4034 }
wim 32:59c4b8f648d4 4035
wim 32:59c4b8f648d4 4036 //Sanity check
wim 32:59c4b8f648d4 4037 if (_ctrl & LCD_C_SPI3_24) {
wim 36:9f5f86dfd44a 4038 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 4039 }
wim 32:59c4b8f648d4 4040 else {
wim 32:59c4b8f648d4 4041 error("Error: LCD Controller type does not support native SPI3 24 bits interface\n\r");
wim 32:59c4b8f648d4 4042 }
wim 32:59c4b8f648d4 4043 }
wim 32:59c4b8f648d4 4044
wim 32:59c4b8f648d4 4045 TextLCD_SPI_N_3_24::~TextLCD_SPI_N_3_24() {
wim 32:59c4b8f648d4 4046 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 4047 }
wim 32:59c4b8f648d4 4048
wim 32:59c4b8f648d4 4049 // Not used in this mode
wim 32:59c4b8f648d4 4050 void TextLCD_SPI_N_3_24::_setEnable(bool value) {
wim 32:59c4b8f648d4 4051 }
wim 32:59c4b8f648d4 4052
wim 32:59c4b8f648d4 4053 // Set RS pin
wim 32:59c4b8f648d4 4054 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 4055 void TextLCD_SPI_N_3_24::_setRS(bool value) {
wim 32:59c4b8f648d4 4056 // The 24bit mode is split in 3 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next two bytes.
wim 32:59c4b8f648d4 4057 // Each byte encodes 4 actual bits. The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 4058 // b23 b22 b21 b20 b19 b18 b17 b16 - b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 4059 // 1 1 1 1 1 RW RS 0 d0 d1 d2 d3 0 0 0 0 d4 d5 d6 d7 0 0 0 0
wim 32:59c4b8f648d4 4060 //
wim 32:59c4b8f648d4 4061 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 4062 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 4063 //
wim 32:59c4b8f648d4 4064 // Note: SPI3_24 expects LSB first. This is inconsistent with regular SPI convention (and hardware) that sends MSB first.
wim 32:59c4b8f648d4 4065
wim 32:59c4b8f648d4 4066 if (value) {
wim 32:59c4b8f648d4 4067 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 4068 }
wim 32:59c4b8f648d4 4069 else {
wim 32:59c4b8f648d4 4070 _controlbyte = 0xF8; // Next byte is command
wim 34:e5a0dcb43ecc 4071 }
wim 32:59c4b8f648d4 4072 }
wim 32:59c4b8f648d4 4073
wim 32:59c4b8f648d4 4074 // Set BL pin
wim 32:59c4b8f648d4 4075 void TextLCD_SPI_N_3_24::_setBL(bool value) {
wim 32:59c4b8f648d4 4076 if (_bl) {
wim 32:59c4b8f648d4 4077 _bl->write(value);
wim 32:59c4b8f648d4 4078 }
wim 32:59c4b8f648d4 4079 }
wim 32:59c4b8f648d4 4080
wim 32:59c4b8f648d4 4081 // Not used in this mode
wim 32:59c4b8f648d4 4082 void TextLCD_SPI_N_3_24::_setData(int value) {
wim 32:59c4b8f648d4 4083 }
wim 32:59c4b8f648d4 4084
wim 32:59c4b8f648d4 4085 //Mapping table to flip the bits around cause SPI3_24 expects LSB first.
wim 32:59c4b8f648d4 4086 const uint8_t map3_24[16] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0};
wim 32:59c4b8f648d4 4087
wim 32:59c4b8f648d4 4088 // Write a byte using SPI3 24 bits mode
wim 32:59c4b8f648d4 4089 void TextLCD_SPI_N_3_24::_writeByte(int value) {
wim 32:59c4b8f648d4 4090 _cs = 0;
wim 32:59c4b8f648d4 4091 wait_us(1);
wim 32:59c4b8f648d4 4092 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 4093
wim 32:59c4b8f648d4 4094 //Map and send the LSB nibble
wim 32:59c4b8f648d4 4095 _spi->write( map3_24[value & 0x0F]);
wim 32:59c4b8f648d4 4096
wim 32:59c4b8f648d4 4097 //Map and send the MSB nibble
wim 32:59c4b8f648d4 4098 _spi->write( map3_24[(value >> 4) & 0x0F]);
wim 32:59c4b8f648d4 4099
wim 32:59c4b8f648d4 4100 wait_us(1);
wim 32:59c4b8f648d4 4101 _cs = 1;
wim 32:59c4b8f648d4 4102 }
wim 34:e5a0dcb43ecc 4103 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 4104 //------- End TextLCD_SPI_N_3_24 ----------