Updated for more display types. Fixed memoryaddress confusion in address() method. Added new getAddress() method. Added support for UDCs, Backlight control and other features such as control through I2C and SPI port expanders and controllers with native I2C and SPI interfaces. Refactored to fix issue with pins that are default declared as NC.

Dependents:   GPSDevice TestTextLCD SD to Flash Data Transfer DrumMachine ... more

Fork of TextLCD by Simon Ford

Example

Hello World! for the TextLCD

#include "mbed.h"
#include "TextLCD.h"
 
// Host PC Communication channels
Serial pc(USBTX, USBRX); // tx, rx
 
// I2C Communication
I2C i2c_lcd(p28,p27); // SDA, SCL
 
// SPI Communication
SPI spi_lcd(p5, NC, p7); // MOSI, MISO, SCLK

//TextLCD lcd(p15, p16, p17, p18, p19, p20);                // RS, E, D4-D7, LCDType=LCD16x2, BL=NC, E2=NC, LCDTCtrl=HD44780
//TextLCD_SPI lcd(&spi_lcd, p8, TextLCD::LCD40x4);   // SPI bus, 74595 expander, CS pin, LCD Type  
TextLCD_I2C lcd(&i2c_lcd, 0x42, TextLCD::LCD20x4);  // I2C bus, PCF8574 Slaveaddress, LCD Type
//TextLCD_I2C lcd(&i2c_lcd, 0x42, TextLCD::LCD16x2, TextLCD::WS0010); // I2C bus, PCF8574 Slaveaddress, LCD Type, Device Type
//TextLCD_SPI_N lcd(&spi_lcd, p8, p9);               // SPI bus, CS pin, RS pin, LCDType=LCD16x2, BL=NC, LCDTCtrl=ST7032_3V3   
//TextLCD_I2C_N lcd(&i2c_lcd, ST7032_SA, TextLCD::LCD16x2, NC, TextLCD::ST7032_3V3); // I2C bus, Slaveaddress, LCD Type, BL=NC, LCDTCtrl=ST7032_3V3  

int main() {
    pc.printf("LCD Test. Columns=%d, Rows=%d\n\r", lcd.columns(), lcd.rows());
    
    for (int row=0; row<lcd.rows(); row++) {
      int col=0;
      
      pc.printf("MemAddr(Col=%d, Row=%d)=0x%02X\n\r", col, row, lcd.getAddress(col, row));      
//      lcd.putc('-');
      lcd.putc('0' + row);      
      
      for (col=1; col<lcd.columns()-1; col++) {    
        lcd.putc('*');
      }
 
      pc.printf("MemAddr(Col=%d, Row=%d)=0x%02X\n\r", col, row, lcd.getAddress(col, row));      
      lcd.putc('+');
        
    }    
    
// Show cursor as blinking character
    lcd.setCursor(TextLCD::CurOff_BlkOn);
 
// Set and show user defined characters. A maximum of 8 UDCs are supported by the HD44780.
// They are defined by a 5x7 bitpattern. 
    lcd.setUDC(0, (char *) udc_0);  // Show |>
    lcd.putc(0);    
    lcd.setUDC(1, (char *) udc_1);  // Show <|
    lcd.putc(1);    

}

Handbook page

More info is here

Committer:
wim
Date:
Tue Nov 25 19:21:18 2014 +0000
Revision:
36:9f5f86dfd44a
Parent:
35:311be6444a39
Child:
37:ce348c002929
Added ST7070 and KS0073 support, added setIcon(), clrIcon() and setInvert() method for supported devices.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
simon 1:ac48b187213c 1 /* mbed TextLCD Library, for a 4-bit LCD based on HD44780
simon 6:e4cb7ddee0d3 2 * Copyright (c) 2007-2010, sford, http://mbed.org
wim 14:0c32b66b14b8 3 * 2013, v01: WH, Added LCD types, fixed LCD address issues, added Cursor and UDCs
wim 14:0c32b66b14b8 4 * 2013, v02: WH, Added I2C and SPI bus interfaces
wim 15:b70ebfffb258 5 * 2013, v03: WH, Added support for LCD40x4 which uses 2 controllers
wim 18:bd65dc10f27f 6 * 2013, v04: WH, Added support for Display On/Off, improved 4bit bootprocess
wim 18:bd65dc10f27f 7 * 2013, v05: WH, Added support for 8x2B, added some UDCs
wim 19:c747b9e2e7b8 8 * 2013, v06: WH, Added support for devices that use internal DC/DC converters
wim 20:e0da005a777f 9 * 2013, v07: WH, Added support for backlight and include portdefinitions for LCD2004 Module from DFROBOT
wim 22:35742ec80c24 10 * 2014, v08: WH, Refactored in Base and Derived Classes to deal with mbed lib change regarding 'NC' defined pins
wim 25:6162b31128c9 11 * 2014, v09: WH/EO, Added Class for Native SPI controllers such as ST7032
wim 26:bd897a001012 12 * 2014, v10: WH, Added Class for Native I2C controllers such as ST7032i, Added support for MCP23008 I2C portexpander, Added support for Adafruit module
wim 30:033048611c01 13 * 2014, v11: WH, Added support for native I2C controllers such as PCF21XX, Improved the _initCtrl() method to deal with differences between all supported controllers
wim 32:59c4b8f648d4 14 * 2014, v12: WH, Added support for native I2C controller PCF2119 and native I2C/SPI controllers SSD1803, ST7036, added setContrast method (by JH1PJL) for supported devices (eg ST7032i)
wim 34:e5a0dcb43ecc 15 * 2014, v13: WH, Added support for controllers US2066/SSD1311 (OLED), added setUDCBlink() method for supported devices (eg SSD1803), fixed issue in setPower()
wim 34:e5a0dcb43ecc 16 * 2014, v14: WH, Added support for PT6314 (VFD), added setOrient() method for supported devices (eg SSD1803, US2066), added Double Height lines for supported devices,
wim 34:e5a0dcb43ecc 17 * added 16 UDCs for supported devices (eg PCF2103), moved UDC defines to TextLCD_UDC file, added TextLCD_Config.h for feature and footprint settings.
wim 35:311be6444a39 18 * 2014, v15: WH, Added AC780 support, added I2C expander modules, fixed setBacklight() for inverted logic modules. Fixed bug in LCD_SPI_N define
wim 36:9f5f86dfd44a 19 * 2014, v16: WH, Added ST7070 and KS0073 support, added setIcon(), clrIcon() and setInvert() method for supported devices
simon 1:ac48b187213c 20 *
simon 1:ac48b187213c 21 * Permission is hereby granted, free of charge, to any person obtaining a copy
simon 1:ac48b187213c 22 * of this software and associated documentation files (the "Software"), to deal
simon 1:ac48b187213c 23 * in the Software without restriction, including without limitation the rights
simon 1:ac48b187213c 24 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
simon 1:ac48b187213c 25 * copies of the Software, and to permit persons to whom the Software is
simon 1:ac48b187213c 26 * furnished to do so, subject to the following conditions:
simon 1:ac48b187213c 27 *
simon 1:ac48b187213c 28 * The above copyright notice and this permission notice shall be included in
simon 1:ac48b187213c 29 * all copies or substantial portions of the Software.
simon 1:ac48b187213c 30 *
simon 1:ac48b187213c 31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
simon 1:ac48b187213c 32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
simon 1:ac48b187213c 33 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
simon 1:ac48b187213c 34 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
simon 1:ac48b187213c 35 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
simon 1:ac48b187213c 36 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
simon 1:ac48b187213c 37 * THE SOFTWARE.
simon 1:ac48b187213c 38 */
wim 34:e5a0dcb43ecc 39 #include "mbed.h"
simon 1:ac48b187213c 40 #include "TextLCD.h"
wim 34:e5a0dcb43ecc 41 #include "TextLCD_UDC.inc"
wim 34:e5a0dcb43ecc 42
wim 21:9eb628d9e164 43 /** Create a TextLCD_Base interface
wim 15:b70ebfffb258 44 *
wim 21:9eb628d9e164 45 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 46 * @param ctrl LCD controller (default = HD44780)
wim 15:b70ebfffb258 47 */
wim 21:9eb628d9e164 48 TextLCD_Base::TextLCD_Base(LCDType type, LCDCtrl ctrl) : _type(type), _ctrl(ctrl) {
wim 30:033048611c01 49
wim 30:033048611c01 50 // Extract LCDType data
wim 30:033048611c01 51
wim 30:033048611c01 52 // Columns encoded in b7..b0
wim 30:033048611c01 53 _nr_cols = (_type & 0xFF);
wim 30:033048611c01 54
wim 30:033048611c01 55 // Rows encoded in b15..b8
wim 30:033048611c01 56 _nr_rows = ((_type >> 8) & 0xFF);
wim 30:033048611c01 57
wim 30:033048611c01 58 // Addressing mode encoded in b19..b16
wim 30:033048611c01 59 _addr_mode = _type & LCD_T_ADR_MSK;
wim 14:0c32b66b14b8 60 }
wim 14:0c32b66b14b8 61
wim 21:9eb628d9e164 62 /** Init the LCD Controller(s)
wim 21:9eb628d9e164 63 * Clear display
wim 36:9f5f86dfd44a 64 * @param _LCDDatalength dl sets the datalength of data/commands
wim 36:9f5f86dfd44a 65 * @return none
wim 21:9eb628d9e164 66 */
wim 36:9f5f86dfd44a 67 void TextLCD_Base::_init(_LCDDatalength dl) {
wim 15:b70ebfffb258 68
wim 15:b70ebfffb258 69 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 70 if(_type==LCD40x4) {
wim 30:033048611c01 71 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 36:9f5f86dfd44a 72 _initCtrl(dl); // Init 2nd controller
wim 15:b70ebfffb258 73 }
wim 15:b70ebfffb258 74
wim 15:b70ebfffb258 75 // Select and configure primary LCD controller
wim 27:22d5086f6ba6 76 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 36:9f5f86dfd44a 77 _initCtrl(dl); // Init primary controller
wim 28:30fa94f7341c 78
wim 32:59c4b8f648d4 79 // Clear whole display and Reset Cursor location
wim 32:59c4b8f648d4 80 // Note: This will make sure that some 3-line displays that skip topline of a 4-line configuration
wim 32:59c4b8f648d4 81 // are cleared and init cursor correctly.
wim 32:59c4b8f648d4 82 cls();
wim 15:b70ebfffb258 83 }
wim 15:b70ebfffb258 84
wim 21:9eb628d9e164 85 /** Init the LCD controller
wim 36:9f5f86dfd44a 86 * Set number of lines, fonttype, no cursor etc
wim 36:9f5f86dfd44a 87 * The controller is accessed in 4-bit parallel mode either directly via mbed pins or through I2C or SPI expander.
wim 36:9f5f86dfd44a 88 * Some controllers also support native I2C or SPI interfaces.
wim 36:9f5f86dfd44a 89 *
wim 36:9f5f86dfd44a 90 * @param _LCDDatalength dl sets the 4 or 8 bit datalength of data/commands. Required for some native serial modes.
wim 36:9f5f86dfd44a 91 * @return none
wim 30:033048611c01 92 *
wim 30:033048611c01 93 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 21:9eb628d9e164 94 */
wim 36:9f5f86dfd44a 95 void TextLCD_Base::_initCtrl(_LCDDatalength dl) {
wim 32:59c4b8f648d4 96 int _bias_lines=0; // Set Bias and lines (Instr Set 1), temporary variable.
wim 32:59c4b8f648d4 97 int _lines=0; // Set lines (Ext Instr Set), temporary variable.
wim 36:9f5f86dfd44a 98
wim 26:bd897a001012 99 this->_setRS(false); // command mode
wim 13:24506ba22480 100
wim 26:bd897a001012 101 wait_ms(20); // Wait 20ms to ensure powered up
simon 1:ac48b187213c 102
wim 33:900a94bc7585 103 // The Controller could be in 8 bit mode (power-on reset) or in 4 bit mode (warm reboot) at this point.
wim 33:900a94bc7585 104 // Follow this procedure to make sure the Controller enters the correct state. The hardware interface
wim 33:900a94bc7585 105 // between the uP and the LCD can only write the 4 most significant bits (Most Significant Nibble, MSN).
wim 33:900a94bc7585 106 // In 4 bit mode the LCD expects the MSN first, followed by the LSN.
wim 33:900a94bc7585 107 //
wim 33:900a94bc7585 108 // Current state: 8 bit mode | 4 bit mode, MSN is next | 4 bit mode, LSN is next
wim 33:900a94bc7585 109 //-------------------------------------------------------------------------------------------------
wim 33:900a94bc7585 110 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN), | set dummy LSN,
wim 33:900a94bc7585 111 // remains in 8 bit mode | change to 8 bit mode | remains in 4 bit mode
wim 33:900a94bc7585 112 wait_ms(15); //
wim 33:900a94bc7585 113
wim 33:900a94bc7585 114 _writeNibble(0x3); // set 8 bit mode and dummy LSN, | set 8 bit mode and dummy LSN, | set 8bit mode (MSN),
wim 33:900a94bc7585 115 // remains in 8 bit mode | remains in 8 bit mode | remains in 4 bit mode
wim 33:900a94bc7585 116 wait_ms(15); //
wim 33:900a94bc7585 117
wim 33:900a94bc7585 118 _writeNibble(0x3); // set 8 bit mode and dummy LSN, | set 8 bit mode and dummy LSN, | set dummy LSN,
wim 33:900a94bc7585 119 // remains in 8 bit mode | remains in 8 bit mode | change to 8 bit mode
wim 33:900a94bc7585 120 wait_ms(15); //
wim 33:900a94bc7585 121
wim 33:900a94bc7585 122 // Controller is now in 8 bit mode
wim 33:900a94bc7585 123
wim 33:900a94bc7585 124 _writeNibble(0x2); // Change to 4-bit mode (MSN), the LSN is undefined dummy
wim 17:652ab113bc2e 125 wait_us(40); // most instructions take 40us
wim 18:bd65dc10f27f 126
wim 18:bd65dc10f27f 127 // Display is now in 4-bit mode
wim 33:900a94bc7585 128 // Note: 4/8 bit mode is ignored for most native SPI and I2C devices. They dont use the parallel bus.
wim 33:900a94bc7585 129 // However, _writeNibble() method is void anyway for native SPI and I2C devices.
wim 25:6162b31128c9 130
wim 29:a3663151aa65 131 // Device specific initialisations: DC/DC converter to generate VLCD or VLED, number of lines etc
wim 19:c747b9e2e7b8 132 switch (_ctrl) {
wim 32:59c4b8f648d4 133
wim 36:9f5f86dfd44a 134 case KS0073:
wim 36:9f5f86dfd44a 135 // Initialise Display configuration
wim 36:9f5f86dfd44a 136 switch (_type) {
wim 36:9f5f86dfd44a 137 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 138 case LCD12x1:
wim 36:9f5f86dfd44a 139 case LCD16x1:
wim 36:9f5f86dfd44a 140 case LCD20x1:
wim 36:9f5f86dfd44a 141 case LCD24x1:
wim 36:9f5f86dfd44a 142 // case LCD32x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 143 // case LCD40x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 144 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 145 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 146 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 147 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 148 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 149 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 150
wim 36:9f5f86dfd44a 151 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 152 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 153 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 154 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 155 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 156 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 157
wim 36:9f5f86dfd44a 158 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 159 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 160 break;
wim 36:9f5f86dfd44a 161
wim 36:9f5f86dfd44a 162 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 163 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 164 case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 165 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 166 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 167 case LCD20x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 168 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 169 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 170 // N=0 (dont care for 4 line mode)
wim 36:9f5f86dfd44a 171 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 172 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 173 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 174
wim 36:9f5f86dfd44a 175 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 176 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 177 // N=0 (1-line mode), N=1 (2-line mode)
wim 36:9f5f86dfd44a 178 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 179 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 180 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 181
wim 36:9f5f86dfd44a 182 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 183 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 184 break;
wim 36:9f5f86dfd44a 185
wim 36:9f5f86dfd44a 186
wim 36:9f5f86dfd44a 187 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 188 // case LCD24x3D: // Special mode for KS0078
wim 36:9f5f86dfd44a 189 // case LCD24x3D1: // Special mode for KS0078
wim 36:9f5f86dfd44a 190 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 191 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 192 break;
wim 36:9f5f86dfd44a 193
wim 36:9f5f86dfd44a 194 default:
wim 36:9f5f86dfd44a 195 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 196 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 197 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 198 // N=1 (2-line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 199 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 200 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 201 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 202
wim 36:9f5f86dfd44a 203 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 204 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 205 // N=1 (2 line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 206 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 207 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 208 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 209
wim 36:9f5f86dfd44a 210 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 211 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 212 break;
wim 36:9f5f86dfd44a 213 } // switch type
wim 36:9f5f86dfd44a 214
wim 36:9f5f86dfd44a 215 // init special features
wim 36:9f5f86dfd44a 216 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 217 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 218 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 219 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 220 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 221 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 222
wim 36:9f5f86dfd44a 223 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 224 // FW=0 (5-dot font, special mode for KS0073)
wim 36:9f5f86dfd44a 225 // BW=0 (Cur BW invert disable, special mode for KS0073)
wim 36:9f5f86dfd44a 226 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0073)
wim 36:9f5f86dfd44a 227
wim 36:9f5f86dfd44a 228 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 36:9f5f86dfd44a 229 // Dotscroll/Display shift enable (Special mode for KS0073)
wim 36:9f5f86dfd44a 230
wim 36:9f5f86dfd44a 231 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 36:9f5f86dfd44a 232 // Scroll quantity (Special mode for KS0073)
wim 36:9f5f86dfd44a 233
wim 36:9f5f86dfd44a 234 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 235 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 236 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 237 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 238 // DH=1 (Disp shift enable/disable, special mode for KS0073)
wim 36:9f5f86dfd44a 239 // REV=0 (Reverse/Normal, special mode for KS0073)
wim 36:9f5f86dfd44a 240 break; // case KS0073 Controller
wim 36:9f5f86dfd44a 241
wim 36:9f5f86dfd44a 242
wim 29:a3663151aa65 243 case KS0078:
wim 29:a3663151aa65 244 // Initialise Display configuration
wim 29:a3663151aa65 245 switch (_type) {
wim 29:a3663151aa65 246 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 247 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 248 // case LCD12x1:
wim 29:a3663151aa65 249 case LCD16x1:
wim 30:033048611c01 250 // case LCD20x1:
wim 29:a3663151aa65 251 case LCD24x1:
wim 32:59c4b8f648d4 252 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 253 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 254 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 255 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 256 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 257 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 258
wim 33:900a94bc7585 259 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 260 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 261 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 262 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 263 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 264 // 0
wim 30:033048611c01 265
wim 32:59c4b8f648d4 266 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 267 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 268 break;
wim 29:a3663151aa65 269
wim 36:9f5f86dfd44a 270 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 271 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 272 // case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 273 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 274 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 275 // case LCD20x4D: // Special mode for KS0073, KS0078
wim 30:033048611c01 276 // case LCD24x3D: // Special mode for KS0078
wim 30:033048611c01 277 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 278 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 279 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 280 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 281 // N=0 (dont care for 4 line mode)
wim 32:59c4b8f648d4 282 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 283 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 284 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 285
wim 33:900a94bc7585 286 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 287 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 288 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 289 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 290 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 291 // 0
wim 29:a3663151aa65 292
wim 32:59c4b8f648d4 293 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 294 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 30:033048611c01 295 break;
wim 33:900a94bc7585 296
wim 33:900a94bc7585 297 case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 298 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 299 break;
wim 30:033048611c01 300
wim 29:a3663151aa65 301 default:
wim 30:033048611c01 302 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 303 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 304 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 305 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 306 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 307 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 308 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 309
wim 33:900a94bc7585 310 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 311 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 312 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 313 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 314 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 315 // 0
wim 30:033048611c01 316
wim 32:59c4b8f648d4 317 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 318 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 319 break;
wim 29:a3663151aa65 320 } // switch type
wim 29:a3663151aa65 321
wim 32:59c4b8f648d4 322 // init special features
wim 32:59c4b8f648d4 323 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 324 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 325 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 326 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 327 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 328 // 0
wim 32:59c4b8f648d4 329
wim 32:59c4b8f648d4 330 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 331 // FW=0 (5-dot font, special mode for KS0078)
wim 32:59c4b8f648d4 332 // BW=0 (Cur BW invert disable, special mode for KS0078)
wim 32:59c4b8f648d4 333 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0078)
wim 32:59c4b8f648d4 334
wim 32:59c4b8f648d4 335 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 32:59c4b8f648d4 336 // Dotscroll/Display shift enable (Special mode for KS0078)
wim 32:59c4b8f648d4 337
wim 32:59c4b8f648d4 338 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 32:59c4b8f648d4 339 // Scroll quantity (Special mode for KS0078)
wim 32:59c4b8f648d4 340
wim 32:59c4b8f648d4 341 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 342 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 343 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 344 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 345 // DH=1 (Disp shift enable/disable, special mode for KS0078)
wim 32:59c4b8f648d4 346 // REV=0 (Reverse/Normal, special mode for KS0078)
wim 29:a3663151aa65 347 break; // case KS0078 Controller
wim 29:a3663151aa65 348
wim 26:bd897a001012 349 case ST7032_3V3:
wim 26:bd897a001012 350 // ST7032 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 26:bd897a001012 351 case ST7032_5V:
wim 32:59c4b8f648d4 352 // ST7032 controller: Disable Voltage booster for VLCD. VDD=5V
wim 29:a3663151aa65 353
wim 29:a3663151aa65 354 // Initialise Display configuration
wim 29:a3663151aa65 355 switch (_type) {
wim 29:a3663151aa65 356 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 357 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 358 // case LCD12x1:
wim 29:a3663151aa65 359 case LCD16x1:
wim 30:033048611c01 360 // case LCD20x1:
wim 32:59c4b8f648d4 361 case LCD24x1:
wim 32:59c4b8f648d4 362 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 363 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 364 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 365 break;
wim 28:30fa94f7341c 366
wim 32:59c4b8f648d4 367 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 368 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 369 case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 370 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 371 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 372 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 373 break;
wim 29:a3663151aa65 374
wim 32:59c4b8f648d4 375 default:
wim 32:59c4b8f648d4 376 // All other LCD types are initialised as 2 Line displays
wim 32:59c4b8f648d4 377 _function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 378 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 379 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 380 break;
wim 32:59c4b8f648d4 381 } // switch type
wim 32:59c4b8f648d4 382
wim 32:59c4b8f648d4 383 // init special features
wim 33:900a94bc7585 384 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 33:900a94bc7585 385
wim 33:900a94bc7585 386 _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim 32:59c4b8f648d4 387
wim 32:59c4b8f648d4 388 _contrast = LCD_ST7032_CONTRAST;
wim 32:59c4b8f648d4 389 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim 32:59c4b8f648d4 390
wim 32:59c4b8f648d4 391
wim 32:59c4b8f648d4 392 if (_ctrl == ST7032_3V3) {
wim 36:9f5f86dfd44a 393 // _icon_power = 0x04; // Icon display off, Booster circuit is turned on (IS=1)
wim 36:9f5f86dfd44a 394 _icon_power = 0x0C; // Icon display on, Booster circuit is turned on (IS=1)
wim 32:59c4b8f648d4 395 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 396 }
wim 32:59c4b8f648d4 397 else {
wim 36:9f5f86dfd44a 398 // _icon_power = 0x00; // Icon display off, Booster circuit is turned off (IS=1)
wim 36:9f5f86dfd44a 399 _icon_power = 0x08; // Icon display on, Booster circuit is turned off (IS=1)
wim 32:59c4b8f648d4 400 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 401 }
wim 32:59c4b8f648d4 402 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
wim 32:59c4b8f648d4 403 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 404
wim 32:59c4b8f648d4 405 _writeCommand(0x68 | (LCD_ST7032_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim 32:59c4b8f648d4 406 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 407
wim 32:59c4b8f648d4 408 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 409
wim 32:59c4b8f648d4 410 break; // case ST7032_3V3 Controller
wim 32:59c4b8f648d4 411 // case ST7032_5V Controller
wim 32:59c4b8f648d4 412
wim 32:59c4b8f648d4 413 case ST7036_3V3:
wim 32:59c4b8f648d4 414 // ST7036 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 415 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 416 case ST7036_5V:
wim 32:59c4b8f648d4 417 // ST7036 controller: Disable Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 418 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 419
wim 32:59c4b8f648d4 420 // Initialise Display configuration
wim 32:59c4b8f648d4 421 switch (_type) {
wim 32:59c4b8f648d4 422 case LCD8x1: //8x1 is a regular 1 line display
wim 32:59c4b8f648d4 423 case LCD8x2B: //8x2D is a special case of 16x1
wim 32:59c4b8f648d4 424 // case LCD12x1:
wim 32:59c4b8f648d4 425 case LCD16x1:
wim 32:59c4b8f648d4 426 case LCD24x1:
wim 32:59c4b8f648d4 427 _function = 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), DH=0 (5x7font), IS2, IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 428 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 429 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 430
wim 32:59c4b8f648d4 431 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 432 break;
wim 32:59c4b8f648d4 433
wim 32:59c4b8f648d4 434 // case LCD12x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 435 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 436 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 437 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 438 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 439
wim 32:59c4b8f648d4 440 _bias_lines = 0x05; // Bias: 1/5, 3-Lines LCD
wim 32:59c4b8f648d4 441 break;
wim 32:59c4b8f648d4 442
wim 32:59c4b8f648d4 443 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 444 // case LCD16x3D1: // Special mode for SSD1803
wim 30:033048611c01 445 case LCD12x4D: // Special mode for PCF2116
wim 30:033048611c01 446 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 447 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 448 break;
wim 28:30fa94f7341c 449
wim 29:a3663151aa65 450 default:
wim 32:59c4b8f648d4 451 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 452 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 453 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 454 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 455
wim 32:59c4b8f648d4 456 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 457 break;
wim 32:59c4b8f648d4 458 } // switch type
wim 32:59c4b8f648d4 459
wim 29:a3663151aa65 460
wim 32:59c4b8f648d4 461 // init special features
wim 33:900a94bc7585 462 _writeCommand(0x20 | _function | 0x01); // Set function, IS2,IS1 = 01 (Select Instr Set = 1)
wim 32:59c4b8f648d4 463 _writeCommand(0x10 | _bias_lines); // Set Bias and 1,2 or 3 lines (Instr Set 1)
wim 29:a3663151aa65 464
wim 32:59c4b8f648d4 465 _contrast = LCD_ST7036_CONTRAST;
wim 32:59c4b8f648d4 466 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast, 0 1 1 1 C3 C2 C1 C0 (Instr Set 1)
wim 32:59c4b8f648d4 467
wim 32:59c4b8f648d4 468 if (_ctrl == ST7036_3V3) {
wim 36:9f5f86dfd44a 469 _icon_power = 0x0C; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=1 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 470 // _icon_power = 0x04; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=1 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 471 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 472 }
wim 32:59c4b8f648d4 473 else {
wim 36:9f5f86dfd44a 474 _icon_power = 0x08; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=0 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 475 // _icon_power = 0x00; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=0 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 476 }
wim 29:a3663151aa65 477
wim 32:59c4b8f648d4 478 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Contrast C5, C4 (Instr Set 1)
wim 32:59c4b8f648d4 479 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 480
wim 32:59c4b8f648d4 481 _writeCommand(0x68 | (LCD_ST7036_RAB & 0x07)); // Voltagefollower On = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 0 1 (Instr Set 1)
wim 32:59c4b8f648d4 482 wait_ms(10); // Wait 10ms to ensure powered up
wim 28:30fa94f7341c 483
wim 32:59c4b8f648d4 484 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instruction Set = 0)
wim 32:59c4b8f648d4 485
wim 32:59c4b8f648d4 486 break; // case ST7036_3V3 Controller
wim 32:59c4b8f648d4 487 // case ST7036_5V Controller
wim 36:9f5f86dfd44a 488
wim 36:9f5f86dfd44a 489 case ST7070:
wim 36:9f5f86dfd44a 490 // Initialise Display configuration
wim 36:9f5f86dfd44a 491 switch (_type) {
wim 36:9f5f86dfd44a 492 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 493 case LCD8x2B: //8x2D is a special case of 16x1
wim 36:9f5f86dfd44a 494 // case LCD12x1:
wim 36:9f5f86dfd44a 495 case LCD16x1:
wim 36:9f5f86dfd44a 496 case LCD24x1:
wim 36:9f5f86dfd44a 497 _function = dl | 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 498 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 499 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 500 break;
wim 36:9f5f86dfd44a 501
wim 36:9f5f86dfd44a 502 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 36:9f5f86dfd44a 503 // case LCD16x3D1: // Special mode for SSD1803
wim 36:9f5f86dfd44a 504 case LCD12x4D: // Special mode for PCF2116
wim 36:9f5f86dfd44a 505 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 506 // case LCD12x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 507 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 508 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 509 break;
wim 36:9f5f86dfd44a 510
wim 36:9f5f86dfd44a 511 default:
wim 36:9f5f86dfd44a 512 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 513 _function = dl | 0x08; // Set function, 0 0 1 DL, N=1 (2 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 514 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 515 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 516 break;
wim 36:9f5f86dfd44a 517 } // switch type
wim 36:9f5f86dfd44a 518
wim 36:9f5f86dfd44a 519 // _writeCommand(0x00); // NOP, make sure to sync SPI
wim 36:9f5f86dfd44a 520
wim 36:9f5f86dfd44a 521 // init special features
wim 36:9f5f86dfd44a 522 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 523
wim 36:9f5f86dfd44a 524 _writeCommand(0x04 | 0x00); // Set Bias resistors 0 0 0 0 0 1 Rb1,Rb0= 0 0 (Extern Res) (Instr Set 1)
wim 36:9f5f86dfd44a 525
wim 36:9f5f86dfd44a 526 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 527 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 528 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 529
wim 36:9f5f86dfd44a 530 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 531
wim 36:9f5f86dfd44a 532 break; // case ST7070 Controller
wim 36:9f5f86dfd44a 533
wim 32:59c4b8f648d4 534 case SSD1803_3V3:
wim 32:59c4b8f648d4 535 // SSD1803 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 536 // Note: supports 1,2, 3 or 4 lines
wim 32:59c4b8f648d4 537 // case SSD1803_5V:
wim 32:59c4b8f648d4 538 // SSD1803 controller: No Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 539
wim 29:a3663151aa65 540 // Initialise Display configuration
wim 29:a3663151aa65 541 switch (_type) {
wim 29:a3663151aa65 542 case LCD8x1: //8x1 is a regular 1 line display
wim 30:033048611c01 543 case LCD8x2B: //8x2D is a special case of 16x1
wim 29:a3663151aa65 544 // case LCD12x1:
wim 29:a3663151aa65 545 case LCD16x1:
wim 29:a3663151aa65 546 case LCD24x1:
wim 32:59c4b8f648d4 547 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 548 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 549 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 550 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 551 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 552 // DH=0 Double Height disable
wim 32:59c4b8f648d4 553 // IS=0
wim 32:59c4b8f648d4 554
wim 33:900a94bc7585 555 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 556 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 557 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 558 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 559 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 560 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 561 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 562
wim 32:59c4b8f648d4 563 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 564 // NW=0 1-Line LCD (N=0)
wim 29:a3663151aa65 565 break;
wim 32:59c4b8f648d4 566
wim 33:900a94bc7585 567 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 568 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 569 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 570 // case LCD16x3D1: // Special mode for SSD1803
wim 32:59c4b8f648d4 571 // case LCD20x3D: // Special mode for SSD1803
wim 32:59c4b8f648d4 572 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 573 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 574 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 575 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 576 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 577 // DH=0 Double Height disable
wim 32:59c4b8f648d4 578 // IS=0
wim 32:59c4b8f648d4 579
wim 33:900a94bc7585 580 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 581 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 582 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 583 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 584 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 585 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 586 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 587
wim 32:59c4b8f648d4 588 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 589 // NW=1 3-Line LCD (N=0)
wim 29:a3663151aa65 590 break;
wim 30:033048611c01 591
wim 32:59c4b8f648d4 592 case LCD20x4D: // Special mode for SSD1803
wim 32:59c4b8f648d4 593 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 594 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 595 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 596 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 597 // N=1 4 Line
wim 32:59c4b8f648d4 598 // DH=0 Double Height disable
wim 32:59c4b8f648d4 599 // IS=0
wim 32:59c4b8f648d4 600
wim 33:900a94bc7585 601 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 602 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 603 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 604 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 605 // N=1 4 Line
wim 32:59c4b8f648d4 606 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 607 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 608
wim 32:59c4b8f648d4 609 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 610 // NW=1 4-Line LCD (N=1)
wim 32:59c4b8f648d4 611 break;
wim 32:59c4b8f648d4 612
wim 33:900a94bc7585 613 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 614 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 615 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 616 break;
wim 30:033048611c01 617
wim 29:a3663151aa65 618 default:
wim 30:033048611c01 619 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 620 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 621 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 622 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 623 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 624 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 625 // DH=0 Double Height disable
wim 36:9f5f86dfd44a 626 // RE=0
wim 32:59c4b8f648d4 627 // IS=0
wim 29:a3663151aa65 628
wim 33:900a94bc7585 629 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 630 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 631 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 632 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 633 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 634 // BE=0 Blink Enable off, special feature of SSD1803
wim 36:9f5f86dfd44a 635 // RE=1
wim 32:59c4b8f648d4 636 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 637
wim 32:59c4b8f648d4 638 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 639 // NW=0 2-Line LCD (N=1)
wim 32:59c4b8f648d4 640 break;
wim 32:59c4b8f648d4 641 } // switch type
wim 32:59c4b8f648d4 642
wim 32:59c4b8f648d4 643
wim 32:59c4b8f648d4 644 // init special features
wim 33:900a94bc7585 645 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 646 // Select Extended Instruction Set
wim 33:900a94bc7585 647
wim 33:900a94bc7585 648 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 649 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 650 wait_ms(5); // Wait to ensure completion or SSD1803 fails to set Top/Bottom after reset..
wim 33:900a94bc7585 651
wim 33:900a94bc7585 652 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 32:59c4b8f648d4 653
wim 32:59c4b8f648d4 654 _writeCommand(0x10); // Double Height and Bias, 0 0 0 1 UD2=0, UD1=0, BS1=0 Bias 1/5, DH=0 (Ext Instr Set)
wim 32:59c4b8f648d4 655
wim 32:59c4b8f648d4 656 // _writeCommand(0x76); // Set TC Control, 0 1 1 1 0 1 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 657 // _writeData(0x02); // Set TC data, 0 0 0 0 0 TC2,TC1,TC0 = 0 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 658
wim 32:59c4b8f648d4 659 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS=1 Select Instruction Set 1
wim 32:59c4b8f648d4 660 // Select Std Instr set, Select IS=1
wim 32:59c4b8f648d4 661
wim 32:59c4b8f648d4 662 _contrast = LCD_SSD1_CONTRAST;
wim 32:59c4b8f648d4 663 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast 0 1 1 1 C3, C2, C1, C0 (Instr Set 1)
wim 32:59c4b8f648d4 664
wim 36:9f5f86dfd44a 665 // _icon_power = 0x04; // Icon off, Booster on (Instr Set 1)
wim 36:9f5f86dfd44a 666 _icon_power = 0x0C; // Icon on, Booster on (Instr Set 1)
wim 32:59c4b8f648d4 667 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 668 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Power, Icon and Contrast, 0 1 0 1 Ion Bon C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 669 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 670
wim 32:59c4b8f648d4 671 _writeCommand(0x68 | (LCD_SSD1_RAB & 0x07)); // Set Voltagefollower 0 1 1 0 Don = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 1 0 (Instr Set 1)
wim 32:59c4b8f648d4 672 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 673
wim 33:900a94bc7585 674 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 675 // Select Extended Instruction Set 1
wim 32:59c4b8f648d4 676 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set 1)
wim 32:59c4b8f648d4 677
wim 32:59c4b8f648d4 678
wim 32:59c4b8f648d4 679 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 32:59c4b8f648d4 680 // Select Std Instr set, Select IS=0
wim 32:59c4b8f648d4 681
wim 32:59c4b8f648d4 682 break; // case SSD1803 Controller
wim 32:59c4b8f648d4 683
wim 29:a3663151aa65 684
wim 32:59c4b8f648d4 685 // Note1: The PCF21XX family of controllers has several types that dont have an onboard voltage generator for V-LCD.
wim 32:59c4b8f648d4 686 // You must supply this LCD voltage externally and not try to enable VGen.
wim 32:59c4b8f648d4 687 // Note2: The early versions of PCF2116 controllers (eg PCF2116C) can not generate sufficiently negative voltage for the LCD at a VDD of 3V3.
wim 32:59c4b8f648d4 688 // You must supply this voltage externally and not enable VGen or you must use a higher VDD (e.g. 5V) and enable VGen.
wim 32:59c4b8f648d4 689 // More recent versions of the controller (eg PCF2116K) have an improved VGen that will work with 3V3.
wim 32:59c4b8f648d4 690 // Note3: See datasheet, PCF2116 and other types provide a V0 pin to control the LCD contrast voltage that is provided by VGen. This pins allows
wim 32:59c4b8f648d4 691 // contrast control similar to that of pin 3 on the standard 14pin LCD module connector.
wim 32:59c4b8f648d4 692 // You can disable VGen by connecting Vo to VDD. VLCD will then be used directly as LCD voltage.
wim 32:59c4b8f648d4 693 // Note4: PCF2113 and PCF2119 are different wrt to VLCD generator! There is no V0 pin. The contrast voltage is software controlled by setting the VA and VB registers.
wim 32:59c4b8f648d4 694 // Vgen is automatically switched off when the contrast voltage VA or VB is set to 0x00. Note that certain limits apply to allowed values for VA and VB.
wim 32:59c4b8f648d4 695 // Note5: See datasheet, members of the PCF21XX family support different numbers of rows/columns. Not all can support 3 or 4 rows.
wim 32:59c4b8f648d4 696 // Note6: See datasheet, the PCF21XX-C and PCF21XX-K use a non-standard character set. This may result is strange looking text when not corrected..
wim 32:59c4b8f648d4 697
wim 34:e5a0dcb43ecc 698 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 699 // PCF2103 controller: No Voltage generator for VLCD, VDD=3V3..5V, VLCD input controls contrast voltage.
wim 34:e5a0dcb43ecc 700 // Initialise Display configuration
wim 34:e5a0dcb43ecc 701 switch (_type) {
wim 34:e5a0dcb43ecc 702 case LCD24x1:
wim 34:e5a0dcb43ecc 703 _function = 0x00; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=0 1-line/24 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 704 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 705 break;
wim 34:e5a0dcb43ecc 706
wim 34:e5a0dcb43ecc 707 // case LCD12x1D: //Special mode for PCF21XX, Only top line used
wim 34:e5a0dcb43ecc 708 case LCD12x2:
wim 34:e5a0dcb43ecc 709 _function = 0x04; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/12 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 710 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 711 break;
wim 34:e5a0dcb43ecc 712
wim 34:e5a0dcb43ecc 713 default:
wim 34:e5a0dcb43ecc 714 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 715 break;
wim 34:e5a0dcb43ecc 716
wim 34:e5a0dcb43ecc 717 } // switch type
wim 34:e5a0dcb43ecc 718
wim 34:e5a0dcb43ecc 719 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 720 wait_ms(10); // Wait 10ms to ensure powered up
wim 34:e5a0dcb43ecc 721
wim 34:e5a0dcb43ecc 722 // Note: Display from GA628 shows 12 chars. This is actually the right half of a 24x1 display. The commons have been connected in reverse order.
wim 34:e5a0dcb43ecc 723 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 724
wim 34:e5a0dcb43ecc 725 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 726 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no Icon blink), 0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 727
wim 34:e5a0dcb43ecc 728 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 729
wim 36:9f5f86dfd44a 730 #if(0)
wim 34:e5a0dcb43ecc 731 // Select CG RAM
wim 34:e5a0dcb43ecc 732 _writeCommand(0x40); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 733 // Store UDC/Icon pattern:
wim 34:e5a0dcb43ecc 734 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 34:e5a0dcb43ecc 735 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 34:e5a0dcb43ecc 736 for (int i=0; i<(8 * 8); i++) {
wim 34:e5a0dcb43ecc 737 // _writeData(0x1F); // All On
wim 34:e5a0dcb43ecc 738 _writeData(0x00); // All Off
wim 34:e5a0dcb43ecc 739 }
wim 36:9f5f86dfd44a 740 #endif
wim 34:e5a0dcb43ecc 741 break; // case PCF2103_3V3 Controller
wim 34:e5a0dcb43ecc 742
wim 30:033048611c01 743 case PCF2113_3V3:
wim 32:59c4b8f648d4 744 // PCF2113 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 29:a3663151aa65 745 // Initialise Display configuration
wim 29:a3663151aa65 746 switch (_type) {
wim 29:a3663151aa65 747 // case LCD12x1:
wim 33:900a94bc7585 748 // _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/12 chars display mode, SL=1, IS=0
wim 32:59c4b8f648d4 749 // Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 750 case LCD24x1:
wim 33:900a94bc7585 751 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/24 chars display mode, SL=0, IS=0
wim 32:59c4b8f648d4 752 // Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 753 break;
wim 30:033048611c01 754
wim 30:033048611c01 755 case LCD12x2:
wim 33:900a94bc7585 756 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=1 2-line/12 chars display mode, SL=0, IS=0
wim 30:033048611c01 757 break;
wim 30:033048611c01 758
wim 30:033048611c01 759 default:
wim 30:033048611c01 760 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 761 break;
wim 30:033048611c01 762
wim 30:033048611c01 763 } // switch type
wim 30:033048611c01 764
wim 32:59c4b8f648d4 765 // Init special features
wim 33:900a94bc7585 766 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 33:900a94bc7585 767
wim 33:900a94bc7585 768 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 33:900a94bc7585 769 _writeCommand(0x10); // Temp Compensation Set 0001 0, 0, TC1=0, TC2=0 (Instr. Set 1)
wim 33:900a94bc7585 770 // _writeCommand(0x42); // HV GEN 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 33:900a94bc7585 771 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV Gen 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 32:59c4b8f648d4 772
wim 32:59c4b8f648d4 773 _contrast = LCD_PCF2_CONTRAST;
wim 33:900a94bc7585 774 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=0, VA=contrast
wim 33:900a94bc7585 775 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=1, VB=contrast
wim 32:59c4b8f648d4 776 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 777
wim 33:900a94bc7585 778 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 33:900a94bc7585 779 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no icon blink) DM=0 (no direct mode) (Instr. Set 1)
wim 33:900a94bc7585 780
wim 33:900a94bc7585 781 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 32:59c4b8f648d4 782
wim 30:033048611c01 783 break; // case PCF2113_3V3 Controller
wim 30:033048611c01 784
wim 30:033048611c01 785
wim 32:59c4b8f648d4 786 // case PCF2113_5V:
wim 32:59c4b8f648d4 787 // PCF2113 controller: No Voltage generator for VLCD. VDD=5V. Contrast voltage controlled by VA or VB.
wim 32:59c4b8f648d4 788 //@TODO
wim 32:59c4b8f648d4 789
wim 30:033048611c01 790
wim 30:033048611c01 791 case PCF2116_3V3:
wim 32:59c4b8f648d4 792 // PCF2116 controller: Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 30:033048611c01 793 // Initialise Display configuration
wim 30:033048611c01 794 switch (_type) {
wim 30:033048611c01 795 // case LCD12x1:
wim 30:033048611c01 796 // case LCD12x2:
wim 30:033048611c01 797 case LCD24x1:
wim 34:e5a0dcb43ecc 798 _writeCommand(0x22); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=1 Vgen on, 0
wim 29:a3663151aa65 799 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 800 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 801 break;
wim 29:a3663151aa65 802
wim 32:59c4b8f648d4 803 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 804 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 805 case LCD12x4D: // Special mode for PCF21XX:
wim 34:e5a0dcb43ecc 806 _writeCommand(0x2E); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 807 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 808 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 809 break;
wim 30:033048611c01 810
wim 30:033048611c01 811 case LCD24x2:
wim 34:e5a0dcb43ecc 812 _writeCommand(0x2A); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=0 2-line/24 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 813 //Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 814 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 815 break;
wim 32:59c4b8f648d4 816
wim 30:033048611c01 817 default:
wim 30:033048611c01 818 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 819 break;
wim 30:033048611c01 820
wim 29:a3663151aa65 821 } // switch type
wim 29:a3663151aa65 822
wim 30:033048611c01 823 break; // case PCF2116_3V3 Controller
wim 29:a3663151aa65 824
wim 32:59c4b8f648d4 825
wim 32:59c4b8f648d4 826 //Experimental for cellphone 3-line display, SA=0x74, No Ack supported, Character set C or K, DL = 8 bit, N=0,M=1 (reserved mode !!), external VLCD -2V5
wim 32:59c4b8f648d4 827 //@TODO
wim 32:59c4b8f648d4 828 case PCF2116_5V:
wim 32:59c4b8f648d4 829 // PCF2116 controller: No Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 32:59c4b8f648d4 830 // Initialise Display configuration
wim 32:59c4b8f648d4 831 switch (_type) {
wim 32:59c4b8f648d4 832 // case LCD12x1:
wim 32:59c4b8f648d4 833 // case LCD12x2:
wim 32:59c4b8f648d4 834 // case LCD24x1:
wim 34:e5a0dcb43ecc 835 // _writeCommand(0x20); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=0 no Vgen, 0
wim 32:59c4b8f648d4 836 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 837 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 838 // break;
wim 32:59c4b8f648d4 839
wim 32:59c4b8f648d4 840 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 841 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 842 case LCD12x4D: // Special mode for PCF21XX:
wim 32:59c4b8f648d4 843 // _writeCommand(0x34); //FUNCTION SET 8 bit, N=0/M=1 4-line/12 chars display mode OK
wim 32:59c4b8f648d4 844 // _writeCommand(0x24); //FUNCTION SET 4 bit, N=0/M=1 4-line/12 chars display mode OK
wim 34:e5a0dcb43ecc 845 _writeCommand(0x2C); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=0 no Vgen, 0 OK
wim 32:59c4b8f648d4 846 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 847 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 848 break;
wim 32:59c4b8f648d4 849
wim 32:59c4b8f648d4 850 // case LCD24x2:
wim 32:59c4b8f648d4 851 // _writeCommand(0x28); //FUNCTION SET 4 bit, N=1/M=0 2-line/24 chars display mode
wim 32:59c4b8f648d4 852 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 853 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 854 // break;
wim 32:59c4b8f648d4 855
wim 32:59c4b8f648d4 856 default:
wim 32:59c4b8f648d4 857 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 858 break;
wim 32:59c4b8f648d4 859
wim 32:59c4b8f648d4 860 } // switch type
wim 32:59c4b8f648d4 861
wim 32:59c4b8f648d4 862 break; // case PCF2116_5V Controller
wim 32:59c4b8f648d4 863
wim 32:59c4b8f648d4 864 case PCF2119_3V3:
wim 32:59c4b8f648d4 865 // PCF2119 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 866 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 867 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 32:59c4b8f648d4 868
wim 32:59c4b8f648d4 869 //POR or Hardware Reset should be applied
wim 32:59c4b8f648d4 870 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 871
wim 32:59c4b8f648d4 872 // Initialise Display configuration
wim 32:59c4b8f648d4 873 switch (_type) {
wim 32:59c4b8f648d4 874 case LCD8x1:
wim 32:59c4b8f648d4 875 // case LCD12x1:
wim 32:59c4b8f648d4 876 case LCD16x1:
wim 34:e5a0dcb43ecc 877 _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/16 chars display mode, SL=1
wim 32:59c4b8f648d4 878 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 879 break;
wim 32:59c4b8f648d4 880
wim 32:59c4b8f648d4 881 case LCD24x1:
wim 32:59c4b8f648d4 882 // case LCD32x1:
wim 34:e5a0dcb43ecc 883 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/32 chars display mode, SL=0
wim 32:59c4b8f648d4 884 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 885 break;
wim 32:59c4b8f648d4 886
wim 32:59c4b8f648d4 887 case LCD8x2:
wim 32:59c4b8f648d4 888 // case LCD12x2:
wim 32:59c4b8f648d4 889 case LCD16x2:
wim 34:e5a0dcb43ecc 890 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/16 chars display mode, SL=0
wim 32:59c4b8f648d4 891 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 892 break;
wim 32:59c4b8f648d4 893
wim 32:59c4b8f648d4 894 default:
wim 32:59c4b8f648d4 895 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 896 break;
wim 32:59c4b8f648d4 897
wim 32:59c4b8f648d4 898 } // switch type
wim 32:59c4b8f648d4 899
wim 32:59c4b8f648d4 900 // Init special features
wim 32:59c4b8f648d4 901 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 902
wim 32:59c4b8f648d4 903 _writeCommand(0x04); // DISP CONF SET (Instr. Set 1) 0000, 0, 1, P=0, Q=0
wim 32:59c4b8f648d4 904 _writeCommand(0x10); // TEMP CTRL SET (Instr. Set 1) 0001, 0, 0, TC1=0, TC2=0
wim 32:59c4b8f648d4 905 // _writeCommand(0x42); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 906 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 907
wim 32:59c4b8f648d4 908 _contrast = LCD_PCF2_CONTRAST;
wim 32:59c4b8f648d4 909 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 910 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 911 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 912
wim 32:59c4b8f648d4 913 _writeCommand(0x02); // SCRN CONF (Instr. Set 1) L=0
wim 32:59c4b8f648d4 914 _writeCommand(0x08); // ICON CONF (Instr. Set 1) IM=0 (Char mode) IB=0 (no icon blink) DM=0 (no direct mode)
wim 32:59c4b8f648d4 915
wim 32:59c4b8f648d4 916 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 917
wim 32:59c4b8f648d4 918 break; // case PCF2119_3V3 Controller
wim 32:59c4b8f648d4 919
wim 32:59c4b8f648d4 920 // case PCF2119_5V:
wim 32:59c4b8f648d4 921 // PCF2119 controller: No Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 922 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 923 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 30:033048611c01 924 //@TODO
wim 29:a3663151aa65 925
wim 19:c747b9e2e7b8 926 case WS0010:
wim 19:c747b9e2e7b8 927 // WS0010 OLED controller: Initialise DC/DC Voltage converter for LEDs
wim 30:033048611c01 928 // Note1: Identical to RS0010
wim 30:033048611c01 929 // Note2: supports 1 or 2 lines (and 16x100 graphics)
wim 30:033048611c01 930 // supports 4 fonts (English/Japanese (default), Western European-I, English/Russian, Western European-II)
wim 19:c747b9e2e7b8 931 // Cursor/Disp shift set 0001 SC RL 0 0
wim 19:c747b9e2e7b8 932 //
wim 30:033048611c01 933 // Mode and Power set 0001 GC PWR 1 1
wim 19:c747b9e2e7b8 934 // GC = 0 (Graph Mode=1, Char Mode=0)
wim 30:033048611c01 935 // PWR = 1 (DC/DC On/Off)
wim 30:033048611c01 936
wim 30:033048611c01 937 //@Todo: This may be needed to enable a warm reboot
wim 32:59c4b8f648d4 938 //_writeCommand(0x13); // Char mode, DC/DC off
wim 30:033048611c01 939 //wait_ms(10); // Wait 10ms to ensure powered down
wim 32:59c4b8f648d4 940 _writeCommand(0x17); // Char mode, DC/DC on
wim 30:033048611c01 941 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 942
wim 29:a3663151aa65 943 // Initialise Display configuration
wim 29:a3663151aa65 944 switch (_type) {
wim 29:a3663151aa65 945 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 946 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 947 // case LCD12x1:
wim 29:a3663151aa65 948 case LCD16x1:
wim 30:033048611c01 949 case LCD24x1:
wim 30:033048611c01 950 _writeCommand(0x20); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 951 // DL=0 (4 bits bus)
wim 30:033048611c01 952 // N=0 (1 line)
wim 30:033048611c01 953 // F=0 (5x7 dots font)
wim 30:033048611c01 954 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 955 break;
wim 30:033048611c01 956
wim 32:59c4b8f648d4 957 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 958 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 959 case LCD12x4D: // Special mode for PCF21XX:
wim 33:900a94bc7585 960 case LCD16x3G: // Special mode for ST7036
wim 30:033048611c01 961 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 962 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 963 break;
wim 29:a3663151aa65 964
wim 29:a3663151aa65 965 default:
wim 30:033048611c01 966 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 30:033048611c01 967 _writeCommand(0x28); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 968 // DL=0 (4 bits bus)
wim 30:033048611c01 969 // N=1 (2 lines)
wim 30:033048611c01 970 // F=0 (5x7 dots font)
wim 30:033048611c01 971 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 972
wim 29:a3663151aa65 973 break;
wim 29:a3663151aa65 974 } // switch type
wim 29:a3663151aa65 975
wim 32:59c4b8f648d4 976 break; // case WS0010 Controller
wim 33:900a94bc7585 977
wim 33:900a94bc7585 978
wim 33:900a94bc7585 979 case US2066_3V3:
wim 33:900a94bc7585 980 // US2066/SSD1311 OLED controller, Initialise for VDD=3V3
wim 33:900a94bc7585 981 // Note: supports 1,2, 3 or 4 lines
wim 33:900a94bc7585 982 // case USS2066_5V:
wim 33:900a94bc7585 983 // US2066 controller, VDD=5V
wim 33:900a94bc7585 984
wim 33:900a94bc7585 985 // Initialise Display configuration
wim 33:900a94bc7585 986 switch (_type) {
wim 33:900a94bc7585 987 case LCD8x1: //8x1 is a regular 1 line display
wim 33:900a94bc7585 988 case LCD8x2B: //8x2D is a special case of 16x1
wim 33:900a94bc7585 989 // case LCD12x1:
wim 33:900a94bc7585 990 case LCD16x1:
wim 33:900a94bc7585 991 // case LCD20x1:
wim 33:900a94bc7585 992 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 993 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 994 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 995 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 996 // DH=0 Double Height disable
wim 33:900a94bc7585 997 // IS=0
wim 33:900a94bc7585 998
wim 33:900a94bc7585 999 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1000 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1001 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1002 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1003 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1004 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1005
wim 33:900a94bc7585 1006 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1007 // NW=0 1-Line LCD (N=0)
wim 33:900a94bc7585 1008 break;
wim 33:900a94bc7585 1009
wim 33:900a94bc7585 1010 case LCD16x1C:
wim 33:900a94bc7585 1011 case LCD8x2:
wim 33:900a94bc7585 1012 case LCD16x2:
wim 33:900a94bc7585 1013 case LCD20x2:
wim 33:900a94bc7585 1014 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1015 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1016 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1017 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1018 // DH=0 Double Height disable
wim 33:900a94bc7585 1019 // IS=0
wim 33:900a94bc7585 1020
wim 33:900a94bc7585 1021 _function_1 = 0x0A; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1022 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1023 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1024 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1025 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1026 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1027
wim 33:900a94bc7585 1028 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1029 // NW=0 2-Line LCD (N=1)
wim 33:900a94bc7585 1030 break;
wim 33:900a94bc7585 1031
wim 33:900a94bc7585 1032 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1033 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1034 case LCD16x3D: // Special mode for KS0078, SSD1803 and US2066
wim 33:900a94bc7585 1035 // case LCD16x3D1: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1036 // case LCD20x3D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1037 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1038 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1039 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1040 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1041 // DH=0 Double Height disable
wim 33:900a94bc7585 1042 // IS=0
wim 33:900a94bc7585 1043
wim 33:900a94bc7585 1044 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1045 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1046 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1047 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1048 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1049 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1050
wim 33:900a94bc7585 1051 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1052 // NW=1 3-Line LCD (N=0)
wim 33:900a94bc7585 1053 break;
wim 33:900a94bc7585 1054
wim 33:900a94bc7585 1055 case LCD20x4D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1056 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1057 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1058 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1059 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1060 // DH=0 Double Height disable
wim 33:900a94bc7585 1061 // IS=0
wim 33:900a94bc7585 1062
wim 33:900a94bc7585 1063 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1064 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1065 // DL=0 bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1066 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1067 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1068 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1069
wim 33:900a94bc7585 1070 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1071 // NW=1 4-Line LCD (N=1)
wim 33:900a94bc7585 1072 break;
wim 33:900a94bc7585 1073
wim 33:900a94bc7585 1074 // case LCD24x1:
wim 33:900a94bc7585 1075 // case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 1076 // case LCD24x4D: // Special mode for KS0078
wim 33:900a94bc7585 1077 default:
wim 33:900a94bc7585 1078 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 1079 break;
wim 33:900a94bc7585 1080
wim 33:900a94bc7585 1081 } // switch type
wim 33:900a94bc7585 1082
wim 34:e5a0dcb43ecc 1083 _writeCommand(0x00); // NOP, make sure to sync SPI
wim 33:900a94bc7585 1084
wim 33:900a94bc7585 1085 // init special features
wim 33:900a94bc7585 1086 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1087 // Select Extended Instruction Set
wim 33:900a94bc7585 1088
wim 33:900a94bc7585 1089 _writeCommand(0x71); // Function Select A: 0 1 1 1 0 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1090 _writeData(0x00); // Disable Internal VDD
wim 33:900a94bc7585 1091
wim 33:900a94bc7585 1092 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1093
wim 33:900a94bc7585 1094 _writeCommand(0xD5); // Display Clock Divide Ratio: 1 1 0 1 0 1 0 1 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1095 _writeCommand(0x70); // Display Clock Divide Ratio value: 0 1 1 1 0 0 0 0 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1096
wim 33:900a94bc7585 1097 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1098
wim 33:900a94bc7585 1099 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 1100 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 1101
wim 33:900a94bc7585 1102 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 33:900a94bc7585 1103
wim 34:e5a0dcb43ecc 1104 // _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 33:900a94bc7585 1105 // // Default
wim 33:900a94bc7585 1106
wim 33:900a94bc7585 1107 _writeCommand(0x72); // Function Select B: 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 33:900a94bc7585 1108 _writeData(0x01); // Select ROM A (CGRAM 8, CGROM 248)
wim 33:900a94bc7585 1109
wim 33:900a94bc7585 1110 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1111
wim 33:900a94bc7585 1112 _writeCommand(0xDA); // Set Segm Pins Config: 1 1 0 1 1 0 1 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1113 _writeCommand(0x10); // Set Segm Pins Config value: Altern Odd/Even, Disable Remap (Ext Instr Set, OLED)
wim 33:900a94bc7585 1114
wim 33:900a94bc7585 1115 _writeCommand(0xDC); // Function Select C: 1 1 0 1 1 1 0 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1116 // _writeCommand(0x00); // Set internal VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1117 _writeCommand(0x80); // Set external VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1118
wim 33:900a94bc7585 1119 _contrast = LCD_US20_CONTRAST;
wim 33:900a94bc7585 1120 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1121 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits, use 6 bits for compatibility
wim 33:900a94bc7585 1122
wim 33:900a94bc7585 1123 _writeCommand(0xD9); // Set Phase Length: 1 1 0 1 1 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1124 _writeCommand(0xF1); // Set Phase Length Value:
wim 33:900a94bc7585 1125
wim 33:900a94bc7585 1126 _writeCommand(0xDB); // Set VCOMH Deselect Lvl: 1 1 0 1 1 0 1 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1127 _writeCommand(0x30); // Set VCOMH Deselect Value: 0.83 x VCC
wim 33:900a94bc7585 1128
wim 33:900a94bc7585 1129 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 1130
wim 33:900a94bc7585 1131 //Test Fade/Blinking. Hard Blink on/off, No fade in/out ??
wim 33:900a94bc7585 1132 // _writeCommand(0x23); // Set (Ext Instr Set, OLED)
wim 33:900a94bc7585 1133 // _writeCommand(0x3F); // Set interval 128 frames
wim 33:900a94bc7585 1134 //End Test Blinking
wim 33:900a94bc7585 1135
wim 33:900a94bc7585 1136 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1137
wim 33:900a94bc7585 1138 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 X N DH RE(0) IS=1 Select Instruction Set 1
wim 33:900a94bc7585 1139 // Select Std Instr set, Select IS=1
wim 33:900a94bc7585 1140
wim 33:900a94bc7585 1141 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1142 // Select Ext Instr Set, IS=1
wim 33:900a94bc7585 1143 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set, IS=1)
wim 33:900a94bc7585 1144
wim 33:900a94bc7585 1145 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 1146 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1147 break; // case US2066/SSD1311 Controller
wim 33:900a94bc7585 1148
wim 34:e5a0dcb43ecc 1149 //not yet tested on hardware
wim 34:e5a0dcb43ecc 1150 case PT6314 :
wim 34:e5a0dcb43ecc 1151 // Initialise Display configuration
wim 34:e5a0dcb43ecc 1152 switch (_type) {
wim 34:e5a0dcb43ecc 1153 case LCD8x1: //8x1 is a regular 1 line display
wim 34:e5a0dcb43ecc 1154 case LCD8x2B: //8x2B is a special case of 16x1
wim 34:e5a0dcb43ecc 1155 // case LCD12x1:
wim 34:e5a0dcb43ecc 1156 case LCD16x1:
wim 34:e5a0dcb43ecc 1157 case LCD20x1:
wim 34:e5a0dcb43ecc 1158 case LCD24x1:
wim 34:e5a0dcb43ecc 1159 _function = 0x00; // Function set 001 DL N X BR1 BR0
wim 34:e5a0dcb43ecc 1160 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1161 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1162 // N=0 (1 line)
wim 34:e5a0dcb43ecc 1163 // X
wim 34:e5a0dcb43ecc 1164 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1165 // BR0=0
wim 34:e5a0dcb43ecc 1166 // 0x0 = 100%
wim 34:e5a0dcb43ecc 1167 // 0x1 = 75%
wim 34:e5a0dcb43ecc 1168 // 0x2 = 50%
wim 34:e5a0dcb43ecc 1169 // 0x3 = 25%
wim 34:e5a0dcb43ecc 1170
wim 34:e5a0dcb43ecc 1171 break;
wim 34:e5a0dcb43ecc 1172
wim 34:e5a0dcb43ecc 1173 // All other valid LCD types are initialised as 2 Line displays
wim 34:e5a0dcb43ecc 1174 case LCD8x2:
wim 34:e5a0dcb43ecc 1175 case LCD16x2:
wim 34:e5a0dcb43ecc 1176 case LCD20x2:
wim 34:e5a0dcb43ecc 1177 case LCD24x2:
wim 34:e5a0dcb43ecc 1178 _function = 0x08; // Function set 001 DL N X BR1 BR2
wim 34:e5a0dcb43ecc 1179 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1180 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1181 // N=1 (2 lines)
wim 34:e5a0dcb43ecc 1182 // X
wim 34:e5a0dcb43ecc 1183 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1184 // BR0=0
wim 34:e5a0dcb43ecc 1185 break;
wim 34:e5a0dcb43ecc 1186
wim 34:e5a0dcb43ecc 1187 default:
wim 34:e5a0dcb43ecc 1188 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 1189 break;
wim 34:e5a0dcb43ecc 1190 } // switch type
wim 34:e5a0dcb43ecc 1191
wim 34:e5a0dcb43ecc 1192 _contrast = LCD_PT63_CONTRAST;
wim 34:e5a0dcb43ecc 1193 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 34:e5a0dcb43ecc 1194 break; // case PT6314 Controller (VFD)
wim 29:a3663151aa65 1195
wim 19:c747b9e2e7b8 1196 default:
wim 32:59c4b8f648d4 1197 // Devices fully compatible to HD44780 that do not use any DC/DC Voltage converters but external VLCD, no icons etc
wim 10:dd9b3a696acd 1198
wim 29:a3663151aa65 1199 // Initialise Display configuration
wim 29:a3663151aa65 1200 switch (_type) {
wim 29:a3663151aa65 1201 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 1202 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 1203 // case LCD12x1:
wim 29:a3663151aa65 1204 case LCD16x1:
wim 30:033048611c01 1205 // case LCD20x1:
wim 29:a3663151aa65 1206 case LCD24x1:
wim 30:033048611c01 1207 // case LCD40x1:
wim 32:59c4b8f648d4 1208 _function = 0x00; // Function set 001 DL N F - -
wim 29:a3663151aa65 1209 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1210 // N=0 (1 line)
wim 29:a3663151aa65 1211 // F=0 (5x7 dots font)
wim 29:a3663151aa65 1212 break;
wim 29:a3663151aa65 1213
wim 32:59c4b8f648d4 1214 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1215 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1216 case LCD12x4D: // Special mode for KS0078 and PCF21XX:
wim 33:900a94bc7585 1217 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1218 // case LCD16x3D1: // Special mode for KS0078
wim 30:033048611c01 1219 // case LCD24x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1220 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 1221 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 1222 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 1223 break;
wim 30:033048611c01 1224
wim 30:033048611c01 1225 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 29:a3663151aa65 1226 default:
wim 32:59c4b8f648d4 1227 _function = 0x08; // Function set 001 DL N F - -
wim 29:a3663151aa65 1228 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1229 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 29:a3663151aa65 1230 // N=1 (2 lines)
wim 29:a3663151aa65 1231 // F=0 (5x7 dots font, only option for 2 line display)
wim 32:59c4b8f648d4 1232 // - (Don't care)
wim 29:a3663151aa65 1233 break;
wim 29:a3663151aa65 1234 } // switch type
wim 10:dd9b3a696acd 1235
wim 34:e5a0dcb43ecc 1236 _writeCommand(0x20 | _function);
wim 29:a3663151aa65 1237 break; // case default Controller
wim 29:a3663151aa65 1238
wim 34:e5a0dcb43ecc 1239 } // switch Controller specific initialisations
wim 10:dd9b3a696acd 1240
wim 30:033048611c01 1241 // Controller general initialisations
wim 32:59c4b8f648d4 1242 // _writeCommand(0x01); // cls, and set cursor to 0
wim 32:59c4b8f648d4 1243 // wait_ms(10); // The CLS command takes 1.64 ms.
wim 32:59c4b8f648d4 1244 // // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1245
wim 28:30fa94f7341c 1246 _writeCommand(0x02); // Return Home
wim 28:30fa94f7341c 1247 // Cursor Home, DDRAM Address to Origin
wim 28:30fa94f7341c 1248
wim 28:30fa94f7341c 1249 _writeCommand(0x06); // Entry Mode 0000 0 1 I/D S
wim 13:24506ba22480 1250 // Cursor Direction and Display Shift
wim 28:30fa94f7341c 1251 // I/D=1 (Cur incr)
wim 28:30fa94f7341c 1252 // S=0 (No display shift)
wim 10:dd9b3a696acd 1253
wim 29:a3663151aa65 1254 _writeCommand(0x14); // Cursor or Display shift 0001 S/C R/L x x
wim 29:a3663151aa65 1255 // S/C=0 Cursor moves
wim 29:a3663151aa65 1256 // R/L=1 Right
wim 29:a3663151aa65 1257 //
wim 29:a3663151aa65 1258
wim 13:24506ba22480 1259 // _writeCommand(0x0C); // Display Ctrl 0000 1 D C B
wim 17:652ab113bc2e 1260 // // Display On, Cursor Off, Blink Off
wim 36:9f5f86dfd44a 1261
wim 21:9eb628d9e164 1262 setCursor(CurOff_BlkOff);
wim 21:9eb628d9e164 1263 setMode(DispOn);
simon 1:ac48b187213c 1264 }
simon 1:ac48b187213c 1265
wim 8:03116f75b66e 1266
wim 21:9eb628d9e164 1267 /** Clear the screen, Cursor home.
wim 21:9eb628d9e164 1268 */
wim 21:9eb628d9e164 1269 void TextLCD_Base::cls() {
wim 15:b70ebfffb258 1270
wim 15:b70ebfffb258 1271 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1272 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1273 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 15:b70ebfffb258 1274
wim 15:b70ebfffb258 1275 // Second LCD controller Cursor always Off
wim 21:9eb628d9e164 1276 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 15:b70ebfffb258 1277
wim 15:b70ebfffb258 1278 // Second LCD controller Clearscreen
wim 27:22d5086f6ba6 1279 _writeCommand(0x01); // cls, and set cursor to 0
wim 29:a3663151aa65 1280 wait_ms(10); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1281 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1282
wim 21:9eb628d9e164 1283 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 15:b70ebfffb258 1284 }
wim 15:b70ebfffb258 1285
wim 15:b70ebfffb258 1286 // Primary LCD controller Clearscreen
wim 27:22d5086f6ba6 1287 _writeCommand(0x01); // cls, and set cursor to 0
wim 29:a3663151aa65 1288 wait_ms(10); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1289 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1290
wim 15:b70ebfffb258 1291 // Restore cursormode on primary LCD controller when needed
wim 15:b70ebfffb258 1292 if(_type==LCD40x4) {
wim 17:652ab113bc2e 1293 _setCursorAndDisplayMode(_currentMode,_currentCursor);
wim 15:b70ebfffb258 1294 }
wim 15:b70ebfffb258 1295
wim 29:a3663151aa65 1296 setAddress(0, 0); // Reset Cursor location
wim 32:59c4b8f648d4 1297 // Note: This is needed because some displays (eg PCF21XX) don't use line 0 in the '3 Line' mode.
simon 1:ac48b187213c 1298 }
simon 1:ac48b187213c 1299
wim 29:a3663151aa65 1300 /** Locate cursor to a screen column and row
wim 29:a3663151aa65 1301 *
wim 29:a3663151aa65 1302 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1303 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1304 */
wim 21:9eb628d9e164 1305 void TextLCD_Base::locate(int column, int row) {
wim 15:b70ebfffb258 1306
wim 15:b70ebfffb258 1307 // setAddress() does all the heavy lifting:
wim 15:b70ebfffb258 1308 // check column and row sanity,
wim 15:b70ebfffb258 1309 // switch controllers for LCD40x4 if needed
wim 15:b70ebfffb258 1310 // switch cursor for LCD40x4 if needed
wim 15:b70ebfffb258 1311 // set the new memory address to show cursor at correct location
wim 32:59c4b8f648d4 1312 setAddress(column, row);
wim 15:b70ebfffb258 1313 }
wim 30:033048611c01 1314
wim 15:b70ebfffb258 1315
wim 21:9eb628d9e164 1316 /** Write a single character (Stream implementation)
wim 21:9eb628d9e164 1317 */
wim 21:9eb628d9e164 1318 int TextLCD_Base::_putc(int value) {
wim 15:b70ebfffb258 1319 int addr;
wim 15:b70ebfffb258 1320
wim 15:b70ebfffb258 1321 if (value == '\n') {
wim 15:b70ebfffb258 1322 //No character to write
wim 15:b70ebfffb258 1323
wim 15:b70ebfffb258 1324 //Update Cursor
wim 15:b70ebfffb258 1325 _column = 0;
wim 15:b70ebfffb258 1326 _row++;
wim 15:b70ebfffb258 1327 if (_row >= rows()) {
wim 15:b70ebfffb258 1328 _row = 0;
wim 15:b70ebfffb258 1329 }
wim 15:b70ebfffb258 1330 }
wim 15:b70ebfffb258 1331 else {
wim 15:b70ebfffb258 1332 //Character to write
wim 15:b70ebfffb258 1333 _writeData(value);
wim 15:b70ebfffb258 1334
wim 15:b70ebfffb258 1335 //Update Cursor
wim 15:b70ebfffb258 1336 _column++;
wim 15:b70ebfffb258 1337 if (_column >= columns()) {
wim 15:b70ebfffb258 1338 _column = 0;
wim 15:b70ebfffb258 1339 _row++;
wim 15:b70ebfffb258 1340 if (_row >= rows()) {
wim 15:b70ebfffb258 1341 _row = 0;
wim 15:b70ebfffb258 1342 }
wim 15:b70ebfffb258 1343 }
wim 15:b70ebfffb258 1344 } //else
wim 15:b70ebfffb258 1345
wim 15:b70ebfffb258 1346 //Set next memoryaddress, make sure cursor blinks at next location
wim 15:b70ebfffb258 1347 addr = getAddress(_column, _row);
wim 15:b70ebfffb258 1348 _writeCommand(0x80 | addr);
wim 15:b70ebfffb258 1349
wim 15:b70ebfffb258 1350 return value;
wim 15:b70ebfffb258 1351 }
wim 15:b70ebfffb258 1352
wim 15:b70ebfffb258 1353
wim 16:c276b75e6585 1354 // get a single character (Stream implementation)
wim 21:9eb628d9e164 1355 int TextLCD_Base::_getc() {
simon 1:ac48b187213c 1356 return -1;
simon 1:ac48b187213c 1357 }
simon 1:ac48b187213c 1358
wim 14:0c32b66b14b8 1359
wim 34:e5a0dcb43ecc 1360 #if(LCD_PRINTF != 1)
wim 34:e5a0dcb43ecc 1361 /** Write a character to the LCD
wim 34:e5a0dcb43ecc 1362 *
wim 34:e5a0dcb43ecc 1363 * @param c The character to write to the display
wim 34:e5a0dcb43ecc 1364 */
wim 34:e5a0dcb43ecc 1365 int TextLCD_Base::putc(int c){
wim 34:e5a0dcb43ecc 1366 return _putc(c);
wim 34:e5a0dcb43ecc 1367 }
wim 34:e5a0dcb43ecc 1368
wim 34:e5a0dcb43ecc 1369
wim 34:e5a0dcb43ecc 1370 /** Write a raw string to the LCD
wim 34:e5a0dcb43ecc 1371 *
wim 34:e5a0dcb43ecc 1372 * @param string text, may be followed by variables to emulate formatting the string.
wim 34:e5a0dcb43ecc 1373 * However, printf formatting is NOT supported and variables will be ignored!
wim 34:e5a0dcb43ecc 1374 */
wim 34:e5a0dcb43ecc 1375 int TextLCD_Base::printf(const char* text, ...) {
wim 34:e5a0dcb43ecc 1376
wim 34:e5a0dcb43ecc 1377 while (*text !=0) {
wim 34:e5a0dcb43ecc 1378 _putc(*text);
wim 34:e5a0dcb43ecc 1379 text++;
wim 34:e5a0dcb43ecc 1380 }
wim 34:e5a0dcb43ecc 1381 return 0;
wim 34:e5a0dcb43ecc 1382 }
wim 34:e5a0dcb43ecc 1383 #endif
wim 34:e5a0dcb43ecc 1384
wim 34:e5a0dcb43ecc 1385
wim 34:e5a0dcb43ecc 1386
wim 17:652ab113bc2e 1387 // Write a nibble using the 4-bit interface
wim 21:9eb628d9e164 1388 void TextLCD_Base::_writeNibble(int value) {
wim 17:652ab113bc2e 1389
wim 17:652ab113bc2e 1390 // Enable is Low
wim 21:9eb628d9e164 1391 this->_setEnable(true);
wim 21:9eb628d9e164 1392 this->_setData(value & 0x0F); // Low nibble
wim 17:652ab113bc2e 1393 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1394 this->_setEnable(false);
wim 17:652ab113bc2e 1395 wait_us(1); // Datahold time
wim 17:652ab113bc2e 1396
wim 17:652ab113bc2e 1397 // Enable is Low
wim 17:652ab113bc2e 1398 }
wim 17:652ab113bc2e 1399
wim 16:c276b75e6585 1400 // Write a byte using the 4-bit interface
wim 21:9eb628d9e164 1401 void TextLCD_Base::_writeByte(int value) {
wim 15:b70ebfffb258 1402
wim 15:b70ebfffb258 1403 // Enable is Low
wim 21:9eb628d9e164 1404 this->_setEnable(true);
wim 21:9eb628d9e164 1405 this->_setData(value >> 4); // High nibble
wim 15:b70ebfffb258 1406 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1407 this->_setEnable(false);
wim 15:b70ebfffb258 1408 wait_us(1); // Data hold time
wim 15:b70ebfffb258 1409
wim 21:9eb628d9e164 1410 this->_setEnable(true);
wim 21:9eb628d9e164 1411 this->_setData(value >> 0); // Low nibble
wim 15:b70ebfffb258 1412 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1413 this->_setEnable(false);
wim 15:b70ebfffb258 1414 wait_us(1); // Datahold time
wim 15:b70ebfffb258 1415
wim 15:b70ebfffb258 1416 // Enable is Low
simon 1:ac48b187213c 1417 }
simon 1:ac48b187213c 1418
wim 21:9eb628d9e164 1419 // Write a command byte to the LCD controller
wim 21:9eb628d9e164 1420 void TextLCD_Base::_writeCommand(int command) {
wim 15:b70ebfffb258 1421
wim 21:9eb628d9e164 1422 this->_setRS(false);
wim 16:c276b75e6585 1423 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1424
wim 21:9eb628d9e164 1425 this->_writeByte(command);
wim 15:b70ebfffb258 1426 wait_us(40); // most instructions take 40us
simon 1:ac48b187213c 1427 }
simon 1:ac48b187213c 1428
wim 21:9eb628d9e164 1429 // Write a data byte to the LCD controller
wim 21:9eb628d9e164 1430 void TextLCD_Base::_writeData(int data) {
wim 15:b70ebfffb258 1431
wim 21:9eb628d9e164 1432 this->_setRS(true);
wim 16:c276b75e6585 1433 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1434
wim 21:9eb628d9e164 1435 this->_writeByte(data);
wim 15:b70ebfffb258 1436 wait_us(40); // data writes take 40us
simon 1:ac48b187213c 1437 }
simon 1:ac48b187213c 1438
wim 8:03116f75b66e 1439
wim 32:59c4b8f648d4 1440 // This replaces the original _address() method.
wim 8:03116f75b66e 1441 // It is confusing since it returns the memoryaddress or-ed with the set memorycommand 0x80.
wim 8:03116f75b66e 1442 // Left it in here for compatibility with older code. New applications should use getAddress() instead.
wim 21:9eb628d9e164 1443 int TextLCD_Base::_address(int column, int row) {
wim 8:03116f75b66e 1444 return 0x80 | getAddress(column, row);
wim 8:03116f75b66e 1445 }
wim 8:03116f75b66e 1446
wim 30:033048611c01 1447
wim 30:033048611c01 1448 // This is new method to return the memory address based on row, column and displaytype.
wim 30:033048611c01 1449 //
wim 30:033048611c01 1450 /** Return the memoryaddress of screen column and row location
wim 30:033048611c01 1451 *
wim 30:033048611c01 1452 * @param column The horizontal position from the left, indexed from 0
wim 30:033048611c01 1453 * @param row The vertical position from the top, indexed from 0
wim 36:9f5f86dfd44a 1454 * @return The memoryaddress of screen column and row location
wim 30:033048611c01 1455 *
wim 30:033048611c01 1456 */
wim 30:033048611c01 1457 int TextLCD_Base::getAddress(int column, int row) {
wim 30:033048611c01 1458
wim 30:033048611c01 1459 switch (_addr_mode) {
wim 30:033048611c01 1460
wim 30:033048611c01 1461 case LCD_T_A:
wim 30:033048611c01 1462 //Default addressing mode for 1, 2 and 4 rows (except 40x4)
wim 30:033048611c01 1463 //The two available rows are split and stacked on top of eachother. Addressing for 3rd and 4th line continues where lines 1 and 2 were split.
wim 30:033048611c01 1464 //Displays top rows when less than four are used.
wim 30:033048611c01 1465 switch (row) {
wim 30:033048611c01 1466 case 0:
wim 30:033048611c01 1467 return 0x00 + column;
wim 30:033048611c01 1468 case 1:
wim 30:033048611c01 1469 return 0x40 + column;
wim 30:033048611c01 1470 case 2:
wim 30:033048611c01 1471 return 0x00 + _nr_cols + column;
wim 30:033048611c01 1472 case 3:
wim 30:033048611c01 1473 return 0x40 + _nr_cols + column;
wim 30:033048611c01 1474 // Should never get here.
wim 30:033048611c01 1475 default:
wim 30:033048611c01 1476 return 0x00;
wim 30:033048611c01 1477 }
wim 30:033048611c01 1478
wim 30:033048611c01 1479 case LCD_T_B:
wim 30:033048611c01 1480 // LCD8x2B is a special layout of LCD16x1
wim 30:033048611c01 1481 if (row==0)
wim 30:033048611c01 1482 return 0x00 + column;
wim 30:033048611c01 1483 else
wim 30:033048611c01 1484 // return _nr_cols + column;
wim 30:033048611c01 1485 return 0x08 + column;
wim 30:033048611c01 1486
wim 30:033048611c01 1487 case LCD_T_C:
wim 30:033048611c01 1488 // LCD16x1C is a special layout of LCD8x2
wim 33:900a94bc7585 1489 // LCD32x1C is a special layout of LCD16x2
wim 33:900a94bc7585 1490 // LCD40x1C is a special layout of LCD20x2
wim 33:900a94bc7585 1491 #if(0)
wim 32:59c4b8f648d4 1492 if (column < 8)
wim 30:033048611c01 1493 return 0x00 + column;
wim 30:033048611c01 1494 else
wim 30:033048611c01 1495 return 0x40 + (column - 8);
wim 32:59c4b8f648d4 1496 #else
wim 32:59c4b8f648d4 1497 if (column < (_nr_cols >> 1))
wim 32:59c4b8f648d4 1498 return 0x00 + column;
wim 32:59c4b8f648d4 1499 else
wim 32:59c4b8f648d4 1500 return 0x40 + (column - (_nr_cols >> 1));
wim 32:59c4b8f648d4 1501 #endif
wim 30:033048611c01 1502
wim 30:033048611c01 1503 // Not sure about this one, seems wrong.
wim 30:033048611c01 1504 // Left in for compatibility with original library
wim 30:033048611c01 1505 // case LCD16x2B:
wim 30:033048611c01 1506 // return 0x00 + (row * 40) + column;
wim 30:033048611c01 1507
wim 30:033048611c01 1508 case LCD_T_D:
wim 36:9f5f86dfd44a 1509 //Alternate addressing mode for 3 and 4 row displays (except 40x4). Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1510 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1511 //Displays top rows when less than four are used.
wim 30:033048611c01 1512 switch (row) {
wim 30:033048611c01 1513 case 0:
wim 30:033048611c01 1514 return 0x00 + column;
wim 30:033048611c01 1515 case 1:
wim 30:033048611c01 1516 return 0x20 + column;
wim 30:033048611c01 1517 case 2:
wim 30:033048611c01 1518 return 0x40 + column;
wim 30:033048611c01 1519 case 3:
wim 30:033048611c01 1520 return 0x60 + column;
wim 30:033048611c01 1521 // Should never get here.
wim 30:033048611c01 1522 default:
wim 30:033048611c01 1523 return 0x00;
wim 30:033048611c01 1524 }
wim 30:033048611c01 1525
wim 30:033048611c01 1526 case LCD_T_D1:
wim 36:9f5f86dfd44a 1527 //Alternate addressing mode for 3 row displays. Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1528 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1529 //Skips top row of 4 row display and starts display at row 1
wim 30:033048611c01 1530 switch (row) {
wim 30:033048611c01 1531 case 0:
wim 30:033048611c01 1532 return 0x20 + column;
wim 30:033048611c01 1533 case 1:
wim 30:033048611c01 1534 return 0x40 + column;
wim 30:033048611c01 1535 case 2:
wim 30:033048611c01 1536 return 0x60 + column;
wim 30:033048611c01 1537 // Should never get here.
wim 30:033048611c01 1538 default:
wim 30:033048611c01 1539 return 0x00;
wim 30:033048611c01 1540 }
wim 30:033048611c01 1541
wim 30:033048611c01 1542 case LCD_T_E:
wim 30:033048611c01 1543 // LCD40x4 is a special case since it has 2 controllers.
wim 30:033048611c01 1544 // Each controller is configured as 40x2 (Type A)
wim 30:033048611c01 1545 if (row<2) {
wim 30:033048611c01 1546 // Test to see if we need to switch between controllers
wim 30:033048611c01 1547 if (_ctrl_idx != _LCDCtrl_0) {
wim 30:033048611c01 1548
wim 30:033048611c01 1549 // Second LCD controller Cursor Off
wim 30:033048611c01 1550 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1551
wim 30:033048611c01 1552 // Select primary controller
wim 30:033048611c01 1553 _ctrl_idx = _LCDCtrl_0;
wim 30:033048611c01 1554
wim 30:033048611c01 1555 // Restore cursormode on primary LCD controller
wim 30:033048611c01 1556 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1557 }
wim 30:033048611c01 1558
wim 30:033048611c01 1559 return 0x00 + (row * 0x40) + column;
wim 30:033048611c01 1560 }
wim 30:033048611c01 1561 else {
wim 30:033048611c01 1562
wim 30:033048611c01 1563 // Test to see if we need to switch between controllers
wim 30:033048611c01 1564 if (_ctrl_idx != _LCDCtrl_1) {
wim 30:033048611c01 1565 // Primary LCD controller Cursor Off
wim 30:033048611c01 1566 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1567
wim 30:033048611c01 1568 // Select secondary controller
wim 30:033048611c01 1569 _ctrl_idx = _LCDCtrl_1;
wim 30:033048611c01 1570
wim 30:033048611c01 1571 // Restore cursormode on secondary LCD controller
wim 30:033048611c01 1572 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1573 }
wim 30:033048611c01 1574
wim 30:033048611c01 1575 return 0x00 + ((row-2) * 0x40) + column;
wim 30:033048611c01 1576 }
wim 30:033048611c01 1577
wim 32:59c4b8f648d4 1578 case LCD_T_F:
wim 32:59c4b8f648d4 1579 //Alternate addressing mode for 3 row displays.
wim 32:59c4b8f648d4 1580 //The first half of 3rd row continues from 1st row, the second half continues from 2nd row.
wim 32:59c4b8f648d4 1581 switch (row) {
wim 32:59c4b8f648d4 1582 case 0:
wim 32:59c4b8f648d4 1583 return 0x00 + column;
wim 32:59c4b8f648d4 1584 case 1:
wim 32:59c4b8f648d4 1585 return 0x40 + column;
wim 32:59c4b8f648d4 1586 case 2:
wim 32:59c4b8f648d4 1587 if (column < (_nr_cols >> 1)) // check first or second half of line
wim 32:59c4b8f648d4 1588 return (0x00 + _nr_cols + column);
wim 32:59c4b8f648d4 1589 else
wim 32:59c4b8f648d4 1590 return (0x40 + _nr_cols + (column - (_nr_cols >> 1)));
wim 32:59c4b8f648d4 1591 // Should never get here.
wim 32:59c4b8f648d4 1592 default:
wim 32:59c4b8f648d4 1593 return 0x00;
wim 32:59c4b8f648d4 1594 }
wim 32:59c4b8f648d4 1595
wim 32:59c4b8f648d4 1596 case LCD_T_G:
wim 32:59c4b8f648d4 1597 //Alternate addressing mode for 3 row displays. Used by ST7036
wim 32:59c4b8f648d4 1598 switch (row) {
wim 32:59c4b8f648d4 1599 case 0:
wim 32:59c4b8f648d4 1600 return 0x00 + column;
wim 32:59c4b8f648d4 1601 case 1:
wim 32:59c4b8f648d4 1602 return 0x10 + column;
wim 32:59c4b8f648d4 1603 case 2:
wim 32:59c4b8f648d4 1604 return 0x20 + column;
wim 32:59c4b8f648d4 1605 // Should never get here.
wim 32:59c4b8f648d4 1606 default:
wim 32:59c4b8f648d4 1607 return 0x00;
wim 32:59c4b8f648d4 1608 }
wim 32:59c4b8f648d4 1609
wim 30:033048611c01 1610 // Should never get here.
wim 30:033048611c01 1611 default:
wim 30:033048611c01 1612 return 0x00;
wim 32:59c4b8f648d4 1613
wim 32:59c4b8f648d4 1614 } // switch _addr_mode
wim 30:033048611c01 1615 }
wim 30:033048611c01 1616
wim 30:033048611c01 1617
wim 29:a3663151aa65 1618 /** Set the memoryaddress of screen column and row location
wim 29:a3663151aa65 1619 *
wim 29:a3663151aa65 1620 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1621 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1622 */
wim 21:9eb628d9e164 1623 void TextLCD_Base::setAddress(int column, int row) {
wim 15:b70ebfffb258 1624
wim 15:b70ebfffb258 1625 // Sanity Check column
wim 15:b70ebfffb258 1626 if (column < 0) {
wim 15:b70ebfffb258 1627 _column = 0;
wim 15:b70ebfffb258 1628 }
wim 36:9f5f86dfd44a 1629 else if (column >= _nr_cols) {
wim 36:9f5f86dfd44a 1630 _column = _nr_cols - 1;
wim 15:b70ebfffb258 1631 } else _column = column;
wim 8:03116f75b66e 1632
wim 15:b70ebfffb258 1633 // Sanity Check row
wim 15:b70ebfffb258 1634 if (row < 0) {
wim 15:b70ebfffb258 1635 _row = 0;
wim 15:b70ebfffb258 1636 }
wim 36:9f5f86dfd44a 1637 else if (row >= _nr_rows) {
wim 36:9f5f86dfd44a 1638 _row = _nr_rows - 1;
wim 15:b70ebfffb258 1639 } else _row = row;
wim 15:b70ebfffb258 1640
wim 15:b70ebfffb258 1641
wim 15:b70ebfffb258 1642 // Compute the memory address
wim 15:b70ebfffb258 1643 // For LCD40x4: switch controllers if needed
wim 15:b70ebfffb258 1644 // switch cursor if needed
wim 15:b70ebfffb258 1645 int addr = getAddress(_column, _row);
wim 8:03116f75b66e 1646
wim 13:24506ba22480 1647 _writeCommand(0x80 | addr);
wim 8:03116f75b66e 1648 }
simon 1:ac48b187213c 1649
wim 29:a3663151aa65 1650
wim 29:a3663151aa65 1651 /** Return the number of columns
wim 29:a3663151aa65 1652 *
wim 36:9f5f86dfd44a 1653 * @return The number of columns
wim 30:033048611c01 1654 *
wim 30:033048611c01 1655 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1656 */
wim 21:9eb628d9e164 1657 int TextLCD_Base::columns() {
wim 30:033048611c01 1658
wim 30:033048611c01 1659 // Columns encoded in b7..b0
wim 30:033048611c01 1660 //return (_type & 0xFF);
wim 31:ef31cd8a00d1 1661 return _nr_cols;
simon 1:ac48b187213c 1662 }
simon 1:ac48b187213c 1663
wim 29:a3663151aa65 1664 /** Return the number of rows
wim 29:a3663151aa65 1665 *
wim 36:9f5f86dfd44a 1666 * @return The number of rows
wim 30:033048611c01 1667 *
wim 30:033048611c01 1668 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1669 */
wim 21:9eb628d9e164 1670 int TextLCD_Base::rows() {
wim 30:033048611c01 1671
wim 30:033048611c01 1672 // Rows encoded in b15..b8
wim 30:033048611c01 1673 //return ((_type >> 8) & 0xFF);
wim 30:033048611c01 1674 return _nr_rows;
simon 1:ac48b187213c 1675 }
wim 10:dd9b3a696acd 1676
wim 29:a3663151aa65 1677 /** Set the Cursormode
wim 29:a3663151aa65 1678 *
wim 29:a3663151aa65 1679 * @param cursorMode The Cursor mode (CurOff_BlkOff, CurOn_BlkOff, CurOff_BlkOn, CurOn_BlkOn)
wim 29:a3663151aa65 1680 */
wim 21:9eb628d9e164 1681 void TextLCD_Base::setCursor(LCDCursor cursorMode) {
wim 15:b70ebfffb258 1682
wim 17:652ab113bc2e 1683 // Save new cursor mode, needed when 2 controllers are in use or when display is switched off/on
wim 17:652ab113bc2e 1684 _currentCursor = cursorMode;
wim 10:dd9b3a696acd 1685
wim 17:652ab113bc2e 1686 // Configure only current LCD controller
wim 31:ef31cd8a00d1 1687 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 15:b70ebfffb258 1688 }
wim 15:b70ebfffb258 1689
wim 29:a3663151aa65 1690 /** Set the Displaymode
wim 29:a3663151aa65 1691 *
wim 29:a3663151aa65 1692 * @param displayMode The Display mode (DispOff, DispOn)
wim 29:a3663151aa65 1693 */
wim 21:9eb628d9e164 1694 void TextLCD_Base::setMode(LCDMode displayMode) {
wim 17:652ab113bc2e 1695
wim 17:652ab113bc2e 1696 // Save new displayMode, needed when 2 controllers are in use or when cursor is changed
wim 17:652ab113bc2e 1697 _currentMode = displayMode;
wim 15:b70ebfffb258 1698
wim 17:652ab113bc2e 1699 // Select and configure second LCD controller when needed
wim 17:652ab113bc2e 1700 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1701 if (_ctrl_idx==_LCDCtrl_0) {
wim 17:652ab113bc2e 1702 // Configure primary LCD controller
wim 17:652ab113bc2e 1703 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 11:9ec02df863a1 1704
wim 17:652ab113bc2e 1705 // Select 2nd controller
wim 21:9eb628d9e164 1706 _ctrl_idx=_LCDCtrl_1;
wim 17:652ab113bc2e 1707
wim 17:652ab113bc2e 1708 // Configure secondary LCD controller
wim 21:9eb628d9e164 1709 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 11:9ec02df863a1 1710
wim 17:652ab113bc2e 1711 // Restore current controller
wim 21:9eb628d9e164 1712 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1713 }
wim 17:652ab113bc2e 1714 else {
wim 17:652ab113bc2e 1715 // Select primary controller
wim 21:9eb628d9e164 1716 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1717
wim 17:652ab113bc2e 1718 // Configure primary LCD controller
wim 21:9eb628d9e164 1719 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 17:652ab113bc2e 1720
wim 17:652ab113bc2e 1721 // Restore current controller
wim 21:9eb628d9e164 1722 _ctrl_idx=_LCDCtrl_1;
wim 11:9ec02df863a1 1723
wim 17:652ab113bc2e 1724 // Configure secondary LCD controller
wim 17:652ab113bc2e 1725 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 10:dd9b3a696acd 1726 }
wim 17:652ab113bc2e 1727 }
wim 17:652ab113bc2e 1728 else {
wim 17:652ab113bc2e 1729 // Configure primary LCD controller
wim 17:652ab113bc2e 1730 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1731 }
wim 17:652ab113bc2e 1732 }
wim 17:652ab113bc2e 1733
wim 29:a3663151aa65 1734 /** Low level method to restore the cursortype and display mode for current controller
wim 29:a3663151aa65 1735 */
wim 36:9f5f86dfd44a 1736 void TextLCD_Base::_setCursorAndDisplayMode(LCDMode displayMode, LCDCursor cursorType) {
wim 36:9f5f86dfd44a 1737
wim 36:9f5f86dfd44a 1738 // Configure current LCD controller
wim 36:9f5f86dfd44a 1739 switch (_ctrl) {
wim 36:9f5f86dfd44a 1740 case ST7070:
wim 36:9f5f86dfd44a 1741 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 36:9f5f86dfd44a 1742 _writeCommand(0x08 | displayMode | (cursorType & 0x02));
wim 36:9f5f86dfd44a 1743 break;
wim 36:9f5f86dfd44a 1744 default:
wim 36:9f5f86dfd44a 1745 _writeCommand(0x08 | displayMode | cursorType);
wim 36:9f5f86dfd44a 1746 break;
wim 36:9f5f86dfd44a 1747 } //switch
wim 10:dd9b3a696acd 1748 }
wim 10:dd9b3a696acd 1749
wim 29:a3663151aa65 1750 /** Set the Backlight mode
wim 29:a3663151aa65 1751 *
wim 29:a3663151aa65 1752 * @param backlightMode The Backlight mode (LightOff, LightOn)
wim 29:a3663151aa65 1753 */
wim 21:9eb628d9e164 1754 void TextLCD_Base::setBacklight(LCDBacklight backlightMode) {
wim 20:e0da005a777f 1755
wim 35:311be6444a39 1756 #if (BACKLIGHT_INV==0)
wim 35:311be6444a39 1757 // Positive Backlight control pin logic
wim 20:e0da005a777f 1758 if (backlightMode == LightOn) {
wim 35:311be6444a39 1759 this->_setBL(true);
wim 20:e0da005a777f 1760 }
wim 20:e0da005a777f 1761 else {
wim 21:9eb628d9e164 1762 this->_setBL(false);
wim 20:e0da005a777f 1763 }
wim 35:311be6444a39 1764 #else
wim 35:311be6444a39 1765 // Inverted Backlight control pin logic
wim 35:311be6444a39 1766 if (backlightMode == LightOn) {
wim 35:311be6444a39 1767 this->_setBL(false);
wim 35:311be6444a39 1768 }
wim 35:311be6444a39 1769 else {
wim 35:311be6444a39 1770 this->_setBL(true);
wim 35:311be6444a39 1771 }
wim 35:311be6444a39 1772 #endif
wim 20:e0da005a777f 1773 }
wim 20:e0da005a777f 1774
wim 29:a3663151aa65 1775 /** Set User Defined Characters
wim 29:a3663151aa65 1776 *
wim 34:e5a0dcb43ecc 1777 * @param unsigned char c The Index of the UDC (0..7) for HD44780 or clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1778 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 29:a3663151aa65 1779 */
wim 21:9eb628d9e164 1780 void TextLCD_Base::setUDC(unsigned char c, char *udc_data) {
wim 15:b70ebfffb258 1781
wim 15:b70ebfffb258 1782 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1783 if(_type==LCD40x4) {
wim 19:c747b9e2e7b8 1784 _LCDCtrl_Idx current_ctrl_idx = _ctrl_idx; // Temp save current controller
wim 15:b70ebfffb258 1785
wim 15:b70ebfffb258 1786 // Select primary controller
wim 21:9eb628d9e164 1787 _ctrl_idx=_LCDCtrl_0;
wim 15:b70ebfffb258 1788
wim 15:b70ebfffb258 1789 // Configure primary LCD controller
wim 15:b70ebfffb258 1790 _setUDC(c, udc_data);
wim 15:b70ebfffb258 1791
wim 15:b70ebfffb258 1792 // Select 2nd controller
wim 21:9eb628d9e164 1793 _ctrl_idx=_LCDCtrl_1;
wim 15:b70ebfffb258 1794
wim 15:b70ebfffb258 1795 // Configure secondary LCD controller
wim 15:b70ebfffb258 1796 _setUDC(c, udc_data);
wim 11:9ec02df863a1 1797
wim 15:b70ebfffb258 1798 // Restore current controller
wim 19:c747b9e2e7b8 1799 _ctrl_idx=current_ctrl_idx;
wim 15:b70ebfffb258 1800 }
wim 15:b70ebfffb258 1801 else {
wim 15:b70ebfffb258 1802 // Configure primary LCD controller
wim 15:b70ebfffb258 1803 _setUDC(c, udc_data);
wim 34:e5a0dcb43ecc 1804 }
wim 15:b70ebfffb258 1805 }
wim 15:b70ebfffb258 1806
wim 34:e5a0dcb43ecc 1807 /** Low level method to store user defined characters for current controller
wim 34:e5a0dcb43ecc 1808 *
wim 34:e5a0dcb43ecc 1809 * @param unsigned char c The Index of the UDC (0..7) for HD44780 clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1810 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 34:e5a0dcb43ecc 1811 */
wim 34:e5a0dcb43ecc 1812 void TextLCD_Base::_setUDC(unsigned char c, char *udc_data) {
wim 34:e5a0dcb43ecc 1813
wim 34:e5a0dcb43ecc 1814 switch (_ctrl) {
wim 34:e5a0dcb43ecc 1815 case PCF2103_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1816 case PCF2113_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1817 case PCF2116_3V3 :
wim 34:e5a0dcb43ecc 1818 case PCF2116_5V :
wim 34:e5a0dcb43ecc 1819 case PCF2119_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1820 c = c & 0x0F; // mask down to valid range
wim 34:e5a0dcb43ecc 1821 break;
wim 34:e5a0dcb43ecc 1822
wim 34:e5a0dcb43ecc 1823 default:
wim 34:e5a0dcb43ecc 1824 c = c & 0x07; // mask down to valid range
wim 34:e5a0dcb43ecc 1825 break;
wim 34:e5a0dcb43ecc 1826 } //switch _ctrl
wim 34:e5a0dcb43ecc 1827
wim 34:e5a0dcb43ecc 1828 // Select DD RAM for current LCD controller
wim 34:e5a0dcb43ecc 1829 // This is needed to correctly set Bit 6 of the addresspointer for controllers that support 16 UDCs
wim 34:e5a0dcb43ecc 1830 _writeCommand(0x80 | ((c << 3) & 0x40)) ;
wim 34:e5a0dcb43ecc 1831
wim 34:e5a0dcb43ecc 1832 // Select CG RAM for current LCD controller
wim 34:e5a0dcb43ecc 1833 _writeCommand(0x40 | ((c << 3) & 0x3F)); //Set CG-RAM address, (note that Bit 6 is retained and can not be set by this command !)
wim 34:e5a0dcb43ecc 1834 //8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 1835 // Store UDC pattern
wim 34:e5a0dcb43ecc 1836 for (int i=0; i<8; i++) {
wim 34:e5a0dcb43ecc 1837 _writeData(*udc_data++);
wim 34:e5a0dcb43ecc 1838 }
wim 34:e5a0dcb43ecc 1839
wim 34:e5a0dcb43ecc 1840 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 34:e5a0dcb43ecc 1841 int addr = getAddress(_column, _row);
wim 34:e5a0dcb43ecc 1842 _writeCommand(0x80 | addr);
wim 34:e5a0dcb43ecc 1843 }
wim 32:59c4b8f648d4 1844
wim 36:9f5f86dfd44a 1845 /** Set UDC Blink and Icon blink
wim 33:900a94bc7585 1846 * setUDCBlink method is supported by some compatible devices (eg SSD1803)
wim 33:900a94bc7585 1847 *
wim 33:900a94bc7585 1848 * @param blinkMode The Blink mode (BlinkOff, BlinkOn)
wim 33:900a94bc7585 1849 */
wim 33:900a94bc7585 1850 void TextLCD_Base::setUDCBlink(LCDBlink blinkMode){
wim 36:9f5f86dfd44a 1851 // Blinking UDCs (and icons) are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 1852 // The blinking pixels in the UDC and icons can be controlled by setting additional bits in the UDC or icon bitpattern.
wim 36:9f5f86dfd44a 1853 // UDCs are defined by an 8 byte bitpattern. The P0..P4 form the character pattern.
wim 33:900a94bc7585 1854 // P7 P6 P5 P4 P3 P2 P1 P0
wim 33:900a94bc7585 1855 // 0 B1 B0 x 0 1 1 1 0
wim 33:900a94bc7585 1856 // 1 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 1857 // .............
wim 33:900a94bc7585 1858 // 7 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 1859 //
wim 33:900a94bc7585 1860 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 33:900a94bc7585 1861 // B1 B0 Mode
wim 33:900a94bc7585 1862 // 0 0 No Blinking in this row of the UDC
wim 33:900a94bc7585 1863 // 0 1 Enabled pixels in P4 will blink
wim 33:900a94bc7585 1864 // 1 x Enabled pixels in P0..P4 will blink
wim 36:9f5f86dfd44a 1865 //
wim 36:9f5f86dfd44a 1866 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 1867 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 1868 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 1869 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 1870 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 1871 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 33:900a94bc7585 1872 switch (blinkMode) {
wim 33:900a94bc7585 1873 case BlinkOn:
wim 36:9f5f86dfd44a 1874 // Controllers that support UDC/Icon Blink
wim 33:900a94bc7585 1875 switch (_ctrl) {
wim 36:9f5f86dfd44a 1876 case KS0073 :
wim 33:900a94bc7585 1877 case KS0078 :
wim 36:9f5f86dfd44a 1878 _function_1 |= 0x02; // Enable UDC/Icon Blink
wim 36:9f5f86dfd44a 1879 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 1880
wim 33:900a94bc7585 1881 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 1882 break; // case KS0073, KS0078 Controller
wim 33:900a94bc7585 1883
wim 33:900a94bc7585 1884 case US2066_3V3 :
wim 33:900a94bc7585 1885 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 1886 _function_1 |= 0x04; // Enable UDC/Icon Blink
wim 33:900a94bc7585 1887 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1888 // Select Ext Instr Set
wim 33:900a94bc7585 1889
wim 33:900a94bc7585 1890 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 1891 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1892 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 1893
wim 36:9f5f86dfd44a 1894 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 1895 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 1896 case PCF2119_3V3 :
wim 36:9f5f86dfd44a 1897 // Enable Icon Blink
wim 36:9f5f86dfd44a 1898 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 1899 _writeCommand(0x08 | 0x02); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 1900 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 1901
wim 36:9f5f86dfd44a 1902 break;
wim 33:900a94bc7585 1903
wim 33:900a94bc7585 1904 default:
wim 33:900a94bc7585 1905 //Unsupported feature for other controllers
wim 33:900a94bc7585 1906 break;
wim 33:900a94bc7585 1907 } //switch _ctrl
wim 33:900a94bc7585 1908
wim 36:9f5f86dfd44a 1909 break; // BlinkOn
wim 33:900a94bc7585 1910
wim 33:900a94bc7585 1911 case BlinkOff:
wim 33:900a94bc7585 1912 // Controllers that support UDC Blink
wim 33:900a94bc7585 1913 switch (_ctrl) {
wim 36:9f5f86dfd44a 1914 case KS0073 :
wim 33:900a94bc7585 1915 case KS0078 :
wim 36:9f5f86dfd44a 1916 _function_1 &= ~0x02; // Disable UDC/Icon Blink
wim 36:9f5f86dfd44a 1917 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 1918
wim 33:900a94bc7585 1919 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 1920 break; // case KS0073, KS0078 Controller
wim 33:900a94bc7585 1921
wim 33:900a94bc7585 1922 case US2066_3V3 :
wim 33:900a94bc7585 1923 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 1924 _function_1 &= ~0x04; // Disable UDC/Icon Blink
wim 33:900a94bc7585 1925 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1926 // Select Ext Instr Set
wim 33:900a94bc7585 1927
wim 33:900a94bc7585 1928 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 1929 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1930 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 1931
wim 36:9f5f86dfd44a 1932 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 1933 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 1934 case PCF2119_3V3 :
wim 36:9f5f86dfd44a 1935 // Disable Icon Blink
wim 36:9f5f86dfd44a 1936 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 1937 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 1938 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 1939
wim 36:9f5f86dfd44a 1940 break;
wim 33:900a94bc7585 1941
wim 33:900a94bc7585 1942 default:
wim 33:900a94bc7585 1943 //Unsupported feature for other controllers
wim 33:900a94bc7585 1944 break;
wim 33:900a94bc7585 1945 } //switch _ctrl
wim 33:900a94bc7585 1946
wim 36:9f5f86dfd44a 1947 break; //BlinkOff
wim 33:900a94bc7585 1948
wim 33:900a94bc7585 1949 default:
wim 33:900a94bc7585 1950 break;
wim 33:900a94bc7585 1951 } // blinkMode
wim 33:900a94bc7585 1952
wim 33:900a94bc7585 1953 } // setUDCBlink()
wim 33:900a94bc7585 1954
wim 33:900a94bc7585 1955
wim 32:59c4b8f648d4 1956 /** Set Contrast
wim 32:59c4b8f648d4 1957 * setContrast method is supported by some compatible devices (eg ST7032i) that have onboard LCD voltage generation
wim 32:59c4b8f648d4 1958 * Initial code for ST70XX imported from fork by JH1PJL
wim 32:59c4b8f648d4 1959 *
wim 32:59c4b8f648d4 1960 * @param unsigned char c contrast data (6 significant bits, valid range 0..63, Value 0 will disable the Vgen)
wim 32:59c4b8f648d4 1961 * @return none
wim 32:59c4b8f648d4 1962 */
wim 32:59c4b8f648d4 1963 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 1964 void TextLCD_Base::setContrast(unsigned char c) {
wim 32:59c4b8f648d4 1965
wim 32:59c4b8f648d4 1966 // Function set mode stored during Init. Make sure we dont accidentally switch between 1-line and 2-line mode!
wim 32:59c4b8f648d4 1967 // Icon/Booster mode stored during Init. Make sure we dont accidentally change this!
wim 32:59c4b8f648d4 1968
wim 32:59c4b8f648d4 1969 _contrast = c & 0x3F; // Sanity check
wim 32:59c4b8f648d4 1970
wim 33:900a94bc7585 1971 switch (_ctrl) {
wim 32:59c4b8f648d4 1972 case PCF2113_3V3 :
wim 32:59c4b8f648d4 1973 case PCF2119_3V3 :
wim 32:59c4b8f648d4 1974 if (_contrast < 5) _contrast = 0; // See datasheet. Sanity check for PCF2113/PCF2119
wim 32:59c4b8f648d4 1975 if (_contrast > 55) _contrast = 55;
wim 32:59c4b8f648d4 1976
wim 32:59c4b8f648d4 1977 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 1978 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 1979 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 1980 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 1981 break;
wim 32:59c4b8f648d4 1982
wim 32:59c4b8f648d4 1983 case ST7032_3V3 :
wim 32:59c4b8f648d4 1984 case ST7032_5V :
wim 32:59c4b8f648d4 1985 case ST7036_3V3 :
wim 32:59c4b8f648d4 1986 // case ST7036_5V :
wim 32:59c4b8f648d4 1987 case SSD1803_3V3 :
wim 32:59c4b8f648d4 1988 _writeCommand(0x20 | _function | 0x01); // Select Instruction Set = 1
wim 32:59c4b8f648d4 1989 _writeCommand(0x70 | (_contrast & 0x0F)); // Contrast Low bits
wim 32:59c4b8f648d4 1990 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Contrast High bits
wim 32:59c4b8f648d4 1991 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 1992 break;
wim 32:59c4b8f648d4 1993
wim 33:900a94bc7585 1994 case US2066_3V3 :
wim 33:900a94bc7585 1995 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1996 // Select Extended Instruction Set
wim 33:900a94bc7585 1997
wim 33:900a94bc7585 1998 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1999
wim 33:900a94bc7585 2000 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 2001 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits. Use 6 bits for compatibility
wim 33:900a94bc7585 2002
wim 33:900a94bc7585 2003 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 2004
wim 33:900a94bc7585 2005 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2006 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2007 break;
wim 33:900a94bc7585 2008
wim 34:e5a0dcb43ecc 2009 //not yet tested on hardware
wim 32:59c4b8f648d4 2010 case PT6314 :
wim 32:59c4b8f648d4 2011 // Only 2 significant bits
wim 32:59c4b8f648d4 2012 // 0x00 = 100%
wim 32:59c4b8f648d4 2013 // 0x01 = 75%
wim 32:59c4b8f648d4 2014 // 0x02 = 50%
wim 32:59c4b8f648d4 2015 // 0x03 = 25%
wim 32:59c4b8f648d4 2016 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 32:59c4b8f648d4 2017 break;
wim 32:59c4b8f648d4 2018
wim 32:59c4b8f648d4 2019 default:
wim 32:59c4b8f648d4 2020 //Unsupported feature for other controllers
wim 33:900a94bc7585 2021 break;
wim 33:900a94bc7585 2022 } // end switch
wim 33:900a94bc7585 2023 } // end setContrast()
wim 32:59c4b8f648d4 2024
wim 32:59c4b8f648d4 2025
wim 32:59c4b8f648d4 2026 /** Set Power
wim 32:59c4b8f648d4 2027 * setPower method is supported by some compatible devices (eg SSD1803) that have power down modes
wim 32:59c4b8f648d4 2028 *
wim 32:59c4b8f648d4 2029 * @param bool powerOn Power on/off
wim 32:59c4b8f648d4 2030 * @return none
wim 32:59c4b8f648d4 2031 */
wim 32:59c4b8f648d4 2032 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2033 void TextLCD_Base::setPower(bool powerOn) {
wim 32:59c4b8f648d4 2034
wim 32:59c4b8f648d4 2035 if (powerOn) {
wim 32:59c4b8f648d4 2036 // Switch on
wim 32:59c4b8f648d4 2037 setMode(DispOn);
wim 32:59c4b8f648d4 2038
wim 32:59c4b8f648d4 2039 // Controllers that supports specific Power Down mode
wim 32:59c4b8f648d4 2040 switch (_ctrl) {
wim 32:59c4b8f648d4 2041
wim 32:59c4b8f648d4 2042 // case PCF2113_3V3 :
wim 32:59c4b8f648d4 2043 // case PCF2119_3V3 :
wim 32:59c4b8f648d4 2044 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2045 //@todo
wim 33:900a94bc7585 2046 // enable Booster Bon
wim 33:900a94bc7585 2047
wim 33:900a94bc7585 2048 case WS0010:
wim 33:900a94bc7585 2049 _writeCommand(0x17); // Char mode, DC/DC on
wim 33:900a94bc7585 2050 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 2051 break;
wim 33:900a94bc7585 2052
wim 36:9f5f86dfd44a 2053 case KS0073:
wim 33:900a94bc7585 2054 case KS0078:
wim 32:59c4b8f648d4 2055 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2056 // case SSD1803_5V :
wim 33:900a94bc7585 2057 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2058 _writeCommand(0x02); // Power On
wim 32:59c4b8f648d4 2059 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2060 break;
wim 32:59c4b8f648d4 2061
wim 32:59c4b8f648d4 2062 default:
wim 32:59c4b8f648d4 2063 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2064 break;
wim 32:59c4b8f648d4 2065 } // end switch
wim 32:59c4b8f648d4 2066 }
wim 32:59c4b8f648d4 2067 else {
wim 32:59c4b8f648d4 2068 // Switch off
wim 32:59c4b8f648d4 2069 setMode(DispOff);
wim 32:59c4b8f648d4 2070
wim 32:59c4b8f648d4 2071 // Controllers that support specific Power Down mode
wim 32:59c4b8f648d4 2072 switch (_ctrl) {
wim 32:59c4b8f648d4 2073
wim 32:59c4b8f648d4 2074 // case PCF2113_3V3 :
wim 32:59c4b8f648d4 2075 // case PCF2119_3V3 :
wim 32:59c4b8f648d4 2076 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2077 //@todo
wim 33:900a94bc7585 2078 // disable Booster Bon
wim 33:900a94bc7585 2079
wim 33:900a94bc7585 2080 case WS0010:
wim 33:900a94bc7585 2081 _writeCommand(0x13); // Char mode, DC/DC off
wim 33:900a94bc7585 2082 break;
wim 33:900a94bc7585 2083
wim 36:9f5f86dfd44a 2084 case KS0073:
wim 33:900a94bc7585 2085 case KS0078:
wim 32:59c4b8f648d4 2086 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2087 // case SSD1803_5V :
wim 33:900a94bc7585 2088 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2089 _writeCommand(0x03); // Power Down
wim 32:59c4b8f648d4 2090 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2091 break;
wim 32:59c4b8f648d4 2092
wim 32:59c4b8f648d4 2093 default:
wim 32:59c4b8f648d4 2094 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2095 break;
wim 32:59c4b8f648d4 2096 } // end switch
wim 32:59c4b8f648d4 2097 }
wim 33:900a94bc7585 2098 } // end setPower()
wim 33:900a94bc7585 2099
wim 33:900a94bc7585 2100
wim 33:900a94bc7585 2101 /** Set Orient
wim 33:900a94bc7585 2102 * setOrient method is supported by some compatible devices (eg SSD1803, US2066) that have top/bottom view modes
wim 33:900a94bc7585 2103 *
wim 33:900a94bc7585 2104 * @param LCDOrient orient Orientation
wim 33:900a94bc7585 2105 * @return none
wim 33:900a94bc7585 2106 */
wim 33:900a94bc7585 2107 void TextLCD_Base::setOrient(LCDOrient orient){
wim 33:900a94bc7585 2108
wim 33:900a94bc7585 2109 switch (orient) {
wim 33:900a94bc7585 2110
wim 33:900a94bc7585 2111 case Top:
wim 33:900a94bc7585 2112 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2113 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2114 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2115 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2116 case PCF2119_3V3:
wim 34:e5a0dcb43ecc 2117 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2118 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2119 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2120 break;
wim 34:e5a0dcb43ecc 2121
wim 33:900a94bc7585 2122 case SSD1803_3V3 :
wim 33:900a94bc7585 2123 // case SSD1803_5V :
wim 33:900a94bc7585 2124 case US2066_3V3 :
wim 33:900a94bc7585 2125 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2126 // Select Extended Instruction Set
wim 33:900a94bc7585 2127 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2128 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2129
wim 33:900a94bc7585 2130 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2131 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2132 break;
wim 36:9f5f86dfd44a 2133
wim 36:9f5f86dfd44a 2134 case ST7070:
wim 36:9f5f86dfd44a 2135 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL, N, EXT=1, x, x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2136
wim 36:9f5f86dfd44a 2137 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2138 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2139 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2140 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2141
wim 36:9f5f86dfd44a 2142 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2143
wim 36:9f5f86dfd44a 2144 break; // case ST7070 Controller
wim 33:900a94bc7585 2145
wim 33:900a94bc7585 2146 default:
wim 33:900a94bc7585 2147 //Unsupported feature for other controllers
wim 33:900a94bc7585 2148 break;
wim 33:900a94bc7585 2149
wim 33:900a94bc7585 2150 } // end switch _ctrl
wim 33:900a94bc7585 2151 break; // end Top
wim 33:900a94bc7585 2152
wim 33:900a94bc7585 2153 case Bottom:
wim 33:900a94bc7585 2154 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2155 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2156 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2157 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2158 case PCF2119_3V3:
wim 34:e5a0dcb43ecc 2159 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2160 _writeCommand(0x06); // Display Conf Set 0000 0, 1, P=1, Q=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2161 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2162 break;
wim 34:e5a0dcb43ecc 2163
wim 33:900a94bc7585 2164 case SSD1803_3V3 :
wim 33:900a94bc7585 2165 // case SSD1803_5V :
wim 33:900a94bc7585 2166 case US2066_3V3 :
wim 33:900a94bc7585 2167 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2168 // Select Extended Instruction Set
wim 33:900a94bc7585 2169 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2170 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2171
wim 33:900a94bc7585 2172 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2173 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2174 break;
wim 36:9f5f86dfd44a 2175
wim 36:9f5f86dfd44a 2176 case ST7070:
wim 36:9f5f86dfd44a 2177 //Note: this does not result in correct top/bottom view.
wim 36:9f5f86dfd44a 2178 //The left and right half of each row are reversed and the addressing of both rows is also incorrect:
wim 36:9f5f86dfd44a 2179 //Top/bottomline when orientation is flipped:
wim 36:9f5f86dfd44a 2180 // 0x48...0x4F 0x40...0x47
wim 36:9f5f86dfd44a 2181 // 0x08...0x0F 0x00...0x07
wim 36:9f5f86dfd44a 2182 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2183
wim 36:9f5f86dfd44a 2184 _writeCommand(0x40 | 0x0F); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2185 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2186 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2187 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2188
wim 36:9f5f86dfd44a 2189 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2190
wim 36:9f5f86dfd44a 2191 break; // case ST7070 Controller
wim 33:900a94bc7585 2192
wim 33:900a94bc7585 2193 default:
wim 33:900a94bc7585 2194 //Unsupported feature for other controllers
wim 33:900a94bc7585 2195 break;
wim 33:900a94bc7585 2196
wim 33:900a94bc7585 2197 } // end switch _ctrl
wim 33:900a94bc7585 2198
wim 33:900a94bc7585 2199 break; // end Bottom
wim 33:900a94bc7585 2200 } // end switch orient
wim 33:900a94bc7585 2201 } // end setOrient()
wim 33:900a94bc7585 2202
wim 34:e5a0dcb43ecc 2203 /** Set Big Font
wim 34:e5a0dcb43ecc 2204 * setBigFont method is supported by some compatible devices (eg SSD1803, US2066)
wim 34:e5a0dcb43ecc 2205 *
wim 34:e5a0dcb43ecc 2206 * @param lines The selected Big Font lines (None, TopLine, CenterLine, BottomLine, TopBottomLine)
wim 34:e5a0dcb43ecc 2207 * Double height characters can be shown on lines 1+2, 2+3, 3+4 or 1+2 and 3+4
wim 34:e5a0dcb43ecc 2208 * Valid double height lines depend on the LCDs number of rows.
wim 34:e5a0dcb43ecc 2209 */
wim 34:e5a0dcb43ecc 2210 void TextLCD_Base::setBigFont(LCDBigFont lines) {
wim 34:e5a0dcb43ecc 2211
wim 34:e5a0dcb43ecc 2212 switch (lines) {
wim 34:e5a0dcb43ecc 2213 case None:
wim 34:e5a0dcb43ecc 2214 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2215 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2216 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2217 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2218 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2219 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2220 // Default
wim 34:e5a0dcb43ecc 2221 _function = _function & ~0x04; // Set function, 0 0 1 DL N DH=0 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2222 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2223 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2224 break; // end US2066
wim 34:e5a0dcb43ecc 2225
wim 34:e5a0dcb43ecc 2226 default:
wim 34:e5a0dcb43ecc 2227 break; // end default
wim 34:e5a0dcb43ecc 2228 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2229 break; // end None
wim 34:e5a0dcb43ecc 2230
wim 34:e5a0dcb43ecc 2231 case TopLine:
wim 34:e5a0dcb43ecc 2232 if (_nr_rows < 2) return; //Sanity check
wim 34:e5a0dcb43ecc 2233
wim 34:e5a0dcb43ecc 2234 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2235 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2236 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2237 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2238 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2239 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2240 // Default
wim 34:e5a0dcb43ecc 2241 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2242 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2243 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2244 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2245
wim 34:e5a0dcb43ecc 2246 default:
wim 34:e5a0dcb43ecc 2247 break; // end default
wim 34:e5a0dcb43ecc 2248 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2249 break; // end TopLine
wim 34:e5a0dcb43ecc 2250
wim 34:e5a0dcb43ecc 2251 case CenterLine:
wim 34:e5a0dcb43ecc 2252 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2253
wim 34:e5a0dcb43ecc 2254 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2255 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2256 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2257 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2258 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2259 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2260 // Default
wim 34:e5a0dcb43ecc 2261 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2262 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2263 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2264 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2265
wim 34:e5a0dcb43ecc 2266 default:
wim 34:e5a0dcb43ecc 2267 break; // end default
wim 34:e5a0dcb43ecc 2268 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2269 break; // end CenterLine
wim 34:e5a0dcb43ecc 2270
wim 34:e5a0dcb43ecc 2271 case BottomLine:
wim 34:e5a0dcb43ecc 2272 if (_nr_rows < 3) return; //Sanity check
wim 34:e5a0dcb43ecc 2273
wim 34:e5a0dcb43ecc 2274 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2275 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2276 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2277 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2278 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2279 if (_nr_rows == 3) {
wim 34:e5a0dcb43ecc 2280 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2281 }
wim 34:e5a0dcb43ecc 2282 else {
wim 34:e5a0dcb43ecc 2283 _writeCommand(0x10); // Double Height, 0 0 0 1 UD2=0, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2284 }
wim 34:e5a0dcb43ecc 2285 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2286 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2287 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2288 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2289
wim 34:e5a0dcb43ecc 2290 default:
wim 34:e5a0dcb43ecc 2291 break; // end default
wim 34:e5a0dcb43ecc 2292 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2293 break; // end BottomLine
wim 34:e5a0dcb43ecc 2294
wim 34:e5a0dcb43ecc 2295 case TopBottomLine:
wim 34:e5a0dcb43ecc 2296 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2297
wim 34:e5a0dcb43ecc 2298 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2299 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2300 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2301 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2302 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2303 _writeCommand(0x18); // Double Height, 0 0 0 1 UD2=1, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2304 // Default
wim 34:e5a0dcb43ecc 2305 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2306 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2307 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2308 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2309
wim 34:e5a0dcb43ecc 2310 default:
wim 34:e5a0dcb43ecc 2311 break; // end default
wim 34:e5a0dcb43ecc 2312 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2313 break; // end TopBottomLine
wim 34:e5a0dcb43ecc 2314
wim 34:e5a0dcb43ecc 2315 } // end switch lines
wim 34:e5a0dcb43ecc 2316
wim 34:e5a0dcb43ecc 2317 } // end setBigFont()
wim 32:59c4b8f648d4 2318
wim 36:9f5f86dfd44a 2319
wim 36:9f5f86dfd44a 2320 /** Set Icons
wim 36:9f5f86dfd44a 2321 *
wim 36:9f5f86dfd44a 2322 * @param unsigned char idx The Index of the icon pattern (0..15) for KS0073 and similar controllers
wim 36:9f5f86dfd44a 2323 * and Index (0..31) for PCF2103 and similar controllers
wim 36:9f5f86dfd44a 2324 * @param unsigned char data The bitpattern for the icons (6 lsb for KS0073 bitpattern (5 lsb for KS0078) and 2 msb for blinkmode)
wim 36:9f5f86dfd44a 2325 * The bitpattern for the PCF2103 icons is 5 lsb (UDC 0..2) and 5 lsb for blinkmode (UDC 4..6)
wim 36:9f5f86dfd44a 2326 */
wim 36:9f5f86dfd44a 2327 void TextLCD_Base::setIcon(unsigned char idx, unsigned char data) {
wim 36:9f5f86dfd44a 2328 // Blinking icons are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2329 // The blinking pixels in the icons can be controlled by setting additional bits in the icon bitpattern.
wim 36:9f5f86dfd44a 2330 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2331 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2332 // 0 B1 B0 0 0 1 1 1 0
wim 36:9f5f86dfd44a 2333 // 1 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2334 // .............
wim 36:9f5f86dfd44a 2335 // 15 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2336 //
wim 36:9f5f86dfd44a 2337 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2338 // B1 B0 Mode
wim 36:9f5f86dfd44a 2339 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2340 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2341 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2342 //
wim 36:9f5f86dfd44a 2343 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2344 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2345 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2346 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2347 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2348 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2349
wim 36:9f5f86dfd44a 2350 switch (_ctrl) {
wim 36:9f5f86dfd44a 2351 case KS0073:
wim 36:9f5f86dfd44a 2352 case KS0078:
wim 36:9f5f86dfd44a 2353 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2354 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2355 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2356
wim 36:9f5f86dfd44a 2357 _writeData(data); // Set Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2358
wim 36:9f5f86dfd44a 2359 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2360 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2361 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2362
wim 36:9f5f86dfd44a 2363 case ST7032_3V3:
wim 36:9f5f86dfd44a 2364 case ST7032_5V:
wim 36:9f5f86dfd44a 2365 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2366 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2367
wim 36:9f5f86dfd44a 2368 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2369
wim 36:9f5f86dfd44a 2370 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2371 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2372 break; // end ST7032
wim 36:9f5f86dfd44a 2373
wim 36:9f5f86dfd44a 2374 case ST7036_3V3:
wim 36:9f5f86dfd44a 2375 case ST7036_5V:
wim 36:9f5f86dfd44a 2376 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2377 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2378
wim 36:9f5f86dfd44a 2379 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2380
wim 36:9f5f86dfd44a 2381 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2382 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2383 break; // end ST7036
wim 36:9f5f86dfd44a 2384
wim 36:9f5f86dfd44a 2385 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2386 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2387 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2388 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2389 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set = 1)
wim 36:9f5f86dfd44a 2390 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2391
wim 36:9f5f86dfd44a 2392 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2393 // Select IS=0
wim 36:9f5f86dfd44a 2394 break; // end SSD1803
wim 36:9f5f86dfd44a 2395
wim 36:9f5f86dfd44a 2396 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2397 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2398 case PCF2119_3V3:
wim 36:9f5f86dfd44a 2399 // Store UDC/Icon pattern for PCF2103 and PCF2113:
wim 36:9f5f86dfd44a 2400 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2401 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2402 // Store UDC/Icon pattern for PCF2119:
wim 36:9f5f86dfd44a 2403 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2404 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2405 _writeCommand(0x40 | (idx & 0x3F)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2406 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2407 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2408
wim 36:9f5f86dfd44a 2409 default:
wim 36:9f5f86dfd44a 2410 break; // end default
wim 36:9f5f86dfd44a 2411 } // end switch _ctrl
wim 36:9f5f86dfd44a 2412
wim 36:9f5f86dfd44a 2413 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2414 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2415 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2416
wim 36:9f5f86dfd44a 2417 } // end setIcon()
wim 36:9f5f86dfd44a 2418
wim 36:9f5f86dfd44a 2419 /** Clear Icons
wim 36:9f5f86dfd44a 2420 *
wim 36:9f5f86dfd44a 2421 * @param none
wim 36:9f5f86dfd44a 2422 * @return none
wim 36:9f5f86dfd44a 2423 */
wim 36:9f5f86dfd44a 2424 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2425 void TextLCD_Base::clrIcon() {
wim 36:9f5f86dfd44a 2426 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2427 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2428 // 0 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2429 // 1 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2430 // .............
wim 36:9f5f86dfd44a 2431 // 15 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2432 //
wim 36:9f5f86dfd44a 2433 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2434 // B1 B0 Mode
wim 36:9f5f86dfd44a 2435 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2436 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2437 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2438 //
wim 36:9f5f86dfd44a 2439 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2440 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2441 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2442 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2443 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2444 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2445 int idx;
wim 36:9f5f86dfd44a 2446
wim 36:9f5f86dfd44a 2447 switch (_ctrl) {
wim 36:9f5f86dfd44a 2448 case KS0073:
wim 36:9f5f86dfd44a 2449 case KS0078:
wim 36:9f5f86dfd44a 2450 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2451 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2452 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2453 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2454 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2455 }
wim 36:9f5f86dfd44a 2456 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Std Instruction Set
wim 36:9f5f86dfd44a 2457 // Select Std Instr set
wim 36:9f5f86dfd44a 2458 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2459
wim 36:9f5f86dfd44a 2460 case ST7032_3V3:
wim 36:9f5f86dfd44a 2461 case ST7032_5V:
wim 36:9f5f86dfd44a 2462 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2463
wim 36:9f5f86dfd44a 2464 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2465 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2466 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2467 }
wim 36:9f5f86dfd44a 2468
wim 36:9f5f86dfd44a 2469 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2470 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2471 break; // end ST7032
wim 36:9f5f86dfd44a 2472
wim 36:9f5f86dfd44a 2473 case ST7036_3V3:
wim 36:9f5f86dfd44a 2474 case ST7036_5V:
wim 36:9f5f86dfd44a 2475 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2476
wim 36:9f5f86dfd44a 2477 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2478 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2479 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2480 }
wim 36:9f5f86dfd44a 2481
wim 36:9f5f86dfd44a 2482 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2483 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2484 break; // end ST7036
wim 36:9f5f86dfd44a 2485
wim 36:9f5f86dfd44a 2486 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2487 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2488 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2489 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2490 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2491 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2492 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2493 }
wim 36:9f5f86dfd44a 2494 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2495 // Select IS=0
wim 36:9f5f86dfd44a 2496 break; // end SSD1803
wim 36:9f5f86dfd44a 2497
wim 36:9f5f86dfd44a 2498 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2499 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2500 // PCF2103 and PCF2113 use part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2501 // Select CG RAM
wim 36:9f5f86dfd44a 2502
wim 36:9f5f86dfd44a 2503 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2504 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2505 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2506 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2507 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2508 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2509 }
wim 36:9f5f86dfd44a 2510
wim 36:9f5f86dfd44a 2511 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2512 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2513 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2514 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2515 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2516 }
wim 36:9f5f86dfd44a 2517 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2518
wim 36:9f5f86dfd44a 2519 case PCF2119_3V3:
wim 36:9f5f86dfd44a 2520 // PCF2119 uses part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2521 // Select CG RAM
wim 36:9f5f86dfd44a 2522
wim 36:9f5f86dfd44a 2523 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2524 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2525 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2526 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2527 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2528 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2529 }
wim 36:9f5f86dfd44a 2530
wim 36:9f5f86dfd44a 2531 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2532 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2533 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2534 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2535 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2536 }
wim 36:9f5f86dfd44a 2537 break; // case PCF2119_3V3 Controller
wim 36:9f5f86dfd44a 2538
wim 36:9f5f86dfd44a 2539 default:
wim 36:9f5f86dfd44a 2540 break; // end default
wim 36:9f5f86dfd44a 2541 } // end switch _ctrl
wim 36:9f5f86dfd44a 2542
wim 36:9f5f86dfd44a 2543 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2544 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2545 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2546 } //end clrIcon()
wim 36:9f5f86dfd44a 2547
wim 36:9f5f86dfd44a 2548
wim 36:9f5f86dfd44a 2549 /** Set Invert
wim 36:9f5f86dfd44a 2550 * setInvert method is supported by some compatible devices (eg KS0073) to swap between black and white
wim 36:9f5f86dfd44a 2551 *
wim 36:9f5f86dfd44a 2552 * @param bool invertOn Invert on/off
wim 36:9f5f86dfd44a 2553 * @return none
wim 36:9f5f86dfd44a 2554 */
wim 36:9f5f86dfd44a 2555 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2556 void TextLCD_Base::setInvert(bool invertOn) {
wim 36:9f5f86dfd44a 2557
wim 36:9f5f86dfd44a 2558 if (invertOn) {
wim 36:9f5f86dfd44a 2559 // Controllers that support Invert
wim 36:9f5f86dfd44a 2560 switch (_ctrl) {
wim 36:9f5f86dfd44a 2561 case KS0073:
wim 36:9f5f86dfd44a 2562 case KS0078:
wim 36:9f5f86dfd44a 2563 _function = _function | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2564 _writeCommand(0x20 | _function); // Activate Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2565 break;
wim 36:9f5f86dfd44a 2566 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2567 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2568 case US2066_3V3:
wim 36:9f5f86dfd44a 2569 // case USS2066_5V:
wim 36:9f5f86dfd44a 2570 _function_1 = _function_1 | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2571 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2572 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2573 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2574 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2575 break;
wim 36:9f5f86dfd44a 2576 default:
wim 36:9f5f86dfd44a 2577 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2578 break;
wim 36:9f5f86dfd44a 2579 } // end switch
wim 36:9f5f86dfd44a 2580 }
wim 36:9f5f86dfd44a 2581 else {
wim 36:9f5f86dfd44a 2582 // Controllers that support Invert
wim 36:9f5f86dfd44a 2583 switch (_ctrl) {
wim 36:9f5f86dfd44a 2584 case KS0073:
wim 36:9f5f86dfd44a 2585 case KS0078:
wim 36:9f5f86dfd44a 2586 _function = _function & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2587 _writeCommand(0x20 | _function); // Disable Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2588 break;
wim 36:9f5f86dfd44a 2589 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2590 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2591 case US2066_3V3:
wim 36:9f5f86dfd44a 2592 // case USS2066_5V:
wim 36:9f5f86dfd44a 2593 _function_1 = _function_1 & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2594 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2595 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2596 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2597 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2598 break;
wim 36:9f5f86dfd44a 2599
wim 36:9f5f86dfd44a 2600 default:
wim 36:9f5f86dfd44a 2601 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2602 break;
wim 36:9f5f86dfd44a 2603 } // end switch
wim 36:9f5f86dfd44a 2604 }
wim 36:9f5f86dfd44a 2605 } // end setInvert()
wim 36:9f5f86dfd44a 2606
wim 23:d47f226efb24 2607 //--------- End TextLCD_Base -----------
wim 21:9eb628d9e164 2608
wim 22:35742ec80c24 2609
wim 23:d47f226efb24 2610 //--------- Start TextLCD Bus -----------
wim 21:9eb628d9e164 2611
wim 21:9eb628d9e164 2612 /* Create a TextLCD interface for using regular mbed pins
wim 21:9eb628d9e164 2613 *
wim 21:9eb628d9e164 2614 * @param rs Instruction/data control line
wim 21:9eb628d9e164 2615 * @param e Enable line (clock)
wim 21:9eb628d9e164 2616 * @param d4-d7 Data lines for using as a 4-bit interface
wim 21:9eb628d9e164 2617 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 2618 * @param bl Backlight control line (optional, default = NC)
wim 21:9eb628d9e164 2619 * @param e2 Enable2 line (clock for second controller, LCD40x4 only)
wim 21:9eb628d9e164 2620 * @param ctrl LCD controller (default = HD44780)
wim 21:9eb628d9e164 2621 */
wim 21:9eb628d9e164 2622 TextLCD::TextLCD(PinName rs, PinName e,
wim 21:9eb628d9e164 2623 PinName d4, PinName d5, PinName d6, PinName d7,
wim 21:9eb628d9e164 2624 LCDType type, PinName bl, PinName e2, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2625 TextLCD_Base(type, ctrl),
wim 22:35742ec80c24 2626 _rs(rs), _e(e), _d(d4, d5, d6, d7) {
wim 22:35742ec80c24 2627
wim 22:35742ec80c24 2628 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2629 if (bl != NC) {
wim 22:35742ec80c24 2630 _bl = new DigitalOut(bl); //Construct new pin
wim 22:35742ec80c24 2631 _bl->write(0); //Deactivate
wim 22:35742ec80c24 2632 }
wim 22:35742ec80c24 2633 else {
wim 22:35742ec80c24 2634 // No Hardware Backlight pin
wim 22:35742ec80c24 2635 _bl = NULL; //Construct dummy pin
wim 22:35742ec80c24 2636 }
wim 22:35742ec80c24 2637
wim 22:35742ec80c24 2638 // The hardware Enable2 pin is only needed for LCD40x4. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2639 if (e2 != NC) {
wim 22:35742ec80c24 2640 _e2 = new DigitalOut(e2); //Construct new pin
wim 22:35742ec80c24 2641 _e2->write(0); //Deactivate
wim 22:35742ec80c24 2642 }
wim 22:35742ec80c24 2643 else {
wim 22:35742ec80c24 2644 // No Hardware Enable pin
wim 22:35742ec80c24 2645 _e2 = NULL; //Construct dummy pin
wim 22:35742ec80c24 2646 }
wim 21:9eb628d9e164 2647
wim 21:9eb628d9e164 2648 _init();
wim 21:9eb628d9e164 2649 }
wim 21:9eb628d9e164 2650
wim 29:a3663151aa65 2651 /** Destruct a TextLCD interface for using regular mbed pins
wim 29:a3663151aa65 2652 *
wim 29:a3663151aa65 2653 * @param none
wim 29:a3663151aa65 2654 * @return none
wim 29:a3663151aa65 2655 */
wim 29:a3663151aa65 2656 TextLCD::~TextLCD() {
wim 29:a3663151aa65 2657 if (_bl != NULL) {delete _bl;} // BL pin
wim 29:a3663151aa65 2658 if (_e2 != NULL) {delete _e2;} // E2 pin
wim 29:a3663151aa65 2659 }
wim 29:a3663151aa65 2660
wim 22:35742ec80c24 2661 /** Set E pin (or E2 pin)
wim 22:35742ec80c24 2662 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2663 * Default PinName value for E2 is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2664 * @param value true or false
wim 22:35742ec80c24 2665 * @return none
wim 22:35742ec80c24 2666 */
wim 21:9eb628d9e164 2667 void TextLCD::_setEnable(bool value) {
wim 21:9eb628d9e164 2668
wim 22:35742ec80c24 2669 if(_ctrl_idx==_LCDCtrl_0) {
wim 22:35742ec80c24 2670 if (value) {
wim 22:35742ec80c24 2671 _e = 1; // Set E bit
wim 22:35742ec80c24 2672 }
wim 22:35742ec80c24 2673 else {
wim 22:35742ec80c24 2674 _e = 0; // Reset E bit
wim 22:35742ec80c24 2675 }
wim 22:35742ec80c24 2676 }
wim 22:35742ec80c24 2677 else {
wim 22:35742ec80c24 2678 if (value) {
wim 22:35742ec80c24 2679 if (_e2 != NULL) {_e2->write(1);} //Set E2 bit
wim 22:35742ec80c24 2680 }
wim 22:35742ec80c24 2681 else {
wim 22:35742ec80c24 2682 if (_e2 != NULL) {_e2->write(0);} //Reset E2 bit
wim 22:35742ec80c24 2683 }
wim 22:35742ec80c24 2684 }
wim 21:9eb628d9e164 2685 }
wim 21:9eb628d9e164 2686
wim 21:9eb628d9e164 2687 // Set RS pin
wim 21:9eb628d9e164 2688 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2689 void TextLCD::_setRS(bool value) {
wim 21:9eb628d9e164 2690
wim 22:35742ec80c24 2691 if (value) {
wim 21:9eb628d9e164 2692 _rs = 1; // Set RS bit
wim 22:35742ec80c24 2693 }
wim 22:35742ec80c24 2694 else {
wim 21:9eb628d9e164 2695 _rs = 0; // Reset RS bit
wim 22:35742ec80c24 2696 }
wim 21:9eb628d9e164 2697 }
wim 21:9eb628d9e164 2698
wim 22:35742ec80c24 2699 /** Set BL pin
wim 22:35742ec80c24 2700 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2701 * Default PinName value is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2702 * @param value true or false
wim 22:35742ec80c24 2703 * @return none
wim 22:35742ec80c24 2704 */
wim 21:9eb628d9e164 2705 void TextLCD::_setBL(bool value) {
wim 21:9eb628d9e164 2706
wim 22:35742ec80c24 2707 if (value) {
wim 22:35742ec80c24 2708 if (_bl != NULL) {_bl->write(1);} //Set BL bit
wim 22:35742ec80c24 2709 }
wim 22:35742ec80c24 2710 else {
wim 22:35742ec80c24 2711 if (_bl != NULL) {_bl->write(0);} //Reset BL bit
wim 22:35742ec80c24 2712 }
wim 21:9eb628d9e164 2713 }
wim 21:9eb628d9e164 2714
wim 21:9eb628d9e164 2715 // Place the 4bit data on the databus
wim 21:9eb628d9e164 2716 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 21:9eb628d9e164 2717 void TextLCD::_setData(int value) {
wim 21:9eb628d9e164 2718 _d = value & 0x0F; // Write Databits
wim 21:9eb628d9e164 2719 }
wim 34:e5a0dcb43ecc 2720
wim 23:d47f226efb24 2721 //----------- End TextLCD ---------------
wim 21:9eb628d9e164 2722
wim 21:9eb628d9e164 2723
wim 23:d47f226efb24 2724 //--------- Start TextLCD_I2C -----------
wim 34:e5a0dcb43ecc 2725 #if(LCD_I2C == 1) /* I2C Expander PCF8574/MCP23008 */
wim 26:bd897a001012 2726 /** Create a TextLCD interface using an I2C PC8574 (or PCF8574A) or MCP23008 portexpander
wim 22:35742ec80c24 2727 *
wim 22:35742ec80c24 2728 * @param i2c I2C Bus
wim 26:bd897a001012 2729 * @param deviceAddress I2C slave address (PCF8574, PCF8574A or MCP23008, default = 0x40)
wim 22:35742ec80c24 2730 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 22:35742ec80c24 2731 * @param ctrl LCD controller (default = HD44780)
wim 22:35742ec80c24 2732 */
wim 21:9eb628d9e164 2733 TextLCD_I2C::TextLCD_I2C(I2C *i2c, char deviceAddress, LCDType type, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2734 TextLCD_Base(type, ctrl),
wim 21:9eb628d9e164 2735 _i2c(i2c){
wim 21:9eb628d9e164 2736
wim 22:35742ec80c24 2737 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 2738
wim 28:30fa94f7341c 2739 // Setup the I2C bus
wim 28:30fa94f7341c 2740 // The max bitrate for PCF8574 is 100kbit, the max bitrate for MCP23008 is 400kbit,
wim 32:59c4b8f648d4 2741 _i2c->frequency(100000);
wim 21:9eb628d9e164 2742
wim 26:bd897a001012 2743 #if (MCP23008==1)
wim 26:bd897a001012 2744 // MCP23008 portexpander Init
wim 27:22d5086f6ba6 2745 _write_register(IODIR, 0x00); // All outputs
wim 27:22d5086f6ba6 2746 _write_register(IPOL, 0x00); // No reverse polarity
wim 27:22d5086f6ba6 2747 _write_register(GPINTEN, 0x00); // No interrupt
wim 27:22d5086f6ba6 2748 _write_register(DEFVAL, 0x00); // Default value to compare against for interrupts
wim 27:22d5086f6ba6 2749 _write_register(INTCON, 0x00); // No interrupt on changes
wim 27:22d5086f6ba6 2750 _write_register(IOCON, 0x00); // Interrupt polarity
wim 27:22d5086f6ba6 2751 _write_register(GPPU, 0x00); // No Pullup
wim 27:22d5086f6ba6 2752 _write_register(INTF, 0x00); //
wim 27:22d5086f6ba6 2753 _write_register(INTCAP, 0x00); //
wim 27:22d5086f6ba6 2754 _write_register(GPIO, 0x00); // Output/Input pins
wim 27:22d5086f6ba6 2755 _write_register(OLAT, 0x00); // Output Latch
wim 26:bd897a001012 2756
wim 21:9eb628d9e164 2757 // Init the portexpander bus
wim 21:9eb628d9e164 2758 _lcd_bus = D_LCD_BUS_DEF;
wim 21:9eb628d9e164 2759
wim 21:9eb628d9e164 2760 // write the new data to the portexpander
wim 26:bd897a001012 2761 _write_register(GPIO, _lcd_bus);
wim 26:bd897a001012 2762 #else
wim 26:bd897a001012 2763 // PCF8574 of PCF8574A portexpander
wim 26:bd897a001012 2764
wim 26:bd897a001012 2765 // Init the portexpander bus
wim 26:bd897a001012 2766 _lcd_bus = D_LCD_BUS_DEF;
wim 26:bd897a001012 2767
wim 26:bd897a001012 2768 // write the new data to the portexpander
wim 21:9eb628d9e164 2769 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 2770 #endif
wim 21:9eb628d9e164 2771
wim 30:033048611c01 2772 _init();
wim 21:9eb628d9e164 2773 }
wim 21:9eb628d9e164 2774
wim 21:9eb628d9e164 2775 // Set E pin (or E2 pin)
wim 21:9eb628d9e164 2776 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2777 void TextLCD_I2C::_setEnable(bool value) {
wim 21:9eb628d9e164 2778
wim 22:35742ec80c24 2779 if(_ctrl_idx==_LCDCtrl_0) {
wim 26:bd897a001012 2780 if (value) {
wim 22:35742ec80c24 2781 _lcd_bus |= D_LCD_E; // Set E bit
wim 26:bd897a001012 2782 }
wim 26:bd897a001012 2783 else {
wim 22:35742ec80c24 2784 _lcd_bus &= ~D_LCD_E; // Reset E bit
wim 26:bd897a001012 2785 }
wim 22:35742ec80c24 2786 }
wim 22:35742ec80c24 2787 else {
wim 26:bd897a001012 2788 if (value) {
wim 22:35742ec80c24 2789 _lcd_bus |= D_LCD_E2; // Set E2 bit
wim 26:bd897a001012 2790 }
wim 26:bd897a001012 2791 else {
wim 22:35742ec80c24 2792 _lcd_bus &= ~D_LCD_E2; // Reset E2bit
wim 26:bd897a001012 2793 }
wim 26:bd897a001012 2794 }
wim 26:bd897a001012 2795
wim 26:bd897a001012 2796 #if (MCP23008==1)
wim 26:bd897a001012 2797 // MCP23008 portexpander
wim 26:bd897a001012 2798
wim 26:bd897a001012 2799 // write the new data to the portexpander
wim 26:bd897a001012 2800 _write_register(GPIO, _lcd_bus);
wim 26:bd897a001012 2801 #else
wim 26:bd897a001012 2802 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 2803
wim 22:35742ec80c24 2804 // write the new data to the I2C portexpander
wim 22:35742ec80c24 2805 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 2806 #endif
wim 21:9eb628d9e164 2807 }
wim 21:9eb628d9e164 2808
wim 21:9eb628d9e164 2809 // Set RS pin
wim 21:9eb628d9e164 2810 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2811 void TextLCD_I2C::_setRS(bool value) {
wim 21:9eb628d9e164 2812
wim 26:bd897a001012 2813 if (value) {
wim 22:35742ec80c24 2814 _lcd_bus |= D_LCD_RS; // Set RS bit
wim 26:bd897a001012 2815 }
wim 26:bd897a001012 2816 else {
wim 22:35742ec80c24 2817 _lcd_bus &= ~D_LCD_RS; // Reset RS bit
wim 26:bd897a001012 2818 }
wim 26:bd897a001012 2819
wim 26:bd897a001012 2820 #if (MCP23008==1)
wim 26:bd897a001012 2821 // MCP23008 portexpander
wim 26:bd897a001012 2822
wim 26:bd897a001012 2823 // write the new data to the portexpander
wim 26:bd897a001012 2824 _write_register(GPIO, _lcd_bus);
wim 26:bd897a001012 2825 #else
wim 26:bd897a001012 2826 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 2827
wim 22:35742ec80c24 2828 // write the new data to the I2C portexpander
wim 22:35742ec80c24 2829 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 2830 #endif
wim 21:9eb628d9e164 2831 }
wim 21:9eb628d9e164 2832
wim 21:9eb628d9e164 2833 // Set BL pin
wim 21:9eb628d9e164 2834 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2835 void TextLCD_I2C::_setBL(bool value) {
wim 21:9eb628d9e164 2836
wim 26:bd897a001012 2837 if (value) {
wim 21:9eb628d9e164 2838 _lcd_bus |= D_LCD_BL; // Set BL bit
wim 26:bd897a001012 2839 }
wim 26:bd897a001012 2840 else {
wim 21:9eb628d9e164 2841 _lcd_bus &= ~D_LCD_BL; // Reset BL bit
wim 26:bd897a001012 2842 }
wim 26:bd897a001012 2843
wim 26:bd897a001012 2844 #if (MCP23008==1)
wim 26:bd897a001012 2845 // MCP23008 portexpander
wim 26:bd897a001012 2846
wim 26:bd897a001012 2847 // write the new data to the portexpander
wim 26:bd897a001012 2848 _write_register(GPIO, _lcd_bus);
wim 26:bd897a001012 2849 #else
wim 26:bd897a001012 2850 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 2851
wim 21:9eb628d9e164 2852 // write the new data to the I2C portexpander
wim 21:9eb628d9e164 2853 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 2854 #endif
wim 21:9eb628d9e164 2855 }
wim 21:9eb628d9e164 2856
wim 21:9eb628d9e164 2857
wim 21:9eb628d9e164 2858 // Place the 4bit data on the databus
wim 21:9eb628d9e164 2859 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 21:9eb628d9e164 2860 void TextLCD_I2C::_setData(int value) {
wim 21:9eb628d9e164 2861 int data;
wim 22:35742ec80c24 2862
wim 22:35742ec80c24 2863 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 21:9eb628d9e164 2864
wim 22:35742ec80c24 2865 data = value & 0x0F;
wim 26:bd897a001012 2866 if (data & 0x01){
wim 22:35742ec80c24 2867 _lcd_bus |= D_LCD_D4; // Set Databit
wim 26:bd897a001012 2868 }
wim 26:bd897a001012 2869 else {
wim 26:bd897a001012 2870 _lcd_bus &= ~D_LCD_D4; // Reset Databit
wim 26:bd897a001012 2871 }
wim 21:9eb628d9e164 2872
wim 26:bd897a001012 2873 if (data & 0x02){
wim 22:35742ec80c24 2874 _lcd_bus |= D_LCD_D5; // Set Databit
wim 26:bd897a001012 2875 }
wim 26:bd897a001012 2876 else {
wim 26:bd897a001012 2877 _lcd_bus &= ~D_LCD_D5; // Reset Databit
wim 26:bd897a001012 2878 }
wim 21:9eb628d9e164 2879
wim 26:bd897a001012 2880 if (data & 0x04) {
wim 22:35742ec80c24 2881 _lcd_bus |= D_LCD_D6; // Set Databit
wim 26:bd897a001012 2882 }
wim 26:bd897a001012 2883 else {
wim 26:bd897a001012 2884 _lcd_bus &= ~D_LCD_D6; // Reset Databit
wim 26:bd897a001012 2885 }
wim 21:9eb628d9e164 2886
wim 26:bd897a001012 2887 if (data & 0x08) {
wim 22:35742ec80c24 2888 _lcd_bus |= D_LCD_D7; // Set Databit
wim 26:bd897a001012 2889 }
wim 26:bd897a001012 2890 else {
wim 26:bd897a001012 2891 _lcd_bus &= ~D_LCD_D7; // Reset Databit
wim 26:bd897a001012 2892 }
wim 21:9eb628d9e164 2893
wim 26:bd897a001012 2894 #if (MCP23008==1)
wim 26:bd897a001012 2895 // MCP23008 portexpander
wim 26:bd897a001012 2896
wim 26:bd897a001012 2897 // write the new data to the portexpander
wim 26:bd897a001012 2898 _write_register(GPIO, _lcd_bus);
wim 26:bd897a001012 2899 #else
wim 26:bd897a001012 2900 // PCF8574 of PCF8574A portexpander
wim 26:bd897a001012 2901
wim 22:35742ec80c24 2902 // write the new data to the I2C portexpander
wim 26:bd897a001012 2903 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 2904 #endif
wim 22:35742ec80c24 2905
wim 22:35742ec80c24 2906 }
wim 21:9eb628d9e164 2907
wim 26:bd897a001012 2908 // Write data to MCP23008 I2C portexpander
wim 26:bd897a001012 2909 void TextLCD_I2C::_write_register (int reg, int value) {
wim 26:bd897a001012 2910 char data[] = {reg, value};
wim 26:bd897a001012 2911
wim 30:033048611c01 2912 _i2c->write(_slaveAddress, data, 2);
wim 26:bd897a001012 2913 }
wim 34:e5a0dcb43ecc 2914 #endif /* I2C Expander PCF8574/MCP23008 */
wim 23:d47f226efb24 2915 //---------- End TextLCD_I2C ------------
wim 21:9eb628d9e164 2916
wim 21:9eb628d9e164 2917
wim 28:30fa94f7341c 2918 //--------- Start TextLCD_I2C_N ---------
wim 34:e5a0dcb43ecc 2919 #if(LCD_I2C_N == 1) /* Native I2C */
wim 28:30fa94f7341c 2920
wim 28:30fa94f7341c 2921 /** Create a TextLCD interface using a controller with native I2C interface
wim 28:30fa94f7341c 2922 *
wim 28:30fa94f7341c 2923 * @param i2c I2C Bus
wim 28:30fa94f7341c 2924 * @param deviceAddress I2C slave address (default = 0x7C)
wim 28:30fa94f7341c 2925 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 28:30fa94f7341c 2926 * @param bl Backlight control line (optional, default = NC)
wim 28:30fa94f7341c 2927 * @param ctrl LCD controller (default = ST7032_3V3)
wim 28:30fa94f7341c 2928 */
wim 28:30fa94f7341c 2929 TextLCD_I2C_N::TextLCD_I2C_N(I2C *i2c, char deviceAddress, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 28:30fa94f7341c 2930 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 2931
wim 33:900a94bc7585 2932 _i2c(i2c){
wim 30:033048611c01 2933
wim 28:30fa94f7341c 2934 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 2935
wim 28:30fa94f7341c 2936 // Setup the I2C bus
wim 29:a3663151aa65 2937 // The max bitrate for ST7032i is 400kbit, lets stick to default here
wim 29:a3663151aa65 2938 _i2c->frequency(100000);
wim 32:59c4b8f648d4 2939
wim 30:033048611c01 2940
wim 28:30fa94f7341c 2941 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 28:30fa94f7341c 2942 if (bl != NC) {
wim 28:30fa94f7341c 2943 _bl = new DigitalOut(bl); //Construct new pin
wim 28:30fa94f7341c 2944 _bl->write(0); //Deactivate
wim 28:30fa94f7341c 2945 }
wim 28:30fa94f7341c 2946 else {
wim 28:30fa94f7341c 2947 // No Hardware Backlight pin
wim 28:30fa94f7341c 2948 _bl = NULL; //Construct dummy pin
wim 28:30fa94f7341c 2949 }
wim 28:30fa94f7341c 2950
wim 30:033048611c01 2951 //Sanity check
wim 30:033048611c01 2952 if (_ctrl & LCD_C_I2C) {
wim 36:9f5f86dfd44a 2953 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 2954 }
wim 30:033048611c01 2955 else {
wim 30:033048611c01 2956 error("Error: LCD Controller type does not support native I2C interface\n\r");
wim 30:033048611c01 2957 }
wim 28:30fa94f7341c 2958 }
wim 28:30fa94f7341c 2959
wim 28:30fa94f7341c 2960 TextLCD_I2C_N::~TextLCD_I2C_N() {
wim 28:30fa94f7341c 2961 if (_bl != NULL) {delete _bl;} // BL pin
wim 28:30fa94f7341c 2962 }
wim 28:30fa94f7341c 2963
wim 28:30fa94f7341c 2964 // Not used in this mode
wim 28:30fa94f7341c 2965 void TextLCD_I2C_N::_setEnable(bool value) {
wim 28:30fa94f7341c 2966 }
wim 28:30fa94f7341c 2967
wim 28:30fa94f7341c 2968 // Set RS pin
wim 28:30fa94f7341c 2969 // Used for mbed pins, I2C bus expander or SPI shiftregister and native I2C or SPI
wim 28:30fa94f7341c 2970 void TextLCD_I2C_N::_setRS(bool value) {
wim 30:033048611c01 2971 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 2972 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 2973 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 2974 //
wim 30:033048611c01 2975 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 2976 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 2977 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 2978 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 2979 //
wim 30:033048611c01 2980
wim 28:30fa94f7341c 2981 if (value) {
wim 28:30fa94f7341c 2982 _controlbyte = 0x40; // Next byte is data, No more control bytes will follow
wim 28:30fa94f7341c 2983 }
wim 28:30fa94f7341c 2984 else {
wim 28:30fa94f7341c 2985 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 28:30fa94f7341c 2986 }
wim 28:30fa94f7341c 2987 }
wim 28:30fa94f7341c 2988
wim 28:30fa94f7341c 2989 // Set BL pin
wim 28:30fa94f7341c 2990 void TextLCD_I2C_N::_setBL(bool value) {
wim 28:30fa94f7341c 2991 if (_bl) {
wim 28:30fa94f7341c 2992 _bl->write(value);
wim 28:30fa94f7341c 2993 }
wim 28:30fa94f7341c 2994 }
wim 29:a3663151aa65 2995
wim 29:a3663151aa65 2996 // Not used in this mode
wim 29:a3663151aa65 2997 void TextLCD_I2C_N::_setData(int value) {
wim 29:a3663151aa65 2998 }
wim 29:a3663151aa65 2999
wim 28:30fa94f7341c 3000 // Write a byte using I2C
wim 28:30fa94f7341c 3001 void TextLCD_I2C_N::_writeByte(int value) {
wim 30:033048611c01 3002 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3003 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3004 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3005 //
wim 30:033048611c01 3006 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3007 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3008 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3009 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3010 //
wim 28:30fa94f7341c 3011 char data[] = {_controlbyte, value};
wim 28:30fa94f7341c 3012
wim 32:59c4b8f648d4 3013 #if(LCD_I2C_ACK==1)
wim 32:59c4b8f648d4 3014 //Controllers that support ACK
wim 30:033048611c01 3015 _i2c->write(_slaveAddress, data, 2);
wim 32:59c4b8f648d4 3016 #else
wim 32:59c4b8f648d4 3017 //Controllers that dont support ACK
wim 32:59c4b8f648d4 3018 _i2c->start();
wim 32:59c4b8f648d4 3019 _i2c->write(_slaveAddress);
wim 32:59c4b8f648d4 3020 _i2c->write(data[0]);
wim 32:59c4b8f648d4 3021 _i2c->write(data[1]);
wim 32:59c4b8f648d4 3022 _i2c->stop();
wim 32:59c4b8f648d4 3023 #endif
wim 28:30fa94f7341c 3024 }
wim 34:e5a0dcb43ecc 3025 #endif /* Native I2C */
wim 28:30fa94f7341c 3026 //-------- End TextLCD_I2C_N ------------
wim 28:30fa94f7341c 3027
wim 28:30fa94f7341c 3028
wim 23:d47f226efb24 3029 //--------- Start TextLCD_SPI -----------
wim 34:e5a0dcb43ecc 3030 #if(LCD_SPI == 1) /* SPI Expander SN74595 */
wim 21:9eb628d9e164 3031
wim 22:35742ec80c24 3032 /** Create a TextLCD interface using an SPI 74595 portexpander
wim 22:35742ec80c24 3033 *
wim 22:35742ec80c24 3034 * @param spi SPI Bus
wim 22:35742ec80c24 3035 * @param cs chip select pin (active low)
wim 22:35742ec80c24 3036 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 22:35742ec80c24 3037 * @param ctrl LCD controller (default = HD44780)
wim 22:35742ec80c24 3038 */
wim 21:9eb628d9e164 3039 TextLCD_SPI::TextLCD_SPI(SPI *spi, PinName cs, LCDType type, LCDCtrl ctrl) :
wim 21:9eb628d9e164 3040 TextLCD_Base(type, ctrl),
wim 21:9eb628d9e164 3041 _spi(spi),
wim 21:9eb628d9e164 3042 _cs(cs) {
wim 21:9eb628d9e164 3043
wim 32:59c4b8f648d4 3044 // Init cs
wim 32:59c4b8f648d4 3045 _setCS(true);
wim 32:59c4b8f648d4 3046
wim 21:9eb628d9e164 3047 // Setup the spi for 8 bit data, low steady state clock,
wim 21:9eb628d9e164 3048 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 21:9eb628d9e164 3049 _spi->format(8,0);
wim 21:9eb628d9e164 3050 _spi->frequency(500000);
wim 21:9eb628d9e164 3051 //_spi.frequency(1000000);
wim 21:9eb628d9e164 3052
wim 21:9eb628d9e164 3053 // Init the portexpander bus
wim 21:9eb628d9e164 3054 _lcd_bus = D_LCD_BUS_DEF;
wim 21:9eb628d9e164 3055
wim 21:9eb628d9e164 3056 // write the new data to the portexpander
wim 21:9eb628d9e164 3057 _setCS(false);
wim 21:9eb628d9e164 3058 _spi->write(_lcd_bus);
wim 21:9eb628d9e164 3059 _setCS(true);
wim 30:033048611c01 3060
wim 30:033048611c01 3061 _init();
wim 21:9eb628d9e164 3062 }
wim 21:9eb628d9e164 3063
wim 21:9eb628d9e164 3064 // Set E pin (or E2 pin)
wim 21:9eb628d9e164 3065 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3066 void TextLCD_SPI::_setEnable(bool value) {
wim 21:9eb628d9e164 3067
wim 22:35742ec80c24 3068 if(_ctrl_idx==_LCDCtrl_0) {
wim 26:bd897a001012 3069 if (value) {
wim 22:35742ec80c24 3070 _lcd_bus |= D_LCD_E; // Set E bit
wim 26:bd897a001012 3071 }
wim 26:bd897a001012 3072 else {
wim 22:35742ec80c24 3073 _lcd_bus &= ~D_LCD_E; // Reset E bit
wim 26:bd897a001012 3074 }
wim 22:35742ec80c24 3075 }
wim 22:35742ec80c24 3076 else {
wim 26:bd897a001012 3077 if (value) {
wim 22:35742ec80c24 3078 _lcd_bus |= D_LCD_E2; // Set E2 bit
wim 26:bd897a001012 3079 }
wim 26:bd897a001012 3080 else {
wim 22:35742ec80c24 3081 _lcd_bus &= ~D_LCD_E2; // Reset E2 bit
wim 26:bd897a001012 3082 }
wim 22:35742ec80c24 3083 }
wim 21:9eb628d9e164 3084
wim 22:35742ec80c24 3085 // write the new data to the SPI portexpander
wim 22:35742ec80c24 3086 _setCS(false);
wim 22:35742ec80c24 3087 _spi->write(_lcd_bus);
wim 30:033048611c01 3088 _setCS(true);
wim 21:9eb628d9e164 3089 }
wim 21:9eb628d9e164 3090
wim 21:9eb628d9e164 3091 // Set RS pin
wim 36:9f5f86dfd44a 3092 // Used for mbed pins, I2C bus expander or SPI shiftregister and SPI_N
wim 21:9eb628d9e164 3093 void TextLCD_SPI::_setRS(bool value) {
wim 21:9eb628d9e164 3094
wim 22:35742ec80c24 3095 if (value) {
wim 21:9eb628d9e164 3096 _lcd_bus |= D_LCD_RS; // Set RS bit
wim 22:35742ec80c24 3097 }
wim 22:35742ec80c24 3098 else {
wim 21:9eb628d9e164 3099 _lcd_bus &= ~D_LCD_RS; // Reset RS bit
wim 22:35742ec80c24 3100 }
wim 21:9eb628d9e164 3101
wim 21:9eb628d9e164 3102 // write the new data to the SPI portexpander
wim 21:9eb628d9e164 3103 _setCS(false);
wim 21:9eb628d9e164 3104 _spi->write(_lcd_bus);
wim 21:9eb628d9e164 3105 _setCS(true);
wim 21:9eb628d9e164 3106 }
wim 21:9eb628d9e164 3107
wim 21:9eb628d9e164 3108 // Set BL pin
wim 21:9eb628d9e164 3109 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3110 void TextLCD_SPI::_setBL(bool value) {
wim 21:9eb628d9e164 3111
wim 22:35742ec80c24 3112 if (value) {
wim 21:9eb628d9e164 3113 _lcd_bus |= D_LCD_BL; // Set BL bit
wim 22:35742ec80c24 3114 }
wim 22:35742ec80c24 3115 else {
wim 21:9eb628d9e164 3116 _lcd_bus &= ~D_LCD_BL; // Reset BL bit
wim 22:35742ec80c24 3117 }
wim 21:9eb628d9e164 3118
wim 21:9eb628d9e164 3119 // write the new data to the SPI portexpander
wim 21:9eb628d9e164 3120 _setCS(false);
wim 21:9eb628d9e164 3121 _spi->write(_lcd_bus);
wim 30:033048611c01 3122 _setCS(true);
wim 21:9eb628d9e164 3123 }
wim 21:9eb628d9e164 3124
wim 21:9eb628d9e164 3125 // Place the 4bit data on the databus
wim 21:9eb628d9e164 3126 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3127 void TextLCD_SPI::_setData(int value) {
wim 21:9eb628d9e164 3128 int data;
wim 21:9eb628d9e164 3129
wim 22:35742ec80c24 3130 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 22:35742ec80c24 3131
wim 22:35742ec80c24 3132 data = value & 0x0F;
wim 26:bd897a001012 3133 if (data & 0x01) {
wim 22:35742ec80c24 3134 _lcd_bus |= D_LCD_D4; // Set Databit
wim 26:bd897a001012 3135 }
wim 26:bd897a001012 3136 else {
wim 22:35742ec80c24 3137 _lcd_bus &= ~D_LCD_D4; // Reset Databit
wim 26:bd897a001012 3138 }
wim 26:bd897a001012 3139
wim 26:bd897a001012 3140 if (data & 0x02) {
wim 22:35742ec80c24 3141 _lcd_bus |= D_LCD_D5; // Set Databit
wim 26:bd897a001012 3142 }
wim 26:bd897a001012 3143 else {
wim 22:35742ec80c24 3144 _lcd_bus &= ~D_LCD_D5; // Reset Databit
wim 26:bd897a001012 3145 }
wim 26:bd897a001012 3146
wim 26:bd897a001012 3147 if (data & 0x04) {
wim 22:35742ec80c24 3148 _lcd_bus |= D_LCD_D6; // Set Databit
wim 26:bd897a001012 3149 }
wim 26:bd897a001012 3150 else {
wim 22:35742ec80c24 3151 _lcd_bus &= ~D_LCD_D6; // Reset Databit
wim 26:bd897a001012 3152 }
wim 26:bd897a001012 3153
wim 26:bd897a001012 3154 if (data & 0x08) {
wim 22:35742ec80c24 3155 _lcd_bus |= D_LCD_D7; // Set Databit
wim 26:bd897a001012 3156 }
wim 26:bd897a001012 3157 else {
wim 26:bd897a001012 3158 _lcd_bus &= ~D_LCD_D7; // Reset Databit
wim 26:bd897a001012 3159 }
wim 21:9eb628d9e164 3160
wim 22:35742ec80c24 3161 // write the new data to the SPI portexpander
wim 22:35742ec80c24 3162 _setCS(false);
wim 22:35742ec80c24 3163 _spi->write(_lcd_bus);
wim 30:033048611c01 3164 _setCS(true);
wim 21:9eb628d9e164 3165 }
wim 21:9eb628d9e164 3166
wim 21:9eb628d9e164 3167 // Set CS line.
wim 21:9eb628d9e164 3168 // Only used for SPI bus
wim 21:9eb628d9e164 3169 void TextLCD_SPI::_setCS(bool value) {
wim 21:9eb628d9e164 3170
wim 21:9eb628d9e164 3171 if (value) {
wim 21:9eb628d9e164 3172 _cs = 1; // Set CS pin
wim 21:9eb628d9e164 3173 }
wim 22:35742ec80c24 3174 else {
wim 21:9eb628d9e164 3175 _cs = 0; // Reset CS pin
wim 22:35742ec80c24 3176 }
wim 21:9eb628d9e164 3177 }
wim 34:e5a0dcb43ecc 3178 #endif /* SPI Expander SN74595 */
wim 23:d47f226efb24 3179 //---------- End TextLCD_SPI ------------
wim 22:35742ec80c24 3180
wim 22:35742ec80c24 3181
wim 25:6162b31128c9 3182 //--------- Start TextLCD_SPI_N ---------
wim 34:e5a0dcb43ecc 3183 #if(LCD_SPI_N == 1) /* Native SPI bus */
wim 30:033048611c01 3184 /** Create a TextLCD interface using a controller with a native SPI4 interface
Sissors 24:fb3399713710 3185 *
Sissors 24:fb3399713710 3186 * @param spi SPI Bus
Sissors 24:fb3399713710 3187 * @param cs chip select pin (active low)
wim 25:6162b31128c9 3188 * @param rs Instruction/data control line
Sissors 24:fb3399713710 3189 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 25:6162b31128c9 3190 * @param bl Backlight control line (optional, default = NC)
wim 26:bd897a001012 3191 * @param ctrl LCD controller (default = ST7032_3V3)
wim 25:6162b31128c9 3192 */
wim 25:6162b31128c9 3193 TextLCD_SPI_N::TextLCD_SPI_N(SPI *spi, PinName cs, PinName rs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 25:6162b31128c9 3194 TextLCD_Base(type, ctrl),
wim 25:6162b31128c9 3195 _spi(spi),
wim 25:6162b31128c9 3196 _cs(cs),
wim 25:6162b31128c9 3197 _rs(rs) {
Sissors 24:fb3399713710 3198
wim 32:59c4b8f648d4 3199 // Init CS
wim 32:59c4b8f648d4 3200 _cs = 1;
wim 32:59c4b8f648d4 3201
wim 36:9f5f86dfd44a 3202 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3203 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3204 // _spi->format(8,3);
wim 36:9f5f86dfd44a 3205 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3206
Sissors 24:fb3399713710 3207 // Setup the spi for 8 bit data, low steady state clock,
Sissors 24:fb3399713710 3208 // rising edge capture, with a 500KHz or 1MHz clock rate
Sissors 24:fb3399713710 3209 _spi->format(8,0);
wim 36:9f5f86dfd44a 3210 // _spi->frequency(300000);
wim 36:9f5f86dfd44a 3211 // _spi->frequency(500000);
Sissors 24:fb3399713710 3212 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3213
Sissors 24:fb3399713710 3214 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
Sissors 24:fb3399713710 3215 if (bl != NC) {
Sissors 24:fb3399713710 3216 _bl = new DigitalOut(bl); //Construct new pin
Sissors 24:fb3399713710 3217 _bl->write(0); //Deactivate
Sissors 24:fb3399713710 3218 }
Sissors 24:fb3399713710 3219 else {
Sissors 24:fb3399713710 3220 // No Hardware Backlight pin
Sissors 24:fb3399713710 3221 _bl = NULL; //Construct dummy pin
Sissors 24:fb3399713710 3222 }
wim 30:033048611c01 3223
wim 30:033048611c01 3224 //Sanity check
wim 30:033048611c01 3225 if (_ctrl & LCD_C_SPI4) {
wim 36:9f5f86dfd44a 3226 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3227 // ST7070 must set datalength to 8 bits!
wim 30:033048611c01 3228 }
wim 30:033048611c01 3229 else {
wim 30:033048611c01 3230 error("Error: LCD Controller type does not support native SPI4 interface\n\r");
wim 30:033048611c01 3231 }
Sissors 24:fb3399713710 3232 }
Sissors 24:fb3399713710 3233
wim 25:6162b31128c9 3234 TextLCD_SPI_N::~TextLCD_SPI_N() {
Sissors 24:fb3399713710 3235 if (_bl != NULL) {delete _bl;} // BL pin
Sissors 24:fb3399713710 3236 }
Sissors 24:fb3399713710 3237
Sissors 24:fb3399713710 3238 // Not used in this mode
wim 25:6162b31128c9 3239 void TextLCD_SPI_N::_setEnable(bool value) {
Sissors 24:fb3399713710 3240 }
Sissors 24:fb3399713710 3241
Sissors 24:fb3399713710 3242 // Set RS pin
wim 36:9f5f86dfd44a 3243 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 25:6162b31128c9 3244 void TextLCD_SPI_N::_setRS(bool value) {
Sissors 24:fb3399713710 3245 _rs = value;
Sissors 24:fb3399713710 3246 }
Sissors 24:fb3399713710 3247
Sissors 24:fb3399713710 3248 // Set BL pin
wim 25:6162b31128c9 3249 void TextLCD_SPI_N::_setBL(bool value) {
wim 26:bd897a001012 3250 if (_bl) {
Sissors 24:fb3399713710 3251 _bl->write(value);
wim 26:bd897a001012 3252 }
Sissors 24:fb3399713710 3253 }
Sissors 24:fb3399713710 3254
wim 29:a3663151aa65 3255 // Not used in this mode
wim 29:a3663151aa65 3256 void TextLCD_SPI_N::_setData(int value) {
wim 29:a3663151aa65 3257 }
wim 29:a3663151aa65 3258
Sissors 24:fb3399713710 3259 // Write a byte using SPI
wim 25:6162b31128c9 3260 void TextLCD_SPI_N::_writeByte(int value) {
Sissors 24:fb3399713710 3261 _cs = 0;
Sissors 24:fb3399713710 3262 wait_us(1);
Sissors 24:fb3399713710 3263 _spi->write(value);
Sissors 24:fb3399713710 3264 wait_us(1);
Sissors 24:fb3399713710 3265 _cs = 1;
Sissors 24:fb3399713710 3266 }
wim 34:e5a0dcb43ecc 3267 #endif /* Native SPI bus */
wim 25:6162b31128c9 3268 //-------- End TextLCD_SPI_N ------------
wim 21:9eb628d9e164 3269
wim 21:9eb628d9e164 3270
wim 36:9f5f86dfd44a 3271 //-------- Start TextLCD_SPI_N_3_8 --------
wim 36:9f5f86dfd44a 3272 #if(LCD_SPI_N_3_8 == 1) /* Native SPI bus */
wim 36:9f5f86dfd44a 3273
wim 36:9f5f86dfd44a 3274 /** Create a TextLCD interface using a controller with a native SPI3 8 bits interface
wim 36:9f5f86dfd44a 3275 * This mode is supported by ST7070. Note that implementation in TexTLCD is not very efficient due to
wim 36:9f5f86dfd44a 3276 * structure of the TextLCD library: each databyte is written separately and requires a separate 'count command' set to 1 byte.
wim 36:9f5f86dfd44a 3277 *
wim 36:9f5f86dfd44a 3278 * @param spi SPI Bus
wim 36:9f5f86dfd44a 3279 * @param cs chip select pin (active low)
wim 36:9f5f86dfd44a 3280 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 36:9f5f86dfd44a 3281 * @param bl Backlight control line (optional, default = NC)
wim 36:9f5f86dfd44a 3282 * @param ctrl LCD controller (default = ST7070)
wim 36:9f5f86dfd44a 3283 */
wim 36:9f5f86dfd44a 3284 TextLCD_SPI_N_3_8::TextLCD_SPI_N_3_8(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 36:9f5f86dfd44a 3285 TextLCD_Base(type, ctrl),
wim 36:9f5f86dfd44a 3286 _spi(spi),
wim 36:9f5f86dfd44a 3287 _cs(cs) {
wim 36:9f5f86dfd44a 3288
wim 36:9f5f86dfd44a 3289 // Init CS
wim 36:9f5f86dfd44a 3290 _cs = 1;
wim 36:9f5f86dfd44a 3291
wim 36:9f5f86dfd44a 3292 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3293 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3294 // _spi->format(8,3);
wim 36:9f5f86dfd44a 3295 // _spi->frequency(300000);
wim 36:9f5f86dfd44a 3296 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3297
wim 36:9f5f86dfd44a 3298 // Setup the spi for 8 bit data, low steady state clock,
wim 36:9f5f86dfd44a 3299 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3300 _spi->format(8,0);
wim 36:9f5f86dfd44a 3301 // _spi->frequency(300000);
wim 36:9f5f86dfd44a 3302 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3303 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3304
wim 36:9f5f86dfd44a 3305
wim 36:9f5f86dfd44a 3306 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 36:9f5f86dfd44a 3307 if (bl != NC) {
wim 36:9f5f86dfd44a 3308 _bl = new DigitalOut(bl); //Construct new pin
wim 36:9f5f86dfd44a 3309 _bl->write(0); //Deactivate
wim 36:9f5f86dfd44a 3310 }
wim 36:9f5f86dfd44a 3311 else {
wim 36:9f5f86dfd44a 3312 // No Hardware Backlight pin
wim 36:9f5f86dfd44a 3313 _bl = NULL; //Construct dummy pin
wim 36:9f5f86dfd44a 3314 }
wim 36:9f5f86dfd44a 3315
wim 36:9f5f86dfd44a 3316 //Sanity check
wim 36:9f5f86dfd44a 3317 if (_ctrl & LCD_C_SPI3_8) {
wim 36:9f5f86dfd44a 3318 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3319 }
wim 36:9f5f86dfd44a 3320 else {
wim 36:9f5f86dfd44a 3321 error("Error: LCD Controller type does not support native SPI3 8 bits interface\n\r");
wim 36:9f5f86dfd44a 3322 }
wim 36:9f5f86dfd44a 3323 }
wim 36:9f5f86dfd44a 3324
wim 36:9f5f86dfd44a 3325 TextLCD_SPI_N_3_8::~TextLCD_SPI_N_3_8() {
wim 36:9f5f86dfd44a 3326 if (_bl != NULL) {delete _bl;} // BL pin
wim 36:9f5f86dfd44a 3327 }
wim 36:9f5f86dfd44a 3328
wim 36:9f5f86dfd44a 3329 // Not used in this mode
wim 36:9f5f86dfd44a 3330 void TextLCD_SPI_N_3_8::_setEnable(bool value) {
wim 36:9f5f86dfd44a 3331 }
wim 36:9f5f86dfd44a 3332
wim 36:9f5f86dfd44a 3333 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 36:9f5f86dfd44a 3334 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 36:9f5f86dfd44a 3335 void TextLCD_SPI_N_3_8::_setRS(bool value) {
wim 36:9f5f86dfd44a 3336
wim 36:9f5f86dfd44a 3337 if (value) {
wim 36:9f5f86dfd44a 3338 _controlbyte = 0x01; // Next byte is data, No more control bytes will follow
wim 36:9f5f86dfd44a 3339 }
wim 36:9f5f86dfd44a 3340 else {
wim 36:9f5f86dfd44a 3341 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 36:9f5f86dfd44a 3342 }
wim 36:9f5f86dfd44a 3343 }
wim 36:9f5f86dfd44a 3344
wim 36:9f5f86dfd44a 3345 // Set BL pin
wim 36:9f5f86dfd44a 3346 void TextLCD_SPI_N_3_8::_setBL(bool value) {
wim 36:9f5f86dfd44a 3347 if (_bl) {
wim 36:9f5f86dfd44a 3348 _bl->write(value);
wim 36:9f5f86dfd44a 3349 }
wim 36:9f5f86dfd44a 3350 }
wim 36:9f5f86dfd44a 3351
wim 36:9f5f86dfd44a 3352 // Not used in this mode
wim 36:9f5f86dfd44a 3353 void TextLCD_SPI_N_3_8::_setData(int value) {
wim 36:9f5f86dfd44a 3354 }
wim 36:9f5f86dfd44a 3355
wim 36:9f5f86dfd44a 3356 // Write a byte using SPI3 8 bits mode (ST7070)
wim 36:9f5f86dfd44a 3357 void TextLCD_SPI_N_3_8::_writeByte(int value) {
wim 36:9f5f86dfd44a 3358
wim 36:9f5f86dfd44a 3359 if (_controlbyte == 0x00) { // Byte is command
wim 36:9f5f86dfd44a 3360 _cs = 0;
wim 36:9f5f86dfd44a 3361 wait_us(1);
wim 36:9f5f86dfd44a 3362 _spi->write(value);
wim 36:9f5f86dfd44a 3363 wait_us(1);
wim 36:9f5f86dfd44a 3364 _cs = 1;
wim 36:9f5f86dfd44a 3365 }
wim 36:9f5f86dfd44a 3366 else { // Byte is data
wim 36:9f5f86dfd44a 3367 // Select Extended Instr Set
wim 36:9f5f86dfd44a 3368 _cs = 0;
wim 36:9f5f86dfd44a 3369 wait_us(1);
wim 36:9f5f86dfd44a 3370 _spi->write(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1));
wim 36:9f5f86dfd44a 3371 wait_us(1);
wim 36:9f5f86dfd44a 3372 _cs = 1;
wim 36:9f5f86dfd44a 3373
wim 36:9f5f86dfd44a 3374 wait_us(40); // Wait until command has finished...
wim 36:9f5f86dfd44a 3375
wim 36:9f5f86dfd44a 3376 // Set Count to 1 databyte
wim 36:9f5f86dfd44a 3377 _cs = 0;
wim 36:9f5f86dfd44a 3378 wait_us(1);
wim 36:9f5f86dfd44a 3379 _spi->write(0x80); // Set display data length, 1 L6 L5 L4 L3 L2 L1 L0 (Instr Set = 1)
wim 36:9f5f86dfd44a 3380 wait_us(1);
wim 36:9f5f86dfd44a 3381 _cs = 1;
wim 36:9f5f86dfd44a 3382
wim 36:9f5f86dfd44a 3383 wait_us(40);
wim 36:9f5f86dfd44a 3384
wim 36:9f5f86dfd44a 3385 // Write 1 databyte
wim 36:9f5f86dfd44a 3386 _cs = 0;
wim 36:9f5f86dfd44a 3387 wait_us(1);
wim 36:9f5f86dfd44a 3388 _spi->write(value); // Write data (Instr Set = 1)
wim 36:9f5f86dfd44a 3389 wait_us(1);
wim 36:9f5f86dfd44a 3390 _cs = 1;
wim 36:9f5f86dfd44a 3391
wim 36:9f5f86dfd44a 3392 wait_us(40);
wim 36:9f5f86dfd44a 3393
wim 36:9f5f86dfd44a 3394 // Select Standard Instr Set
wim 36:9f5f86dfd44a 3395 _cs = 0;
wim 36:9f5f86dfd44a 3396 wait_us(1);
wim 36:9f5f86dfd44a 3397 _spi->write(0x20 | _function); // Set function, 0 0 1 DL N EXT=0 x x (Select Instr Set = 0));
wim 36:9f5f86dfd44a 3398 wait_us(1);
wim 36:9f5f86dfd44a 3399 _cs = 1;
wim 36:9f5f86dfd44a 3400 }
wim 36:9f5f86dfd44a 3401 }
wim 36:9f5f86dfd44a 3402 #endif /* Native SPI bus */
wim 36:9f5f86dfd44a 3403 //------- End TextLCD_SPI_N_3_8 -----------
wim 36:9f5f86dfd44a 3404
wim 36:9f5f86dfd44a 3405
wim 30:033048611c01 3406 //-------- Start TextLCD_SPI_N_3_9 --------
wim 34:e5a0dcb43ecc 3407 #if(LCD_SPI_N_3_9 == 1) /* Native SPI bus */
wim 34:e5a0dcb43ecc 3408 //Code checked out on logic analyser. Not yet tested on hardware..
wim 30:033048611c01 3409
wim 30:033048611c01 3410 /** Create a TextLCD interface using a controller with a native SPI3 9 bits interface
wim 30:033048611c01 3411 *
wim 30:033048611c01 3412 * @param spi SPI Bus
wim 30:033048611c01 3413 * @param cs chip select pin (active low)
wim 30:033048611c01 3414 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3415 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3416 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3417 */
wim 30:033048611c01 3418 TextLCD_SPI_N_3_9::TextLCD_SPI_N_3_9(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3419 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3420 _spi(spi),
wim 33:900a94bc7585 3421 _cs(cs) {
wim 32:59c4b8f648d4 3422
wim 32:59c4b8f648d4 3423 // Init CS
wim 32:59c4b8f648d4 3424 _cs = 1;
wim 32:59c4b8f648d4 3425
wim 34:e5a0dcb43ecc 3426 // Setup the spi for 9 bit data, high steady state clock,
wim 30:033048611c01 3427 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3428 _spi->format(9,3);
wim 30:033048611c01 3429 _spi->frequency(1000000);
wim 30:033048611c01 3430
wim 30:033048611c01 3431 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3432 if (bl != NC) {
wim 30:033048611c01 3433 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3434 _bl->write(0); //Deactivate
wim 30:033048611c01 3435 }
wim 30:033048611c01 3436 else {
wim 30:033048611c01 3437 // No Hardware Backlight pin
wim 30:033048611c01 3438 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3439 }
wim 30:033048611c01 3440
wim 30:033048611c01 3441 //Sanity check
wim 36:9f5f86dfd44a 3442 if (_ctrl & LCD_C_SPI3_9) {
wim 36:9f5f86dfd44a 3443 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3444 }
wim 30:033048611c01 3445 else {
wim 30:033048611c01 3446 error("Error: LCD Controller type does not support native SPI3 9 bits interface\n\r");
wim 30:033048611c01 3447 }
wim 30:033048611c01 3448 }
wim 30:033048611c01 3449
wim 30:033048611c01 3450 TextLCD_SPI_N_3_9::~TextLCD_SPI_N_3_9() {
wim 30:033048611c01 3451 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3452 }
wim 30:033048611c01 3453
wim 30:033048611c01 3454 // Not used in this mode
wim 30:033048611c01 3455 void TextLCD_SPI_N_3_9::_setEnable(bool value) {
wim 30:033048611c01 3456 }
wim 30:033048611c01 3457
wim 30:033048611c01 3458 // Set RS pin
wim 30:033048611c01 3459 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3460 void TextLCD_SPI_N_3_9::_setRS(bool value) {
wim 30:033048611c01 3461 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3462 // b8 b7...........b0
wim 30:033048611c01 3463 // RS command or data
wim 30:033048611c01 3464 //
wim 30:033048611c01 3465 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3466 //
wim 30:033048611c01 3467
wim 30:033048611c01 3468 if (value) {
wim 30:033048611c01 3469 _controlbyte = 0x01; // Next byte is data
wim 30:033048611c01 3470 }
wim 30:033048611c01 3471 else {
wim 30:033048611c01 3472 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3473 }
wim 30:033048611c01 3474 }
wim 30:033048611c01 3475
wim 30:033048611c01 3476 // Set BL pin
wim 30:033048611c01 3477 void TextLCD_SPI_N_3_9::_setBL(bool value) {
wim 30:033048611c01 3478 if (_bl) {
wim 30:033048611c01 3479 _bl->write(value);
wim 30:033048611c01 3480 }
wim 30:033048611c01 3481 }
wim 30:033048611c01 3482
wim 30:033048611c01 3483 // Not used in this mode
wim 30:033048611c01 3484 void TextLCD_SPI_N_3_9::_setData(int value) {
wim 30:033048611c01 3485 }
wim 30:033048611c01 3486
wim 30:033048611c01 3487 // Write a byte using SPI3 9 bits mode
wim 30:033048611c01 3488 void TextLCD_SPI_N_3_9::_writeByte(int value) {
wim 30:033048611c01 3489 _cs = 0;
wim 30:033048611c01 3490 wait_us(1);
wim 30:033048611c01 3491 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3492 wait_us(1);
wim 30:033048611c01 3493 _cs = 1;
wim 30:033048611c01 3494 }
wim 34:e5a0dcb43ecc 3495 #endif /* Native SPI bus */
wim 30:033048611c01 3496 //------- End TextLCD_SPI_N_3_9 -----------
wim 34:e5a0dcb43ecc 3497
wim 34:e5a0dcb43ecc 3498
wim 30:033048611c01 3499 //------- Start TextLCD_SPI_N_3_10 --------
wim 34:e5a0dcb43ecc 3500 #if(LCD_SPI_N_3_10 == 1) /* Native SPI bus */
wim 30:033048611c01 3501
wim 30:033048611c01 3502 /** Create a TextLCD interface using a controller with a native SPI3 10 bits interface
wim 30:033048611c01 3503 *
wim 30:033048611c01 3504 * @param spi SPI Bus
wim 30:033048611c01 3505 * @param cs chip select pin (active low)
wim 30:033048611c01 3506 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3507 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3508 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3509 */
wim 30:033048611c01 3510 TextLCD_SPI_N_3_10::TextLCD_SPI_N_3_10(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3511 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3512 _spi(spi),
wim 30:033048611c01 3513 _cs(cs) {
wim 30:033048611c01 3514
wim 32:59c4b8f648d4 3515 // Init CS
wim 32:59c4b8f648d4 3516 _cs = 1;
wim 32:59c4b8f648d4 3517
wim 30:033048611c01 3518 // Setup the spi for 10 bit data, low steady state clock,
wim 30:033048611c01 3519 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 30:033048611c01 3520 _spi->format(10,0);
wim 30:033048611c01 3521 _spi->frequency(1000000);
wim 30:033048611c01 3522
wim 30:033048611c01 3523 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3524 if (bl != NC) {
wim 30:033048611c01 3525 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3526 _bl->write(0); //Deactivate
wim 30:033048611c01 3527 }
wim 30:033048611c01 3528 else {
wim 30:033048611c01 3529 // No Hardware Backlight pin
wim 30:033048611c01 3530 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3531 }
wim 30:033048611c01 3532
wim 30:033048611c01 3533 //Sanity check
wim 30:033048611c01 3534 if (_ctrl & LCD_C_SPI3_10) {
wim 36:9f5f86dfd44a 3535 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3536 }
wim 30:033048611c01 3537 else {
wim 30:033048611c01 3538 error("Error: LCD Controller type does not support native SPI3 10 bits interface\n\r");
wim 30:033048611c01 3539 }
wim 30:033048611c01 3540 }
wim 30:033048611c01 3541
wim 30:033048611c01 3542 TextLCD_SPI_N_3_10::~TextLCD_SPI_N_3_10() {
wim 30:033048611c01 3543 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3544 }
wim 30:033048611c01 3545
wim 30:033048611c01 3546 // Not used in this mode
wim 30:033048611c01 3547 void TextLCD_SPI_N_3_10::_setEnable(bool value) {
wim 30:033048611c01 3548 }
wim 30:033048611c01 3549
wim 30:033048611c01 3550 // Set RS pin
wim 30:033048611c01 3551 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3552 void TextLCD_SPI_N_3_10::_setRS(bool value) {
wim 30:033048611c01 3553 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3554 // b9 b8 b7...........b0
wim 30:033048611c01 3555 // RS RW command or data
wim 30:033048611c01 3556 //
wim 30:033048611c01 3557 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3558 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 30:033048611c01 3559 //
wim 30:033048611c01 3560
wim 30:033048611c01 3561 if (value) {
wim 30:033048611c01 3562 _controlbyte = 0x02; // Next byte is data
wim 30:033048611c01 3563 }
wim 30:033048611c01 3564 else {
wim 30:033048611c01 3565 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3566 }
wim 30:033048611c01 3567 }
wim 30:033048611c01 3568
wim 30:033048611c01 3569 // Set BL pin
wim 30:033048611c01 3570 void TextLCD_SPI_N_3_10::_setBL(bool value) {
wim 30:033048611c01 3571 if (_bl) {
wim 30:033048611c01 3572 _bl->write(value);
wim 30:033048611c01 3573 }
wim 30:033048611c01 3574 }
wim 30:033048611c01 3575
wim 30:033048611c01 3576 // Not used in this mode
wim 30:033048611c01 3577 void TextLCD_SPI_N_3_10::_setData(int value) {
wim 30:033048611c01 3578 }
wim 30:033048611c01 3579
wim 30:033048611c01 3580 // Write a byte using SPI3 10 bits mode
wim 30:033048611c01 3581 void TextLCD_SPI_N_3_10::_writeByte(int value) {
wim 30:033048611c01 3582 _cs = 0;
wim 30:033048611c01 3583 wait_us(1);
wim 30:033048611c01 3584 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3585 wait_us(1);
wim 30:033048611c01 3586 _cs = 1;
wim 30:033048611c01 3587 }
wim 34:e5a0dcb43ecc 3588 #endif /* Native SPI bus */
wim 30:033048611c01 3589 //------- End TextLCD_SPI_N_3_10 ----------
wim 34:e5a0dcb43ecc 3590
wim 32:59c4b8f648d4 3591
wim 32:59c4b8f648d4 3592 //------- Start TextLCD_SPI_N_3_16 --------
wim 34:e5a0dcb43ecc 3593 #if(LCD_SPI_N_3_16 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 3594
wim 32:59c4b8f648d4 3595 /** Create a TextLCD interface using a controller with a native SPI3 16 bits interface
wim 32:59c4b8f648d4 3596 *
wim 32:59c4b8f648d4 3597 * @param spi SPI Bus
wim 32:59c4b8f648d4 3598 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 3599 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 3600 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 3601 * @param ctrl LCD controller (default = PT6314)
wim 32:59c4b8f648d4 3602 */
wim 32:59c4b8f648d4 3603 TextLCD_SPI_N_3_16::TextLCD_SPI_N_3_16(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 3604 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3605 _spi(spi),
wim 32:59c4b8f648d4 3606 _cs(cs) {
wim 32:59c4b8f648d4 3607
wim 32:59c4b8f648d4 3608 // Init CS
wim 32:59c4b8f648d4 3609 _cs = 1;
wim 32:59c4b8f648d4 3610
wim 32:59c4b8f648d4 3611 // Setup the spi for 8 bit data, low steady state clock,
wim 32:59c4b8f648d4 3612 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3613 _spi->format(8,0);
wim 32:59c4b8f648d4 3614 _spi->frequency(1000000);
wim 32:59c4b8f648d4 3615
wim 32:59c4b8f648d4 3616 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 3617 if (bl != NC) {
wim 32:59c4b8f648d4 3618 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 3619 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 3620 }
wim 32:59c4b8f648d4 3621 else {
wim 32:59c4b8f648d4 3622 // No Hardware Backlight pin
wim 32:59c4b8f648d4 3623 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 3624 }
wim 32:59c4b8f648d4 3625
wim 32:59c4b8f648d4 3626 //Sanity check
wim 32:59c4b8f648d4 3627 if (_ctrl & LCD_C_SPI3_16) {
wim 36:9f5f86dfd44a 3628 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 3629 }
wim 32:59c4b8f648d4 3630 else {
wim 32:59c4b8f648d4 3631 error("Error: LCD Controller type does not support native SPI3 16 bits interface\n\r");
wim 32:59c4b8f648d4 3632 }
wim 32:59c4b8f648d4 3633 }
wim 32:59c4b8f648d4 3634
wim 32:59c4b8f648d4 3635 TextLCD_SPI_N_3_16::~TextLCD_SPI_N_3_16() {
wim 32:59c4b8f648d4 3636 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 3637 }
wim 32:59c4b8f648d4 3638
wim 32:59c4b8f648d4 3639 // Not used in this mode
wim 32:59c4b8f648d4 3640 void TextLCD_SPI_N_3_16::_setEnable(bool value) {
wim 32:59c4b8f648d4 3641 }
wim 32:59c4b8f648d4 3642
wim 32:59c4b8f648d4 3643 // Set RS pin
wim 32:59c4b8f648d4 3644 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 3645 void TextLCD_SPI_N_3_16::_setRS(bool value) {
wim 32:59c4b8f648d4 3646 // The 16bit mode is split in 2 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next byte.
wim 32:59c4b8f648d4 3647 // The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 3648 // b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 3649 // 1 1 1 1 1 RW RS 0 d7 d6 d5 d4 d3 d2 d1 d0
wim 32:59c4b8f648d4 3650 //
wim 32:59c4b8f648d4 3651 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 3652 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 3653 //
wim 32:59c4b8f648d4 3654
wim 32:59c4b8f648d4 3655 if (value) {
wim 32:59c4b8f648d4 3656 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 3657 }
wim 32:59c4b8f648d4 3658 else {
wim 32:59c4b8f648d4 3659 _controlbyte = 0xF8; // Next byte is command
wim 32:59c4b8f648d4 3660 }
wim 32:59c4b8f648d4 3661 }
wim 32:59c4b8f648d4 3662
wim 32:59c4b8f648d4 3663 // Set BL pin
wim 32:59c4b8f648d4 3664 void TextLCD_SPI_N_3_16::_setBL(bool value) {
wim 32:59c4b8f648d4 3665 if (_bl) {
wim 32:59c4b8f648d4 3666 _bl->write(value);
wim 32:59c4b8f648d4 3667 }
wim 32:59c4b8f648d4 3668 }
wim 32:59c4b8f648d4 3669
wim 32:59c4b8f648d4 3670 // Not used in this mode
wim 32:59c4b8f648d4 3671 void TextLCD_SPI_N_3_16::_setData(int value) {
wim 32:59c4b8f648d4 3672 }
wim 34:e5a0dcb43ecc 3673
wim 32:59c4b8f648d4 3674 // Write a byte using SPI3 16 bits mode
wim 32:59c4b8f648d4 3675 void TextLCD_SPI_N_3_16::_writeByte(int value) {
wim 32:59c4b8f648d4 3676 _cs = 0;
wim 32:59c4b8f648d4 3677 wait_us(1);
wim 32:59c4b8f648d4 3678
wim 32:59c4b8f648d4 3679 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 3680
wim 32:59c4b8f648d4 3681 _spi->write(value);
wim 32:59c4b8f648d4 3682
wim 32:59c4b8f648d4 3683 wait_us(1);
wim 32:59c4b8f648d4 3684 _cs = 1;
wim 32:59c4b8f648d4 3685 }
wim 34:e5a0dcb43ecc 3686 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 3687 //------- End TextLCD_SPI_N_3_16 ----------
wim 34:e5a0dcb43ecc 3688
wim 34:e5a0dcb43ecc 3689
wim 32:59c4b8f648d4 3690 //------- Start TextLCD_SPI_N_3_24 --------
wim 34:e5a0dcb43ecc 3691 #if(LCD_SPI_N_3_24 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 3692
wim 32:59c4b8f648d4 3693 /** Create a TextLCD interface using a controller with a native SPI3 24 bits interface
wim 32:59c4b8f648d4 3694 *
wim 32:59c4b8f648d4 3695 * @param spi SPI Bus
wim 32:59c4b8f648d4 3696 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 3697 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 3698 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 3699 * @param ctrl LCD controller (default = SSD1803)
wim 32:59c4b8f648d4 3700 */
wim 32:59c4b8f648d4 3701 TextLCD_SPI_N_3_24::TextLCD_SPI_N_3_24(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 3702 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3703 _spi(spi),
wim 32:59c4b8f648d4 3704 _cs(cs) {
wim 32:59c4b8f648d4 3705
wim 32:59c4b8f648d4 3706 // Init CS
wim 32:59c4b8f648d4 3707 _cs = 1;
wim 32:59c4b8f648d4 3708
wim 34:e5a0dcb43ecc 3709 // Setup the spi for 8 bit data, high steady state clock,
wim 32:59c4b8f648d4 3710 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 34:e5a0dcb43ecc 3711 _spi->format(8,3);
wim 32:59c4b8f648d4 3712 _spi->frequency(1000000);
wim 32:59c4b8f648d4 3713
wim 32:59c4b8f648d4 3714 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 3715 if (bl != NC) {
wim 32:59c4b8f648d4 3716 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 3717 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 3718 }
wim 32:59c4b8f648d4 3719 else {
wim 32:59c4b8f648d4 3720 // No Hardware Backlight pin
wim 32:59c4b8f648d4 3721 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 3722 }
wim 32:59c4b8f648d4 3723
wim 32:59c4b8f648d4 3724 //Sanity check
wim 32:59c4b8f648d4 3725 if (_ctrl & LCD_C_SPI3_24) {
wim 36:9f5f86dfd44a 3726 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 3727 }
wim 32:59c4b8f648d4 3728 else {
wim 32:59c4b8f648d4 3729 error("Error: LCD Controller type does not support native SPI3 24 bits interface\n\r");
wim 32:59c4b8f648d4 3730 }
wim 32:59c4b8f648d4 3731 }
wim 32:59c4b8f648d4 3732
wim 32:59c4b8f648d4 3733 TextLCD_SPI_N_3_24::~TextLCD_SPI_N_3_24() {
wim 32:59c4b8f648d4 3734 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 3735 }
wim 32:59c4b8f648d4 3736
wim 32:59c4b8f648d4 3737 // Not used in this mode
wim 32:59c4b8f648d4 3738 void TextLCD_SPI_N_3_24::_setEnable(bool value) {
wim 32:59c4b8f648d4 3739 }
wim 32:59c4b8f648d4 3740
wim 32:59c4b8f648d4 3741 // Set RS pin
wim 32:59c4b8f648d4 3742 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 3743 void TextLCD_SPI_N_3_24::_setRS(bool value) {
wim 32:59c4b8f648d4 3744 // The 24bit mode is split in 3 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next two bytes.
wim 32:59c4b8f648d4 3745 // Each byte encodes 4 actual bits. The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 3746 // b23 b22 b21 b20 b19 b18 b17 b16 - b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 3747 // 1 1 1 1 1 RW RS 0 d0 d1 d2 d3 0 0 0 0 d4 d5 d6 d7 0 0 0 0
wim 32:59c4b8f648d4 3748 //
wim 32:59c4b8f648d4 3749 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 3750 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 3751 //
wim 32:59c4b8f648d4 3752 // Note: SPI3_24 expects LSB first. This is inconsistent with regular SPI convention (and hardware) that sends MSB first.
wim 32:59c4b8f648d4 3753
wim 32:59c4b8f648d4 3754 if (value) {
wim 32:59c4b8f648d4 3755 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 3756 }
wim 32:59c4b8f648d4 3757 else {
wim 32:59c4b8f648d4 3758 _controlbyte = 0xF8; // Next byte is command
wim 34:e5a0dcb43ecc 3759 }
wim 32:59c4b8f648d4 3760 }
wim 32:59c4b8f648d4 3761
wim 32:59c4b8f648d4 3762 // Set BL pin
wim 32:59c4b8f648d4 3763 void TextLCD_SPI_N_3_24::_setBL(bool value) {
wim 32:59c4b8f648d4 3764 if (_bl) {
wim 32:59c4b8f648d4 3765 _bl->write(value);
wim 32:59c4b8f648d4 3766 }
wim 32:59c4b8f648d4 3767 }
wim 32:59c4b8f648d4 3768
wim 32:59c4b8f648d4 3769 // Not used in this mode
wim 32:59c4b8f648d4 3770 void TextLCD_SPI_N_3_24::_setData(int value) {
wim 32:59c4b8f648d4 3771 }
wim 32:59c4b8f648d4 3772
wim 32:59c4b8f648d4 3773 //Mapping table to flip the bits around cause SPI3_24 expects LSB first.
wim 32:59c4b8f648d4 3774 const uint8_t map3_24[16] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0};
wim 32:59c4b8f648d4 3775
wim 32:59c4b8f648d4 3776 // Write a byte using SPI3 24 bits mode
wim 32:59c4b8f648d4 3777 void TextLCD_SPI_N_3_24::_writeByte(int value) {
wim 32:59c4b8f648d4 3778 _cs = 0;
wim 32:59c4b8f648d4 3779 wait_us(1);
wim 32:59c4b8f648d4 3780 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 3781
wim 32:59c4b8f648d4 3782 //Map and send the LSB nibble
wim 32:59c4b8f648d4 3783 _spi->write( map3_24[value & 0x0F]);
wim 32:59c4b8f648d4 3784
wim 32:59c4b8f648d4 3785 //Map and send the MSB nibble
wim 32:59c4b8f648d4 3786 _spi->write( map3_24[(value >> 4) & 0x0F]);
wim 32:59c4b8f648d4 3787
wim 32:59c4b8f648d4 3788 wait_us(1);
wim 32:59c4b8f648d4 3789 _cs = 1;
wim 32:59c4b8f648d4 3790 }
wim 34:e5a0dcb43ecc 3791 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 3792 //------- End TextLCD_SPI_N_3_24 ----------