APP 4
Dependencies: mbed CRC16 mbed-rtos
APP.cpp@11:097ae746d8ac, 2016-02-21 (annotated)
- Committer:
- vinbel93
- Date:
- Sun Feb 21 21:47:13 2016 +0000
- Revision:
- 11:097ae746d8ac
- Parent:
- 10:51ee22e230c7
- Parent:
- 9:b937f9c6d682
- Child:
- 12:715af3660c73
- Child:
- 13:195826b8c61b
mergasasdfasdf
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
manl2003 | 2:1250280a511b | 1 | #include "APP.h" |
vinbel93 | 3:3ffa14e75b8a | 2 | #include "Manchester.h" |
vinbel93 | 9:b937f9c6d682 | 3 | #include "Frame.h" |
vinbel93 | 0:ac5e42371639 | 4 | |
vinbel93 | 0:ac5e42371639 | 5 | Serial pc(USBTX, USBRX); |
vinbel93 | 6:3181f546e812 | 6 | DigitalIn in(p9); |
vinbel93 | 0:ac5e42371639 | 7 | |
vinbel93 | 6:3181f546e812 | 8 | bool clockTick = false; |
vinbel93 | 9:b937f9c6d682 | 9 | bitset<FRAMESIZE> message; |
vinbel93 | 3:3ffa14e75b8a | 10 | int counter = 0; |
vinbel93 | 0:ac5e42371639 | 11 | |
vinbel93 | 1:f212b6676849 | 12 | int benchmark(void (*function) (void)) |
vinbel93 | 0:ac5e42371639 | 13 | { |
vinbel93 | 3:3ffa14e75b8a | 14 | int count = LPC_TIM2->TC; |
vinbel93 | 0:ac5e42371639 | 15 | function(); |
vinbel93 | 3:3ffa14e75b8a | 16 | return LPC_TIM2->TC - count; |
vinbel93 | 0:ac5e42371639 | 17 | } |
vinbel93 | 0:ac5e42371639 | 18 | |
vinbel93 | 1:f212b6676849 | 19 | extern "C" void TIMER2_IRQHandler() |
vinbel93 | 0:ac5e42371639 | 20 | { |
vinbel93 | 0:ac5e42371639 | 21 | if ((LPC_TIM2->IR & 0x01) == 0x01) // if MR0 interrupt, proceed |
vinbel93 | 0:ac5e42371639 | 22 | { |
vinbel93 | 3:3ffa14e75b8a | 23 | LPC_TIM2->IR |= 1 << 0; // Clear MR0 interrupt flag |
vinbel93 | 6:3181f546e812 | 24 | clockTick = !clockTick; |
vinbel93 | 9:b937f9c6d682 | 25 | LPC_TIM2->EMR = encode(message[counter] & 0x1, clockTick); |
vinbel93 | 6:3181f546e812 | 26 | |
vinbel93 | 6:3181f546e812 | 27 | if (clockTick) |
vinbel93 | 0:ac5e42371639 | 28 | { |
vinbel93 | 6:3181f546e812 | 29 | counter++; |
vinbel93 | 0:ac5e42371639 | 30 | } |
vinbel93 | 6:3181f546e812 | 31 | |
vinbel93 | 6:3181f546e812 | 32 | if (counter >= FRAMESIZE) |
vinbel93 | 0:ac5e42371639 | 33 | { |
vinbel93 | 6:3181f546e812 | 34 | counter = 0; |
vinbel93 | 0:ac5e42371639 | 35 | } |
vinbel93 | 0:ac5e42371639 | 36 | } |
vinbel93 | 0:ac5e42371639 | 37 | } |
manl2003 | 10:51ee22e230c7 | 38 | /* |
manl2003 | 10:51ee22e230c7 | 39 | extern "C" void TIMER1_IRQHandler() |
manl2003 | 10:51ee22e230c7 | 40 | { |
manl2003 | 10:51ee22e230c7 | 41 | if ((LPC_TIM2->IR & 0x01) == 0x01) // if MR0 interrupt, proceed |
manl2003 | 10:51ee22e230c7 | 42 | { |
manl2003 | 10:51ee22e230c7 | 43 | LPC_TIM2->IR |= 1 << 0; // Clear MR0 interrupt flag |
manl2003 | 10:51ee22e230c7 | 44 | clockTick = !clockTick; |
manl2003 | 10:51ee22e230c7 | 45 | LPC_TIM2->EMR = encode(message[counter], clockTick); |
manl2003 | 10:51ee22e230c7 | 46 | |
manl2003 | 10:51ee22e230c7 | 47 | if (clockTick) |
manl2003 | 10:51ee22e230c7 | 48 | { |
manl2003 | 10:51ee22e230c7 | 49 | counter++; |
manl2003 | 10:51ee22e230c7 | 50 | } |
manl2003 | 10:51ee22e230c7 | 51 | |
manl2003 | 10:51ee22e230c7 | 52 | if (counter >= FRAMESIZE) |
manl2003 | 10:51ee22e230c7 | 53 | { |
manl2003 | 10:51ee22e230c7 | 54 | counter = 0; |
manl2003 | 10:51ee22e230c7 | 55 | } |
manl2003 | 10:51ee22e230c7 | 56 | } |
manl2003 | 10:51ee22e230c7 | 57 | }*/ |
manl2003 | 10:51ee22e230c7 | 58 | |
vinbel93 | 0:ac5e42371639 | 59 | |
manl2003 | 7:733d500dbe5c | 60 | void initTimers() |
vinbel93 | 0:ac5e42371639 | 61 | { |
manl2003 | 7:733d500dbe5c | 62 | //Timer 2 (match) |
manl2003 | 10:51ee22e230c7 | 63 | LPC_SC->PCLKSEL1 |= (1 << 12); // pclk = cclk timer2 |
manl2003 | 10:51ee22e230c7 | 64 | LPC_SC->PCONP |= (1 << 22); // timer2 power on |
manl2003 | 10:51ee22e230c7 | 65 | LPC_TIM2->MR0 = CLOCKS_TO_SECOND / 10; // 100 ms |
manl2003 | 10:51ee22e230c7 | 66 | LPC_TIM2->MCR = 3; // interrupt and reset control |
manl2003 | 10:51ee22e230c7 | 67 | // Interrupt & reset timer2 on match |
manl2003 | 10:51ee22e230c7 | 68 | LPC_TIM2->EMR = (2 << 4); // toggle |
manl2003 | 10:51ee22e230c7 | 69 | NVIC_EnableIRQ(TIMER2_IRQn); // enable timer2 interrupt |
manl2003 | 10:51ee22e230c7 | 70 | LPC_TIM2->TCR = 1; // enable Timer2 |
manl2003 | 10:51ee22e230c7 | 71 | /* |
manl2003 | 7:733d500dbe5c | 72 | //Timer 1 (cap) |
manl2003 | 10:51ee22e230c7 | 73 | LPC_SC->PCLKSEL0 |= (1 << 4); // pclk = cclk timer2 |
manl2003 | 10:51ee22e230c7 | 74 | LPC_SC->PCONP |= (1 << 2); // timer1 power on |
manl2003 | 10:51ee22e230c7 | 75 | LPC_TIM1->MR0 = CLOCKS_TO_SECOND / 10; // 100 ms |
manl2003 | 10:51ee22e230c7 | 76 | LPC_TIM1->MCR = 3; // interrupt and reset control |
manl2003 | 10:51ee22e230c7 | 77 | // Interrupt & reset timer1 on match |
manl2003 | 10:51ee22e230c7 | 78 | NVIC_EnableIRQ(TIMER1_IRQn); // enable timer1 interrupt |
manl2003 | 10:51ee22e230c7 | 79 | LPC_TIM1->TCR = 1; // enable Timer1 |
manl2003 | 10:51ee22e230c7 | 80 | */ |
vinbel93 | 0:ac5e42371639 | 81 | } |
vinbel93 | 0:ac5e42371639 | 82 | |
vinbel93 | 1:f212b6676849 | 83 | int main() |
vinbel93 | 0:ac5e42371639 | 84 | { |
vinbel93 | 9:b937f9c6d682 | 85 | message = buildFrame(convertToBits("ASDF", 4, &pc), 4, &pc); |
vinbel93 | 9:b937f9c6d682 | 86 | |
vinbel93 | 0:ac5e42371639 | 87 | LPC_PINCON->PINSEL0 |= (3 << 12); // P0.6 = MAT2.0 |
manl2003 | 8:60499583959f | 88 | initTimers(); |
vinbel93 | 3:3ffa14e75b8a | 89 | |
vinbel93 | 3:3ffa14e75b8a | 90 | while (true) |
vinbel93 | 0:ac5e42371639 | 91 | { |
vinbel93 | 9:b937f9c6d682 | 92 | pc.printf("%i ", decode(in.read(), clockTick)); |
vinbel93 | 6:3181f546e812 | 93 | wait(0.2); |
vinbel93 | 0:ac5e42371639 | 94 | } |
vinbel93 | 0:ac5e42371639 | 95 | } |