APP 4

Dependencies:   mbed CRC16 mbed-rtos

Committer:
vinbel93
Date:
Sat Feb 20 20:44:35 2016 +0000
Revision:
3:3ffa14e75b8a
Parent:
2:1250280a511b
Child:
6:3181f546e812
Child:
7:733d500dbe5c
manchester and swag

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manl2003 2:1250280a511b 1 #include "APP.h"
vinbel93 3:3ffa14e75b8a 2 #include "Manchester.h"
vinbel93 0:ac5e42371639 3
vinbel93 0:ac5e42371639 4 Serial pc(USBTX, USBRX);
vinbel93 0:ac5e42371639 5
vinbel93 3:3ffa14e75b8a 6 bool messageReady = false;
vinbel93 3:3ffa14e75b8a 7 bitset<2 * FRAMESIZE> message;
vinbel93 3:3ffa14e75b8a 8 int counter = 0;
vinbel93 0:ac5e42371639 9
vinbel93 1:f212b6676849 10 int benchmark(void (*function) (void))
vinbel93 0:ac5e42371639 11 {
vinbel93 3:3ffa14e75b8a 12 int count = LPC_TIM2->TC;
vinbel93 0:ac5e42371639 13 function();
vinbel93 3:3ffa14e75b8a 14 return LPC_TIM2->TC - count;
vinbel93 0:ac5e42371639 15 }
vinbel93 0:ac5e42371639 16
vinbel93 1:f212b6676849 17 extern "C" void TIMER2_IRQHandler()
vinbel93 0:ac5e42371639 18 {
vinbel93 0:ac5e42371639 19 if ((LPC_TIM2->IR & 0x01) == 0x01) // if MR0 interrupt, proceed
vinbel93 0:ac5e42371639 20 {
vinbel93 3:3ffa14e75b8a 21 LPC_TIM2->IR |= 1 << 0; // Clear MR0 interrupt flag
vinbel93 3:3ffa14e75b8a 22
vinbel93 3:3ffa14e75b8a 23 if (messageReady)
vinbel93 0:ac5e42371639 24 {
vinbel93 3:3ffa14e75b8a 25 LPC_TIM2->EMR = ((message[counter++] + 1) << 4);
vinbel93 0:ac5e42371639 26 }
vinbel93 3:3ffa14e75b8a 27 else
vinbel93 0:ac5e42371639 28 {
vinbel93 3:3ffa14e75b8a 29 LPC_TIM2->EMR = (1 << 4); // output 0
vinbel93 0:ac5e42371639 30 }
vinbel93 0:ac5e42371639 31 }
vinbel93 0:ac5e42371639 32 }
vinbel93 0:ac5e42371639 33
vinbel93 1:f212b6676849 34 void initTimer()
vinbel93 0:ac5e42371639 35 {
vinbel93 0:ac5e42371639 36 LPC_SC->PCLKSEL1 |= (1 << 12); // pclk = cclk timer2
vinbel93 0:ac5e42371639 37 LPC_SC->PCONP |= (1 << 22); // timer2 power on
vinbel93 3:3ffa14e75b8a 38 LPC_TIM2->MR0 = 9600000; // 100 ms
vinbel93 3:3ffa14e75b8a 39 LPC_TIM2->MCR = 3; // interrupt and reset control
vinbel93 3:3ffa14e75b8a 40 // Interrupt & reset timer2 on match
vinbel93 0:ac5e42371639 41 NVIC_EnableIRQ(TIMER2_IRQn); // enable timer2 interrupt
vinbel93 0:ac5e42371639 42 LPC_TIM2->TCR = 1; // enable Timer2
vinbel93 0:ac5e42371639 43 }
vinbel93 0:ac5e42371639 44
vinbel93 1:f212b6676849 45 int main()
vinbel93 0:ac5e42371639 46 {
vinbel93 0:ac5e42371639 47 LPC_PINCON->PINSEL0 |= (3 << 12); // P0.6 = MAT2.0
vinbel93 0:ac5e42371639 48
vinbel93 1:f212b6676849 49 initTimer();
vinbel93 3:3ffa14e75b8a 50
vinbel93 3:3ffa14e75b8a 51 while (true)
vinbel93 0:ac5e42371639 52 {
vinbel93 0:ac5e42371639 53 wait(1.0);
vinbel93 0:ac5e42371639 54 }
vinbel93 0:ac5e42371639 55 }