Vincent Belanger / Mbed 2 deprecated APP4

APP 4

Dependencies:   mbed CRC16 mbed-rtos

APP.cpp@13:195826b8c61b, 2016-02-22 (annotated)

Committer:
vinbel93
Date:
Mon Feb 22 17:52:26 2016 +0000
Revision:
13:195826b8c61b
Parent:
11:097ae746d8ac
Child:
14:9505b98c6623
asdf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manl2003 2:1250280a511b 1 #include "APP.h"
vinbel93 3:3ffa14e75b8a 2 #include "Manchester.h"
vinbel93 9:b937f9c6d682 3 #include "Frame.h"
vinbel93 0:ac5e42371639 4
vinbel93 0:ac5e42371639 5 Serial pc(USBTX, USBRX);
vinbel93 13:195826b8c61b 6 DigitalOut out(p8);
vinbel93 13:195826b8c61b 7 DigitalIn in(p30);
vinbel93 0:ac5e42371639 8
vinbel93 6:3181f546e812 9 bool clockTick = false;
vinbel93 13:195826b8c61b 10 bitset<FRAMESIZE> message (string("1010101010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"));
vinbel93 3:3ffa14e75b8a 11 int counter = 0;
vinbel93 13:195826b8c61b 12 unsigned int period = 0;
vinbel93 13:195826b8c61b 13 bool readBuffer[2] = {false, false};
vinbel93 13:195826b8c61b 14 bool readBufferReady = false;
vinbel93 0:ac5e42371639 15
vinbel93 1:f212b6676849 16 int benchmark(void (*function) (void))
vinbel93 0:ac5e42371639 17 {
vinbel93 3:3ffa14e75b8a 18 int count = LPC_TIM2->TC;
vinbel93 0:ac5e42371639 19 function();
vinbel93 3:3ffa14e75b8a 20 return LPC_TIM2->TC - count;
vinbel93 0:ac5e42371639 21 }
vinbel93 0:ac5e42371639 22
vinbel93 13:195826b8c61b 23 extern "C" void TIMER1_IRQHandler()
vinbel93 0:ac5e42371639 24 {
vinbel93 13:195826b8c61b 25 if ((LPC_TIM1->IR & 0x01) == 0x01) // if MR0 interrupt, proceed
vinbel93 0:ac5e42371639 26 {
vinbel93 13:195826b8c61b 27 LPC_TIM1->IR |= 1 << 0; // Clear MR0 interrupt flag
vinbel93 6:3181f546e812 28 clockTick = !clockTick;
vinbel93 13:195826b8c61b 29 out = encode(message[counter] & 0x1, clockTick);
vinbel93 6:3181f546e812 30
vinbel93 6:3181f546e812 31 if (clockTick)
vinbel93 0:ac5e42371639 32 {
vinbel93 6:3181f546e812 33 counter++;
vinbel93 0:ac5e42371639 34 }
vinbel93 6:3181f546e812 35
vinbel93 6:3181f546e812 36 if (counter >= FRAMESIZE)
vinbel93 0:ac5e42371639 37 {
vinbel93 6:3181f546e812 38 counter = 0;
vinbel93 0:ac5e42371639 39 }
vinbel93 0:ac5e42371639 40 }
vinbel93 0:ac5e42371639 41 }
vinbel93 13:195826b8c61b 42
vinbel93 13:195826b8c61b 43 extern "C" void TIMER2_IRQHandler()
manl2003 10:51ee22e230c7 44 {
vinbel93 13:195826b8c61b 45 unsigned int clocks = LPC_TIM2->CR0;
vinbel93 13:195826b8c61b 46 period = clocks; // preambule 01010101
manl2003 10:51ee22e230c7 47
vinbel93 13:195826b8c61b 48 if (!readBufferReady)
vinbel93 13:195826b8c61b 49 {
vinbel93 13:195826b8c61b 50 readBuffer[0] = in.read();
vinbel93 13:195826b8c61b 51 }
vinbel93 13:195826b8c61b 52 else
vinbel93 13:195826b8c61b 53 {
vinbel93 13:195826b8c61b 54 readBuffer[1] = in.read();
vinbel93 13:195826b8c61b 55 // Appel MEF
vinbel93 13:195826b8c61b 56 bool value = decode(readBuffer[0], readBuffer[1]);
vinbel93 13:195826b8c61b 57 }
manl2003 10:51ee22e230c7 58
vinbel93 13:195826b8c61b 59 LPC_TIM2->TC = 0;
manl2003 10:51ee22e230c7 60
vinbel93 13:195826b8c61b 61 LPC_TIM2->IR |= 0xFFFFFFFF; // clear Timer interrupt register
vinbel93 13:195826b8c61b 62 }
vinbel93 13:195826b8c61b 63
manl2003 7:733d500dbe5c 64 void initTimers()
vinbel93 0:ac5e42371639 65 {
vinbel93 13:195826b8c61b 66 //Timer 1 (match)
vinbel93 13:195826b8c61b 67 LPC_SC->PCLKSEL0 |= (1 << 4); // pclk = cclk timer1
manl2003 10:51ee22e230c7 68 LPC_SC->PCONP |= (1 << 2); // timer1 power on
manl2003 10:51ee22e230c7 69 LPC_TIM1->MR0 = CLOCKS_TO_SECOND / 10; // 100 ms
manl2003 10:51ee22e230c7 70 LPC_TIM1->MCR = 3; // interrupt and reset control
vinbel93 13:195826b8c61b 71 // Interrupt & reset timer on match
vinbel93 13:195826b8c61b 72 LPC_TIM1->EMR = (3 << 4);
vinbel93 13:195826b8c61b 73 NVIC_EnableIRQ(TIMER1_IRQn); // enable timer interrupt
vinbel93 13:195826b8c61b 74 LPC_TIM1->TCR = 1; // enable Timer
vinbel93 13:195826b8c61b 75
vinbel93 13:195826b8c61b 76 //Timer 2 (cap)
vinbel93 13:195826b8c61b 77 LPC_SC->PCLKSEL1 |= (1 << 12); // pclk = cclk timer2
vinbel93 13:195826b8c61b 78 LPC_SC->PCONP |= (1 << 22); // timer2 power on
vinbel93 13:195826b8c61b 79 LPC_TIM2->TC = 0; // clear timer counter
vinbel93 13:195826b8c61b 80 LPC_TIM2->PC = 0; // clear prescale counter
vinbel93 13:195826b8c61b 81 LPC_TIM2->PR = 0; // clear prescale register
vinbel93 13:195826b8c61b 82 LPC_TIM2->TCR |= (1 << 1); // reset timer
vinbel93 13:195826b8c61b 83 LPC_TIM2->TCR &= ~(1 << 1); // release reset
vinbel93 13:195826b8c61b 84 LPC_TIM2->IR = 0xFFFFFFFF; // clear interrupt register
vinbel93 13:195826b8c61b 85 LPC_TIM2->CCR |= 0x0000007; // enable rising-edge and falling-edge capture on 2.0
vinbel93 13:195826b8c61b 86 NVIC_EnableIRQ(TIMER2_IRQn); // enable timer interrupt
vinbel93 13:195826b8c61b 87 LPC_TIM2->TCR = 1; // start Timer
vinbel93 0:ac5e42371639 88 }
vinbel93 0:ac5e42371639 89
vinbel93 1:f212b6676849 90 int main()
vinbel93 0:ac5e42371639 91 {
vinbel93 13:195826b8c61b 92 //message = buildFrame(convertToBits("ASDF", 4, &pc), 4, &pc);
vinbel93 9:b937f9c6d682 93
vinbel93 13:195826b8c61b 94 LPC_PINCON->PINSEL0 |= (3 << 8); // P0.4 = CAP2.0
manl2003 8:60499583959f 95 initTimers();
vinbel93 3:3ffa14e75b8a 96
vinbel93 3:3ffa14e75b8a 97 while (true)
vinbel93 0:ac5e42371639 98 {
vinbel93 13:195826b8c61b 99 pc.printf("%i ", period);
vinbel93 13:195826b8c61b 100 pc.printf("%i \r\n", in.read());
vinbel93 13:195826b8c61b 101 //pc.printf("%i ", decode(in.read(), clockTick));
vinbel93 13:195826b8c61b 102 wait(0.1);
vinbel93 0:ac5e42371639 103 }
vinbel93 0:ac5e42371639 104 }