APP 4

Dependencies:   mbed CRC16 mbed-rtos

Committer:
vinbel93
Date:
Sun Feb 21 21:40:36 2016 +0000
Revision:
9:b937f9c6d682
Parent:
8:60499583959f
Child:
11:097ae746d8ac
asdfasdf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manl2003 2:1250280a511b 1 #include "APP.h"
vinbel93 3:3ffa14e75b8a 2 #include "Manchester.h"
vinbel93 9:b937f9c6d682 3 #include "Frame.h"
vinbel93 0:ac5e42371639 4
vinbel93 0:ac5e42371639 5 Serial pc(USBTX, USBRX);
vinbel93 6:3181f546e812 6 DigitalIn in(p9);
vinbel93 0:ac5e42371639 7
vinbel93 6:3181f546e812 8 bool clockTick = false;
vinbel93 9:b937f9c6d682 9 bitset<FRAMESIZE> message;
vinbel93 3:3ffa14e75b8a 10 int counter = 0;
vinbel93 0:ac5e42371639 11
vinbel93 1:f212b6676849 12 int benchmark(void (*function) (void))
vinbel93 0:ac5e42371639 13 {
vinbel93 3:3ffa14e75b8a 14 int count = LPC_TIM2->TC;
vinbel93 0:ac5e42371639 15 function();
vinbel93 3:3ffa14e75b8a 16 return LPC_TIM2->TC - count;
vinbel93 0:ac5e42371639 17 }
vinbel93 0:ac5e42371639 18
vinbel93 1:f212b6676849 19 extern "C" void TIMER2_IRQHandler()
vinbel93 0:ac5e42371639 20 {
vinbel93 0:ac5e42371639 21 if ((LPC_TIM2->IR & 0x01) == 0x01) // if MR0 interrupt, proceed
vinbel93 0:ac5e42371639 22 {
vinbel93 3:3ffa14e75b8a 23 LPC_TIM2->IR |= 1 << 0; // Clear MR0 interrupt flag
vinbel93 6:3181f546e812 24 clockTick = !clockTick;
vinbel93 9:b937f9c6d682 25 LPC_TIM2->EMR = encode(message[counter] & 0x1, clockTick);
vinbel93 6:3181f546e812 26
vinbel93 6:3181f546e812 27 if (clockTick)
vinbel93 0:ac5e42371639 28 {
vinbel93 6:3181f546e812 29 counter++;
vinbel93 0:ac5e42371639 30 }
vinbel93 6:3181f546e812 31
vinbel93 6:3181f546e812 32 if (counter >= FRAMESIZE)
vinbel93 0:ac5e42371639 33 {
vinbel93 6:3181f546e812 34 counter = 0;
vinbel93 0:ac5e42371639 35 }
vinbel93 0:ac5e42371639 36 }
vinbel93 0:ac5e42371639 37 }
vinbel93 0:ac5e42371639 38
manl2003 7:733d500dbe5c 39 void initTimers()
vinbel93 0:ac5e42371639 40 {
manl2003 7:733d500dbe5c 41 //Timer 2 (match)
vinbel93 0:ac5e42371639 42 LPC_SC->PCLKSEL1 |= (1 << 12); // pclk = cclk timer2
vinbel93 0:ac5e42371639 43 LPC_SC->PCONP |= (1 << 22); // timer2 power on
manl2003 8:60499583959f 44 LPC_TIM2->MR0 = CLOCKS_TO_SECOND / 10; // 100 ms
vinbel93 3:3ffa14e75b8a 45 LPC_TIM2->MCR = 3; // interrupt and reset control
vinbel93 3:3ffa14e75b8a 46 // Interrupt & reset timer2 on match
manl2003 8:60499583959f 47 LPC_TIM2->EMR = (2 << 4); // toggle
vinbel93 0:ac5e42371639 48 NVIC_EnableIRQ(TIMER2_IRQn); // enable timer2 interrupt
vinbel93 0:ac5e42371639 49 LPC_TIM2->TCR = 1; // enable Timer2
manl2003 7:733d500dbe5c 50
manl2003 7:733d500dbe5c 51 //Timer 1 (cap)
manl2003 7:733d500dbe5c 52 LPC_SC->PCLKSEL1 |= (1 << 4); // pclk = cclk timer2
manl2003 7:733d500dbe5c 53 LPC_SC->PCONP |= (1 << 2); // timer1 power on
manl2003 8:60499583959f 54 LPC_TIM1->MR0 = CLOCKS_TO_SECOND / 10; // 100 ms
manl2003 7:733d500dbe5c 55 LPC_TIM1->MCR = 3; // interrupt and reset control
manl2003 7:733d500dbe5c 56 // Interrupt & reset timer1 on match
manl2003 7:733d500dbe5c 57 NVIC_EnableIRQ(TIMER1_IRQn); // enable timer1 interrupt
manl2003 7:733d500dbe5c 58 LPC_TIM1->TCR = 1; // enable Timer1
manl2003 8:60499583959f 59
vinbel93 0:ac5e42371639 60 }
vinbel93 0:ac5e42371639 61
vinbel93 1:f212b6676849 62 int main()
vinbel93 0:ac5e42371639 63 {
vinbel93 9:b937f9c6d682 64 message = buildFrame(convertToBits("ASDF", 4, &pc), 4, &pc);
vinbel93 9:b937f9c6d682 65
vinbel93 0:ac5e42371639 66 LPC_PINCON->PINSEL0 |= (3 << 12); // P0.6 = MAT2.0
manl2003 8:60499583959f 67 initTimers();
vinbel93 3:3ffa14e75b8a 68
vinbel93 3:3ffa14e75b8a 69 while (true)
vinbel93 0:ac5e42371639 70 {
vinbel93 9:b937f9c6d682 71 pc.printf("%i ", decode(in.read(), clockTick));
vinbel93 6:3181f546e812 72 wait(0.2);
vinbel93 0:ac5e42371639 73 }
vinbel93 0:ac5e42371639 74 }