Vincent Belanger / Mbed 2 deprecated APP4

APP 4

Dependencies:   mbed CRC16 mbed-rtos

APP.cpp@7:733d500dbe5c, 2016-02-21 (annotated)

Committer:
manl2003
Date:
Sun Feb 21 18:50:45 2016 +0000
Revision:
7:733d500dbe5c
Parent:
3:3ffa14e75b8a
Child:
8:60499583959f
Allllllo vincent

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manl2003 2:1250280a511b 1 #include "APP.h"
vinbel93 3:3ffa14e75b8a 2 #include "Manchester.h"
vinbel93 0:ac5e42371639 3
vinbel93 0:ac5e42371639 4 Serial pc(USBTX, USBRX);
vinbel93 0:ac5e42371639 5
vinbel93 3:3ffa14e75b8a 6 bool messageReady = false;
vinbel93 3:3ffa14e75b8a 7 bitset<2 * FRAMESIZE> message;
vinbel93 3:3ffa14e75b8a 8 int counter = 0;
vinbel93 0:ac5e42371639 9
vinbel93 1:f212b6676849 10 int benchmark(void (*function) (void))
vinbel93 0:ac5e42371639 11 {
vinbel93 3:3ffa14e75b8a 12 int count = LPC_TIM2->TC;
vinbel93 0:ac5e42371639 13 function();
vinbel93 3:3ffa14e75b8a 14 return LPC_TIM2->TC - count;
vinbel93 0:ac5e42371639 15 }
vinbel93 0:ac5e42371639 16
vinbel93 1:f212b6676849 17 extern "C" void TIMER2_IRQHandler()
vinbel93 0:ac5e42371639 18 {
vinbel93 0:ac5e42371639 19 if ((LPC_TIM2->IR & 0x01) == 0x01) // if MR0 interrupt, proceed
vinbel93 0:ac5e42371639 20 {
vinbel93 3:3ffa14e75b8a 21 LPC_TIM2->IR |= 1 << 0; // Clear MR0 interrupt flag
vinbel93 3:3ffa14e75b8a 22
vinbel93 3:3ffa14e75b8a 23 if (messageReady)
vinbel93 0:ac5e42371639 24 {
vinbel93 3:3ffa14e75b8a 25 LPC_TIM2->EMR = ((message[counter++] + 1) << 4);
vinbel93 0:ac5e42371639 26 }
vinbel93 3:3ffa14e75b8a 27 else
vinbel93 0:ac5e42371639 28 {
vinbel93 3:3ffa14e75b8a 29 LPC_TIM2->EMR = (1 << 4); // output 0
vinbel93 0:ac5e42371639 30 }
vinbel93 0:ac5e42371639 31 }
vinbel93 0:ac5e42371639 32 }
vinbel93 0:ac5e42371639 33
manl2003 7:733d500dbe5c 34 void initTimers()
vinbel93 0:ac5e42371639 35 {
manl2003 7:733d500dbe5c 36 //Timer 2 (match)
vinbel93 0:ac5e42371639 37 LPC_SC->PCLKSEL1 |= (1 << 12); // pclk = cclk timer2
vinbel93 0:ac5e42371639 38 LPC_SC->PCONP |= (1 << 22); // timer2 power on
vinbel93 3:3ffa14e75b8a 39 LPC_TIM2->MR0 = 9600000; // 100 ms
vinbel93 3:3ffa14e75b8a 40 LPC_TIM2->MCR = 3; // interrupt and reset control
vinbel93 3:3ffa14e75b8a 41 // Interrupt & reset timer2 on match
vinbel93 0:ac5e42371639 42 NVIC_EnableIRQ(TIMER2_IRQn); // enable timer2 interrupt
vinbel93 0:ac5e42371639 43 LPC_TIM2->TCR = 1; // enable Timer2
manl2003 7:733d500dbe5c 44
manl2003 7:733d500dbe5c 45 //Timer 1 (cap)
manl2003 7:733d500dbe5c 46 LPC_SC->PCLKSEL1 |= (1 << 4); // pclk = cclk timer2
manl2003 7:733d500dbe5c 47 LPC_SC->PCONP |= (1 << 2); // timer1 power on
manl2003 7:733d500dbe5c 48 LPC_TIM1->MR0 = 9600000; // 100 ms
manl2003 7:733d500dbe5c 49 LPC_TIM1->MCR = 3; // interrupt and reset control
manl2003 7:733d500dbe5c 50 // Interrupt & reset timer1 on match
manl2003 7:733d500dbe5c 51 NVIC_EnableIRQ(TIMER1_IRQn); // enable timer1 interrupt
manl2003 7:733d500dbe5c 52 LPC_TIM1->TCR = 1; // enable Timer1
vinbel93 0:ac5e42371639 53 }
vinbel93 0:ac5e42371639 54
vinbel93 1:f212b6676849 55 int main()
vinbel93 0:ac5e42371639 56 {
vinbel93 0:ac5e42371639 57 LPC_PINCON->PINSEL0 |= (3 << 12); // P0.6 = MAT2.0
vinbel93 0:ac5e42371639 58
vinbel93 1:f212b6676849 59 initTimer();
vinbel93 3:3ffa14e75b8a 60
vinbel93 3:3ffa14e75b8a 61 while (true)
vinbel93 0:ac5e42371639 62 {
vinbel93 0:ac5e42371639 63 wait(1.0);
vinbel93 0:ac5e42371639 64 }
vinbel93 0:ac5e42371639 65 }