Code for autonomous ground vehicle, Data Bus, 3rd place winner in 2012 Sparkfun AVC.

Dependencies:   Watchdog mbed Schedule SimpleFilter LSM303DLM PinDetect DebounceIn Servo

Committer:
shimniok
Date:
Wed Jun 20 14:57:48 2012 +0000
Revision:
0:826c6171fc1b
Updated documentation

Who changed what in which revision?

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shimniok 0:826c6171fc1b 1 /* mbed SDFileSystem Library, for providing file access to SD cards
shimniok 0:826c6171fc1b 2 * Copyright (c) 2008-2010, sford
shimniok 0:826c6171fc1b 3 *
shimniok 0:826c6171fc1b 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
shimniok 0:826c6171fc1b 5 * of this software and associated documentation files (the "Software"), to deal
shimniok 0:826c6171fc1b 6 * in the Software without restriction, including without limitation the rights
shimniok 0:826c6171fc1b 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
shimniok 0:826c6171fc1b 8 * copies of the Software, and to permit persons to whom the Software is
shimniok 0:826c6171fc1b 9 * furnished to do so, subject to the following conditions:
shimniok 0:826c6171fc1b 10 *
shimniok 0:826c6171fc1b 11 * The above copyright notice and this permission notice shall be included in
shimniok 0:826c6171fc1b 12 * all copies or substantial portions of the Software.
shimniok 0:826c6171fc1b 13 *
shimniok 0:826c6171fc1b 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
shimniok 0:826c6171fc1b 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
shimniok 0:826c6171fc1b 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
shimniok 0:826c6171fc1b 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
shimniok 0:826c6171fc1b 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
shimniok 0:826c6171fc1b 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
shimniok 0:826c6171fc1b 20 * THE SOFTWARE.
shimniok 0:826c6171fc1b 21 */
shimniok 0:826c6171fc1b 22
shimniok 0:826c6171fc1b 23 /* Introduction
shimniok 0:826c6171fc1b 24 * ------------
shimniok 0:826c6171fc1b 25 * SD and MMC cards support a number of interfaces, but common to them all
shimniok 0:826c6171fc1b 26 * is one based on SPI. This is the one I'm implmenting because it means
shimniok 0:826c6171fc1b 27 * it is much more portable even though not so performant, and we already
shimniok 0:826c6171fc1b 28 * have the mbed SPI Interface!
shimniok 0:826c6171fc1b 29 *
shimniok 0:826c6171fc1b 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
shimniok 0:826c6171fc1b 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
shimniok 0:826c6171fc1b 32 *
shimniok 0:826c6171fc1b 33 * SPI Startup
shimniok 0:826c6171fc1b 34 * -----------
shimniok 0:826c6171fc1b 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
shimniok 0:826c6171fc1b 36 * asserting CS low and sending the reset command (CMD0). The card will
shimniok 0:826c6171fc1b 37 * respond with a (R1) response.
shimniok 0:826c6171fc1b 38 *
shimniok 0:826c6171fc1b 39 * CMD8 is optionally sent to determine the voltage range supported, and
shimniok 0:826c6171fc1b 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
shimniok 0:826c6171fc1b 41 * version 2.x. I'll just ignore this for now.
shimniok 0:826c6171fc1b 42 *
shimniok 0:826c6171fc1b 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
shimniok 0:826c6171fc1b 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
shimniok 0:826c6171fc1b 45 *
shimniok 0:826c6171fc1b 46 * You should also indicate whether the host supports High Capicity cards,
shimniok 0:826c6171fc1b 47 * and check whether the card is high capacity - i'll also ignore this
shimniok 0:826c6171fc1b 48 *
shimniok 0:826c6171fc1b 49 * SPI Protocol
shimniok 0:826c6171fc1b 50 * ------------
shimniok 0:826c6171fc1b 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
shimniok 0:826c6171fc1b 52 * the host starting every bus transaction by asserting the CS signal low. The
shimniok 0:826c6171fc1b 53 * card always responds to commands, data blocks and errors.
shimniok 0:826c6171fc1b 54 *
shimniok 0:826c6171fc1b 55 * The protocol supports a CRC, but by default it is off (except for the
shimniok 0:826c6171fc1b 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
shimniok 0:826c6171fc1b 57 * I'll leave the CRC off I think!
shimniok 0:826c6171fc1b 58 *
shimniok 0:826c6171fc1b 59 * Standard capacity cards have variable data block sizes, whereas High
shimniok 0:826c6171fc1b 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
shimniok 0:826c6171fc1b 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
shimniok 0:826c6171fc1b 62 * This is set with CMD16.
shimniok 0:826c6171fc1b 63 *
shimniok 0:826c6171fc1b 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
shimniok 0:826c6171fc1b 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
shimniok 0:826c6171fc1b 66 * the card gets a read command, it responds with a response token, and then
shimniok 0:826c6171fc1b 67 * a data token or an error.
shimniok 0:826c6171fc1b 68 *
shimniok 0:826c6171fc1b 69 * SPI Command Format
shimniok 0:826c6171fc1b 70 * ------------------
shimniok 0:826c6171fc1b 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
shimniok 0:826c6171fc1b 72 *
shimniok 0:826c6171fc1b 73 * +---------------+------------+------------+-----------+----------+--------------+
shimniok 0:826c6171fc1b 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
shimniok 0:826c6171fc1b 75 * +---------------+------------+------------+-----------+----------+--------------+
shimniok 0:826c6171fc1b 76 *
shimniok 0:826c6171fc1b 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
shimniok 0:826c6171fc1b 78 *
shimniok 0:826c6171fc1b 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
shimniok 0:826c6171fc1b 80 *
shimniok 0:826c6171fc1b 81 * SPI Response Format
shimniok 0:826c6171fc1b 82 * -------------------
shimniok 0:826c6171fc1b 83 * The main response format (R1) is a status byte (normally zero). Key flags:
shimniok 0:826c6171fc1b 84 * idle - 1 if the card is in an idle state/initialising
shimniok 0:826c6171fc1b 85 * cmd - 1 if an illegal command code was detected
shimniok 0:826c6171fc1b 86 *
shimniok 0:826c6171fc1b 87 * +-------------------------------------------------+
shimniok 0:826c6171fc1b 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
shimniok 0:826c6171fc1b 89 * +-------------------------------------------------+
shimniok 0:826c6171fc1b 90 *
shimniok 0:826c6171fc1b 91 * R1b is the same, except it is followed by a busy signal (zeros) until
shimniok 0:826c6171fc1b 92 * the first non-zero byte when it is ready again.
shimniok 0:826c6171fc1b 93 *
shimniok 0:826c6171fc1b 94 * Data Response Token
shimniok 0:826c6171fc1b 95 * -------------------
shimniok 0:826c6171fc1b 96 * Every data block written to the card is acknowledged by a byte
shimniok 0:826c6171fc1b 97 * response token
shimniok 0:826c6171fc1b 98 *
shimniok 0:826c6171fc1b 99 * +----------------------+
shimniok 0:826c6171fc1b 100 * | xxx | 0 | status | 1 |
shimniok 0:826c6171fc1b 101 * +----------------------+
shimniok 0:826c6171fc1b 102 * 010 - OK!
shimniok 0:826c6171fc1b 103 * 101 - CRC Error
shimniok 0:826c6171fc1b 104 * 110 - Write Error
shimniok 0:826c6171fc1b 105 *
shimniok 0:826c6171fc1b 106 * Single Block Read and Write
shimniok 0:826c6171fc1b 107 * ---------------------------
shimniok 0:826c6171fc1b 108 *
shimniok 0:826c6171fc1b 109 * Block transfers have a byte header, followed by the data, followed
shimniok 0:826c6171fc1b 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
shimniok 0:826c6171fc1b 111 *
shimniok 0:826c6171fc1b 112 * +------+---------+---------+- - - -+---------+-----------+----------+
shimniok 0:826c6171fc1b 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
shimniok 0:826c6171fc1b 114 * +------+---------+---------+- - - -+---------+-----------+----------+
shimniok 0:826c6171fc1b 115 */
shimniok 0:826c6171fc1b 116
shimniok 0:826c6171fc1b 117 /*
shimniok 0:826c6171fc1b 118 * Comment: Changes for SDHC support till 32GB
shimniok 0:826c6171fc1b 119 * Name: KB
shimniok 0:826c6171fc1b 120 * Date: 07/24/2010
shimniok 0:826c6171fc1b 121 * Release: 0.1
shimniok 0:826c6171fc1b 122 */
shimniok 0:826c6171fc1b 123
shimniok 0:826c6171fc1b 124 #include "SDHCFileSystem.h"
shimniok 0:826c6171fc1b 125
shimniok 0:826c6171fc1b 126 #define DEBUG
shimniok 0:826c6171fc1b 127 #define SD_COMMAND_TIMEOUT 5000
shimniok 0:826c6171fc1b 128
shimniok 0:826c6171fc1b 129
shimniok 0:826c6171fc1b 130 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
shimniok 0:826c6171fc1b 131 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
shimniok 0:826c6171fc1b 132 _cs = 1;
shimniok 0:826c6171fc1b 133 }
shimniok 0:826c6171fc1b 134
shimniok 0:826c6171fc1b 135 #define R1_IDLE_STATE (1 << 0)
shimniok 0:826c6171fc1b 136 #define R1_ERASE_RESET (1 << 1)
shimniok 0:826c6171fc1b 137 #define R1_ILLEGAL_COMMAND (1 << 2)
shimniok 0:826c6171fc1b 138 #define R1_COM_CRC_ERROR (1 << 3)
shimniok 0:826c6171fc1b 139 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
shimniok 0:826c6171fc1b 140 #define R1_ADDRESS_ERROR (1 << 5)
shimniok 0:826c6171fc1b 141 #define R1_PARAMETER_ERROR (1 << 6)
shimniok 0:826c6171fc1b 142
shimniok 0:826c6171fc1b 143 // Types
shimniok 0:826c6171fc1b 144 // - v1.x Standard Capacity
shimniok 0:826c6171fc1b 145 // - v2.x Standard Capacity
shimniok 0:826c6171fc1b 146 // - v2.x High Capacity
shimniok 0:826c6171fc1b 147 // - Not recognised as an SD Card
shimniok 0:826c6171fc1b 148
shimniok 0:826c6171fc1b 149 #define SDCARD_FAIL 0
shimniok 0:826c6171fc1b 150 #define SDCARD_V1 1
shimniok 0:826c6171fc1b 151 #define SDCARD_V2 2
shimniok 0:826c6171fc1b 152 #define SDCARD_V2HC 3
shimniok 0:826c6171fc1b 153
shimniok 0:826c6171fc1b 154 int SDFileSystem::initialise_card() {
shimniok 0:826c6171fc1b 155 // Set to 100kHz for initialisation, and clock card with cs = 1
shimniok 0:826c6171fc1b 156 _spi.frequency(100000);
shimniok 0:826c6171fc1b 157 _cs = 1;
shimniok 0:826c6171fc1b 158 for(int i=0; i<16; i++) {
shimniok 0:826c6171fc1b 159 _spi.write(0xFF);
shimniok 0:826c6171fc1b 160 }
shimniok 0:826c6171fc1b 161
shimniok 0:826c6171fc1b 162 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
shimniok 0:826c6171fc1b 163 if(_cmd(0, 0) != R1_IDLE_STATE) {
shimniok 0:826c6171fc1b 164 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
shimniok 0:826c6171fc1b 165 return SDCARD_FAIL;
shimniok 0:826c6171fc1b 166 }
shimniok 0:826c6171fc1b 167
shimniok 0:826c6171fc1b 168 // send CMD8 to determine whther it is ver 2.x
shimniok 0:826c6171fc1b 169 int r = _cmd8();
shimniok 0:826c6171fc1b 170 if(r == R1_IDLE_STATE) {
shimniok 0:826c6171fc1b 171 return initialise_card_v2();
shimniok 0:826c6171fc1b 172 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
shimniok 0:826c6171fc1b 173 return initialise_card_v1();
shimniok 0:826c6171fc1b 174 } else {
shimniok 0:826c6171fc1b 175 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
shimniok 0:826c6171fc1b 176 return SDCARD_FAIL;
shimniok 0:826c6171fc1b 177 }
shimniok 0:826c6171fc1b 178 }
shimniok 0:826c6171fc1b 179
shimniok 0:826c6171fc1b 180 int SDFileSystem::initialise_card_v1() {
shimniok 0:826c6171fc1b 181 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
shimniok 0:826c6171fc1b 182 _cmd(55, 0);
shimniok 0:826c6171fc1b 183 if(_cmd(41, 0) == 0) {
shimniok 0:826c6171fc1b 184 cdv = 512;
shimniok 0:826c6171fc1b 185 #ifdef DEBUG
shimniok 0:826c6171fc1b 186 printf("\n\rInit: SEDCARD_V1\n\r");
shimniok 0:826c6171fc1b 187 #endif
shimniok 0:826c6171fc1b 188 return SDCARD_V1;
shimniok 0:826c6171fc1b 189 }
shimniok 0:826c6171fc1b 190 }
shimniok 0:826c6171fc1b 191
shimniok 0:826c6171fc1b 192 fprintf(stderr, "Timeout waiting for v1.x card\n");
shimniok 0:826c6171fc1b 193 return SDCARD_FAIL;
shimniok 0:826c6171fc1b 194 }
shimniok 0:826c6171fc1b 195
shimniok 0:826c6171fc1b 196 int SDFileSystem::initialise_card_v2() {
shimniok 0:826c6171fc1b 197
shimniok 0:826c6171fc1b 198 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
shimniok 0:826c6171fc1b 199 wait_ms(50);
shimniok 0:826c6171fc1b 200 _cmd58();
shimniok 0:826c6171fc1b 201 _cmd(55, 0);
shimniok 0:826c6171fc1b 202 if(_cmd(41, 0x40000000) == 0) {
shimniok 0:826c6171fc1b 203 _cmd58();
shimniok 0:826c6171fc1b 204 #ifdef DEBUG
shimniok 0:826c6171fc1b 205 printf("\n\rInit: SDCARD_V2\n\r");
shimniok 0:826c6171fc1b 206 #endif
shimniok 0:826c6171fc1b 207 cdv = 1;
shimniok 0:826c6171fc1b 208 return SDCARD_V2;
shimniok 0:826c6171fc1b 209 }
shimniok 0:826c6171fc1b 210 }
shimniok 0:826c6171fc1b 211
shimniok 0:826c6171fc1b 212 fprintf(stderr, "Timeout waiting for v2.x card\n");
shimniok 0:826c6171fc1b 213 return SDCARD_FAIL;
shimniok 0:826c6171fc1b 214 }
shimniok 0:826c6171fc1b 215
shimniok 0:826c6171fc1b 216 int SDFileSystem::disk_initialize() {
shimniok 0:826c6171fc1b 217
shimniok 0:826c6171fc1b 218 int i = initialise_card();
shimniok 0:826c6171fc1b 219 #ifdef DEBUG
shimniok 0:826c6171fc1b 220 printf("init card = %d\n", i);
shimniok 0:826c6171fc1b 221 #endif
shimniok 0:826c6171fc1b 222 _sectors = _sd_sectors();
shimniok 0:826c6171fc1b 223
shimniok 0:826c6171fc1b 224 // Set block length to 512 (CMD16)
shimniok 0:826c6171fc1b 225 if(_cmd(16, 512) != 0) {
shimniok 0:826c6171fc1b 226 fprintf(stderr, "Set 512-byte block timed out\n");
shimniok 0:826c6171fc1b 227 return 1;
shimniok 0:826c6171fc1b 228 }
shimniok 0:826c6171fc1b 229
shimniok 0:826c6171fc1b 230 _spi.frequency(1000000); // Set to 1MHz for data transfer
shimniok 0:826c6171fc1b 231 return 0;
shimniok 0:826c6171fc1b 232 }
shimniok 0:826c6171fc1b 233
shimniok 0:826c6171fc1b 234 int SDFileSystem::disk_write(const unsigned char *buffer, unsigned long block_number, unsigned char count) {
shimniok 0:826c6171fc1b 235 // set write address for single block (CMD24)
shimniok 0:826c6171fc1b 236 if(_cmd(24, block_number * cdv) != 0) {
shimniok 0:826c6171fc1b 237 return 1;
shimniok 0:826c6171fc1b 238 }
shimniok 0:826c6171fc1b 239
shimniok 0:826c6171fc1b 240 // send the data block
shimniok 0:826c6171fc1b 241 _write(buffer, 512);
shimniok 0:826c6171fc1b 242 return 0;
shimniok 0:826c6171fc1b 243 }
shimniok 0:826c6171fc1b 244
shimniok 0:826c6171fc1b 245 int SDFileSystem::disk_read(unsigned char *buffer, unsigned long block_number, unsigned char count) {
shimniok 0:826c6171fc1b 246 // set read address for single block (CMD17)
shimniok 0:826c6171fc1b 247 if(_cmd(17, block_number * cdv) != 0) {
shimniok 0:826c6171fc1b 248 return 1;
shimniok 0:826c6171fc1b 249 }
shimniok 0:826c6171fc1b 250
shimniok 0:826c6171fc1b 251 // receive the data
shimniok 0:826c6171fc1b 252 _read(buffer, 512);
shimniok 0:826c6171fc1b 253 return 0;
shimniok 0:826c6171fc1b 254 }
shimniok 0:826c6171fc1b 255
shimniok 0:826c6171fc1b 256 int SDFileSystem::disk_status() { return 0; }
shimniok 0:826c6171fc1b 257 int SDFileSystem::disk_sync() { return 0; }
shimniok 0:826c6171fc1b 258 unsigned long SDFileSystem::disk_sector_count() { return _sectors; }
shimniok 0:826c6171fc1b 259
shimniok 0:826c6171fc1b 260 // PRIVATE FUNCTIONS
shimniok 0:826c6171fc1b 261
shimniok 0:826c6171fc1b 262 int SDFileSystem::_cmd(int cmd, int arg) {
shimniok 0:826c6171fc1b 263 _cs = 0;
shimniok 0:826c6171fc1b 264
shimniok 0:826c6171fc1b 265 // send a command
shimniok 0:826c6171fc1b 266 _spi.write(0x40 | cmd);
shimniok 0:826c6171fc1b 267 _spi.write(arg >> 24);
shimniok 0:826c6171fc1b 268 _spi.write(arg >> 16);
shimniok 0:826c6171fc1b 269 _spi.write(arg >> 8);
shimniok 0:826c6171fc1b 270 _spi.write(arg >> 0);
shimniok 0:826c6171fc1b 271 _spi.write(0x95);
shimniok 0:826c6171fc1b 272
shimniok 0:826c6171fc1b 273 // wait for the repsonse (response[7] == 0)
shimniok 0:826c6171fc1b 274 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
shimniok 0:826c6171fc1b 275 int response = _spi.write(0xFF);
shimniok 0:826c6171fc1b 276 if(!(response & 0x80)) {
shimniok 0:826c6171fc1b 277 _cs = 1;
shimniok 0:826c6171fc1b 278 _spi.write(0xFF);
shimniok 0:826c6171fc1b 279 return response;
shimniok 0:826c6171fc1b 280 }
shimniok 0:826c6171fc1b 281 }
shimniok 0:826c6171fc1b 282 _cs = 1;
shimniok 0:826c6171fc1b 283 _spi.write(0xFF);
shimniok 0:826c6171fc1b 284 return -1; // timeout
shimniok 0:826c6171fc1b 285 }
shimniok 0:826c6171fc1b 286 int SDFileSystem::_cmdx(int cmd, int arg) {
shimniok 0:826c6171fc1b 287 _cs = 0;
shimniok 0:826c6171fc1b 288
shimniok 0:826c6171fc1b 289 // send a command
shimniok 0:826c6171fc1b 290 _spi.write(0x40 | cmd);
shimniok 0:826c6171fc1b 291 _spi.write(arg >> 24);
shimniok 0:826c6171fc1b 292 _spi.write(arg >> 16);
shimniok 0:826c6171fc1b 293 _spi.write(arg >> 8);
shimniok 0:826c6171fc1b 294 _spi.write(arg >> 0);
shimniok 0:826c6171fc1b 295 _spi.write(0x95);
shimniok 0:826c6171fc1b 296
shimniok 0:826c6171fc1b 297 // wait for the repsonse (response[7] == 0)
shimniok 0:826c6171fc1b 298 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
shimniok 0:826c6171fc1b 299 int response = _spi.write(0xFF);
shimniok 0:826c6171fc1b 300 if(!(response & 0x80)) {
shimniok 0:826c6171fc1b 301 return response;
shimniok 0:826c6171fc1b 302 }
shimniok 0:826c6171fc1b 303 }
shimniok 0:826c6171fc1b 304 _cs = 1;
shimniok 0:826c6171fc1b 305 _spi.write(0xFF);
shimniok 0:826c6171fc1b 306 return -1; // timeout
shimniok 0:826c6171fc1b 307 }
shimniok 0:826c6171fc1b 308
shimniok 0:826c6171fc1b 309
shimniok 0:826c6171fc1b 310 int SDFileSystem::_cmd58() {
shimniok 0:826c6171fc1b 311 _cs = 0;
shimniok 0:826c6171fc1b 312 int arg = 0;
shimniok 0:826c6171fc1b 313
shimniok 0:826c6171fc1b 314 // send a command
shimniok 0:826c6171fc1b 315 _spi.write(0x40 | 58);
shimniok 0:826c6171fc1b 316 _spi.write(arg >> 24);
shimniok 0:826c6171fc1b 317 _spi.write(arg >> 16);
shimniok 0:826c6171fc1b 318 _spi.write(arg >> 8);
shimniok 0:826c6171fc1b 319 _spi.write(arg >> 0);
shimniok 0:826c6171fc1b 320 _spi.write(0x95);
shimniok 0:826c6171fc1b 321
shimniok 0:826c6171fc1b 322 // wait for the repsonse (response[7] == 0)
shimniok 0:826c6171fc1b 323 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
shimniok 0:826c6171fc1b 324 int response = _spi.write(0xFF);
shimniok 0:826c6171fc1b 325 if(!(response & 0x80)) {
shimniok 0:826c6171fc1b 326 int ocr = _spi.write(0xFF) << 24;
shimniok 0:826c6171fc1b 327 ocr |= _spi.write(0xFF) << 16;
shimniok 0:826c6171fc1b 328 ocr |= _spi.write(0xFF) << 8;
shimniok 0:826c6171fc1b 329 ocr |= _spi.write(0xFF) << 0;
shimniok 0:826c6171fc1b 330 // printf("OCR = 0x%08X\n", ocr);
shimniok 0:826c6171fc1b 331 _cs = 1;
shimniok 0:826c6171fc1b 332 _spi.write(0xFF);
shimniok 0:826c6171fc1b 333 return response;
shimniok 0:826c6171fc1b 334 }
shimniok 0:826c6171fc1b 335 }
shimniok 0:826c6171fc1b 336 _cs = 1;
shimniok 0:826c6171fc1b 337 _spi.write(0xFF);
shimniok 0:826c6171fc1b 338 return -1; // timeout
shimniok 0:826c6171fc1b 339 }
shimniok 0:826c6171fc1b 340
shimniok 0:826c6171fc1b 341 int SDFileSystem::_cmd8() {
shimniok 0:826c6171fc1b 342 _cs = 0;
shimniok 0:826c6171fc1b 343
shimniok 0:826c6171fc1b 344 // send a command
shimniok 0:826c6171fc1b 345 _spi.write(0x40 | 8); // CMD8
shimniok 0:826c6171fc1b 346 _spi.write(0x00); // reserved
shimniok 0:826c6171fc1b 347 _spi.write(0x00); // reserved
shimniok 0:826c6171fc1b 348 _spi.write(0x01); // 3.3v
shimniok 0:826c6171fc1b 349 _spi.write(0xAA); // check pattern
shimniok 0:826c6171fc1b 350 _spi.write(0x87); // crc
shimniok 0:826c6171fc1b 351
shimniok 0:826c6171fc1b 352 // wait for the repsonse (response[7] == 0)
shimniok 0:826c6171fc1b 353 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
shimniok 0:826c6171fc1b 354 char response[5];
shimniok 0:826c6171fc1b 355 response[0] = _spi.write(0xFF);
shimniok 0:826c6171fc1b 356 if(!(response[0] & 0x80)) {
shimniok 0:826c6171fc1b 357 for(int j=1; j<5; j++) {
shimniok 0:826c6171fc1b 358 response[i] = _spi.write(0xFF);
shimniok 0:826c6171fc1b 359 }
shimniok 0:826c6171fc1b 360 _cs = 1;
shimniok 0:826c6171fc1b 361 _spi.write(0xFF);
shimniok 0:826c6171fc1b 362 return response[0];
shimniok 0:826c6171fc1b 363 }
shimniok 0:826c6171fc1b 364 }
shimniok 0:826c6171fc1b 365 _cs = 1;
shimniok 0:826c6171fc1b 366 _spi.write(0xFF);
shimniok 0:826c6171fc1b 367 return -1; // timeout
shimniok 0:826c6171fc1b 368 }
shimniok 0:826c6171fc1b 369
shimniok 0:826c6171fc1b 370 int SDFileSystem::_read(unsigned char *buffer, int length) {
shimniok 0:826c6171fc1b 371 _cs = 0;
shimniok 0:826c6171fc1b 372
shimniok 0:826c6171fc1b 373 // read until start byte (0xFF)
shimniok 0:826c6171fc1b 374 while(_spi.write(0xFF) != 0xFE);
shimniok 0:826c6171fc1b 375
shimniok 0:826c6171fc1b 376 // read data
shimniok 0:826c6171fc1b 377 for(int i=0; i<length; i++) {
shimniok 0:826c6171fc1b 378 buffer[i] = _spi.write(0xFF);
shimniok 0:826c6171fc1b 379 }
shimniok 0:826c6171fc1b 380 _spi.write(0xFF); // checksum
shimniok 0:826c6171fc1b 381 _spi.write(0xFF);
shimniok 0:826c6171fc1b 382
shimniok 0:826c6171fc1b 383 _cs = 1;
shimniok 0:826c6171fc1b 384 _spi.write(0xFF);
shimniok 0:826c6171fc1b 385 return 0;
shimniok 0:826c6171fc1b 386 }
shimniok 0:826c6171fc1b 387
shimniok 0:826c6171fc1b 388 int SDFileSystem::_write(const unsigned char *buffer, int length) {
shimniok 0:826c6171fc1b 389 _cs = 0;
shimniok 0:826c6171fc1b 390
shimniok 0:826c6171fc1b 391 // indicate start of block
shimniok 0:826c6171fc1b 392 _spi.write(0xFE);
shimniok 0:826c6171fc1b 393
shimniok 0:826c6171fc1b 394 // write the data
shimniok 0:826c6171fc1b 395 for(int i=0; i<length; i++) {
shimniok 0:826c6171fc1b 396 _spi.write(buffer[i]);
shimniok 0:826c6171fc1b 397 }
shimniok 0:826c6171fc1b 398
shimniok 0:826c6171fc1b 399 // write the checksum
shimniok 0:826c6171fc1b 400 _spi.write(0xFF);
shimniok 0:826c6171fc1b 401 _spi.write(0xFF);
shimniok 0:826c6171fc1b 402
shimniok 0:826c6171fc1b 403 // check the repsonse token
shimniok 0:826c6171fc1b 404 if((_spi.write(0xFF) & 0x1F) != 0x05) {
shimniok 0:826c6171fc1b 405 _cs = 1;
shimniok 0:826c6171fc1b 406 _spi.write(0xFF);
shimniok 0:826c6171fc1b 407 return 1;
shimniok 0:826c6171fc1b 408 }
shimniok 0:826c6171fc1b 409
shimniok 0:826c6171fc1b 410 // wait for write to finish
shimniok 0:826c6171fc1b 411 while(_spi.write(0xFF) == 0);
shimniok 0:826c6171fc1b 412
shimniok 0:826c6171fc1b 413 _cs = 1;
shimniok 0:826c6171fc1b 414 _spi.write(0xFF);
shimniok 0:826c6171fc1b 415 return 0;
shimniok 0:826c6171fc1b 416 }
shimniok 0:826c6171fc1b 417
shimniok 0:826c6171fc1b 418 static int ext_bits(unsigned char *data, int msb, int lsb) {
shimniok 0:826c6171fc1b 419 int bits = 0;
shimniok 0:826c6171fc1b 420 int size = 1 + msb - lsb;
shimniok 0:826c6171fc1b 421 for(int i=0; i<size; i++) {
shimniok 0:826c6171fc1b 422 int position = lsb + i;
shimniok 0:826c6171fc1b 423 int byte = 15 - (position >> 3);
shimniok 0:826c6171fc1b 424 int bit = position & 0x7;
shimniok 0:826c6171fc1b 425 int value = (data[byte] >> bit) & 1;
shimniok 0:826c6171fc1b 426 bits |= value << i;
shimniok 0:826c6171fc1b 427 }
shimniok 0:826c6171fc1b 428 return bits;
shimniok 0:826c6171fc1b 429 }
shimniok 0:826c6171fc1b 430
shimniok 0:826c6171fc1b 431 unsigned long SDFileSystem::_sd_sectors() {
shimniok 0:826c6171fc1b 432
shimniok 0:826c6171fc1b 433 int c_size, c_size_mult, read_bl_len;
shimniok 0:826c6171fc1b 434 int block_len, mult, blocknr, capacity;
shimniok 0:826c6171fc1b 435 int blocks, hc_c_size;
shimniok 0:826c6171fc1b 436 uint64_t hc_capacity;
shimniok 0:826c6171fc1b 437
shimniok 0:826c6171fc1b 438 // CMD9, Response R2 (R1 byte + 16-byte block read)
shimniok 0:826c6171fc1b 439 if(_cmdx(9, 0) != 0) {
shimniok 0:826c6171fc1b 440 fprintf(stderr, "Didn't get a response from the disk\n");
shimniok 0:826c6171fc1b 441 return 0;
shimniok 0:826c6171fc1b 442 }
shimniok 0:826c6171fc1b 443
shimniok 0:826c6171fc1b 444 unsigned char csd[16];
shimniok 0:826c6171fc1b 445 if(_read(csd, 16) != 0) {
shimniok 0:826c6171fc1b 446 fprintf(stderr, "Couldn't read csd response from disk\n");
shimniok 0:826c6171fc1b 447 return 0;
shimniok 0:826c6171fc1b 448 }
shimniok 0:826c6171fc1b 449
shimniok 0:826c6171fc1b 450 // csd_structure : csd[127:126]
shimniok 0:826c6171fc1b 451 // c_size : csd[73:62]
shimniok 0:826c6171fc1b 452 // c_size_mult : csd[49:47]
shimniok 0:826c6171fc1b 453 // read_bl_len : csd[83:80] - the *maximum* read block length
shimniok 0:826c6171fc1b 454
shimniok 0:826c6171fc1b 455 int csd_structure = ext_bits(csd, 127, 126);
shimniok 0:826c6171fc1b 456
shimniok 0:826c6171fc1b 457 #ifdef DEBUG
shimniok 0:826c6171fc1b 458 printf("\n\rCSD_STRUCT = %d\n", csd_structure);
shimniok 0:826c6171fc1b 459 #endif
shimniok 0:826c6171fc1b 460 //int hc_read_bl_len;
shimniok 0:826c6171fc1b 461
shimniok 0:826c6171fc1b 462 switch (csd_structure) {
shimniok 0:826c6171fc1b 463 case 0:
shimniok 0:826c6171fc1b 464 cdv = 512;
shimniok 0:826c6171fc1b 465 c_size = ext_bits(csd, 73, 62);
shimniok 0:826c6171fc1b 466 c_size_mult = ext_bits(csd, 49, 47);
shimniok 0:826c6171fc1b 467 read_bl_len = ext_bits(csd, 83, 80);
shimniok 0:826c6171fc1b 468
shimniok 0:826c6171fc1b 469 block_len = 1 << read_bl_len;
shimniok 0:826c6171fc1b 470 mult = 1 << (c_size_mult + 2);
shimniok 0:826c6171fc1b 471 blocknr = (c_size + 1) * mult;
shimniok 0:826c6171fc1b 472 capacity = blocknr * block_len;
shimniok 0:826c6171fc1b 473 blocks = capacity / 512;
shimniok 0:826c6171fc1b 474 #ifdef DEBUG
shimniok 0:826c6171fc1b 475 printf("\n\rSDCard\n\rc_size: %.4X \n\rcapacity: %.ld \n\rsectors: %d\n\r", c_size, capacity, blocks);
shimniok 0:826c6171fc1b 476 #endif
shimniok 0:826c6171fc1b 477 break;
shimniok 0:826c6171fc1b 478
shimniok 0:826c6171fc1b 479 case 1:
shimniok 0:826c6171fc1b 480 cdv = 1;
shimniok 0:826c6171fc1b 481 hc_c_size = ext_bits(csd, 63, 48);
shimniok 0:826c6171fc1b 482 //hc_read_bl_len = ext_bits(csd, 83, 80);
shimniok 0:826c6171fc1b 483 hc_capacity = hc_c_size+1;
shimniok 0:826c6171fc1b 484 blocks = (hc_c_size+1)*1024;
shimniok 0:826c6171fc1b 485 #ifdef DEBUG
shimniok 0:826c6171fc1b 486 printf("\n\rSDHC Card \n\rhc_c_size: %.4X \n\rcapacity: %.lld \n\rsectors: %d\n\r", hc_c_size, hc_capacity*512*1024, blocks);
shimniok 0:826c6171fc1b 487 #endif
shimniok 0:826c6171fc1b 488 break;
shimniok 0:826c6171fc1b 489
shimniok 0:826c6171fc1b 490 default:
shimniok 0:826c6171fc1b 491 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
shimniok 0:826c6171fc1b 492 return 0;
shimniok 0:826c6171fc1b 493 };
shimniok 0:826c6171fc1b 494 return blocks;
shimniok 0:826c6171fc1b 495 }