Alexandre Salconi-Denis / LSM303DLH

My attempt to made a more useful lib. You can get the accelerator and magnetometer.

Fork of LSM303DLH by Michael Shimniok

LSM303DLH_RegisterDef.h@6:86cf2afe3e52, 2017-08-06 (annotated)

Committer:
salco
Date:
Sun Aug 06 22:23:24 2017 +0000
Revision:
6:86cf2afe3e52
Parent:
5:48722ae56546
Child:
7:275a0a69cff5
Cleanup done;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
salco 5:48722ae56546 1 #ifndef __LSM303DLH_REGISTERDEF_H_
salco 5:48722ae56546 2 #define __LSM303DLH_REGISTERDEF_H_
salco 5:48722ae56546 3
salco 5:48722ae56546 4 /** @defgroup regA Register
salco 6:86cf2afe3e52 5 * Register for accelerometer
salco 6:86cf2afe3e52 6 * @{
salco 6:86cf2afe3e52 7 */
salco 6:86cf2afe3e52 8
salco 6:86cf2afe3e52 9 //#if defined(DOXYGEN_ONLY)
salco 6:86cf2afe3e52 10
salco 6:86cf2afe3e52 11 /**@note add LSM303DLH:: to use the docc doxygen for no reason*/
salco 6:86cf2afe3e52 12
salco 6:86cf2afe3e52 13 /** CTRL_REG1_A structure definition
salco 6:86cf2afe3e52 14 */
salco 6:86cf2afe3e52 15 union Ctrl_Reg1_A_t
salco 6:86cf2afe3e52 16 {
salco 6:86cf2afe3e52 17 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 18 struct{
salco 6:86cf2afe3e52 19 uint8_t Xen:1; /**< X axis enable. Default value: 1.*/
salco 6:86cf2afe3e52 20 uint8_t Yen:1; /**< Y axis enable. Default value: 1.*/
salco 6:86cf2afe3e52 21 uint8_t Zen:1; /**< Z axis enable. Default value: 1.*/
salco 6:86cf2afe3e52 22 uint8_t LPen:1;/**< Low-power mode enable. Default value: 0.*/
salco 6:86cf2afe3e52 23 uint8_t ODR:4; /**< Data rate selection. Default value: 0.*/
salco 6:86cf2afe3e52 24 };
salco 6:86cf2afe3e52 25 };
salco 6:86cf2afe3e52 26
salco 6:86cf2afe3e52 27 /** CTRL_REG2_A structure definition
salco 6:86cf2afe3e52 28 */
salco 6:86cf2afe3e52 29 union Ctrl_Reg2_A_t
salco 6:86cf2afe3e52 30 {
salco 6:86cf2afe3e52 31 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 32 struct{
salco 6:86cf2afe3e52 33 uint8_t HPIS1:1; /**< High pass filter enabled for AOI function on Interrupt 1.*/
salco 6:86cf2afe3e52 34 uint8_t HPIS2:1; /**< High pass filter enabled for AOI function on Interrupt 2.*/
salco 6:86cf2afe3e52 35 uint8_t HPCLICK:1; /**< High pass filter enabled for CLICK function.*/
salco 6:86cf2afe3e52 36 uint8_t FDS:1; /**< Filtered data selection. Default value: 0.*/
salco 6:86cf2afe3e52 37 uint8_t HPCF:2; /**< High pass filter cut-off frequency selection.*/
salco 6:86cf2afe3e52 38 uint8_t HPM:2; /**< High pass filter mode selection. Default value: 00*/
salco 6:86cf2afe3e52 39 };
salco 6:86cf2afe3e52 40 };
salco 6:86cf2afe3e52 41
salco 6:86cf2afe3e52 42 /** CTRL_REG3_A structure definition
salco 6:86cf2afe3e52 43 */
salco 6:86cf2afe3e52 44 union Ctrl_Reg3_A_t
salco 6:86cf2afe3e52 45 {
salco 6:86cf2afe3e52 46 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 47 struct{
salco 6:86cf2afe3e52 48 uint8_t _Reserved:1; /**< Do not use.*/
salco 6:86cf2afe3e52 49 uint8_t I1_OVERRUN:1; /**< FIFO overrun interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 50 uint8_t I1_WTM:1; /**< FIFO watermark interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 51 uint8_t I1_DRDY2:1; /**< DRDY2 interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 52 uint8_t I1_DRDY1:1; /**< DRDY1 interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 53 uint8_t I1_AOI2:1; /**< AOI2 interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 54 uint8_t I1_AOI1:1; /**< AOI1 interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 55 uint8_t I1_CLICK:1; /**< CLICK interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 56 };
salco 6:86cf2afe3e52 57 };
salco 6:86cf2afe3e52 58
salco 6:86cf2afe3e52 59 /** CTRL_REG4_A structure definition
salco 6:86cf2afe3e52 60 */
salco 6:86cf2afe3e52 61 union Ctrl_Reg4_A_t
salco 6:86cf2afe3e52 62 {
salco 6:86cf2afe3e52 63 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 64 struct{
salco 6:86cf2afe3e52 65 uint8_t SIM:1; /**< SPI serial interface mode selection. Default value: 0.*/
salco 6:86cf2afe3e52 66 uint8_t _Reserved:2; /**< Do not use.*/
salco 6:86cf2afe3e52 67 uint8_t HR:1; /**< High resolution output mode: Default value: 0.*/
salco 6:86cf2afe3e52 68 uint8_t FS:2; /**< Full-scale selection. Default value: 00.*/
salco 6:86cf2afe3e52 69 uint8_t BLE:1; /**< Big/little endian data selection. Default value 0.*/
salco 6:86cf2afe3e52 70 uint8_t BDU:1; /**< Block data update. Default value: 0.*/
salco 6:86cf2afe3e52 71 };
salco 6:86cf2afe3e52 72 };
salco 6:86cf2afe3e52 73
salco 6:86cf2afe3e52 74 /** CTRL_REG5_A structure definition
salco 6:86cf2afe3e52 75 */
salco 6:86cf2afe3e52 76 union Ctrl_Reg5_A_t
salco 6:86cf2afe3e52 77 {
salco 6:86cf2afe3e52 78 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 79 struct{
salco 6:86cf2afe3e52 80 uint8_t D4D_INT2:1; /**< 4D detection is enabled on INT2 when 6D bit on INT2_CFG is set to 1.*/
salco 6:86cf2afe3e52 81 uint8_t LIR_INT2:1; /**< Latch interrupt request on INT2_SRC register, with INT2_SRC register
salco 6:86cf2afe3e52 82 cleared by reading INT2_SRC itself. Default value: 0.*/
salco 6:86cf2afe3e52 83 uint8_t D4D_INT1:1; /**< 4D detection is enabled on INT1 when 6D bit on INT1_CFG is set to 1.*/
salco 6:86cf2afe3e52 84 uint8_t LIR_INT1:1; /**< Latch interrupt request on INT1_SRC register, with INT1_SRC register
salco 6:86cf2afe3e52 85 cleared by reading INT1_SRC itself. Default value: 0.*/
salco 6:86cf2afe3e52 86 uint8_t _Reserved:2; /**< Do not use.*/
salco 6:86cf2afe3e52 87 uint8_t FIFO_EN:1; /**< FIFO enable. Default value: 0.*/
salco 6:86cf2afe3e52 88 uint8_t BOOT:1; /**< Reboot memory content. Default value: 0.*/
salco 6:86cf2afe3e52 89 };
salco 6:86cf2afe3e52 90 };
salco 6:86cf2afe3e52 91
salco 6:86cf2afe3e52 92
salco 6:86cf2afe3e52 93
salco 6:86cf2afe3e52 94 /** CTRL_REG6_A structure definition
salco 6:86cf2afe3e52 95 */
salco 6:86cf2afe3e52 96 union Ctrl_Reg6_A_t
salco 6:86cf2afe3e52 97 {
salco 6:86cf2afe3e52 98 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 99 struct{
salco 6:86cf2afe3e52 100 uint8_t _Reserved:1; /**< Do not use.*/
salco 6:86cf2afe3e52 101 uint8_t H_LACTIVE:1; /**< Interrupt active high, low. Default value 0.*/
salco 6:86cf2afe3e52 102 uint8_t __Reserved:1; /**< Do not use.*/
salco 6:86cf2afe3e52 103 uint8_t P2_ACT:1; /**< Active function status on PAD2. Default value 0.*/
salco 6:86cf2afe3e52 104 uint8_t BOOT_I1:1; /**< Reboot memory content on PAD2. Default value: 0.*/
salco 6:86cf2afe3e52 105 uint8_t I2_INT2:1; /**< Interrupt 2 on PAD2. Default value 0.*/
salco 6:86cf2afe3e52 106 uint8_t I2_INT1:1; /**< Interrupt 1 on PAD2. Default value 0.*/
salco 6:86cf2afe3e52 107 uint8_t I2_CLICKen:1; /**< CLICK interrupt on PAD2. Default value 0.*/
salco 6:86cf2afe3e52 108 };
salco 6:86cf2afe3e52 109 };
salco 6:86cf2afe3e52 110
salco 6:86cf2afe3e52 111 /** Status_Reg_A structure definition
salco 6:86cf2afe3e52 112 */
salco 6:86cf2afe3e52 113 union Status_Reg_A_t
salco 6:86cf2afe3e52 114 {
salco 6:86cf2afe3e52 115 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 116 struct{
salco 5:48722ae56546 117
salco 6:86cf2afe3e52 118 uint8_t XDA:1; /**< X axis new data available. Default value: 0.*/
salco 6:86cf2afe3e52 119 uint8_t YDA:1; /**< Y axis new data available. Default value: 0.*/
salco 6:86cf2afe3e52 120 uint8_t ZDA:1; /**< Z axis new data available. Default value: 0.*/
salco 6:86cf2afe3e52 121 uint8_t ZYXDA:1; /**< X, Y, and Z axis new data available. Default value: 0.*/
salco 6:86cf2afe3e52 122 uint8_t XOR:1; /**< X axis data overrun. Default value: 0.*/
salco 6:86cf2afe3e52 123 uint8_t YOR:1; /**< Y axis data overrun. Default value: 0.*/
salco 6:86cf2afe3e52 124 uint8_t ZOR:1; /**< Z axis data overrun. Default value: 0.*/
salco 6:86cf2afe3e52 125 uint8_t ZYXOR:1; /**< X, Y, and Z axis data overrun. Default value: 0.*/
salco 6:86cf2afe3e52 126 };
salco 6:86cf2afe3e52 127 };
salco 6:86cf2afe3e52 128
salco 6:86cf2afe3e52 129 /** OUT_XYZ structure. The value is expressed in 2’s complement
salco 6:86cf2afe3e52 130 */
salco 6:86cf2afe3e52 131 union OUT_XYZ_t
salco 6:86cf2afe3e52 132 {
salco 6:86cf2afe3e52 133 int16_t value; /**< Value in signed integer.*/
salco 6:86cf2afe3e52 134 uint8_t byte[2];
salco 6:86cf2afe3e52 135 struct{
salco 6:86cf2afe3e52 136 uint8_t UT_L_A; /**< Low register.*/
salco 6:86cf2afe3e52 137 uint8_t UT_H_A; /**< High register.*/
salco 6:86cf2afe3e52 138 };
salco 6:86cf2afe3e52 139 };
salco 6:86cf2afe3e52 140 /** @} */ // end of regA
salco 5:48722ae56546 141
salco 6:86cf2afe3e52 142 /** @defgroup regM Register
salco 6:86cf2afe3e52 143 * Register for magnetometer
salco 6:86cf2afe3e52 144 * @{
salco 6:86cf2afe3e52 145 */
salco 6:86cf2afe3e52 146
salco 6:86cf2afe3e52 147 /** SR_Reg_M structure definition
salco 6:86cf2afe3e52 148 */
salco 6:86cf2afe3e52 149 union SR_Reg_M_t
salco 6:86cf2afe3e52 150 {
salco 6:86cf2afe3e52 151 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 152 struct{
salco 6:86cf2afe3e52 153 uint8_t DRDY:1; /**< Data output register lock.*/
salco 6:86cf2afe3e52 154 uint8_t LOCK:1; /**< Data ready bit.*/
salco 6:86cf2afe3e52 155 uint8_t _Reserved:8; /**< Do not use.*/
salco 6:86cf2afe3e52 156 };
salco 6:86cf2afe3e52 157 };
salco 5:48722ae56546 158
salco 6:86cf2afe3e52 159 /** CRA_REG_M structure definition
salco 6:86cf2afe3e52 160 */
salco 6:86cf2afe3e52 161 union CRA_REG_M_t
salco 6:86cf2afe3e52 162 {
salco 6:86cf2afe3e52 163 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 164 struct{
salco 6:86cf2afe3e52 165 uint8_t _Reserved:2; /**< Do not use. Must be set to 0*/
salco 6:86cf2afe3e52 166 uint8_t DO:3; /**< Data output rate bits.*/
salco 6:86cf2afe3e52 167 uint8_t __Reserved:2; /**< Do not use. Must be set to 0*/
salco 6:86cf2afe3e52 168 uint8_t TEMP_EN:1; /**< Temperature sensor enable.*/
salco 6:86cf2afe3e52 169 };
salco 6:86cf2afe3e52 170 };
salco 6:86cf2afe3e52 171
salco 6:86cf2afe3e52 172 /** CRB_REG_M structure definition
salco 6:86cf2afe3e52 173 */
salco 6:86cf2afe3e52 174 union CRB_REG_M_t
salco 6:86cf2afe3e52 175 {
salco 6:86cf2afe3e52 176 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 177 struct{
salco 6:86cf2afe3e52 178 uint8_t _Reserved:5; /**< Do not use. Must be set to ‘0*/
salco 6:86cf2afe3e52 179 uint8_t GN:3; /**< Gain configuration.*/
salco 6:86cf2afe3e52 180 };
salco 6:86cf2afe3e52 181 };
salco 6:86cf2afe3e52 182
salco 6:86cf2afe3e52 183 /** MR_REG_M structure definition
salco 6:86cf2afe3e52 184 */
salco 6:86cf2afe3e52 185 union MR_REG_M_t
salco 6:86cf2afe3e52 186 {
salco 6:86cf2afe3e52 187 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 188 struct{
salco 6:86cf2afe3e52 189 uint8_t MD:2; /**< Mode select bits. These bits select the operation mode of this device.*/
salco 6:86cf2afe3e52 190 uint8_t _Reserved:6; /**< Do not use. Must be set to 0*/
salco 6:86cf2afe3e52 191
salco 6:86cf2afe3e52 192 };
salco 6:86cf2afe3e52 193 };
salco 6:86cf2afe3e52 194 /** @} */ // end of regM
salco 5:48722ae56546 195
salco 5:48722ae56546 196 #endif //__LSM303DLH_REGISTERDEF_H_