Alexandre Salconi-Denis / LSM303DLH

My attempt to made a more useful lib. You can get the accelerator and magnetometer.

Fork of LSM303DLH by Michael Shimniok

LSM303DLH_RegisterDef.h@7:275a0a69cff5, 2017-08-06 (annotated)

Committer:
salco
Date:
Sun Aug 06 23:42:07 2017 +0000
Revision:
7:275a0a69cff5
Parent:
6:86cf2afe3e52 
Finished the correction

Who changed what in which revision?

UserRevisionLine numberNew contents of line
salco 7:275a0a69cff5 1 /*
salco 7:275a0a69cff5 2 *
salco 7:275a0a69cff5 3 * This file is subject to the terms and conditions of the GNU Lesser
salco 7:275a0a69cff5 4 * General Public License v2.1. See the file LICENSE in the top level
salco 7:275a0a69cff5 5 * directory for more details.
salco 7:275a0a69cff5 6 */
salco 7:275a0a69cff5 7
salco 5:48722ae56546 8 #ifndef __LSM303DLH_REGISTERDEF_H_
salco 5:48722ae56546 9 #define __LSM303DLH_REGISTERDEF_H_
salco 5:48722ae56546 10
salco 7:275a0a69cff5 11 /** @defgroup LSM303_Register
salco 7:275a0a69cff5 12 * @author Salco <JeSuisSalco@gmail.com>
salco 7:275a0a69cff5 13 */
salco 7:275a0a69cff5 14
salco 7:275a0a69cff5 15 /** @defgroup regA
salco 7:275a0a69cff5 16 * Register for accelerometer
salco 7:275a0a69cff5 17 * @ingroup LSM303_Register
salco 7:275a0a69cff5 18 * @{
salco 7:275a0a69cff5 19 */
salco 6:86cf2afe3e52 20
salco 6:86cf2afe3e52 21 //#if defined(DOXYGEN_ONLY)
salco 6:86cf2afe3e52 22
salco 6:86cf2afe3e52 23 /**@note add LSM303DLH:: to use the docc doxygen for no reason*/
salco 6:86cf2afe3e52 24
salco 6:86cf2afe3e52 25 /** CTRL_REG1_A structure definition
salco 6:86cf2afe3e52 26 */
salco 6:86cf2afe3e52 27 union Ctrl_Reg1_A_t
salco 6:86cf2afe3e52 28 {
salco 6:86cf2afe3e52 29 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 30 struct{
salco 6:86cf2afe3e52 31 uint8_t Xen:1; /**< X axis enable. Default value: 1.*/
salco 6:86cf2afe3e52 32 uint8_t Yen:1; /**< Y axis enable. Default value: 1.*/
salco 6:86cf2afe3e52 33 uint8_t Zen:1; /**< Z axis enable. Default value: 1.*/
salco 6:86cf2afe3e52 34 uint8_t LPen:1;/**< Low-power mode enable. Default value: 0.*/
salco 6:86cf2afe3e52 35 uint8_t ODR:4; /**< Data rate selection. Default value: 0.*/
salco 6:86cf2afe3e52 36 };
salco 6:86cf2afe3e52 37 };
salco 6:86cf2afe3e52 38
salco 6:86cf2afe3e52 39 /** CTRL_REG2_A structure definition
salco 6:86cf2afe3e52 40 */
salco 6:86cf2afe3e52 41 union Ctrl_Reg2_A_t
salco 6:86cf2afe3e52 42 {
salco 6:86cf2afe3e52 43 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 44 struct{
salco 6:86cf2afe3e52 45 uint8_t HPIS1:1; /**< High pass filter enabled for AOI function on Interrupt 1.*/
salco 6:86cf2afe3e52 46 uint8_t HPIS2:1; /**< High pass filter enabled for AOI function on Interrupt 2.*/
salco 6:86cf2afe3e52 47 uint8_t HPCLICK:1; /**< High pass filter enabled for CLICK function.*/
salco 6:86cf2afe3e52 48 uint8_t FDS:1; /**< Filtered data selection. Default value: 0.*/
salco 6:86cf2afe3e52 49 uint8_t HPCF:2; /**< High pass filter cut-off frequency selection.*/
salco 6:86cf2afe3e52 50 uint8_t HPM:2; /**< High pass filter mode selection. Default value: 00*/
salco 6:86cf2afe3e52 51 };
salco 6:86cf2afe3e52 52 };
salco 6:86cf2afe3e52 53
salco 6:86cf2afe3e52 54 /** CTRL_REG3_A structure definition
salco 6:86cf2afe3e52 55 */
salco 6:86cf2afe3e52 56 union Ctrl_Reg3_A_t
salco 6:86cf2afe3e52 57 {
salco 6:86cf2afe3e52 58 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 59 struct{
salco 6:86cf2afe3e52 60 uint8_t _Reserved:1; /**< Do not use.*/
salco 6:86cf2afe3e52 61 uint8_t I1_OVERRUN:1; /**< FIFO overrun interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 62 uint8_t I1_WTM:1; /**< FIFO watermark interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 63 uint8_t I1_DRDY2:1; /**< DRDY2 interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 64 uint8_t I1_DRDY1:1; /**< DRDY1 interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 65 uint8_t I1_AOI2:1; /**< AOI2 interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 66 uint8_t I1_AOI1:1; /**< AOI1 interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 67 uint8_t I1_CLICK:1; /**< CLICK interrupt on INT1. Default value 0.*/
salco 6:86cf2afe3e52 68 };
salco 6:86cf2afe3e52 69 };
salco 6:86cf2afe3e52 70
salco 6:86cf2afe3e52 71 /** CTRL_REG4_A structure definition
salco 6:86cf2afe3e52 72 */
salco 6:86cf2afe3e52 73 union Ctrl_Reg4_A_t
salco 6:86cf2afe3e52 74 {
salco 6:86cf2afe3e52 75 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 76 struct{
salco 6:86cf2afe3e52 77 uint8_t SIM:1; /**< SPI serial interface mode selection. Default value: 0.*/
salco 6:86cf2afe3e52 78 uint8_t _Reserved:2; /**< Do not use.*/
salco 6:86cf2afe3e52 79 uint8_t HR:1; /**< High resolution output mode: Default value: 0.*/
salco 6:86cf2afe3e52 80 uint8_t FS:2; /**< Full-scale selection. Default value: 00.*/
salco 6:86cf2afe3e52 81 uint8_t BLE:1; /**< Big/little endian data selection. Default value 0.*/
salco 6:86cf2afe3e52 82 uint8_t BDU:1; /**< Block data update. Default value: 0.*/
salco 6:86cf2afe3e52 83 };
salco 6:86cf2afe3e52 84 };
salco 6:86cf2afe3e52 85
salco 6:86cf2afe3e52 86 /** CTRL_REG5_A structure definition
salco 6:86cf2afe3e52 87 */
salco 6:86cf2afe3e52 88 union Ctrl_Reg5_A_t
salco 6:86cf2afe3e52 89 {
salco 6:86cf2afe3e52 90 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 91 struct{
salco 6:86cf2afe3e52 92 uint8_t D4D_INT2:1; /**< 4D detection is enabled on INT2 when 6D bit on INT2_CFG is set to 1.*/
salco 6:86cf2afe3e52 93 uint8_t LIR_INT2:1; /**< Latch interrupt request on INT2_SRC register, with INT2_SRC register
salco 6:86cf2afe3e52 94 cleared by reading INT2_SRC itself. Default value: 0.*/
salco 6:86cf2afe3e52 95 uint8_t D4D_INT1:1; /**< 4D detection is enabled on INT1 when 6D bit on INT1_CFG is set to 1.*/
salco 6:86cf2afe3e52 96 uint8_t LIR_INT1:1; /**< Latch interrupt request on INT1_SRC register, with INT1_SRC register
salco 6:86cf2afe3e52 97 cleared by reading INT1_SRC itself. Default value: 0.*/
salco 6:86cf2afe3e52 98 uint8_t _Reserved:2; /**< Do not use.*/
salco 6:86cf2afe3e52 99 uint8_t FIFO_EN:1; /**< FIFO enable. Default value: 0.*/
salco 6:86cf2afe3e52 100 uint8_t BOOT:1; /**< Reboot memory content. Default value: 0.*/
salco 6:86cf2afe3e52 101 };
salco 6:86cf2afe3e52 102 };
salco 6:86cf2afe3e52 103
salco 6:86cf2afe3e52 104
salco 6:86cf2afe3e52 105
salco 6:86cf2afe3e52 106 /** CTRL_REG6_A structure definition
salco 6:86cf2afe3e52 107 */
salco 6:86cf2afe3e52 108 union Ctrl_Reg6_A_t
salco 6:86cf2afe3e52 109 {
salco 6:86cf2afe3e52 110 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 111 struct{
salco 6:86cf2afe3e52 112 uint8_t _Reserved:1; /**< Do not use.*/
salco 6:86cf2afe3e52 113 uint8_t H_LACTIVE:1; /**< Interrupt active high, low. Default value 0.*/
salco 6:86cf2afe3e52 114 uint8_t __Reserved:1; /**< Do not use.*/
salco 6:86cf2afe3e52 115 uint8_t P2_ACT:1; /**< Active function status on PAD2. Default value 0.*/
salco 6:86cf2afe3e52 116 uint8_t BOOT_I1:1; /**< Reboot memory content on PAD2. Default value: 0.*/
salco 6:86cf2afe3e52 117 uint8_t I2_INT2:1; /**< Interrupt 2 on PAD2. Default value 0.*/
salco 6:86cf2afe3e52 118 uint8_t I2_INT1:1; /**< Interrupt 1 on PAD2. Default value 0.*/
salco 6:86cf2afe3e52 119 uint8_t I2_CLICKen:1; /**< CLICK interrupt on PAD2. Default value 0.*/
salco 6:86cf2afe3e52 120 };
salco 6:86cf2afe3e52 121 };
salco 6:86cf2afe3e52 122
salco 6:86cf2afe3e52 123 /** Status_Reg_A structure definition
salco 6:86cf2afe3e52 124 */
salco 6:86cf2afe3e52 125 union Status_Reg_A_t
salco 6:86cf2afe3e52 126 {
salco 6:86cf2afe3e52 127 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 128 struct{
salco 5:48722ae56546 129
salco 6:86cf2afe3e52 130 uint8_t XDA:1; /**< X axis new data available. Default value: 0.*/
salco 6:86cf2afe3e52 131 uint8_t YDA:1; /**< Y axis new data available. Default value: 0.*/
salco 6:86cf2afe3e52 132 uint8_t ZDA:1; /**< Z axis new data available. Default value: 0.*/
salco 6:86cf2afe3e52 133 uint8_t ZYXDA:1; /**< X, Y, and Z axis new data available. Default value: 0.*/
salco 6:86cf2afe3e52 134 uint8_t XOR:1; /**< X axis data overrun. Default value: 0.*/
salco 6:86cf2afe3e52 135 uint8_t YOR:1; /**< Y axis data overrun. Default value: 0.*/
salco 6:86cf2afe3e52 136 uint8_t ZOR:1; /**< Z axis data overrun. Default value: 0.*/
salco 6:86cf2afe3e52 137 uint8_t ZYXOR:1; /**< X, Y, and Z axis data overrun. Default value: 0.*/
salco 6:86cf2afe3e52 138 };
salco 6:86cf2afe3e52 139 };
salco 6:86cf2afe3e52 140
salco 6:86cf2afe3e52 141 /** OUT_XYZ structure. The value is expressed in 2’s complement
salco 6:86cf2afe3e52 142 */
salco 6:86cf2afe3e52 143 union OUT_XYZ_t
salco 6:86cf2afe3e52 144 {
salco 6:86cf2afe3e52 145 int16_t value; /**< Value in signed integer.*/
salco 6:86cf2afe3e52 146 uint8_t byte[2];
salco 6:86cf2afe3e52 147 struct{
salco 6:86cf2afe3e52 148 uint8_t UT_L_A; /**< Low register.*/
salco 6:86cf2afe3e52 149 uint8_t UT_H_A; /**< High register.*/
salco 6:86cf2afe3e52 150 };
salco 6:86cf2afe3e52 151 };
salco 6:86cf2afe3e52 152 /** @} */ // end of regA
salco 5:48722ae56546 153
salco 7:275a0a69cff5 154 /** @defgroup regM
salco 7:275a0a69cff5 155 * Register for magnetometer
salco 7:275a0a69cff5 156 * @ingroup LSM303_Register
salco 7:275a0a69cff5 157 * @{
salco 7:275a0a69cff5 158 */
salco 6:86cf2afe3e52 159
salco 6:86cf2afe3e52 160 /** SR_Reg_M structure definition
salco 6:86cf2afe3e52 161 */
salco 6:86cf2afe3e52 162 union SR_Reg_M_t
salco 6:86cf2afe3e52 163 {
salco 6:86cf2afe3e52 164 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 165 struct{
salco 6:86cf2afe3e52 166 uint8_t DRDY:1; /**< Data output register lock.*/
salco 6:86cf2afe3e52 167 uint8_t LOCK:1; /**< Data ready bit.*/
salco 6:86cf2afe3e52 168 uint8_t _Reserved:8; /**< Do not use.*/
salco 6:86cf2afe3e52 169 };
salco 6:86cf2afe3e52 170 };
salco 5:48722ae56546 171
salco 6:86cf2afe3e52 172 /** CRA_REG_M structure definition
salco 6:86cf2afe3e52 173 */
salco 6:86cf2afe3e52 174 union CRA_REG_M_t
salco 6:86cf2afe3e52 175 {
salco 6:86cf2afe3e52 176 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 177 struct{
salco 6:86cf2afe3e52 178 uint8_t _Reserved:2; /**< Do not use. Must be set to 0*/
salco 6:86cf2afe3e52 179 uint8_t DO:3; /**< Data output rate bits.*/
salco 6:86cf2afe3e52 180 uint8_t __Reserved:2; /**< Do not use. Must be set to 0*/
salco 6:86cf2afe3e52 181 uint8_t TEMP_EN:1; /**< Temperature sensor enable.*/
salco 6:86cf2afe3e52 182 };
salco 6:86cf2afe3e52 183 };
salco 6:86cf2afe3e52 184
salco 6:86cf2afe3e52 185 /** CRB_REG_M structure definition
salco 6:86cf2afe3e52 186 */
salco 6:86cf2afe3e52 187 union CRB_REG_M_t
salco 6:86cf2afe3e52 188 {
salco 6:86cf2afe3e52 189 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 190 struct{
salco 6:86cf2afe3e52 191 uint8_t _Reserved:5; /**< Do not use. Must be set to ‘0*/
salco 6:86cf2afe3e52 192 uint8_t GN:3; /**< Gain configuration.*/
salco 6:86cf2afe3e52 193 };
salco 6:86cf2afe3e52 194 };
salco 6:86cf2afe3e52 195
salco 6:86cf2afe3e52 196 /** MR_REG_M structure definition
salco 6:86cf2afe3e52 197 */
salco 6:86cf2afe3e52 198 union MR_REG_M_t
salco 6:86cf2afe3e52 199 {
salco 6:86cf2afe3e52 200 uint8_t byte; /**< Value in byte.*/
salco 6:86cf2afe3e52 201 struct{
salco 6:86cf2afe3e52 202 uint8_t MD:2; /**< Mode select bits. These bits select the operation mode of this device.*/
salco 6:86cf2afe3e52 203 uint8_t _Reserved:6; /**< Do not use. Must be set to 0*/
salco 6:86cf2afe3e52 204
salco 6:86cf2afe3e52 205 };
salco 6:86cf2afe3e52 206 };
salco 6:86cf2afe3e52 207 /** @} */ // end of regM
salco 5:48722ae56546 208
salco 5:48722ae56546 209 #endif //__LSM303DLH_REGISTERDEF_H_