Tedd OKANO / MARY_CAMERA

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MARY_CAMERA.cpp@18:c9c3425d238c, 2014-03-11 (annotated)

Committer:
okano
Date:
Tue Mar 11 05:42:29 2014 +0000
Revision:
18:c9c3425d238c
Parent:
17:756fb618c0ed
Child:
19:1d07d6d762a9
test code VGA option (QCIF based)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okano 0:f4584dba3bac 1 #include "mbed.h"
okano 0:f4584dba3bac 2 #include "MARY_CAMERA.h"
okano 0:f4584dba3bac 3
okano 2:ee71ffdf317e 4 #define PARAM_NUM 99
okano 2:ee71ffdf317e 5 #define CAM_I2C_ADDR 0x42
okano 2:ee71ffdf317e 6
okano 0:f4584dba3bac 7 #define RESET_PULSE_WIDTH 100 // mili-seconds
okano 0:f4584dba3bac 8 #define RESET_RECOVERY_TIME 100 // mili-seconds
okano 0:f4584dba3bac 9
okano 2:ee71ffdf317e 10 #define COMMAND_WRITE 0x00
okano 2:ee71ffdf317e 11 #define COMMAND_READ 0x80
okano 2:ee71ffdf317e 12 #define COMMAND_ADDR_INCREMENT 0x20
okano 0:f4584dba3bac 13
okano 2:ee71ffdf317e 14 #define MEMORY_ADDR_LOW__REGISTER 0x0
okano 2:ee71ffdf317e 15 #define MEMORY_ADDR_MID__REGISTER 0x1
okano 2:ee71ffdf317e 16 #define MEMORY_ADDR_HIGH_REGISTER 0x2
okano 2:ee71ffdf317e 17 #define CAMERA_DATA_REGISTER 0x8
okano 2:ee71ffdf317e 18 #define CONTROL_DATA_REGISTER 0x3
okano 2:ee71ffdf317e 19 #define STATUS_REGISTER 0x4
okano 2:ee71ffdf317e 20
okano 2:ee71ffdf317e 21 #define CONTROL__PAUSE_BUFFER_UPDATE 0x01
okano 2:ee71ffdf317e 22 #define CONTROL__RESUME_BUFFER_UPDATE 0x00
okano 0:f4584dba3bac 23
okano 0:f4584dba3bac 24
okano 0:f4584dba3bac 25 MARY_CAMERA::MARY_CAMERA(
okano 4:cb0ef3fd89c9 26 PinName SPI_mosi,
okano 4:cb0ef3fd89c9 27 PinName SPI_miso,
okano 4:cb0ef3fd89c9 28 PinName SPI_sck,
okano 4:cb0ef3fd89c9 29 PinName SPI_cs,
okano 0:f4584dba3bac 30 PinName cam_reset,
okano 4:cb0ef3fd89c9 31 PinName I2C_sda,
okano 4:cb0ef3fd89c9 32 PinName I2C_scl
okano 2:ee71ffdf317e 33 ) :
okano 4:cb0ef3fd89c9 34 _spi( SPI_mosi, SPI_miso, SPI_sck ),
okano 4:cb0ef3fd89c9 35 _cs( SPI_cs ),
okano 4:cb0ef3fd89c9 36 _reset( cam_reset ),
okano 4:cb0ef3fd89c9 37 _i2c( I2C_sda, I2C_scl )
okano 0:f4584dba3bac 38 {
okano 11:61a025e8ab68 39 #ifdef IGNORE_INITIALIZATION_ERROR
okano 0:f4584dba3bac 40 init();
okano 11:61a025e8ab68 41 #else
okano 11:61a025e8ab68 42 if ( 0 != init() )
okano 11:61a025e8ab68 43 error( "camera initialization failed." );
okano 11:61a025e8ab68 44 #endif
okano 0:f4584dba3bac 45 }
okano 0:f4584dba3bac 46
okano 11:61a025e8ab68 47 int MARY_CAMERA::init( void )
okano 11:61a025e8ab68 48 {
okano 12:614be3290c47 49 const char camera_register_setting[ PARAM_NUM ][ 2 ] = {
okano 16:be1a6e3056fe 50 { 0x01, 0x40 },
okano 16:be1a6e3056fe 51 { 0x02, 0x60 },
okano 16:be1a6e3056fe 52 { 0x03, 0x02 },
okano 16:be1a6e3056fe 53 { 0x0C, 0x0C },
okano 16:be1a6e3056fe 54 { 0x0E, 0x61 },
okano 16:be1a6e3056fe 55 { 0x0F, 0x4B },
okano 16:be1a6e3056fe 56 { 0x11, 0x81 },
okano 16:be1a6e3056fe 57 { 0x12, 0x04 },
okano 16:be1a6e3056fe 58 { 0x15, 0x00 },
okano 16:be1a6e3056fe 59 { 0x16, 0x02 },
okano 16:be1a6e3056fe 60 { 0x17, 0x39 },
okano 16:be1a6e3056fe 61 { 0x18, 0x03 },
okano 16:be1a6e3056fe 62 { 0x19, 0x03 },
okano 16:be1a6e3056fe 63 { 0x1A, 0x7B },
okano 16:be1a6e3056fe 64 { 0x1E, 0x37 },
okano 16:be1a6e3056fe 65 { 0x21, 0x02 },
okano 16:be1a6e3056fe 66 { 0x22, 0x91 },
okano 16:be1a6e3056fe 67 { 0x29, 0x07 },
okano 16:be1a6e3056fe 68 { 0x32, 0x80 },
okano 16:be1a6e3056fe 69 { 0x33, 0x0B },
okano 16:be1a6e3056fe 70 { 0x34, 0x11 },
okano 16:be1a6e3056fe 71 { 0x35, 0x0B },
okano 16:be1a6e3056fe 72 { 0x37, 0x1D },
okano 16:be1a6e3056fe 73 { 0x38, 0x71 },
okano 16:be1a6e3056fe 74 { 0x39, 0x2A },
okano 16:be1a6e3056fe 75 { 0x3B, 0x12 },
okano 16:be1a6e3056fe 76 { 0x3C, 0x78 },
okano 16:be1a6e3056fe 77 { 0x3D, 0xC3 },
okano 16:be1a6e3056fe 78 { 0x3E, 0x11 },
okano 16:be1a6e3056fe 79 { 0x3F, 0x00 },
okano 16:be1a6e3056fe 80 { 0x40, 0xD0 },
okano 16:be1a6e3056fe 81 { 0x41, 0x08 },
okano 16:be1a6e3056fe 82 { 0x41, 0x38 },
okano 16:be1a6e3056fe 83 { 0x43, 0x0A },
okano 16:be1a6e3056fe 84 { 0x44, 0xF0 },
okano 16:be1a6e3056fe 85 { 0x45, 0x34 },
okano 16:be1a6e3056fe 86 { 0x46, 0x58 },
okano 16:be1a6e3056fe 87 { 0x47, 0x28 },
okano 16:be1a6e3056fe 88 { 0x48, 0x3A },
okano 16:be1a6e3056fe 89 { 0x4B, 0x09 },
okano 16:be1a6e3056fe 90 { 0x4C, 0x00 },
okano 16:be1a6e3056fe 91 { 0x4D, 0x40 },
okano 16:be1a6e3056fe 92 { 0x4E, 0x20 },
okano 16:be1a6e3056fe 93 { 0x4F, 0x80 },
okano 16:be1a6e3056fe 94 { 0x50, 0x80 },
okano 16:be1a6e3056fe 95 { 0x51, 0x00 },
okano 16:be1a6e3056fe 96 { 0x52, 0x22 },
okano 16:be1a6e3056fe 97 { 0x53, 0x5E },
okano 16:be1a6e3056fe 98 { 0x54, 0x80 },
okano 16:be1a6e3056fe 99 { 0x56, 0x40 },
okano 16:be1a6e3056fe 100 { 0x58, 0x9E },
okano 16:be1a6e3056fe 101 { 0x59, 0x88 },
okano 16:be1a6e3056fe 102 { 0x5A, 0x88 },
okano 16:be1a6e3056fe 103 { 0x5B, 0x44 },
okano 16:be1a6e3056fe 104 { 0x5C, 0x67 },
okano 16:be1a6e3056fe 105 { 0x5D, 0x49 },
okano 16:be1a6e3056fe 106 { 0x5E, 0x0E },
okano 16:be1a6e3056fe 107 { 0x69, 0x00 },
okano 16:be1a6e3056fe 108 { 0x6A, 0x40 },
okano 16:be1a6e3056fe 109 { 0x6B, 0x0A },
okano 16:be1a6e3056fe 110 { 0x6C, 0x0A },
okano 16:be1a6e3056fe 111 { 0x6D, 0x55 },
okano 16:be1a6e3056fe 112 { 0x6E, 0x11 },
okano 16:be1a6e3056fe 113 { 0x6F, 0x9F },
okano 16:be1a6e3056fe 114 { 0x70, 0x3A },
okano 16:be1a6e3056fe 115 { 0x71, 0x35 },
okano 16:be1a6e3056fe 116 { 0x72, 0x11 },
okano 16:be1a6e3056fe 117 { 0x73, 0xF1 },
okano 16:be1a6e3056fe 118 { 0x74, 0x10 },
okano 16:be1a6e3056fe 119 { 0x75, 0x05 },
okano 16:be1a6e3056fe 120 { 0x76, 0xE1 },
okano 16:be1a6e3056fe 121 { 0x77, 0x01 },
okano 16:be1a6e3056fe 122 { 0x78, 0x04 },
okano 16:be1a6e3056fe 123 { 0x79, 0x01 },
okano 16:be1a6e3056fe 124 { 0x8D, 0x4F },
okano 16:be1a6e3056fe 125 { 0x8E, 0x00 },
okano 16:be1a6e3056fe 126 { 0x8F, 0x00 },
okano 16:be1a6e3056fe 127 { 0x90, 0x00 },
okano 16:be1a6e3056fe 128 { 0x91, 0x00 },
okano 16:be1a6e3056fe 129 { 0x96, 0x00 },
okano 16:be1a6e3056fe 130 { 0x96, 0x00 },
okano 16:be1a6e3056fe 131 { 0x97, 0x30 },
okano 16:be1a6e3056fe 132 { 0x98, 0x20 },
okano 16:be1a6e3056fe 133 { 0x99, 0x30 },
okano 16:be1a6e3056fe 134 { 0x9A, 0x00 },
okano 16:be1a6e3056fe 135 { 0x9A, 0x84 },
okano 16:be1a6e3056fe 136 { 0x9B, 0x29 },
okano 16:be1a6e3056fe 137 { 0x9C, 0x03 },
okano 16:be1a6e3056fe 138 { 0x9D, 0x4C },
okano 16:be1a6e3056fe 139 { 0x9E, 0x3F },
okano 16:be1a6e3056fe 140 { 0xA2, 0x52 },
okano 16:be1a6e3056fe 141 { 0xA4, 0x88 },
okano 16:be1a6e3056fe 142 { 0xB0, 0x84 },
okano 16:be1a6e3056fe 143 { 0xB1, 0x0C },
okano 16:be1a6e3056fe 144 { 0xB2, 0x0E },
okano 16:be1a6e3056fe 145 { 0xB3, 0x82 },
okano 16:be1a6e3056fe 146 { 0xB8, 0x0A },
okano 16:be1a6e3056fe 147 { 0xC8, 0xF0 },
okano 16:be1a6e3056fe 148 { 0xC9, 0x60 },
okano 13:210f4bbd0cd6 149 };
okano 13:210f4bbd0cd6 150 const char owreg[] = {
okano 13:210f4bbd0cd6 151 0x12,
okano 13:210f4bbd0cd6 152 0x17,
okano 13:210f4bbd0cd6 153 0x18,
okano 13:210f4bbd0cd6 154 0x32,
okano 13:210f4bbd0cd6 155 0x19,
okano 13:210f4bbd0cd6 156 0x1a,
okano 13:210f4bbd0cd6 157 0x03,
okano 13:210f4bbd0cd6 158 0x0C,
okano 13:210f4bbd0cd6 159 0x3E,
okano 13:210f4bbd0cd6 160 0x70,
okano 13:210f4bbd0cd6 161 0x71,
okano 13:210f4bbd0cd6 162 0x72,
okano 13:210f4bbd0cd6 163 0x73,
okano 13:210f4bbd0cd6 164 0xA2,
okano 13:210f4bbd0cd6 165 };
okano 13:210f4bbd0cd6 166 const char vga[] = {
okano 13:210f4bbd0cd6 167 0x04, 0x13, 0x01, 0xb6, 0x02, 0x7a, 0x0a, 0x00, 0x00, 0x3a, 0x35, 0x11, 0xf0, 0x02
okano 13:210f4bbd0cd6 168 };
okano 13:210f4bbd0cd6 169
okano 13:210f4bbd0cd6 170
okano 0:f4584dba3bac 171
okano 11:61a025e8ab68 172 // SPI settings
okano 11:61a025e8ab68 173
okano 11:61a025e8ab68 174 _cs = 1; // set ChipSelect signal HIGH
okano 11:61a025e8ab68 175 _spi.format( 8 ); // camera SPI : 8bits/transfer
okano 11:61a025e8ab68 176 _spi.frequency( SPI_FREQUENCY ); // SPI frequency setting
okano 11:61a025e8ab68 177
okano 11:61a025e8ab68 178 // reset
okano 0:f4584dba3bac 179
okano 4:cb0ef3fd89c9 180 _reset = 0;
okano 11:61a025e8ab68 181 wait_ms( RESET_PULSE_WIDTH ); // assert RESET signal
okano 4:cb0ef3fd89c9 182 _reset = 1;
okano 11:61a025e8ab68 183 wait_ms( RESET_RECOVERY_TIME ); // deassert RESET signal
okano 0:f4584dba3bac 184
okano 11:61a025e8ab68 185 // set camera registers
okano 0:f4584dba3bac 186
okano 13:210f4bbd0cd6 187 for ( int i = 0; i < PARAM_NUM; i++ ) {
okano 16:be1a6e3056fe 188 if ( 0 != (_error_state = _i2c.write( CAM_I2C_ADDR, camera_register_setting[ i ], 2 )) )
okano 13:210f4bbd0cd6 189 break;
okano 12:614be3290c47 190
okano 13:210f4bbd0cd6 191 wait_ms( 20 ); // camera register writing requires this interval
okano 13:210f4bbd0cd6 192 }
okano 13:210f4bbd0cd6 193
okano 18:c9c3425d238c 194 #ifdef CAMERA__PICTSIZE_VGA
okano 13:210f4bbd0cd6 195 for ( int i = 0; i < sizeof( owreg ); i++ ) {
okano 13:210f4bbd0cd6 196 char s[ 2 ];
okano 13:210f4bbd0cd6 197 s[ 0 ] = owreg[ i ];
okano 13:210f4bbd0cd6 198 s[ 1 ] = vga[ i ];
okano 13:210f4bbd0cd6 199
okano 12:614be3290c47 200 if ( 0 != (_error_state = _i2c.write( CAM_I2C_ADDR, camera_register_setting[ i ], 2 )) )
okano 12:614be3290c47 201 break;
okano 2:ee71ffdf317e 202
okano 11:61a025e8ab68 203 wait_ms( 20 ); // camera register writing requires this interval
okano 0:f4584dba3bac 204 }
okano 14:64ea2901540c 205 #endif
okano 0:f4584dba3bac 206
okano 11:61a025e8ab68 207 return _error_state; // return non-zero if I2C access failed
okano 0:f4584dba3bac 208 }
okano 0:f4584dba3bac 209
okano 13:210f4bbd0cd6 210 int MARY_CAMERA::ready( void )
okano 13:210f4bbd0cd6 211 {
okano 11:61a025e8ab68 212 return _error_state; // return last state of I2C access
okano 8:23d14d5254d2 213 }
okano 8:23d14d5254d2 214
okano 13:210f4bbd0cd6 215 void MARY_CAMERA::transfer_a_line( short *p, int line_number, int x_offset, int n_of_pixels )
okano 13:210f4bbd0cd6 216 {
okano 9:c1e24f1bec19 217 char tmp;
okano 10:82394d226c74 218
okano 11:61a025e8ab68 219 // set camera module's buffer address
okano 0:f4584dba3bac 220 set_address( line_number * BYTE_PER_LINE + x_offset * BYTE_PER_PIXEL );
okano 0:f4584dba3bac 221
okano 11:61a025e8ab68 222 // put a read command, first return byte should be ignored
okano 0:f4584dba3bac 223 read_register( CAMERA_DATA_REGISTER );
okano 11:61a025e8ab68 224
okano 10:82394d226c74 225 for( int x = 0; x < n_of_pixels; x++ ) {
okano 11:61a025e8ab68 226 // perform 2 bytes read. a pixel data is in RGB565 format (16bits)
okano 11:61a025e8ab68 227 tmp = read_register( CAMERA_DATA_REGISTER ); // read lower byte
okano 11:61a025e8ab68 228 *p++ = (read_register( CAMERA_DATA_REGISTER ) << 8) | tmp; // read upper byte
okano 9:c1e24f1bec19 229 }
okano 0:f4584dba3bac 230 }
okano 0:f4584dba3bac 231
okano 13:210f4bbd0cd6 232 void MARY_CAMERA::open_transfer( void )
okano 13:210f4bbd0cd6 233 {
okano 11:61a025e8ab68 234 // send command to pause the camera buffer update
okano 0:f4584dba3bac 235 write_register( CONTROL_DATA_REGISTER, CONTROL__PAUSE_BUFFER_UPDATE );
okano 0:f4584dba3bac 236
okano 11:61a025e8ab68 237 // read status register (first return byte should be ignored)
okano 0:f4584dba3bac 238 read_register( STATUS_REGISTER );
okano 7:942d8d0a1760 239
okano 11:61a025e8ab68 240 // wait until the status register become 0x51(ready to transfer data)
okano 11:61a025e8ab68 241 while ( 0x51 != read_register( STATUS_REGISTER ) )
okano 11:61a025e8ab68 242 ;
okano 0:f4584dba3bac 243 }
okano 0:f4584dba3bac 244
okano 13:210f4bbd0cd6 245 void MARY_CAMERA::close_transfer( void )
okano 13:210f4bbd0cd6 246 {
okano 11:61a025e8ab68 247 // send command to resume the camera buffer update
okano 0:f4584dba3bac 248 write_register( CONTROL_DATA_REGISTER, CONTROL__RESUME_BUFFER_UPDATE );
okano 0:f4584dba3bac 249
okano 11:61a025e8ab68 250 // read status register (first return byte should be ignored)
okano 0:f4584dba3bac 251 read_register( STATUS_REGISTER );
okano 7:942d8d0a1760 252
okano 11:61a025e8ab68 253 // wait until the status register become 0x50(camera updating the buffer)
okano 11:61a025e8ab68 254 while ( 0x50 != read_register( STATUS_REGISTER ) )
okano 11:61a025e8ab68 255 ;
okano 0:f4584dba3bac 256 }
okano 0:f4584dba3bac 257
okano 13:210f4bbd0cd6 258 void MARY_CAMERA::set_address( int address )
okano 13:210f4bbd0cd6 259 {
okano 11:61a025e8ab68 260 // set memory address (3 bytes)
okano 12:614be3290c47 261
okano 0:f4584dba3bac 262 write_register( MEMORY_ADDR_LOW__REGISTER, (address >> 0) & 0xFF );
okano 0:f4584dba3bac 263 write_register( MEMORY_ADDR_MID__REGISTER, (address >> 8) & 0xFF );
okano 0:f4584dba3bac 264 write_register( MEMORY_ADDR_HIGH_REGISTER, (address >> 16) & 0xFF );
okano 0:f4584dba3bac 265 }
okano 0:f4584dba3bac 266
okano 13:210f4bbd0cd6 267 void MARY_CAMERA::write_register( char reg, char value )
okano 13:210f4bbd0cd6 268 {
okano 11:61a025e8ab68 269 // camera register write
okano 12:614be3290c47 270
okano 11:61a025e8ab68 271 send_spi( COMMAND_WRITE | reg ); // send command and register number
okano 11:61a025e8ab68 272 send_spi( value ); // send register value
okano 11:61a025e8ab68 273 }
okano 11:61a025e8ab68 274
okano 13:210f4bbd0cd6 275 int MARY_CAMERA::read_register( char reg )
okano 13:210f4bbd0cd6 276 {
okano 11:61a025e8ab68 277 // camera register read
okano 11:61a025e8ab68 278 // returning current data in SPI buffer (data returned by previous command)
okano 11:61a025e8ab68 279
okano 11:61a025e8ab68 280 return ( send_spi( COMMAND_READ | reg | ((reg == CAMERA_DATA_REGISTER) ? COMMAND_ADDR_INCREMENT : 0x00) ) );
okano 11:61a025e8ab68 281 }
okano 10:82394d226c74 282
okano 13:210f4bbd0cd6 283 int MARY_CAMERA::send_spi( char data )
okano 13:210f4bbd0cd6 284 {
okano 0:f4584dba3bac 285 int tmp;
okano 12:614be3290c47 286
okano 11:61a025e8ab68 287 // SPI access
okano 0:f4584dba3bac 288
okano 4:cb0ef3fd89c9 289 _cs = 0;
okano 4:cb0ef3fd89c9 290 tmp = _spi.write( data );
okano 4:cb0ef3fd89c9 291 _cs = 1;
okano 12:614be3290c47 292
okano 0:f4584dba3bac 293 return ( tmp );
okano 0:f4584dba3bac 294 }